16 | #include "bmi2.h"
17 |
18 | void MPU_Read_all(uint8_t reg,uint8_t *buff,uint8_t len);
19 | uint8_t MPU_Read_Byte(uint8_t reg);
20 | uint8_t MPU_Write_Byte(uint8_t reg,uint8_t data) ;
21 | /*!
22 | * @brief Function for initialization of I2C bus
23 | *
24 | * @retval 0 -> Success
25 | * @retval < 0 -> Failure Info
26 | */
27 | int8_t bmi2_user_i2c_init(void);
28 |
29 | /*!
30 | * @brief Function for initialization of SPI bus
31 | *
32 | * @retval 0 -> Success
33 | * @retval < 0 -> Failure Info
34 | */
35 | int8_t bmi2_user_spi_init(void);
36 |
37 | /*!
38 | * @brief This function provides the delay for required time (Microseconds) as per the input provided in some of the
39 | * APIs.
40 | * @param[in] period_us : The required wait time in microseconds.
41 | * @param[in] intf_ptr : Pointer to interface.
42 | * @return void.
43 | *
44 | */
45 | void user_delay_us(uint32_t period_us, void *intf_ptr);
46 |
47 | /*!
48 | * @brief This function provides the delay for required time (Milliseconds) as per the input provided in some of the
49 | * APIs.
50 | * @param[in] period_ms : The required wait time in milliseconds.
51 | * @return void.
52 | *
53 | */
54 | void user_delay_ms(uint32_t period_ms);
55 |
56 | /*!
57 | * @brief This function is for reading the sensor's registers through I2C bus.
58 | *
59 | * @param[in] reg_addr : Register address.
60 | * @param[out] reg_data: Pointer to the data buffer to store the read data.
61 | * @param[in] length : No of bytes to read.
62 | * @param[in] intf_ptr : Pointer to interface.
63 | *
64 | * @return Status of execution
65 | *
66 | * @retval = BMI2_INTF_RET_SUCCESS -> Success
67 | * @retval != BMI2_INTF_RET_SUCCESS -> Failure
68 | *
69 | */
70 | int8_t user_i2c_reg_read(uint8_t reg_addr, uint8_t *reg_data, uint32_t length, void *intf_ptr);
71 |
72 | /*!
73 | * @brief This function is for writing the sensor's registers through I2C bus.
74 | *
75 | * @param[in] reg_addr : Register address.
76 | * @param[in] reg_data : Pointer to the data buffer whose value is to be written.
77 | * @param[in] length : No of bytes to write.
78 | * @param[in] intf_ptr : Pointer to interface.
79 | *
80 | * @return Status of execution
81 | *
82 | * @retval = BMI2_INTF_RET_SUCCESS -> Success
83 | * @retval != BMI2_INTF_RET_SUCCESS -> Failure
84 | *
85 | */
86 | int8_t user_i2c_reg_write(uint8_t reg_addr, const uint8_t *reg_data, uint32_t length, void *intf_ptr);
87 |
88 | /*!
89 | * @brief This function is for reading the sensor's registers through SPI bus.
90 | *
91 | * @param[in] reg_addr : Register address.
92 | * @param[out] reg_data : Pointer to the data buffer to store the read data.
93 | * @param[in] length : No of bytes to read.
94 | * @param[in] intf_ptr : Pointer to interface.
95 | *
96 | * @return Status of execution
97 | *
98 | * @retval = BMI2_INTF_RET_SUCCESS -> Success
99 | * @retval != BMI2_INTF_RET_SUCCESS -> Failure
100 | *
101 | */
102 | int8_t user_spi_reg_read(uint8_t reg_addr, uint8_t *reg_data, uint32_t length, void *intf_ptr);
103 |
104 | /*!
105 | * @brief This function is for writing the sensor's registers through SPI bus.
106 | *
107 | * @param[in] reg_addr : Register address.
108 | * @param[in] reg_data : Pointer to the data buffer whose data has to be written.
109 | * @param[in] length : No of bytes to write.
110 | * @param[in] intf_ptr : Pointer to interface.
111 | *
112 | * @return Status of execution
113 | *
114 | * @retval = BMI2_INTF_RET_SUCCESS -> Success
115 | * @retval != BMI2_INTF_RET_SUCCESS -> Failure
116 | *
117 | */
118 | int8_t user_spi_reg_write(uint8_t reg_addr, const uint8_t *reg_data, uint32_t length, void *intf_ptr);
119 |
120 | /*!
121 | * @brief This function is to select the interface between SPI and I2C.
122 | *
123 | * @param[in] dev : Structure instance of bmi2_dev
124 | *
125 | * @return Status of execution
126 | * @retval 0 -> Success
127 | * @retval < 0 -> Failure Info
128 | */
129 | int8_t bmi2_interface_selection(struct bmi2_dev *dev);
130 |
131 | /*!
132 | * @brief This API is used to print the execution status.
133 | *
134 | * @param[in] rslt : Error code returned by the API whose execution status has to be printed.
135 | *
136 | * @return void.
137 | */
138 | void bmi2_error_codes_print_result(int8_t rslt);
139 |
140 | #ifdef __cplusplus
141 | }
142 | #endif /* End of CPP guard */
143 |
144 | #endif /* __BMI2_COMMON_H__ */
145 |
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1 | /*
2 | $License:
3 | Copyright (C) 2011-2012 InvenSense Corporation, All Rights Reserved.
4 | See included License.txt for License information.
5 | $
6 | */
7 | /**
8 | * @addtogroup DRIVERS Sensor Driver Layer
9 | * @brief Hardware drivers to communicate with sensors via I2C.
10 | *
11 | * @{
12 | * @file inv_mpu_dmp_motion_driver.h
13 | * @brief DMP image and interface functions.
14 | * @details All functions are preceded by the dmp_ prefix to
15 | * differentiate among MPL and general driver function calls.
16 | */
17 | #ifndef _INV_MPU_DMP_MOTION_DRIVER_H_
18 | #define _INV_MPU_DMP_MOTION_DRIVER_H_
19 |
20 | #include "system.h"
21 |
22 | #define TAP_X (0x01)
23 | #define TAP_Y (0x02)
24 | #define TAP_Z (0x04)
25 | #define TAP_XYZ (0x07)
26 |
27 | #define TAP_X_UP (0x01)
28 | #define TAP_X_DOWN (0x02)
29 | #define TAP_Y_UP (0x03)
30 | #define TAP_Y_DOWN (0x04)
31 | #define TAP_Z_UP (0x05)
32 | #define TAP_Z_DOWN (0x06)
33 |
34 | #define ANDROID_ORIENT_PORTRAIT (0x00)
35 | #define ANDROID_ORIENT_LANDSCAPE (0x01)
36 | #define ANDROID_ORIENT_REVERSE_PORTRAIT (0x02)
37 | #define ANDROID_ORIENT_REVERSE_LANDSCAPE (0x03)
38 |
39 | #define DMP_INT_GESTURE (0x01)
40 | #define DMP_INT_CONTINUOUS (0x02)
41 |
42 | #define DMP_FEATURE_TAP (0x001)
43 | #define DMP_FEATURE_ANDROID_ORIENT (0x002)
44 | #define DMP_FEATURE_LP_QUAT (0x004)
45 | #define DMP_FEATURE_PEDOMETER (0x008)
46 | #define DMP_FEATURE_6X_LP_QUAT (0x010)
47 | #define DMP_FEATURE_GYRO_CAL (0x020)
48 | #define DMP_FEATURE_SEND_RAW_ACCEL (0x040)
49 | #define DMP_FEATURE_SEND_RAW_GYRO (0x080)
50 | #define DMP_FEATURE_SEND_CAL_GYRO (0x100)
51 |
52 | #define INV_WXYZ_QUAT (0x100)
53 |
54 | /* Set up functions. */
55 | int dmp_load_motion_driver_firmware(void);
56 | int dmp_set_fifo_rate(unsigned short rate);
57 | int dmp_get_fifo_rate(unsigned short *rate);
58 | int dmp_enable_feature(unsigned short mask);
59 | int dmp_get_enabled_features(unsigned short *mask);
60 | int dmp_set_interrupt_mode(unsigned char mode);
61 | int dmp_set_orientation(unsigned short orient);
62 | int dmp_set_gyro_bias(long *bias);
63 | int dmp_set_accel_bias(long *bias);
64 |
65 | /* Tap functions. */
66 | int dmp_register_tap_cb(void (*func)(unsigned char, unsigned char));
67 | int dmp_set_tap_thresh(unsigned char axis, unsigned short thresh);
68 | int dmp_set_tap_axes(unsigned char axis);
69 | int dmp_set_tap_count(unsigned char min_taps);
70 | int dmp_set_tap_time(unsigned short time);
71 | int dmp_set_tap_time_multi(unsigned short time);
72 | int dmp_set_shake_reject_thresh(long sf, unsigned short thresh);
73 | int dmp_set_shake_reject_time(unsigned short time);
74 | int dmp_set_shake_reject_timeout(unsigned short time);
75 |
76 | /* Android orientation functions. */
77 | int dmp_register_android_orient_cb(void (*func)(unsigned char));
78 |
79 | /* LP quaternion functions. */
80 | int dmp_enable_lp_quat(unsigned char enable);
81 | int dmp_enable_6x_lp_quat(unsigned char enable);
82 |
83 | /* Pedometer functions. */
84 | int dmp_get_pedometer_step_count(unsigned long *count);
85 | int dmp_set_pedometer_step_count(unsigned long count);
86 | int dmp_get_pedometer_walk_time(unsigned long *time);
87 | int dmp_set_pedometer_walk_time(unsigned long time);
88 |
89 | /* DMP gyro calibration functions. */
90 | int dmp_enable_gyro_cal(unsigned char enable);
91 |
92 | /* Read function. This function should be called whenever the MPU interrupt is
93 | * detected.
94 | */
95 | int dmp_read_fifo(short *gyro, short *accel, long *quat,
96 | unsigned long *timestamp, short *sensors, unsigned char *more);
97 |
98 | #endif /* #ifndef _INV_MPU_DMP_MOTION_DRIVER_H_ */
99 |
100 |
101 |
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1 | /* ----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_f32.c
9 | *
10 | * Description: Floating-point matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | * Initializes the underlying matrix data structure.
51 | * The functions set the numRows,
52 | * numCols, and pData fields
53 | * of the matrix data structure.
54 | */
55 |
56 | /**
57 | * @addtogroup MatrixInit
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Floating-point matrix initialization.
63 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
64 | * @param[in] nRows number of rows in the matrix.
65 | * @param[in] nColumns number of columns in the matrix.
66 | * @param[in] *pData points to the matrix data array.
67 | * @return none
68 | */
69 |
70 | void arm_mat_init_f32(
71 | arm_matrix_instance_f32 * S,
72 | uint16_t nRows,
73 | uint16_t nColumns,
74 | float32_t * pData)
75 | {
76 | /* Assign Number of Rows */
77 | S->numRows = nRows;
78 |
79 | /* Assign Number of Columns */
80 | S->numCols = nColumns;
81 |
82 | /* Assign Data pointer */
83 | S->pData = pData;
84 | }
85 |
86 | /**
87 | * @} end of MatrixInit group
88 | */
89 |
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/2021舵轮步兵/Libraries/Device/arm_mat_scale_f32.c:
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1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_scale_f32.c
9 | *
10 | * Description: Multiplies a floating-point matrix by a scalar.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixScale Matrix Scale
49 | *
50 | * Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the
51 | * matrix by the scalar. For example:
52 | * \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"
53 | *
54 | * The function checks to make sure that the input and output matrices are of the same size.
55 | *
56 | * In the fixed-point Q15 and Q31 functions, scale is represented by
57 | * a fractional multiplication scaleFract and an arithmetic shift shift.
58 | * The shift allows the gain of the scaling operation to exceed 1.0.
59 | * The overall scale factor applied to the fixed-point data is
60 | *
61 | * scale = scaleFract * 2^shift.
62 | *
63 | */
64 |
65 | /**
66 | * @addtogroup MatrixScale
67 | * @{
68 | */
69 |
70 | /**
71 | * @brief Floating-point matrix scaling.
72 | * @param[in] *pSrc points to input matrix structure
73 | * @param[in] scale scale factor to be applied
74 | * @param[out] *pDst points to output matrix structure
75 | * @return The function returns either ARM_MATH_SIZE_MISMATCH
76 | * or ARM_MATH_SUCCESS based on the outcome of size checking.
77 | *
78 | */
79 |
80 | arm_status arm_mat_scale_f32(
81 | const arm_matrix_instance_f32 * pSrc,
82 | float32_t scale,
83 | arm_matrix_instance_f32 * pDst)
84 | {
85 | float32_t *pIn = pSrc->pData; /* input data matrix pointer */
86 | float32_t *pOut = pDst->pData; /* output data matrix pointer */
87 | uint32_t numSamples; /* total number of elements in the matrix */
88 | uint32_t blkCnt; /* loop counters */
89 | arm_status status; /* status of matrix scaling */
90 |
91 | #ifndef ARM_MATH_CM0_FAMILY
92 |
93 | float32_t in1, in2, in3, in4; /* temporary variables */
94 | float32_t out1, out2, out3, out4; /* temporary variables */
95 |
96 | #endif // #ifndef ARM_MATH_CM0_FAMILY
97 |
98 | #ifdef ARM_MATH_MATRIX_CHECK
99 | /* Check for matrix mismatch condition */
100 | if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
101 | {
102 | /* Set status as ARM_MATH_SIZE_MISMATCH */
103 | status = ARM_MATH_SIZE_MISMATCH;
104 | }
105 | else
106 | #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
107 | {
108 | /* Total number of samples in the input matrix */
109 | numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
110 |
111 | #ifndef ARM_MATH_CM0_FAMILY
112 |
113 | /* Run the below code for Cortex-M4 and Cortex-M3 */
114 |
115 | /* Loop Unrolling */
116 | blkCnt = numSamples >> 2;
117 |
118 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
119 | ** a second loop below computes the remaining 1 to 3 samples. */
120 | while(blkCnt > 0u)
121 | {
122 | /* C(m,n) = A(m,n) * scale */
123 | /* Scaling and results are stored in the destination buffer. */
124 | in1 = pIn[0];
125 | in2 = pIn[1];
126 | in3 = pIn[2];
127 | in4 = pIn[3];
128 |
129 | out1 = in1 * scale;
130 | out2 = in2 * scale;
131 | out3 = in3 * scale;
132 | out4 = in4 * scale;
133 |
134 |
135 | pOut[0] = out1;
136 | pOut[1] = out2;
137 | pOut[2] = out3;
138 | pOut[3] = out4;
139 |
140 | /* update pointers to process next sampels */
141 | pIn += 4u;
142 | pOut += 4u;
143 |
144 | /* Decrement the numSamples loop counter */
145 | blkCnt--;
146 | }
147 |
148 | /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
149 | ** No loop unrolling is used. */
150 | blkCnt = numSamples % 0x4u;
151 |
152 | #else
153 |
154 | /* Run the below code for Cortex-M0 */
155 |
156 | /* Initialize blkCnt with number of samples */
157 | blkCnt = numSamples;
158 |
159 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
160 |
161 | while(blkCnt > 0u)
162 | {
163 | /* C(m,n) = A(m,n) * scale */
164 | /* The results are stored in the destination buffer. */
165 | *pOut++ = (*pIn++) * scale;
166 |
167 | /* Decrement the loop counter */
168 | blkCnt--;
169 | }
170 |
171 | /* Set status as ARM_MATH_SUCCESS */
172 | status = ARM_MATH_SUCCESS;
173 | }
174 |
175 | /* Return to application */
176 | return (status);
177 | }
178 |
179 | /**
180 | * @} end of MatrixScale group
181 | */
182 |
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/2021舵轮步兵/Libraries/cmsis/Include/arm_const_structs.h:
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1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_const_structs.h
9 | *
10 | * Description: This file has constant structs that are initialized for
11 | * user convenience. For example, some can be given as
12 | * arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | * - Redistributions of source code must retain the above copyright
20 | * notice, this list of conditions and the following disclaimer.
21 | * - Redistributions in binary form must reproduce the above copyright
22 | * notice, this list of conditions and the following disclaimer in
23 | * the documentation and/or other materials provided with the
24 | * distribution.
25 | * - Neither the name of ARM LIMITED nor the names of its contributors
26 | * may be used to endorse or promote products derived from this
27 | * software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 |
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 |
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 |
49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
58 |
59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
68 |
69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
78 |
79 | #endif
80 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/cmsis/Include/core_cmFunc.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmFunc.h
3 | * @brief CMSIS Cortex-M Core Function Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMFUNC_H
42 | #define __CORE_CMFUNC_H
43 |
44 |
45 | /* ########################### Core Function Access ########################### */
46 | /** \ingroup CMSIS_Core_FunctionInterface
47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@} end of CMSIS_Core_RegAccFunctions */
86 |
87 | #endif /* __CORE_CMFUNC_H */
88 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/cmsis/Include/core_cmInstr.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmInstr.h
3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMINSTR_H
42 | #define __CORE_CMINSTR_H
43 |
44 |
45 | /* ########################## Core Instruction Access ######################### */
46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
47 | Access to dedicated instructions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
86 |
87 | #endif /* __CORE_CMINSTR_H */
88 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/cmsis/Include/core_cmSimd.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmSimd.h
3 | * @brief CMSIS Cortex-M SIMD Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMSIMD_H
42 | #define __CORE_CMSIMD_H
43 |
44 | #ifdef __cplusplus
45 | extern "C" {
46 | #endif
47 |
48 |
49 | /* ################### Compiler specific Intrinsics ########################### */
50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
51 | Access to dedicated SIMD instructions
52 | @{
53 | */
54 |
55 | /*------------------ RealView Compiler -----------------*/
56 | #if defined ( __CC_ARM )
57 | #include "cmsis_armcc.h"
58 |
59 | /*------------------ ARM Compiler V6 -------------------*/
60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
61 | #include "cmsis_armcc_V6.h"
62 |
63 | /*------------------ GNU Compiler ----------------------*/
64 | #elif defined ( __GNUC__ )
65 | #include "cmsis_gcc.h"
66 |
67 | /*------------------ ICC Compiler ----------------------*/
68 | #elif defined ( __ICCARM__ )
69 | #include
70 |
71 | /*------------------ TI CCS Compiler -------------------*/
72 | #elif defined ( __TMS470__ )
73 | #include
74 |
75 | /*------------------ TASKING Compiler ------------------*/
76 | #elif defined ( __TASKING__ )
77 | /*
78 | * The CMSIS functions have been implemented as intrinsics in the compiler.
79 | * Please use "carm -?i" to get an up to date list of all intrinsics,
80 | * Including the CMSIS ones.
81 | */
82 |
83 | /*------------------ COSMIC Compiler -------------------*/
84 | #elif defined ( __CSMC__ )
85 | #include
86 |
87 | #endif
88 |
89 | /*@} end of group CMSIS_SIMD_intrinsics */
90 |
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /* __CORE_CMSIMD_H */
97 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/cmsis/stm32f4xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/lowBO/RP-Infantry-2/e68d1115537f7608e06de8c65178ce04fa7c5f42/2021舵轮步兵/Libraries/cmsis/stm32f4xx.h
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/2021舵轮步兵/Libraries/cmsis/system_stm32f4xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f4xx.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /** @addtogroup CMSIS
29 | * @{
30 | */
31 |
32 | /** @addtogroup stm32f4xx_system
33 | * @{
34 | */
35 |
36 | /**
37 | * @brief Define to prevent recursive inclusion
38 | */
39 | #ifndef __SYSTEM_STM32F4XX_H
40 | #define __SYSTEM_STM32F4XX_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /** @addtogroup STM32F4xx_System_Includes
47 | * @{
48 | */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 |
55 | /** @addtogroup STM32F4xx_System_Exported_types
56 | * @{
57 | */
58 |
59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
60 |
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @addtogroup STM32F4xx_System_Exported_Constants
67 | * @{
68 | */
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /** @addtogroup STM32F4xx_System_Exported_Macros
75 | * @{
76 | */
77 |
78 | /**
79 | * @}
80 | */
81 |
82 | /** @addtogroup STM32F4xx_System_Exported_Functions
83 | * @{
84 | */
85 |
86 | extern void SystemInit(void);
87 | extern void SystemCoreClockUpdate(void);
88 | /**
89 | * @}
90 | */
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /*__SYSTEM_STM32F4XX_H */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /**
103 | * @}
104 | */
105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
106 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/inc/stm32f4xx_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2013 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_CRC_H
31 | #define __STM32F4xx_CRC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup CRC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup CRC_Exported_Constants
52 | * @{
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /* Exported macro ------------------------------------------------------------*/
60 | /* Exported functions --------------------------------------------------------*/
61 |
62 | void CRC_ResetDR(void);
63 | uint32_t CRC_CalcCRC(uint32_t Data);
64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
65 | uint32_t CRC_GetCRC(void);
66 | void CRC_SetIDRegister(uint8_t IDValue);
67 | uint8_t CRC_GetIDRegister(void);
68 |
69 | #ifdef __cplusplus
70 | }
71 | #endif
72 |
73 | #endif /* __STM32F4xx_CRC_H */
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/inc/stm32f4xx_dbgmcu.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_dbgmcu.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file contains all the functions prototypes for the DBGMCU firmware library.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F4xx_DBGMCU_H
30 | #define __STM32F4xx_DBGMCU_H
31 |
32 | #ifdef __cplusplus
33 | extern "C" {
34 | #endif
35 |
36 | /* Includes ------------------------------------------------------------------*/
37 | #include "stm32f4xx.h"
38 |
39 | /** @addtogroup STM32F4xx_StdPeriph_Driver
40 | * @{
41 | */
42 |
43 | /** @addtogroup DBGMCU
44 | * @{
45 | */
46 |
47 | /* Exported types ------------------------------------------------------------*/
48 | /* Exported constants --------------------------------------------------------*/
49 |
50 | /** @defgroup DBGMCU_Exported_Constants
51 | * @{
52 | */
53 | #define DBGMCU_SLEEP ((uint32_t)0x00000001)
54 | #define DBGMCU_STOP ((uint32_t)0x00000002)
55 | #define DBGMCU_STANDBY ((uint32_t)0x00000004)
56 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00))
57 |
58 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000001)
59 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00000002)
60 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00000004)
61 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00000008)
62 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00000010)
63 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00000020)
64 | #define DBGMCU_TIM12_STOP ((uint32_t)0x00000040)
65 | #define DBGMCU_TIM13_STOP ((uint32_t)0x00000080)
66 | #define DBGMCU_TIM14_STOP ((uint32_t)0x00000100)
67 | #define DBGMCU_RTC_STOP ((uint32_t)0x00000400)
68 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000800)
69 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00001000)
70 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000)
71 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000)
72 | #define DBGMCU_I2C3_SMBUS_TIMEOUT ((uint32_t)0x00800000)
73 | #define DBGMCU_CAN1_STOP ((uint32_t)0x02000000)
74 | #define DBGMCU_CAN2_STOP ((uint32_t)0x04000000)
75 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00))
76 |
77 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000001)
78 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00000002)
79 | #define DBGMCU_TIM9_STOP ((uint32_t)0x00010000)
80 | #define DBGMCU_TIM10_STOP ((uint32_t)0x00020000)
81 | #define DBGMCU_TIM11_STOP ((uint32_t)0x00040000)
82 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00))
83 | /**
84 | * @}
85 | */
86 |
87 | /* Exported macro ------------------------------------------------------------*/
88 | /* Exported functions --------------------------------------------------------*/
89 | uint32_t DBGMCU_GetREVID(void);
90 | uint32_t DBGMCU_GetDEVID(void);
91 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
92 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
93 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
94 |
95 | #ifdef __cplusplus
96 | }
97 | #endif
98 |
99 | #endif /* __STM32F4xx_DBGMCU_H */
100 |
101 | /**
102 | * @}
103 | */
104 |
105 | /**
106 | * @}
107 | */
108 |
109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
110 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/inc/stm32f4xx_iwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_iwdg.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file contains all the functions prototypes for the IWDG
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2013 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_IWDG_H
31 | #define __STM32F4xx_IWDG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup IWDG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup IWDG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup IWDG_WriteAccess
56 | * @{
57 | */
58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
61 | ((ACCESS) == IWDG_WriteAccess_Disable))
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup IWDG_prescaler
67 | * @{
68 | */
69 | #define IWDG_Prescaler_4 ((uint8_t)0x00)
70 | #define IWDG_Prescaler_8 ((uint8_t)0x01)
71 | #define IWDG_Prescaler_16 ((uint8_t)0x02)
72 | #define IWDG_Prescaler_32 ((uint8_t)0x03)
73 | #define IWDG_Prescaler_64 ((uint8_t)0x04)
74 | #define IWDG_Prescaler_128 ((uint8_t)0x05)
75 | #define IWDG_Prescaler_256 ((uint8_t)0x06)
76 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
77 | ((PRESCALER) == IWDG_Prescaler_8) || \
78 | ((PRESCALER) == IWDG_Prescaler_16) || \
79 | ((PRESCALER) == IWDG_Prescaler_32) || \
80 | ((PRESCALER) == IWDG_Prescaler_64) || \
81 | ((PRESCALER) == IWDG_Prescaler_128)|| \
82 | ((PRESCALER) == IWDG_Prescaler_256))
83 | /**
84 | * @}
85 | */
86 |
87 | /** @defgroup IWDG_Flag
88 | * @{
89 | */
90 | #define IWDG_FLAG_PVU ((uint16_t)0x0001)
91 | #define IWDG_FLAG_RVU ((uint16_t)0x0002)
92 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
93 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
94 | /**
95 | * @}
96 | */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /* Exported macro ------------------------------------------------------------*/
103 | /* Exported functions --------------------------------------------------------*/
104 |
105 | /* Prescaler and Counter configuration functions ******************************/
106 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
107 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
108 | void IWDG_SetReload(uint16_t Reload);
109 | void IWDG_ReloadCounter(void);
110 |
111 | /* IWDG activation function ***************************************************/
112 | void IWDG_Enable(void);
113 |
114 | /* Flag management function ***************************************************/
115 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
116 |
117 | #ifdef __cplusplus
118 | }
119 | #endif
120 |
121 | #endif /* __STM32F4xx_IWDG_H */
122 |
123 | /**
124 | * @}
125 | */
126 |
127 | /**
128 | * @}
129 | */
130 |
131 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
132 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/inc/stm32f4xx_rng.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_rng.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file contains all the functions prototypes for the Random
8 | * Number Generator(RNG) firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2013 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_RNG_H
31 | #define __STM32F4xx_RNG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup RNG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup RNG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup RNG_flags_definition
56 | * @{
57 | */
58 | #define RNG_FLAG_DRDY ((uint8_t)0x0001) /*!< Data ready */
59 | #define RNG_FLAG_CECS ((uint8_t)0x0002) /*!< Clock error current status */
60 | #define RNG_FLAG_SECS ((uint8_t)0x0004) /*!< Seed error current status */
61 |
62 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \
63 | ((RNG_FLAG) == RNG_FLAG_CECS) || \
64 | ((RNG_FLAG) == RNG_FLAG_SECS))
65 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \
66 | ((RNG_FLAG) == RNG_FLAG_SECS))
67 | /**
68 | * @}
69 | */
70 |
71 | /** @defgroup RNG_interrupts_definition
72 | * @{
73 | */
74 | #define RNG_IT_CEI ((uint8_t)0x20) /*!< Clock error interrupt */
75 | #define RNG_IT_SEI ((uint8_t)0x40) /*!< Seed error interrupt */
76 |
77 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00))
78 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI))
79 | /**
80 | * @}
81 | */
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /* Exported macro ------------------------------------------------------------*/
88 | /* Exported functions --------------------------------------------------------*/
89 |
90 | /* Function used to set the RNG configuration to the default reset state *****/
91 | void RNG_DeInit(void);
92 |
93 | /* Configuration function *****************************************************/
94 | void RNG_Cmd(FunctionalState NewState);
95 |
96 | /* Get 32 bit Random number function ******************************************/
97 | uint32_t RNG_GetRandomNumber(void);
98 |
99 | /* Interrupts and flags management functions **********************************/
100 | void RNG_ITConfig(FunctionalState NewState);
101 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG);
102 | void RNG_ClearFlag(uint8_t RNG_FLAG);
103 | ITStatus RNG_GetITStatus(uint8_t RNG_IT);
104 | void RNG_ClearITPendingBit(uint8_t RNG_IT);
105 |
106 | #ifdef __cplusplus
107 | }
108 | #endif
109 |
110 | #endif /*__STM32F4xx_RNG_H */
111 |
112 | /**
113 | * @}
114 | */
115 |
116 | /**
117 | * @}
118 | */
119 |
120 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
121 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/inc/stm32f4xx_wwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_wwdg.h
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file contains all the functions prototypes for the WWDG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2013 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_WWDG_H
31 | #define __STM32F4xx_WWDG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup WWDG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup WWDG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup WWDG_Prescaler
56 | * @{
57 | */
58 |
59 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000)
60 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080)
61 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100)
62 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180)
63 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
64 | ((PRESCALER) == WWDG_Prescaler_2) || \
65 | ((PRESCALER) == WWDG_Prescaler_4) || \
66 | ((PRESCALER) == WWDG_Prescaler_8))
67 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
68 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /**
75 | * @}
76 | */
77 |
78 | /* Exported macro ------------------------------------------------------------*/
79 | /* Exported functions --------------------------------------------------------*/
80 |
81 | /* Function used to set the WWDG configuration to the default reset state ****/
82 | void WWDG_DeInit(void);
83 |
84 | /* Prescaler, Refresh window and Counter configuration functions **************/
85 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
86 | void WWDG_SetWindowValue(uint8_t WindowValue);
87 | void WWDG_EnableIT(void);
88 | void WWDG_SetCounter(uint8_t Counter);
89 |
90 | /* WWDG activation function ***************************************************/
91 | void WWDG_Enable(uint8_t Counter);
92 |
93 | /* Interrupts and flags management functions **********************************/
94 | FlagStatus WWDG_GetFlagStatus(void);
95 | void WWDG_ClearFlag(void);
96 |
97 | #ifdef __cplusplus
98 | }
99 | #endif
100 |
101 | #endif /* __STM32F4xx_WWDG_H */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 | /**
108 | * @}
109 | */
110 |
111 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
112 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Libraries/src/stm32f4xx_crc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.c
4 | * @author MCD Application Team
5 | * @version V1.3.0
6 | * @date 08-November-2013
7 | * @brief This file provides all the CRC firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32f4xx_crc.h"
30 |
31 | /** @addtogroup STM32F4xx_StdPeriph_Driver
32 | * @{
33 | */
34 |
35 | /** @defgroup CRC
36 | * @brief CRC driver modules
37 | * @{
38 | */
39 |
40 | /* Private typedef -----------------------------------------------------------*/
41 | /* Private define ------------------------------------------------------------*/
42 | /* Private macro -------------------------------------------------------------*/
43 | /* Private variables ---------------------------------------------------------*/
44 | /* Private function prototypes -----------------------------------------------*/
45 | /* Private functions ---------------------------------------------------------*/
46 |
47 | /** @defgroup CRC_Private_Functions
48 | * @{
49 | */
50 |
51 | /**
52 | * @brief Resets the CRC Data register (DR).
53 | * @param None
54 | * @retval None
55 | */
56 | void CRC_ResetDR(void)
57 | {
58 | /* Reset CRC generator */
59 | CRC->CR = CRC_CR_RESET;
60 | }
61 |
62 | /**
63 | * @brief Computes the 32-bit CRC of a given data word(32-bit).
64 | * @param Data: data word(32-bit) to compute its CRC
65 | * @retval 32-bit CRC
66 | */
67 | uint32_t CRC_CalcCRC(uint32_t Data)
68 | {
69 | CRC->DR = Data;
70 |
71 | return (CRC->DR);
72 | }
73 |
74 | /**
75 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit).
76 | * @param pBuffer: pointer to the buffer containing the data to be computed
77 | * @param BufferLength: length of the buffer to be computed
78 | * @retval 32-bit CRC
79 | */
80 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
81 | {
82 | uint32_t index = 0;
83 |
84 | for(index = 0; index < BufferLength; index++)
85 | {
86 | CRC->DR = pBuffer[index];
87 | }
88 | return (CRC->DR);
89 | }
90 |
91 | /**
92 | * @brief Returns the current CRC value.
93 | * @param None
94 | * @retval 32-bit CRC
95 | */
96 | uint32_t CRC_GetCRC(void)
97 | {
98 | return (CRC->DR);
99 | }
100 |
101 | /**
102 | * @brief Stores a 8-bit data in the Independent Data(ID) register.
103 | * @param IDValue: 8-bit value to be stored in the ID register
104 | * @retval None
105 | */
106 | void CRC_SetIDRegister(uint8_t IDValue)
107 | {
108 | CRC->IDR = IDValue;
109 | }
110 |
111 | /**
112 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register
113 | * @param None
114 | * @retval 8-bit value of the ID register
115 | */
116 | uint8_t CRC_GetIDRegister(void)
117 | {
118 | return (CRC->IDR);
119 | }
120 |
121 | /**
122 | * @}
123 | */
124 |
125 | /**
126 | * @}
127 | */
128 |
129 | /**
130 | * @}
131 | */
132 |
133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
134 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Project/DebugConfig/Target_1_STM32F405RG.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 |
3 | // Debug MCU Configuration
4 | // DBG_SLEEP Debug Sleep Mode
5 | // DBG_STOP Debug Stop Mode
6 | // DBG_STANDBY Debug Standby Mode
7 | //
8 | DbgMCU_CR = 0x00000007;
9 |
10 | // Debug MCU APB1 Freeze
11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted
12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted
13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted
14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted
15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted
16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted
17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted
18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted
19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted
20 | // DBG_RTC_STOP RTC Stopped when Core is halted
21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted
22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted
23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted
24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted
25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted
26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted
27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted
28 | //
29 | DbgMCU_APB1_Fz = 0x00000000;
30 |
31 |
32 | // Debug MCU APB2 Freeze
33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted
34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted
35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted
36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted
37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted
38 | //
39 | DbgMCU_APB2_Fz = 0x00000000;
40 |
41 | // <<< end of configuration section >>>
--------------------------------------------------------------------------------
/2021舵轮步兵/Project/DebugConfig/Target_1_STM32F405RGTx.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 |
3 | // Debug MCU Configuration
4 | // DBG_SLEEP Debug Sleep Mode
5 | // DBG_STOP Debug Stop Mode
6 | // DBG_STANDBY Debug Standby Mode
7 | //
8 | DbgMCU_CR = 0x00000007;
9 |
10 | // Debug MCU APB1 Freeze
11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted
12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted
13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted
14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted
15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted
16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted
17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted
18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted
19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted
20 | // DBG_RTC_STOP RTC Stopped when Core is halted
21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted
22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted
23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted
24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted
25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted
26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted
27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted
28 | //
29 | DbgMCU_APB1_Fz = 0x00000000;
30 |
31 |
32 | // Debug MCU APB2 Freeze
33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted
34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted
35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted
36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted
37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted
38 | //
39 | DbgMCU_APB2_Fz = 0x00000000;
40 |
41 | // <<< end of configuration section >>>
--------------------------------------------------------------------------------
/2021舵轮步兵/Project/DebugConfig/Target_1_STM32F407VETx.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 |
3 | // Debug MCU Configuration
4 | // DBG_SLEEP Debug Sleep Mode
5 | // DBG_STOP Debug Stop Mode
6 | // DBG_STANDBY Debug Standby Mode
7 | //
8 | DbgMCU_CR = 0x00000007;
9 |
10 | // Debug MCU APB1 Freeze
11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted
12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted
13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted
14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted
15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted
16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted
17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted
18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted
19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted
20 | // DBG_RTC_STOP RTC Stopped when Core is halted
21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted
22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted
23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted
24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted
25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted
26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted
27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted
28 | //
29 | DbgMCU_APB1_Fz = 0x00000000;
30 |
31 |
32 | // Debug MCU APB2 Freeze
33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted
34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted
35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted
36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted
37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted
38 | //
39 | DbgMCU_APB2_Fz = 0x00000000;
40 |
41 | // <<< end of configuration section >>>
--------------------------------------------------------------------------------
/2021舵轮步兵/Project/DebugConfig/Target_1_STM32F407VG.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 |
3 | // Debug MCU Configuration
4 | // DBG_SLEEP Debug Sleep Mode
5 | // DBG_STOP Debug Stop Mode
6 | // DBG_STANDBY Debug Standby Mode
7 | //
8 | DbgMCU_CR = 0x00000007;
9 |
10 | // Debug MCU APB1 Freeze
11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted
12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted
13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted
14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted
15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted
16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted
17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted
18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted
19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted
20 | // DBG_RTC_STOP RTC Stopped when Core is halted
21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted
22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted
23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted
24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted
25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted
26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted
27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted
28 | //
29 | DbgMCU_APB1_Fz = 0x00000000;
30 |
31 |
32 | // Debug MCU APB2 Freeze
33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted
34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted
35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted
36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted
37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted
38 | //
39 | DbgMCU_APB2_Fz = 0x00000000;
40 |
41 | // <<< end of configuration section >>>
--------------------------------------------------------------------------------
/2021舵轮步兵/Project/EventRecorderStub.scvd:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Project/JLinkLog.txt:
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/2021舵轮步兵/Project/JLinkSettings.ini:
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1 | [BREAKPOINTS]
2 | ForceImpTypeAny = 0
3 | ShowInfoWin = 1
4 | EnableFlashBP = 2
5 | BPDuringExecution = 0
6 | [CFI]
7 | CFISize = 0x00
8 | CFIAddr = 0x00
9 | [CPU]
10 | OverrideMemMap = 0
11 | AllowSimulation = 1
12 | ScriptFile=""
13 | [FLASH]
14 | CacheExcludeSize = 0x00
15 | CacheExcludeAddr = 0x00
16 | MinNumBytesFlashDL = 0
17 | SkipProgOnCRCMatch = 1
18 | VerifyDownload = 1
19 | AllowCaching = 1
20 | EnableFlashDL = 2
21 | Override = 1
22 | Device="Unspecified"
23 | [GENERAL]
24 | WorkRAMSize = 0x00
25 | WorkRAMAddr = 0x00
26 | RAMUsageLimit = 0x00
27 | [SWO]
28 | SWOLogFile=""
29 | [MEM]
30 | RdOverrideOrMask = 0x00
31 | RdOverrideAndMask = 0xFFFFFFFF
32 | RdOverrideAddr = 0xFFFFFFFF
33 | WrOverrideOrMask = 0x00
34 | WrOverrideAndMask = 0xFFFFFFFF
35 | WrOverrideAddr = 0xFFFFFFFF
36 |
--------------------------------------------------------------------------------
/2021舵轮步兵/Project/Objects/ExtDll.iex:
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1 | [EXTDLL]
2 | Count=0
3 |
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/2021舵轮步兵/Project/Objects/project.lnp:
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1 | --cpu=Cortex-M4.fp.sp
2 | ".\objects\usart.o"
3 | ".\objects\sys.o"
4 | ".\objects\arm_mat_init_f32.o"
5 | ".\objects\arm_mat_trans_f32.o"
6 | ".\objects\arm_mat_sub_f32.o"
7 | ".\objects\arm_mat_scale_f32.o"
8 | ".\objects\arm_mat_mult_f32.o"
9 | ".\objects\arm_mat_inverse_f64.o"
10 | ".\objects\arm_mat_inverse_f32.o"
11 | ".\objects\arm_mat_add_f32.o"
12 | "..\Libraries\Device\arm_cortexM4lf_math.lib"
13 | ".\objects\startup_stm32f40xx.o"
14 | ".\objects\misc.o"
15 | ".\objects\stm32f4xx_syscfg.o"
16 | ".\objects\stm32f4xx_gpio.o"
17 | ".\objects\stm32f4xx_rcc.o"
18 | ".\objects\stm32f4xx_tim.o"
19 | ".\objects\stm32f4xx_usart.o"
20 | ".\objects\system_stm32f4xx.o"
21 | ".\objects\stm32f4xx_can.o"
22 | ".\objects\stm32f4xx_dma.o"
23 | ".\objects\stm32f4xx_exti.o"
24 | ".\objects\stm32f4xx_flash.o"
25 | ".\objects\stm32f4xx_spi.o"
26 | ".\objects\stm32f4xx_adc.o"
27 | ".\objects\stm32f4xx_iwdg.o"
28 | ".\objects\main.o"
29 | ".\objects\stm32f4xx_it.o"
30 | ".\objects\go.o"
31 | ".\objects\system.o"
32 | ".\objects\zigbee_upper.o"
33 | ".\objects\freertos_init.o"
34 | ".\objects\sonic.o"
35 | ".\objects\iwdg.o"
36 | ".\objects\can1.o"
37 | ".\objects\can2.o"
38 | ".\objects\led.o"
39 | ".\objects\tim.o"
40 | ".\objects\myiic.o"
41 | ".\objects\uart4.o"
42 | ".\objects\uart1.o"
43 | ".\objects\uart3.o"
44 | ".\objects\mpu6050.o"
45 | ".\objects\inv_mpu.o"
46 | ".\objects\inv_mpu_dmp_motion_driver.o"
47 | ".\objects\bmi.o"
48 | ".\objects\bmi2.o"
49 | ".\objects\bmi2_common.o"
50 | ".\objects\bmi2_ois.o"
51 | ".\objects\bmi270.o"
52 | ".\objects\bmi270_context.o"
53 | ".\objects\vision.o"
54 | ".\objects\buff.o"
55 | ".\objects\auto.o"
56 | ".\objects\sincostable.o"
57 | ".\objects\kalman.o"
58 | ".\objects\masters_rtx.o"
59 | ".\objects\cusui.o"
60 | ".\objects\crc.o"
61 | ".\objects\referee.o"
62 | ".\objects\system_state.o"
63 | ".\objects\gimbal.o"
64 | ".\objects\rudder.o"
65 | ".\objects\remote.o"
66 | ".\objects\chassis.o"
67 | ".\objects\module.o"
68 | ".\objects\rifle.o"
69 | ".\objects\motor.o"
70 | ".\objects\my_imu.o"
71 | ".\objects\pid.o"
72 | ".\objects\croutine.o"
73 | ".\objects\event_groups.o"
74 | ".\objects\list.o"
75 | ".\objects\queue.o"
76 | ".\objects\tasks.o"
77 | ".\objects\timers.o"
78 | ".\objects\heap_4.o"
79 | ".\objects\port.o"
80 | --strict --scatter ".\Objects\project.sct"
81 | --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
82 | --info sizes --info totals --info unused --info veneers
83 | --list ".\Listings\project.map" -o .\Objects\project.axf
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/2021舵轮步兵/Project/Objects/project.sct:
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region
6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | .ANY (+XO)
11 | }
12 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
13 | .ANY (+RW +ZI)
14 | }
15 | }
16 |
17 |
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/README.en.md:
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1 | # RM步兵2
2 |
3 | #### Description
4 | RM2021赛季-深圳大学RobotPilots战队-舵轮步兵代码
5 |
6 | #### Software Architecture
7 | Software architecture description
8 |
9 | #### Installation
10 |
11 | 1. xxxx
12 | 2. xxxx
13 | 3. xxxx
14 |
15 | #### Instructions
16 |
17 | 1. xxxx
18 | 2. xxxx
19 | 3. xxxx
20 |
21 | #### Contribution
22 |
23 | 1. Fork the repository
24 | 2. Create Feat_xxx branch
25 | 3. Commit your code
26 | 4. Create Pull Request
27 |
28 |
29 | #### Gitee Feature
30 |
31 | 1. You can use Readme\_XXX.md to support different languages, such as Readme\_en.md, Readme\_zh.md
32 | 2. Gitee blog [blog.gitee.com](https://blog.gitee.com)
33 | 3. Explore open source project [https://gitee.com/explore](https://gitee.com/explore)
34 | 4. The most valuable open source project [GVP](https://gitee.com/gvp)
35 | 5. The manual of Gitee [https://gitee.com/help](https://gitee.com/help)
36 | 6. The most popular members [https://gitee.com/gitee-stars/](https://gitee.com/gitee-stars/)
37 |
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/README.md:
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1 | # 双枪舵轮步兵
2 |
3 | #### 说明
4 |
5 | * 此代码为RM2021赛季深圳大学RobotPilots战队的舵轮步兵代码
6 | * 代码中包含了两种陀螺仪（BMI270和MPU6050）的驱动
7 | * 代码只包含一台舵轮步兵的控制参数和逻辑，不需要通过system.h中的Infantry宏定义控制步兵ID
8 | * 舵轮步兵包含云台、底盘、超电控制主控共计3主控，通过system.h中的Master宏定义控制主控ID（不包括超电控制主控代码）
9 | * **步兵操作思维导图、舵轮控制原理** 放在doc文件夹中
10 |
11 | **云台代码功能：**
12 |
13 | 接收遥控器控制命令，作为主机定义整车系统状态，监测整车信息标志位等等，控制云台Yaw、Pitch双轴运动，与视觉通信，控制打弹及热量限制，下发控制命令。
14 |
15 | **底盘代码功能：**
16 |
17 | 接收云台主控的系统状态信息，与裁判系统通信、负责UI绘制并上传裁判系统数据，并与超电控制主控通信、负责底盘功率限制和控制底盘4个驱动电机、负责控制舵电机朝向控制等任务。
18 |
19 |
20 |
21 |
22 |
23 |
24 |
25 | # A
26 |
27 | ### 开发依赖工具：Keil
28 |
29 | ### 开发系统环境：windows10
30 |
31 | ### 开发硬件环境：STM32F407
32 |
33 | # B
34 |
35 | ### 编译方式：gcc
36 |
37 | ### 代码烧录：Jlink
38 |
39 | # C
40 |
41 | ### **文件目录结构、代码内容等说明：**
42 |
43 | 
44 |
45 | * **rudder.c文件为舵轮控制代码**
46 |
47 | * 系统驱动部分的代码主要为基础外设驱动、stm32底层驱动程序以及外设参数初始化程序
48 |
49 | * FUNCTION文件夹为视觉功能（自瞄、打符）的控制代码
50 |
51 | * 设备树DEVICE文件夹中的所有代码.c文件第一个函数均为任务执行函数，motor文件中为整车电机管理程序，my_imu文件中存放对于陀螺仪数据的处理程序
52 |
53 | * 任务调度表位于APP文件夹中的FreeRTOS_Init.c文件中
54 |
55 | 
56 |
57 | * 在“系统驱动”部分的代码中有包含了部分中间层软件库
58 |
59 | Driver.h中包含了简单的电机数据收发统一管理库和PID基本算法、模式辨别类
60 |
61 | GO.h中包含了RP机器人队伍统一的模式和整车逻辑管理类
62 |
63 | # D
64 |
65 | ### 程序架构
66 |
67 | 
68 |
69 | ### 通信数据流线路框图
70 |
71 | 
72 |
73 | ### 供电线路框图和裁判系统连接图
74 |
75 | 
76 |
77 | # E 重要代码原理介绍与理论支持分析
78 |
79 | ### 1、舵轮控制原理
80 |
81 | > ## ***具体详细的解算控制分析都在doc文件夹的文档中***
82 |
83 | ### 
84 |
85 | 以左前轮的速度合成解算为示例，说明文档中有具体分析
86 |
87 | 
88 |
89 | 核心算法如图：
90 |
91 | 
92 |
93 | ### 2、双枪控制与枪管切换
94 |
95 | 发射机构为单拨盘双枪管垂直摩擦轮电机结构，在切换枪管的控制上，在学校调试时卡弹的情况难以避免，故卡弹处理对于枪管的切换有很大帮助，**具体代码位于Rifle.c文件中**，包含拨盘卡弹处理以及双枪切换条件的设置，控制上设置了手动切换枪管和自动切换枪管，不可同时打弹。
96 |
97 |
98 |
99 | ### 3、系统控制命令捕捉
100 |
101 | 
102 |
103 | 每个函数当中不存在轮询，执行速度较快，可以实时、同时（执行速度在1ms内）捕捉各个按键的反应值，系统采用状态检测后上报系统，再下发各个设备树任务响应状态的写法，在每个按键函数中能够清楚反映操作意图，以Z按键为例：
104 |
105 | 
106 |
107 | 每个按键的5个状态在不同功能操作上发挥不同的作用，这使得后期采纳操作手反馈、商讨做出修改更加快捷、可观、有规划，并且能够保证代码整洁性和稳定性。
108 |
109 | 同样，对于遥控器的控制也有类似的操作，**具体程序均位于Remote.c中**。
110 |
111 |
112 |
113 | # F 程序层级
114 |
115 | 
116 |
117 |
118 |
119 |
120 |
121 | # G 未来优化方向
122 |
123 | 1、舵轮底盘的加减速目前是一个变斜率的斜坡函数，目前能缓解一定程度的加减速带来的车身平衡影响和倾覆，但响应不能太快，加减速有一定延迟，需要采用更优的策略，由于紧迫的时间关系，比赛前没来得及调试。
124 |
125 | 2、CAN1作为上下主控的通信线路负担可能较大，但目前能够维持整车正常运行，是由于一开始规划不当所导致。CAN1和CAN2的任务分配上可进行优化。
126 |
127 | 3、双枪云台的4个摩擦轮电机本身存在弊端，Pwm电机在堵转时会出现重启重校准导致尿弹，未来摩擦轮电机选型会优化。
128 |
129 |
130 |
131 | 小小鸣谢
132 |
133 | 在此特别感谢深圳大学RobotPilots战队给予我这么一个共同努力热情满满的大家庭，不论是哪一个组别的伙伴们一年来都辛苦了，尤其是步兵组的全体成员！同时也感谢全国所有学校共同呈现如此精彩的技术交流，祝愿所有为了梦想而努力的机甲大师们未来一帆风顺，成为自己人生中的机甲大师！
134 |
135 |
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