├── .gitignore ├── LICENSE ├── README.md ├── doc ├── analog_sweep.png ├── block_diagram.odg ├── block_diagram.png ├── bnc_z0_sweep.png ├── falling_edge.png ├── first_sweep.png └── tdr_r0_pcb.jpg ├── gateware ├── README.md ├── dac.py ├── delay.py ├── spi.py ├── sweeps │ ├── 6002_ustrip_load_0.npy │ ├── 6002_ustrip_load_1.npy │ ├── 6002_ustrip_load_2.npy │ ├── 6002_ustrip_load_3.npy │ ├── 6002_ustrip_load_4.npy │ ├── 6002_ustrip_load_5.npy │ ├── 6002_ustrip_load_6.npy │ ├── 6002_ustrip_load_7.npy │ ├── 6002_ustrip_load_8.npy │ ├── 6002_ustrip_load_9.npy │ ├── NOTES │ ├── black_sma_0.npy │ ├── black_sma_1.npy │ ├── black_sma_2.npy │ ├── black_sma_3.npy │ ├── black_sma_4.npy │ ├── black_sma_5.npy │ ├── black_sma_6.npy │ ├── black_sma_7.npy │ ├── black_sma_8.npy │ ├── black_sma_9.npy │ ├── bnc_tee_25ohm_0.npy │ ├── bnc_tee_25ohm_1.npy │ ├── bnc_tee_25ohm_2.npy │ ├── bnc_tee_25ohm_3.npy │ ├── bnc_tee_25ohm_4.npy │ ├── bnc_tee_25ohm_5.npy │ ├── bnc_tee_25ohm_6.npy │ ├── bnc_tee_25ohm_7.npy │ ├── bnc_tee_25ohm_8.npy │ ├── bnc_tee_25ohm_9.npy │ ├── bnc_tee_50ohm_0.npy │ ├── bnc_tee_50ohm_1.npy │ ├── bnc_tee_50ohm_2.npy │ ├── bnc_tee_50ohm_3.npy │ ├── bnc_tee_50ohm_4.npy │ ├── bnc_tee_50ohm_5.npy │ ├── bnc_tee_50ohm_6.npy │ ├── bnc_tee_50ohm_7.npy │ ├── bnc_tee_50ohm_8.npy │ ├── bnc_tee_50ohm_9.npy │ ├── bnc_tee_open_0.npy │ ├── bnc_tee_open_1.npy │ ├── bnc_tee_open_2.npy │ ├── bnc_tee_open_3.npy │ ├── bnc_tee_open_4.npy │ ├── bnc_tee_open_5.npy │ ├── bnc_tee_open_6.npy │ ├── bnc_tee_open_7.npy │ ├── bnc_tee_open_8.npy │ ├── bnc_tee_open_9.npy │ ├── fr408_1mm_cpwg_load_0.npy │ ├── fr408_1mm_cpwg_load_1.npy │ ├── fr408_1mm_cpwg_load_2.npy │ ├── fr408_1mm_cpwg_load_3.npy │ ├── fr408_1mm_cpwg_load_4.npy │ ├── fr408_1mm_cpwg_load_5.npy │ ├── fr408_1mm_cpwg_load_6.npy │ ├── fr408_1mm_cpwg_load_7.npy │ ├── fr408_1mm_cpwg_load_8.npy │ ├── fr408_1mm_cpwg_load_9.npy │ ├── fr408_1mm_cpwg_open_0.npy │ ├── fr408_1mm_cpwg_open_1.npy │ ├── fr408_1mm_cpwg_open_2.npy │ ├── fr408_1mm_cpwg_open_3.npy │ ├── fr408_1mm_cpwg_open_4.npy │ ├── fr408_1mm_cpwg_open_5.npy │ ├── fr408_1mm_cpwg_open_6.npy │ ├── fr408_1mm_cpwg_open_7.npy │ ├── fr408_1mm_cpwg_open_8.npy │ ├── fr408_1mm_cpwg_open_9.npy │ ├── linx_sma_6002_ustrip_0.npy │ ├── linx_sma_6002_ustrip_1.npy │ ├── linx_sma_6002_ustrip_2.npy │ ├── linx_sma_6002_ustrip_3.npy │ ├── linx_sma_6002_ustrip_4.npy │ ├── linx_sma_6002_ustrip_5.npy │ ├── linx_sma_6002_ustrip_6.npy │ ├── linx_sma_6002_ustrip_7.npy │ ├── linx_sma_6002_ustrip_8.npy │ ├── linx_sma_6002_ustrip_9.npy │ ├── m_m_sma_open_0.npy │ ├── m_m_sma_open_1.npy │ ├── m_m_sma_open_2.npy │ ├── m_m_sma_open_3.npy │ ├── m_m_sma_open_4.npy │ ├── m_m_sma_open_5.npy │ ├── m_m_sma_open_6.npy │ ├── m_m_sma_open_7.npy │ ├── m_m_sma_open_8.npy │ ├── m_m_sma_open_9.npy │ ├── m_m_sma_short_0.npy │ ├── m_m_sma_short_1.npy │ ├── m_m_sma_short_2.npy │ ├── m_m_sma_short_3.npy │ ├── m_m_sma_short_4.npy │ ├── m_m_sma_short_5.npy │ ├── m_m_sma_short_6.npy │ ├── m_m_sma_short_7.npy │ ├── m_m_sma_short_8.npy │ ├── m_m_sma_short_9.npy │ ├── m_m_sma_thru_0.npy │ ├── m_m_sma_thru_1.npy │ ├── m_m_sma_thru_2.npy │ ├── m_m_sma_thru_3.npy │ ├── m_m_sma_thru_4.npy │ ├── m_m_sma_thru_5.npy │ ├── m_m_sma_thru_6.npy │ ├── m_m_sma_thru_7.npy │ ├── m_m_sma_thru_8.npy │ ├── m_m_sma_thru_9.npy │ ├── m_m_thru_load_0.npy │ ├── m_m_thru_load_1.npy │ ├── m_m_thru_load_2.npy │ ├── m_m_thru_load_3.npy │ ├── m_m_thru_load_4.npy │ ├── m_m_thru_load_5.npy │ ├── m_m_thru_load_6.npy │ ├── m_m_thru_load_7.npy │ ├── m_m_thru_load_8.npy │ ├── m_m_thru_load_9.npy │ ├── plot_sandbox.py │ ├── sbb_cpwg_load_0.npy │ ├── sbb_cpwg_load_1.npy │ ├── sbb_cpwg_load_2.npy │ ├── sbb_cpwg_load_3.npy │ ├── sbb_cpwg_load_4.npy │ ├── sbb_cpwg_load_5.npy │ ├── sbb_cpwg_load_6.npy │ ├── sbb_cpwg_load_7.npy │ ├── sbb_cpwg_load_8.npy │ ├── sbb_cpwg_load_9.npy │ ├── sbb_cpwg_open_0.npy │ ├── sbb_cpwg_open_1.npy │ ├── sbb_cpwg_open_2.npy │ ├── sbb_cpwg_open_3.npy │ ├── sbb_cpwg_open_4.npy │ ├── sbb_cpwg_open_5.npy │ ├── sbb_cpwg_open_6.npy │ ├── sbb_cpwg_open_7.npy │ ├── sbb_cpwg_open_8.npy │ ├── sbb_cpwg_open_9.npy │ ├── siw_load_0.npy │ ├── siw_load_1.npy │ ├── siw_load_2.npy │ ├── siw_load_3.npy │ ├── siw_load_4.npy │ ├── siw_load_5.npy │ ├── siw_load_6.npy │ ├── siw_load_7.npy │ ├── siw_load_8.npy │ ├── siw_load_9.npy │ ├── siw_open_0.npy │ ├── siw_open_1.npy │ ├── siw_open_2.npy │ ├── siw_open_3.npy │ ├── siw_open_4.npy │ ├── siw_open_5.npy │ ├── siw_open_6.npy │ ├── siw_open_7.npy │ ├── siw_open_8.npy │ ├── siw_open_9.npy │ ├── sma_to_ufl_0.npy │ ├── sma_to_ufl_1.npy │ ├── sma_to_ufl_2.npy │ ├── sma_to_ufl_3.npy │ ├── sma_to_ufl_4.npy │ ├── sma_to_ufl_5.npy │ ├── sma_to_ufl_6.npy │ ├── sma_to_ufl_7.npy │ ├── sma_to_ufl_8.npy │ ├── sma_to_ufl_9.npy │ ├── split_bad_port_0.npy │ ├── split_bad_port_1.npy │ ├── split_bad_port_2.npy │ ├── split_bad_port_3.npy │ ├── split_bad_port_4.npy │ ├── split_bad_port_5.npy │ ├── split_bad_port_6.npy │ ├── split_bad_port_7.npy │ ├── split_bad_port_8.npy │ ├── split_bad_port_9.npy │ ├── trl_0201_cap_load_0.npy │ ├── trl_0201_cap_load_1.npy │ ├── trl_0201_cap_load_2.npy │ ├── trl_0201_cap_load_3.npy │ ├── trl_0201_cap_load_4.npy │ ├── trl_0201_cap_load_5.npy │ ├── trl_0201_cap_load_6.npy │ ├── trl_0201_cap_load_7.npy │ ├── trl_0201_cap_load_8.npy │ ├── trl_0201_cap_load_9.npy │ ├── trl_0201_cap_open_0.npy │ ├── trl_0201_cap_open_1.npy │ ├── trl_0201_cap_open_2.npy │ ├── trl_0201_cap_open_3.npy │ ├── trl_0201_cap_open_4.npy │ ├── trl_0201_cap_open_5.npy │ ├── trl_0201_cap_open_6.npy │ ├── trl_0201_cap_open_7.npy │ ├── trl_0201_cap_open_8.npy │ ├── trl_0201_cap_open_9.npy │ ├── trl_shunt_bias_0.npy │ ├── trl_shunt_bias_1.npy │ ├── trl_shunt_bias_2.npy │ ├── trl_shunt_bias_3.npy │ ├── trl_shunt_bias_4.npy │ ├── trl_shunt_bias_5.npy │ ├── trl_shunt_bias_6.npy │ ├── trl_shunt_bias_7.npy │ ├── trl_shunt_bias_8.npy │ ├── trl_shunt_bias_9.npy │ ├── unconnected_0.npy │ ├── unconnected_1.npy │ ├── unconnected_2.npy │ ├── unconnected_3.npy │ ├── unconnected_4.npy │ ├── unconnected_5.npy │ ├── unconnected_6.npy │ ├── unconnected_7.npy │ ├── unconnected_8.npy │ ├── unconnected_9.npy │ ├── white_sma_open_0.npy │ ├── white_sma_open_1.npy │ ├── white_sma_open_2.npy │ ├── white_sma_open_3.npy │ ├── white_sma_open_4.npy │ ├── white_sma_open_5.npy │ ├── white_sma_open_6.npy │ ├── white_sma_open_7.npy │ ├── white_sma_open_8.npy │ └── white_sma_open_9.npy ├── tdr.py ├── tdr_dump.py └── uart.py ├── hardware ├── bom │ └── ibom.html ├── clock.sch ├── comparator.sch ├── conn_power.sch ├── dac.sch ├── delay.sch ├── fpga.sch ├── output_driver.sch ├── tdr-cache.lib ├── tdr.kicad_pcb ├── tdr.pro ├── tdr.sch ├── tdr_bom.ods └── trig_level_dac.sch ├── software ├── README.md ├── bbone_spi_bitbang.py ├── init_gpio.sh ├── mmap_gpio.py ├── plot.py └── tdr.py ├── tdr_r0_schematic.pdf └── test └── mdo3000_j3_digital.set /.gitignore: -------------------------------------------------------------------------------- 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