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For 424 | the avoidance of doubt, this paragraph does not form part of the 425 | public licenses. 426 | 427 | Creative Commons may be contacted at creativecommons.org. 428 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # FPGA / ASIC Engineering Roadmap 2 | 3 | **🚧 WORK IN PROGRESS!** 4 | 5 | According to the positive feedback I received for the [Embedded Systems Engineering Roadmap](https://github.com/m3y54m/Embedded-Engineering-Roadmap) and due to my own interest in FPGA, I decided to create a separate roadmap specifically for FPGA design in this repository. 6 | 7 | > [!WARNING] 8 | > The contents in this repository are gathered from various sources to create a roadmap. At present, no sorting or filtering has been done on this information. **If you require a comprehensive roadmap right now, the contents in this repository might not yet be suitable for you.** 9 | 10 | > [!TIP] 11 | > To differentiate between the types of learning resources and the quality of their content, specific symbols are used before each item. 12 | > 13 | > **Resource types:** 14 | > - 📘 : Books 15 | > - 🎞️ : Videos 16 | > - 📝 : Write-ups, articles, and blog posts 17 | > - 🔗 : Other links that do not fit into any of the above categories 18 | > 19 | > **Content quality symbols:** 20 | > - 👶 : Easy-to-understand and beginner-friendly resources. Refer to them if you do not have prior knowledge in a topic. 21 | > - 💎 : Well-known references that have truly invaluable and comprehensive content. Refer to them if you want to deepen your understanding of a topic. 22 | 23 | 24 | ## Learning Resources 25 | 26 | - [📝👶 What are FPGAs?](https://hackaday.io/project/27550-the-hobbyists-guide-to-fpgas/log/68114-what-are-fpgas) 27 | - [🎞️👶 Introduction to FPGA - Shawn Hymel (YouTube Playlist)](https://youtube.com/playlist?list=PLEBQazB0HUyT1WmMONxRZn9NmQ_9CIKhb) 28 | - [🔗👶 FPGA 101 - Nandland](https://nandland.com/fpga-101/) 29 | - [🎞️ Nandland (YouTube Channel)](https://www.youtube.com/@Nandland) 30 | - [🎞️👶 FPGAs for Beginners (YouTube Channel)](https://www.youtube.com/@FPGAsforBeginners) 31 | - [🔗 asic-world.com](https://www.asic-world.com/) 32 | - [📝👶💎 Project F - FPGA Tutorials](https://projectf.io/tutorials/) 33 | - [🔗💎 Tiny Tapeout: from idea to chip design in minutes!](https://tinytapeout.com/) 34 | - [📝💎 Learning FPGA, yosys, nextpnr, and RISC-V](https://github.com/BrunoLevy/learn-fpga) 35 | - [🔗💎 Doulos - Global Independent Leaders in Design and Verification KnowHow](https://www.doulos.com/) 36 | - [🎞️ Coursera - FPGA Design for Embedded Systems Specialization](https://www.coursera.org/specializations/fpga-design) 37 | - [🎞️ Udemy – FPGA Embedded Design, Part 1 - Verilog](https://www.udemy.com/course/fpga-embedded-design-verilog/) 38 | - [🎞️ Udemy – FPGA Embedded Design, Part 2 - Basic FPGA Training](https://www.udemy.com/course/fpga-embedded-design-fpgas/) 39 | - [🎞️ Udemy – FPGA Embedded Design, Part 3 - EDA Tools](https://www.udemy.com/course/fpga-embedded-design-eda-tools/) 40 | - [🎞️ Udemy – FPGA Embedded Design, Part 4 - Microprocessor Design](https://www.udemy.com/course/fpga-embedded-design-cpu/) 41 | - [🔗👶 FPGA 4 Students](https://www.fpga4student.com/) 42 | 43 | ## Projects 44 | 45 | - [🔗 FPGA 4 Fun](https://www.fpga4fun.com/) 46 | - [🔗 AMD Based FPGA Projects - Whitney Knitter](https://hackster.io/whitney-knitter) 47 | - [🔗 AMD Based FPGA Projects - Adam Taylor](https://www.hackster.io/adam-taylor) 48 | - [🎞️ RISC-V Single Cycle Core in Verilog](https://www.youtube.com/playlist?list=PL5AmAh9QoSK7Fwk9vOJu-3VqBng_HjGFc) 49 | - [🎞️ SPI Project in FPGA - Ambient Light Sensor](https://youtube.com/playlist?list=PLnAoag7Ew-vq5kOyfyNN50xL718AtLoCQ) 50 | 51 | ## Roadmap 52 | 53 | The world of FPGA engineering thrives on two crucial disciplines: **Implementation Engineering** and **Verification Engineering**. While intertwined, each plays a distinct role in bringing innovative ideas to life on programmable hardware. 54 | 55 | **Implementation Engineers** are the architects of the FPGA, meticulously crafting the design by translating algorithms and functionalities into hardware configurations. They leverage their expertise in *hardware description languages* and *synthesis tools* to optimize design performance and resource utilization. 56 | 57 | **Verification Engineers**, on the other hand, safeguard the design's integrity. They design and execute comprehensive *test strategies*, utilizing advanced *simulation tools* and real-world test setups. By comparing expected behavior with actual outputs, they identify and eliminate errors, ensuring the final product functions as intended. 58 | 59 | Both disciplines are equally critical, working hand-in-hand throughout the development process. Implementation engineers rely on verification feedback to refine their designs, while verification engineers depend on accurate implementation models to create effective tests. 60 | 61 | Commons skills and specialized expertise needed in these disciplines are mentioned below: 62 | 63 | ### ✳️ Common Skills 64 | 65 | #### 🔵 Hardware Description Languages (HDLs): 66 | 67 | Knowledge of VHDL and/or Verilog is crucial as they're commonly used to design and describe digital circuits. 68 | 69 | - [📝 VHDLwhiz - Basic VHDL Tutorials](https://vhdlwhiz.com/basic-vhdl-tutorials/) 70 | - [🎞️ VHDLwhiz.com (YouTube Channel)](https://www.youtube.com/@VHDLwhiz) 71 | - [📝 HDLBits — Verilog Practice](https://hdlbits.01xz.net/wiki/Main_Page) 72 | - [📝 FPGA designs with Verilog](https://verilogguide.readthedocs.io/en/latest/index.html) 73 | 74 | #### 🔵 Digital System Design 75 | 76 | Fundamental concepts in digital system design like logic gates, finite-state machines, and memory architectures. 77 | 78 | - [📝 Tiny Tapeout > Digital Design Guide](https://tinytapeout.com/digital_design/) 79 | - [📝 FPGA Fundamentals - Nandland](https://nandland.com/fpga-101/) 80 | - [📘 Digital Design - Morris Mano, Michael Ciletti](https://a.co/d/c3tBaoc) 81 | - [📘 Digital Design and Computer Architecture: ARM Edition - Sarah Harris, David Harris](https://a.co/d/4otoVvI) 82 | - [📘 Digital Design and Computer Architecture: RISC-V Edition - Sarah Harris, David Harris](https://a.co/d/61l7Jtb) 83 | - [📘 Digital Fundamentals - Thomas L. Floyd](https://a.co/d/2lgJKNX) 84 | 85 | #### 🔵 Computer Architecture 86 | 87 | Deep understanding of how CPUs and memory systems work. This can be extended to specialized architectures, such as Graphics Processing Units (GPUs) or custom accelerator designs. 88 | 89 | - [📘 Computer Organization and Design: ARM Edition - David A. Patterson, John L. Hennessy](https://a.co/d/8YPUXG7) 90 | - [📘 Digital Design and Computer Architecture: ARM Edition - Sarah Harris, David Harris](https://a.co/d/4otoVvI) 91 | - [📘 Digital Design and Computer Architecture: RISC-V Edition - Sarah Harris, David Harris](https://a.co/d/61l7Jtb) 92 | - [🎞️ Build an 8-bit computer from scratch](https://eater.net/8bit/) 93 | 94 | #### 🔵 Test and Debugging Techniques 95 | 96 | Knowledge of simulation tools, testbenches, and hardware debugging techniques. 97 | 98 | - [📝 Debugging with Speed and Precision: Mastering the Art of FPGA Debugging](https://fpgainsights.com/fpga/debugging-with-speed-and-precision-mastering-the-art-of-fpga-debugging/) 99 | 100 | #### 🔵 Version Control 101 | 102 | Familiarity with systems like Git or Subversion is important for managing code and tracking changes. 103 | 104 | - [🎞️ Git Tutorial for Beginners: Learn Git in 1 Hour](https://www.youtube.com/watch?v=8JJ101D3knE) 105 | - [🎞️ Git for Professionals Tutorial - Tools & Concepts for Mastering Version Control with Git](https://www.youtube.com/watch?v=Uszj_k0DGsg) 106 | - [🔗 Apache® Subversion®](https://subversion.apache.org/) 107 | 108 | #### 🔵 Familiarity with FPGA and ASIC Design Flow 109 | 110 | Understanding the overall process of design, from specification to synthesis and place-and-route, is helpful in order to interface effectively with the design team. 111 | 112 | - [📘 A Hands-On Guide to Designing Embedded Systems - Adam Taylor, Dan Binnun, Saket Srivastava](https://www.amazon.com/Hands-Guide-Designing-Embedded-Systems/dp/1630816833) 113 | - [📝 Understanding FPGA Programming and Design Flow](https://hardwarebee.com/understanding-fpga-programming-and-design-flow/) 114 | - [📝 ASIC Design Flow in VLSI Engineering Services – A Quick Guide](https://www.einfochips.com/blog/asic-design-flow-in-vlsi-engineering-services-a-quick-guide/) 115 | 116 | **Both implementation and verification engineer need to be aware of requirements, architecture and interconnect standards and interfaces.** 117 | 118 | ---------------- 119 | 120 | ### ✳️ Implementation Engineer 121 | 122 | As an FPGA (Field Programmable Gate Array) implement engineer, there are several important topics to be well-versed in: 123 | 124 | #### 🔵 FPGA Design Methodologies: 125 | 126 | Understanding of various FPGA design techniques and best practices is important. 127 | 128 | FPGA design methodologies encompass a broad range of techniques and strategies used in the process of designing and implementing digital logic on FPGA devices. Here are some key methods: 129 | 130 | ##### 🔶 RTL Design 131 | 132 | Register Transfer Level (RTL) design is a method where the digital system is described at a high level in terms of data flow between registers and the logical operations performed on the data. This allows the designer to focus on the logic functionality and data flow, rather than the specifics of how each gate is connected. 133 | 134 | - [📝 Understanding RTL Design: Building the Foundation of Digital Systems](https://www.linkedin.com/pulse/understanding-rtl-design-building-foundation-digital-systems-pandey/) 135 | 136 | ##### 🔶 High-Level Synthesis (HLS) 137 | 138 | HLS is a design methodology where the digital system is described in a high-level programming language such as C or C++, and then automatically converted into RTL code by an HLS tool. This approach can be faster and easier than writing RTL code directly, especially for complex algorithms. 139 | 140 | - [📘 High-Level Synthesis Made Easy: Synthesizing Behavioral Descriptions directly into Hardware Circuits](https://www.hlsbook.com/) 141 | - [📘 High-Level Synthesis Blue Book](https://hlsbluebook.org/) 142 | - [🔗 Vitis HLS — Vitis™ Tutorials](https://xilinx.github.io/Vitis-Tutorials/2021-1/build/html/docs/Getting_Started/Vitis_HLS/Getting_Started_Vitis_HLS.html) 143 | 144 | ##### 🔶 IP Core Based Design 145 | 146 | IP (Intellectual Property) cores are pre-designed circuit blocks that can be reused in multiple designs. Using IP cores can significantly speed up the design process and improve the reliability of the design, since the IP cores have been pre-verified. 147 | 148 | - [📝 Basics of core-based FPGA design](https://www.embedded.com/basics-of-core-based-fpga-design-part-1-core-types-trade-offs/) 149 | - [📝 IP Cores For FPGA Designs](https://www.electronicsforu.com/electronics-projects/electronics-design-guides/ip-cores-fpga-designs) 150 | - [📝 So you want to Design a FPGA IP Core!](https://www.hackster.io/adam-taylor/so-you-want-to-design-a-fpga-ip-core-56e0f1) 151 | 152 | ##### 🔶 Hardware-Software Co-Design 153 | 154 | In many FPGA applications, a portion of the system functionality is implemented in software running on an embedded processor, while other portions are implemented in custom hardware on the FPGA. Hardware-software co-design involves designing the hardware and software components together to achieve the best overall system performance. 155 | 156 | - [📝 Hardware/Software Co-Design: The Five Core Principles](https://www.electronicdesign.com/technologies/eda/article/21267771/recogni-hardwaresoftware-codesign-the-five-core-principles) 157 | 158 | ##### 🔶 Design for Test (DFT) 159 | 160 | This is a design methodology where testability features are added to the hardware design to make it easier to test and debug. This might include adding scan chains or built-in self-test (BIST) capabilities. 161 | 162 | - [📝 DESIGN FOR TEST](https://www.faststreamtech.com/services/semiconductor-design/design-for-test/) 163 | 164 | ##### 🔶 Timing-Driven Design 165 | 166 | This design methodology prioritizes meeting timing constraints. This may involve strategies such as pipelining to increase clock speed, carefully partitioning the design to reduce routing congestion, or using timing constraints files to guide the place-and-route process. 167 | 168 | ##### 🔶 Resource-Optimized Design 169 | 170 | This involves making the most efficient use of FPGA resources such as logic blocks, DSP blocks, and memory blocks. It might involve strategies such as sharing resources between multiple functions, or optimizing the logic to reduce the number of logic blocks used. 171 | 172 | These methodologies are not mutually exclusive and can often be used together in the same design. The appropriate methodology to use depends on the specific design goals and constraints. 173 | 174 | #### 🔵 Timing Analysis 175 | 176 | Proficiency in handling setup and hold times, clock domain crossings, and other timing-related issues. 177 | 178 | #### 🔵 Embedded Systems 179 | 180 | Understanding of embedded system design, including both hardware and software aspects. 181 | 182 | - [🔗 Embedded Systems Engineering Roadmap](https://github.com/m3y54m/Embedded-Engineering-Roadmap) 183 | 184 | #### 🔵 Digital Signal Processing 185 | 186 | Depending on the application, an understanding of digital signal processing concepts can be very useful. 187 | 188 | - [📘💎 The Scientist and Engineer's Guide to Digital Signal Processing - Steven W. Smith](https://www.dspguide.com/pdfbook.htm) 189 | - [🔗 controlpaths - Blogs in control and signal processing](https://www.controlpaths.com/) 190 | - [🎞️ Digital Signal Processing (ECSE-4530) Lectures, Fall 2014 (YouTube Playlist)](https://youtube.com/playlist?list=PLuh62Q4Sv7BUSzx5Jr8Wrxxn-U10qG1et) 191 | - [📘 Real-Time Digital Signal Processing: Fundamentals, Implementations and Applications - Sen M. Kuo, Bob H. Lee, Wenshun Tian](https://www.wiley.com/en-us/Real+Time+Digital+Signal+Processing%3A+Fundamentals%2C+Implementations+and+Applications%2C+3rd+Edition-p-9781118414323) 192 | - [📘 Schaum's Outline of Signals and Systems - Hwei P. Hsu](https://www.mhprofessional.com/schaum-s-outline-of-signals-and-systems-fourth-edition-9781260454246-usa) 193 | - [📘💎 Digital Signal Processing - John G. Proakis, Dimitris K. Manolakis](https://a.co/d/75P5PiE) 194 | - [🎞️ Discrete Fourier Transform - Simple Step by Step](https://www.youtube.com/watch?v=mkGsMWi_j4Q) 195 | - [🎞️ The Fast Fourier Transform (FFT): Most Ingenious Algorithm Ever?](https://youtu.be/h7apO7q16V0) 196 | - [🎞️ The FFT Algorithm - Simple Step by Step](https://www.youtube.com/watch?v=htCj9exbGo0) 197 | 198 | #### 🔵 Power and Thermal Management 199 | 200 | Techniques to optimize the power consumption and manage heat dissipation. 201 | 202 | #### 🔵 Software Development Skills 203 | 204 | Including proficiency in languages such as C/C++, Python, and knowing how to work with software drivers for hardware interfaces. 205 | 206 | #### 🔵 FPGA Toolchain 207 | 208 | Understanding of specific FPGA toolchains like Xilinx Vivado, Intel Quartus, etc. 209 | 210 | - [🔗 EDA Playground](https://www.edaplayground.com/) 211 | - [🔗 Yosys Open SYnthesis Suite](https://github.com/YosysHQ/yosys) 212 | - [🔗 GHDL - an open-source simulator for the VHDL language](https://github.com/ghdl/ghdl) 213 | - [🔗 GTKWave - a fully featured GTK+ based wave viewer](https://github.com/gtkwave/gtkwave) 214 | - [🔗 ModelSim HDL simulator](https://www.intel.com/content/www/us/en/software-kit/750666/modelsim-intel-fpgas-standard-edition-software-version-20-1-1.html) 215 | - [🔗 AMD (Xilinx) Design Tools](https://www.xilinx.com/products/design-tools.html) 216 | - [🔗 Intel (Altera) Development Tools](https://www.intel.com/content/www/us/en/products/details/fpga/development-tools.html) 217 | - [🔗 Lattice FPGA Design Software](https://www.latticesemi.com/Products/DesignSoftwareAndIP) 218 | - [🔗 Cadence Design Tools](https://www.cadence.com/en_US/home/tools.html) 219 | - [🔗 Synopsys Design Tools](https://www.synopsys.com/implementation-and-signoff.html) 220 | 221 | ---------- 222 | 223 | ### ✳️ Verification Engineer 224 | 225 | The other side of the coin is the verification engineer they play a crucial role in the development of hardware and software systems, ensuring the design meets the specified requirements. Here are several important subjects and topics that a Verification Engineer should know: 226 | 227 | #### 🔵 Hardware Verification Languages (HVLs) 228 | 229 | These include SystemVerilog, which is commonly used for hardware verification, and others like Property Specification Language (PSL). 230 | 231 | - [📝 SystemVerilog Tutorial](https://www.asic-world.com/systemverilog/tutorial.html) 232 | - [📝 Property Specification Language Tutorial](https://www.project-veripage.com/psl_tutorial_1.php) 233 | 234 | #### 🔵 Testbench Creation 235 | 236 | Verification engineers must know how to develop testbenches to simulate and verify the functionality and performance of a design. 237 | 238 | - [📝 SystemVerilog TestBench](https://www.chipverify.com/systemverilog/systemverilog-simple-testbench) 239 | 240 | #### 🔵 SystemVerilog Assertions and Functional Coverage 241 | 242 | These are key for ensuring the design behaves as expected under all conditions, and for making sure all important scenarios are tested. 243 | 244 | - [📘 SystemVerilog for Verification - Chris Spear , Greg Tumbush](https://link.springer.com/book/10.1007/978-1-4614-0715-7) 245 | 246 | #### 🔵 Universal Verification Methodology (UVM) 247 | 248 | This is an industry-standard methodology for verification of hardware designs. 249 | 250 | - [🔗 UVM (Standard Universal Verification Methodology)](https://www.accellera.org/downloads/standards/uvm) 251 | - [📝 UVM 1.2 User Guide](http://www.accellera.org/images//downloads/standards/uvm/uvm_users_guide_1.2.pdf) 252 | - [📝 UVM Guide for Beginners](https://colorlesscube.com/uvm-guide-for-beginners/) 253 | - [📘 The UVM Primer: A Step-by-Step Introduction to the Universal Verification Methodology - Ray Salemi](https://www.amazon.com/dp/0974164933?_encoding=UTF8&psc=1&ref_=cm_sw_r_cp_ud_dp_SFYBP2WRG9PGJYY6RBEE) 254 | 255 | #### 🔵 Formal Verification Methods 256 | 257 | Including equivalence checking and model checking. 258 | 259 | - [📝 Verilog, Formal Verification and Verilator Beginner's Tutorial](https://zipcpu.com/tutorial/) 260 | - [📝 11 Myths About Formal Verification](https://www.electronicdesign.com/technologies/eda/article/21807132/11-myths-about-formal-verification) 261 | 262 | #### 🔵 Scripting Languages 263 | 264 | Languages such as TCL, Python, Perl, or Shell scripting are often used to automate tasks in the verification process. 265 | 266 | - [📝 Why you need to learn Tcl](https://vhdlwhiz.com/why-you-need-to-learn-tcl/) 267 | - [📝 Top 10 Tips for efficient Perl Scripting for Chip Designers](https://www.design-reuse.com/articles/20613/perl-scripting-chip-design.html) 268 | - [📝 The Python for Verification Series](https://verificationacademy.com/news/the-python-for-verification-series) 269 | - [🔗 cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python](https://www.cocotb.org) 270 | 271 | #### 🔵 Industry Standards 272 | 273 | Familiarity with relevant industry standards can be important, especially in fields like telecommunications or automotive. 274 | 275 | ## Contribution 276 | 277 | If you are an expert or experienced individual in the field of FPGA and ASIC design, I kindly request for comments and suggestions on this roadmap. 278 | 279 | **What topics should be included in the FPGA / ASIC design roadmap?** 280 | 281 | **What are the best resources you know to learn each topic in the roadmap?** 282 | 283 | Feel free to [open an issue](https://github.com/m3y54m/FPGA-ASIC-Roadmap/issues) or [make a pull request](https://github.com/m3y54m/FPGA-ASIC-Roadmap/pulls) and express your ideas. 284 | 285 | The first step to building a roadmap is to gather information, categorize it under different titles, and determine the importance of each title. So I started [a discussion about the roadmap](https://www.reddit.com/r/FPGA/comments/15g64oj/fpga_asic_design_roadmap/?utm_source=share&utm_medium=web2x&context=3) on Reddit. 286 | 287 | ## Acknowledgement 288 | 289 | Special thanks to [u/No_Delivery_1049](https://www.reddit.com/user/No_Delivery_1049/) the reddit user who made this [comment](https://www.reddit.com/r/FPGA/comments/15g64oj/comment/juir34n/?utm_source=share&utm_medium=web2x&context=3) that served as the base of this roadmap. 290 | --------------------------------------------------------------------------------