├── library.properties ├── .gitignore ├── library.json ├── .github ├── workflows │ ├── Arduino-Lint-Check.yml │ └── clang-format-check.yml └── ISSUE_TEMPLATE │ └── bug-report.yml ├── LICENSE ├── README.md ├── src ├── sths34pf80_api │ ├── LICENSE.txt │ ├── sths34pf80_reg.h │ └── sths34pf80_reg.c ├── M5_STHS34PF80.cpp └── M5_STHS34PF80.h ├── examples ├── Unit_TMOS_BasicReadings │ └── Unit_TMOS_BasicReadings.ino └── Hat_TMOS_BasicReadings │ └── Hat_TMOS_BasicReadings.ino └── .clang-format /library.properties: -------------------------------------------------------------------------------- 1 | name=M5-STHS34PF80 2 | version=0.0.1 3 | author=M5Stack 4 | maintainer=M5Stack 5 | sentence=Library for M5Stack Unit TMOS. 6 | paragraph=See more on http://M5Stack.com 7 | category=Sensors 8 | url=https://github.com/m5stack/M5-STHS34PF80 9 | architectures=esp32 10 | includes=M5_STHS34PF80.h -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Prerequisites 2 | *.d 3 | 4 | # Compiled Object files 5 | *.slo 6 | *.lo 7 | *.o 8 | *.obj 9 | 10 | # Precompiled Headers 11 | *.gch 12 | *.pch 13 | 14 | # Compiled Dynamic libraries 15 | *.so 16 | *.dylib 17 | *.dll 18 | 19 | # Fortran module files 20 | *.mod 21 | *.smod 22 | 23 | # Compiled Static libraries 24 | *.lai 25 | *.la 26 | *.a 27 | *.lib 28 | 29 | # Executables 30 | *.exe 31 | *.out 32 | *.app 33 | -------------------------------------------------------------------------------- /library.json: -------------------------------------------------------------------------------- 1 | { 2 | "name": "M5-STHS34PF80", 3 | "description": "Library for M5Stack Unit TMOS", 4 | "keywords": "M5Stack Driver STHS34PF80", 5 | "authors": { 6 | "name": "M5Stack", 7 | "url": "http://www.m5stack.com" 8 | }, 9 | "repository": { 10 | "type": "git", 11 | "url": "https://github.com/m5stack/M5-STHS34PF80.git" 12 | }, 13 | "version": "0.0.1", 14 | "frameworks": "arduino", 15 | "platforms": "espressif32" 16 | } -------------------------------------------------------------------------------- /.github/workflows/Arduino-Lint-Check.yml: -------------------------------------------------------------------------------- 1 | name: Arduino Lint Check 2 | on: 3 | push: 4 | branches: [ master ] 5 | pull_request: 6 | branches: [ master ] 7 | jobs: 8 | lint: 9 | name: Lint Check 10 | runs-on: ubuntu-latest 11 | steps: 12 | - uses: actions/checkout@v2 13 | - uses: arduino/arduino-lint-action@v1 14 | with: 15 | library-manager: update 16 | compliance: strict 17 | project-type: all -------------------------------------------------------------------------------- /.github/workflows/clang-format-check.yml: -------------------------------------------------------------------------------- 1 | name: clang-format Check 2 | on: [push, pull_request] 3 | jobs: 4 | formatting-check: 5 | name: Formatting Check 6 | runs-on: ubuntu-latest 7 | strategy: 8 | matrix: 9 | path: 10 | - check: './' # path to include 11 | exclude: '' # path to exclude 12 | # - check: 'src' 13 | # exclude: '(Fonts)' # Exclude file paths containing "Fonts" 14 | # - check: 'examples' 15 | # exclude: '' 16 | steps: 17 | - uses: actions/checkout@v3.1.0 18 | - name: Run clang-format style check for C/C++/Protobuf programs. 19 | uses: jidicula/clang-format-action@v4.9.0 20 | with: 21 | clang-format-version: '13' 22 | check-path: ${{ matrix.path['check'] }} 23 | exclude-regex: ${{ matrix.path['exclude'] }} 24 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2024 M5Stack Technology CO LTD 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # M5-STHS34PF80 2 | 3 | ## Overview 4 | 5 | basic 6 | 7 | ### SKU:U185 8 | 9 | Contains M5Stack-**Unit TMOS PIR** related case programs. 10 | 11 | **TMOS PIR** is a highly sensitive infrared sensor unit for presence and motion detection. It uses the STHS34PF80 chip solution. It communicates with the M5 device via I2C communication (default address: 0x5A). Its working principle is based on the blackbody radiation principle described by Planck's law, and can monitor ambient temperature and detect human presence and movement. The sensor can distinguish between stationary and moving objects and has an 80-degree field of view, providing a wide detection range. In addition, it supports adjustable sampling frequency and gain mode to adapt to different application requirements. Suitable for a variety of applications such as alarm systems, smart lighting and occupancy detection. 12 | 13 | ## Related Link 14 | 15 | - [TMOS PIR - Document & Datasheet](https://docs.m5stack.com/en/products/sku/U185) 16 | 17 | ## License 18 | 19 | - [M5-STHS34PF80- MIT](LICENSE) -------------------------------------------------------------------------------- /src/sths34pf80_api/LICENSE.txt: -------------------------------------------------------------------------------- 1 | BSD 3-Clause License 2 | 3 | Copyright (c) 2022, STMicroelectronics 4 | All rights reserved. 5 | 6 | Redistribution and use in source and binary forms, with or without 7 | modification, are permitted provided that the following conditions are met: 8 | 9 | * Redistributions of source code must retain the above copyright notice, this 10 | list of conditions and the following disclaimer. 11 | 12 | * Redistributions in binary form must reproduce the above copyright notice, 13 | this list of conditions and the following disclaimer in the documentation 14 | and/or other materials provided with the distribution. 15 | 16 | * Neither the name of the copyright holder nor the names of its 17 | contributors may be used to endorse or promote products derived from 18 | this software without specific prior written permission. 19 | 20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/bug-report.yml: -------------------------------------------------------------------------------- 1 | # Source: 2 | # https://github.com/Tinyu-Zhao/M5-Depends/blob/main/.github/ISSUE_TEMPLATE/bug-report.yml 3 | # See: 4 | # https://docs.github.com/communities/using-templates-to-encourage-useful-issues-and-pull-requests/syntax-for-issue-forms 5 | 6 | name: Bug report 7 | description: Report a problem with the code in this repository. 8 | labels: 9 | - "type: bug" 10 | body: 11 | - type: markdown 12 | attributes: 13 | value: "Thank you for opening an issue on an M5Stack Arduino library repository.\n\ 14 | To improve the speed of resolution please review the following guidelines and common troubleshooting steps below before creating the issue:\n\ 15 | If you have any UIFLOW questions you can ask in the [special board](https://community.m5stack.com/category/5/uiflow), there will be many enthusiastic friends to help you.\n\ 16 | Do not use GitHub issues for troubleshooting projects and issues. Instead use the forums at https://community.m5stack.com to ask questions and troubleshoot why something isn't working as expected. In many cases the problem is a common issue that you will more quickly receive help from the forum community. GitHub issues are meant for known defects in the code. If you don't know if there is a defect in the code then start with troubleshooting on the forum first." 17 | - type: textarea 18 | id: description 19 | attributes: 20 | label: Describe the bug 21 | description: A clear and concise description of what the bug is. 22 | validations: 23 | required: true 24 | - type: textarea 25 | id: reproduce 26 | attributes: 27 | label: To reproduce 28 | description: Provide the specific set of steps we can follow to reproduce the problem. 29 | placeholder: | 30 | 1. In this environment... 31 | 2. With this config... 32 | 3. Run '...' 33 | 4. See error... 34 | validations: 35 | required: true 36 | - type: textarea 37 | id: expected 38 | attributes: 39 | label: Expected behavior 40 | description: What would you expect to happen after following those instructions? 41 | validations: 42 | required: true 43 | - type: textarea 44 | id: screenshots 45 | attributes: 46 | label: Screenshots 47 | description: If applicable, add screenshots to help explain your problem. 48 | validations: 49 | required: false 50 | - type: textarea 51 | id: information 52 | attributes: 53 | label: Environment 54 | description: | 55 | If applicable, add screenshots to help explain your problem. 56 | examples: 57 | - **OS**: Ubuntu 20.04 58 | - **IDE & IDE Version**: Arduino 1.8.19 Or Platform IO v2.5.0 59 | - **Repository Version**: 0.4.0 60 | value: | 61 | - OS: 62 | - IDE &IDE Version: 63 | - Repository Version: 64 | validations: 65 | required: false 66 | - type: textarea 67 | id: additional 68 | attributes: 69 | label: Additional context 70 | description: Add any additional information here. 71 | validations: 72 | required: false 73 | - type: checkboxes 74 | id: checklist 75 | attributes: 76 | label: Issue checklist 77 | description: Please double-check that you have done each of the following things before submitting the issue. 78 | options: 79 | - label: I searched for previous reports in [the issue tracker](https://github.com/m5stack/M5-STHS34PF80/issues?q=) 80 | required: true 81 | - label: My report contains all necessary details 82 | required: true 83 | -------------------------------------------------------------------------------- /examples/Unit_TMOS_BasicReadings/Unit_TMOS_BasicReadings.ino: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2024 M5Stack Technology CO LTD 3 | * 4 | * SPDX-License-Identifier: MIT 5 | */ 6 | 7 | /* 8 | * @file BasicReadings.ino 9 | * @author Tinyu(tinyu@m5stack.com) 10 | * @brief TMOS basic readings 11 | * @version 0.1 12 | * @date 2024-07-22 13 | * 14 | * 15 | * @Hardwares: M5Core + Unit TMOS 16 | * @Platform Version: Arduino M5Stack Board Manager v2.1.1 17 | * @Dependent Library: 18 | * M5_STHS34PF80 https://github.com/m5stack/M5_STHS34PF80 19 | */ 20 | #include 21 | #include "M5_STHS34PF80.h" 22 | 23 | M5_STHS34PF80 TMOS; 24 | 25 | uint8_t motionHysteresis = 0; 26 | int16_t motionVal = 0, presenceVal = 0; 27 | uint16_t motionThresholdVal = 0, precenceThresholdVal = 0; 28 | sths34pf80_gain_mode_t gainMode; 29 | 30 | void setup() { 31 | M5.begin(); 32 | M5.Lcd.setTextColor(YELLOW); 33 | M5.Lcd.setTextSize(2); 34 | M5.Lcd.setCursor(80, 10); 35 | M5.Lcd.println("Unit-TMOS TEST"); 36 | Serial.println("Unit-TMOS TEST"); 37 | M5.Lcd.setCursor(120, 35); 38 | M5.Lcd.setTextColor(WHITE); 39 | 40 | // Initialise I2C and devices 41 | while (TMOS.begin(&Wire, STHS34PF80_I2C_ADDRESS, 21, 22) == false) { 42 | M5.Lcd.setCursor(60, 35); 43 | M5.Lcd.setTextColor(RED); 44 | M5.Lcd.println("Device init error"); 45 | Serial.println("I2C Error - check I2C Address"); 46 | Serial.println("Error setting up device - please check wiring."); 47 | delay(200); 48 | } 49 | 50 | Serial.println("Open the Serial Plotter for graphical viewing"); 51 | TMOS.setTmosODR(STHS34PF80_TMOS_ODR_AT_30Hz); 52 | // TMOS.setMotionThreshold(0xFF); 53 | TMOS.setPresenceThreshold(0xC8); // Default value 54 | TMOS.setMotionThreshold(0xC8); 55 | TMOS.setPresenceHysteresis(0x32); 56 | TMOS.setMotionHysteresis(0x32); 57 | 58 | ////Default mode, may cause inaccurate detection of MotionValFlag bit. 59 | // TMOS.setGainMode(STHS34PF80_GAIN_DEFAULT_MODE); 60 | 61 | // Decreasing gain mode, detection distance decreases 62 | // TMOS.setGainMode(STHS34PF80_GAIN_WIDE_MODE); 63 | // TMOS.setTmosSensitivity(0xff); 64 | // TMOS.resetAlgo(); 65 | 66 | TMOS.getGainMode(&gainMode); 67 | TMOS.getMotionThreshold(&motionThresholdVal); 68 | TMOS.getPresenceThreshold(&precenceThresholdVal); 69 | TMOS.getMotionHysteresis(&motionHysteresis); 70 | Serial.printf("precenceThresholdVal:%x, motionThresholdVal:%x, motionHysteresis:%x GainMode:%x\n", 71 | precenceThresholdVal, motionThresholdVal, motionHysteresis, gainMode); 72 | delay(1000); 73 | } 74 | 75 | void loop() { 76 | sths34pf80_tmos_drdy_status_t dataReady; 77 | TMOS.getDataReady(&dataReady); 78 | 79 | if (dataReady.drdy == 1) { 80 | // Real-time detection of presence and motion infrared energy values 81 | sths34pf80_tmos_func_status_t status; 82 | TMOS.getPresenceValue(&presenceVal); 83 | TMOS.getMotionValue(&motionVal); 84 | TMOS.getStatus(&status); 85 | 86 | M5.Lcd.fillRect(104, 68, 80, 20, BLACK); 87 | M5.Lcd.setCursor(0, 70); 88 | M5.Lcd.printf("Presence:%d", presenceVal); 89 | 90 | M5.Lcd.fillRect(165, 90, 100, 20, BLACK); 91 | M5.Lcd.setCursor(0, 90); 92 | M5.Lcd.printf("PrescenceFlag:%s", status.pres_flag ? "Detected" : "None"); 93 | 94 | M5.Lcd.fillRect(83, 108, 60, 20, BLACK); 95 | M5.Lcd.setCursor(0, 110); 96 | M5.Lcd.printf("Motion:%d", motionVal); 97 | 98 | M5.Lcd.fillRect(165, 130, 100, 20, BLACK); 99 | M5.Lcd.setCursor(0, 130); 100 | M5.Lcd.printf("MotionValFlag:%s", status.mot_flag ? "Detected" : "None"); 101 | 102 | // Output only if presence/motion is detected 103 | if (status.pres_flag == 1) { 104 | TMOS.getPresenceValue(&presenceVal); 105 | Serial.printf("Prescence Detected! PrescenceValue:%d\n", presenceVal); 106 | } 107 | 108 | if (status.mot_flag == 1) { 109 | TMOS.getMotionValue(&motionVal); 110 | Serial.printf("Motion Detected! MotionValue:%d\n", motionVal); 111 | } 112 | } 113 | } 114 | -------------------------------------------------------------------------------- /.clang-format: -------------------------------------------------------------------------------- 1 | --- 2 | Language: Cpp 3 | BasedOnStyle: Google 4 | AccessModifierOffset: -1 5 | AlignAfterOpenBracket: Align 6 | AlignConsecutiveMacros: true 7 | AlignConsecutiveAssignments: true 8 | AlignConsecutiveDeclarations: false 9 | AlignEscapedNewlines: Left 10 | AlignOperands: true 11 | AlignTrailingComments: true 12 | AllowAllArgumentsOnNextLine: true 13 | AllowAllConstructorInitializersOnNextLine: true 14 | AllowAllParametersOfDeclarationOnNextLine: true 15 | AllowShortBlocksOnASingleLine: Never 16 | AllowShortCaseLabelsOnASingleLine: false 17 | AllowShortFunctionsOnASingleLine: false 18 | AllowShortLambdasOnASingleLine: All 19 | AllowShortIfStatementsOnASingleLine: WithoutElse 20 | AllowShortLoopsOnASingleLine: true 21 | AlwaysBreakAfterDefinitionReturnType: None 22 | AlwaysBreakAfterReturnType: None 23 | AlwaysBreakBeforeMultilineStrings: true 24 | AlwaysBreakTemplateDeclarations: Yes 25 | BinPackArguments: true 26 | BinPackParameters: true 27 | BraceWrapping: 28 | AfterCaseLabel: false 29 | AfterClass: false 30 | AfterControlStatement: false 31 | AfterEnum: false 32 | AfterFunction: false 33 | AfterNamespace: false 34 | AfterObjCDeclaration: false 35 | AfterStruct: false 36 | AfterUnion: false 37 | AfterExternBlock: false 38 | BeforeCatch: false 39 | BeforeElse: false 40 | IndentBraces: false 41 | SplitEmptyFunction: true 42 | SplitEmptyRecord: true 43 | SplitEmptyNamespace: true 44 | BreakBeforeBinaryOperators: None 45 | BreakBeforeBraces: Attach 46 | BreakBeforeInheritanceComma: false 47 | BreakInheritanceList: BeforeColon 48 | BreakBeforeTernaryOperators: true 49 | BreakConstructorInitializersBeforeComma: false 50 | BreakConstructorInitializers: BeforeColon 51 | BreakAfterJavaFieldAnnotations: false 52 | BreakStringLiterals: true 53 | ColumnLimit: 120 54 | CommentPragmas: '^ IWYU pragma:' 55 | CompactNamespaces: false 56 | ConstructorInitializerAllOnOneLineOrOnePerLine: true 57 | ConstructorInitializerIndentWidth: 4 58 | ContinuationIndentWidth: 4 59 | Cpp11BracedListStyle: true 60 | DeriveLineEnding: true 61 | DerivePointerAlignment: true 62 | DisableFormat: false 63 | ExperimentalAutoDetectBinPacking: false 64 | FixNamespaceComments: true 65 | ForEachMacros: 66 | - foreach 67 | - Q_FOREACH 68 | - BOOST_FOREACH 69 | IncludeBlocks: Regroup 70 | IncludeCategories: 71 | - Regex: '^' 72 | Priority: 2 73 | SortPriority: 0 74 | - Regex: '^<.*\.h>' 75 | Priority: 1 76 | SortPriority: 0 77 | - Regex: '^<.*' 78 | Priority: 2 79 | SortPriority: 0 80 | - Regex: '.*' 81 | Priority: 3 82 | SortPriority: 0 83 | IncludeIsMainRegex: '([-_](test|unittest))?$' 84 | IncludeIsMainSourceRegex: '' 85 | IndentCaseLabels: true 86 | IndentGotoLabels: true 87 | IndentPPDirectives: None 88 | IndentWidth: 4 89 | IndentWrappedFunctionNames: false 90 | JavaScriptQuotes: Leave 91 | JavaScriptWrapImports: true 92 | KeepEmptyLinesAtTheStartOfBlocks: false 93 | MacroBlockBegin: '' 94 | MacroBlockEnd: '' 95 | MaxEmptyLinesToKeep: 1 96 | NamespaceIndentation: None 97 | ObjCBinPackProtocolList: Never 98 | ObjCBlockIndentWidth: 2 99 | ObjCSpaceAfterProperty: false 100 | ObjCSpaceBeforeProtocolList: true 101 | PenaltyBreakAssignment: 2 102 | PenaltyBreakBeforeFirstCallParameter: 1 103 | PenaltyBreakComment: 300 104 | PenaltyBreakFirstLessLess: 120 105 | PenaltyBreakString: 1000 106 | PenaltyBreakTemplateDeclaration: 10 107 | PenaltyExcessCharacter: 1000000 108 | PenaltyReturnTypeOnItsOwnLine: 200 109 | PointerAlignment: Left 110 | RawStringFormats: 111 | - Language: Cpp 112 | Delimiters: 113 | - cc 114 | - CC 115 | - cpp 116 | - Cpp 117 | - CPP 118 | - 'c++' 119 | - 'C++' 120 | CanonicalDelimiter: '' 121 | BasedOnStyle: google 122 | - Language: TextProto 123 | Delimiters: 124 | - pb 125 | - PB 126 | - proto 127 | - PROTO 128 | EnclosingFunctions: 129 | - EqualsProto 130 | - EquivToProto 131 | - PARSE_PARTIAL_TEXT_PROTO 132 | - PARSE_TEST_PROTO 133 | - PARSE_TEXT_PROTO 134 | - ParseTextOrDie 135 | - ParseTextProtoOrDie 136 | CanonicalDelimiter: '' 137 | BasedOnStyle: google 138 | ReflowComments: true 139 | SortIncludes: false 140 | SortUsingDeclarations: true 141 | SpaceAfterCStyleCast: false 142 | SpaceAfterLogicalNot: false 143 | SpaceAfterTemplateKeyword: true 144 | SpaceBeforeAssignmentOperators: true 145 | SpaceBeforeCpp11BracedList: false 146 | SpaceBeforeCtorInitializerColon: true 147 | SpaceBeforeInheritanceColon: true 148 | SpaceBeforeParens: ControlStatements 149 | SpaceBeforeRangeBasedForLoopColon: true 150 | SpaceInEmptyBlock: false 151 | SpaceInEmptyParentheses: false 152 | SpacesBeforeTrailingComments: 2 153 | SpacesInAngles: false 154 | SpacesInConditionalStatement: false 155 | SpacesInContainerLiterals: true 156 | SpacesInCStyleCastParentheses: false 157 | SpacesInParentheses: false 158 | SpacesInSquareBrackets: false 159 | SpaceBeforeSquareBrackets: false 160 | Standard: Auto 161 | StatementMacros: 162 | - Q_UNUSED 163 | - QT_REQUIRE_VERSION 164 | TabWidth: 4 165 | UseCRLF: false 166 | UseTab: Never 167 | ... 168 | -------------------------------------------------------------------------------- /examples/Hat_TMOS_BasicReadings/Hat_TMOS_BasicReadings.ino: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2024 M5Stack Technology CO LTD 3 | * 4 | * SPDX-License-Identifier: MIT 5 | */ 6 | 7 | /* 8 | * @file BasicReadings.ino 9 | * @author Tinyu(tinyu@m5stack.com) 10 | * @brief TMOS basic readings 11 | * @version 0.1 12 | * @date 2024-07-22 13 | * 14 | * 15 | * @Hardwares: M5StickCPlus + Hat TMOS 16 | * @Platform Version: Arduino M5Stack Board Manager v2.1.1 17 | * @Dependent Library: 18 | * M5_STHS34PF80 https://github.com/m5stack/M5_STHS34PF80 19 | */ 20 | #include 21 | #include "M5_STHS34PF80.h" 22 | 23 | #define INTERRUP_MODE /// Enable interrupt mode 24 | 25 | M5_STHS34PF80 TMOS; 26 | 27 | uint8_t motionHysteresis = 0; 28 | int16_t motionVal = 0, presenceVal = 0; 29 | uint16_t motionThresholdVal = 0, precenceThresholdVal = 0; 30 | sths34pf80_gain_mode_t gainMode; 31 | 32 | #ifdef INTERRUP_MODE 33 | bool volatile interruptFlag = false; 34 | int intPin = 36; 35 | // ISR to set the triggered interrupt 36 | void isr1() { 37 | interruptFlag = true; 38 | } 39 | #endif 40 | 41 | void setup() { 42 | M5.begin(); 43 | M5.Lcd.setTextColor(YELLOW); 44 | M5.Lcd.setRotation(3); 45 | M5.Lcd.setTextSize(2); 46 | M5.Lcd.setCursor(50, 10); 47 | M5.Lcd.println("Hat-TMOS TEST"); 48 | Serial.println("Hat-TMOS TEST"); 49 | M5.Lcd.setCursor(120, 35); 50 | M5.Lcd.setTextColor(WHITE); 51 | 52 | // Initialise I2C and devices 53 | while (TMOS.begin(&Wire, STHS34PF80_I2C_ADDRESS, 0, 26) == false) { 54 | M5.Lcd.setCursor(60, 35); 55 | M5.Lcd.setTextColor(RED); 56 | M5.Lcd.println("Device init error"); 57 | Serial.println("I2C Error - check I2C Address"); 58 | Serial.println("Error setting up device - please check wiring."); 59 | delay(200); 60 | } 61 | 62 | Serial.println("Open the Serial Plotter for graphical viewing"); 63 | TMOS.setTmosODR(STHS34PF80_TMOS_ODR_AT_2Hz); 64 | // TMOS.setMotionThreshold(0xFF); 65 | TMOS.setPresenceThreshold(0xC8); // Default value 66 | TMOS.setMotionThreshold(0xC8); 67 | TMOS.setPresenceHysteresis(0x32); 68 | TMOS.setMotionHysteresis(0x32); 69 | 70 | ////Default mode, may cause inaccurate detection of MotionValFlag bit. 71 | // TMOS.setGainMode(STHS34PF80_GAIN_DEFAULT_MODE); 72 | 73 | // Decreasing gain mode, detection distance decreases 74 | TMOS.setGainMode(STHS34PF80_GAIN_WIDE_MODE); 75 | TMOS.setTmosSensitivity(0xff); 76 | 77 | #ifdef INTERRUP_MODE 78 | // Set INT pin to be triggered on rising and falling edges of INT pin 79 | pinMode(intPin, INPUT); 80 | // Attach interrupt to the pin as a digital pin that triggers on a change 81 | attachInterrupt(digitalPinToInterrupt(intPin), isr1, CHANGE); 82 | // Route all interrupts from device to interrupt pin 83 | TMOS.setTmosRouteInterrupt(STHS34PF80_TMOS_INT_OR); 84 | // Enable the presence and motion interrupt source 85 | // (see page 17 of application note AN5867 for more information) 86 | TMOS.setTmosInterruptOR(STHS34PF80_TMOS_INT_ALL); 87 | // Set interrupt value to pulsed on the INT pin 88 | TMOS.setInterruptPulsed(1); 89 | #endif 90 | 91 | TMOS.resetAlgo(); 92 | 93 | TMOS.getGainMode(&gainMode); 94 | TMOS.getMotionThreshold(&motionThresholdVal); 95 | TMOS.getPresenceThreshold(&precenceThresholdVal); 96 | TMOS.getMotionHysteresis(&motionHysteresis); 97 | Serial.printf("precenceThresholdVal:%x, motionThresholdVal:%x, motionHysteresis:%x GainMode:%x\n", 98 | precenceThresholdVal, motionThresholdVal, motionHysteresis, gainMode); 99 | delay(1000); 100 | } 101 | 102 | void loop() { 103 | #ifndef INTERRUP_MODE 104 | // Real-time detection of presence and motion infrared energy values 105 | sths34pf80_tmos_drdy_status_t dataReady; 106 | TMOS.getDataReady(&dataReady); 107 | if (dataReady.drdy == 1) { 108 | #else 109 | // Interrupt detection of presence and motion infrared energy values 110 | if (interruptFlag == true) { 111 | interruptFlag = false; 112 | #endif 113 | 114 | sths34pf80_tmos_func_status_t status; 115 | TMOS.getPresenceValue(&presenceVal); 116 | TMOS.getMotionValue(&motionVal); 117 | TMOS.getStatus(&status); 118 | 119 | M5.Lcd.fillRect(106, 48, 80, 20, BLACK); 120 | M5.Lcd.setCursor(2, 50); 121 | M5.Lcd.printf("Presence:%d", presenceVal); 122 | 123 | M5.Lcd.fillRect(167, 70, 100, 20, BLACK); 124 | M5.Lcd.setCursor(2, 70); 125 | M5.Lcd.printf("PrescenceFlag:%s", status.pres_flag ? "Det" : "None"); 126 | 127 | M5.Lcd.fillRect(85, 88, 60, 20, BLACK); 128 | M5.Lcd.setCursor(2, 90); 129 | M5.Lcd.printf("Motion:%d", motionVal); 130 | 131 | M5.Lcd.fillRect(167, 110, 100, 20, BLACK); 132 | M5.Lcd.setCursor(2, 110); 133 | M5.Lcd.printf("MotionValFlag:%s", status.mot_flag ? "Det" : "None"); 134 | 135 | // Output only if presence/motion is detected 136 | if (status.pres_flag == 1) { 137 | TMOS.getPresenceValue(&presenceVal); 138 | Serial.printf("Prescence Detected! PrescenceValue:%d\n", presenceVal); 139 | } 140 | 141 | if (status.mot_flag == 1) { 142 | TMOS.getMotionValue(&motionVal); 143 | Serial.printf("Motion Detected! MotionValue:%d\n", motionVal); 144 | } 145 | } 146 | } -------------------------------------------------------------------------------- /src/M5_STHS34PF80.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2024 M5Stack Technology CO LTD 3 | * 4 | * SPDX-License-Identifier: MIT 5 | */ 6 | #include "M5_STHS34PF80.h" 7 | 8 | bool M5_STHS34PF80::begin(TwoWire *wire, uint8_t addr, uint8_t sda, uint8_t scl) { 9 | if (!_wire) { 10 | _wire = wire; 11 | _addr = addr; 12 | _sda = sda; 13 | _scl = scl; 14 | _wire->begin(_sda, _scl); 15 | } 16 | sensor.read_reg = M5_STHS34PF80::read; 17 | sensor.write_reg = M5_STHS34PF80::write; 18 | sensor.mdelay = M5_STHS34PF80::delayMS; 19 | sensor.handle = this; 20 | _addr = addr; 21 | 22 | // call super class begin -- it returns 0 on no error 23 | return M5_STHS34PF80::init() == 0; 24 | } 25 | 26 | int32_t M5_STHS34PF80::read(void *device, uint8_t addr, uint8_t *data, uint16_t numData) { 27 | return ((M5_STHS34PF80 *)device)->readRegisterRegion(((M5_STHS34PF80 *)device)->_addr, addr, data, numData); 28 | } 29 | 30 | int32_t M5_STHS34PF80::write(void *device, uint8_t addr, const uint8_t *data, uint16_t numData) { 31 | return ((M5_STHS34PF80 *)device)->writeRegisterRegion(((M5_STHS34PF80 *)device)->_addr, addr, data, numData); 32 | } 33 | 34 | void M5_STHS34PF80::delayMS(uint32_t millisec) { 35 | delay(millisec); 36 | } 37 | 38 | bool M5_STHS34PF80::ping(uint8_t i2c_address) { 39 | if (!_wire) return false; 40 | 41 | _wire->beginTransmission(i2c_address); 42 | return _wire->endTransmission() == 0; 43 | } 44 | 45 | int M5_STHS34PF80::writeRegisterRegion(uint8_t i2c_address, uint8_t offset, const uint8_t *data, uint16_t length) { 46 | _wire->beginTransmission(i2c_address); 47 | _wire->write(offset); 48 | _wire->write(data, (int)length); 49 | 50 | return _wire->endTransmission() ? -1 : 0; // -1 = error, 0 = success 51 | } 52 | 53 | int M5_STHS34PF80::writeRegisterRegion(uint8_t i2c_address, uint8_t offset, uint8_t data, uint16_t length) { 54 | _wire->beginTransmission(i2c_address); 55 | _wire->write(offset); 56 | _wire->write(data); 57 | 58 | return _wire->endTransmission() ? -1 : 0; // -1 = error, 0 = success 59 | } 60 | 61 | int M5_STHS34PF80::readRegisterRegion(uint8_t addr, uint8_t reg, uint8_t *data, uint16_t numBytes) { 62 | uint8_t nChunk; 63 | uint16_t nReturned; 64 | 65 | if (!_wire) return -1; 66 | 67 | int i; // counter in loop 68 | bool bFirstInter = true; // Flag for first iteration - used to send register 69 | 70 | while (numBytes > 0) { 71 | _wire->beginTransmission(addr); 72 | 73 | if (bFirstInter) { 74 | _wire->write(reg); 75 | bFirstInter = false; 76 | } 77 | 78 | if (_wire->endTransmission() != 0) return -1; // error with the end transmission 79 | 80 | // We're chunking in data - keeping the max chunk to kMaxI2CBufferLength 81 | nChunk = numBytes > kChunkSize ? kChunkSize : numBytes; 82 | 83 | nReturned = _wire->requestFrom((int)addr, (int)nChunk, (int)true); 84 | 85 | // No data returned, no dice 86 | if (nReturned == 0) return -1; // error 87 | 88 | // Copy the retrieved data chunk to the current index in the data segment 89 | for (i = 0; i < nReturned; i++) { 90 | *data++ = _wire->read(); 91 | } 92 | 93 | // Decrement the amount of data recieved from the overall data request 94 | // amount 95 | numBytes = numBytes - nReturned; 96 | 97 | } // end while 98 | 99 | return 0; // Success 100 | } 101 | 102 | int32_t M5_STHS34PF80::init() { 103 | if (isConnected() != 0) { 104 | return -1; 105 | } 106 | 107 | reset(); // Set boot bit to 1, delay, then reset algorithm 108 | 109 | // Set temperature object number set average (AVG_TMOS = 32) 110 | int32_t avgErr = setAverageTObjectNumber(STHS34PF80_AVG_TMOS_32); 111 | 112 | // Set ambient temperature average (AVG_TAMB = 8) 113 | int32_t tAmbErr = setAverageTAmbientNumber(STHS34PF80_AVG_T_8); 114 | 115 | // Set block data rate update to true 116 | int32_t blockErr = setBlockDataUpdate(true); 117 | 118 | // Set the data rate (ODR) to 1Hz 119 | int32_t odrErr = setTmosODR(STHS34PF80_TMOS_ODR_AT_1Hz); 120 | 121 | if (avgErr != 0) { 122 | return avgErr; 123 | } else if (tAmbErr != 0) { 124 | return tAmbErr; 125 | } else if (blockErr != 0) { 126 | return blockErr; 127 | } else if (odrErr != 0) { 128 | return odrErr; 129 | } 130 | 131 | // If no errors, return 0 132 | return 0; 133 | } 134 | 135 | int32_t M5_STHS34PF80::isConnected() { 136 | uint8_t devId = 0; 137 | int32_t err = sths34pf80_device_id_get(&sensor, &devId); 138 | 139 | if (devId != STHS34PF80_ID) { 140 | return -1; 141 | } 142 | return err; 143 | } 144 | 145 | int32_t M5_STHS34PF80::getDataReady(sths34pf80_tmos_drdy_status_t *drdy) { 146 | return sths34pf80_tmos_drdy_status_get(&sensor, drdy); 147 | } 148 | 149 | int32_t M5_STHS34PF80::getStatus(sths34pf80_tmos_func_status_t *statusVal) { 150 | return sths34pf80_tmos_func_status_get(&sensor, statusVal); 151 | } 152 | 153 | int32_t M5_STHS34PF80::reset() { 154 | // Set boot bit to 1 in CTRL2 register 155 | int32_t otpErr = setBootOTP(true); 156 | 157 | // delay 2.50ms to allow for sensor reset (allows for no power cycling) 158 | sensor.mdelay(3); 159 | 160 | // Reset algorithm for all register values (default values) 161 | int32_t resetErr = resetAlgo(); 162 | 163 | if (otpErr != 0) { 164 | return otpErr; 165 | } else if (resetErr != 0) { 166 | return resetErr; 167 | } else { 168 | return 0; 169 | } 170 | } 171 | 172 | int32_t M5_STHS34PF80::getPresenceValue(int16_t *presenceVal) { 173 | return sths34pf80_tpresence_raw_get(&sensor, presenceVal); 174 | } 175 | 176 | int32_t M5_STHS34PF80::getMotionValue(int16_t *motionVal) { 177 | return sths34pf80_tmotion_raw_get(&sensor, motionVal); 178 | } 179 | 180 | int32_t M5_STHS34PF80::getTemperatureData(float *tempVal) { 181 | int16_t tempValFill = 0; 182 | 183 | // As seen on page 5 of the datasheet - object temperature sensitivity 184 | int16_t sensitivity = 2000; 185 | 186 | int32_t retVal = sths34pf80_tobject_raw_get(&sensor, &tempValFill); 187 | 188 | // Divide the raw value by the sensitivity 189 | *tempVal = (float)tempValFill / sensitivity; 190 | 191 | return retVal; 192 | } 193 | 194 | int32_t M5_STHS34PF80::getDeviceID(uint8_t *devId) { 195 | return sths34pf80_device_id_get(&sensor, devId); 196 | } 197 | 198 | int32_t M5_STHS34PF80::getAverageTObjectNumber(sths34pf80_avg_tobject_num_t *val) { 199 | return sths34pf80_avg_tobject_num_get(&sensor, val); 200 | } 201 | 202 | int32_t M5_STHS34PF80::setAverageTObjectNumber(sths34pf80_avg_tobject_num_t num) { 203 | return sths34pf80_avg_tobject_num_set(&sensor, num); 204 | } 205 | 206 | int32_t M5_STHS34PF80::getAverageTAmbientNumber(sths34pf80_avg_tambient_num_t *val) { 207 | return sths34pf80_avg_tambient_num_get(&sensor, val); 208 | } 209 | 210 | int32_t M5_STHS34PF80::setAverageTAmbientNumber(sths34pf80_avg_tambient_num_t num) { 211 | return sths34pf80_avg_tambient_num_set(&sensor, num); 212 | } 213 | 214 | int32_t M5_STHS34PF80::getGainMode(sths34pf80_gain_mode_t *gain) { 215 | return sths34pf80_gain_mode_get(&sensor, gain); 216 | } 217 | 218 | int32_t M5_STHS34PF80::setGainMode(sths34pf80_gain_mode_t gain) { 219 | return sths34pf80_gain_mode_set(&sensor, gain); 220 | } 221 | 222 | int32_t M5_STHS34PF80::getTmosSensitivity(float *sense) { 223 | uint16_t senseFill = 0; 224 | int32_t err = sths34pf80_tmos_sensitivity_get(&sensor, &senseFill); 225 | 226 | uint16_t res1 = 2048; 227 | float res2 = 16; 228 | 229 | *sense = (float)(senseFill - res1) / res2; 230 | return err; 231 | } 232 | 233 | int32_t M5_STHS34PF80::setTmosSensitivity(float val) { 234 | uint16_t res1 = 2048; 235 | uint16_t res2 = 16; 236 | 237 | val = (val * res2) + res1; 238 | 239 | uint16_t valReg = val; 240 | 241 | return sths34pf80_tmos_sensitivity_set(&sensor, &valReg); 242 | } 243 | 244 | int32_t M5_STHS34PF80::getTmosODR(sths34pf80_tmos_odr_t *val) { 245 | return sths34pf80_tmos_odr_get(&sensor, val); 246 | } 247 | 248 | int32_t M5_STHS34PF80::setTmosODR(sths34pf80_tmos_odr_t val) { 249 | return sths34pf80_tmos_odr_set(&sensor, val); 250 | } 251 | 252 | int32_t M5_STHS34PF80::getBlockDataUpdate(bool *val) { 253 | return sths34pf80_block_data_update_get(&sensor, (uint8_t *)val); 254 | } 255 | 256 | int32_t M5_STHS34PF80::setBlockDataUpdate(bool val) { 257 | return sths34pf80_block_data_update_set(&sensor, val); 258 | } 259 | 260 | int32_t M5_STHS34PF80::getTmosOneShot(sths34pf80_tmos_one_shot_t *val) { 261 | return sths34pf80_tmos_one_shot_get(&sensor, val); 262 | } 263 | 264 | int32_t M5_STHS34PF80::setTmosOneShot(sths34pf80_tmos_one_shot_t val) { 265 | return sths34pf80_tmos_one_shot_set(&sensor, val); 266 | } 267 | 268 | int32_t M5_STHS34PF80::getMemoryBank(sths34pf80_mem_bank_t *val) { 269 | return sths34pf80_mem_bank_get(&sensor, val); 270 | } 271 | 272 | int32_t M5_STHS34PF80::setMemoryBank(sths34pf80_mem_bank_t val) { 273 | return sths34pf80_mem_bank_set(&sensor, val); 274 | } 275 | 276 | int32_t M5_STHS34PF80::getBootOTP(uint8_t *val) { 277 | return sths34pf80_boot_get(&sensor, val); 278 | } 279 | 280 | int32_t M5_STHS34PF80::setBootOTP(uint8_t val) { 281 | return sths34pf80_boot_set(&sensor, val); 282 | } 283 | 284 | int32_t M5_STHS34PF80::getTmosFunctionStatus(sths34pf80_tmos_func_status_t *val) { 285 | return sths34pf80_tmos_func_status_get(&sensor, val); 286 | } 287 | 288 | int32_t M5_STHS34PF80::getTObjectRawValue(int16_t *val) { 289 | return sths34pf80_tobject_raw_get(&sensor, val); 290 | } 291 | 292 | int32_t M5_STHS34PF80::getTAmbientRawValue(int16_t *val) { 293 | return sths34pf80_tambient_raw_get(&sensor, val); 294 | } 295 | 296 | int32_t M5_STHS34PF80::getTObjectCompensatedRawValue(int16_t *val) { 297 | return sths34pf80_tobj_comp_raw_get(&sensor, val); 298 | } 299 | 300 | int32_t M5_STHS34PF80::getTAmbientShockRawValue(int16_t *val) { 301 | return sths34pf80_tamb_shock_raw_get(&sensor, val); 302 | } 303 | 304 | int32_t M5_STHS34PF80::getLpfMotionBandwidth(sths34pf80_lpf_bandwidth_t *val) { 305 | return sths34pf80_lpf_m_bandwidth_get(&sensor, val); 306 | } 307 | 308 | int32_t M5_STHS34PF80::setLpfMotionBandwidth(sths34pf80_lpf_bandwidth_t val) { 309 | return sths34pf80_lpf_m_bandwidth_set(&sensor, val); 310 | } 311 | 312 | int32_t M5_STHS34PF80::getLpfPresenceMotionBandwidth(sths34pf80_lpf_bandwidth_t *val) { 313 | return sths34pf80_lpf_p_m_bandwidth_get(&sensor, val); 314 | } 315 | 316 | int32_t M5_STHS34PF80::setLpfPresenceMotionBandwidth(sths34pf80_lpf_bandwidth_t val) { 317 | return sths34pf80_lpf_p_m_bandwidth_set(&sensor, val); 318 | } 319 | 320 | int32_t M5_STHS34PF80::getLpfAmbientTempBandwidth(sths34pf80_lpf_bandwidth_t *val) { 321 | return sths34pf80_lpf_a_t_bandwidth_get(&sensor, val); 322 | } 323 | 324 | int32_t M5_STHS34PF80::setLpfAmbientTempBandwidth(sths34pf80_lpf_bandwidth_t val) { 325 | return sths34pf80_lpf_a_t_bandwidth_set(&sensor, val); 326 | } 327 | 328 | int32_t M5_STHS34PF80::getLpfPresenceBandwidth(sths34pf80_lpf_bandwidth_t *val) { 329 | return sths34pf80_lpf_p_bandwidth_get(&sensor, val); 330 | } 331 | 332 | int32_t M5_STHS34PF80::setLpfPresenceBandwidth(sths34pf80_lpf_bandwidth_t val) { 333 | return sths34pf80_lpf_p_bandwidth_set(&sensor, val); 334 | } 335 | 336 | int32_t M5_STHS34PF80::getTmosRouteInterrupt(sths34pf80_tmos_route_int_t *val) { 337 | return sths34pf80_tmos_route_int_get(&sensor, val); 338 | } 339 | 340 | int32_t M5_STHS34PF80::setTmosRouteInterrupt(sths34pf80_tmos_route_int_t val) { 341 | return sths34pf80_tmos_route_int_set(&sensor, val); 342 | } 343 | 344 | int32_t M5_STHS34PF80::getTmosInterruptOR(sths34pf80_tmos_int_or_t *val) { 345 | return sths34pf80_tmos_int_or_get(&sensor, val); 346 | } 347 | 348 | int32_t M5_STHS34PF80::setTmosInterruptOR(sths34pf80_tmos_int_or_t val) { 349 | return sths34pf80_tmos_int_or_set(&sensor, val); 350 | } 351 | 352 | int32_t M5_STHS34PF80::getInterruptMode(sths34pf80_int_mode_t *val) { 353 | return sths34pf80_int_mode_get(&sensor, val); 354 | } 355 | 356 | int32_t M5_STHS34PF80::setInterruptMode(sths34pf80_int_mode_t val) { 357 | return sths34pf80_int_mode_set(&sensor, val); // Returns the error code 358 | } 359 | 360 | int32_t M5_STHS34PF80::getDataReadyMode(sths34pf80_drdy_mode_t *val) { 361 | return sths34pf80_drdy_mode_get(&sensor, val); 362 | } 363 | 364 | int32_t M5_STHS34PF80::setDataReadyMode(sths34pf80_drdy_mode_t val) { 365 | return sths34pf80_drdy_mode_set(&sensor, val); 366 | } 367 | 368 | int32_t M5_STHS34PF80::getPresenceThreshold(uint16_t *val) { 369 | return sths34pf80_presence_threshold_get(&sensor, val); 370 | } 371 | 372 | int32_t M5_STHS34PF80::setPresenceThreshold(uint16_t threshold) { 373 | return sths34pf80_presence_threshold_set(&sensor, threshold); 374 | } 375 | 376 | int32_t M5_STHS34PF80::getMotionThreshold(uint16_t *val) { 377 | return sths34pf80_motion_threshold_get(&sensor, val); 378 | } 379 | 380 | int32_t M5_STHS34PF80::setMotionThreshold(uint8_t threshold) { 381 | return sths34pf80_motion_threshold_set(&sensor, threshold); 382 | } 383 | 384 | int32_t M5_STHS34PF80::getTAmbientShockThreshold(uint16_t *val) { 385 | return sths34pf80_tambient_shock_threshold_get(&sensor, val); 386 | } 387 | 388 | int32_t M5_STHS34PF80::setTAmbientShockThreshold(uint16_t threshold) { 389 | return sths34pf80_tambient_shock_threshold_set(&sensor, threshold); 390 | } 391 | 392 | int32_t M5_STHS34PF80::getMotionHysteresis(uint8_t *val) { 393 | return sths34pf80_motion_hysteresis_get(&sensor, val); 394 | } 395 | 396 | int32_t M5_STHS34PF80::setMotionHysteresis(uint8_t hysteresis) { 397 | return sths34pf80_motion_hysteresis_set(&sensor, hysteresis); 398 | } 399 | 400 | int32_t M5_STHS34PF80::getPresenceHysteresis(uint8_t *val) { 401 | return sths34pf80_presence_hysteresis_get(&sensor, val); 402 | } 403 | 404 | int32_t M5_STHS34PF80::setPresenceHysteresis(uint8_t hysteresis) { 405 | return sths34pf80_presence_hysteresis_set(&sensor, hysteresis); 406 | } 407 | 408 | int32_t M5_STHS34PF80::getTAmbientShockHysteresis(uint8_t *val) { 409 | return sths34pf80_tambient_shock_hysteresis_get(&sensor, val); 410 | } 411 | 412 | int32_t M5_STHS34PF80::setTAmbientShockHysteresis(uint16_t hysteresis) { 413 | return sths34pf80_tambient_shock_hysteresis_set(&sensor, hysteresis); 414 | } 415 | 416 | int32_t M5_STHS34PF80::getInterruptPulsed(uint8_t *val) { 417 | return sths34pf80_int_or_pulsed_get(&sensor, val); 418 | } 419 | 420 | int32_t M5_STHS34PF80::setInterruptPulsed(uint8_t pulse) { 421 | return sths34pf80_int_or_pulsed_set(&sensor, pulse); 422 | } 423 | 424 | int32_t M5_STHS34PF80::getTobjectAlgoCompensation(uint8_t *val) { 425 | return sths34pf80_tobject_algo_compensation_get(&sensor, val); 426 | } 427 | 428 | int32_t M5_STHS34PF80::setTobjectAlgoCompensation(uint8_t comp) { 429 | return sths34pf80_tobject_algo_compensation_set(&sensor, comp); 430 | } 431 | 432 | int32_t M5_STHS34PF80::getPresenceAbsValue(uint8_t *val) { 433 | return sths34pf80_presence_abs_value_get(&sensor, val); 434 | } 435 | 436 | int32_t M5_STHS34PF80::setPresenceAbsValue(uint8_t val) { 437 | return sths34pf80_presence_abs_value_set(&sensor, val); 438 | } 439 | 440 | int32_t M5_STHS34PF80::resetAlgo() { 441 | return sths34pf80_algo_reset(&sensor); 442 | } 443 | 444 | int32_t M5_STHS34PF80::writeFunctionConfiguration(uint8_t addr, uint8_t *data, uint8_t len) { 445 | return sths34pf80_func_cfg_write(&sensor, addr, data, len); 446 | } 447 | 448 | int32_t M5_STHS34PF80::readFunctionConfiguration(uint8_t addr, uint8_t *data, uint8_t len) { 449 | return sths34pf80_func_cfg_read(&sensor, addr, data, len); 450 | } 451 | -------------------------------------------------------------------------------- /src/sths34pf80_api/sths34pf80_reg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file sths34pf80_reg.h 4 | * @author Sensors Software Solution Team 5 | * @brief This file contains all the functions prototypes for the 6 | * sths34pf80_reg.c driver. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | *

© Copyright (c) 2021 STMicroelectronics. 11 | * All rights reserved.

12 | * 13 | * This software component is licensed by ST under BSD 3-Clause license, 14 | * the "License"; You may not use this file except in compliance with the 15 | * License. You may obtain a copy of the License at: 16 | * opensource.org/licenses/BSD-3-Clause 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef STHS34PF80_REGS_H 23 | #define STHS34PF80_REGS_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include 31 | #include 32 | #include 33 | 34 | /** @addtogroup STHS34PF80 35 | * @{ 36 | * 37 | */ 38 | 39 | /** @defgroup Endianness definitions 40 | * @{ 41 | * 42 | */ 43 | 44 | #ifndef DRV_BYTE_ORDER 45 | #ifndef __BYTE_ORDER__ 46 | 47 | #define DRV_LITTLE_ENDIAN 1234 48 | #define DRV_BIG_ENDIAN 4321 49 | 50 | /** if _BYTE_ORDER is not defined, choose the endianness of your architecture 51 | * by uncommenting the define which fits your platform endianness 52 | */ 53 | // #define DRV_BYTE_ORDER DRV_BIG_ENDIAN 54 | #define DRV_BYTE_ORDER DRV_LITTLE_ENDIAN 55 | 56 | #else /* defined __BYTE_ORDER__ */ 57 | 58 | #define DRV_LITTLE_ENDIAN __ORDER_LITTLE_ENDIAN__ 59 | #define DRV_BIG_ENDIAN __ORDER_BIG_ENDIAN__ 60 | #define DRV_BYTE_ORDER __BYTE_ORDER__ 61 | 62 | #endif /* __BYTE_ORDER__*/ 63 | #endif /* DRV_BYTE_ORDER */ 64 | 65 | /** 66 | * @} 67 | * 68 | */ 69 | 70 | /** @defgroup STMicroelectronics sensors common types 71 | * @{ 72 | * 73 | */ 74 | 75 | #ifndef MEMS_SHARED_TYPES 76 | #define MEMS_SHARED_TYPES 77 | 78 | typedef struct { 79 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 80 | uint8_t bit0 : 1; 81 | uint8_t bit1 : 1; 82 | uint8_t bit2 : 1; 83 | uint8_t bit3 : 1; 84 | uint8_t bit4 : 1; 85 | uint8_t bit5 : 1; 86 | uint8_t bit6 : 1; 87 | uint8_t bit7 : 1; 88 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 89 | uint8_t bit7 : 1; 90 | uint8_t bit6 : 1; 91 | uint8_t bit5 : 1; 92 | uint8_t bit4 : 1; 93 | uint8_t bit3 : 1; 94 | uint8_t bit2 : 1; 95 | uint8_t bit1 : 1; 96 | uint8_t bit0 : 1; 97 | #endif /* DRV_BYTE_ORDER */ 98 | } bitwise_t; 99 | 100 | #define PROPERTY_DISABLE (0U) 101 | #define PROPERTY_ENABLE (1U) 102 | 103 | /** @addtogroup Interfaces_Functions 104 | * @brief This section provide a set of functions used to read and 105 | * write a generic register of the device. 106 | * MANDATORY: return 0 -> no Error. 107 | * @{ 108 | * 109 | */ 110 | 111 | typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, const uint8_t *, uint16_t); 112 | typedef int32_t (*stmdev_read_ptr)(void *, uint8_t, uint8_t *, uint16_t); 113 | typedef void (*stmdev_mdelay_ptr)(uint32_t millisec); 114 | 115 | typedef struct { 116 | /** Component mandatory fields **/ 117 | stmdev_write_ptr write_reg; 118 | stmdev_read_ptr read_reg; 119 | /** Component optional fields **/ 120 | stmdev_mdelay_ptr mdelay; 121 | /** Customizable optional pointer **/ 122 | void *handle; 123 | } stmdev_ctx_t; 124 | 125 | /** 126 | * @} 127 | * 128 | */ 129 | 130 | #endif /* MEMS_SHARED_TYPES */ 131 | 132 | #ifndef MEMS_UCF_SHARED_TYPES 133 | #define MEMS_UCF_SHARED_TYPES 134 | 135 | /** @defgroup Generic address-data structure definition 136 | * @brief This structure is useful to load a predefined configuration 137 | * of a sensor. 138 | * You can create a sensor configuration by your own or using 139 | * Unico / Unicleo tools available on STMicroelectronics 140 | * web site. 141 | * 142 | * @{ 143 | * 144 | */ 145 | 146 | typedef struct { 147 | uint8_t address; 148 | uint8_t data; 149 | } ucf_line_t; 150 | 151 | /** 152 | * @} 153 | * 154 | */ 155 | 156 | #endif /* MEMS_UCF_SHARED_TYPES */ 157 | 158 | /** 159 | * @} 160 | * 161 | */ 162 | 163 | /** @defgroup STHS34PF80_Infos 164 | * @{ 165 | * 166 | */ 167 | 168 | /** I2C Device Address 8 bit format **/ 169 | #define STHS34PF80_I2C_ADD 0xB5U 170 | 171 | /** Device Identification (Who am I) **/ 172 | #define STHS34PF80_ID 0xD3U 173 | 174 | /** 175 | * @} 176 | * 177 | */ 178 | 179 | /** @defgroup bitfields page main 180 | * @{ 181 | * 182 | */ 183 | 184 | #define STHS34PF80_LPF1 0x0CU 185 | typedef struct { 186 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 187 | uint8_t lpf_m : 3; 188 | uint8_t lpf_p_m : 3; 189 | uint8_t not_used0 : 2; 190 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 191 | uint8_t not_used0 : 2; 192 | uint8_t lpf_p_m : 3; 193 | uint8_t lpf_m : 3; 194 | #endif /* DRV_BYTE_ORDER */ 195 | } sths34pf80_lpf1_t; 196 | 197 | #define STHS34PF80_LPF2 0x0DU 198 | typedef struct { 199 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 200 | uint8_t lpf_a_t : 3; 201 | uint8_t lpf_p : 3; 202 | uint8_t not_used0 : 2; 203 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 204 | uint8_t not_used0 : 2; 205 | uint8_t lpf_p : 3; 206 | uint8_t lpf_a_t : 3; 207 | #endif /* DRV_BYTE_ORDER */ 208 | } sths34pf80_lpf2_t; 209 | 210 | #define STHS34PF80_WHO_AM_I 0x0FU 211 | typedef struct { 212 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 213 | uint8_t id : 8; 214 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 215 | uint8_t id : 8; 216 | #endif /* DRV_BYTE_ORDER */ 217 | } sths34pf80_who_am_i_t; 218 | 219 | #define STHS34PF80_AVG_TRIM 0x10U 220 | typedef struct { 221 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 222 | uint8_t avg_tmos : 3; 223 | uint8_t not_used0 : 1; 224 | uint8_t avg_t : 2; 225 | uint8_t not_used1 : 2; 226 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 227 | uint8_t not_used1 : 2; 228 | uint8_t avg_t : 2; 229 | uint8_t not_used0 : 1; 230 | uint8_t avg_tmos : 3; 231 | #endif /* DRV_BYTE_ORDER */ 232 | } sths34pf80_avg_trim_t; 233 | 234 | #define STHS34PF80_CTRL0 0x17U 235 | typedef struct { 236 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 237 | uint8_t not_used0 : 4; 238 | uint8_t gain : 3; 239 | uint8_t not_used1 : 1; 240 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 241 | uint8_t not_used1 : 1; 242 | uint8_t gain : 3; 243 | uint8_t not_used0 : 4; 244 | #endif /* DRV_BYTE_ORDER */ 245 | } sths34pf80_ctrl0_t; 246 | 247 | #define STHS34PF80_SENS_DATA 0x1DU 248 | typedef struct { 249 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 250 | uint8_t sens : 8; 251 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 252 | uint8_t sens : 8; 253 | #endif /* DRV_BYTE_ORDER */ 254 | } sths34pf80_sens_data_t; 255 | 256 | #define STHS34PF80_CTRL1 0x20U 257 | typedef struct { 258 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 259 | uint8_t odr : 4; 260 | uint8_t bdu : 1; 261 | uint8_t not_used0 : 3; 262 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 263 | uint8_t not_used0 : 3; 264 | uint8_t bdu : 1; 265 | uint8_t odr : 4; 266 | #endif /* DRV_BYTE_ORDER */ 267 | } sths34pf80_ctrl1_t; 268 | 269 | #define STHS34PF80_CTRL2 0x21U 270 | typedef struct { 271 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 272 | uint8_t one_shot : 1; 273 | uint8_t not_used0 : 3; 274 | uint8_t func_cfg_access : 1; 275 | uint8_t not_used1 : 2; 276 | uint8_t boot : 1; 277 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 278 | uint8_t boot : 1; 279 | uint8_t not_used1 : 2; 280 | uint8_t func_cfg_access : 1; 281 | uint8_t not_used0 : 3; 282 | uint8_t one_shot : 1; 283 | #endif /* DRV_BYTE_ORDER */ 284 | } sths34pf80_ctrl2_t; 285 | 286 | #define STHS34PF80_CTRL3 0x22U 287 | typedef struct { 288 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 289 | uint8_t ien : 2; 290 | uint8_t int_latched : 1; 291 | uint8_t int_msk : 3; 292 | uint8_t pp_od : 1; 293 | uint8_t int_h_l : 1; 294 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 295 | uint8_t int_h_l : 1; 296 | uint8_t pp_od : 1; 297 | uint8_t int_msk : 3; 298 | uint8_t int_latched : 1; 299 | uint8_t ien : 2; 300 | #endif /* DRV_BYTE_ORDER */ 301 | } sths34pf80_ctrl3_t; 302 | 303 | #define STHS34PF80_STATUS 0x23U 304 | typedef struct { 305 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 306 | uint8_t not_used0 : 2; 307 | uint8_t drdy : 1; 308 | uint8_t not_used1 : 5; 309 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 310 | uint8_t not_used1 : 5; 311 | uint8_t drdy : 1; 312 | uint8_t not_used0 : 2; 313 | #endif /* DRV_BYTE_ORDER */ 314 | } sths34pf80_status_t; 315 | 316 | #define STHS34PF80_FUNC_STATUS 0x25U 317 | typedef struct { 318 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 319 | uint8_t tamb_shock_flag : 1; 320 | uint8_t mot_flag : 1; 321 | uint8_t pres_flag : 1; 322 | uint8_t not_used0 : 5; 323 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 324 | uint8_t not_used0 : 5; 325 | uint8_t pres_flag : 1; 326 | uint8_t mot_flag : 1; 327 | uint8_t tamb_shock_flag : 1; 328 | #endif /* DRV_BYTE_ORDER */ 329 | } sths34pf80_func_status_t; 330 | 331 | #define STHS34PF80_TOBJECT_L 0x26U 332 | typedef struct { 333 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 334 | uint8_t tobject : 8; 335 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 336 | uint8_t tobject : 8; 337 | #endif /* DRV_BYTE_ORDER */ 338 | } sths34pf80_tobject_l_t; 339 | 340 | #define STHS34PF80_TOBJECT_H 0x27U 341 | typedef struct { 342 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 343 | uint8_t tobject : 8; 344 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 345 | uint8_t tobject : 8; 346 | #endif /* DRV_BYTE_ORDER */ 347 | } sths34pf80_tobject_h_t; 348 | 349 | #define STHS34PF80_TAMBIENT_L 0x28U 350 | typedef struct { 351 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 352 | uint8_t tambient : 8; 353 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 354 | uint8_t tambient : 8; 355 | #endif /* DRV_BYTE_ORDER */ 356 | } sths34pf80_tambient_l_t; 357 | 358 | #define STHS34PF80_TAMBIENT_H 0x29U 359 | typedef struct { 360 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 361 | uint8_t tambient : 8; 362 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 363 | uint8_t tambient : 8; 364 | #endif /* DRV_BYTE_ORDER */ 365 | } sths34pf80_tambient_h_t; 366 | 367 | #define STHS34PF80_TOBJ_COMP_L 0x38U 368 | typedef struct { 369 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 370 | uint8_t tobj_comp : 8; 371 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 372 | uint8_t tobj_comp : 8; 373 | #endif /* DRV_BYTE_ORDER */ 374 | } sths34pf80_tobj_comp_l_t; 375 | 376 | #define STHS34PF80_TOBJ_COMP_H 0x39U 377 | typedef struct { 378 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 379 | uint8_t tobj_comp : 8; 380 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 381 | uint8_t tobj_comp : 8; 382 | #endif /* DRV_BYTE_ORDER */ 383 | } sths34pf80_tobj_comp_h_t; 384 | 385 | #define STHS34PF80_TPRESENCE_L 0x3AU 386 | typedef struct { 387 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 388 | uint8_t tpresence : 8; 389 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 390 | uint8_t tpresence : 8; 391 | #endif /* DRV_BYTE_ORDER */ 392 | } sths34pf80_tpresence_l_t; 393 | 394 | #define STHS34PF80_TPRESENCE_H 0x3BU 395 | typedef struct { 396 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 397 | uint8_t tpresence : 8; 398 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 399 | uint8_t tpresence : 8; 400 | #endif /* DRV_BYTE_ORDER */ 401 | } sths34pf80_tpresence_h_t; 402 | 403 | #define STHS34PF80_TMOTION_L 0x3CU 404 | typedef struct { 405 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 406 | uint8_t tmotion : 8; 407 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 408 | uint8_t tmotion : 8; 409 | #endif /* DRV_BYTE_ORDER */ 410 | } sths34pf80_tmotion_l_t; 411 | 412 | #define STHS34PF80_TMOTION_H 0x3DU 413 | typedef struct { 414 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 415 | uint8_t tmotion : 8; 416 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 417 | uint8_t tmotion : 8; 418 | #endif /* DRV_BYTE_ORDER */ 419 | } sths34pf80_tmotion_h_t; 420 | 421 | #define STHS34PF80_TAMB_SHOCK_L 0x3EU 422 | typedef struct { 423 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 424 | uint8_t tamb_shock : 8; 425 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 426 | uint8_t tamb_shock : 8; 427 | #endif /* DRV_BYTE_ORDER */ 428 | } sths34pf80_tamb_shock_l_t; 429 | 430 | #define STHS34PF80_TAMB_SHOCK_H 0x3FU 431 | typedef struct { 432 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 433 | uint8_t tamb_shock : 8; 434 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 435 | uint8_t tamb_shock : 8; 436 | #endif /* DRV_BYTE_ORDER */ 437 | } sths34pf80_tamb_shock_h_t; 438 | 439 | /** 440 | * @} 441 | * 442 | */ 443 | 444 | /** @defgroup bitfields page embedded 445 | * @{ 446 | * 447 | */ 448 | 449 | #define STHS34PF80_FUNC_CFG_ADDR 0x08U 450 | typedef struct { 451 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 452 | uint8_t func_cfg_addr : 8; 453 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 454 | uint8_t func_cfg_addr : 8; 455 | #endif /* DRV_BYTE_ORDER */ 456 | } sths34pf80_func_cfg_addr_t; 457 | 458 | #define STHS34PF80_FUNC_CFG_DATA 0x09U 459 | typedef struct { 460 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 461 | uint8_t func_cfg_data : 8; 462 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 463 | uint8_t func_cfg_data : 8; 464 | #endif /* DRV_BYTE_ORDER */ 465 | } sths34pf80_func_cfg_data_t; 466 | 467 | #define STHS34PF80_PAGE_RW 0x11U 468 | typedef struct { 469 | #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 470 | uint8_t not_used0 : 5; 471 | uint8_t func_cfg_read : 1; 472 | uint8_t func_cfg_write : 1; 473 | uint8_t not_used1 : 1; 474 | #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 475 | uint8_t not_used1 : 1; 476 | uint8_t func_cfg_write : 1; 477 | uint8_t func_cfg_read : 1; 478 | uint8_t not_used0 : 5; 479 | #endif /* DRV_BYTE_ORDER */ 480 | } sths34pf80_page_rw_t; 481 | 482 | #define STHS34PF80_PRESENCE_THS 0x20U 483 | #define STHS34PF80_MOTION_THS 0x22U 484 | #define STHS34PF80_TAMB_SHOCK_THS 0x24U 485 | #define STHS34PF80_HYST_MOTION 0x26U 486 | #define STHS34PF80_HYST_PRESENCE 0x27U 487 | #define STHS34PF80_ALGO_CONFIG 0x28U 488 | #define STHS34PF80_HYST_TAMB_SHOCK 0x29U 489 | #define STHS34PF80_RESET_ALGO 0x2AU 490 | 491 | /** 492 | * @} 493 | * 494 | */ 495 | 496 | typedef union { 497 | sths34pf80_lpf1_t lpf1; 498 | sths34pf80_lpf2_t lpf2; 499 | sths34pf80_who_am_i_t who_am_i; 500 | sths34pf80_avg_trim_t avg_trim; 501 | sths34pf80_ctrl1_t ctrl1; 502 | sths34pf80_ctrl2_t ctrl2; 503 | sths34pf80_ctrl3_t ctrl3; 504 | sths34pf80_status_t status; 505 | sths34pf80_func_status_t func_status; 506 | sths34pf80_tobject_l_t tobject_l; 507 | sths34pf80_tobject_h_t tobject_h; 508 | sths34pf80_tambient_l_t tambient_l; 509 | sths34pf80_tambient_h_t tambient_h; 510 | sths34pf80_tpresence_l_t tpresence_l; 511 | sths34pf80_tpresence_h_t tpresence_h; 512 | sths34pf80_tmotion_l_t tmotion_l; 513 | sths34pf80_tmotion_h_t tmotion_h; 514 | sths34pf80_tamb_shock_l_t tamb_shock_l; 515 | sths34pf80_tamb_shock_h_t tamb_shock_h; 516 | bitwise_t bitwise; 517 | uint8_t byte; 518 | } prefix_lowmain_t; 519 | 520 | typedef union { 521 | sths34pf80_func_cfg_addr_t func_cfg_addr; 522 | sths34pf80_func_cfg_data_t func_cfg_data; 523 | sths34pf80_page_rw_t page_rw; 524 | bitwise_t bitwise; 525 | uint8_t byte; 526 | } prefix_lowembedded_t; 527 | 528 | /** 529 | * @} 530 | * 531 | */ 532 | 533 | #ifndef __weak 534 | #define __weak __attribute__((weak)) 535 | #endif /* __weak */ 536 | 537 | /* 538 | * These are the basic platform dependent I/O routines to read 539 | * and write device registers connected on a standard bus. 540 | * The driver keeps offering a default implementation based on function 541 | * pointers to read/write routines for backward compatibility. 542 | * The default implementation is declared with a __weak directive to 543 | * allow the final application to overwrite it with a custom implementation. 544 | */ 545 | int32_t sths34pf80_read_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len); 546 | int32_t sths34pf80_write_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len); 547 | 548 | int32_t sths34pf80_device_id_get(stmdev_ctx_t *ctx, uint8_t *val); 549 | 550 | typedef enum { 551 | STHS34PF80_AVG_TMOS_2 = 0x0, 552 | STHS34PF80_AVG_TMOS_8 = 0x1, 553 | STHS34PF80_AVG_TMOS_32 = 0x2, 554 | STHS34PF80_AVG_TMOS_128 = 0x3, 555 | STHS34PF80_AVG_TMOS_256 = 0x4, 556 | STHS34PF80_AVG_TMOS_512 = 0x5, 557 | STHS34PF80_AVG_TMOS_1024 = 0x6, 558 | STHS34PF80_AVG_TMOS_2048 = 0x7, 559 | } sths34pf80_avg_tobject_num_t; 560 | int32_t sths34pf80_avg_tobject_num_set(stmdev_ctx_t *ctx, sths34pf80_avg_tobject_num_t val); 561 | int32_t sths34pf80_avg_tobject_num_get(stmdev_ctx_t *ctx, sths34pf80_avg_tobject_num_t *val); 562 | 563 | typedef enum { 564 | STHS34PF80_AVG_T_8 = 0x0, 565 | STHS34PF80_AVG_T_4 = 0x1, 566 | STHS34PF80_AVG_T_2 = 0x2, 567 | STHS34PF80_AVG_T_1 = 0x3, 568 | } sths34pf80_avg_tambient_num_t; 569 | int32_t sths34pf80_avg_tambient_num_set(stmdev_ctx_t *ctx, sths34pf80_avg_tambient_num_t val); 570 | int32_t sths34pf80_avg_tambient_num_get(stmdev_ctx_t *ctx, sths34pf80_avg_tambient_num_t *val); 571 | 572 | typedef enum { 573 | STHS34PF80_GAIN_WIDE_MODE = 0x0, 574 | STHS34PF80_GAIN_DEFAULT_MODE = 0x7, 575 | } sths34pf80_gain_mode_t; 576 | 577 | int32_t sths34pf80_gain_mode_set(stmdev_ctx_t *ctx, sths34pf80_gain_mode_t val); 578 | int32_t sths34pf80_gain_mode_get(stmdev_ctx_t *ctx, sths34pf80_gain_mode_t *val); 579 | 580 | int32_t sths34pf80_tmos_sensitivity_set(stmdev_ctx_t *ctx, uint16_t *val); 581 | int32_t sths34pf80_tmos_sensitivity_get(stmdev_ctx_t *ctx, uint16_t *val); 582 | 583 | typedef enum { 584 | STHS34PF80_TMOS_ODR_OFF = 0x0, 585 | STHS34PF80_TMOS_ODR_AT_0Hz25 = 0x1, 586 | STHS34PF80_TMOS_ODR_AT_0Hz50 = 0x2, 587 | STHS34PF80_TMOS_ODR_AT_1Hz = 0x3, 588 | STHS34PF80_TMOS_ODR_AT_2Hz = 0x4, 589 | STHS34PF80_TMOS_ODR_AT_4Hz = 0x5, 590 | STHS34PF80_TMOS_ODR_AT_8Hz = 0x6, 591 | STHS34PF80_TMOS_ODR_AT_15Hz = 0x7, 592 | STHS34PF80_TMOS_ODR_AT_30Hz = 0x8, 593 | } sths34pf80_tmos_odr_t; 594 | int32_t sths34pf80_tmos_odr_set(stmdev_ctx_t *ctx, sths34pf80_tmos_odr_t val); 595 | int32_t sths34pf80_tmos_odr_get(stmdev_ctx_t *ctx, sths34pf80_tmos_odr_t *val); 596 | 597 | int32_t sths34pf80_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val); 598 | int32_t sths34pf80_block_data_update_get(stmdev_ctx_t *ctx, uint8_t *val); 599 | 600 | typedef enum { 601 | STHS34PF80_TMOS_IDLE_MODE = 0x0, 602 | STHS34PF80_TMOS_ONE_SHOT = 0x1, 603 | } sths34pf80_tmos_one_shot_t; 604 | int32_t sths34pf80_tmos_one_shot_set(stmdev_ctx_t *ctx, sths34pf80_tmos_one_shot_t val); 605 | int32_t sths34pf80_tmos_one_shot_get(stmdev_ctx_t *ctx, sths34pf80_tmos_one_shot_t *val); 606 | 607 | typedef enum { 608 | STHS34PF80_MAIN_MEM_BANK = 0x0, 609 | STHS34PF80_EMBED_FUNC_MEM_BANK = 0x1, 610 | } sths34pf80_mem_bank_t; 611 | int32_t sths34pf80_mem_bank_set(stmdev_ctx_t *ctx, sths34pf80_mem_bank_t val); 612 | int32_t sths34pf80_mem_bank_get(stmdev_ctx_t *ctx, sths34pf80_mem_bank_t *val); 613 | 614 | int32_t sths34pf80_boot_set(stmdev_ctx_t *ctx, uint8_t val); 615 | int32_t sths34pf80_boot_get(stmdev_ctx_t *ctx, uint8_t *val); 616 | 617 | typedef struct { 618 | uint8_t drdy : 1; 619 | } sths34pf80_tmos_drdy_status_t; 620 | int32_t sths34pf80_tmos_drdy_status_get(stmdev_ctx_t *ctx, sths34pf80_tmos_drdy_status_t *val); 621 | 622 | typedef struct { 623 | uint8_t tamb_shock_flag : 1; 624 | uint8_t mot_flag : 1; 625 | uint8_t pres_flag : 1; 626 | } sths34pf80_tmos_func_status_t; 627 | int32_t sths34pf80_tmos_func_status_get(stmdev_ctx_t *ctx, sths34pf80_tmos_func_status_t *val); 628 | 629 | int32_t sths34pf80_tobject_raw_get(stmdev_ctx_t *ctx, int16_t *val); 630 | int32_t sths34pf80_tambient_raw_get(stmdev_ctx_t *ctx, int16_t *val); 631 | int32_t sths34pf80_tobj_comp_raw_get(stmdev_ctx_t *ctx, int16_t *val); 632 | int32_t sths34pf80_tpresence_raw_get(stmdev_ctx_t *ctx, int16_t *val); 633 | int32_t sths34pf80_tmotion_raw_get(stmdev_ctx_t *ctx, int16_t *val); 634 | int32_t sths34pf80_tamb_shock_raw_get(stmdev_ctx_t *ctx, int16_t *val); 635 | 636 | typedef enum { 637 | STHS34PF80_LPF_ODR_DIV_9 = 0x0, 638 | STHS34PF80_LPF_ODR_DIV_20 = 0x1, 639 | STHS34PF80_LPF_ODR_DIV_50 = 0x2, 640 | STHS34PF80_LPF_ODR_DIV_100 = 0x3, 641 | STHS34PF80_LPF_ODR_DIV_200 = 0x4, 642 | STHS34PF80_LPF_ODR_DIV_400 = 0x5, 643 | STHS34PF80_LPF_ODR_DIV_800 = 0x6, 644 | } sths34pf80_lpf_bandwidth_t; 645 | int32_t sths34pf80_lpf_m_bandwidth_set(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t val); 646 | int32_t sths34pf80_lpf_m_bandwidth_get(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t *val); 647 | int32_t sths34pf80_lpf_p_m_bandwidth_set(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t val); 648 | int32_t sths34pf80_lpf_p_m_bandwidth_get(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t *val); 649 | int32_t sths34pf80_lpf_a_t_bandwidth_set(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t val); 650 | int32_t sths34pf80_lpf_a_t_bandwidth_get(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t *val); 651 | int32_t sths34pf80_lpf_p_bandwidth_set(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t val); 652 | int32_t sths34pf80_lpf_p_bandwidth_get(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t *val); 653 | 654 | typedef enum { 655 | STHS34PF80_TMOS_INT_HIZ = 0x0, 656 | STHS34PF80_TMOS_INT_DRDY = 0x1, 657 | STHS34PF80_TMOS_INT_OR = 0x2, 658 | } sths34pf80_tmos_route_int_t; 659 | int32_t sths34pf80_tmos_route_int_set(stmdev_ctx_t *ctx, sths34pf80_tmos_route_int_t val); 660 | int32_t sths34pf80_tmos_route_int_get(stmdev_ctx_t *ctx, sths34pf80_tmos_route_int_t *val); 661 | 662 | typedef enum { 663 | STHS34PF80_TMOS_INT_NONE = 0x0, 664 | STHS34PF80_TMOS_INT_TSHOCK = 0x1, 665 | STHS34PF80_TMOS_INT_MOTION = 0x2, 666 | STHS34PF80_TMOS_INT_TSHOCK_MOTION = 0x3, 667 | STHS34PF80_TMOS_INT_PRESENCE = 0x4, 668 | STHS34PF80_TMOS_INT_TSHOCK_PRESENCE = 0x5, 669 | STHS34PF80_TMOS_INT_MOTION_PRESENCE = 0x6, 670 | STHS34PF80_TMOS_INT_ALL = 0x7, 671 | } sths34pf80_tmos_int_or_t; 672 | int32_t sths34pf80_tmos_int_or_set(stmdev_ctx_t *ctx, sths34pf80_tmos_int_or_t val); 673 | int32_t sths34pf80_tmos_int_or_get(stmdev_ctx_t *ctx, sths34pf80_tmos_int_or_t *val); 674 | 675 | typedef struct { 676 | enum { 677 | STHS34PF80_PUSH_PULL = 0x0, 678 | STHS34PF80_OPEN_DRAIN = 0x1, 679 | } pin; 680 | 681 | enum { 682 | STHS34PF80_ACTIVE_HIGH = 0x0, 683 | STHS34PF80_ACTIVE_LOW = 0x1, 684 | } polarity; 685 | } sths34pf80_int_mode_t; 686 | int32_t sths34pf80_int_mode_set(stmdev_ctx_t *ctx, sths34pf80_int_mode_t val); 687 | int32_t sths34pf80_int_mode_get(stmdev_ctx_t *ctx, sths34pf80_int_mode_t *val); 688 | 689 | typedef enum { 690 | STHS34PF80_DRDY_PULSED = 0x0, 691 | STHS34PF80_DRDY_LATCHED = 0x1, 692 | } sths34pf80_drdy_mode_t; 693 | int32_t sths34pf80_drdy_mode_set(stmdev_ctx_t *ctx, sths34pf80_drdy_mode_t val); 694 | int32_t sths34pf80_drdy_mode_get(stmdev_ctx_t *ctx, sths34pf80_drdy_mode_t *val); 695 | 696 | int32_t sths34pf80_func_cfg_write(stmdev_ctx_t *ctx, uint8_t addr, uint8_t *data, uint8_t len); 697 | int32_t sths34pf80_func_cfg_read(stmdev_ctx_t *ctx, uint8_t addr, uint8_t *data, uint8_t len); 698 | 699 | int32_t sths34pf80_presence_threshold_set(stmdev_ctx_t *ctx, uint16_t val); 700 | int32_t sths34pf80_presence_threshold_get(stmdev_ctx_t *ctx, uint16_t *val); 701 | 702 | int32_t sths34pf80_motion_threshold_set(stmdev_ctx_t *ctx, uint16_t val); 703 | int32_t sths34pf80_motion_threshold_get(stmdev_ctx_t *ctx, uint16_t *val); 704 | 705 | int32_t sths34pf80_tambient_shock_threshold_set(stmdev_ctx_t *ctx, uint16_t val); 706 | int32_t sths34pf80_tambient_shock_threshold_get(stmdev_ctx_t *ctx, uint16_t *val); 707 | 708 | int32_t sths34pf80_motion_hysteresis_set(stmdev_ctx_t *ctx, uint8_t val); 709 | int32_t sths34pf80_motion_hysteresis_get(stmdev_ctx_t *ctx, uint8_t *val); 710 | 711 | int32_t sths34pf80_presence_hysteresis_set(stmdev_ctx_t *ctx, uint8_t val); 712 | int32_t sths34pf80_presence_hysteresis_get(stmdev_ctx_t *ctx, uint8_t *val); 713 | 714 | int32_t sths34pf80_tambient_shock_hysteresis_set(stmdev_ctx_t *ctx, uint8_t val); 715 | int32_t sths34pf80_tambient_shock_hysteresis_get(stmdev_ctx_t *ctx, uint8_t *val); 716 | 717 | int32_t sths34pf80_int_or_pulsed_set(stmdev_ctx_t *ctx, uint8_t val); 718 | int32_t sths34pf80_int_or_pulsed_get(stmdev_ctx_t *ctx, uint8_t *val); 719 | int32_t sths34pf80_tobject_algo_compensation_set(stmdev_ctx_t *ctx, uint8_t val); 720 | int32_t sths34pf80_tobject_algo_compensation_get(stmdev_ctx_t *ctx, uint8_t *val); 721 | int32_t sths34pf80_presence_abs_value_set(stmdev_ctx_t *ctx, uint8_t val); 722 | int32_t sths34pf80_presence_abs_value_get(stmdev_ctx_t *ctx, uint8_t *val); 723 | 724 | int32_t sths34pf80_algo_reset(stmdev_ctx_t *ctx); 725 | 726 | #ifdef __cplusplus 727 | } 728 | #endif 729 | 730 | #endif /*STHS34PF80_DRIVER_H */ 731 | 732 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 733 | -------------------------------------------------------------------------------- /src/M5_STHS34PF80.h: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2024 M5Stack Technology CO LTD 3 | * 4 | * SPDX-License-Identifier: MIT 5 | */ 6 | #ifndef __M5UnitTMOS_H__ 7 | #define __M5UnitTMOS_H__ 8 | 9 | #include 10 | #include "sths34pf80_api/sths34pf80_reg.h" 11 | 12 | // define a standard i2c address (7 bit) macro 13 | #define STHS34PF80_I2C_ADDRESS (STHS34PF80_I2C_ADD >> 1) 14 | 15 | #define kMaxTransferBuffer 32 16 | 17 | // What we use for transfer chunk size 18 | const static uint16_t kChunkSize = kMaxTransferBuffer; 19 | 20 | class M5_STHS34PF80 { 21 | private: 22 | TwoWire *_wire; 23 | uint8_t _addr; 24 | uint8_t _scl; 25 | uint8_t _sda; 26 | 27 | bool ping(uint8_t address); 28 | int writeRegisterRegion(uint8_t address, uint8_t offset, const uint8_t *data, uint16_t length); 29 | int writeRegisterRegion(uint8_t address, uint8_t offset, uint8_t data, uint16_t length); 30 | int readRegisterRegion(uint8_t addr, uint8_t reg, uint8_t *data, uint16_t numBytes); 31 | 32 | static int32_t read(void *, uint8_t, uint8_t *, uint16_t); 33 | static int32_t write(void *, uint8_t, const uint8_t *, uint16_t); 34 | static void delayMS(uint32_t millisec); 35 | 36 | public: 37 | /** 38 | * @brief 39 | * 40 | * @param wire I2C Port 41 | * @param addr addr device i2c addr 42 | * @param sda sda sda pin number 43 | * @param scl scl scl pin number 44 | * @return bool true=success / false=fail 45 | */ 46 | bool begin(TwoWire *wire = &Wire, uint8_t addr = STHS34PF80_I2C_ADDRESS, uint8_t sda = 21, uint8_t scl = 22); 47 | 48 | /** 49 | * @brief This function begins the examples/communication and sets 50 | * the required values to the control registers in order for sensor 51 | * use. 52 | * @return int32_t Error code (false is success, true is failure) 53 | */ 54 | int32_t init(); // Resets the device and sets the values needed for sensor use 55 | 56 | /** 57 | * @brief This function determines whether or not the device 58 | * is connected to the STHS34PF80. This tests if the device ID 59 | * matches what is expected or not. 60 | * @return int32_t Error code (false is success, true is failure) 61 | */ 62 | int32_t isConnected(); // Determines connection to device 63 | 64 | /** 65 | * @brief Checks to see if the data ready flag is high 66 | * @return int32_t Data ready code (0 for not ready, 1 for ready) 67 | */ 68 | int32_t getDataReady(sths34pf80_tmos_drdy_status_t *drdy); // Returns if the data is ready to be read or not 69 | 70 | /** 71 | * @brief This function checks the status of the of the device if 72 | * there is data ready to be read. This value has 3 flags associated 73 | * with it - ambient temperature shock, motion, and presence. 74 | * @return int32_t Flag data status for the 3 different outputs. 75 | */ 76 | int32_t getStatus(sths34pf80_tmos_func_status_t *statusVal); // Returns the status of the device 77 | 78 | /** 79 | * @brief This function resets the full device 80 | * @return int32_t Error code (0 no error) 81 | */ 82 | int32_t reset(); // Set the boot bit, wait 3ms (as per the datasheet), then resets the algorithm 83 | 84 | /** 85 | * @brief This function returns the presence value (units: cm^-1) 86 | * TPRESENCE_L (0x3A) and T_PRESENCE_H (0x3B) 87 | * @param presenceVal Presence value of the device 88 | * @return int32_t Error code (0 no error) 89 | */ 90 | int32_t getPresenceValue(int16_t *presenceVal); // Returns the presence value detected of the device 91 | 92 | /** 93 | * @brief This function returns the motion value 94 | * @param motionVal Motion value of the device 95 | * @return int32_t Error code (0 no error) 96 | */ 97 | int32_t getMotionValue(int16_t *motionVal); // Returns the motion value 98 | 99 | /** 100 | * @brief This function returns the temeparture data....... 101 | * Note:the data obtained by this function is 102 | * infrared radiation, which cannot be converted into the actual object temperature. The measured value is relative 103 | * to the local temperature, and the measurement result may be negative. 104 | * @param tempVal Value to fill with information 105 | * @return int32_t Error code (0 no error) 106 | */ 107 | int32_t getTemperatureData(float *tempVal); // Returns the raw temperature value read by the device 108 | 109 | /** 110 | * @brief Returns the device ID of the STHS34PF80. 111 | * @param devID Device ID to return 112 | * @return int32_t Error code (0 no error) 113 | */ 114 | int32_t getDeviceID(uint8_t *devId); // Returns the ID of the STHS34PF80 115 | 116 | /** 117 | * @brief Returns the number of averages for the object temperature 118 | * @param val TObject number to write to register 119 | * @return int32_t Error code (0 no error) 120 | */ 121 | int32_t getAverageTObjectNumber(sths34pf80_avg_tobject_num_t *val); // Returns the number of averages 122 | 123 | /** 124 | * @brief Sets the number of averages for the object temperature 125 | * @param num Number of averages; Must be between 0-7 126 | * @return int32_t Error code (0 no error) 127 | */ 128 | int32_t setAverageTObjectNumber(sths34pf80_avg_tobject_num_t num); // Sets the # of averages for object temperature 129 | 130 | /** 131 | * @brief Returns the number of averages for the ambient temperature 132 | * @param val TAmbient Average to write to regsiter 133 | * @return int32_t Error code (0 no error) 134 | */ 135 | int32_t getAverageTAmbientNumber( 136 | sths34pf80_avg_tambient_num_t *val); // Returns the # of averages for ambient temperature 137 | 138 | /** 139 | * @brief Sets the number of averages for the ambient temperature 140 | * @param num TAmbient number to send to device 141 | * STHS34PF80_AVG_T_8 = 0x0 142 | * STHS34PF80_AVG_T_8 = 0x0 143 | * STHS34PF80_AVG_T_4 = 0x1 144 | * STHS34PF80_AVG_T_2 = 0x2 145 | * STHS34PF80_AVG_T_1 = 0x3 146 | * @return int32_t Error code (0 no error) 147 | */ 148 | int32_t setAverageTAmbientNumber( 149 | sths34pf80_avg_tambient_num_t num); // Sets the # of averages for ambient temperature 150 | 151 | /** 152 | * @brief Returns the number of averages selected for ambient temperature 153 | * @param gain Gain to write to device 154 | * @return int32_t Error code (0 no error) 155 | */ 156 | int32_t getGainMode(sths34pf80_gain_mode_t *gain); // Returns the gain mode of the temperature range 157 | 158 | /** 159 | * @brief Sets the gain mode of the device. This enables the device 160 | * to cover a wide operating temperature range for applications 161 | * that might be thermally heated inside of the application. 162 | * @param mode Gain mode to set to device 163 | * STHS34PF80_GAIN_WIDE_MODE = 0x0 164 | * STHS34PF80_GAIN_DEFAULT_MODE = 0x1 165 | * @return int32_t Error code (0 no error) 166 | */ 167 | int32_t setGainMode(sths34pf80_gain_mode_t mode); // Sets the gain mode of the temperature range 168 | 169 | /** 170 | * @brief Returns the sensitivity value in the embedded linear 171 | * algorithm for compensating ambient temperature variations in 172 | * the object temperature. 173 | * @param sense Value to set the sensitivity 174 | * @return int32_t Error code (0 no error) 175 | */ 176 | int32_t getTmosSensitivity(float *sense); // Returns the senstivity of data of the TMOS interface data 177 | 178 | /** 179 | * @brief Sets the sensitivity value in embedded linear 180 | * algorithm for compensating ambient temperature variations in 181 | * the object temperature. 182 | * @param val Sensitivity value to be converted to send to regsiter 183 | * @return int32_t Error code (0 no error) 184 | */ 185 | int32_t setTmosSensitivity(float val); // Sets the sensitivity data for the TMOS interface status 186 | 187 | /** 188 | * @brief This function returns the output data rate. 189 | * @param val Value to set the ODR rate 190 | * STHS34PF80_TMOS_ODR_OFF 191 | * STHS34PF80_TMOS_ODR_AT_0Hz25 192 | * STHS34PF80_TMOS_ODR_AT_0Hz50 193 | * STHS34PF80_TMOS_ODR_AT_1Hz 194 | * STHS34PF80_TMOS_ODR_AT_2Hz 195 | * STHS34PF80_TMOS_ODR_AT_4Hz 196 | * STHS34PF80_TMOS_ODR_AT_8Hz 197 | * STHS34PF80_TMOS_ODR_AT_15Hz 198 | * STHS34PF80_TMOS_ODR_AT_30Hz 199 | * @return int32_t Error code (0 no error) 200 | */ 201 | int32_t getTmosODR(sths34pf80_tmos_odr_t *val); // Returns the block data update feature for output registers 202 | 203 | /** 204 | * @brief Sets the output data rate 205 | * @param val 0x0 - 0x8 206 | * STHS34PF80_TMOS_ODR_OFF 207 | * STHS34PF80_TMOS_ODR_AT_0Hz25 208 | * STHS34PF80_TMOS_ODR_AT_0Hz50 209 | * STHS34PF80_TMOS_ODR_AT_1Hz 210 | * STHS34PF80_TMOS_ODR_AT_2Hz 211 | * STHS34PF80_TMOS_ODR_AT_4Hz 212 | * STHS34PF80_TMOS_ODR_AT_8Hz 213 | * STHS34PF80_TMOS_ODR_AT_15Hz 214 | * STHS34PF80_TMOS_ODR_AT_30Hz 215 | * @return int32_t Error code (0 no error) 216 | */ 217 | int32_t setTmosODR(sths34pf80_tmos_odr_t val); // Sets the block data update feature 218 | 219 | /** 220 | * @brief This function enables the block data update feature 221 | * for output registers TOBJECT (26h - 27h) and TAMBIENT (28h - 29h). 222 | * @param val Block data update bit (0 disabled, 1 enabled), -1 for error 223 | * @return int32_t Error code (0 no error) 224 | */ 225 | int32_t getBlockDataUpdate(bool *val); // Enables the block data update feature 226 | 227 | /** 228 | * @brief This function sets the block data update feature 229 | * for output registeres TOBJECT (26h - 27h) and TAMBIENT (28h - 29h). 230 | * Block data update bit (0 disabled, 1 enabled) 231 | * @param val Value to set the block data update bit 232 | * @return int32_t Error code (0 no error) 233 | */ 234 | int32_t setBlockDataUpdate(bool val); // Sets the block data 235 | 236 | /** 237 | * @brief This function returns the status of the trigger one-shot 238 | * acquisition. 239 | * @param val 0 for idle, 1 for new data set acquired, -1 for error 240 | * STHS34PF80_TMOS_IDLE_MODE = 0x0 241 | * STHS34PF80_TMOS_ONE_SHOT = 0x1 242 | * @return int32_t Error code (0 no error) 243 | */ 244 | int32_t getTmosOneShot(sths34pf80_tmos_one_shot_t *val); // Returns the state of the trigger one-shot acquisition 245 | 246 | /** 247 | * @brief This function returns the status of the trigger one-shot 248 | * acquistion. It is self-clearing upon completion (1) 249 | * @param val Value to set to register 250 | * @return int32_t Error code (0 no error) 251 | */ 252 | int32_t setTmosOneShot(sths34pf80_tmos_one_shot_t val); // Sets the trigger one-shot acquisiton 253 | 254 | /** 255 | * @brief This function enables access to the registers for embedded 256 | * functions. Default value: 0 257 | * @param val Memory bank enabled for embedded or main fucntions 258 | * STHS34PF80_MAIN_MEM_BANK = 0x0 259 | * STHS34PF80_EMBED_FUNC_MEM_BANK = 0x1 260 | * @return int32_t Error code (0 no error) 261 | */ 262 | int32_t getMemoryBank( 263 | sths34pf80_mem_bank_t *val); // Returns the state of the access to the registers for embedded functions 264 | 265 | /** 266 | * @brief This function enables access to the registers for embedded 267 | * functions. Default value: 0 268 | * @param val Value to enable access to the register 269 | * STHS34PF80_MAIN_MEM_BANK = 0x0 270 | * STHS34PF80_EMBED_FUNC_MEM_BANK = 0x1 271 | * @return int32_t Error code (0 no error) 272 | */ 273 | int32_t setMemoryBank( 274 | sths34pf80_mem_bank_t val); // Sets the state of access to the registers for embedded functions 275 | 276 | /** 277 | * @brief This function creates a global reset of the device - 278 | * Reboot OTP memory content. Self-clearing upon completion 279 | * @param val Value to fill for boot OTP 280 | * @return int32_t Error code (0 no error) 281 | */ 282 | int32_t getBootOTP(uint8_t *val); // Returns the reboot OTP memory content value 283 | 284 | /** 285 | * @brief This function creates a global reset of the device - 286 | * Reboot OTP memory content. Self-clearing upon completion 287 | * @param val Value to set the Boot OTP 288 | * @return int32_t Error code (0 no error) 289 | */ 290 | int32_t setBootOTP(uint8_t val); // Self-clears the boot OTP memory content 291 | 292 | /** 293 | * @brief This function returns the TMOS function status. This holds 294 | * information for the presence deteciton , motion detection, and 295 | * ambient shock detection flags. The flags will be raised when 296 | * there is detection in any of those fields. 297 | * @param val Fills with the function status value 298 | * @return int32_t Error code (0 no error) 299 | */ 300 | int32_t getTmosFunctionStatus(sths34pf80_tmos_func_status_t *val); // Returns the struct for using flags to get the 301 | // ambient temp, motion, and presence flags 302 | 303 | /** 304 | * @brief This function returns the raw output value that represents 305 | * the amount of infrared radiation emitted from the objects inside 306 | * the field of view. It is composed of TOBJECT_H and TOBJECT_L (0x27 307 | * and 0x26). The value is expressed as 2's complement 308 | * @param val Raw value from the TObject registers 309 | * @return int32_t Error code (0 no error) 310 | */ 311 | int32_t getTObjectRawValue(int16_t *val); // Returns the raw value of the TObject Regsiters 312 | 313 | /** 314 | * @brief This function returns the raw output value for the value that 315 | * represents the temperature of the environment in thermal coupling 316 | * with the sensor. It is composed of TAMBIENT_H and TAMBIENT_L (0x28 317 | * and 0x29). The value is expressed as 2's complement. 318 | * Sensitivity = 100 LSB/°C 319 | * @param val Raw value from TAmbient registers 320 | * @return int32_t Error code (0 no error) 321 | */ 322 | int32_t getTAmbientRawValue(int16_t *val); // Returns the raw value of the TAmbient Registers 323 | 324 | /** 325 | * @brief This function returns the raw output value for the data that 326 | * represents the amount of infrared radiation emitted from the objects 327 | * inside the field of view compensated through the embedded algorithm 328 | * for compensating ambient temperature varations. The output data is 329 | * composed of TOBJ_COMP_H and TOBJ_COMP_L (0x39 and 0x38). The value 330 | * is expressed as 2's complement. 331 | * @param val Raw value from TObj_Comp registers 332 | * @return int32_t Error code (0 no error) 333 | */ 334 | int32_t getTObjectCompensatedRawValue(int16_t *val); // Returns the raw value of the TObject Compensated Registers 335 | 336 | /** 337 | * @brief This function returns the raw output value for the data that 338 | * represents the ambient temperature shock data. It is composed of 339 | * TAMB_SHOCK_H and TAMB_SHOCK_L (0x3F and 0x3E). The value is 340 | * expressed as 2's complement 341 | * @param val Raw value from TAmb_Shock registers 342 | * @return int32_t Error code (0 no error) 343 | */ 344 | int32_t getTAmbientShockRawValue(int16_t *val); // Returns the raw value of the TAmbient Shock Registers 345 | 346 | /** 347 | * @brief This function returns the Low Pass Filter configuration 348 | * for motion detection. 349 | * @param val Low Pass Filter Motion Bandwidth value 350 | * STHS34PF80_LPF_ODR_DIV_9 = 0x0 351 | * STHS34PF80_LPF_ODR_DIV_20 = 0x1 352 | * STHS34PF80_LPF_ODR_DIV_50 = 0x2 353 | * STHS34PF80_LPF_ODR_DIV_100 = 0x3 354 | * STHS34PF80_LPF_ODR_DIV_200 = 0x4 355 | * STHS34PF80_LPF_ODR_DIV_400 = 0x5 356 | * STHS34PF80_LPF_ODR_DIV_800 = 0x6 357 | * @return int32_t Error code (0 no error) 358 | */ 359 | int32_t getLpfMotionBandwidth( 360 | sths34pf80_lpf_bandwidth_t *val); // Returns the low pass filter configuration for motion 361 | 362 | /** 363 | * @brief This function sets the Low Pass Filter configuration 364 | * for Motion detection. 365 | * @param val LPF Motion Bandwidth configuration 366 | * STHS34PF80_LPF_ODR_DIV_9 = 0x0 367 | * STHS34PF80_LPF_ODR_DIV_20 = 0x1 368 | * STHS34PF80_LPF_ODR_DIV_50 = 0x2 369 | * STHS34PF80_LPF_ODR_DIV_100 = 0x3 370 | * STHS34PF80_LPF_ODR_DIV_200 = 0x4 371 | * STHS34PF80_LPF_ODR_DIV_400 = 0x5 372 | * STHS34PF80_LPF_ODR_DIV_800 = 0x6 373 | * @return int32_t Error code (0 no error) 374 | */ 375 | int32_t setLpfMotionBandwidth(sths34pf80_lpf_bandwidth_t val); // Sets the low-pass filter configuration for motion 376 | 377 | /** 378 | * @brief This function returns the Low Pass Filter configuration 379 | * for presence and motion detection. 380 | * @param val Value to fill with Low Pass Filter configuration 381 | * STHS34PF80_LPF_ODR_DIV_9 = 0x0 382 | * STHS34PF80_LPF_ODR_DIV_20 = 0x1 383 | * STHS34PF80_LPF_ODR_DIV_50 = 0x2 384 | * STHS34PF80_LPF_ODR_DIV_100 = 0x3 385 | * STHS34PF80_LPF_ODR_DIV_200 = 0x4 386 | * STHS34PF80_LPF_ODR_DIV_400 = 0x5 387 | * STHS34PF80_LPF_ODR_DIV_800 = 0x6 388 | * @return int32_t Low Pass Filter Motion Bandwidth value, -1 for error 389 | */ 390 | int32_t getLpfPresenceMotionBandwidth( 391 | sths34pf80_lpf_bandwidth_t *val); // Returns the low pass filter configuration for motion and presence 392 | 393 | /** 394 | * @brief This function sets the Low Pass Filter configuration 395 | * for Presence and Motion detection. 396 | * @param val Value to set the LPF configuration 397 | * STHS34PF80_LPF_ODR_DIV_9 = 0x0 398 | * STHS34PF80_LPF_ODR_DIV_20 = 0x1 399 | * STHS34PF80_LPF_ODR_DIV_50 = 0x2 400 | * STHS34PF80_LPF_ODR_DIV_100 = 0x3 401 | * STHS34PF80_LPF_ODR_DIV_200 = 0x4 402 | * STHS34PF80_LPF_ODR_DIV_400 = 0x5 403 | * STHS34PF80_LPF_ODR_DIV_800 = 0x6 404 | * @return int32_t Error code (0 no error) 405 | */ 406 | int32_t setLpfPresenceMotionBandwidth( 407 | sths34pf80_lpf_bandwidth_t val); // Sets the low-pass filter configuration for motion and presence 408 | 409 | /** 410 | * @brief This function returns the Low Pass Filter configuration 411 | * for Ambient Temperature Shock detection. 412 | * @param val Value to fill with the LPF ambient temp shock detection 413 | * STHS34PF80_LPF_ODR_DIV_9 = 0x0 414 | * STHS34PF80_LPF_ODR_DIV_20 = 0x1 415 | * STHS34PF80_LPF_ODR_DIV_50 = 0x2 416 | * STHS34PF80_LPF_ODR_DIV_100 = 0x3 417 | * STHS34PF80_LPF_ODR_DIV_200 = 0x4 418 | * STHS34PF80_LPF_ODR_DIV_400 = 0x5 419 | * STHS34PF80_LPF_ODR_DIV_800 = 0x6 420 | * @return int32_t Low Pass Filter Ambient Temperature Shock Bandwidth value, -1 for error 421 | */ 422 | int32_t getLpfAmbientTempBandwidth( 423 | sths34pf80_lpf_bandwidth_t *val); // Returns the low pass filter config for ambient temperature shock detection 424 | 425 | /** 426 | * @brief This function sets the Low Pass Filter configuration 427 | * for Ambient Temperature Shock detection. 428 | * @param val Value to set the ambient tempertature shock detection 429 | * STHS34PF80_LPF_ODR_DIV_9 = 0x0 430 | * STHS34PF80_LPF_ODR_DIV_20 = 0x1 431 | * STHS34PF80_LPF_ODR_DIV_50 = 0x2 432 | * STHS34PF80_LPF_ODR_DIV_100 = 0x3 433 | * STHS34PF80_LPF_ODR_DIV_200 = 0x4 434 | * STHS34PF80_LPF_ODR_DIV_400 = 0x5 435 | * STHS34PF80_LPF_ODR_DIV_800 = 0x6 436 | * @return int32_t Error code (0 no error) 437 | */ 438 | int32_t setLpfAmbientTempBandwidth(sths34pf80_lpf_bandwidth_t val); // Sets the low-pass filter configuration for 439 | // ambient temperature shock detection 440 | 441 | /** 442 | * @brief This function returns the Low Pass Filter configuration 443 | * for Ambient Temperature Shock detection. 444 | * @param val Value to fill with the LPF presence bandwidth value 445 | * STHS34PF80_LPF_ODR_DIV_9 = 0x0 446 | * STHS34PF80_LPF_ODR_DIV_20 = 0x1 447 | * STHS34PF80_LPF_ODR_DIV_50 = 0x2 448 | * STHS34PF80_LPF_ODR_DIV_100 = 0x3 449 | * STHS34PF80_LPF_ODR_DIV_200 = 0x4 450 | * STHS34PF80_LPF_ODR_DIV_400 = 0x5 451 | * STHS34PF80_LPF_ODR_DIV_800 = 0x6 452 | * @return int32_t Error code (0 no error) 453 | */ 454 | int32_t getLpfPresenceBandwidth( 455 | sths34pf80_lpf_bandwidth_t *val); // Returns the low pass filter config for the presence bandwidth 456 | 457 | /** 458 | * @brief This function sets the Low Pass Filter configuration 459 | * for Presence detection. 460 | * @param val Value to set the LPF presence bandwidth 461 | * STHS34PF80_LPF_ODR_DIV_9 = 0x0 462 | * STHS34PF80_LPF_ODR_DIV_20 = 0x1 463 | * STHS34PF80_LPF_ODR_DIV_50 = 0x2 464 | * STHS34PF80_LPF_ODR_DIV_100 = 0x3 465 | * STHS34PF80_LPF_ODR_DIV_200 = 0x4 466 | * STHS34PF80_LPF_ODR_DIV_400 = 0x5 467 | * STHS34PF80_LPF_ODR_DIV_800 = 0x6 468 | * @return int32_t Error code (0 no error) 469 | */ 470 | int32_t setLpfPresenceBandwidth( 471 | sths34pf80_lpf_bandwidth_t val); // // Sets the low-pass filter configuration for presence detection 472 | 473 | /** 474 | * @brief This function returns the interrupts to be routed. 475 | * See page 26, Table 10.9 of the datasheet for more information 476 | * @param val Value to fill with the types of interrupts to be routed 477 | * STHS34PF80_TMOS_INT_HIZ = 0x0 478 | * STHS34PF80_TMOS_INT_DRDY = 0x1 479 | * STHS34PF80_TMOS_INT_OR = 0x2 480 | * @return int32_t Error code (0 no error) 481 | */ 482 | int32_t getTmosRouteInterrupt(sths34pf80_tmos_route_int_t *val); // Returns the Interrupts to be routed 483 | 484 | /** 485 | * @brief This function sets the interrupts to be routed. 486 | * See page 26, Table 9 of the datasheet for more information 487 | * @param val Value to set the interrupts to be routed 488 | * STHS34PF80_TMOS_INT_HIZ = 0x0 489 | * STHS34PF80_TMOS_INT_DRDY = 0x1 490 | * STHS34PF80_TMOS_INT_OR = 0x2 491 | * @return int32_t Error code (0 no error) 492 | */ 493 | int32_t setTmosRouteInterrupt(sths34pf80_tmos_route_int_t val); // Sets the Interrutps to be routed 494 | 495 | /** 496 | * @brief This function returns the selects interrupts output 497 | * @param val Value to fill with the select interrupt output type 498 | * STHS34PF80_TMOS_INT_NONE = 0x0 499 | * STHS34PF80_TMOS_INT_TSHOCK = 0x1 500 | * STHS34PF80_TMOS_INT_MOTION = 0x2 501 | * STHS34PF80_TMOS_INT_TSHOCK_MOTION = 0x3 502 | * STHS34PF80_TMOS_INT_PRESENCE = 0x4 503 | * STHS34PF80_TMOS_INT_TSHOCK_PRESENCE = 0x5 504 | * STHS34PF80_TMOS_INT_MOTION_PRESENCE = 0x6 505 | * STHS34PF80_TMOS_INT_ALL = 0x7 506 | * @return int32_t Error code (0 no error) 507 | */ 508 | int32_t getTmosInterruptOR(sths34pf80_tmos_int_or_t *val); // Returns the Interrupts Output type 509 | 510 | /** 511 | * @brief This function sets the selects interrupts output 512 | * @param val Value to write to the register. See above defines 513 | * for what can be used 514 | * STHS34PF80_TMOS_INT_NONE = 0x0 515 | * STHS34PF80_TMOS_INT_TSHOCK = 0x1 516 | * STHS34PF80_TMOS_INT_MOTION = 0x2 517 | * STHS34PF80_TMOS_INT_TSHOCK_MOTION = 0x3 518 | * STHS34PF80_TMOS_INT_PRESENCE = 0x4 519 | * STHS34PF80_TMOS_INT_TSHOCK_PRESENCE = 0x5 520 | * STHS34PF80_TMOS_INT_MOTION_PRESENCE = 0x6 521 | * STHS34PF80_TMOS_INT_ALL = 0x7 522 | * @return int32_t Error code (0 no error) 523 | */ 524 | int32_t setTmosInterruptOR(sths34pf80_tmos_int_or_t val); // Sets the interrupts output type 525 | 526 | /** 527 | * @brief This function returns the interrupt trigger mode 528 | * for the push-pull/open-drain selection on INT1 and INT2 pins. 529 | * @param val Interrupt mode (H or L), -1 for error 530 | * STHS34PF80_ACTIVE_HIGH = 0x0 531 | * STHS34PF80_ACTIVE_LOW = 0x1 532 | * @return int32_t Error code (0 no error) 533 | */ 534 | int32_t getInterruptMode(sths34pf80_int_mode_t *val); // Returns the interrupt mode currently set on the device 535 | 536 | /** 537 | * @brief This function sets the interrupt trigger mode 538 | * for the push-pull/open-drain selection on INT1 and INT2 pins. 539 | * @param val Value the user sets to write to the device (0 or 1) 540 | * STHS34PF80_ACTIVE_HIGH = 0x0 541 | * STHS34PF80_ACTIVE_LOW = 0x1 542 | * @return int32_t Error code (0 no error) 543 | */ 544 | int32_t setInterruptMode(sths34pf80_int_mode_t val); // Sets the interrupt mode of the device 545 | 546 | /** 547 | * @brief This function returns the data ready mode to pulsed (0) 548 | * on the INT pin, or latched (1). 549 | * @param val Data ready mode (pulsed or latched) 550 | * STHS34PF80_DRDY_PULSED = 0x0 551 | * STHS34PF80_DRDY_LATCHED = 0x1 552 | * @return int32_t Error code (0 no error) 553 | */ 554 | int32_t getDataReadyMode(sths34pf80_drdy_mode_t *val); // Returns the data ready mode currently set for device 555 | 556 | /** 557 | * @brief This function sets the data ready mode to be pulsed (0) 558 | * on the INT pin, or latched (1). 559 | * @param val Value the user sets to write to the device (0 or 1) 560 | * STHS34PF80_DRDY_PULSED = 0x0 561 | * STHS34PF80_DRDY_LATCHED = 0x1 562 | * @return int32_t Error code (0 no error) 563 | */ 564 | int32_t setDataReadyMode(sths34pf80_drdy_mode_t val); // Sets the data ready mode of the device (0 or 1) 565 | 566 | /** 567 | * @brief This function returns the presence threshold of the device. 568 | * @param val Presence threshold of the device 569 | * Default value is 200 (0x008C) 570 | * @return int32_t Error code (0 for no error) 571 | */ 572 | int32_t getPresenceThreshold(uint16_t *val); // Returns the presence threshold value read 573 | 574 | /** 575 | * @brief This function sets the presence threshold for the device. 576 | * @param threshold 15-bit unsigned integer 577 | * Default value is 200 (0x00C8). 578 | * @return int32_t Error code (0 for no error) 579 | */ 580 | int32_t setPresenceThreshold(uint16_t threshold); // Sets the presence threshold value of the device 581 | 582 | /** 583 | * @brief This function returns the motion threshold of the device. 584 | * @param val Motion threshold 585 | * Default value is 200 (0x00C8) 586 | * @return int32_t Error code (0 for no error) 587 | */ 588 | int32_t getMotionThreshold(uint16_t *val); // Returns the motion threshold of the device 589 | 590 | /** 591 | * @brief This function sets the motion threshold of the device. 592 | * @param threshold 15-bit unsigned integer 593 | * Default value is 200 (0x00C8). 594 | * @return int32_t Error code (0 for no error) 595 | */ 596 | int32_t setMotionThreshold(uint8_t threshold); // Sets the motion threshold value of the device 597 | 598 | /** 599 | * @brief This function returns the ambient temperature threshold of 600 | * the device. Default value is 10 (0x000A). 601 | * @param val Ambient temperature shock threshold 602 | * @return int32_t Error code (0 for no error) 603 | */ 604 | int32_t getTAmbientShockThreshold(uint16_t *val); // Returns the ambient temperature threshold of the device 605 | 606 | /** 607 | * @brief This function sets the ambient temperature threshold of the 608 | * device. Default value is 10 (0x000A). 609 | * @param threshold 15-bit unsigned integer 610 | * @return int32_t Error code (0 for no error) 611 | */ 612 | int32_t setTAmbientShockThreshold(uint16_t threshold); // Sets the ambient temperature threshold of the device 613 | 614 | /** 615 | * @brief This function sets the motion hysteresis of the device. 616 | * @param val Motion hysteresis 617 | * Default value is 0x32. 618 | * @return int32_t Error code (0 for no error) 619 | */ 620 | int32_t getMotionHysteresis(uint8_t *val); // Returns the motion hysterssis of the device 621 | 622 | /** 623 | * @brief This function returns the motion hysteresis of the device. 624 | * @param hysteresis 8-bit unsigned integer 625 | * Default value is 0x32. 626 | * @return int32_t Error code (0 for no error) 627 | */ 628 | int32_t setMotionHysteresis(uint8_t hysteresis); // Sets the motion hystersis of the device 629 | 630 | /** 631 | * @brief This function returns the presence hysteresis of the 632 | * device. Default value is 0x32. 633 | * @param val Presence hysteresis 634 | * @return int32_t Error code (0 for no error) 635 | */ 636 | int32_t getPresenceHysteresis(uint8_t *val); // Returns the presence hystersis of the device 637 | 638 | /** 639 | * @brief This function sets the presence hysteresis of the device. 640 | * Default value is 0x32. 641 | * @param hysteresis 8-bit unsigned integer. 642 | * @return int32_t Error code (0 for no error) 643 | */ 644 | int32_t setPresenceHysteresis(uint8_t hysteresis); // Sets the presence hystersis of the device 645 | 646 | /** 647 | * @brief This function returns the ambient temperature shock hysteresis 648 | * of the device. Default value is 10 (0xA). 649 | * @param val Ambient temperature shock hysteresis value 650 | * @return int32_t Error code (0 for no error) 651 | */ 652 | int32_t getTAmbientShockHysteresis(uint8_t *val); // Returns the ambient temperature shock hystersis of the device 653 | 654 | /** 655 | * @brief This function sets the ambient temperature shock hysteresis 656 | * of the device. Default value is 10 (0xA). 657 | * @param hysteresis 15-bit unsigned integer for temp ambient shock hysteresis 658 | * @return int32_t Error code (0 for no error) 659 | */ 660 | int32_t setTAmbientShockHysteresis( 661 | uint16_t hysteresis); // Sets the ambient temperature shock hystersis of the device 662 | 663 | /** 664 | * @brief This function returns if the flag is latched or pulsed 665 | * on the INT pin. Default value = 0. 666 | * @param val Latched (0) or Pulsed (1) 667 | * @return int32_t Error code (0 for no error) 668 | */ 669 | int32_t getInterruptPulsed(uint8_t *val); // Returns the result of the algorithms if they are pulsed or not 670 | 671 | /** 672 | * @brief This function sets the flag for if the result of the 673 | * algorithms are pulsed (high for ODR defined) on the INT pin. 674 | * @param pulse int_pulsed value (0, 1) 675 | * Default value = 0 676 | * @return int32_t Error code (0 no error) 677 | */ 678 | int32_t setInterruptPulsed(uint8_t pulse); // Sets the device's result of the algorithms to pulsed or not 679 | 680 | /** 681 | * @brief This function returns the Tobject compnesation. This is 682 | * an embedded linear algorithm for compensating ambient temperature 683 | * variations in the object temperature. Default value is 0. 684 | * @param val Disabled (0) or Enabled (1) 685 | * @return int32_t Error code (0 no error) 686 | */ 687 | int32_t getTobjectAlgoCompensation( 688 | uint8_t *val); // Returns if the device is using the algorithm for compensating temp variations 689 | 690 | /** 691 | * @brief This function sets the Tobject compnesation. This is 692 | * an embedded linear algorithm for compensating ambient temperature 693 | * variations in the object temperature. Default value is 0. 694 | * @param comp Ambient compensation for object temperature (0, 1) 695 | * @return int32_t Error code (0 no error) 696 | */ 697 | int32_t setTobjectAlgoCompensation(uint8_t comp); // Sets the devices Tobject compensation 698 | 699 | /** 700 | * @brief This function returns the enable/disable bit for setting 701 | * the presence absolute value algorithm 702 | * @param val Absolute value NOT applied (0) or applied (1) 703 | * @return int32_t Error code (0 no error) 704 | */ 705 | int32_t getPresenceAbsValue( 706 | uint8_t *val); // Returns if there is absolute value added in the presence detection algorithm 707 | 708 | /** 709 | * @brief This function returns the enable/disable bit for setting 710 | * the presence absolute value algorithm 711 | * @param val Presence absolute value (0, 1) 712 | * @return int32_t Error code (0 no error) 713 | */ 714 | int32_t setPresenceAbsValue(uint8_t val); // Sets the absolute value added in the presence detection algorithm 715 | 716 | /** 717 | * @brief This function resets the algorithm whenever parameters 718 | * are modified. The user is required to call this after modifying 719 | * any parameters. 720 | * @return int32_t Error code (0 no error) 721 | */ 722 | int32_t resetAlgo(); // Resets the algo structure of the device 723 | 724 | /** 725 | * @brief This function writes/sets data to the desired address for the desired 726 | * number of bytes. 727 | * @param addr embedded register address 728 | * @param data embedded register data 729 | * @param len embedded register data len 730 | * @return int32_t Interface status (0 for no error, -1 for error) 731 | */ 732 | int32_t writeFunctionConfiguration(uint8_t addr, uint8_t *data, uint8_t len); // Write interface definition 733 | 734 | /** 735 | * @brief This function returns/gets data from the desired address for the chosen 736 | * number of bytes. Note that this is limited to a 32 bit value for length. 737 | * @param addr embedded register address 738 | * @param data embedded register data 739 | * @param len embedded register data len 740 | * @return int32_t Interface status (0 for no error, -1 for error) 741 | */ 742 | int32_t readFunctionConfiguration(uint8_t addr, uint8_t *data, uint8_t len); // Read interface defintions 743 | 744 | protected: 745 | stmdev_ctx_t sensor; 746 | }; 747 | 748 | #endif -------------------------------------------------------------------------------- /src/sths34pf80_api/sths34pf80_reg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file sths34pf80_reg.c 4 | * @author Sensors Software Solution Team 5 | * @brief STHS34PF80 driver file 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | #include "sths34pf80_reg.h" 21 | 22 | /** 23 | * @defgroup STHS34PF80 24 | * @brief This file provides a set of functions needed to drive the 25 | * sths34pf80 enhanced inertial module. 26 | * @{ 27 | * 28 | */ 29 | 30 | /** 31 | * @defgroup Interfaces functions 32 | * @brief This section provide a set of functions used to read and 33 | * write a generic register of the device. 34 | * MANDATORY: return 0 -> no Error. 35 | * @{ 36 | * 37 | */ 38 | 39 | #ifndef __weak 40 | #define __weak __attribute__((weak)) 41 | #endif /* __weak */ 42 | 43 | /** 44 | * @brief Read generic device register 45 | * 46 | * @param ctx communication interface handler.(ptr) 47 | * @param reg first register address to read. 48 | * @param data buffer for data read.(ptr) 49 | * @param len number of consecutive register to read. 50 | * @retval interface status (MANDATORY: return 0 -> no Error) 51 | * 52 | */ 53 | int32_t __weak sths34pf80_read_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len) { 54 | int32_t ret; 55 | 56 | ret = ctx->read_reg(ctx->handle, reg, data, len); 57 | 58 | return ret; 59 | } 60 | 61 | /** 62 | * @brief Write generic device register 63 | * 64 | * @param ctx communication interface handler.(ptr) 65 | * @param reg first register address to write. 66 | * @param data the buffer contains data to be written.(ptr) 67 | * @param len number of consecutive register to write. 68 | * @retval interface status (MANDATORY: return 0 -> no Error) 69 | * 70 | */ 71 | int32_t __weak sths34pf80_write_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len) { 72 | int32_t ret; 73 | 74 | ret = ctx->write_reg(ctx->handle, reg, data, len); 75 | 76 | return ret; 77 | } 78 | 79 | /** 80 | * @} 81 | * 82 | */ 83 | 84 | /** 85 | * @defgroup Common 86 | * @brief Common 87 | * @{/ 88 | * 89 | */ 90 | /** 91 | * @brief Device ID.[get] 92 | * 93 | * @param ctx read / write interface definitions 94 | * @param val Device ID. 95 | * @retval interface status (MANDATORY: return 0 -> no Error) 96 | * 97 | */ 98 | int32_t sths34pf80_device_id_get(stmdev_ctx_t *ctx, uint8_t *val) { 99 | int32_t ret; 100 | 101 | ret = sths34pf80_read_reg(ctx, STHS34PF80_WHO_AM_I, val, 1); 102 | 103 | return ret; 104 | } 105 | 106 | /** 107 | * @brief Select number of averages for object temperature.[set] 108 | * 109 | * @param ctx read / write interface definitions 110 | * @param val AVG_TMOS_2, AVG_TMOS_8, AVG_TMOS_32, AVG_TMOS_128, AVG_TMOS_256, AVG_TMOS_512, AVG_TMOS_1024, 111 | * AVG_TMOS_2048, 112 | * @retval interface status (MANDATORY: return 0 -> no Error) 113 | * 114 | */ 115 | int32_t sths34pf80_avg_tobject_num_set(stmdev_ctx_t *ctx, sths34pf80_avg_tobject_num_t val) { 116 | sths34pf80_avg_trim_t avg_trim; 117 | int32_t ret; 118 | 119 | ret = sths34pf80_read_reg(ctx, STHS34PF80_AVG_TRIM, (uint8_t *)&avg_trim, 1); 120 | 121 | if (ret == 0) { 122 | avg_trim.avg_tmos = ((uint8_t)val & 0x7U); 123 | ret = sths34pf80_write_reg(ctx, STHS34PF80_AVG_TRIM, (uint8_t *)&avg_trim, 1); 124 | } 125 | 126 | return ret; 127 | } 128 | 129 | /** 130 | * @brief Select number of averages for object temperature.[get] 131 | * 132 | * @param ctx read / write interface definitions 133 | * @param val AVG_TMOS_2, AVG_TMOS_8, AVG_TMOS_32, AVG_TMOS_128, AVG_TMOS_256, AVG_TMOS_512, AVG_TMOS_1024, 134 | * AVG_TMOS_2048, 135 | * @retval interface status (MANDATORY: return 0 -> no Error) 136 | * 137 | */ 138 | int32_t sths34pf80_avg_tobject_num_get(stmdev_ctx_t *ctx, sths34pf80_avg_tobject_num_t *val) { 139 | sths34pf80_avg_trim_t avg_trim; 140 | int32_t ret; 141 | 142 | ret = sths34pf80_read_reg(ctx, STHS34PF80_AVG_TRIM, (uint8_t *)&avg_trim, 1); 143 | 144 | switch (avg_trim.avg_tmos) { 145 | case STHS34PF80_AVG_TMOS_2: 146 | *val = STHS34PF80_AVG_TMOS_2; 147 | break; 148 | 149 | case STHS34PF80_AVG_TMOS_8: 150 | *val = STHS34PF80_AVG_TMOS_8; 151 | break; 152 | 153 | case STHS34PF80_AVG_TMOS_32: 154 | *val = STHS34PF80_AVG_TMOS_32; 155 | break; 156 | 157 | case STHS34PF80_AVG_TMOS_128: 158 | *val = STHS34PF80_AVG_TMOS_128; 159 | break; 160 | 161 | case STHS34PF80_AVG_TMOS_256: 162 | *val = STHS34PF80_AVG_TMOS_256; 163 | break; 164 | 165 | case STHS34PF80_AVG_TMOS_512: 166 | *val = STHS34PF80_AVG_TMOS_512; 167 | break; 168 | 169 | case STHS34PF80_AVG_TMOS_1024: 170 | *val = STHS34PF80_AVG_TMOS_1024; 171 | break; 172 | 173 | case STHS34PF80_AVG_TMOS_2048: 174 | *val = STHS34PF80_AVG_TMOS_2048; 175 | break; 176 | 177 | default: 178 | *val = STHS34PF80_AVG_TMOS_2; 179 | break; 180 | } 181 | return ret; 182 | } 183 | 184 | /** 185 | * @brief Select number of averages for ambient temperature.[set] 186 | * 187 | * @param ctx read / write interface definitions 188 | * @param val AVG_T_8, AVG_T_4, AVG_T_2, AVG_T_1, 189 | * @retval interface status (MANDATORY: return 0 -> no Error) 190 | * 191 | */ 192 | int32_t sths34pf80_avg_tambient_num_set(stmdev_ctx_t *ctx, sths34pf80_avg_tambient_num_t val) { 193 | sths34pf80_avg_trim_t avg_trim; 194 | int32_t ret; 195 | 196 | ret = sths34pf80_read_reg(ctx, STHS34PF80_AVG_TRIM, (uint8_t *)&avg_trim, 1); 197 | 198 | if (ret == 0) { 199 | avg_trim.avg_t = ((uint8_t)val & 0x3U); 200 | ret = sths34pf80_write_reg(ctx, STHS34PF80_AVG_TRIM, (uint8_t *)&avg_trim, 1); 201 | } 202 | 203 | return ret; 204 | } 205 | 206 | /** 207 | * @brief Select number of averages for ambient temperature.[get] 208 | * 209 | * @param ctx read / write interface definitions 210 | * @param val AVG_T_8, AVG_T_4, AVG_T_2, AVG_T_1, 211 | * @retval interface status (MANDATORY: return 0 -> no Error) 212 | * 213 | */ 214 | int32_t sths34pf80_avg_tambient_num_get(stmdev_ctx_t *ctx, sths34pf80_avg_tambient_num_t *val) { 215 | sths34pf80_avg_trim_t avg_trim; 216 | int32_t ret; 217 | 218 | ret = sths34pf80_read_reg(ctx, STHS34PF80_AVG_TRIM, (uint8_t *)&avg_trim, 1); 219 | 220 | switch (avg_trim.avg_t) { 221 | case STHS34PF80_AVG_T_8: 222 | *val = STHS34PF80_AVG_T_8; 223 | break; 224 | 225 | case STHS34PF80_AVG_T_4: 226 | *val = STHS34PF80_AVG_T_4; 227 | break; 228 | 229 | case STHS34PF80_AVG_T_2: 230 | *val = STHS34PF80_AVG_T_2; 231 | break; 232 | 233 | case STHS34PF80_AVG_T_1: 234 | *val = STHS34PF80_AVG_T_1; 235 | break; 236 | 237 | default: 238 | *val = STHS34PF80_AVG_T_8; 239 | break; 240 | } 241 | return ret; 242 | } 243 | 244 | /** 245 | * @brief temperature range.[set] 246 | * 247 | * @param ctx read / write interface definitions 248 | * @param val range: GAIN_WIDE_MODE, GAIN_DEFAULT_MODE 249 | * @retval interface status (MANDATORY: return 0 -> no Error) 250 | * 251 | */ 252 | int32_t sths34pf80_gain_mode_set(stmdev_ctx_t *ctx, sths34pf80_gain_mode_t val) { 253 | sths34pf80_ctrl0_t ctrl0; 254 | int32_t ret; 255 | 256 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL0, (uint8_t *)&ctrl0, 1); 257 | 258 | if (ret == 0) { 259 | ctrl0.gain = (uint8_t)val; 260 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL0, (uint8_t *)&ctrl0, 1); 261 | } 262 | 263 | return ret; 264 | } 265 | 266 | /** 267 | * @brief temperature range.[get] 268 | * 269 | * @param ctx read / write interface definitions 270 | * @param val range: GAIN_WIDE_MODE, GAIN_DEFAULT_MODE 271 | * @retval interface status (MANDATORY: return 0 -> no Error) 272 | * 273 | */ 274 | int32_t sths34pf80_gain_mode_get(stmdev_ctx_t *ctx, sths34pf80_gain_mode_t *val) { 275 | sths34pf80_ctrl0_t ctrl0; 276 | int32_t ret; 277 | 278 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL0, (uint8_t *)&ctrl0, 1); 279 | 280 | switch (ctrl0.gain) { 281 | case STHS34PF80_GAIN_WIDE_MODE: 282 | *val = STHS34PF80_GAIN_WIDE_MODE; 283 | break; 284 | 285 | case STHS34PF80_GAIN_DEFAULT_MODE: 286 | *val = STHS34PF80_GAIN_DEFAULT_MODE; 287 | break; 288 | 289 | default: 290 | *val = STHS34PF80_GAIN_DEFAULT_MODE; 291 | break; 292 | } 293 | 294 | return ret; 295 | } 296 | 297 | /** 298 | * @brief sensitivity data.[set] 299 | * 300 | * @param ctx read / write interface definitions 301 | * @param val IN: desired sensitivity value 302 | * OUT: rounded sensitivity value 303 | * @retval interface status (MANDATORY: return 0 -> no Error) 304 | * 305 | */ 306 | int32_t sths34pf80_tmos_sensitivity_set(stmdev_ctx_t *ctx, uint16_t *val) { 307 | sths34pf80_sens_data_t data; 308 | int32_t ret; 309 | 310 | data.sens = (*val >= 2048U) ? (*val - 2048U + 8U) / 16U : (*val - 2048U - 8U) / 16U; 311 | ret = sths34pf80_write_reg(ctx, STHS34PF80_SENS_DATA, (uint8_t *)&data, 1); 312 | *val = (int8_t)data.sens * 16U + 2048U; 313 | 314 | return ret; 315 | } 316 | 317 | /** 318 | * @brief sensitivity data.[get] 319 | * 320 | * @param ctx read / write interface definitions 321 | * @param val rounded sensitivity value 322 | * @retval interface status (MANDATORY: return 0 -> no Error) 323 | * 324 | */ 325 | int32_t sths34pf80_tmos_sensitivity_get(stmdev_ctx_t *ctx, uint16_t *val) { 326 | sths34pf80_sens_data_t data; 327 | int32_t ret; 328 | 329 | ret = sths34pf80_read_reg(ctx, STHS34PF80_SENS_DATA, (uint8_t *)&data, 1); 330 | *val = (int8_t)data.sens * 16 + 2048; 331 | 332 | return ret; 333 | } 334 | 335 | /** 336 | * @brief Enter to/Exit from power-down in a safe way 337 | * 338 | * @param ctx read / write interface definitions 339 | * @param ctrl1 Value of CTRL1 register 340 | * @param odr_new Value of new odr to be set 341 | * @retval interface status (MANDATORY: return 0 -> no Error) 342 | * 343 | */ 344 | static int32_t sths34pf80_tmos_odr_check_safe_set(stmdev_ctx_t *ctx, sths34pf80_ctrl1_t ctrl1, uint8_t odr_new) { 345 | sths34pf80_func_status_t func_status; 346 | sths34pf80_tmos_drdy_status_t status; 347 | int32_t ret = 0; 348 | 349 | if (odr_new > 0U) { 350 | /* 351 | * Do a clean reset algo procedure everytime odr is changed to an 352 | * operative state. 353 | */ 354 | ctrl1.odr = 0; 355 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 356 | 357 | ret += sths34pf80_algo_reset(ctx); 358 | } else { 359 | /* if we need to go to power-down from an operative state 360 | * perform the safe power-down. 361 | */ 362 | if ((uint8_t)ctrl1.odr > 0U) { 363 | /* reset the DRDY bit */ 364 | ret = sths34pf80_read_reg(ctx, STHS34PF80_FUNC_STATUS, (uint8_t *)&func_status, 1); 365 | 366 | /* wait DRDY bit go to '1' */ 367 | do { 368 | ret += sths34pf80_tmos_drdy_status_get(ctx, &status); 369 | 370 | } while (status.drdy != 0U); 371 | 372 | /* set ODR to 0 */ 373 | ctrl1.odr = 0; 374 | ret += sths34pf80_write_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 375 | 376 | /* reset the DRDY bit */ 377 | ret += sths34pf80_read_reg(ctx, STHS34PF80_FUNC_STATUS, (uint8_t *)&func_status, 1); 378 | } 379 | } 380 | 381 | ctrl1.odr = (odr_new & 0xfU); 382 | ret += sths34pf80_write_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 383 | 384 | return ret; 385 | } 386 | 387 | /** 388 | * @brief Selects the tmos odr.[set] 389 | * 390 | * @param ctx read / write interface definitions 391 | * @param val TMOS_ODR_OFF, TMOS_ODR_AT_0Hz25, TMOS_ODR_AT_0Hz50, TMOS_ODR_1Hz, TMOS_ODR_2Hz, TMOS_ODR_4Hz, 392 | * TMOS_ODR_8Hz, TMOS_ODR_15Hz, TMOS_ODR_30Hz, 393 | * @retval interface status (MANDATORY: return 0 -> no Error) 394 | * 395 | */ 396 | int32_t sths34pf80_tmos_odr_set(stmdev_ctx_t *ctx, sths34pf80_tmos_odr_t val) { 397 | sths34pf80_ctrl1_t ctrl1; 398 | sths34pf80_avg_trim_t avg_trim; 399 | sths34pf80_tmos_odr_t max_odr = STHS34PF80_TMOS_ODR_AT_30Hz; 400 | int32_t ret; 401 | 402 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 403 | 404 | if (ret == 0) { 405 | ret = sths34pf80_read_reg(ctx, STHS34PF80_AVG_TRIM, (uint8_t *)&avg_trim, 1); 406 | 407 | switch (avg_trim.avg_tmos) { 408 | default: 409 | case STHS34PF80_AVG_TMOS_2: 410 | case STHS34PF80_AVG_TMOS_8: 411 | case STHS34PF80_AVG_TMOS_32: 412 | max_odr = STHS34PF80_TMOS_ODR_AT_30Hz; 413 | break; 414 | case STHS34PF80_AVG_TMOS_128: 415 | max_odr = STHS34PF80_TMOS_ODR_AT_8Hz; 416 | break; 417 | case STHS34PF80_AVG_TMOS_256: 418 | max_odr = STHS34PF80_TMOS_ODR_AT_4Hz; 419 | break; 420 | case STHS34PF80_AVG_TMOS_512: 421 | max_odr = STHS34PF80_TMOS_ODR_AT_2Hz; 422 | break; 423 | case STHS34PF80_AVG_TMOS_1024: 424 | max_odr = STHS34PF80_TMOS_ODR_AT_1Hz; 425 | break; 426 | case STHS34PF80_AVG_TMOS_2048: 427 | max_odr = STHS34PF80_TMOS_ODR_AT_0Hz50; 428 | break; 429 | } 430 | } 431 | 432 | if (ret == 0) { 433 | if (val > max_odr) { 434 | return -1; 435 | } 436 | 437 | ret = sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, (uint8_t)val); 438 | } 439 | 440 | return ret; 441 | } 442 | 443 | /** 444 | * @brief Selects the tmos odr.[get] 445 | * 446 | * @param ctx read / write interface definitions 447 | * @param val TMOS_ODR_OFF, TMOS_ODR_AT_0Hz25, TMOS_ODR_AT_0Hz50, TMOS_ODR_1Hz, TMOS_ODR_2Hz, TMOS_ODR_4Hz, 448 | * TMOS_ODR_8Hz, TMOS_ODR_15Hz, TMOS_ODR_30Hz, 449 | * @retval interface status (MANDATORY: return 0 -> no Error) 450 | * 451 | */ 452 | int32_t sths34pf80_tmos_odr_get(stmdev_ctx_t *ctx, sths34pf80_tmos_odr_t *val) { 453 | sths34pf80_ctrl1_t ctrl1; 454 | int32_t ret; 455 | 456 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 457 | 458 | switch (ctrl1.odr) { 459 | case STHS34PF80_TMOS_ODR_OFF: 460 | *val = STHS34PF80_TMOS_ODR_OFF; 461 | break; 462 | 463 | case STHS34PF80_TMOS_ODR_AT_0Hz25: 464 | *val = STHS34PF80_TMOS_ODR_AT_0Hz25; 465 | break; 466 | 467 | case STHS34PF80_TMOS_ODR_AT_0Hz50: 468 | *val = STHS34PF80_TMOS_ODR_AT_0Hz50; 469 | break; 470 | 471 | case STHS34PF80_TMOS_ODR_AT_1Hz: 472 | *val = STHS34PF80_TMOS_ODR_AT_1Hz; 473 | break; 474 | 475 | case STHS34PF80_TMOS_ODR_AT_2Hz: 476 | *val = STHS34PF80_TMOS_ODR_AT_2Hz; 477 | break; 478 | 479 | case STHS34PF80_TMOS_ODR_AT_4Hz: 480 | *val = STHS34PF80_TMOS_ODR_AT_4Hz; 481 | break; 482 | 483 | case STHS34PF80_TMOS_ODR_AT_8Hz: 484 | *val = STHS34PF80_TMOS_ODR_AT_8Hz; 485 | break; 486 | 487 | case STHS34PF80_TMOS_ODR_AT_15Hz: 488 | *val = STHS34PF80_TMOS_ODR_AT_15Hz; 489 | break; 490 | 491 | case STHS34PF80_TMOS_ODR_AT_30Hz: 492 | *val = STHS34PF80_TMOS_ODR_AT_30Hz; 493 | break; 494 | 495 | default: 496 | *val = STHS34PF80_TMOS_ODR_OFF; 497 | break; 498 | } 499 | return ret; 500 | } 501 | 502 | /** 503 | * @brief Block Data Update (BDU): output registers are not updated until LSB and MSB have been read). [set] 504 | * 505 | * @param ctx read / write interface definitions 506 | * @param val Block Data Update (BDU): output registers are not updated until LSB and MSB have been read). 507 | * @retval interface status (MANDATORY: return 0 -> no Error) 508 | * 509 | */ 510 | int32_t sths34pf80_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val) { 511 | sths34pf80_ctrl1_t ctrl1; 512 | int32_t ret; 513 | 514 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 515 | 516 | if (ret == 0) { 517 | ctrl1.bdu = val; 518 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 519 | } 520 | 521 | return ret; 522 | } 523 | 524 | /** 525 | * @brief Block Data Update (BDU): output registers are not updated until LSB and MSB have been read). [get] 526 | * 527 | * @param ctx read / write interface definitions 528 | * @param val Block Data Update (BDU): output registers are not updated until LSB and MSB have been read). 529 | * @retval interface status (MANDATORY: return 0 -> no Error) 530 | * 531 | */ 532 | int32_t sths34pf80_block_data_update_get(stmdev_ctx_t *ctx, uint8_t *val) { 533 | sths34pf80_ctrl1_t ctrl1; 534 | int32_t ret; 535 | 536 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 537 | 538 | *val = ctrl1.bdu; 539 | 540 | return ret; 541 | } 542 | 543 | /** 544 | * @brief Selects data output mode.[set] 545 | * 546 | * @param ctx read / write interface definitions 547 | * @param val TMOS_IDLE_MODE, TMOS_ONE_SHOT, 548 | * @retval interface status (MANDATORY: return 0 -> no Error) 549 | * 550 | */ 551 | int32_t sths34pf80_tmos_one_shot_set(stmdev_ctx_t *ctx, sths34pf80_tmos_one_shot_t val) { 552 | sths34pf80_ctrl2_t ctrl2; 553 | int32_t ret; 554 | 555 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL2, (uint8_t *)&ctrl2, 1); 556 | 557 | if (ret == 0) { 558 | ctrl2.one_shot = ((uint8_t)val & 0x1U); 559 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL2, (uint8_t *)&ctrl2, 1); 560 | } 561 | 562 | return ret; 563 | } 564 | 565 | /** 566 | * @brief Selects data output mode.[get] 567 | * 568 | * @param ctx read / write interface definitions 569 | * @param val TMOS_IDLE_MODE, TMOS_ONE_SHOT, 570 | * @retval interface status (MANDATORY: return 0 -> no Error) 571 | * 572 | */ 573 | int32_t sths34pf80_tmos_one_shot_get(stmdev_ctx_t *ctx, sths34pf80_tmos_one_shot_t *val) { 574 | sths34pf80_ctrl2_t ctrl2; 575 | int32_t ret; 576 | 577 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL2, (uint8_t *)&ctrl2, 1); 578 | 579 | switch (ctrl2.one_shot) { 580 | case STHS34PF80_TMOS_IDLE_MODE: 581 | *val = STHS34PF80_TMOS_IDLE_MODE; 582 | break; 583 | 584 | case STHS34PF80_TMOS_ONE_SHOT: 585 | *val = STHS34PF80_TMOS_ONE_SHOT; 586 | break; 587 | 588 | default: 589 | *val = STHS34PF80_TMOS_IDLE_MODE; 590 | break; 591 | } 592 | return ret; 593 | } 594 | 595 | /** 596 | * @brief Change memory bank.[set] 597 | * 598 | * @param ctx read / write interface definitions 599 | * @param val MAIN_MEM_BANK, EMBED_FUNC_MEM_BANK, SENSOR_HUB_MEM_BANK, STRED_MEM_BANK, 600 | * @retval interface status (MANDATORY: return 0 -> no Error) 601 | * 602 | */ 603 | int32_t sths34pf80_mem_bank_set(stmdev_ctx_t *ctx, sths34pf80_mem_bank_t val) { 604 | sths34pf80_ctrl2_t ctrl2; 605 | int32_t ret; 606 | 607 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL2, (uint8_t *)&ctrl2, 1); 608 | 609 | if (ret == 0) { 610 | ctrl2.func_cfg_access = ((uint8_t)val & 0x1U); 611 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL2, (uint8_t *)&ctrl2, 1); 612 | } 613 | 614 | return ret; 615 | } 616 | 617 | /** 618 | * @brief Change memory bank.[get] 619 | * 620 | * @param ctx read / write interface definitions 621 | * @param val MAIN_MEM_BANK, EMBED_FUNC_MEM_BANK, SENSOR_HUB_MEM_BANK, STRED_MEM_BANK, 622 | * @retval interface status (MANDATORY: return 0 -> no Error) 623 | * 624 | */ 625 | int32_t sths34pf80_mem_bank_get(stmdev_ctx_t *ctx, sths34pf80_mem_bank_t *val) { 626 | sths34pf80_ctrl2_t ctrl2; 627 | int32_t ret; 628 | 629 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL2, (uint8_t *)&ctrl2, 1); 630 | 631 | switch (ctrl2.func_cfg_access) { 632 | case STHS34PF80_MAIN_MEM_BANK: 633 | *val = STHS34PF80_MAIN_MEM_BANK; 634 | break; 635 | 636 | case STHS34PF80_EMBED_FUNC_MEM_BANK: 637 | *val = STHS34PF80_EMBED_FUNC_MEM_BANK; 638 | break; 639 | 640 | default: 641 | *val = STHS34PF80_MAIN_MEM_BANK; 642 | break; 643 | } 644 | return ret; 645 | } 646 | 647 | /** 648 | * @brief Global reset of the device.[set] 649 | * 650 | * @param ctx read / write interface definitions 651 | * @param val READY, RESTORE_CTRL_REGS, 652 | * @retval interface status (MANDATORY: return 0 -> no Error) 653 | * 654 | */ 655 | int32_t sths34pf80_boot_set(stmdev_ctx_t *ctx, uint8_t val) { 656 | sths34pf80_ctrl2_t ctrl2; 657 | int32_t ret; 658 | 659 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL2, (uint8_t *)&ctrl2, 1); 660 | 661 | if (ret == 0) { 662 | ctrl2.boot = val; 663 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL2, (uint8_t *)&ctrl2, 1); 664 | } 665 | 666 | return ret; 667 | } 668 | 669 | /** 670 | * @brief Global reset of the device.[get] 671 | * 672 | * @param ctx read / write interface definitions 673 | * @param val READY, RESTORE_CTRL_REGS, 674 | * @retval interface status (MANDATORY: return 0 -> no Error) 675 | * 676 | */ 677 | int32_t sths34pf80_boot_get(stmdev_ctx_t *ctx, uint8_t *val) { 678 | sths34pf80_ctrl2_t ctrl2; 679 | int32_t ret; 680 | 681 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL2, (uint8_t *)&ctrl2, 1); 682 | *val = ctrl2.boot; 683 | 684 | return ret; 685 | } 686 | 687 | /** 688 | * @brief status of drdy.[get] 689 | * 690 | * @param ctx read / write interface definitions 691 | * @param val status of drdy bit (TAMB, TOBJ, TAMB_SHOCK, TPRESENCE, TMOTION). 692 | * @retval interface status (MANDATORY: return 0 -> no Error) 693 | * 694 | */ 695 | int32_t sths34pf80_tmos_drdy_status_get(stmdev_ctx_t *ctx, sths34pf80_tmos_drdy_status_t *val) { 696 | sths34pf80_status_t status; 697 | int32_t ret; 698 | 699 | ret = sths34pf80_read_reg(ctx, STHS34PF80_STATUS, (uint8_t *)&status, 1); 700 | 701 | val->drdy = status.drdy; 702 | 703 | return ret; 704 | } 705 | 706 | /** 707 | * @brief status of internal functions.[get] 708 | * 709 | * @param ctx read / write interface definitions 710 | * @param val status of internal functions. 711 | * @retval interface status (MANDATORY: return 0 -> no Error) 712 | * 713 | */ 714 | int32_t sths34pf80_tmos_func_status_get(stmdev_ctx_t *ctx, sths34pf80_tmos_func_status_t *val) { 715 | sths34pf80_func_status_t func_status; 716 | int32_t ret; 717 | 718 | ret = sths34pf80_read_reg(ctx, STHS34PF80_FUNC_STATUS, (uint8_t *)&func_status, 1); 719 | 720 | val->tamb_shock_flag = func_status.tamb_shock_flag; 721 | val->mot_flag = func_status.mot_flag; 722 | val->pres_flag = func_status.pres_flag; 723 | 724 | return ret; 725 | } 726 | 727 | /** 728 | * @brief Object temperature output register.[get] 729 | * 730 | * @param ctx read / write interface definitions 731 | * @param val Object temperature output register. 732 | * @retval interface status (MANDATORY: return 0 -> no Error) 733 | * 734 | */ 735 | int32_t sths34pf80_tobject_raw_get(stmdev_ctx_t *ctx, int16_t *val) { 736 | uint8_t buff[2]; 737 | int32_t ret; 738 | 739 | ret = sths34pf80_read_reg(ctx, STHS34PF80_TOBJECT_L, &buff[0], 2); 740 | 741 | *val = (int16_t)buff[1]; 742 | *val = (*val * 256) + (int16_t)buff[0]; 743 | 744 | return ret; 745 | } 746 | 747 | /** 748 | * @brief Ambient temperature output register.[get] 749 | * 750 | * @param ctx read / write interface definitions 751 | * @param val Ambient temperature output register. 752 | * @retval interface status (MANDATORY: return 0 -> no Error) 753 | * 754 | */ 755 | int32_t sths34pf80_tambient_raw_get(stmdev_ctx_t *ctx, int16_t *val) { 756 | uint8_t buff[2]; 757 | int32_t ret; 758 | 759 | ret = sths34pf80_read_reg(ctx, STHS34PF80_TAMBIENT_L, &buff[0], 2); 760 | 761 | *val = (int16_t)buff[1]; 762 | *val = (*val * 256) + (int16_t)buff[0]; 763 | 764 | return ret; 765 | } 766 | 767 | /** 768 | * @brief Object compensation output register.[get] 769 | * 770 | * @param ctx read / write interface definitions 771 | * @param val Object compensation output register. 772 | * @retval interface status (MANDATORY: return 0 -> no Error) 773 | * 774 | */ 775 | int32_t sths34pf80_tobj_comp_raw_get(stmdev_ctx_t *ctx, int16_t *val) { 776 | uint8_t buff[2]; 777 | int32_t ret; 778 | 779 | ret = sths34pf80_read_reg(ctx, STHS34PF80_TOBJ_COMP_L, &buff[0], 2); 780 | 781 | *val = (int16_t)buff[1]; 782 | *val = (*val * 256) + (int16_t)buff[0]; 783 | 784 | return ret; 785 | } 786 | 787 | /** 788 | * @brief Presence algo data output register.[get] 789 | * 790 | * @param ctx read / write interface definitions 791 | * @param val Presence algo data output register. 792 | * @retval interface status (MANDATORY: return 0 -> no Error) 793 | * 794 | */ 795 | int32_t sths34pf80_tpresence_raw_get(stmdev_ctx_t *ctx, int16_t *val) { 796 | uint8_t buff[2]; 797 | int32_t ret; 798 | 799 | ret = sths34pf80_read_reg(ctx, STHS34PF80_TPRESENCE_L, &buff[0], 2); 800 | 801 | *val = (int16_t)buff[1]; 802 | *val = (*val * 256) + (int16_t)buff[0]; 803 | 804 | return ret; 805 | } 806 | 807 | /** 808 | * @brief Motion algo data output register.[get] 809 | * 810 | * @param ctx read / write interface definitions 811 | * @param val Motion algo data output register. 812 | * @retval interface status (MANDATORY: return 0 -> no Error) 813 | * 814 | */ 815 | int32_t sths34pf80_tmotion_raw_get(stmdev_ctx_t *ctx, int16_t *val) { 816 | uint8_t buff[2]; 817 | int32_t ret; 818 | 819 | ret = sths34pf80_read_reg(ctx, STHS34PF80_TMOTION_L, &buff[0], 2); 820 | 821 | *val = (int16_t)buff[1]; 822 | *val = (*val * 256) + (int16_t)buff[0]; 823 | 824 | return ret; 825 | } 826 | 827 | /** 828 | * @brief Temperature ambient shock algo data output register.[get] 829 | * 830 | * @param ctx read / write interface definitions 831 | * @param val Temperature ambient shock algo data output register. 832 | * @retval interface status (MANDATORY: return 0 -> no Error) 833 | * 834 | */ 835 | int32_t sths34pf80_tamb_shock_raw_get(stmdev_ctx_t *ctx, int16_t *val) { 836 | uint8_t buff[2]; 837 | int32_t ret; 838 | 839 | ret = sths34pf80_read_reg(ctx, STHS34PF80_TAMB_SHOCK_L, &buff[0], 2); 840 | 841 | *val = (int16_t)buff[1]; 842 | *val = (*val * 256) + (int16_t)buff[0]; 843 | 844 | return ret; 845 | } 846 | 847 | /** 848 | * @} 849 | * 850 | */ 851 | 852 | /** 853 | * @defgroup Filters 854 | * @brief Filters 855 | * @{/ 856 | * 857 | */ 858 | /** 859 | * @brief low-pass filter configuration.[set] 860 | * 861 | * @param ctx read / write interface definitions 862 | * @param val LPF_ODR_DIV_9, LPF_ODR_DIV_20, LPF_ODR_DIV_50, LPF_ODR_DIV_100, LPF_ODR_DIV_200, LPF_ODR_DIV_400, 863 | * LPF_ODR_DIV_800, 864 | * @retval interface status (MANDATORY: return 0 -> no Error) 865 | * 866 | */ 867 | int32_t sths34pf80_lpf_m_bandwidth_set(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t val) { 868 | sths34pf80_lpf1_t lpf1; 869 | int32_t ret; 870 | 871 | ret = sths34pf80_read_reg(ctx, STHS34PF80_LPF1, (uint8_t *)&lpf1, 1); 872 | 873 | if (ret == 0) { 874 | lpf1.lpf_m = ((uint8_t)val & 0x7U); 875 | ret = sths34pf80_write_reg(ctx, STHS34PF80_LPF1, (uint8_t *)&lpf1, 1); 876 | } 877 | 878 | return ret; 879 | } 880 | 881 | /** 882 | * @brief low-pass filter configuration.[get] 883 | * 884 | * @param ctx read / write interface definitions 885 | * @param val LPF_ODR_DIV_9, LPF_ODR_DIV_20, LPF_ODR_DIV_50, LPF_ODR_DIV_100, LPF_ODR_DIV_200, LPF_ODR_DIV_400, 886 | * LPF_ODR_DIV_800, 887 | * @retval interface status (MANDATORY: return 0 -> no Error) 888 | * 889 | */ 890 | int32_t sths34pf80_lpf_m_bandwidth_get(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t *val) { 891 | sths34pf80_lpf1_t lpf1; 892 | int32_t ret; 893 | 894 | ret = sths34pf80_read_reg(ctx, STHS34PF80_LPF1, (uint8_t *)&lpf1, 1); 895 | 896 | switch ((lpf1.lpf_m)) { 897 | case STHS34PF80_LPF_ODR_DIV_9: 898 | *val = STHS34PF80_LPF_ODR_DIV_9; 899 | break; 900 | 901 | case STHS34PF80_LPF_ODR_DIV_20: 902 | *val = STHS34PF80_LPF_ODR_DIV_20; 903 | break; 904 | 905 | case STHS34PF80_LPF_ODR_DIV_50: 906 | *val = STHS34PF80_LPF_ODR_DIV_50; 907 | break; 908 | 909 | case STHS34PF80_LPF_ODR_DIV_100: 910 | *val = STHS34PF80_LPF_ODR_DIV_100; 911 | break; 912 | 913 | case STHS34PF80_LPF_ODR_DIV_200: 914 | *val = STHS34PF80_LPF_ODR_DIV_200; 915 | break; 916 | 917 | case STHS34PF80_LPF_ODR_DIV_400: 918 | *val = STHS34PF80_LPF_ODR_DIV_400; 919 | break; 920 | 921 | case STHS34PF80_LPF_ODR_DIV_800: 922 | *val = STHS34PF80_LPF_ODR_DIV_800; 923 | break; 924 | 925 | default: 926 | *val = STHS34PF80_LPF_ODR_DIV_9; 927 | break; 928 | } 929 | return ret; 930 | } 931 | 932 | /** 933 | * @brief low-pass filter configuration.[set] 934 | * 935 | * @param ctx read / write interface definitions 936 | * @param val LPF_ODR_DIV_9, LPF_ODR_DIV_20, LPF_ODR_DIV_50, LPF_ODR_DIV_100, LPF_ODR_DIV_200, LPF_ODR_DIV_400, 937 | * LPF_ODR_DIV_800, 938 | * @retval interface status (MANDATORY: return 0 -> no Error) 939 | * 940 | */ 941 | int32_t sths34pf80_lpf_p_m_bandwidth_set(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t val) { 942 | sths34pf80_lpf1_t lpf1; 943 | int32_t ret; 944 | 945 | ret = sths34pf80_read_reg(ctx, STHS34PF80_LPF1, (uint8_t *)&lpf1, 1); 946 | 947 | if (ret == 0) { 948 | lpf1.lpf_p_m = ((uint8_t)val & 0x7U); 949 | ret = sths34pf80_write_reg(ctx, STHS34PF80_LPF1, (uint8_t *)&lpf1, 1); 950 | } 951 | 952 | return ret; 953 | } 954 | 955 | /** 956 | * @brief low-pass filter configuration.[get] 957 | * 958 | * @param ctx read / write interface definitions 959 | * @param val LPF_ODR_DIV_9, LPF_ODR_DIV_20, LPF_ODR_DIV_50, LPF_ODR_DIV_100, LPF_ODR_DIV_200, LPF_ODR_DIV_400, 960 | * LPF_ODR_DIV_800, 961 | * @retval interface status (MANDATORY: return 0 -> no Error) 962 | * 963 | */ 964 | int32_t sths34pf80_lpf_p_m_bandwidth_get(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t *val) { 965 | sths34pf80_lpf1_t lpf1; 966 | int32_t ret; 967 | 968 | ret = sths34pf80_read_reg(ctx, STHS34PF80_LPF1, (uint8_t *)&lpf1, 1); 969 | 970 | switch ((lpf1.lpf_p_m)) { 971 | case STHS34PF80_LPF_ODR_DIV_9: 972 | *val = STHS34PF80_LPF_ODR_DIV_9; 973 | break; 974 | 975 | case STHS34PF80_LPF_ODR_DIV_20: 976 | *val = STHS34PF80_LPF_ODR_DIV_20; 977 | break; 978 | 979 | case STHS34PF80_LPF_ODR_DIV_50: 980 | *val = STHS34PF80_LPF_ODR_DIV_50; 981 | break; 982 | 983 | case STHS34PF80_LPF_ODR_DIV_100: 984 | *val = STHS34PF80_LPF_ODR_DIV_100; 985 | break; 986 | 987 | case STHS34PF80_LPF_ODR_DIV_200: 988 | *val = STHS34PF80_LPF_ODR_DIV_200; 989 | break; 990 | 991 | case STHS34PF80_LPF_ODR_DIV_400: 992 | *val = STHS34PF80_LPF_ODR_DIV_400; 993 | break; 994 | 995 | case STHS34PF80_LPF_ODR_DIV_800: 996 | *val = STHS34PF80_LPF_ODR_DIV_800; 997 | break; 998 | 999 | default: 1000 | *val = STHS34PF80_LPF_ODR_DIV_9; 1001 | break; 1002 | } 1003 | return ret; 1004 | } 1005 | 1006 | /** 1007 | * @brief low-pass filter configuration.[set] 1008 | * 1009 | * @param ctx read / write interface definitions 1010 | * @param val LPF_ODR_DIV_9, LPF_ODR_DIV_20, LPF_ODR_DIV_50, LPF_ODR_DIV_100, LPF_ODR_DIV_200, LPF_ODR_DIV_400, 1011 | * LPF_ODR_DIV_800, 1012 | * @retval interface status (MANDATORY: return 0 -> no Error) 1013 | * 1014 | */ 1015 | int32_t sths34pf80_lpf_a_t_bandwidth_set(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t val) { 1016 | sths34pf80_lpf2_t lpf2; 1017 | int32_t ret; 1018 | 1019 | ret = sths34pf80_read_reg(ctx, STHS34PF80_LPF2, (uint8_t *)&lpf2, 1); 1020 | 1021 | if (ret == 0) { 1022 | lpf2.lpf_a_t = ((uint8_t)val & 0x7U); 1023 | ret = sths34pf80_write_reg(ctx, STHS34PF80_LPF2, (uint8_t *)&lpf2, 1); 1024 | } 1025 | 1026 | return ret; 1027 | } 1028 | 1029 | /** 1030 | * @brief low-pass filter configuration.[get] 1031 | * 1032 | * @param ctx read / write interface definitions 1033 | * @param val LPF_ODR_DIV_9, LPF_ODR_DIV_20, LPF_ODR_DIV_50, LPF_ODR_DIV_100, LPF_ODR_DIV_200, LPF_ODR_DIV_400, 1034 | * LPF_ODR_DIV_800, 1035 | * @retval interface status (MANDATORY: return 0 -> no Error) 1036 | * 1037 | */ 1038 | int32_t sths34pf80_lpf_a_t_bandwidth_get(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t *val) { 1039 | sths34pf80_lpf2_t lpf2; 1040 | int32_t ret; 1041 | 1042 | ret = sths34pf80_read_reg(ctx, STHS34PF80_LPF2, (uint8_t *)&lpf2, 1); 1043 | 1044 | switch ((lpf2.lpf_a_t)) { 1045 | case STHS34PF80_LPF_ODR_DIV_9: 1046 | *val = STHS34PF80_LPF_ODR_DIV_9; 1047 | break; 1048 | 1049 | case STHS34PF80_LPF_ODR_DIV_20: 1050 | *val = STHS34PF80_LPF_ODR_DIV_20; 1051 | break; 1052 | 1053 | case STHS34PF80_LPF_ODR_DIV_50: 1054 | *val = STHS34PF80_LPF_ODR_DIV_50; 1055 | break; 1056 | 1057 | case STHS34PF80_LPF_ODR_DIV_100: 1058 | *val = STHS34PF80_LPF_ODR_DIV_100; 1059 | break; 1060 | 1061 | case STHS34PF80_LPF_ODR_DIV_200: 1062 | *val = STHS34PF80_LPF_ODR_DIV_200; 1063 | break; 1064 | 1065 | case STHS34PF80_LPF_ODR_DIV_400: 1066 | *val = STHS34PF80_LPF_ODR_DIV_400; 1067 | break; 1068 | 1069 | case STHS34PF80_LPF_ODR_DIV_800: 1070 | *val = STHS34PF80_LPF_ODR_DIV_800; 1071 | break; 1072 | 1073 | default: 1074 | *val = STHS34PF80_LPF_ODR_DIV_9; 1075 | break; 1076 | } 1077 | return ret; 1078 | } 1079 | 1080 | /** 1081 | * @brief low-pass filter configuration.[set] 1082 | * 1083 | * @param ctx read / write interface definitions 1084 | * @param val LPF_ODR_DIV_9, LPF_ODR_DIV_20, LPF_ODR_DIV_50, LPF_ODR_DIV_100, LPF_ODR_DIV_200, LPF_ODR_DIV_400, 1085 | * LPF_ODR_DIV_800, 1086 | * @retval interface status (MANDATORY: return 0 -> no Error) 1087 | * 1088 | */ 1089 | int32_t sths34pf80_lpf_p_bandwidth_set(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t val) { 1090 | sths34pf80_lpf2_t lpf2; 1091 | int32_t ret; 1092 | 1093 | ret = sths34pf80_read_reg(ctx, STHS34PF80_LPF2, (uint8_t *)&lpf2, 1); 1094 | 1095 | if (ret == 0) { 1096 | lpf2.lpf_p = ((uint8_t)val & 0x7U); 1097 | ret = sths34pf80_write_reg(ctx, STHS34PF80_LPF2, (uint8_t *)&lpf2, 1); 1098 | } 1099 | 1100 | return ret; 1101 | } 1102 | 1103 | /** 1104 | * @brief low-pass filter configuration.[get] 1105 | * 1106 | * @param ctx read / write interface definitions 1107 | * @param val LPF_ODR_DIV_9, LPF_ODR_DIV_20, LPF_ODR_DIV_50, LPF_ODR_DIV_100, LPF_ODR_DIV_200, LPF_ODR_DIV_400, 1108 | * LPF_ODR_DIV_800, 1109 | * @retval interface status (MANDATORY: return 0 -> no Error) 1110 | * 1111 | */ 1112 | int32_t sths34pf80_lpf_p_bandwidth_get(stmdev_ctx_t *ctx, sths34pf80_lpf_bandwidth_t *val) { 1113 | sths34pf80_lpf2_t lpf2; 1114 | int32_t ret; 1115 | 1116 | ret = sths34pf80_read_reg(ctx, STHS34PF80_LPF2, (uint8_t *)&lpf2, 1); 1117 | 1118 | switch ((lpf2.lpf_p)) { 1119 | case STHS34PF80_LPF_ODR_DIV_9: 1120 | *val = STHS34PF80_LPF_ODR_DIV_9; 1121 | break; 1122 | 1123 | case STHS34PF80_LPF_ODR_DIV_20: 1124 | *val = STHS34PF80_LPF_ODR_DIV_20; 1125 | break; 1126 | 1127 | case STHS34PF80_LPF_ODR_DIV_50: 1128 | *val = STHS34PF80_LPF_ODR_DIV_50; 1129 | break; 1130 | 1131 | case STHS34PF80_LPF_ODR_DIV_100: 1132 | *val = STHS34PF80_LPF_ODR_DIV_100; 1133 | break; 1134 | 1135 | case STHS34PF80_LPF_ODR_DIV_200: 1136 | *val = STHS34PF80_LPF_ODR_DIV_200; 1137 | break; 1138 | 1139 | case STHS34PF80_LPF_ODR_DIV_400: 1140 | *val = STHS34PF80_LPF_ODR_DIV_400; 1141 | break; 1142 | 1143 | case STHS34PF80_LPF_ODR_DIV_800: 1144 | *val = STHS34PF80_LPF_ODR_DIV_800; 1145 | break; 1146 | 1147 | default: 1148 | *val = STHS34PF80_LPF_ODR_DIV_9; 1149 | break; 1150 | } 1151 | return ret; 1152 | } 1153 | 1154 | /** 1155 | * @} 1156 | * 1157 | */ 1158 | 1159 | /** 1160 | * @defgroup Interrupt PINs 1161 | * @brief Interrupt PINs 1162 | * @{/ 1163 | * 1164 | */ 1165 | /** 1166 | * @brief Selects interrupts to be routed.[set] 1167 | * 1168 | * @param ctx read / write interface definitions 1169 | * @param val TMOS_INT_HIZ, TMOS_INT_DRDY, TMOS_INT_OR, 1170 | * @retval interface status (MANDATORY: return 0 -> no Error) 1171 | * 1172 | */ 1173 | int32_t sths34pf80_tmos_route_int_set(stmdev_ctx_t *ctx, sths34pf80_tmos_route_int_t val) { 1174 | sths34pf80_ctrl3_t ctrl3; 1175 | int32_t ret; 1176 | 1177 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1178 | 1179 | if (ret == 0) { 1180 | ctrl3.ien = ((uint8_t)val & 0x3U); 1181 | if (val == STHS34PF80_TMOS_INT_OR) { 1182 | ctrl3.int_latched = 0; /* guarantee that latched is zero in INT_OR case */ 1183 | } 1184 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1185 | } 1186 | 1187 | return ret; 1188 | } 1189 | 1190 | /** 1191 | * @brief Selects interrupts to be routed.[get] 1192 | * 1193 | * @param ctx read / write interface definitions 1194 | * @param val TMOS_INT_HIZ, TMOS_INT_DRDY, TMOS_INT_OR, 1195 | * @retval interface status (MANDATORY: return 0 -> no Error) 1196 | * 1197 | */ 1198 | int32_t sths34pf80_tmos_route_int_get(stmdev_ctx_t *ctx, sths34pf80_tmos_route_int_t *val) { 1199 | sths34pf80_ctrl3_t ctrl3; 1200 | int32_t ret; 1201 | 1202 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1203 | 1204 | switch ((ctrl3.ien)) { 1205 | case STHS34PF80_TMOS_INT_HIZ: 1206 | *val = STHS34PF80_TMOS_INT_HIZ; 1207 | break; 1208 | 1209 | case STHS34PF80_TMOS_INT_DRDY: 1210 | *val = STHS34PF80_TMOS_INT_DRDY; 1211 | break; 1212 | 1213 | case STHS34PF80_TMOS_INT_OR: 1214 | *val = STHS34PF80_TMOS_INT_OR; 1215 | break; 1216 | 1217 | default: 1218 | *val = STHS34PF80_TMOS_INT_HIZ; 1219 | break; 1220 | } 1221 | return ret; 1222 | } 1223 | 1224 | /** 1225 | * @brief Selects interrupts output.[set] 1226 | * 1227 | * @param ctx read / write interface definitions 1228 | * @param val TMOS_INT_NONE, TMOS_INT_TSHOCK, TMOS_INT_MOTION, TMOS_INT_TSHOCK_MOTION, TMOS_INT_PRESENCE, 1229 | * TMOS_INT_TSHOCK_PRESENCE, TMOS_INT_MOTION_PRESENCE, TMOS_INT_ALL, 1230 | * @retval interface status (MANDATORY: return 0 -> no Error) 1231 | * 1232 | */ 1233 | int32_t sths34pf80_tmos_int_or_set(stmdev_ctx_t *ctx, sths34pf80_tmos_int_or_t val) { 1234 | sths34pf80_ctrl3_t ctrl3; 1235 | int32_t ret; 1236 | 1237 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1238 | 1239 | if (ret == 0) { 1240 | ctrl3.int_msk = ((uint8_t)val & 0x7U); 1241 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1242 | } 1243 | 1244 | return ret; 1245 | } 1246 | 1247 | /** 1248 | * @brief Selects interrupts output.[get] 1249 | * 1250 | * @param ctx read / write interface definitions 1251 | * @param val TMOS_INT_NONE, TMOS_INT_TSHOCK, TMOS_INT_MOTION, TMOS_INT_TSHOCK_MOTION, TMOS_INT_PRESENCE, 1252 | * TMOS_INT_TSHOCK_PRESENCE, TMOS_INT_MOTION_PRESENCE, TMOS_INT_ALL, 1253 | * @retval interface status (MANDATORY: return 0 -> no Error) 1254 | * 1255 | */ 1256 | int32_t sths34pf80_tmos_int_or_get(stmdev_ctx_t *ctx, sths34pf80_tmos_int_or_t *val) { 1257 | sths34pf80_ctrl3_t ctrl3; 1258 | int32_t ret; 1259 | 1260 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1261 | 1262 | switch ((ctrl3.int_msk)) { 1263 | case STHS34PF80_TMOS_INT_NONE: 1264 | *val = STHS34PF80_TMOS_INT_NONE; 1265 | break; 1266 | 1267 | case STHS34PF80_TMOS_INT_TSHOCK: 1268 | *val = STHS34PF80_TMOS_INT_TSHOCK; 1269 | break; 1270 | 1271 | case STHS34PF80_TMOS_INT_MOTION: 1272 | *val = STHS34PF80_TMOS_INT_MOTION; 1273 | break; 1274 | 1275 | case STHS34PF80_TMOS_INT_TSHOCK_MOTION: 1276 | *val = STHS34PF80_TMOS_INT_TSHOCK_MOTION; 1277 | break; 1278 | 1279 | case STHS34PF80_TMOS_INT_PRESENCE: 1280 | *val = STHS34PF80_TMOS_INT_PRESENCE; 1281 | break; 1282 | 1283 | case STHS34PF80_TMOS_INT_TSHOCK_PRESENCE: 1284 | *val = STHS34PF80_TMOS_INT_TSHOCK_PRESENCE; 1285 | break; 1286 | 1287 | case STHS34PF80_TMOS_INT_MOTION_PRESENCE: 1288 | *val = STHS34PF80_TMOS_INT_MOTION_PRESENCE; 1289 | break; 1290 | 1291 | case STHS34PF80_TMOS_INT_ALL: 1292 | *val = STHS34PF80_TMOS_INT_ALL; 1293 | break; 1294 | 1295 | default: 1296 | *val = STHS34PF80_TMOS_INT_NONE; 1297 | break; 1298 | } 1299 | return ret; 1300 | } 1301 | 1302 | /** 1303 | * @brief Push-pull/open-drain selection on INT1 and INT2 pins.[set] 1304 | * 1305 | * @param ctx read / write interface definitions 1306 | * @param val PUSH_PULL, OPEN_DRAIN, 1307 | * @retval interface status (MANDATORY: return 0 -> no Error) 1308 | * 1309 | */ 1310 | int32_t sths34pf80_int_mode_set(stmdev_ctx_t *ctx, sths34pf80_int_mode_t val) { 1311 | sths34pf80_ctrl3_t ctrl3; 1312 | int32_t ret; 1313 | 1314 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1315 | 1316 | if (ret == 0) { 1317 | ctrl3.pp_od = ((uint8_t)val.pin); 1318 | ctrl3.int_h_l = ((uint8_t)val.polarity); 1319 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1320 | } 1321 | 1322 | return ret; 1323 | } 1324 | 1325 | /** 1326 | * @brief Push-pull/open-drain selection on INT1 and INT2 pins.[get] 1327 | * 1328 | * @param ctx read / write interface definitions 1329 | * @param val PUSH_PULL, OPEN_DRAIN, 1330 | * @retval interface status (MANDATORY: return 0 -> no Error) 1331 | * 1332 | */ 1333 | int32_t sths34pf80_int_mode_get(stmdev_ctx_t *ctx, sths34pf80_int_mode_t *val) { 1334 | sths34pf80_ctrl3_t ctrl3; 1335 | int32_t ret; 1336 | 1337 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1338 | 1339 | switch (ctrl3.pp_od) { 1340 | case STHS34PF80_PUSH_PULL: 1341 | val->pin = STHS34PF80_PUSH_PULL; 1342 | break; 1343 | 1344 | case STHS34PF80_OPEN_DRAIN: 1345 | val->pin = STHS34PF80_OPEN_DRAIN; 1346 | break; 1347 | 1348 | default: 1349 | val->pin = STHS34PF80_PUSH_PULL; 1350 | break; 1351 | } 1352 | 1353 | switch (ctrl3.int_h_l) { 1354 | case STHS34PF80_ACTIVE_HIGH: 1355 | val->polarity = STHS34PF80_ACTIVE_HIGH; 1356 | break; 1357 | 1358 | case STHS34PF80_ACTIVE_LOW: 1359 | val->polarity = STHS34PF80_ACTIVE_LOW; 1360 | break; 1361 | 1362 | default: 1363 | val->polarity = STHS34PF80_ACTIVE_HIGH; 1364 | break; 1365 | } 1366 | 1367 | return ret; 1368 | } 1369 | 1370 | /** 1371 | * @brief DRDY mode.[set] 1372 | * 1373 | * @param ctx read / write interface definitions 1374 | * @param val DRDY_PULSED, DRDY_LATCHED, 1375 | * @retval interface status (MANDATORY: return 0 -> no Error) 1376 | * 1377 | */ 1378 | int32_t sths34pf80_drdy_mode_set(stmdev_ctx_t *ctx, sths34pf80_drdy_mode_t val) { 1379 | sths34pf80_ctrl3_t ctrl3; 1380 | int32_t ret; 1381 | 1382 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1383 | 1384 | if (ret == 0) { 1385 | ctrl3.int_latched = (uint8_t)val; 1386 | ret = sths34pf80_write_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1387 | } 1388 | 1389 | return ret; 1390 | } 1391 | 1392 | /** 1393 | * @brief DRDY mode.[get] 1394 | * 1395 | * @param ctx read / write interface definitions 1396 | * @param val DRDY_PULSED, DRDY_LATCHED, 1397 | * @retval interface status (MANDATORY: return 0 -> no Error) 1398 | * 1399 | */ 1400 | int32_t sths34pf80_drdy_mode_get(stmdev_ctx_t *ctx, sths34pf80_drdy_mode_t *val) { 1401 | sths34pf80_ctrl3_t ctrl3; 1402 | int32_t ret; 1403 | 1404 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL3, (uint8_t *)&ctrl3, 1); 1405 | 1406 | switch (ctrl3.int_latched) { 1407 | case STHS34PF80_DRDY_PULSED: 1408 | *val = STHS34PF80_DRDY_PULSED; 1409 | break; 1410 | 1411 | case STHS34PF80_DRDY_LATCHED: 1412 | *val = STHS34PF80_DRDY_LATCHED; 1413 | break; 1414 | 1415 | default: 1416 | *val = STHS34PF80_DRDY_PULSED; 1417 | break; 1418 | } 1419 | return ret; 1420 | } 1421 | 1422 | /** 1423 | * @} 1424 | * 1425 | */ 1426 | 1427 | /** 1428 | * @defgroup Embedded 1429 | * @brief Embedded 1430 | * @{/ 1431 | * 1432 | */ 1433 | /** 1434 | * @brief Function Configuration write 1435 | * 1436 | * @param ctx read / write interface definitions 1437 | * @param addr embedded register address 1438 | * @param data embedded register data 1439 | * @param len embedded register data len 1440 | * @retval interface status (MANDATORY: return 0 -> no Error) 1441 | * 1442 | */ 1443 | int32_t sths34pf80_func_cfg_write(stmdev_ctx_t *ctx, uint8_t addr, uint8_t *data, uint8_t len) { 1444 | sths34pf80_ctrl1_t ctrl1; 1445 | uint8_t odr; 1446 | sths34pf80_page_rw_t page_rw = {0}; 1447 | int32_t ret; 1448 | uint8_t i; 1449 | 1450 | /* Save current odr and enter PD mode */ 1451 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1452 | odr = ctrl1.odr; 1453 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1454 | 1455 | /* Enable access to embedded functions register */ 1456 | ret += sths34pf80_mem_bank_set(ctx, STHS34PF80_EMBED_FUNC_MEM_BANK); 1457 | 1458 | /* Enable write mode */ 1459 | page_rw.func_cfg_write = 1; 1460 | ret += sths34pf80_write_reg(ctx, STHS34PF80_PAGE_RW, (uint8_t *)&page_rw, 1); 1461 | 1462 | /* Select register address (it will autoincrement when writing) */ 1463 | ret += sths34pf80_write_reg(ctx, STHS34PF80_FUNC_CFG_ADDR, &addr, 1); 1464 | 1465 | for (i = 0; i < len; i++) { 1466 | /* Write data */ 1467 | ret += sths34pf80_write_reg(ctx, STHS34PF80_FUNC_CFG_DATA, &data[i], 1); 1468 | } 1469 | 1470 | /* Disable write mode */ 1471 | page_rw.func_cfg_write = 0; 1472 | ret += sths34pf80_write_reg(ctx, STHS34PF80_PAGE_RW, (uint8_t *)&page_rw, 1); 1473 | 1474 | /* Disable access to embedded functions register */ 1475 | ret += sths34pf80_mem_bank_set(ctx, STHS34PF80_MAIN_MEM_BANK); 1476 | 1477 | /* Set saved odr back */ 1478 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1479 | 1480 | return ret; 1481 | } 1482 | 1483 | /** 1484 | * @brief Function Configuration read 1485 | * 1486 | * @param ctx read / write interface definitions 1487 | * @param addr embedded register address 1488 | * @param data embedded register data 1489 | * @param len embedded register data len 1490 | * @retval interface status (MANDATORY: return 0 -> no Error) 1491 | * 1492 | */ 1493 | int32_t sths34pf80_func_cfg_read(stmdev_ctx_t *ctx, uint8_t addr, uint8_t *data, uint8_t len) { 1494 | sths34pf80_ctrl1_t ctrl1; 1495 | uint8_t odr; 1496 | uint8_t reg_addr; 1497 | sths34pf80_page_rw_t page_rw = {0}; 1498 | int32_t ret; 1499 | uint8_t i; 1500 | 1501 | /* Save current odr and enter PD mode */ 1502 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1503 | odr = ctrl1.odr; 1504 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1505 | 1506 | /* Enable access to embedded functions register */ 1507 | ret += sths34pf80_mem_bank_set(ctx, STHS34PF80_EMBED_FUNC_MEM_BANK); 1508 | 1509 | /* Enable read mode */ 1510 | page_rw.func_cfg_read = 1; 1511 | ret += sths34pf80_write_reg(ctx, STHS34PF80_PAGE_RW, (uint8_t *)&page_rw, 1); 1512 | 1513 | for (i = 0; i < len; i++) { 1514 | /* Select register address */ 1515 | reg_addr = addr + i; 1516 | ret += sths34pf80_write_reg(ctx, STHS34PF80_FUNC_CFG_ADDR, ®_addr, 1); 1517 | 1518 | /* Read data */ 1519 | ret += sths34pf80_read_reg(ctx, STHS34PF80_FUNC_CFG_DATA, &data[i], 1); 1520 | } 1521 | 1522 | /* Disable read mode */ 1523 | page_rw.func_cfg_read = 0; 1524 | ret += sths34pf80_write_reg(ctx, STHS34PF80_PAGE_RW, (uint8_t *)&page_rw, 1); 1525 | 1526 | /* Disable access to embedded functions register */ 1527 | ret += sths34pf80_mem_bank_set(ctx, STHS34PF80_MAIN_MEM_BANK); 1528 | 1529 | /* Set saved odr back */ 1530 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1531 | 1532 | return ret; 1533 | } 1534 | 1535 | /** 1536 | * @brief Presence threshold.[set] 1537 | * 1538 | * @param ctx read / write interface definitions 1539 | * @param val presence threshold level 1540 | * @retval interface status (MANDATORY: return 0 -> no Error) 1541 | * 1542 | */ 1543 | int32_t sths34pf80_presence_threshold_set(stmdev_ctx_t *ctx, uint16_t val) { 1544 | sths34pf80_ctrl1_t ctrl1; 1545 | uint8_t odr; 1546 | uint8_t buff[2]; 1547 | int32_t ret; 1548 | 1549 | if ((val & 0x8000U) != 0x0U) { 1550 | /* threshold values are on 15 bits */ 1551 | return -1; 1552 | } 1553 | 1554 | /* Save current odr and enter PD mode */ 1555 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1556 | odr = ctrl1.odr; 1557 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1558 | 1559 | buff[1] = (uint8_t)(val / 256U); 1560 | buff[0] = (uint8_t)(val - (buff[1] * 256U)); 1561 | ret += sths34pf80_func_cfg_write(ctx, STHS34PF80_PRESENCE_THS, &buff[0], 2); 1562 | 1563 | ret += sths34pf80_algo_reset(ctx); 1564 | 1565 | /* Set saved odr back */ 1566 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1567 | 1568 | return ret; 1569 | } 1570 | 1571 | /** 1572 | * @brief Presence threshold.[get] 1573 | * 1574 | * @param ctx read / write interface definitions 1575 | * @param val presence threshold level 1576 | * @retval interface status (MANDATORY: return 0 -> no Error) 1577 | * 1578 | */ 1579 | int32_t sths34pf80_presence_threshold_get(stmdev_ctx_t *ctx, uint16_t *val) { 1580 | uint8_t buff[2]; 1581 | int32_t ret; 1582 | 1583 | ret = sths34pf80_func_cfg_read(ctx, STHS34PF80_PRESENCE_THS, &buff[0], 2); 1584 | 1585 | *val = buff[1]; 1586 | *val = (*val * 256U) + buff[0]; 1587 | 1588 | return ret; 1589 | } 1590 | 1591 | /** 1592 | * @brief Motion threshold.[set] 1593 | * 1594 | * @param ctx read / write interface definitions 1595 | * @param val motion threshold level 1596 | * @retval interface status (MANDATORY: return 0 -> no Error) 1597 | * 1598 | */ 1599 | int32_t sths34pf80_motion_threshold_set(stmdev_ctx_t *ctx, uint16_t val) { 1600 | sths34pf80_ctrl1_t ctrl1; 1601 | uint8_t odr; 1602 | uint8_t buff[2]; 1603 | int32_t ret; 1604 | 1605 | if ((val & 0x8000U) != 0x0U) { 1606 | /* threshold values are on 15 bits */ 1607 | return -1; 1608 | } 1609 | 1610 | /* Save current odr and enter PD mode */ 1611 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1612 | odr = ctrl1.odr; 1613 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1614 | 1615 | buff[1] = (uint8_t)(val / 256U); 1616 | buff[0] = (uint8_t)(val - (buff[1] * 256U)); 1617 | ret += sths34pf80_func_cfg_write(ctx, STHS34PF80_MOTION_THS, &buff[0], 2); 1618 | 1619 | ret += sths34pf80_algo_reset(ctx); 1620 | 1621 | /* Set saved odr back */ 1622 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1623 | 1624 | return ret; 1625 | } 1626 | /** 1627 | * @brief Motion threshold.[get] 1628 | * 1629 | * @param ctx read / write interface definitions 1630 | * @param val motion threshold level 1631 | * @retval interface status (MANDATORY: return 0 -> no Error) 1632 | * 1633 | */ 1634 | int32_t sths34pf80_motion_threshold_get(stmdev_ctx_t *ctx, uint16_t *val) { 1635 | uint8_t buff[2]; 1636 | int32_t ret; 1637 | 1638 | ret = sths34pf80_func_cfg_read(ctx, STHS34PF80_MOTION_THS, &buff[0], 2); 1639 | 1640 | *val = buff[1]; 1641 | *val = (*val * 256U) + buff[0]; 1642 | 1643 | return ret; 1644 | } 1645 | 1646 | /** 1647 | * @brief Tambient shock threshold.[set] 1648 | * 1649 | * @param ctx read / write interface definitions 1650 | * @param val Tambient shock threshold level 1651 | * @retval interface status (MANDATORY: return 0 -> no Error) 1652 | * 1653 | */ 1654 | int32_t sths34pf80_tambient_shock_threshold_set(stmdev_ctx_t *ctx, uint16_t val) { 1655 | sths34pf80_ctrl1_t ctrl1; 1656 | uint8_t odr; 1657 | uint8_t buff[2]; 1658 | int32_t ret; 1659 | 1660 | if ((val & 0x8000U) != 0x0U) { 1661 | /* threshold values are on 15 bits */ 1662 | return -1; 1663 | } 1664 | 1665 | /* Save current odr and enter PD mode */ 1666 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1667 | odr = ctrl1.odr; 1668 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1669 | 1670 | buff[1] = (uint8_t)(val / 256U); 1671 | buff[0] = (uint8_t)(val - (buff[1] * 256U)); 1672 | ret += sths34pf80_func_cfg_write(ctx, STHS34PF80_TAMB_SHOCK_THS, &buff[0], 2); 1673 | 1674 | ret += sths34pf80_algo_reset(ctx); 1675 | 1676 | /* Set saved odr back */ 1677 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1678 | 1679 | return ret; 1680 | } 1681 | 1682 | /** 1683 | * @brief Tambient shock threshold.[get] 1684 | * 1685 | * @param ctx read / write interface definitions 1686 | * @param val Tambient shock threshold level 1687 | * @retval interface status (MANDATORY: return 0 -> no Error) 1688 | * 1689 | */ 1690 | int32_t sths34pf80_tambient_shock_threshold_get(stmdev_ctx_t *ctx, uint16_t *val) { 1691 | uint8_t buff[2]; 1692 | int32_t ret; 1693 | 1694 | ret = sths34pf80_func_cfg_read(ctx, STHS34PF80_TAMB_SHOCK_THS, &buff[0], 2); 1695 | 1696 | *val = buff[1]; 1697 | *val = (*val * 256U) + buff[0]; 1698 | 1699 | return ret; 1700 | } 1701 | 1702 | /** 1703 | * @brief Motion hysteresis threshold.[set] 1704 | * 1705 | * @param ctx read / write interface definitions 1706 | * @param val Motion hysteresis value 1707 | * @retval interface status (MANDATORY: return 0 -> no Error) 1708 | * 1709 | */ 1710 | int32_t sths34pf80_motion_hysteresis_set(stmdev_ctx_t *ctx, uint8_t val) { 1711 | sths34pf80_ctrl1_t ctrl1; 1712 | uint8_t odr; 1713 | int32_t ret; 1714 | 1715 | /* Save current odr and enter PD mode */ 1716 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1717 | odr = ctrl1.odr; 1718 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1719 | 1720 | ret += sths34pf80_func_cfg_write(ctx, STHS34PF80_HYST_MOTION, &val, 1); 1721 | 1722 | ret += sths34pf80_algo_reset(ctx); 1723 | 1724 | /* Set saved odr back */ 1725 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1726 | 1727 | return ret; 1728 | } 1729 | 1730 | /** 1731 | * @brief Motion hysteresis threshold.[get] 1732 | * 1733 | * @param ctx read / write interface definitions 1734 | * @param val Motion hysteresis value 1735 | * @retval interface status (MANDATORY: return 0 -> no Error) 1736 | * 1737 | */ 1738 | int32_t sths34pf80_motion_hysteresis_get(stmdev_ctx_t *ctx, uint8_t *val) { 1739 | int32_t ret; 1740 | 1741 | ret = sths34pf80_func_cfg_read(ctx, STHS34PF80_HYST_MOTION, val, 1); 1742 | 1743 | return ret; 1744 | } 1745 | 1746 | /** 1747 | * @brief Presence hysteresis.[set] 1748 | * 1749 | * @param ctx read / write interface definitions 1750 | * @param val Presence hysteresis value 1751 | * @retval interface status (MANDATORY: return 0 -> no Error) 1752 | * 1753 | */ 1754 | int32_t sths34pf80_presence_hysteresis_set(stmdev_ctx_t *ctx, uint8_t val) { 1755 | sths34pf80_ctrl1_t ctrl1; 1756 | uint8_t odr; 1757 | int32_t ret; 1758 | 1759 | /* Save current odr and enter PD mode */ 1760 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1761 | odr = ctrl1.odr; 1762 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1763 | 1764 | ret += sths34pf80_func_cfg_write(ctx, STHS34PF80_HYST_PRESENCE, &val, 1); 1765 | 1766 | ret += sths34pf80_algo_reset(ctx); 1767 | 1768 | /* Set saved odr back */ 1769 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1770 | 1771 | return ret; 1772 | } 1773 | 1774 | /** 1775 | * @brief Presence hysteresis.[get] 1776 | * 1777 | * @param ctx read / write interface definitions 1778 | * @param val Presence hysteresis value 1779 | * @retval interface status (MANDATORY: return 0 -> no Error) 1780 | * 1781 | */ 1782 | int32_t sths34pf80_presence_hysteresis_get(stmdev_ctx_t *ctx, uint8_t *val) { 1783 | int32_t ret; 1784 | 1785 | ret = sths34pf80_func_cfg_read(ctx, STHS34PF80_HYST_PRESENCE, val, 1); 1786 | 1787 | return ret; 1788 | } 1789 | 1790 | /** 1791 | * @brief Tambient shock hysteresis.[set] 1792 | * 1793 | * @param ctx read / write interface definitions 1794 | * @param val Tambient shock hysteresis value 1795 | * @retval interface status (MANDATORY: return 0 -> no Error) 1796 | * 1797 | */ 1798 | int32_t sths34pf80_tambient_shock_hysteresis_set(stmdev_ctx_t *ctx, uint8_t val) { 1799 | sths34pf80_ctrl1_t ctrl1; 1800 | uint8_t odr; 1801 | int32_t ret; 1802 | 1803 | /* Save current odr and enter PD mode */ 1804 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1805 | odr = ctrl1.odr; 1806 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1807 | 1808 | ret += sths34pf80_func_cfg_write(ctx, STHS34PF80_HYST_TAMB_SHOCK, &val, 1); 1809 | 1810 | ret += sths34pf80_algo_reset(ctx); 1811 | 1812 | /* Set saved odr back */ 1813 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1814 | 1815 | return ret; 1816 | } 1817 | 1818 | /** 1819 | * @brief Tambient shock hysteresis.[get] 1820 | * 1821 | * @param ctx read / write interface definitions 1822 | * @param val Tambient shock hysteresis value 1823 | * @retval interface status (MANDATORY: return 0 -> no Error) 1824 | * 1825 | */ 1826 | int32_t sths34pf80_tambient_shock_hysteresis_get(stmdev_ctx_t *ctx, uint8_t *val) { 1827 | int32_t ret; 1828 | 1829 | ret = sths34pf80_func_cfg_read(ctx, STHS34PF80_HYST_TAMB_SHOCK, val, 1); 1830 | 1831 | return ret; 1832 | } 1833 | 1834 | typedef struct { 1835 | uint8_t int_pulsed : 1; 1836 | uint8_t comp_type : 1; 1837 | uint8_t sel_abs : 1; 1838 | } sths34pf80_algo_config_t; 1839 | 1840 | /** 1841 | * @brief Algo configuration.[set] 1842 | * 1843 | * @param ctx read / write interface definitions 1844 | * @param val Algo configuration structure 1845 | * @retval interface status (MANDATORY: return 0 -> no Error) 1846 | * 1847 | */ 1848 | static int32_t sths34pf80_algo_config_set(stmdev_ctx_t *ctx, sths34pf80_algo_config_t val) { 1849 | uint8_t tmp; 1850 | int32_t ret; 1851 | 1852 | tmp = (val.int_pulsed << 3) | (val.comp_type << 2) | (val.sel_abs << 1); 1853 | ret = sths34pf80_func_cfg_write(ctx, STHS34PF80_ALGO_CONFIG, &tmp, 1); 1854 | 1855 | return ret; 1856 | } 1857 | 1858 | /** 1859 | * @brief Algo configuration.[get] 1860 | * 1861 | * @param ctx read / write interface definitions 1862 | * @param val Algo configuration structure 1863 | * @retval interface status (MANDATORY: return 0 -> no Error) 1864 | * 1865 | */ 1866 | static int32_t sths34pf80_algo_config_get(stmdev_ctx_t *ctx, sths34pf80_algo_config_t *val) { 1867 | uint8_t tmp; 1868 | int32_t ret; 1869 | 1870 | ret = sths34pf80_func_cfg_read(ctx, STHS34PF80_ALGO_CONFIG, &tmp, 1); 1871 | val->sel_abs = (tmp >> 1) & 0x1U; 1872 | val->comp_type = (tmp >> 2) & 0x1U; 1873 | val->int_pulsed = (tmp >> 3) & 0x1U; 1874 | 1875 | return ret; 1876 | } 1877 | 1878 | /** 1879 | * @brief Tobject compensation.[set] 1880 | * 1881 | * @param ctx read / write interface definitions 1882 | * @param val Ambient compensation for object temperature (0, 1) 1883 | * @retval interface status (MANDATORY: return 0 -> no Error) 1884 | * 1885 | */ 1886 | int32_t sths34pf80_tobject_algo_compensation_set(stmdev_ctx_t *ctx, uint8_t val) { 1887 | sths34pf80_ctrl1_t ctrl1; 1888 | uint8_t odr; 1889 | sths34pf80_algo_config_t config; 1890 | int32_t ret; 1891 | 1892 | /* Save current odr and enter PD mode */ 1893 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1894 | odr = ctrl1.odr; 1895 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1896 | if (ret != 0) { 1897 | return ret; 1898 | } 1899 | 1900 | ret = sths34pf80_algo_config_get(ctx, &config); 1901 | config.comp_type = val; 1902 | ret += sths34pf80_algo_config_set(ctx, config); 1903 | ret += sths34pf80_algo_reset(ctx); 1904 | 1905 | /* Set saved odr back */ 1906 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1907 | 1908 | return ret; 1909 | } 1910 | 1911 | /** 1912 | * @brief Tobject compensation.[get] 1913 | * 1914 | * @param ctx read / write interface definitions 1915 | * @param val Ambient compensation for object temperature (0, 1) 1916 | * @retval interface status (MANDATORY: return 0 -> no Error) 1917 | * 1918 | */ 1919 | int32_t sths34pf80_tobject_algo_compensation_get(stmdev_ctx_t *ctx, uint8_t *val) { 1920 | sths34pf80_algo_config_t config; 1921 | int32_t ret; 1922 | 1923 | ret = sths34pf80_algo_config_get(ctx, &config); 1924 | *val = config.comp_type; 1925 | 1926 | return ret; 1927 | } 1928 | 1929 | /** 1930 | * @brief presence absolute value.[set] 1931 | * 1932 | * @param ctx read / write interface definitions 1933 | * @param val Presence absolute value (0, 1) 1934 | * @retval interface status (MANDATORY: return 0 -> no Error) 1935 | * 1936 | */ 1937 | int32_t sths34pf80_presence_abs_value_set(stmdev_ctx_t *ctx, uint8_t val) { 1938 | sths34pf80_ctrl1_t ctrl1; 1939 | uint8_t odr; 1940 | sths34pf80_algo_config_t config; 1941 | int32_t ret; 1942 | 1943 | /* Save current odr and enter PD mode */ 1944 | ret = sths34pf80_read_reg(ctx, STHS34PF80_CTRL1, (uint8_t *)&ctrl1, 1); 1945 | odr = ctrl1.odr; 1946 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, 0); 1947 | if (ret != 0) { 1948 | return ret; 1949 | } 1950 | 1951 | ret = sths34pf80_algo_config_get(ctx, &config); 1952 | config.sel_abs = val; 1953 | ret += sths34pf80_algo_config_set(ctx, config); 1954 | ret += sths34pf80_algo_reset(ctx); 1955 | 1956 | /* Set saved odr back */ 1957 | ret += sths34pf80_tmos_odr_check_safe_set(ctx, ctrl1, odr); 1958 | 1959 | return ret; 1960 | } 1961 | 1962 | /** 1963 | * @brief presence absolute value.[get] 1964 | * 1965 | * @param ctx read / write interface definitions 1966 | * @param val Presence absolute value (0, 1) 1967 | * @retval interface status (MANDATORY: return 0 -> no Error) 1968 | * 1969 | */ 1970 | int32_t sths34pf80_presence_abs_value_get(stmdev_ctx_t *ctx, uint8_t *val) { 1971 | sths34pf80_algo_config_t config; 1972 | int32_t ret; 1973 | 1974 | ret = sths34pf80_algo_config_get(ctx, &config); 1975 | *val = config.sel_abs; 1976 | 1977 | return ret; 1978 | } 1979 | 1980 | /** 1981 | * @brief int_or mode.[set] 1982 | * 1983 | * @param ctx read / write interface definitions 1984 | * @param val int_pulsed value (0, 1) 1985 | * @retval interface status (MANDATORY: return 0 -> no Error) 1986 | * 1987 | */ 1988 | int32_t sths34pf80_int_or_pulsed_set(stmdev_ctx_t *ctx, uint8_t val) { 1989 | sths34pf80_algo_config_t config; 1990 | int32_t ret; 1991 | 1992 | ret = sths34pf80_algo_config_get(ctx, &config); 1993 | config.int_pulsed = val; 1994 | ret += sths34pf80_algo_config_set(ctx, config); 1995 | 1996 | return ret; 1997 | } 1998 | 1999 | /** 2000 | * @brief int_or mode.[get] 2001 | * 2002 | * @param ctx read / write interface definitions 2003 | * @param val int_pulsed value (0, 1) 2004 | * @retval interface status (MANDATORY: return 0 -> no Error) 2005 | * 2006 | */ 2007 | int32_t sths34pf80_int_or_pulsed_get(stmdev_ctx_t *ctx, uint8_t *val) { 2008 | sths34pf80_algo_config_t config; 2009 | int32_t ret; 2010 | 2011 | ret = sths34pf80_algo_config_get(ctx, &config); 2012 | *val = config.int_pulsed; 2013 | 2014 | return ret; 2015 | } 2016 | 2017 | /** 2018 | * @brief Reset algo 2019 | * 2020 | * @param ctx read / write interface definitions 2021 | * @param val reset algo structure 2022 | * @retval interface status (MANDATORY: return 0 -> no Error) 2023 | * 2024 | */ 2025 | int32_t sths34pf80_algo_reset(stmdev_ctx_t *ctx) { 2026 | uint8_t tmp; 2027 | int32_t ret; 2028 | 2029 | tmp = 1; 2030 | ret = sths34pf80_func_cfg_write(ctx, STHS34PF80_RESET_ALGO, &tmp, 1); 2031 | 2032 | return ret; 2033 | } 2034 | 2035 | /** 2036 | * @} 2037 | * 2038 | */ 2039 | --------------------------------------------------------------------------------