├── .gitignore ├── CHANGELOG.md ├── CITATION.cff ├── LICENSE ├── Makefile ├── README.md ├── TODO.md ├── doc └── README.md ├── lock_in+pid ├── Makefile ├── controllerhf.so ├── css │ ├── bootstrap.css │ └── style.css ├── doc │ ├── Doxyfile │ ├── Makefile │ └── header.tex ├── fpga.conf ├── fpga │ ├── .Xil │ │ └── red_pitaya_top_propImpl.xdc │ ├── Makefile │ ├── README.md │ ├── archive │ │ ├── fpga_0.93.bit.xz │ │ └── fpga_0.94.bit.xz │ ├── doc │ │ ├── RedPitaya_HDL_memory_map.odt │ │ ├── redpitaya_block.odg │ │ └── redpitaya_block.odt │ ├── ip │ │ └── system_bd.tcl │ ├── red_pitaya_hsi_dram_test.tcl │ ├── red_pitaya_hsi_dts.tcl │ ├── red_pitaya_hsi_fsbl.tcl │ ├── red_pitaya_vivado.tcl │ ├── red_pitaya_vivado_project.tcl │ ├── rtl │ │ ├── axi_master.v │ │ ├── axi_slave.v │ │ ├── axi_wr_fifo.v │ │ ├── lock.v │ │ ├── lock │ │ │ ├── BUFR.v │ │ │ ├── LP_filter.v │ │ │ ├── LP_filter2.v │ │ │ ├── LP_filter3.v │ │ │ ├── aDACdecoder.v │ │ │ ├── abs_val.v │ │ │ ├── data_cos2_ss.dat │ │ │ ├── data_cos3_ss.dat │ │ │ ├── data_cos_ss.dat │ │ │ ├── data_sin2_ss.dat │ │ │ ├── data_sin3_ss.dat │ │ │ ├── data_sin_ss.dat │ │ │ ├── debounce.v │ │ │ ├── gen_mod2.v │ │ │ ├── gen_ramp.v │ │ │ ├── gen_ramp_relock.v │ │ │ ├── jump_control.v │ │ │ ├── lock_ctrl.v │ │ │ ├── lock_pid_block.v │ │ │ ├── mult_dsp_14.v │ │ │ ├── muxer3.v │ │ │ ├── muxer4.v │ │ │ ├── muxer5.v │ │ │ ├── muxer_reg3.v │ │ │ ├── muxer_reg4.v │ │ │ ├── muxer_reg5.v │ │ │ ├── pipe_mult.v │ │ │ ├── sat14.v │ │ │ ├── satprotect.v │ │ │ ├── slope9.v │ │ │ ├── sq_mult.v │ │ │ ├── sum_2N.v │ │ │ ├── sum_2N2.v │ │ │ └── trigger_input.v │ │ ├── pwm.sv │ │ ├── red_pitaya_ams.v │ │ ├── red_pitaya_asg.v │ │ ├── red_pitaya_asg_ch.v │ │ ├── red_pitaya_dfilt1.v │ │ ├── red_pitaya_hk.v │ │ ├── red_pitaya_pid.v │ │ ├── red_pitaya_pid_block.v │ │ ├── red_pitaya_pll.sv │ │ ├── red_pitaya_ps.v │ │ ├── red_pitaya_pwm.sv │ │ ├── red_pitaya_scope.v │ │ └── red_pitaya_top.v │ ├── sdc │ │ └── red_pitaya.xdc │ ├── sdk │ │ ├── red_pitaya.hwdef │ │ └── red_pitaya.sysdef │ ├── sim │ │ ├── Makefile │ │ ├── pwm_tb.gtkw │ │ ├── red_pitaya_pll_tb.gtkw │ │ ├── red_pitaya_pwm_tb.gtkw │ │ └── red_pitaya_scope_tb.gtkw │ └── tbn │ │ ├── axi_master_model.sv │ │ ├── axi_slave_tb.sv │ │ ├── dfilt1_sim_values.txt │ │ ├── pwm_tb.sv │ │ ├── red_pitaya_ams_tb.sv │ │ ├── red_pitaya_asg_tb.sv │ │ ├── red_pitaya_dfilt1_tb.sv │ │ ├── red_pitaya_hk_tb.sv │ │ ├── red_pitaya_pid_tb.sv │ │ ├── red_pitaya_pll_tb.sv │ │ ├── red_pitaya_pwm_tb.sv │ │ ├── red_pitaya_scope_tb.sv │ │ ├── red_pitaya_scope_tb.v │ │ └── sys_bus_model.sv ├── index.html ├── info │ ├── icon.png │ ├── icon_DEBUG.png │ ├── icon_RELOAD.png │ └── info.json ├── js │ ├── jquery.mousewheel.js │ └── js.cookie.min.js ├── py │ ├── data_dump.py │ ├── hugo.py │ ├── lock.py │ ├── osc.py │ ├── osc_get_ch.py │ └── osc_trig.py ├── red_pitaya.bit ├── src │ ├── Makefile │ ├── calib.c │ ├── calib.h │ ├── fpga.c │ ├── fpga.h │ ├── fpga_awg.c │ ├── fpga_awg.h │ ├── fpga_lock.c │ ├── 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