├── .gitignore ├── .travis.yml ├── LICENSE ├── README.md ├── Vagrantfile ├── build ├── boards │ ├── candy │ │ └── settings.sh │ ├── clapper │ │ └── settings.sh │ ├── gale │ │ └── settings.sh │ ├── kip │ │ └── settings.sh │ ├── paine │ │ └── settings.sh │ ├── quawks │ │ └── settings.sh │ ├── squawks │ │ └── settings.sh │ ├── swanky │ │ ├── .config │ │ ├── bootorder │ │ └── settings.sh │ └── wolf │ │ ├── .config │ │ └── settings.sh ├── build_boot_stub.sh ├── build_rom.sh └── util │ ├── extract_blobs.sh │ ├── release.sh │ ├── seabios.sh │ ├── setenv.sh │ └── travis_build.sh ├── flashrom ├── build_flashrom.sh ├── fix.sh └── write-fail.log ├── provision └── setup.sh ├── reference └── links.md ├── upstreaming ├── cherry-pick-wolf.sh ├── notes.md ├── swanky.config ├── swanky.sh ├── upstream-build.sh └── wolf-upstream.sh └── webclient ├── build_webclient.sh ├── client.html ├── client.js ├── start.sh ├── stop.sh └── worker.js /.gitignore: -------------------------------------------------------------------------------- 1 | .vagrant/ 2 | out/ 3 | -------------------------------------------------------------------------------- /.travis.yml: -------------------------------------------------------------------------------- 1 | -language: cpp 2 | sudo: required 3 | dist: trusty 4 | before_install: 5 | - sudo ./provision/setup.sh 6 | script: ./build/util/travis_build.sh 7 | after_script: ls -altr out/roms 8 | deploy: 9 | provider: releases 10 | api_key: 11 | secure: Eq2NGdwqsLQ94bW1Nld7YT7LzD58V4A2orjAHFGBFzMBqpG62UlHXPVpOtHgpQmQLdpy2DQw0xFkw9NFnAzjBE+K8xQl5n9P+2czYTiEOnJoW6SA8Oi/tQb3E2YGSgdnACif241HIFij46/c/wMp+6UWsWRtT8b94N3Dg+7sQ7V5TWkfa1MHUVrsRqWR+aejAngoFF3hClAfkRbJp0wj9q4oh0ZtuMfy2kWV3qTFD19tMmW8XtAFzzH252inmTdP9Qk7km9TWOuHPvlpYpPIlu3KlMQxi+1/eKUD+gtAw009HfkPpOMHYOSQcgnjy+v2RUGAApqizSCGB4K6VZkIvVCPOQ7WCYfxzG7new5YJtEkNQ7u6HCDEkUfOef3wyYix8/+Jhukcr85tRnF6U7ssQetf4LGHp908y0xoyascdLpMjMNeaSOGpmD4SHL3TlH+AObP2/TaqP1zo7+oMzUXHnn9YJvCwtanBhMOUu5P/nvMnW26vm4+ALC9WH+paFwFoz/IdNjdP5lhs542824YOuZoip/RuTT+8E67ZdddS6BVeKO2WduDBd7KIsYdNmIK2zpUB+ua0FptCvJYeYXrAw9lujee2Gzm+Wbv17IFa6+/bgW/Pzsg/0eFCO12iMc3jl6dCw0+5gfd9qS2veH9npdkPgiaUzplTdxZCCznJk= 12 | file_glob: true 13 | file: out/roms/*.rom 14 | skip_cleanup: true 15 | on: 16 | tags: true 17 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | The MIT License (MIT) 2 | 3 | Copyright (c) 2015 Marcos Scriven 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | 23 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # chromebook-coreboot [![Build Status](https://travis-ci.org/marcosscriven/chromebook-coreboot.svg?branch=master)](https://travis-ci.org/marcosscriven/chromebook-coreboot) 2 | 3 | A reproducible build for custom Chromebook ROMs (and BOOT_STUBs) with a SeaBIOS payload, built from Google's Coreboot fork. 4 | This is useful if you want to install and boot a regular Linux OS rather than ChromeOS 5 | 6 | ## Build using Vagrant 7 | 8 | * vagrant up 9 | * vagrant ssh 10 | * Either: /vagrant/build/build_rom.sh \ 11 | * Or: /vagrant/build/build_boot_stub.sh \ 12 | 13 | A few minutes later you will have a newly built ROM in roms/\.rom, or roms/\.bootstub.rom in the case of a BOOT_STUB. 14 | 15 | ## Build locally 16 | 17 | The build script will work fine in a regular Linux context - the point of Vagrant is to give you known versions of build tools, and a cross-platform build. (Ubuntu Trusty for instance packages GCC 4.8 - I think there's some errors if you try to compile with a newer GCC). 18 | 19 | ## Bay Trail 20 | 21 | The resultant ROMs don't seem to work on Bay Trail Chromebooks. 22 | Therefore you're better off for the moment using BOOT_STUBs for the following: 23 | 24 | * candy 25 | * clapper 26 | * kip 27 | * paine 28 | * quawks 29 | * squawks 30 | * swanky 31 | -------------------------------------------------------------------------------- /Vagrantfile: -------------------------------------------------------------------------------- 1 | Vagrant.configure(2) do |config| 2 | config.vm.box = "ubuntu/trusty64" 3 | config.vm.provider "virtualbox" do |vb| 4 | vb.customize ["modifyvm", :id, "--ioapic", "on"] 5 | vb.memory = "4096" 6 | vb.cpus = "8" 7 | end 8 | config.vm.provision :shell, path: "provision/setup.sh" 9 | end 10 | -------------------------------------------------------------------------------- /build/boards/candy/settings.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | NAME="Dell Chromebook 11 (3120)" 3 | SHELLBALL=https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_7520.63.0_candy_recovery_stable-channel_mp.bin.zip 4 | -------------------------------------------------------------------------------- /build/boards/clapper/settings.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | NAME="Lenovo N20 Chromebook" 3 | SHELLBALL=https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_7520.63.0_clapper_recovery_stable-channel_mp.bin.zip 4 | -------------------------------------------------------------------------------- /build/boards/gale/settings.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | NAME="Google Wifi" 3 | SHELLBALL=https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_9334.41.3_gale_recovery_stable-channel_mp.bin.zip 4 | 5 | -------------------------------------------------------------------------------- /build/boards/kip/settings.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | NAME="HP Chromebook 11 2100-2299 / HP Chromebook 11 G3/G4" 3 | SHELLBALL=https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_7520.63.0_kip_recovery_stable-channel_mp-v2.bin.zip 4 | -------------------------------------------------------------------------------- /build/boards/paine/settings.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | NAME="Acer C740 Chromebook" 3 | SHELLBALL=https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_7520.63.0_auron-paine_recovery_stable-channel_paine-mp.bin.zip 4 | -------------------------------------------------------------------------------- /build/boards/quawks/settings.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | NAME="Asus Chromebook C300" 3 | SHELLBALL=https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_7520.63.0_quawks_recovery_stable-channel_mp-v2.bin.zip 4 | -------------------------------------------------------------------------------- /build/boards/squawks/settings.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | NAME="Asus Chromebook C200" 3 | SHELLBALL=https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_7520.63.0_squawks_recovery_stable-channel_mp.bin.zip 4 | -------------------------------------------------------------------------------- /build/boards/swanky/.config: -------------------------------------------------------------------------------- 1 | # 2 | # Automatically generated make config: don't edit 3 | # coreboot version: 13a7e0d-dirty 4 | # Mon Feb 22 21:44:11 2016 5 | # 6 | 7 | # 8 | # General setup 9 | # 10 | # CONFIG_EXPERT is not set 11 | CONFIG_LOCALVERSION="" 12 | CONFIG_CBFS_PREFIX="fallback" 13 | CONFIG_ALT_CBFS_LOAD_PAYLOAD=y 14 | CONFIG_COMPILER_GCC=y 15 | # CONFIG_COMPILER_LLVM_CLANG is not set 16 | # CONFIG_SCANBUILD_ENABLE is not set 17 | # CONFIG_CCACHE is not set 18 | # CONFIG_USE_OPTION_TABLE is not set 19 | CONFIG_COMPRESS_RAMSTAGE=y 20 | CONFIG_INCLUDE_CONFIG_FILE=y 21 | # CONFIG_EARLY_CBMEM_INIT is not set 22 | CONFIG_DYNAMIC_CBMEM=y 23 | CONFIG_COLLECT_TIMESTAMPS=y 24 | CONFIG_USE_BLOBS=y 25 | # CONFIG_COVERAGE is not set 26 | 27 | # 28 | # Mainboard 29 | # 30 | # CONFIG_VENDOR_AAEON is not set 31 | # CONFIG_VENDOR_ABIT is not set 32 | # CONFIG_VENDOR_ADVANSUS is not set 33 | # CONFIG_VENDOR_ADVANTECH is not set 34 | # CONFIG_VENDOR_AMD is not set 35 | # CONFIG_VENDOR_AOPEN is not set 36 | # CONFIG_VENDOR_ARIMA is not set 37 | # CONFIG_VENDOR_ARTECGROUP is not set 38 | # CONFIG_VENDOR_ASI is not set 39 | # CONFIG_VENDOR_ASROCK is not set 40 | # CONFIG_VENDOR_ASUS is not set 41 | # CONFIG_VENDOR_A_TREND is not set 42 | # CONFIG_VENDOR_AVALUE is not set 43 | # CONFIG_VENDOR_AXUS is not set 44 | # CONFIG_VENDOR_AZZA is not set 45 | # CONFIG_VENDOR_BACHMANN is not set 46 | # CONFIG_VENDOR_BCOM is not set 47 | # CONFIG_VENDOR_BIFFEROS is not set 48 | # CONFIG_VENDOR_BIOSTAR is not set 49 | # CONFIG_VENDOR_BROADCOM is not set 50 | # CONFIG_VENDOR_COMPAQ is not set 51 | # CONFIG_VENDOR_DIGITALLOGIC is not set 52 | # CONFIG_VENDOR_EAGLELION is not set 53 | # CONFIG_VENDOR_ECS is not set 54 | # CONFIG_VENDOR_EMULATION is not set 55 | # CONFIG_VENDOR_GETAC is not set 56 | # CONFIG_VENDOR_GIGABYTE is not set 57 | CONFIG_VENDOR_GOOGLE=y 58 | # CONFIG_VENDOR_HP is not set 59 | # CONFIG_VENDOR_IBASE is not set 60 | # CONFIG_VENDOR_IBM is not set 61 | # CONFIG_VENDOR_IEI is not set 62 | # CONFIG_VENDOR_INTEL is not set 63 | # CONFIG_VENDOR_IWAVE is not set 64 | # CONFIG_VENDOR_IWILL is not set 65 | # CONFIG_VENDOR_JETWAY is not set 66 | # CONFIG_VENDOR_KONTRON is not set 67 | # CONFIG_VENDOR_LANNER is not set 68 | # CONFIG_VENDOR_LENOVO is not set 69 | # CONFIG_VENDOR_LIPPERT is not set 70 | # CONFIG_VENDOR_MITAC is not set 71 | # CONFIG_VENDOR_MSI is not set 72 | # CONFIG_VENDOR_NEC is not set 73 | # CONFIG_VENDOR_NEWISYS is not set 74 | # CONFIG_VENDOR_NOKIA is not set 75 | # CONFIG_VENDOR_NVIDIA is not set 76 | # CONFIG_VENDOR_PCENGINES is not set 77 | # CONFIG_VENDOR_RCA is not set 78 | # CONFIG_VENDOR_RODA is not set 79 | # CONFIG_VENDOR_SAMSUNG is not set 80 | # CONFIG_VENDOR_SIEMENS is not set 81 | # CONFIG_VENDOR_SOYO is not set 82 | # CONFIG_VENDOR_SUNW is not set 83 | # CONFIG_VENDOR_SUPERMICRO is not set 84 | # CONFIG_VENDOR_TECHNEXION is not set 85 | # CONFIG_VENDOR_TECHNOLOGIC is not set 86 | # CONFIG_VENDOR_TELEVIDEO is not set 87 | # CONFIG_VENDOR_THOMSON is not set 88 | # CONFIG_VENDOR_TRAVERSE is not set 89 | # CONFIG_VENDOR_TYAN is not set 90 | # CONFIG_VENDOR_VIA is not set 91 | # CONFIG_VENDOR_WINENT is not set 92 | # CONFIG_VENDOR_WYSE is not set 93 | CONFIG_BOARD_SPECIFIC_OPTIONS=y 94 | CONFIG_MAINBOARD_DIR="google/swanky" 95 | CONFIG_MAINBOARD_PART_NUMBER="Swanky" 96 | CONFIG_MAINBOARD_VENDOR="GOOGLE" 97 | CONFIG_MAX_CPUS=4 98 | CONFIG_RAMTOP=0x200000 99 | CONFIG_HEAP_SIZE=0x4000 100 | CONFIG_RAMBASE=0x100000 101 | CONFIG_VGA_BIOS_ID="8086,0f31" 102 | CONFIG_STACK_SIZE=0x1000 103 | CONFIG_DRIVERS_PS2_KEYBOARD=y 104 | CONFIG_WARNINGS_ARE_ERRORS=y 105 | # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set 106 | CONFIG_VGA_BIOS=y 107 | # CONFIG_CONSOLE_POST is not set 108 | # CONFIG_UDELAY_IO is not set 109 | CONFIG_DCACHE_RAM_BASE=0xfe000000 110 | CONFIG_DCACHE_RAM_SIZE=0x8000 111 | CONFIG_SERIAL_CPU_INIT=y 112 | CONFIG_ACPI_SSDTX_NUM=0 113 | CONFIG_VGA_BIOS_FILE="../extracts/swanky/blobs/vbios.rom" 114 | # CONFIG_PCI_64BIT_PREF_MEM is not set 115 | CONFIG_MMCONF_BASE_ADDRESS=0xe0000000 116 | CONFIG_VENDOR_SPECIFIC_OPTIONS=y 117 | # CONFIG_BOARD_GOOGLE_BELTINO is not set 118 | # CONFIG_BOARD_GOOGLE_BOLT is not set 119 | # CONFIG_BOARD_GOOGLE_BUTTERFLY is not set 120 | # CONFIG_BOARD_GOOGLE_CLAPPER is not set 121 | # CONFIG_BOARD_GOOGLE_ENGUARDE is not set 122 | # CONFIG_BOARD_GOOGLE_EXPRESSO is not set 123 | # CONFIG_BOARD_GOOGLE_FALCO is not set 124 | # CONFIG_BOARD_GOOGLE_GLIMMER is not set 125 | # CONFIG_BOARD_GOOGLE_GNAWTY is not set 126 | # CONFIG_BOARD_GOOGLE_KIP is not set 127 | # CONFIG_BOARD_GOOGLE_LINK is not set 128 | # CONFIG_BOARD_GOOGLE_NYAN is not set 129 | # CONFIG_BOARD_GOOGLE_PANTHER is not set 130 | # CONFIG_BOARD_GOOGLE_PARROT is not set 131 | # CONFIG_BOARD_GOOGLE_PEPPY is not set 132 | # CONFIG_BOARD_GOOGLE_PIT is not set 133 | # CONFIG_BOARD_GOOGLE_QUAWKS is not set 134 | # CONFIG_BOARD_GOOGLE_RAMBI is not set 135 | # CONFIG_BOARD_GOOGLE_SAMUS is not set 136 | # CONFIG_BOARD_GOOGLE_SLIPPY is not set 137 | # CONFIG_BOARD_GOOGLE_SNOW is not set 138 | # CONFIG_BOARD_GOOGLE_SQUAWKS is not set 139 | # CONFIG_BOARD_GOOGLE_STOUT is not set 140 | CONFIG_BOARD_GOOGLE_SWANKY=y 141 | # CONFIG_BOARD_GOOGLE_WINKY is not set 142 | CONFIG_VBOOT_RAMSTAGE_INDEX=0x2 143 | CONFIG_VBOOT_REFCODE_INDEX=0x3 144 | CONFIG_SPD_CBFS_ADDRESS=0xfffec000 145 | CONFIG_MMCONF_SUPPORT_DEFAULT=y 146 | # CONFIG_POWER_BUTTON_FORCE_ENABLE is not set 147 | CONFIG_LOGICAL_CPUS=y 148 | # CONFIG_IOAPIC is not set 149 | CONFIG_SMP=y 150 | CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 151 | CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 152 | # CONFIG_USBDEBUG is not set 153 | # CONFIG_K8_REV_F_SUPPORT is not set 154 | CONFIG_CPU_ADDR_BITS=36 155 | CONFIG_BOARD_ROMSIZE_KB_8192=y 156 | # CONFIG_COREBOOT_ROMSIZE_KB_64 is not set 157 | # CONFIG_COREBOOT_ROMSIZE_KB_128 is not set 158 | # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set 159 | # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set 160 | # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set 161 | # CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set 162 | # CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set 163 | CONFIG_COREBOOT_ROMSIZE_KB_8192=y 164 | # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set 165 | CONFIG_COREBOOT_ROMSIZE_KB=8192 166 | CONFIG_ROM_SIZE=0x800000 167 | CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" 168 | CONFIG_MAINBOARD_VERSION="1.0" 169 | CONFIG_ARCH_X86=y 170 | # CONFIG_ARCH_ARM is not set 171 | # CONFIG_ARCH_AARCH64 is not set 172 | 173 | # 174 | # Architecture (x86) 175 | # 176 | CONFIG_X86_ARCH_OPTIONS=y 177 | # CONFIG_MARK_GRAPHICS_MEM_WRCOMB is not set 178 | # CONFIG_AP_IN_SIPI_WAIT is not set 179 | # CONFIG_SIPI_VECTOR_IN_ROM is not set 180 | CONFIG_MAX_REBOOT_CNT=3 181 | CONFIG_X86_BOOTBLOCK_SIMPLE=y 182 | # CONFIG_X86_BOOTBLOCK_NORMAL is not set 183 | CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" 184 | # CONFIG_UPDATE_IMAGE is not set 185 | # CONFIG_ROMCC is not set 186 | CONFIG_PC80_SYSTEM=y 187 | # CONFIG_HAVE_CMOS_DEFAULT is not set 188 | CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y 189 | # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set 190 | CONFIG_HPET_ADDRESS=0xfed00000 191 | CONFIG_ID_SECTION_OFFSET=0x80 192 | CONFIG_HAVE_ARCH_MEMSET=y 193 | CONFIG_HAVE_ARCH_MEMCPY=y 194 | CONFIG_HAVE_ARCH_MEMMOVE=y 195 | 196 | # 197 | # Chipset 198 | # 199 | 200 | # 201 | # CPU 202 | # 203 | CONFIG_BOOTBLOCK_CPU_INIT="soc/intel/baytrail/bootblock/bootblock.c" 204 | CONFIG_XIP_ROM_SIZE=0x10000 205 | CONFIG_CPU_SPECIFIC_OPTIONS=y 206 | # CONFIG_CPU_AMD_AGESA is not set 207 | CONFIG_HAVE_INIT_TIMER=y 208 | CONFIG_HIGH_SCRATCH_MEMORY_SIZE=0x0 209 | CONFIG_SMM_TSEG_SIZE=0 210 | CONFIG_MICROCODE_INCLUDE_PATH="src/soc/intel/baytrail" 211 | CONFIG_SMM_RESERVED_SIZE=0x100000 212 | # CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set 213 | CONFIG_SSE2=y 214 | # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set 215 | CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED=y 216 | # CONFIG_UDELAY_LAPIC is not set 217 | CONFIG_UDELAY_TSC=y 218 | CONFIG_TSC_CONSTANT_RATE=y 219 | CONFIG_TSC_MONOTONIC_TIMER=y 220 | # CONFIG_UDELAY_TIMER2 is not set 221 | # CONFIG_TSC_CALIBRATE_WITH_IO is not set 222 | # CONFIG_TSC_SYNC_LFENCE is not set 223 | CONFIG_TSC_SYNC_MFENCE=y 224 | CONFIG_CACHE_ROM=y 225 | CONFIG_SMM_TSEG=y 226 | CONFIG_SMM_MODULES=y 227 | CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 228 | # CONFIG_X86_AMD_FIXED_MTRRS is not set 229 | CONFIG_PARALLEL_MP=y 230 | CONFIG_BACKUP_DEFAULT_SMM_REGION=y 231 | CONFIG_CACHE_AS_RAM=y 232 | CONFIG_AP_SIPI_VECTOR=0xfffff000 233 | CONFIG_CPU_MICROCODE_IN_CBFS=y 234 | CONFIG_CPU_MICROCODE_CBFS_GENERATE=y 235 | # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set 236 | # CONFIG_CPU_MICROCODE_CBFS_NONE is not set 237 | CONFIG_CAR_MIGRATION=y 238 | 239 | # 240 | # Northbridge 241 | # 242 | CONFIG_VIDEO_MB=0 243 | # CONFIG_NORTHBRIDGE_AMD_AGESA is not set 244 | # CONFIG_AMD_NB_CIMX is not set 245 | # CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set 246 | CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x8000 247 | CONFIG_HAVE_MRC=y 248 | CONFIG_MRC_FILE="../extracts/swanky/blobs/mrc.bin" 249 | CONFIG_CBFS_SIZE=0x100000 250 | CONFIG_DCACHE_RAM_ROMSTAGE_STACK_SIZE=0x800 251 | 252 | # 253 | # Southbridge 254 | # 255 | # CONFIG_AMD_SB_CIMX is not set 256 | # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set 257 | # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set 258 | CONFIG_SPI_FLASH=y 259 | CONFIG_SERIRQ_CONTINUOUS_MODE=y 260 | # CONFIG_LOCK_MANAGEMENT_ENGINE is not set 261 | 262 | # 263 | # Super I/O 264 | # 265 | 266 | # 267 | # Embedded Controllers 268 | # 269 | CONFIG_EC_GOOGLE_CHROMEEC=y 270 | # CONFIG_EC_GOOGLE_CHROMEEC_I2C is not set 271 | CONFIG_EC_GOOGLE_CHROMEEC_LPC=y 272 | # CONFIG_EC_GOOGLE_CHROMEEC_SPI is not set 273 | 274 | # 275 | # SoC 276 | # 277 | CONFIG_SOC_INTEL_BAYTRAIL=y 278 | CONFIG_MRC_BIN_ADDRESS=0xfffa0000 279 | # CONFIG_MRC_RMT is not set 280 | CONFIG_CACHE_MRC_SETTINGS=y 281 | CONFIG_MRC_SETTINGS_CACHE_BASE=0xffb00000 282 | CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 283 | CONFIG_ENABLE_BUILTIN_COM1=y 284 | 285 | # 286 | # Devices 287 | # 288 | # CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set 289 | CONFIG_ALWAYS_LOAD_OPROM=y 290 | # CONFIG_MULTIPLE_VGA_ADAPTERS is not set 291 | CONFIG_PCI=y 292 | # CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set 293 | CONFIG_PCIX_PLUGIN_SUPPORT=y 294 | CONFIG_PCIEXP_PLUGIN_SUPPORT=y 295 | CONFIG_AGP_PLUGIN_SUPPORT=y 296 | CONFIG_CARDBUS_PLUGIN_SUPPORT=y 297 | CONFIG_PCIEXP_COMMON_CLOCK=y 298 | CONFIG_PCIEXP_ASPM=y 299 | CONFIG_PCI_BUS_SEGN_BITS=0 300 | 301 | # 302 | # VGA BIOS 303 | # 304 | 305 | # 306 | # PXE ROM 307 | # 308 | # CONFIG_PXE_ROM is not set 309 | CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 310 | CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 311 | 312 | # 313 | # Generic Drivers 314 | # 315 | # CONFIG_ELOG is not set 316 | # CONFIG_DRIVERS_I2C_RTD2132 is not set 317 | # CONFIG_I2C_TPM is not set 318 | # CONFIG_INTEL_DP is not set 319 | # CONFIG_INTEL_DDI is not set 320 | # CONFIG_IPMI_KCS is not set 321 | # CONFIG_DRIVER_MAXIM_MAX77686 is not set 322 | # CONFIG_DRIVERS_OXFORD_OXPCIE is not set 323 | # CONFIG_DRIVER_PARADE_PS8625 is not set 324 | CONFIG_LPC_TPM=y 325 | # CONFIG_RTL8168_ROM_DISABLE is not set 326 | # CONFIG_DRIVERS_SIL_3114 is not set 327 | # CONFIG_SPI_FLASH_SMM is not set 328 | CONFIG_SPI_FLASH_EON=y 329 | CONFIG_SPI_FLASH_MACRONIX=y 330 | CONFIG_SPI_FLASH_SPANSION=y 331 | CONFIG_SPI_FLASH_SST=y 332 | CONFIG_SPI_FLASH_STMICRO=y 333 | CONFIG_SPI_FLASH_WINBOND=y 334 | # CONFIG_SPI_FLASH_NO_FAST_READ is not set 335 | CONFIG_SPI_FLASH_GIGADEVICE=y 336 | # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set 337 | # CONFIG_DRIVER_TI_TPS65090 is not set 338 | CONFIG_TPM=y 339 | CONFIG_MMCONF_SUPPORT=y 340 | 341 | # 342 | # Console 343 | # 344 | CONFIG_EARLY_CONSOLE=y 345 | # CONFIG_CONSOLE_SERIAL is not set 346 | # CONFIG_HAVE_USBDEBUG is not set 347 | # CONFIG_CONSOLE_NE2K is not set 348 | # CONFIG_CONSOLE_CBMEM is not set 349 | CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_8=y 350 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_7 is not set 351 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_6 is not set 352 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_5 is not set 353 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_4 is not set 354 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_3 is not set 355 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_2 is not set 356 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_1 is not set 357 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_0 is not set 358 | CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y 359 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set 360 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set 361 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set 362 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set 363 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set 364 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set 365 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set 366 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set 367 | # CONFIG_NO_POST is not set 368 | # CONFIG_CMOS_POST is not set 369 | # CONFIG_IO_POST is not set 370 | CONFIG_HAVE_UART_IO_MAPPED=y 371 | # CONFIG_HAVE_UART_MEMORY_MAPPED is not set 372 | # CONFIG_HAVE_UART_SPECIAL is not set 373 | CONFIG_HAVE_ACPI_RESUME=y 374 | # CONFIG_HAVE_ACPI_SLIC is not set 375 | CONFIG_HAVE_HARD_RESET=y 376 | CONFIG_HAVE_MONOTONIC_TIMER=y 377 | # CONFIG_TIMER_QUEUE is not set 378 | CONFIG_HAVE_OPTION_TABLE=y 379 | # CONFIG_PIRQ_ROUTE is not set 380 | CONFIG_HAVE_SMI_HANDLER=y 381 | # CONFIG_PCI_IO_CFG_EXT is not set 382 | CONFIG_CACHE_ROM_SIZE=0x100000 383 | # CONFIG_USE_WATCHDOG_ON_BOOT is not set 384 | # CONFIG_VGA is not set 385 | # CONFIG_GFXUMA is not set 386 | CONFIG_RELOCATABLE_MODULES=y 387 | CONFIG_RELOCATABLE_RAMSTAGE=y 388 | CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y 389 | CONFIG_HAVE_REFCODE_BLOB=y 390 | CONFIG_REFCODE_BLOB_FILE="../extracts/swanky/blobs/efi.elf" 391 | CONFIG_HAVE_ACPI_TABLES=y 392 | CONFIG_MAX_PIRQ_LINKS=4 393 | 394 | # 395 | # System tables 396 | # 397 | CONFIG_MULTIBOOT=y 398 | CONFIG_GENERATE_ACPI_TABLES=y 399 | # CONFIG_GENERATE_MP_TABLE is not set 400 | # CONFIG_GENERATE_PIRQ_TABLE is not set 401 | CONFIG_GENERATE_SMBIOS_TABLES=y 402 | 403 | # 404 | # Payload 405 | # 406 | # CONFIG_PAYLOAD_NONE is not set 407 | # CONFIG_PAYLOAD_ELF is not set 408 | CONFIG_PAYLOAD_SEABIOS=y 409 | # CONFIG_PAYLOAD_FILO is not set 410 | # CONFIG_PAYLOAD_TIANOCORE is not set 411 | CONFIG_SEABIOS_STABLE=y 412 | # CONFIG_SEABIOS_MASTER is not set 413 | CONFIG_PAYLOAD_FILE="$(obj)/seabios/out/bios.bin.elf" 414 | # CONFIG_COMPRESSED_PAYLOAD_LZMA is not set 415 | # CONFIG_COMPRESSED_PAYLOAD_NRV2B is not set 416 | 417 | # 418 | # Debugging 419 | # 420 | # CONFIG_GDB_STUB is not set 421 | # CONFIG_DEBUG_CBFS is not set 422 | # CONFIG_HAVE_DEBUG_RAM_SETUP is not set 423 | # CONFIG_HAVE_DEBUG_CAR is not set 424 | # CONFIG_HAVE_DEBUG_SMBUS is not set 425 | # CONFIG_DEBUG_SMI is not set 426 | # CONFIG_DEBUG_SMM_RELOCATION is not set 427 | # CONFIG_DEBUG_MALLOC is not set 428 | # CONFIG_DEBUG_ACPI is not set 429 | # CONFIG_DEBUG_TPM is not set 430 | # CONFIG_DEBUG_SPI_FLASH is not set 431 | # CONFIG_LLSHELL is not set 432 | # CONFIG_TRACE is not set 433 | # CONFIG_RAMINIT_SYSINFO is not set 434 | # CONFIG_ENABLE_APIC_EXT_ID is not set 435 | # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set 436 | # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set 437 | # CONFIG_POWER_BUTTON_FORCE_DISABLE is not set 438 | # CONFIG_POWER_BUTTON_IS_OPTIONAL is not set 439 | CONFIG_REG_SCRIPT=y 440 | CONFIG_CHROMEOS=y 441 | 442 | # 443 | # ChromeOS 444 | # 445 | CONFIG_VBNV_OFFSET=0x26 446 | CONFIG_VBNV_SIZE=0x10 447 | CONFIG_CHROMEOS_RAMOOPS=y 448 | # CONFIG_CHROMEOS_RAMOOPS_DYNAMIC is not set 449 | CONFIG_CHROMEOS_RAMOOPS_RAM_START=0x0 450 | CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE=0x00100000 451 | CONFIG_FLASHMAP_OFFSET=0 452 | # CONFIG_VBOOT_VERIFY_FIRMWARE is not set 453 | CONFIG_EC_SOFTWARE_SYNC=y 454 | CONFIG_VIRTUAL_DEV_SWITCH=y 455 | # CONFIG_NO_TPM_RESUME is not set 456 | -------------------------------------------------------------------------------- /build/boards/swanky/bootorder: -------------------------------------------------------------------------------- 1 | /rom@etc/sdcard0 2 | /rom@etc/sdcard1 3 | /pci@i0cf8/usb@14/usb-*@0 4 | /pci@i0cf8/usb@14/usb-*@1 5 | /pci@i0cf8/usb@14/usb-*@2 6 | /pci@i0cf8/usb@14/usb-*@3 7 | /pci@i0cf8/usb@14/usb-*@4 8 | /pci@i0cf8/usb@14/usb-*@5 9 | /pci@i0cf8/usb@14/usb-*@6 10 | /pci@i0cf8/usb@14/usb-*@7 11 | /pci@i0cf8/usb@14/usb-*@8 12 | /pci@i0cf8/usb@14/usb-*@9 13 | /pci@i0cf8/usb@14/usb-*@a 14 | /pci@i0cf8/usb@14/usb-*@b 15 | /pci@i0cf8/usb@14/usb-*@c 16 | /pci@i0cf8/usb@14/usb-*@d 17 | /pci@i0cf8/usb@14/usb-*@e 18 | /pci@i0cf8/usb@14/usb-*@f 19 | /pci@i0cf8/usb@1d/hub@1/*@0 20 | /pci@i0cf8/usb@1d/hub@1/*@1 21 | /pci@i0cf8/usb@1d/hub@1/*@2 22 | /pci@i0cf8/usb@1d/hub@1/*@3 23 | /pci@i0cf8/usb@1d/hub@1/*@4 24 | /pci@i0cf8/usb@1d/hub@1/*@5 25 | /pci@i0cf8/usb@1d/hub@1/*@6 26 | /pci@i0cf8/usb@1d/hub@1/*@7 27 | /pci@i0cf8/usb@1d/hub@1/*@8 28 | /pci@i0cf8/usb@1d/hub@1/*@9 29 | /pci@i0cf8/usb@1d/hub@1/*@a 30 | /pci@i0cf8/usb@1d/hub@1/*@b 31 | /pci@i0cf8/usb@1d/hub@1/*@c 32 | /pci@i0cf8/usb@1d/hub@1/*@d 33 | /pci@i0cf8/usb@1d/hub@1/*@e 34 | /pci@i0cf8/usb@1d/hub@1/*@f 35 | -------------------------------------------------------------------------------- /build/boards/swanky/settings.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | NAME="Toshiba Chromebook 2" 3 | SHELLBALL=https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_7520.63.0_swanky_recovery_stable-channel_mp.bin.zip 4 | COREBOOT_REF="13a7e0d04327e3634db9ce36b74843476897f0c6" 5 | -------------------------------------------------------------------------------- /build/boards/wolf/.config: -------------------------------------------------------------------------------- 1 | # 2 | # Automatically generated make config: don't edit 3 | # coreboot version: 2b5c5c5 4 | # Sat May 9 20:52:28 2015 5 | # 6 | 7 | # 8 | # General setup 9 | # 10 | # CONFIG_EXPERT is not set 11 | CONFIG_LOCALVERSION="" 12 | CONFIG_CBFS_PREFIX="fallback" 13 | CONFIG_ALT_CBFS_LOAD_PAYLOAD=y 14 | CONFIG_COMPILER_GCC=y 15 | # CONFIG_COMPILER_LLVM_CLANG is not set 16 | # CONFIG_SCANBUILD_ENABLE is not set 17 | # CONFIG_CCACHE is not set 18 | # CONFIG_USE_OPTION_TABLE is not set 19 | CONFIG_COMPRESS_RAMSTAGE=y 20 | CONFIG_INCLUDE_CONFIG_FILE=y 21 | # CONFIG_EARLY_CBMEM_INIT is not set 22 | CONFIG_DYNAMIC_CBMEM=y 23 | # CONFIG_COLLECT_TIMESTAMPS is not set 24 | # CONFIG_USE_BLOBS is not set 25 | # CONFIG_COVERAGE is not set 26 | 27 | # 28 | # Mainboard 29 | # 30 | # CONFIG_VENDOR_AAEON is not set 31 | # CONFIG_VENDOR_ABIT is not set 32 | # CONFIG_VENDOR_ADVANSUS is not set 33 | # CONFIG_VENDOR_ADVANTECH is not set 34 | # CONFIG_VENDOR_AMD is not set 35 | # CONFIG_VENDOR_AOPEN is not set 36 | # CONFIG_VENDOR_ARIMA is not set 37 | # CONFIG_VENDOR_ARTECGROUP is not set 38 | # CONFIG_VENDOR_ASI is not set 39 | # CONFIG_VENDOR_ASROCK is not set 40 | # CONFIG_VENDOR_ASUS is not set 41 | # CONFIG_VENDOR_A_TREND is not set 42 | # CONFIG_VENDOR_AVALUE is not set 43 | # CONFIG_VENDOR_AXUS is not set 44 | # CONFIG_VENDOR_AZZA is not set 45 | # CONFIG_VENDOR_BACHMANN is not set 46 | # CONFIG_VENDOR_BCOM is not set 47 | # CONFIG_VENDOR_BIFFEROS is not set 48 | # CONFIG_VENDOR_BIOSTAR is not set 49 | # CONFIG_VENDOR_BROADCOM is not set 50 | # CONFIG_VENDOR_COMPAQ is not set 51 | # CONFIG_VENDOR_DIGITALLOGIC is not set 52 | # CONFIG_VENDOR_EAGLELION is not set 53 | # CONFIG_VENDOR_ECS is not set 54 | # CONFIG_VENDOR_EMULATION is not set 55 | # CONFIG_VENDOR_GETAC is not set 56 | # CONFIG_VENDOR_GIGABYTE is not set 57 | CONFIG_VENDOR_GOOGLE=y 58 | # CONFIG_VENDOR_HP is not set 59 | # CONFIG_VENDOR_IBASE is not set 60 | # CONFIG_VENDOR_IBM is not set 61 | # CONFIG_VENDOR_IEI is not set 62 | # CONFIG_VENDOR_INTEL is not set 63 | # CONFIG_VENDOR_IWAVE is not set 64 | # CONFIG_VENDOR_IWILL is not set 65 | # CONFIG_VENDOR_JETWAY is not set 66 | # CONFIG_VENDOR_KONTRON is not set 67 | # CONFIG_VENDOR_LANNER is not set 68 | # CONFIG_VENDOR_LENOVO is not set 69 | # CONFIG_VENDOR_LIPPERT is not set 70 | # CONFIG_VENDOR_MITAC is not set 71 | # CONFIG_VENDOR_MSI is not set 72 | # CONFIG_VENDOR_NEC is not set 73 | # CONFIG_VENDOR_NEWISYS is not set 74 | # CONFIG_VENDOR_NOKIA is not set 75 | # CONFIG_VENDOR_NVIDIA is not set 76 | # CONFIG_VENDOR_PCENGINES is not set 77 | # CONFIG_VENDOR_RCA is not set 78 | # CONFIG_VENDOR_RODA is not set 79 | # CONFIG_VENDOR_SAMSUNG is not set 80 | # CONFIG_VENDOR_SIEMENS is not set 81 | # CONFIG_VENDOR_SOYO is not set 82 | # CONFIG_VENDOR_SUNW is not set 83 | # CONFIG_VENDOR_SUPERMICRO is not set 84 | # CONFIG_VENDOR_TECHNEXION is not set 85 | # CONFIG_VENDOR_TECHNOLOGIC is not set 86 | # CONFIG_VENDOR_TELEVIDEO is not set 87 | # CONFIG_VENDOR_THOMSON is not set 88 | # CONFIG_VENDOR_TRAVERSE is not set 89 | # CONFIG_VENDOR_TYAN is not set 90 | # CONFIG_VENDOR_VIA is not set 91 | # CONFIG_VENDOR_WINENT is not set 92 | # CONFIG_VENDOR_WYSE is not set 93 | CONFIG_BOARD_SPECIFIC_OPTIONS=y 94 | CONFIG_MAINBOARD_DIR="google/wolf" 95 | CONFIG_MAINBOARD_PART_NUMBER="Wolf" 96 | CONFIG_IRQ_SLOT_COUNT=18 97 | CONFIG_MAINBOARD_VENDOR="GOOGLE" 98 | CONFIG_MAX_CPUS=8 99 | CONFIG_RAMTOP=0x200000 100 | CONFIG_HEAP_SIZE=0x4000 101 | CONFIG_RAMBASE=0x100000 102 | CONFIG_VGA_BIOS_ID="8086,0a06" 103 | CONFIG_STACK_SIZE=0x1000 104 | CONFIG_DRIVERS_PS2_KEYBOARD=y 105 | CONFIG_WARNINGS_ARE_ERRORS=y 106 | # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set 107 | CONFIG_VGA_BIOS=y 108 | # CONFIG_CONSOLE_POST is not set 109 | # CONFIG_UDELAY_IO is not set 110 | CONFIG_DCACHE_RAM_BASE=0xff7c0000 111 | CONFIG_DCACHE_RAM_SIZE=0x10000 112 | # CONFIG_SERIAL_CPU_INIT is not set 113 | CONFIG_ACPI_SSDTX_NUM=0 114 | CONFIG_VGA_BIOS_FILE="../extracts/wolf/blobs/vbios.rom" 115 | # CONFIG_PCI_64BIT_PREF_MEM is not set 116 | CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 117 | CONFIG_XIP_ROM_SIZE=0x10000 118 | CONFIG_VENDOR_SPECIFIC_OPTIONS=y 119 | # CONFIG_BOARD_GOOGLE_BOLT is not set 120 | # CONFIG_BOARD_GOOGLE_BUTTERFLY is not set 121 | # CONFIG_BOARD_GOOGLE_FALCO is not set 122 | # CONFIG_BOARD_GOOGLE_LINK is not set 123 | # CONFIG_BOARD_GOOGLE_PARROT is not set 124 | # CONFIG_BOARD_GOOGLE_PEPPY is not set 125 | # CONFIG_BOARD_GOOGLE_PIT is not set 126 | # CONFIG_BOARD_GOOGLE_SLIPPY is not set 127 | # CONFIG_BOARD_GOOGLE_SNOW is not set 128 | # CONFIG_BOARD_GOOGLE_STOUT is not set 129 | CONFIG_BOARD_GOOGLE_WOLF=y 130 | CONFIG_VBOOT_RAMSTAGE_INDEX=0x2 131 | CONFIG_MMCONF_SUPPORT_DEFAULT=y 132 | # CONFIG_POWER_BUTTON_FORCE_ENABLE is not set 133 | CONFIG_LOGICAL_CPUS=y 134 | CONFIG_IOAPIC=y 135 | CONFIG_SMP=y 136 | CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 137 | CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 138 | # CONFIG_USBDEBUG is not set 139 | # CONFIG_K8_REV_F_SUPPORT is not set 140 | CONFIG_CPU_ADDR_BITS=32 141 | CONFIG_BOARD_ROMSIZE_KB_8192=y 142 | # CONFIG_COREBOOT_ROMSIZE_KB_64 is not set 143 | # CONFIG_COREBOOT_ROMSIZE_KB_128 is not set 144 | # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set 145 | # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set 146 | # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set 147 | # CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set 148 | # CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set 149 | CONFIG_COREBOOT_ROMSIZE_KB_8192=y 150 | # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set 151 | CONFIG_COREBOOT_ROMSIZE_KB=8192 152 | CONFIG_ROM_SIZE=0x800000 153 | CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" 154 | CONFIG_MAINBOARD_VERSION="1.0" 155 | CONFIG_ARCH_X86=y 156 | # CONFIG_ARCH_ARMV7 is not set 157 | 158 | # 159 | # Architecture (x86) 160 | # 161 | CONFIG_X86_ARCH_OPTIONS=y 162 | CONFIG_MARK_GRAPHICS_MEM_WRCOMB=y 163 | # CONFIG_AP_IN_SIPI_WAIT is not set 164 | # CONFIG_SIPI_VECTOR_IN_ROM is not set 165 | CONFIG_MAX_REBOOT_CNT=3 166 | CONFIG_X86_BOOTBLOCK_SIMPLE=y 167 | # CONFIG_X86_BOOTBLOCK_NORMAL is not set 168 | CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" 169 | # CONFIG_UPDATE_IMAGE is not set 170 | # CONFIG_ROMCC is not set 171 | CONFIG_PC80_SYSTEM=y 172 | CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/haswell/bootblock.c" 173 | # CONFIG_HAVE_CMOS_DEFAULT is not set 174 | CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/lynxpoint/bootblock.c" 175 | CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y 176 | # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set 177 | CONFIG_HPET_ADDRESS=0xfed00000 178 | CONFIG_ID_SECTION_OFFSET=0x80 179 | CONFIG_HAVE_ARCH_MEMSET=y 180 | CONFIG_HAVE_ARCH_MEMCPY=y 181 | CONFIG_HAVE_ARCH_MEMMOVE=y 182 | 183 | # 184 | # Chipset 185 | # 186 | 187 | # 188 | # CPU 189 | # 190 | CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/haswell/bootblock.c" 191 | CONFIG_SOCKET_SPECIFIC_OPTIONS=y 192 | CONFIG_CPU_SPECIFIC_OPTIONS=y 193 | # CONFIG_CPU_AMD_AGESA is not set 194 | CONFIG_HAVE_INIT_TIMER=y 195 | CONFIG_HIGH_SCRATCH_MEMORY_SIZE=0x0 196 | CONFIG_SMM_TSEG_SIZE=0x800000 197 | CONFIG_MICROCODE_INCLUDE_PATH="src/cpu/intel/haswell" 198 | CONFIG_CPU_INTEL_HASWELL=y 199 | CONFIG_IED_REGION_SIZE=0x400000 200 | CONFIG_SMM_RESERVED_SIZE=0x100000 201 | CONFIG_MONOTONIC_TIMER_MSR=y 202 | CONFIG_SSE2=y 203 | CONFIG_CPU_INTEL_SOCKET_RPGA989=y 204 | CONFIG_CACHE_MRC_BIN=y 205 | CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y 206 | CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4 207 | # CONFIG_UDELAY_LAPIC is not set 208 | CONFIG_UDELAY_TSC=y 209 | CONFIG_TSC_CONSTANT_RATE=y 210 | # CONFIG_TSC_MONOTONIC_TIMER is not set 211 | # CONFIG_UDELAY_TIMER2 is not set 212 | # CONFIG_TSC_CALIBRATE_WITH_IO is not set 213 | # CONFIG_TSC_SYNC_LFENCE is not set 214 | CONFIG_TSC_SYNC_MFENCE=y 215 | CONFIG_CACHE_ROM=y 216 | CONFIG_SMM_TSEG=y 217 | CONFIG_SMM_MODULES=y 218 | CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 219 | # CONFIG_X86_AMD_FIXED_MTRRS is not set 220 | CONFIG_CAR_MIGRATION=y 221 | CONFIG_CACHE_AS_RAM=y 222 | CONFIG_AP_SIPI_VECTOR=0xfffff000 223 | CONFIG_MMX=y 224 | CONFIG_SSE=y 225 | CONFIG_CPU_MICROCODE_IN_CBFS=y 226 | CONFIG_CPU_MICROCODE_CBFS_GENERATE=y 227 | # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set 228 | # CONFIG_CPU_MICROCODE_CBFS_NONE is not set 229 | 230 | # 231 | # Northbridge 232 | # 233 | CONFIG_VIDEO_MB=0 234 | # CONFIG_NORTHBRIDGE_AMD_AGESA is not set 235 | # CONFIG_AMD_NB_CIMX is not set 236 | # CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set 237 | CONFIG_CACHE_MRC_SIZE_KB=512 238 | CONFIG_MRC_CACHE_BASE=0xff800000 239 | CONFIG_EXTERNAL_MRC_BLOB=y 240 | CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000 241 | CONFIG_HAVE_MRC=y 242 | CONFIG_MRC_FILE="../extracts/wolf/blobs/mrc.bin" 243 | CONFIG_CBFS_SIZE=0x100000 244 | CONFIG_NORTHBRIDGE_INTEL_HASWELL=y 245 | CONFIG_DCACHE_RAM_ROMSTAGE_STACK_SIZE=0x2000 246 | 247 | # 248 | # Southbridge 249 | # 250 | CONFIG_EHCI_BAR=0xfef00000 251 | CONFIG_EHCI_DEBUG_OFFSET=0xa0 252 | # CONFIG_AMD_SB_CIMX is not set 253 | # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set 254 | # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set 255 | CONFIG_SPI_FLASH=y 256 | CONFIG_SOUTH_BRIDGE_OPTIONS=y 257 | CONFIG_SERIRQ_CONTINUOUS_MODE=y 258 | # CONFIG_LOCK_MANAGEMENT_ENGINE is not set 259 | CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y 260 | CONFIG_INTEL_LYNXPOINT_LP=y 261 | CONFIG_ME_MBP_CLEAR_LATE=y 262 | CONFIG_FINALIZE_USB_ROUTE_XHCI=y 263 | 264 | # 265 | # Super I/O 266 | # 267 | 268 | # 269 | # Embedded Controllers 270 | # 271 | CONFIG_EC_GOOGLE_CHROMEEC=y 272 | # CONFIG_EC_GOOGLE_CHROMEEC_I2C is not set 273 | CONFIG_EC_GOOGLE_CHROMEEC_LPC=y 274 | # CONFIG_EC_GOOGLE_CHROMEEC_SPI is not set 275 | 276 | # 277 | # Devices 278 | # 279 | # CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set 280 | # CONFIG_MULTIPLE_VGA_ADAPTERS is not set 281 | CONFIG_PCI=y 282 | # CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set 283 | CONFIG_PCIX_PLUGIN_SUPPORT=y 284 | CONFIG_PCIEXP_PLUGIN_SUPPORT=y 285 | CONFIG_AGP_PLUGIN_SUPPORT=y 286 | CONFIG_CARDBUS_PLUGIN_SUPPORT=y 287 | CONFIG_PCIEXP_COMMON_CLOCK=y 288 | CONFIG_PCIEXP_ASPM=y 289 | CONFIG_PCI_BUS_SEGN_BITS=0 290 | 291 | # 292 | # VGA BIOS 293 | # 294 | 295 | # 296 | # PXE ROM 297 | # 298 | # CONFIG_PXE_ROM is not set 299 | CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 300 | CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 301 | 302 | # 303 | # Generic Drivers 304 | # 305 | # CONFIG_ELOG is not set 306 | # CONFIG_DRIVERS_I2C_RTD2132 is not set 307 | # CONFIG_INTEL_DP is not set 308 | # CONFIG_INTEL_DDI is not set 309 | # CONFIG_IPMI_KCS is not set 310 | # CONFIG_DRIVER_MAXIM_MAX77686 is not set 311 | # CONFIG_DRIVERS_OXFORD_OXPCIE is not set 312 | # CONFIG_DRIVER_PARADE_PS8625 is not set 313 | CONFIG_TPM=y 314 | # CONFIG_RTL8168_ROM_DISABLE is not set 315 | # CONFIG_DRIVERS_SIL_3114 is not set 316 | # CONFIG_SPI_FLASH_SMM is not set 317 | CONFIG_SPI_FLASH_EON=y 318 | CONFIG_SPI_FLASH_MACRONIX=y 319 | CONFIG_SPI_FLASH_SPANSION=y 320 | CONFIG_SPI_FLASH_SST=y 321 | CONFIG_SPI_FLASH_STMICRO=y 322 | CONFIG_SPI_FLASH_WINBOND=y 323 | # CONFIG_SPI_FLASH_NO_FAST_READ is not set 324 | CONFIG_SPI_FLASH_GIGADEVICE=y 325 | # CONFIG_DRIVER_TI_TPS65090 is not set 326 | CONFIG_MMCONF_SUPPORT=y 327 | 328 | # 329 | # Console 330 | # 331 | CONFIG_EARLY_CONSOLE=y 332 | # CONFIG_CONSOLE_SERIAL is not set 333 | CONFIG_HAVE_USBDEBUG=y 334 | # CONFIG_CONSOLE_NE2K is not set 335 | # CONFIG_CONSOLE_CBMEM is not set 336 | CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_8=y 337 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_7 is not set 338 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_6 is not set 339 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_5 is not set 340 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_4 is not set 341 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_3 is not set 342 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_2 is not set 343 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_1 is not set 344 | # CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_0 is not set 345 | CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y 346 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set 347 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set 348 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set 349 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set 350 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set 351 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set 352 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set 353 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set 354 | # CONFIG_NO_POST is not set 355 | # CONFIG_CMOS_POST is not set 356 | CONFIG_IO_POST=y 357 | CONFIG_IO_POST_PORT=0x80 358 | CONFIG_HAVE_UART_IO_MAPPED=y 359 | # CONFIG_HAVE_UART_MEMORY_MAPPED is not set 360 | # CONFIG_HAVE_UART_SPECIAL is not set 361 | CONFIG_HAVE_ACPI_RESUME=y 362 | # CONFIG_HAVE_ACPI_SLIC is not set 363 | CONFIG_HAVE_HARD_RESET=y 364 | CONFIG_HAVE_MONOTONIC_TIMER=y 365 | # CONFIG_TIMER_QUEUE is not set 366 | CONFIG_HAVE_OPTION_TABLE=y 367 | # CONFIG_PIRQ_ROUTE is not set 368 | CONFIG_HAVE_SMI_HANDLER=y 369 | # CONFIG_PCI_IO_CFG_EXT is not set 370 | CONFIG_CACHE_ROM_SIZE=0x100000 371 | CONFIG_USE_WATCHDOG_ON_BOOT=y 372 | # CONFIG_VGA is not set 373 | # CONFIG_GFXUMA is not set 374 | CONFIG_RELOCATABLE_MODULES=y 375 | # CONFIG_RELOCATABLE_RAMSTAGE is not set 376 | CONFIG_HAVE_ACPI_TABLES=y 377 | CONFIG_MAX_PIRQ_LINKS=4 378 | 379 | # 380 | # System tables 381 | # 382 | CONFIG_MULTIBOOT=y 383 | CONFIG_GENERATE_ACPI_TABLES=y 384 | # CONFIG_GENERATE_MP_TABLE is not set 385 | # CONFIG_GENERATE_PIRQ_TABLE is not set 386 | CONFIG_GENERATE_SMBIOS_TABLES=y 387 | 388 | # 389 | # Payload 390 | # 391 | # CONFIG_PAYLOAD_NONE is not set 392 | # CONFIG_PAYLOAD_ELF is not set 393 | CONFIG_PAYLOAD_SEABIOS=y 394 | # CONFIG_PAYLOAD_FILO is not set 395 | # CONFIG_PAYLOAD_TIANOCORE is not set 396 | CONFIG_SEABIOS_STABLE=y 397 | # CONFIG_SEABIOS_MASTER is not set 398 | CONFIG_PAYLOAD_FILE="$(obj)/seabios/out/bios.bin.elf" 399 | CONFIG_COMPRESSED_PAYLOAD_LZMA=y 400 | # CONFIG_COMPRESSED_PAYLOAD_NRV2B is not set 401 | 402 | # 403 | # Debugging 404 | # 405 | # CONFIG_GDB_STUB is not set 406 | # CONFIG_DEBUG_CBFS is not set 407 | # CONFIG_HAVE_DEBUG_RAM_SETUP is not set 408 | # CONFIG_HAVE_DEBUG_CAR is not set 409 | # CONFIG_HAVE_DEBUG_SMBUS is not set 410 | # CONFIG_DEBUG_SMI is not set 411 | # CONFIG_DEBUG_SMM_RELOCATION is not set 412 | # CONFIG_DEBUG_MALLOC is not set 413 | # CONFIG_DEBUG_ACPI is not set 414 | # CONFIG_DEBUG_TPM is not set 415 | # CONFIG_DEBUG_SPI_FLASH is not set 416 | # CONFIG_LLSHELL is not set 417 | # CONFIG_TRACE is not set 418 | # CONFIG_RAMINIT_SYSINFO is not set 419 | # CONFIG_ENABLE_APIC_EXT_ID is not set 420 | # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set 421 | # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set 422 | # CONFIG_POWER_BUTTON_FORCE_DISABLE is not set 423 | # CONFIG_POWER_BUTTON_IS_OPTIONAL is not set 424 | CONFIG_CHROMEOS=y 425 | 426 | # 427 | # ChromeOS 428 | # 429 | CONFIG_VBNV_OFFSET=0x26 430 | CONFIG_VBNV_SIZE=0x10 431 | CONFIG_CHROMEOS_RAMOOPS=y 432 | CONFIG_CHROMEOS_RAMOOPS_RAM_START=0x00f00000 433 | CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE=0x00100000 434 | CONFIG_FLASHMAP_OFFSET=0 435 | # CONFIG_VBOOT_VERIFY_FIRMWARE is not set 436 | CONFIG_EC_SOFTWARE_SYNC=y 437 | CONFIG_VIRTUAL_DEV_SWITCH=y 438 | # CONFIG_NO_TPM_RESUME is not set 439 | -------------------------------------------------------------------------------- /build/boards/wolf/settings.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | NAME="Dell Chromebook 11" 3 | SHELLBALL=https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_7520.63.0_wolf_recovery_stable-channel_mp.bin.zip 4 | COREBOOT_REF="cef55018e4e936af9a758675353e332df4d9d1a6" 5 | -------------------------------------------------------------------------------- /build/build_boot_stub.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | # Currently Bay Trail (Swanky in particular) not working with custom build. 4 | # Instead building just the BOOT_STUB. 5 | 6 | SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )" 7 | source $SCRIPT_DIR/util/setenv.sh $1 8 | 9 | echo "Building BOOT_STUB for $NAME" 10 | 11 | # Change to build dir 12 | cd $BUILD_DIR 13 | 14 | # Extract the shellball and copy out the bios 15 | $SCRIPT_DIR/util/extract_blobs.sh 16 | rm -rf boot_stub 17 | mkdir boot_stub 18 | cp extracts/$BOARD/extract/bios.bin boot_stub/bios.bin.new 19 | 20 | # Make Seabios 21 | if [ ! -f "$BUILD_DIR/seabios/out/bios.bin.elf" ] ; then 22 | $SCRIPT_DIR/util/seabios.sh 23 | fi 24 | 25 | # Go to patch build dir 26 | cd boot_stub 27 | 28 | # Patch ROM 29 | cbfstool bios.bin.new remove -r BOOT_STUB -n fallback/vboot 30 | cbfstool bios.bin.new remove -r BOOT_STUB -n fallback/payload 31 | cbfstool bios.bin.new add-payload -r BOOT_STUB -n fallback/payload -f ../seabios/out/bios.bin.elf -c lzma 32 | 33 | # TODO Fix cbmem error: jpeg_decode failed with return code 5... 34 | #cbfstool bios.bin.new add -r BOOT_STUB -f bootsplash.jpg -n bootsplash.jpg -t raw 35 | 36 | # List of devices is random. Can optionally prescribe an ordered list 37 | if [ -f "$SCRIPT_DIR/boards/$BOARD/bootorder" ] ; then 38 | cbfstool bios.bin.new add -r BOOT_STUB -n bootorder -f $SCRIPT_DIR/boards/$BOARD/bootorder -t raw 39 | fi 40 | 41 | cbfstool bios.bin.new add-int -r BOOT_STUB -i 0xd091f000 -n etc/sdcard0 42 | cbfstool bios.bin.new add-int -r BOOT_STUB -i 0xd091c000 -n etc/sdcard1 43 | 44 | # Prepare a new image with just the last MB 45 | mkdir -p $ROM_DIR 46 | dd bs=1M skip=7 if=bios.bin.new of=$ROM_DIR/$BOARD.bootstub.rom 47 | 48 | # Sanity check built image 49 | cbfstool $ROM_DIR/$BOARD.bootstub.rom print 50 | 51 | # Done - flash with: 52 | # sudo ./flashrom -w -i BOOT_STUB:bios.cbfs.new 53 | -------------------------------------------------------------------------------- /build/build_rom.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )" 4 | source $SCRIPT_DIR/util/setenv.sh $1 5 | 6 | echo "Building full ROM for $NAME" 7 | 8 | # Change to build dir 9 | cd $BUILD_DIR 10 | 11 | # Clone Google's coreboot - only once as it's large 12 | if [ ! -d "$BUILD_DIR/coreboot" ]; then 13 | git clone https://chromium.googlesource.com/chromiumos/third_party/coreboot 14 | fi 15 | 16 | # Make sure we have a fresh and up to date repo 17 | git -C coreboot reset --hard 18 | git -C coreboot clean -dxf 19 | git -C coreboot checkout $COREBOOT_REF 20 | git -C coreboot fetch 21 | 22 | # Fix the broken SDP generation (otherwise filled with newlines) 23 | grep -l -r "do echo" coreboot/* | while read file; \ 24 | do echo $file; \ 25 | sed -i "s/do echo.*;/do printf \$\$(printf '\\\%o' 0x\$\$c);/" $file; \ 26 | done; 27 | 28 | # Fix odd vboot_api.h error 29 | wget -q -O coreboot/src/include/vboot_api.h https://raw.githubusercontent.com/coreboot/vboot/firmware-swanky-5216.238.B/firmware/include/vboot_api.h 30 | 31 | # Extract the blobs 32 | $SCRIPT_DIR/util/extract_blobs.sh $BOARD 33 | 34 | # Copy the blobs to the expected place 35 | mkdir -p coreboot/3rdparty/mainboard/google/$BOARD/ 36 | mkdir -p coreboot/build/$BOARD/firmware/ 37 | cp extracts/$BOARD/blobs/descriptor.bin coreboot/3rdparty/mainboard/google/$BOARD/descriptor.bin 38 | cp extracts/$BOARD/blobs/me.bin coreboot/3rdparty/mainboard/google/$BOARD/me.bin 39 | 40 | # Add the right config 41 | cp $SCRIPT_DIR/boards/$BOARD/.config coreboot/.config 42 | 43 | # Finally we're ready to make 44 | cd coreboot 45 | make 46 | 47 | # Make ESC the boot menu options 48 | # See https://www.chromium.org/chromium-os/developer-information-for-chrome-os-devices/upstream-coreboot-on-intel-haswell-chromebook 49 | echo -ne "\x01" > boot-menu-key 50 | echo -e "\nPress ESC for boot menu.\n" > boot-menu-message 51 | 52 | # Patch the rom with 'Escape' key and update message to show that 53 | cbfstool build/coreboot.rom add -f boot-menu-key -n etc/boot-menu-key -t raw 54 | cbfstool build/coreboot.rom add -f boot-menu-message -n etc/boot-menu-message -t raw 55 | 56 | # TODO Splash screen 57 | # cbfstool build/coreboot.rom add -f bootsplash.jpg -n bootsplash.jpg -t raw 58 | 59 | echo "Final ROM built for $BOARD:" 60 | cbfstool build/coreboot.rom print 61 | 62 | echo "Copying ROM to working dir." 63 | mkdir -p $ROM_DIR 64 | cp build/coreboot.rom $ROM_DIR/$BOARD.rom 65 | -------------------------------------------------------------------------------- /build/util/extract_blobs.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | mkdir -p extracts 4 | cd extracts 5 | 6 | echo "Extacting blobs for $BOARD" 7 | 8 | extractDir=$BOARD 9 | mkdir -p $extractDir 10 | cd $extractDir 11 | 12 | filename=$(echo $SHELLBALL | rev | cut -d"/" -f1 | rev) 13 | if [ ! -f $filename ]; then 14 | wget -q $SHELLBALL 15 | unzip $filename 16 | fi 17 | 18 | # Mount the image 19 | # http://www.andremiller.net/content/mounting-hard-disk-image-including-partitions-using-linux 20 | 21 | # Get the offset of the ROOT-A image 22 | binImg=${filename%.zip} 23 | offset=$(parted $binImg unit B print | grep ROOT-A | tr -s ' ' | cut -d ' ' -f3 | sed 's/B//') 24 | mountpoint="/mnt/loop" 25 | sudo mkdir -p $mountpoint 26 | sudo mount -o ro,loop,offset=$offset $binImg $mountpoint 27 | 28 | # Extract it 29 | rm -rf extract 30 | mkdir -p extract 31 | sudo $mountpoint/usr/sbin/chromeos-firmwareupdate --sb_extract extract 32 | 33 | # Unmount 34 | sudo umount /mnt/loop 35 | 36 | # Prepare blob dir 37 | rm -rf blobs 38 | mkdir -p blobs 39 | 40 | # Extract SPI Descriptor and Management Engine binary 41 | ifdtool -x extract/bios.bin 42 | mv flashregion_0_flashdescriptor.bin blobs/descriptor.bin 43 | rm flashregion_1_bios.bin 44 | mv flashregion_2_intel_me.bin blobs/me.bin 45 | 46 | # Extract MRC binary 47 | cbfstool extract/bios.bin extract -r BOOT_STUB -n mrc.bin -f blobs/mrc.bin 48 | 49 | # Extract VBIOS binary 50 | vbiosLabel=$(cbfstool extract/bios.bin print -r BOOT_STUB | grep "pci.*\.rom" | cut -d' ' -f1) 51 | cbfstool extract/bios.bin extract -r BOOT_STUB -n $vbiosLabel -f blobs/vbios.rom 52 | 53 | # Extract EFI blob if there 54 | efiLabel=$(cbfstool extract/bios.bin print -r BOOT_STUB 2>/dev/null | grep "refcode" | cut -d' ' -f1) 55 | if [ -n "$efiLabel" ]; then 56 | cbfstool extract/bios.bin extract -r BOOT_STUB -m x86 -n $efiLabel -f blobs/efi.elf 57 | fi 58 | -------------------------------------------------------------------------------- /build/util/release.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | TAG=release-$(date +%s) 4 | 5 | echo "Releasing tag: $TAG" 6 | git tag $TAG 7 | git push origin tag $TAG 8 | -------------------------------------------------------------------------------- /build/util/seabios.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | echo "Building Seabios version:$SEABIOS_VERSION" 4 | 5 | # Clone the SeaBIOS repo 6 | if [ ! -d "$BUILD_DIR/seabios" ]; then 7 | git clone git://git.seabios.org/seabios.git 8 | fi 9 | 10 | # Make sure it's clean 11 | git -C seabios reset --hard 12 | git -C seabios clean -dxf 13 | git -C seabios checkout $SEABIOS_VERSION 14 | 15 | # Set the property that fakes IRQs for us 16 | echo -e 'CONFIG_COREBOOT=y\n# CONFIG_HARDWARE_IRQ is not set' > seabios/.config 17 | make -C seabios olddefconfig 18 | make -C seabios 19 | -------------------------------------------------------------------------------- /build/util/setenv.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | # Setup the build env for this board 3 | 4 | BOARD=$1 5 | 6 | if [ -z "$BOARD" ] || [ ! -d "$SCRIPT_DIR/boards/$BOARD" ]; then 7 | echo "You must specify one of these boards:" 8 | ls -1 $SCRIPT_DIR/boards 9 | exit 1 10 | fi 11 | 12 | BUILD_DIR="$PWD/out" 13 | mkdir -p $BUILD_DIR 14 | 15 | ROM_DIR="$BUILD_DIR/roms" 16 | SEABIOS_VERSION=rel-1.9.1 17 | 18 | # Add board-specific env 19 | if [ -f "$SCRIPT_DIR/boards/$BOARD/settings.sh" ]; then 20 | source $SCRIPT_DIR/boards/$BOARD/settings.sh 21 | fi 22 | 23 | export BOARD BUILD_DIR ROM_DIR SCRIPT_DIR NAME SHELLBALL COREBOOT_SHA SEABIOS_VERSION 24 | -------------------------------------------------------------------------------- /build/util/travis_build.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"/.. 4 | 5 | # Build all ROMs for which we have a .config file 6 | for boardDir in `find $SCRIPT_DIR/boards -name ".config" | rev | cut -d"/" -f2 | rev` 7 | do 8 | $SCRIPT_DIR/build_rom.sh $boardDir 9 | done 10 | 11 | # Build all BOOT_STUBs 12 | for boardDir in `ls -1 $SCRIPT_DIR/boards` 13 | do 14 | $SCRIPT_DIR/build_boot_stub.sh $boardDir 15 | done 16 | -------------------------------------------------------------------------------- /flashrom/build_flashrom.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | # Build flashrom on Raspberry Pi (Raspbian Jessie) 3 | 4 | # Deps 5 | sudo apt-get install build-essential pciutils usbutils libpci-dev libusb-dev libftdi1 libftdi-dev zlib1g-dev subversion libusb-1.0-0-dev 6 | 7 | # Build 8 | svn co svn://flashrom.org/flashrom/trunk flashrom 9 | cd flashrom/ 10 | make 11 | 12 | # After enable SPI in advanced options with 'raspi-config' command 13 | # Others suggest the following, but doesn't work for me: 14 | # sudo modprobe spi_bcm2835 15 | # sudo modprobe spidev 16 | 17 | # To read 18 | # time sudo ./flashrom -p linux_spi:dev=/dev/spidev0.0 -r test1.rom 19 | # Do this a few times and verify md5sum stays the same 20 | 21 | # Examine output with cbfstool test1.rom print 22 | # or dump_fmap -h test1.rom 23 | 24 | # To write 25 | # time sudo ./flashrom -p linux_spi:dev=/dev/spidev0.0 -w new.rom 26 | 27 | # Extract parts with dd, offsets and sizes grabbed from dump_fmap 28 | 29 | # E.g. Grab RO_VPD 30 | # dd if=test1.rom of=ro_vpd.bin skip=$((0x00600000)) count=$((0x4000)) bs=1 31 | 32 | # E.g. Grab GBB 33 | # dd if=test1.rom of=gbb.bin skip=$((0x00611000)) count=$((0xef000)) bs=1 34 | 35 | # Speaking of GBB, you can set flags in userspace 36 | # /usr/share/vboot/bin/set_gbb_flags.sh 0x489 37 | -------------------------------------------------------------------------------- /flashrom/fix.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | # Make rom with: 3 | # dd if=/dev/zero of=fix.rom bs=1024 count=8192 4 | # dd if=swanky.bootstub.rom of=fix.rom bs=1 seek=$((0x00700000)) conv=notrunc 5 | # echo "0x00700000:0x007fffff BOOT_STUB" > layout 6 | 7 | echo "Writing original rom." 8 | time sudo flashrom -p linux_spi:dev=/dev/spidev0.0 -w original.rom 9 | 10 | echo "Writing stub." 11 | time sudo flashrom -p linux_spi:dev=/dev/spidev0.0 -l layout -i BOOT_STUB -w fix.rom 12 | -------------------------------------------------------------------------------- /flashrom/write-fail.log: -------------------------------------------------------------------------------- 1 | pi@raspberrypi:~/flashrom $ time sudo ./flashrom -p linux_spi:dev=/dev/spidev0.0 -w swanky-by-spi.bin 2 | flashrom v0.9.8-r1931 on Linux 4.1.17+ (armv6l) 3 | flashrom is free software, get the source code at https://flashrom.org 4 | 5 | Calibrating delay loop... delay loop is unreliable, trying to continue OK. 6 | Found Winbond flash chip "W25Q64.W" (8192 kB, SPI) on linux_spi. 7 | Reading old flash chip contents... done. 8 | Erasing and writing flash chip... Erase/write done. 9 | Verifying flash... FAILED at 0x00213500! Expected=0x43, Found=0x5e, failed byte count from 0x00000000-0x007fffff: 0xcfe 10 | Your flash chip is in an unknown state. 11 | Please report this on IRC at chat.freenode.net (channel #flashrom) or 12 | mail flashrom@flashrom.org, thanks! 13 | 14 | real 6m11.196s 15 | user 0m14.510s 16 | sys 0m4.830s 17 | -------------------------------------------------------------------------------- /provision/setup.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | apt-get update -qq 4 | 5 | echo "Installing deps for coreboot" 6 | apt-get install -qq -y git build-essential gcc-4.8-multilib iasl unzip sharutils 7 | 8 | echo "Installing ncurses for ad hoc 'make menuconfig'" 9 | apt-get install -qq -y libncurses-dev 10 | 11 | echo "Installing deps for coreboot cross-compilation toolchain build" 12 | apt-get install -qq -y ccache m4 bison flex zlib1g-dev 13 | 14 | echo "Installing Docker" 15 | apt-get install -qq -y apt-transport-https ca-certificates 16 | apt-key adv --keyserver hkp://p80.pool.sks-keyservers.net:80 --recv-keys 58118E89F3A912897C070ADBF76221572C52609D 17 | echo "deb https://apt.dockerproject.org/repo ubuntu-trusty main" > /etc/apt/sources.list.d/docker.list 18 | apt-get update -qq 19 | apt-get install -qq -y docker-engine 20 | 21 | # User must be in 'docker' group 22 | usermod -aG docker $USER 23 | service docker start 24 | 25 | # Build cbfstool and ifdtool 26 | echo "Building coreboot utils" 27 | mkdir -p /tmp/coreboot 28 | cd /tmp/coreboot 29 | wget -O coreboot.tar.gz -q https://chromium.googlesource.com/chromiumos/third_party/coreboot/+archive/chromeos-2016.02.tar.gz 30 | wget -O vboot.tar.gz -q https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+archive/master.tar.gz 31 | 32 | tar --touch -xzf coreboot.tar.gz 33 | tar --touch -xzf vboot.tar.gz -C 3rdparty/vboot 34 | 35 | make -C util/cbfstool/ 36 | make -C util/ifdtool/ 37 | cp util/cbfstool/cbfstool /usr/local/bin/ 38 | cp util/ifdtool/ifdtool /usr/local/bin/ 39 | cd .. 40 | rm -rf /tmp/coreboot 41 | 42 | # Add a couple of common locales if necessary (to avoid annoying Perl errors) 43 | echo "Installing US and GB locales" 44 | locale-gen "en_US.UTF-8" "en_GB.UTF-8" 45 | -------------------------------------------------------------------------------- /reference/links.md: -------------------------------------------------------------------------------- 1 | # Recovery images 2 | 3 | * https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf 4 | * https://dl.google.com/dl/edgedl/chromeos/recovery/linux_recovery.sh 5 | 6 | E.g. https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_6158.70.0_wolf_recovery_stable-channel_mp.bin.zip 7 | 8 | # Repos 9 | 10 | * https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/firmware-wolf-4389.24.B 11 | * https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+/firmware-wolf-4389.24.B 12 | * http://review.coreboot.org/gitweb?p=coreboot.git;a=tree 13 | * http://review.coreboot.org/gitweb?p=vboot.git;a=tree 14 | 15 | # Bay Trail 16 | 17 | Kevin O'Connor got Seabios working with Bay Trail 18 | * https://github.com/coreboot/seabios/commit/bd5f6c7432f4c8297871ed4e243dc69a9cece318 19 | 20 | Interesting thread on getting this working 21 | * https://www.mail-archive.com/coreboot%40coreboot.org/msg43718.html 22 | 23 | # Building a BOOT_STUB 24 | 25 | * http://www.seabios.org/pipermail/seabios/2015-December/010062.html 26 | * http://www.seabios.org/Runtime_config#Configuring_boot_order 27 | * https://johnlewis.ie/build-your-own-baytrail-boot_stub/ 28 | 29 | # Debugging 30 | 31 | * http://www.seabios.org/Debugging 32 | * cbmem -c 33 | -------------------------------------------------------------------------------- /upstreaming/cherry-pick-wolf.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | # This a script to cherry pick commits for the Wolf mainboard 4 | # The intention is to get everything we need from Google committed into coreboot upstream 5 | # I can then submit my own patches to coreboot to make the necessary to changes 6 | 7 | # Clone coreboot 8 | git clone http://review.coreboot.org/p/coreboot 9 | cd coreboot 10 | 11 | # Add and fetch Google's remote 12 | git remote add google https://chromium.googlesource.com/chromiumos/third_party/coreboot 13 | git fetch google 14 | 15 | # Make working branch 16 | git checkout -b add-wolf-to-upstream 17 | 18 | # Google removed the vboot and blob submodules: 19 | # https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/f5ff8221e9894aa9ec7aff71e25cad5090088dc4 20 | # 21 | # This makes cherry picking subsequent commits *always* have a conflict. See: 22 | # http://git.661346.n2.nabble.com/problem-with-cherry-picking-a-commit-which-comes-before-introducing-a-new-submodule-td5900085.html 23 | # 24 | # If I rebased the Wolf branch to fix this, cherry picks would have meaningless hashes local to my machine 25 | # Instead I'm removing these dirs and committing, with the intention of removing that commit by rebasing. 26 | git rm 3rdparty/blobs 3rdparty/vboot 27 | git commit -am "--- DO NOT MERGE - This is a temporary local commit. ---" 28 | 29 | # Record the commit to remove after we've cherry picked 30 | export TEMP_COMMIT=$(git rev-parse HEAD) 31 | 32 | # Cherry pick the first commit for the 'src/mainboard/google/wolf' path 33 | # Don't autocommit because there's a couple of files we don't want in it. 34 | git rev-list --skip 2 --reverse google/firmware-wolf-4389.24.B -- src/mainboard/google/wolf | head -1 | git cherry-pick -n -x --stdin -X ours 35 | 36 | # We don't want these two files, as only Google uses these 37 | git reset HEAD configs/config.wolf payloads/libpayload/configs/config.wolf 38 | rm -rf configs/ payloads/libpayload/configs/config.wolf 39 | 40 | # Commit accepting the default commit message for a cherry pick 41 | git commit --no-edit 42 | 43 | # Do the remainder (tail -n +2 is an arcane way of getting all but the first) 44 | git rev-list --skip 2 --reverse google/firmware-wolf-4389.24.B -- src/mainboard/google/wolf | tail -n +2 | git cherry-pick -x --stdin 45 | 46 | # Done cherry picking, undo my earlier fix 47 | git rebase --onto $TEMP_COMMIT~ $TEMP_COMMIT add-wolf-to-upstream 48 | 49 | # Now there a whole bunch of further commits, but manual inspects show all but two of them are cherry picked, from already upstreamed commits 50 | # There's only two commits remaining that are only in wolf, but not picked up by our cherry picks: 51 | # 4ee486d202423353a07c54000f977f7ac5689455 Delay the setup of pc-beep verbs 52 | # 2b5c5c5795c0c752ae0fdb65e4395217b95972ad Enable 2x Refresh mode 53 | # Both of these refer to 'partner' bug IDs, which I can't see 54 | # In any case, these don't touch src/mainboard/google/wolf 55 | 56 | # I'm hoping at this point someone with admin rights can push this 57 | -------------------------------------------------------------------------------- /upstreaming/notes.md: -------------------------------------------------------------------------------- 1 | # https://github.com/coreboot/coreboot 2 | # https://www.coreboot.org/Build_HOWTO 3 | # https://www.coreboot.org/pipermail/coreboot-gerrit/2016-January/039835.html 4 | 5 | # git diff origin/firmware-swanky-5216.238.B:src/mainboard/google/swanky coreboot/master:src/mainboard/google/rambi 6 | # git diff origin/firmware-swanky-5216.238.B:src/mainboard/google/swanky origin/firmware-wolf-4389.24.B:src/mainboard/google/wolf 7 | 8 | # To get VGA pci use 'lspci -nv', and look for the VGA controller 9 | -------------------------------------------------------------------------------- /upstreaming/swanky.config: -------------------------------------------------------------------------------- 1 | # 2 | # Automatically generated file; DO NOT EDIT. 3 | # coreboot configuration 4 | # 5 | 6 | # 7 | # General setup 8 | # 9 | CONFIG_LOCALVERSION="" 10 | CONFIG_CBFS_PREFIX="fallback" 11 | # CONFIG_MULTIPLE_CBFS_INSTANCES is not set 12 | CONFIG_COMPILER_GCC=y 13 | # CONFIG_COMPILER_LLVM_CLANG is not set 14 | # CONFIG_ANY_TOOLCHAIN is not set 15 | # CONFIG_CCACHE is not set 16 | # CONFIG_FMD_GENPARSER is not set 17 | # CONFIG_SCONFIG_GENPARSER is not set 18 | # CONFIG_USE_OPTION_TABLE is not set 19 | # CONFIG_UNCOMPRESSED_RAMSTAGE is not set 20 | CONFIG_COMPRESS_RAMSTAGE=y 21 | CONFIG_INCLUDE_CONFIG_FILE=y 22 | CONFIG_EARLY_CBMEM_INIT=y 23 | # CONFIG_COLLECT_TIMESTAMPS is not set 24 | CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION=y 25 | # CONFIG_USE_BLOBS is not set 26 | # CONFIG_COVERAGE is not set 27 | CONFIG_RELOCATABLE_MODULES=y 28 | CONFIG_RELOCATABLE_RAMSTAGE=y 29 | # CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM is not set 30 | CONFIG_FLASHMAP_OFFSET=0 31 | CONFIG_BOOTBLOCK_SIMPLE=y 32 | # CONFIG_BOOTBLOCK_NORMAL is not set 33 | CONFIG_BOOTBLOCK_CUSTOM=y 34 | CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" 35 | # CONFIG_C_ENVIRONMENT_BOOTBLOCK is not set 36 | # CONFIG_UPDATE_IMAGE is not set 37 | # CONFIG_GENERIC_GPIO_LIB is not set 38 | # CONFIG_BOARD_ID_AUTO is not set 39 | # CONFIG_BOARD_ID_MANUAL is not set 40 | # CONFIG_RAM_CODE_SUPPORT is not set 41 | # CONFIG_BOOTSPLASH_IMAGE is not set 42 | # CONFIG_ACPI_SATA_GENERATOR is not set 43 | 44 | # 45 | # Mainboard 46 | # 47 | # CONFIG_VENDOR_A_TREND is not set 48 | # CONFIG_VENDOR_AAEON is not set 49 | # CONFIG_VENDOR_ABIT is not set 50 | # CONFIG_VENDOR_ADLINK is not set 51 | # CONFIG_VENDOR_ADVANSUS is not set 52 | # CONFIG_VENDOR_AMD is not set 53 | # CONFIG_VENDOR_AOPEN is not set 54 | # CONFIG_VENDOR_APPLE is not set 55 | # CONFIG_VENDOR_ARTECGROUP is not set 56 | # CONFIG_VENDOR_ASROCK is not set 57 | # CONFIG_VENDOR_ASUS is not set 58 | # CONFIG_VENDOR_AVALUE is not set 59 | # CONFIG_VENDOR_AZZA is not set 60 | # CONFIG_VENDOR_BACHMANN is not set 61 | # CONFIG_VENDOR_BAP is not set 62 | # CONFIG_VENDOR_BCOM is not set 63 | # CONFIG_VENDOR_BIFFEROS is not set 64 | # CONFIG_VENDOR_BIOSTAR is not set 65 | # CONFIG_VENDOR_BROADCOM is not set 66 | # CONFIG_VENDOR_COMPAQ is not set 67 | # CONFIG_VENDOR_CUBIETECH is not set 68 | # CONFIG_VENDOR_DIGITALLOGIC is not set 69 | # CONFIG_VENDOR_DMP is not set 70 | # CONFIG_VENDOR_ECS is not set 71 | # CONFIG_VENDOR_EMULATION is not set 72 | # CONFIG_VENDOR_ESD is not set 73 | # CONFIG_VENDOR_GETAC is not set 74 | # CONFIG_VENDOR_GIGABYTE is not set 75 | # CONFIG_VENDOR_GIZMOSPHERE is not set 76 | CONFIG_VENDOR_GOOGLE=y 77 | # CONFIG_VENDOR_HP is not set 78 | # CONFIG_VENDOR_IBASE is not set 79 | # CONFIG_VENDOR_IEI is not set 80 | # CONFIG_VENDOR_INTEL is not set 81 | # CONFIG_VENDOR_IWAVE is not set 82 | # CONFIG_VENDOR_IWILL is not set 83 | # CONFIG_VENDOR_JETWAY is not set 84 | # CONFIG_VENDOR_KONTRON is not set 85 | # CONFIG_VENDOR_LANNER is not set 86 | # CONFIG_VENDOR_LENOVO is not set 87 | # CONFIG_VENDOR_LINUTOP is not set 88 | # CONFIG_VENDOR_LIPPERT is not set 89 | # CONFIG_VENDOR_MITAC is not set 90 | # CONFIG_VENDOR_MSI is not set 91 | # CONFIG_VENDOR_NEC is not set 92 | # CONFIG_VENDOR_NOKIA is not set 93 | # CONFIG_VENDOR_NVIDIA is not set 94 | # CONFIG_VENDOR_PACKARDBELL is not set 95 | # CONFIG_VENDOR_PCENGINES is not set 96 | # CONFIG_VENDOR_PURISM is not set 97 | # CONFIG_VENDOR_RCA is not set 98 | # CONFIG_VENDOR_RODA is not set 99 | # CONFIG_VENDOR_SAMSUNG is not set 100 | # CONFIG_VENDOR_SIEMENS is not set 101 | # CONFIG_VENDOR_SOYO is not set 102 | # CONFIG_VENDOR_SUNW is not set 103 | # CONFIG_VENDOR_SUPERMICRO is not set 104 | # CONFIG_VENDOR_TECHNEXION is not set 105 | # CONFIG_VENDOR_THOMSON is not set 106 | # CONFIG_VENDOR_TI is not set 107 | # CONFIG_VENDOR_TRAVERSE is not set 108 | # CONFIG_VENDOR_TYAN is not set 109 | # CONFIG_VENDOR_VIA is not set 110 | # CONFIG_VENDOR_WINENT is not set 111 | # CONFIG_VENDOR_WYSE is not set 112 | CONFIG_BOARD_SPECIFIC_OPTIONS=y 113 | CONFIG_MAINBOARD_DIR="google/rambi" 114 | CONFIG_MAINBOARD_PART_NUMBER="Rambi" 115 | CONFIG_MAINBOARD_VENDOR="Google" 116 | CONFIG_MAX_CPUS=4 117 | CONFIG_VGA_BIOS_ID="1106,3230" 118 | # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set 119 | CONFIG_VGA_BIOS=y 120 | # CONFIG_UDELAY_IO is not set 121 | CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" 122 | CONFIG_DCACHE_RAM_BASE=0xfe000000 123 | CONFIG_DCACHE_RAM_SIZE=0x8000 124 | CONFIG_VGA_BIOS_FILE="/home/vagrant/out/extracts/swanky/blobs/vbios.rom" 125 | CONFIG_MMCONF_BASE_ADDRESS=0xe0000000 126 | CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Google" 127 | # CONFIG_HAVE_IFD_BIN is not set 128 | # CONFIG_HAVE_ME_BIN is not set 129 | CONFIG_MAX_REBOOT_CNT=3 130 | CONFIG_UART_FOR_CONSOLE=0 131 | CONFIG_ID_SECTION_OFFSET=0x80 132 | CONFIG_RAMTOP=0x200000 133 | CONFIG_CACHE_ROM_SIZE_OVERRIDE=0 134 | CONFIG_CBFS_SIZE=0x100000 135 | CONFIG_POST_DEVICE=y 136 | # CONFIG_BOARD_GOOGLE_AURON is not set 137 | # CONFIG_BOARD_GOOGLE_BOLT is not set 138 | # CONFIG_BOARD_GOOGLE_BUTTERFLY is not set 139 | # CONFIG_BOARD_GOOGLE_CHELL is not set 140 | # CONFIG_BOARD_GOOGLE_COSMOS is not set 141 | # CONFIG_BOARD_GOOGLE_CYAN is not set 142 | # CONFIG_BOARD_GOOGLE_DAISY is not set 143 | # CONFIG_BOARD_GOOGLE_FALCO is not set 144 | # CONFIG_BOARD_GOOGLE_FOSTER is not set 145 | # CONFIG_BOARD_GOOGLE_GLADOS is not set 146 | # CONFIG_BOARD_GOOGLE_GUADO is not set 147 | # CONFIG_BOARD_GOOGLE_JECHT is not set 148 | # CONFIG_BOARD_GOOGLE_LARS is not set 149 | # CONFIG_BOARD_GOOGLE_LINK is not set 150 | # CONFIG_BOARD_GOOGLE_NYAN is not set 151 | # CONFIG_BOARD_GOOGLE_NYAN_BIG is not set 152 | # CONFIG_BOARD_GOOGLE_NYAN_BLAZE is not set 153 | # CONFIG_BOARD_GOOGLE_OAK is not set 154 | # CONFIG_BOARD_GOOGLE_PANTHER is not set 155 | # CONFIG_BOARD_GOOGLE_PARROT is not set 156 | # CONFIG_BOARD_GOOGLE_PEACH_PIT is not set 157 | # CONFIG_BOARD_GOOGLE_PEPPY is not set 158 | # CONFIG_BOARD_GOOGLE_PURIN is not set 159 | CONFIG_BOARD_GOOGLE_RAMBI=y 160 | # CONFIG_BOARD_GOOGLE_RUSH is not set 161 | # CONFIG_BOARD_GOOGLE_RUSH_RYU is not set 162 | # CONFIG_BOARD_GOOGLE_SAMUS is not set 163 | # CONFIG_BOARD_GOOGLE_SLIPPY is not set 164 | # CONFIG_BOARD_GOOGLE_SMAUG is not set 165 | # CONFIG_BOARD_GOOGLE_STORM is not set 166 | # CONFIG_BOARD_GOOGLE_STOUT is not set 167 | # CONFIG_BOARD_GOOGLE_TIDUS is not set 168 | # CONFIG_BOARD_GOOGLE_URARA is not set 169 | # CONFIG_BOARD_GOOGLE_VEYRON_GUS is not set 170 | # CONFIG_BOARD_GOOGLE_VEYRON_JAQ is not set 171 | # CONFIG_BOARD_GOOGLE_VEYRON_JERRY is not set 172 | # CONFIG_BOARD_GOOGLE_VEYRON_MIGHTY is not set 173 | # CONFIG_BOARD_GOOGLE_VEYRON_MINNIE is not set 174 | # CONFIG_BOARD_GOOGLE_VEYRON_NICKY is not set 175 | # CONFIG_BOARD_GOOGLE_VEYRON_PINKY is not set 176 | # CONFIG_BOARD_GOOGLE_VEYRON_SHARK is not set 177 | # CONFIG_BOARD_GOOGLE_VEYRON_SPEEDY is not set 178 | # CONFIG_BOARD_GOOGLE_VEYRON_THEA is not set 179 | # CONFIG_BOARD_GOOGLE_VEYRON_BRAIN is not set 180 | # CONFIG_BOARD_GOOGLE_VEYRON_DANGER is not set 181 | # CONFIG_BOARD_GOOGLE_VEYRON_EMILE is not set 182 | # CONFIG_BOARD_GOOGLE_VEYRON_MICKEY is not set 183 | # CONFIG_BOARD_GOOGLE_VEYRON_RIALTO is not set 184 | # CONFIG_BOARD_GOOGLE_VEYRON_ROMY is not set 185 | # CONFIG_CHROMEOS is not set 186 | CONFIG_BOOT_MEDIA_SPI_BUS=0 187 | CONFIG_TTYS0_LCS=3 188 | # CONFIG_BOARD_GOOGLE_VEYRON is not set 189 | CONFIG_PAYLOAD_CONFIGFILE="" 190 | CONFIG_SEABIOS_PS2_TIMEOUT=0 191 | CONFIG_CPU_ADDR_BITS=36 192 | CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 193 | CONFIG_MAINBOARD_VERSION="1.0" 194 | # CONFIG_DRIVERS_PS2_KEYBOARD is not set 195 | CONFIG_DRIVERS_UART_8250IO=y 196 | # CONFIG_NO_POST is not set 197 | CONFIG_BOARD_ROMSIZE_KB_8192=y 198 | # CONFIG_COREBOOT_ROMSIZE_KB_64 is not set 199 | # CONFIG_COREBOOT_ROMSIZE_KB_128 is not set 200 | # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set 201 | # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set 202 | # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set 203 | # CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set 204 | # CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set 205 | CONFIG_COREBOOT_ROMSIZE_KB_8192=y 206 | # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set 207 | # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set 208 | CONFIG_COREBOOT_ROMSIZE_KB=8192 209 | CONFIG_ROM_SIZE=0x800000 210 | CONFIG_FMDFILE="" 211 | # CONFIG_SYSTEM_TYPE_LAPTOP is not set 212 | # CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set 213 | 214 | # 215 | # Chipset 216 | # 217 | 218 | # 219 | # SoC 220 | # 221 | # CONFIG_SOC_BROADCOM_CYGNUS is not set 222 | CONFIG_BOOTBLOCK_CPU_INIT="soc/intel/baytrail/bootblock/bootblock.c" 223 | CONFIG_SOC_INTEL_BAYTRAIL=y 224 | CONFIG_CPU_SPECIFIC_OPTIONS=y 225 | CONFIG_SMM_TSEG_SIZE=0x800000 226 | CONFIG_SMM_RESERVED_SIZE=0x100000 227 | CONFIG_HAVE_MRC=y 228 | CONFIG_MRC_FILE="3rdparty/blobs/northbridge/intel/sandybridge/systemagent-r6.bin" 229 | CONFIG_MRC_BIN_ADDRESS=0xfffa0000 230 | # CONFIG_MRC_RMT is not set 231 | CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x8000 232 | CONFIG_DCACHE_RAM_ROMSTAGE_STACK_SIZE=0x800 233 | # CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set 234 | CONFIG_ENABLE_BUILTIN_COM1=y 235 | # CONFIG_HAVE_REFCODE_BLOB is not set 236 | CONFIG_CHIPSET_BOOTBLOCK_INCLUDE="soc/intel/baytrail/bootblock/timestamp.inc" 237 | # CONFIG_BUILD_WITH_FAKE_IFD is not set 238 | CONFIG_CACHE_MRC_SETTINGS=y 239 | CONFIG_TTYS0_BASE=0x3f8 240 | CONFIG_SOC_INTEL_COMMON=y 241 | CONFIG_MRC_SETTINGS_CACHE_BASE=0xfffe0000 242 | CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 243 | # CONFIG_MRC_SETTINGS_PROTECT is not set 244 | # CONFIG_DISPLAY_MTRRS is not set 245 | # CONFIG_DISPLAY_SMM_MEMORY_MAP is not set 246 | # CONFIG_SOC_INTEL_COMMON_RESET is not set 247 | # CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE is not set 248 | # CONFIG_MMA is not set 249 | CONFIG_HEAP_SIZE=0x4000 250 | # CONFIG_SOC_MARVELL_BG4CD is not set 251 | # CONFIG_SOC_MEDIATEK_MT8173 is not set 252 | # CONFIG_SOC_NVIDIA_TEGRA124 is not set 253 | # CONFIG_SOC_NVIDIA_TEGRA132 is not set 254 | # CONFIG_SOC_NVIDIA_TEGRA210 is not set 255 | # CONFIG_SOC_QC_IPQ806X is not set 256 | # CONFIG_SOC_ROCKCHIP_RK3288 is not set 257 | # CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set 258 | # CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set 259 | # CONFIG_SOC_UCB_RISCV is not set 260 | 261 | # 262 | # CPU 263 | # 264 | # CONFIG_CPU_ALLWINNER_A10 is not set 265 | CONFIG_XIP_ROM_SIZE=0x10000 266 | CONFIG_NUM_IPI_STARTS=2 267 | # CONFIG_CPU_AMD_AGESA is not set 268 | # CONFIG_CPU_AMD_PI is not set 269 | # CONFIG_CPU_ARMLTD_CORTEX_A9 is not set 270 | CONFIG_SSE2=y 271 | # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set 272 | CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED=y 273 | # CONFIG_CPU_TI_AM335X is not set 274 | # CONFIG_PARALLEL_CPU_INIT is not set 275 | # CONFIG_UDELAY_LAPIC is not set 276 | CONFIG_UDELAY_TSC=y 277 | CONFIG_TSC_CONSTANT_RATE=y 278 | CONFIG_TSC_MONOTONIC_TIMER=y 279 | # CONFIG_UDELAY_TIMER2 is not set 280 | # CONFIG_TSC_CALIBRATE_WITH_IO is not set 281 | # CONFIG_TSC_SYNC_LFENCE is not set 282 | CONFIG_TSC_SYNC_MFENCE=y 283 | CONFIG_LOGICAL_CPUS=y 284 | CONFIG_SMM_TSEG=y 285 | CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 286 | # CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set 287 | # CONFIG_SERIALIZED_SMM_INITIALIZATION is not set 288 | # CONFIG_X86_AMD_FIXED_MTRRS is not set 289 | # CONFIG_PLATFORM_USES_FSP1_0 is not set 290 | CONFIG_PARALLEL_MP=y 291 | CONFIG_BACKUP_DEFAULT_SMM_REGION=y 292 | # CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set 293 | CONFIG_CACHE_AS_RAM=y 294 | CONFIG_SMP=y 295 | CONFIG_AP_SIPI_VECTOR=0xfffff000 296 | CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y 297 | # CONFIG_USES_MICROCODE_HEADER_FILES is not set 298 | CONFIG_CPU_MICROCODE_CBFS_GENERATE=y 299 | # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set 300 | # CONFIG_CPU_MICROCODE_CBFS_NONE is not set 301 | # CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set 302 | 303 | # 304 | # Northbridge 305 | # 306 | # CONFIG_NORTHBRIDGE_AMD_AGESA is not set 307 | # CONFIG_AMD_NB_CIMX is not set 308 | # CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set 309 | CONFIG_VIDEO_MB=0 310 | # CONFIG_NORTHBRIDGE_AMD_PI is not set 311 | CONFIG_RAMBASE=0x100000 312 | CONFIG_HPET_ADDRESS=0xfed00000 313 | CONFIG_MAX_PIRQ_LINKS=4 314 | 315 | # 316 | # Southbridge 317 | # 318 | # CONFIG_AMD_SB_CIMX is not set 319 | # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set 320 | # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set 321 | # CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set 322 | 323 | # 324 | # Super I/O 325 | # 326 | 327 | # 328 | # Embedded Controllers 329 | # 330 | CONFIG_EC_GOOGLE_CHROMEEC=y 331 | # CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP is not set 332 | # CONFIG_EC_GOOGLE_CHROMEEC_I2C is not set 333 | CONFIG_EC_GOOGLE_CHROMEEC_LPC=y 334 | # CONFIG_EC_GOOGLE_CHROMEEC_MEC is not set 335 | # CONFIG_EC_GOOGLE_CHROMEEC_PD is not set 336 | # CONFIG_EC_GOOGLE_CHROMEEC_SPI is not set 337 | CONFIG_HAVE_INTEL_FIRMWARE=y 338 | 339 | # 340 | # Intel Firmware 341 | # 342 | CONFIG_MAINBOARD_HAS_CHROMEOS=y 343 | 344 | # 345 | # ChromeOS 346 | # 347 | # CONFIG_UEFI_2_4_BINDING is not set 348 | # CONFIG_ARCH_ARM is not set 349 | # CONFIG_ARCH_BOOTBLOCK_ARM is not set 350 | # CONFIG_ARCH_VERSTAGE_ARM is not set 351 | # CONFIG_ARCH_ROMSTAGE_ARM is not set 352 | # CONFIG_ARCH_RAMSTAGE_ARM is not set 353 | # CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set 354 | # CONFIG_ARCH_VERSTAGE_ARMV4 is not set 355 | # CONFIG_ARCH_ROMSTAGE_ARMV4 is not set 356 | # CONFIG_ARCH_RAMSTAGE_ARMV4 is not set 357 | # CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set 358 | # CONFIG_ARCH_VERSTAGE_ARMV7 is not set 359 | # CONFIG_ARCH_ROMSTAGE_ARMV7 is not set 360 | # CONFIG_ARCH_RAMSTAGE_ARMV7 is not set 361 | # CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set 362 | # CONFIG_ARCH_VERSTAGE_ARMV7_M is not set 363 | # CONFIG_ARM_LPAE is not set 364 | # CONFIG_ARCH_ARM64 is not set 365 | # CONFIG_ARCH_BOOTBLOCK_ARM64 is not set 366 | # CONFIG_ARCH_VERSTAGE_ARM64 is not set 367 | # CONFIG_ARCH_ROMSTAGE_ARM64 is not set 368 | # CONFIG_ARCH_RAMSTAGE_ARM64 is not set 369 | # CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set 370 | # CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set 371 | # CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set 372 | # CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set 373 | # CONFIG_ARM64_A53_ERRATUM_843419 is not set 374 | # CONFIG_ARCH_MIPS is not set 375 | # CONFIG_ARCH_BOOTBLOCK_MIPS is not set 376 | # CONFIG_ARCH_VERSTAGE_MIPS is not set 377 | # CONFIG_ARCH_ROMSTAGE_MIPS is not set 378 | # CONFIG_ARCH_RAMSTAGE_MIPS is not set 379 | # CONFIG_ARCH_RISCV is not set 380 | # CONFIG_ARCH_BOOTBLOCK_RISCV is not set 381 | # CONFIG_ARCH_VERSTAGE_RISCV is not set 382 | # CONFIG_ARCH_ROMSTAGE_RISCV is not set 383 | # CONFIG_ARCH_RAMSTAGE_RISCV is not set 384 | CONFIG_ARCH_X86=y 385 | CONFIG_ARCH_BOOTBLOCK_X86_32=y 386 | CONFIG_ARCH_VERSTAGE_X86_32=y 387 | CONFIG_ARCH_ROMSTAGE_X86_32=y 388 | CONFIG_ARCH_RAMSTAGE_X86_32=y 389 | # CONFIG_ARCH_BOOTBLOCK_X86_64 is not set 390 | # CONFIG_ARCH_VERSTAGE_X86_64 is not set 391 | # CONFIG_ARCH_ROMSTAGE_X86_64 is not set 392 | # CONFIG_ARCH_RAMSTAGE_X86_64 is not set 393 | # CONFIG_AP_IN_SIPI_WAIT is not set 394 | # CONFIG_SIPI_VECTOR_IN_ROM is not set 395 | # CONFIG_ROMCC is not set 396 | # CONFIG_LATE_CBMEM_INIT is not set 397 | CONFIG_PC80_SYSTEM=y 398 | # CONFIG_HAVE_CMOS_DEFAULT is not set 399 | CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y 400 | # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set 401 | # CONFIG_COMPILE_IN_DSDT is not set 402 | 403 | # 404 | # Devices 405 | # 406 | # CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set 407 | CONFIG_NATIVE_VGA_INIT_USE_EDID=y 408 | # CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is not set 409 | # CONFIG_VGA_ROM_RUN is not set 410 | # CONFIG_ON_DEVICE_ROM_RUN is not set 411 | # CONFIG_MULTIPLE_VGA_ADAPTERS is not set 412 | # CONFIG_SMBUS_HAS_AUX_CHANNELS is not set 413 | # CONFIG_SPD_CACHE is not set 414 | CONFIG_PCI=y 415 | # CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set 416 | CONFIG_PCIX_PLUGIN_SUPPORT=y 417 | CONFIG_PCIEXP_PLUGIN_SUPPORT=y 418 | CONFIG_CARDBUS_PLUGIN_SUPPORT=y 419 | # CONFIG_AZALIA_PLUGIN_SUPPORT is not set 420 | CONFIG_PCIEXP_COMMON_CLOCK=y 421 | CONFIG_PCIEXP_ASPM=y 422 | # CONFIG_PCIEXP_CLK_PM is not set 423 | # CONFIG_EARLY_PCI_BRIDGE is not set 424 | # CONFIG_PCIEXP_L1_SUB_STATE is not set 425 | CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 426 | CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 427 | # CONFIG_PXE_ROM is not set 428 | # CONFIG_SOFTWARE_I2C is not set 429 | 430 | # 431 | # Generic Drivers 432 | # 433 | # CONFIG_DRIVERS_AS3722_RTC is not set 434 | CONFIG_DEVICE_SPECIFIC_OPTIONS=y 435 | # CONFIG_ELOG is not set 436 | # CONFIG_GIC is not set 437 | # CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set 438 | # CONFIG_DRIVERS_I2C_RTD2132 is not set 439 | # CONFIG_INTEL_DP is not set 440 | # CONFIG_INTEL_DDI is not set 441 | # CONFIG_INTEL_EDID is not set 442 | # CONFIG_INTEL_INT15 is not set 443 | # CONFIG_INTEL_GMA_ACPI is not set 444 | # CONFIG_DRIVER_INTEL_I210 is not set 445 | # CONFIG_IPMI_KCS is not set 446 | # CONFIG_DRIVERS_LENOVO_WACOM is not set 447 | # CONFIG_DRIVER_MAXIM_MAX77686 is not set 448 | # CONFIG_DRIVER_PARADE_PS8625 is not set 449 | CONFIG_DRIVERS_MC146818=y 450 | CONFIG_MAINBOARD_HAS_LPC_TPM=y 451 | # CONFIG_LPC_TPM is not set 452 | # CONFIG_DRIVERS_RICOH_RCE822 is not set 453 | # CONFIG_DRIVERS_SIL_3114 is not set 454 | CONFIG_SPI_FLASH=y 455 | CONFIG_SPI_ATOMIC_SEQUENCING=y 456 | CONFIG_SPI_FLASH_MEMORY_MAPPED=y 457 | # CONFIG_SPI_FLASH_SMM is not set 458 | # CONFIG_SPI_FLASH_NO_FAST_READ is not set 459 | CONFIG_SPI_FLASH_ADESTO=y 460 | CONFIG_SPI_FLASH_AMIC=y 461 | CONFIG_SPI_FLASH_ATMEL=y 462 | CONFIG_SPI_FLASH_EON=y 463 | CONFIG_SPI_FLASH_GIGADEVICE=y 464 | CONFIG_SPI_FLASH_MACRONIX=y 465 | CONFIG_SPI_FLASH_SPANSION=y 466 | CONFIG_SPI_FLASH_SST=y 467 | CONFIG_SPI_FLASH_STMICRO=y 468 | CONFIG_SPI_FLASH_WINBOND=y 469 | # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set 470 | CONFIG_HAVE_SPI_CONSOLE_SUPPORT=y 471 | # CONFIG_DRIVER_TI_TPS65090 is not set 472 | # CONFIG_DRIVERS_TI_TPS65913 is not set 473 | # CONFIG_DRIVERS_TI_TPS65913_RTC is not set 474 | CONFIG_DRIVERS_UART=y 475 | # CONFIG_NO_UART_ON_SUPERIO is not set 476 | # CONFIG_DRIVERS_UART_8250MEM is not set 477 | # CONFIG_DRIVERS_UART_8250MEM_32 is not set 478 | # CONFIG_HAVE_UART_SPECIAL is not set 479 | # CONFIG_DRIVERS_UART_OXPCIE is not set 480 | # CONFIG_DRIVERS_UART_PL011 is not set 481 | # CONFIG_HAVE_USBDEBUG is not set 482 | # CONFIG_HAVE_USBDEBUG_OPTIONS is not set 483 | # CONFIG_DRIVER_XPOWERS_AXP209 is not set 484 | CONFIG_RTC=y 485 | # CONFIG_TPM is not set 486 | CONFIG_STACK_SIZE=0x1000 487 | CONFIG_MMCONF_SUPPORT_DEFAULT=y 488 | CONFIG_MMCONF_SUPPORT=y 489 | # CONFIG_BOOTMODE_STRAPS is not set 490 | 491 | # 492 | # Console 493 | # 494 | CONFIG_SQUELCH_EARLY_SMP=y 495 | CONFIG_CONSOLE_SERIAL=y 496 | 497 | # 498 | # I/O mapped, 8250-compatible 499 | # 500 | 501 | # 502 | # Serial port base address = 0x3f8 503 | # 504 | CONFIG_CONSOLE_SERIAL_115200=y 505 | # CONFIG_CONSOLE_SERIAL_57600 is not set 506 | # CONFIG_CONSOLE_SERIAL_38400 is not set 507 | # CONFIG_CONSOLE_SERIAL_19200 is not set 508 | # CONFIG_CONSOLE_SERIAL_9600 is not set 509 | CONFIG_TTYS0_BAUD=115200 510 | # CONFIG_SPKMODEM is not set 511 | # CONFIG_CONSOLE_NE2K is not set 512 | CONFIG_CONSOLE_CBMEM=y 513 | CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 514 | # CONFIG_SPI_CONSOLE is not set 515 | CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y 516 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set 517 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set 518 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set 519 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set 520 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set 521 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set 522 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set 523 | # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set 524 | # CONFIG_CMOS_POST is not set 525 | # CONFIG_CONSOLE_POST is not set 526 | CONFIG_POST_DEVICE_NONE=y 527 | # CONFIG_POST_DEVICE_LPC is not set 528 | # CONFIG_POST_DEVICE_PCI_PCIE is not set 529 | CONFIG_POST_IO=y 530 | CONFIG_POST_IO_PORT=0x80 531 | # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set 532 | CONFIG_HAVE_ACPI_RESUME=y 533 | CONFIG_HAVE_HARD_RESET=y 534 | # CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set 535 | # CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set 536 | # CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set 537 | CONFIG_HAVE_MONOTONIC_TIMER=y 538 | # CONFIG_GENERIC_UDELAY is not set 539 | # CONFIG_TIMER_QUEUE is not set 540 | CONFIG_HAVE_OPTION_TABLE=y 541 | # CONFIG_PIRQ_ROUTE is not set 542 | CONFIG_HAVE_SMI_HANDLER=y 543 | # CONFIG_PCI_IO_CFG_EXT is not set 544 | # CONFIG_IOAPIC is not set 545 | # CONFIG_USE_WATCHDOG_ON_BOOT is not set 546 | CONFIG_VGA=y 547 | # CONFIG_GFXUMA is not set 548 | CONFIG_HAVE_ACPI_TABLES=y 549 | # CONFIG_COMMON_FADT is not set 550 | # CONFIG_ACPI_NHLT is not set 551 | 552 | # 553 | # System tables 554 | # 555 | # CONFIG_GENERATE_MP_TABLE is not set 556 | # CONFIG_GENERATE_PIRQ_TABLE is not set 557 | CONFIG_GENERATE_SMBIOS_TABLES=y 558 | CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Rambi" 559 | 560 | # 561 | # Payload 562 | # 563 | # CONFIG_PAYLOAD_NONE is not set 564 | # CONFIG_PAYLOAD_ELF is not set 565 | # CONFIG_PAYLOAD_FILO is not set 566 | # CONFIG_PAYLOAD_GRUB2 is not set 567 | CONFIG_PAYLOAD_SEABIOS=y 568 | # CONFIG_PAYLOAD_LINUX is not set 569 | # CONFIG_PAYLOAD_TIANOCORE is not set 570 | CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf" 571 | CONFIG_SEABIOS_STABLE=y 572 | # CONFIG_SEABIOS_MASTER is not set 573 | # CONFIG_SEABIOS_THREAD_OPTIONROMS is not set 574 | # CONFIG_COMPRESSED_PAYLOAD_LZMA is not set 575 | 576 | # 577 | # Debugging 578 | # 579 | # CONFIG_GDB_STUB is not set 580 | # CONFIG_FATAL_ASSERTS is not set 581 | # CONFIG_DEBUG_CBFS is not set 582 | # CONFIG_HAVE_DEBUG_RAM_SETUP is not set 583 | # CONFIG_HAVE_DEBUG_CAR is not set 584 | # CONFIG_HAVE_DEBUG_SMBUS is not set 585 | # CONFIG_DEBUG_SMI is not set 586 | # CONFIG_DEBUG_SMM_RELOCATION is not set 587 | # CONFIG_DEBUG_MALLOC is not set 588 | # CONFIG_DEBUG_ACPI is not set 589 | # CONFIG_DEBUG_SPI_FLASH is not set 590 | # CONFIG_TRACE is not set 591 | # CONFIG_ENABLE_APIC_EXT_ID is not set 592 | CONFIG_WARNINGS_ARE_ERRORS=y 593 | CONFIG_IASL_WARNINGS_ARE_ERRORS=y 594 | # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set 595 | # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set 596 | # CONFIG_POWER_BUTTON_FORCE_ENABLE is not set 597 | # CONFIG_POWER_BUTTON_FORCE_DISABLE is not set 598 | # CONFIG_POWER_BUTTON_IS_OPTIONAL is not set 599 | CONFIG_REG_SCRIPT=y 600 | -------------------------------------------------------------------------------- /upstreaming/swanky.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | # Upstream working dir 4 | mkdir -p upstream 5 | cd upstream 6 | 7 | # Checkout everything and build tools 8 | if [ ! -d "coreboot" ]; then 9 | exit 1 10 | git clone http://review.coreboot.org/coreboot.git 11 | git checkout 4.3 12 | git -C coreboot submodule update --init --checkout 13 | coreboot/util/crossgcc/buildgcc -j4 14 | make -j4 crosstools-arm 15 | # Or this? 16 | # coreboot/util/crossgcc/buildgcc -d /opt/cross -p arm-elf -j 4 17 | make -C coreboot iasl 18 | fi 19 | 20 | # Copy our config and build 21 | cp /vagrant/upstreaming/swanky.config coreboot/.config 22 | make -C coreboot -j4 23 | 24 | # Verify 25 | cbfstool coreboot/build/coreboot.rom print 26 | -------------------------------------------------------------------------------- /upstreaming/upstream-build.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | mkdir build; cd build 4 | 5 | git clone https://github.com/marcosscriven/coreboot.git 6 | git -C coreboot checkout add-wolf-to-upstream 7 | 8 | # Patch submodules 9 | # http://review.coreboot.org/blobs 10 | 11 | # Copy the config in 12 | cp ../config/upstream.config coreboot/.config 13 | 14 | # Copy the blobs to the expected place 15 | mkdir -p coreboot/3rdparty/mainboard/google/wolf/ 16 | mkdir -p coreboot/build/wolf/firmware/ 17 | cp ../blobs/flashregion_0_flashdescriptor.bin coreboot/3rdparty/mainboard/google/wolf/descriptor.bin 18 | cp ../blobs/flashregion_2_intel_me.bin coreboot/3rdparty/mainboard/google/wolf/me.bin 19 | 20 | cd coreboot 21 | make 22 | -------------------------------------------------------------------------------- /upstreaming/wolf-upstream.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | # This a record/script for upstreaming Wolf 4 | 5 | # Clone coreboot 6 | git clone http://review.coreboot.org/p/coreboot 7 | cd coreboot 8 | 9 | # Add and fetch Google's remote 10 | git remote add google https://chromium.googlesource.com/chromiumos/third_party/coreboot 11 | git fetch google 12 | 13 | # A mirror of my own to work from, and be able to backup branches to 14 | git remote add marcos git@github.com:marcosscriven/coreboot.git 15 | git fetch marcos 16 | 17 | # Make working branch 18 | git checkout -b add-wolf-to-upstream 19 | 20 | # Google removed the vboot and blob submodules: 21 | # https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/f5ff8221e9894aa9ec7aff71e25cad5090088dc4 22 | # This makes cherry picking subsequent commits *always* have a conflict. See: 23 | # http://git.661346.n2.nabble.com/problem-with-cherry-picking-a-commit-which-comes-before-introducing-a-new-submodule-td5900085.html 24 | # If I rebase the Wolf branch to fix this, cherry picks will have meaningless hashes local to my machine 25 | # Therefore remove these and commit, with the intention of rebasing onto it (to remove it) before pushing with 26 | # git rebase --onto commit-to-remove~ commit-to-remove add-wolf-to-upstream 27 | git rm 3rdparty/blobs 3rdparty/vboot 28 | git commit -am "--- DO NOT MERGE - This is a temporary local commit. ---" 29 | export TEMP_COMMIT=$(git rev-parse HEAD) 30 | 31 | # Cherry pick the first commit for the 'src/mainboard/google/wolf' path 32 | # Don't autocommit because there's a couple of files we don't want in it. 33 | git rev-list --skip 2 --reverse google/firmware-wolf-4389.24.B -- src/mainboard/google/wolf | head -1 | git cherry-pick -n -x --stdin -X ours 34 | 35 | # We don't want these two files, as only Google uses these 36 | git reset HEAD configs/config.wolf payloads/libpayload/configs/config.wolf 37 | rm -rf configs/ payloads/libpayload/configs/config.wolf 38 | 39 | # Commit accepting the default commit message for a cherry pick 40 | git commit --no-edit 41 | 42 | # Do the remainder (tail -n +2 is an arcane way of getting all but the first) 43 | git rev-list --skip 2 --reverse google/firmware-wolf-4389.24.B -- src/mainboard/google/wolf | tail -n +2 | git cherry-pick -x --stdin 44 | 45 | # Done cherry picking, undo my earlier fix 46 | git rebase --onto $TEMP_COMMIT~ $TEMP_COMMIT add-wolf-to-upstream 47 | 48 | # Now there a whole bunch of further commits, but manual inspects show all but two of them are cherry picked, from already upstreamed commits 49 | # There's only two commits remaining that are only in wolf, but not picked up by our cherry picks: 50 | # 4ee486d202423353a07c54000f977f7ac5689455 Delay the setup of pc-beep verbs 51 | # 2b5c5c5795c0c752ae0fdb65e4395217b95972ad Enable 2x Refresh mode 52 | # Both of these refer to 'partner' bug IDs, which I can't see 53 | -------------------------------------------------------------------------------- /webclient/build_webclient.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | SRC_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )/.." 4 | BUILD_DIR=out/webclient 5 | mkdir -p $BUILD_DIR 6 | cd $BUILD_DIR 7 | 8 | echo "Building webclient" 9 | 10 | if [ ! -d coreboot ]; then 11 | mkdir coreboot 12 | wget -O coreboot.tar.gz -q https://chromium.googlesource.com/chromiumos/third_party/coreboot/+archive/chromeos-2016.02.tar.gz 13 | wget -O vboot.tar.gz -q https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+archive/master.tar.gz 14 | tar --touch -xzf coreboot.tar.gz -C coreboot 15 | tar --touch -xzf vboot.tar.gz -C coreboot/3rdparty/vboot 16 | fi 17 | 18 | docker run -v $PWD:/src -t trzeci/emscripten:sdk-tag-1.35.23-64bit /bin/bash -c "$(cat < 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | Coreboot FS 10 | 11 | 12 | 13 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 |

Coreboot File System

28 | 29 |
30 |
31 |
32 |
33 | 34 | 35 | 36 |
37 |
38 | 39 | 40 | 41 |
42 |
43 |
44 |
45 |
46 |
47 |
48 | 49 | 50 | 51 | 52 | 53 | -------------------------------------------------------------------------------- /webclient/client.js: -------------------------------------------------------------------------------- 1 | // Setup the worker 2 | 3 | var myWorker = new Worker("worker.js"); 4 | myWorker.addEventListener('message', resultCallback); 5 | 6 | function resultCallback(msg) { 7 | console.log("Result received from worker"); 8 | 9 | setResult(""); 10 | var stdout = msg.data.stdout; 11 | setRomBlob(msg.data.romBlob); 12 | var rows = d3.csv.parseRows(stdout); 13 | if (!rows[0]) { 14 | print(); 15 | return; 16 | } 17 | 18 | var tbl = d3.select("#resultTable") 19 | .append("table") 20 | .attr("class", "table table-hover table-striped table-bordered") 21 | 22 | // headers 23 | tbl.append("thead").append("tr") 24 | .selectAll("th") 25 | .data(rows[0]) 26 | .enter().append("th") 27 | .text(function(d) { 28 | return d; 29 | }); 30 | 31 | // data 32 | tbl.append("tbody") 33 | .selectAll("tr").data(rows.slice(1)) 34 | .enter().append("tr") 35 | 36 | .selectAll("td") 37 | .data(function(d) { 38 | return d; 39 | }) 40 | .enter().append("td") 41 | .text(function(d) { 42 | return d; 43 | }) 44 | } 45 | 46 | function print() { 47 | runWithArgs("print -k"); 48 | } 49 | 50 | function addItem() { 51 | runWithArgs("add-int -i 0xd091f000 -n etc/sdcard2"); 52 | } 53 | 54 | function removeItem() { 55 | runWithArgs("remove -n etc/sdcard2"); 56 | } 57 | 58 | function runWithArgs(args) { 59 | setResult("Loading..."); 60 | myWorker.postMessage({ 61 | romBlob: romBlob, 62 | args: args 63 | }); 64 | } 65 | 66 | function setResult(value) { 67 | document.getElementById('resultTable').innerHTML = value; 68 | } 69 | 70 | // Manage files 71 | var romBlob; 72 | document.getElementById('files').addEventListener('change', addLocalFile, false); 73 | 74 | function setRomBlob(blob) { 75 | console.log("Loaded ROM with length:" + blob.length); 76 | romBlob = blob; 77 | } 78 | 79 | function addLocalFile(event) { 80 | var file = event.target.files[0]; 81 | console.log("Loading local ROM:" + file.name); 82 | var reader = new FileReader(); 83 | 84 | reader.onload = (function(theFile) { 85 | return function(e) { 86 | setRomBlob(e.target.result); 87 | }; 88 | })(file); 89 | 90 | reader.readAsBinaryString(file); 91 | } 92 | 93 | function updateProgress(evt) 94 | { 95 | if (evt.lengthComputable) 96 | { //evt.loaded the bytes browser receive 97 | //evt.total the total bytes seted by the header 98 | // 99 | var percentComplete = (evt.loaded / evt.total)*100; 100 | console.log("Progress:" + percentComplete); 101 | } 102 | } 103 | 104 | function addRemoteFile() { 105 | var url = document.getElementById('url').value; 106 | console.log("Loading remote ROM:" + url); 107 | url = "https://crossorigin.me/" + url; 108 | 109 | var oReq = new XMLHttpRequest(); 110 | oReq.open("GET", url, true); 111 | oReq.onprogress=updateProgress; 112 | oReq.responseType = "arraybuffer"; 113 | 114 | oReq.onload = function(oEvent) { 115 | var byteArray = new Uint8Array(oReq.response); 116 | setRomBlob(byteArray); 117 | }; 118 | 119 | oReq.send(null); 120 | } 121 | 122 | function onUrlEnter(event) { 123 | if (event.keyCode === 13) { 124 | addRemoteFile(); 125 | } 126 | event.preventDefault(); 127 | return false; 128 | } 129 | -------------------------------------------------------------------------------- /webclient/start.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )" 4 | WEBCLIENT_DIR=$SCRIPT_DIR/../out/webclient 5 | 6 | if [ -f $WEBCLIENT_DIR/server.pid ]; then 7 | pid=$(cat $WEBCLIENT_DIR/server.pid) 8 | echo "Already started:${pid}" 9 | exit 0 10 | fi 11 | 12 | # Link source if necessary 13 | if [ ! -f $WEBCLIENT_DIR/client.html ]; then 14 | ln -s $SCRIPT_DIR/client.html $WEBCLIENT_DIR 15 | ln -s $SCRIPT_DIR/client.js $WEBCLIENT_DIR 16 | ln -s $SCRIPT_DIR/worker.js $WEBCLIENT_DIR 17 | fi 18 | 19 | pushd $WEBCLIENT_DIR 20 | python -m SimpleHTTPServer 8080 > /dev/null 2>&1 & 21 | echo $! > $WEBCLIENT_DIR/server.pid 22 | -------------------------------------------------------------------------------- /webclient/stop.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | 3 | SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )" 4 | WEBCLIENT_DIR=$SCRIPT_DIR/../out/webclient 5 | 6 | if [ ! -f $WEBCLIENT_DIR/server.pid ]; then 7 | echo "Already stopped." 8 | exit 0 9 | fi 10 | 11 | pid=$(cat $WEBCLIENT_DIR/server.pid) 12 | kill -9 $pid 13 | rm $WEBCLIENT_DIR/server.pid 14 | -------------------------------------------------------------------------------- /webclient/worker.js: -------------------------------------------------------------------------------- 1 | console.log("Started worker."); 2 | 3 | var Module = {}; 4 | var result = {}; 5 | 6 | onmessage = function(msg) { 7 | console.log("Run main."); 8 | result = { 9 | stdout: "", 10 | file: "" 11 | }; 12 | var romBlob = msg.data.romBlob; 13 | var args = "rom.bin " + msg.data.args; 14 | var stdout = ""; 15 | 16 | // Emscripten uses 'Module' to both import and export 17 | Module = { 18 | arguments: args.split(" "), 19 | preRun: function download() { 20 | FS.createDataFile('/', "rom.bin", romBlob, true, true); 21 | }, 22 | postRun: function returnResult() { 23 | result['stdout'] = stdout; 24 | result['romBlob'] = FS.readFile('rom.bin'); 25 | self.postMessage(result); 26 | }, 27 | print: function log(text) { 28 | console.log(text) 29 | stdout = stdout + text.split("\t").map(function(v) { 30 | return "\"" + v + "\""; 31 | }).join(",") + "\n"; 32 | }, 33 | printErr: function error(text) { 34 | console.error(text); 35 | } 36 | }; 37 | importScripts("cbfstool.js"); 38 | }; 39 | --------------------------------------------------------------------------------