├── timings.png ├── add-order.png ├── nasdaq-itch-parser.v-template.v ├── nasdaq-itch-tb.v ├── nasdaq-itch-parser.lisp ├── nasdaq-itch-parser.jl ├── readme.org ├── LICENSE └── nasdaq-itch-parser.v /timings.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mbattyani/sub-25-ns-nasdaq-itch-fpga-parser/HEAD/timings.png -------------------------------------------------------------------------------- /add-order.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mbattyani/sub-25-ns-nasdaq-itch-fpga-parser/HEAD/add-order.png -------------------------------------------------------------------------------- /nasdaq-itch-parser.v-template.v: -------------------------------------------------------------------------------- 1 | reg clock; 2 | reg nreset; 3 | reg enable; 4 | reg command_out_tready; 5 | reg ethernet_input_tvalid; 6 | reg ethernet_input_tlast; 7 | reg [3:0] ethernet_input_tkeep; 8 | reg [31:0] ethernet_input_tdata; 9 | reg [31:0] fpga_time; 10 | wire command_out_tvalid; 11 | wire [296:0] command_out_tdata; 12 | wire ethernet_input_tready; 13 | reg [2:0] config_registers_wr_addr; 14 | reg config_registers_wr_en; 15 | reg [31:0] config_registers_wr_data; 16 | reg [2:0] config_registers_rd_addr; 17 | reg [31:0] config_registers_rd_data; 18 | 19 | nasdaq_itch_parser nasdaq_itch_parser ( 20 | .clock(clock), 21 | .nreset(nreset), 22 | .enable(enable), 23 | .command_out_tready(command_out_tready), 24 | .ethernet_input_tvalid(ethernet_input_tvalid), 25 | .ethernet_input_tlast(ethernet_input_tlast), 26 | .ethernet_input_tkeep(ethernet_input_tkeep), 27 | .ethernet_input_tdata(ethernet_input_tdata), 28 | .fpga_time(fpga_time), 29 | .command_out_tvalid(command_out_tvalid), 30 | .command_out_tdata(command_out_tdata), 31 | .ethernet_input_tready(ethernet_input_tready), 32 | .config_registers_wr_addr(config_registers_wr_addr), 33 | .config_registers_wr_en(config_registers_wr_en), 34 | .config_registers_wr_data(config_registers_wr_data), 35 | .config_registers_rd_addr(config_registers_rd_addr), 36 | .config_registers_rd_data(config_registers_rd_data)); 37 | -------------------------------------------------------------------------------- /nasdaq-itch-tb.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 1ps 2 | `define NULL 0 3 | 4 | // A quick simple testbench for the nasdaq-itch-parser 5 | module nasdaq_itch_tb(); 6 | reg clock = 0; 7 | reg nreset = 0; 8 | reg enable = 1; 9 | reg command_out_tready = 1; 10 | wire ethernet_input_tvalid; 11 | wire ethernet_input_tlast; 12 | wire ethernet_input_sop; 13 | wire [3:0] ethernet_input_tkeep; 14 | wire [31:0] ethernet_input_tdata; 15 | reg [31:0] fpga_time; 16 | wire command_out_tvalid; 17 | reg command_out_tvalid_prev; 18 | wire [296:0] command_out_tdata; 19 | wire ethernet_input_tready; 20 | reg [2:0] config_registers_wr_addr = 0; 21 | reg config_registers_wr_en = 0; 22 | reg [31:0] config_registers_wr_data = 0; 23 | reg [2:0] config_registers_rd_addr = 0; 24 | wire [31:0] config_registers_rd_data; 25 | 26 | reg [7:0] msg_type; 27 | reg [63:0] order_ref_number; 28 | reg [63:0] prev_order_ref_number; 29 | reg [15:0] locate; 30 | reg buy_sell; 31 | reg [31:0] price; 32 | reg [31:0] num_shares; 33 | reg [31:0] seqnum32; 34 | reg [47:0] timestamp; 35 | reg sim_done; 36 | reg read_packets = 0; 37 | reg pause = 0; 38 | 39 | 40 | 41 | // The test signals generation 42 | 43 | // The 322.265625 MHz clock 44 | always #1.5515151515151516 clock = ~clock; 45 | 46 | integer dbgfile; 47 | 48 | initial 49 | begin 50 | nreset = 0; 51 | @(posedge clock); 52 | @(posedge clock); 53 | nreset = 1; 54 | dbgfile = $fopen("output.txt","w"); 55 | end 56 | 57 | always @(*) 58 | begin 59 | timestamp = command_out_tdata[47:0]; 60 | seqnum32 = command_out_tdata[79:48]; 61 | num_shares = command_out_tdata[111:80]; 62 | price = command_out_tdata[143:112]; 63 | buy_sell = command_out_tdata[144]; 64 | locate = command_out_tdata[160:145]; 65 | prev_order_ref_number = command_out_tdata[224:161]; 66 | order_ref_number = command_out_tdata[288:225]; 67 | msg_type = command_out_tdata[296:289]; 68 | end 69 | 70 | always @(posedge clock) 71 | begin 72 | if (nreset == 0) 73 | fpga_time <= 0; 74 | else 75 | fpga_time <= fpga_time + 1; 76 | 77 | command_out_tvalid_prev <= command_out_tvalid; 78 | 79 | if (command_out_tvalid && !command_out_tvalid) 80 | begin 81 | $fdisplay(dbgfile, "%d %d %d %d %d %d %d %d %d", msg_type, locate, order_ref_number, prev_order_ref_number, buy_sell, price, num_shares, seqnum32, timestamp); 82 | end 83 | 84 | read_packets <= fpga_time >= 10; 85 | 86 | pause <= (fpga_time < 5) | (fpga_time % 32 == 0); 87 | 88 | end // always @ (posedge clock) 89 | 90 | // You can get pcap_parse here https://github.com/jfzazo/pcapFromVerilog/blob/master/pcap_parse.v 91 | pcap_parse #(.pcap_filename( "nasdaq-sample-packets.pcap"), 92 | .AXIS_WIDTH(32), 93 | .default_ifg(17), 94 | .CLOCK_FREQ_HZ(322265625) 95 | ) pcap (.clk(clock), 96 | .pause(pause), 97 | .ready(ethernet_input_tready), 98 | .valid(ethernet_input_tvalid), 99 | .data(ethernet_input_tdata), 100 | .strb(ethernet_input_tkeep), 101 | .sop(ethernet_input_sop), 102 | .eop(ethernet_input_tlast), 103 | .pcapfinished(pcapfinished)); 104 | 105 | nasdaq_itch_parser nasdaq_itch_parser ( 106 | .clock(clock), 107 | .nreset(nreset), 108 | .enable(enable), 109 | .command_out_tready(command_out_tready), 110 | .ethernet_input_tvalid(ethernet_input_tvalid), 111 | .ethernet_input_tlast(ethernet_input_tlast), 112 | .ethernet_input_tkeep(ethernet_input_tkeep), 113 | .ethernet_input_tdata(ethernet_input_tdata), 114 | .fpga_time(fpga_time), 115 | .command_out_tvalid(command_out_tvalid), 116 | .command_out_tdata(command_out_tdata), 117 | .ethernet_input_tready(ethernet_input_tready), 118 | .config_registers_wr_addr(config_registers_wr_addr), 119 | .config_registers_wr_en(config_registers_wr_en), 120 | .config_registers_wr_data(config_registers_wr_data), 121 | .config_registers_rd_addr(config_registers_rd_addr), 122 | .config_registers_rd_data(config_registers_rd_data)); 123 | 124 | endmodule 125 | -------------------------------------------------------------------------------- /nasdaq-itch-parser.lisp: -------------------------------------------------------------------------------- 1 | (in-package #:hwc) 2 | 3 | (defparameter *nasdaq-itch-5.0-parser* 4 | `((module nasdaq-itch-parser "Extraction and parsing of Nasdaq ITCH 5.0 orders and trade related messages" 5 | :stream-in ethernet-input :stream-out command-out :frequency 322.265625e6) 6 | 7 | ;; The general interface 8 | (input uint32 (fpga-time "The FPGA time counter")) 9 | 10 | ;; The Ethernet AXI input stream interface 11 | (input uint32 ethernet-input-tdata) 12 | (input uint4 ethernet-input-tkeep) 13 | (input bit ethernet-input-tlast ethernet-input-tvalid) 14 | (output bit (ethernet-input-tready :special-use)) 15 | 16 | ;; The commands AXI output stream interface 17 | (input bit command-out-tready) 18 | (output uint297 command-out-tdata) 19 | (output bit command-out-tvalid) 20 | 21 | ;; Let's register the inputs 22 | (setf ethernet-input-tlast (register ethernet-input-tlast)) 23 | 24 | ;; Adding an extra clock cycle after the last word of each packet 25 | (change-execution (after-packet :exec-when ethernet-input-tlast)) 26 | 27 | (setf (var bit start-of-packet) (falling-edge after-packet :initial-value 1)) 28 | 29 | ;; The memory mapped registers interface 30 | (def-mmap-interface config-registers "The config/status registers" :data-width 32 :nb-words 8) 31 | 32 | (with-var-options (:interface config-registers) 33 | (input uint32 (nasdaq-ip-addr :untimed "The IP address of the incoming feed." :initial-value #.(ip32 233 54 12 101))) 34 | (input uint16 (nasdaq-udp-port :untimed "The IP port of the incoming feed." :initial-value 26400))) 35 | 36 | ;;The message parser takes the description of the messages and generates the hardware needed to decode them 37 | (def-message-parser2 parser :data-valid (bit.and (bit.not after-packet) ethernet-input-tvalid) 38 | :sop start-of-packet :tkeep ethernet-input-tkeep :data-in ethernet-input-tdata 39 | :protocol-desc 40 | (;; Ethernet header 41 | (dst-mac uint48) 42 | (src-mac uint48) 43 | (eth-type uint16) 44 | ;;IP header 45 | (version-and-IHL uint8) 46 | (DSCP-ECN uint8) 47 | (total-length uint16) 48 | (identification uint16) 49 | (flags-and-fragment-offset uint16) 50 | (time-to-live uint8) 51 | (protocol uint8) 52 | (header-checksum uint16) 53 | (ip-src-addr uint32) 54 | (ip-dest-addr uint32) 55 | ;; UDP header 56 | (udp-src-port int16) 57 | (udp-dest-port uint16) 58 | (udp-len uint16) 59 | (udp-checksum uint16) 60 | ;; MOLD header 61 | (mold-session uint64) 62 | (mold-session-msb uint16) 63 | (seqnum uint64) 64 | (msg-count uint16) 65 | ;; ITCH 5.0 Messages 66 | (:loop ((msg-length uint16) nil) 67 | (msg-type uint8) 68 | (:case (msg-type) 69 | (83 system-event-message ; S 70 | (locate uint16) 71 | (tracking uint16) 72 | (timestamp uint48) 73 | (event-code uint8)) 74 | (72 stock-trading-action ; H 75 | (locate uint16) 76 | (tracking uint16) 77 | (timestamp uint48) 78 | (symbol uint64) 79 | (trading-state uint8)) 80 | (89 reg-sho ; A 81 | (locate uint16) 82 | (tracking uint16) 83 | (timestamp uint48) 84 | (symbol uint64) 85 | (reg-sho-action uint8)) 86 | (65 add-order ; A 87 | (locate uint16) 88 | (tracking uint16) 89 | (timestamp uint48) 90 | (order-ref-number uint64) 91 | (buy-sell uint8) 92 | (num-shares uint32) 93 | (symbol uint64) 94 | (price uint32)) 95 | (70 add-order-with-mpid ; F 96 | (locate uint16) 97 | (tracking uint16) 98 | (timestamp uint48) 99 | (order-ref-number uint64) 100 | (buy-sell uint8) 101 | (num-shares uint32) 102 | (symbol uint64) 103 | (price uint32) 104 | (attribution uint32)) 105 | (85 order-replace ; U 106 | (locate uint16) 107 | (tracking uint16) 108 | (timestamp uint48) 109 | (prev-order-ref-number uint64) 110 | (order-ref-number uint64) 111 | (num-shares uint32) 112 | (price uint32)) 113 | (69 order-executed ; E 114 | (locate uint16) 115 | (tracking uint16) 116 | (timestamp uint48) 117 | (order-ref-number uint64) 118 | (num-shares uint32) 119 | (match-number uint64)) 120 | (67 order-executed-with-price ; C 121 | (locate uint16) 122 | (tracking uint16) 123 | (timestamp uint48) 124 | (order-ref-number uint64) 125 | (num-shares uint32) 126 | (match-number uint64) 127 | (printable uint8) 128 | (price uint32)) 129 | (88 order-cancel ; X 130 | (locate uint16) 131 | (tracking uint16) 132 | (timestamp uint48) 133 | (order-ref-number uint64) 134 | (num-shares uint32)) 135 | (68 order-delete ; D 136 | (locate uint16) 137 | (tracking uint16) 138 | (timestamp uint48) 139 | (order-ref-number uint64)) 140 | (80 trade ; P 141 | (locate uint16) 142 | (tracking uint16) 143 | (timestamp uint48) 144 | (order-ref-number uint64) 145 | (buy-sell uint8) 146 | (num-shares uint32) 147 | (symbol uint64) 148 | (price uint32) 149 | (match-number uint64)) 150 | (81 cross-trade ; Q 151 | (locate uint16) 152 | (tracking uint16) 153 | (timestamp uint48) 154 | (num-shares-msb uint32) 155 | (num-shares uint32) 156 | (price uint32) 157 | (match-number uint64) 158 | (cross-type uint8)))))) 159 | 160 | ;; Computes the global message seqnum for each message 161 | (def-counter seqnum32 32 :increment msg-type-sync :enable ethernet-input-tvalid :clear (delay seqnum-sync 3) :reset-value seqnum) 162 | 163 | ;; Only accepts the packets which don't have the correct IP addresse and port 164 | (setf (var bit packet-ok) (bit.and (= ip-dest-addr nasdaq-ip-addr) (= udp-dest-port nasdaq-udp-port))) 165 | 166 | ;; Stores various event codes into num-shares to reduce the AXI stream width 167 | (setf num-shares (case-expr msg-type 168 | (83 event-code) 169 | (72 trading-state) 170 | (89 reg-sho-action) 171 | (:default num-shares))) 172 | 173 | ;; Bundles the output into the command_out AXI4 stream data 174 | (setf command-out-tdata (concat msg-type 175 | order-ref-number 176 | prev-order-ref-number 177 | locate 178 | (= buy-sell #.(char-code #\B)) 179 | price 180 | num-shares 181 | seqnum32 182 | timestamp)) 183 | 184 | (setf command-out-tvalid (bit.and packet-ok 185 | (bit.or price-sync event-code-sync trading-state-sync reg-sho-action-sync 186 | (bit.and (bit.or (= msg-type 69) (= msg-type 88)) num-shares-sync)))))) 187 | 188 | ;;; generates the Verilog file 189 | (compile-to-verilog *nasdaq-itch-5.0-parser* 190 | :verilog-file (merge-pathnames "nasdaq-itch-parser.v" *load-pathname*)) 191 | -------------------------------------------------------------------------------- /nasdaq-itch-parser.jl: -------------------------------------------------------------------------------- 1 | hw_module(nasdaq_itch_parser, "Extraction and parsing of Nasdaq ITCH 5.0 orders and trade related messages", 2 | stream_in = ethernet_input, stream_out = command_out, frequency = 322.265625e6); 3 | 4 | # The general interface 5 | @input::uint32 fpga-time::("The FPGA time counter") 6 | 7 | # The Ethernet AXI input stream interface 8 | @input::uint32 ethernet_input_tdata; 9 | @input::uint4 ethernet_input_tkeep; 10 | @input::bit ethernet_input_tlast ethernet_input_tvalid; 11 | @output::bit ethernet_input_tready::special_use; 12 | 13 | # The commands AXI output stream interface 14 | @input command_out_tready::bit; 15 | @output command_out_tdata::uint297; 16 | @output command_out_tvalid::bit; 17 | 18 | # Let's register the inputs 19 | ethernet_input_tlast = register(ethernet_input_tlast); 20 | 21 | # Adding an extra clock cycle after the last word of each packet 22 | change_execution((after_packet, :exec_when, ethernet_input_tlast)); 23 | 24 | start_of_packet::bit = falling_edge(after_packet, initial_value = 1); 25 | 26 | # The memory mapped registers interface 27 | def_mmap_interface(config_registers, "The config/status registers", data_width = 32, nb_words = 8); 28 | 29 | @with_var_options (interface = config_registers) begin 30 | @input::uint32 nasdaq_ip_addr::(:untimed, "The IP address of the incoming NASDAQ feed.", :initial_value = 0xE9360C65); 31 | @input::uint16 nasdaq_udp_port::(:untimed, "The IP port of the incoming NASDAQ feed.", :initial_value = 26400); 32 | end; 33 | 34 | # The message parser takes the description of the messages and generates the hardware needed to decode them 35 | def_message_parser2(parser, sop = start_of_packet, data_valid = ~after_packet & ethernet_input_tvalid 36 | ,tkeep = ethernet_input_tkeep, data_in = ethernet_input_tdata, 37 | protocol_desc = 38 | ( 39 | # Ethernet header 40 | dst_mac::uint48, 41 | src_mac::uint48, 42 | eth_type::uint16, 43 | # IP header 44 | version_and_IHL::uint8, 45 | DSCP_ECN::uint8, 46 | total_length::uint16, 47 | identification::uint16, 48 | flag_-and_fragment_offset::uint16, 49 | time_to_live::uint8, 50 | protocol::uint8, 51 | header_checksum::uint16, 52 | ip_src_addr::uint32, 53 | ip_dest_addr::uint32, 54 | # UDP header 55 | udp_src_port::uint16, 56 | udp_dest_port::uint16, 57 | udp_len::uint16, 58 | udp_checksum::uint16, 59 | # MOLD header 60 | mold_session::uint64, 61 | mold_session_msb::uint16, 62 | seqnum::uint64, 63 | msg_count::uint16, 64 | # ITCH 5.0 Messages 65 | (:loop, (msg_length::uint16, :nil), 66 | msg_type::uint8, 67 | (:case, (msg_type), 68 | (83, system_event_message, # S 69 | locate::uint16, 70 | tracking::uint16, 71 | timestamp::uint48, 72 | event_code::uint8), 73 | (72, stock_trading_action, # H 74 | locate::uint16, 75 | tracking::uint16, 76 | timestamp::uint48, 77 | symbol::uint64, 78 | trading_state::uint8), 79 | (89, reg_sho, # Y 80 | locate::uint16, 81 | tracking::uint16, 82 | timestamp::uint48, 83 | symbol::uint64, 84 | reg_sho_action::uint8), 85 | (65, add_order, # A 86 | locate::uint16, 87 | tracking::uint16, 88 | timestamp::uint48, 89 | order_ref_number::uint64, 90 | buy_sell::uint8, 91 | num_shares::uint32, 92 | symbol::uint64, 93 | price::uint32), 94 | (70, add_order_with_mpid, # F 95 | locate::uint16, 96 | tracking::uint16, 97 | timestamp::uint48, 98 | order_ref_number::uint64, 99 | buy_sell::uint8, 100 | num_shares::uint32, 101 | symbol::uint64, 102 | price::uint32, 103 | attribution::uint32), 104 | (85, order_replace, # U 105 | locate::uint16, 106 | tracking::uint16, 107 | timestamp::uint48, 108 | prev_order_ref_number::uint64, 109 | order_ref_number::uint64, 110 | num_shares::uint32, 111 | price::uint32), 112 | (69, order_executed, # E 113 | locate::uint16, 114 | tracking::uint16, 115 | timestamp::uint48, 116 | order_ref_number::uint64, 117 | num_shares::uint32, 118 | match_number::uint64), 119 | (67, order_executed_with_price, # C 120 | locate::uint16, 121 | tracking::uint16, 122 | timestamp::uint48, 123 | order_ref_number::uint64, 124 | num_shares::uint32, 125 | match_number::uint64, 126 | printable::uint8, 127 | price::uint32), 128 | (88, order_cancel, # X 129 | locate::uint16, 130 | tracking::uint16, 131 | timestamp::uint48, 132 | order_ref_number::uint64, 133 | num_shares::uint32), 134 | (68, order_delete, # D 135 | locate::uint16, 136 | tracking::uint16, 137 | timestamp::uint48, 138 | order_ref_number::uint64), 139 | (80, trade, # P 140 | locate::uint16, 141 | tracking::uint16, 142 | timestamp::uint48, 143 | order_ref_number::uint64, 144 | buy_sell::uint8, 145 | num_shares::uint32, 146 | symbol::uint64, 147 | price::uint32, 148 | match_number::uint64), 149 | (81, cross_trade, # Q 150 | locate::uint16, 151 | tracking::uint16, 152 | timestamp::uint48, 153 | num_shares_msb::uint32, 154 | num_shares::uint32, 155 | price::uint32, 156 | match_number::uint64, 157 | cross_type::uint8))))); 158 | 159 | # Computes the global message seqnum for each message 160 | def_counter(seqnum32::32, increment = msg_type_sync, enable = ethernet_input_tvalid, clear = delay(seqnum_sync, 3), reset_value = seqnum); 161 | 162 | # Only accepts the packets which don't have the correct IP addresse and port 163 | packet_ok::bit = (ip_dest_addr == nasdaq_ip_addr) & (udp_dest_port == nasdaq_udp_port); 164 | 165 | # Stores various event codes into num_shares to reduce the AXI stream width 166 | num_shares = case_expr(msg_type, ((83, event_code), (72, trading_state), (89, reg_sho_action), (:default, num_shares))) 167 | 168 | # Bundles the output into the command_out AXI4 stream data 169 | command_out_tdata = register(concat(msg_type, order_ref_number, prev_order_ref_number, locate, 170 | buy_sell == 66, price, num_shares, seqnum32, 171 | timestamp)); 172 | 173 | # Computes when the command out is valid 174 | command_out_tvalid = packet_ok & (price_sync | event_code_sync | trading_state_sync | reg_sho_action_sync | 175 | ((msg_type == 69) | (msg_type == 88)) & num_shares_sync); 176 | -------------------------------------------------------------------------------- /readme.org: -------------------------------------------------------------------------------- 1 | #+TITLE: A sub 25 nanoseconds Open Source NASDAQ ITCH FPGA Parser 2 | #+OPTIONS: num:nil 3 | #+author: Marc Battyani 4 | #+date: 2021 5 | #+language: en 6 | 7 | #+BEGIN_QUOTE 8 | Copyright (C) 2021 Marc Battyani 9 | 10 | You can redistribute this document and/or modify it under the terms of the GNU 11 | General Public License as published by the Free Software Foundation, either 12 | version 3 of the License, or (at your option) any later version. 13 | 14 | This document is distributed in the hope that it will be useful, 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 | General Public License for more details. 18 | #+END_QUOTE 19 | 20 | #+BEGIN_abstract 21 | That's as fast as going through 5m (16.4ft) of optical fiber cable 22 | #+END_abstract 23 | 24 | 25 | * Disclaimer 26 | This is a personal blog post and the opinions expressed here are only my own. 27 | 28 | * Part I - The NASDAQ ITCH Parser Description 29 | 30 | People familiar with FPGA market data feed handlers can skip Part I and go directly to the more technical Part II 31 | 32 | ** Introduction 33 | There has been a lot of discussions about high frequency trading but so far there has been almost no public information and even less open source code on how FPGA market data feed handlers works and what performance they can achieve. 34 | 35 | The first 100% pure FPGA market data feed handler was invented in 2008 by myself at NovaSparks, the company I created that same year to commercialize it. 36 | 37 | It was for the EUREX stock exchange with a record low latency for the time of 1.4 microseconds. Since then the market data feeds have increased from 1 to 10+ Gbit/s and the latencies have decreased to a few 100's of nanoseconds. 38 | 39 | To fill that void, I’ve decided to share this document and associated code for a fully working sub 25 nanoseconds Open Source NASDAQ ITCH FPGA Parser. 40 | 41 | ** What is this market data parser doing? 42 | 1. The exchange (NASDAQ here) 43 | - Manages the order books, execute the trades, etc. 44 | - Encodes any changes in orders, trades, stock status, etc. into ITCH protocol messages 45 | - These messages are then aggregated into packets 46 | - Those packets are sent into a 10Gbit/s Ethernet connections with the IP multicast protocol 47 | 1. The market data processing FPGA is directly connected to the 10Gb/s Ethernet 48 | - A standard Ethernet core transforms the Ethernet data into an AXI stream of 32 bits words at 322.27MHz 49 | 1. This NASDAQ ITCH parser inside that FPGA 50 | - Takes that AXI stream of Ethernet data 51 | - Decodes the Ethernet and IP Multicast headers and filters out unrelated Ethernet packets 52 | - Parses and extract all the ITCH messages needed for ultra low latency trading (orders, trades, various events and actions) 53 | - Skips some information messages which are not useful for trading 54 | - Aggregates the message data into 297 bit wide commands 55 | - Transmits these commands in 1 clock cycle to the next FPGA cores as a AXI stream 56 | - All that is fully pipelined and takes 8 clock cycles that is 24.8 nanoseconds 57 | 58 | ** How fast is it? - As fast as going through 5 meters (16.4 ft) of cable 59 | In FPGA designs there are 2 important parameters: Bandwidth and pipeline latency 60 | 61 | The bandwidth is easy; it's how much data we get per second. Here we get that data from a 10Gbit/s Ethernet connection which is 1.25 GBytes/s. For instance a 125 bytes packet (1000 bits) is transmitted in 100 nanoseconds. 62 | 63 | Latency is how long it takes for the command to be output from the time the data has arrived. The reason why it's a little bit more tricky is that as we are decoding the data from the 10Gbit/s Ethernet connection as soon as we get those bytes and we don't even wait for the end of the packet. Thus we can't measure the latency from the time the packet has arrived because we have already decoded and output the commands on the fly while the packet bytes were arriving. 64 | 65 | Here we measure the latency from the arrival of the last byte of a message to the output of the decoded command and it is 8 clock cycles at 322MHz which is 24.8 nanoseconds. Indeed that design is fully pipelined that means that it will input 4 bytes of data at each clock cycle and always deliver the decoded command exactly 8 clock cycles later. 66 | 67 | *As an illustration of how fast that 24.8ns is, the light can only travel by around 7.45 meters (24.44 ft) in that time. In an optical fiber cable the speed of light is around 30% slower and 24.8ns is equivalent to 5 meters (16.4 ft) of cable.* 68 | 69 | [[./timings.png]] 70 | On that simulation the first cursor is where the price arrives in the incoming ethernet packet and the second cursor (24.8ns later) is when that price is fully decoded and output to the next core. 71 | 72 | ** The following stages of the trading pipeline 73 | Once the messages have been decoded into commands the next stages can vary a lot depending on the application. The commands can be used to build the order book, to compute various indicators or indexes and to trigger actions. That second stage typically has a latency of a few 10's of ns too. 74 | 75 | The last stage would be to send orders to the exchanges. The latency of that stage depends on the exchange protocols, the checks and controls, etc. 76 | 77 | The full trading loop can be as fast as a few 100's of nanoseconds 78 | 79 | * Part II - The code for that FPGA parser 80 | ** The need for a specialized compiler 81 | Programming FPGAs is hard and complex. Typical code for FPGA is mostly written in languages with a very low level of abstraction like VHDL and verilog which work at the wire, signal and clock level. Here is a typical example of verilog: 82 | 83 | #+begin_src verilog 84 | wire reset; 85 | wire clock; 86 | reg [31:0] fpga_time; 87 | 88 | always @(posedge clock) 89 | begin 90 | if (reset) 91 | fpga_time <= 0; 92 | else 93 | fpga_time <= fpga_time + 1; 94 | end; 95 | #+end_src 96 | 97 | Writing parsers, hash tables and data processing core with those languages is time consuming and error prone. When I wrote the first full FPGA feed handler in 2008 I started to write the decoding of a few messages in VHDL but soon realized it would be much better to have a compiler specialized for that kind of FPGA applications. 98 | 99 | The idea is to have a compiler that can directly take a description of the messages and automatically generates the verilog or VHDL needed to decode them. 100 | 101 | For instance this is the "add order" message as given in the [[http://www.nasdaqtrader.com/content/technicalsupport/specifications/dataproducts/NQTVITCHSpecification_5.0.pdf][NASDAQ ITCH 5.0 specification]]: 102 | #+CAPTION: TBD 103 | [[./add-order.png]] 104 | 105 | And here is the description of that "add order" message for the compiler: 106 | #+begin_src julia 107 | (65, add_order, # A 108 | locate::uint16, 109 | tracking::uint16, 110 | timestamp::uint48, 111 | order_ref_number::uint64, 112 | buy_sell::uint8, 113 | num_shares::uint32, 114 | Symbol::uint64, 115 | price::uint32), 116 | #+end_src 117 | 118 | ** The full code of the FPGA parser 119 | That parser is written using the 4th generation of Fractal's Hardware Compiler which is a new compiler platform built from scratch since 2014. It is written in Common Lisp but can take inputs in the Julia syntax in addition to the Lisp one. 120 | 121 | The code commented below is in the Julia syntax but both versions are on GitHub. 122 | - [[./nasdaq-itch-parser.jl][Julia syntax version]] 123 | - [[./nasdaq-itch-parser.lisp][Common Lisp version]] 124 | 125 | 126 | First we declare an hardware module named nasdaq_itch_parser that takes an input data stream named ethernet_input and an output stream named command_out. That core will work at 322.265 MHz 127 | 128 | #+begin_src julia 129 | hw_module(nasdaq_itch_parser, "Extraction and parsing of Nasdaq ITCH 5.0 orders and trade related messages", 130 | stream_in = ethernet_input, stream_out = command_out, frequency = 322.265625e6); 131 | #+end_src 132 | 133 | The Ethernet AXI input stream interface definition 134 | 135 | #+begin_src julia 136 | @input::uint32 ethernet_input_tdata; 137 | @input::uint4 ethernet_input_tkeep; 138 | @input::bit ethernet_input_tlast ethernet_input_tvalid; 139 | @output::bit ethernet_input_tready::special_use; 140 | #+end_src 141 | 142 | The commands AXI output stream interface definition 143 | 144 | #+begin_src julia 145 | @input command_out_tready::bit; 146 | @output command_out_tdata::uint297; 147 | @output command_out_tvalid::bit; 148 | #+end_src 149 | 150 | Let's register the inputs to have a clean input. Note that we only register one signal of the interface but the compiler will automatically register them all 151 | 152 | #+begin_src julia 153 | ethernet_input_tlast = register(ethernet_input_tlast); 154 | #+end_src 155 | 156 | Adding an extra clock cycle after the last word of each packet to be able to output the last command of a packet 157 | 158 | #+begin_src julia 159 | change_execution((after_packet, :exec_when, ethernet_input_tlast)); 160 | #+end_src 161 | 162 | Let's find the start of a packet 163 | 164 | #+begin_src julia 165 | start_of_packet::bit = falling_edge(after_packet, initial_value = 1); 166 | #+end_src 167 | 168 | The memory mapped registers interface is used to give some parameters like the IP address and port of the NASDAQ Ethernet data feed. 169 | 170 | #+begin_src julia 171 | def_mmap_interface(config_registers, "The config/status registers", data_width = 32, nb_words = 8); 172 | 173 | @with_var_options (interface = config_registers) begin 174 | @input::uint32 nasdaq_ip_addr::(:untimed, "The IP address of the incoming NASDAQ feed.", :initial_value = 0xE9360C65); 175 | @input::uint16 nasdaq_udp_port::(:untimed, "The IP port of the incoming NASDAQ feed.", :initial_value = 26400); 176 | end; 177 | #+end_src 178 | 179 | Then we can use the *def_message_parser2* macro to define the Ethernet and IP headers followed by the ITCH messages 180 | #+begin_src julia 181 | def_message_parser2(parser, sop = start_of_packet, 182 | data_valid = ~after_packet & ethernet_input_tvalid, 183 | tkeep = ethernet_input_tkeep, data_in = ethernet_input_tdata, 184 | protocol_desc = 185 | ( 186 | # Ethernet header 187 | dst_mac::uint48, 188 | src_mac::uint48, 189 | eth_type::uint16, 190 | # IP header 191 | version_and_IHL::uint8, 192 | DSCP_ECN::uint8, 193 | total_length::uint16, 194 | time_to_live::uint8, 195 | protocol::uint8, 196 | header_checksum::uint16, 197 | ip_src_addr::uint32, 198 | ip_dest_addr::uint32, 199 | # UDP header 200 | udp_src_port::uint16, 201 | udp_dest_port::uint16, 202 | udp_len::uint16, 203 | udp_checksum::uint16, 204 | # MOLD header 205 | mold_session::uint64, 206 | mold_session_msb::uint16, 207 | seqnum::uint64, 208 | msg_count::uint16, 209 | # ITCH 5.0 Messages 210 | (:loop, (msg_length::uint16, :nil), 211 | msg_type::uint8, 212 | (:case, (msg_type), 213 | (83, system_event_message, # S 214 | locate::uint16, 215 | tracking::uint16, 216 | timestamp::uint48, 217 | event_code::uint8), 218 | (72, stock_trading_action, # H 219 | locate::uint16, 220 | tracking::uint16, 221 | timestamp::uint48, 222 | symbol::uint64, 223 | trading_state::uint8), 224 | (89, reg_sho, # Y 225 | locate::uint16, 226 | tracking::uint16, 227 | timestamp::uint48, 228 | symbol::uint64, 229 | reg_sho_action::uint8), 230 | (65, add_order, # A 231 | locate::uint16, 232 | tracking::uint16, 233 | timestamp::uint48, 234 | order_ref_number::uint64, 235 | buy_sell::uint8, 236 | num_shares::uint32, 237 | symbol::uint64, 238 | price::uint32), 239 | (70, add_order_with_mpid, # F 240 | locate::uint16, 241 | tracking::uint16, 242 | timestamp::uint48, 243 | order_ref_number::uint64, 244 | buy_sell::uint8, 245 | num_shares::uint32, 246 | symbol::uint64, 247 | price::uint32, 248 | attribution::uint32), 249 | (85, order_replace, # U 250 | locate::uint16, 251 | tracking::uint16, 252 | timestamp::uint48, 253 | prev_order_ref_number::uint64, 254 | order_ref_number::uint64, 255 | num_shares::uint32, 256 | price::uint32), 257 | (69, order_executed, # E 258 | locate::uint16, 259 | tracking::uint16, 260 | timestamp::uint48, 261 | order_ref_number::uint64, 262 | num_shares::uint32, 263 | match_number::uint64), 264 | (67, order_executed_with_price, # C 265 | locate::uint16, 266 | tracking::uint16, 267 | timestamp::uint48, 268 | order_ref_number::uint64, 269 | num_shares::uint32, 270 | match_number::uint64, 271 | printable::uint8, 272 | price::uint32), 273 | (88, order_cancel, # X 274 | locate::uint16, 275 | tracking::uint16, 276 | timestamp::uint48, 277 | order_ref_number::uint64, 278 | num_shares::uint32), 279 | (68, order_delete, # D 280 | locate::uint16, 281 | tracking::uint16, 282 | timestamp::uint48, 283 | order_ref_number::uint64), 284 | (80, trade, # P 285 | locate::uint16, 286 | tracking::uint16, 287 | timestamp::uint48, 288 | order_ref_number::uint64, 289 | buy_sell::uint8, 290 | num_shares::uint32, 291 | symbol::uint64, 292 | price::uint32, 293 | match_number::uint64), 294 | (81, cross_trade, # Q 295 | locate::uint16, 296 | tracking::uint16, 297 | timestamp::uint48, 298 | num_shares_msb::uint32, 299 | num_shares::uint32, 300 | price::uint32, 301 | match_number::uint64, 302 | cross_type::uint8))))); 303 | 304 | #+end_src 305 | 306 | That's all there is to do to decode the Ethernet packet and the messages! 307 | 308 | Computes the global exchange seqnum for each message with a counter 309 | 310 | #+begin_src julia 311 | def_counter(seqnum32::32, increment = msg_type_sync, enable = ethernet_input_tvalid, clear = delay(seqnum_sync, 3), reset_value = seqnum); 312 | #+end_src 313 | 314 | Only accepts the packets which have the correct IP address and port 315 | #+begin_src julia 316 | packet_ok::bit = (ip_dest_addr == nasdaq_ip_addr) & (udp_dest_port == nasdaq_udp_port); 317 | #+end_src 318 | 319 | Stores various event codes into num_shares to reduce the AXI stream width 320 | #+begin_src julia 321 | num_shares = case_expr(msg_type, ((83, event_code), (72, trading_state), (89, reg_sho_action), (:default, num_shares))) 322 | #+end_src 323 | 324 | Bundles the output into the command_out AXI4 stream data 325 | #+begin_src julia 326 | command_out_tdata = register(concat(msg_type, order_ref_number, prev_order_ref_number, locate, buy_sell == 66, price, num_shares, seqnum32, timestamp)); 327 | #+end_src 328 | 329 | And finally the last step is to compute when the command out is valid 330 | #+begin_src julia 331 | command_out_tvalid = packet_ok & (price_sync | event_code_sync | trading_state_sync | reg_sho_action_sync | ((msg_type == 69) | (msg_type == 88)) & num_shares_sync); 332 | #+end_src 333 | Done! From that the Fractal Compiler will generate a verilog core that can be used in the final FPGA design. 334 | 335 | * Conclusion 336 | Hopefully this post has been helpful to explain how fast the ultra-low latency pure FPGA based trading systems are. 337 | 338 | The number to remember here is that at less than 25 nanoseconds it's as fast as a 5 meters (16 ft) of cable so keep cabling short. 339 | 340 | At that time the compiler is not publicly available but we use it daily at Fractal Scientific to make FPGA designs for our customers as well as our own sensor designs. 341 | 342 | More information at [[https://www.fractalscientific.com/fpga.html][Fractal Scientific]] 343 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 3, 29 June 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | Preamble 9 | 10 | The GNU General Public License is a free, copyleft license for 11 | software and other kinds of works. 12 | 13 | The licenses for most software and other practical works are designed 14 | to take away your freedom to share and change the works. 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But first, please read 674 | . 675 | -------------------------------------------------------------------------------- /nasdaq-itch-parser.v: -------------------------------------------------------------------------------- 1 | // This verilog file has been generated by cl-hwc, Fractal's Hardware Compiler. 2 | // Please do not modify. Eventual issues must be fixed in the source code or 3 | // in the compiler. 4 | 5 | module nasdaq_itch_parser( 6 | (* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 clock CLK" *) 7 | (* X_INTERFACE_PARAMETER = "ASSOCIATED_BUSIF ethernet_input:command_out, ASSOCIATED_ASYMC_RESET nreset, ASSOCIATED_CLKEN enable, FREQ_HZ 322265625" *) 8 | input wire clock, 9 | (* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 nreset RST" *) 10 | (* X_INTERFACE_PARAMETER = "POLARITY ACTIVE_LOW" *) 11 | input wire nreset, 12 | (* X_INTERFACE_INFO = "xilinx.com:signal:clockenable:1.0 enable CE" *) 13 | (* X_INTERFACE_PARAMETER = "POLARITY ACTIVE_HIGH" *) 14 | input wire enable, 15 | input wire command_out_tready, 16 | input wire ethernet_input_tvalid, 17 | input wire ethernet_input_tlast, 18 | input wire [3:0] ethernet_input_tkeep, 19 | input wire [31:0] ethernet_input_tdata, 20 | input wire [31:0] fpga_time, 21 | output wire command_out_tvalid, 22 | output wire [296:0] command_out_tdata, 23 | output wire ethernet_input_tready, 24 | input wire [2:0] config_registers_wr_addr, 25 | input wire config_registers_wr_en, 26 | input wire [31:0] config_registers_wr_data, 27 | input wire [2:0] config_registers_rd_addr, 28 | output wire [31:0] config_registers_rd_data); 29 | 30 | reg mvcueuumvm = 0, muavmvveum = 0, mcvawaanam = 0, maucnccwcm = 0; 31 | reg [11:0] mmneuemnmm = 0; 32 | reg [1:0] mwencnwewm = 0; 33 | reg [1:0] mwencnwenm = 0; 34 | reg [11:0] maucncawum = 0; 35 | reg [1:0] mcvawacncm = 0; 36 | reg [1:0] mcvawacnam = 0; 37 | reg [3:0] mwencnnacm = 0; 38 | reg [3:0] muavmvvcum = 0; 39 | reg mnmwawnmnm = 0; 40 | reg [15:0] mnmwawnacm = 0; 41 | reg maucncawam = 0; 42 | reg [15:0] mnmwawncwm = 0; 43 | reg mvcueuvcvm = 0; 44 | reg mewmvmeuem = 0; 45 | reg muavmvuaum = 0; 46 | reg mmneuemvmm = 0; 47 | reg mcvawacvam = 0; 48 | reg mnmwawncnm = 0; 49 | reg maucncaucm = 0; 50 | reg mwencnwawm = 0; 51 | reg mmneuemnem = 0; 52 | reg mvcueuvmvm = 0; 53 | reg [15:0] mvcueuvemm = 0; 54 | reg [15:0] mvcueuvmum = 0; 55 | reg [15:0] mcvawamncm = 0; 56 | reg muavmvweum = 0; 57 | reg maucncewam = 0; 58 | reg [15:0] mcvawamnam = 0; 59 | reg [7:0] mewmvmnvnm = 0; 60 | reg [63:0] mmneuewuwm = 0; 61 | reg [31:0] mcvawauwam = 0; 62 | reg [47:0] mewmvmnvmm = 0; 63 | reg [63:0] maucncvnvm = 0; 64 | reg mcvawauwum = 0; 65 | reg [31:0] maucncvncm = 0; 66 | reg mnmwaweawm = 0; 67 | reg [31:0] mmneuewuem = 0; 68 | reg [296:0] mcvawaaunm = 0; 69 | reg [296:0] mewmvmannm = 0; 70 | reg maucnccwvm = 0, mcvawaanum = 0, muavmvveam = 0, mvcueuumcm = 0; 71 | (* preserve *) 72 | (* keep="true" *) 73 | reg mcvawamumm = 0; 74 | reg [14:0] mvcueunccm = 0; 75 | reg mwencnumum = 0; 76 | reg mcvawamuam = 0; 77 | reg mnmwawvewm = 0; 78 | reg muavmvwcvm = 0; 79 | reg maucncevcm = 0; 80 | reg [14:0] mnmwawummm = 0; 81 | reg [14:0] mwencnueem = 0; 82 | reg [14:0] mnmwawvmmm = 0; 83 | reg muavmvwnwm = 0; 84 | reg mmneuecaam = 0; 85 | reg [13:0] mcvawameam = 0; 86 | reg mwencnuvum = 0; 87 | reg muavmvwnum = 0; 88 | reg mwencnuvvm = 0; 89 | reg [13:0] mvcueunwvm = 0; 90 | reg [31:0] mwencnnaum = 0; 91 | reg mcvawauwcm = 0; 92 | reg [3:0] mvcueuumnm = 0; 93 | reg muavmvvewm = 0; 94 | reg mnmwawwcvm = 0; 95 | reg reset = 0; 96 | reg muavmvveem = 0, mvcueuummm = 0, mcvawaannm = 0, maucnccwwm = 0; 97 | reg mmneueevem = 0; 98 | reg mwencnnanm = 0, mnmwawwcwm = 0, mewmvmmumm = 0; 99 | reg muavmvvevm = 0, mvcueuumum = 0, mewmvmmuam = 0; 100 | reg [31:0] config_registers_rd_data_reg = 0; 101 | reg [13:0] mvcueuneam = 0; 102 | reg maucnceenm = 0; 103 | reg [15:0] nasdaq_udp_port = 0; 104 | reg mwencnuucm = 0; 105 | reg [31:0] nasdaq_ip_addr = 0; 106 | reg muavmvwwmm = 0; 107 | reg [31:0] muavmvcmvm = 0; 108 | reg mvcueuaeum = 0; 109 | reg [3:0] maucncvnam = 0; 110 | reg mnmwawwcem = 0, mwencnnamm = 0, mewmvmmunm = 0, mmneueevwm = 0; 111 | (* preserve *) 112 | (* keep="true" *) 113 | reg mvcueunamm = 0; 114 | reg signed [1:0] mmneueewam = 0; 115 | reg mewmvmanum = 0; 116 | reg signed [1:0] mmneueewum = 0; 117 | reg mwencnumcm = 0; 118 | reg signed [2:0] mwencnumcm__0 = 0; 119 | reg mvcueunaem = 0; 120 | reg maucncevem = 0; 121 | reg mewmvmanvm = 0; 122 | reg muavmvwnnm = 0; 123 | reg maucncemem = 0; 124 | reg mewmvmacam = 0; 125 | reg mvcueunwnm = 0; 126 | reg mcvawamemm = 0; 127 | reg [31:0] mnmwawvuum = 0; 128 | reg [3:0] mewmvmaccm = 0; 129 | reg mmneuecacm = 0; 130 | reg mnmwawvuvm = 0; 131 | reg mmneueevvm = 0, mewmvmmuum = 0, mvcueuumam = 0, muavmvvecm = 0; 132 | (* preserve *) 133 | (* keep="true" *) 134 | reg mcvawamuum = 0; 135 | reg muavmvwwem = 0; 136 | reg [31:0] mmneueevcm = 0; 137 | reg maucnccwem = 0; 138 | reg [3:0] mcvawaanmm = 0; 139 | reg mwencnnaem = 0, mnmwawwcmm = 0, mmneueevnm = 0, mewmvmmuwm = 0; 140 | reg [11:0] mewmvmcwwm = 0; 141 | reg [1:0] maucncmuum = 0; 142 | reg [1:0] mewmvmcwvm = 0; 143 | reg [3:0] muavmvvcvm = 0; 144 | reg [11:0] muavmvwamm = 0; 145 | reg [1:0] mcvawamvwm = 0; 146 | reg [11:0] mmneuecnam = 0; 147 | reg [1:0] mcvawamvem = 0; 148 | reg [11:0] mnmwawvmwm = 0; 149 | reg [1:0] mvcueuncum = 0; 150 | reg [11:0] maucncmcem = 0; 151 | reg [1:0] mvcueuwunm = 0; 152 | reg [11:0] mmneueaeum = 0; 153 | reg [1:0] mnmwawuwcm = 0; 154 | reg [11:0] mmneueaenm = 0; 155 | reg [1:0] mcvawaeavm = 0; 156 | reg [11:0] mewmvmcecm = 0; 157 | reg [1:0] maucncmamm = 0; 158 | reg [11:0] mmneueamvm = 0; 159 | reg [1:0] mnmwawunam = 0; 160 | reg [11:0] mwencnvwmm = 0; 161 | reg [1:0] mmneueamwm = 0; 162 | reg [11:0] maucncmmam = 0; 163 | reg [1:0] mewmvmccem = 0; 164 | reg [11:0] mmneueaawm = 0; 165 | reg [1:0] mcvawaeeum = 0; 166 | reg [11:0] muavmvnnem = 0; 167 | reg [1:0] mcvawaeenm = 0; 168 | reg [11:0] mwencnvuum = 0; 169 | reg [1:0] maucncmecm = 0; 170 | reg [11:0] mmneueacnm = 0; 171 | reg [1:0] mcvawaemvm = 0; 172 | reg [11:0] mwencnvucm = 0; 173 | reg [1:0] muavmvnwmm = 0; 174 | reg [11:0] mmneueavvm = 0; 175 | reg [1:0] mvcueuwmam = 0; 176 | reg [11:0] mmneueavmm = 0; 177 | reg [1:0] mwencnvawm = 0; 178 | reg [11:0] mmneueavam = 0; 179 | reg [1:0] mcvawaenem = 0; 180 | reg [11:0] mcvawaewwm = 0; 181 | reg [1:0] mmneueauum = 0; 182 | reg [11:0] mmneueauem = 0; 183 | reg [1:0] mwencnvcnm = 0; 184 | reg [11:0] mnmwawuaum = 0; 185 | reg [1:0] mmneueaucm = 0; 186 | reg mcvawaevvm = 0; 187 | reg [14:0] mewmvmcwcm = 0; 188 | reg [3:0] mnmwawwewm = 0; 189 | reg [3:0] mwencnnmnm = 0; 190 | reg [3:0] mewmvmmnmm = 0; 191 | reg [3:0] mmneueewem = 0; 192 | reg [3:0] maucnccvcm = 0; 193 | reg [3:0] mcvawaauam = 0; 194 | reg [3:0] mwencnnmum = 0; 195 | reg [3:0] mnmwawwevm = 0; 196 | reg [3:0] muavmvvcwm = 0; 197 | reg [3:0] mvcueuuanm = 0; 198 | reg [3:0] mcvawaaumm = 0; 199 | reg [3:0] maucnccvem = 0; 200 | reg [3:0] mmneueewcm = 0; 201 | reg [3:0] mewmvmmnam = 0; 202 | reg [3:0] mnmwawweum = 0; 203 | reg [3:0] mwencnnmvm = 0; 204 | reg [3:0] mvcueuuawm = 0; 205 | reg [3:0] muavmvvcnm = 0; 206 | reg [3:0] maucnccvmm = 0; 207 | reg [3:0] mcvawaauem = 0; 208 | reg [3:0] mewmvmmncm = 0; 209 | reg maucnceunm = 0; 210 | reg mewmvmawcm = 0; 211 | reg muavmvwavm = 0; 212 | reg mcvawaeamm = 0; 213 | reg mwencnvnam = 0; 214 | reg mewmvmcmwm = 0; 215 | reg mcvawaecem = 0; 216 | reg mewmvmceum = 0; 217 | reg mewmvmcenm = 0; 218 | reg mcvawaeecm = 0; 219 | reg maucncmmvm = 0; 220 | reg mvcueuwwmm = 0; 221 | reg mcvawaemam = 0; 222 | reg mewmvmcawm = 0; 223 | reg mvcueuwnem = 0; 224 | reg mewmvmcuum = 0; 225 | reg mnmwawucnm = 0; 226 | reg mewmvmcucm = 0; 227 | reg mewmvmcvvm = 0; 228 | reg mewmvmcvmm = 0; 229 | reg mewmvmcvam = 0; 230 | reg mnmwawumam = 0; 231 | reg [11:0] mnmwawnuvm = 0; 232 | reg [1:0] mmneuemaam = 0; 233 | reg [11:0] mwencnwvcm = 0; 234 | reg [1:0] muavmvunmm = 0; 235 | reg [11:0] muavmvuuam = 0; 236 | reg [1:0] mwencnwwem = 0; 237 | reg [11:0] mewmvmemam = 0; 238 | reg [1:0] maucncacem = 0; 239 | reg [11:0] maucncavum = 0; 240 | reg [1:0] muavmvuccm = 0; 241 | reg [11:0] mnmwawneum = 0; 242 | reg [1:0] mmneuemwcm = 0; 243 | reg [11:0] mnmwawnamm = 0; 244 | reg [1:0] mewmvmevwm = 0; 245 | reg [11:0] mvcueuuncm = 0; 246 | reg [1:0] mnmwawwvmm = 0; 247 | reg [11:0] mcvawaaacm = 0; 248 | reg [1:0] mmneueeemm = 0; 249 | reg [11:0] mmneueemam = 0; 250 | reg [1:0] mcvawaacem = 0; 251 | reg [11:0] muavmvvuam = 0; 252 | reg [1:0] mwencnnwem = 0; 253 | reg [11:0] mnmwawwmam = 0; 254 | reg [1:0] mvcueuucem = 0; 255 | reg [11:0] maucnccuam = 0; 256 | reg [1:0] mewmvmmwem = 0; 257 | reg [3:0] mnmwawwccm = 0; 258 | reg [3:0] mwencnnaam = 0; 259 | reg [3:0] mmneueevum = 0; 260 | reg [3:0] mewmvmmuvm = 0; 261 | reg [3:0] maucnccwnm = 0; 262 | reg [3:0] muavmvvemm = 0; 263 | reg [3:0] mnmwawwcam = 0; 264 | reg [3:0] mvcueuuavm = 0; 265 | reg [3:0] mwencnnmwm = 0; 266 | reg [3:0] mnmwawwenm = 0; 267 | reg [3:0] mmneueewmm = 0; 268 | reg [3:0] mewmvmmnem = 0; 269 | reg [3:0] mcvawaaucm = 0; 270 | reg mewmvmawvm = 0; 271 | reg maucnceumm = 0; 272 | reg maucncmcam = 0; 273 | reg muavmvnvwm = 0; 274 | reg muavmvnvem = 0; 275 | reg maucncmcum = 0; 276 | reg muavmvnunm = 0; 277 | reg mwencnvwcm = 0; 278 | reg maucncmavm = 0; 279 | reg mmneueaamm = 0; 280 | reg muavmvnnam = 0; 281 | reg maucncmmwm = 0; 282 | reg mmneueacem = 0; 283 | reg maucncmeum = 0; 284 | reg maucncmenm = 0; 285 | reg muavmvnecm = 0; 286 | reg mvcueuwmvm = 0; 287 | reg maucncmwmm = 0; 288 | reg muavmvnmam = 0; 289 | reg mnmwawuawm = 0; 290 | reg maucncmnem = 0; 291 | reg mwencnwvum = 0; 292 | reg mvcueuvwem = 0; 293 | reg mvcueuvvcm = 0; 294 | reg mmneuemecm = 0; 295 | reg mvcueuvaam = 0; 296 | reg mewmvmenam = 0; 297 | reg mmneuemunm = 0; 298 | reg mwencnnuem = 0; 299 | reg mewmvmmmem = 0; 300 | reg mewmvmmecm = 0; 301 | reg mvcueuuvcm = 0; 302 | reg mwencnnecm = 0; 303 | reg mcvawaavcm = 0; 304 | reg mewmvmeccm = 0; 305 | reg maucncamnm = 0; 306 | reg mnmwawnnmm = 0; 307 | reg mcvawacamm = 0; 308 | reg mnmwawneem = 0; 309 | reg maucncavem = 0; 310 | reg mcvawacwvm = 0; 311 | reg mmneueecnm = 0; 312 | reg mnmwawwwnm = 0; 313 | reg maucnccamm = 0; 314 | reg mnmwawwnmm = 0; 315 | reg muavmvvamm = 0; 316 | reg mmneueenmm = 0; 317 | reg mwencnvecm = 0; 318 | reg mmneuecnum = 0; 319 | reg mcvawaeacm = 0; 320 | reg mnmwawuwvm = 0; 321 | reg mvcueuwvwm = 0; 322 | reg mcvawaecum = 0; 323 | reg mnmwawuunm = 0; 324 | reg mmneueaavm = 0; 325 | reg mewmvmcamm = 0; 326 | reg mcvawaemwm = 0; 327 | reg mnmwawucem = 0; 328 | reg muavmvneum = 0; 329 | reg mvcueuwcem = 0; 330 | reg muavmvnamm = 0; 331 | reg [12:0] mcvawaevem = 0; 332 | reg mcvawaceem = 0; 333 | reg mcvawacewm = 0; 334 | reg mcvawacumm = 0; 335 | reg maucncanum = 0; 336 | reg mewmvmmawm = 0; 337 | reg mwencnnnwm = 0; 338 | reg muavmvvunm = 0; 339 | reg maucnccunm = 0; 340 | reg muavmvwanm = 0; 341 | reg mvcueuwumm = 0; 342 | reg mcvawaecam = 0; 343 | reg mvcueuwvem = 0; 344 | reg mvcueuwwcm = 0; 345 | reg mvcueuwnam = 0; 346 | reg muavmvnenm = 0; 347 | reg mvcueuwecm = 0; 348 | reg muavmvnmvm = 0; 349 | reg mcvawaewmm = 0; 350 | reg mmneuemmnm = 0; 351 | reg mvcueuvunm = 0; 352 | reg mwencnwmmm = 0; 353 | reg mmneueemnm = 0; 354 | reg mnmwawwmnm = 0; 355 | reg mwencnueam = 0; 356 | reg mewmvmcmem = 0; 357 | reg mwencnvnum = 0; 358 | reg mwencnvwvm = 0; 359 | reg mewmvmccam = 0; 360 | reg mwencnvvwm = 0; 361 | reg mewmvmccum = 0; 362 | reg mwencnvunm = 0; 363 | reg mewmvmcavm = 0; 364 | reg mwencnvamm = 0; 365 | reg mcvawaenam = 0; 366 | reg maucncammm = 0; 367 | reg mewmvmecvm = 0; 368 | reg mvcueuvanm = 0; 369 | reg mvcueuveam = 0; 370 | reg mcvawaamvm = 0; 371 | reg mvcueuuuvm = 0; 372 | reg mvcueuuvwm = 0; 373 | reg mcvawaavwm = 0; 374 | reg mvcueuncwm = 0; 375 | reg mcvawaeanm = 0; 376 | reg maucncmacm = 0; 377 | reg muavmvnumm = 0; 378 | reg mwencnvvem = 0; 379 | reg muavmvnwcm = 0; 380 | reg mvcueuwmwm = 0; 381 | reg mwencnvcem = 0; 382 | reg mvcueuweum = 0; 383 | reg mvcueuwenm = 0; 384 | reg maucncmunm = 0; 385 | reg mewmvmeewm = 0; 386 | reg muavmvuvwm = 0; 387 | reg mewmvmennm = 0; 388 | reg mewmvmmewm = 0; 389 | reg mwencnnewm = 0; 390 | reg mnmwawvmcm = 0; 391 | reg mmneueaemm = 0; 392 | reg mmneueaeam = 0; 393 | reg mnmwawunum = 0; 394 | reg mmneueaacm = 0; 395 | reg mvcueuwwvm = 0; 396 | reg mmneueacam = 0; 397 | reg mnmwawuvwm = 0; 398 | reg mmneueacum = 0; 399 | reg mewmvmcunm = 0; 400 | reg maucncmwcm = 0; 401 | reg muavmvunnm = 0; 402 | reg mmneuemaum = 0; 403 | reg muavmvucwm = 0; 404 | reg muavmvumcm = 0; 405 | reg maucncceum = 0; 406 | reg muavmvvvum = 0; 407 | reg mwencnnwvm = 0; 408 | reg mewmvmmwvm = 0; 409 | reg mwencnuevm = 0; 410 | reg maucncmcwm = 0; 411 | reg mmneueamem = 0; 412 | reg maucncmanm = 0; 413 | reg mnmwawuumm = 0; 414 | reg mnmwawuvem = 0; 415 | reg mwencnvavm = 0; 416 | reg mnmwawuamm = 0; 417 | reg maucncmnam = 0; 418 | reg muavmvnmwm = 0; 419 | reg mwencnveum = 0; 420 | reg mcvawaccvm = 0; 421 | reg mnmwawnwvm = 0; 422 | reg mmneuemwwm = 0; 423 | reg mcvawaacvm = 0; 424 | reg mvcueuucvm = 0; 425 | reg muavmvwaem = 0; 426 | reg mnmwawuwnm = 0; 427 | reg mewmvmcmcm = 0; 428 | reg mewmvmceam = 0; 429 | reg maucncmmem = 0; 430 | reg muavmvnnum = 0; 431 | reg mewmvmcacm = 0; 432 | reg muavmvnwvm = 0; 433 | reg mnmwawucam = 0; 434 | reg mmneueavwm = 0; 435 | reg mmneueavem = 0; 436 | reg [13:0] maucncmumm = 0; 437 | reg mvcueuvwwm = 0; 438 | reg mwencnwvam = 0; 439 | reg mnmwawnevm = 0; 440 | reg mnmwawnaem = 0; 441 | reg mvcueuunam = 0; 442 | reg mcvawaaaam = 0; 443 | reg mnmwawwnum = 0; 444 | reg mmneueenum = 0; 445 | reg mnmwawvmum = 0; 446 | reg mmneueaevm = 0; 447 | reg mewmvmcemm = 0; 448 | reg mcvawaecwm = 0; 449 | reg mmneueaanm = 0; 450 | reg mwencnvumm = 0; 451 | reg mnmwawucum = 0; 452 | reg mmneueaunm = 0; 453 | reg mcvawaewcm = 0; 454 | reg mnmwawuavm = 0; 455 | reg [13:0] mvcueuwcwm = 0; 456 | reg maucncaaum = 0; 457 | reg mwencnwnum = 0; 458 | reg maucncavvm = 0; 459 | reg maucnccaum = 0; 460 | reg muavmvvaum = 0; 461 | reg [1:0] mcvawamvnm = 0; 462 | reg [1:0] mcvawamvcm = 0; 463 | reg [1:0] mvcueuwuvm = 0; 464 | reg [1:0] maucncmcmm = 0; 465 | reg [1:0] mvcueuwuam = 0; 466 | reg [1:0] mnmwawunwm = 0; 467 | reg [1:0] maucncmaem = 0; 468 | reg [1:0] mmneueamum = 0; 469 | reg [1:0] mvcueuwwnm = 0; 470 | reg [1:0] maucncmmcm = 0; 471 | reg [1:0] mcvawaeevm = 0; 472 | reg [1:0] maucncmemm = 0; 473 | reg [1:0] maucncmeam = 0; 474 | reg [1:0] mmneueacwm = 0; 475 | reg [1:0] mvcueuwmem = 0; 476 | reg [1:0] mcvawaenum = 0; 477 | reg [1:0] mwencnvanm = 0; 478 | reg [1:0] mnmwawuacm = 0; 479 | reg [1:0] mcvawaewvm = 0; 480 | reg [1:0] mmneueaumm = 0; 481 | reg [1:0] mvcueuwcam = 0; 482 | reg [1:0] mnmwawnuum = 0; 483 | reg [1:0] muavmvunem = 0; 484 | reg [1:0] muavmvuucm = 0; 485 | reg [1:0] mewmvmemcm = 0; 486 | reg [1:0] mwencnwmam = 0; 487 | reg [1:0] mcvawacuam = 0; 488 | reg [1:0] mewmvmevnm = 0; 489 | reg [1:0] mnmwawwvem = 0; 490 | reg [1:0] mmneueeeem = 0; 491 | reg [1:0] mmneueemcm = 0; 492 | reg [1:0] muavmvvucm = 0; 493 | reg [1:0] mnmwawwmcm = 0; 494 | reg [1:0] maucnccucm = 0; 495 | reg [3:0] maucncemmm = 0; 496 | reg [13:0] mmneuecuum = 0; 497 | reg [13:0] mmneuecvmm = 0; 498 | reg [13:0] mnmwawvumm = 0; 499 | reg mwencnuvmm = 0; 500 | reg [13:0] mwencnuvcm = 0; 501 | reg maucncewwm = 0; 502 | reg maucncewmm = 0; 503 | reg mcvawamwnm = 0; 504 | reg [13:0] mmneuecuwm = 0; 505 | reg [13:0] muavmvweam = 0; 506 | reg [13:0] mewmvmaunm = 0; 507 | reg [13:0] mmneuecvnm = 0; 508 | reg [13:0] maucncenvm = 0; 509 | reg [13:0] mmneuecuvm = 0; 510 | reg [13:0] mmneuecaum = 0; 511 | reg [13:0] mwencnuccm = 0; 512 | reg [13:0] mmneuecawm = 0; 513 | reg [13:0] muavmvwevm = 0; 514 | reg [13:0] mcvawamnnm = 0; 515 | reg mvcueunwem = 0; 516 | reg [13:0] muavmvwnem = 0; 517 | reg mnmwawvemm = 0; 518 | reg mewmvmavum = 0; 519 | reg mmneuecanm = 0; 520 | reg [13:0] mcvawamevm = 0; 521 | reg [13:0] muavmvwnam = 0; 522 | reg mvcueunmum = 0; 523 | reg mvcueuneem = 0; 524 | reg [13:0] mwencnucam = 0; 525 | reg [13:0] mwencnucem = 0; 526 | reg mnmwawvccm = 0; 527 | reg [13:0] mvcueunemm = 0; 528 | reg [13:0] maucncemcm = 0; 529 | reg [13:0] mnmwawvuem = 0; 530 | reg mcvawamnmm = 0; 531 | reg [13:0] mwencnuvnm = 0; 532 | reg [13:0] mwencnuaam = 0; 533 | reg [13:0] mwencnuavm = 0; 534 | reg [13:0] mwencnumem = 0; 535 | reg mvcueunwam = 0; 536 | reg [13:0] maucncennm = 0; 537 | reg [13:0] maucncewem = 0; 538 | reg [13:0] mewmvmavwm = 0; 539 | reg [13:0] mvcueunwum = 0; 540 | reg [13:0] mvcueunmam = 0; 541 | reg mmneuecaem = 0; 542 | reg mvcueunwmm = 0; 543 | reg mewmvmauwm = 0; 544 | reg mwencnucmm = 0; 545 | reg mcvawamewm = 0; 546 | reg muavmvwmcm = 0; 547 | reg [13:0] mcvawamuvm = 0; 548 | reg [13:0] mcvawamnem = 0; 549 | reg mmneuecavm = 0; 550 | reg [13:0] maucncemnm = 0; 551 | reg mnmwawvcnm = 0; 552 | reg [13:0] maucncemwm = 0; 553 | reg mewmvmnvem = 0; 554 | reg mvcueuueem = 0; 555 | reg mmneuewumm = 0; 556 | reg [13:0] mnmwawwaam = 0; 557 | reg [13:0] mnmwaweanm = 0; 558 | reg [3:0] mwencnnccm = 0; 559 | reg [1:0] mcvawaawam = 0; 560 | reg [13:0] muavmvvmem = 0; 561 | reg mmneueeucm = 0; 562 | reg mmneueevam = 0; 563 | reg mewmvmmucm = 0; 564 | reg mcvawaanem = 0; 565 | reg maucnccwmm = 0; 566 | reg muavmvvenm = 0; 567 | reg mvcueuumwm = 0; 568 | reg mwencnnavm = 0; 569 | reg mnmwawwcum = 0; 570 | reg mwencnncam = 0; 571 | reg mnmwawwacm = 0; 572 | reg mvcueuuemm = 0; 573 | reg mcvawaawnm = 0; 574 | reg maucnccnwm = 0; 575 | reg mmneueeuvm = 0; 576 | reg mewmvmmvum = 0; 577 | reg mvcueuuevm = 0; 578 | reg [1:0] muavmvvmmm = 0; 579 | reg [1:0] maucnccnnm = 0; 580 | reg muavmvvmum = 0; 581 | reg [1:0] mcvawaawwm = 0; 582 | reg mmneueeuam = 0; 583 | reg [1:0] mewmvmmvvm = 0; 584 | reg [1:0] mmneueeuum = 0; 585 | reg [1:0] muavmvvmam = 0; 586 | reg mewmvmmvcm = 0; 587 | reg [1:0] mvcueuuecm = 0; 588 | reg [1:0] mwencnncem = 0; 589 | reg mcvawaawem = 0; 590 | reg [1:0] mnmwawwamm = 0; 591 | reg maucnccnmm = 0; 592 | reg [1:0] mmneueeunm = 0; 593 | reg [1:0] mewmvmmvwm = 0; 594 | reg muavmvvmnm = 0; 595 | reg [1:0] mcvawaawvm = 0; 596 | reg mvcueuuewm = 0; 597 | reg [1:0] maucnccnum = 0; 598 | reg [1:0] mvcueuueam = 0; 599 | reg mwencnncvm = 0; 600 | reg [1:0] muavmvvmcm = 0; 601 | reg mnmwawwaum = 0; 602 | reg [1:0] mnmwawwaem = 0; 603 | reg mewmvmmvam = 0; 604 | reg [1:0] mwencnncmm = 0; 605 | reg [1:0] mewmvmmvnm = 0; 606 | reg [1:0] mmneueeuwm = 0; 607 | reg [1:0] maucnccnvm = 0; 608 | reg [1:0] mcvawaawum = 0; 609 | reg maucnccnem = 0; 610 | reg [1:0] maucnccncm = 0; 611 | reg mcvawaawmm = 0; 612 | reg [1:0] mmneueeuem = 0; 613 | reg [1:0] mewmvmmvmm = 0; 614 | reg [1:0] mwencnncnm = 0; 615 | reg [1:0] mnmwawwawm = 0; 616 | reg mvcueuuenm = 0; 617 | reg [1:0] muavmvvmvm = 0; 618 | reg muavmvvmwm = 0; 619 | reg [1:0] mvcueuueum = 0; 620 | reg mnmwawwavm = 0; 621 | reg [1:0] maucnccnam = 0; 622 | reg mwencnncum = 0; 623 | reg [1:0] mcvawaawcm = 0; 624 | reg mwencnmcam = 0; 625 | reg [1:0] mewmvmmvem = 0; 626 | reg [1:0] mmneueeumm = 0; 627 | reg mnmwaweacm = 0; 628 | reg [1:0] mnmwawwanm = 0; 629 | reg [1:0] mwencnncwm = 0; 630 | reg mewmvmmuem = 0, mmneueevmm = 0, mnmwawwcnm = 0, mwencnnawm = 0; 631 | reg [11:0] muavmvnccm = 0; 632 | reg [1:0] mwencnvmmm = 0; 633 | reg mcvawaeunm = 0; 634 | reg mvcueuwaem = 0; 635 | reg mmneueawam = 0; 636 | reg mwencnvmvm = 0; 637 | reg mvcueuwanm = 0; 638 | reg mmneueawem = 0; 639 | reg maucncmvam = 0; 640 | reg mvcueuwavm = 0; 641 | reg muavmvuwnm = 0; 642 | reg maucncaeem = 0; 643 | reg mcvawacmam = 0; 644 | reg muavmvuwvm = 0; 645 | reg [13:0] mcvawacmwm = 0; 646 | reg [13:0] muavmvunam = 0; 647 | reg [13:0] mewmvmeeum = 0; 648 | reg [13:0] mcvawacavm = 0; 649 | reg [13:0] mvcueuvcwm = 0; 650 | reg [13:0] mvcueuvmcm = 0; 651 | reg [13:0] mmneueeawm = 0; 652 | reg [13:0] maucncceam = 0; 653 | reg [13:0] mvcueuuvum = 0; 654 | reg mcvawauwnm = 0; 655 | reg maucncvnwm = 0; 656 | reg mnmwawwemm = 0; 657 | reg mwencnnmmm = 0; 658 | reg mmneueewwm = 0; 659 | reg [31:0] mwencnnmam = 0; 660 | reg mvcueuuamm = 0; 661 | reg mewmvmmnum = 0; 662 | reg mwencnnmcm = 0; 663 | reg [3:0] maucnccvam = 0; 664 | reg [14:0] mcvawaevmm = 0; 665 | reg mnmwawueem = 0; 666 | reg [14:0] mnmwawnvnm = 0; 667 | reg [14:0] muavmvuwam = 0; 668 | reg [14:0] mmneuemcnm = 0; 669 | reg [14:0] mvcueuvnam = 0; 670 | reg [14:0] mewmvmeanm = 0; 671 | reg [14:0] mwencnwuam = 0; 672 | reg [14:0] mcvawacmnm = 0; 673 | reg [14:0] mnmwawnvam = 0; 674 | reg [14:0] mewmvmecmm = 0; 675 | reg [14:0] mvcueuvwum = 0; 676 | reg [14:0] mwencnwvmm = 0; 677 | reg [14:0] muavmvuuvm = 0; 678 | reg [14:0] mewmvmeeem = 0; 679 | reg [14:0] mvcueuvvvm = 0; 680 | reg [14:0] mcvawaccem = 0; 681 | reg [14:0] mwencnwwvm = 0; 682 | reg [14:0] maucncaaem = 0; 683 | reg [14:0] mnmwawnnvm = 0; 684 | reg [14:0] muavmvuuem = 0; 685 | reg [14:0] mvcueuvuvm = 0; 686 | reg [14:0] mcvawacawm = 0; 687 | reg [14:0] mnmwawnwcm = 0; 688 | reg [14:0] maucncacwm = 0; 689 | reg [14:0] muavmvuvcm = 0; 690 | reg [14:0] mmneuemewm = 0; 691 | reg [14:0] mvcueuvucm = 0; 692 | reg [14:0] mcvawacuwm = 0; 693 | reg [14:0] mnmwawnenm = 0; 694 | reg [14:0] mvcueuvcam = 0; 695 | reg [14:0] mewmvmewnm = 0; 696 | reg [14:0] muavmvuaam = 0; 697 | reg [14:0] mmneuemnnm = 0; 698 | reg [14:0] mnmwawnmam = 0; 699 | reg [14:0] maucncaunm = 0; 700 | reg [14:0] mwencnweam = 0; 701 | reg [14:0] mcvawacvnm = 0; 702 | reg [14:0] mewmvmewam = 0; 703 | reg [14:0] mvcueuvcnm = 0; 704 | reg [14:0] mmneuemnam = 0; 705 | reg [14:0] mwencnwccm = 0; 706 | reg [14:0] maucncanam = 0; 707 | reg [14:0] mnmwawnanm = 0; 708 | reg [14:0] mmneuemuam = 0; 709 | reg [14:0] muavmvumnm = 0; 710 | reg [14:0] mewmvmevam = 0; 711 | reg [14:0] mvcueuvenm = 0; 712 | reg [14:0] mnmwawncam = 0; 713 | reg [14:0] maucncawnm = 0; 714 | reg [14:0] mwencnwaam = 0; 715 | reg [14:0] mcvawacnnm = 0; 716 | reg [14:0] mvcueuvmam = 0; 717 | reg [14:0] mewmvmeunm = 0; 718 | reg [14:0] mvcueuvmnm = 0; 719 | reg [14:0] mmneuemvam = 0; 720 | reg [14:0] muavmvuenm = 0; 721 | reg [14:0] mewmvmmcam = 0; 722 | reg [14:0] mvcueuuwnm = 0; 723 | reg [14:0] mmneueeaam = 0; 724 | reg [14:0] muavmvvnnm = 0; 725 | reg [14:0] maucnccmam = 0; 726 | reg [14:0] mnmwawwunm = 0; 727 | reg [14:0] mcvawaaeam = 0; 728 | reg [14:0] mwencnnvnm = 0; 729 | reg [14:0] mvcueuuwam = 0; 730 | reg [14:0] maucnccemm = 0; 731 | reg [14:0] mnmwawwvum = 0; 732 | reg [14:0] mcvawaammm = 0; 733 | reg [14:0] mwencnnuum = 0; 734 | reg [14:0] mewmvmmamm = 0; 735 | reg [14:0] mewmvmmaum = 0; 736 | reg [14:0] mwencnnnum = 0; 737 | reg [14:0] maucncccvm = 0; 738 | reg [14:0] mwencnnnem = 0; 739 | reg [14:0] mcvawaaavm = 0; 740 | reg [14:0] mmneueemem = 0; 741 | reg [14:0] mmneueemvm = 0; 742 | reg [14:0] maucnccuvm = 0; 743 | reg [14:0] mnmwawwmvm = 0; 744 | reg [32:0] mewmvmmnwm = 0; 745 | reg mewmvmcnnm = 0; 746 | reg mvcueuuaem = 0; 747 | reg maucnccvvm = 0; 748 | reg muavmvvcmm = 0; 749 | reg mmneueawwm = 0; 750 | reg maucncmvvm = 0; 751 | reg mcvawaeuum = 0; 752 | reg mwencnvmam = 0; 753 | reg [12:0] muavmvuvum = 0; 754 | reg [12:0] mewmvmenvm = 0; 755 | reg [12:0] mvcueuveem = 0; 756 | reg [12:0] mnmwawwvam = 0; 757 | reg [12:0] mmneueeeam = 0; 758 | reg [12:0] mewmvmmeum = 0; 759 | reg [12:0] mcvawaavum = 0; 760 | reg [12:0] mwencnneum = 0; 761 | reg [15:0] muavmvnawm = 0; 762 | reg mmneueawvm = 0; 763 | reg maucncmvnm = 0; 764 | reg mcvawaeuem = 0; 765 | reg mnmwawuevm = 0; 766 | reg mwencnvmnm = 0; 767 | reg mmneuemcam = 0; 768 | reg maucncaeam = 0; 769 | reg mewmvmcnam = 0; 770 | reg mewmvmcnem = 0; 771 | reg mwencnwuvm = 0; 772 | reg mvcueuvnnm = 0; 773 | reg mmneuemcem = 0; 774 | reg mmneuememm = 0; 775 | reg mvcueuvaem = 0; 776 | reg mmneuemuvm = 0; 777 | reg mcvawaamnm = 0; 778 | reg mvcueuuunm = 0; 779 | reg mvcueuuvmm = 0; 780 | reg mwencnnemm = 0; 781 | reg mcvawaavmm = 0; 782 | reg [14:0] mvcueuvnvm = 0; 783 | reg [14:0] mwencnwuem = 0; 784 | reg [14:0] mcvawacmvm = 0; 785 | reg [14:0] mnmwawnvem = 0; 786 | reg [14:0] maucncaevm = 0; 787 | reg [14:0] muavmvuwem = 0; 788 | reg [14:0] mmneuemcvm = 0; 789 | reg [14:0] mvcueuvnem = 0; 790 | reg [14:0] mnmwawnuwm = 0; 791 | reg [14:0] muavmvuncm = 0; 792 | reg [14:0] mmneuemawm = 0; 793 | reg [14:0] maucncaaam = 0; 794 | reg [14:0] mnmwawnnnm = 0; 795 | reg [14:0] mmneuemmam = 0; 796 | reg [14:0] muavmvuunm = 0; 797 | reg [14:0] mewmvmeeam = 0; 798 | reg [14:0] mvcueuvvnm = 0; 799 | reg [14:0] mwencnwwam = 0; 800 | reg [14:0] mcvawaccnm = 0; 801 | reg [14:0] mmneuemeum = 0; 802 | reg [14:0] mvcueuvumm = 0; 803 | reg [14:0] mewmvmemum = 0; 804 | reg [14:0] mwencnwnmm = 0; 805 | reg [14:0] mcvawacaum = 0; 806 | reg [14:0] mnmwawnwmm = 0; 807 | reg [14:0] mvcueuvavm = 0; 808 | reg [14:0] mnmwawnmem = 0; 809 | reg [14:0] maucncauvm = 0; 810 | reg [14:0] mwencnweem = 0; 811 | reg [14:0] mcvawacvvm = 0; 812 | reg [14:0] mvcueuvcem = 0; 813 | reg [14:0] mewmvmewvm = 0; 814 | reg [14:0] muavmvuaem = 0; 815 | reg [14:0] mmneuemnvm = 0; 816 | reg [14:0] maucncauem = 0; 817 | reg [14:0] mnmwawnmvm = 0; 818 | reg [14:0] mcvawacvem = 0; 819 | reg [14:0] mewmvmevem = 0; 820 | reg [14:0] mvcueuvevm = 0; 821 | reg [14:0] mcvawacwem = 0; 822 | reg [14:0] mwencnwcvm = 0; 823 | reg [14:0] maucncanem = 0; 824 | reg [14:0] mnmwawnavm = 0; 825 | reg [14:0] mvcueuvmem = 0; 826 | reg [14:0] mewmvmeuvm = 0; 827 | reg [14:0] muavmvueem = 0; 828 | reg [14:0] mmneuemvvm = 0; 829 | reg [14:0] mnmwawncem = 0; 830 | reg [14:0] maucncawvm = 0; 831 | reg [14:0] mnmwawncvm = 0; 832 | reg [14:0] mcvawacnem = 0; 833 | reg [14:0] mwencnwavm = 0; 834 | reg [14:0] maucnccmem = 0; 835 | reg [14:0] mnmwawwuvm = 0; 836 | reg [14:0] mcvawaaeem = 0; 837 | reg [14:0] mwencnnvvm = 0; 838 | reg [14:0] mewmvmmcem = 0; 839 | reg [14:0] mvcueuuwvm = 0; 840 | reg [14:0] mmneueeaem = 0; 841 | reg [14:0] muavmvvnvm = 0; 842 | reg [14:0] mnmwawwuem = 0; 843 | reg [14:0] mvcueuunwm = 0; 844 | reg [14:0] mmneueeccm = 0; 845 | reg [14:0] muavmvvwwm = 0; 846 | reg [14:0] maucnccecm = 0; 847 | reg [14:0] mnmwawwvwm = 0; 848 | reg [14:0] muavmvvvam = 0; 849 | reg [14:0] mmneueeenm = 0; 850 | reg [14:0] mcvawaacam = 0; 851 | reg [14:0] mwencnnwnm = 0; 852 | reg maucnccvnm = 0; 853 | reg mewmvmeaem = 0; 854 | reg [14:0] mewmvmeavm = 0; 855 | reg maucncamcm = 0; 856 | reg [14:0] mvcueuvwcm = 0; 857 | reg mwencnwwnm = 0; 858 | reg [14:0] mnmwawnnam = 0; 859 | reg mnmwawnwnm = 0; 860 | reg muavmvuvmm = 0; 861 | reg [14:0] maucncacum = 0; 862 | reg muavmvucmm = 0; 863 | reg mewmvmenem = 0; 864 | reg [14:0] mwencnwevm = 0; 865 | reg mewmvmevum = 0; 866 | reg muavmvumvm = 0; 867 | reg [14:0] mwencnwaem = 0; 868 | reg maucncawem = 0; 869 | reg [14:0] maucnccmvm = 0; 870 | reg mewmvmmacm = 0; 871 | reg [14:0] mcvawaamcm = 0; 872 | reg maucnccewm = 0; 873 | reg muavmvvvwm = 0; 874 | reg mewmvmmmnm = 0; 875 | reg [14:0] maucnccaam = 0; 876 | reg mcvawaacnm = 0; 877 | reg mewmvmmwnm = 0; 878 | reg mvcueuucnm = 0; 879 | reg [32:0] mcvawaauvm = 0; 880 | reg [13:0] mcvawacaam = 0; 881 | reg [13:0] mmneuemwum = 0; 882 | reg [13:0] muavmvummm = 0; 883 | reg [13:0] mwencnnucm = 0; 884 | reg [13:0] mewmvmmmcm = 0; 885 | reg [13:0] mnmwawwnam = 0; 886 | reg [13:0] muavmvvaam = 0; 887 | reg [13:0] mmneueenam = 0; 888 | reg mcvawaauwm = 0; 889 | reg [14:0] mewmvmecam = 0; 890 | reg [14:0] mnmwawnumm = 0; 891 | reg [14:0] mvcueuvvem = 0; 892 | reg [13:0] mmneuemeem = 0; 893 | reg [14:0] mvcueuvacm = 0; 894 | reg [13:0] mewmvmencm = 0; 895 | reg [14:0] maucncauam = 0; 896 | reg [13:0] mcvawacwwm = 0; 897 | reg [14:0] mmneuemvnm = 0; 898 | reg [14:0] muavmvvnam = 0; 899 | reg [14:0] mmneueecmm = 0; 900 | reg [13:0] muavmvvwmm = 0; 901 | reg [13:0] maucncccmm = 0; 902 | reg [14:0] mewmvmmeem = 0; 903 | reg [13:0] mvcueuuvem = 0; 904 | reg [13:0] mwencnneem = 0; 905 | reg [13:0] mcvawaavem = 0; 906 | reg [63:0] maucnccvum = 0; 907 | reg [13:0] mvcueunmvm = 0; 908 | reg [31:0] mwencnummm = 0; 909 | reg mwencnucwm = 0; 910 | reg mcvawamnwm = 0; 911 | reg [13:0] mewmvmauem = 0; 912 | reg [31:0] muavmvwccm = 0; 913 | reg mmneuecucm = 0; 914 | reg mvcueunmem = 0; 915 | reg [13:0] mcvawamwmm = 0; 916 | reg [10:0] mewmvmavnm = 0; 917 | reg [13:0] maucncewcm = 0; 918 | reg [13:0] mcvawamnum = 0; 919 | reg mnmwawvaum = 0; 920 | reg [13:0] mwencnuamm = 0; 921 | reg [13:0] mnmwawvcmm = 0; 922 | reg mmneuecwwm = 0; 923 | reg mmneuecuam = 0; 924 | reg maucncenam = 0; 925 | reg mewmvmavem = 0; 926 | reg muavmvwemm = 0; 927 | reg maucncenem = 0; 928 | reg [13:0] mvcueunewm = 0; 929 | reg [13:0] mnmwawvcwm = 0; 930 | reg mvcueunenm = 0; 931 | reg mnmwawveem = 0; 932 | reg [13:0] mvcueunmmm = 0; 933 | reg muavmvwmwm = 0; 934 | reg [13:0] muavmvwmvm = 0; 935 | reg [13:0] mcvawamwem = 0; 936 | reg mwencnucum = 0; 937 | reg mnmwawvawm = 0; 938 | reg [13:0] muavmvwmum = 0; 939 | reg [13:0] mcvawamwcm = 0; 940 | reg mwencnucvm = 0; 941 | reg mewmvmauvm = 0; 942 | reg maucncenmm = 0; 943 | reg [13:0] mwencnuacm = 0; 944 | reg [13:0] muavmvwewm = 0; 945 | reg [13:0] mmneuecvum = 0; 946 | reg [13:0] mvcueunmwm = 0; 947 | reg [13:0] mvcueunacm = 0; 948 | reg [13:0] maucncewnm = 0; 949 | reg [13:0] maucncewum = 0; 950 | reg [13:0] mewmvmavam = 0; 951 | reg [13:0] mmneuecvcm = 0; 952 | reg [13:0] mnmwawvanm = 0; 953 | reg mwencnucnm = 0; 954 | reg mmneuecuem = 0; 955 | reg [13:0] mewmvmauum = 0; 956 | reg mnmwawvcam = 0; 957 | reg [13:0] mewmvmanwm = 0; 958 | reg mmneuecumm = 0; 959 | reg [13:0] mewmvmaucm = 0; 960 | reg [13:0] mewmvmavmm = 0; 961 | reg mvcueunevm = 0; 962 | reg [13:0] mnmwawvavm = 0; 963 | reg muavmvwmnm = 0; 964 | reg mewmvmavcm = 0; 965 | reg mvcueuneum = 0; 966 | reg mwencnmcmm = 0; 967 | reg [13:0] mvcueuaecm = 0; 968 | reg [3:0] mnmwaweaem = 0; 969 | reg [15:0] mwencnmcem = 0; 970 | reg [15:0] mnmwaweamm = 0; 971 | reg [15:0] mmneuewunm = 0; 972 | reg [15:0] mewmvmnvwm = 0; 973 | reg [15:0] mcvawauwvm = 0; 974 | reg [15:0] maucncvnum = 0; 975 | reg [15:0] mvcueuaeam = 0; 976 | reg [15:0] muavmvcmcm = 0; 977 | reg [7:0] mvcueuaewm = 0; 978 | reg [63:0] mwencnmcvm = 0; 979 | reg [31:0] mnmwaweaum = 0; 980 | reg [47:0] mewmvmnvam = 0; 981 | reg [63:0] mmneuewucm = 0; 982 | reg maucncvnem = 0; 983 | reg [31:0] mcvawauwmm = 0; 984 | reg mvcueuaenm = 0; 985 | reg mcvawaanvm = 0, maucnccwum = 0, maucnccwam = 0, mcvawaancm = 0; 986 | (* preserve *) 987 | (* keep="true" *) 988 | reg [31:0] maucncevam = 0; 989 | reg [11:0] maucncmuam = 0; 990 | reg [1:0] mewmvmcwem = 0; 991 | reg [1:0] maucncmucm = 0; 992 | reg [14:0] mmneueawnm = 0; 993 | reg [3:0] mvcueuuaum = 0; 994 | reg mcvawaevcm = 0; 995 | reg [7:0] mewmvmanem = 0; 996 | reg [7:0] mmneuecwmm = 0; 997 | reg [7:0] mnmwawvenm = 0; 998 | reg [7:0] mwencnumwm = 0; 999 | reg mmneueanmm = 0; 1000 | reg [11:0] mcvawaaevm = 0; 1001 | reg [1:0] mnmwawwuam = 0; 1002 | reg [1:0] mmneueeaum = 0; 1003 | reg [11:0] mwencnnncm = 0; 1004 | reg [1:0] muavmvvvmm = 0; 1005 | reg [1:0] muavmvvvem = 0; 1006 | reg [3:0] mcvawaanwm = 0; 1007 | reg [3:0] mvcueuumem = 0; 1008 | reg [31:0] mvcueunavm = 0; 1009 | reg maucnccmum = 0; 1010 | reg mvcueuuuem = 0; 1011 | reg mwencnnvcm = 0; 1012 | reg maucncccnm = 0; 1013 | reg [31:0] mvcueuncam = 0; 1014 | reg [31:0] mnmwawvmem = 0; 1015 | reg mnmwawumnm = 0; 1016 | reg mvcueuuwem = 0; 1017 | reg mcvawaaawm = 0; 1018 | reg mwencnvewm = 0; 1019 | reg muavmvvnmm = 0; 1020 | reg mewmvmmmvm = 0; 1021 | reg mvcueuwcvm = 0; 1022 | reg maucnccmnm = 0; 1023 | reg mmneueeeum = 0; 1024 | reg [95:0] mewmvmawnm = 0; 1025 | reg [15:0] maucnceuwm = 0; 1026 | reg [15:0] mmneuecnvm = 0; 1027 | reg [15:0] mewmvmawum = 0; 1028 | reg [15:0] mewmvmawam = 0; 1029 | reg [7:0] mewmvmawem = 0; 1030 | reg [7:0] mmneuecnmm = 0; 1031 | reg [7:0] mnmwawvmnm = 0; 1032 | reg [7:0] mwencnuewm = 0; 1033 | reg [15:0] muavmvnvum = 0; 1034 | reg [15:0] mcvawaeaam = 0; 1035 | reg [15:0] maucncmccm = 0; 1036 | reg [15:0] mmneueaeem = 0; 1037 | reg [15:0] muavmvnvnm = 0; 1038 | reg [15:0] mvcueuwuwm = 0; 1039 | reg [15:0] mwencnvnvm = 0; 1040 | reg [15:0] mnmwawuwum = 0; 1041 | reg [7:0] muavmvnvcm = 0; 1042 | reg [7:0] mnmwawuwem = 0; 1043 | reg [7:0] mwencnvnmm = 0; 1044 | reg [7:0] mewmvmcmnm = 0; 1045 | reg [7:0] muavmvnuvm = 0; 1046 | reg [7:0] mvcueuwvum = 0; 1047 | reg [7:0] maucncmaam = 0; 1048 | reg [7:0] mcvawaeccm = 0; 1049 | reg [15:0] mcvawaecmm = 0; 1050 | reg [15:0] mvcueuwvnm = 0; 1051 | reg [15:0] muavmvnuwm = 0; 1052 | reg [15:0] mnmwawunvm = 0; 1053 | reg [31:0] muavmvnuam = 0; 1054 | reg [31:0] mvcueuwvcm = 0; 1055 | reg [31:0] mwencnvwem = 0; 1056 | reg [31:0] mnmwawunmm = 0; 1057 | reg [31:0] muavmvnnwm = 0; 1058 | reg [31:0] mnmwawuuvm = 0; 1059 | reg [31:0] mwencnvvum = 0; 1060 | reg [31:0] mmneueaaam = 0; 1061 | reg [15:0] mmneueaaem = 0; 1062 | reg [15:0] mewmvmccmm = 0; 1063 | reg [15:0] mwencnvvnm = 0; 1064 | reg [15:0] mnmwawuuwm = 0; 1065 | reg [15:0] maucncmmum = 0; 1066 | reg [15:0] mnmwawuuam = 0; 1067 | reg [15:0] mwencnvvcm = 0; 1068 | reg [15:0] mvcueuwwem = 0; 1069 | reg [15:0] muavmvnwnm = 0; 1070 | reg [15:0] mvcueuwnwm = 0; 1071 | reg [15:0] mwencnvuvm = 0; 1072 | reg [15:0] mnmwawuvum = 0; 1073 | reg [47:0] mcvawaemcm = 0; 1074 | reg [47:0] mewmvmcaem = 0; 1075 | reg [47:0] mmneueacmm = 0; 1076 | reg [47:0] mnmwawuvnm = 0; 1077 | reg [63:0] maucncmevm = 0; 1078 | reg [63:0] mcvawaemum = 0; 1079 | reg [63:0] mwencnvuam = 0; 1080 | reg [63:0] mnmwawuvcm = 0; 1081 | reg [15:0] muavmvnemm = 0; 1082 | reg [15:0] maucncmwnm = 0; 1083 | reg [15:0] mcvawaenwm = 0; 1084 | reg [15:0] mewmvmcuvm = 0; 1085 | reg [15:0] muavmvneam = 0; 1086 | reg [15:0] mvcueuwmcm = 0; 1087 | reg [15:0] mwencnvaem = 0; 1088 | reg [15:0] mnmwawucmm = 0; 1089 | reg [47:0] mnmwawucwm = 0; 1090 | reg [47:0] muavmvnevm = 0; 1091 | reg [47:0] mvcueuwmum = 0; 1092 | reg [47:0] mewmvmcuam = 0; 1093 | reg [15:0] muavmvnmem = 0; 1094 | reg [15:0] mvcueuwemm = 0; 1095 | reg [15:0] mcvawaewnm = 0; 1096 | reg [15:0] maucncmnwm = 0; 1097 | reg [15:0] maucncmnum = 0; 1098 | reg [15:0] mvcueuweam = 0; 1099 | reg [15:0] muavmvnmcm = 0; 1100 | reg [15:0] mnmwawuaem = 0; 1101 | reg [63:0] mnmwawuanm = 0; 1102 | reg [63:0] mwencnvcwm = 0; 1103 | reg [63:0] mvcueuwevm = 0; 1104 | reg [63:0] muavmvnmum = 0; 1105 | reg [7:0] muavmvnacm = 0; 1106 | reg [7:0] mnmwawumem = 0; 1107 | reg [7:0] mwencnvemm = 0; 1108 | reg [7:0] mewmvmcwnm = 0; 1109 | reg [15:0] mmneueanum = 0; 1110 | reg [15:0] mwencnveam = 0; 1111 | reg [15:0] mnmwawumcm = 0; 1112 | reg [15:0] muavmvnaem = 0; 1113 | reg muavmvnaum = 0; 1114 | reg [7:0] mmneueanem = 0; 1115 | reg [7:0] mewmvmcwmm = 0; 1116 | reg [7:0] mwencnvenm = 0; 1117 | reg [7:0] mnmwawumwm = 0; 1118 | reg [63:0] maucncamam = 0; 1119 | reg [63:0] mcvawacecm = 0; 1120 | reg [63:0] mewmvmecem = 0; 1121 | reg [63:0] mmneuemamm = 0; 1122 | reg [7:0] mvcueuvwmm = 0; 1123 | reg [7:0] mcvawacenm = 0; 1124 | reg [7:0] maucncamwm = 0; 1125 | reg [7:0] mmneuemavm = 0; 1126 | reg [31:0] mnmwawnnem = 0; 1127 | reg [31:0] mwencnwwmm = 0; 1128 | reg [31:0] mewmvmeenm = 0; 1129 | reg [31:0] mmneuemmwm = 0; 1130 | reg [31:0] mcvawacaem = 0; 1131 | reg [31:0] maucncacmm = 0; 1132 | reg [31:0] muavmvuvnm = 0; 1133 | reg [31:0] mvcueuvuwm = 0; 1134 | reg [31:0] mnmwawnecm = 0; 1135 | reg [31:0] muavmvucem = 0; 1136 | reg [31:0] mvcueuvamm = 0; 1137 | reg [31:0] mcvawacunm = 0; 1138 | reg [7:0] maucncavcm = 0; 1139 | reg [7:0] mmneuemwem = 0; 1140 | reg [7:0] mewmvmenmm = 0; 1141 | reg [7:0] mwencnwmnm = 0; 1142 | reg [31:0] mmneuemuwm = 0; 1143 | reg [31:0] maucncanvm = 0; 1144 | reg [31:0] mcvawacwum = 0; 1145 | reg [31:0] mcvawacwam = 0; 1146 | reg mcvawaaewm = 0; 1147 | reg [47:0] mwencnnvam = 0; 1148 | reg [47:0] mnmwawwucm = 0; 1149 | reg [47:0] muavmvvnem = 0; 1150 | reg [47:0] mvcueuuwmm = 0; 1151 | reg [63:0] mwencnnumm = 0; 1152 | reg [63:0] mewmvmmanm = 0; 1153 | reg [63:0] mmneueecwm = 0; 1154 | reg [63:0] maucnccevm = 0; 1155 | reg [63:0] mewmvmmmmm = 0; 1156 | reg [63:0] mwencnnnnm = 0; 1157 | reg [63:0] mnmwawwwwm = 0; 1158 | reg [63:0] muavmvvvvm = 0; 1159 | reg mwencnnnam = 0; 1160 | reg [7:0] mvcueuuumm = 0; 1161 | reg [7:0] mcvawaaanm = 0; 1162 | reg [7:0] maucncccwm = 0; 1163 | reg [7:0] mmneueeevm = 0; 1164 | reg [63:0] maucnccaem = 0; 1165 | reg [63:0] mcvawaacmm = 0; 1166 | reg [63:0] mvcueuuvnm = 0; 1167 | reg [63:0] muavmvvuwm = 0; 1168 | reg [7:0] mnmwawwnem = 0; 1169 | reg [7:0] mwencnnwmm = 0; 1170 | reg [7:0] mewmvmmenm = 0; 1171 | reg [7:0] mmneueemwm = 0; 1172 | reg [7:0] muavmvvaem = 0; 1173 | reg [7:0] mvcueuucmm = 0; 1174 | reg [7:0] mcvawaavnm = 0; 1175 | reg [7:0] maucnccuwm = 0; 1176 | reg [7:0] mmneueenem = 0; 1177 | reg [7:0] mewmvmmwmm = 0; 1178 | reg [7:0] mwencnnenm = 0; 1179 | reg [7:0] mnmwawwmwm = 0; 1180 | reg [15:0] mmneuecncm = 0; 1181 | reg [7:0] mvcueuncvm = 0; 1182 | reg [15:0] mewmvmcmmm = 0; 1183 | reg [15:0] mnmwawuwam = 0; 1184 | reg [7:0] mmneueaewm = 0; 1185 | reg [7:0] mewmvmceem = 0; 1186 | reg [15:0] mwencnvwum = 0; 1187 | reg [31:0] mmneueamnm = 0; 1188 | reg [31:0] mewmvmcccm = 0; 1189 | reg [15:0] muavmvnnvm = 0; 1190 | reg [15:0] muavmvnnmm = 0; 1191 | reg [15:0] mewmvmcaam = 0; 1192 | reg [47:0] mwencnvuwm = 0; 1193 | reg [63:0] muavmvnwem = 0; 1194 | reg [15:0] mmneueavum = 0; 1195 | reg [15:0] mmneueavnm = 0; 1196 | reg [47:0] mmneueavcm = 0; 1197 | reg [15:0] mmneueauvm = 0; 1198 | reg [15:0] mwencnvcmm = 0; 1199 | reg [63:0] mmneueauam = 0; 1200 | reg [7:0] mmneueanwm = 0; 1201 | reg [15:0] mvcueuwcmm = 0; 1202 | reg [7:0] muavmvnavm = 0; 1203 | reg [63:0] mnmwawnunm = 0; 1204 | reg [7:0] mewmvmecum = 0; 1205 | reg [31:0] maucncaavm = 0; 1206 | reg [31:0] mwencnwnvm = 0; 1207 | reg [31:0] maucncavwm = 0; 1208 | reg [7:0] mnmwawnewm = 0; 1209 | reg [31:0] maucncancm = 0; 1210 | reg [47:0] mcvawaaenm = 0; 1211 | reg [63:0] mcvawaamum = 0; 1212 | reg [63:0] mvcueuuuum = 0; 1213 | reg [7:0] mewmvmmmum = 0; 1214 | reg [63:0] mnmwawwnvm = 0; 1215 | reg [7:0] maucnccavm = 0; 1216 | reg [7:0] mmneueenvm = 0; 1217 | reg [7:0] muavmvvavm = 0; 1218 | reg [15:0] mcvawamvmm = 0; 1219 | reg [7:0] mcvawamvam = 0; 1220 | reg [15:0] mnmwawuwwm = 0; 1221 | reg [15:0] mvcueuwuem = 0; 1222 | reg [7:0] mcvawaeaum = 0; 1223 | reg [7:0] mnmwawunnm = 0; 1224 | reg [15:0] mnmwawuncm = 0; 1225 | reg [31:0] mcvawaecvm = 0; 1226 | reg [31:0] maucncmmmm = 0; 1227 | reg [15:0] mvcueuwwam = 0; 1228 | reg signed [16:0] mcvawaeewm = 0; 1229 | reg [15:0] maucncmeem = 0; 1230 | reg [47:0] muavmvnwum = 0; 1231 | reg [63:0] mcvawaemnm = 0; 1232 | reg [15:0] mnmwawuccm = 0; 1233 | reg [15:0] mcvawaenvm = 0; 1234 | reg [47:0] mcvawaenmm = 0; 1235 | reg [15:0] mnmwawuaam = 0; 1236 | reg [15:0] mmneueauwm = 0; 1237 | reg [63:0] mcvawaewem = 0; 1238 | reg [7:0] mcvawaevum = 0; 1239 | reg [15:0] maucncmuwm = 0; 1240 | reg [7:0] muavmvncam = 0; 1241 | reg [14:0] mcvawaeuvm = 0; 1242 | reg [63:0] mvcueuvwvm = 0; 1243 | reg [7:0] maucncaacm = 0; 1244 | reg [31:0] maucncacam = 0; 1245 | reg [31:0] mnmwawnwam = 0; 1246 | reg [31:0] mewmvmenum = 0; 1247 | reg [7:0] mvcueuvaum = 0; 1248 | reg [31:0] mewmvmevmm = 0; 1249 | reg [47:0] mmneueeavm = 0; 1250 | reg [63:0] mnmwawwvcm = 0; 1251 | reg [63:0] mmneueeecm = 0; 1252 | reg [7:0] muavmvvvcm = 0; 1253 | reg [63:0] mwencnnwam = 0; 1254 | reg [7:0] mvcueuucam = 0; 1255 | reg [7:0] mewmvmmwam = 0; 1256 | reg [7:0] muavmvvcam = 0; 1257 | reg [15:0] mnmwawnmwm = 0; 1258 | reg [15:0] muavmvuavm = 0; 1259 | reg [15:0] mvcueuvcum = 0; 1260 | reg [15:0] mwencnwcam = 0; 1261 | reg [15:0] maucncawcm = 0; 1262 | reg [15:0] mmneuemvem = 0; 1263 | reg [15:0] mewmvmeumm = 0; 1264 | reg [15:0] mwencnwanm = 0; 1265 | reg [15:0] mewmvmacvm = 0; 1266 | reg [63:0] mewmvmauam = 0; 1267 | reg [31:0] mnmwawvcem = 0; 1268 | reg mwencnuvam = 0; 1269 | reg mmneuecvwm = 0; 1270 | reg [15:0] mewmvmacmm = 0; 1271 | reg [31:0] mewmvmacem = 0; 1272 | reg mcvawamwwm = 0; 1273 | reg [15:0] mcvawamenm = 0; 1274 | reg [13:0] mmneuecvem = 0; 1275 | reg [7:0] mmneuecwnm = 0; 1276 | reg [47:0] mewmvmacum = 0; 1277 | reg [7:0] mcvawameum = 0; 1278 | reg mnmwawvamm = 0; 1279 | reg [13:0] maucncencm = 0; 1280 | reg [7:0] muavmvwnvm = 0; 1281 | reg [31:0] mcvawamecm = 0; 1282 | reg [63:0] muavmvwenm = 0; 1283 | reg mcvawamwum = 0; 1284 | reg [31:0] mwencnuaem = 0; 1285 | reg mnmwawvuwm = 0; 1286 | reg [15:0] mewmvmavvm = 0; 1287 | reg [7:0] mcvawamnvm = 0; 1288 | reg [15:0] mewmvmacwm = 0; 1289 | reg mwencnuaum = 0; 1290 | reg [31:0] mnmwawvunm = 0; 1291 | reg [7:0] muavmvwcam = 0; 1292 | reg [47:0] mwencnuanm = 0; 1293 | reg mnmwawvacm = 0; 1294 | reg muavmvwmam = 0; 1295 | reg [15:0] mewmvmacnm = 0; 1296 | reg mvcueunwcm = 0; 1297 | reg mcvawamwvm = 0; 1298 | reg [7:0] mmneuecvam = 0; 1299 | reg [15:0] mnmwawvaam = 0; 1300 | reg [63:0] mmneuecunm = 0; 1301 | reg [63:0] muavmvweem = 0; 1302 | reg muavmvwecm = 0; 1303 | reg [95:0] mwencnuvwm = 0; 1304 | reg [31:0] mnmwawvuam = 0; 1305 | reg [7:0] mvcueunaam = 0; 1306 | reg [31:0] muavmvwnmm = 0; 1307 | reg [15:0] mvcueunecm = 0; 1308 | reg [7:0] mmneuecvvm = 0; 1309 | reg [47:0] muavmvwmmm = 0; 1310 | reg [15:0] muavmvwncm = 0; 1311 | reg [13:0] mnmwawvcvm = 0; 1312 | reg [63:0] muavmvwmem = 0; 1313 | reg maucncevum = 0; 1314 | reg maucncemum = 0; 1315 | reg maucncemvm = 0; 1316 | reg [63:0] mvcueunmnm = 0; 1317 | reg mewmvmaumm = 0; 1318 | reg mnmwawvcum = 0; 1319 | reg [7:0] mcvawamwam = 0; 1320 | reg [7:0] mwencnuvem = 0; 1321 | reg [31:0] mwencnuawm = 0; 1322 | reg [15:0] mnmwawvaem = 0; 1323 | reg [15:0] maucncenwm = 0; 1324 | reg signed [15:0] mnmwawvucm = 0; 1325 | reg mvcueunmcm = 0; 1326 | reg [7:0] maucncenum = 0; 1327 | reg [31:0] maucncewvm = 0; 1328 | reg [31:0] mmneuecamm = 0; 1329 | reg muavmvcmam = 0; 1330 | reg muavmvcmmm = 0; 1331 | reg muavmvcmem = 0; 1332 | reg [13:0] mewmvmnvum = 0; 1333 | reg [13:0] mmneuewuvm = 0; 1334 | reg [3:0] mwencnmccm = 0; 1335 | reg mwencnmcnm = 0; 1336 | reg mvcueuaemm = 0; 1337 | reg mvcueuaeem = 0; 1338 | reg maucncvnnm = 0; 1339 | reg mewmvmnvvm = 0; 1340 | reg mmneuewuum = 0; 1341 | reg mnmwaweaam = 0; 1342 | reg mcvawauwwm = 0; 1343 | reg [15:0] mwencnmcwm = 0; 1344 | reg [15:0] mvcueuaevm = 0; 1345 | reg [15:0] muavmvcmum = 0; 1346 | reg [15:0] mmneuewuam = 0; 1347 | reg [15:0] mewmvmnvcm = 0; 1348 | reg [15:0] mcvawauwem = 0; 1349 | reg [15:0] maucncvnmm = 0; 1350 | reg [15:0] muavmvcmnm = 0; 1351 | 1352 | always @(posedge clock) 1353 | if (reset) 1354 | begin 1355 | mvcueuummm <= 0; 1356 | mewmvmmuum <= 0; 1357 | mwencnnamm <= 0; 1358 | mcvawaanum <= 0; 1359 | mnmwawwcmm <= 0; 1360 | maucnccwum <= 0; 1361 | mmneueevmm <= 0; 1362 | muavmvveum <= 0; 1363 | end 1364 | else 1365 | begin 1366 | mvcueuummm <= maucnccwwm | ~mvcueuumam & mvcueuummm; 1367 | mewmvmmuum <= muavmvvecm | ~mewmvmmunm & mewmvmmuum; 1368 | mwencnnamm <= mmneueevwm | ~muavmvveam & mwencnnamm; 1369 | mcvawaanum <= mvcueuumcm | ~mmneueevnm & mcvawaanum; 1370 | mnmwawwcmm <= mewmvmmuwm | ~maucnccwam & mnmwawwcmm; 1371 | maucnccwum <= mcvawaancm | ~mnmwawwcnm & maucnccwum; 1372 | mmneueevmm <= mwencnnawm | ~mcvawaanam & mmneueevmm; 1373 | muavmvveum <= maucnccwcm | ~command_out_tready & muavmvveum; 1374 | end 1375 | 1376 | // output variables of interface config-registers 1377 | 1378 | always @(*) 1379 | case (config_registers_rd_addr) 1380 | 3'd0 : 1381 | config_registers_rd_data_reg = nasdaq_ip_addr; 1382 | 3'd1 : 1383 | config_registers_rd_data_reg = nasdaq_udp_port; 1384 | default : 1385 | config_registers_rd_data_reg = 0; 1386 | endcase 1387 | 1388 | // input variables of interface config-registers 1389 | 1390 | always @(posedge clock) 1391 | if (nreset == 0) 1392 | begin 1393 | nasdaq_ip_addr <= 32'hE9360C65; 1394 | nasdaq_udp_port <= 16'h6720; 1395 | end 1396 | else 1397 | if (config_registers_wr_en == 1) 1398 | case (config_registers_wr_addr) 1399 | 3'd0 : 1400 | nasdaq_ip_addr <= config_registers_wr_data; 1401 | 3'd1 : 1402 | nasdaq_udp_port <= config_registers_wr_data; 1403 | endcase 1404 | 1405 | always @(posedge clock) 1406 | if (reset) 1407 | mvcueuneam <= 14'h3000; 1408 | else 1409 | if (mvcueuumcm & muavmvwnum) 1410 | mvcueuneam <= mnmwawummm[13:0]; 1411 | else 1412 | if (mwencnnawm & mwencnmcnm) 1413 | mvcueuneam <= muavmvnawm[13:0]; 1414 | 1415 | always @(*) 1416 | begin 1417 | mcvawaaunm = {mewmvmnvnm, mmneuewuwm, maucncvnvm, mcvawamncm, mcvawauwum, mcvawauwam, maucncvncm, mmneuewuem, mewmvmnvmm}; 1418 | mewmvmannm = mcvawaaunm; 1419 | end 1420 | 1421 | always @(*) 1422 | begin 1423 | reset = ~nreset; 1424 | mewmvmmumm = muavmvveum & ~command_out_tready; 1425 | mwencnnanm = mewmvmmumm; 1426 | mnmwawwcwm = ~mwencnnanm; 1427 | muavmvwwmm = mwencnnanm; 1428 | muavmvvevm = mewmvmmuam | mewmvmmumm; 1429 | mvcueuumum = ~muavmvvevm; 1430 | muavmvveem = ethernet_input_tvalid; 1431 | mcvawaannm = mvcueuumum; 1432 | maucnccwwm = muavmvveem & mcvawaannm; 1433 | mmneueevem = muavmvveum; 1434 | mwencnuucm = 1'h0; 1435 | end 1436 | 1437 | always @(posedge clock) 1438 | if (maucnccwwm) 1439 | begin 1440 | mcvawamuum <= ethernet_input_tlast; 1441 | muavmvcmvm <= ethernet_input_tdata; 1442 | mvcueuaeum <= ethernet_input_tvalid; 1443 | maucncvnam <= ethernet_input_tkeep; 1444 | end 1445 | 1446 | always @(*) 1447 | begin 1448 | mvcueuumvm = mmneueevmm; 1449 | mcvawaanam = mnmwawwcwm; 1450 | maucnccwcm = mvcueuumvm & mcvawaanam; 1451 | mmneuemnmm = maucncewum[13:2]; 1452 | mwencnwewm = maucncewum[1:0]; 1453 | mwencnwenm = maucncewum[1:0]; 1454 | maucncawum = mvcueunmvm[13:2]; 1455 | mcvawacncm = mvcueunmvm[1:0]; 1456 | mcvawacnam = mvcueunmvm[1:0]; 1457 | mwencnnacm = {2'b0, mcvawacncm[1:0]}; 1458 | muavmvvcum = {2'b0, mwencnwewm[1:0]}; 1459 | mnmwawnmnm = mvcueuaecm == {2'b0, mmneuemnmm[11:0]}; 1460 | case (mwencnwenm) 1461 | 0 : 1462 | mnmwawnacm = mwencnmcem; 1463 | 1 : 1464 | mnmwawnacm = mnmwaweamm; 1465 | 2 : 1466 | mnmwawnacm = mmneuewunm; 1467 | 3 : 1468 | mnmwawnacm = mewmvmnvwm; 1469 | endcase 1470 | maucncawam = mvcueuaecm == {2'b0, maucncawum[11:0]}; 1471 | case (mcvawacnam) 1472 | 0 : 1473 | mnmwawncwm = mcvawauwvm; 1474 | 1 : 1475 | mnmwawncwm = maucncvnum; 1476 | 2 : 1477 | mnmwawncwm = mvcueuaeam; 1478 | 3 : 1479 | mnmwawncwm = muavmvcmcm; 1480 | endcase 1481 | mvcueuvcvm = mnmwaweaem[muavmvvcum]; 1482 | mewmvmeuem = mnmwaweaem[mwencnnacm]; 1483 | muavmvuaum = mnmwawnmnm & mvcueuvcvm; 1484 | mmneuemvmm = maucncawam & mewmvmeuem; 1485 | maucncaucm = ~mcvawacvam; 1486 | mwencnwawm = ~mnmwawncnm; 1487 | mmneuemnem = muavmvuaum & mwencnmcmm & maucncaucm; 1488 | mvcueuvmvm = mmneuemvmm & mwencnmcmm & mwencnwawm; 1489 | maucncewam = mmneuemnem; 1490 | muavmvweum = mvcueuvmvm; 1491 | mvcueuvemm = maucncewam ? mnmwawnacm : mcvawamncm; 1492 | mvcueuvmum = muavmvweum ? mnmwawncwm : mcvawamnam; 1493 | end 1494 | 1495 | always @(posedge clock) 1496 | if (reset) 1497 | begin 1498 | mcvawacvam <= 0; 1499 | mnmwawncnm <= 0; 1500 | mcvawamncm <= 16'h0; 1501 | mcvawamnam <= 16'h0; 1502 | end 1503 | else 1504 | if (maucnccwcm) 1505 | begin 1506 | mcvawacvam <= mwencnmcmm ? muavmvuaum : mcvawacvam; 1507 | mnmwawncnm <= mwencnmcmm ? mmneuemvmm : mnmwawncnm; 1508 | mcvawamncm <= mvcueuvemm; 1509 | mcvawamnam <= mvcueuvmum; 1510 | mewmvmnvnm <= mvcueuaewm; 1511 | mmneuewuwm <= mwencnmcvm; 1512 | mcvawauwam <= mnmwaweaum; 1513 | mewmvmnvmm <= mewmvmnvam; 1514 | maucncvnvm <= mmneuewucm; 1515 | mcvawauwum <= maucncvnem; 1516 | maucncvncm <= mcvawauwmm; 1517 | mnmwaweawm <= mvcueuaenm; 1518 | mmneuewuem <= muavmvwccm; 1519 | end 1520 | 1521 | always @(*) 1522 | begin 1523 | maucnccwvm = mwencnnamm; 1524 | muavmvveam = mnmwawwcwm; 1525 | mvcueuumcm = maucnccwvm & muavmvveam; 1526 | mcvawameam = 14'h0; 1527 | muavmvwnwm = mcvawamumm; 1528 | mvcueunccm = {1'b0, mvcueunwvm[13:0]} + 15'h1; 1529 | mwencnumum = ~muavmvwnwm; 1530 | mnmwawvewm = ~muavmvwnwm; 1531 | muavmvwcvm = mnmwawvewm & muavmvwnnm; 1532 | maucncevcm = mwencnumum & mcvawamuam; 1533 | mnmwawummm = {1'b0, mcvawameam[13:0]} + 15'h3F; 1534 | mwencnuvvm = muavmvwcvm; 1535 | mwencnueem = mwencnuvvm ? mvcueunccm : {1'b0, mvcueunwvm[13:0]}; 1536 | mwencnuvum = maucncevcm; 1537 | mmneuecaam = mwencnuvum; 1538 | mnmwawvmmm = mmneuecaam ? 15'h0 : mwencnueem; 1539 | muavmvwnum = mmneuecaam; 1540 | end 1541 | 1542 | always @(posedge clock) 1543 | if (reset) 1544 | begin 1545 | mcvawamuam <= 1; 1546 | mvcueunwvm <= 14'h0; 1547 | end 1548 | else 1549 | if (mvcueuumcm) 1550 | begin 1551 | mcvawamuam <= muavmvwnwm; 1552 | mvcueunwvm <= mnmwawvmmm[13:0]; 1553 | mwencnnaum <= mnmwawvuum; 1554 | mcvawauwcm <= muavmvwnnm; 1555 | mvcueuumnm <= mewmvmaccm; 1556 | muavmvvewm <= mwencnuvvm; 1557 | mnmwawwcvm <= muavmvwnum; 1558 | end 1559 | 1560 | always @(*) 1561 | begin 1562 | mcvawaanvm = mnmwawwcmm; 1563 | maucnccwam = mnmwawwcwm; 1564 | mcvawaancm = mcvawaanvm & maucnccwam; 1565 | mnmwawvuwm = mmneueevam; 1566 | maucncemvm = mewmvmmucm; 1567 | mvcueunwcm = mcvawaanem; 1568 | maucncemum = maucnccwmm; 1569 | mwencnuvam = muavmvvenm; 1570 | mnmwawvacm = mvcueuumwm; 1571 | mcvawamwwm = mwencnnavm; 1572 | muavmvwmam = mnmwawwcum; 1573 | mnmwawvamm = mwencnncam; 1574 | mcvawamwvm = mnmwawwacm; 1575 | maucncmuam = maucncenvm[13:2]; 1576 | mewmvmcwem = maucncenvm[1:0]; 1577 | maucncmucm = maucncenvm[1:0]; 1578 | mmneueawnm = {1'b0, muavmvvmem[13:0]} + 15'h2; 1579 | muavmvwecm = mvcueuuemm; 1580 | mmneuecvwm = mcvawaawnm; 1581 | mvcueunmcm = maucnccnwm; 1582 | mnmwawvcum = mmneueeuvm; 1583 | maucncevum = mewmvmmvum; 1584 | mvcueuuaum = {2'b0, mewmvmcwem[1:0]}; 1585 | mcvawamecm = maucncevam; 1586 | mcvawaevcm = mnmwawwaam == {2'b0, maucncmuam[11:0]}; 1587 | mmneuecvem = maucncewcm; 1588 | mnmwawvcvm = muavmvwewm; 1589 | mewmvmanem = mcvawamecm[7:0]; 1590 | mmneuecwmm = mcvawamecm[15:8]; 1591 | mnmwawvenm = mcvawamecm[23:16]; 1592 | mwencnumwm = mcvawamecm[31:24]; 1593 | mmneueanmm = mwencnnccm[mvcueuuaum]; 1594 | mcvawaaevm = mmneuecvem[13:2]; 1595 | mnmwawwuam = mmneuecvem[1:0]; 1596 | mmneueeaum = mmneuecvem[1:0]; 1597 | mwencnnncm = mnmwawvcvm[13:2]; 1598 | muavmvvvmm = mnmwawvcvm[1:0]; 1599 | muavmvvvem = mnmwawvcvm[1:0]; 1600 | mcvawaanwm = {2'b0, muavmvvvmm[1:0]}; 1601 | mvcueuumem = {2'b0, mnmwawwuam[1:0]}; 1602 | mvcueunavm = {mewmvmanem, mmneuecwmm, mnmwawvenm, mwencnumwm}; 1603 | maucnccmum = mnmwawwaam == {2'b0, mcvawaaevm[11:0]}; 1604 | mvcueuuuem = mnmwawwaam == {2'b0, mwencnnncm[11:0]}; 1605 | mewmvmacem = mvcueunavm; 1606 | mwencnnvcm = mwencnnccm[mvcueuumem]; 1607 | maucncccnm = mwencnnccm[mcvawaanwm]; 1608 | mmneuecamm = mvcueuncam; 1609 | mnmwawumnm = mcvawaevcm & mmneueanmm; 1610 | mvcueuuwem = maucnccmum & mwencnnvcm; 1611 | mcvawaaawm = mvcueuuuem & maucncccnm; 1612 | mvcueuwcvm = ~mwencnvewm; 1613 | maucnccmnm = ~muavmvvnmm; 1614 | mmneueeeum = ~mewmvmmmvm; 1615 | mnmwawvunm = mnmwawvmem; 1616 | mewmvmawnm = {mnmwawvunm, mmneuecamm, mewmvmacem}; 1617 | mwencnuvwm = mewmvmawnm; 1618 | maucnceuwm = mwencnuvwm[39:24]; 1619 | mmneuecnvm = mwencnuvwm[31:16]; 1620 | mewmvmawum = mwencnuvwm[23:8]; 1621 | mewmvmawam = mwencnuvwm[15:0]; 1622 | mewmvmawem = mwencnuvwm[31:24]; 1623 | mmneuecnmm = mwencnuvwm[23:16]; 1624 | mnmwawvmnm = mwencnuvwm[15:8]; 1625 | mwencnuewm = mwencnuvwm[7:0]; 1626 | muavmvnvum = mwencnuvwm[39:24]; 1627 | mcvawaeaam = mwencnuvwm[31:16]; 1628 | maucncmccm = mwencnuvwm[23:8]; 1629 | mmneueaeem = mwencnuvwm[15:0]; 1630 | muavmvnvnm = mwencnuvwm[39:24]; 1631 | mvcueuwuwm = mwencnuvwm[31:16]; 1632 | mwencnvnvm = mwencnuvwm[23:8]; 1633 | mnmwawuwum = mwencnuvwm[15:0]; 1634 | muavmvnvcm = mwencnuvwm[31:24]; 1635 | mnmwawuwem = mwencnuvwm[23:16]; 1636 | mwencnvnmm = mwencnuvwm[15:8]; 1637 | mewmvmcmnm = mwencnuvwm[7:0]; 1638 | muavmvnuvm = mwencnuvwm[31:24]; 1639 | mvcueuwvum = mwencnuvwm[23:16]; 1640 | maucncmaam = mwencnuvwm[15:8]; 1641 | mcvawaeccm = mwencnuvwm[7:0]; 1642 | mcvawaecmm = mwencnuvwm[39:24]; 1643 | mvcueuwvnm = mwencnuvwm[31:16]; 1644 | muavmvnuwm = mwencnuvwm[23:8]; 1645 | mnmwawunvm = mwencnuvwm[15:0]; 1646 | muavmvnuam = mwencnuvwm[55:24]; 1647 | mvcueuwvcm = mwencnuvwm[47:16]; 1648 | mwencnvwem = mwencnuvwm[39:8]; 1649 | mnmwawunmm = mwencnuvwm[31:0]; 1650 | muavmvnnwm = mwencnuvwm[55:24]; 1651 | mnmwawuuvm = mwencnuvwm[47:16]; 1652 | mwencnvvum = mwencnuvwm[39:8]; 1653 | mmneueaaam = mwencnuvwm[31:0]; 1654 | mmneueaaem = mwencnuvwm[39:24]; 1655 | mewmvmccmm = mwencnuvwm[31:16]; 1656 | mwencnvvnm = mwencnuvwm[23:8]; 1657 | mnmwawuuwm = mwencnuvwm[15:0]; 1658 | maucncmmum = mwencnuvwm[39:24]; 1659 | mnmwawuuam = mwencnuvwm[31:16]; 1660 | mwencnvvcm = mwencnuvwm[23:8]; 1661 | mvcueuwwem = mwencnuvwm[15:0]; 1662 | muavmvnwnm = mwencnuvwm[39:24]; 1663 | mvcueuwnwm = mwencnuvwm[31:16]; 1664 | mwencnvuvm = mwencnuvwm[23:8]; 1665 | mnmwawuvum = mwencnuvwm[15:0]; 1666 | mcvawaemcm = mwencnuvwm[71:24]; 1667 | mewmvmcaem = mwencnuvwm[63:16]; 1668 | mmneueacmm = mwencnuvwm[55:8]; 1669 | mnmwawuvnm = mwencnuvwm[47:0]; 1670 | maucncmevm = mwencnuvwm[87:24]; 1671 | mcvawaemum = mwencnuvwm[79:16]; 1672 | mwencnvuam = mwencnuvwm[71:8]; 1673 | mnmwawuvcm = mwencnuvwm[63:0]; 1674 | muavmvnemm = mwencnuvwm[39:24]; 1675 | maucncmwnm = mwencnuvwm[31:16]; 1676 | mcvawaenwm = mwencnuvwm[23:8]; 1677 | mewmvmcuvm = mwencnuvwm[15:0]; 1678 | muavmvneam = mwencnuvwm[39:24]; 1679 | mvcueuwmcm = mwencnuvwm[31:16]; 1680 | mwencnvaem = mwencnuvwm[23:8]; 1681 | mnmwawucmm = mwencnuvwm[15:0]; 1682 | mnmwawucwm = mwencnuvwm[71:24]; 1683 | muavmvnevm = mwencnuvwm[63:16]; 1684 | mvcueuwmum = mwencnuvwm[55:8]; 1685 | mewmvmcuam = mwencnuvwm[47:0]; 1686 | muavmvnmem = mwencnuvwm[39:24]; 1687 | mvcueuwemm = mwencnuvwm[31:16]; 1688 | mcvawaewnm = mwencnuvwm[23:8]; 1689 | maucncmnwm = mwencnuvwm[15:0]; 1690 | maucncmnum = mwencnuvwm[39:24]; 1691 | mvcueuweam = mwencnuvwm[31:16]; 1692 | muavmvnmcm = mwencnuvwm[23:8]; 1693 | mnmwawuaem = mwencnuvwm[15:0]; 1694 | mnmwawuanm = mwencnuvwm[87:24]; 1695 | mwencnvcwm = mwencnuvwm[79:16]; 1696 | mvcueuwevm = mwencnuvwm[71:8]; 1697 | muavmvnmum = mwencnuvwm[63:0]; 1698 | muavmvnacm = mwencnuvwm[31:24]; 1699 | mnmwawumem = mwencnuvwm[23:16]; 1700 | mwencnvemm = mwencnuvwm[15:8]; 1701 | mewmvmcwnm = mwencnuvwm[7:0]; 1702 | mmneueanum = mwencnuvwm[39:24]; 1703 | mwencnveam = mwencnuvwm[31:16]; 1704 | mnmwawumcm = mwencnuvwm[23:8]; 1705 | muavmvnaem = mwencnuvwm[15:0]; 1706 | muavmvnaum = mnmwawumnm & mvcueuueem & mvcueuwcvm; 1707 | mmneueanem = mwencnuvwm[31:24]; 1708 | mewmvmcwmm = mwencnuvwm[23:16]; 1709 | mwencnvenm = mwencnuvwm[15:8]; 1710 | mnmwawumwm = mwencnuvwm[7:0]; 1711 | maucncamam = mwencnuvwm[87:24]; 1712 | mcvawacecm = mwencnuvwm[79:16]; 1713 | mewmvmecem = mwencnuvwm[71:8]; 1714 | mmneuemamm = mwencnuvwm[63:0]; 1715 | mvcueuvwmm = mwencnuvwm[31:24]; 1716 | mcvawacenm = mwencnuvwm[23:16]; 1717 | maucncamwm = mwencnuvwm[15:8]; 1718 | mmneuemavm = mwencnuvwm[7:0]; 1719 | mnmwawnnem = mwencnuvwm[55:24]; 1720 | mwencnwwmm = mwencnuvwm[47:16]; 1721 | mewmvmeenm = mwencnuvwm[39:8]; 1722 | mmneuemmwm = mwencnuvwm[31:0]; 1723 | mcvawacaem = mwencnuvwm[55:24]; 1724 | maucncacmm = mwencnuvwm[47:16]; 1725 | muavmvuvnm = mwencnuvwm[39:8]; 1726 | mvcueuvuwm = mwencnuvwm[31:0]; 1727 | mnmwawnecm = mwencnuvwm[55:24]; 1728 | muavmvucem = mwencnuvwm[47:16]; 1729 | mvcueuvamm = mwencnuvwm[39:8]; 1730 | mcvawacunm = mwencnuvwm[31:0]; 1731 | maucncavcm = mwencnuvwm[31:24]; 1732 | mmneuemwem = mwencnuvwm[23:16]; 1733 | mewmvmenmm = mwencnuvwm[15:8]; 1734 | mwencnwmnm = mwencnuvwm[7:0]; 1735 | mmneuemuwm = mwencnuvwm[55:24]; 1736 | maucncanvm = mwencnuvwm[47:16]; 1737 | mcvawacwum = mwencnuvwm[39:8]; 1738 | mcvawacwam = mwencnuvwm[31:0]; 1739 | mcvawaaewm = mvcueuuwem & mvcueuueem & maucnccmnm; 1740 | mwencnnvam = mwencnuvwm[71:24]; 1741 | mnmwawwucm = mwencnuvwm[63:16]; 1742 | muavmvvnem = mwencnuvwm[55:8]; 1743 | mvcueuuwmm = mwencnuvwm[47:0]; 1744 | mwencnnumm = mwencnuvwm[87:24]; 1745 | mewmvmmanm = mwencnuvwm[79:16]; 1746 | mmneueecwm = mwencnuvwm[71:8]; 1747 | maucnccevm = mwencnuvwm[63:0]; 1748 | mewmvmmmmm = mwencnuvwm[87:24]; 1749 | mwencnnnnm = mwencnuvwm[79:16]; 1750 | mnmwawwwwm = mwencnuvwm[71:8]; 1751 | muavmvvvvm = mwencnuvwm[63:0]; 1752 | mwencnnnam = mcvawaaawm & mvcueuueem & mmneueeeum; 1753 | mvcueuuumm = mwencnuvwm[31:24]; 1754 | mcvawaaanm = mwencnuvwm[23:16]; 1755 | maucncccwm = mwencnuvwm[15:8]; 1756 | mmneueeevm = mwencnuvwm[7:0]; 1757 | maucnccaem = mwencnuvwm[87:24]; 1758 | mcvawaacmm = mwencnuvwm[79:16]; 1759 | mvcueuuvnm = mwencnuvwm[71:8]; 1760 | muavmvvuwm = mwencnuvwm[63:0]; 1761 | mnmwawwnem = mwencnuvwm[31:24]; 1762 | mwencnnwmm = mwencnuvwm[23:16]; 1763 | mewmvmmenm = mwencnuvwm[15:8]; 1764 | mmneueemwm = mwencnuvwm[7:0]; 1765 | muavmvvaem = mwencnuvwm[31:24]; 1766 | mvcueuucmm = mwencnuvwm[23:16]; 1767 | mcvawaavnm = mwencnuvwm[15:8]; 1768 | maucnccuwm = mwencnuvwm[7:0]; 1769 | mmneueenem = mwencnuvwm[31:24]; 1770 | mewmvmmwmm = mwencnuvwm[23:16]; 1771 | mwencnnenm = mwencnuvwm[15:8]; 1772 | mnmwawwmwm = mwencnuvwm[7:0]; 1773 | case (muavmvvmmm) 1774 | 0 : 1775 | mmneuecncm = maucnceuwm; 1776 | 1 : 1777 | mmneuecncm = mmneuecnvm; 1778 | 2 : 1779 | mmneuecncm = mewmvmawum; 1780 | 3 : 1781 | mmneuecncm = mewmvmawam; 1782 | endcase 1783 | case (maucnccnnm) 1784 | 0 : 1785 | mvcueuncvm = mewmvmawem; 1786 | 1 : 1787 | mvcueuncvm = mmneuecnmm; 1788 | 2 : 1789 | mvcueuncvm = mnmwawvmnm; 1790 | 3 : 1791 | mvcueuncvm = mwencnuewm; 1792 | endcase 1793 | case (mcvawaawwm) 1794 | 0 : 1795 | mewmvmcmmm = muavmvnvum; 1796 | 1 : 1797 | mewmvmcmmm = mcvawaeaam; 1798 | 2 : 1799 | mewmvmcmmm = maucncmccm; 1800 | 3 : 1801 | mewmvmcmmm = mmneueaeem; 1802 | endcase 1803 | case (mewmvmmvvm) 1804 | 0 : 1805 | mnmwawuwam = muavmvnvnm; 1806 | 1 : 1807 | mnmwawuwam = mvcueuwuwm; 1808 | 2 : 1809 | mnmwawuwam = mwencnvnvm; 1810 | 3 : 1811 | mnmwawuwam = mnmwawuwum; 1812 | endcase 1813 | case (mmneueeuum) 1814 | 0 : 1815 | mmneueaewm = muavmvnvcm; 1816 | 1 : 1817 | mmneueaewm = mnmwawuwem; 1818 | 2 : 1819 | mmneueaewm = mwencnvnmm; 1820 | 3 : 1821 | mmneueaewm = mewmvmcmnm; 1822 | endcase 1823 | case (muavmvvmam) 1824 | 0 : 1825 | mewmvmceem = muavmvnuvm; 1826 | 1 : 1827 | mewmvmceem = mvcueuwvum; 1828 | 2 : 1829 | mewmvmceem = maucncmaam; 1830 | 3 : 1831 | mewmvmceem = mcvawaeccm; 1832 | endcase 1833 | case (mvcueuuecm) 1834 | 0 : 1835 | mwencnvwum = mcvawaecmm; 1836 | 1 : 1837 | mwencnvwum = mvcueuwvnm; 1838 | 2 : 1839 | mwencnvwum = muavmvnuwm; 1840 | 3 : 1841 | mwencnvwum = mnmwawunvm; 1842 | endcase 1843 | case (mwencnncem) 1844 | 0 : 1845 | mmneueamnm = muavmvnuam; 1846 | 1 : 1847 | mmneueamnm = mvcueuwvcm; 1848 | 2 : 1849 | mmneueamnm = mwencnvwem; 1850 | 3 : 1851 | mmneueamnm = mnmwawunmm; 1852 | endcase 1853 | case (mnmwawwamm) 1854 | 0 : 1855 | mewmvmcccm = muavmvnnwm; 1856 | 1 : 1857 | mewmvmcccm = mnmwawuuvm; 1858 | 2 : 1859 | mewmvmcccm = mwencnvvum; 1860 | 3 : 1861 | mewmvmcccm = mmneueaaam; 1862 | endcase 1863 | case (mmneueeunm) 1864 | 0 : 1865 | muavmvnnvm = mmneueaaem; 1866 | 1 : 1867 | muavmvnnvm = mewmvmccmm; 1868 | 2 : 1869 | muavmvnnvm = mwencnvvnm; 1870 | 3 : 1871 | muavmvnnvm = mnmwawuuwm; 1872 | endcase 1873 | case (mewmvmmvwm) 1874 | 0 : 1875 | muavmvnnmm = maucncmmum; 1876 | 1 : 1877 | muavmvnnmm = mnmwawuuam; 1878 | 2 : 1879 | muavmvnnmm = mwencnvvcm; 1880 | 3 : 1881 | muavmvnnmm = mvcueuwwem; 1882 | endcase 1883 | case (mcvawaawvm) 1884 | 0 : 1885 | mewmvmcaam = muavmvnwnm; 1886 | 1 : 1887 | mewmvmcaam = mvcueuwnwm; 1888 | 2 : 1889 | mewmvmcaam = mwencnvuvm; 1890 | 3 : 1891 | mewmvmcaam = mnmwawuvum; 1892 | endcase 1893 | case (maucnccnum) 1894 | 0 : 1895 | mwencnvuwm = mcvawaemcm; 1896 | 1 : 1897 | mwencnvuwm = mewmvmcaem; 1898 | 2 : 1899 | mwencnvuwm = mmneueacmm; 1900 | 3 : 1901 | mwencnvuwm = mnmwawuvnm; 1902 | endcase 1903 | case (mvcueuueam) 1904 | 0 : 1905 | muavmvnwem = maucncmevm; 1906 | 1 : 1907 | muavmvnwem = mcvawaemum; 1908 | 2 : 1909 | muavmvnwem = mwencnvuam; 1910 | 3 : 1911 | muavmvnwem = mnmwawuvcm; 1912 | endcase 1913 | case (muavmvvmcm) 1914 | 0 : 1915 | mmneueavum = muavmvnemm; 1916 | 1 : 1917 | mmneueavum = maucncmwnm; 1918 | 2 : 1919 | mmneueavum = mcvawaenwm; 1920 | 3 : 1921 | mmneueavum = mewmvmcuvm; 1922 | endcase 1923 | case (mnmwawwaem) 1924 | 0 : 1925 | mmneueavnm = muavmvneam; 1926 | 1 : 1927 | mmneueavnm = mvcueuwmcm; 1928 | 2 : 1929 | mmneueavnm = mwencnvaem; 1930 | 3 : 1931 | mmneueavnm = mnmwawucmm; 1932 | endcase 1933 | case (mwencnncmm) 1934 | 0 : 1935 | mmneueavcm = mnmwawucwm; 1936 | 1 : 1937 | mmneueavcm = muavmvnevm; 1938 | 2 : 1939 | mmneueavcm = mvcueuwmum; 1940 | 3 : 1941 | mmneueavcm = mewmvmcuam; 1942 | endcase 1943 | case (mewmvmmvnm) 1944 | 0 : 1945 | mmneueauvm = muavmvnmem; 1946 | 1 : 1947 | mmneueauvm = mvcueuwemm; 1948 | 2 : 1949 | mmneueauvm = mcvawaewnm; 1950 | 3 : 1951 | mmneueauvm = maucncmnwm; 1952 | endcase 1953 | case (mmneueeuwm) 1954 | 0 : 1955 | mwencnvcmm = maucncmnum; 1956 | 1 : 1957 | mwencnvcmm = mvcueuweam; 1958 | 2 : 1959 | mwencnvcmm = muavmvnmcm; 1960 | 3 : 1961 | mwencnvcmm = mnmwawuaem; 1962 | endcase 1963 | case (maucnccnvm) 1964 | 0 : 1965 | mmneueauam = mnmwawuanm; 1966 | 1 : 1967 | mmneueauam = mwencnvcwm; 1968 | 2 : 1969 | mmneueauam = mvcueuwevm; 1970 | 3 : 1971 | mmneueauam = muavmvnmum; 1972 | endcase 1973 | case (mcvawaawum) 1974 | 0 : 1975 | mmneueanwm = muavmvnacm; 1976 | 1 : 1977 | mmneueanwm = mnmwawumem; 1978 | 2 : 1979 | mmneueanwm = mwencnvemm; 1980 | 3 : 1981 | mmneueanwm = mewmvmcwnm; 1982 | endcase 1983 | case (mcvawaawam) 1984 | 0 : 1985 | mvcueuwcmm = mmneueanum; 1986 | 1 : 1987 | mvcueuwcmm = mwencnveam; 1988 | 2 : 1989 | mvcueuwcmm = mnmwawumcm; 1990 | 3 : 1991 | mvcueuwcmm = muavmvnaem; 1992 | endcase 1993 | case (maucncmucm) 1994 | 0 : 1995 | muavmvnavm = mmneueanem; 1996 | 1 : 1997 | muavmvnavm = mewmvmcwmm; 1998 | 2 : 1999 | muavmvnavm = mwencnvenm; 2000 | 3 : 2001 | muavmvnavm = mnmwawumwm; 2002 | endcase 2003 | case (maucnccncm) 2004 | 0 : 2005 | mnmwawnunm = maucncamam; 2006 | 1 : 2007 | mnmwawnunm = mcvawacecm; 2008 | 2 : 2009 | mnmwawnunm = mewmvmecem; 2010 | 3 : 2011 | mnmwawnunm = mmneuemamm; 2012 | endcase 2013 | case (mmneueeuem) 2014 | 0 : 2015 | mewmvmecum = mvcueuvwmm; 2016 | 1 : 2017 | mewmvmecum = mcvawacenm; 2018 | 2 : 2019 | mewmvmecum = maucncamwm; 2020 | 3 : 2021 | mewmvmecum = mmneuemavm; 2022 | endcase 2023 | case (mewmvmmvmm) 2024 | 0 : 2025 | maucncaavm = mnmwawnnem; 2026 | 1 : 2027 | maucncaavm = mwencnwwmm; 2028 | 2 : 2029 | maucncaavm = mewmvmeenm; 2030 | 3 : 2031 | maucncaavm = mmneuemmwm; 2032 | endcase 2033 | case (mwencnncnm) 2034 | 0 : 2035 | mwencnwnvm = mcvawacaem; 2036 | 1 : 2037 | mwencnwnvm = maucncacmm; 2038 | 2 : 2039 | mwencnwnvm = muavmvuvnm; 2040 | 3 : 2041 | mwencnwnvm = mvcueuvuwm; 2042 | endcase 2043 | case (mnmwawwawm) 2044 | 0 : 2045 | maucncavwm = mnmwawnecm; 2046 | 1 : 2047 | maucncavwm = muavmvucem; 2048 | 2 : 2049 | maucncavwm = mvcueuvamm; 2050 | 3 : 2051 | maucncavwm = mcvawacunm; 2052 | endcase 2053 | case (muavmvvmvm) 2054 | 0 : 2055 | mnmwawnewm = maucncavcm; 2056 | 1 : 2057 | mnmwawnewm = mmneuemwem; 2058 | 2 : 2059 | mnmwawnewm = mewmvmenmm; 2060 | 3 : 2061 | mnmwawnewm = mwencnwmnm; 2062 | endcase 2063 | case (mvcueuueum) 2064 | 0 : 2065 | maucncancm = mmneuemuwm; 2066 | 1 : 2067 | maucncancm = maucncanvm; 2068 | 2 : 2069 | maucncancm = mcvawacwum; 2070 | 3 : 2071 | maucncancm = mcvawacwam; 2072 | endcase 2073 | case (mmneueeaum) 2074 | 0 : 2075 | mcvawaaenm = mwencnnvam; 2076 | 1 : 2077 | mcvawaaenm = mnmwawwucm; 2078 | 2 : 2079 | mcvawaaenm = muavmvvnem; 2080 | 3 : 2081 | mcvawaaenm = mvcueuuwmm; 2082 | endcase 2083 | case (maucnccnam) 2084 | 0 : 2085 | mcvawaamum = mwencnnumm; 2086 | 1 : 2087 | mcvawaamum = mewmvmmanm; 2088 | 2 : 2089 | mcvawaamum = mmneueecwm; 2090 | 3 : 2091 | mcvawaamum = maucnccevm; 2092 | endcase 2093 | case (mcvawaawcm) 2094 | 0 : 2095 | mvcueuuuum = mewmvmmmmm; 2096 | 1 : 2097 | mvcueuuuum = mwencnnnnm; 2098 | 2 : 2099 | mvcueuuuum = mnmwawwwwm; 2100 | 3 : 2101 | mvcueuuuum = muavmvvvvm; 2102 | endcase 2103 | case (muavmvvvem) 2104 | 0 : 2105 | mewmvmmmum = mvcueuuumm; 2106 | 1 : 2107 | mewmvmmmum = mcvawaaanm; 2108 | 2 : 2109 | mewmvmmmum = maucncccwm; 2110 | 3 : 2111 | mewmvmmmum = mmneueeevm; 2112 | endcase 2113 | case (mewmvmmvem) 2114 | 0 : 2115 | mnmwawwnvm = maucnccaem; 2116 | 1 : 2117 | mnmwawwnvm = mcvawaacmm; 2118 | 2 : 2119 | mnmwawwnvm = mvcueuuvnm; 2120 | 3 : 2121 | mnmwawwnvm = muavmvvuwm; 2122 | endcase 2123 | case (mmneueeumm) 2124 | 0 : 2125 | maucnccavm = mnmwawwnem; 2126 | 1 : 2127 | maucnccavm = mwencnnwmm; 2128 | 2 : 2129 | maucnccavm = mewmvmmenm; 2130 | 3 : 2131 | maucnccavm = mmneueemwm; 2132 | endcase 2133 | case (mnmwawwanm) 2134 | 0 : 2135 | mmneueenvm = muavmvvaem; 2136 | 1 : 2137 | mmneueenvm = mvcueuucmm; 2138 | 2 : 2139 | mmneueenvm = mcvawaavnm; 2140 | 3 : 2141 | mmneueenvm = maucnccuwm; 2142 | endcase 2143 | case (mwencnncwm) 2144 | 0 : 2145 | muavmvvavm = mmneueenem; 2146 | 1 : 2147 | muavmvvavm = mewmvmmwmm; 2148 | 2 : 2149 | muavmvvavm = mwencnnenm; 2150 | 3 : 2151 | muavmvvavm = mnmwawwmwm; 2152 | endcase 2153 | mcvawamwum = muavmvnaum; 2154 | mewmvmaumm = mcvawaaewm; 2155 | mwencnuaum = mwencnnnam; 2156 | mcvawamvmm = mvcueuuevm ? mmneuecncm : mewmvmacmm; 2157 | mcvawamvam = mnmwawvuwm ? mvcueuncvm : muavmvwnvm; 2158 | mnmwawuwwm = muavmvvmum ? mewmvmcmmm : muavmvwncm; 2159 | mvcueuwuem = mmneueeuam ? mnmwawuwam : mewmvmacnm; 2160 | mcvawaeaum = maucncemvm ? mmneueaewm : mcvawameum; 2161 | mnmwawunnm = mvcueunwcm ? mewmvmceem : mwencnuvem; 2162 | mnmwawuncm = mewmvmmvcm ? mwencnvwum : mewmvmacwm; 2163 | mcvawaecvm = maucncemum ? mmneueamnm : mnmwawvuam; 2164 | maucncmmmm = mcvawaawem ? mewmvmcccm : muavmvwnmm; 2165 | mvcueuwwam = maucnccnmm ? muavmvnnvm : mewmvmacvm; 2166 | mcvawaeewm = mwencnuvam ? {1'b0, muavmvnnmm[15:0]} : {mnmwawvucm[15], mnmwawvucm[15:0]}; 2167 | maucncmeem = muavmvvmnm ? mewmvmcaam : mcvawamenm; 2168 | muavmvnwum = mvcueuuewm ? mwencnvuwm : mewmvmacum; 2169 | mcvawaemnm = mnmwawvacm ? muavmvnwem : muavmvwmem; 2170 | mnmwawuccm = mwencnncvm ? mmneueavum : maucncenwm; 2171 | mcvawaenvm = mnmwawwaum ? mmneueavnm : mnmwawvaam; 2172 | mcvawaenmm = mewmvmmvam ? mmneueavcm : muavmvwmmm; 2173 | mnmwawuaam = mcvawamwwm ? mmneueauvm : mewmvmavvm; 2174 | mmneueauwm = muavmvwmam ? mwencnvcmm : mvcueunecm; 2175 | mcvawaewem = mnmwawvamm ? mmneueauam : mmneuecunm; 2176 | mcvawaevum = mcvawamwvm ? mmneueanwm : maucncenum; 2177 | maucncmuwm = mmneueeucm ? mvcueuwcmm : mnmwawvaem; 2178 | muavmvncam = mcvawamwum ? muavmvnavm : mcvawamwam; 2179 | mcvawaeuvm = mmneueeucm ? mmneueawnm : {1'b0, maucncencm[13:0]}; 2180 | mvcueuvwvm = maucnccnem ? mnmwawnunm : muavmvweem; 2181 | maucncaacm = mcvawaawmm ? mewmvmecum : mmneuecvvm; 2182 | maucncacam = muavmvwecm ? maucncaavm : mnmwawvcem; 2183 | mnmwawnwam = mmneuecvwm ? mwencnwnvm : maucncewvm; 2184 | mewmvmenum = mvcueunmcm ? maucncavwm : mwencnuaem; 2185 | mvcueuvaum = mvcueuuenm ? mnmwawnewm : mcvawamnvm; 2186 | mewmvmevmm = muavmvvmwm ? maucncancm : mwencnuawm; 2187 | mmneueeavm = mewmvmaumm ? mcvawaaenm : mwencnuanm; 2188 | mnmwawwvcm = mnmwawwavm ? mcvawaamum : mewmvmauam; 2189 | mmneueeecm = mwencnncum ? mvcueuuuum : mvcueunmnm; 2190 | muavmvvvcm = mwencnuaum ? mewmvmmmum : mmneuecvam; 2191 | mwencnnwam = mwencnmcam ? mnmwawwnvm : muavmvwenm; 2192 | mvcueuucam = mnmwawvcum ? maucnccavm : muavmvwcam; 2193 | mewmvmmwam = mnmwaweacm ? mmneueenvm : mmneuecwnm; 2194 | muavmvvcam = maucncevum ? muavmvvavm : mvcueunaam; 2195 | mnmwawnmwm = mwencnuvwm[39:24]; 2196 | muavmvuavm = mwencnuvwm[31:16]; 2197 | mvcueuvcum = mwencnuvwm[23:8]; 2198 | mwencnwcam = mwencnuvwm[15:0]; 2199 | maucncawcm = mwencnuvwm[39:24]; 2200 | mmneuemvem = mwencnuvwm[31:16]; 2201 | mewmvmeumm = mwencnuvwm[23:8]; 2202 | mwencnwanm = mwencnuvwm[15:0]; 2203 | end 2204 | 2205 | always @(posedge clock) 2206 | if (reset) 2207 | begin 2208 | mvcueuncam <= 0; 2209 | mnmwawvmem <= 0; 2210 | mwencnvewm <= 0; 2211 | muavmvvnmm <= 0; 2212 | mewmvmmmvm <= 0; 2213 | mewmvmacmm <= 16'h0; 2214 | muavmvwnvm <= 8'h0; 2215 | muavmvwncm <= 16'h0; 2216 | mewmvmacnm <= 16'h0; 2217 | mcvawameum <= 8'h0; 2218 | mwencnuvem <= 8'h0; 2219 | mewmvmacwm <= 16'h0; 2220 | mnmwawvuam <= 32'h0; 2221 | muavmvwnmm <= 32'h0; 2222 | mewmvmacvm <= 16'h0; 2223 | mnmwawvucm <= 16'h0; 2224 | mcvawamenm <= 16'h0; 2225 | mewmvmacum <= 48'h0; 2226 | muavmvwmem <= 64'h0; 2227 | maucncenwm <= 16'h0; 2228 | mnmwawvaam <= 16'h0; 2229 | muavmvwmmm <= 48'h0; 2230 | mewmvmavvm <= 16'h0; 2231 | mvcueunecm <= 16'h0; 2232 | mmneuecunm <= 64'h0; 2233 | maucncenum <= 8'h0; 2234 | mnmwawvaem <= 16'h0; 2235 | mcvawamwam <= 8'h0; 2236 | maucncencm <= 14'h3000; 2237 | muavmvweem <= 64'h0; 2238 | mmneuecvvm <= 8'h0; 2239 | mnmwawvcem <= 32'h0; 2240 | maucncewvm <= 32'h0; 2241 | mwencnuaem <= 32'h0; 2242 | mcvawamnvm <= 8'h0; 2243 | mwencnuawm <= 32'h0; 2244 | mwencnuanm <= 48'h0; 2245 | mewmvmauam <= 64'h0; 2246 | mvcueunmnm <= 64'h0; 2247 | mmneuecvam <= 8'h0; 2248 | muavmvwenm <= 64'h0; 2249 | muavmvwcam <= 8'h0; 2250 | mmneuecwnm <= 8'h0; 2251 | mvcueunaam <= 8'h0; 2252 | end 2253 | else 2254 | if (mcvawaancm) 2255 | begin 2256 | mvcueuncam <= mvcueuueem ? mewmvmacem : mvcueuncam; 2257 | mnmwawvmem <= mvcueuueem ? mmneuecamm : mnmwawvmem; 2258 | mwencnvewm <= mvcueuueem ? mnmwawumnm : mwencnvewm; 2259 | muavmvvnmm <= mvcueuueem ? mvcueuuwem : muavmvvnmm; 2260 | mewmvmmmvm <= mvcueuueem ? mcvawaaawm : mewmvmmmvm; 2261 | mewmvmacmm <= mcvawamvmm; 2262 | muavmvwnvm <= mcvawamvam; 2263 | muavmvwncm <= mnmwawuwwm; 2264 | mewmvmacnm <= mvcueuwuem; 2265 | mcvawameum <= mcvawaeaum; 2266 | mwencnuvem <= mnmwawunnm; 2267 | mewmvmacwm <= mnmwawuncm; 2268 | mnmwawvuam <= mcvawaecvm; 2269 | muavmvwnmm <= maucncmmmm; 2270 | mewmvmacvm <= mvcueuwwam; 2271 | mnmwawvucm <= mcvawaeewm[15:0]; 2272 | mcvawamenm <= maucncmeem; 2273 | mewmvmacum <= muavmvnwum; 2274 | muavmvwmem <= mcvawaemnm; 2275 | maucncenwm <= mnmwawuccm; 2276 | mnmwawvaam <= mcvawaenvm; 2277 | muavmvwmmm <= mcvawaenmm; 2278 | mewmvmavvm <= mnmwawuaam; 2279 | mvcueunecm <= mmneueauwm; 2280 | mmneuecunm <= mcvawaewem; 2281 | maucncenum <= mcvawaevum; 2282 | mnmwawvaem <= maucncmuwm; 2283 | mcvawamwam <= muavmvncam; 2284 | maucncencm <= mcvawaeuvm[13:0]; 2285 | muavmvweem <= mvcueuvwvm; 2286 | mmneuecvvm <= maucncaacm; 2287 | mnmwawvcem <= maucncacam; 2288 | maucncewvm <= mnmwawnwam; 2289 | mwencnuaem <= mewmvmenum; 2290 | mcvawamnvm <= mvcueuvaum; 2291 | mwencnuawm <= mewmvmevmm; 2292 | mwencnuanm <= mmneueeavm; 2293 | mewmvmauam <= mnmwawwvcm; 2294 | mvcueunmnm <= mmneueeecm; 2295 | mmneuecvam <= muavmvvvcm; 2296 | muavmvwenm <= mwencnnwam; 2297 | muavmvwcam <= mvcueuucam; 2298 | mmneuecwnm <= mewmvmmwam; 2299 | mvcueunaam <= muavmvvcam; 2300 | muavmvcmam <= mewmvmnvem; 2301 | muavmvcmmm <= mvcueuueem; 2302 | muavmvcmem <= mmneuewumm; 2303 | mewmvmnvum <= mnmwawwaam; 2304 | mmneuewuvm <= mnmwaweanm; 2305 | mwencnmccm <= mwencnnccm; 2306 | mwencnmcnm <= mmneueeucm; 2307 | mvcueuaemm <= mnmwawvacm; 2308 | mvcueuaeem <= muavmvwecm; 2309 | maucncvnnm <= mvcueunmcm; 2310 | mewmvmnvvm <= mnmwawvcum; 2311 | mmneuewuum <= maucncevum; 2312 | mnmwaweaam <= mcvawamwum; 2313 | mcvawauwwm <= mwencnuaum; 2314 | mwencnmcwm <= mnmwawnmwm; 2315 | mvcueuaevm <= muavmvuavm; 2316 | muavmvcmum <= mvcueuvcum; 2317 | mmneuewuam <= mwencnwcam; 2318 | mewmvmnvcm <= maucncawcm; 2319 | mcvawauwem <= mmneuemvem; 2320 | maucncvnmm <= mewmvmeumm; 2321 | muavmvcmnm <= mwencnwanm; 2322 | end 2323 | 2324 | always @(*) 2325 | begin 2326 | mmneueevvm = mvcueuummm; 2327 | mvcueuumam = mvcueuumum; 2328 | muavmvvecm = mmneueevvm & mvcueuumam; 2329 | muavmvwwem = mcvawamuum; 2330 | end 2331 | 2332 | always @(posedge clock) 2333 | if (muavmvvecm) 2334 | begin 2335 | mvcueunamm <= muavmvwwem; 2336 | mmneueevcm <= muavmvcmvm; 2337 | maucnccwem <= mvcueuaeum; 2338 | mcvawaanmm <= maucncvnam; 2339 | end 2340 | 2341 | always @(*) 2342 | begin 2343 | mewmvmmuem = maucnccwum; 2344 | mnmwawwcnm = mnmwawwcwm; 2345 | mwencnnawm = mewmvmmuem & mnmwawwcnm; 2346 | mewmvmavnm = mnmwawvaem[10:0]; 2347 | muavmvnccm = maucncencm[13:2]; 2348 | mwencnvmmm = maucncencm[1:0]; 2349 | mewmvmavmm = maucncencm; 2350 | mcvawaeunm = mcvawamwam == 8'h53; 2351 | muavmvwmvm = maucncencm; 2352 | mvcueuwaem = mcvawamwam == 8'h48; 2353 | mcvawamwcm = maucncencm; 2354 | mmneueawam = mcvawamwam == 8'h59; 2355 | mnmwawvanm = maucncencm; 2356 | mwencnvmvm = mcvawamwam == 8'h41; 2357 | muavmvwmum = maucncencm; 2358 | mvcueuwanm = mcvawamwam == 8'h46; 2359 | mcvawamwem = maucncencm; 2360 | mmneueawem = mcvawamwam == 8'h55; 2361 | mvcueunewm = maucncencm; 2362 | maucncmvam = mcvawamwam == 8'h45; 2363 | mewmvmavam = maucncencm; 2364 | mvcueuwavm = mcvawamwam == 8'h43; 2365 | mcvawamwmm = maucncencm; 2366 | muavmvuwnm = mcvawamwam == 8'h58; 2367 | mnmwawvavm = maucncencm; 2368 | maucncaeem = mcvawamwam == 8'h44; 2369 | mwencnuacm = maucncencm; 2370 | mcvawacmam = mcvawamwam == 8'h50; 2371 | maucncewnm = maucncencm; 2372 | muavmvuwvm = mcvawamwam == 8'h51; 2373 | mcvawacmwm = muavmvcmem ? 14'h3000 : 14'h0; 2374 | muavmvunam = muavmvcmem ? 14'h3000 : 14'h0; 2375 | mewmvmeeum = muavmvcmem ? 14'h3000 : 14'h0; 2376 | mcvawacavm = muavmvcmem ? 14'h3000 : 14'h0; 2377 | mvcueuvcwm = muavmvcmem ? 14'h3000 : 14'h0; 2378 | mvcueuvmcm = muavmvcmem ? 14'h3000 : 14'h0; 2379 | mmneueeawm = muavmvcmem ? 14'h3000 : 14'h0; 2380 | maucncceam = muavmvcmem ? 14'h3000 : 14'h0; 2381 | mvcueuuvum = muavmvcmem ? 14'h3000 : 14'h0; 2382 | mwencnnmmm = muavmvwnmm == nasdaq_ip_addr; 2383 | mmneueewwm = maucncenwm == nasdaq_udp_port; 2384 | case (mcvawamwam) 2385 | 83 : 2386 | mwencnnmam = {24'b0, mmneuecvam[7:0]}; 2387 | 72 : 2388 | mwencnnmam = {24'b0, muavmvwcam[7:0]}; 2389 | 89 : 2390 | mwencnnmam = {24'b0, mvcueunaam[7:0]}; 2391 | default : 2392 | mwencnnmam = mnmwawvcem; 2393 | endcase 2394 | mvcueuuamm = mmneuecvvm == 8'h42; 2395 | mewmvmmnum = mcvawamwam == 8'h45; 2396 | mwencnnmcm = mcvawamwam == 8'h58; 2397 | maucnccvam = {2'b0, mwencnvmmm[1:0]}; 2398 | mcvawaevmm = {1'b0, mmneuewuvm[13:0]} + {4'b0, mewmvmavnm[10:0]}; 2399 | mnmwawueem = mewmvmnvum == {2'b0, muavmvnccm[11:0]}; 2400 | mnmwawnvnm = {1'b0, mnmwawvanm[13:0]} + 15'h11; 2401 | muavmvuwam = {1'b0, muavmvwmum[13:0]} + 15'h11; 2402 | mmneuemcnm = {1'b0, mcvawamwem[13:0]} + 15'h19; 2403 | mvcueuvnam = {1'b0, mvcueunewm[13:0]} + 15'h11; 2404 | mewmvmeanm = {1'b0, mewmvmavam[13:0]} + 15'h11; 2405 | mwencnwuam = {1'b0, mcvawamwmm[13:0]} + 15'h11; 2406 | mcvawacmnm = {1'b0, mnmwawvavm[13:0]} + 15'h11; 2407 | mnmwawnvam = {1'b0, mwencnuacm[13:0]} + 15'h11; 2408 | mewmvmecmm = {1'b0, mnmwawvanm[13:0]} + 15'h12; 2409 | mvcueuvwum = {1'b0, muavmvwmum[13:0]} + 15'h12; 2410 | mwencnwvmm = {1'b0, mwencnuacm[13:0]} + 15'h12; 2411 | muavmvuuvm = {1'b0, mnmwawvanm[13:0]} + 15'h16; 2412 | mewmvmeeem = {1'b0, muavmvwmum[13:0]} + 15'h16; 2413 | mvcueuvvvm = {1'b0, mcvawamwem[13:0]} + 15'h1D; 2414 | mcvawaccem = {1'b0, mvcueunewm[13:0]} + 15'h15; 2415 | mwencnwwvm = {1'b0, mewmvmavam[13:0]} + 15'h15; 2416 | maucncaaem = {1'b0, mcvawamwmm[13:0]} + 15'h15; 2417 | mnmwawnnvm = {1'b0, mwencnuacm[13:0]} + 15'h16; 2418 | muavmvuuem = {1'b0, maucncewnm[13:0]} + 15'h11; 2419 | mvcueuvuvm = {1'b0, maucncewnm[13:0]} + 15'hD; 2420 | mcvawacawm = {1'b0, mnmwawvanm[13:0]} + 15'h22; 2421 | mnmwawnwcm = {1'b0, muavmvwmum[13:0]} + 15'h22; 2422 | maucncacwm = {1'b0, mcvawamwem[13:0]} + 15'h21; 2423 | muavmvuvcm = {1'b0, mewmvmavam[13:0]} + 15'h22; 2424 | mmneuemewm = {1'b0, mwencnuacm[13:0]} + 15'h22; 2425 | mvcueuvucm = {1'b0, maucncewnm[13:0]} + 15'h15; 2426 | mcvawacuwm = {1'b0, maucncewnm[13:0]} + 15'h1E; 2427 | mnmwawnenm = {1'b0, mewmvmavmm[13:0]} + 15'h1; 2428 | mvcueuvcam = {1'b0, muavmvwmvm[13:0]} + 15'h1; 2429 | mewmvmewnm = {1'b0, mcvawamwcm[13:0]} + 15'h1; 2430 | muavmvuaam = {1'b0, mnmwawvanm[13:0]} + 15'h1; 2431 | mmneuemnnm = {1'b0, muavmvwmum[13:0]} + 15'h1; 2432 | mnmwawnmam = {1'b0, mcvawamwem[13:0]} + 15'h1; 2433 | maucncaunm = {1'b0, mvcueunewm[13:0]} + 15'h1; 2434 | mwencnweam = {1'b0, mewmvmavam[13:0]} + 15'h1; 2435 | mcvawacvnm = {1'b0, mcvawamwmm[13:0]} + 15'h1; 2436 | mewmvmewam = {1'b0, mnmwawvavm[13:0]} + 15'h1; 2437 | mvcueuvcnm = {1'b0, mwencnuacm[13:0]} + 15'h1; 2438 | mmneuemnam = {1'b0, maucncewnm[13:0]} + 15'h1; 2439 | mwencnwccm = {1'b0, muavmvwmum[13:0]} + 15'h26; 2440 | maucncanam = {1'b0, mewmvmavmm[13:0]} + 15'h3; 2441 | mnmwawnanm = {1'b0, muavmvwmvm[13:0]} + 15'h3; 2442 | mmneuemuam = {1'b0, mcvawamwcm[13:0]} + 15'h3; 2443 | muavmvumnm = {1'b0, mnmwawvanm[13:0]} + 15'h3; 2444 | mewmvmevam = {1'b0, muavmvwmum[13:0]} + 15'h3; 2445 | mvcueuvenm = {1'b0, mcvawamwem[13:0]} + 15'h3; 2446 | mnmwawncam = {1'b0, mvcueunewm[13:0]} + 15'h3; 2447 | maucncawnm = {1'b0, mewmvmavam[13:0]} + 15'h3; 2448 | mwencnwaam = {1'b0, mcvawamwmm[13:0]} + 15'h3; 2449 | mcvawacnnm = {1'b0, mnmwawvavm[13:0]} + 15'h3; 2450 | mvcueuvmam = {1'b0, mwencnuacm[13:0]} + 15'h3; 2451 | mewmvmeunm = {1'b0, maucncewnm[13:0]} + 15'h3; 2452 | mvcueuvmnm = {1'b0, mewmvmavmm[13:0]} + 15'h9; 2453 | mmneuemvam = {1'b0, muavmvwmvm[13:0]} + 15'h9; 2454 | muavmvuenm = {1'b0, mcvawamwcm[13:0]} + 15'h9; 2455 | mewmvmmcam = {1'b0, mnmwawvanm[13:0]} + 15'h9; 2456 | mvcueuuwnm = {1'b0, muavmvwmum[13:0]} + 15'h9; 2457 | mmneueeaam = {1'b0, mcvawamwem[13:0]} + 15'h9; 2458 | muavmvvnnm = {1'b0, mvcueunewm[13:0]} + 15'h9; 2459 | maucnccmam = {1'b0, mewmvmavam[13:0]} + 15'h9; 2460 | mnmwawwunm = {1'b0, mcvawamwmm[13:0]} + 15'h9; 2461 | mcvawaaeam = {1'b0, mnmwawvavm[13:0]} + 15'h9; 2462 | mwencnnvnm = {1'b0, mwencnuacm[13:0]} + 15'h9; 2463 | mvcueuuwam = {1'b0, maucncewnm[13:0]} + 15'h9; 2464 | maucnccemm = {1'b0, muavmvwmvm[13:0]} + 15'h11; 2465 | mnmwawwvum = {1'b0, mcvawamwcm[13:0]} + 15'h11; 2466 | mcvawaammm = {1'b0, mnmwawvanm[13:0]} + 15'h1E; 2467 | mwencnnuum = {1'b0, muavmvwmum[13:0]} + 15'h1E; 2468 | mewmvmmamm = {1'b0, mwencnuacm[13:0]} + 15'h1E; 2469 | mewmvmmaum = {1'b0, mcvawamwem[13:0]} + 15'h11; 2470 | mwencnnnum = {1'b0, mewmvmavmm[13:0]} + 15'hA; 2471 | maucncccvm = {1'b0, mvcueunewm[13:0]} + 15'h1D; 2472 | mwencnnnem = {1'b0, mewmvmavam[13:0]} + 15'h1D; 2473 | mcvawaaavm = {1'b0, mwencnuacm[13:0]} + 15'h2A; 2474 | mmneueemem = {1'b0, maucncewnm[13:0]} + 15'h1D; 2475 | mmneueemvm = {1'b0, muavmvwmvm[13:0]} + 15'h12; 2476 | maucnccuvm = {1'b0, mewmvmavam[13:0]} + 15'h1E; 2477 | mnmwawwmvm = {1'b0, mcvawamwcm[13:0]} + 15'h12; 2478 | mewmvmmnwm = {1'b0, muavmvwccm[31:0]} + {32'b0, mnmwaweaam}; 2479 | mewmvmcnnm = mwencnmccm[maucnccvam]; 2480 | mwencnucnm = mcvawaeunm; 2481 | mvcueuneum = mvcueuwaem; 2482 | mewmvmavem = mmneueawam; 2483 | mwencnucwm = mwencnvmvm; 2484 | mmneuecuam = mvcueuwanm; 2485 | maucncenmm = mmneueawem; 2486 | mwencnucvm = maucncmvam; 2487 | mmneuecucm = mvcueuwavm; 2488 | mvcueunenm = muavmvuwnm; 2489 | mwencnucum = maucncaeem; 2490 | mvcueunmem = mcvawacmam; 2491 | mcvawamnwm = muavmvuwvm; 2492 | mvcueuuaem = mewmvmmnum | mwencnnmcm; 2493 | maucnccvvm = mwencnnmmm & mmneueewwm; 2494 | muavmvvcmm = mvcueuuaem & mvcueuaeem; 2495 | mnmwawveem = maucnccvvm; 2496 | mmneueawwm = mnmwawueem & mewmvmcnnm; 2497 | mcvawaeuum = ~maucncmvvm; 2498 | mwencnvmam = mmneueawwm & muavmvcmmm & mcvawaeuum; 2499 | muavmvuvum = mvcueuvuvm[12:0]; 2500 | mewmvmenvm = mcvawacuwm[12:0]; 2501 | mvcueuveem = mwencnwccm[12:0]; 2502 | mnmwawwvam = mewmvmmaum[12:0]; 2503 | mmneueeeam = mwencnnnum[12:0]; 2504 | mewmvmmeum = mmneueemvm[12:0]; 2505 | mcvawaavum = maucnccuvm[12:0]; 2506 | mwencnneum = mnmwawwmvm[12:0]; 2507 | muavmvnawm = {1'b0, mcvawaevmm[14:0]} + 16'h2; 2508 | mmneuecuem = mwencnvmam; 2509 | mmneueawvm = mmneuecuem & mwencnucnm; 2510 | maucncmvnm = mmneuecuem & mvcueuneum; 2511 | mcvawaeuem = mmneuecuem & mewmvmavem; 2512 | mnmwawuevm = mmneuecuem & mmneuecuam; 2513 | mwencnvmnm = mmneuecuem & maucncenmm; 2514 | mmneuemcam = mmneuecuem & mmneuecucm; 2515 | maucncaeam = mmneuecuem & mcvawamnwm; 2516 | mewmvmcnam = mmneuecuem & mwencnucwm; 2517 | mewmvmcnem = mmneuecuem & mwencnucvm; 2518 | mwencnwuvm = mmneuecuem & mvcueunenm; 2519 | mvcueuvnnm = mmneuecuem & mwencnucum; 2520 | mmneuemcem = mmneuecuem & mvcueunmem; 2521 | mnmwawvawm = mmneueawvm; 2522 | maucncenam = maucncmvnm; 2523 | mmneuecumm = mcvawaeuem; 2524 | mewmvmavcm = mnmwawuevm; 2525 | muavmvwmnm = mwencnvmnm; 2526 | maucncenem = mmneuemcam; 2527 | mewmvmauvm = maucncaeam; 2528 | mvcueunevm = mewmvmcnam; 2529 | mnmwawvaum = mewmvmcnem; 2530 | muavmvwmwm = mwencnwuvm; 2531 | mnmwawvcam = mvcueuvnnm; 2532 | muavmvwemm = mmneuemcem; 2533 | mvcueuvnvm = mvcueunevm ? mnmwawnvnm : 15'h0; 2534 | mwencnwuem = mewmvmavcm ? muavmvuwam : 15'h0; 2535 | mcvawacmvm = muavmvwmnm ? mmneuemcnm : 15'h0; 2536 | mnmwawnvem = mnmwawvaum ? mvcueuvnam : 15'h0; 2537 | maucncaevm = maucncenem ? mewmvmeanm : 15'h0; 2538 | muavmvuwem = muavmvwmwm ? mwencnwuam : 15'h0; 2539 | mmneuemcvm = mnmwawvcam ? mcvawacmnm : 15'h0; 2540 | mvcueuvnem = muavmvwemm ? mnmwawnvam : 15'h0; 2541 | mnmwawnuwm = mvcueunevm ? mewmvmecmm : 15'h0; 2542 | muavmvuncm = mewmvmavcm ? mvcueuvwum : 15'h0; 2543 | mmneuemawm = muavmvwemm ? mwencnwvmm : 15'h0; 2544 | maucncaaam = mvcueunevm ? muavmvuuvm : 15'h0; 2545 | mnmwawnnnm = mewmvmavcm ? mewmvmeeem : 15'h0; 2546 | mmneuemmam = muavmvwmnm ? mvcueuvvvm : 15'h0; 2547 | muavmvuunm = mnmwawvaum ? mcvawaccem : 15'h0; 2548 | mewmvmeeam = maucncenem ? mwencnwwvm : 15'h0; 2549 | mvcueuvvnm = muavmvwmwm ? maucncaaem : 15'h0; 2550 | mwencnwwam = muavmvwemm ? mnmwawnnvm : 15'h0; 2551 | mcvawaccnm = mewmvmauvm ? muavmvuuem : 15'h0; 2552 | mmneuemeum = mvcueunevm ? mcvawacawm : 15'h0; 2553 | mvcueuvumm = mewmvmavcm ? mnmwawnwcm : 15'h0; 2554 | mewmvmemum = muavmvwmnm ? maucncacwm : 15'h0; 2555 | mwencnwnmm = maucncenem ? muavmvuvcm : 15'h0; 2556 | mcvawacaum = muavmvwemm ? mmneuemewm : 15'h0; 2557 | mnmwawnwmm = mewmvmauvm ? mvcueuvucm : 15'h0; 2558 | mvcueuvavm = mnmwawvawm ? mnmwawnenm : 15'h0; 2559 | mnmwawnmem = maucncenam ? mvcueuvcam : 15'h0; 2560 | maucncauvm = mmneuecumm ? mewmvmewnm : 15'h0; 2561 | mwencnweem = mvcueunevm ? muavmvuaam : 15'h0; 2562 | mcvawacvvm = mewmvmavcm ? mmneuemnnm : 15'h0; 2563 | mvcueuvcem = muavmvwmnm ? mnmwawnmam : 15'h0; 2564 | mewmvmewvm = mnmwawvaum ? maucncaunm : 15'h0; 2565 | muavmvuaem = maucncenem ? mwencnweam : 15'h0; 2566 | mmneuemnvm = muavmvwmwm ? mcvawacvnm : 15'h0; 2567 | maucncauem = mnmwawvcam ? mewmvmewam : 15'h0; 2568 | mnmwawnmvm = muavmvwemm ? mvcueuvcnm : 15'h0; 2569 | mcvawacvem = mewmvmauvm ? mmneuemnam : 15'h0; 2570 | mewmvmevem = mnmwawvawm ? maucncanam : 15'h0; 2571 | mvcueuvevm = maucncenam ? mnmwawnanm : 15'h0; 2572 | mcvawacwem = mmneuecumm ? mmneuemuam : 15'h0; 2573 | mwencnwcvm = mvcueunevm ? muavmvumnm : 15'h0; 2574 | maucncanem = mewmvmavcm ? mewmvmevam : 15'h0; 2575 | mnmwawnavm = muavmvwmnm ? mvcueuvenm : 15'h0; 2576 | mvcueuvmem = mnmwawvaum ? mnmwawncam : 15'h0; 2577 | mewmvmeuvm = maucncenem ? maucncawnm : 15'h0; 2578 | muavmvueem = muavmvwmwm ? mwencnwaam : 15'h0; 2579 | mmneuemvvm = mnmwawvcam ? mcvawacnnm : 15'h0; 2580 | mnmwawncem = muavmvwemm ? mvcueuvmam : 15'h0; 2581 | maucncawvm = mewmvmauvm ? mewmvmeunm : 15'h0; 2582 | mnmwawncvm = mnmwawvawm ? mvcueuvmnm : 15'h0; 2583 | mcvawacnem = maucncenam ? mmneuemvam : 15'h0; 2584 | mwencnwavm = mmneuecumm ? muavmvuenm : 15'h0; 2585 | maucnccmem = mvcueunevm ? mewmvmmcam : 15'h0; 2586 | mnmwawwuvm = mewmvmavcm ? mvcueuuwnm : 15'h0; 2587 | mcvawaaeem = muavmvwmnm ? mmneueeaam : 15'h0; 2588 | mwencnnvvm = mnmwawvaum ? muavmvvnnm : 15'h0; 2589 | mewmvmmcem = maucncenem ? maucnccmam : 15'h0; 2590 | mvcueuuwvm = muavmvwmwm ? mnmwawwunm : 15'h0; 2591 | mmneueeaem = mnmwawvcam ? mcvawaaeam : 15'h0; 2592 | muavmvvnvm = muavmvwemm ? mwencnnvnm : 15'h0; 2593 | mnmwawwuem = mewmvmauvm ? mvcueuuwam : 15'h0; 2594 | mvcueuunwm = maucncenam ? maucnccemm : 15'h0; 2595 | mmneueeccm = mmneuecumm ? mnmwawwvum : 15'h0; 2596 | muavmvvwwm = mvcueunevm ? mcvawaammm : 15'h0; 2597 | maucnccecm = mewmvmavcm ? mwencnnuum : 15'h0; 2598 | mnmwawwvwm = muavmvwemm ? mewmvmmamm : 15'h0; 2599 | muavmvvvam = mnmwawvaum ? maucncccvm : 15'h0; 2600 | mmneueeenm = maucncenem ? mwencnnnem : 15'h0; 2601 | mcvawaacam = muavmvwemm ? mcvawaaavm : 15'h0; 2602 | mwencnnwnm = mewmvmauvm ? mmneueemem : 15'h0; 2603 | maucnccvnm = maucncvnnm | mcvawauwwm | mewmvmnvvm | mmneuewuum | muavmvvcmm; 2604 | mewmvmeaem = mvcueunevm | mewmvmavcm | muavmvwmnm | mnmwawvaum | maucncenem | muavmvwmwm | mnmwawvcam | muavmvwemm | muavmvcmem; 2605 | mewmvmeavm = mvcueuvnvm | mwencnwuem | mcvawacmvm | mnmwawnvem | maucncaevm | muavmvuwem | mmneuemcvm | mvcueuvnem | {1'b0, mcvawacmwm[13:0]}; 2606 | maucncamcm = mvcueunevm | mewmvmavcm | muavmvwemm | muavmvcmem; 2607 | mvcueuvwcm = mnmwawnuwm | muavmvuncm | mmneuemawm | {1'b0, muavmvunam[13:0]}; 2608 | mwencnwwnm = mvcueunevm | mewmvmavcm | muavmvwmnm | mnmwawvaum | maucncenem | muavmvwmwm | muavmvwemm | mewmvmauvm | muavmvcmem; 2609 | mnmwawnnam = maucncaaam | mnmwawnnnm | mmneuemmam | muavmvuunm | mewmvmeeam | mvcueuvvnm | mwencnwwam | mcvawaccnm | {1'b0, mewmvmeeum[13:0]}; 2610 | mnmwawnwnm = mmneuememm | muavmvcmem; 2611 | muavmvuvmm = mvcueunevm | mewmvmavcm | muavmvwmnm | maucncenem | muavmvwemm | mewmvmauvm | muavmvcmem; 2612 | maucncacum = mmneuemeum | mvcueuvumm | mewmvmemum | mwencnwnmm | mcvawacaum | mnmwawnwmm | {1'b0, mcvawacavm[13:0]}; 2613 | muavmvucmm = mvcueuvaem | muavmvcmem; 2614 | mewmvmenem = mnmwawvawm | maucncenam | mmneuecumm | mvcueunevm | mewmvmavcm | muavmvwmnm | mnmwawvaum | maucncenem | muavmvwmwm | mnmwawvcam | muavmvwemm | mewmvmauvm | muavmvcmem; 2615 | mwencnwevm = mvcueuvavm | mnmwawnmem | maucncauvm | mwencnweem | mcvawacvvm | mvcueuvcem | mewmvmewvm | muavmvuaem | mmneuemnvm | maucncauem | mnmwawnmvm | mcvawacvem | {1'b0, mvcueuvcwm[13:0]}; 2616 | mewmvmevum = mmneuemuvm | muavmvcmem; 2617 | muavmvumvm = mnmwawvawm | maucncenam | mmneuecumm | mvcueunevm | mewmvmavcm | muavmvwmnm | mnmwawvaum | maucncenem | muavmvwmwm | mnmwawvcam | muavmvwemm | mewmvmauvm | muavmvcmem; 2618 | mwencnwaem = mewmvmevem | mvcueuvevm | mcvawacwem | mwencnwcvm | maucncanem | mnmwawnavm | mvcueuvmem | mewmvmeuvm | muavmvueem | mmneuemvvm | mnmwawncem | maucncawvm | {1'b0, mvcueuvmcm[13:0]}; 2619 | maucncawem = mnmwawvawm | maucncenam | mmneuecumm | mvcueunevm | mewmvmavcm | muavmvwmnm | mnmwawvaum | maucncenem | muavmvwmwm | mnmwawvcam | muavmvwemm | mewmvmauvm | muavmvcmem; 2620 | maucnccmvm = mnmwawncvm | mcvawacnem | mwencnwavm | maucnccmem | mnmwawwuvm | mcvawaaeem | mwencnnvvm | mewmvmmcem | mvcueuuwvm | mmneueeaem | muavmvvnvm | mnmwawwuem | {1'b0, mmneueeawm[13:0]}; 2621 | mewmvmmacm = maucncenam | mmneuecumm | mvcueunevm | mewmvmavcm | muavmvwemm | muavmvcmem; 2622 | mcvawaamcm = mvcueuunwm | mmneueeccm | muavmvvwwm | maucnccecm | mnmwawwvwm | {1'b0, maucncceam[13:0]}; 2623 | maucnccewm = mcvawaamnm | muavmvcmem; 2624 | muavmvvvwm = mvcueuuunm | muavmvcmem; 2625 | mewmvmmmnm = mnmwawvaum | maucncenem | muavmvwemm | mewmvmauvm | muavmvcmem; 2626 | maucnccaam = muavmvvvam | mmneueeenm | mcvawaacam | mwencnnwnm | {1'b0, mvcueuuvum[13:0]}; 2627 | mcvawaacnm = mvcueuuvmm | muavmvcmem; 2628 | mewmvmmwnm = mwencnnemm | muavmvcmem; 2629 | mvcueuucnm = mcvawaavmm | muavmvcmem; 2630 | mcvawaauvm = muavmvcmam ? mewmvmmnwm : {1'b0, muavmvwccm[31:0]}; 2631 | mcvawacaam = {muavmvcmem, muavmvuvum}; 2632 | mmneuemwum = {muavmvcmem, mewmvmenvm}; 2633 | muavmvummm = {muavmvcmem, mvcueuveem}; 2634 | mwencnnucm = {muavmvcmem, mnmwawwvam}; 2635 | mewmvmmmcm = {muavmvcmem, mmneueeeam}; 2636 | mnmwawwnam = {muavmvcmem, mewmvmmeum}; 2637 | muavmvvaam = {muavmvcmem, mcvawaavum}; 2638 | mmneueenam = {muavmvcmem, mwencnneum}; 2639 | mcvawaauwm = mnmwawveem & maucnccvnm; 2640 | mewmvmecam = mewmvmeaem ? mewmvmeavm : {1'b0, mmneuecvum[13:0]}; 2641 | mnmwawnumm = maucncamcm ? mvcueuvwcm : {1'b0, mvcueunmmm[13:0]}; 2642 | mvcueuvvem = mwencnwwnm ? mnmwawnnam : {1'b0, mewmvmauum[13:0]}; 2643 | mmneuemeem = mnmwawnwnm ? mcvawacaam : mwencnuamm; 2644 | mvcueuvacm = muavmvuvmm ? maucncacum : {1'b0, mcvawamnum[13:0]}; 2645 | mewmvmencm = muavmvucmm ? mmneuemwum : mnmwawvcmm; 2646 | maucncauam = mewmvmenem ? mwencnwevm : {1'b0, maucncewum[13:0]}; 2647 | mcvawacwwm = mewmvmevum ? muavmvummm : mewmvmauem; 2648 | mmneuemvnm = muavmvumvm ? mwencnwaem : {1'b0, mvcueunmvm[13:0]}; 2649 | muavmvvnam = maucncawem ? maucnccmvm : {1'b0, maucncewcm[13:0]}; 2650 | mmneueecmm = mewmvmmacm ? mcvawaamcm : {1'b0, mnmwawvcwm[13:0]}; 2651 | muavmvvwmm = maucnccewm ? mwencnnucm : mmneuecvcm; 2652 | maucncccmm = muavmvvvwm ? mewmvmmmcm : muavmvwewm; 2653 | mewmvmmeem = mewmvmmmnm ? maucnccaam : {1'b0, mewmvmaucm[13:0]}; 2654 | mvcueuuvem = mcvawaacnm ? mnmwawwnam : mvcueunmwm; 2655 | mwencnneem = mewmvmmwnm ? muavmvvaam : mvcueunacm; 2656 | mcvawaavem = mvcueuucnm ? mmneueenam : mewmvmanwm; 2657 | maucnccvum = mnmwawwemm ? muavmvwmem : {31'b0, mcvawaauvm[32:0]}; 2658 | mwencnummm = mwencnnmam; 2659 | mmneuecwwm = mcvawaauwm; 2660 | end 2661 | 2662 | always @(posedge clock) 2663 | if (reset) 2664 | begin 2665 | maucncmvvm <= 0; 2666 | mmneuememm <= 0; 2667 | mvcueuvaem <= 0; 2668 | mmneuemuvm <= 0; 2669 | mcvawaamnm <= 0; 2670 | mvcueuuunm <= 0; 2671 | mvcueuuvmm <= 0; 2672 | mwencnnemm <= 0; 2673 | mcvawaavmm <= 0; 2674 | mmneuecvum <= 14'h3000; 2675 | mvcueunmmm <= 14'h3000; 2676 | mewmvmauum <= 14'h3000; 2677 | mwencnuamm <= 14'h3000; 2678 | mcvawamnum <= 14'h3000; 2679 | mnmwawvcmm <= 14'h3000; 2680 | maucncewum <= 14'h3000; 2681 | mewmvmauem <= 14'h3000; 2682 | mvcueunmvm <= 14'h3000; 2683 | maucncewcm <= 14'h3000; 2684 | mnmwawvcwm <= 14'h3000; 2685 | mmneuecvcm <= 14'h3000; 2686 | muavmvwewm <= 14'h3000; 2687 | mewmvmaucm <= 14'h3000; 2688 | mvcueunmwm <= 14'h3000; 2689 | mvcueunacm <= 14'h3000; 2690 | mewmvmanwm <= 14'h3000; 2691 | muavmvwccm <= 32'h0; 2692 | end 2693 | else 2694 | if (mwencnnawm) 2695 | begin 2696 | mcvawauwnm <= mvcueuaemm; 2697 | maucncvnwm <= mcvawauwnm; 2698 | mnmwawwemm <= maucncvnwm; 2699 | maucncmvvm <= muavmvcmmm ? mmneueawwm : maucncmvvm; 2700 | mmneuememm <= mewmvmauvm; 2701 | mvcueuvaem <= mewmvmauvm; 2702 | mmneuemuvm <= mewmvmavcm; 2703 | mcvawaamnm <= muavmvwmnm; 2704 | mvcueuuunm <= mnmwawvawm; 2705 | mvcueuuvmm <= maucncenam; 2706 | mwencnnemm <= maucncenem; 2707 | mcvawaavmm <= mmneuecumm; 2708 | mmneuecvum <= mewmvmecam[13:0]; 2709 | mvcueunmmm <= mnmwawnumm[13:0]; 2710 | mewmvmauum <= mvcueuvvem[13:0]; 2711 | mwencnuamm <= mmneuemeem; 2712 | mcvawamnum <= mvcueuvacm[13:0]; 2713 | mnmwawvcmm <= mewmvmencm; 2714 | maucncewum <= maucncauam[13:0]; 2715 | mewmvmauem <= mcvawacwwm; 2716 | mvcueunmvm <= mmneuemvnm[13:0]; 2717 | maucncewcm <= muavmvvnam[13:0]; 2718 | mnmwawvcwm <= mmneueecmm[13:0]; 2719 | mmneuecvcm <= muavmvvwmm; 2720 | muavmvwewm <= maucncccmm; 2721 | mewmvmaucm <= mewmvmmeem[13:0]; 2722 | mvcueunmwm <= mvcueuuvem; 2723 | mvcueunacm <= mwencnneem; 2724 | mewmvmanwm <= mcvawaavem; 2725 | muavmvwccm <= maucnccvum[31:0]; 2726 | mwencnmcmm <= muavmvcmmm; 2727 | mvcueuaecm <= mewmvmnvum; 2728 | mnmwaweaem <= mwencnmccm; 2729 | mwencnmcem <= mwencnmcwm; 2730 | mnmwaweamm <= mvcueuaevm; 2731 | mmneuewunm <= muavmvcmum; 2732 | mewmvmnvwm <= mmneuewuam; 2733 | mcvawauwvm <= mewmvmnvcm; 2734 | maucncvnum <= mcvawauwem; 2735 | mvcueuaeam <= maucncvnmm; 2736 | muavmvcmcm <= muavmvcmnm; 2737 | mvcueuaewm <= mcvawamwam; 2738 | mwencnmcvm <= muavmvweem; 2739 | mnmwaweaum <= mwencnuaem; 2740 | mewmvmnvam <= mwencnuanm; 2741 | mmneuewucm <= mvcueunmnm; 2742 | maucncvnem <= mvcueuuamm; 2743 | mcvawauwmm <= mwencnummm; 2744 | mvcueuaenm <= mmneuecwwm; 2745 | end 2746 | 2747 | always @(*) 2748 | begin 2749 | mnmwawwcem = mewmvmmuum; 2750 | mewmvmmunm = mvcueuumum; 2751 | mmneueevwm = mnmwawwcem & mnmwawwcwm & ~mwencnuucm; 2752 | mmneueewam = 2'h1; 2753 | mewmvmanum = ~muavmvwwmm; 2754 | mewmvmacam = mnmwawvuvm; 2755 | mmneuecacm = mvcueunamm; 2756 | mmneueewum = {1'b0, mewmvmacam}; 2757 | mwencnumcm__0 = {mmneueewum[1], mmneueewum[1:0]} - {mmneueewam[1], mmneueewam[1:0]}; 2758 | mwencnumcm = mwencnumcm__0[2]; 2759 | mvcueunaem = mmneuecacm && maucnceenm && mewmvmanum && mwencnumcm; 2760 | maucncevem = mewmvmacam == 1'h1; 2761 | maucncemem = mvcueunaem; 2762 | mewmvmanvm = maucncemem ? 1'h1 : 1'h0; 2763 | mcvawamemm = mewmvmanvm; 2764 | maucnceenm <= mnmwawwcem; 2765 | mewmvmmuam <= mcvawamemm == 0 ? mewmvmmumm : 1; 2766 | mvcueunwnm = mcvawamemm; 2767 | end 2768 | 2769 | always @(posedge clock) 2770 | if (reset) 2771 | begin 2772 | mnmwawvuum <= 32'h0; 2773 | muavmvwnnm <= 1'h0; 2774 | mewmvmaccm <= 4'h0; 2775 | mnmwawvuvm <= 1'h0; 2776 | end 2777 | else 2778 | if (mmneueevwm) 2779 | begin 2780 | mcvawamumm <= maucncevem; 2781 | mnmwawvuum <= mmneueevcm; 2782 | muavmvwnnm <= maucnccwem; 2783 | mewmvmaccm <= mcvawaanmm; 2784 | mnmwawvuvm <= mvcueunwnm; 2785 | end 2786 | 2787 | always @(*) 2788 | begin 2789 | mwencnnaem = mcvawaanum; 2790 | mmneueevnm = mnmwawwcwm; 2791 | mewmvmmuwm = mwencnnaem & mmneueevnm; 2792 | maucncemmm = mvcueuumnm; 2793 | maucncemcm = 14'h33; 2794 | mwencnuvnm = 14'hF; 2795 | mvcueunwum = 14'h3D; 2796 | mnmwawvuem = 14'h11; 2797 | mmneuecawm = 14'h17; 2798 | muavmvwnam = 14'h16; 2799 | mnmwawvumm = 14'h19; 2800 | mcvawamevm = 14'h1D; 2801 | mwencnuvcm = 14'h21; 2802 | maucncemnm = 14'h13; 2803 | mmneuecaum = 14'h23; 2804 | muavmvwnem = 14'h15; 2805 | maucncemwm = 14'h5; 2806 | mwencnucam = 14'h3B; 2807 | mvcueunemm = 14'h25; 2808 | mmneuecuvm = 14'h27; 2809 | mwencnuccm = 14'hB; 2810 | maucncennm = 14'h29; 2811 | mmneuecuum = 14'hD; 2812 | mwencnucem = 14'h31; 2813 | mewmvmavwm = 14'hE; 2814 | mewmvmcwwm = mvcueuneam[13:2]; 2815 | maucncmuum = mvcueuneam[1:0]; 2816 | mewmvmcwvm = mvcueuneam[1:0]; 2817 | mmneuecuwm = mvcueuneam; 2818 | muavmvvcvm = {2'b0, maucncmuum[1:0]}; 2819 | muavmvwamm = maucncemcm[13:2]; 2820 | mcvawamvwm = maucncemcm[1:0]; 2821 | mmneuecnam = mwencnuvnm[13:2]; 2822 | mcvawamvem = mwencnuvnm[1:0]; 2823 | mnmwawvmwm = mvcueunwum[13:2]; 2824 | mvcueuncum = mvcueunwum[1:0]; 2825 | maucncmcem = mnmwawvuem[13:2]; 2826 | mvcueuwunm = mnmwawvuem[1:0]; 2827 | mmneueaeum = mmneuecawm[13:2]; 2828 | mnmwawuwcm = mmneuecawm[1:0]; 2829 | mmneueaenm = muavmvwnam[13:2]; 2830 | mcvawaeavm = muavmvwnam[1:0]; 2831 | mewmvmcecm = mnmwawvumm[13:2]; 2832 | maucncmamm = mnmwawvumm[1:0]; 2833 | mmneueamvm = mcvawamevm[13:2]; 2834 | mnmwawunam = mcvawamevm[1:0]; 2835 | mwencnvwmm = mwencnuvcm[13:2]; 2836 | mmneueamwm = mwencnuvcm[1:0]; 2837 | maucncmmam = maucncemnm[13:2]; 2838 | mewmvmccem = maucncemnm[1:0]; 2839 | mmneueaawm = mmneuecaum[13:2]; 2840 | mcvawaeeum = mmneuecaum[1:0]; 2841 | muavmvnnem = muavmvwnem[13:2]; 2842 | mcvawaeenm = muavmvwnem[1:0]; 2843 | mwencnvuum = maucncemwm[13:2]; 2844 | maucncmecm = maucncemwm[1:0]; 2845 | mmneueacnm = mwencnucam[13:2]; 2846 | mcvawaemvm = mwencnucam[1:0]; 2847 | mwencnvucm = mvcueunemm[13:2]; 2848 | muavmvnwmm = mvcueunemm[1:0]; 2849 | mmneueavvm = mmneuecuvm[13:2]; 2850 | mvcueuwmam = mmneuecuvm[1:0]; 2851 | mmneueavmm = mwencnuccm[13:2]; 2852 | mwencnvawm = mwencnuccm[1:0]; 2853 | mmneueavam = maucncennm[13:2]; 2854 | mcvawaenem = maucncennm[1:0]; 2855 | mcvawaewwm = mmneuecuum[13:2]; 2856 | mmneueauum = mmneuecuum[1:0]; 2857 | mmneueauem = mwencnucem[13:2]; 2858 | mwencnvcnm = mwencnucem[1:0]; 2859 | mnmwawuaum = mewmvmavwm[13:2]; 2860 | mmneueaucm = mewmvmavwm[1:0]; 2861 | mcvawaevvm = mvcueunwvm == {2'b0, mewmvmcwwm[11:0]}; 2862 | mewmvmcwcm = {1'b0, mmneuecuwm[13:0]} + 15'h1; 2863 | mwencnuaam = mmneuecvum; 2864 | mcvawamnnm = mvcueunmmm; 2865 | mvcueunmam = mewmvmauum; 2866 | mewmvmaunm = mwencnuamm; 2867 | muavmvweam = mcvawamnum; 2868 | mmneuecvnm = mnmwawvcmm; 2869 | mmneuecvmm = mewmvmauem; 2870 | muavmvwevm = mnmwawvcwm; 2871 | maucncewem = mmneuecvcm; 2872 | mcvawamnem = mewmvmaucm; 2873 | mwencnuavm = mvcueunmwm; 2874 | mwencnumem = mvcueunacm; 2875 | mcvawamuvm = mewmvmanwm; 2876 | mnmwawwewm = {2'b0, mmneueaucm[1:0]}; 2877 | mwencnnmnm = {2'b0, mwencnvcnm[1:0]}; 2878 | mewmvmmnmm = {2'b0, mmneueauum[1:0]}; 2879 | mmneueewem = {2'b0, mcvawaenem[1:0]}; 2880 | maucnccvcm = {2'b0, mwencnvawm[1:0]}; 2881 | mcvawaauam = {2'b0, mvcueuwmam[1:0]}; 2882 | mwencnnmum = {2'b0, muavmvnwmm[1:0]}; 2883 | mnmwawwevm = {2'b0, mcvawaemvm[1:0]}; 2884 | muavmvvcwm = {2'b0, maucncmecm[1:0]}; 2885 | mvcueuuanm = {2'b0, mcvawaeenm[1:0]}; 2886 | mcvawaaumm = {2'b0, mcvawaeeum[1:0]}; 2887 | maucnccvem = {2'b0, mewmvmccem[1:0]}; 2888 | mmneueewcm = {2'b0, mmneueamwm[1:0]}; 2889 | mewmvmmnam = {2'b0, mnmwawunam[1:0]}; 2890 | mnmwawweum = {2'b0, maucncmamm[1:0]}; 2891 | mwencnnmvm = {2'b0, mcvawaeavm[1:0]}; 2892 | mvcueuuawm = {2'b0, mnmwawuwcm[1:0]}; 2893 | muavmvvcnm = {2'b0, mvcueuwunm[1:0]}; 2894 | maucnccvmm = {2'b0, mvcueuncum[1:0]}; 2895 | mcvawaauem = {2'b0, mcvawamvem[1:0]}; 2896 | mewmvmmncm = {2'b0, mcvawamvwm[1:0]}; 2897 | maucnceunm = mvcueunwvm == {2'b0, muavmvwamm[11:0]}; 2898 | mewmvmawcm = mvcueunwvm == {2'b0, mmneuecnam[11:0]}; 2899 | muavmvwavm = mvcueunwvm == {2'b0, mnmwawvmwm[11:0]}; 2900 | mcvawaeamm = mvcueunwvm == {2'b0, maucncmcem[11:0]}; 2901 | mwencnvnam = mvcueunwvm == {2'b0, mmneueaeum[11:0]}; 2902 | mewmvmcmwm = mvcueunwvm == {2'b0, mmneueaenm[11:0]}; 2903 | mcvawaecem = mvcueunwvm == {2'b0, mewmvmcecm[11:0]}; 2904 | mewmvmceum = mvcueunwvm == {2'b0, mmneueamvm[11:0]}; 2905 | mewmvmcenm = mvcueunwvm == {2'b0, mwencnvwmm[11:0]}; 2906 | mcvawaeecm = mvcueunwvm == {2'b0, maucncmmam[11:0]}; 2907 | maucncmmvm = mvcueunwvm == {2'b0, mmneueaawm[11:0]}; 2908 | mvcueuwwmm = mvcueunwvm == {2'b0, muavmvnnem[11:0]}; 2909 | mcvawaemam = mvcueunwvm == {2'b0, mwencnvuum[11:0]}; 2910 | mewmvmcawm = mvcueunwvm == {2'b0, mmneueacnm[11:0]}; 2911 | mvcueuwnem = mvcueunwvm == {2'b0, mwencnvucm[11:0]}; 2912 | mewmvmcuum = mvcueunwvm == {2'b0, mmneueavvm[11:0]}; 2913 | mnmwawucnm = mvcueunwvm == {2'b0, mmneueavmm[11:0]}; 2914 | mewmvmcucm = mvcueunwvm == {2'b0, mmneueavam[11:0]}; 2915 | mewmvmcvvm = mvcueunwvm == {2'b0, mcvawaewwm[11:0]}; 2916 | mewmvmcvmm = mvcueunwvm == {2'b0, mmneueauem[11:0]}; 2917 | mewmvmcvam = mvcueunwvm == {2'b0, mnmwawuaum[11:0]}; 2918 | mnmwawumam = maucncemmm[muavmvvcvm]; 2919 | mnmwawnuvm = mwencnuaam[13:2]; 2920 | mmneuemaam = mwencnuaam[1:0]; 2921 | mwencnwvcm = mcvawamnnm[13:2]; 2922 | muavmvunmm = mcvawamnnm[1:0]; 2923 | muavmvuuam = mvcueunmam[13:2]; 2924 | mwencnwwem = mvcueunmam[1:0]; 2925 | mewmvmemam = mewmvmaunm[13:2]; 2926 | maucncacem = mewmvmaunm[1:0]; 2927 | maucncavum = muavmvweam[13:2]; 2928 | muavmvuccm = muavmvweam[1:0]; 2929 | mnmwawneum = mmneuecvnm[13:2]; 2930 | mmneuemwcm = mmneuecvnm[1:0]; 2931 | mnmwawnamm = mmneuecvmm[13:2]; 2932 | mewmvmevwm = mmneuecvmm[1:0]; 2933 | mvcueuuncm = muavmvwevm[13:2]; 2934 | mnmwawwvmm = muavmvwevm[1:0]; 2935 | mcvawaaacm = maucncewem[13:2]; 2936 | mmneueeemm = maucncewem[1:0]; 2937 | mmneueemam = mcvawamnem[13:2]; 2938 | mcvawaacem = mcvawamnem[1:0]; 2939 | muavmvvuam = mwencnuavm[13:2]; 2940 | mwencnnwem = mwencnuavm[1:0]; 2941 | mnmwawwmam = mwencnumem[13:2]; 2942 | mvcueuucem = mwencnumem[1:0]; 2943 | maucnccuam = mcvawamuvm[13:2]; 2944 | mewmvmmwem = mcvawamuvm[1:0]; 2945 | mnmwawwccm = {2'b0, mewmvmmwem[1:0]}; 2946 | mwencnnaam = {2'b0, mvcueuucem[1:0]}; 2947 | mmneueevum = {2'b0, mwencnnwem[1:0]}; 2948 | mewmvmmuvm = {2'b0, mcvawaacem[1:0]}; 2949 | maucnccwnm = {2'b0, mmneueeemm[1:0]}; 2950 | muavmvvemm = {2'b0, mnmwawwvmm[1:0]}; 2951 | mnmwawwcam = {2'b0, mewmvmevwm[1:0]}; 2952 | mvcueuuavm = {2'b0, mmneuemwcm[1:0]}; 2953 | mwencnnmwm = {2'b0, muavmvuccm[1:0]}; 2954 | mnmwawwenm = {2'b0, maucncacem[1:0]}; 2955 | mmneueewmm = {2'b0, mwencnwwem[1:0]}; 2956 | mewmvmmnem = {2'b0, muavmvunmm[1:0]}; 2957 | mcvawaaucm = {2'b0, mmneuemaam[1:0]}; 2958 | mewmvmawvm = maucncemmm[mewmvmmncm]; 2959 | maucnceumm = maucncemmm[mcvawaauem]; 2960 | maucncmcam = maucncemmm[maucnccvmm]; 2961 | muavmvnvwm = maucncemmm[muavmvvcnm]; 2962 | muavmvnvem = maucncemmm[mvcueuuawm]; 2963 | maucncmcum = maucncemmm[mwencnnmvm]; 2964 | muavmvnunm = maucncemmm[mnmwawweum]; 2965 | mwencnvwcm = maucncemmm[mewmvmmnam]; 2966 | maucncmavm = maucncemmm[mmneueewcm]; 2967 | mmneueaamm = maucncemmm[maucnccvem]; 2968 | muavmvnnam = maucncemmm[mcvawaaumm]; 2969 | maucncmmwm = maucncemmm[mvcueuuanm]; 2970 | mmneueacem = maucncemmm[muavmvvcwm]; 2971 | maucncmeum = maucncemmm[mnmwawwevm]; 2972 | maucncmenm = maucncemmm[mwencnnmum]; 2973 | muavmvnecm = maucncemmm[mcvawaauam]; 2974 | mvcueuwmvm = maucncemmm[maucnccvcm]; 2975 | maucncmwmm = maucncemmm[mmneueewem]; 2976 | muavmvnmam = maucncemmm[mewmvmmnmm]; 2977 | mnmwawuawm = maucncemmm[mwencnnmnm]; 2978 | maucncmnem = maucncemmm[mnmwawwewm]; 2979 | mwencnwvum = mvcueunwvm == {2'b0, mnmwawnuvm[11:0]}; 2980 | mvcueuvwem = mvcueunwvm == {2'b0, mwencnwvcm[11:0]}; 2981 | mvcueuvvcm = mvcueunwvm == {2'b0, muavmvuuam[11:0]}; 2982 | mmneuemecm = mvcueunwvm == {2'b0, mewmvmemam[11:0]}; 2983 | mvcueuvaam = mvcueunwvm == {2'b0, maucncavum[11:0]}; 2984 | mewmvmenam = mvcueunwvm == {2'b0, mnmwawneum[11:0]}; 2985 | mmneuemunm = mvcueunwvm == {2'b0, mnmwawnamm[11:0]}; 2986 | mwencnnuem = mvcueunwvm == {2'b0, mvcueuuncm[11:0]}; 2987 | mewmvmmmem = mvcueunwvm == {2'b0, mcvawaaacm[11:0]}; 2988 | mewmvmmecm = mvcueunwvm == {2'b0, mmneueemam[11:0]}; 2989 | mvcueuuvcm = mvcueunwvm == {2'b0, muavmvvuam[11:0]}; 2990 | mwencnnecm = mvcueunwvm == {2'b0, mnmwawwmam[11:0]}; 2991 | mcvawaavcm = mvcueunwvm == {2'b0, maucnccuam[11:0]}; 2992 | mewmvmeccm = maucncemmm[mcvawaaucm]; 2993 | maucncamnm = maucncemmm[mewmvmmnem]; 2994 | mnmwawnnmm = maucncemmm[mmneueewmm]; 2995 | mcvawacamm = maucncemmm[mnmwawwenm]; 2996 | mnmwawneem = maucncemmm[mwencnnmwm]; 2997 | maucncavem = maucncemmm[mvcueuuavm]; 2998 | mcvawacwvm = maucncemmm[mnmwawwcam]; 2999 | mmneueecnm = maucncemmm[muavmvvemm]; 3000 | mnmwawwwnm = maucncemmm[maucnccwnm]; 3001 | maucnccamm = maucncemmm[mewmvmmuvm]; 3002 | mnmwawwnmm = maucncemmm[mmneueevum]; 3003 | muavmvvamm = maucncemmm[mwencnnaam]; 3004 | mmneueenmm = maucncemmm[mnmwawwccm]; 3005 | mwencnvecm = mcvawaevvm & mnmwawumam; 3006 | mmneuecnum = maucnceunm & mewmvmawvm; 3007 | mcvawaeacm = muavmvwavm & maucncmcam; 3008 | mnmwawuwvm = mcvawaeamm & muavmvnvwm; 3009 | mvcueuwvwm = mcvawaecem & muavmvnunm; 3010 | mcvawaecum = mewmvmcenm & maucncmavm; 3011 | mnmwawuunm = mcvawaeecm & mmneueaamm; 3012 | mmneueaavm = mvcueuwwmm & maucncmmwm; 3013 | mewmvmcamm = mcvawaemam & mmneueacem; 3014 | mcvawaemwm = mvcueuwnem & maucncmenm; 3015 | mnmwawucem = mewmvmcuum & muavmvnecm; 3016 | muavmvneum = mnmwawucnm & mvcueuwmvm; 3017 | muavmvnamm = ~mvcueuwcem; 3018 | mcvawaevem = mewmvmcwcm[12:0]; 3019 | mcvawaceem = mwencnwvum & mewmvmeccm; 3020 | mcvawacewm = mvcueuvwem & maucncamnm; 3021 | mcvawacumm = mewmvmenam & maucncavem; 3022 | maucncanum = mmneuemunm & mcvawacwvm; 3023 | mewmvmmawm = mwencnnuem & mmneueecnm; 3024 | mwencnnnwm = mewmvmmmem & mnmwawwwnm; 3025 | muavmvvunm = mewmvmmecm & maucnccamm; 3026 | maucnccunm = mwencnnecm & muavmvvamm; 3027 | muavmvwanm = mewmvmawcm & maucnceumm; 3028 | mvcueuwumm = mwencnvnam & muavmvnvem; 3029 | mcvawaecam = mewmvmcmwm & maucncmcum; 3030 | mvcueuwvem = mewmvmceum & mwencnvwcm; 3031 | mvcueuwwcm = maucncmmvm & muavmvnnam; 3032 | mvcueuwnam = mewmvmcawm & maucncmeum; 3033 | muavmvnenm = mewmvmcucm & maucncmwmm; 3034 | mvcueuwecm = mewmvmcvvm & muavmvnmam; 3035 | muavmvnmvm = mewmvmcvmm & mnmwawuawm; 3036 | mcvawaewmm = mewmvmcvam & maucncmnem; 3037 | mmneuemmnm = mvcueuvvcm & mnmwawnnmm; 3038 | mvcueuvunm = mmneuemecm & mcvawacamm; 3039 | mwencnwmmm = mvcueuvaam & mnmwawneem; 3040 | mmneueemnm = mvcueuuvcm & mnmwawwnmm; 3041 | mnmwawwmnm = mcvawaavcm & mmneueenmm; 3042 | maucncmunm = mwencnvecm & muavmvvewm & muavmvnamm; 3043 | mnmwawvmcm = ~mwencnueam; 3044 | mmneueaemm = ~mewmvmcmem; 3045 | mmneueaeam = ~mwencnvnum; 3046 | mnmwawunum = ~mwencnvwvm; 3047 | mmneueaacm = ~mewmvmccam; 3048 | mvcueuwwvm = ~mwencnvvwm; 3049 | mmneueacam = ~mewmvmccum; 3050 | mnmwawuvwm = ~mwencnvunm; 3051 | mmneueacum = ~mewmvmcavm; 3052 | mewmvmcunm = ~mwencnvamm; 3053 | maucncmwcm = ~mcvawaenam; 3054 | muavmvwmcm = maucncmunm; 3055 | muavmvunnm = ~maucncammm; 3056 | mmneuemaum = ~mewmvmecvm; 3057 | muavmvucwm = ~mvcueuvanm; 3058 | muavmvumcm = ~mvcueuveam; 3059 | maucncceum = ~mcvawaamvm; 3060 | muavmvvvum = ~mvcueuuuvm; 3061 | mwencnnwvm = ~mvcueuuvwm; 3062 | mewmvmmwvm = ~mcvawaavwm; 3063 | mwencnuevm = ~mvcueuncwm; 3064 | maucncmcwm = ~mcvawaeanm; 3065 | mmneueamem = ~maucncmacm; 3066 | maucncmanm = ~muavmvnumm; 3067 | mnmwawuumm = ~mwencnvvem; 3068 | mnmwawuvem = ~muavmvnwcm; 3069 | mwencnvavm = ~mvcueuwmwm; 3070 | mnmwawuamm = ~mwencnvcem; 3071 | maucncmnam = ~mvcueuweum; 3072 | muavmvnmwm = ~mvcueuwenm; 3073 | mwencnveum = muavmvwmcm | mnmwawwcvm; 3074 | mcvawaccvm = ~mewmvmeewm; 3075 | mnmwawnwvm = ~muavmvuvwm; 3076 | mmneuemwwm = ~mewmvmennm; 3077 | mcvawaacvm = ~mewmvmmewm; 3078 | mvcueuucvm = ~mwencnnewm; 3079 | muavmvwaem = mmneuecnum & muavmvvewm & mnmwawvmcm; 3080 | mnmwawuwnm = mcvawaeacm & muavmvvewm & mmneueaemm; 3081 | mewmvmcmcm = mnmwawuwvm & muavmvvewm & mmneueaeam; 3082 | mewmvmceam = mvcueuwvwm & muavmvvewm & mnmwawunum; 3083 | maucncmmem = mcvawaecum & muavmvvewm & mmneueaacm; 3084 | muavmvnnum = mnmwawuunm & muavmvvewm & mvcueuwwvm; 3085 | mewmvmcacm = mmneueaavm & muavmvvewm & mmneueacam; 3086 | muavmvnwvm = mewmvmcamm & muavmvvewm & mnmwawuvwm; 3087 | mnmwawucam = mcvawaemwm & muavmvvewm & mmneueacum; 3088 | mmneueavwm = mnmwawucem & muavmvvewm & mewmvmcunm; 3089 | mmneueavem = muavmvneum & muavmvvewm & maucncmwcm; 3090 | maucncmumm = {mnmwawwcvm, mcvawaevem}; 3091 | mvcueuvwwm = mcvawaceem & muavmvvewm & muavmvunnm; 3092 | mwencnwvam = mcvawacewm & muavmvvewm & mmneuemaum; 3093 | mnmwawnevm = mcvawacumm & muavmvvewm & muavmvucwm; 3094 | mnmwawnaem = maucncanum & muavmvvewm & muavmvumcm; 3095 | mvcueuunam = mewmvmmawm & muavmvvewm & maucncceum; 3096 | mcvawaaaam = mwencnnnwm & muavmvvewm & muavmvvvum; 3097 | mnmwawwnum = muavmvvunm & muavmvvewm & mwencnnwvm; 3098 | mmneueenum = maucnccunm & muavmvvewm & mewmvmmwvm; 3099 | mnmwawvmum = muavmvwanm & muavmvvewm & mwencnuevm; 3100 | mmneueaevm = mvcueuwumm & muavmvvewm & maucncmcwm; 3101 | mewmvmcemm = mcvawaecam & muavmvvewm & mmneueamem; 3102 | mcvawaecwm = mvcueuwvem & muavmvvewm & maucncmanm; 3103 | mmneueaanm = mvcueuwwcm & muavmvvewm & mnmwawuumm; 3104 | mwencnvumm = mvcueuwnam & muavmvvewm & mnmwawuvem; 3105 | mnmwawucum = muavmvnenm & muavmvvewm & mwencnvavm; 3106 | mmneueaunm = mvcueuwecm & muavmvvewm & mnmwawuamm; 3107 | mcvawaewcm = muavmvnmvm & muavmvvewm & maucncmnam; 3108 | mnmwawuavm = mcvawaewmm & muavmvvewm & muavmvnmwm; 3109 | mvcueuwcwm = mwencnveum ? maucncmumm : maucncenvm; 3110 | maucncaaum = mmneuemmnm & muavmvvewm & mcvawaccvm; 3111 | mwencnwnum = mvcueuvunm & muavmvvewm & mnmwawnwvm; 3112 | maucncavvm = mwencnwmmm & muavmvvewm & mmneuemwwm; 3113 | maucnccaum = mmneueemnm & muavmvvewm & mcvawaacvm; 3114 | muavmvvaum = mnmwawwmnm & muavmvvewm & mvcueuucvm; 3115 | mmneuecaem = muavmvwaem; 3116 | mcvawamvnm = maucncemcm[1:0]; 3117 | mcvawamvcm = mwencnuvnm[1:0]; 3118 | mvcueunwam = mnmwawuwnm; 3119 | mvcueuwuvm = mvcueunwum[1:0]; 3120 | mwencnuvmm = mewmvmcmcm; 3121 | maucncmcmm = mnmwawvuem[1:0]; 3122 | mvcueuwuam = mmneuecawm[1:0]; 3123 | mnmwawunwm = muavmvwnam[1:0]; 3124 | mmneuecanm = mewmvmceam; 3125 | maucncmaem = mnmwawvumm[1:0]; 3126 | mmneueamum = mcvawamevm[1:0]; 3127 | mvcueunwem = maucncmmem; 3128 | mvcueuwwnm = mwencnuvcm[1:0]; 3129 | mcvawamewm = muavmvnnum; 3130 | maucncmmcm = maucncemnm[1:0]; 3131 | mcvawaeevm = mmneuecaum[1:0]; 3132 | mvcueunwmm = mewmvmcacm; 3133 | maucncmemm = muavmvwnem[1:0]; 3134 | mmneuecavm = muavmvnwvm; 3135 | maucncmeam = maucncemwm[1:0]; 3136 | mmneueacwm = mwencnucam[1:0]; 3137 | mcvawamwnm = mnmwawucam; 3138 | mvcueuwmem = mvcueunemm[1:0]; 3139 | mewmvmavum = mmneueavwm; 3140 | mcvawaenum = mmneuecuvm[1:0]; 3141 | mvcueuneem = mmneueavem; 3142 | mwencnvanm = mwencnuccm[1:0]; 3143 | mnmwawuacm = maucncennm[1:0]; 3144 | mcvawaewvm = mmneuecuum[1:0]; 3145 | mmneueaumm = mwencnucem[1:0]; 3146 | mvcueuwcam = mewmvmavwm[1:0]; 3147 | mwencnucmm = muavmvwmcm; 3148 | mnmwawvccm = mvcueuvwwm; 3149 | mnmwawnuum = mwencnuaam[1:0]; 3150 | maucncewwm = mwencnwvam; 3151 | muavmvunem = mcvawamnnm[1:0]; 3152 | muavmvuucm = mvcueunmam[1:0]; 3153 | mewmvmemcm = mewmvmaunm[1:0]; 3154 | mwencnwmam = muavmvweam[1:0]; 3155 | mewmvmauwm = mnmwawnevm; 3156 | mcvawacuam = mmneuecvnm[1:0]; 3157 | mnmwawvcnm = mnmwawnaem; 3158 | mewmvmevnm = mmneuecvmm[1:0]; 3159 | mvcueunmum = mvcueuunam; 3160 | mnmwawwvem = muavmvwevm[1:0]; 3161 | mcvawamnmm = mcvawaaaam; 3162 | mmneueeeem = maucncewem[1:0]; 3163 | maucncewmm = mnmwawwnum; 3164 | mmneueemcm = mcvawamnem[1:0]; 3165 | muavmvvucm = mwencnuavm[1:0]; 3166 | mnmwawvemm = mmneueenum; 3167 | mnmwawwmcm = mwencnumem[1:0]; 3168 | maucnccucm = mcvawamuvm[1:0]; 3169 | end 3170 | 3171 | always @(posedge clock) 3172 | if (reset) 3173 | begin 3174 | mvcueuwcem <= 0; 3175 | mwencnueam <= 0; 3176 | mewmvmcmem <= 0; 3177 | mwencnvnum <= 0; 3178 | mwencnvwvm <= 0; 3179 | mewmvmccam <= 0; 3180 | mwencnvvwm <= 0; 3181 | mewmvmccum <= 0; 3182 | mwencnvunm <= 0; 3183 | mewmvmcavm <= 0; 3184 | mwencnvamm <= 0; 3185 | mcvawaenam <= 0; 3186 | maucncammm <= 0; 3187 | mewmvmecvm <= 0; 3188 | mvcueuvanm <= 0; 3189 | mvcueuveam <= 0; 3190 | mcvawaamvm <= 0; 3191 | mvcueuuuvm <= 0; 3192 | mvcueuuvwm <= 0; 3193 | mcvawaavwm <= 0; 3194 | mvcueuncwm <= 0; 3195 | mcvawaeanm <= 0; 3196 | maucncmacm <= 0; 3197 | muavmvnumm <= 0; 3198 | mwencnvvem <= 0; 3199 | muavmvnwcm <= 0; 3200 | mvcueuwmwm <= 0; 3201 | mwencnvcem <= 0; 3202 | mvcueuweum <= 0; 3203 | mvcueuwenm <= 0; 3204 | mewmvmeewm <= 0; 3205 | muavmvuvwm <= 0; 3206 | mewmvmennm <= 0; 3207 | mewmvmmewm <= 0; 3208 | mwencnnewm <= 0; 3209 | maucncenvm <= 14'h3000; 3210 | end 3211 | else 3212 | if (mewmvmmuwm) 3213 | begin 3214 | mvcueuwcem <= muavmvvewm ? mwencnvecm : mvcueuwcem; 3215 | mwencnueam <= muavmvvewm ? mmneuecnum : mwencnueam; 3216 | mewmvmcmem <= muavmvvewm ? mcvawaeacm : mewmvmcmem; 3217 | mwencnvnum <= muavmvvewm ? mnmwawuwvm : mwencnvnum; 3218 | mwencnvwvm <= muavmvvewm ? mvcueuwvwm : mwencnvwvm; 3219 | mewmvmccam <= muavmvvewm ? mcvawaecum : mewmvmccam; 3220 | mwencnvvwm <= muavmvvewm ? mnmwawuunm : mwencnvvwm; 3221 | mewmvmccum <= muavmvvewm ? mmneueaavm : mewmvmccum; 3222 | mwencnvunm <= muavmvvewm ? mewmvmcamm : mwencnvunm; 3223 | mewmvmcavm <= muavmvvewm ? mcvawaemwm : mewmvmcavm; 3224 | mwencnvamm <= muavmvvewm ? mnmwawucem : mwencnvamm; 3225 | mcvawaenam <= muavmvvewm ? muavmvneum : mcvawaenam; 3226 | maucncammm <= muavmvvewm ? mcvawaceem : maucncammm; 3227 | mewmvmecvm <= muavmvvewm ? mcvawacewm : mewmvmecvm; 3228 | mvcueuvanm <= muavmvvewm ? mcvawacumm : mvcueuvanm; 3229 | mvcueuveam <= muavmvvewm ? maucncanum : mvcueuveam; 3230 | mcvawaamvm <= muavmvvewm ? mewmvmmawm : mcvawaamvm; 3231 | mvcueuuuvm <= muavmvvewm ? mwencnnnwm : mvcueuuuvm; 3232 | mvcueuuvwm <= muavmvvewm ? muavmvvunm : mvcueuuvwm; 3233 | mcvawaavwm <= muavmvvewm ? maucnccunm : mcvawaavwm; 3234 | mvcueuncwm <= muavmvvewm ? muavmvwanm : mvcueuncwm; 3235 | mcvawaeanm <= muavmvvewm ? mvcueuwumm : mcvawaeanm; 3236 | maucncmacm <= muavmvvewm ? mcvawaecam : maucncmacm; 3237 | muavmvnumm <= muavmvvewm ? mvcueuwvem : muavmvnumm; 3238 | mwencnvvem <= muavmvvewm ? mvcueuwwcm : mwencnvvem; 3239 | muavmvnwcm <= muavmvvewm ? mvcueuwnam : muavmvnwcm; 3240 | mvcueuwmwm <= muavmvvewm ? muavmvnenm : mvcueuwmwm; 3241 | mwencnvcem <= muavmvvewm ? mvcueuwecm : mwencnvcem; 3242 | mvcueuweum <= muavmvvewm ? muavmvnmvm : mvcueuweum; 3243 | mvcueuwenm <= muavmvvewm ? mcvawaewmm : mvcueuwenm; 3244 | mewmvmeewm <= muavmvvewm ? mmneuemmnm : mewmvmeewm; 3245 | muavmvuvwm <= muavmvvewm ? mvcueuvunm : muavmvuvwm; 3246 | mewmvmennm <= muavmvvewm ? mwencnwmmm : mewmvmennm; 3247 | mewmvmmewm <= muavmvvewm ? mmneueemnm : mewmvmmewm; 3248 | mwencnnewm <= muavmvvewm ? mnmwawwmnm : mwencnnewm; 3249 | maucncevam <= mwencnnaum; 3250 | maucncenvm <= mvcueuwcwm; 3251 | mewmvmnvem <= mcvawauwcm; 3252 | mvcueuueem <= muavmvvewm; 3253 | mmneuewumm <= mnmwawwcvm; 3254 | mnmwawwaam <= mvcueunwvm; 3255 | mnmwaweanm <= mvcueuneam; 3256 | mwencnnccm <= maucncemmm; 3257 | mcvawaawam <= mewmvmcwvm; 3258 | muavmvvmem <= mmneuecuwm; 3259 | mmneueeucm <= muavmvwmcm; 3260 | mmneueevam <= mnmwawvmum; 3261 | mewmvmmucm <= mmneueaevm; 3262 | mcvawaanem <= mewmvmcemm; 3263 | maucnccwmm <= mcvawaecwm; 3264 | muavmvvenm <= mmneueaanm; 3265 | mvcueuumwm <= mwencnvumm; 3266 | mwencnnavm <= mnmwawucum; 3267 | mnmwawwcum <= mmneueaunm; 3268 | mwencnncam <= mcvawaewcm; 3269 | mnmwawwacm <= mnmwawuavm; 3270 | mvcueuuemm <= maucncaaum; 3271 | mcvawaawnm <= mwencnwnum; 3272 | maucnccnwm <= maucncavvm; 3273 | mmneueeuvm <= maucnccaum; 3274 | mewmvmmvum <= muavmvvaum; 3275 | mvcueuuevm <= mmneuecaem; 3276 | muavmvvmmm <= mcvawamvnm; 3277 | maucnccnnm <= mcvawamvcm; 3278 | muavmvvmum <= mvcueunwam; 3279 | mcvawaawwm <= mvcueuwuvm; 3280 | mmneueeuam <= mwencnuvmm; 3281 | mewmvmmvvm <= maucncmcmm; 3282 | mmneueeuum <= mvcueuwuam; 3283 | muavmvvmam <= mnmwawunwm; 3284 | mewmvmmvcm <= mmneuecanm; 3285 | mvcueuuecm <= maucncmaem; 3286 | mwencnncem <= mmneueamum; 3287 | mcvawaawem <= mvcueunwem; 3288 | mnmwawwamm <= mvcueuwwnm; 3289 | maucnccnmm <= mcvawamewm; 3290 | mmneueeunm <= maucncmmcm; 3291 | mewmvmmvwm <= mcvawaeevm; 3292 | muavmvvmnm <= mvcueunwmm; 3293 | mcvawaawvm <= maucncmemm; 3294 | mvcueuuewm <= mmneuecavm; 3295 | maucnccnum <= maucncmeam; 3296 | mvcueuueam <= mmneueacwm; 3297 | mwencnncvm <= mcvawamwnm; 3298 | muavmvvmcm <= mvcueuwmem; 3299 | mnmwawwaum <= mewmvmavum; 3300 | mnmwawwaem <= mcvawaenum; 3301 | mewmvmmvam <= mvcueuneem; 3302 | mwencnncmm <= mwencnvanm; 3303 | mewmvmmvnm <= mnmwawuacm; 3304 | mmneueeuwm <= mcvawaewvm; 3305 | maucnccnvm <= mmneueaumm; 3306 | mcvawaawum <= mvcueuwcam; 3307 | maucnccnem <= mnmwawvccm; 3308 | maucnccncm <= mnmwawnuum; 3309 | mcvawaawmm <= maucncewwm; 3310 | mmneueeuem <= muavmvunem; 3311 | mewmvmmvmm <= muavmvuucm; 3312 | mwencnncnm <= mewmvmemcm; 3313 | mnmwawwawm <= mwencnwmam; 3314 | mvcueuuenm <= mewmvmauwm; 3315 | muavmvvmvm <= mcvawacuam; 3316 | muavmvvmwm <= mnmwawvcnm; 3317 | mvcueuueum <= mewmvmevnm; 3318 | mnmwawwavm <= mvcueunmum; 3319 | maucnccnam <= mnmwawwvem; 3320 | mwencnncum <= mcvawamnmm; 3321 | mcvawaawcm <= mmneueeeem; 3322 | mwencnmcam <= maucncewmm; 3323 | mewmvmmvem <= mmneueemcm; 3324 | mmneueeumm <= muavmvvucm; 3325 | mnmwaweacm <= mnmwawvemm; 3326 | mnmwawwanm <= mnmwawwmcm; 3327 | mwencnncwm <= maucnccucm; 3328 | end 3329 | 3330 | assign ethernet_input_tready = mcvawaannm & nreset; 3331 | 3332 | assign config_registers_rd_data = config_registers_rd_data_reg; 3333 | 3334 | assign command_out_tdata = mewmvmannm; 3335 | 3336 | assign command_out_tvalid = mnmwaweawm & muavmvveum; 3337 | endmodule 3338 | --------------------------------------------------------------------------------