├── TIP #01 ├── TIP #01.png ├── example.SchLib └── readme.txt ├── TIP #02 ├── TIP #02_1.png ├── TIP #02_2.png ├── TIP #02_3.png └── readme.txt ├── TIP #03 ├── Schematic_example.SchDoc ├── Schematic_template_A3.SchDot ├── TIP #03.png ├── readme.txt └── title_block_lib.SchLib ├── TIP #04 ├── Altium Designer Tip #04.pdf ├── TIP #04 snap grid.png └── readme.txt ├── TIP #05 ├── PCB_MARKING.png ├── PCB_Marking_Lib.PcbLib ├── pcb_marking_demo.PcbLib └── readme.txt ├── TIP #06 ├── [01] Cover_page.SchDoc └── readme.txt ├── TIP #07 ├── Altium_BOM_Template_2019_MFO_v1.xlsx ├── SFP_Prog_VER1_BOM_((No Variations))_2019-12-14.pdf ├── SFP_Prog_VER1_BOM_[[No Variations]]_2019-12-14.xlsx └── readme.txt ├── TIP #08 ├── Altium Designer Tip #08.pdf ├── PTH_NPTH_examples.PcbDoc └── readme.txt └── TIP #09 ├── example_footprints.PcbLib ├── mech_legend.png ├── mechanical_layers_setup.stackup └── readme.txt /TIP #01/TIP #01.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #01/TIP #01.png -------------------------------------------------------------------------------- /TIP #01/example.SchLib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #01/example.SchLib -------------------------------------------------------------------------------- /TIP #01/readme.txt: -------------------------------------------------------------------------------- 1 | Altium Designer Tips&Tricks - TIP #01 -> Change the default style for the schematic symbols 2 | 3 | If you would like to change the default AD style for the schematic symbols (library components) and to achieve more professional style for your schematic designs - below on the drawing, there is my proposal for the alternative style, that based on the OrCAD style. Of course you can introduce to the schematic library your own, unique style, which is consistent with your preferences. 4 | -------------------------------------------------------------------------------- /TIP #02/TIP #02_1.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #02/TIP #02_1.png -------------------------------------------------------------------------------- /TIP #02/TIP #02_2.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #02/TIP #02_2.png -------------------------------------------------------------------------------- /TIP #02/TIP #02_3.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #02/TIP #02_3.png -------------------------------------------------------------------------------- /TIP #02/readme.txt: -------------------------------------------------------------------------------- 1 | Altium Designer Tips&Tricks - TIP #02 -> create your own folder structure for the source files. 2 | 3 | Let imagine that you working on the complex PCB design in the AD environment, so your design can contain a large number of the single source files. Especially that design can consist of many schematic sheets, the settings files and the output files (see the first drawing). 4 | 5 | Manage that project can be difficult. You may be a bit confused which files are as the source files and which files are the output files. 6 | 7 | So my advice for you: just create your own folder and file structure for the AD projects and for the source files and use this as a your own standard. 8 | 9 | Suggested folders purpose is as following: 10 | /cfg -> config files (e.g. OutJob wizard, BOM and Draftsman templates), 11 | /doc -> documentation files (e.g. datasheets or drawings); 12 | /lib -> local libraries (SchLib/PcbLib files, Pad Via libraries); 13 | /out -> generated output files, such as the CAM files, BOMs, assembly drawings.; 14 | /pcb -> PCB source files (PcbDoc files); 15 | /prj -> system project files (e.g. PcbPrj, PcbPrjStructure files); 16 | /sch -> schematic sheets (SchDoc/Harness files); 17 | /tmp -> other temporary files; 18 | 19 | Folder structure can be as a part of your global standard for the Altium Designer projects. 20 | -------------------------------------------------------------------------------- /TIP #03/Schematic_example.SchDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #03/Schematic_example.SchDoc -------------------------------------------------------------------------------- /TIP #03/Schematic_template_A3.SchDot: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #03/Schematic_template_A3.SchDot -------------------------------------------------------------------------------- /TIP #03/TIP #03.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #03/TIP #03.png -------------------------------------------------------------------------------- /TIP #03/readme.txt: -------------------------------------------------------------------------------- 1 | Altium Designer Tips&Tricks - TIP #03 -> add the title block to each schematic sheet. 2 | 3 | Remember to always add the title block on each sheet of your schematic. 4 | This thing is like a information board for your project and can help to identify the different schematic sheets, know what revision of the project is, who designed this and to know other useful data. 5 | 6 | The title block should contain all necessary informations about the schematic sheet and the project, at least the following data: 7 | - title of the schematic page, 8 | - name of the project, 9 | - name of the applied assembly variant, 10 | - version/revision of the project, 11 | - schematic sheet number and total count of the schematic pages, 12 | - date of the last update and the printout date, 13 | - name of the schematic designer. 14 | 15 | Title block should be placed on the bottom right corner of the sheet. 16 | 17 | Please, see the attached example (the drawing). 18 | 19 | How to design your own title block: see this video (thanks Robert Feranec!): 20 | https://www.youtube.com/watch?v=cD-iW0LNR9Q 21 | 22 | method #1: 23 | example of using a title block inserted from the SCH library into the schematic sheet: please see Schematic_example.SchDoc and title_block_lib.SchLib 24 | 25 | method #2: 26 | use the schematic template: Schematic_template_A3.SchDot 27 | 28 | -------------------------------------------------------------------------------- /TIP #03/title_block_lib.SchLib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #03/title_block_lib.SchLib -------------------------------------------------------------------------------- /TIP #04/Altium Designer Tip #04.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #04/Altium Designer Tip #04.pdf -------------------------------------------------------------------------------- /TIP #04/TIP #04 snap grid.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #04/TIP #04 snap grid.png -------------------------------------------------------------------------------- /TIP #04/readme.txt: -------------------------------------------------------------------------------- 1 | Altium Designer Tips&Tricks - TIP #04 -> How to edit the default „Snap Grid” popup menu [PCB editor]? 2 | 3 | Maybe you were wondering how to edit the Snap Grid popup window? By default in the Altium Designer there is no the dedicated menu for edit this menu. 4 | But there is a nice trick to do that! Please, see my short tutorial in the attachment. 5 | -------------------------------------------------------------------------------- /TIP #05/PCB_MARKING.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #05/PCB_MARKING.png -------------------------------------------------------------------------------- /TIP #05/PCB_Marking_Lib.PcbLib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #05/PCB_Marking_Lib.PcbLib -------------------------------------------------------------------------------- /TIP #05/pcb_marking_demo.PcbLib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #05/pcb_marking_demo.PcbLib -------------------------------------------------------------------------------- /TIP #05/readme.txt: -------------------------------------------------------------------------------- 1 | Altium Designer Tips&Tricks - TIP #05 -> add marking in your PCB design. 2 | 3 | Remember to always add the non-component objects for marking in your PCB design. 4 | These objects can be very useful during the PCB manufacturing, assembly and testing process. 5 | 6 | You can place marking on your PCB, such as: company logo, manufacturing date, layer indicator, fiducial markers, ICT/FCT test points, barcode area or reference holes. 7 | 8 | You can simply create a dedicated PCB library, that will be contain all the marking components. 9 | 10 | Please, see the attached example (the drawing). 11 | 12 | You can download my example library for the PCB marking (demo): 13 | https://github.com/mfolejewski/Altium_Tips_Tricks/tree/master/TIP%20%2305 14 | -------------------------------------------------------------------------------- /TIP #06/[01] Cover_page.SchDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #06/[01] Cover_page.SchDoc -------------------------------------------------------------------------------- /TIP #06/readme.txt: -------------------------------------------------------------------------------- 1 | Altium Designer Tips&Tricks - TIP #06 -> add a cover page schematic to your PCB design. 2 | 3 | Remember to always add a cover page sheet to your schematic source files. 4 | This page is like information board for your project and should contain all the necessary informations about the project, such as: project name, version/revision, project state, assembly variants, table of contents, etc. 5 | 6 | For more information check this excellent content: (thanks Robert Feranec!): 7 | https://welldoneblog.fedevel.com/2017/03/09/tip-051-in-your-schematic-always-create-a-cover-page-with-list-of-pages-and-page-numbers/ 8 | https://welldoneblog.fedevel.com/2016/07/11/7-tips-to-make-your-schematic-look-professional/ 9 | 10 | Please, see the attached example (the drawing). 11 | 12 | You can download my example of the cover page (github demo): 13 | https://github.com/mfolejewski/Altium_Tips_Tricks/tree/master/TIP%20%2306 14 | 15 | #Altium #AltiumDesigner #PCB #PCBDesign 16 | -------------------------------------------------------------------------------- /TIP #07/Altium_BOM_Template_2019_MFO_v1.xlsx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #07/Altium_BOM_Template_2019_MFO_v1.xlsx -------------------------------------------------------------------------------- /TIP #07/SFP_Prog_VER1_BOM_((No Variations))_2019-12-14.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #07/SFP_Prog_VER1_BOM_((No Variations))_2019-12-14.pdf -------------------------------------------------------------------------------- /TIP #07/SFP_Prog_VER1_BOM_[[No Variations]]_2019-12-14.xlsx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #07/SFP_Prog_VER1_BOM_[[No Variations]]_2019-12-14.xlsx -------------------------------------------------------------------------------- /TIP #07/readme.txt: -------------------------------------------------------------------------------- 1 | Altium Designer Tips&Tricks - TIP #07 -> create your own BOM template. 2 | 3 | Remember to always use an dedicated template for automated BOM list generation. 4 | 5 | Please, see the attached example (the drawing). 6 | 7 | You can download my example of the BOM list (my github demo): 8 | https://github.com/mfolejewski/Altium_Tips_Tricks/tree/master/TIP%20%2307 9 | 10 | Do you have any questions? Feel free, do not hesitate, just ask! 11 | 12 | #Altium #AltiumDesigner #PCB #PCBDesign 13 | -------------------------------------------------------------------------------- /TIP #08/Altium Designer Tip #08.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #08/Altium Designer Tip #08.pdf -------------------------------------------------------------------------------- /TIP #08/PTH_NPTH_examples.PcbDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #08/PTH_NPTH_examples.PcbDoc -------------------------------------------------------------------------------- /TIP #08/readme.txt: -------------------------------------------------------------------------------- 1 | Altium Designer Tips&Tricks - TIP #08 -> define NPTH holes. 2 | 3 | Tip for Altium Designer beginner users -> remember to always use a proper definition for PTH pads and NPTH holes. 4 | 5 | You can download my guideline in PDF file (from my github): 6 | https://github.com/mfolejewski/Altium_Tips_Tricks/tree/master/TIP%20%2308 7 | 8 | Do you have any questions? Feel free, do not hesitate, just ask! 9 | 10 | #Altium #AltiumDesigner #PCB #PCBDesign #hardware 11 | -------------------------------------------------------------------------------- /TIP #09/example_footprints.PcbLib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #09/example_footprints.PcbLib -------------------------------------------------------------------------------- /TIP #09/mech_legend.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mfolejewski/Altium_Tips_Tricks/2377ee8a31a6d30d4ecac7c37bdeac8cf733e913/TIP #09/mech_legend.png -------------------------------------------------------------------------------- /TIP #09/mechanical_layers_setup.stackup: -------------------------------------------------------------------------------- 1 | STACKUPVERSION=1|DISPLAYUNIT=1|LAYERMASTERSTACK_V8STYLE=0|LAYERMASTERSTACK_V8ID={F922BB93-E1BB-44A2-8310-021FA6E28F68}|LAYERMASTERSTACK_V8NAME=Master layer stack|LAYERMASTERSTACK_V8SHOWTOPDIELECTRIC=FALSE|LAYERMASTERSTACK_V8SHOWBOTTOMDIELECTRIC=FALSE|LAYERMASTERSTACK_V8ISFLEX=FALSE|LAYERSUBSTACK_V8_0ID={33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}|LAYERSUBSTACK_V8_0NAME=Board Layer Stack|LAYERSUBSTACK_V8_0SHOWTOPDIELECTRIC=FALSE|LAYERSUBSTACK_V8_0SHOWBOTTOMDIELECTRIC=FALSE|LAYERSUBSTACK_V8_0ISFLEX=FALSE|LAYERSUBSTACK_V8_0SERVICE=FALSE|LAYERSUBSTACK_V8_0USEDBYPRIMS=FALSE|LAYERSUBSTACK_V8_0TYPE=1|LAYER_V8_0_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}CONTEXT=0|LAYER_V8_0_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}USEDBYPRIMS=FALSE|LAYER_V8_0ID={3DFF2034-D958-41DE-94B7-3E479C8DA8EB}|LAYER_V8_0NAME=Top Paste|LAYER_V8_0LAYERID=16973832|LAYER_V8_0USEDBYPRIMS=FALSE|LAYER_V8_1_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}CONTEXT=0|LAYER_V8_1_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}USEDBYPRIMS=FALSE|LAYER_V8_1ID={E346370A-9CDB-4D1D-ACC5-13E9BC21D0C9}|LAYER_V8_1NAME=Top Overlay|LAYER_V8_1LAYERID=16973830|LAYER_V8_1USEDBYPRIMS=TRUE|LAYER_V8_2_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}CONTEXT=0|LAYER_V8_2_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}USEDBYPRIMS=FALSE|LAYER_V8_2ID={F5A23BB3-2B0E-4C04-BB03-B921DEB6772E}|LAYER_V8_2NAME=Top Solder|LAYER_V8_2LAYERID=16973834|LAYER_V8_2USEDBYPRIMS=FALSE|LAYER_V8_2DIELTYPE=3|LAYER_V8_2DIELCONST=3.500|LAYER_V8_2DIELHEIGHT=0.4mil|LAYER_V8_2DIELMATERIAL=Solder Resist|LAYER_V8_2COVERLAY_EXPANSION=0mil|LAYER_V8_3_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}CONTEXT=0|LAYER_V8_3_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}USEDBYPRIMS=FALSE|LAYER_V8_3ID={FCB22B15-2BA5-4600-B550-2793BEDF1E40}|LAYER_V8_3NAME=Top Layer|LAYER_V8_3LAYERID=16777217|LAYER_V8_3USEDBYPRIMS=FALSE|LAYER_V8_3COPTHICK=1.4mil|LAYER_V8_3COMPONENTPLACEMENT=1|LAYER_V8_4_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}CONTEXT=0|LAYER_V8_4_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}USEDBYPRIMS=FALSE|LAYER_V8_4ID={903EA5E0-F26C-44B9-8D57-02874079B3EF}|LAYER_V8_4NAME=Dielectric 1|LAYER_V8_4LAYERID=17039361|LAYER_V8_4USEDBYPRIMS=FALSE|LAYER_V8_4DIELTYPE=0|LAYER_V8_4DIELCONST=4.800|LAYER_V8_4DIELHEIGHT=12.6mil|LAYER_V8_4DIELMATERIAL=FR-4|LAYER_V8_5_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}CONTEXT=0|LAYER_V8_5_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}USEDBYPRIMS=FALSE|LAYER_V8_5ID={B159E45D-1F84-4A90-8320-9F2538F6E28E}|LAYER_V8_5NAME=Bottom Layer|LAYER_V8_5LAYERID=16842751|LAYER_V8_5USEDBYPRIMS=FALSE|LAYER_V8_5COPTHICK=1.4mil|LAYER_V8_5COMPONENTPLACEMENT=2|LAYER_V8_6_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}CONTEXT=0|LAYER_V8_6_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}USEDBYPRIMS=FALSE|LAYER_V8_6ID={438288B1-5ABB-471E-A10F-E86405B0E374}|LAYER_V8_6NAME=Bottom Solder|LAYER_V8_6LAYERID=16973835|LAYER_V8_6USEDBYPRIMS=FALSE|LAYER_V8_6DIELTYPE=3|LAYER_V8_6DIELCONST=3.500|LAYER_V8_6DIELHEIGHT=0.4mil|LAYER_V8_6DIELMATERIAL=Solder Resist|LAYER_V8_6COVERLAY_EXPANSION=0mil|LAYER_V8_7_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}CONTEXT=0|LAYER_V8_7_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}USEDBYPRIMS=FALSE|LAYER_V8_7ID={150FA9CD-DB3E-4A9B-920C-BAC415B7648C}|LAYER_V8_7NAME=Bottom Overlay|LAYER_V8_7LAYERID=16973831|LAYER_V8_7USEDBYPRIMS=FALSE|LAYER_V8_8_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}CONTEXT=0|LAYER_V8_8_{33A691C1-2A27-45DF-8E1E-CFC0D9BA6825}USEDBYPRIMS=FALSE|LAYER_V8_8ID={81920793-C51E-479C-82FB-3C8A7BCA577C}|LAYER_V8_8NAME=Bottom Paste|LAYER_V8_8LAYERID=16973833|LAYER_V8_8USEDBYPRIMS=FALSE|LAYER_V8_9ID={D1511E70-FEFD-42DF-957E-04C6466614F5}|LAYER_V8_9NAME=Drill Guide|LAYER_V8_9LAYERID=16973836|LAYER_V8_9USEDBYPRIMS=FALSE|LAYER_V8_10ID={A728D9CE-73E6-49FA-AC88-14DF5599AE1C}|LAYER_V8_10NAME=Keep-Out Layer|LAYER_V8_10LAYERID=16973837|LAYER_V8_10USEDBYPRIMS=FALSE|LAYER_V8_11ID={90231431-0578-442D-90E1-0AF67E06850E}|LAYER_V8_11NAME=M01 BoardOutline|LAYER_V8_11LAYERID=16908289|LAYER_V8_11USEDBYPRIMS=TRUE|LAYER_V8_11MECHENABLED=TRUE|LAYER_V8_12ID={B8AEE264-40B6-42CC-B158-D9F025CF2640}|LAYER_V8_12NAME=M02 PanelOutline|LAYER_V8_12LAYERID=16908290|LAYER_V8_12USEDBYPRIMS=TRUE|LAYER_V8_12MECHENABLED=TRUE|LAYER_V8_13ID={AE1D049D-A201-43DA-9BA0-2F324AA2E38A}|LAYER_V8_13NAME=M03 V-Cut|LAYER_V8_13LAYERID=16908291|LAYER_V8_13USEDBYPRIMS=TRUE|LAYER_V8_13MECHENABLED=TRUE|LAYER_V8_14ID={6C46C03C-8A9B-4FA7-B587-7D57A7256006}|LAYER_V8_14NAME=M04 MillingNonPlated|LAYER_V8_14LAYERID=16908292|LAYER_V8_14USEDBYPRIMS=TRUE|LAYER_V8_14MECHENABLED=TRUE|LAYER_V8_15ID={72F86E71-3612-4D05-8A4E-A2B63D0EF29B}|LAYER_V8_15NAME=M05 MillingPlated|LAYER_V8_15LAYERID=16908293|LAYER_V8_15USEDBYPRIMS=TRUE|LAYER_V8_15MECHENABLED=TRUE|LAYER_V8_16ID={7162789A-784A-4671-B4CD-F4F2562FABC3}|LAYER_V8_16NAME=M06 Slots|LAYER_V8_16LAYERID=16908294|LAYER_V8_16USEDBYPRIMS=TRUE|LAYER_V8_16MECHENABLED=TRUE|LAYER_V8_17ID={D0182CE2-007E-4177-BEFB-3FCDB2ADF8AA}|LAYER_V8_17NAME=M07 PeelableMask|LAYER_V8_17LAYERID=16908295|LAYER_V8_17USEDBYPRIMS=TRUE|LAYER_V8_17MECHENABLED=TRUE|LAYER_V8_18ID={EA63B9D8-B010-40B7-92A0-1499F4474EDC}|LAYER_V8_18NAME=M08 CarbonInk|LAYER_V8_18LAYERID=16908296|LAYER_V8_18USEDBYPRIMS=TRUE|LAYER_V8_18MECHENABLED=TRUE|LAYER_V8_19ID={00BB4248-0018-4D64-B101-3C16AE48AACB}|LAYER_V8_19NAME=M09 Dimensions|LAYER_V8_19LAYERID=16908297|LAYER_V8_19USEDBYPRIMS=FALSE|LAYER_V8_19MECHENABLED=TRUE|LAYER_V8_20ID={EE54DAAA-7893-4BDA-8571-26745E041D53}|LAYER_V8_20NAME=M10 PCBSpecification|LAYER_V8_20LAYERID=16908298|LAYER_V8_20USEDBYPRIMS=FALSE|LAYER_V8_20MECHENABLED=TRUE|LAYER_V8_21ID={ADDE99A5-750A-44B0-BDAA-96A0BA0DF826}|LAYER_V8_21NAME=M11 AssemblyRemarksTop|LAYER_V8_21LAYERID=16908299|LAYER_V8_21USEDBYPRIMS=FALSE|LAYER_V8_21MECHENABLED=TRUE|LAYER_V8_22ID={C94DCA40-E730-49B2-9F75-B3C1CDD79D3A}|LAYER_V8_22NAME=M12 AssemblyRemarksBot|LAYER_V8_22LAYERID=16908300|LAYER_V8_22USEDBYPRIMS=FALSE|LAYER_V8_22MECHENABLED=TRUE|LAYER_V8_23ID={352FF267-1C5D-43E0-9667-A90463703F4B}|LAYER_V8_23NAME=M13 SheetBorder|LAYER_V8_23LAYERID=16908301|LAYER_V8_23USEDBYPRIMS=FALSE|LAYER_V8_23MECHENABLED=TRUE|LAYER_V8_24ID={C484DD48-AC03-4014-9A5E-17581AE856E7}|LAYER_V8_24NAME=M14 CADImport|LAYER_V8_24LAYERID=16908302|LAYER_V8_24USEDBYPRIMS=FALSE|LAYER_V8_24MECHENABLED=TRUE|LAYER_V8_25ID={2A1449F5-3CC4-454B-81A4-FE8F358FCAF6}|LAYER_V8_25NAME=M15 Reserved|LAYER_V8_25LAYERID=16908303|LAYER_V8_25USEDBYPRIMS=FALSE|LAYER_V8_25MECHENABLED=TRUE|LAYER_V8_26ID={3C6DFAFF-43D7-47D9-81CD-DB5314BEB19E}|LAYER_V8_26NAME=M16 Reserved|LAYER_V8_26LAYERID=16908304|LAYER_V8_26USEDBYPRIMS=FALSE|LAYER_V8_26MECHENABLED=TRUE|LAYER_V8_27ID={DBDE7C31-C88E-4794-AD42-3014BF9A5AFE}|LAYER_V8_27NAME=Drill Drawing|LAYER_V8_27LAYERID=16973838|LAYER_V8_27USEDBYPRIMS=FALSE|LAYER_V8_28ID={92F1BF6A-6882-4100-A481-A394F3CEC057}|LAYER_V8_28NAME=Multi-Layer|LAYER_V8_28LAYERID=16973839|LAYER_V8_28USEDBYPRIMS=TRUE|LAYER_V8_29ID={D376A140-4CB7-4A00-B1BC-803835E32AB3}|LAYER_V8_29NAME=Connections|LAYER_V8_29LAYERID=16973840|LAYER_V8_29USEDBYPRIMS=FALSE|LAYER_V8_30ID={51523CF6-7630-4C65-846E-7A3AF0173072}|LAYER_V8_30NAME=Background|LAYER_V8_30LAYERID=16973841|LAYER_V8_30USEDBYPRIMS=FALSE|LAYER_V8_31ID={0AB8CFA6-6295-42B7-964E-34C7068F46D5}|LAYER_V8_31NAME=DRC Error Markers|LAYER_V8_31LAYERID=16973842|LAYER_V8_31USEDBYPRIMS=FALSE|LAYER_V8_32ID={A7A7888D-6970-4C77-A0F9-EE48FE7206E9}|LAYER_V8_32NAME=Selections|LAYER_V8_32LAYERID=16973843|LAYER_V8_32USEDBYPRIMS=FALSE|LAYER_V8_33ID={C475CA2C-701F-486F-8024-E103863ECB69}|LAYER_V8_33NAME=Visible Grid 1|LAYER_V8_33LAYERID=16973844|LAYER_V8_33USEDBYPRIMS=FALSE|LAYER_V8_34ID={348388E3-BF7F-4C42-B8BD-ED4ADF2D6C80}|LAYER_V8_34NAME=Visible Grid 2|LAYER_V8_34LAYERID=16973845|LAYER_V8_34USEDBYPRIMS=FALSE|LAYER_V8_35ID={05BAD8B7-90C6-475C-B557-22F38F35969C}|LAYER_V8_35NAME=Pad Holes|LAYER_V8_35LAYERID=16973846|LAYER_V8_35USEDBYPRIMS=FALSE|LAYER_V8_36ID={37F68A25-7C74-4D3C-ACBD-5BBA8DEF5C03}|LAYER_V8_36NAME=Via Holes|LAYER_V8_36LAYERID=16973847|LAYER_V8_36USEDBYPRIMS=FALSE|LAYER_V8_37ID={82E796EF-A204-4B47-8187-386AE5B4EF85}|LAYER_V8_37NAME=Top Pad Master|LAYER_V8_37LAYERID=16973848|LAYER_V8_37USEDBYPRIMS=FALSE|LAYER_V8_38ID={0D509F12-EB87-489C-BBCA-5127A59797B9}|LAYER_V8_38NAME=Bottom Pad Master|LAYER_V8_38LAYERID=16973849|LAYER_V8_38USEDBYPRIMS=FALSE|LAYER_V8_39ID={93AE7148-111D-481A-81DA-C930C0D1D7D8}|LAYER_V8_39NAME=DRC Detail Markers|LAYER_V8_39LAYERID=16973850|LAYER_V8_39USEDBYPRIMS=FALSE|LAYER_V8_40ID={D68322E9-CA5D-4E97-87BF-718A6EF44BD5}|LAYER_V8_40NAME=M17 3DBodyTop|LAYER_V8_40LAYERID=16908305|LAYER_V8_40USEDBYPRIMS=FALSE|LAYER_V8_40MECHENABLED=TRUE|LAYER_V8_41ID={7AF026DA-6CFE-4E5D-AC35-CBDAA10486DD}|LAYER_V8_41NAME=M18 3DBodyBot|LAYER_V8_41LAYERID=16908306|LAYER_V8_41USEDBYPRIMS=FALSE|LAYER_V8_41MECHENABLED=TRUE|LAYER_V8_42ID={E66B06DF-ED59-4FB9-A9D2-28CA9345067C}|LAYER_V8_42NAME=M19 AssemblySMDTop|LAYER_V8_42LAYERID=16908307|LAYER_V8_42USEDBYPRIMS=FALSE|LAYER_V8_42MECHENABLED=TRUE|LAYER_V8_43ID={EF05183F-9272-4333-B0D1-7E6D58D3C020}|LAYER_V8_43NAME=M20 AssemblySMDBot|LAYER_V8_43LAYERID=16908308|LAYER_V8_43USEDBYPRIMS=FALSE|LAYER_V8_43MECHENABLED=TRUE|LAYER_V8_44ID={CA3AA81A-A758-4FFF-9064-45436278854C}|LAYER_V8_44NAME=M21 AssemblyTHTTop|LAYER_V8_44LAYERID=16908309|LAYER_V8_44USEDBYPRIMS=FALSE|LAYER_V8_44MECHENABLED=TRUE|LAYER_V8_45ID={3DE4B14E-FC7F-454B-A4DC-3CED646D41B7}|LAYER_V8_45NAME=M22 AssemblyTHTBot|LAYER_V8_45LAYERID=16908310|LAYER_V8_45USEDBYPRIMS=FALSE|LAYER_V8_45MECHENABLED=TRUE|LAYER_V8_46ID={2D3B0355-451F-41C6-B047-CF4126B3F731}|LAYER_V8_46NAME=M23 CourtyardTop|LAYER_V8_46LAYERID=16908311|LAYER_V8_46USEDBYPRIMS=FALSE|LAYER_V8_46MECHENABLED=TRUE|LAYER_V8_47ID={64EC207E-7A32-45A9-A7E2-84B810A66F5F}|LAYER_V8_47NAME=M24 CourtyardBot|LAYER_V8_47LAYERID=16908312|LAYER_V8_47USEDBYPRIMS=FALSE|LAYER_V8_47MECHENABLED=TRUE|LAYER_V8_48ID={C73233FF-F3FC-4D8F-86CF-089BA2485DFB}|LAYER_V8_48NAME=M25 TestpointTop|LAYER_V8_48LAYERID=16908313|LAYER_V8_48USEDBYPRIMS=FALSE|LAYER_V8_48MECHENABLED=TRUE|LAYER_V8_49ID={C39051E8-B43D-4FC0-A8C9-65F6F7512BAA}|LAYER_V8_49NAME=M26 TestpointBot|LAYER_V8_49LAYERID=16908314|LAYER_V8_49USEDBYPRIMS=FALSE|LAYER_V8_49MECHENABLED=TRUE|LAYER_V8_50ID={7D94C0FB-373E-4FB7-A18C-A1ED06A32E06}|LAYER_V8_50NAME=M27 MetalAreaTop|LAYER_V8_50LAYERID=16908315|LAYER_V8_50USEDBYPRIMS=FALSE|LAYER_V8_50MECHENABLED=TRUE|LAYER_V8_51ID={05C11E70-3E83-421E-B436-77BCBC77B3F6}|LAYER_V8_51NAME=M28 MetalAreaBot|LAYER_V8_51LAYERID=16908316|LAYER_V8_51USEDBYPRIMS=FALSE|LAYER_V8_51MECHENABLED=TRUE|LAYER_V8_52ID={B41F2F1B-5B48-44A1-99A8-F90D0DC2CF3F}|LAYER_V8_52NAME=M29 Reserved|LAYER_V8_52LAYERID=16908317|LAYER_V8_52USEDBYPRIMS=FALSE|LAYER_V8_52MECHENABLED=TRUE|LAYER_V8_53ID={9E2E227D-0BA9-45E9-9CD2-0B02C577DE81}|LAYER_V8_53NAME=M30 Reserved|LAYER_V8_53LAYERID=16908318|LAYER_V8_53USEDBYPRIMS=FALSE|LAYER_V8_53MECHENABLED=TRUE|LAYER_V8_54ID={81A28E1B-423B-4319-BBE1-AB01C815139D}|LAYER_V8_54NAME=M31 GlueDot|LAYER_V8_54LAYERID=16908319|LAYER_V8_54USEDBYPRIMS=FALSE|LAYER_V8_54MECHENABLED=TRUE|LAYER_V8_55ID={07D4CFFC-0B86-452D-A970-4A2BFAEC990E}|LAYER_V8_55NAME=M32 FootprintRemarks|LAYER_V8_55LAYERID=16908320|LAYER_V8_55USEDBYPRIMS=FALSE|LAYER_V8_55MECHENABLED=TRUE|LAYER_V8_56ID={CDF2EEE1-15F0-4792-A2EA-B096D222DE1F}|LAYER_V8_56NAME=Top AssemblyRemarksTop/AssemblyRemarksBot|LAYER_V8_56LAYERID=16908321|LAYER_V8_56USEDBYPRIMS=FALSE|LAYER_V8_56MECHENABLED=FALSE|LAYER_V8_57ID={EF4610F6-DF75-4F63-A62D-EF56A31DC3C2}|LAYER_V8_57NAME=Bottom AssemblyRemarksTop/AssemblyRemarksBot|LAYER_V8_57LAYERID=16908322|LAYER_V8_57USEDBYPRIMS=FALSE|LAYER_V8_57MECHENABLED=FALSE|MECHPAIR0L1=MECHANICAL11|MECHPAIR0L2=MECHANICAL12|MECHPAIR1L1=MECHANICAL19|MECHPAIR1L2=MECHANICAL20|MECHPAIR2L1=MECHANICAL21|MECHPAIR2L2=MECHANICAL22|MECHPAIR3L1=MECHANICAL23|MECHPAIR3L2=MECHANICAL24|MECHPAIR4L1=MECHANICAL25|MECHPAIR4L2=MECHANICAL26|MECHPAIR5L1=MECHANICAL27|MECHPAIR5L2=MECHANICAL28|MECHPAIR6L1=MECHANICAL17|MECHPAIR6L2=MECHANICAL18 -------------------------------------------------------------------------------- /TIP #09/readme.txt: -------------------------------------------------------------------------------- 1 | Altium Designer Tips&Tricks - TIP #09 -> define mechanical layers. 2 | 3 | Hello PCB designers! I have a proposal how to name, use and configure mechanical layers in the Altium Designer at PCB editor. 4 | 5 | So this is it: 6 | The first 16 layers (M01 - M16) I used for PCB designing purposes and next 16 layers (M17 - M32) I used for PCB footprint library creating purposes. 7 | 8 | In my proposal, you can find layers definition for assembly drawings, for 3D body models, for test points, for board and panel outline, etc. 9 | 10 | You can download my mechanical layers settings (from GitHub): 11 | https://github.com/mfolejewski/Altium_Tips_Tricks/blob/master/TIP%20%2309/mechanical_layers_setup.stackup 12 | 13 | Next, you can import that mechanical layers settings by open the file *.stackup to your PCB design or PCB footprint editor: 14 | PCB Editor => Menu => Tools => Import Mechanicals Layers... 15 | 16 | How to implement my layers proposal in your PCB libraries? Just open my example PCB library and check, analyze or copy created PCB footprints. 17 | 18 | Here you can download my example PCB footprint library that uses proposed mechanical layers setup (from GitHub): 19 | https://github.com/mfolejewski/Altium_Tips_Tricks/blob/master/TIP%20%2309/example_footprints.PcbLib 20 | 21 | Do you have any questions? Feel free, do not hesitate, just ask! 22 | 23 | #Hardware #Altium #AltiumDesigner #PCB #PCBDesign 24 | --------------------------------------------------------------------------------