├── scripts
    ├── streaming
    │   ├── .gitignore
    │   ├── tasbot.yml
    │   ├── console_on.py
    │   ├── console_off.py
    │   ├── reset_console.py
    │   ├── stream_NES.py
    │   └── tasbot-ui.py
    └── emulator
    │   └── SNES
    │       └── lsnes_dump_latches.lua
├── PCBs
    ├── .gitignore
    ├── snes_visualization
    │   ├── snes_visualization_left
    │   │   └── snes_visualization_left.cam
    │   ├── snes_visualization_joiner
    │   │   └── snes_visualization_joiner.cam
    │   ├── snes_visualization_shoulder
    │   │   └── snes_visualization_shoulder.cam
    │   └── snes_visualization_right
    │   │   └── snes_visualization_right.cam
    ├── n64_4_port
    │   └── n64_4_port.cam
    ├── nes_mini
    │   └── nes_mini.cam
    ├── nes_snes_4_port
    │   └── nes_snes_4_port.cam
    ├── snes_ext_port_adapter
    │   └── snes_ext_port_adapter.cam
    ├── visualization_breakout_4_port
    │   └── visualization_breakout_4_port.cam
    ├── visualization_breakout_2_port
    │   └── visualization_breakout_2_port.cam
    ├── controller_tap
    │   └── controller_tap.cam
    └── replay_adapter
    │   └── replay_adapter.cam
├── HDL
    ├── N64
    │   ├── toggle.vhd
    │   ├── filter.vhd
    │   ├── main.ucf
    │   ├── byte_receiver.vhd
    │   ├── fifo.vhd
    │   ├── bit_transmitter.vhd
    │   ├── byte_transmitter.vhd
    │   ├── bit_detector.vhd
    │   ├── UART.vhd
    │   ├── n64_data_transmitter.vhd
    │   └── main.vhd
    ├── TASLink
    │   ├── toggle.vhd
    │   ├── filter.vhd
    │   ├── shift_register.vhd
    │   ├── clock_delay.vhd
    │   ├── fifo.vhd
    │   ├── controller.vhd
    │   ├── UART.vhd
    │   ├── snes_multitap.vhd
    │   ├── main.ucf
    │   └── visualization.vhd
    ├── .gitignore
    ├── n64_mitm
    │   ├── filter.vhd
    │   ├── main.ucf
    │   ├── byte_receiver.vhd
    │   ├── bit_transmitter.vhd
    │   ├── byte_transmitter.vhd
    │   ├── bit_detector.vhd
    │   ├── n64_data_transmitter.vhd
    │   └── main.vhd
    └── NES_Mini
    │   └── NES_Mini
    │       ├── filter.vhd
    │       ├── fifo.vhd
    │       ├── main.ucf
    │       └── UART.vhd
└── README.md


/scripts/streaming/.gitignore:
--------------------------------------------------------------------------------
1 | *.r08
2 | *.r16
3 | *.r16m
4 | *.tcf


--------------------------------------------------------------------------------
/PCBs/.gitignore:
--------------------------------------------------------------------------------
 1 | *.s#*
 2 | *.b#*
 3 | *.l#*
 4 | *.GTL
 5 | *.GBL
 6 | *.GTS
 7 | *.GBS
 8 | *.GTO
 9 | *.GBO
10 | *.GKO
11 | *.GML
12 | *.XLN
13 | *.dri
14 | *.gpi
15 | 


--------------------------------------------------------------------------------
/scripts/streaming/tasbot.yml:
--------------------------------------------------------------------------------
 1 | - option1: true
 2 |   source: run1.r08
 3 |   value1: '23'
 4 | - option1: false
 5 |   source: run2.r08
 6 |   value1: '43'
 7 | - option1: true
 8 |   source: run3.r08
 9 |   value1: '77'
10 | 


--------------------------------------------------------------------------------
/scripts/streaming/console_on.py:
--------------------------------------------------------------------------------
 1 | import serial
 2 | import sys
 3 | from serial import SerialException
 4 | 
 5 | baud = 2000000
 6 | 
 7 | if len(sys.argv) < 2:
 8 |     sys.stderr.write('Usage: ' + sys.argv[0] + ' <interface>\n\n')
 9 |     sys.exit(0)
10 | 
11 | try:
12 |     ser = serial.Serial(sys.argv[1], baud)
13 | except SerialException:
14 |     print ("ERROR: the specified interface (" + sys.argv[1] + ") is in use")
15 |     sys.exit(0)
16 | 
17 | ser.write("sd0")
18 | 
19 | sys.exit(0)


--------------------------------------------------------------------------------
/scripts/streaming/console_off.py:
--------------------------------------------------------------------------------
 1 | import serial
 2 | import sys
 3 | from serial import SerialException
 4 | 
 5 | baud = 2000000
 6 | 
 7 | if len(sys.argv) < 2:
 8 |     sys.stderr.write('Usage: ' + sys.argv[0] + ' <interface>\n\n')
 9 |     sys.exit(0)
10 | 
11 | try:
12 |     ser = serial.Serial(sys.argv[1], baud)
13 | except SerialException:
14 |     print ("ERROR: the specified interface (" + sys.argv[1] + ") is in use")
15 |     sys.exit(0)
16 | 
17 | ser.write("sd1")
18 | 
19 | sys.exit(0)


--------------------------------------------------------------------------------
/scripts/streaming/reset_console.py:
--------------------------------------------------------------------------------
 1 | import serial
 2 | import sys
 3 | from serial import SerialException
 4 | 
 5 | baud = 2000000
 6 | 
 7 | if len(sys.argv) < 2:
 8 |     sys.stderr.write('Usage: ' + sys.argv[0] + ' <interface>\n\n')
 9 |     sys.exit(0)
10 | 
11 | try:
12 |     ser = serial.Serial(sys.argv[1], baud)
13 | except SerialException:
14 |     print ("ERROR: the specified interface (" + sys.argv[1] + ") is in use")
15 |     sys.exit(0)
16 | 
17 | ser.write("sd1")
18 | ser.write("sd0")
19 | 
20 | sys.exit(0)


--------------------------------------------------------------------------------
/HDL/N64/toggle.vhd:
--------------------------------------------------------------------------------
 1 | -- Toggles signal_out on every rising edge of signal_in
 2 | 
 3 | library IEEE;
 4 | use IEEE.STD_LOGIC_1164.ALL;
 5 | 
 6 | entity toggle is
 7 |     Port ( signal_in : in  STD_LOGIC;
 8 |            signal_out : out  STD_LOGIC);
 9 | end toggle;
10 | 
11 | architecture Behavioral of toggle is
12 | signal toggle : std_logic := '0';
13 | begin
14 | 
15 |   process(signal_in)
16 |   begin
17 |     if (rising_edge(signal_in)) then
18 |       toggle <= not(toggle);
19 |     end if;
20 |   end process;
21 | 
22 | signal_out <= toggle;
23 | end Behavioral;
24 | 
25 | 


--------------------------------------------------------------------------------
/HDL/TASLink/toggle.vhd:
--------------------------------------------------------------------------------
 1 | -- Toggles signal_out on every rising edge of signal_in
 2 | 
 3 | library IEEE;
 4 | use IEEE.STD_LOGIC_1164.ALL;
 5 | 
 6 | entity toggle is
 7 |     Port ( signal_in : in  STD_LOGIC;
 8 |            signal_out : out  STD_LOGIC);
 9 | end toggle;
10 | 
11 | architecture Behavioral of toggle is
12 | signal toggle : std_logic := '0';
13 | begin
14 | 
15 |   process(signal_in)
16 |   begin
17 |     if (rising_edge(signal_in)) then
18 |       toggle <= not(toggle);
19 |     end if;
20 |   end process;
21 | 
22 | signal_out <= toggle;
23 | end Behavioral;
24 | 
25 | 


--------------------------------------------------------------------------------
/HDL/.gitignore:
--------------------------------------------------------------------------------
 1 | *.bit
 2 | *.bgn
 3 | *.bld
 4 | *.cmd_log
 5 | *.drc
 6 | *.gise
 7 | *.lso
 8 | *.map
 9 | *.mrp
10 | *.ncd
11 | *.ngc
12 | *.ngd
13 | *.ngm
14 | *.ngr
15 | *.pad
16 | *.par
17 | *.pcf
18 | *.prj
19 | *.ptwx
20 | *.stx
21 | *.syr
22 | *.twr
23 | *.twx
24 | *.unroutes
25 | *.ut
26 | *.wdb
27 | *.xmsgs
28 | *.xpi
29 | *.xrpt
30 | *.xst
31 | *.xwbt
32 | _ngo
33 | _xmsgs
34 | fuse.log
35 | fuseRelaunch.cmd
36 | iseconfig
37 | isim
38 | isim.cmd
39 | isim.log
40 | par_usage_statistics.html
41 | usage_statistics_webtalk.html
42 | webtalk.log
43 | webtalk_pn.xml
44 | xilinxsim.ini
45 | xlnx_auto_0_xdb
46 | xst
47 | *_pad.csv
48 | *_pad.txt
49 | *_envsettings.html
50 | *_map_module_level_utilization.html
51 | *_summary.html
52 | *_summary.xml
53 | *_usage.xml
54 | planAhead*/
55 | planAhead*
56 | pa.fromNetlist.tcl
57 | */ipcore_dir/coregen.log
58 | */ipcore_dir/create_clocktest.tcl
59 | */ipcore_dir/tmp/*
60 | 


--------------------------------------------------------------------------------
/HDL/N64/filter.vhd:
--------------------------------------------------------------------------------
 1 | -- Filters out any very short pulses on the signal in
 2 | -- Pulses must be at least 6/32,000,000 s ~= 187ns
 3 | 
 4 | library IEEE;
 5 | use IEEE.STD_LOGIC_1164.ALL;
 6 | 
 7 | entity filter is
 8 |     Port ( signal_in : in  STD_LOGIC;
 9 |            clk : in  STD_LOGIC;
10 |            signal_out : out  STD_LOGIC);
11 | end filter;
12 | 
13 | architecture Behavioral of filter is
14 |   signal counter : integer range 0 to 6 := 0;
15 |   signal current_output : std_logic := '0';
16 | begin
17 | 
18 |   process(clk)
19 |     
20 |   begin
21 |     if (rising_edge(clk)) then
22 |       if (signal_in = current_output) then
23 |         counter <= 0;
24 |       else
25 |         counter <= counter + 1;
26 |         if (counter = 6) then
27 |           current_output <= not(current_output);
28 |           counter <= 0;
29 |         end if;
30 |       end if;
31 |     end if;
32 |   end process;
33 | 
34 | signal_out <= current_output;
35 | 
36 | end Behavioral;
37 | 
38 | 


--------------------------------------------------------------------------------
/HDL/TASLink/filter.vhd:
--------------------------------------------------------------------------------
 1 | -- Filters out any very short pulses on the signal in
 2 | -- Pulses must be at least 6/32,000,000 s ~= 187ns
 3 | 
 4 | library IEEE;
 5 | use IEEE.STD_LOGIC_1164.ALL;
 6 | 
 7 | entity filter is
 8 |     Port ( signal_in : in  STD_LOGIC;
 9 |            clk : in  STD_LOGIC;
10 |            signal_out : out  STD_LOGIC);
11 | end filter;
12 | 
13 | architecture Behavioral of filter is
14 |   signal counter : integer range 0 to 6 := 0;
15 |   signal current_output : std_logic := '0';
16 | begin
17 | 
18 |   process(clk)
19 |     
20 |   begin
21 |     if (rising_edge(clk)) then
22 |       if (signal_in = current_output) then
23 |         counter <= 0;
24 |       else
25 |         counter <= counter + 1;
26 |         if (counter = 6) then
27 |           current_output <= not(current_output);
28 |           counter <= 0;
29 |         end if;
30 |       end if;
31 |     end if;
32 |   end process;
33 | 
34 | signal_out <= current_output;
35 | 
36 | end Behavioral;
37 | 
38 | 


--------------------------------------------------------------------------------
/HDL/n64_mitm/filter.vhd:
--------------------------------------------------------------------------------
 1 | -- Filters out any very short pulses on the signal in
 2 | -- Pulses must be at least 6/32,000,000 s ~= 187ns
 3 | 
 4 | library IEEE;
 5 | use IEEE.STD_LOGIC_1164.ALL;
 6 | 
 7 | entity filter is
 8 |     Port ( signal_in : in  STD_LOGIC;
 9 |            clk : in  STD_LOGIC;
10 |            signal_out : out  STD_LOGIC);
11 | end filter;
12 | 
13 | architecture Behavioral of filter is
14 |   signal counter : integer range 0 to 6 := 0;
15 |   signal current_output : std_logic := '0';
16 | begin
17 | 
18 |   process(clk)
19 |     
20 |   begin
21 |     if (rising_edge(clk)) then
22 |       if (signal_in = current_output) then
23 |         counter <= 0;
24 |       else
25 |         counter <= counter + 1;
26 |         if (counter = 6) then
27 |           current_output <= not(current_output);
28 |           counter <= 0;
29 |         end if;
30 |       end if;
31 |     end if;
32 |   end process;
33 | 
34 | signal_out <= current_output;
35 | 
36 | end Behavioral;
37 | 
38 | 


--------------------------------------------------------------------------------
/HDL/NES_Mini/NES_Mini/filter.vhd:
--------------------------------------------------------------------------------
 1 | -- Filters out any very short pulses on the signal in
 2 | -- Pulses must be at least 6/32,000,000 s ~= 187ns
 3 | 
 4 | library IEEE;
 5 | use IEEE.STD_LOGIC_1164.ALL;
 6 | 
 7 | entity filter is
 8 |     Port ( signal_in : in  STD_LOGIC;
 9 |            clk : in  STD_LOGIC;
10 |            signal_out : out  STD_LOGIC);
11 | end filter;
12 | 
13 | architecture Behavioral of filter is
14 |   signal counter : integer range 0 to 6 := 0;
15 |   signal current_output : std_logic := '0';
16 | begin
17 | 
18 |   process(clk)
19 |     
20 |   begin
21 |     if (rising_edge(clk)) then
22 |       if (signal_in = current_output) then
23 |         counter <= 0;
24 |       else
25 |         counter <= counter + 1;
26 |         if (counter = 6) then
27 |           current_output <= not(current_output);
28 |           counter <= 0;
29 |         end if;
30 |       end if;
31 |     end if;
32 |   end process;
33 | 
34 | signal_out <= current_output;
35 | 
36 | end Behavioral;
37 | 
38 | 


--------------------------------------------------------------------------------
/HDL/TASLink/shift_register.vhd:
--------------------------------------------------------------------------------
 1 | library IEEE;
 2 | use IEEE.STD_LOGIC_1164.ALL;
 3 | use IEEE.NUMERIC_STD.ALL;
 4 | 
 5 | entity shift_register is
 6 |     Port ( latch : in  STD_LOGIC;
 7 |            clock : in  STD_LOGIC;
 8 |            din : in  STD_LOGIC_VECTOR (7 downto 0);
 9 |            dout : out  STD_LOGIC;
10 |            sin : in STD_LOGIC;
11 |            clk : in std_logic);
12 | end shift_register;
13 | 
14 | architecture Behavioral of shift_register is
15 |   signal latched_data : std_logic_vector(7 downto 0) := "11111111";
16 |   signal prev_clk : std_logic := '1';
17 | begin
18 | shift_out: process(clk)
19 |   begin
20 |     if (rising_edge(clk)) then
21 |       if (latch = '1') then
22 |         latched_data <= din;
23 |       elsif (clock /= prev_clk and clock = '1') then
24 |         latched_data <= latched_data(6 downto 0) & sin;
25 |       end if;
26 |       
27 |       prev_clk <= clock;
28 |     end if;
29 |   end process;
30 | 
31 | dout <= latched_data(7);
32 | 
33 | end Behavioral;
34 | 
35 | 


--------------------------------------------------------------------------------
/HDL/N64/main.ucf:
--------------------------------------------------------------------------------
 1 | ## Prohibit the automatic placement of pins that are connected to VCC or GND for configuration.
 2 | CONFIG PROHIBIT=P144;
 3 | CONFIG PROHIBIT=P69;
 4 | CONFIG PROHIBIT=P60;
 5 | 
 6 | NET CLK               LOC="P94"  | IOSTANDARD=LVTTL | PERIOD=31.25ns;               # CLK
 7 | NET RX                LOC="P101" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # RX
 8 | NET TX_raw            LOC="P105" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST | PULLUP; # TX
 9 | 
10 | 
11 | 
12 | NET data_signal_oe    LOC="P133" | IOSTANDARD=LVTTL;                                # C14
13 | NET data_signal_out   LOC="P134" | IOSTANDARD=LVTTL;                                # C15
14 | 
15 | 
16 | 
17 | NET data_signal_in    LOC="P74"  | IOSTANDARD=LVTTL;                                # B8
18 | NET debug(3)          LOC="P61"  | IOSTANDARD=LVTTL;                                # A4
19 | NET debug(2)          LOC="P66"  | IOSTANDARD=LVTTL;                                # A5
20 | NET debug(1)          LOC="P67"  | IOSTANDARD=LVTTL;                                # A6
21 | NET debug(0)          LOC="P75"  | IOSTANDARD=LVTTL | CLOCK_DEDICATED_ROUTE;        # A7
22 | 


--------------------------------------------------------------------------------
/HDL/n64_mitm/main.ucf:
--------------------------------------------------------------------------------
 1 | ## Prohibit the automatic placement of pins that are connected to VCC or GND for configuration.
 2 | CONFIG PROHIBIT=P144;
 3 | CONFIG PROHIBIT=P69;
 4 | CONFIG PROHIBIT=P60;
 5 | 
 6 | NET CLK               LOC="P94"  | IOSTANDARD=LVTTL | PERIOD=31.25ns;               # CLK
 7 | #NET RX                LOC="P101" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # RX
 8 | #NET TX_raw            LOC="P105" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST | PULLUP; # TX
 9 | 
10 | 
11 | 
12 | NET console_signal_oe    LOC="P133" | IOSTANDARD=LVTTL;                                # C14
13 | NET console_signal_out   LOC="P134" | IOSTANDARD=LVTTL;                                # C15
14 | 
15 | 
16 | 
17 | NET console_signal_in    LOC="P74"  | IOSTANDARD=LVTTL;                                # B8
18 | NET debug(3)          LOC="P61"  | IOSTANDARD=LVTTL;                                # A4
19 | NET debug(2)          LOC="P66"  | IOSTANDARD=LVTTL;                                # A5
20 | NET debug(1)          LOC="P67"  | IOSTANDARD=LVTTL;                                # A6
21 | NET debug(0)          LOC="P75"  | IOSTANDARD=LVTTL | CLOCK_DEDICATED_ROUTE;        # A7
22 | 
23 | 
24 | NET controller_signal_oe    LOC="P47" | IOSTANDARD=LVTTL;                                # B15
25 | NET controller_signal_out   LOC="P50" | IOSTANDARD=LVTTL;                                # B14
26 | NET controller_signal_in    LOC="P59" | IOSTANDARD=LVTTL;                                # B11
27 | 


--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
 1 | ![alt text](http://i.imgur.com/LojPtpn.png)
 2 | 
 3 | TASLink is a series of hardware and supporting software built around the Papilio Pro FPGA development board designed for interfacing with consoles. The hardware is in the form of "wings" (or "shields") that can be attached depending on the situation. There is currently hardware for NES/SNES and the N64.
 4 | 
 5 | ###NES/SNES
 6 | [![alt text](http://i.imgur.com/5fzLc4F.jpg)](http://i.imgur.com/OExTRlX.jpg)[![alt text](http://i.imgur.com/vFm82Yc.jpg)](http://i.imgur.com/v7FUWHM.jpg)
 7 | 
 8 | This board supports up to 4 separate consoles simultaneously. 
 9 | 
10 | 
11 | [![alt text](http://i.imgur.com/0mgr6o9.jpg)](http://i.imgur.com/zR6ZSec.jpg)
12 | 
13 | This board supports SNES multitap on 1 console.
14 | 
15 | ###NES/SNES Cables
16 | [![alt text](http://i.imgur.com/veWrtIu.jpg)](http://i.imgur.com/p0bdGMR.jpg)
17 | [![alt text](http://i.imgur.com/Sx84C0w.jpg)](http://i.imgur.com/s5Hz8Ch.jpg)
18 | [![alt text](http://i.imgur.com/pntr0qG.jpg)](http://i.imgur.com/byZXrEN.jpg)
19 | 
20 | Cables were built with Eurocable brand CAT5 which is foil+braided shielded with a thick jacket. Heatshrink was added for extra strain relief.
21 | 
22 | 
23 | ###NES Visualization
24 | [![alt text](http://i.imgur.com/B9WCjm5.jpg)](http://i.imgur.com/oQN17On.jpg)
25 | 
26 | ###N64
27 | [![alt text](http://i.imgur.com/LjJm9lz.jpg)](http://i.imgur.com/IqYb3Oq.jpg)
28 | 
29 | This prototype board supports basic TAS playback and some more advanced features.
30 | 
31 | 


--------------------------------------------------------------------------------
/HDL/TASLink/clock_delay.vhd:
--------------------------------------------------------------------------------
 1 | library IEEE;
 2 | use IEEE.STD_LOGIC_1164.ALL;
 3 | use IEEE.NUMERIC_STD.ALL;
 4 | 
 5 | entity clock_delay is
 6 |     Port ( signal_in : in  STD_LOGIC;
 7 |            signal_delayed : out  STD_LOGIC;
 8 |            CLK : in  STD_LOGIC);
 9 | end clock_delay;
10 | 
11 | architecture Behavioral of clock_delay is
12 |   signal prev_signal_in : std_logic := '0';
13 |   
14 |   signal timer_active : std_logic := '0';
15 |   signal timer : integer range 0 to 192 := 0;
16 |   
17 |   signal data : std_logic := '0';
18 | begin
19 | delay: process(clk)
20 |   begin
21 |     if (rising_edge(clk)) then
22 |       if (signal_in = '1') then
23 |         -- On rising edge
24 |         if (prev_signal_in = '0') then
25 |           -- Start the timer
26 |           timer <= 0;
27 |           timer_active <= '1';
28 |         -- Timer is finished. Write out a 1
29 |         elsif (timer_active = '1') then
30 |           if (timer = 192) then
31 |             data <= '1';
32 |             timer_active <= '0';
33 |           
34 |           -- Otherwise increment the timer
35 |           else
36 |             timer <= timer + 1;
37 |           end if;
38 |         end if;
39 |       
40 |       -- Immediately pass a 0 through and reset the timer
41 |       elsif (signal_in = '0') then
42 |         data <= '0';
43 |         timer_active <= '0';
44 |       end if;
45 |       
46 |       prev_signal_in <= signal_in;
47 |     end if;
48 |   end process;
49 | 
50 | signal_delayed <= data;
51 | 
52 | 
53 | end Behavioral;
54 | 
55 | 


--------------------------------------------------------------------------------
/scripts/emulator/SNES/lsnes_dump_latches.lua:
--------------------------------------------------------------------------------
 1 | dumpfile = nil;
 2 | 
 3 | pollcount = 0;
 4 | 
 5 | 
 6 | --mapping = [0, 2, 1, 3, 4, 6, 5, 7];   -- p1d0, p1d1, p2d0, p2d1
 7 | --mapping = {0, 1, 2, 3, 4, 5, 6, 7};  -- p1i1, p1i0, p2i1, p2i0
 8 | 
 9 | ----
10 | 
11 | start_dump = function(filename)
12 |     fh, err = io.open(filename .. ".latch.r16m", "wb");
13 |     if not fh then
14 |         error("Error opening output file: " .. err);
15 |     end
16 |     print(string.format('Dumping to %s.latch.r16m', filename));
17 |    
18 |     dumpfile = fh;
19 | 
20 |     pollcount = 0;
21 | end
22 | 
23 | stop_dump = function()
24 |     if (dumpfile) then
25 |         dumpfile:close();
26 |         dumpfile = nil;
27 |         print("Dumping halted")
28 |     else
29 |         print("Cannot stop: Dumping not started")
30 |     end
31 | end
32 | 
33 | on_latch = function()
34 |     if dumpfile then
35 |         pollcount = pollcount + 1
36 |         tframe = movie.get_frame(movie.find_frame(movie.currentframe()));
37 |         for i = 0, 7, 1 do
38 |             out = 0
39 |             for j = 0, 15, 1 do
40 |                 if tframe:get_button(1 + bit.rrotate(i, 2), i % 4, j) then
41 |                     out = bit.bor(out, bit.value(15 - j))
42 |                 end
43 |             end
44 |             dumpfile:write(string.char(bit.band(bit.rrotate(out, 8), 0xff), bit.band(out, 0xff)));
45 |         end
46 |     end
47 | end
48 | 
49 | on_paint = function()
50 |     if dumpfile then
51 |         gui.text(0, 0, pollcount, 0x00FF00, 0);
52 |     end
53 | end


--------------------------------------------------------------------------------
/HDL/N64/byte_receiver.vhd:
--------------------------------------------------------------------------------
 1 | library IEEE;
 2 | use IEEE.STD_LOGIC_1164.ALL;
 3 | use IEEE.NUMERIC_STD.ALL;
 4 | 
 5 | entity byte_receiver is
 6 |     Port ( new_bit : in  STD_LOGIC;
 7 |            bit_val : in  STD_LOGIC_VECTOR (1 downto 0);
 8 |            new_byte : out  STD_LOGIC;
 9 |            byte_val : out  STD_LOGIC_VECTOR (7 downto 0);
10 |            CLK : in  STD_LOGIC);
11 | end byte_receiver;
12 | 
13 | architecture Behavioral of byte_receiver is
14 |   type rx_modes is (idle_mode, receive_mode);
15 |   signal rx_mode : rx_modes := idle_mode;
16 | 
17 | 
18 |   signal rx_data : std_logic_vector(7 downto 0);
19 |   signal rx_timer : integer range 0 to 160 := 0;
20 |   signal bit_count : integer range 0 to 7 := 0;
21 | 
22 |   signal new_byte_temp : std_logic := '0';
23 | 
24 | begin
25 |   process (clk)
26 |   begin
27 |     if (rising_edge(clk)) then
28 |       new_byte_temp <= '0';
29 |       if (rx_mode = idle_mode) then
30 |         if (new_bit = '1' and (bit_val = "00" or bit_val = "01")) then
31 |           rx_data <= "0000000" & bit_val(0);
32 |           rx_timer <= 0;
33 |           rx_mode <= receive_mode;
34 |           bit_count <= 1;
35 |         end if;
36 |       else
37 |         if (new_bit = '1' and (bit_val = "00" or bit_val = "01")) then
38 |           rx_data <= rx_data(6 downto 0) & bit_val(0);
39 |           if (bit_count = 7) then
40 |             rx_mode <= idle_mode;
41 |             new_byte_temp <= '1';
42 |           else
43 |             bit_count <= bit_count + 1;
44 |             rx_timer <= 0;
45 |             rx_mode <= receive_mode;
46 |           end if;
47 |         else
48 |           if (rx_timer = 160) then
49 |             rx_mode <= idle_mode;
50 |           else
51 |             rx_timer <= rx_timer + 1;
52 |           end if;
53 |         end if;
54 |       end if;
55 |     end if;
56 |   end process;
57 | 
58 | new_byte <= new_byte_temp;
59 | byte_val <= rx_data;
60 | 
61 | end Behavioral;
62 | 
63 | 


--------------------------------------------------------------------------------
/HDL/n64_mitm/byte_receiver.vhd:
--------------------------------------------------------------------------------
 1 | library IEEE;
 2 | use IEEE.STD_LOGIC_1164.ALL;
 3 | use IEEE.NUMERIC_STD.ALL;
 4 | 
 5 | entity byte_receiver is
 6 |     Port ( new_bit : in  STD_LOGIC;
 7 |            bit_val : in  STD_LOGIC_VECTOR (1 downto 0);
 8 |            new_byte : out  STD_LOGIC;
 9 |            byte_val : out  STD_LOGIC_VECTOR (7 downto 0);
10 |            CLK : in  STD_LOGIC);
11 | end byte_receiver;
12 | 
13 | architecture Behavioral of byte_receiver is
14 |   type rx_modes is (idle_mode, receive_mode);
15 |   signal rx_mode : rx_modes := idle_mode;
16 | 
17 | 
18 |   signal rx_data : std_logic_vector(7 downto 0);
19 |   signal rx_timer : integer range 0 to 160 := 0;
20 |   signal bit_count : integer range 0 to 7 := 0;
21 | 
22 |   signal new_byte_temp : std_logic := '0';
23 | 
24 | begin
25 |   process (clk)
26 |   begin
27 |     if (rising_edge(clk)) then
28 |       new_byte_temp <= '0';
29 |       if (rx_mode = idle_mode) then
30 |         if (new_bit = '1' and (bit_val = "00" or bit_val = "01")) then
31 |           rx_data <= "0000000" & bit_val(0);
32 |           rx_timer <= 0;
33 |           rx_mode <= receive_mode;
34 |           bit_count <= 1;
35 |         end if;
36 |       else
37 |         if (new_bit = '1' and (bit_val = "00" or bit_val = "01")) then
38 |           rx_data <= rx_data(6 downto 0) & bit_val(0);
39 |           if (bit_count = 7) then
40 |             rx_mode <= idle_mode;
41 |             new_byte_temp <= '1';
42 |           else
43 |             bit_count <= bit_count + 1;
44 |             rx_timer <= 0;
45 |             rx_mode <= receive_mode;
46 |           end if;
47 |         else
48 |           if (rx_timer = 160) then
49 |             rx_mode <= idle_mode;
50 |           else
51 |             rx_timer <= rx_timer + 1;
52 |           end if;
53 |         end if;
54 |       end if;
55 |     end if;
56 |   end process;
57 | 
58 | new_byte <= new_byte_temp;
59 | byte_val <= rx_data;
60 | 
61 | end Behavioral;
62 | 
63 | 


--------------------------------------------------------------------------------
/scripts/streaming/stream_NES.py:
--------------------------------------------------------------------------------
 1 | import os
 2 | import serial
 3 | import sys
 4 | import time
 5 | 
 6 | baud = 2000000
 7 | 
 8 | prebuffer = 60
 9 | framecount1 = 0
10 | 
11 | if len(sys.argv) < 3:
12 |   sys.stderr.write('Usage: ' + sys.argv[0] + ' <interface> <replayfile>\n\n')
13 |   sys.exit(0)
14 | 
15 | if not os.path.exists(sys.argv[2]):
16 |   sys.stderr.write('Error: "' + sys.argv[2] + '" not found\n')
17 |   sys.exit(1)
18 | 
19 | # open the file 
20 | fh = open(sys.argv[2], 'rb')
21 | 
22 | # load all data and store in a buffer
23 | buffer1 = []
24 | 
25 | count = 0
26 | working_string = ""
27 | while True:
28 |   if (count == 0):
29 |     working_string = "A"
30 |   
31 |   b = fh.read(1)
32 | 
33 |   if (len(b) == 0):
34 |     break
35 |   
36 |   b = chr(~ord(b) & 0xFF)
37 |   working_string = working_string + b
38 |   
39 |   count = count + 1
40 |   if (count == 2):
41 |     working_string = working_string[0:5] 
42 |     buffer1.append(working_string)
43 |     count = 0
44 |  
45 | fh.close()
46 | 
47 |  
48 | ser = serial.Serial(sys.argv[1], baud)
49 | 
50 | ser.write("sc1" + chr(0xD0))
51 | ser.write("sc2" + chr(0x00))
52 | ser.write("sc3" + chr(0xD0))
53 | ser.write("sc4" + chr(0x00))
54 | ser.write("sc5" + chr(0x00))
55 | ser.write("sc6" + chr(0x00))
56 | ser.write("sc7" + chr(0x00))
57 | ser.write("sc8" + chr(0x00))
58 | 
59 | ser.write("sp1" + chr(0x80))
60 | ser.write("sp2" + chr(0x80))
61 | ser.write("sp3" + chr(0x00))
62 | ser.write("sp4" + chr(0x00))
63 | 
64 | ser.write("se1" + chr(0x80) + chr(0x05))
65 | ser.write("se2" + chr(0x00) + chr(0x00))
66 | ser.write("se3" + chr(0x00) + chr(0x00))
67 | ser.write("se4" + chr(0x00) + chr(0x00))
68 | 
69 | ser.write("sA" + chr(0x05))
70 | 
71 | ser.write("R")
72 | 
73 |   
74 | def send_frames1(amount):
75 |   global framecount1
76 |   ser.write(''.join(buffer1[framecount1:(framecount1+amount)]));
77 |   framecount1 = framecount1 + amount
78 | 
79 | 
80 | send_frames1(prebuffer)
81 | 
82 | while (1):
83 |   while (ser.inWaiting() == 0):
84 |     pass
85 |     
86 |   c = ser.read()
87 | 
88 |   if (c == 'f'):
89 |     send_frames1(1)
90 |   else:
91 |     print ord(c)
92 | 


--------------------------------------------------------------------------------
/HDL/N64/fifo.vhd:
--------------------------------------------------------------------------------
 1 | library IEEE;
 2 | use IEEE.STD_LOGIC_1164.ALL;
 3 | use IEEE.NUMERIC_STD.ALL;
 4 | 
 5 | entity fifo is
 6 |     Generic (
 7 |         constant FIFO_DEPTH : positive := 64
 8 |      );
 9 |     Port ( data_in : in  STD_LOGIC_VECTOR (31 downto 0);
10 |            write_en : in  STD_LOGIC;
11 |            data_out : out  STD_LOGIC_VECTOR (31 downto 0);
12 |            read_en : in  STD_LOGIC;
13 |            clk : in  STD_LOGIC;
14 |            empty : out  STD_LOGIC;
15 |            full : out  STD_LOGIC;
16 |            clear : in  STD_LOGIC);
17 | end fifo;
18 | 
19 | architecture Behavioral of fifo is
20 |   type data_buffer is array(0 to FIFO_DEPTH-1) of std_logic_vector(31 downto 0);
21 |   signal queue : data_buffer;
22 |     
23 |   signal buffer_tail : integer range 0 to FIFO_DEPTH-1 := 0;
24 |   signal buffer_head : integer range 0 to FIFO_DEPTH-1 := 0;
25 |   
26 |   signal address_to_use : integer range 0 to FIFO_DEPTH-1;
27 | begin
28 | 
29 |   fifo_proc: process(clk)
30 |   begin
31 |     if (rising_edge(clk)) then
32 |       if (clear = '1') then
33 |         buffer_head <= 0;
34 |         buffer_tail <= 0;
35 |       else 
36 |         if (write_en = '1') then
37 |           -- Make sure there is room for this data
38 |           if ((buffer_head = (FIFO_DEPTH - 1) and buffer_tail /= 0) or (buffer_head /= (FIFO_DEPTH - 1) and (buffer_head + 1) /= buffer_tail)) then
39 |             queue(buffer_head) <= data_in;
40 |             
41 |             -- move
42 |             if (buffer_head = (FIFO_DEPTH - 1)) then
43 |               buffer_head <= 0;
44 |             else
45 |               buffer_head <= buffer_head + 1;
46 |             end if;         
47 |           end if;  
48 |         end if;
49 |         
50 |         if (read_en = '1') then
51 |           -- move tail pointer if possible
52 |           if (buffer_tail /= buffer_head) then
53 |             if (buffer_tail = (FIFO_DEPTH - 1)) then
54 |               buffer_tail <= 0;
55 |             else
56 |               buffer_tail <= buffer_tail + 1;
57 |             end if;
58 |           end if;  
59 |         end if;
60 |       end if;
61 |     end if;
62 |   end process;
63 |   
64 |   address_to_use <= buffer_tail when buffer_head /= buffer_tail else
65 |                     (FIFO_DEPTH - 1) when buffer_tail = 0 else
66 |                     buffer_tail - 1;
67 | 
68 |   data_out <= queue(address_to_use);
69 | 
70 |   full <= '1' when (buffer_head = (FIFO_DEPTH - 1) and buffer_tail = 0) or (buffer_head /= (FIFO_DEPTH - 1) and (buffer_head + 1) = buffer_tail) else
71 |           '0';
72 |   empty <= '1' when buffer_head = buffer_tail else
73 |            '0';
74 | 
75 | end Behavioral;
76 | 
77 | 


--------------------------------------------------------------------------------
/HDL/TASLink/fifo.vhd:
--------------------------------------------------------------------------------
 1 | library IEEE;
 2 | use IEEE.STD_LOGIC_1164.ALL;
 3 | use IEEE.NUMERIC_STD.ALL;
 4 | 
 5 | entity fifo is
 6 |     Generic (
 7 |         constant FIFO_DEPTH : positive := 64
 8 |      );
 9 |     Port ( data_in : in  STD_LOGIC_VECTOR (31 downto 0);
10 |            write_en : in  STD_LOGIC;
11 |            data_out : out  STD_LOGIC_VECTOR (31 downto 0);
12 |            read_en : in  STD_LOGIC;
13 |            clk : in  STD_LOGIC;
14 |            empty : out  STD_LOGIC;
15 |            full : out  STD_LOGIC;
16 |            clear : in  STD_LOGIC);
17 | end fifo;
18 | 
19 | architecture Behavioral of fifo is
20 |   type data_buffer is array(0 to FIFO_DEPTH-1) of std_logic_vector(31 downto 0);
21 |   signal queue : data_buffer;
22 |     
23 |   signal buffer_tail : integer range 0 to FIFO_DEPTH-1 := 0;
24 |   signal buffer_head : integer range 0 to FIFO_DEPTH-1 := 0;
25 |   
26 |   signal address_to_use : integer range 0 to FIFO_DEPTH-1;
27 | begin
28 | 
29 |   fifo_proc: process(clk)
30 |   begin
31 |     if (rising_edge(clk)) then
32 |       if (clear = '1') then
33 |         buffer_head <= 0;
34 |         buffer_tail <= 0;
35 |       else 
36 |         if (write_en = '1') then
37 |           -- Make sure there is room for this data
38 |           if ((buffer_head = (FIFO_DEPTH - 1) and buffer_tail /= 0) or (buffer_head /= (FIFO_DEPTH - 1) and (buffer_head + 1) /= buffer_tail)) then
39 |             queue(buffer_head) <= data_in;
40 |             
41 |             -- move
42 |             if (buffer_head = (FIFO_DEPTH - 1)) then
43 |               buffer_head <= 0;
44 |             else
45 |               buffer_head <= buffer_head + 1;
46 |             end if;         
47 |           end if;  
48 |         end if;
49 |         
50 |         if (read_en = '1') then
51 |           -- move tail pointer if possible
52 |           if (buffer_tail /= buffer_head) then
53 |             if (buffer_tail = (FIFO_DEPTH - 1)) then
54 |               buffer_tail <= 0;
55 |             else
56 |               buffer_tail <= buffer_tail + 1;
57 |             end if;
58 |           end if;  
59 |         end if;
60 |       end if;
61 |     end if;
62 |   end process;
63 |   
64 |   address_to_use <= buffer_tail when buffer_head /= buffer_tail else
65 |                     (FIFO_DEPTH - 1) when buffer_tail = 0 else
66 |                     buffer_tail - 1;
67 | 
68 |   data_out <= queue(address_to_use);
69 | 
70 |   full <= '1' when (buffer_head = (FIFO_DEPTH - 1) and buffer_tail = 0) or (buffer_head /= (FIFO_DEPTH - 1) and (buffer_head + 1) = buffer_tail) else
71 |           '0';
72 |   empty <= '1' when buffer_head = buffer_tail else
73 |            '0';
74 | 
75 | end Behavioral;
76 | 
77 | 


--------------------------------------------------------------------------------
/HDL/NES_Mini/NES_Mini/fifo.vhd:
--------------------------------------------------------------------------------
 1 | library IEEE;
 2 | use IEEE.STD_LOGIC_1164.ALL;
 3 | use IEEE.NUMERIC_STD.ALL;
 4 | 
 5 | entity fifo is
 6 |     Generic (
 7 |         constant FIFO_DEPTH : positive := 150
 8 |      );
 9 |     Port ( data_in : in  STD_LOGIC_VECTOR (15 downto 0);
10 |            write_en : in  STD_LOGIC;
11 |            data_out : out  STD_LOGIC_VECTOR (15 downto 0);
12 |            read_en : in  STD_LOGIC;
13 |            clk : in  STD_LOGIC;
14 |            empty : out  STD_LOGIC;
15 |            full : out  STD_LOGIC;
16 |            clear : in  STD_LOGIC);
17 | end fifo;
18 | 
19 | architecture Behavioral of fifo is
20 |   type data_buffer is array(0 to FIFO_DEPTH-1) of std_logic_vector(15 downto 0);
21 |   signal queue : data_buffer;
22 |     
23 |   signal buffer_tail : integer range 0 to FIFO_DEPTH-1 := 0;
24 |   signal buffer_head : integer range 0 to FIFO_DEPTH-1 := 0;
25 |   
26 |   signal address_to_use : integer range 0 to FIFO_DEPTH-1;
27 | begin
28 | 
29 |   fifo_proc: process(clk)
30 |   begin
31 |     if (rising_edge(clk)) then
32 |       if (clear = '1') then
33 |         buffer_head <= 0;
34 |         buffer_tail <= 0;
35 |       else 
36 |         if (write_en = '1') then
37 |           -- Make sure there is room for this data
38 |           if ((buffer_head = (FIFO_DEPTH - 1) and buffer_tail /= 0) or (buffer_head /= (FIFO_DEPTH - 1) and (buffer_head + 1) /= buffer_tail)) then
39 |             queue(buffer_head) <= data_in;
40 |             
41 |             -- move
42 |             if (buffer_head = (FIFO_DEPTH - 1)) then
43 |               buffer_head <= 0;
44 |             else
45 |               buffer_head <= buffer_head + 1;
46 |             end if;         
47 |           end if;  
48 |         end if;
49 |         
50 |         if (read_en = '1') then
51 |           -- move tail pointer if possible
52 |           if (buffer_tail /= buffer_head) then
53 |             if (buffer_tail = (FIFO_DEPTH - 1)) then
54 |               buffer_tail <= 0;
55 |             else
56 |               buffer_tail <= buffer_tail + 1;
57 |             end if;
58 |           end if;  
59 |         end if;
60 |       end if;
61 |     end if;
62 |   end process;
63 |   
64 |   address_to_use <= buffer_tail when buffer_head /= buffer_tail else
65 |                     (FIFO_DEPTH - 1) when buffer_tail = 0 else
66 |                     buffer_tail - 1;
67 | 
68 |   data_out <= queue(address_to_use);
69 | 
70 |   full <= '1' when (buffer_head = (FIFO_DEPTH - 1) and buffer_tail = 0) or (buffer_head /= (FIFO_DEPTH - 1) and (buffer_head + 1) = buffer_tail) else
71 |           '0';
72 |   empty <= '1' when buffer_head = buffer_tail else
73 |            '0';
74 | 
75 | end Behavioral;
76 | 
77 | 


--------------------------------------------------------------------------------
/HDL/TASLink/controller.vhd:
--------------------------------------------------------------------------------
 1 | library IEEE;
 2 | use IEEE.STD_LOGIC_1164.ALL;
 3 | 
 4 | entity controller is
 5 |     Port ( console_clock : in  STD_LOGIC;
 6 |            console_latch : in  STD_LOGIC;
 7 |            console_io : in  STD_LOGIC;
 8 |            console_d0 : out  STD_LOGIC;
 9 |            console_d1 : out  STD_LOGIC;
10 |            console_d0_oe : out  STD_LOGIC;
11 |            console_d1_oe : out  STD_LOGIC;
12 |            data : in  STD_LOGIC_VECTOR (31 downto 0);
13 |            overread_value : in  STD_LOGIC;
14 |            size : in  STD_LOGIC_VECTOR (1 downto 0);
15 |            connected : in  STD_LOGIC;
16 |            clk : STD_LOGIC);
17 | end controller;
18 | 
19 | architecture Behavioral of controller is
20 |   component shift_register is
21 |     Port ( latch : in  STD_LOGIC;
22 |            clock : in  STD_LOGIC;
23 |            din : in  STD_LOGIC_VECTOR (7 downto 0);
24 |            dout : out  STD_LOGIC;
25 |            sin : in STD_LOGIC;
26 |            clk : in std_logic);
27 |   end component;
28 |   
29 |   signal sr1_dout : std_logic;
30 |   signal sr1_sin : std_logic;
31 |   
32 |   signal sr2_dout : std_logic;
33 |   signal sr2_sin : std_logic;
34 |   
35 |   signal sr3_dout : std_logic;
36 |   signal sr3_sin : std_logic;
37 |   
38 |   signal sr4_dout : std_logic;
39 |   signal sr4_sin : std_logic;
40 | 
41 | begin
42 |   sr1: shift_register port map (latch => console_latch,
43 |                                 clock => console_clock,
44 |                                 din => data(7 downto 0),
45 |                                 dout => sr1_dout,
46 |                                 sin => sr1_sin,
47 |                                 clk => clk);
48 |                                 
49 |   sr2: shift_register port map (latch => console_latch,
50 |                                 clock => console_clock,
51 |                                 din => data(15 downto 8),
52 |                                 dout => sr2_dout,
53 |                                 sin => sr2_sin,
54 |                                 clk => clk);
55 |                                 
56 |   sr3: shift_register port map (latch => console_latch,
57 |                                 clock => console_clock,
58 |                                 din => data(23 downto 16),
59 |                                 dout => sr3_dout,
60 |                                 sin => sr3_sin,
61 |                                 clk => clk);
62 |                                 
63 |   sr4: shift_register port map (latch => console_latch,
64 |                                 clock => console_clock,
65 |                                 din => data(31 downto 24),
66 |                                 dout => sr4_dout,
67 |                                 sin => sr4_sin,
68 |                                 clk => clk);
69 |   
70 |   sr1_sin <= overread_value when size = "00" else
71 |              sr2_dout;
72 |   
73 |   sr2_sin <= overread_value when (size = "00" or size = "01") else
74 |              sr3_dout;
75 |              
76 |   sr3_sin <= overread_value when (size = "00" or size = "01" or size = "10") else
77 |              sr4_dout;
78 | 
79 |   sr4_sin <= overread_value;
80 |   
81 |   console_d0 <= sr1_dout;
82 |   console_d0_oe <= not connected;
83 |   
84 |   console_d1 <= '1';
85 |   console_d1_oe <= '1'; -- disabled
86 | end Behavioral;
87 | 
88 | 


--------------------------------------------------------------------------------
/HDL/NES_Mini/NES_Mini/main.ucf:
--------------------------------------------------------------------------------
 1 | ## Prohibit the automatic placement of pins that are connected to VCC or GND for configuration.
 2 | CONFIG PROHIBIT=P144;
 3 | CONFIG PROHIBIT=P69;
 4 | CONFIG PROHIBIT=P60;
 5 | 
 6 | NET CLK                       LOC="P94"  | IOSTANDARD=LVTTL | PERIOD=31.25ns;               # CLK
 7 | NET RX                        LOC="P101" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # RX
 8 | NET TX_real                   LOC="P105" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST | PULLUP; # TX
 9 | 
10 | NET console_d0_oe(2)          LOC="P61"  | IOSTANDARD=LVTTL;                                # A4
11 | NET console_d0_out(2)         LOC="P66"  | IOSTANDARD=LVTTL;                                # A5
12 | NET console_d1_oe(2)          LOC="P67"  | IOSTANDARD=LVTTL;                                # A6
13 | NET console_d1_out(2)         LOC="P75"  | IOSTANDARD=LVTTL;                                # A7
14 | NET console_clock_oe(2)       LOC="P79"  | IOSTANDARD=LVTTL;                                # A8
15 | NET console_clock_out(2)      LOC="P81"  | IOSTANDARD=LVTTL;                                # A9
16 | NET console_d0_in(2)          LOC="P83"  | IOSTANDARD=LVTTL;                                # A10
17 | NET console_clock_in(2)       LOC="P85"  | IOSTANDARD=LVTTL;                                # A11
18 | NET debug(4)                  LOC="P88"  | IOSTANDARD=LVTTL;                                # A12
19 | NET debug(5)                  LOC="P93"  | IOSTANDARD=LVTTL;                                # A13
20 | NET debug(6)                  LOC="P98"  | IOSTANDARD=LVTTL;                                # A14
21 | NET debug(7)                  LOC="P100" | IOSTANDARD=LVTTL;                                # A15
22 | 
23 | 
24 | NET visualization_clock(2)    LOC="P99"  | IOSTANDARD=LVTTL;                                # B0
25 | NET visualization_latch(2)    LOC="P97"  | IOSTANDARD=LVTTL;                                # B1
26 | NET visualization_d1(2)       LOC="P92"  | IOSTANDARD=LVTTL;                                # B2
27 | NET visualization_d0(2)       LOC="P87"  | IOSTANDARD=LVTTL;                                # B3
28 | 
29 | 
30 | NET visualization_d0(1)       LOC="P114" | IOSTANDARD=LVTTL;                                # C0
31 | NET visualization_d1(1)       LOC="P115" | IOSTANDARD=LVTTL;                                # C1
32 | NET visualization_latch(1)    LOC="P116" | IOSTANDARD=LVTTL;                                # C2
33 | NET visualization_clock(1)    LOC="P117" | IOSTANDARD=LVTTL;                                # C3
34 | NET console_d0_in(1)          LOC="P118" | IOSTANDARD=LVTTL;                                # C4
35 | NET console_clock_in(1)       LOC="P119" | IOSTANDARD=LVTTL;                                # C5
36 | NET console_d0_oe(1)          LOC="P120" | IOSTANDARD=LVTTL;                                # C6
37 | NET console_d0_out(1)         LOC="P121" | IOSTANDARD=LVTTL;                                # C7
38 | NET console_d1_oe(1)          LOC="P123" | IOSTANDARD=LVTTL;                                # C8
39 | NET console_d1_out(1)         LOC="P124" | IOSTANDARD=LVTTL;                                # C9
40 | NET console_clock_oe(1)       LOC="P126" | IOSTANDARD=LVTTL;                                # C10
41 | NET console_clock_out(1)      LOC="P127" | IOSTANDARD=LVTTL;                                # C11
42 | NET debug(3)                  LOC="P131" | IOSTANDARD=LVTTL;                                # C12
43 | NET debug(2)                  LOC="P132" | IOSTANDARD=LVTTL;                                # C13
44 | NET debug(1)                  LOC="P133" | IOSTANDARD=LVTTL;                                # C14
45 | NET debug(0)                  LOC="P134" | IOSTANDARD=LVTTL;                                # C15
46 | 
47 | 


--------------------------------------------------------------------------------
/HDL/N64/bit_transmitter.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity bit_transmitter is
  7 |     Port ( bit_value : in  STD_LOGIC_VECTOR (1 downto 0);
  8 |            new_bit : in  STD_LOGIC;
  9 |            new_bit_ack : out  STD_LOGIC;
 10 |            transmitting : out  STD_LOGIC;
 11 |            data_out : out STD_LOGIC;
 12 |            CLK : in  STD_LOGIC);
 13 | end bit_transmitter;
 14 | 
 15 | architecture Behavioral of bit_transmitter is
 16 |   constant one_us_exact : integer := 32;
 17 |   constant two_us_exact : integer := 64;
 18 |   constant three_us_exact : integer := 96;
 19 | 
 20 |   signal data_signal : std_logic := '1';
 21 | 
 22 |   signal transmitting_signal : std_logic := '0';
 23 |   signal new_bit_ack_signal : std_logic := '0';
 24 |   
 25 |   signal bit_in_progress : std_logic_vector(1 downto 0) := "00";
 26 |   
 27 |   signal bit_timer : integer range 0 to 104 := 0;
 28 |   
 29 |   type modes is (idle_mode, high_mode, low_mode);
 30 |   signal tx_mode : modes := idle_mode;
 31 | begin
 32 | 
 33 | process (clk)
 34 | begin
 35 |   if (rising_edge(clk)) then
 36 |     if (transmitting_signal = '1') then
 37 |       if (tx_mode = low_mode) then
 38 |         if ((bit_in_progress = "01" and bit_timer = one_us_exact) or (bit_in_progress = "00" and bit_timer = three_us_exact)) then
 39 |           -- Switch to high mode 
 40 |           data_signal <= '1';
 41 |           bit_timer <= 0;
 42 |           tx_mode <= high_mode;
 43 |         elsif ((bit_in_progress = "11" and bit_timer = one_us_exact) or (bit_in_progress = "10" and bit_timer = two_us_exact)) then
 44 |           -- We're done transmitting this bit
 45 |           -- Check if there is a new bit waiting
 46 |           if (new_bit_ack_signal = '0' and new_bit = '1') then
 47 |             transmitting_signal <= '1';
 48 |             new_bit_ack_signal <= '1';
 49 |             
 50 |             bit_in_progress <= bit_value;
 51 |             data_signal <= '0';
 52 |             bit_timer <= 0;
 53 |             
 54 |             tx_mode <= low_mode;
 55 |           else
 56 |             data_signal <= '1';
 57 |             tx_mode <= idle_mode;
 58 |             transmitting_signal <= '0';
 59 |           end if;
 60 |         else
 61 |           bit_timer <= bit_timer + 1;
 62 |         end if;
 63 |       elsif (tx_mode = high_mode) then
 64 |         if ((bit_in_progress = "01" and bit_timer = three_us_exact) or (bit_in_progress = "00" and bit_timer = one_us_exact)) then  
 65 |           -- We're done transmitting this bit
 66 |           -- Check if there is a new bit waiting
 67 |           if (new_bit_ack_signal = '0' and new_bit = '1') then
 68 |             transmitting_signal <= '1';
 69 |             new_bit_ack_signal <= '1';
 70 |             
 71 |             bit_in_progress <= bit_value;
 72 |             data_signal <= '0';
 73 |             bit_timer <= 0;
 74 |             
 75 |             tx_mode <= low_mode;
 76 |           else
 77 |             data_signal <= '1';
 78 |             tx_mode <= idle_mode;
 79 |             transmitting_signal <= '0';
 80 |           end if;
 81 |         else
 82 |           bit_timer <= bit_timer + 1;
 83 |         end if;
 84 |       else
 85 |         -- We should never end up here
 86 |         transmitting_signal <= '0';
 87 |       end if;
 88 |     else
 89 |       if (new_bit_ack_signal = '0' and new_bit = '1') then
 90 |         transmitting_signal <= '1';
 91 |         new_bit_ack_signal <= '1';
 92 |         
 93 |         bit_in_progress <= bit_value;
 94 |         data_signal <= '0';
 95 |         bit_timer <= 0;
 96 |         
 97 |         tx_mode <= low_mode;
 98 |       end if;
 99 |     end if;
100 |     
101 |     -- Lower ack when new bit goes low
102 |     if (new_bit_ack_signal = '1' and new_bit = '0') then
103 |       new_bit_ack_signal <= '0';
104 |     end if;
105 |   end if;
106 | end process;
107 | 
108 | transmitting <= transmitting_signal;
109 | data_out <= data_signal;
110 | new_bit_ack <= new_bit_ack_signal;
111 | 
112 | end Behavioral;
113 | 
114 | 


--------------------------------------------------------------------------------
/HDL/n64_mitm/bit_transmitter.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity bit_transmitter is
  7 |     Port ( bit_value : in  STD_LOGIC_VECTOR (1 downto 0);
  8 |            new_bit : in  STD_LOGIC;
  9 |            new_bit_ack : out  STD_LOGIC;
 10 |            transmitting : out  STD_LOGIC;
 11 |            data_out : out STD_LOGIC;
 12 |            CLK : in  STD_LOGIC);
 13 | end bit_transmitter;
 14 | 
 15 | architecture Behavioral of bit_transmitter is
 16 |   constant one_us_exact : integer := 32;
 17 |   constant two_us_exact : integer := 64;
 18 |   constant three_us_exact : integer := 96;
 19 | 
 20 |   signal data_signal : std_logic := '1';
 21 | 
 22 |   signal transmitting_signal : std_logic := '0';
 23 |   signal new_bit_ack_signal : std_logic := '0';
 24 |   
 25 |   signal bit_in_progress : std_logic_vector(1 downto 0) := "00";
 26 |   
 27 |   signal bit_timer : integer range 0 to 104 := 0;
 28 |   
 29 |   type modes is (idle_mode, high_mode, low_mode);
 30 |   signal tx_mode : modes := idle_mode;
 31 | begin
 32 | 
 33 | process (clk)
 34 | begin
 35 |   if (rising_edge(clk)) then
 36 |     if (transmitting_signal = '1') then
 37 |       if (tx_mode = low_mode) then
 38 |         if ((bit_in_progress = "01" and bit_timer = one_us_exact) or (bit_in_progress = "00" and bit_timer = three_us_exact)) then
 39 |           -- Switch to high mode 
 40 |           data_signal <= '1';
 41 |           bit_timer <= 0;
 42 |           tx_mode <= high_mode;
 43 |         elsif ((bit_in_progress = "11" and bit_timer = one_us_exact) or (bit_in_progress = "10" and bit_timer = two_us_exact)) then
 44 |           -- We're done transmitting this bit
 45 |           -- Check if there is a new bit waiting
 46 |           if (new_bit_ack_signal = '0' and new_bit = '1') then
 47 |             transmitting_signal <= '1';
 48 |             new_bit_ack_signal <= '1';
 49 |             
 50 |             bit_in_progress <= bit_value;
 51 |             data_signal <= '0';
 52 |             bit_timer <= 0;
 53 |             
 54 |             tx_mode <= low_mode;
 55 |           else
 56 |             data_signal <= '1';
 57 |             tx_mode <= idle_mode;
 58 |             transmitting_signal <= '0';
 59 |           end if;
 60 |         else
 61 |           bit_timer <= bit_timer + 1;
 62 |         end if;
 63 |       elsif (tx_mode = high_mode) then
 64 |         if ((bit_in_progress = "01" and bit_timer = three_us_exact) or (bit_in_progress = "00" and bit_timer = one_us_exact)) then  
 65 |           -- We're done transmitting this bit
 66 |           -- Check if there is a new bit waiting
 67 |           if (new_bit_ack_signal = '0' and new_bit = '1') then
 68 |             transmitting_signal <= '1';
 69 |             new_bit_ack_signal <= '1';
 70 |             
 71 |             bit_in_progress <= bit_value;
 72 |             data_signal <= '0';
 73 |             bit_timer <= 0;
 74 |             
 75 |             tx_mode <= low_mode;
 76 |           else
 77 |             data_signal <= '1';
 78 |             tx_mode <= idle_mode;
 79 |             transmitting_signal <= '0';
 80 |           end if;
 81 |         else
 82 |           bit_timer <= bit_timer + 1;
 83 |         end if;
 84 |       else
 85 |         -- We should never end up here
 86 |         transmitting_signal <= '0';
 87 |       end if;
 88 |     else
 89 |       if (new_bit_ack_signal = '0' and new_bit = '1') then
 90 |         transmitting_signal <= '1';
 91 |         new_bit_ack_signal <= '1';
 92 |         
 93 |         bit_in_progress <= bit_value;
 94 |         data_signal <= '0';
 95 |         bit_timer <= 0;
 96 |         
 97 |         tx_mode <= low_mode;
 98 |       end if;
 99 |     end if;
100 |     
101 |     -- Lower ack when new bit goes low
102 |     if (new_bit_ack_signal = '1' and new_bit = '0') then
103 |       new_bit_ack_signal <= '0';
104 |     end if;
105 |   end if;
106 | end process;
107 | 
108 | transmitting <= transmitting_signal;
109 | data_out <= data_signal;
110 | new_bit_ack <= new_bit_ack_signal;
111 | 
112 | end Behavioral;
113 | 
114 | 


--------------------------------------------------------------------------------
/HDL/N64/byte_transmitter.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity byte_transmitter is
  7 |     Port ( data_signal_out : out  STD_LOGIC;
  8 |            data_to_send : in STD_LOGIC_VECTOR(7 downto 0);
  9 |            need_stop_bit : in STD_LOGIC;
 10 |            stop_bit : in STD_LOGIC;
 11 |            tx_write : in  STD_LOGIC;
 12 |            tx_write_ack : out STD_LOGIC;
 13 |            tx_busy : out STD_LOGIC;
 14 |            CLK : in  STD_LOGIC);
 15 | end byte_transmitter;
 16 | 
 17 | architecture Behavioral of byte_transmitter is
 18 |   component bit_transmitter is
 19 |     Port ( bit_value : in  STD_LOGIC_VECTOR (1 downto 0);
 20 |            new_bit : in  STD_LOGIC;
 21 |            new_bit_ack : out  STD_LOGIC;
 22 |            transmitting : out  STD_LOGIC;
 23 |            data_out : out STD_LOGIC;
 24 |            CLK : in  STD_LOGIC);
 25 |   end component;
 26 | 
 27 |   signal latched_data : std_logic_vector(7 downto 0) := (others => '0');
 28 |   signal latched_need_stop_bit : std_logic := '0';
 29 |   signal latched_stop_bit : std_logic := '0';
 30 |   
 31 |   signal bit_id_in_progress : integer range 0 to 8 := 0;
 32 | 
 33 |   signal data_signal : std_logic := '1';
 34 | 
 35 |   signal tx_write_ack_signal : std_logic := '0';
 36 |   
 37 |   signal new_bit_value : std_logic_vector(1 downto 0) := "00";
 38 |   signal new_bit_signal : std_logic := '0';
 39 |   signal new_bit_ack_signal : std_logic;
 40 |   signal bit_transmitting_signal : std_logic;
 41 |   
 42 |   signal byte_transmitting_signal : std_logic;
 43 | begin
 44 |   bit_tx: bit_transmitter port map ( bit_value => new_bit_value,
 45 |                                      new_bit => new_bit_signal,
 46 |                                      new_bit_ack => new_bit_ack_signal,
 47 |                                      transmitting => bit_transmitting_signal,
 48 |                                      data_out => data_signal,
 49 |                                      CLK => CLK);
 50 | 
 51 | process (clk)
 52 | begin
 53 |   if (rising_edge(clk)) then
 54 |     if (byte_transmitting_signal = '1') then
 55 |       if (new_bit_ack_signal = '1' and new_bit_signal = '1') then
 56 |         new_bit_signal <= '0';
 57 |         
 58 |         -- If we're out of bits, go to idle
 59 |         if (bit_id_in_progress = 8 or (bit_id_in_progress = 7 and latched_need_stop_bit = '0')) then
 60 |           byte_transmitting_signal <= '0';
 61 |         end if;
 62 |       elsif (new_bit_ack_signal = '0' and new_bit_signal = '0') then
 63 |         -- Go to the next bit
 64 |         if (bit_id_in_progress = 7) then
 65 |           if (latched_need_stop_bit = '1') then
 66 |             new_bit_value <= "1" & latched_stop_bit;
 67 |             new_bit_signal <= '1';
 68 |             bit_id_in_progress <= bit_id_in_progress + 1;
 69 |           else
 70 |             -- We shouldn't end up here. This should have been dealt with earlier
 71 |             byte_transmitting_signal <= '0';
 72 |           end if;
 73 |         else
 74 |           new_bit_value <= "0" & latched_data(7 - (bit_id_in_progress + 1));
 75 |           new_bit_signal <= '1';
 76 |           bit_id_in_progress <= bit_id_in_progress + 1;
 77 |         end if;
 78 |       end if;
 79 |       
 80 |     else
 81 |       if (tx_write_ack_signal = '0' and tx_write = '1' and new_bit_ack_signal = '0') then
 82 |         byte_transmitting_signal <= '1';
 83 |         tx_write_ack_signal <= '1';
 84 |         
 85 |         -- Latch the data
 86 |         latched_data <= data_to_send;
 87 |         latched_need_stop_bit <= need_stop_bit;
 88 |         latched_stop_bit <= stop_bit;
 89 |         
 90 |         -- Write out the first bit
 91 |         new_bit_value <= "0" & data_to_send(7);
 92 |         new_bit_signal <= '1';
 93 |         bit_id_in_progress <= 0;
 94 |         
 95 |         
 96 |       end if;
 97 |     end if;
 98 |   
 99 |     -- Lower ack when new bit goes low
100 |     if (tx_write_ack_signal = '1' and tx_write = '0') then
101 |       tx_write_ack_signal <= '0';
102 |     end if;
103 | 
104 |   end if;
105 | end process;
106 |   
107 | data_signal_out <= data_signal;
108 | tx_busy <= bit_transmitting_signal;
109 | tx_write_ack <= tx_write_ack_signal;
110 | 
111 | end Behavioral;
112 | 
113 | 


--------------------------------------------------------------------------------
/HDL/n64_mitm/byte_transmitter.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity byte_transmitter is
  7 |     Port ( data_signal_out : out  STD_LOGIC;
  8 |            data_to_send : in STD_LOGIC_VECTOR(7 downto 0);
  9 |            need_stop_bit : in STD_LOGIC;
 10 |            stop_bit : in STD_LOGIC;
 11 |            tx_write : in  STD_LOGIC;
 12 |            tx_write_ack : out STD_LOGIC;
 13 |            tx_busy : out STD_LOGIC;
 14 |            CLK : in  STD_LOGIC);
 15 | end byte_transmitter;
 16 | 
 17 | architecture Behavioral of byte_transmitter is
 18 |   component bit_transmitter is
 19 |     Port ( bit_value : in  STD_LOGIC_VECTOR (1 downto 0);
 20 |            new_bit : in  STD_LOGIC;
 21 |            new_bit_ack : out  STD_LOGIC;
 22 |            transmitting : out  STD_LOGIC;
 23 |            data_out : out STD_LOGIC;
 24 |            CLK : in  STD_LOGIC);
 25 |   end component;
 26 | 
 27 |   signal latched_data : std_logic_vector(7 downto 0) := (others => '0');
 28 |   signal latched_need_stop_bit : std_logic := '0';
 29 |   signal latched_stop_bit : std_logic := '0';
 30 |   
 31 |   signal bit_id_in_progress : integer range 0 to 8 := 0;
 32 | 
 33 |   signal data_signal : std_logic := '1';
 34 | 
 35 |   signal tx_write_ack_signal : std_logic := '0';
 36 |   
 37 |   signal new_bit_value : std_logic_vector(1 downto 0) := "00";
 38 |   signal new_bit_signal : std_logic := '0';
 39 |   signal new_bit_ack_signal : std_logic;
 40 |   signal bit_transmitting_signal : std_logic;
 41 |   
 42 |   signal byte_transmitting_signal : std_logic;
 43 | begin
 44 |   bit_tx: bit_transmitter port map ( bit_value => new_bit_value,
 45 |                                      new_bit => new_bit_signal,
 46 |                                      new_bit_ack => new_bit_ack_signal,
 47 |                                      transmitting => bit_transmitting_signal,
 48 |                                      data_out => data_signal,
 49 |                                      CLK => CLK);
 50 | 
 51 | process (clk)
 52 | begin
 53 |   if (rising_edge(clk)) then
 54 |     if (byte_transmitting_signal = '1') then
 55 |       if (new_bit_ack_signal = '1' and new_bit_signal = '1') then
 56 |         new_bit_signal <= '0';
 57 |         
 58 |         -- If we're out of bits, go to idle
 59 |         if (bit_id_in_progress = 8 or (bit_id_in_progress = 7 and latched_need_stop_bit = '0')) then
 60 |           byte_transmitting_signal <= '0';
 61 |         end if;
 62 |       elsif (new_bit_ack_signal = '0' and new_bit_signal = '0') then
 63 |         -- Go to the next bit
 64 |         if (bit_id_in_progress = 7) then
 65 |           if (latched_need_stop_bit = '1') then
 66 |             new_bit_value <= "1" & latched_stop_bit;
 67 |             new_bit_signal <= '1';
 68 |             bit_id_in_progress <= bit_id_in_progress + 1;
 69 |           else
 70 |             -- We shouldn't end up here. This should have been dealt with earlier
 71 |             byte_transmitting_signal <= '0';
 72 |           end if;
 73 |         else
 74 |           new_bit_value <= "0" & latched_data(7 - (bit_id_in_progress + 1));
 75 |           new_bit_signal <= '1';
 76 |           bit_id_in_progress <= bit_id_in_progress + 1;
 77 |         end if;
 78 |       end if;
 79 |       
 80 |     else
 81 |       if (tx_write_ack_signal = '0' and tx_write = '1' and new_bit_ack_signal = '0') then
 82 |         byte_transmitting_signal <= '1';
 83 |         tx_write_ack_signal <= '1';
 84 |         
 85 |         -- Latch the data
 86 |         latched_data <= data_to_send;
 87 |         latched_need_stop_bit <= need_stop_bit;
 88 |         latched_stop_bit <= stop_bit;
 89 |         
 90 |         -- Write out the first bit
 91 |         new_bit_value <= "0" & data_to_send(7);
 92 |         new_bit_signal <= '1';
 93 |         bit_id_in_progress <= 0;
 94 |         
 95 |         
 96 |       end if;
 97 |     end if;
 98 |   
 99 |     -- Lower ack when new bit goes low
100 |     if (tx_write_ack_signal = '1' and tx_write = '0') then
101 |       tx_write_ack_signal <= '0';
102 |     end if;
103 | 
104 |   end if;
105 | end process;
106 |   
107 | data_signal_out <= data_signal;
108 | tx_busy <= bit_transmitting_signal;
109 | tx_write_ack <= tx_write_ack_signal;
110 | 
111 | end Behavioral;
112 | 
113 | 


--------------------------------------------------------------------------------
/HDL/N64/bit_detector.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity bit_detector is
  7 |     Port ( data_signal : in  STD_LOGIC;
  8 |            new_bit : out  STD_LOGIC;
  9 |            bit_val : out  STD_LOGIC_VECTOR (1 downto 0);
 10 |            CLK : in  STD_LOGIC);
 11 | end bit_detector;
 12 | 
 13 | architecture Behavioral of bit_detector is
 14 |   constant one_us_min : integer := 24;
 15 |   constant two_us_min : integer := 56;
 16 |   constant three_us_min : integer := 88;
 17 | 
 18 |   constant one_us_exact : integer := 32;
 19 |   constant two_us_exact : integer := 64;
 20 |   constant three_us_exact : integer := 96;
 21 |   
 22 |   constant one_us_max : integer := 40;
 23 |   constant two_us_max : integer := 72;
 24 |   constant three_us_max : integer := 104;
 25 | 
 26 |   type modes is (idle_mode, wait1_mode, wait0_mode);
 27 |   signal detection_mode : modes := idle_mode;
 28 | 
 29 |   signal prev_data : std_logic := '1';
 30 | 
 31 |   signal bit_timer : integer range 0 to 105 := 0;
 32 |   
 33 |   signal new_bit_temp : std_logic := '0';
 34 |   signal bit_val_temp : std_logic_vector(1 downto 0) := "00";
 35 | begin
 36 |   
 37 | process (clk)
 38 | begin
 39 |   if (rising_edge(clk)) then
 40 |     new_bit_temp <= '0';
 41 |   
 42 |     if (data_signal = prev_data) then
 43 |       if (data_signal = '1') then
 44 |         if (detection_mode = wait1_mode) then
 45 |           if (bit_timer = three_us_exact) then
 46 |             -- output 1 
 47 |             bit_val_temp <= "01";
 48 |             new_bit_temp <= '1';
 49 |             
 50 |             -- go to idle
 51 |             detection_mode <= idle_mode;
 52 |           else
 53 |             bit_timer <= bit_timer + 1;
 54 |           end if;
 55 |         elsif (detection_mode = wait0_mode) then
 56 |           if (bit_timer = one_us_exact) then
 57 |             -- output 0 
 58 |             bit_val_temp <= "00";
 59 |             new_bit_temp <= '1';
 60 |             
 61 |             -- go to idle
 62 |             detection_mode <= idle_mode;
 63 |           else
 64 |             bit_timer <= bit_timer + 1;
 65 |           end if;
 66 |         end if;
 67 |       else -- data = '0'
 68 |         -- Increment the timer, maxing out at 105
 69 |         if (bit_timer /= 105) then
 70 |           bit_timer <= bit_timer + 1;
 71 |         end if;
 72 |       end if;
 73 |     else -- data /= prev_data
 74 |       -- Falling edge of data
 75 |       if (prev_data = '1' and data_signal = '0') then
 76 |         if (detection_mode = wait1_mode) then
 77 |           -- Did we get something close enough?
 78 |           if (bit_timer >= three_us_min) then
 79 |             -- output 1 
 80 |             bit_val_temp <= "01";
 81 |             new_bit_temp <= '1';
 82 |           else
 83 |             -- output 3 (console stop bit)
 84 |             bit_val_temp <= "11";
 85 |             new_bit_temp <= '1';
 86 |           end if;
 87 |         elsif (detection_mode = wait0_mode) then
 88 |           -- Did we get something close enough?
 89 |           if (bit_timer >= one_us_min) then
 90 |             -- output 0
 91 |             bit_val_temp <= "00";
 92 |             new_bit_temp <= '1';
 93 |           end if;
 94 |         end if;
 95 |         
 96 |         detection_mode <= idle_mode;
 97 |         bit_timer <= 0;
 98 |         
 99 |       -- Rising edge
100 |       elsif (prev_data = '0' and data_signal = '1') then
101 |         if (bit_timer >= one_us_min and bit_timer <= one_us_max) then
102 |           detection_mode <= wait1_mode;
103 |         elsif (bit_timer >= two_us_min and bit_timer <= two_us_max) then
104 |           -- output 2 (controller stop bit)
105 |             bit_val_temp <= "10";
106 |             new_bit_temp <= '1';
107 |           detection_mode <= idle_mode;
108 |         elsif (bit_timer >= three_us_min and bit_timer <= three_us_max) then
109 |           detection_mode <= wait0_mode;
110 |         else
111 |           -- Low pulse was outside acceptable ranges, ignore it
112 |           detection_mode <= idle_mode;
113 |         end if;
114 |         
115 |         bit_timer <= 0;
116 |       end if;
117 |       
118 |       -- Remember this new data value
119 |       prev_data <= data_signal;
120 |     end if;
121 |   end if;
122 | end process;
123 | 
124 | new_bit <= new_bit_temp;
125 | bit_val <= bit_val_temp;
126 | 
127 | end Behavioral;
128 | 
129 | 


--------------------------------------------------------------------------------
/HDL/n64_mitm/bit_detector.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity bit_detector is
  7 |     Port ( data_signal : in  STD_LOGIC;
  8 |            new_bit : out  STD_LOGIC;
  9 |            bit_val : out  STD_LOGIC_VECTOR (1 downto 0);
 10 |            CLK : in  STD_LOGIC);
 11 | end bit_detector;
 12 | 
 13 | architecture Behavioral of bit_detector is
 14 |   constant one_us_min : integer := 24;
 15 |   constant two_us_min : integer := 56;
 16 |   constant three_us_min : integer := 88;
 17 | 
 18 |   constant one_us_exact : integer := 32;
 19 |   constant two_us_exact : integer := 64;
 20 |   constant three_us_exact : integer := 96;
 21 |   
 22 |   constant one_us_max : integer := 40;
 23 |   constant two_us_max : integer := 72;
 24 |   constant three_us_max : integer := 104;
 25 | 
 26 |   type modes is (idle_mode, wait1_mode, wait0_mode);
 27 |   signal detection_mode : modes := idle_mode;
 28 | 
 29 |   signal prev_data : std_logic := '1';
 30 | 
 31 |   signal bit_timer : integer range 0 to 105 := 0;
 32 |   
 33 |   signal new_bit_temp : std_logic := '0';
 34 |   signal bit_val_temp : std_logic_vector(1 downto 0) := "00";
 35 | begin
 36 |   
 37 | process (clk)
 38 | begin
 39 |   if (rising_edge(clk)) then
 40 |     new_bit_temp <= '0';
 41 |   
 42 |     if (data_signal = prev_data) then
 43 |       if (data_signal = '1') then
 44 |         if (detection_mode = wait1_mode) then
 45 |           if (bit_timer = three_us_exact) then
 46 |             -- output 1 
 47 |             bit_val_temp <= "01";
 48 |             new_bit_temp <= '1';
 49 |             
 50 |             -- go to idle
 51 |             detection_mode <= idle_mode;
 52 |           else
 53 |             bit_timer <= bit_timer + 1;
 54 |           end if;
 55 |         elsif (detection_mode = wait0_mode) then
 56 |           if (bit_timer = one_us_exact) then
 57 |             -- output 0 
 58 |             bit_val_temp <= "00";
 59 |             new_bit_temp <= '1';
 60 |             
 61 |             -- go to idle
 62 |             detection_mode <= idle_mode;
 63 |           else
 64 |             bit_timer <= bit_timer + 1;
 65 |           end if;
 66 |         end if;
 67 |       else -- data = '0'
 68 |         -- Increment the timer, maxing out at 105
 69 |         if (bit_timer /= 105) then
 70 |           bit_timer <= bit_timer + 1;
 71 |         end if;
 72 |       end if;
 73 |     else -- data /= prev_data
 74 |       -- Falling edge of data
 75 |       if (prev_data = '1' and data_signal = '0') then
 76 |         if (detection_mode = wait1_mode) then
 77 |           -- Did we get something close enough?
 78 |           if (bit_timer >= three_us_min) then
 79 |             -- output 1 
 80 |             bit_val_temp <= "01";
 81 |             new_bit_temp <= '1';
 82 |           else
 83 |             -- output 3 (console stop bit)
 84 |             bit_val_temp <= "11";
 85 |             new_bit_temp <= '1';
 86 |           end if;
 87 |         elsif (detection_mode = wait0_mode) then
 88 |           -- Did we get something close enough?
 89 |           if (bit_timer >= one_us_min) then
 90 |             -- output 0
 91 |             bit_val_temp <= "00";
 92 |             new_bit_temp <= '1';
 93 |           end if;
 94 |         end if;
 95 |         
 96 |         detection_mode <= idle_mode;
 97 |         bit_timer <= 0;
 98 |         
 99 |       -- Rising edge
100 |       elsif (prev_data = '0' and data_signal = '1') then
101 |         if (bit_timer >= one_us_min and bit_timer <= one_us_max) then
102 |           detection_mode <= wait1_mode;
103 |         elsif (bit_timer >= two_us_min and bit_timer <= two_us_max) then
104 |           -- output 2 (controller stop bit)
105 |             bit_val_temp <= "10";
106 |             new_bit_temp <= '1';
107 |           detection_mode <= idle_mode;
108 |         elsif (bit_timer >= three_us_min and bit_timer <= three_us_max) then
109 |           detection_mode <= wait0_mode;
110 |         else
111 |           -- Low pulse was outside acceptable ranges, ignore it
112 |           detection_mode <= idle_mode;
113 |         end if;
114 |         
115 |         bit_timer <= 0;
116 |       end if;
117 |       
118 |       -- Remember this new data value
119 |       prev_data <= data_signal;
120 |     end if;
121 |   end if;
122 | end process;
123 | 
124 | new_bit <= new_bit_temp;
125 | bit_val <= bit_val_temp;
126 | 
127 | end Behavioral;
128 | 
129 | 


--------------------------------------------------------------------------------
/HDL/N64/UART.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | entity UART is
  5 |     Port ( rx_data_out : out STD_LOGIC_VECTOR (7 downto 0);
  6 |            rx_data_was_recieved : in STD_LOGIC;
  7 |            rx_byte_waiting : out STD_LOGIC;
  8 |            clk : in  STD_LOGIC;
  9 | 			  rx_in : in STD_LOGIC;
 10 | 			  
 11 | 			  tx_data_in : in STD_LOGIC_VECTOR (7 downto 0);
 12 |            tx_buffer_full : out STD_LOGIC;
 13 |            tx_write : in STD_LOGIC;
 14 | 			  tx_out : out STD_LOGIC);
 15 | end UART;
 16 | 
 17 | architecture Behavioral of UART is
 18 | 	signal rx_bit_buffer : std_logic_vector (39 downto 0) := (others => '1');
 19 | 	signal rx_baud : std_logic := '0';
 20 | 	signal rx_baud_counter : integer range 0 to 3;
 21 | 	
 22 | 	signal rx_data : STD_LOGIC_VECTOR (7 downto 0) := (others => '1');
 23 | 	
 24 | 	signal new_byte_waiting_from_buffer : std_logic := '0';
 25 | 	signal new_byte_waiting_for_external : std_logic := '0';
 26 | 	signal save_next_byte : std_logic := '1';
 27 | 	
 28 | 	signal prev_write_val : std_logic := '0';
 29 | 	
 30 | 	signal tx_buffer : std_logic_vector (10 downto 0) := (others => '1');
 31 | 	signal writing : std_logic := '0';
 32 | 	
 33 | 	signal tx_baud_counter : integer range 0 to 15;
 34 | 	signal tx_bit_counter : integer range 0 to 13;
 35 | 	signal new_byte_to_send : std_logic := '0';
 36 | begin
 37 | 
 38 | tx_ack: process (clk)
 39 | 	begin
 40 | 		if (rising_edge(clk)) then
 41 | 			if (tx_write = '1' and prev_write_val = '0' and writing = '0') then
 42 | 				new_byte_to_send <= '1';
 43 | 				prev_write_val <= '1';
 44 | 			elsif (tx_write = '0' and prev_write_val = '1') then
 45 | 				prev_write_val <= '0';
 46 | 				new_byte_to_send <= '0';
 47 | 			else
 48 | 				new_byte_to_send <= '0';
 49 | 			end if;
 50 | 		end if;
 51 | 	end process;
 52 | 
 53 | tx: process (clk)
 54 | 	begin
 55 | 		if (rising_edge(clk)) then
 56 | 			if (writing = '0' and new_byte_to_send = '1') then
 57 | 				tx_buffer <= tx_data_in & "011";
 58 | 				writing <= '1';
 59 | 				tx_bit_counter <= 0;
 60 | 				tx_baud_counter <= 0;
 61 | 			elsif (writing = '1') then
 62 | 				if (tx_baud_counter = 15) then
 63 | 					tx_buffer <= '1' & tx_buffer(10 downto 1);
 64 | 					
 65 | 					if (tx_bit_counter = 13) then
 66 | 						writing <= '0';
 67 | 					else
 68 | 						tx_bit_counter <= tx_bit_counter + 1;
 69 | 					end if;
 70 | 					tx_baud_counter <= 0;
 71 | 				else
 72 | 					tx_baud_counter <= tx_baud_counter + 1;
 73 | 				end if;
 74 | 			end if;
 75 | 		end if;
 76 | 	end process;
 77 | 
 78 | tx_out <= tx_buffer(0);
 79 | tx_buffer_full <= writing;
 80 | 
 81 | rx_ack: process (clk)
 82 | 	begin
 83 | 		if (rising_edge(clk)) then
 84 | 			if (rx_data_was_recieved = '1') then
 85 | 				save_next_byte <= '1';
 86 | 				new_byte_waiting_for_external <= '0';
 87 | 			elsif (new_byte_waiting_from_buffer = '1') then
 88 | 				save_next_byte <= '0';
 89 | 				new_byte_waiting_for_external <= '1';
 90 | 			end if;
 91 | 		end if;
 92 | 	end process;
 93 | 	
 94 | rx: process (clk)
 95 | 	begin
 96 | 		if (rising_edge(clk)) then
 97 | 			if (rx_baud_counter = 3) then
 98 | 				if (rx_bit_buffer(38 downto 37) = "11" and
 99 | 					 rx_bit_buffer(34) = rx_bit_buffer(33) and
100 | 					 rx_bit_buffer(30) = rx_bit_buffer(29) and
101 | 					 rx_bit_buffer(26) = rx_bit_buffer(25) and
102 | 					 rx_bit_buffer(22) = rx_bit_buffer(21) and
103 | 					 rx_bit_buffer(18) = rx_bit_buffer(17) and
104 | 					 rx_bit_buffer(14) = rx_bit_buffer(13) and
105 | 					 rx_bit_buffer(10) = rx_bit_buffer(9) and
106 | 					 rx_bit_buffer(6) = rx_bit_buffer(5) and
107 | 					 rx_bit_buffer(2 downto 1) = "00") then
108 | 						 if (save_next_byte = '1') then
109 | 							 rx_data <= rx_bit_buffer(34) & rx_bit_buffer(30) & rx_bit_buffer(26) & rx_bit_buffer(22) & rx_bit_buffer(18) & rx_bit_buffer(14) & rx_bit_buffer(10) & rx_bit_buffer(6);
110 | 							 new_byte_waiting_from_buffer <= '1';
111 | 						 end if;
112 | 				       rx_bit_buffer <= (others => '1');
113 | 				else
114 | 					rx_bit_buffer <= rx_in & rx_bit_buffer(39 downto 1);
115 | 					new_byte_waiting_from_buffer <= '0';
116 | 				end if;
117 | 				rx_baud_counter <= 0;
118 | 			else
119 | 				new_byte_waiting_from_buffer <= '0';
120 | 				rx_baud_counter <= rx_baud_counter + 1;
121 | 			end if;
122 | 		end if;
123 | 	end process;
124 | 	
125 | -- new_byte_waiting
126 | rx_byte_waiting <= new_byte_waiting_for_external;
127 | 
128 | -- data out
129 | rx_data_out <= rx_data;
130 | 
131 | end Behavioral;
132 | 
133 | 


--------------------------------------------------------------------------------
/HDL/TASLink/UART.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | entity UART is
  5 |     Port ( rx_data_out : out STD_LOGIC_VECTOR (7 downto 0);
  6 |            rx_data_was_recieved : in STD_LOGIC;
  7 |            rx_byte_waiting : out STD_LOGIC;
  8 |            clk : in  STD_LOGIC;
  9 | 			  rx_in : in STD_LOGIC;
 10 | 			  
 11 | 			  tx_data_in : in STD_LOGIC_VECTOR (7 downto 0);
 12 |            tx_buffer_full : out STD_LOGIC;
 13 |            tx_write : in STD_LOGIC;
 14 | 			  tx_out : out STD_LOGIC);
 15 | end UART;
 16 | 
 17 | architecture Behavioral of UART is
 18 | 	signal rx_bit_buffer : std_logic_vector (39 downto 0) := (others => '1');
 19 | 	signal rx_baud : std_logic := '0';
 20 | 	signal rx_baud_counter : integer range 0 to 3;
 21 | 	
 22 | 	signal rx_data : STD_LOGIC_VECTOR (7 downto 0) := (others => '1');
 23 | 	
 24 | 	signal new_byte_waiting_from_buffer : std_logic := '0';
 25 | 	signal new_byte_waiting_for_external : std_logic := '0';
 26 | 	signal save_next_byte : std_logic := '1';
 27 | 	
 28 | 	signal prev_write_val : std_logic := '0';
 29 | 	
 30 | 	signal tx_buffer : std_logic_vector (10 downto 0) := (others => '1');
 31 | 	signal writing : std_logic := '0';
 32 | 	
 33 | 	signal tx_baud_counter : integer range 0 to 15;
 34 | 	signal tx_bit_counter : integer range 0 to 13;
 35 | 	signal new_byte_to_send : std_logic := '0';
 36 | begin
 37 | 
 38 | tx_ack: process (clk)
 39 | 	begin
 40 | 		if (rising_edge(clk)) then
 41 | 			if (tx_write = '1' and prev_write_val = '0' and writing = '0') then
 42 | 				new_byte_to_send <= '1';
 43 | 				prev_write_val <= '1';
 44 | 			elsif (tx_write = '0' and prev_write_val = '1') then
 45 | 				prev_write_val <= '0';
 46 | 				new_byte_to_send <= '0';
 47 | 			else
 48 | 				new_byte_to_send <= '0';
 49 | 			end if;
 50 | 		end if;
 51 | 	end process;
 52 | 
 53 | tx: process (clk)
 54 | 	begin
 55 | 		if (rising_edge(clk)) then
 56 | 			if (writing = '0' and new_byte_to_send = '1') then
 57 | 				tx_buffer <= tx_data_in & "011";
 58 | 				writing <= '1';
 59 | 				tx_bit_counter <= 0;
 60 | 				tx_baud_counter <= 0;
 61 | 			elsif (writing = '1') then
 62 | 				if (tx_baud_counter = 15) then
 63 | 					tx_buffer <= '1' & tx_buffer(10 downto 1);
 64 | 					
 65 | 					if (tx_bit_counter = 13) then
 66 | 						writing <= '0';
 67 | 					else
 68 | 						tx_bit_counter <= tx_bit_counter + 1;
 69 | 					end if;
 70 | 					tx_baud_counter <= 0;
 71 | 				else
 72 | 					tx_baud_counter <= tx_baud_counter + 1;
 73 | 				end if;
 74 | 			end if;
 75 | 		end if;
 76 | 	end process;
 77 | 
 78 | tx_out <= tx_buffer(0);
 79 | tx_buffer_full <= writing or new_byte_to_send;
 80 | 
 81 | rx_ack: process (clk)
 82 | 	begin
 83 | 		if (rising_edge(clk)) then
 84 | 			if (rx_data_was_recieved = '1') then
 85 | 				save_next_byte <= '1';
 86 | 				new_byte_waiting_for_external <= '0';
 87 | 			elsif (new_byte_waiting_from_buffer = '1') then
 88 | 				save_next_byte <= '0';
 89 | 				new_byte_waiting_for_external <= '1';
 90 | 			end if;
 91 | 		end if;
 92 | 	end process;
 93 | 	
 94 | rx: process (clk)
 95 | 	begin
 96 | 		if (rising_edge(clk)) then
 97 | 			if (rx_baud_counter = 3) then
 98 | 				if (rx_bit_buffer(38 downto 37) = "11" and
 99 | 					 rx_bit_buffer(34) = rx_bit_buffer(33) and
100 | 					 rx_bit_buffer(30) = rx_bit_buffer(29) and
101 | 					 rx_bit_buffer(26) = rx_bit_buffer(25) and
102 | 					 rx_bit_buffer(22) = rx_bit_buffer(21) and
103 | 					 rx_bit_buffer(18) = rx_bit_buffer(17) and
104 | 					 rx_bit_buffer(14) = rx_bit_buffer(13) and
105 | 					 rx_bit_buffer(10) = rx_bit_buffer(9) and
106 | 					 rx_bit_buffer(6) = rx_bit_buffer(5) and
107 | 					 rx_bit_buffer(2 downto 1) = "00") then
108 | 						 if (save_next_byte = '1') then
109 | 							 rx_data <= rx_bit_buffer(34) & rx_bit_buffer(30) & rx_bit_buffer(26) & rx_bit_buffer(22) & rx_bit_buffer(18) & rx_bit_buffer(14) & rx_bit_buffer(10) & rx_bit_buffer(6);
110 | 							 new_byte_waiting_from_buffer <= '1';
111 | 						 end if;
112 | 				       rx_bit_buffer <= (others => '1');
113 | 				else
114 | 					rx_bit_buffer <= rx_in & rx_bit_buffer(39 downto 1);
115 | 					new_byte_waiting_from_buffer <= '0';
116 | 				end if;
117 | 				rx_baud_counter <= 0;
118 | 			else
119 | 				new_byte_waiting_from_buffer <= '0';
120 | 				rx_baud_counter <= rx_baud_counter + 1;
121 | 			end if;
122 | 		end if;
123 | 	end process;
124 | 	
125 | -- new_byte_waiting
126 | rx_byte_waiting <= new_byte_waiting_for_external;
127 | 
128 | -- data out
129 | rx_data_out <= rx_data;
130 | 
131 | end Behavioral;
132 | 
133 | 


--------------------------------------------------------------------------------
/HDL/NES_Mini/NES_Mini/UART.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | entity UART is
  5 |     Port ( rx_data_out : out STD_LOGIC_VECTOR (7 downto 0);
  6 |            rx_data_was_recieved : in STD_LOGIC;
  7 |            rx_byte_waiting : out STD_LOGIC;
  8 |            clk : in  STD_LOGIC;
  9 | 			  rx_in : in STD_LOGIC;
 10 | 			  
 11 | 			  tx_data_in : in STD_LOGIC_VECTOR (7 downto 0);
 12 |            tx_buffer_full : out STD_LOGIC;
 13 |            tx_write : in STD_LOGIC;
 14 | 			  tx_out : out STD_LOGIC);
 15 | end UART;
 16 | 
 17 | architecture Behavioral of UART is
 18 | 	signal rx_bit_buffer : std_logic_vector (39 downto 0) := (others => '1');
 19 | 	signal rx_baud : std_logic := '0';
 20 | 	signal rx_baud_counter : integer range 0 to 3;
 21 | 	
 22 | 	signal rx_data : STD_LOGIC_VECTOR (7 downto 0) := (others => '1');
 23 | 	
 24 | 	signal new_byte_waiting_from_buffer : std_logic := '0';
 25 | 	signal new_byte_waiting_for_external : std_logic := '0';
 26 | 	signal save_next_byte : std_logic := '1';
 27 | 	
 28 | 	signal prev_write_val : std_logic := '0';
 29 | 	
 30 | 	signal tx_buffer : std_logic_vector (10 downto 0) := (others => '1');
 31 | 	signal writing : std_logic := '0';
 32 | 	
 33 | 	signal tx_baud_counter : integer range 0 to 15;
 34 | 	signal tx_bit_counter : integer range 0 to 13;
 35 | 	signal new_byte_to_send : std_logic := '0';
 36 | begin
 37 | 
 38 | tx_ack: process (clk)
 39 | 	begin
 40 | 		if (rising_edge(clk)) then
 41 | 			if (tx_write = '1' and prev_write_val = '0' and writing = '0') then
 42 | 				new_byte_to_send <= '1';
 43 | 				prev_write_val <= '1';
 44 | 			elsif (tx_write = '0' and prev_write_val = '1') then
 45 | 				prev_write_val <= '0';
 46 | 				new_byte_to_send <= '0';
 47 | 			else
 48 | 				new_byte_to_send <= '0';
 49 | 			end if;
 50 | 		end if;
 51 | 	end process;
 52 | 
 53 | tx: process (clk)
 54 | 	begin
 55 | 		if (rising_edge(clk)) then
 56 | 			if (writing = '0' and new_byte_to_send = '1') then
 57 | 				tx_buffer <= tx_data_in & "011";
 58 | 				writing <= '1';
 59 | 				tx_bit_counter <= 0;
 60 | 				tx_baud_counter <= 0;
 61 | 			elsif (writing = '1') then
 62 | 				if (tx_baud_counter = 15) then
 63 | 					tx_buffer <= '1' & tx_buffer(10 downto 1);
 64 | 					
 65 | 					if (tx_bit_counter = 13) then
 66 | 						writing <= '0';
 67 | 					else
 68 | 						tx_bit_counter <= tx_bit_counter + 1;
 69 | 					end if;
 70 | 					tx_baud_counter <= 0;
 71 | 				else
 72 | 					tx_baud_counter <= tx_baud_counter + 1;
 73 | 				end if;
 74 | 			end if;
 75 | 		end if;
 76 | 	end process;
 77 | 
 78 | tx_out <= tx_buffer(0);
 79 | tx_buffer_full <= writing or new_byte_to_send;
 80 | 
 81 | rx_ack: process (clk)
 82 | 	begin
 83 | 		if (rising_edge(clk)) then
 84 | 			if (rx_data_was_recieved = '1') then
 85 | 				save_next_byte <= '1';
 86 | 				new_byte_waiting_for_external <= '0';
 87 | 			elsif (new_byte_waiting_from_buffer = '1') then
 88 | 				save_next_byte <= '0';
 89 | 				new_byte_waiting_for_external <= '1';
 90 | 			end if;
 91 | 		end if;
 92 | 	end process;
 93 | 	
 94 | rx: process (clk)
 95 | 	begin
 96 | 		if (rising_edge(clk)) then
 97 | 			if (rx_baud_counter = 3) then
 98 | 				if (rx_bit_buffer(38 downto 37) = "11" and
 99 | 					 rx_bit_buffer(34) = rx_bit_buffer(33) and
100 | 					 rx_bit_buffer(30) = rx_bit_buffer(29) and
101 | 					 rx_bit_buffer(26) = rx_bit_buffer(25) and
102 | 					 rx_bit_buffer(22) = rx_bit_buffer(21) and
103 | 					 rx_bit_buffer(18) = rx_bit_buffer(17) and
104 | 					 rx_bit_buffer(14) = rx_bit_buffer(13) and
105 | 					 rx_bit_buffer(10) = rx_bit_buffer(9) and
106 | 					 rx_bit_buffer(6) = rx_bit_buffer(5) and
107 | 					 rx_bit_buffer(2 downto 1) = "00") then
108 | 						 if (save_next_byte = '1') then
109 | 							 rx_data <= rx_bit_buffer(34) & rx_bit_buffer(30) & rx_bit_buffer(26) & rx_bit_buffer(22) & rx_bit_buffer(18) & rx_bit_buffer(14) & rx_bit_buffer(10) & rx_bit_buffer(6);
110 | 							 new_byte_waiting_from_buffer <= '1';
111 | 						 end if;
112 | 				       rx_bit_buffer <= (others => '1');
113 | 				else
114 | 					rx_bit_buffer <= rx_in & rx_bit_buffer(39 downto 1);
115 | 					new_byte_waiting_from_buffer <= '0';
116 | 				end if;
117 | 				rx_baud_counter <= 0;
118 | 			else
119 | 				new_byte_waiting_from_buffer <= '0';
120 | 				rx_baud_counter <= rx_baud_counter + 1;
121 | 			end if;
122 | 		end if;
123 | 	end process;
124 | 	
125 | -- new_byte_waiting
126 | rx_byte_waiting <= new_byte_waiting_for_external;
127 | 
128 | -- data out
129 | rx_data_out <= rx_data;
130 | 
131 | end Behavioral;
132 | 
133 | 


--------------------------------------------------------------------------------
/HDL/TASLink/snes_multitap.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | entity snes_multitap is
  5 |     Port ( console_clock : in  STD_LOGIC;
  6 |            console_latch : in  STD_LOGIC;
  7 |            console_io : in  STD_LOGIC;
  8 |            console_d0 : out  STD_LOGIC;
  9 |            console_d1 : out  STD_LOGIC;
 10 |            console_d0_oe : out  STD_LOGIC;
 11 |            console_d1_oe : out  STD_LOGIC;
 12 |            
 13 |            clk : in  STD_LOGIC;
 14 |            sw : in  STD_LOGIC;
 15 |            
 16 |            port_latch : out STD_LOGIC_VECTOR(1 to 4);
 17 |            port_clock : out STD_LOGIC_VECTOR(1 to 4);
 18 |            port_io : out STD_LOGIC_VECTOR(1 to 4);
 19 |            port_d0 : in STD_LOGIC_VECTOR(1 to 4);
 20 |            port_d1 : in STD_LOGIC_VECTOR(1 to 4);
 21 |            port_d0_oe : in STD_LOGIC_VECTOR(1 to 4);
 22 |            port_d1_oe : in STD_LOGIC_VECTOR(1 to 4));
 23 | end snes_multitap;
 24 | 
 25 | architecture Behavioral of snes_multitap is
 26 | 
 27 | signal port_d0_pulled_up : std_logic_vector(1 to 4);
 28 | signal port_d1_pulled_up : std_logic_vector(1 to 1);
 29 | 
 30 | begin
 31 | port_d0_pulled_up(1) <= port_d0(1) when port_d0_oe(1) = '0' else
 32 |                         '1';
 33 | 
 34 | port_d0_pulled_up(2) <= port_d0(2) when port_d0_oe(2) = '0' else
 35 |                         '1';
 36 |                         
 37 | port_d0_pulled_up(3) <= port_d0(3) when port_d0_oe(3) = '0' else
 38 |                         '1';
 39 |                         
 40 | port_d0_pulled_up(4) <= port_d0(4) when port_d0_oe(4) = '0' else
 41 |                         '1';
 42 | 
 43 | port_d1_pulled_up(1) <= port_d1(1) when port_d1_oe(1) = '0' else
 44 |                         '1';
 45 |                         
 46 | console_d0 <= '1' when console_latch = '1' else -- The multiplexer is actually disabled
 47 |               -- All the rest below assume latch = '0'
 48 |               port_d0_pulled_up(1) when sw = '0' else
 49 |               -- All the rest below assume sw = '1'
 50 |               port_d0_pulled_up(1) when console_io = '1' else
 51 |               port_d0_pulled_up(3);
 52 | 
 53 | console_d1 <= port_d1_pulled_up(1) when console_latch = '0' and sw = '0' else -- Port 1 D1 is passed through
 54 |               '1'                  when console_latch = '1' and sw = '0' else -- Port 1 D1 is not passed due to the multiplexer being disabled
 55 |               port_d0_pulled_up(2) when console_latch = '0' and sw = '1' and console_io = '1' else
 56 |               port_d0_pulled_up(4) when console_latch = '0' and sw = '1' and console_io = '0' else
 57 |               '0'; -- Line is driven low when latch = '1' in 5p mode
 58 | 
 59 | console_d0_oe <= console_latch; -- Due to the multiplexer, this line is only enabled when latch is low
 60 | console_d1_oe <= console_latch when sw = '0' else -- Due to the multiplexer, this line is only enabled when latch is low and sw is set to 2p
 61 |                  '0'; -- In 5p this line is always driven
 62 | 
 63 |               
 64 | port_clock(1) <= console_clock when console_latch = '1' else  -- Clock is always passed through to port 1 if latch is high
 65 |                  console_clock when console_latch = '0' and sw = '0' else -- Clock is passed through the multitplexer
 66 |                  console_clock when console_latch = '0' and sw = '1' and console_io = '1' else -- Clock is only passed if IO is high
 67 |                  '1'; -- Multiplexer is disabled, use the pull-up instead;
 68 | 
 69 | port_clock(2) <= '1' when sw = '0' else -- This is actually disconnected
 70 |                  console_clock when console_latch = '1' and sw = '1' else -- Matches port 1 when sw is set to 5p
 71 |                  console_clock when console_latch = '0' and sw = '1' and console_io = '1' else
 72 |                  '1';
 73 |                
 74 | port_clock(3) <= '1' when sw = '0' else -- This is actually disconnected
 75 |                  console_clock when console_io = '0' and console_latch = '0' and sw = '1' else -- Only time it is passed through
 76 |                  '1'; -- Multiplexer is disabled, use the pull-up instead;
 77 | 
 78 | -- Same as port 3 clock
 79 | port_clock(4) <= '1' when sw = '0' else -- This is actually disconnected
 80 |                  console_clock when console_io = '0' and console_latch = '0' and sw = '1' else -- Only time it is passed through
 81 |                  '1'; -- Multiplexer is disabled, use the pull-up instead;
 82 | 
 83 | port_latch(1) <= console_latch; -- Directly connected
 84 | port_latch(2) <= console_latch when sw = '1' else -- Only passed in 5p mode
 85 |                  '1';
 86 | port_latch(3) <= console_latch when sw = '1' else -- Only passed in 5p mode
 87 |                  '1';
 88 | port_latch(4) <= console_latch when sw = '1' else -- Only passed in 5p mode
 89 |                  '1';
 90 |                
 91 | -- Port 1 IO is only connected when sw is in 2p
 92 | -- Ports 2-4 IO are never connected
 93 | port_io(1) <= console_io when sw = '0'
 94 |               else '0';                
 95 | port_io(2) <= '0';
 96 | port_io(3) <= '0';
 97 | port_io(4) <= '0';
 98 | 
 99 | end Behavioral;
100 | 
101 | 


--------------------------------------------------------------------------------
/HDL/TASLink/main.ucf:
--------------------------------------------------------------------------------
 1 | ## Prohibit the automatic placement of pins that are connected to VCC or GND for configuration.
 2 | CONFIG PROHIBIT=P144;
 3 | CONFIG PROHIBIT=P69;
 4 | CONFIG PROHIBIT=P60;
 5 | 
 6 | NET CLK                       LOC="P94"  | IOSTANDARD=LVTTL | PERIOD=31.25ns;               # CLK
 7 | NET RX                        LOC="P101" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # RX
 8 | NET TXraw                     LOC="P105" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST | PULLUP; # TX
 9 | NET console_d1(4)             LOC="P48"  | IOSTANDARD=LVTTL;                                # A0
10 | NET console_d1_oe(4)          LOC="P51"  | IOSTANDARD=LVTTL;                                # A1
11 | NET console_d0(4)             LOC="P56"  | IOSTANDARD=LVTTL;                                # A2
12 | NET console_d0_oe(4)          LOC="P58"  | IOSTANDARD=LVTTL;                                # A3
13 | NET console_clock(4)          LOC="P61"  | IOSTANDARD=LVTTL;                                # A4
14 | NET console_clock(3)          LOC="P66"  | IOSTANDARD=LVTTL;                                # A5
15 | NET console_clock(2)          LOC="P67"  | IOSTANDARD=LVTTL;                                # A6
16 | NET console_clock(1)          LOC="P75"  | IOSTANDARD=LVTTL | CLOCK_DEDICATED_ROUTE;        # A7
17 | NET debug(0)                  LOC="P79"  | IOSTANDARD=LVTTL;                                # A8
18 | NET debug(1)                  LOC="P81"  | IOSTANDARD=LVTTL;                                # A9
19 | NET debug(2)                  LOC="P83"  | IOSTANDARD=LVTTL;                                # A10
20 | NET debug(3)                  LOC="P85"  | IOSTANDARD=LVTTL;                                # A11
21 | NET debug(4)                  LOC="P88"  | IOSTANDARD=LVTTL;                                # A12
22 | NET debug(5)                  LOC="P93"  | IOSTANDARD=LVTTL;                                # A13
23 | NET debug(6)                  LOC="P98"  | IOSTANDARD=LVTTL;                                # A14
24 | NET debug(7)                  LOC="P100" | IOSTANDARD=LVTTL;                                # A15
25 | NET visualization_clock(4)    LOC="P99"  | IOSTANDARD=LVTTL;                                # B0
26 | NET visualization_latch(4)    LOC="P97"  | IOSTANDARD=LVTTL;                                # B1
27 | NET visualization_d1(4)       LOC="P92"  | IOSTANDARD=LVTTL;                                # B2
28 | NET visualization_d0(4)       LOC="P87"  | IOSTANDARD=LVTTL;                                # B3
29 | NET visualization_clock(3)    LOC="P84"  | IOSTANDARD=LVTTL;                                # B4
30 | NET visualization_latch(3)    LOC="P82"  | IOSTANDARD=LVTTL;                                # B5
31 | NET visualization_d1(3)       LOC="P80"  | IOSTANDARD=LVTTL;                                # B6
32 | NET visualization_d0(3)       LOC="P78"  | IOSTANDARD=LVTTL;                                # B7
33 | NET console_latch(1)          LOC="P74"  | IOSTANDARD=LVTTL | CLOCK_DEDICATED_ROUTE;         # B8
34 | NET console_latch(2)          LOC="P95"  | IOSTANDARD=LVTTL;                                # B9
35 | NET console_latch(3)          LOC="P62"  | IOSTANDARD=LVTTL;                                # B10
36 | NET console_latch(4)          LOC="P59"  | IOSTANDARD=LVTTL;                                # B11
37 | NET console_d1(3)             LOC="P57"  | IOSTANDARD=LVTTL;                                # B12
38 | NET console_d1_oe(3)          LOC="P55"  | IOSTANDARD=LVTTL;                                # B13
39 | NET console_d0(3)             LOC="P50"  | IOSTANDARD=LVTTL;                                # B14
40 | NET console_d0_oe(3)          LOC="P47"  | IOSTANDARD=LVTTL;                                # B15
41 | NET visualization_d0(1)       LOC="P114" | IOSTANDARD=LVTTL;                                # C0
42 | NET visualization_d1(1)       LOC="P115" | IOSTANDARD=LVTTL;                                # C1
43 | NET visualization_latch(1)    LOC="P116" | IOSTANDARD=LVTTL;                                # C2
44 | NET visualization_clock(1)    LOC="P117" | IOSTANDARD=LVTTL;                                # C3
45 | NET visualization_d0(2)       LOC="P118" | IOSTANDARD=LVTTL;                                # C4
46 | NET visualization_d1(2)       LOC="P119" | IOSTANDARD=LVTTL;                                # C5
47 | NET visualization_latch(2)    LOC="P120" | IOSTANDARD=LVTTL;                                # C6
48 | NET visualization_clock(2)    LOC="P121" | IOSTANDARD=LVTTL;                                # C7
49 | NET console_d0_oe(2)          LOC="P123" | IOSTANDARD=LVTTL;                                # C8
50 | NET console_d0(2)             LOC="P124" | IOSTANDARD=LVTTL;                                # C9
51 | NET console_d1_oe(2)          LOC="P126" | IOSTANDARD=LVTTL;                                # C10
52 | NET console_d1(2)             LOC="P127" | IOSTANDARD=LVTTL;                                # C11
53 | NET console_d0_oe(1)          LOC="P131" | IOSTANDARD=LVTTL;                                # C12
54 | NET console_d0(1)             LOC="P132" | IOSTANDARD=LVTTL;                                # C13
55 | NET console_d1_oe(1)          LOC="P133" | IOSTANDARD=LVTTL;                                # C14
56 | NET console_d1(1)             LOC="P134" | IOSTANDARD=LVTTL;                                # C15
57 | 
58 | 


--------------------------------------------------------------------------------
/PCBs/snes_visualization/snes_visualization_left/snes_visualization_left.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | 
 10 | [Sec_1]
 11 | Name[C]="Component side"
 12 | Name[en]="Top Copper Layer"
 13 | Prompt=""
 14 | Device="GERBER_RS274X"
 15 | Wheel=".whl"
 16 | Rack=""
 17 | Scale=1
 18 | Output=".GTL"
 19 | Flags="0 0 0 1 0 1 1"
 20 | Emulate="0"
 21 | Offset="0.0mil 0.0mil"
 22 | Sheet=1
 23 | Tolerance="0 0 0 0 0 0"
 24 | Pen="0.0mil 0"
 25 | Page="12000.0mil 8000.0mil"
 26 | Layers=" 1 17 18"
 27 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 28 | 
 29 | [Sec_2]
 30 | Name[C]="Solder side"
 31 | Name[en]="Bottom Copper Layer"
 32 | Prompt=""
 33 | Device="GERBER_RS274X"
 34 | Wheel=".whl"
 35 | Rack=""
 36 | Scale=1
 37 | Output=".GBL"
 38 | Flags="0 0 0 1 0 1 1"
 39 | Emulate="0"
 40 | Offset="0.0mil 0.0mil"
 41 | Sheet=1
 42 | Tolerance="0 0 0 0 0 0"
 43 | Pen="0.0mil 0"
 44 | Page="12000.0mil 8000.0mil"
 45 | Layers=" 16 17 18"
 46 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 47 | 
 48 | [Sec_3]
 49 | Name[C]="Solder stop mask CMP"
 50 | Name[en]="Top Solder Mask"
 51 | Prompt=""
 52 | Device="GERBER_RS274X"
 53 | Wheel=".whl"
 54 | Rack=""
 55 | Scale=1
 56 | Output=".GTS"
 57 | Flags="0 0 0 1 0 1 1"
 58 | Emulate="0"
 59 | Offset="0.0mil 0.0mil"
 60 | Sheet=1
 61 | Tolerance="0 0 0 0 0 0"
 62 | Pen="0.0mil 0"
 63 | Page="12000.0mil 8000.0mil"
 64 | Layers=" 29"
 65 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 66 | 
 67 | [Sec_4]
 68 | Name[C]="Solder stop mask SOL"
 69 | Name[en]="Bottom Solder Mask"
 70 | Prompt=""
 71 | Device="GERBER_RS274X"
 72 | Wheel=".whl"
 73 | Rack=""
 74 | Scale=1
 75 | Output=".GBS"
 76 | Flags="0 0 0 1 0 1 1"
 77 | Emulate="0"
 78 | Offset="0.0mil 0.0mil"
 79 | Sheet=1
 80 | Tolerance="0 0 0 0 0 0"
 81 | Pen="0.0mil 0"
 82 | Page="12000.0mil 8000.0mil"
 83 | Layers=" 30"
 84 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 85 | 
 86 | [Sec_5]
 87 | Name[C]="Board Outline"
 88 | Name[en]="Board Outline"
 89 | Prompt=""
 90 | Device="GERBER_RS274X"
 91 | Wheel=".whl"
 92 | Rack=""
 93 | Scale=1
 94 | Output=".GKO"
 95 | Flags="0 0 0 1 0 1 1"
 96 | Emulate="0"
 97 | Offset="0.0mil 0.0mil"
 98 | Sheet=1
 99 | Tolerance="0 0 0 0 0 0"
100 | Pen="0.0mil 0"
101 | Page="12000.0mil 8000.0mil"
102 | Layers=" 20 46"
103 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
104 | 
105 | [Sec_6]
106 | Name[C]="Excellion Drill"
107 | Name[en]="Excellion Drill"
108 | Prompt=""
109 | Device="EXCELLON"
110 | Wheel=".whl"
111 | Rack=""
112 | Scale=1
113 | Output=".TXT"
114 | Flags="0 0 0 1 0 1 1"
115 | Emulate="0"
116 | Offset="0.0mil 0.0mil"
117 | Sheet=1
118 | Tolerance="0 0 0 0 0 0"
119 | Pen="0.0mil 0"
120 | Page="12000.0mil 8000.0mil"
121 | Layers=" 44 45"
122 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
123 | 


--------------------------------------------------------------------------------
/PCBs/snes_visualization/snes_visualization_joiner/snes_visualization_joiner.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | 
 10 | [Sec_1]
 11 | Name[C]="Component side"
 12 | Name[en]="Top Copper Layer"
 13 | Prompt=""
 14 | Device="GERBER_RS274X"
 15 | Wheel=".whl"
 16 | Rack=""
 17 | Scale=1
 18 | Output=".GTL"
 19 | Flags="0 0 0 1 0 1 1"
 20 | Emulate="0"
 21 | Offset="0.0mil 0.0mil"
 22 | Sheet=1
 23 | Tolerance="0 0 0 0 0 0"
 24 | Pen="0.0mil 0"
 25 | Page="12000.0mil 8000.0mil"
 26 | Layers=" 1 17 18"
 27 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 28 | 
 29 | [Sec_2]
 30 | Name[C]="Solder side"
 31 | Name[en]="Bottom Copper Layer"
 32 | Prompt=""
 33 | Device="GERBER_RS274X"
 34 | Wheel=".whl"
 35 | Rack=""
 36 | Scale=1
 37 | Output=".GBL"
 38 | Flags="0 0 0 1 0 1 1"
 39 | Emulate="0"
 40 | Offset="0.0mil 0.0mil"
 41 | Sheet=1
 42 | Tolerance="0 0 0 0 0 0"
 43 | Pen="0.0mil 0"
 44 | Page="12000.0mil 8000.0mil"
 45 | Layers=" 16 17 18"
 46 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 47 | 
 48 | [Sec_3]
 49 | Name[C]="Solder stop mask CMP"
 50 | Name[en]="Top Solder Mask"
 51 | Prompt=""
 52 | Device="GERBER_RS274X"
 53 | Wheel=".whl"
 54 | Rack=""
 55 | Scale=1
 56 | Output=".GTS"
 57 | Flags="0 0 0 1 0 1 1"
 58 | Emulate="0"
 59 | Offset="0.0mil 0.0mil"
 60 | Sheet=1
 61 | Tolerance="0 0 0 0 0 0"
 62 | Pen="0.0mil 0"
 63 | Page="12000.0mil 8000.0mil"
 64 | Layers=" 29"
 65 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 66 | 
 67 | [Sec_4]
 68 | Name[C]="Solder stop mask SOL"
 69 | Name[en]="Bottom Solder Mask"
 70 | Prompt=""
 71 | Device="GERBER_RS274X"
 72 | Wheel=".whl"
 73 | Rack=""
 74 | Scale=1
 75 | Output=".GBS"
 76 | Flags="0 0 0 1 0 1 1"
 77 | Emulate="0"
 78 | Offset="0.0mil 0.0mil"
 79 | Sheet=1
 80 | Tolerance="0 0 0 0 0 0"
 81 | Pen="0.0mil 0"
 82 | Page="12000.0mil 8000.0mil"
 83 | Layers=" 30"
 84 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 85 | 
 86 | [Sec_5]
 87 | Name[C]="Board Outline"
 88 | Name[en]="Board Outline"
 89 | Prompt=""
 90 | Device="GERBER_RS274X"
 91 | Wheel=".whl"
 92 | Rack=""
 93 | Scale=1
 94 | Output=".GKO"
 95 | Flags="0 0 0 1 0 1 1"
 96 | Emulate="0"
 97 | Offset="0.0mil 0.0mil"
 98 | Sheet=1
 99 | Tolerance="0 0 0 0 0 0"
100 | Pen="0.0mil 0"
101 | Page="12000.0mil 8000.0mil"
102 | Layers=" 20 46"
103 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
104 | 
105 | [Sec_6]
106 | Name[C]="Excellion Drill"
107 | Name[en]="Excellion Drill"
108 | Prompt=""
109 | Device="EXCELLON"
110 | Wheel=".whl"
111 | Rack=""
112 | Scale=1
113 | Output=".TXT"
114 | Flags="0 0 0 1 0 1 1"
115 | Emulate="0"
116 | Offset="0.0mil 0.0mil"
117 | Sheet=1
118 | Tolerance="0 0 0 0 0 0"
119 | Pen="0.0mil 0"
120 | Page="12000.0mil 8000.0mil"
121 | Layers=" 44 45"
122 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
123 | 


--------------------------------------------------------------------------------
/PCBs/snes_visualization/snes_visualization_shoulder/snes_visualization_shoulder.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | 
 10 | [Sec_1]
 11 | Name[C]="Component side"
 12 | Name[en]="Top Copper Layer"
 13 | Prompt=""
 14 | Device="GERBER_RS274X"
 15 | Wheel=".whl"
 16 | Rack=""
 17 | Scale=1
 18 | Output=".GTL"
 19 | Flags="0 0 0 1 0 1 1"
 20 | Emulate="0"
 21 | Offset="0.0mil 0.0mil"
 22 | Sheet=1
 23 | Tolerance="0 0 0 0 0 0"
 24 | Pen="0.0mil 0"
 25 | Page="12000.0mil 8000.0mil"
 26 | Layers=" 1 17 18"
 27 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 28 | 
 29 | [Sec_2]
 30 | Name[C]="Solder side"
 31 | Name[en]="Bottom Copper Layer"
 32 | Prompt=""
 33 | Device="GERBER_RS274X"
 34 | Wheel=".whl"
 35 | Rack=""
 36 | Scale=1
 37 | Output=".GBL"
 38 | Flags="0 0 0 1 0 1 1"
 39 | Emulate="0"
 40 | Offset="0.0mil 0.0mil"
 41 | Sheet=1
 42 | Tolerance="0 0 0 0 0 0"
 43 | Pen="0.0mil 0"
 44 | Page="12000.0mil 8000.0mil"
 45 | Layers=" 16 17 18"
 46 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 47 | 
 48 | [Sec_3]
 49 | Name[C]="Solder stop mask CMP"
 50 | Name[en]="Top Solder Mask"
 51 | Prompt=""
 52 | Device="GERBER_RS274X"
 53 | Wheel=".whl"
 54 | Rack=""
 55 | Scale=1
 56 | Output=".GTS"
 57 | Flags="0 0 0 1 0 1 1"
 58 | Emulate="0"
 59 | Offset="0.0mil 0.0mil"
 60 | Sheet=1
 61 | Tolerance="0 0 0 0 0 0"
 62 | Pen="0.0mil 0"
 63 | Page="12000.0mil 8000.0mil"
 64 | Layers=" 29"
 65 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 66 | 
 67 | [Sec_4]
 68 | Name[C]="Solder stop mask SOL"
 69 | Name[en]="Bottom Solder Mask"
 70 | Prompt=""
 71 | Device="GERBER_RS274X"
 72 | Wheel=".whl"
 73 | Rack=""
 74 | Scale=1
 75 | Output=".GBS"
 76 | Flags="0 0 0 1 0 1 1"
 77 | Emulate="0"
 78 | Offset="0.0mil 0.0mil"
 79 | Sheet=1
 80 | Tolerance="0 0 0 0 0 0"
 81 | Pen="0.0mil 0"
 82 | Page="12000.0mil 8000.0mil"
 83 | Layers=" 30"
 84 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 85 | 
 86 | [Sec_5]
 87 | Name[C]="Board Outline"
 88 | Name[en]="Board Outline"
 89 | Prompt=""
 90 | Device="GERBER_RS274X"
 91 | Wheel=".whl"
 92 | Rack=""
 93 | Scale=1
 94 | Output=".GKO"
 95 | Flags="0 0 0 1 0 1 1"
 96 | Emulate="0"
 97 | Offset="0.0mil 0.0mil"
 98 | Sheet=1
 99 | Tolerance="0 0 0 0 0 0"
100 | Pen="0.0mil 0"
101 | Page="12000.0mil 8000.0mil"
102 | Layers=" 20 46"
103 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
104 | 
105 | [Sec_6]
106 | Name[C]="Excellion Drill"
107 | Name[en]="Excellion Drill"
108 | Prompt=""
109 | Device="EXCELLON"
110 | Wheel=".whl"
111 | Rack=""
112 | Scale=1
113 | Output=".TXT"
114 | Flags="0 0 0 1 0 1 1"
115 | Emulate="0"
116 | Offset="0.0mil 0.0mil"
117 | Sheet=1
118 | Tolerance="0 0 0 0 0 0"
119 | Pen="0.0mil 0"
120 | Page="12000.0mil 8000.0mil"
121 | Layers=" 44 45"
122 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
123 | 


--------------------------------------------------------------------------------
/HDL/TASLink/visualization.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | use IEEE.NUMERIC_STD.ALL;
  4 | 
  5 | entity visualization is
  6 |     Port ( clk : in  STD_LOGIC;
  7 |            data1 : in  STD_LOGIC_VECTOR (15 downto 0);
  8 |            data2 : in  STD_LOGIC_VECTOR (15 downto 0);
  9 |            data3 : in  STD_LOGIC_VECTOR (15 downto 0);
 10 |            data4 : in  STD_LOGIC_VECTOR (15 downto 0);
 11 |            latch : out  STD_LOGIC;
 12 |            clock : out  STD_LOGIC;
 13 |            d0 : out  STD_LOGIC;
 14 |            d1 : out  STD_LOGIC;
 15 |            d2 : out  STD_LOGIC;
 16 |            d3 : out  STD_LOGIC);
 17 | end visualization;
 18 | 
 19 | architecture Behavioral of visualization is
 20 |   signal counter : integer range 0 to 39 := 0;
 21 |   signal latched_data1 : std_logic_vector(15 downto 0) := (others => '0');
 22 |   signal latched_data2 : std_logic_vector(15 downto 0) := (others => '0');
 23 |   signal latched_data3 : std_logic_vector(15 downto 0) := (others => '0');
 24 |   signal latched_data4 : std_logic_vector(15 downto 0) := (others => '0');
 25 | begin
 26 | 
 27 | process (CLK)
 28 |   variable cycle_count : integer range 0 to 15 := 0;
 29 | begin
 30 |   if (rising_edge(CLK)) then
 31 |     if (cycle_count = 15) then
 32 |       if (counter = 39) then
 33 |         counter <= 0;
 34 |         latched_data1 <= data1;
 35 |         latched_data2 <= data2;
 36 |         latched_data3 <= data3;
 37 |         latched_data4 <= data4;
 38 |       else
 39 |         counter <= counter + 1;
 40 |       end if;
 41 |       
 42 |       cycle_count := 0;
 43 |     else
 44 |       cycle_count := cycle_count + 1;
 45 |     end if;
 46 |   end if;
 47 | end process;
 48 | 
 49 | 
 50 | latch <= '1' when (counter = 34 or counter = 35 or counter = 36 or counter = 37) else
 51 |          '0';
 52 | 
 53 | clock <= '1' when (counter = 1 or counter = 3 or counter = 5 or counter = 7 or counter = 9 or counter = 11 or counter = 13 or counter = 15 or counter = 17 or counter = 19 or counter = 21 or counter = 23 or counter = 25 or counter = 27 or counter = 29 or counter = 31) else
 54 |          '0';
 55 | 
 56 | d0 <= latched_data1(14) when (counter = 2 or counter = 3) else
 57 |       latched_data1(13) when (counter = 4 or counter = 5) else
 58 |       latched_data1(12) when (counter = 6 or counter = 7) else
 59 |       latched_data1(11) when (counter = 8 or counter = 9) else
 60 |       latched_data1(10) when (counter = 10 or counter = 11) else
 61 |       latched_data1(9) when (counter = 12 or counter = 13) else
 62 |       latched_data1(8) when (counter = 14 or counter = 15) else
 63 |       latched_data1(7) when (counter = 16 or counter = 17) else
 64 |       latched_data1(6) when (counter = 18 or counter = 19) else
 65 |       latched_data1(5) when (counter = 20 or counter = 21) else
 66 |       latched_data1(4) when (counter = 22 or counter = 23) else
 67 |       latched_data1(3) when (counter = 24 or counter = 25) else
 68 |       latched_data1(2) when (counter = 26 or counter = 27) else
 69 |       latched_data1(1) when (counter = 28 or counter = 29) else
 70 |       latched_data1(0) when (counter = 30 or counter = 31) else
 71 |       latched_data1(15);
 72 | 
 73 | d1 <= latched_data2(14) when (counter = 2 or counter = 3) else
 74 |       latched_data2(13) when (counter = 4 or counter = 5) else
 75 |       latched_data2(12) when (counter = 6 or counter = 7) else
 76 |       latched_data2(11) when (counter = 8 or counter = 9) else
 77 |       latched_data2(10) when (counter = 10 or counter = 11) else
 78 |       latched_data2(9) when (counter = 12 or counter = 13) else
 79 |       latched_data2(8) when (counter = 14 or counter = 15) else
 80 |       latched_data2(7) when (counter = 16 or counter = 17) else
 81 |       latched_data2(6) when (counter = 18 or counter = 19) else
 82 |       latched_data2(5) when (counter = 20 or counter = 21) else
 83 |       latched_data2(4) when (counter = 22 or counter = 23) else
 84 |       latched_data2(3) when (counter = 24 or counter = 25) else
 85 |       latched_data2(2) when (counter = 26 or counter = 27) else
 86 |       latched_data2(1) when (counter = 28 or counter = 29) else
 87 |       latched_data2(0) when (counter = 30 or counter = 31) else
 88 |       latched_data2(15);
 89 | 
 90 | d2 <= latched_data3(14) when (counter = 2 or counter = 3) else
 91 |       latched_data3(13) when (counter = 4 or counter = 5) else
 92 |       latched_data3(12) when (counter = 6 or counter = 7) else
 93 |       latched_data3(11) when (counter = 8 or counter = 9) else
 94 |       latched_data3(10) when (counter = 10 or counter = 11) else
 95 |       latched_data3(9) when (counter = 12 or counter = 13) else
 96 |       latched_data3(8) when (counter = 14 or counter = 15) else
 97 |       latched_data3(7) when (counter = 16 or counter = 17) else
 98 |       latched_data3(6) when (counter = 18 or counter = 19) else
 99 |       latched_data3(5) when (counter = 20 or counter = 21) else
100 |       latched_data3(4) when (counter = 22 or counter = 23) else
101 |       latched_data3(3) when (counter = 24 or counter = 25) else
102 |       latched_data3(2) when (counter = 26 or counter = 27) else
103 |       latched_data3(1) when (counter = 28 or counter = 29) else
104 |       latched_data3(0) when (counter = 30 or counter = 31) else
105 |       latched_data3(15);
106 | 
107 | d3 <= latched_data4(14) when (counter = 2 or counter = 3) else
108 |       latched_data4(13) when (counter = 4 or counter = 5) else
109 |       latched_data4(12) when (counter = 6 or counter = 7) else
110 |       latched_data4(11) when (counter = 8 or counter = 9) else
111 |       latched_data4(10) when (counter = 10 or counter = 11) else
112 |       latched_data4(9) when (counter = 12 or counter = 13) else
113 |       latched_data4(8) when (counter = 14 or counter = 15) else
114 |       latched_data4(7) when (counter = 16 or counter = 17) else
115 |       latched_data4(6) when (counter = 18 or counter = 19) else
116 |       latched_data4(5) when (counter = 20 or counter = 21) else
117 |       latched_data4(4) when (counter = 22 or counter = 23) else
118 |       latched_data4(3) when (counter = 24 or counter = 25) else
119 |       latched_data4(2) when (counter = 26 or counter = 27) else
120 |       latched_data4(1) when (counter = 28 or counter = 29) else
121 |       latched_data4(0) when (counter = 30 or counter = 31) else
122 |       latched_data4(15);
123 | 
124 | end Behavioral;
125 | 
126 | 


--------------------------------------------------------------------------------
/PCBs/n64_4_port/n64_4_port.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | Section=Sec_7
 10 | 
 11 | [Sec_1]
 12 | Name[C]="Component side"
 13 | Name[en]="Top Copper Layer"
 14 | Prompt=""
 15 | Device="GERBER_RS274X"
 16 | Wheel=".whl"
 17 | Rack=""
 18 | Scale=1
 19 | Output=".GTL"
 20 | Flags="0 0 0 1 0 1 1"
 21 | Emulate="0"
 22 | Offset="0.0mil 0.0mil"
 23 | Sheet=1
 24 | Tolerance="0 0 0 0 0 0"
 25 | Pen="0.0mil 0"
 26 | Page="12000.0mil 8000.0mil"
 27 | Layers=" 1 17 18"
 28 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 29 | 
 30 | [Sec_2]
 31 | Name[C]="Solder side"
 32 | Name[en]="Bottom Copper Layer"
 33 | Prompt=""
 34 | Device="GERBER_RS274X"
 35 | Wheel=".whl"
 36 | Rack=""
 37 | Scale=1
 38 | Output=".GBL"
 39 | Flags="0 0 0 1 0 1 1"
 40 | Emulate="0"
 41 | Offset="0.0mil 0.0mil"
 42 | Sheet=1
 43 | Tolerance="0 0 0 0 0 0"
 44 | Pen="0.0mil 0"
 45 | Page="12000.0mil 8000.0mil"
 46 | Layers=" 16 17 18"
 47 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 48 | 
 49 | [Sec_3]
 50 | Name[C]="Silk screen CMP"
 51 | Name[en]="Top Silkscreen "
 52 | Prompt=""
 53 | Device="GERBER_RS274X"
 54 | Wheel=".whl"
 55 | Rack=""
 56 | Scale=1
 57 | Output=".GTO"
 58 | Flags="0 0 0 1 0 1 1"
 59 | Emulate="0"
 60 | Offset="0.0mil 0.0mil"
 61 | Sheet=1
 62 | Tolerance="0 0 0 0 0 0"
 63 | Pen="0.0mil 0"
 64 | Page="12000.0mil 8000.0mil"
 65 | Layers=" 21 25"
 66 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 67 | 
 68 | [Sec_4]
 69 | Name[C]="Solder stop mask CMP"
 70 | Name[en]="Top Solder Mask"
 71 | Prompt=""
 72 | Device="GERBER_RS274X"
 73 | Wheel=".whl"
 74 | Rack=""
 75 | Scale=1
 76 | Output=".GTS"
 77 | Flags="0 0 0 1 0 1 1"
 78 | Emulate="0"
 79 | Offset="0.0mil 0.0mil"
 80 | Sheet=1
 81 | Tolerance="0 0 0 0 0 0"
 82 | Pen="0.0mil 0"
 83 | Page="12000.0mil 8000.0mil"
 84 | Layers=" 29"
 85 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 86 | 
 87 | [Sec_5]
 88 | Name[C]="Solder stop mask SOL"
 89 | Name[en]="Bottom Solder Mask"
 90 | Prompt=""
 91 | Device="GERBER_RS274X"
 92 | Wheel=".whl"
 93 | Rack=""
 94 | Scale=1
 95 | Output=".GBS"
 96 | Flags="0 0 0 1 0 1 1"
 97 | Emulate="0"
 98 | Offset="0.0mil 0.0mil"
 99 | Sheet=1
100 | Tolerance="0 0 0 0 0 0"
101 | Pen="0.0mil 0"
102 | Page="12000.0mil 8000.0mil"
103 | Layers=" 30"
104 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
105 | 
106 | [Sec_6]
107 | Name[C]="Board Outline"
108 | Name[en]="Board Outline"
109 | Prompt=""
110 | Device="GERBER_RS274X"
111 | Wheel=".whl"
112 | Rack=""
113 | Scale=1
114 | Output=".GKO"
115 | Flags="0 0 0 1 0 1 1"
116 | Emulate="0"
117 | Offset="0.0mil 0.0mil"
118 | Sheet=1
119 | Tolerance="0 0 0 0 0 0"
120 | Pen="0.0mil 0"
121 | Page="12000.0mil 8000.0mil"
122 | Layers=" 20 46"
123 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
124 | 
125 | [Sec_7]
126 | Name[C]="Excellion Drill"
127 | Name[en]="Excellion Drill"
128 | Prompt=""
129 | Device="EXCELLON"
130 | Wheel=".whl"
131 | Rack=""
132 | Scale=1
133 | Output=".TXT"
134 | Flags="0 0 0 1 0 1 1"
135 | Emulate="0"
136 | Offset="0.0mil 0.0mil"
137 | Sheet=1
138 | Tolerance="0 0 0 0 0 0"
139 | Pen="0.0mil 0"
140 | Page="12000.0mil 8000.0mil"
141 | Layers=" 44 45"
142 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
143 | 


--------------------------------------------------------------------------------
/PCBs/nes_mini/nes_mini.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | Section=Sec_7
 10 | 
 11 | [Sec_1]
 12 | Name[C]="Component side"
 13 | Name[en]="Top Copper Layer"
 14 | Prompt=""
 15 | Device="GERBER_RS274X"
 16 | Wheel=".whl"
 17 | Rack=""
 18 | Scale=1
 19 | Output=".GTL"
 20 | Flags="0 0 0 1 0 1 1"
 21 | Emulate="0"
 22 | Offset="0.0mil 0.0mil"
 23 | Sheet=1
 24 | Tolerance="0 0 0 0 0 0"
 25 | Pen="0.0mil 0"
 26 | Page="12000.0mil 8000.0mil"
 27 | Layers=" 1 17 18"
 28 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 29 | 
 30 | [Sec_2]
 31 | Name[C]="Solder side"
 32 | Name[en]="Bottom Copper Layer"
 33 | Prompt=""
 34 | Device="GERBER_RS274X"
 35 | Wheel=".whl"
 36 | Rack=""
 37 | Scale=1
 38 | Output=".GBL"
 39 | Flags="0 0 0 1 0 1 1"
 40 | Emulate="0"
 41 | Offset="0.0mil 0.0mil"
 42 | Sheet=1
 43 | Tolerance="0 0 0 0 0 0"
 44 | Pen="0.0mil 0"
 45 | Page="12000.0mil 8000.0mil"
 46 | Layers=" 16 17 18"
 47 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 48 | 
 49 | [Sec_3]
 50 | Name[C]="Silk screen CMP"
 51 | Name[en]="Top Silkscreen "
 52 | Prompt=""
 53 | Device="GERBER_RS274X"
 54 | Wheel=".whl"
 55 | Rack=""
 56 | Scale=1
 57 | Output=".GTO"
 58 | Flags="0 0 0 1 0 1 1"
 59 | Emulate="0"
 60 | Offset="0.0mil 0.0mil"
 61 | Sheet=1
 62 | Tolerance="0 0 0 0 0 0"
 63 | Pen="0.0mil 0"
 64 | Page="12000.0mil 8000.0mil"
 65 | Layers=" 21 25"
 66 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 67 | 
 68 | [Sec_4]
 69 | Name[C]="Solder stop mask CMP"
 70 | Name[en]="Top Solder Mask"
 71 | Prompt=""
 72 | Device="GERBER_RS274X"
 73 | Wheel=".whl"
 74 | Rack=""
 75 | Scale=1
 76 | Output=".GTS"
 77 | Flags="0 0 0 1 0 1 1"
 78 | Emulate="0"
 79 | Offset="0.0mil 0.0mil"
 80 | Sheet=1
 81 | Tolerance="0 0 0 0 0 0"
 82 | Pen="0.0mil 0"
 83 | Page="12000.0mil 8000.0mil"
 84 | Layers=" 29"
 85 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 86 | 
 87 | [Sec_5]
 88 | Name[C]="Solder stop mask SOL"
 89 | Name[en]="Bottom Solder Mask"
 90 | Prompt=""
 91 | Device="GERBER_RS274X"
 92 | Wheel=".whl"
 93 | Rack=""
 94 | Scale=1
 95 | Output=".GBS"
 96 | Flags="0 0 0 1 0 1 1"
 97 | Emulate="0"
 98 | Offset="0.0mil 0.0mil"
 99 | Sheet=1
100 | Tolerance="0 0 0 0 0 0"
101 | Pen="0.0mil 0"
102 | Page="12000.0mil 8000.0mil"
103 | Layers=" 30"
104 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
105 | 
106 | [Sec_6]
107 | Name[C]="Board Outline"
108 | Name[en]="Board Outline"
109 | Prompt=""
110 | Device="GERBER_RS274X"
111 | Wheel=".whl"
112 | Rack=""
113 | Scale=1
114 | Output=".GKO"
115 | Flags="0 0 0 1 0 1 1"
116 | Emulate="0"
117 | Offset="0.0mil 0.0mil"
118 | Sheet=1
119 | Tolerance="0 0 0 0 0 0"
120 | Pen="0.0mil 0"
121 | Page="12000.0mil 8000.0mil"
122 | Layers=" 20 46"
123 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
124 | 
125 | [Sec_7]
126 | Name[C]="Excellion Drill"
127 | Name[en]="Excellion Drill"
128 | Prompt=""
129 | Device="EXCELLON"
130 | Wheel=".whl"
131 | Rack=""
132 | Scale=1
133 | Output=".TXT"
134 | Flags="0 0 0 1 0 1 1"
135 | Emulate="0"
136 | Offset="0.0mil 0.0mil"
137 | Sheet=1
138 | Tolerance="0 0 0 0 0 0"
139 | Pen="0.0mil 0"
140 | Page="12000.0mil 8000.0mil"
141 | Layers=" 44 45"
142 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
143 | 


--------------------------------------------------------------------------------
/PCBs/nes_snes_4_port/nes_snes_4_port.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | Section=Sec_7
 10 | 
 11 | [Sec_1]
 12 | Name[C]="Component side"
 13 | Name[en]="Top Copper Layer"
 14 | Prompt=""
 15 | Device="GERBER_RS274X"
 16 | Wheel=".whl"
 17 | Rack=""
 18 | Scale=1
 19 | Output=".GTL"
 20 | Flags="0 0 0 1 0 1 1"
 21 | Emulate="0"
 22 | Offset="0.0mil 0.0mil"
 23 | Sheet=1
 24 | Tolerance="0 0 0 0 0 0"
 25 | Pen="0.0mil 0"
 26 | Page="12000.0mil 8000.0mil"
 27 | Layers=" 1 17 18"
 28 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 29 | 
 30 | [Sec_2]
 31 | Name[C]="Solder side"
 32 | Name[en]="Bottom Copper Layer"
 33 | Prompt=""
 34 | Device="GERBER_RS274X"
 35 | Wheel=".whl"
 36 | Rack=""
 37 | Scale=1
 38 | Output=".GBL"
 39 | Flags="0 0 0 1 0 1 1"
 40 | Emulate="0"
 41 | Offset="0.0mil 0.0mil"
 42 | Sheet=1
 43 | Tolerance="0 0 0 0 0 0"
 44 | Pen="0.0mil 0"
 45 | Page="12000.0mil 8000.0mil"
 46 | Layers=" 16 17 18"
 47 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 48 | 
 49 | [Sec_3]
 50 | Name[C]="Silk screen CMP"
 51 | Name[en]="Top Silkscreen "
 52 | Prompt=""
 53 | Device="GERBER_RS274X"
 54 | Wheel=".whl"
 55 | Rack=""
 56 | Scale=1
 57 | Output=".GTO"
 58 | Flags="0 0 0 1 0 1 1"
 59 | Emulate="0"
 60 | Offset="0.0mil 0.0mil"
 61 | Sheet=1
 62 | Tolerance="0 0 0 0 0 0"
 63 | Pen="0.0mil 0"
 64 | Page="12000.0mil 8000.0mil"
 65 | Layers=" 21 25"
 66 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 67 | 
 68 | [Sec_4]
 69 | Name[C]="Solder stop mask CMP"
 70 | Name[en]="Top Solder Mask"
 71 | Prompt=""
 72 | Device="GERBER_RS274X"
 73 | Wheel=".whl"
 74 | Rack=""
 75 | Scale=1
 76 | Output=".GTS"
 77 | Flags="0 0 0 1 0 1 1"
 78 | Emulate="0"
 79 | Offset="0.0mil 0.0mil"
 80 | Sheet=1
 81 | Tolerance="0 0 0 0 0 0"
 82 | Pen="0.0mil 0"
 83 | Page="12000.0mil 8000.0mil"
 84 | Layers=" 29"
 85 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 86 | 
 87 | [Sec_5]
 88 | Name[C]="Solder stop mask SOL"
 89 | Name[en]="Bottom Solder Mask"
 90 | Prompt=""
 91 | Device="GERBER_RS274X"
 92 | Wheel=".whl"
 93 | Rack=""
 94 | Scale=1
 95 | Output=".GBS"
 96 | Flags="0 0 0 1 0 1 1"
 97 | Emulate="0"
 98 | Offset="0.0mil 0.0mil"
 99 | Sheet=1
100 | Tolerance="0 0 0 0 0 0"
101 | Pen="0.0mil 0"
102 | Page="12000.0mil 8000.0mil"
103 | Layers=" 30"
104 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
105 | 
106 | [Sec_6]
107 | Name[C]="Board Outline"
108 | Name[en]="Board Outline"
109 | Prompt=""
110 | Device="GERBER_RS274X"
111 | Wheel=".whl"
112 | Rack=""
113 | Scale=1
114 | Output=".GKO"
115 | Flags="0 0 0 1 0 1 1"
116 | Emulate="0"
117 | Offset="0.0mil 0.0mil"
118 | Sheet=1
119 | Tolerance="0 0 0 0 0 0"
120 | Pen="0.0mil 0"
121 | Page="12000.0mil 8000.0mil"
122 | Layers=" 20 46"
123 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
124 | 
125 | [Sec_7]
126 | Name[C]="Excellion Drill"
127 | Name[en]="Excellion Drill"
128 | Prompt=""
129 | Device="EXCELLON"
130 | Wheel=".whl"
131 | Rack=""
132 | Scale=1
133 | Output=".TXT"
134 | Flags="0 0 0 1 0 1 1"
135 | Emulate="0"
136 | Offset="0.0mil 0.0mil"
137 | Sheet=1
138 | Tolerance="0 0 0 0 0 0"
139 | Pen="0.0mil 0"
140 | Page="12000.0mil 8000.0mil"
141 | Layers=" 44 45"
142 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
143 | 


--------------------------------------------------------------------------------
/PCBs/snes_ext_port_adapter/snes_ext_port_adapter.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | Section=Sec_7
 10 | 
 11 | [Sec_1]
 12 | Name[C]="Component side"
 13 | Name[en]="Top Copper Layer"
 14 | Prompt=""
 15 | Device="GERBER_RS274X"
 16 | Wheel=".whl"
 17 | Rack=""
 18 | Scale=1
 19 | Output=".GTL"
 20 | Flags="0 0 0 1 0 1 1"
 21 | Emulate="0"
 22 | Offset="0.0mil 0.0mil"
 23 | Sheet=1
 24 | Tolerance="0 0 0 0 0 0"
 25 | Pen="0.0mil 0"
 26 | Page="12000.0mil 8000.0mil"
 27 | Layers=" 1 17 18"
 28 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 29 | 
 30 | [Sec_2]
 31 | Name[C]="Solder side"
 32 | Name[en]="Bottom Copper Layer"
 33 | Prompt=""
 34 | Device="GERBER_RS274X"
 35 | Wheel=".whl"
 36 | Rack=""
 37 | Scale=1
 38 | Output=".GBL"
 39 | Flags="0 0 0 1 0 1 1"
 40 | Emulate="0"
 41 | Offset="0.0mil 0.0mil"
 42 | Sheet=1
 43 | Tolerance="0 0 0 0 0 0"
 44 | Pen="0.0mil 0"
 45 | Page="12000.0mil 8000.0mil"
 46 | Layers=" 16 17 18"
 47 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 48 | 
 49 | [Sec_3]
 50 | Name[C]="Silk screen CMP"
 51 | Name[en]="Top Silkscreen "
 52 | Prompt=""
 53 | Device="GERBER_RS274X"
 54 | Wheel=".whl"
 55 | Rack=""
 56 | Scale=1
 57 | Output=".GTO"
 58 | Flags="0 0 0 1 0 1 1"
 59 | Emulate="0"
 60 | Offset="0.0mil 0.0mil"
 61 | Sheet=1
 62 | Tolerance="0 0 0 0 0 0"
 63 | Pen="0.0mil 0"
 64 | Page="12000.0mil 8000.0mil"
 65 | Layers=" 21 25"
 66 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 67 | 
 68 | [Sec_4]
 69 | Name[C]="Solder stop mask CMP"
 70 | Name[en]="Top Solder Mask"
 71 | Prompt=""
 72 | Device="GERBER_RS274X"
 73 | Wheel=".whl"
 74 | Rack=""
 75 | Scale=1
 76 | Output=".GTS"
 77 | Flags="0 0 0 1 0 1 1"
 78 | Emulate="0"
 79 | Offset="0.0mil 0.0mil"
 80 | Sheet=1
 81 | Tolerance="0 0 0 0 0 0"
 82 | Pen="0.0mil 0"
 83 | Page="12000.0mil 8000.0mil"
 84 | Layers=" 29"
 85 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 86 | 
 87 | [Sec_5]
 88 | Name[C]="Solder stop mask SOL"
 89 | Name[en]="Bottom Solder Mask"
 90 | Prompt=""
 91 | Device="GERBER_RS274X"
 92 | Wheel=".whl"
 93 | Rack=""
 94 | Scale=1
 95 | Output=".GBS"
 96 | Flags="0 0 0 1 0 1 1"
 97 | Emulate="0"
 98 | Offset="0.0mil 0.0mil"
 99 | Sheet=1
100 | Tolerance="0 0 0 0 0 0"
101 | Pen="0.0mil 0"
102 | Page="12000.0mil 8000.0mil"
103 | Layers=" 30"
104 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
105 | 
106 | [Sec_6]
107 | Name[C]="Board Outline"
108 | Name[en]="Board Outline"
109 | Prompt=""
110 | Device="GERBER_RS274X"
111 | Wheel=".whl"
112 | Rack=""
113 | Scale=1
114 | Output=".GKO"
115 | Flags="0 0 0 1 0 1 1"
116 | Emulate="0"
117 | Offset="0.0mil 0.0mil"
118 | Sheet=1
119 | Tolerance="0 0 0 0 0 0"
120 | Pen="0.0mil 0"
121 | Page="12000.0mil 8000.0mil"
122 | Layers=" 20 46"
123 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
124 | 
125 | [Sec_7]
126 | Name[C]="Excellion Drill"
127 | Name[en]="Excellion Drill"
128 | Prompt=""
129 | Device="EXCELLON"
130 | Wheel=".whl"
131 | Rack=""
132 | Scale=1
133 | Output=".TXT"
134 | Flags="0 0 0 1 0 1 1"
135 | Emulate="0"
136 | Offset="0.0mil 0.0mil"
137 | Sheet=1
138 | Tolerance="0 0 0 0 0 0"
139 | Pen="0.0mil 0"
140 | Page="12000.0mil 8000.0mil"
141 | Layers=" 44 45"
142 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
143 | 


--------------------------------------------------------------------------------
/PCBs/visualization_breakout_4_port/visualization_breakout_4_port.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | Section=Sec_7
 10 | 
 11 | [Sec_1]
 12 | Name[C]="Component side"
 13 | Name[en]="Top Copper Layer"
 14 | Prompt=""
 15 | Device="GERBER_RS274X"
 16 | Wheel=".whl"
 17 | Rack=""
 18 | Scale=1
 19 | Output=".GTL"
 20 | Flags="0 0 0 1 0 1 1"
 21 | Emulate="0"
 22 | Offset="0.0mil 0.0mil"
 23 | Sheet=1
 24 | Tolerance="0 0 0 0 0 0"
 25 | Pen="0.0mil 0"
 26 | Page="12000.0mil 8000.0mil"
 27 | Layers=" 1 17 18"
 28 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 29 | 
 30 | [Sec_2]
 31 | Name[C]="Solder side"
 32 | Name[en]="Bottom Copper Layer"
 33 | Prompt=""
 34 | Device="GERBER_RS274X"
 35 | Wheel=".whl"
 36 | Rack=""
 37 | Scale=1
 38 | Output=".GBL"
 39 | Flags="0 0 0 1 0 1 1"
 40 | Emulate="0"
 41 | Offset="0.0mil 0.0mil"
 42 | Sheet=1
 43 | Tolerance="0 0 0 0 0 0"
 44 | Pen="0.0mil 0"
 45 | Page="12000.0mil 8000.0mil"
 46 | Layers=" 16 17 18"
 47 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 48 | 
 49 | [Sec_3]
 50 | Name[C]="Silk screen CMP"
 51 | Name[en]="Top Silkscreen "
 52 | Prompt=""
 53 | Device="GERBER_RS274X"
 54 | Wheel=".whl"
 55 | Rack=""
 56 | Scale=1
 57 | Output=".GTO"
 58 | Flags="0 0 0 1 0 1 1"
 59 | Emulate="0"
 60 | Offset="0.0mil 0.0mil"
 61 | Sheet=1
 62 | Tolerance="0 0 0 0 0 0"
 63 | Pen="0.0mil 0"
 64 | Page="12000.0mil 8000.0mil"
 65 | Layers=" 21 25"
 66 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 67 | 
 68 | [Sec_4]
 69 | Name[C]="Solder stop mask CMP"
 70 | Name[en]="Top Solder Mask"
 71 | Prompt=""
 72 | Device="GERBER_RS274X"
 73 | Wheel=".whl"
 74 | Rack=""
 75 | Scale=1
 76 | Output=".GTS"
 77 | Flags="0 0 0 1 0 1 1"
 78 | Emulate="0"
 79 | Offset="0.0mil 0.0mil"
 80 | Sheet=1
 81 | Tolerance="0 0 0 0 0 0"
 82 | Pen="0.0mil 0"
 83 | Page="12000.0mil 8000.0mil"
 84 | Layers=" 29"
 85 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 86 | 
 87 | [Sec_5]
 88 | Name[C]="Solder stop mask SOL"
 89 | Name[en]="Bottom Solder Mask"
 90 | Prompt=""
 91 | Device="GERBER_RS274X"
 92 | Wheel=".whl"
 93 | Rack=""
 94 | Scale=1
 95 | Output=".GBS"
 96 | Flags="0 0 0 1 0 1 1"
 97 | Emulate="0"
 98 | Offset="0.0mil 0.0mil"
 99 | Sheet=1
100 | Tolerance="0 0 0 0 0 0"
101 | Pen="0.0mil 0"
102 | Page="12000.0mil 8000.0mil"
103 | Layers=" 30"
104 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
105 | 
106 | [Sec_6]
107 | Name[C]="Board Outline"
108 | Name[en]="Board Outline"
109 | Prompt=""
110 | Device="GERBER_RS274X"
111 | Wheel=".whl"
112 | Rack=""
113 | Scale=1
114 | Output=".GKO"
115 | Flags="0 0 0 1 0 1 1"
116 | Emulate="0"
117 | Offset="0.0mil 0.0mil"
118 | Sheet=1
119 | Tolerance="0 0 0 0 0 0"
120 | Pen="0.0mil 0"
121 | Page="12000.0mil 8000.0mil"
122 | Layers=" 20 46"
123 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
124 | 
125 | [Sec_7]
126 | Name[C]="Excellion Drill"
127 | Name[en]="Excellion Drill"
128 | Prompt=""
129 | Device="EXCELLON"
130 | Wheel=".whl"
131 | Rack=""
132 | Scale=1
133 | Output=".TXT"
134 | Flags="0 0 0 1 0 1 1"
135 | Emulate="0"
136 | Offset="0.0mil 0.0mil"
137 | Sheet=1
138 | Tolerance="0 0 0 0 0 0"
139 | Pen="0.0mil 0"
140 | Page="12000.0mil 8000.0mil"
141 | Layers=" 44 45"
142 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
143 | 


--------------------------------------------------------------------------------
/PCBs/visualization_breakout_2_port/visualization_breakout_2_port.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | Section=Sec_7
 10 | 
 11 | [Sec_1]
 12 | Name[C]="Component side"
 13 | Name[en]="Top Copper Layer"
 14 | Prompt=""
 15 | Device="GERBER_RS274X"
 16 | Wheel=".whl"
 17 | Rack=""
 18 | Scale=1
 19 | Output=".GTL"
 20 | Flags="0 0 0 1 0 1 1"
 21 | Emulate="0"
 22 | Offset="0.0mil 0.0mil"
 23 | Sheet=1
 24 | Tolerance="0 0 0 0 0 0"
 25 | Pen="0.0mil 0"
 26 | Page="12000.0mil 8000.0mil"
 27 | Layers=" 1 17 18"
 28 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 29 | 
 30 | [Sec_2]
 31 | Name[C]="Solder side"
 32 | Name[en]="Bottom Copper Layer"
 33 | Prompt=""
 34 | Device="GERBER_RS274X"
 35 | Wheel=".whl"
 36 | Rack=""
 37 | Scale=1
 38 | Output=".GBL"
 39 | Flags="0 0 0 1 0 1 1"
 40 | Emulate="0"
 41 | Offset="0.0mil 0.0mil"
 42 | Sheet=1
 43 | Tolerance="0 0 0 0 0 0"
 44 | Pen="0.0mil 0"
 45 | Page="12000.0mil 8000.0mil"
 46 | Layers=" 16 17 18"
 47 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 48 | 
 49 | [Sec_3]
 50 | Name[C]="Silk screen CMP"
 51 | Name[en]="Bottom Silkscreen "
 52 | Prompt=""
 53 | Device="GERBER_RS274X"
 54 | Wheel=".whl"
 55 | Rack=""
 56 | Scale=1
 57 | Output=".GBO"
 58 | Flags="0 0 0 1 0 1 1"
 59 | Emulate="0"
 60 | Offset="0.0mil 0.0mil"
 61 | Sheet=1
 62 | Tolerance="0 0 0 0 0 0"
 63 | Pen="0.0mil 0"
 64 | Page="12000.0mil 8000.0mil"
 65 | Layers=" 22 26"
 66 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 67 | 
 68 | [Sec_4]
 69 | Name[C]="Solder stop mask CMP"
 70 | Name[en]="Top Solder Mask"
 71 | Prompt=""
 72 | Device="GERBER_RS274X"
 73 | Wheel=".whl"
 74 | Rack=""
 75 | Scale=1
 76 | Output=".GTS"
 77 | Flags="0 0 0 1 0 1 1"
 78 | Emulate="0"
 79 | Offset="0.0mil 0.0mil"
 80 | Sheet=1
 81 | Tolerance="0 0 0 0 0 0"
 82 | Pen="0.0mil 0"
 83 | Page="12000.0mil 8000.0mil"
 84 | Layers=" 29"
 85 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 86 | 
 87 | [Sec_5]
 88 | Name[C]="Solder stop mask SOL"
 89 | Name[en]="Bottom Solder Mask"
 90 | Prompt=""
 91 | Device="GERBER_RS274X"
 92 | Wheel=".whl"
 93 | Rack=""
 94 | Scale=1
 95 | Output=".GBS"
 96 | Flags="0 0 0 1 0 1 1"
 97 | Emulate="0"
 98 | Offset="0.0mil 0.0mil"
 99 | Sheet=1
100 | Tolerance="0 0 0 0 0 0"
101 | Pen="0.0mil 0"
102 | Page="12000.0mil 8000.0mil"
103 | Layers=" 30"
104 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
105 | 
106 | [Sec_6]
107 | Name[C]="Board Outline"
108 | Name[en]="Board Outline"
109 | Prompt=""
110 | Device="GERBER_RS274X"
111 | Wheel=".whl"
112 | Rack=""
113 | Scale=1
114 | Output=".GKO"
115 | Flags="0 0 0 1 0 1 1"
116 | Emulate="0"
117 | Offset="0.0mil 0.0mil"
118 | Sheet=1
119 | Tolerance="0 0 0 0 0 0"
120 | Pen="0.0mil 0"
121 | Page="12000.0mil 8000.0mil"
122 | Layers=" 20 46"
123 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
124 | 
125 | [Sec_7]
126 | Name[C]="Excellion Drill"
127 | Name[en]="Excellion Drill"
128 | Prompt=""
129 | Device="EXCELLON"
130 | Wheel=".whl"
131 | Rack=""
132 | Scale=1
133 | Output=".TXT"
134 | Flags="0 0 0 1 0 1 1"
135 | Emulate="0"
136 | Offset="0.0mil 0.0mil"
137 | Sheet=1
138 | Tolerance="0 0 0 0 0 0"
139 | Pen="0.0mil 0"
140 | Page="12000.0mil 8000.0mil"
141 | Layers=" 44 45"
142 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
143 | 


--------------------------------------------------------------------------------
/PCBs/snes_visualization/snes_visualization_right/snes_visualization_right.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | Section=Sec_7
 10 | 
 11 | [Sec_1]
 12 | Name[C]="Component side"
 13 | Name[en]="Top Copper Layer"
 14 | Prompt=""
 15 | Device="GERBER_RS274X"
 16 | Wheel=".whl"
 17 | Rack=""
 18 | Scale=1
 19 | Output=".GTL"
 20 | Flags="0 0 0 1 0 1 1"
 21 | Emulate="0"
 22 | Offset="0.0mil 0.0mil"
 23 | Sheet=1
 24 | Tolerance="0 0 0 0 0 0"
 25 | Pen="0.0mil 0"
 26 | Page="12000.0mil 8000.0mil"
 27 | Layers=" 1 17 18"
 28 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 29 | 
 30 | [Sec_2]
 31 | Name[C]="Solder side"
 32 | Name[en]="Bottom Copper Layer"
 33 | Prompt=""
 34 | Device="GERBER_RS274X"
 35 | Wheel=".whl"
 36 | Rack=""
 37 | Scale=1
 38 | Output=".GBL"
 39 | Flags="0 0 0 1 0 1 1"
 40 | Emulate="0"
 41 | Offset="0.0mil 0.0mil"
 42 | Sheet=1
 43 | Tolerance="0 0 0 0 0 0"
 44 | Pen="0.0mil 0"
 45 | Page="12000.0mil 8000.0mil"
 46 | Layers=" 16 17 18"
 47 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 48 | 
 49 | [Sec_3]
 50 | Name[C]="Silk screen CMP"
 51 | Name[en]="Top Silkscreen "
 52 | Prompt=""
 53 | Device="GERBER_RS274X"
 54 | Wheel=".whl"
 55 | Rack=""
 56 | Scale=1
 57 | Output=".GTO"
 58 | Flags="0 0 0 1 0 1 1"
 59 | Emulate="0"
 60 | Offset="0.0mil 0.0mil"
 61 | Sheet=1
 62 | Tolerance="0 0 0 0 0 0"
 63 | Pen="0.0mil 0"
 64 | Page="12000.0mil 8000.0mil"
 65 | Layers=" 21 25"
 66 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 67 | 
 68 | [Sec_4]
 69 | Name[C]="Solder stop mask CMP"
 70 | Name[en]="Top Solder Mask"
 71 | Prompt=""
 72 | Device="GERBER_RS274X"
 73 | Wheel=".whl"
 74 | Rack=""
 75 | Scale=1
 76 | Output=".GTS"
 77 | Flags="0 0 0 1 0 1 1"
 78 | Emulate="0"
 79 | Offset="0.0mil 0.0mil"
 80 | Sheet=1
 81 | Tolerance="0 0 0 0 0 0"
 82 | Pen="0.0mil 0"
 83 | Page="12000.0mil 8000.0mil"
 84 | Layers=" 29"
 85 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 86 | 
 87 | [Sec_5]
 88 | Name[C]="Solder stop mask SOL"
 89 | Name[en]="Bottom Solder Mask"
 90 | Prompt=""
 91 | Device="GERBER_RS274X"
 92 | Wheel=".whl"
 93 | Rack=""
 94 | Scale=1
 95 | Output=".GBS"
 96 | Flags="0 0 0 1 0 1 1"
 97 | Emulate="0"
 98 | Offset="0.0mil 0.0mil"
 99 | Sheet=1
100 | Tolerance="0 0 0 0 0 0"
101 | Pen="0.0mil 0"
102 | Page="12000.0mil 8000.0mil"
103 | Layers=" 30"
104 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
105 | 
106 | [Sec_6]
107 | Name[C]="Board Outline"
108 | Name[en]="Board Outline"
109 | Prompt=""
110 | Device="GERBER_RS274X"
111 | Wheel=".whl"
112 | Rack=""
113 | Scale=1
114 | Output=".GKO"
115 | Flags="0 0 0 1 0 1 1"
116 | Emulate="0"
117 | Offset="0.0mil 0.0mil"
118 | Sheet=1
119 | Tolerance="0 0 0 0 0 0"
120 | Pen="0.0mil 0"
121 | Page="12000.0mil 8000.0mil"
122 | Layers=" 20 46"
123 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
124 | 
125 | [Sec_7]
126 | Name[C]="Excellion Drill"
127 | Name[en]="Excellion Drill"
128 | Prompt=""
129 | Device="EXCELLON"
130 | Wheel=".whl"
131 | Rack=""
132 | Scale=1
133 | Output=".TXT"
134 | Flags="0 0 0 1 0 1 1"
135 | Emulate="0"
136 | Offset="0.0mil 0.0mil"
137 | Sheet=1
138 | Tolerance="0 0 0 0 0 0"
139 | Pen="0.0mil 0"
140 | Page="12000.0mil 8000.0mil"
141 | Layers=" 44 45"
142 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
143 | 


--------------------------------------------------------------------------------
/scripts/streaming/tasbot-ui.py:
--------------------------------------------------------------------------------
  1 | import wx
  2 | import yaml
  3 | import os
  4 | 
  5 | DefaultFileName = "tasbot.yml"
  6 | 
  7 | 
  8 | class TasbotUIFrame(wx.Frame):
  9 |    def __init__(self, parent=None, id=wx.ID_ANY, title="TASbot UI"):
 10 |       wx.Frame.__init__(self, parent, id, title)
 11 |       
 12 |       self.optionData = None
 13 |       
 14 |       filemenu = wx.Menu()
 15 |       menuOpen = filemenu.Append(-1, "&Open", "Open a file")
 16 |       menuSave = filemenu.Append(-1, "&Save as...", "Save to file")
 17 |       menuExit = filemenu.Append(wx.ID_EXIT, "E&xit", "Terminate the program")
 18 |       
 19 |       menuBar = wx.MenuBar()
 20 |       menuBar.Append(filemenu, "&File")
 21 |       self.SetMenuBar(menuBar)
 22 |       
 23 |       self.Bind(wx.EVT_MENU, self.onOpen, menuOpen)
 24 |       self.Bind(wx.EVT_MENU, self.onSave, menuSave)
 25 |       self.Bind(wx.EVT_MENU, self.onExit, menuExit)
 26 |       
 27 |       self.mainPanel = wx.Panel(self)
 28 |       self.optionPanel = wx.Panel(self.mainPanel, style=wx.BORDER_SUNKEN)
 29 |       
 30 |       self.goButton = wx.Button(self.mainPanel, label="Go, TASbot!")
 31 |       self.goButton.Disable()
 32 |       self.goButton.Bind(wx.EVT_BUTTON, self.onGoButton)
 33 |       
 34 |       self.optionSizer = wx.BoxSizer(wx.VERTICAL)
 35 |       self.optionSizer.Add(
 36 |          wx.StaticText(self.optionPanel, label="Load a file"),
 37 |          1, wx.ALL|wx.ALIGN_CENTER
 38 |       )
 39 |       self.optionPanel.SetSizer(self.optionSizer)
 40 |       
 41 |       if os.path.isfile(DefaultFileName):
 42 |          self.loadFile(DefaultFileName)
 43 |       
 44 |       self.mainSizer = wx.BoxSizer(wx.VERTICAL)
 45 |       self.mainSizer.Add(self.optionPanel, 1, wx.ALL|wx.EXPAND, 5)
 46 |       self.mainSizer.Add(self.goButton, 0, wx.LEFT|wx.RIGHT|wx.BOTTOM|wx.ALIGN_CENTER_HORIZONTAL, 5)
 47 |       self.mainPanel.SetSizer(self.mainSizer)
 48 |       
 49 |       fitSize = self.mainSizer.Fit(self.mainPanel)
 50 |       currentSize = self.Size
 51 |       fitSize.x += 20
 52 |       fitSize.y += 20
 53 |       if fitSize.x > currentSize.x or fitSize.y > currentSize.y:
 54 |          self.SetSize((max(fitSize.x, currentSize.x), max(fitSize.y, currentSize.y)))
 55 |       
 56 |    def onOpen(self, event):
 57 |       dlg = wx.FileDialog(
 58 |          self, 
 59 |          message="Choose a file", 
 60 |          defaultDir=os.getcwd(),
 61 |          wildcard="*.yml",
 62 |          style=wx.FD_OPEN|wx.FD_FILE_MUST_EXIST
 63 |       )
 64 |       if dlg.ShowModal() != wx.ID_OK:
 65 |          return
 66 |          
 67 |       path = dlg.GetPath()
 68 |       dlg.Destroy()
 69 |       self.loadFile(path)
 70 |       
 71 |    def onSave(self, event):
 72 |       if self.optionData is None:
 73 |          dlg = wx.MessageDialog(
 74 |             self,
 75 |             "Invalid operation",
 76 |             "Cannot save because no options are loaded",
 77 |             style=wx.OK|wx.ICON_INFORMATION
 78 |          )
 79 |          dlg.ShowModal()
 80 |          dlg.Destroy()
 81 |          return
 82 |       
 83 |       self.readWidgets()
 84 |       
 85 |       dlg = wx.FileDialog(
 86 |          self,
 87 |          message="Choose a location to save",
 88 |          defaultDir=os.getcwd(),
 89 |          defaultFile=DefaultFileName,
 90 |          wildcard="*.yml",
 91 |          style=wx.FD_SAVE
 92 |       )
 93 |       if dlg.ShowModal() != wx.ID_OK:
 94 |          return
 95 |          
 96 |       path = dlg.GetPath()
 97 |       dlg.Destroy()
 98 |       
 99 |       if os.path.isfile(path):
100 |          os.remove(path)
101 |       with open(path, mode='w') as fh:
102 |          yaml.safe_dump(self.optionData, fh, default_flow_style=False)
103 | 
104 |    def onExit(self, event):
105 |       self.Close(True)
106 |       
107 |    def onGoButton(self, event):
108 |       self.readWidgets()
109 |       print "Go, TASbot!"
110 |       # This is when streaming would start. All the option data is available in self.optionData
111 |       
112 |    def loadFile(self, filename):
113 |       print "Loading %s" % (filename,)
114 |       with open(filename) as fh:
115 |          newData = yaml.safe_load(fh)
116 |       
117 |       # First a quick sanity check
118 |       if not isinstance(newData, list) or \
119 |             len(newData) < 1 or \
120 |             not isinstance(newData[0], dict):
121 |          
122 |          dlg = wx.MessageDialog(
123 |             self,
124 |             "Invalid data",
125 |             "The data in that file is invalid",
126 |             style=wx.OK|wx.ICON_ERROR
127 |          )
128 |          dlg.ShowModal()
129 |          dlg.Destroy()
130 |          return
131 |          
132 |       self.goButton.Enable()
133 |       self.optionData = newData
134 |       self.optionWidgets = [{} for d in self.optionData]
135 |       self.optionSizer.Clear(True)
136 |       self.optionSizer = wx.FlexGridSizer(rows=3, cols=1+len(self.optionData), vgap=0, hgap=0)
137 |       for k in self.optionData[0].keys():
138 |          self.optionSizer.Add(wx.StaticText(self.optionPanel, label=k), 0, wx.ALL|wx.ALIGN_RIGHT, 5)
139 |          for i in xrange(len(self.optionData)):
140 |             itemData = self.optionData[i]
141 |             value = itemData[k]
142 |             if isinstance(value, bool):
143 |                # boolean, make a checkbox
144 |                checkbox = wx.CheckBox(self.optionPanel, label="")
145 |                checkbox.SetValue(value)
146 |                self.optionWidgets[i][k] = checkbox
147 |                self.optionSizer.Add(checkbox, 1, wx.ALL|wx.ALIGN_LEFT, 5)
148 |             #elif isinstance(value, basestring):
149 |                #string
150 |             else:
151 |                # number or anything else
152 |                entry = wx.TextCtrl(self.optionPanel, size=(120, -1))
153 |                entry.SetValue(str(value))
154 |                self.optionWidgets[i][k] = entry
155 |                self.optionSizer.Add(entry, 1, wx.ALL|wx.ALIGN_LEFT, 5)
156 |       for i in xrange(len(self.optionData)):
157 |          self.optionSizer.AddGrowableCol(i+1)
158 |                
159 |       self.optionPanel.SetSizerAndFit(self.optionSizer)
160 |       
161 |       if hasattr(self, "mainSizer"):
162 |          self.mainSizer.Layout()
163 |       
164 |    def readWidgets(self):
165 |       # Read all the widgets and set the option data accordingly
166 |       for i in xrange(len(self.optionData)):
167 |          for k in self.optionData[0]:
168 |             self.optionData[i][k] = self.optionWidgets[i][k].GetValue()
169 | 
170 |       
171 | def main():
172 |    app = wx.App(False)
173 |    frame = TasbotUIFrame()
174 |    frame.Show(True)
175 |    app.MainLoop()
176 |    
177 | 
178 | if __name__ == "__main__":
179 |    main()


--------------------------------------------------------------------------------
/PCBs/controller_tap/controller_tap.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | Section=Sec_7
 10 | Section=Sec_8
 11 | 
 12 | [Sec_1]
 13 | Name[C]="Component side"
 14 | Name[en]="Top Copper Layer"
 15 | Prompt=""
 16 | Device="GERBER_RS274X"
 17 | Wheel=".whl"
 18 | Rack=""
 19 | Scale=1
 20 | Output=".GTL"
 21 | Flags="0 0 0 1 0 1 1"
 22 | Emulate="0"
 23 | Offset="0.0mil 0.0mil"
 24 | Sheet=1
 25 | Tolerance="0 0 0 0 0 0"
 26 | Pen="0.0mil 0"
 27 | Page="12000.0mil 8000.0mil"
 28 | Layers=" 1 17 18"
 29 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 30 | 
 31 | [Sec_2]
 32 | Name[C]="Solder side"
 33 | Name[en]="Bottom Copper Layer"
 34 | Prompt=""
 35 | Device="GERBER_RS274X"
 36 | Wheel=".whl"
 37 | Rack=""
 38 | Scale=1
 39 | Output=".GBL"
 40 | Flags="0 0 0 1 0 1 1"
 41 | Emulate="0"
 42 | Offset="0.0mil 0.0mil"
 43 | Sheet=1
 44 | Tolerance="0 0 0 0 0 0"
 45 | Pen="0.0mil 0"
 46 | Page="12000.0mil 8000.0mil"
 47 | Layers=" 16 17 18"
 48 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 49 | 
 50 | [Sec_3]
 51 | Name[C]="Silk screen CMP"
 52 | Name[en]="Top Silkscreen "
 53 | Prompt=""
 54 | Device="GERBER_RS274X"
 55 | Wheel=".whl"
 56 | Rack=""
 57 | Scale=1
 58 | Output=".GTO"
 59 | Flags="0 0 0 1 0 1 1"
 60 | Emulate="0"
 61 | Offset="0.0mil 0.0mil"
 62 | Sheet=1
 63 | Tolerance="0 0 0 0 0 0"
 64 | Pen="0.0mil 0"
 65 | Page="12000.0mil 8000.0mil"
 66 | Layers=" 21 25"
 67 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 68 | 
 69 | [Sec_4]
 70 | Name[C]="Silk screen CMP"
 71 | Name[en]="Bottom Silkscreen "
 72 | Prompt=""
 73 | Device="GERBER_RS274X"
 74 | Wheel=".whl"
 75 | Rack=""
 76 | Scale=1
 77 | Output=".GBO"
 78 | Flags="0 0 0 1 0 1 1"
 79 | Emulate="0"
 80 | Offset="0.0mil 0.0mil"
 81 | Sheet=1
 82 | Tolerance="0 0 0 0 0 0"
 83 | Pen="0.0mil 0"
 84 | Page="12000.0mil 8000.0mil"
 85 | Layers=" 22 26"
 86 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 87 | 
 88 | [Sec_5]
 89 | Name[C]="Solder stop mask CMP"
 90 | Name[en]="Top Solder Mask"
 91 | Prompt=""
 92 | Device="GERBER_RS274X"
 93 | Wheel=".whl"
 94 | Rack=""
 95 | Scale=1
 96 | Output=".GTS"
 97 | Flags="0 0 0 1 0 1 1"
 98 | Emulate="0"
 99 | Offset="0.0mil 0.0mil"
100 | Sheet=1
101 | Tolerance="0 0 0 0 0 0"
102 | Pen="0.0mil 0"
103 | Page="12000.0mil 8000.0mil"
104 | Layers=" 29"
105 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
106 | 
107 | [Sec_6]
108 | Name[C]="Solder stop mask SOL"
109 | Name[en]="Bottom Solder Mask"
110 | Prompt=""
111 | Device="GERBER_RS274X"
112 | Wheel=".whl"
113 | Rack=""
114 | Scale=1
115 | Output=".GBS"
116 | Flags="0 0 0 1 0 1 1"
117 | Emulate="0"
118 | Offset="0.0mil 0.0mil"
119 | Sheet=1
120 | Tolerance="0 0 0 0 0 0"
121 | Pen="0.0mil 0"
122 | Page="12000.0mil 8000.0mil"
123 | Layers=" 30"
124 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
125 | 
126 | [Sec_7]
127 | Name[C]="Board Outline"
128 | Name[en]="Board Outline"
129 | Prompt=""
130 | Device="GERBER_RS274X"
131 | Wheel=".whl"
132 | Rack=""
133 | Scale=1
134 | Output=".GKO"
135 | Flags="0 0 0 1 0 1 1"
136 | Emulate="0"
137 | Offset="0.0mil 0.0mil"
138 | Sheet=1
139 | Tolerance="0 0 0 0 0 0"
140 | Pen="0.0mil 0"
141 | Page="12000.0mil 8000.0mil"
142 | Layers=" 20 46"
143 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
144 | 
145 | [Sec_8]
146 | Name[C]="Excellion Drill"
147 | Name[en]="Excellion Drill"
148 | Prompt=""
149 | Device="EXCELLON"
150 | Wheel=".whl"
151 | Rack=""
152 | Scale=1
153 | Output=".TXT"
154 | Flags="0 0 0 1 0 1 1"
155 | Emulate="0"
156 | Offset="0.0mil 0.0mil"
157 | Sheet=1
158 | Tolerance="0 0 0 0 0 0"
159 | Pen="0.0mil 0"
160 | Page="12000.0mil 8000.0mil"
161 | Layers=" 44 45"
162 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
163 | 


--------------------------------------------------------------------------------
/PCBs/replay_adapter/replay_adapter.cam:
--------------------------------------------------------------------------------
  1 | [CAM Processor Job]
  2 | Description[en]="For 2 layer PCB designs using Eagle version 7.1 or lower."
  3 | Section=Sec_1
  4 | Section=Sec_2
  5 | Section=Sec_3
  6 | Section=Sec_4
  7 | Section=Sec_5
  8 | Section=Sec_6
  9 | Section=Sec_7
 10 | Section=Sec_8
 11 | 
 12 | [Sec_1]
 13 | Name[C]="Component side"
 14 | Name[en]="Top Copper Layer"
 15 | Prompt=""
 16 | Device="GERBER_RS274X"
 17 | Wheel=".whl"
 18 | Rack=""
 19 | Scale=1
 20 | Output=".GTL"
 21 | Flags="0 0 0 1 0 1 1"
 22 | Emulate="0"
 23 | Offset="0.0mil 0.0mil"
 24 | Sheet=1
 25 | Tolerance="0 0 0 0 0 0"
 26 | Pen="0.0mil 0"
 27 | Page="12000.0mil 8000.0mil"
 28 | Layers=" 1 17 18"
 29 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 30 | 
 31 | [Sec_2]
 32 | Name[C]="Solder side"
 33 | Name[en]="Bottom Copper Layer"
 34 | Prompt=""
 35 | Device="GERBER_RS274X"
 36 | Wheel=".whl"
 37 | Rack=""
 38 | Scale=1
 39 | Output=".GBL"
 40 | Flags="0 0 0 1 0 1 1"
 41 | Emulate="0"
 42 | Offset="0.0mil 0.0mil"
 43 | Sheet=1
 44 | Tolerance="0 0 0 0 0 0"
 45 | Pen="0.0mil 0"
 46 | Page="12000.0mil 8000.0mil"
 47 | Layers=" 16 17 18"
 48 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 49 | 
 50 | [Sec_3]
 51 | Name[C]="Silk screen CMP"
 52 | Name[en]="Top Silkscreen "
 53 | Prompt=""
 54 | Device="GERBER_RS274X"
 55 | Wheel=".whl"
 56 | Rack=""
 57 | Scale=1
 58 | Output=".GTO"
 59 | Flags="0 0 0 1 0 1 1"
 60 | Emulate="0"
 61 | Offset="0.0mil 0.0mil"
 62 | Sheet=1
 63 | Tolerance="0 0 0 0 0 0"
 64 | Pen="0.0mil 0"
 65 | Page="12000.0mil 8000.0mil"
 66 | Layers=" 21 25"
 67 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 68 | 
 69 | [Sec_4]
 70 | Name[C]="Silk screen CMP"
 71 | Name[en]="Bottom Silkscreen "
 72 | Prompt=""
 73 | Device="GERBER_RS274X"
 74 | Wheel=".whl"
 75 | Rack=""
 76 | Scale=1
 77 | Output=".GBO"
 78 | Flags="0 0 0 1 0 1 1"
 79 | Emulate="0"
 80 | Offset="0.0mil 0.0mil"
 81 | Sheet=1
 82 | Tolerance="0 0 0 0 0 0"
 83 | Pen="0.0mil 0"
 84 | Page="12000.0mil 8000.0mil"
 85 | Layers=" 22 26"
 86 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
 87 | 
 88 | [Sec_5]
 89 | Name[C]="Solder stop mask CMP"
 90 | Name[en]="Top Solder Mask"
 91 | Prompt=""
 92 | Device="GERBER_RS274X"
 93 | Wheel=".whl"
 94 | Rack=""
 95 | Scale=1
 96 | Output=".GTS"
 97 | Flags="0 0 0 1 0 1 1"
 98 | Emulate="0"
 99 | Offset="0.0mil 0.0mil"
100 | Sheet=1
101 | Tolerance="0 0 0 0 0 0"
102 | Pen="0.0mil 0"
103 | Page="12000.0mil 8000.0mil"
104 | Layers=" 29"
105 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
106 | 
107 | [Sec_6]
108 | Name[C]="Solder stop mask SOL"
109 | Name[en]="Bottom Solder Mask"
110 | Prompt=""
111 | Device="GERBER_RS274X"
112 | Wheel=".whl"
113 | Rack=""
114 | Scale=1
115 | Output=".GBS"
116 | Flags="0 0 0 1 0 1 1"
117 | Emulate="0"
118 | Offset="0.0mil 0.0mil"
119 | Sheet=1
120 | Tolerance="0 0 0 0 0 0"
121 | Pen="0.0mil 0"
122 | Page="12000.0mil 8000.0mil"
123 | Layers=" 30"
124 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
125 | 
126 | [Sec_7]
127 | Name[C]="Board Outline"
128 | Name[en]="Board Outline"
129 | Prompt=""
130 | Device="GERBER_RS274X"
131 | Wheel=".whl"
132 | Rack=""
133 | Scale=1
134 | Output=".GKO"
135 | Flags="0 0 0 1 0 1 1"
136 | Emulate="0"
137 | Offset="0.0mil 0.0mil"
138 | Sheet=1
139 | Tolerance="0 0 0 0 0 0"
140 | Pen="0.0mil 0"
141 | Page="12000.0mil 8000.0mil"
142 | Layers=" 20 46"
143 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
144 | 
145 | [Sec_8]
146 | Name[C]="Excellion Drill"
147 | Name[en]="Excellion Drill"
148 | Prompt=""
149 | Device="EXCELLON"
150 | Wheel=".whl"
151 | Rack=""
152 | Scale=1
153 | Output=".TXT"
154 | Flags="0 0 0 1 0 1 1"
155 | Emulate="0"
156 | Offset="0.0mil 0.0mil"
157 | Sheet=1
158 | Tolerance="0 0 0 0 0 0"
159 | Pen="0.0mil 0"
160 | Page="12000.0mil 8000.0mil"
161 | Layers=" 44 45"
162 | Colors=" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0"
163 | 


--------------------------------------------------------------------------------
/HDL/N64/n64_data_transmitter.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity n64_data_transmitter is
  7 |     Port ( data_to_send : in  STD_LOGIC_VECTOR (255 downto 0);
  8 |            data_length : in STD_LOGIC_VECTOR (5 downto 0);
  9 |            tx_write : in  STD_LOGIC;
 10 |            tx_write_ack : out  STD_LOGIC;
 11 |            need_crc : in  STD_LOGIC;
 12 |            need_stop_bit : in  STD_LOGIC;
 13 |            stop_bit : in  STD_LOGIC;
 14 |            data_out : out STD_LOGIC;
 15 |            tx_busy : out STD_LOGIC;
 16 |            CLK : in  STD_LOGIC);
 17 | end n64_data_transmitter;
 18 | 
 19 | architecture Behavioral of n64_data_transmitter is
 20 |   component byte_transmitter is
 21 |     Port ( data_signal_out : out  STD_LOGIC;
 22 |            data_to_send : in STD_LOGIC_VECTOR(7 downto 0);
 23 |            need_stop_bit : in STD_LOGIC;
 24 |            stop_bit : in STD_LOGIC;
 25 |            tx_write : in  STD_LOGIC;
 26 |            tx_write_ack : out STD_LOGIC;
 27 |            tx_busy : out STD_LOGIC;
 28 |            CLK : in  STD_LOGIC);
 29 |   end component;
 30 | 
 31 | 
 32 |   signal byte_id_in_progress : integer range 1 to 33 := 1;
 33 |   
 34 |   signal transmitting_signal : std_logic := '0';
 35 |   signal tx_write_ack_signal : std_logic := '0';
 36 |   
 37 |   signal latched_data : std_logic_vector (255 downto 0) := (others => '0');
 38 |   signal latched_data_length : integer range 1 to 32 := 1;
 39 |   signal latched_need_crc : std_logic := '0';
 40 |   signal latched_need_stop_bit : std_logic := '0';
 41 |   signal latched_stop_bit : std_logic := '0';
 42 |   
 43 |   signal data_signal : std_logic;
 44 |   signal byte_to_send : std_logic_vector(7 downto 0) := "00000000";
 45 |   signal need_stop_bit_signal : std_logic := '0';
 46 |   signal stop_bit_signal : std_logic := '0';
 47 |   signal byte_tx_write_signal : std_logic := '0';
 48 |   signal byte_tx_write_ack_signal : std_logic;
 49 |   signal byte_tx_busy : std_logic;
 50 |   
 51 | begin
 52 |   
 53 |   byte_tx : byte_transmitter port map ( data_signal_out => data_signal,
 54 |                                         data_to_send => byte_to_send,
 55 |                                         need_stop_bit => need_stop_bit_signal,
 56 |                                         stop_bit => stop_bit_signal,
 57 |                                         tx_write => byte_tx_write_signal,
 58 |                                         tx_write_ack => byte_tx_write_ack_signal,
 59 |                                         tx_busy => byte_tx_busy,
 60 |                                         CLK => CLK);
 61 | 
 62 | 
 63 | process(clk)
 64 |   variable new_data_length : integer range 0 to 63 := 0;
 65 | begin
 66 |   if (rising_edge(clk)) then
 67 |     if (transmitting_signal = '1') then
 68 |       if (byte_tx_write_ack_signal = '1' and byte_tx_write_signal = '1') then
 69 |         byte_tx_write_signal <= '0';
 70 |         
 71 |         -- If we're out of bytes, go to idle
 72 |         if (byte_id_in_progress = latched_data_length) then
 73 |           transmitting_signal <= '0';
 74 |         end if;
 75 |       elsif (byte_tx_write_ack_signal = '0' and byte_tx_write_signal = '0') then
 76 |         -- Go to the next byte
 77 |         if (byte_id_in_progress < latched_data_length and byte_id_in_progress < 32) then
 78 |           -- Set up the next byte of data
 79 |           case byte_id_in_progress is
 80 |             when 1 =>
 81 |               byte_to_send <= latched_data(247 downto 240);
 82 |             when 2 =>
 83 |               byte_to_send <= latched_data(239 downto 232);
 84 |             when 3 =>
 85 |               byte_to_send <= latched_data(231 downto 224);
 86 |             when 4 =>
 87 |               byte_to_send <= latched_data(223 downto 216);
 88 |             when 5 =>
 89 |               byte_to_send <= latched_data(215 downto 208);
 90 |             when 6 =>
 91 |               byte_to_send <= latched_data(207 downto 200);
 92 |             when 7 =>
 93 |               byte_to_send <= latched_data(199 downto 192);
 94 |             when 8 =>
 95 |               byte_to_send <= latched_data(191 downto 184);
 96 |             when 9 =>
 97 |               byte_to_send <= latched_data(183 downto 176);
 98 |             when 10 =>
 99 |               byte_to_send <= latched_data(175 downto 168);
100 |             when 11 =>
101 |               byte_to_send <= latched_data(167 downto 160);
102 |             when 12 =>
103 |               byte_to_send <= latched_data(159 downto 152);
104 |             when 13 =>
105 |               byte_to_send <= latched_data(151 downto 144);
106 |             when 14 =>
107 |               byte_to_send <= latched_data(143 downto 136);
108 |             when 15 =>
109 |               byte_to_send <= latched_data(135 downto 128);
110 |             when 16 =>
111 |               byte_to_send <= latched_data(127 downto 120);
112 |             when 17 =>
113 |               byte_to_send <= latched_data(119 downto 112);
114 |             when 18 =>
115 |               byte_to_send <= latched_data(111 downto 104);
116 |             when 19 =>
117 |               byte_to_send <= latched_data(103 downto 96);
118 |             when 20 =>
119 |               byte_to_send <= latched_data(95 downto 88);
120 |             when 21 =>
121 |               byte_to_send <= latched_data(87 downto 80);
122 |             when 22 =>
123 |               byte_to_send <= latched_data(79 downto 72);
124 |             when 23 =>
125 |               byte_to_send <= latched_data(71 downto 64);
126 |             when 24 =>
127 |               byte_to_send <= latched_data(63 downto 56);
128 |             when 25 =>
129 |               byte_to_send <= latched_data(55 downto 48);
130 |             when 26 =>
131 |               byte_to_send <= latched_data(47 downto 40);
132 |             when 27 =>
133 |               byte_to_send <= latched_data(39 downto 32);
134 |             when 28 =>
135 |               byte_to_send <= latched_data(31 downto 24);
136 |             when 29 =>
137 |               byte_to_send <= latched_data(23 downto 16);
138 |             when 30 =>
139 |               byte_to_send <= latched_data(15 downto 8);
140 |             when 31 =>
141 |               byte_to_send <= latched_data(7 downto 0);
142 |             when others =>
143 |               byte_to_send <= latched_data(7 downto 0);
144 |           end case;
145 |           
146 |           byte_id_in_progress <= byte_id_in_progress + 1;
147 | 
148 |           -- Check if we need to send a stop bit after this byte
149 |           if ((byte_id_in_progress + 1) = latched_data_length) then
150 |             need_stop_bit_signal <= latched_need_stop_bit;
151 |             stop_bit_signal <= latched_stop_bit;
152 |           else
153 |             need_stop_bit_signal <= '0';
154 |             stop_bit_signal <= '0';
155 |           end if;
156 |           
157 |           byte_tx_write_signal <= '1';
158 |         else
159 |           transmitting_signal <= '0';
160 |         end if;
161 |       end if;
162 | 
163 |     else
164 |       if (tx_write = '1' and tx_write_ack_signal = '0') then
165 |         -- Get and check the new data length
166 |         new_data_length := to_integer(unsigned(data_length));
167 |         
168 |         if (new_data_length > 0) then
169 |           -- Limit the data length
170 |           if (new_data_length > 32) then
171 |             new_data_length := 32;
172 |           end if;
173 |           
174 |           latched_data_length <= new_data_length;
175 |           latched_data <= data_to_send;
176 |           latched_need_stop_bit <= need_stop_bit;
177 |           latched_stop_bit <= stop_bit;
178 |           byte_id_in_progress <= 1;
179 |           
180 |           -- Send the first byte of this data
181 |           byte_to_send <= data_to_send(255 downto 248);
182 |           -- Check if we need to send a stop bit after this byte
183 |           if (new_data_length = 1) then
184 |             need_stop_bit_signal <= need_stop_bit;
185 |             stop_bit_signal <= stop_bit;
186 |           else
187 |             need_stop_bit_signal <= '0';
188 |             stop_bit_signal <= '0';
189 |           end if;
190 |           byte_tx_write_signal <= '1';
191 |           
192 |           transmitting_signal <= '1';
193 |         end if;
194 |         
195 |         -- Even if 0 bytes were requested, ack this request
196 |         tx_write_ack_signal <= '1';
197 |       end if;
198 |     end if;
199 |     
200 |     -- Lower ack when new bit goes low
201 |     if (tx_write_ack_signal = '1' and tx_write = '0') then
202 |       tx_write_ack_signal <= '0';
203 |     end if;
204 |   end if;
205 | end process;
206 | 
207 | tx_busy <= byte_tx_busy;
208 | tx_write_ack <= tx_write_ack_signal;
209 | data_out <= data_signal;
210 | 
211 | end Behavioral;
212 | 
213 | 


--------------------------------------------------------------------------------
/HDL/n64_mitm/n64_data_transmitter.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity n64_data_transmitter is
  7 |     Port ( data_to_send : in  STD_LOGIC_VECTOR (263 downto 0);
  8 |            data_length : in STD_LOGIC_VECTOR (5 downto 0);
  9 |            tx_write : in  STD_LOGIC;
 10 |            tx_write_ack : out  STD_LOGIC;
 11 |            need_crc : in  STD_LOGIC;
 12 |            need_stop_bit : in  STD_LOGIC;
 13 |            stop_bit : in  STD_LOGIC;
 14 |            data_out : out STD_LOGIC;
 15 |            tx_busy : out STD_LOGIC;
 16 |            CLK : in  STD_LOGIC);
 17 | end n64_data_transmitter;
 18 | 
 19 | architecture Behavioral of n64_data_transmitter is
 20 |   component byte_transmitter is
 21 |     Port ( data_signal_out : out  STD_LOGIC;
 22 |            data_to_send : in STD_LOGIC_VECTOR(7 downto 0);
 23 |            need_stop_bit : in STD_LOGIC;
 24 |            stop_bit : in STD_LOGIC;
 25 |            tx_write : in  STD_LOGIC;
 26 |            tx_write_ack : out STD_LOGIC;
 27 |            tx_busy : out STD_LOGIC;
 28 |            CLK : in  STD_LOGIC);
 29 |   end component;
 30 | 
 31 | 
 32 |   signal byte_id_in_progress : integer range 1 to 33 := 1;
 33 |   
 34 |   signal transmitting_signal : std_logic := '0';
 35 |   signal tx_write_ack_signal : std_logic := '0';
 36 |   
 37 |   signal latched_data : std_logic_vector (263 downto 0) := (others => '0');
 38 |   signal latched_data_length : integer range 1 to 33 := 1;
 39 |   signal latched_need_crc : std_logic := '0';
 40 |   signal latched_need_stop_bit : std_logic := '0';
 41 |   signal latched_stop_bit : std_logic := '0';
 42 |   
 43 |   signal data_signal : std_logic;
 44 |   signal byte_to_send : std_logic_vector(7 downto 0) := "00000000";
 45 |   signal need_stop_bit_signal : std_logic := '0';
 46 |   signal stop_bit_signal : std_logic := '0';
 47 |   signal byte_tx_write_signal : std_logic := '0';
 48 |   signal byte_tx_write_ack_signal : std_logic;
 49 |   signal byte_tx_busy : std_logic;
 50 |   
 51 | begin
 52 |   
 53 |   byte_tx : byte_transmitter port map ( data_signal_out => data_signal,
 54 |                                         data_to_send => byte_to_send,
 55 |                                         need_stop_bit => need_stop_bit_signal,
 56 |                                         stop_bit => stop_bit_signal,
 57 |                                         tx_write => byte_tx_write_signal,
 58 |                                         tx_write_ack => byte_tx_write_ack_signal,
 59 |                                         tx_busy => byte_tx_busy,
 60 |                                         CLK => CLK);
 61 | 
 62 | 
 63 | process(clk)
 64 |   variable new_data_length : integer range 0 to 63 := 0;
 65 | begin
 66 |   if (rising_edge(clk)) then
 67 |     if (transmitting_signal = '1') then
 68 |       if (byte_tx_write_ack_signal = '1' and byte_tx_write_signal = '1') then
 69 |         byte_tx_write_signal <= '0';
 70 |         
 71 |         -- If we're out of bytes, go to idle
 72 |         if (byte_id_in_progress = latched_data_length) then
 73 |           transmitting_signal <= '0';
 74 |         end if;
 75 |       elsif (byte_tx_write_ack_signal = '0' and byte_tx_write_signal = '0') then
 76 |         -- Go to the next byte
 77 |         if (byte_id_in_progress < latched_data_length and byte_id_in_progress < 33) then
 78 |           -- Set up the next byte of data
 79 |           case byte_id_in_progress is
 80 |             when 1 =>
 81 |               byte_to_send <= latched_data(255 downto 248);
 82 |             when 2 =>
 83 |               byte_to_send <= latched_data(247 downto 240);
 84 |             when 3 =>
 85 |               byte_to_send <= latched_data(239 downto 232);
 86 |             when 4 =>
 87 |               byte_to_send <= latched_data(231 downto 224);
 88 |             when 5 =>
 89 |               byte_to_send <= latched_data(223 downto 216);
 90 |             when 6 =>
 91 |               byte_to_send <= latched_data(215 downto 208);
 92 |             when 7 =>
 93 |               byte_to_send <= latched_data(207 downto 200);
 94 |             when 8 =>
 95 |               byte_to_send <= latched_data(199 downto 192);
 96 |             when 9 =>
 97 |               byte_to_send <= latched_data(191 downto 184);
 98 |             when 10 =>
 99 |               byte_to_send <= latched_data(183 downto 176);
100 |             when 11 =>
101 |               byte_to_send <= latched_data(175 downto 168);
102 |             when 12 =>
103 |               byte_to_send <= latched_data(167 downto 160);
104 |             when 13 =>
105 |               byte_to_send <= latched_data(159 downto 152);
106 |             when 14 =>
107 |               byte_to_send <= latched_data(151 downto 144);
108 |             when 15 =>
109 |               byte_to_send <= latched_data(143 downto 136);
110 |             when 16 =>
111 |               byte_to_send <= latched_data(135 downto 128);
112 |             when 17 =>
113 |               byte_to_send <= latched_data(127 downto 120);
114 |             when 18 =>
115 |               byte_to_send <= latched_data(119 downto 112);
116 |             when 19 =>
117 |               byte_to_send <= latched_data(111 downto 104);
118 |             when 20 =>
119 |               byte_to_send <= latched_data(103 downto 96);
120 |             when 21 =>
121 |               byte_to_send <= latched_data(95 downto 88);
122 |             when 22 =>
123 |               byte_to_send <= latched_data(87 downto 80);
124 |             when 23 =>
125 |               byte_to_send <= latched_data(79 downto 72);
126 |             when 24 =>
127 |               byte_to_send <= latched_data(71 downto 64);
128 |             when 25 =>
129 |               byte_to_send <= latched_data(63 downto 56);
130 |             when 26 =>
131 |               byte_to_send <= latched_data(55 downto 48);
132 |             when 27 =>
133 |               byte_to_send <= latched_data(47 downto 40);
134 |             when 28 =>
135 |               byte_to_send <= latched_data(39 downto 32);
136 |             when 29 =>
137 |               byte_to_send <= latched_data(31 downto 24);
138 |             when 30 =>
139 |               byte_to_send <= latched_data(23 downto 16);
140 |             when 31 =>
141 |               byte_to_send <= latched_data(15 downto 8);
142 |             when 32 =>
143 |               byte_to_send <= latched_data(7 downto 0);
144 |             when others =>
145 |               byte_to_send <= latched_data(7 downto 0);
146 |           end case;
147 |           
148 |           byte_id_in_progress <= byte_id_in_progress + 1;
149 | 
150 |           -- Check if we need to send a stop bit after this byte
151 |           if ((byte_id_in_progress + 1) = latched_data_length) then
152 |             need_stop_bit_signal <= latched_need_stop_bit;
153 |             stop_bit_signal <= latched_stop_bit;
154 |           else
155 |             need_stop_bit_signal <= '0';
156 |             stop_bit_signal <= '0';
157 |           end if;
158 |           
159 |           byte_tx_write_signal <= '1';
160 |         else
161 |           transmitting_signal <= '0';
162 |         end if;
163 |       end if;
164 | 
165 |     else
166 |       if (tx_write = '1' and tx_write_ack_signal = '0') then
167 |         -- Get and check the new data length
168 |         new_data_length := to_integer(unsigned(data_length));
169 |         
170 |         if (new_data_length > 0) then
171 |           -- Limit the data length
172 |           if (new_data_length > 33) then
173 |             new_data_length := 33;
174 |           end if;
175 |           
176 |           latched_data_length <= new_data_length;
177 |           latched_data <= data_to_send;
178 |           latched_need_stop_bit <= need_stop_bit;
179 |           latched_stop_bit <= stop_bit;
180 |           byte_id_in_progress <= 1;
181 |           
182 |           -- Send the first byte of this data
183 |           byte_to_send <= data_to_send(263 downto 256);
184 |           -- Check if we need to send a stop bit after this byte
185 |           if (new_data_length = 1) then
186 |             need_stop_bit_signal <= need_stop_bit;
187 |             stop_bit_signal <= stop_bit;
188 |           else
189 |             need_stop_bit_signal <= '0';
190 |             stop_bit_signal <= '0';
191 |           end if;
192 |           byte_tx_write_signal <= '1';
193 |           
194 |           transmitting_signal <= '1';
195 |         end if;
196 |         
197 |         -- Even if 0 bytes were requested, ack this request
198 |         tx_write_ack_signal <= '1';
199 |       end if;
200 |     end if;
201 |     
202 |     -- Lower ack when new bit goes low
203 |     if (tx_write_ack_signal = '1' and tx_write = '0') then
204 |       tx_write_ack_signal <= '0';
205 |     end if;
206 |   end if;
207 | end process;
208 | 
209 | tx_busy <= byte_tx_busy;
210 | tx_write_ack <= tx_write_ack_signal;
211 | data_out <= data_signal;
212 | 
213 | end Behavioral;
214 | 
215 | 


--------------------------------------------------------------------------------
/HDL/N64/main.vhd:
--------------------------------------------------------------------------------
  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity main is
  7 |     Port ( data_signal_in : in  STD_LOGIC;
  8 |            data_signal_out : out STD_LOGIC;
  9 |            debug : out  STD_LOGIC_VECTOR(3 downto 0);
 10 |            data_signal_oe : out std_logic;
 11 |            RX : in std_logic;
 12 |            TX_raw : out std_logic;
 13 |            CLK : in  STD_LOGIC);
 14 | end main;
 15 | 
 16 | architecture Behavioral of main is
 17 |   component toggle is
 18 |     Port ( signal_in : in  STD_LOGIC;
 19 |            signal_out : out  STD_LOGIC);
 20 |   end component;
 21 | 
 22 |   component bit_detector is
 23 |     Port ( data_signal : in  STD_LOGIC;
 24 |            new_bit : out  STD_LOGIC;
 25 |            bit_val : out  STD_LOGIC_VECTOR (1 downto 0);
 26 |            CLK : in  STD_LOGIC);
 27 |   end component;
 28 |   
 29 |   component byte_receiver is
 30 |     Port ( new_bit : in  STD_LOGIC;
 31 |            bit_val : in  STD_LOGIC_VECTOR (1 downto 0);
 32 |            new_byte : out  STD_LOGIC;
 33 |            byte_val : out  STD_LOGIC_VECTOR (7 downto 0);
 34 |            CLK : in  STD_LOGIC);
 35 |   end component;
 36 |   
 37 |   component filter is
 38 |     Port ( signal_in : in  STD_LOGIC;
 39 |            clk : in  STD_LOGIC;
 40 |            signal_out : out  STD_LOGIC);
 41 |   end component;
 42 |   
 43 |   component fifo is
 44 |     Port ( data_in : in  STD_LOGIC_VECTOR (31 downto 0);
 45 |            write_en : in  STD_LOGIC;
 46 |            data_out : out  STD_LOGIC_VECTOR (31 downto 0);
 47 |            read_en : in  STD_LOGIC;
 48 |            clk : in  STD_LOGIC;
 49 |            empty : out  STD_LOGIC;
 50 |            full : out  STD_LOGIC;
 51 |            clear : in  STD_LOGIC);
 52 |   end component;
 53 |   
 54 |   component UART is
 55 |     Port ( rx_data_out : out STD_LOGIC_VECTOR (7 downto 0);
 56 |            rx_data_was_recieved : in STD_LOGIC;
 57 |            rx_byte_waiting : out STD_LOGIC;
 58 |            clk : in  STD_LOGIC;
 59 | 
 60 |            rx_in : in STD_LOGIC;
 61 |            tx_data_in : in STD_LOGIC_VECTOR (7 downto 0);
 62 |            tx_buffer_full : out STD_LOGIC;
 63 |            tx_write : in STD_LOGIC;
 64 |            tx_out : out STD_LOGIC);
 65 |   end component;
 66 |   
 67 |   component n64_data_transmitter is
 68 |     Port ( data_to_send : in  STD_LOGIC_VECTOR (255 downto 0);
 69 |            data_length : in STD_LOGIC_VECTOR (5 downto 0);
 70 |            tx_write : in  STD_LOGIC;
 71 |            tx_write_ack : out  STD_LOGIC;
 72 |            need_crc : in  STD_LOGIC;
 73 |            need_stop_bit : in  STD_LOGIC;
 74 |            stop_bit : in  STD_LOGIC;
 75 |            data_out : out STD_LOGIC;
 76 |            tx_busy : out STD_LOGIC;
 77 |            CLK : in  STD_LOGIC);
 78 |   end component;
 79 | 
 80 |   signal new_bit : std_logic;
 81 |   
 82 |   signal data_in_f : std_logic;
 83 |     
 84 |   signal new_bit_val : std_logic_vector(1 downto 0);
 85 |     
 86 |   signal new_byte : std_logic := '0';
 87 |   signal rx_data : std_logic_vector (7 downto 0) := (others => '0');
 88 |   
 89 |   signal data_length : std_logic_vector(5 downto 0) := "000000";
 90 |   
 91 |   signal data_signal_from_tx : std_logic;
 92 |   signal data_to_tx : std_logic_vector(255 downto 0) := (others => '0');
 93 |   signal need_stop_bit : std_logic := '0';
 94 |   signal stop_bit : std_logic := '0';
 95 |   
 96 |   signal tx_busy : std_logic;
 97 |   signal tx_write : std_logic := '0';
 98 |   signal tx_write_ack : std_logic;
 99 |   
100 |   signal reply_delay_active : std_logic := '0';
101 |   signal reply_delay_timer : integer range 0 to 96 := 0;
102 |   
103 |   signal latched_rx_data : std_logic_vector(7 downto 0) := (others => '0');
104 |   
105 |   signal oe_signal : std_logic := '1';
106 |   
107 |   
108 |   
109 |   signal buffer_new_data : std_logic_vector(31 downto 0);
110 |   signal buffer_write : std_logic;
111 |   signal buffer_data : std_logic_vector(31 downto 0);
112 |   signal buffer_read : std_logic;
113 |   signal buffer_empty : std_logic;
114 |   signal buffer_full : std_logic;
115 |   signal buffer_clear : std_logic;
116 | 
117 |   signal tx : std_logic := '0';
118 |   
119 |   
120 |   signal data_from_uart : STD_LOGIC_VECTOR (7 downto 0);
121 |   signal uart_data_recieved : STD_LOGIC := '0';
122 |   signal uart_byte_waiting : STD_LOGIC := '0';
123 |   
124 |   signal data_to_uart : STD_LOGIC_VECTOR (7 downto 0) := (others => '0');
125 |   signal uart_buffer_full : STD_LOGIC;
126 |   signal uart_write : STD_LOGIC := '0';
127 |   
128 |   type uart_states is (main_cmd, button_data_cmd);
129 |   signal uart_state : uart_states := main_cmd;
130 |   signal data_byte_id : integer range 1 to 4;
131 |   type vector8 is array (natural range <>) of std_logic_vector(7 downto 0);
132 |   signal setup_cmd_data : vector8(1 to 3) := (others => (others => '0'));
133 | 
134 |   signal bit_tog : std_logic := '0';
135 |   
136 |   signal need_crc : std_logic := '0';
137 | begin
138 | 
139 |   data_filter: filter port map (signal_in => data_signal_in,
140 |                                 clk => CLK,
141 |                                 signal_out => data_in_f);
142 | 
143 |   detector: bit_detector port map (data_signal => data_in_f,
144 |                                    bit_val => new_bit_val,
145 |                                    new_bit => new_bit,
146 |                                    clk => clk);
147 |   byte_rx: byte_receiver port map ( new_bit => new_bit,
148 |                                     bit_val => new_bit_val,
149 |                                     new_byte => new_byte,
150 |                                     byte_val => rx_data,
151 |                                     CLK => CLK);
152 |                                    
153 |   bit_toggle: toggle port map (signal_in => new_bit,
154 |                                signal_out => bit_tog);
155 |                                
156 |   datatx: n64_data_transmitter port map ( data_to_send => data_to_tx,
157 |                                           data_length => data_length,
158 |                                           tx_write => tx_write,
159 |                                           tx_write_ack => tx_write_ack,
160 |                                           need_crc => need_crc,
161 |                                           need_stop_bit => need_stop_bit,
162 |                                           stop_bit => stop_bit,
163 |                                           data_out => data_signal_from_tx,
164 |                                           tx_busy => tx_busy,
165 |                                           CLK => CLK);
166 |   
167 |   buffers: fifo port map ( data_in => buffer_new_data,
168 |                            write_en => buffer_write,
169 |                            data_out => buffer_data,
170 |                            read_en => buffer_read,
171 |                            clk => clk,
172 |                            empty => buffer_empty,
173 |                            full => buffer_full,
174 |                            clear => buffer_clear);
175 | 
176 |   uart1: UART port map (rx_data_out => data_from_uart,
177 |                         rx_data_was_recieved => uart_data_recieved,
178 |                         rx_byte_waiting => uart_byte_waiting,
179 |                         clk => CLK,
180 |                         rx_in => RX,
181 |                         tx_data_in => data_to_uart,
182 |                         tx_buffer_full => uart_buffer_full,
183 |                         tx_write => uart_write,
184 |                         tx_out => TX);  
185 |   
186 | 
187 | uart_recieve_btye: process(CLK)
188 | 	begin
189 | 		if (rising_edge(CLK)) then
190 |       uart_data_recieved <= '0';
191 |       buffer_clear <= '0';
192 |       buffer_write <= '0';
193 |     
194 | 			if (uart_byte_waiting = '1' and uart_data_recieved = '0') then
195 |         case uart_state is
196 |           when main_cmd =>
197 |             case data_from_uart is
198 |               when x"66" => -- 'f'
199 |                 
200 |                 data_byte_id <= 1;
201 |                 uart_state <= button_data_cmd;
202 |                             
203 |               when x"52" => -- 'R'
204 |                 buffer_clear <= '1';
205 |                 --uart_state <= main_cmd;
206 |                 
207 |               when others =>
208 |               
209 |             end case;
210 |                     
211 |           when button_data_cmd =>
212 |             -- Store this byte of data in the right spot
213 |             if (data_byte_id = 1) then
214 |               buffer_new_data <= "111111111111111111111111" & data_from_uart;
215 |             elsif (data_byte_id = 2) then
216 |               buffer_new_data <= "1111111111111111" & data_from_uart & buffer_new_data(7 downto 0);
217 |             elsif (data_byte_id = 3) then
218 |               buffer_new_data <= "11111111" & data_from_uart & buffer_new_data(15 downto 0);
219 |             else
220 |               buffer_new_data <= data_from_uart & buffer_new_data(23 downto 0);
221 |             end if;
222 |             
223 |             -- Do we need to go to the next controller?
224 |             if (data_byte_id = 4) then
225 |               -- Store the data in the fifo
226 |               buffer_write <= '1';
227 |               uart_state <= main_cmd;
228 |             else
229 |               -- Go to the next byte
230 |               data_byte_id <= data_byte_id + 1;
231 |             end if;
232 |          
233 |         end case;
234 |       	uart_data_recieved <= '1';
235 | 			end if;
236 |     end if;
237 | 	end process;
238 |     
239 |   process (clk)
240 |   begin
241 |     if (rising_edge(clk)) then
242 |       tx_write <= '0';
243 |       uart_write <= '0';
244 |       buffer_read <= '0';
245 |       if (reply_delay_active = '1') then
246 |         if (reply_delay_timer = 96) then
247 |           if (rx_data = "00000000") then
248 |             tx_write <= '1';
249 |             data_to_tx <= (others => '0');
250 |             data_to_tx(255 downto 232) <= "000001010000000000000010";
251 |             data_length <= "000011";
252 |             need_stop_bit <= '1';
253 |             stop_bit <= '0';
254 |             reply_delay_active <= '0';
255 |           elsif (rx_data = "11111111") then
256 |             tx_write <= '1';
257 |             data_to_tx <= (others => '0');
258 |             data_to_tx(255 downto 232) <= "100000101000000000000001";
259 |             data_length <= "000011";
260 |             need_stop_bit <= '1';
261 |             stop_bit <= '0';
262 |             reply_delay_active <= '0';
263 |           elsif (rx_data = "00000001") then
264 |             tx_write <= '1';
265 |             data_to_tx <= (others => '0');
266 |             data_to_tx(255 downto 224) <= buffer_data;
267 |             data_length <= "000100";
268 |             need_stop_bit <= '1';
269 |             stop_bit <= '0';
270 |             reply_delay_active <= '0';
271 |             buffer_read <= '1';
272 |             uart_write <= '1';
273 |             data_to_uart <= x"66"; -- "f"
274 |           end if;
275 |         else
276 |           reply_delay_timer <= reply_delay_timer + 1;
277 |         end if;
278 |       elsif (tx_busy = '0' and new_byte = '1') then
279 |         reply_delay_timer <= 0;
280 |         reply_delay_active <= '1';
281 |       end if;
282 |     end if;
283 |   end process;
284 |   
285 |   debug(0) <= tx;
286 |   debug(1) <= rx;
287 |   debug(2) <= new_bit_val(0);
288 |   debug(3) <= data_signal_from_tx;
289 |   
290 |   data_signal_oe <= oe_signal;
291 |   
292 |   data_signal_out <= data_signal_from_tx;
293 |   oe_signal <= not tx_busy;
294 |   
295 |   TX_raw <= tx;
296 | 
297 | end Behavioral;
298 | 
299 | 


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/HDL/n64_mitm/main.vhd:
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  1 | library IEEE;
  2 | use IEEE.STD_LOGIC_1164.ALL;
  3 | 
  4 | use IEEE.NUMERIC_STD.ALL;
  5 | 
  6 | entity main is
  7 |     Port ( console_signal_in : in  STD_LOGIC;
  8 |            console_signal_out : out STD_LOGIC;
  9 |            debug : out  STD_LOGIC_VECTOR(3 downto 0);
 10 |            console_signal_oe : out std_logic;
 11 |            controller_signal_in : in STD_LOGIC;
 12 |            controller_signal_out : out STD_LOGIC;
 13 |            controller_signal_oe : out STD_LOGIC;
 14 |            CLK : in  STD_LOGIC);
 15 | end main;
 16 | 
 17 | architecture Behavioral of main is
 18 |   component bit_detector is
 19 |     Port ( data_signal : in  STD_LOGIC;
 20 |            new_bit : out  STD_LOGIC;
 21 |            bit_val : out  STD_LOGIC_VECTOR (1 downto 0);
 22 |            CLK : in  STD_LOGIC);
 23 |   end component;
 24 |   
 25 |   component byte_receiver is
 26 |     Port ( new_bit : in  STD_LOGIC;
 27 |            bit_val : in  STD_LOGIC_VECTOR (1 downto 0);
 28 |            new_byte : out  STD_LOGIC;
 29 |            byte_val : out  STD_LOGIC_VECTOR (7 downto 0);
 30 |            CLK : in  STD_LOGIC);
 31 |   end component;
 32 |   
 33 |   component filter is
 34 |     Port ( signal_in : in  STD_LOGIC;
 35 |            clk : in  STD_LOGIC;
 36 |            signal_out : out  STD_LOGIC);
 37 |   end component;
 38 |   
 39 |   component n64_data_transmitter is
 40 |     Port ( data_to_send : in  STD_LOGIC_VECTOR (263 downto 0);
 41 |            data_length : in STD_LOGIC_VECTOR (5 downto 0);
 42 |            tx_write : in  STD_LOGIC;
 43 |            tx_write_ack : out  STD_LOGIC;
 44 |            need_crc : in  STD_LOGIC;
 45 |            need_stop_bit : in  STD_LOGIC;
 46 |            stop_bit : in  STD_LOGIC;
 47 |            data_out : out STD_LOGIC;
 48 |            tx_busy : out STD_LOGIC;
 49 |            CLK : in  STD_LOGIC);
 50 |   end component;
 51 | 
 52 |   
 53 |   signal console_new_bit : std_logic;
 54 |   signal console_new_bit_val : std_logic_vector(1 downto 0);
 55 |   
 56 |   signal console_signal_in_f : std_logic;
 57 |   signal controller_signal_in_f : std_logic;
 58 |     
 59 |     
 60 |   signal console_new_byte : std_logic := '0';
 61 |   signal console_rx_data : std_logic_vector (7 downto 0) := (others => '0');
 62 | --  
 63 | --  signal data_to_send : std_logic_vector(31 downto 0) := (others => '0');
 64 | --  signal latched_data_to_send : std_logic_vector(31 downto 0) := (others => '0');
 65 | --  signal tx_byte_id : integer range 0 to 3 := 0;
 66 | --  signal transmit_new_data : std_logic := '0';
 67 | --  signal transmitting : std_logic := '0';
 68 |   
 69 |   signal console_signal_from_tx : std_logic;
 70 |   signal console_data_to_tx : std_logic_vector(7 downto 0) := (others => '0');
 71 |   signal console_need_stop_bit : std_logic := '0';
 72 |   signal console_stop_bit : std_logic := '0';
 73 |   signal console_tx_busy : std_logic;
 74 |   signal console_tx_write : std_logic := '0';
 75 |   
 76 |   signal reply_delay_timer : integer range 0 to 37000 := 0;
 77 |   
 78 |   signal latched_rx_data : std_logic_vector(7 downto 0) := (others => '0');
 79 |   
 80 |   signal console_oe_signal : std_logic := '1';
 81 |   
 82 |   signal timer_max : integer range 0 to 50000 := 0;
 83 |   signal switch_timer_max : integer range 0 to 50000 := 0;
 84 |   
 85 |   signal tx : std_logic := '0';
 86 |   
 87 |   type broadcast_modes is (idle_mode, rx_cmd_bytes, broadcast_delay, broadcast_begin_wait, broadcast_override, preswitch, controller_to_console);
 88 |   signal broadcast_mode : broadcast_modes := idle_mode;
 89 | 
 90 |   type vector8 is array (natural range <>) of std_logic_vector(7 downto 0);
 91 |   signal cmd_data : vector8(1 to 5) := (others => (others => '0'));
 92 |   
 93 |   signal cmd_byte_id : integer range 0 to 5 := 1;
 94 |   
 95 |   signal data_to_tx : std_logic_vector(263 downto 0) := (others => '0');
 96 |   signal data_length : std_logic_vector(5 downto 0) := "000000";
 97 |   signal tx_busy : std_logic;
 98 |   signal tx_write : std_logic := '0';
 99 |   signal tx_write_ack : std_logic;
100 |   signal need_crc : std_logic := '0';
101 |   signal need_stop_bit : std_logic := '0';
102 |   signal stop_bit : std_logic := '0';
103 |   signal data_signal_from_tx : std_logic;
104 | 
105 |   signal override_count : integer range 0 to 5 := 0;
106 |   signal override_count2 : integer range 0 to 10 := 0;
107 |   signal override_count3 : integer range 0 to 10 := 0;
108 |   signal override_count4 : integer range 0 to 10 := 0;
109 | 
110 | 
111 |   
112 | begin
113 | 
114 |   console_data_filter: filter port map (signal_in => console_signal_in,
115 |                                         clk => CLK,
116 |                                         signal_out => console_signal_in_f);
117 |                                         
118 |   controller_data_filter: filter port map (signal_in => controller_signal_in,
119 |                                            clk => CLK,
120 |                                            signal_out => controller_signal_in_f);
121 | 
122 |   console_bit_detector: bit_detector port map (data_signal => console_signal_in_f,
123 |                                                bit_val => console_new_bit_val,
124 |                                                new_bit => console_new_bit,
125 |                                                clk => clk);
126 |                                                
127 |   console_byte_rx: byte_receiver port map ( new_bit => console_new_bit,
128 |                                             bit_val => console_new_bit_val,
129 |                                             new_byte => console_new_byte,
130 |                                             byte_val => console_rx_data,
131 |                                             CLK => CLK);
132 |                                    
133 |                                
134 |   datatx: n64_data_transmitter port map ( data_to_send => data_to_tx,
135 |                                           data_length => data_length,
136 |                                           tx_write => tx_write,
137 |                                           tx_write_ack => tx_write_ack,
138 |                                           need_crc => need_crc,
139 |                                           need_stop_bit => need_stop_bit,
140 |                                           stop_bit => stop_bit,
141 |                                           data_out => data_signal_from_tx,
142 |                                           tx_busy => tx_busy,
143 |                                           CLK => CLK);
144 |                                  
145 |     
146 |   process (clk)
147 |   begin
148 |     if (rising_edge(clk)) then
149 |       tx_write <= '0';
150 |       if (broadcast_mode = preswitch) then
151 |         if (reply_delay_timer = switch_timer_max) then
152 |           reply_delay_timer <= 0;
153 |           broadcast_mode <= controller_to_console;
154 |         else
155 |           reply_delay_timer <= reply_delay_timer + 1;
156 |         end if;
157 |         
158 |       elsif (broadcast_mode = controller_to_console) then
159 |         if (reply_delay_timer = timer_max) then
160 |           broadcast_mode <= idle_mode;
161 |         else
162 |           reply_delay_timer <= reply_delay_timer + 1;
163 |         end if;
164 |       
165 |       elsif (broadcast_mode = rx_cmd_bytes) then
166 |         if (cmd_data(1) = "00000010") then
167 |           if (console_new_byte = '1') then
168 |             if (cmd_byte_id = 2) then
169 | --              if (cmd_data(2) = "11100101" and console_rx_data = "10001100" and override_count < 2) then
170 | --                reply_delay_timer <= 0;
171 | --                broadcast_mode <= broadcast_delay;
172 | --                override_count <= override_count + 1;
173 | --                data_to_tx <= (others => '0');
174 | --                data_to_tx(263 downto 0) <= "000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110000001100000011000000110100000011000100010000100100001001001001010000100010100000000000000011111";
175 |               --els
176 |               if (cmd_data(2) = "11000001" and console_rx_data = "00111000" and override_count2 < 2) then
177 |                 reply_delay_timer <= 0;
178 |                 broadcast_mode <= broadcast_delay;
179 |                 data_to_tx <= (others => '0');
180 |                 data_to_tx(263 downto 0) <= "110111011101110111011001100110011011101110111011011001110110001101101110000011101110110011001100110111011101110010011001100111111011101110111001001100110011111001010000010011110100101101000101010011010100111101001110001000000101001001000101010001000000000000100001";
181 |                 override_count2 <= override_count2 + 1;
182 |               elsif (cmd_data(2) = "11000001" and console_rx_data = "01010010" and override_count3 < 2) then
183 |                 reply_delay_timer <= 0;
184 |                 broadcast_mode <= broadcast_delay;
185 |                 data_to_tx <= (others => '0');
186 |                 data_to_tx(263 downto 0) <= "000000000000000000000000000000000011000000110001000000110001001100000101000000110000000100110011000000000010000000100100110001111111111000010001001000000001101011110000010011011110011010000000001000000000110100111110001100001110000000000000001111100000000101010011";
187 |                 override_count3 <= override_count3 + 1;
188 | --              elsif (cmd_data(2) = "11011010" and console_rx_data = "01001111" and override_count4 < 1) then
189 | --                reply_delay_timer <= 0;
190 | --                broadcast_mode <= broadcast_delay;
191 | --                data_to_tx <= (others => '0');
192 | --                data_to_tx(263 downto 0) <= "000100010111001000011010110011010101010100011001011000000110100100010001110110101100111111001101010101010001100101100000011010011101000100010011110000110101011000011001100100111000110001010000100001011000001010000000100010001000110110000100100100010101000011111010";
193 | --                override_count4 <= override_count4 + 1;
194 |               else
195 |                 switch_timer_max <= 24;
196 |                 timer_max <= 33920;
197 |                 reply_delay_timer <= 0;
198 |                 broadcast_mode <= preswitch;
199 |               end if;
200 |             else
201 |               cmd_data(cmd_byte_id+1) <= console_rx_data;
202 |               cmd_byte_id <= cmd_byte_id + 1;
203 |             end if;
204 |           end if;
205 |         else
206 |           broadcast_mode <= idle_mode;
207 |         end if;
208 |       
209 |       elsif (broadcast_mode = broadcast_delay) then
210 |         if (reply_delay_timer = 96) then
211 |           tx_write <= '1';
212 |           data_length <= "100001";
213 |           need_stop_bit <= '1';
214 |           stop_bit <= '0';
215 |           broadcast_mode <= broadcast_begin_wait;
216 |         else
217 |           reply_delay_timer <= reply_delay_timer + 1;
218 |         end if;
219 |         
220 |       elsif (broadcast_mode = broadcast_begin_wait) then
221 |         if (tx_busy = '1') then
222 |           broadcast_mode <= broadcast_override;
223 |         end if;
224 |        
225 |       elsif (broadcast_mode = broadcast_override) then
226 |         if (tx_busy = '0') then
227 |           broadcast_mode <= idle_mode;
228 |         end if;
229 |         
230 |       elsif (broadcast_mode = idle_mode and console_new_byte = '1') then
231 |         if (console_rx_data = "00000000") then
232 |           switch_timer_max <= 16;
233 |           timer_max <= 3200;
234 |           reply_delay_timer <= 0;
235 |           broadcast_mode <= preswitch;
236 |           
237 |         elsif (console_rx_data = "00000001") then
238 |           switch_timer_max <= 16;
239 |           timer_max <= 4224;
240 |           reply_delay_timer <= 0;
241 |           broadcast_mode <= preswitch;
242 |           
243 |         elsif (console_rx_data = "00000010") then
244 |           cmd_data(1) <= console_rx_data;
245 |           cmd_byte_id <= 1;
246 |           broadcast_mode <= rx_cmd_bytes;
247 |           
248 |           
249 | --          switch_timer_max <= 2224;
250 | --          timer_max <= 33920;
251 | --          reply_delay_timer <= 0;
252 | --          broadcast_mode <= preswitch;
253 | 
254 |         elsif (console_rx_data = "00000011") then
255 |           switch_timer_max <= 35764;
256 |           timer_max <= 1152;
257 |           reply_delay_timer <= 0;
258 |           broadcast_mode <= preswitch;
259 |           
260 |         end if;
261 |       end if;
262 |     end if;
263 |   end process;
264 | 
265 |   debug(0) <= '1';
266 |   debug(1) <= '1';
267 |   debug(2) <= console_new_bit_val(0);
268 |   debug(3) <= data_signal_from_tx;
269 |   
270 |   console_signal_out <= controller_signal_in_f when (broadcast_mode = controller_to_console) else
271 |                         data_signal_from_tx when (broadcast_mode = broadcast_begin_wait or broadcast_mode = broadcast_override) else
272 |                         '1';
273 |   console_signal_oe <= '0' when (broadcast_mode = controller_to_console or broadcast_mode = broadcast_begin_wait or broadcast_mode = broadcast_override) else
274 |                        '1';
275 | 
276 |   
277 |   controller_signal_out <= console_signal_in_f when (broadcast_mode = idle_mode or broadcast_mode = preswitch or broadcast_mode = rx_cmd_bytes) else
278 |                         '1';
279 |   controller_signal_oe <= '1' when (broadcast_mode = controller_to_console) else
280 |                           '0';
281 |                            
282 | 
283 | end Behavioral;
284 | 
285 | 


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