├── gal16v8 ├── kicad │ ├── gerber │ │ ├── mmu_16v8-NPTH.drl │ │ ├── mmu_16v8-PTH.drl │ │ ├── mmu_16v8-Edge_Cuts.gbr │ │ ├── mmu_16v8-B_SilkS.gbr │ │ ├── mmu_16v8-F_SilkS.gbr │ │ ├── mmu_16v8-F_Cu.gbr │ │ └── mmu_16v8-B_Cu.gbr │ ├── mmu_16v8.lib │ ├── mmu_16v8-cache.lib │ ├── mmu_16v8.pro │ ├── mmu_16v8.sch │ └── mmu_16v8.kicad_pcb ├── wincupl │ ├── MMU_16V8.abs │ ├── MMU_16V8.sim │ ├── MMU_16V8.jed │ ├── MMU_16V8.pla │ ├── MMU_16V8.mx │ ├── mmu_16v8.PLD │ ├── MMU_16V8.lst │ ├── MMU_16V8.pdf │ └── MMU_16V8.doc └── graphics │ ├── mmu_16v8_pcb.png │ ├── mmu_16v8_real.jpg │ ├── mmu_16v8_kicad.jpg │ ├── mmu_16v8_schematic.png │ └── video_blitz_128k.jpg ├── gal22v10 ├── wincupl │ ├── MMU_GAL22V10.abs │ ├── MMU_GAL22V10.sim │ ├── MMU_GAL22V10.pla │ ├── MMU_GAL22V10.jed │ ├── MMU_GAL22V10.mx │ ├── mmu_gal22v10.PLD │ ├── MMU_GAL22V10.lst │ ├── MMU_GAL22V10.pdf │ └── MMU_GAL22V10.doc └── graphics │ ├── mmu_22v10_real.jpg │ ├── mmu_22v10_wiring.png │ └── mmu_22v10_real_no_tape.jpg ├── README.md └── LICENSE /gal16v8/kicad/gerber/mmu_16v8-NPTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | INCH 3 | % 4 | G90 5 | G05 6 | T0 7 | M30 8 | -------------------------------------------------------------------------------- /gal16v8/wincupl/MMU_16V8.abs: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal16v8/wincupl/MMU_16V8.abs -------------------------------------------------------------------------------- /gal16v8/graphics/mmu_16v8_pcb.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal16v8/graphics/mmu_16v8_pcb.png -------------------------------------------------------------------------------- /gal16v8/graphics/mmu_16v8_real.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal16v8/graphics/mmu_16v8_real.jpg -------------------------------------------------------------------------------- /gal22v10/wincupl/MMU_GAL22V10.abs: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal22v10/wincupl/MMU_GAL22V10.abs -------------------------------------------------------------------------------- /gal16v8/graphics/mmu_16v8_kicad.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal16v8/graphics/mmu_16v8_kicad.jpg -------------------------------------------------------------------------------- /gal22v10/graphics/mmu_22v10_real.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal22v10/graphics/mmu_22v10_real.jpg -------------------------------------------------------------------------------- /gal16v8/graphics/mmu_16v8_schematic.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal16v8/graphics/mmu_16v8_schematic.png -------------------------------------------------------------------------------- /gal16v8/graphics/video_blitz_128k.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal16v8/graphics/video_blitz_128k.jpg -------------------------------------------------------------------------------- /gal22v10/graphics/mmu_22v10_wiring.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal22v10/graphics/mmu_22v10_wiring.png -------------------------------------------------------------------------------- /gal22v10/graphics/mmu_22v10_real_no_tape.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/HEAD/gal22v10/graphics/mmu_22v10_real_no_tape.jpg -------------------------------------------------------------------------------- /gal16v8/kicad/gerber/mmu_16v8-PTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | INCH 3 | T1C0.0157 4 | T2C0.0315 5 | T3C0.0394 6 | % 7 | G90 8 | G05 9 | T1 10 | X6.05Y-1.81 11 | T2 12 | X5.5725Y-1.75 13 | X5.5725Y-1.85 14 | X5.5725Y-1.95 15 | X5.5725Y-2.05 16 | X5.5725Y-2.15 17 | X5.5725Y-2.25 18 | X5.5725Y-2.35 19 | X5.5725Y-2.45 20 | X5.5725Y-2.55 21 | X5.5725Y-2.65 22 | X5.8725Y-1.75 23 | X5.8725Y-1.85 24 | X5.8725Y-1.95 25 | X5.8725Y-2.05 26 | X5.8725Y-2.15 27 | X5.8725Y-2.25 28 | X5.8725Y-2.35 29 | X5.8725Y-2.45 30 | X5.8725Y-2.55 31 | X5.8725Y-2.65 32 | T3 33 | X5.67Y-1.85 34 | X5.67Y-1.95 35 | X5.67Y-2.05 36 | X5.67Y-2.15 37 | X5.67Y-2.25 38 | X5.67Y-2.35 39 | X5.67Y-2.45 40 | X5.67Y-2.55 41 | X5.97Y-1.85 42 | X5.97Y-1.95 43 | X5.97Y-2.05 44 | X5.97Y-2.15 45 | X5.97Y-2.25 46 | X5.97Y-2.35 47 | X5.97Y-2.45 48 | X5.97Y-2.55 49 | T0 50 | M30 51 | -------------------------------------------------------------------------------- /gal16v8/kicad/gerber/mmu_16v8-Edge_Cuts.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5)-3* 2 | G04 #@! TF.CreationDate,2020-09-11T10:56:43+02:00* 3 | G04 #@! TF.ProjectId,mmu_16v8,6d6d755f-3136-4763-982e-6b696361645f,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Profile,NP* 6 | %FSLAX46Y46*% 7 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 8 | G04 Created by KiCad (PCBNEW (5.1.5)-3) date 2020-09-11 10:56:43* 9 | %MOMM*% 10 | %LPD*% 11 | G04 APERTURE LIST* 12 | %ADD10C,0.050000*% 13 | G04 APERTURE END LIST* 14 | D10* 15 | X140208000Y-69088000D02* 16 | X140208000Y-41910000D01* 17 | X154940000Y-69088000D02* 18 | X140208000Y-69088000D01* 19 | X154940000Y-41910000D02* 20 | X154940000Y-69088000D01* 21 | X140208000Y-41910000D02* 22 | X154940000Y-41910000D01* 23 | M02* 24 | -------------------------------------------------------------------------------- /gal16v8/wincupl/MMU_16V8.sim: -------------------------------------------------------------------------------- 1 | %SIGNAL 2 | PIN 2 = A14 3 | PIN 3 = A15 4 | PIN 7 = CAS 5 | PIN 13 = CASBANK 6 | PIN 14 = CASMAIN 7 | PIN 1 = CLK 8 | PIN 15 = FA14 9 | PIN 16 = FA15 10 | PIN 8 = HALT 11 | PIN 12 = LHALT 12 | PIN 19 = O2 13 | PIN 11 = !OE 14 | PIN 4 = PB2_BA14 15 | PIN 5 = PB3_BA15 16 | PIN 6 = PB4_CBE 17 | PIN 17 = PB5_VBE 18 | PIN 18 = PHI2 19 | %END 20 | 21 | %FIELD 22 | %END 23 | 24 | %EQUATION 25 | CASBANK => 26 | A14 & !A15 & !CAS & LHALT & !PB4_CBE & PHI2 27 | # A14 & !A15 & !CAS & !LHALT & !PB5_VBE & PHI2 28 | 29 | CASMAIN => 30 | !A14 & !CAS & PHI2 31 | # A15 & !CAS & PHI2 32 | # !CAS & LHALT & PB4_CBE & PHI2 33 | # !CAS & !LHALT & PB5_VBE & PHI2 34 | 35 | FA14 => 36 | A14 & A15 37 | # A14 & PB2_BA14 38 | # A14 & LHALT & PB4_CBE 39 | # A14 & !LHALT & PB5_VBE 40 | 41 | FA15 => 42 | A15 43 | # A14 & LHALT & PB3_BA15 & !PB4_CBE 44 | # A14 & !LHALT & PB3_BA15 & !PB5_VBE 45 | 46 | LHALT.d => 47 | HALT 48 | 49 | O2 => 50 | !PHI2 51 | 52 | CASBANK.oe => 53 | 1 54 | 55 | CASMAIN.oe => 56 | 1 57 | 58 | FA14.oe => 59 | 1 60 | 61 | FA15.oe => 62 | 1 63 | 64 | O2.oe => 65 | 1 66 | 67 | PB5_VBE.oe => 68 | 0 69 | 70 | PHI2.oe => 71 | 0 72 | 73 | %END 74 | -------------------------------------------------------------------------------- /gal22v10/wincupl/MMU_GAL22V10.sim: -------------------------------------------------------------------------------- 1 | %SIGNAL 2 | PIN 3 = A14 3 | PIN 4 = A15 4 | PIN 8 = CAS 5 | PIN 16 = CASBANK 6 | PIN 17 = CASMAIN 7 | PIN 1 = CLK 8 | PIN 18 = FA14 9 | PIN 19 = FA15 10 | PIN 15 = HALT 11 | PIN 14 = LHALT 12 | PIN 23 = O2 13 | PIN 13 = !OE 14 | PIN 5 = PB2_BA14 15 | PIN 6 = PB3_BA15 16 | PIN 7 = PB4_CBE 17 | PIN 20 = PB5_VBE 18 | PIN 21 = PHI2 19 | PIN 22 = VCC 20 | %END 21 | 22 | %FIELD 23 | %END 24 | 25 | %EQUATION 26 | CASBANK => 27 | A14 & !A15 & !CAS & !LHALT & !PB4_CBE & PHI2 28 | # A14 & !A15 & !CAS & LHALT & !PB5_VBE & PHI2 29 | 30 | CASMAIN => 31 | !A14 & !CAS & PHI2 32 | # A15 & !CAS & PHI2 33 | # !CAS & !LHALT & PB4_CBE & PHI2 34 | # !CAS & LHALT & PB5_VBE & PHI2 35 | 36 | FA14 => 37 | A14 & A15 38 | # A14 & PB3_BA15 39 | # A14 & !LHALT & PB4_CBE 40 | # A14 & LHALT & PB5_VBE 41 | 42 | FA15 => 43 | A15 44 | # A14 & !LHALT & PB2_BA14 & !PB4_CBE 45 | # A14 & LHALT & PB2_BA14 & !PB5_VBE 46 | 47 | LHALT.d => 48 | HALT 49 | 50 | LHALT.ar => 51 | 0 52 | 53 | LHALT.sp => 54 | 0 55 | 56 | O2 => 57 | !PHI2 58 | 59 | CASBANK.oe => 60 | 1 61 | 62 | CASMAIN.oe => 63 | 1 64 | 65 | FA14.oe => 66 | 1 67 | 68 | FA15.oe => 69 | 1 70 | 71 | HALT.oe => 72 | 0 73 | 74 | LHALT.oe => 75 | 1 76 | 77 | O2.oe => 78 | 1 79 | 80 | PB5_VBE.oe => 81 | 0 82 | 83 | PHI2.oe => 84 | 0 85 | 86 | %END 87 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Atari XE C25953 emmu unit replicated in GAL16v8 and GAL20v10 2 | 3 | As the happy owner of an Atari 65XE I wanted to upgrade it and have fun with full 130kB of RAM. After browsing the internet I learned that C25953 is very hard to find. There are some GAL implementations, however those require an extra D latch. Unfortunately my motherboard doesn't support such a solution. 4 | 5 | After quick investigation, looking into C25953 discrete IC implementation's schematic, it turned out that it was possible to fully replicate C25953 logic with cheap, old, yet still available GALs (GAL16v8 and GAL20v10). The only trick was to generate the missing latched HALT signal used in logic equations. 6 | Unfortunately due to the GALs' hardware restrictions __1:1 pin compatible__ replica __was not feasible__ forcing external wirings. 7 | 8 | 9 | ## Structure of the repository 10 | - gal16v8 - best to use with a custom PCB: 11 | - winculp - implementation in CUPL, jedec files, etc. 12 | - graphics - photos of the implementation 13 | - kicad - kicad schematics/pcb and gerber files 14 | 15 | - gal22v10 - can be directly mounted in the socket, however requires some basic wiring and soldering on top of the IC: 16 | - winculp - implementation in CUPL, jedec files, etc. 17 | - graphics - photos of the implementation and wiring diagrams 18 | 19 | ## Test result with "Video Blitz" demo 20 | 21 | ![Video Blitz](https://raw.githubusercontent.com/mikulski-lab/C25953-emmu/master/gal16v8/graphics/video_blitz_128k.jpg) 22 | -------------------------------------------------------------------------------- /gal16v8/wincupl/MMU_16V8.jed: -------------------------------------------------------------------------------- 1 |  2 | CUPL(WM) 5.0a Serial# 60008009 3 | Device g16v8ms Library DLIB-h-40-11 4 | Created Sat Sep 19 12:51:01 2020 5 | Name mmu_16v8 6 | Partno GAL16v8 7 | Revision 03 8 | Date 5/8/2019 9 | Designer Bartosz Mikulski 10 | Company Mikulski Lab 11 | Assembly None 12 | Location 13 | *QP20 14 | *QF2194 15 | *G0 16 | *F0 17 | *L00000 11111111111111111111111111111111 18 | *L00032 11111110111111111111111111111111 19 | *L00768 11111111111111111111111111111111 20 | *L00800 11110111111111111111111111111111 21 | *L00832 01111111111101111011111111111101 22 | *L00864 01111111111001111111111111111110 23 | *L01024 11111111111111111111111111111111 24 | *L01056 01110111111111111111111111111111 25 | *L01088 01111111011111111111111111111111 26 | *L01120 01111111111111110111111111111101 27 | *L01152 01111111110111111111111111111110 28 | *L01280 11111111111111111111111111111111 29 | *L01312 10111101111111111111101111111111 30 | *L01344 11110101111111111111101111111111 31 | *L01376 11111101111111110111101111111101 32 | *L01408 11111101110111111111101111111110 33 | *L01536 11111111111111111111111111111111 34 | *L01568 01111001111111111011101111111101 35 | *L01600 01111001111011111111101111111110 36 | *L01792 11111111111111111111111101111111 37 | *L02048 10000001010001110100000101001100 38 | *L02080 00110001001101100111011000111000 39 | *L02112 00100000111111101111111111111111 40 | *L02144 11111111111111111111111111111111 41 | *L02176 111111111111111101 42 | *C554C 43 | *178B -------------------------------------------------------------------------------- /gal16v8/wincupl/MMU_16V8.pla: -------------------------------------------------------------------------------- 1 | # Berkeley PLA format generated using 2 | # 3 | # CUPL(WM) 5.0a Serial# 60008009 4 | # Device g16v8ms Library DLIB-h-40-11 5 | # Created Sat Sep 19 12:51:01 2020 6 | # Name mmu_16v8 7 | # Partno GAL16v8 8 | # Revision 03 9 | # Date 5/8/2019 10 | # Designer Bartosz Mikulski 11 | # Company Mikulski Lab 12 | # Assembly None 13 | # Location 14 | # 15 | # Inputs 0 1 A14 A15 16 | # CAS CASBANK CASMAIN CLK 17 | # FA14 FA15 HALT LHALT 18 | # O2 !OE PB2_BA14 PB3_BA15 19 | # PB4_CBE PB5_VBE PHI2 20 | # Outputs !CASBANK !CASMAIN !FA14 !FA15 21 | # LHALT.d O2 CASBANK.oe CASMAIN.oe 22 | # FA14.oe FA15.oe O2.oe PB5_VBE.oe 23 | # PHI2.oe 24 | .i 19 25 | .o 13 26 | .p 22 27 | --100------1----0-1 1~~~~~~~~~~~~ 28 | --100------0-----01 1~~~~~~~~~~~~ 29 | --0-0-------------1 ~1~~~~~~~~~~~ 30 | ---10-------------1 ~1~~~~~~~~~~~ 31 | ----0------1----1-1 ~1~~~~~~~~~~~ 32 | ----0------0-----11 ~1~~~~~~~~~~~ 33 | --11--------------- ~~1~~~~~~~~~~ 34 | --1-----------1---- ~~1~~~~~~~~~~ 35 | --1--------1----1-- ~~1~~~~~~~~~~ 36 | --1--------0-----1- ~~1~~~~~~~~~~ 37 | ---1--------------- ~~~1~~~~~~~~~ 38 | --1--------1---10-- ~~~1~~~~~~~~~ 39 | --1--------0---1-0- ~~~1~~~~~~~~~ 40 | ----------1-------- ~~~~1~~~~~~~~ 41 | ------------------0 ~~~~~1~~~~~~~ 42 | -1----------------- ~~~~~~1~~~~~~ 43 | -1----------------- ~~~~~~~1~~~~~ 44 | -1----------------- ~~~~~~~~1~~~~ 45 | -1----------------- ~~~~~~~~~1~~~ 46 | -1----------------- ~~~~~~~~~~1~~ 47 | 1------------------ ~~~~~~~~~~~1~ 48 | 1------------------ ~~~~~~~~~~~~1 49 | .end 50 | -------------------------------------------------------------------------------- /gal22v10/wincupl/MMU_GAL22V10.pla: -------------------------------------------------------------------------------- 1 | # Berkeley PLA format generated using 2 | # 3 | # CUPL(WM) 5.0a Serial# 60008009 4 | # Device g22v10 Library DLIB-h-40-1 5 | # Created Sat Sep 19 12:56:50 2020 6 | # Name mmu_22v10 7 | # Partno GAL22v10 8 | # Revision 02 9 | # Date 5/8/2019 10 | # Designer Bartosz Mikulski 11 | # Company Mikulski Lab 12 | # Assembly None 13 | # Location 14 | # 15 | # Inputs 0 1 A14 A15 16 | # CAS CASBANK CASMAIN CLK 17 | # FA14 FA15 HALT LHALT 18 | # O2 !OE PB2_BA14 PB3_BA15 19 | # PB4_CBE PB5_VBE PHI2 VCC 20 | # Outputs !CASBANK !CASMAIN !FA14 !FA15 21 | # LHALT.d LHALT.ar LHALT.sp O2 22 | # CASBANK.oe CASMAIN.oe FA14.oe FA15.oe 23 | # HALT.oe LHALT.oe O2.oe PB5_VBE.oe 24 | # PHI2.oe 25 | .i 20 26 | .o 17 27 | .p 26 28 | --100------1----0-1- 1~~~~~~~~~~~~~~~~ 29 | --100------0-----01- 1~~~~~~~~~~~~~~~~ 30 | --0-0-------------1- ~1~~~~~~~~~~~~~~~ 31 | ---10-------------1- ~1~~~~~~~~~~~~~~~ 32 | ----0------1----1-1- ~1~~~~~~~~~~~~~~~ 33 | ----0------0-----11- ~1~~~~~~~~~~~~~~~ 34 | --11---------------- ~~1~~~~~~~~~~~~~~ 35 | --1------------1---- ~~1~~~~~~~~~~~~~~ 36 | --1--------1----1--- ~~1~~~~~~~~~~~~~~ 37 | --1--------0-----1-- ~~1~~~~~~~~~~~~~~ 38 | ---1---------------- ~~~1~~~~~~~~~~~~~ 39 | --1--------1--1-0--- ~~~1~~~~~~~~~~~~~ 40 | --1--------0--1--0-- ~~~1~~~~~~~~~~~~~ 41 | ----------1--------- ~~~~1~~~~~~~~~~~~ 42 | 1------------------- ~~~~~1~~~~~~~~~~~ 43 | 1------------------- ~~~~~~1~~~~~~~~~~ 44 | ------------------0- ~~~~~~~1~~~~~~~~~ 45 | -1------------------ ~~~~~~~~1~~~~~~~~ 46 | -1------------------ ~~~~~~~~~1~~~~~~~ 47 | -1------------------ ~~~~~~~~~~1~~~~~~ 48 | -1------------------ ~~~~~~~~~~~1~~~~~ 49 | 1------------------- ~~~~~~~~~~~~1~~~~ 50 | -1------------------ ~~~~~~~~~~~~~1~~~ 51 | -1------------------ ~~~~~~~~~~~~~~1~~ 52 | 1------------------- ~~~~~~~~~~~~~~~1~ 53 | 1------------------- ~~~~~~~~~~~~~~~~1 54 | .end 55 | -------------------------------------------------------------------------------- /gal22v10/wincupl/MMU_GAL22V10.jed: -------------------------------------------------------------------------------- 1 |  2 | CUPL(WM) 5.0a Serial# 60008009 3 | Device g22v10 Library DLIB-h-40-1 4 | Created Sat Sep 19 12:56:50 2020 5 | Name mmu_22v10 6 | Partno GAL22v10 7 | Revision 02 8 | Date 5/8/2019 9 | Designer Bartosz Mikulski 10 | Company Mikulski Lab 11 | Assembly None 12 | Location 13 | *QP24 14 | *QF5892 15 | *G0 16 | *F0 17 | *L00032 00000000000011111111111111111111 18 | *L00064 11111111111111111111111111111111 19 | *L00096 11101111111111111111111111111111 20 | *L00128 11110000000000000000000000000000 21 | *L02144 00000000000011111111111111111111 22 | *L02176 11111111111111111111111111111111 23 | *L02208 11110111111111111111111111111111 24 | *L02240 11111111111101111111011111111011 25 | *L02272 11111111111011111111111101111110 26 | *L02304 01111111111111111111110111110000 27 | *L02880 00000000000000000000000011111111 28 | *L02912 11111111111111111111111111111111 29 | *L02944 11111111111101110111111111111111 30 | *L02976 11111111111111111111111101111111 31 | *L03008 11110111111111111111111111111111 32 | *L03040 11110111111111111111011111111111 33 | *L03072 11101111111111110111110111111111 34 | *L03104 11111111111111011111000000000000 35 | *L03648 00001111111111111111111111111111 36 | *L03680 11111111111111111111111110011111 37 | *L03712 11111111111110111111111111111111 38 | *L03744 11111101011111111111111110111111 39 | *L03776 11111111111111111101111111111111 40 | *L03808 01111011111111101111111111111101 41 | *L03840 11011111111111111011111111011111 42 | *L04288 00000000000000000000000011111111 43 | *L04320 11111111111111111111111111111111 44 | *L04352 11111111111101011011111111111011 45 | *L04384 10111111111011111111111101011010 46 | *L04416 11111111111110111111110111110000 47 | *L05344 00000000000000000000000011111111 48 | *L05376 11111111111111111111111111111111 49 | *L05408 11111111111111111111111111111111 50 | *L05440 11111101111111110000000000000000 51 | *L05792 00000000000000001100010101010101 52 | *L05824 01100100011101000001010011000011 53 | *L05856 00100011001001110110001100010011 54 | *C7358 55 | *76DB -------------------------------------------------------------------------------- /gal16v8/kicad/gerber/mmu_16v8-B_SilkS.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5)-3* 2 | G04 #@! TF.CreationDate,2020-09-11T10:56:42+02:00* 3 | G04 #@! TF.ProjectId,mmu_16v8,6d6d755f-3136-4763-982e-6b696361645f,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Legend,Bot* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5)-3) date 2020-09-11 10:56:43* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10C,0.050000*% 14 | %ADD11C,0.120000*% 15 | %ADD12C,0.150000*% 16 | G04 APERTURE END LIST* 17 | D10* 18 | X140208000Y-69088000D02* 19 | X140208000Y-41910000D01* 20 | X154940000Y-69088000D02* 21 | X140208000Y-69088000D01* 22 | X154940000Y-41910000D02* 23 | X154940000Y-69088000D01* 24 | X140208000Y-41910000D02* 25 | X154940000Y-41910000D01* 26 | D11* 27 | X152968000Y-45660000D02* 28 | X151638000Y-45660000D01* 29 | X152968000Y-46990000D02* 30 | X152968000Y-45660000D01* 31 | X152968000Y-48260000D02* 32 | X150308000Y-48260000D01* 33 | X150308000Y-48260000D02* 34 | X150308000Y-66100000D01* 35 | X152968000Y-48260000D02* 36 | X152968000Y-66100000D01* 37 | X152968000Y-66100000D02* 38 | X150308000Y-66100000D01* 39 | X145348000Y-45660000D02* 40 | X144018000Y-45660000D01* 41 | X145348000Y-46990000D02* 42 | X145348000Y-45660000D01* 43 | X145348000Y-48260000D02* 44 | X142688000Y-48260000D01* 45 | X142688000Y-48260000D02* 46 | X142688000Y-66100000D01* 47 | X145348000Y-48260000D02* 48 | X145348000Y-66100000D01* 49 | X145348000Y-66100000D02* 50 | X142688000Y-66100000D01* 51 | D12* 52 | X151971333Y-44112380D02* 53 | X151971333Y-44826666D01* 54 | X152018952Y-44969523D01* 55 | X152114190Y-45064761D01* 56 | X152257047Y-45112380D01* 57 | X152352285Y-45112380D01* 58 | X151542761Y-44207619D02* 59 | X151495142Y-44160000D01* 60 | X151399904Y-44112380D01* 61 | X151161809Y-44112380D01* 62 | X151066571Y-44160000D01* 63 | X151018952Y-44207619D01* 64 | X150971333Y-44302857D01* 65 | X150971333Y-44398095D01* 66 | X151018952Y-44540952D01* 67 | X151590380Y-45112380D01* 68 | X150971333Y-45112380D01* 69 | X144351333Y-44112380D02* 70 | X144351333Y-44826666D01* 71 | X144398952Y-44969523D01* 72 | X144494190Y-45064761D01* 73 | X144637047Y-45112380D01* 74 | X144732285Y-45112380D01* 75 | X143351333Y-45112380D02* 76 | X143922761Y-45112380D01* 77 | X143637047Y-45112380D02* 78 | X143637047Y-44112380D01* 79 | X143732285Y-44255238D01* 80 | X143827523Y-44350476D01* 81 | X143922761Y-44398095D01* 82 | M02* 83 | -------------------------------------------------------------------------------- /gal16v8/kicad/gerber/mmu_16v8-F_SilkS.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5)-3* 2 | G04 #@! TF.CreationDate,2020-09-11T10:56:42+02:00* 3 | G04 #@! TF.ProjectId,mmu_16v8,6d6d755f-3136-4763-982e-6b696361645f,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Legend,Top* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5)-3) date 2020-09-11 10:56:42* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10C,0.050000*% 14 | %ADD11C,0.120000*% 15 | %ADD12C,0.150000*% 16 | G04 APERTURE END LIST* 17 | D10* 18 | X140208000Y-69088000D02* 19 | X140208000Y-41910000D01* 20 | X154940000Y-69088000D02* 21 | X140208000Y-69088000D01* 22 | X154940000Y-41910000D02* 23 | X154940000Y-69088000D01* 24 | X140208000Y-41910000D02* 25 | X154940000Y-41910000D01* 26 | D11* 27 | X148001500Y-43120000D02* 28 | X146351500Y-43120000D01* 29 | X148001500Y-68640000D02* 30 | X148001500Y-43120000D01* 31 | X142701500Y-68640000D02* 32 | X148001500Y-68640000D01* 33 | X142701500Y-43120000D02* 34 | X142701500Y-68640000D01* 35 | X144351500Y-43120000D02* 36 | X142701500Y-43120000D01* 37 | X146351500Y-43120000D02* 38 | G75* 39 | G02X144351500Y-43120000I-1000000J0D01* 40 | G01* 41 | X152392748Y-45160000D02* 42 | X152915252Y-45160000D01* 43 | X152392748Y-43740000D02* 44 | X152915252Y-43740000D01* 45 | D12* 46 | X151066595Y-67016380D02* 47 | X151066595Y-67825904D01* 48 | X151114214Y-67921142D01* 49 | X151161833Y-67968761D01* 50 | X151257071Y-68016380D01* 51 | X151447547Y-68016380D01* 52 | X151542785Y-67968761D01* 53 | X151590404Y-67921142D01* 54 | X151638023Y-67825904D01* 55 | X151638023Y-67016380D01* 56 | X152638023Y-68016380D02* 57 | X152066595Y-68016380D01* 58 | X152352309Y-68016380D02* 59 | X152352309Y-67016380D01* 60 | X152257071Y-67159238D01* 61 | X152161833Y-67254476D01* 62 | X152066595Y-67302095D01* 63 | X153503333Y-47601142D02* 64 | X153455714Y-47648761D01* 65 | X153312857Y-47696380D01* 66 | X153217619Y-47696380D01* 67 | X153074761Y-47648761D01* 68 | X152979523Y-47553523D01* 69 | X152931904Y-47458285D01* 70 | X152884285Y-47267809D01* 71 | X152884285Y-47124952D01* 72 | X152931904Y-46934476D01* 73 | X152979523Y-46839238D01* 74 | X153074761Y-46744000D01* 75 | X153217619Y-46696380D01* 76 | X153312857Y-46696380D01* 77 | X153455714Y-46744000D01* 78 | X153503333Y-46791619D01* 79 | X154455714Y-47696380D02* 80 | X153884285Y-47696380D01* 81 | X154170000Y-47696380D02* 82 | X154170000Y-46696380D01* 83 | X154074761Y-46839238D01* 84 | X153979523Y-46934476D01* 85 | X153884285Y-46982095D01* 86 | M02* 87 | -------------------------------------------------------------------------------- /gal16v8/wincupl/MMU_16V8.mx: -------------------------------------------------------------------------------- 1 | /* 2 | C25953-20 EMMU GAL 16v8 implementation that is fully functional, 3 | but not 1:1 pin compatible (aditional wiring required). 4 | Copyright (C) 2020 Bartosz Mikulski 5 | 6 | This program is free software: you can redistribute it and/or modify 7 | it under the terms of the GNU General Public License as published by 8 | the Free Software Foundation, either version 3 of the License, or 9 | any later version. 10 | 11 | This program is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this program. If not, see . 18 | */ 19 | 20 | Name mmu_16v8 ; 21 | PartNo GAL16v8 ; 22 | Date 5/8/2019 ; 23 | Revision 03 ; 24 | Designer Bartosz Mikulski ; 25 | Company Mikulski Lab ; 26 | Assembly None ; 27 | Location ; 28 | Device g16v8a; 29 | 30 | /* *************** INPUT PINS *********************/ 31 | PIN 1 = CLK ; /* */ 32 | PIN 2 = A14 ; /* */ 33 | PIN 3 = A15 ; /* */ 34 | PIN 4 = PB2_BA14 ; /* */ 35 | PIN 5 = PB3_BA15 ; /* */ 36 | PIN 6 = PB4_CBE ; /* */ 37 | PIN 7 = CAS ; /* */ 38 | PIN 8 = HALT ; /* */ 39 | PIN 11 = !OE ; /* */ 40 | PIN 17 = PB5_VBE ; /* */ 41 | PIN 18 = PHI2 ; /* */ 42 | 43 | /* *************** OUTPUT PINS *********************/ 44 | PIN 12 = LHALT; 45 | PIN 13 = CASBANK ; /* */ 46 | PIN 14 = CASMAIN ; /* */ 47 | PIN 15 = FA14 ; /* */ 48 | PIN 16 = FA15 ; /* */ 49 | PIN 19 = O2; 50 | 51 | LHALT.D = HALT; 52 | O2 = !PHI2; 53 | 54 | $define mux_sel ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))) 55 | 56 | FA14 = !((A14 & !mux_sel) # (PB2_BA14 & mux_sel)); 57 | FA15 = !((A15 & !mux_sel) # (PB3_BA15 & mux_sel)); 58 | 59 | CASBANK = !((!CAS & PHI2) & mux_sel); 60 | CASMAIN = !((!CAS & PHI2) & !mux_sel); 61 | -------------------------------------------------------------------------------- /gal16v8/wincupl/mmu_16v8.PLD: -------------------------------------------------------------------------------- 1 | /* 2 | C25953-20 EMMU GAL 16v8 implementation that is fully functional, 3 | but not 1:1 pin compatible (aditional wiring required). 4 | Copyright (C) 2020 Bartosz Mikulski 5 | 6 | This program is free software: you can redistribute it and/or modify 7 | it under the terms of the GNU General Public License as published by 8 | the Free Software Foundation, either version 3 of the License, or 9 | any later version. 10 | 11 | This program is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this program. If not, see . 18 | */ 19 | 20 | Name mmu_16v8 ; 21 | PartNo GAL16v8 ; 22 | Date 5/8/2019 ; 23 | Revision 03 ; 24 | Designer Bartosz Mikulski ; 25 | Company Mikulski Lab ; 26 | Assembly None ; 27 | Location ; 28 | Device g16v8a; 29 | 30 | /* *************** INPUT PINS *********************/ 31 | PIN 1 = CLK ; /* */ 32 | PIN 2 = A14 ; /* */ 33 | PIN 3 = A15 ; /* */ 34 | PIN 4 = PB2_BA14 ; /* */ 35 | PIN 5 = PB3_BA15 ; /* */ 36 | PIN 6 = PB4_CBE ; /* */ 37 | PIN 7 = CAS ; /* */ 38 | PIN 8 = HALT ; /* */ 39 | PIN 11 = !OE ; /* */ 40 | PIN 17 = PB5_VBE ; /* */ 41 | PIN 18 = PHI2 ; /* */ 42 | 43 | /* *************** OUTPUT PINS *********************/ 44 | PIN 12 = LHALT; 45 | PIN 13 = CASBANK ; /* */ 46 | PIN 14 = CASMAIN ; /* */ 47 | PIN 15 = FA14 ; /* */ 48 | PIN 16 = FA15 ; /* */ 49 | PIN 19 = O2; 50 | 51 | LHALT.D = HALT; 52 | O2 = !PHI2; 53 | 54 | $define mux_sel ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))) 55 | 56 | FA14 = !((A14 & !mux_sel) # (PB2_BA14 & mux_sel)); 57 | FA15 = !((A15 & !mux_sel) # (PB3_BA15 & mux_sel)); 58 | 59 | CASBANK = !((!CAS & PHI2) & mux_sel); 60 | CASMAIN = !((!CAS & PHI2) & !mux_sel); 61 | -------------------------------------------------------------------------------- /gal22v10/wincupl/MMU_GAL22V10.mx: -------------------------------------------------------------------------------- 1 | /* 2 | C25953-20 EMMU GAL22v10 implementation that is fully functional, 3 | but not 1:1 pin compatible (aditional wiring required). 4 | Copyright (C) 2020 Bartosz Mikulski 5 | 6 | This program is free software: you can redistribute it and/or modify 7 | it under the terms of the GNU General Public License as published by 8 | the Free Software Foundation, either version 3 of the License, or 9 | any later version. 10 | 11 | This program is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this program. If not, see . 18 | */ 19 | 20 | Name mmu_22v10 ; 21 | PartNo GAL22v10 ; 22 | Date 5/8/2019 ; 23 | Revision 02 ; 24 | Designer Bartosz Mikulski ; 25 | Company Mikulski Lab ; 26 | Assembly None ; 27 | Location ; 28 | Device g22v10; 29 | 30 | /* *************** INPUT PINS *********************/ 31 | PIN 1 = CLK ; /* */ 32 | PIN 3 = A14 ; /* */ 33 | PIN 4 = A15 ; /* */ 34 | PIN 5 = PB2_BA14 ; /* */ 35 | PIN 6 = PB3_BA15 ; /* */ 36 | PIN 7 = PB4_CBE ; /* */ 37 | PIN 8 = CAS ; /* */ 38 | PIN 13 = !OE ; /* */ 39 | PIN 15 = HALT ; /* */ 40 | PIN 20 = PB5_VBE ; /* */ 41 | PIN 21 = PHI2; 42 | PIN 22 = VCC; 43 | 44 | /* *************** OUTPUT PINS *********************/ 45 | PIN 14 = LHALT; 46 | PIN 16 = CASBANK ; /* */ 47 | PIN 17 = CASMAIN ; /* */ 48 | PIN 18 = FA14 ; /* */ 49 | PIN 19 = FA15 ; /* */ 50 | PIN 23 = O2 ; /* */ 51 | 52 | LHALT.D = HALT; 53 | LHALT.AR = 'b'0; 54 | LHALT.SP = 'b'0; 55 | 56 | O2 = !PHI2; 57 | 58 | $define mux_sel ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))) 59 | 60 | FA14 = !((A14 & !mux_sel) # (PB3_BA15 & mux_sel)); 61 | FA15 = !((A15 & !mux_sel) # (PB2_BA14 & mux_sel)); 62 | 63 | CASBANK = !((!CAS & PHI2) & mux_sel); 64 | CASMAIN = !((!CAS & PHI2) & !mux_sel); 65 | -------------------------------------------------------------------------------- /gal22v10/wincupl/mmu_gal22v10.PLD: -------------------------------------------------------------------------------- 1 | /* 2 | C25953-20 EMMU GAL22v10 implementation that is fully functional, 3 | but not 1:1 pin compatible (aditional wiring required). 4 | Copyright (C) 2020 Bartosz Mikulski 5 | 6 | This program is free software: you can redistribute it and/or modify 7 | it under the terms of the GNU General Public License as published by 8 | the Free Software Foundation, either version 3 of the License, or 9 | any later version. 10 | 11 | This program is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this program. If not, see . 18 | */ 19 | 20 | Name mmu_22v10 ; 21 | PartNo GAL22v10 ; 22 | Date 5/8/2019 ; 23 | Revision 02 ; 24 | Designer Bartosz Mikulski ; 25 | Company Mikulski Lab ; 26 | Assembly None ; 27 | Location ; 28 | Device g22v10; 29 | 30 | /* *************** INPUT PINS *********************/ 31 | PIN 1 = CLK ; /* */ 32 | PIN 3 = A14 ; /* */ 33 | PIN 4 = A15 ; /* */ 34 | PIN 5 = PB2_BA14 ; /* */ 35 | PIN 6 = PB3_BA15 ; /* */ 36 | PIN 7 = PB4_CBE ; /* */ 37 | PIN 8 = CAS ; /* */ 38 | PIN 13 = !OE ; /* */ 39 | PIN 15 = HALT ; /* */ 40 | PIN 20 = PB5_VBE ; /* */ 41 | PIN 21 = PHI2; 42 | PIN 22 = VCC; 43 | 44 | /* *************** OUTPUT PINS *********************/ 45 | PIN 14 = LHALT; 46 | PIN 16 = CASBANK ; /* */ 47 | PIN 17 = CASMAIN ; /* */ 48 | PIN 18 = FA14 ; /* */ 49 | PIN 19 = FA15 ; /* */ 50 | PIN 23 = O2 ; /* */ 51 | 52 | LHALT.D = HALT; 53 | LHALT.AR = 'b'0; 54 | LHALT.SP = 'b'0; 55 | 56 | O2 = !PHI2; 57 | 58 | $define mux_sel ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))) 59 | 60 | FA14 = !((A14 & !mux_sel) # (PB3_BA15 & mux_sel)); 61 | FA15 = !((A15 & !mux_sel) # (PB2_BA14 & mux_sel)); 62 | 63 | CASBANK = !((!CAS & PHI2) & mux_sel); 64 | CASMAIN = !((!CAS & PHI2) & !mux_sel); 65 | -------------------------------------------------------------------------------- /gal16v8/kicad/mmu_16v8.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Connector_Conn_01x08_Male 5 | # 6 | DEF Connector_Conn_01x08_Male J 0 40 Y N 1 F N 7 | F0 "J" 0 400 50 H V C CNN 8 | F1 "Connector_Conn_01x08_Male" 0 -500 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | Connector*:*_1x??_* 13 | $ENDFPLIST 14 | DRAW 15 | S 34 -395 0 -405 1 1 6 F 16 | S 34 -295 0 -305 1 1 6 F 17 | S 34 -195 0 -205 1 1 6 F 18 | S 34 -95 0 -105 1 1 6 F 19 | S 34 5 0 -5 1 1 6 F 20 | S 34 105 0 95 1 1 6 F 21 | S 34 205 0 195 1 1 6 F 22 | S 34 305 0 295 1 1 6 F 23 | P 2 1 1 6 50 -400 34 -400 N 24 | P 2 1 1 6 50 -300 34 -300 N 25 | P 2 1 1 6 50 -200 34 -200 N 26 | P 2 1 1 6 50 -100 34 -100 N 27 | P 2 1 1 6 50 0 34 0 N 28 | P 2 1 1 6 50 100 34 100 N 29 | P 2 1 1 6 50 200 34 200 N 30 | P 2 1 1 6 50 300 34 300 N 31 | X Pin_1 1 200 300 150 L 50 50 1 1 P 32 | X Pin_2 2 200 200 150 L 50 50 1 1 P 33 | X Pin_3 3 200 100 150 L 50 50 1 1 P 34 | X Pin_4 4 200 0 150 L 50 50 1 1 P 35 | X Pin_5 5 200 -100 150 L 50 50 1 1 P 36 | X Pin_6 6 200 -200 150 L 50 50 1 1 P 37 | X Pin_7 7 200 -300 150 L 50 50 1 1 P 38 | X Pin_8 8 200 -400 150 L 50 50 1 1 P 39 | ENDDRAW 40 | ENDDEF 41 | # 42 | # Device_C 43 | # 44 | DEF Device_C C 0 10 N Y 1 F N 45 | F0 "C" 25 100 50 H V L CNN 46 | F1 "Device_C" 25 -100 50 H V L CNN 47 | F2 "" 38 -150 50 H I C CNN 48 | F3 "" 0 0 50 H I C CNN 49 | $FPLIST 50 | C_* 51 | $ENDFPLIST 52 | DRAW 53 | P 2 0 1 20 -80 -30 80 -30 N 54 | P 2 0 1 20 -80 30 80 30 N 55 | X ~ 1 0 150 110 D 50 50 1 1 P 56 | X ~ 2 0 -150 110 U 50 50 1 1 P 57 | ENDDRAW 58 | ENDDEF 59 | # 60 | # Logic_Programmable_GAL16V8 61 | # 62 | DEF Logic_Programmable_GAL16V8 U 0 40 Y Y 1 F N 63 | F0 "U" -350 650 50 H V L CNN 64 | F1 "Logic_Programmable_GAL16V8" 50 650 50 H V L CNN 65 | F2 "" 0 0 50 H I C CNN 66 | F3 "" 0 0 50 H I C CNN 67 | $FPLIST 68 | DIP* 69 | PDIP* 70 | SOIC* 71 | SO* 72 | PLCC* 73 | $ENDFPLIST 74 | DRAW 75 | S -350 550 350 -550 0 1 10 f 76 | X GND 10 0 -700 150 U 50 50 0 0 W 77 | X VCC 20 0 700 150 D 50 50 0 0 W 78 | X I1/CLK 1 -500 500 150 R 50 50 1 1 I 79 | X I10/~OE~ 11 -500 -400 150 R 50 50 1 1 I 80 | X IO8 12 500 -200 150 L 50 50 1 1 T 81 | X IO7 13 500 -100 150 L 50 50 1 1 T 82 | X IO6 14 500 0 150 L 50 50 1 1 T 83 | X IO5 15 500 100 150 L 50 50 1 1 T 84 | X IO4 16 500 200 150 L 50 50 1 1 T 85 | X I03 17 500 300 150 L 50 50 1 1 T 86 | X IO2 18 500 400 150 L 50 50 1 1 T 87 | X IO1 19 500 500 150 L 50 50 1 1 T 88 | X I2 2 -500 400 150 R 50 50 1 1 I 89 | X I3 3 -500 300 150 R 50 50 1 1 I 90 | X I4 4 -500 200 150 R 50 50 1 1 I 91 | X I5 5 -500 100 150 R 50 50 1 1 I 92 | X I6 6 -500 0 150 R 50 50 1 1 I 93 | X I7 7 -500 -100 150 R 50 50 1 1 I 94 | X I8 8 -500 -200 150 R 50 50 1 1 I 95 | X I9 9 -500 -300 150 R 50 50 1 1 I 96 | ENDDRAW 97 | ENDDEF 98 | # 99 | # power_+5V 100 | # 101 | DEF power_+5V #PWR 0 0 Y Y 1 F P 102 | F0 "#PWR" 0 -150 50 H I C CNN 103 | F1 "power_+5V" 0 140 50 H V C CNN 104 | F2 "" 0 0 50 H I C CNN 105 | F3 "" 0 0 50 H I C CNN 106 | DRAW 107 | P 2 0 1 0 -30 50 0 100 N 108 | P 2 0 1 0 0 0 0 100 N 109 | P 2 0 1 0 0 100 30 50 N 110 | X +5V 1 0 0 0 U 50 50 1 1 W N 111 | ENDDRAW 112 | ENDDEF 113 | # 114 | # power_GND 115 | # 116 | DEF power_GND #PWR 0 0 Y Y 1 F P 117 | F0 "#PWR" 0 -250 50 H I C CNN 118 | F1 "power_GND" 0 -150 50 H V C CNN 119 | F2 "" 0 0 50 H I C CNN 120 | F3 "" 0 0 50 H I C CNN 121 | DRAW 122 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 123 | X GND 1 0 0 0 D 50 50 1 1 W N 124 | ENDDRAW 125 | ENDDEF 126 | # 127 | #End Library 128 | -------------------------------------------------------------------------------- /gal16v8/kicad/mmu_16v8-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Connector_Conn_01x08_Male 5 | # 6 | DEF Connector_Conn_01x08_Male J 0 40 Y N 1 F N 7 | F0 "J" 0 400 50 H V C CNN 8 | F1 "Connector_Conn_01x08_Male" 0 -500 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | Connector*:*_1x??_* 13 | $ENDFPLIST 14 | DRAW 15 | S 34 -395 0 -405 1 1 6 F 16 | S 34 -295 0 -305 1 1 6 F 17 | S 34 -195 0 -205 1 1 6 F 18 | S 34 -95 0 -105 1 1 6 F 19 | S 34 5 0 -5 1 1 6 F 20 | S 34 105 0 95 1 1 6 F 21 | S 34 205 0 195 1 1 6 F 22 | S 34 305 0 295 1 1 6 F 23 | P 2 1 1 6 50 -400 34 -400 N 24 | P 2 1 1 6 50 -300 34 -300 N 25 | P 2 1 1 6 50 -200 34 -200 N 26 | P 2 1 1 6 50 -100 34 -100 N 27 | P 2 1 1 6 50 0 34 0 N 28 | P 2 1 1 6 50 100 34 100 N 29 | P 2 1 1 6 50 200 34 200 N 30 | P 2 1 1 6 50 300 34 300 N 31 | X Pin_1 1 200 300 150 L 50 50 1 1 P 32 | X Pin_2 2 200 200 150 L 50 50 1 1 P 33 | X Pin_3 3 200 100 150 L 50 50 1 1 P 34 | X Pin_4 4 200 0 150 L 50 50 1 1 P 35 | X Pin_5 5 200 -100 150 L 50 50 1 1 P 36 | X Pin_6 6 200 -200 150 L 50 50 1 1 P 37 | X Pin_7 7 200 -300 150 L 50 50 1 1 P 38 | X Pin_8 8 200 -400 150 L 50 50 1 1 P 39 | ENDDRAW 40 | ENDDEF 41 | # 42 | # Device_C 43 | # 44 | DEF Device_C C 0 10 N Y 1 F N 45 | F0 "C" 25 100 50 H V L CNN 46 | F1 "Device_C" 25 -100 50 H V L CNN 47 | F2 "" 38 -150 50 H I C CNN 48 | F3 "" 0 0 50 H I C CNN 49 | $FPLIST 50 | C_* 51 | $ENDFPLIST 52 | DRAW 53 | P 2 0 1 20 -80 -30 80 -30 N 54 | P 2 0 1 20 -80 30 80 30 N 55 | X ~ 1 0 150 110 D 50 50 1 1 P 56 | X ~ 2 0 -150 110 U 50 50 1 1 P 57 | ENDDRAW 58 | ENDDEF 59 | # 60 | # Logic_Programmable_GAL16V8 61 | # 62 | DEF Logic_Programmable_GAL16V8 U 0 40 Y Y 1 F N 63 | F0 "U" -350 650 50 H V L CNN 64 | F1 "Logic_Programmable_GAL16V8" 50 650 50 H V L CNN 65 | F2 "" 0 0 50 H I C CNN 66 | F3 "" 0 0 50 H I C CNN 67 | $FPLIST 68 | DIP* 69 | PDIP* 70 | SOIC* 71 | SO* 72 | PLCC* 73 | $ENDFPLIST 74 | DRAW 75 | S -350 550 350 -550 0 1 10 f 76 | X GND 10 0 -700 150 U 50 50 0 0 W 77 | X VCC 20 0 700 150 D 50 50 0 0 W 78 | X I1/CLK 1 -500 500 150 R 50 50 1 1 I 79 | X I10/~OE~ 11 -500 -400 150 R 50 50 1 1 I 80 | X IO8 12 500 -200 150 L 50 50 1 1 T 81 | X IO7 13 500 -100 150 L 50 50 1 1 T 82 | X IO6 14 500 0 150 L 50 50 1 1 T 83 | X IO5 15 500 100 150 L 50 50 1 1 T 84 | X IO4 16 500 200 150 L 50 50 1 1 T 85 | X I03 17 500 300 150 L 50 50 1 1 T 86 | X IO2 18 500 400 150 L 50 50 1 1 T 87 | X IO1 19 500 500 150 L 50 50 1 1 T 88 | X I2 2 -500 400 150 R 50 50 1 1 I 89 | X I3 3 -500 300 150 R 50 50 1 1 I 90 | X I4 4 -500 200 150 R 50 50 1 1 I 91 | X I5 5 -500 100 150 R 50 50 1 1 I 92 | X I6 6 -500 0 150 R 50 50 1 1 I 93 | X I7 7 -500 -100 150 R 50 50 1 1 I 94 | X I8 8 -500 -200 150 R 50 50 1 1 I 95 | X I9 9 -500 -300 150 R 50 50 1 1 I 96 | ENDDRAW 97 | ENDDEF 98 | # 99 | # power_+5V 100 | # 101 | DEF power_+5V #PWR 0 0 Y Y 1 F P 102 | F0 "#PWR" 0 -150 50 H I C CNN 103 | F1 "power_+5V" 0 140 50 H V C CNN 104 | F2 "" 0 0 50 H I C CNN 105 | F3 "" 0 0 50 H I C CNN 106 | DRAW 107 | P 2 0 1 0 -30 50 0 100 N 108 | P 2 0 1 0 0 0 0 100 N 109 | P 2 0 1 0 0 100 30 50 N 110 | X +5V 1 0 0 0 U 50 50 1 1 W N 111 | ENDDRAW 112 | ENDDEF 113 | # 114 | # power_GND 115 | # 116 | DEF power_GND #PWR 0 0 Y Y 1 F P 117 | F0 "#PWR" 0 -250 50 H I C CNN 118 | F1 "power_GND" 0 -150 50 H V C CNN 119 | F2 "" 0 0 50 H I C CNN 120 | F3 "" 0 0 50 H I C CNN 121 | DRAW 122 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 123 | X GND 1 0 0 0 D 50 50 1 1 W N 124 | ENDDRAW 125 | ENDDEF 126 | # 127 | #End Library 128 | -------------------------------------------------------------------------------- /gal16v8/wincupl/MMU_16V8.lst: -------------------------------------------------------------------------------- 1 | LISTING FOR LOGIC DESCRIPTION FILE: MMU_16V8.pld Page 1 2 | 3 | CUPL(WM): Universal Compiler for Programmable Logic 4 | Version 5.0a Serial# 60008009 5 | Copyright (c) 1983, 1998 Logical Devices, Inc. 6 | Created Sat Sep 19 12:51:01 2020 7 | 8 | 1:/* 9 | 2: C25953-20 EMMU GAL 16v8 implementation that is fully functional, 10 | 3: but not 1:1 pin compatible (aditional wiring required). 11 | 4: Copyright (C) 2020 Bartosz Mikulski 12 | 5: 13 | 6: This program is free software: you can redistribute it and/or modify 14 | 7: it under the terms of the GNU General Public License as published by 15 | 8: the Free Software Foundation, either version 3 of the License, or 16 | 9: any later version. 17 | 10: 18 | 11: This program is distributed in the hope that it will be useful, 19 | 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 20 | 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 | 14: GNU General Public License for more details. 22 | 15: 23 | 16: You should have received a copy of the GNU General Public License 24 | 17: along with this program. If not, see . 25 | 18:*/ 26 | 19: 27 | 20:Name mmu_16v8 ; 28 | 21:PartNo GAL16v8 ; 29 | 22:Date 5/8/2019 ; 30 | 23:Revision 03 ; 31 | 24:Designer Bartosz Mikulski ; 32 | 25:Company Mikulski Lab ; 33 | 26:Assembly None ; 34 | 27:Location ; 35 | 28:Device g16v8a; 36 | 29: 37 | 30:/* *************** INPUT PINS *********************/ 38 | 31:PIN 1 = CLK ; /* */ 39 | 32:PIN 2 = A14 ; /* */ 40 | 33:PIN 3 = A15 ; /* */ 41 | 34:PIN 4 = PB2_BA14 ; /* */ 42 | 35:PIN 5 = PB3_BA15 ; /* */ 43 | 36:PIN 6 = PB4_CBE ; /* */ 44 | 37:PIN 7 = CAS ; /* */ 45 | 38:PIN 8 = HALT ; /* */ 46 | 39:PIN 11 = !OE ; /* */ 47 | 40:PIN 17 = PB5_VBE ; /* */ 48 | 41:PIN 18 = PHI2 ; /* */ 49 | 42: 50 | 43:/* *************** OUTPUT PINS *********************/ 51 | 44:PIN 12 = LHALT; 52 | 45:PIN 13 = CASBANK ; /* */ 53 | 46:PIN 14 = CASMAIN ; /* */ 54 | 47:PIN 15 = FA14 ; /* */ 55 | 48:PIN 16 = FA15 ; /* */ 56 | 49:PIN 19 = O2; 57 | 50: 58 | 51:LHALT.D = HALT; 59 | 52:O2 = !PHI2; 60 | 53: 61 | 62 | LISTING FOR LOGIC DESCRIPTION FILE: MMU_16V8.pld Page 2 63 | 64 | CUPL(WM): Universal Compiler for Programmable Logic 65 | Version 5.0a Serial# 60008009 66 | Copyright (c) 1983, 1998 Logical Devices, Inc. 67 | Created Sat Sep 19 12:51:01 2020 68 | 69 | 54:$define mux_sel ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))) 70 | 55: 71 | 56:FA14 = !((A14 & !((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT)))) # (PB2_BA14 & ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))))); 72 | 57:FA15 = !((A15 & !((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT)))) # (PB3_BA15 & ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))))); 73 | 58: 74 | 59:CASBANK = !((!CAS & PHI2) & ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT)))); 75 | 60:CASMAIN = !((!CAS & PHI2) & !((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT)))); 76 | 61: 77 | 62: 78 | 79 | 80 | 81 | Jedec Fuse Checksum (554c) 82 | Jedec Transmit Checksum (178b) 83 | -------------------------------------------------------------------------------- /gal22v10/wincupl/MMU_GAL22V10.lst: -------------------------------------------------------------------------------- 1 | LISTING FOR LOGIC DESCRIPTION FILE: MMU_GAL22V10.pld Page 1 2 | 3 | CUPL(WM): Universal Compiler for Programmable Logic 4 | Version 5.0a Serial# 60008009 5 | Copyright (c) 1983, 1998 Logical Devices, Inc. 6 | Created Sat Sep 19 12:56:49 2020 7 | 8 | 1:/* 9 | 2: C25953-20 EMMU GAL22v10 implementation that is fully functional, 10 | 3: but not 1:1 pin compatible (aditional wiring required). 11 | 4: Copyright (C) 2020 Bartosz Mikulski 12 | 5: 13 | 6: This program is free software: you can redistribute it and/or modify 14 | 7: it under the terms of the GNU General Public License as published by 15 | 8: the Free Software Foundation, either version 3 of the License, or 16 | 9: any later version. 17 | 10: 18 | 11: This program is distributed in the hope that it will be useful, 19 | 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 20 | 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 | 14: GNU General Public License for more details. 22 | 15: 23 | 16: You should have received a copy of the GNU General Public License 24 | 17: along with this program. If not, see . 25 | 18:*/ 26 | 19: 27 | 20:Name mmu_22v10 ; 28 | 21:PartNo GAL22v10 ; 29 | 22:Date 5/8/2019 ; 30 | 23:Revision 02 ; 31 | 24:Designer Bartosz Mikulski ; 32 | 25:Company Mikulski Lab ; 33 | 26:Assembly None ; 34 | 27:Location ; 35 | 28:Device g22v10; 36 | 29: 37 | 30:/* *************** INPUT PINS *********************/ 38 | 31:PIN 1 = CLK ; /* */ 39 | 32:PIN 3 = A14 ; /* */ 40 | 33:PIN 4 = A15 ; /* */ 41 | 34:PIN 5 = PB2_BA14 ; /* */ 42 | 35:PIN 6 = PB3_BA15 ; /* */ 43 | 36:PIN 7 = PB4_CBE ; /* */ 44 | 37:PIN 8 = CAS ; /* */ 45 | 38:PIN 13 = !OE ; /* */ 46 | 39:PIN 15 = HALT ; /* */ 47 | 40:PIN 20 = PB5_VBE ; /* */ 48 | 41:PIN 21 = PHI2; 49 | 42:PIN 22 = VCC; 50 | 43: 51 | 44:/* *************** OUTPUT PINS *********************/ 52 | 45:PIN 14 = LHALT; 53 | 46:PIN 16 = CASBANK ; /* */ 54 | 47:PIN 17 = CASMAIN ; /* */ 55 | 48:PIN 18 = FA14 ; /* */ 56 | 49:PIN 19 = FA15 ; /* */ 57 | 50:PIN 23 = O2 ; /* */ 58 | 51: 59 | 52:LHALT.D = HALT; 60 | 53:LHALT.AR = 'b'0; 61 | 62 | LISTING FOR LOGIC DESCRIPTION FILE: MMU_GAL22V10.pld Page 2 63 | 64 | CUPL(WM): Universal Compiler for Programmable Logic 65 | Version 5.0a Serial# 60008009 66 | Copyright (c) 1983, 1998 Logical Devices, Inc. 67 | Created Sat Sep 19 12:56:49 2020 68 | 69 | 54:LHALT.SP = 'b'0; 70 | 55: 71 | 56:O2 = !PHI2; 72 | 57: 73 | 58:$define mux_sel ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))) 74 | 59: 75 | 60:FA14 = !((A14 & !((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT)))) # (PB3_BA15 & ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))))); 76 | 61:FA15 = !((A15 & !((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT)))) # (PB2_BA14 & ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT))))); 77 | 62: 78 | 63:CASBANK = !((!CAS & PHI2) & ((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT)))); 79 | 64:CASMAIN = !((!CAS & PHI2) & !((!A15 & A14) & ((!PB4_CBE & LHALT) # (!PB5_VBE & !LHALT)))); 80 | 65: 81 | 66: 82 | 83 | 84 | 85 | Jedec Fuse Checksum (7358) 86 | Jedec Transmit Checksum (76db) 87 | -------------------------------------------------------------------------------- /gal16v8/wincupl/MMU_16V8.pdf: -------------------------------------------------------------------------------- 1 | {COMPONENT C:\USERS\BARTOSZ\DOCUMENTS\WINCUPL\ATARI_MMU\GAL16V8\WINCUPL\MMU_16V8.SYM 2 | 3 | {ENVIRONMENT 4 | {PDIFvrev 3.00} 5 | {Program "CUPL(WM) Version 5.0a"} 6 | {DBtype "Schematic"} 7 | {DBvrev 1.01} 8 | {DBtime "Sat Sep 19 12:51:01 2020 "} 9 | {DBunit "MIL"} 10 | {DBgrid 10} 11 | {Lyrstr "WIRES" 1 "BUS" 1 "GATE" 2 "IEEE" 2 "PINFUN" 3 "PINNUM" 1 12 | "PINNAM" 6 "PINCON" 4 "REFDES" 2 "ATTR" 6 "SDOT" 1 13 | "DEVICE" 5 "OUTLIN" 5 "ATTR2" 6 "NOTES" 6 "NETNAM" 4 14 | "CMPNAM" 5 "BORDER" 5} 15 | } 16 | 17 | {USER 18 | {VIEW 19 | {Mode SYMB} 20 | {Nlst OPEN} 21 | {Vw 0 0 2} 22 | {Lv 12 2 2 2 0 0 2 2 2 2 0 0 2 1 2 0 0 0 0} 23 | {Gs 10 10} 24 | } 25 | } 26 | 27 | {DISPLAY 28 | [Ly "PINNUM"] 29 | [Ls "SOLID"][Wd 0] 30 | [Ts 15][Tj "LC"][Tr 0][Tm "N"] 31 | } 32 | 33 | {SYMBOL 34 | {PIN_DEF 35 | [Ly "PINCON"] 36 | {P OE' {Pt "INPUT"}{Lq 0}{Ploc 100 260}} 37 | {P CLK {Pt "INPUT"}{Lq 0}{Ploc 100 240}} 38 | {P A14 {Pt "INPUT"}{Lq 0}{Ploc 100 200}} 39 | {P A15 {Pt "INPUT"}{Lq 0}{Ploc 100 180}} 40 | {P PB2_BA14 {Pt "INPUT"}{Lq 0}{Ploc 100 160}} 41 | {P PB3_BA15 {Pt "INPUT"}{Lq 0}{Ploc 100 140}} 42 | {P PB4_CBE {Pt "INPUT"}{Lq 0}{Ploc 100 120}} 43 | {P CAS {Pt "INPUT"}{Lq 0}{Ploc 100 100}} 44 | {P HALT {Pt "INPUT"}{Lq 0}{Ploc 100 80}} 45 | {P LHALT {Pt "INPUT"}{Lq 0}{Ploc 100 60}} 46 | {P PB5_VBE {Pt "INPUT"}{Lq 0}{Ploc 100 40}} 47 | {P PHI2 {Pt "INPUT"}{Lq 0}{Ploc 100 20}} 48 | {P CASBANK {Pt "I/O"}{Lq 0}{Ploc 350 20}} 49 | {P CASMAIN {Pt "I/O"}{Lq 0}{Ploc 350 40}} 50 | {P FA14 {Pt "I/O"}{Lq 0}{Ploc 350 60}} 51 | {P FA15 {Pt "I/O"}{Lq 0}{Ploc 350 80}} 52 | {P O2 {Pt "I/O"}{Lq 0}{Ploc 350 100}} 53 | } 54 | 55 | {PKG 56 | [Ly "REFDES"] 57 | [Ts 25][Tj "CB"][Tr 0][Tm "N"] 58 | {Rdl 225 290} 59 | 60 | [Ly "PINNUM"] 61 | [Ts 15][Tj "RC"] 62 | {Pnl 120 270} 63 | {Pnl 120 250} 64 | [Ts 15][Tj "RC"] 65 | {Pnl 120 210} 66 | {Pnl 120 190} 67 | {Pnl 120 170} 68 | {Pnl 120 150} 69 | {Pnl 120 130} 70 | {Pnl 120 110} 71 | {Pnl 120 90} 72 | {Pnl 120 70} 73 | {Pnl 120 50} 74 | {Pnl 120 30} 75 | [Ts 15][Tj "LC"] 76 | {Pnl 330 30} 77 | {Pnl 330 50} 78 | {Pnl 330 70} 79 | {Pnl 330 90} 80 | {Pnl 330 110} 81 | 82 | {Sd A 11 1 2 3 4 5 6 7 8 12 17 18 13 14 15 16 19} 83 | } 84 | 85 | {PIC 86 | [Ly "GATE"] 87 | [Ts 15][Tj "LC"][Tr 0][Tm "N"] 88 | {R 130 280 320 0} 89 | {L 120 260 100 260} 90 | {C 125 260 5} 91 | {L 130 240 100 240} 92 | {L 130 250 140 240 130 230} 93 | {L 130 200 100 200} 94 | {L 130 180 100 180} 95 | {L 130 160 100 160} 96 | {L 130 140 100 140} 97 | {L 130 120 100 120} 98 | {L 130 100 100 100} 99 | {L 130 80 100 80} 100 | {L 130 60 100 60} 101 | {L 130 40 100 40} 102 | {L 130 20 100 20} 103 | {L 320 20 350 20} 104 | {L 320 40 350 40} 105 | {L 320 60 350 60} 106 | {L 320 80 350 80} 107 | {L 320 100 350 100} 108 | [Ly "PINNAM"] 109 | [Tj "LC"] 110 | {T "OE'" 140 260} 111 | {T "CLK" 140 240} 112 | {T "A14" 140 200} 113 | {T "A15" 140 180} 114 | {T "PB2_BA14" 140 160} 115 | {T "PB3_BA15" 140 140} 116 | {T "PB4_CBE" 140 120} 117 | {T "CAS" 140 100} 118 | {T "HALT" 140 80} 119 | {T "LHALT" 140 60} 120 | {T "PB5_VBE" 140 40} 121 | {T "PHI2" 140 20} 122 | [Tj "RC"] 123 | {T "CASBANK" 310 20} 124 | {T "CASMAIN" 310 40} 125 | {T "FA14" 310 60} 126 | {T "FA15" 310 80} 127 | {T "O2" 310 100} 128 | [Ly "DEVICE"] 129 | [Tj "CT"] 130 | {T "G16V8MS" 225 -10} 131 | } 132 | 133 | {ATR 134 | {IN 135 | {Org 100 20} 136 | {Ty 255} 137 | } 138 | {EX 139 | [Ly "ATTR2"] 140 | [Ts 12][Tj "CT"][Tr 0][Tm "N"] 141 | {At PLD C:\USERS\BARTOSZ\DOCUMENTS\WINCUPL\ATARI_MMU\GAL16V8\WINCUPL\MMU_16V8 225 280} 142 | } 143 | } 144 | } 145 | 146 | {DETAIL 147 | {ANNOTATE 148 | } 149 | 150 | {NET_DEF 151 | {N OE' 152 | } 153 | {N CLK 154 | } 155 | {N A14 156 | } 157 | {N A15 158 | } 159 | {N PB2_BA14 160 | } 161 | {N PB3_BA15 162 | } 163 | {N PB4_CBE 164 | } 165 | {N CAS 166 | } 167 | {N HALT 168 | } 169 | {N LHALT 170 | } 171 | {N PB5_VBE 172 | } 173 | {N PHI2 174 | } 175 | {N CASBANK 176 | } 177 | {N CASMAIN 178 | } 179 | {N FA14 180 | } 181 | {N FA15 182 | } 183 | {N O2 184 | } 185 | } 186 | 187 | {SUBCOMP 188 | } 189 | } 190 | } 191 | -------------------------------------------------------------------------------- /gal22v10/wincupl/MMU_GAL22V10.pdf: -------------------------------------------------------------------------------- 1 | {COMPONENT C:\USERS\BARTOSZ\DOCUMENTS\WINCUPL\ATARI_MMU\GAL22V10\WINCUPL\MMU_GAL22V10.SYM 2 | 3 | {ENVIRONMENT 4 | {PDIFvrev 3.00} 5 | {Program "CUPL(WM) Version 5.0a"} 6 | {DBtype "Schematic"} 7 | {DBvrev 1.01} 8 | {DBtime "Sat Sep 19 12:56:50 2020 "} 9 | {DBunit "MIL"} 10 | {DBgrid 10} 11 | {Lyrstr "WIRES" 1 "BUS" 1 "GATE" 2 "IEEE" 2 "PINFUN" 3 "PINNUM" 1 12 | "PINNAM" 6 "PINCON" 4 "REFDES" 2 "ATTR" 6 "SDOT" 1 13 | "DEVICE" 5 "OUTLIN" 5 "ATTR2" 6 "NOTES" 6 "NETNAM" 4 14 | "CMPNAM" 5 "BORDER" 5} 15 | } 16 | 17 | {USER 18 | {VIEW 19 | {Mode SYMB} 20 | {Nlst OPEN} 21 | {Vw 0 0 2} 22 | {Lv 12 2 2 2 0 0 2 2 2 2 0 0 2 1 2 0 0 0 0} 23 | {Gs 10 10} 24 | } 25 | } 26 | 27 | {DISPLAY 28 | [Ly "PINNUM"] 29 | [Ls "SOLID"][Wd 0] 30 | [Ts 15][Tj "LC"][Tr 0][Tm "N"] 31 | } 32 | 33 | {SYMBOL 34 | {PIN_DEF 35 | [Ly "PINCON"] 36 | {P CLK {Pt "INPUT"}{Lq 0}{Ploc 100 260}} 37 | {P A14 {Pt "INPUT"}{Lq 0}{Ploc 100 220}} 38 | {P A15 {Pt "INPUT"}{Lq 0}{Ploc 100 200}} 39 | {P PB2_BA14 {Pt "INPUT"}{Lq 0}{Ploc 100 180}} 40 | {P PB3_BA15 {Pt "INPUT"}{Lq 0}{Ploc 100 160}} 41 | {P PB4_CBE {Pt "INPUT"}{Lq 0}{Ploc 100 140}} 42 | {P CAS {Pt "INPUT"}{Lq 0}{Ploc 100 120}} 43 | {P OE' {Pt "INPUT"}{Lq 0}{Ploc 100 100}} 44 | {P HALT {Pt "INPUT"}{Lq 0}{Ploc 100 80}} 45 | {P PB5_VBE {Pt "INPUT"}{Lq 0}{Ploc 100 60}} 46 | {P PHI2 {Pt "INPUT"}{Lq 0}{Ploc 100 40}} 47 | {P VCC {Pt "INPUT"}{Lq 0}{Ploc 100 20}} 48 | {P CASBANK {Pt "I/O"}{Lq 0}{Ploc 350 20}} 49 | {P CASMAIN {Pt "I/O"}{Lq 0}{Ploc 350 40}} 50 | {P FA14 {Pt "I/O"}{Lq 0}{Ploc 350 60}} 51 | {P FA15 {Pt "I/O"}{Lq 0}{Ploc 350 80}} 52 | {P O2 {Pt "I/O"}{Lq 0}{Ploc 350 100}} 53 | {P LHALT {Pt "OUTPUT"}{Lq 0}{Ploc 350 120}} 54 | } 55 | 56 | {PKG 57 | [Ly "REFDES"] 58 | [Ts 25][Tj "CB"][Tr 0][Tm "N"] 59 | {Rdl 225 290} 60 | 61 | [Ly "PINNUM"] 62 | [Ts 15][Tj "RC"] 63 | {Pnl 120 270} 64 | [Ts 15][Tj "RC"] 65 | {Pnl 120 230} 66 | {Pnl 120 210} 67 | {Pnl 120 190} 68 | {Pnl 120 170} 69 | {Pnl 120 150} 70 | {Pnl 120 130} 71 | {Pnl 120 110} 72 | {Pnl 120 90} 73 | {Pnl 120 70} 74 | {Pnl 120 50} 75 | {Pnl 120 30} 76 | [Ts 15][Tj "LC"] 77 | {Pnl 330 30} 78 | {Pnl 330 50} 79 | {Pnl 330 70} 80 | {Pnl 330 90} 81 | {Pnl 330 110} 82 | {Pnl 330 130} 83 | 84 | {Sd A 1 3 4 5 6 7 8 13 15 20 21 22 16 17 18 19 23 14} 85 | } 86 | 87 | {PIC 88 | [Ly "GATE"] 89 | [Ts 15][Tj "LC"][Tr 0][Tm "N"] 90 | {R 130 280 320 0} 91 | {L 130 260 100 260} 92 | {L 130 270 140 260 130 250} 93 | {L 130 220 100 220} 94 | {L 130 200 100 200} 95 | {L 130 180 100 180} 96 | {L 130 160 100 160} 97 | {L 130 140 100 140} 98 | {L 130 120 100 120} 99 | {L 120 100 100 100} 100 | {C 125 100 5} 101 | {L 130 80 100 80} 102 | {L 130 60 100 60} 103 | {L 130 40 100 40} 104 | {L 130 20 100 20} 105 | {L 320 20 350 20} 106 | {L 320 40 350 40} 107 | {L 320 60 350 60} 108 | {L 320 80 350 80} 109 | {L 320 100 350 100} 110 | {L 320 120 350 120} 111 | [Ly "PINNAM"] 112 | [Tj "LC"] 113 | {T "CLK" 140 260} 114 | {T "A14" 140 220} 115 | {T "A15" 140 200} 116 | {T "PB2_BA14" 140 180} 117 | {T "PB3_BA15" 140 160} 118 | {T "PB4_CBE" 140 140} 119 | {T "CAS" 140 120} 120 | {T "OE'" 140 100} 121 | {T "HALT" 140 80} 122 | {T "PB5_VBE" 140 60} 123 | {T "PHI2" 140 40} 124 | {T "VCC" 140 20} 125 | [Tj "RC"] 126 | {T "CASBANK" 310 20} 127 | {T "CASMAIN" 310 40} 128 | {T "FA14" 310 60} 129 | {T "FA15" 310 80} 130 | {T "O2" 310 100} 131 | {T "LHALT" 310 120} 132 | [Ly "DEVICE"] 133 | [Tj "CT"] 134 | {T "G22V10" 225 -10} 135 | } 136 | 137 | {ATR 138 | {IN 139 | {Org 100 20} 140 | {Ty 255} 141 | } 142 | {EX 143 | [Ly "ATTR2"] 144 | [Ts 12][Tj "CT"][Tr 0][Tm "N"] 145 | {At PLD C:\USERS\BARTOSZ\DOCUMENTS\WINCUPL\ATARI_MMU\GAL22V10\WINCUPL\MMU_GAL22V10 225 280} 146 | } 147 | } 148 | } 149 | 150 | {DETAIL 151 | {ANNOTATE 152 | } 153 | 154 | {NET_DEF 155 | {N CLK 156 | } 157 | {N A14 158 | } 159 | {N A15 160 | } 161 | {N PB2_BA14 162 | } 163 | {N PB3_BA15 164 | } 165 | {N PB4_CBE 166 | } 167 | {N CAS 168 | } 169 | {N OE' 170 | } 171 | {N HALT 172 | } 173 | {N PB5_VBE 174 | } 175 | {N PHI2 176 | } 177 | {N VCC 178 | } 179 | {N CASBANK 180 | } 181 | {N CASMAIN 182 | } 183 | {N FA14 184 | } 185 | {N FA15 186 | } 187 | {N O2 188 | } 189 | {N LHALT 190 | } 191 | } 192 | 193 | {SUBCOMP 194 | } 195 | } 196 | } 197 | -------------------------------------------------------------------------------- /gal16v8/kicad/mmu_16v8.pro: -------------------------------------------------------------------------------- 1 | update=11/06/2020 12:35:40 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [cvpcb] 9 | version=1 10 | NetIExt=net 11 | [eeschema] 12 | version=1 13 | LibDir= 14 | [eeschema/libraries] 15 | [pcbnew] 16 | version=1 17 | PageLayoutDescrFile= 18 | LastNetListRead= 19 | CopperLayerCount=2 20 | BoardThickness=1.6 21 | AllowMicroVias=0 22 | AllowBlindVias=0 23 | RequireCourtyardDefinitions=0 24 | ProhibitOverlappingCourtyards=1 25 | MinTrackWidth=0.2 26 | MinViaDiameter=0.4 27 | MinViaDrill=0.3 28 | MinMicroViaDiameter=0.2 29 | MinMicroViaDrill=0.09999999999999999 30 | MinHoleToHole=0.25 31 | TrackWidth1=0.25 32 | ViaDiameter1=0.8 33 | ViaDrill1=0.4 34 | dPairWidth1=0.2 35 | dPairGap1=0.25 36 | dPairViaGap1=0.25 37 | SilkLineWidth=0.12 38 | SilkTextSizeV=1 39 | SilkTextSizeH=1 40 | SilkTextSizeThickness=0.15 41 | SilkTextItalic=0 42 | SilkTextUpright=1 43 | CopperLineWidth=0.2 44 | CopperTextSizeV=1.5 45 | CopperTextSizeH=1.5 46 | CopperTextThickness=0.3 47 | CopperTextItalic=0 48 | CopperTextUpright=1 49 | EdgeCutLineWidth=0.05 50 | CourtyardLineWidth=0.05 51 | OthersLineWidth=0.15 52 | OthersTextSizeV=1 53 | OthersTextSizeH=1 54 | OthersTextSizeThickness=0.15 55 | OthersTextItalic=0 56 | OthersTextUpright=1 57 | SolderMaskClearance=0.051 58 | SolderMaskMinWidth=0.25 59 | SolderPasteClearance=0 60 | SolderPasteRatio=-0 61 | [pcbnew/Layer.F.Cu] 62 | Name=F.Cu 63 | Type=0 64 | Enabled=1 65 | [pcbnew/Layer.In1.Cu] 66 | Name=In1.Cu 67 | Type=0 68 | Enabled=0 69 | [pcbnew/Layer.In2.Cu] 70 | Name=In2.Cu 71 | Type=0 72 | Enabled=0 73 | [pcbnew/Layer.In3.Cu] 74 | Name=In3.Cu 75 | Type=0 76 | Enabled=0 77 | [pcbnew/Layer.In4.Cu] 78 | Name=In4.Cu 79 | Type=0 80 | Enabled=0 81 | [pcbnew/Layer.In5.Cu] 82 | Name=In5.Cu 83 | Type=0 84 | Enabled=0 85 | [pcbnew/Layer.In6.Cu] 86 | Name=In6.Cu 87 | Type=0 88 | Enabled=0 89 | [pcbnew/Layer.In7.Cu] 90 | Name=In7.Cu 91 | Type=0 92 | Enabled=0 93 | [pcbnew/Layer.In8.Cu] 94 | Name=In8.Cu 95 | Type=0 96 | Enabled=0 97 | [pcbnew/Layer.In9.Cu] 98 | Name=In9.Cu 99 | Type=0 100 | Enabled=0 101 | [pcbnew/Layer.In10.Cu] 102 | Name=In10.Cu 103 | Type=0 104 | Enabled=0 105 | [pcbnew/Layer.In11.Cu] 106 | Name=In11.Cu 107 | Type=0 108 | Enabled=0 109 | [pcbnew/Layer.In12.Cu] 110 | Name=In12.Cu 111 | Type=0 112 | Enabled=0 113 | [pcbnew/Layer.In13.Cu] 114 | Name=In13.Cu 115 | Type=0 116 | Enabled=0 117 | [pcbnew/Layer.In14.Cu] 118 | Name=In14.Cu 119 | Type=0 120 | Enabled=0 121 | [pcbnew/Layer.In15.Cu] 122 | Name=In15.Cu 123 | Type=0 124 | Enabled=0 125 | [pcbnew/Layer.In16.Cu] 126 | Name=In16.Cu 127 | Type=0 128 | Enabled=0 129 | [pcbnew/Layer.In17.Cu] 130 | Name=In17.Cu 131 | Type=0 132 | Enabled=0 133 | [pcbnew/Layer.In18.Cu] 134 | Name=In18.Cu 135 | Type=0 136 | Enabled=0 137 | [pcbnew/Layer.In19.Cu] 138 | Name=In19.Cu 139 | Type=0 140 | Enabled=0 141 | [pcbnew/Layer.In20.Cu] 142 | Name=In20.Cu 143 | Type=0 144 | Enabled=0 145 | [pcbnew/Layer.In21.Cu] 146 | Name=In21.Cu 147 | Type=0 148 | Enabled=0 149 | [pcbnew/Layer.In22.Cu] 150 | Name=In22.Cu 151 | Type=0 152 | Enabled=0 153 | [pcbnew/Layer.In23.Cu] 154 | Name=In23.Cu 155 | Type=0 156 | Enabled=0 157 | [pcbnew/Layer.In24.Cu] 158 | Name=In24.Cu 159 | Type=0 160 | Enabled=0 161 | [pcbnew/Layer.In25.Cu] 162 | Name=In25.Cu 163 | Type=0 164 | Enabled=0 165 | [pcbnew/Layer.In26.Cu] 166 | Name=In26.Cu 167 | Type=0 168 | Enabled=0 169 | [pcbnew/Layer.In27.Cu] 170 | Name=In27.Cu 171 | Type=0 172 | Enabled=0 173 | [pcbnew/Layer.In28.Cu] 174 | Name=In28.Cu 175 | Type=0 176 | Enabled=0 177 | [pcbnew/Layer.In29.Cu] 178 | Name=In29.Cu 179 | Type=0 180 | Enabled=0 181 | [pcbnew/Layer.In30.Cu] 182 | Name=In30.Cu 183 | Type=0 184 | Enabled=0 185 | [pcbnew/Layer.B.Cu] 186 | Name=B.Cu 187 | Type=0 188 | Enabled=1 189 | [pcbnew/Layer.B.Adhes] 190 | Enabled=1 191 | [pcbnew/Layer.F.Adhes] 192 | Enabled=1 193 | [pcbnew/Layer.B.Paste] 194 | Enabled=1 195 | [pcbnew/Layer.F.Paste] 196 | Enabled=1 197 | [pcbnew/Layer.B.SilkS] 198 | Enabled=1 199 | [pcbnew/Layer.F.SilkS] 200 | Enabled=1 201 | [pcbnew/Layer.B.Mask] 202 | Enabled=1 203 | [pcbnew/Layer.F.Mask] 204 | Enabled=1 205 | [pcbnew/Layer.Dwgs.User] 206 | Enabled=1 207 | [pcbnew/Layer.Cmts.User] 208 | Enabled=1 209 | [pcbnew/Layer.Eco1.User] 210 | Enabled=1 211 | [pcbnew/Layer.Eco2.User] 212 | Enabled=1 213 | [pcbnew/Layer.Edge.Cuts] 214 | Enabled=1 215 | [pcbnew/Layer.Margin] 216 | Enabled=1 217 | [pcbnew/Layer.B.CrtYd] 218 | Enabled=1 219 | [pcbnew/Layer.F.CrtYd] 220 | Enabled=1 221 | [pcbnew/Layer.B.Fab] 222 | Enabled=1 223 | [pcbnew/Layer.F.Fab] 224 | Enabled=1 225 | [pcbnew/Layer.Rescue] 226 | Enabled=0 227 | [pcbnew/Netclasses] 228 | [pcbnew/Netclasses/Default] 229 | Name=Default 230 | Clearance=0.2 231 | TrackWidth=0.25 232 | ViaDiameter=0.8 233 | ViaDrill=0.4 234 | uViaDiameter=0.3 235 | uViaDrill=0.1 236 | dPairWidth=0.2 237 | dPairGap=0.25 238 | dPairViaGap=0.25 239 | [pcbnew/Netclasses/1] 240 | Name=VCC 241 | Clearance=0.2 242 | TrackWidth=0.508 243 | ViaDiameter=0.8 244 | ViaDrill=0.4 245 | uViaDiameter=0.3 246 | uViaDrill=0.1 247 | dPairWidth=0.2 248 | dPairGap=0.25 249 | dPairViaGap=0.25 250 | [schematic_editor] 251 | version=1 252 | PageLayoutDescrFile= 253 | PlotDirectoryName=./ 254 | SubpartIdSeparator=0 255 | SubpartFirstId=65 256 | NetFmtName= 257 | SpiceAjustPassiveValues=0 258 | LabSize=50 259 | ERC_TestSimilarLabels=1 260 | -------------------------------------------------------------------------------- /gal16v8/kicad/mmu_16v8.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 1 1 7 | Title "EMMU GAL16v8" 8 | Date "2020-06-11" 9 | Rev "1.0" 10 | Comp "Mikulski-Lab" 11 | Comment1 "" 12 | Comment2 "" 13 | Comment3 "" 14 | Comment4 "" 15 | $EndDescr 16 | $Comp 17 | L Logic_Programmable:GAL16V8 U1 18 | U 1 1 5EECB8DE 19 | P 4300 4000 20 | F 0 "U1" H 4000 4650 50 0000 C CNN 21 | F 1 "GAL16V8" H 4500 3350 50 0000 C CNN 22 | F 2 "Package_DIP:DIP-20_W7.62mm" H 4300 4789 50 0001 C CNN 23 | F 3 "" H 4300 4000 50 0001 C CNN 24 | 1 4300 4000 25 | 1 0 0 -1 26 | $EndComp 27 | Text Label 3600 3500 0 50 ~ 0 28 | ~PHI2 29 | Wire Wire Line 30 | 3600 3500 3800 3500 31 | Wire Wire Line 32 | 3600 3600 3800 3600 33 | Wire Wire Line 34 | 3600 3700 3800 3700 35 | Wire Wire Line 36 | 3600 3800 3800 3800 37 | Wire Wire Line 38 | 3600 3900 3800 3900 39 | Wire Wire Line 40 | 3600 4000 3800 4000 41 | Wire Wire Line 42 | 3600 4100 3800 4100 43 | Wire Wire Line 44 | 3600 4200 3800 4200 45 | Wire Wire Line 46 | 3600 4300 3800 4300 47 | Wire Wire Line 48 | 3600 4400 3800 4400 49 | Wire Wire Line 50 | 4800 3500 5050 3500 51 | Wire Wire Line 52 | 4800 3600 5050 3600 53 | Wire Wire Line 54 | 4800 3700 5050 3700 55 | Wire Wire Line 56 | 4800 3800 5050 3800 57 | Wire Wire Line 58 | 4800 3900 5050 3900 59 | Wire Wire Line 60 | 4800 4000 5050 4000 61 | Wire Wire Line 62 | 4800 4100 5050 4100 63 | Wire Wire Line 64 | 4800 4200 5050 4200 65 | Text Label 3600 3600 0 50 ~ 0 66 | A14 67 | Text Label 3600 3700 0 50 ~ 0 68 | A15 69 | Text Label 3600 3800 0 50 ~ 0 70 | PB2 71 | Text Label 3600 3900 0 50 ~ 0 72 | PB3 73 | Text Label 3600 4000 0 50 ~ 0 74 | PB4 75 | Text Label 3600 4100 0 50 ~ 0 76 | ~CAS 77 | Text Label 3600 4200 0 50 ~ 0 78 | HALT 79 | Text Label 4800 3600 0 50 ~ 0 80 | PHI2 81 | Text Label 4800 3500 0 50 ~ 0 82 | ~PHI2 83 | Text Label 4800 3700 0 50 ~ 0 84 | VBE 85 | Text Label 4800 3800 0 50 ~ 0 86 | FA15 87 | Text Label 4800 3900 0 50 ~ 0 88 | FA14 89 | Text Label 4800 4000 0 50 ~ 0 90 | CASMAIN 91 | Text Label 4800 4100 0 50 ~ 0 92 | CASBANK 93 | Text Label 3600 4400 0 50 ~ 0 94 | GND 95 | Wire Wire Line 96 | 5900 3500 6100 3500 97 | Wire Wire Line 98 | 5900 3600 6100 3600 99 | Wire Wire Line 100 | 5900 3700 6100 3700 101 | Wire Wire Line 102 | 5900 3900 6100 3900 103 | Wire Wire Line 104 | 5900 4000 6100 4000 105 | Text Label 5900 3500 0 50 ~ 0 106 | A14 107 | Text Label 5900 3600 0 50 ~ 0 108 | A15 109 | Text Label 5900 3700 0 50 ~ 0 110 | PB2 111 | Text Label 5900 3800 0 50 ~ 0 112 | PB3 113 | Text Label 5900 3900 0 50 ~ 0 114 | PB4 115 | Text Label 5900 4000 0 50 ~ 0 116 | ~CAS 117 | Wire Wire Line 118 | 6800 3600 7000 3600 119 | Wire Wire Line 120 | 6800 3700 7000 3700 121 | Wire Wire Line 122 | 6800 3800 7000 3800 123 | Wire Wire Line 124 | 6800 3900 7000 3900 125 | Wire Wire Line 126 | 6800 4000 7000 4000 127 | Wire Wire Line 128 | 6800 4100 7000 4100 129 | Wire Wire Line 130 | 6800 4200 7000 4200 131 | Text Label 6800 3600 0 50 ~ 0 132 | PHI2 133 | Text Label 6800 3700 0 50 ~ 0 134 | VBE 135 | Text Label 6800 3800 0 50 ~ 0 136 | FA15 137 | Text Label 6800 3900 0 50 ~ 0 138 | FA14 139 | Text Label 6800 4000 0 50 ~ 0 140 | CASMAIN 141 | Text Label 6800 4100 0 50 ~ 0 142 | CASBANK 143 | $Comp 144 | L Device:C C1 145 | U 1 1 5EEE4218 146 | P 7900 3650 147 | F 0 "C1" H 8015 3696 50 0000 L CNN 148 | F 1 "100nF" H 8015 3605 50 0000 L CNN 149 | F 2 "Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder" H 7938 3500 50 0001 C CNN 150 | F 3 "~" H 7900 3650 50 0001 C CNN 151 | 1 7900 3650 152 | 1 0 0 -1 153 | $EndComp 154 | $Comp 155 | L power:+5V #PWR0101 156 | U 1 1 5EED029D 157 | P 4300 3200 158 | F 0 "#PWR0101" H 4300 3050 50 0001 C CNN 159 | F 1 "+5V" H 4315 3373 50 0000 C CNN 160 | F 2 "" H 4300 3200 50 0001 C CNN 161 | F 3 "" H 4300 3200 50 0001 C CNN 162 | 1 4300 3200 163 | 1 0 0 -1 164 | $EndComp 165 | $Comp 166 | L power:+5V #PWR0102 167 | U 1 1 5EED0627 168 | P 7900 3400 169 | F 0 "#PWR0102" H 7900 3250 50 0001 C CNN 170 | F 1 "+5V" H 7915 3573 50 0000 C CNN 171 | F 2 "" H 7900 3400 50 0001 C CNN 172 | F 3 "" H 7900 3400 50 0001 C CNN 173 | 1 7900 3400 174 | 1 0 0 -1 175 | $EndComp 176 | $Comp 177 | L power:+5V #PWR0103 178 | U 1 1 5EED1067 179 | P 6900 3400 180 | F 0 "#PWR0103" H 6900 3250 50 0001 C CNN 181 | F 1 "+5V" H 6915 3573 50 0000 C CNN 182 | F 2 "" H 6900 3400 50 0001 C CNN 183 | F 3 "" H 6900 3400 50 0001 C CNN 184 | 1 6900 3400 185 | 1 0 0 -1 186 | $EndComp 187 | Wire Wire Line 188 | 6800 3500 6900 3500 189 | Wire Wire Line 190 | 6900 3500 6900 3400 191 | $Comp 192 | L power:GND #PWR0104 193 | U 1 1 5EED5291 194 | P 7900 3900 195 | F 0 "#PWR0104" H 7900 3650 50 0001 C CNN 196 | F 1 "GND" H 7905 3727 50 0000 C CNN 197 | F 2 "" H 7900 3900 50 0001 C CNN 198 | F 3 "" H 7900 3900 50 0001 C CNN 199 | 1 7900 3900 200 | 1 0 0 -1 201 | $EndComp 202 | $Comp 203 | L power:GND #PWR0105 204 | U 1 1 5EED5C8E 205 | P 4300 4800 206 | F 0 "#PWR0105" H 4300 4550 50 0001 C CNN 207 | F 1 "GND" H 4305 4627 50 0000 C CNN 208 | F 2 "" H 4300 4800 50 0001 C CNN 209 | F 3 "" H 4300 4800 50 0001 C CNN 210 | 1 4300 4800 211 | 1 0 0 -1 212 | $EndComp 213 | Wire Wire Line 214 | 6000 4100 6100 4100 215 | Wire Wire Line 216 | 6100 4200 6000 4200 217 | Connection ~ 6000 4200 218 | Wire Wire Line 219 | 6000 4200 6000 4100 220 | Wire Wire Line 221 | 4300 3200 4300 3300 222 | Wire Wire Line 223 | 4300 4700 4300 4800 224 | Wire Wire Line 225 | 7900 3400 7900 3500 226 | Wire Wire Line 227 | 7900 3800 7900 3900 228 | Text Label 4800 4200 0 50 ~ 0 229 | LHALT 230 | Text Label 3600 4300 0 50 ~ 0 231 | GND 232 | Text Label 6800 4200 0 50 ~ 0 233 | HALT 234 | Wire Wire Line 235 | 6000 4250 6000 4200 236 | $Comp 237 | L power:GND #PWR0106 238 | U 1 1 5EED67E0 239 | P 6000 4250 240 | F 0 "#PWR0106" H 6000 4000 50 0001 C CNN 241 | F 1 "GND" H 6005 4077 50 0000 C CNN 242 | F 2 "" H 6000 4250 50 0001 C CNN 243 | F 3 "" H 6000 4250 50 0001 C CNN 244 | 1 6000 4250 245 | 1 0 0 -1 246 | $EndComp 247 | Wire Wire Line 248 | 5900 3800 6100 3800 249 | $Comp 250 | L Connector:Conn_01x08_Male J2 251 | U 1 1 5EED9A52 252 | P 6600 3800 253 | F 0 "J2" H 6650 4200 50 0000 C CNN 254 | F 1 "Conn_01x08_Male" V 6500 3750 50 0000 C CNN 255 | F 2 "Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical" H 6600 3800 50 0001 C CNN 256 | F 3 "~" H 6600 3800 50 0001 C CNN 257 | 1 6600 3800 258 | 1 0 0 -1 259 | $EndComp 260 | $Comp 261 | L Connector:Conn_01x08_Male J1 262 | U 1 1 5EEDB2CC 263 | P 6300 3800 264 | F 0 "J1" H 6350 4200 50 0000 R CNN 265 | F 1 "Conn_01x08_Male" V 6250 4100 50 0000 R CNN 266 | F 2 "Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical" H 6300 3800 50 0001 C CNN 267 | F 3 "~" H 6300 3800 50 0001 C CNN 268 | 1 6300 3800 269 | -1 0 0 -1 270 | $EndComp 271 | $EndSCHEMATC 272 | -------------------------------------------------------------------------------- /gal16v8/wincupl/MMU_16V8.doc: -------------------------------------------------------------------------------- 1 | 2 | ******************************************************************************* 3 | mmu_16v8 4 | ******************************************************************************* 5 | 6 | CUPL(WM) 5.0a Serial# 60008009 7 | Device g16v8ms Library DLIB-h-40-11 8 | Created Sat Sep 19 12:51:01 2020 9 | Name mmu_16v8 10 | Partno GAL16v8 11 | Revision 03 12 | Date 5/8/2019 13 | Designer Bartosz Mikulski 14 | Company Mikulski Lab 15 | Assembly None 16 | Location 17 | 18 | =============================================================================== 19 | Expanded Product Terms 20 | =============================================================================== 21 | 22 | CASBANK => 23 | A14 & !A15 & !CAS & LHALT & !PB4_CBE & PHI2 24 | # A14 & !A15 & !CAS & !LHALT & !PB5_VBE & PHI2 25 | 26 | CASMAIN => 27 | !A14 & !CAS & PHI2 28 | # A15 & !CAS & PHI2 29 | # !CAS & LHALT & PB4_CBE & PHI2 30 | # !CAS & !LHALT & PB5_VBE & PHI2 31 | 32 | FA14 => 33 | A14 & A15 34 | # A14 & PB2_BA14 35 | # A14 & LHALT & PB4_CBE 36 | # A14 & !LHALT & PB5_VBE 37 | 38 | FA15 => 39 | A15 40 | # A14 & LHALT & PB3_BA15 & !PB4_CBE 41 | # A14 & !LHALT & PB3_BA15 & !PB5_VBE 42 | 43 | LHALT.d => 44 | HALT 45 | 46 | O2 => 47 | !PHI2 48 | 49 | CASBANK.oe => 50 | 1 51 | 52 | CASMAIN.oe => 53 | 1 54 | 55 | FA14.oe => 56 | 1 57 | 58 | FA15.oe => 59 | 1 60 | 61 | O2.oe => 62 | 1 63 | 64 | PB5_VBE.oe => 65 | 0 66 | 67 | PHI2.oe => 68 | 0 69 | 70 | 71 | =============================================================================== 72 | Symbol Table 73 | =============================================================================== 74 | 75 | Pin Variable Pterms Max Min 76 | Pol Name Ext Pin Type Used Pterms Level 77 | --- -------- --- --- ---- ------ ------ ----- 78 | 79 | A14 2 V - - - 80 | A15 3 V - - - 81 | CAS 7 V - - - 82 | CASBANK 13 V 2 7 2 83 | CASMAIN 14 V 4 7 2 84 | CLK 1 V - - - 85 | FA14 15 V 4 7 2 86 | FA15 16 V 3 7 2 87 | HALT 8 V - - - 88 | LHALT 12 V - - - 89 | LHALT d 12 X 1 8 2 90 | O2 19 V 1 7 2 91 | ! OE 11 V - - - 92 | PB2_BA14 4 V - - - 93 | PB3_BA15 5 V - - - 94 | PB4_CBE 6 V - - - 95 | PB5_VBE 17 V - - - 96 | PHI2 18 V - - - 97 | CASBANK oe 13 D 1 1 0 98 | CASMAIN oe 14 D 1 1 0 99 | FA14 oe 15 D 1 1 0 100 | FA15 oe 16 D 1 1 0 101 | O2 oe 19 D 1 1 0 102 | PB5_VBE oe 17 D 1 1 0 103 | PHI2 oe 18 D 1 1 0 104 | 105 | 106 | LEGEND D : default variable F : field G : group 107 | I : intermediate variable N : node M : extended node 108 | U : undefined V : variable X : extended variable 109 | T : function 110 | 111 | 112 | =============================================================================== 113 | Fuse Plot 114 | =============================================================================== 115 | 116 | Syn 02192 x Ac0 02193 - 117 | 118 | Pin #19 02048 Pol - 02120 Ac1 - 119 | 00000 -------------------------------- 120 | 00032 -------x------------------------ 121 | 00064 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 122 | 00096 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 123 | 00128 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 124 | 00160 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 125 | 00192 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 126 | 00224 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 127 | Pin #18 02049 Pol x 02121 Ac1 - 128 | 00256 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 129 | 00288 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 130 | 00320 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 131 | 00352 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 132 | 00384 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 133 | 00416 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 134 | 00448 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 135 | 00480 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 136 | Pin #17 02050 Pol x 02122 Ac1 - 137 | 00512 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 138 | 00544 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 139 | 00576 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 140 | 00608 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 141 | 00640 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 142 | 00672 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 143 | 00704 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 144 | 00736 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 145 | Pin #16 02051 Pol x 02123 Ac1 - 146 | 00768 -------------------------------- 147 | 00800 ----x--------------------------- 148 | 00832 x-----------x----x------------x- 149 | 00864 x----------xx------------------x 150 | 00896 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 151 | 00928 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 152 | 00960 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 153 | 00992 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 154 | Pin #15 02052 Pol x 02124 Ac1 - 155 | 01024 -------------------------------- 156 | 01056 x---x--------------------------- 157 | 01088 x-------x----------------------- 158 | 01120 x---------------x-------------x- 159 | 01152 x---------x--------------------x 160 | 01184 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 161 | 01216 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 162 | 01248 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 163 | Pin #14 02053 Pol x 02125 Ac1 - 164 | 01280 -------------------------------- 165 | 01312 -x----x--------------x---------- 166 | 01344 ----x-x--------------x---------- 167 | 01376 ------x---------x----x--------x- 168 | 01408 ------x---x----------x---------x 169 | 01440 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 170 | 01472 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 171 | 01504 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 172 | Pin #13 02054 Pol x 02126 Ac1 - 173 | 01536 -------------------------------- 174 | 01568 x----xx----------x---x--------x- 175 | 01600 x----xx----x---------x---------x 176 | 01632 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 177 | 01664 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 178 | 01696 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 179 | 01728 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 180 | 01760 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 181 | Pin #12 02055 Pol - 02127 Ac1 x 182 | 01792 ------------------------x------- 183 | 01824 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 184 | 01856 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 185 | 01888 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 186 | 01920 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 187 | 01952 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 188 | 01984 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 189 | 02016 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 190 | 191 | 192 | LEGEND X : fuse not blown 193 | - : fuse blown 194 | 195 | =============================================================================== 196 | Chip Diagram 197 | =============================================================================== 198 | 199 | ______________ 200 | | mmu_16v8 | 201 | CLK x---|1 20|---x Vcc 202 | A14 x---|2 19|---x O2 203 | A15 x---|3 18|---x PHI2 204 | PB2_BA14 x---|4 17|---x PB5_VBE 205 | PB3_BA15 x---|5 16|---x FA15 206 | PB4_CBE x---|6 15|---x FA14 207 | CAS x---|7 14|---x CASMAIN 208 | HALT x---|8 13|---x CASBANK 209 | x---|9 12|---x LHALT 210 | GND x---|10 11|---x !OE 211 | |______________| 212 | 213 | -------------------------------------------------------------------------------- /gal16v8/kicad/gerber/mmu_16v8-F_Cu.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5)-3* 2 | G04 #@! TF.CreationDate,2020-09-11T10:56:42+02:00* 3 | G04 #@! TF.ProjectId,mmu_16v8,6d6d755f-3136-4763-982e-6b696361645f,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Copper,L1,Top* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5)-3) date 2020-09-11 10:56:42* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10C,0.127000*% 14 | %ADD11C,0.050000*% 15 | %ADD12O,1.700000X1.700000*% 16 | %ADD13R,1.700000X1.700000*% 17 | %ADD14O,1.600000X1.600000*% 18 | %ADD15R,1.600000X1.600000*% 19 | %ADD16C,0.100000*% 20 | %ADD17C,0.800000*% 21 | %ADD18C,0.250000*% 22 | %ADD19C,0.508000*% 23 | G04 APERTURE END LIST* 24 | D10* 25 | X153869571Y-62937571D02* 26 | X153869571Y-62683571D01* 27 | X154268714Y-62574714D02* 28 | X154268714Y-62937571D01* 29 | X153506714Y-62937571D01* 30 | X153506714Y-62574714D01* 31 | X154268714Y-62248142D02* 32 | X153506714Y-62248142D01* 33 | X154051000Y-61994142D01* 34 | X153506714Y-61740142D01* 35 | X154268714Y-61740142D01* 36 | X154268714Y-61377285D02* 37 | X153506714Y-61377285D01* 38 | X154051000Y-61123285D01* 39 | X153506714Y-60869285D01* 40 | X154268714Y-60869285D01* 41 | X153506714Y-60506428D02* 42 | X154123571Y-60506428D01* 43 | X154196142Y-60470142D01* 44 | X154232428Y-60433857D01* 45 | X154268714Y-60361285D01* 46 | X154268714Y-60216142D01* 47 | X154232428Y-60143571D01* 48 | X154196142Y-60107285D01* 49 | X154123571Y-60071000D01* 50 | X153506714Y-60071000D01* 51 | X153978428Y-59127571D02* 52 | X153978428Y-58547000D01* 53 | X154268714Y-57603571D02* 54 | X153506714Y-57603571D01* 55 | X154051000Y-57349571D01* 56 | X153506714Y-57095571D01* 57 | X154268714Y-57095571D01* 58 | X154268714Y-56732714D02* 59 | X153760714Y-56732714D01* 60 | X153506714Y-56732714D02* 61 | X153543000Y-56769000D01* 62 | X153579285Y-56732714D01* 63 | X153543000Y-56696428D01* 64 | X153506714Y-56732714D01* 65 | X153579285Y-56732714D01* 66 | X154268714Y-56369857D02* 67 | X153506714Y-56369857D01* 68 | X153978428Y-56297285D02* 69 | X154268714Y-56079571D01* 70 | X153760714Y-56079571D02* 71 | X154051000Y-56369857D01* 72 | X153760714Y-55426428D02* 73 | X154268714Y-55426428D01* 74 | X153760714Y-55753000D02* 75 | X154159857Y-55753000D01* 76 | X154232428Y-55716714D01* 77 | X154268714Y-55644142D01* 78 | X154268714Y-55535285D01* 79 | X154232428Y-55462714D01* 80 | X154196142Y-55426428D01* 81 | X154268714Y-54954714D02* 82 | X154232428Y-55027285D01* 83 | X154159857Y-55063571D01* 84 | X153506714Y-55063571D01* 85 | X154232428Y-54700714D02* 86 | X154268714Y-54628142D01* 87 | X154268714Y-54483000D01* 88 | X154232428Y-54410428D01* 89 | X154159857Y-54374142D01* 90 | X154123571Y-54374142D01* 91 | X154051000Y-54410428D01* 92 | X154014714Y-54483000D01* 93 | X154014714Y-54591857D01* 94 | X153978428Y-54664428D01* 95 | X153905857Y-54700714D01* 96 | X153869571Y-54700714D01* 97 | X153797000Y-54664428D01* 98 | X153760714Y-54591857D01* 99 | X153760714Y-54483000D01* 100 | X153797000Y-54410428D01* 101 | X154268714Y-54047571D02* 102 | X153506714Y-54047571D01* 103 | X153978428Y-53975000D02* 104 | X154268714Y-53757285D01* 105 | X153760714Y-53757285D02* 106 | X154051000Y-54047571D01* 107 | X154268714Y-53430714D02* 108 | X153760714Y-53430714D01* 109 | X153506714Y-53430714D02* 110 | X153543000Y-53467000D01* 111 | X153579285Y-53430714D01* 112 | X153543000Y-53394428D01* 113 | X153506714Y-53430714D01* 114 | X153579285Y-53430714D01* 115 | X154268714Y-52124428D02* 116 | X154268714Y-52487285D01* 117 | X153506714Y-52487285D01* 118 | X154268714Y-51543857D02* 119 | X153869571Y-51543857D01* 120 | X153797000Y-51580142D01* 121 | X153760714Y-51652714D01* 122 | X153760714Y-51797857D01* 123 | X153797000Y-51870428D01* 124 | X154232428Y-51543857D02* 125 | X154268714Y-51616428D01* 126 | X154268714Y-51797857D01* 127 | X154232428Y-51870428D01* 128 | X154159857Y-51906714D01* 129 | X154087285Y-51906714D01* 130 | X154014714Y-51870428D01* 131 | X153978428Y-51797857D01* 132 | X153978428Y-51616428D01* 133 | X153942142Y-51543857D01* 134 | X154268714Y-51181000D02* 135 | X153506714Y-51181000D01* 136 | X153797000Y-51181000D02* 137 | X153760714Y-51108428D01* 138 | X153760714Y-50963285D01* 139 | X153797000Y-50890714D01* 140 | X153833285Y-50854428D01* 141 | X153905857Y-50818142D01* 142 | X154123571Y-50818142D01* 143 | X154196142Y-50854428D01* 144 | X154232428Y-50890714D01* 145 | X154268714Y-50963285D01* 146 | X154268714Y-51108428D01* 147 | X154232428Y-51181000D01* 148 | D11* 149 | X140208000Y-69088000D02* 150 | X140208000Y-41910000D01* 151 | X154940000Y-69088000D02* 152 | X140208000Y-69088000D01* 153 | X154940000Y-41910000D02* 154 | X154940000Y-69088000D01* 155 | X140208000Y-41910000D02* 156 | X154940000Y-41910000D01* 157 | D12* 158 | X151638000Y-64770000D03* 159 | X151638000Y-62230000D03* 160 | X151638000Y-59690000D03* 161 | X151638000Y-57150000D03* 162 | X151638000Y-54610000D03* 163 | X151638000Y-52070000D03* 164 | X151638000Y-49530000D03* 165 | D13* 166 | X151638000Y-46990000D03* 167 | D12* 168 | X144018000Y-64770000D03* 169 | X144018000Y-62230000D03* 170 | X144018000Y-59690000D03* 171 | X144018000Y-57150000D03* 172 | X144018000Y-54610000D03* 173 | X144018000Y-52070000D03* 174 | X144018000Y-49530000D03* 175 | D13* 176 | X144018000Y-46990000D03* 177 | D14* 178 | X149161500Y-44450000D03* 179 | X141541500Y-67310000D03* 180 | X149161500Y-46990000D03* 181 | X141541500Y-64770000D03* 182 | X149161500Y-49530000D03* 183 | X141541500Y-62230000D03* 184 | X149161500Y-52070000D03* 185 | X141541500Y-59690000D03* 186 | X149161500Y-54610000D03* 187 | X141541500Y-57150000D03* 188 | X149161500Y-57150000D03* 189 | X141541500Y-54610000D03* 190 | X149161500Y-59690000D03* 191 | X141541500Y-52070000D03* 192 | X149161500Y-62230000D03* 193 | X141541500Y-49530000D03* 194 | X149161500Y-64770000D03* 195 | X141541500Y-46990000D03* 196 | X149161500Y-67310000D03* 197 | D15* 198 | X141541500Y-44450000D03* 199 | G04 #@! TA.AperFunction,SMDPad,CuDef* 200 | D16* 201 | G36* 202 | X154028505Y-43751204D02* 203 | G01* 204 | X154052773Y-43754804D01* 205 | X154076572Y-43760765D01* 206 | X154099671Y-43769030D01* 207 | X154121850Y-43779520D01* 208 | X154142893Y-43792132D01* 209 | X154162599Y-43806747D01* 210 | X154180777Y-43823223D01* 211 | X154197253Y-43841401D01* 212 | X154211868Y-43861107D01* 213 | X154224480Y-43882150D01* 214 | X154234970Y-43904329D01* 215 | X154243235Y-43927428D01* 216 | X154249196Y-43951227D01* 217 | X154252796Y-43975495D01* 218 | X154254000Y-43999999D01* 219 | X154254000Y-44900001D01* 220 | X154252796Y-44924505D01* 221 | X154249196Y-44948773D01* 222 | X154243235Y-44972572D01* 223 | X154234970Y-44995671D01* 224 | X154224480Y-45017850D01* 225 | X154211868Y-45038893D01* 226 | X154197253Y-45058599D01* 227 | X154180777Y-45076777D01* 228 | X154162599Y-45093253D01* 229 | X154142893Y-45107868D01* 230 | X154121850Y-45120480D01* 231 | X154099671Y-45130970D01* 232 | X154076572Y-45139235D01* 233 | X154052773Y-45145196D01* 234 | X154028505Y-45148796D01* 235 | X154004001Y-45150000D01* 236 | X153353999Y-45150000D01* 237 | X153329495Y-45148796D01* 238 | X153305227Y-45145196D01* 239 | X153281428Y-45139235D01* 240 | X153258329Y-45130970D01* 241 | X153236150Y-45120480D01* 242 | X153215107Y-45107868D01* 243 | X153195401Y-45093253D01* 244 | X153177223Y-45076777D01* 245 | X153160747Y-45058599D01* 246 | X153146132Y-45038893D01* 247 | X153133520Y-45017850D01* 248 | X153123030Y-44995671D01* 249 | X153114765Y-44972572D01* 250 | X153108804Y-44948773D01* 251 | X153105204Y-44924505D01* 252 | X153104000Y-44900001D01* 253 | X153104000Y-43999999D01* 254 | X153105204Y-43975495D01* 255 | X153108804Y-43951227D01* 256 | X153114765Y-43927428D01* 257 | X153123030Y-43904329D01* 258 | X153133520Y-43882150D01* 259 | X153146132Y-43861107D01* 260 | X153160747Y-43841401D01* 261 | X153177223Y-43823223D01* 262 | X153195401Y-43806747D01* 263 | X153215107Y-43792132D01* 264 | X153236150Y-43779520D01* 265 | X153258329Y-43769030D01* 266 | X153281428Y-43760765D01* 267 | X153305227Y-43754804D01* 268 | X153329495Y-43751204D01* 269 | X153353999Y-43750000D01* 270 | X154004001Y-43750000D01* 271 | X154028505Y-43751204D01* 272 | G37* 273 | G04 #@! TD.AperFunction* 274 | G04 #@! TA.AperFunction,SMDPad,CuDef* 275 | G36* 276 | X151978505Y-43751204D02* 277 | G01* 278 | X152002773Y-43754804D01* 279 | X152026572Y-43760765D01* 280 | X152049671Y-43769030D01* 281 | X152071850Y-43779520D01* 282 | X152092893Y-43792132D01* 283 | X152112599Y-43806747D01* 284 | X152130777Y-43823223D01* 285 | X152147253Y-43841401D01* 286 | X152161868Y-43861107D01* 287 | X152174480Y-43882150D01* 288 | X152184970Y-43904329D01* 289 | X152193235Y-43927428D01* 290 | X152199196Y-43951227D01* 291 | X152202796Y-43975495D01* 292 | X152204000Y-43999999D01* 293 | X152204000Y-44900001D01* 294 | X152202796Y-44924505D01* 295 | X152199196Y-44948773D01* 296 | X152193235Y-44972572D01* 297 | X152184970Y-44995671D01* 298 | X152174480Y-45017850D01* 299 | X152161868Y-45038893D01* 300 | X152147253Y-45058599D01* 301 | X152130777Y-45076777D01* 302 | X152112599Y-45093253D01* 303 | X152092893Y-45107868D01* 304 | X152071850Y-45120480D01* 305 | X152049671Y-45130970D01* 306 | X152026572Y-45139235D01* 307 | X152002773Y-45145196D01* 308 | X151978505Y-45148796D01* 309 | X151954001Y-45150000D01* 310 | X151303999Y-45150000D01* 311 | X151279495Y-45148796D01* 312 | X151255227Y-45145196D01* 313 | X151231428Y-45139235D01* 314 | X151208329Y-45130970D01* 315 | X151186150Y-45120480D01* 316 | X151165107Y-45107868D01* 317 | X151145401Y-45093253D01* 318 | X151127223Y-45076777D01* 319 | X151110747Y-45058599D01* 320 | X151096132Y-45038893D01* 321 | X151083520Y-45017850D01* 322 | X151073030Y-44995671D01* 323 | X151064765Y-44972572D01* 324 | X151058804Y-44948773D01* 325 | X151055204Y-44924505D01* 326 | X151054000Y-44900001D01* 327 | X151054000Y-43999999D01* 328 | X151055204Y-43975495D01* 329 | X151058804Y-43951227D01* 330 | X151064765Y-43927428D01* 331 | X151073030Y-43904329D01* 332 | X151083520Y-43882150D01* 333 | X151096132Y-43861107D01* 334 | X151110747Y-43841401D01* 335 | X151127223Y-43823223D01* 336 | X151145401Y-43806747D01* 337 | X151165107Y-43792132D01* 338 | X151186150Y-43779520D01* 339 | X151208329Y-43769030D01* 340 | X151231428Y-43760765D01* 341 | X151255227Y-43754804D01* 342 | X151279495Y-43751204D01* 343 | X151303999Y-43750000D01* 344 | X151954001Y-43750000D01* 345 | X151978505Y-43751204D01* 346 | G37* 347 | G04 #@! TD.AperFunction* 348 | D17* 349 | X153670000Y-45974000D03* 350 | D18* 351 | X141605000Y-59690000D02* 352 | X144780000Y-59690000D01* 353 | X141605000Y-57150000D02* 354 | X144780000Y-57150000D01* 355 | X141605000Y-54610000D02* 356 | X144780000Y-54610000D01* 357 | X141605000Y-52070000D02* 358 | X144780000Y-52070000D01* 359 | X142736370Y-49530000D02* 360 | X144780000Y-49530000D01* 361 | X141605000Y-49530000D02* 362 | X142736370Y-49530000D01* 363 | X141605000Y-46990000D02* 364 | X144780000Y-46990000D01* 365 | X149225000Y-62230000D02* 366 | X152400000Y-62230000D01* 367 | X149225000Y-59690000D02* 368 | X152400000Y-59690000D01* 369 | X149225000Y-57150000D02* 370 | X152400000Y-57150000D01* 371 | X149225000Y-54610000D02* 372 | X152400000Y-54610000D01* 373 | X152400000Y-49530000D02* 374 | X149225000Y-49530000D01* 375 | X146685000Y-44450000D02* 376 | X149225000Y-46990000D01* 377 | X141605000Y-44450000D02* 378 | X146685000Y-44450000D01* 379 | D19* 380 | X153679000Y-45965000D02* 381 | X153679000Y-44450000D01* 382 | X149225000Y-44450000D02* 383 | X151629000Y-44450000D01* 384 | X151629000Y-46981000D02* 385 | X151638000Y-46990000D01* 386 | X151629000Y-44450000D02* 387 | X151629000Y-46981000D01* 388 | D18* 389 | X150788001Y-63920001D02* 390 | X151638000Y-64770000D01* 391 | X150462999Y-63594999D02* 392 | X150788001Y-63920001D01* 393 | X142906499Y-63594999D02* 394 | X150462999Y-63594999D01* 395 | X141541500Y-62230000D02* 396 | X142906499Y-63594999D01* 397 | X151197919Y-52070000D02* 398 | X149225000Y-52070000D01* 399 | X152400000Y-52070000D02* 400 | X151197919Y-52070000D01* 401 | M02* 402 | -------------------------------------------------------------------------------- /gal22v10/wincupl/MMU_GAL22V10.doc: -------------------------------------------------------------------------------- 1 | 2 | ******************************************************************************* 3 | mmu_22v10 4 | ******************************************************************************* 5 | 6 | CUPL(WM) 5.0a Serial# 60008009 7 | Device g22v10 Library DLIB-h-40-1 8 | Created Sat Sep 19 12:56:50 2020 9 | Name mmu_22v10 10 | Partno GAL22v10 11 | Revision 02 12 | Date 5/8/2019 13 | Designer Bartosz Mikulski 14 | Company Mikulski Lab 15 | Assembly None 16 | Location 17 | 18 | =============================================================================== 19 | Expanded Product Terms 20 | =============================================================================== 21 | 22 | CASBANK => 23 | A14 & !A15 & !CAS & LHALT & !PB4_CBE & PHI2 24 | # A14 & !A15 & !CAS & !LHALT & !PB5_VBE & PHI2 25 | 26 | CASMAIN => 27 | !A14 & !CAS & PHI2 28 | # A15 & !CAS & PHI2 29 | # !CAS & LHALT & PB4_CBE & PHI2 30 | # !CAS & !LHALT & PB5_VBE & PHI2 31 | 32 | FA14 => 33 | A14 & A15 34 | # A14 & PB3_BA15 35 | # A14 & LHALT & PB4_CBE 36 | # A14 & !LHALT & PB5_VBE 37 | 38 | FA15 => 39 | A15 40 | # A14 & LHALT & PB2_BA14 & !PB4_CBE 41 | # A14 & !LHALT & PB2_BA14 & !PB5_VBE 42 | 43 | LHALT.d => 44 | HALT 45 | 46 | LHALT.ar => 47 | 0 48 | 49 | LHALT.sp => 50 | 0 51 | 52 | O2 => 53 | !PHI2 54 | 55 | CASBANK.oe => 56 | 1 57 | 58 | CASMAIN.oe => 59 | 1 60 | 61 | FA14.oe => 62 | 1 63 | 64 | FA15.oe => 65 | 1 66 | 67 | HALT.oe => 68 | 0 69 | 70 | LHALT.oe => 71 | 1 72 | 73 | O2.oe => 74 | 1 75 | 76 | PB5_VBE.oe => 77 | 0 78 | 79 | PHI2.oe => 80 | 0 81 | 82 | 83 | =============================================================================== 84 | Symbol Table 85 | =============================================================================== 86 | 87 | Pin Variable Pterms Max Min 88 | Pol Name Ext Pin Type Used Pterms Level 89 | --- -------- --- --- ---- ------ ------ ----- 90 | 91 | A14 3 V - - - 92 | A15 4 V - - - 93 | CAS 8 V - - - 94 | CASBANK 16 V 2 12 2 95 | CASMAIN 17 V 4 14 2 96 | CLK 1 V - - - 97 | FA14 18 V 4 16 2 98 | FA15 19 V 3 16 2 99 | HALT 15 V - - - 100 | LHALT 14 V - - - 101 | LHALT d 14 X 1 8 2 102 | LHALT ar 14 X 1 1 1 103 | LHALT sp 14 X 1 1 1 104 | O2 23 V 1 8 2 105 | ! OE 13 V - - - 106 | PB2_BA14 5 V - - - 107 | PB3_BA15 6 V - - - 108 | PB4_CBE 7 V - - - 109 | PB5_VBE 20 V - - - 110 | PHI2 21 V - - - 111 | VCC 22 V - - - 112 | CASBANK oe 16 D 1 1 0 113 | CASMAIN oe 17 D 1 1 0 114 | FA14 oe 18 D 1 1 0 115 | FA15 oe 19 D 1 1 0 116 | HALT oe 15 D 1 1 0 117 | LHALT oe 14 D 1 1 0 118 | O2 oe 23 D 1 1 0 119 | PB5_VBE oe 20 D 1 1 0 120 | PHI2 oe 21 D 1 1 0 121 | 122 | 123 | LEGEND D : default variable F : field G : group 124 | I : intermediate variable N : node M : extended node 125 | U : undefined V : variable X : extended variable 126 | T : function 127 | 128 | 129 | =============================================================================== 130 | Fuse Plot 131 | =============================================================================== 132 | 133 | SP 134 | 05764 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 135 | 136 | AR 137 | 00000 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 138 | 139 | Pin #23 05808 Mode -- 140 | 00044 -------------------------------------------- 141 | 00088 -----------x-------------------------------- 142 | 00132 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 143 | 00176 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 144 | 00220 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 145 | 00264 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 146 | 00308 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 147 | 00352 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 148 | 00396 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 149 | Pin #22 05810 Mode xx 150 | 00440 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 151 | 00484 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 152 | 00528 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 153 | 00572 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 154 | 00616 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 155 | 00660 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 156 | 00704 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 157 | 00748 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 158 | 00792 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 159 | 00836 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 160 | 00880 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 161 | Pin #21 05812 Mode x- 162 | 00924 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 163 | 00968 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 164 | 01012 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 165 | 01056 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 166 | 01100 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 167 | 01144 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 168 | 01188 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 169 | 01232 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 170 | 01276 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 171 | 01320 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 172 | 01364 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 173 | 01408 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 174 | 01452 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 175 | Pin #20 05814 Mode x- 176 | 01496 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 177 | 01540 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 178 | 01584 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 179 | 01628 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 180 | 01672 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 181 | 01716 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 182 | 01760 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 183 | 01804 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 184 | 01848 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 185 | 01892 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 186 | 01936 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 187 | 01980 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 188 | 02024 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 189 | 02068 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 190 | 02112 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 191 | Pin #19 05816 Mode x- 192 | 02156 -------------------------------------------- 193 | 02200 ------------x------------------------------- 194 | 02244 --------x-------x--------x-------------x---- 195 | 02288 --------x------xx---------------------x----- 196 | 02332 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 197 | 02376 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 198 | 02420 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 199 | 02464 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 200 | 02508 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 201 | 02552 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 202 | 02596 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 203 | 02640 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 204 | 02684 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 205 | 02728 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 206 | 02772 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 207 | 02816 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 208 | 02860 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 209 | Pin #18 05818 Mode x- 210 | 02904 -------------------------------------------- 211 | 02948 --------x---x------------------------------- 212 | 02992 --------x-----------x----------------------- 213 | 03036 --------x---------------x--------------x---- 214 | 03080 --------x-----x-----------------------x----- 215 | 03124 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 216 | 03168 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 217 | 03212 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 218 | 03256 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 219 | 03300 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 220 | 03344 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 221 | 03388 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 222 | 03432 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 223 | 03476 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 224 | 03520 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 225 | 03564 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 226 | 03608 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 227 | Pin #17 05820 Mode x- 228 | 03652 -------------------------------------------- 229 | 03696 ---------xx------------------x-------------- 230 | 03740 ----------x-x----------------x-------------- 231 | 03784 ----------x-------------x----x---------x---- 232 | 03828 ----------x---x--------------x--------x----- 233 | 03872 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 234 | 03916 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 235 | 03960 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 236 | 04004 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 237 | 04048 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 238 | 04092 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 239 | 04136 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 240 | 04180 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 241 | 04224 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 242 | 04268 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 243 | Pin #16 05822 Mode x- 244 | 04312 -------------------------------------------- 245 | 04356 --------x-x--x-----------x---x---------x---- 246 | 04400 --------x-x--x-x-------------x--------x----- 247 | 04444 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 248 | 04488 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 249 | 04532 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 250 | 04576 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 251 | 04620 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 252 | 04664 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 253 | 04708 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 254 | 04752 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 255 | 04796 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 256 | 04840 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 257 | Pin #15 05824 Mode x- 258 | 04884 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 259 | 04928 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 260 | 04972 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 261 | 05016 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 262 | 05060 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 263 | 05104 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 264 | 05148 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 265 | 05192 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 266 | 05236 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 267 | 05280 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 268 | 05324 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 269 | Pin #14 05826 Mode -x 270 | 05368 -------------------------------------------- 271 | 05412 ----------------------------------x--------- 272 | 05456 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 273 | 05500 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 274 | 05544 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 275 | 05588 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 276 | 05632 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 277 | 05676 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 278 | 05720 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 279 | 280 | 281 | LEGEND X : fuse not blown 282 | - : fuse blown 283 | 284 | =============================================================================== 285 | Chip Diagram 286 | =============================================================================== 287 | 288 | ______________ 289 | | mmu_22v10 | 290 | CLK x---|1 24|---x Vcc 291 | x---|2 23|---x O2 292 | A14 x---|3 22|---x VCC 293 | A15 x---|4 21|---x PHI2 294 | PB2_BA14 x---|5 20|---x PB5_VBE 295 | PB3_BA15 x---|6 19|---x FA15 296 | PB4_CBE x---|7 18|---x FA14 297 | CAS x---|8 17|---x CASMAIN 298 | x---|9 16|---x CASBANK 299 | x---|10 15|---x HALT 300 | x---|11 14|---x LHALT 301 | GND x---|12 13|---x !OE 302 | |______________| 303 | 304 | -------------------------------------------------------------------------------- /gal16v8/kicad/gerber/mmu_16v8-B_Cu.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5)-3* 2 | G04 #@! TF.CreationDate,2020-09-11T10:56:42+02:00* 3 | G04 #@! TF.ProjectId,mmu_16v8,6d6d755f-3136-4763-982e-6b696361645f,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Copper,L2,Bot* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5)-3) date 2020-09-11 10:56:42* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10C,0.050000*% 14 | %ADD11O,1.700000X1.700000*% 15 | %ADD12R,1.700000X1.700000*% 16 | %ADD13O,1.600000X1.600000*% 17 | %ADD14R,1.600000X1.600000*% 18 | %ADD15C,0.800000*% 19 | %ADD16C,0.254000*% 20 | G04 APERTURE END LIST* 21 | D10* 22 | X140208000Y-69088000D02* 23 | X140208000Y-41910000D01* 24 | X154940000Y-69088000D02* 25 | X140208000Y-69088000D01* 26 | X154940000Y-41910000D02* 27 | X154940000Y-69088000D01* 28 | X140208000Y-41910000D02* 29 | X154940000Y-41910000D01* 30 | D11* 31 | X151638000Y-64770000D03* 32 | X151638000Y-62230000D03* 33 | X151638000Y-59690000D03* 34 | X151638000Y-57150000D03* 35 | X151638000Y-54610000D03* 36 | X151638000Y-52070000D03* 37 | X151638000Y-49530000D03* 38 | D12* 39 | X151638000Y-46990000D03* 40 | D11* 41 | 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| X142892746Y-66826913D01* 113 | X142772537Y-66572580D01* 114 | X142605019Y-66346586D01* 115 | X142396631Y-66157615D01* 116 | X142200518Y-66040000D01* 117 | X142396631Y-65922385D01* 118 | X142605019Y-65733414D01* 119 | X142748521Y-65539819D01* 120 | X142920412Y-65770269D01* 121 | X143136645Y-65965178D01* 122 | X143386748Y-66114157D01* 123 | X143661109Y-66211481D01* 124 | X143891000Y-66090814D01* 125 | X143891000Y-64897000D01* 126 | X144145000Y-64897000D01* 127 | X144145000Y-66090814D01* 128 | X144374891Y-66211481D01* 129 | X144649252Y-66114157D01* 130 | X144899355Y-65965178D01* 131 | X145115588Y-65770269D01* 132 | X145289641Y-65536920D01* 133 | X145414825Y-65274099D01* 134 | X145459476Y-65126890D01* 135 | X145338155Y-64897000D01* 136 | X144145000Y-64897000D01* 137 | X143891000Y-64897000D01* 138 | X141668500Y-64897000D01* 139 | X141414500Y-64897000D01* 140 | X141394500Y-64897000D01* 141 | X141394500Y-64643000D01* 142 | X141414500Y-64643000D01* 143 | X141414500Y-64623000D01* 144 | X141668500Y-64623000D01* 145 | X141668500Y-64643000D01* 146 | X143891000Y-64643000D01* 147 | X143891000Y-62357000D01* 148 | X144145000Y-62357000D01* 149 | X144145000Y-64643000D01* 150 | X145338155Y-64643000D01* 151 | X145459476Y-64413110D01* 152 | X145414825Y-64265901D01* 153 | X145289641Y-64003080D01* 154 | X145115588Y-63769731D01* 155 | X144899355Y-63574822D01* 156 | X144773745Y-63500000D01* 157 | X144899355Y-63425178D01* 158 | X145115588Y-63230269D01* 159 | X145289641Y-62996920D01* 160 | X145414825Y-62734099D01* 161 | X145459476Y-62586890D01* 162 | X145338155Y-62357000D01* 163 | X144145000Y-62357000D01* 164 | X143891000Y-62357000D01* 165 | X143871000Y-62357000D01* 166 | X143871000Y-62103000D01* 167 | X143891000Y-62103000D01* 168 | X143891000Y-62083000D01* 169 | X144145000Y-62083000D01* 170 | X144145000Y-62103000D01* 171 | X145338155Y-62103000D01* 172 | X145459476Y-61873110D01* 173 | X145414825Y-61725901D01* 174 | X145289641Y-61463080D01* 175 | X145115588Y-61229731D01* 176 | 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X147726500Y-44308665D01* 946 | X142979572Y-44308665D01* 947 | X142979572Y-43650000D01* 948 | X142967312Y-43525518D01* 949 | X142931002Y-43405820D01* 950 | X142872037Y-43295506D01* 951 | X142792685Y-43198815D01* 952 | X142695994Y-43119463D01* 953 | X142585680Y-43060498D01* 954 | X142465982Y-43024188D01* 955 | X142341500Y-43011928D01* 956 | X140868000Y-43011928D01* 957 | X140868000Y-42570000D01* 958 | X154280000Y-42570000D01* 959 | X154280001Y-68428000D01* 960 | M02* 961 | -------------------------------------------------------------------------------- /gal16v8/kicad/mmu_16v8.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20171130) (host pcbnew "(5.1.5)-3") 2 | 3 | (general 4 | (thickness 1.6) 5 | (drawings 5) 6 | (tracks 25) 7 | (zones 0) 8 | (modules 4) 9 | (nets 18) 10 | ) 11 | 12 | (page A4) 13 | (layers 14 | (0 F.Cu signal) 15 | (31 B.Cu signal) 16 | (32 B.Adhes user) 17 | (33 F.Adhes user) 18 | (34 B.Paste user) 19 | (35 F.Paste user) 20 | (36 B.SilkS user) 21 | (37 F.SilkS user) 22 | (38 B.Mask user) 23 | (39 F.Mask user) 24 | (40 Dwgs.User user) 25 | (41 Cmts.User user) 26 | (42 Eco1.User user) 27 | (43 Eco2.User user) 28 | (44 Edge.Cuts user) 29 | (45 Margin user) 30 | (46 B.CrtYd user) 31 | (47 F.CrtYd user) 32 | (48 B.Fab user) 33 | (49 F.Fab user) 34 | ) 35 | 36 | (setup 37 | (last_trace_width 0.25) 38 | (trace_clearance 0.2) 39 | (zone_clearance 0.508) 40 | (zone_45_only no) 41 | (trace_min 0.2) 42 | (via_size 0.8) 43 | (via_drill 0.4) 44 | (via_min_size 0.4) 45 | (via_min_drill 0.3) 46 | (uvia_size 0.3) 47 | (uvia_drill 0.1) 48 | (uvias_allowed no) 49 | (uvia_min_size 0.2) 50 | (uvia_min_drill 0.1) 51 | (edge_width 0.05) 52 | (segment_width 0.2) 53 | (pcb_text_width 0.3) 54 | (pcb_text_size 1.5 1.5) 55 | (mod_edge_width 0.12) 56 | (mod_text_size 1 1) 57 | (mod_text_width 0.15) 58 | (pad_size 1.524 1.524) 59 | (pad_drill 0.762) 60 | (pad_to_mask_clearance 0.051) 61 | (solder_mask_min_width 0.25) 62 | (aux_axis_origin 0 0) 63 | (visible_elements 7FFFFFFF) 64 | (pcbplotparams 65 | (layerselection 0x010f0_ffffffff) 66 | (usegerberextensions false) 67 | (usegerberattributes false) 68 | (usegerberadvancedattributes false) 69 | (creategerberjobfile false) 70 | (excludeedgelayer false) 71 | (linewidth 0.100000) 72 | (plotframeref false) 73 | (viasonmask false) 74 | (mode 1) 75 | (useauxorigin false) 76 | (hpglpennumber 1) 77 | (hpglpenspeed 20) 78 | (hpglpendiameter 15.000000) 79 | (psnegative false) 80 | (psa4output false) 81 | (plotreference true) 82 | (plotvalue false) 83 | (plotinvisibletext false) 84 | (padsonsilk true) 85 | (subtractmaskfromsilk false) 86 | (outputformat 1) 87 | (mirror false) 88 | (drillshape 0) 89 | (scaleselection 1) 90 | (outputdirectory "gerber/")) 91 | ) 92 | 93 | (net 0 "") 94 | (net 1 /~CAS) 95 | (net 2 /PB4) 96 | (net 3 /PB3) 97 | (net 4 /PB2) 98 | (net 5 /A15) 99 | (net 6 /A14) 100 | (net 7 /LHALT) 101 | (net 8 /CASBANK) 102 | (net 9 /CASMAIN) 103 | (net 10 /FA14) 104 | (net 11 /FA15) 105 | (net 12 /PHI2) 106 | (net 13 /~PHI2) 107 | (net 14 GND) 108 | (net 15 +5V) 109 | (net 16 /HALT) 110 | (net 17 /VBE) 111 | 112 | (net_class Default "This is the default net class." 113 | (clearance 0.2) 114 | (trace_width 0.25) 115 | (via_dia 0.8) 116 | (via_drill 0.4) 117 | (uvia_dia 0.3) 118 | (uvia_drill 0.1) 119 | (add_net +5V) 120 | (add_net /A14) 121 | (add_net /A15) 122 | (add_net /CASBANK) 123 | (add_net /CASMAIN) 124 | (add_net /FA14) 125 | (add_net /FA15) 126 | (add_net /HALT) 127 | (add_net /LHALT) 128 | (add_net /PB2) 129 | (add_net /PB3) 130 | (add_net /PB4) 131 | (add_net /PHI2) 132 | (add_net /VBE) 133 | (add_net /~CAS) 134 | (add_net /~PHI2) 135 | (add_net GND) 136 | ) 137 | 138 | (net_class VCC "" 139 | (clearance 0.2) 140 | (trace_width 0.508) 141 | (via_dia 0.8) 142 | (via_drill 0.4) 143 | (uvia_dia 0.3) 144 | (uvia_drill 0.1) 145 | ) 146 | 147 | (module Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical (layer B.Cu) (tedit 59FED5CC) (tstamp 5EE62DBE) 148 | (at 151.638 46.99 180) 149 | (descr "Through hole straight pin header, 1x08, 2.54mm pitch, single row") 150 | (tags "Through hole pin header THT 1x08 2.54mm single row") 151 | (path /5EED9A52) 152 | (fp_text reference J2 (at 0 2.33) (layer B.SilkS) 153 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 154 | ) 155 | (fp_text value Conn_01x08_Male (at 0 -20.11) (layer B.Fab) 156 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 157 | ) 158 | (fp_text user %R (at 0 -8.89 270) (layer B.Fab) 159 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 160 | ) 161 | (fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05)) 162 | (fp_line (start 1.8 -19.55) (end 1.8 1.8) (layer B.CrtYd) (width 0.05)) 163 | (fp_line (start -1.8 -19.55) (end 1.8 -19.55) (layer B.CrtYd) (width 0.05)) 164 | (fp_line (start -1.8 1.8) (end -1.8 -19.55) (layer B.CrtYd) (width 0.05)) 165 | (fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12)) 166 | (fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12)) 167 | (fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12)) 168 | (fp_line (start 1.33 -1.27) (end 1.33 -19.11) (layer B.SilkS) (width 0.12)) 169 | (fp_line (start -1.33 -1.27) (end -1.33 -19.11) (layer B.SilkS) (width 0.12)) 170 | (fp_line (start -1.33 -19.11) (end 1.33 -19.11) (layer B.SilkS) (width 0.12)) 171 | (fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1)) 172 | (fp_line (start -1.27 -19.05) (end -1.27 0.635) (layer B.Fab) (width 0.1)) 173 | (fp_line (start 1.27 -19.05) (end -1.27 -19.05) (layer B.Fab) (width 0.1)) 174 | (fp_line (start 1.27 1.27) (end 1.27 -19.05) (layer B.Fab) (width 0.1)) 175 | (fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1)) 176 | (pad 8 thru_hole oval (at 0 -17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 177 | (net 16 /HALT)) 178 | (pad 7 thru_hole oval (at 0 -15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 179 | (net 8 /CASBANK)) 180 | (pad 6 thru_hole oval (at 0 -12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 181 | (net 9 /CASMAIN)) 182 | (pad 5 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 183 | (net 10 /FA14)) 184 | (pad 4 thru_hole oval (at 0 -7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 185 | (net 11 /FA15)) 186 | (pad 3 thru_hole oval (at 0 -5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 187 | (net 17 /VBE)) 188 | (pad 2 thru_hole oval (at 0 -2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 189 | (net 12 /PHI2)) 190 | (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 191 | (net 15 +5V)) 192 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x08_P2.54mm_Vertical.wrl 193 | (at (xyz 0 0 0)) 194 | (scale (xyz 1 1 1)) 195 | (rotate (xyz 0 0 0)) 196 | ) 197 | ) 198 | 199 | (module Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical (layer B.Cu) (tedit 59FED5CC) (tstamp 5EE63E5C) 200 | (at 144.018 46.99 180) 201 | (descr "Through hole straight pin header, 1x08, 2.54mm pitch, single row") 202 | (tags "Through hole pin header THT 1x08 2.54mm single row") 203 | (path /5EEDB2CC) 204 | (fp_text reference J1 (at 0 2.33) (layer B.SilkS) 205 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 206 | ) 207 | (fp_text value Conn_01x08_Male (at 0 -20.11) (layer B.Fab) 208 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 209 | ) 210 | (fp_text user %R (at 0 -8.89 270) (layer B.Fab) 211 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 212 | ) 213 | (fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05)) 214 | (fp_line (start 1.8 -19.55) (end 1.8 1.8) (layer B.CrtYd) (width 0.05)) 215 | (fp_line (start -1.8 -19.55) (end 1.8 -19.55) (layer B.CrtYd) (width 0.05)) 216 | (fp_line (start -1.8 1.8) (end -1.8 -19.55) (layer B.CrtYd) (width 0.05)) 217 | (fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12)) 218 | (fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12)) 219 | (fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12)) 220 | (fp_line (start 1.33 -1.27) (end 1.33 -19.11) (layer B.SilkS) (width 0.12)) 221 | (fp_line (start -1.33 -1.27) (end -1.33 -19.11) (layer B.SilkS) (width 0.12)) 222 | (fp_line (start -1.33 -19.11) (end 1.33 -19.11) (layer B.SilkS) (width 0.12)) 223 | (fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1)) 224 | (fp_line (start -1.27 -19.05) (end -1.27 0.635) (layer B.Fab) (width 0.1)) 225 | (fp_line (start 1.27 -19.05) (end -1.27 -19.05) (layer B.Fab) (width 0.1)) 226 | (fp_line (start 1.27 1.27) (end 1.27 -19.05) (layer B.Fab) (width 0.1)) 227 | (fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1)) 228 | (pad 8 thru_hole oval (at 0 -17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 229 | (net 14 GND)) 230 | (pad 7 thru_hole oval (at 0 -15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 231 | (net 14 GND)) 232 | (pad 6 thru_hole oval (at 0 -12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 233 | (net 1 /~CAS)) 234 | (pad 5 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 235 | (net 2 /PB4)) 236 | (pad 4 thru_hole oval (at 0 -7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 237 | (net 3 /PB3)) 238 | (pad 3 thru_hole oval (at 0 -5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 239 | (net 4 /PB2)) 240 | (pad 2 thru_hole oval (at 0 -2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 241 | (net 5 /A15)) 242 | (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 243 | (net 6 /A14)) 244 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x08_P2.54mm_Vertical.wrl 245 | (at (xyz 0 0 0)) 246 | (scale (xyz 1 1 1)) 247 | (rotate (xyz 0 0 0)) 248 | ) 249 | ) 250 | 251 | (module Package_DIP:DIP-20_W7.62mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 5F5B3D32) 252 | (at 141.5415 44.45) 253 | (descr "20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)") 254 | (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil") 255 | (path /5EECB8DE) 256 | (fp_text reference U1 (at 10.287 23.114) (layer F.SilkS) 257 | (effects (font (size 1 1) (thickness 0.15))) 258 | ) 259 | (fp_text value GAL16V8 (at 5.2705 6.731 90) (layer F.Fab) 260 | (effects (font (size 1 1) (thickness 0.15))) 261 | ) 262 | (fp_text user %R (at 3.81 11.43) (layer F.Fab) 263 | (effects (font (size 1 1) (thickness 0.15))) 264 | ) 265 | (fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05)) 266 | (fp_line (start 8.7 24.4) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05)) 267 | (fp_line (start -1.1 24.4) (end 8.7 24.4) (layer F.CrtYd) (width 0.05)) 268 | (fp_line (start -1.1 -1.55) (end -1.1 24.4) (layer F.CrtYd) (width 0.05)) 269 | (fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12)) 270 | (fp_line (start 6.46 24.19) (end 6.46 -1.33) (layer F.SilkS) (width 0.12)) 271 | (fp_line (start 1.16 24.19) (end 6.46 24.19) (layer F.SilkS) (width 0.12)) 272 | (fp_line (start 1.16 -1.33) (end 1.16 24.19) (layer F.SilkS) (width 0.12)) 273 | (fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) 274 | (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1)) 275 | (fp_line (start 0.635 24.13) (end 0.635 -0.27) (layer F.Fab) (width 0.1)) 276 | (fp_line (start 6.985 24.13) (end 0.635 24.13) (layer F.Fab) (width 0.1)) 277 | (fp_line (start 6.985 -1.27) (end 6.985 24.13) (layer F.Fab) (width 0.1)) 278 | (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1)) 279 | (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) 280 | (pad 20 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 281 | (net 15 +5V)) 282 | (pad 10 thru_hole oval (at 0 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 283 | (net 14 GND)) 284 | (pad 19 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 285 | (net 13 /~PHI2)) 286 | (pad 9 thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 287 | (net 14 GND)) 288 | (pad 18 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 289 | (net 12 /PHI2)) 290 | (pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 291 | (net 16 /HALT)) 292 | (pad 17 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 293 | (net 17 /VBE)) 294 | (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 295 | (net 1 /~CAS)) 296 | (pad 16 thru_hole oval (at 7.62 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 297 | (net 11 /FA15)) 298 | (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 299 | (net 2 /PB4)) 300 | (pad 15 thru_hole oval (at 7.62 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 301 | (net 10 /FA14)) 302 | (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 303 | (net 3 /PB3)) 304 | (pad 14 thru_hole oval (at 7.62 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 305 | (net 9 /CASMAIN)) 306 | (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 307 | (net 4 /PB2)) 308 | (pad 13 thru_hole oval (at 7.62 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 309 | (net 8 /CASBANK)) 310 | (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 311 | (net 5 /A15)) 312 | (pad 12 thru_hole oval (at 7.62 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 313 | (net 7 /LHALT)) 314 | (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 315 | (net 6 /A14)) 316 | (pad 11 thru_hole oval (at 7.62 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 317 | (net 14 GND)) 318 | (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) 319 | (net 13 /~PHI2)) 320 | (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-20_W7.62mm.wrl 321 | (at (xyz 0 0 0)) 322 | (scale (xyz 1 1 1)) 323 | (rotate (xyz 0 0 0)) 324 | ) 325 | ) 326 | 327 | (module Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder (layer F.Cu) (tedit 5B36C52B) (tstamp 5ED78FC2) 328 | (at 152.654 44.45) 329 | (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. 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| (fp_line (start -0.261252 -0.71) (end 0.261252 -0.71) (layer F.SilkS) (width 0.12)) 348 | (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) 349 | (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) 350 | (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) 351 | (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) 352 | (pad 2 smd roundrect (at 1.025 0) (size 1.15 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) 353 | (net 14 GND)) 354 | (pad 1 smd roundrect (at -1.025 0) (size 1.15 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) 355 | (net 15 +5V)) 356 | (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl 357 | (at (xyz 0 0 0)) 358 | (scale (xyz 1 1 1)) 359 | (rotate (xyz 0 0 0)) 360 | ) 361 | ) 362 | 363 | (gr_text "EMMU - Mikulski Lab" (at 153.924 56.896 90) (layer F.Cu) 364 | (effects (font (size 0.762 0.762) (thickness 0.127))) 365 | ) 366 | (gr_line (start 140.208 69.088) (end 140.208 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43.335363) (xy 148.046863 43.535241) (xy 147.88982 43.770273) 493 | (xy 147.781647 44.031426) (xy 147.7265 44.308665) (xy 142.979572 44.308665) (xy 142.979572 43.65) (xy 142.967312 43.525518) 494 | (xy 142.931002 43.40582) (xy 142.872037 43.295506) (xy 142.792685 43.198815) (xy 142.695994 43.119463) (xy 142.58568 43.060498) 495 | (xy 142.465982 43.024188) (xy 142.3415 43.011928) (xy 140.868 43.011928) (xy 140.868 42.57) (xy 154.28 42.57) 496 | ) 497 | ) 498 | ) 499 | ) 500 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 3, 29 June 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | Preamble 9 | 10 | The GNU General Public License is a free, copyleft license for 11 | software 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Use with the GNU Affero General Public License. 553 | 554 | Notwithstanding any other provision of this License, you have 555 | permission to link or combine any covered work with a work licensed 556 | under version 3 of the GNU Affero General Public License into a single 557 | combined work, and to convey the resulting work. The terms of this 558 | License will continue to apply to the part which is the covered work, 559 | but the special requirements of the GNU Affero General Public License, 560 | section 13, concerning interaction through a network will apply to the 561 | combination as such. 562 | 563 | 14. Revised Versions of this License. 564 | 565 | The Free Software Foundation may publish revised and/or new versions of 566 | the GNU General Public License from time to time. Such new versions will 567 | be similar in spirit to the present version, but may differ in detail to 568 | address new problems or concerns. 569 | 570 | Each version is given a distinguishing version number. If the 571 | Program specifies that a certain numbered version of the GNU General 572 | Public License "or any later version" applies to it, you have the 573 | option of following the terms and conditions either of that numbered 574 | version or of any later version published by the Free Software 575 | Foundation. If the Program does not specify a version number of the 576 | GNU General Public License, you may choose any version ever published 577 | by the Free Software Foundation. 578 | 579 | If the Program specifies that a proxy can decide which future 580 | versions of the GNU General Public License can be used, that proxy's 581 | public statement of acceptance of a version permanently authorizes you 582 | to choose that version for the Program. 583 | 584 | Later license versions may give you additional or different 585 | permissions. However, no additional obligations are imposed on any 586 | author or copyright holder as a result of your choosing to follow a 587 | later version. 588 | 589 | 15. Disclaimer of Warranty. 590 | 591 | THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY 592 | APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT 593 | HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY 594 | OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, 595 | THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 596 | PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM 597 | IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF 598 | ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 599 | 600 | 16. Limitation of Liability. 601 | 602 | IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING 603 | WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS 604 | THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY 605 | GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE 606 | USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF 607 | DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD 608 | PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), 609 | EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF 610 | SUCH DAMAGES. 611 | 612 | 17. Interpretation of Sections 15 and 16. 613 | 614 | If the disclaimer of warranty and limitation of liability provided 615 | above cannot be given local legal effect according to their terms, 616 | reviewing courts shall apply local law that most closely approximates 617 | an absolute waiver of all civil liability in connection with the 618 | Program, unless a warranty or assumption of liability accompanies a 619 | copy of the Program in return for a fee. 620 | 621 | END OF TERMS AND CONDITIONS 622 | 623 | How to Apply These Terms to Your New Programs 624 | 625 | If you develop a new program, and you want it to be of the greatest 626 | possible use to the public, the best way to achieve this is to make it 627 | free software which everyone can redistribute and change under these terms. 628 | 629 | To do so, attach the following notices to the program. It is safest 630 | to attach them to the start of each source file to most effectively 631 | state the exclusion of warranty; and each file should have at least 632 | the "copyright" line and a pointer to where the full notice is found. 633 | 634 | 635 | Copyright (C) 636 | 637 | This program is free software: you can redistribute it and/or modify 638 | it under the terms of the GNU General Public License as published by 639 | the Free Software Foundation, either version 3 of the License, or 640 | (at your option) any later version. 641 | 642 | This program is distributed in the hope that it will be useful, 643 | but WITHOUT ANY WARRANTY; without even the implied warranty of 644 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 645 | GNU General Public License for more details. 646 | 647 | You should have received a copy of the GNU General Public License 648 | along with this program. If not, see . 649 | 650 | Also add information on how to contact you by electronic and paper mail. 651 | 652 | If the program does terminal interaction, make it output a short 653 | notice like this when it starts in an interactive mode: 654 | 655 | Copyright (C) 656 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 657 | This is free software, and you are welcome to redistribute it 658 | under certain conditions; type `show c' for details. 659 | 660 | The hypothetical commands `show w' and `show c' should show the appropriate 661 | parts of the General Public License. Of course, your program's commands 662 | might be different; for a GUI interface, you would use an "about box". 663 | 664 | You should also get your employer (if you work as a programmer) or school, 665 | if any, to sign a "copyright disclaimer" for the program, if necessary. 666 | For more information on this, and how to apply and follow the GNU GPL, see 667 | . 668 | 669 | The GNU General Public License does not permit incorporating your program 670 | into proprietary programs. If your program is a subroutine library, you 671 | may consider it more useful to permit linking proprietary applications with 672 | the library. If this is what you want to do, use the GNU Lesser General 673 | Public License instead of this License. But first, please read 674 | . 675 | --------------------------------------------------------------------------------