├── .gitignore ├── dp-aux-intercept ├── gerbers │ ├── .keepme │ └── v0.0-66-g0a24827 │ │ ├── dp-aux-intercept-drl_map.pdf │ │ ├── dp-aux-intercept-NPTH-drl_map.pdf │ │ ├── dp-aux-intercept-NPTH.drl │ │ ├── dp-aux-intercept-EdgeCuts.gm1 │ │ ├── drill_report.rpt │ │ ├── dp-aux-intercept-PasteBottom.gbp │ │ ├── dp-aux-intercept-PasteTop.gtp │ │ ├── dp-aux-intercept-MaskBottom.gbs │ │ ├── dp-aux-intercept-MaskTop.gts │ │ └── dp-aux-intercept.drl ├── fp-lib-table ├── release.sh ├── dp-aux-intercept.pro ├── dp-aux-intercept.cmp ├── dp-aux-intercept-cache.lib ├── README.md └── dp-aux-intercept.net ├── libraries ├── display_port.dcm ├── 2040204-1.pretty │ ├── 2040210-1.JPG │ ├── datasheet.png │ ├── datasheet-extra.JPG │ ├── README.md │ └── 2040210-1.kicad_mod ├── DP1RD20JQ1R400.pretty │ ├── datasheet.pdf │ ├── DP1RD20JQ1R400.JPG │ ├── README.md │ └── DP1RD20JQ1R400.kicad_mod ├── display_port.lib ├── timvideos-pcie-8x.lib ├── HSMC-SE.lib ├── HSMC-RAW.lib ├── hsmc.lib ├── HSMC-DIFF.lib ├── timvideos-pcie-8x.pretty │ └── timvideos-pcie-8x.kicad_mod └── QTH-090-01-L-D-A.pretty │ └── QTH-090-01-L-D-A.kicad_mod ├── dp-to-hsmc ├── dp-to-hsmc.cmp ├── fp-lib-table ├── dp-to-hsmc.pro ├── connectors.md ├── dp-to-hsmc.sch ├── README.md ├── hsmc-spec-pins.csv ├── boards │ ├── Terasic-Cyclone-V-GX-Starter-Kit.csv │ └── Terasic-Cyclone-SoCKit.csv └── dp-to-hsmc-cache.lib ├── README.md ├── dp-to-pcie ├── dp-to-pcie.pro ├── README.md ├── boards-kc705.csv ├── dp-to-pcie-cache.lib └── dp-to-pcie.sch ├── third_party └── gen_gerber_and_drill_files_board.py └── footprints-old └── QTH-090-01-L-D-A.kicad_mod /.gitignore: -------------------------------------------------------------------------------- 1 | *.bak 2 | *-bak 3 | -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/.keepme: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /libraries/display_port.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /libraries/2040204-1.pretty/2040210-1.JPG: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mithro/displayport-hardware-hacking/HEAD/libraries/2040204-1.pretty/2040210-1.JPG -------------------------------------------------------------------------------- /libraries/2040204-1.pretty/datasheet.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mithro/displayport-hardware-hacking/HEAD/libraries/2040204-1.pretty/datasheet.png -------------------------------------------------------------------------------- /libraries/2040204-1.pretty/datasheet-extra.JPG: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mithro/displayport-hardware-hacking/HEAD/libraries/2040204-1.pretty/datasheet-extra.JPG -------------------------------------------------------------------------------- /libraries/DP1RD20JQ1R400.pretty/datasheet.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mithro/displayport-hardware-hacking/HEAD/libraries/DP1RD20JQ1R400.pretty/datasheet.pdf -------------------------------------------------------------------------------- /libraries/DP1RD20JQ1R400.pretty/DP1RD20JQ1R400.JPG: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mithro/displayport-hardware-hacking/HEAD/libraries/DP1RD20JQ1R400.pretty/DP1RD20JQ1R400.JPG -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-drl_map.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mithro/displayport-hardware-hacking/HEAD/dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-drl_map.pdf -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-NPTH-drl_map.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/mithro/displayport-hardware-hacking/HEAD/dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-NPTH-drl_map.pdf -------------------------------------------------------------------------------- /dp-aux-intercept/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name DP1RD20JQ1R400)(type KiCad)(uri ${KIPRJMOD}/../libraries/DP1RD20JQ1R400.pretty)(options "")(descr "")) 3 | (lib (name 2040204-1)(type KiCad)(uri ${KIPRJMOD}/../libraries/2040204-1.pretty)(options "")(descr "")) 4 | ) 5 | -------------------------------------------------------------------------------- /dp-to-hsmc/dp-to-hsmc.cmp: -------------------------------------------------------------------------------- 1 | Cmp-Mod V01 Created by Cvpcb 0.201506030104+5696~23~ubuntu14.04.1-product date = Fri 19 Jun 2015 11:25:42 AM AEST 2 | 3 | BeginCmp 4 | TimeStamp = /55836CBF; 5 | Reference = CON1; 6 | ValeurCmp = QTH-090-01-L-D-A; 7 | IdModule = QTH-090-01-L-D-A:QTH-090-01-L-D-A; 8 | EndCmp 9 | 10 | EndListe 11 | -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-NPTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ;DRILL file {KiCad 4.0.2+e4-6225~38~ubuntu14.04.1-stable} date Mon Aug 1 15:26:05 2016 3 | ;FORMAT={-:-/ absolute / metric / decimal} 4 | FMAT,2 5 | METRIC,TZ 6 | T1C1.400 7 | % 8 | G90 9 | G05 10 | M71 11 | T1 12 | X31.242Y-24.08 13 | X31.242Y-93.268 14 | T0 15 | M30 16 | -------------------------------------------------------------------------------- /dp-to-hsmc/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name DP1RD20JQ1R400)(type KiCad)(uri ${KIPRJMOD}/../libraries/DP1RD20JQ1R400.pretty)(options "")(descr "")) 3 | (lib (name 2040204-1)(type KiCad)(uri ${KIPRJMOD}/../libraries/2040204-1.pretty)(options "")(descr "")) 4 | (lib (name QTH-090-01-L-D-A)(type KiCad)(uri ${KIPRJMOD}/../libraries/QTH-090-01-L-D-A.pretty)(options "")(descr "")) 5 | ) 6 | -------------------------------------------------------------------------------- /libraries/DP1RD20JQ1R400.pretty/README.md: -------------------------------------------------------------------------------- 1 | Display Port 1.1a - Receptacle - 20 Position, Surface Mount, Right Angle, Horizontal 2 | 3 | JAE Electronics - DP1RD20JQ1R400 4 | 5 | Also known as; 6 | * SJ108326 7 | * 670-2589-1 8 | 9 | [Manufacture Site](http://www.jae.com/z-en/product_en.cfm?l_code=en&series_code=DP1&product_number=DP1RD20JQ1R400) 10 | [Digi-Key Purchase Link](http://www.digikey.com/product-detail/en/DP1RD20JQ1R400/670-2589-1-ND/2713566) 11 | 12 | ![Image](./DP1RD20JQ1R400.JPG) 13 | -------------------------------------------------------------------------------- /libraries/2040204-1.pretty/README.md: -------------------------------------------------------------------------------- 1 | Display Port 1.1a - Receptacle - 20 Position, Through Hole, Right Angle, Horizontal 2 | 3 | TE Connectivity - 2040210-1 4 | 5 | Also known as; 6 | * A99344 7 | 8 | [Manufacture Site](http://www.jae.com/z-en/product_en.cfm?l_code=en&series_code=DP1&product_number=DP1RD20JQ1R400) 9 | [Digi-Key Purchase Link](http://www.digikey.com.au/product-detail/en/2040210-1/A99344-ND/1930791) 10 | 11 | ![Image](./2040210-1.JPG) 12 | 13 | This part was created by [Ryan Karl](https://github.com/brightcloudy) and is 14 | released under 15 | [CC-BY-SA 4.0 license](http://creativecommons.org/licenses/by-sa/4.0/). 16 | -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-EdgeCuts.gm1: -------------------------------------------------------------------------------- 1 | G04 #@! TF.FileFunction,Profile,NP* 2 | %FSLAX46Y46*% 3 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 4 | G04 Created by KiCad (PCBNEW 4.0.2+e4-6225~38~ubuntu14.04.1-stable) date Mon Aug 1 15:26:05 2016* 5 | %MOMM*% 6 | G01* 7 | G04 APERTURE LIST* 8 | %ADD10C,0.350000*% 9 | %ADD11C,0.100000*% 10 | G04 APERTURE END LIST* 11 | D10* 12 | D11* 13 | X50520600Y-22275800D02* 14 | X20574000Y-22275800D01* 15 | X50520600Y-95123000D02* 16 | X50520600Y-22275800D01* 17 | X20574000Y-95123000D02* 18 | X50520600Y-95123000D01* 19 | X20574000Y-22273033D02* 20 | X20574000Y-95123070D01* 21 | M02* 22 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | View this project on [CADLAB.io](https://cadlab.io/project/2210). 2 | 3 | This repository contains schematics for working with DisplayPort. 4 | 5 | Currently there are three sub-projects; 6 | 7 | * dp-aux-intercept - A board for connecting DisplayPort AUX signals to FPGA 8 | boards for interception and manipulation. 9 | 10 | * dp-to-pcie - An adapter board for allowing FPGA development boards with 11 | PCI-Express 4x interfaces to be instead used with DisplayPort. 12 | 13 | * dp-to-hsmc - An expansion board for the Altera HSMC standard supporting up 14 | to two DisplayPort sinks and two DisplayPort sources. 15 | 16 | These works are released under the 17 | [Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA 4.0)](http://creativecommons.org/licenses/by-sa/4.0/) 18 | 19 | ![Creative Commons License - CC-BY-SA](https://i.creativecommons.org/l/by-sa/4.0/88x31.png) 20 | -------------------------------------------------------------------------------- /dp-aux-intercept/release.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | set -x 4 | set -e 5 | 6 | if git diff-index --quiet HEAD --; then 7 | echo "Clean repo, good!" 8 | else 9 | echo "Dirty repo, commit before running." 10 | exit 1 11 | fi 12 | 13 | VERSION=$(git describe --long) 14 | 15 | echo "Current version: $VERSION" 16 | 17 | # Work out the next version 18 | OUTDIR=gerbers/$VERSION/ 19 | mkdir $OUTDIR 20 | 21 | # Update the version embedded in the PCB 22 | sed -e"s/(gr_text [\$]Id[\$]/(gr_text \"$VERSION\"/" --in-place=.bak dp-aux-intercept.kicad_pcb 23 | 24 | # Generate the gerber files 25 | python ../third_party/gen_gerber_and_drill_files_board.py dp-aux-intercept.kicad_pcb $OUTDIR/ 26 | git add $OUTDIR/* 27 | 28 | git commit -m "Creating gerbers $VERSION for dp-aux-intercept" 29 | 30 | cd $OUTDIR/ 31 | rm dp-aux-intercept-inner* 32 | ZIP="dp-aux-intercept-$VERSION.zip" 33 | zip -r ../$ZIP . 34 | 35 | cd ..; md5sum $ZIP 36 | 37 | git reset --hard 38 | 39 | exit 0 40 | -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/drill_report.rpt: -------------------------------------------------------------------------------- 1 | Drill report for dp-aux-intercept.kicad_pcb 2 | Created on Mon Aug 1 15:26:05 2016 3 | 4 | Copper Layer Stackup: 5 | ============================================================= 6 | L1 : F.Cu front 7 | L2 : In1.Cu inner1 8 | L3 : In2.Cu inner2 9 | L4 : B.Cu back 10 | 11 | 12 | Drill file 'dp-aux-intercept.drl' contains 13 | plated through holes: 14 | ============================================================= 15 | T1 0.30mm 0.012" (274 holes) 16 | T2 0.55mm 0.022" (40 holes) 17 | T3 0.60mm 0.024" (8 holes) (with 8 slots) 18 | T4 1.02mm 0.040" (44 holes) 19 | 20 | Total plated holes count 366 21 | 22 | 23 | Drill file 'dp-aux-intercept-NPTH.drl' contains 24 | unplated through holes: 25 | ============================================================= 26 | T1 1.40mm 0.055" (2 holes) 27 | 28 | Total unplated holes count 2 29 | -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-PasteBottom.gbp: -------------------------------------------------------------------------------- 1 | G04 #@! TF.FileFunction,Paste,Bot* 2 | %FSLAX46Y46*% 3 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 4 | G04 Created by KiCad (PCBNEW 4.0.2+e4-6225~38~ubuntu14.04.1-stable) date Mon Aug 1 15:26:05 2016* 5 | %MOMM*% 6 | G01* 7 | G04 APERTURE LIST* 8 | %ADD10C,0.350000*% 9 | %ADD11C,0.100000*% 10 | %ADD12R,1.500000X1.250000*% 11 | %ADD13R,0.900000X1.200000*% 12 | %ADD14R,1.200000X0.900000*% 13 | G04 APERTURE END LIST* 14 | D10* 15 | D11* 16 | X50520600Y-22275800D02* 17 | X20574000Y-22275800D01* 18 | X50520600Y-95123000D02* 19 | X50520600Y-22275800D01* 20 | X20574000Y-95123000D02* 21 | X50520600Y-95123000D01* 22 | X20574000Y-22273033D02* 23 | X20574000Y-95123070D01* 24 | D12* 25 | X37520560Y-76840080D03* 26 | X40020560Y-76840080D03* 27 | D13* 28 | X35532060Y-74470080D03* 29 | X35532060Y-76670080D03* 30 | X42164000Y-80178000D03* 31 | X42164000Y-77978000D03* 32 | D12* 33 | X38455920Y-78994000D03* 34 | X35955920Y-78994000D03* 35 | D14* 36 | X38178920Y-81026000D03* 37 | X35978920Y-81026000D03* 38 | D13* 39 | X40380920Y-81300500D03* 40 | X40380920Y-79100500D03* 41 | M02* 42 | -------------------------------------------------------------------------------- /libraries/display_port.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # DISPLAY_PORT 5 | # 6 | DEF DISPLAY_PORT J 0 40 Y Y 1 F N 7 | F0 "J" -600 1100 60 H V C CNN 8 | F1 "DISPLAY_PORT" 150 0 60 V V C CNN 9 | F2 "" -50 0 60 H V C CNN 10 | F3 "" -50 0 60 H V C CNN 11 | DRAW 12 | S -650 1050 250 -1150 0 1 0 N 13 | S 50 450 200 -550 0 1 0 N 14 | P 7 0 1 0 250 550 250 -650 50 -650 -50 -550 -50 450 50 550 250 550 N 15 | X ML_LaneP0 1 -850 900 197 R 50 50 1 1 B 16 | X GND 2 -850 800 197 R 50 50 1 1 W 17 | X ML_LaneN0 3 -850 700 197 R 50 50 1 1 B 18 | X ML_LaneP1 4 -850 600 197 R 50 50 1 1 B 19 | X GND 5 -850 500 197 R 50 50 1 1 W 20 | X ML_LaneN1 6 -850 400 197 R 50 50 1 1 B 21 | X ML_LaneP2 7 -850 300 197 R 50 50 1 1 B 22 | X GND 8 -850 200 197 R 50 50 1 1 W 23 | X ML_LaneN2 9 -850 100 197 R 50 50 1 1 B 24 | X ML_LaneP3 10 -850 0 197 R 50 50 1 1 B 25 | X DP_PWR 20 -850 -1000 197 R 50 50 1 1 B 26 | X GND 11 -850 -100 197 R 50 50 1 1 B 27 | X ML_LaneN3 12 -850 -200 197 R 50 50 1 1 B 28 | X CONFIG1 13 -850 -300 197 R 50 50 1 1 B 29 | X CONFIG2 14 -850 -400 197 R 50 50 1 1 P 30 | X AUXCH_P 15 -850 -500 197 R 50 50 1 1 B 31 | X GND 16 -850 -600 197 R 50 50 1 1 B 32 | X AUXCH_N 17 -850 -700 197 R 50 50 1 1 B 33 | X HPD 18 -850 -800 197 R 50 50 1 1 I 34 | X RETURN 19 -850 -900 197 R 50 50 1 1 B 35 | ENDDRAW 36 | ENDDEF 37 | # 38 | #End Library 39 | -------------------------------------------------------------------------------- /dp-aux-intercept/dp-aux-intercept.pro: -------------------------------------------------------------------------------- 1 | update=Mon 15 Jun 2015 22:12:26 AEST 2 | version=1 3 | last_client=kicad 4 | [cvpcb] 5 | version=1 6 | NetIExt=net 7 | [general] 8 | version=1 9 | [eeschema] 10 | version=1 11 | LibDir=../libraries 12 | [eeschema/libraries] 13 | LibName1=power 14 | LibName2=device 15 | LibName3=transistors 16 | LibName4=conn 17 | LibName5=linear 18 | LibName6=regul 19 | LibName7=74xx 20 | LibName8=cmos4000 21 | LibName9=adc-dac 22 | LibName10=memory 23 | LibName11=xilinx 24 | LibName12=microcontrollers 25 | LibName13=dsp 26 | LibName14=microchip 27 | LibName15=analog_switches 28 | LibName16=motorola 29 | LibName17=texas 30 | LibName18=intel 31 | LibName19=audio 32 | LibName20=interface 33 | LibName21=digital-audio 34 | LibName22=philips 35 | LibName23=display 36 | LibName24=cypress 37 | LibName25=siliconi 38 | LibName26=opto 39 | LibName27=atmel 40 | LibName28=contrib 41 | LibName29=valves 42 | LibName30=display_port 43 | [pcbnew] 44 | version=1 45 | PageLayoutDescrFile= 46 | LastNetListRead= 47 | UseCmpFile=1 48 | PadDrill=0.6 49 | PadDrillOvalY=0.6 50 | PadSizeH=1.5 51 | PadSizeV=1.5 52 | PcbTextSizeV=1.5 53 | PcbTextSizeH=1.5 54 | PcbTextThickness=0.3 55 | ModuleTextSizeV=1 56 | ModuleTextSizeH=1 57 | ModuleTextSizeThickness=0.15 58 | SolderMaskClearance=0 59 | SolderMaskMinWidth=0 60 | DrawSegmentWidth=0.2 61 | BoardOutlineThickness=0.09999999999999999 62 | ModuleOutlineThickness=0.15 63 | -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-PasteTop.gtp: -------------------------------------------------------------------------------- 1 | G04 #@! TF.FileFunction,Paste,Top* 2 | %FSLAX46Y46*% 3 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 4 | G04 Created by KiCad (PCBNEW 4.0.2+e4-6225~38~ubuntu14.04.1-stable) date Mon Aug 1 15:26:05 2016* 5 | %MOMM*% 6 | G01* 7 | G04 APERTURE LIST* 8 | %ADD10C,0.350000*% 9 | %ADD11C,0.100000*% 10 | %ADD12R,1.500000X1.250000*% 11 | %ADD13R,0.900000X1.200000*% 12 | %ADD14R,1.200000X0.900000*% 13 | G04 APERTURE END LIST* 14 | D10* 15 | D11* 16 | X50520600Y-22275800D02* 17 | X20574000Y-22275800D01* 18 | X50520600Y-95123000D02* 19 | X50520600Y-22275800D01* 20 | X20574000Y-95123000D02* 21 | X50520600Y-95123000D01* 22 | X20574000Y-22273033D02* 23 | X20574000Y-95123070D01* 24 | D12* 25 | X37520560Y-76840080D03* 26 | X40020560Y-76840080D03* 27 | D13* 28 | X35532060Y-76670080D03* 29 | X35532060Y-74470080D03* 30 | X42164000Y-77978000D03* 31 | X42164000Y-80178000D03* 32 | D12* 33 | X38455920Y-78994000D03* 34 | X35955920Y-78994000D03* 35 | D14* 36 | X35978920Y-81026000D03* 37 | X38178920Y-81026000D03* 38 | D13* 39 | X40380920Y-79100500D03* 40 | X40380920Y-81300500D03* 41 | X34493200Y-69105960D03* 42 | X34493200Y-66905960D03* 43 | X37668200Y-69105960D03* 44 | X37668200Y-66905960D03* 45 | X40843200Y-69105960D03* 46 | X40843200Y-66905960D03* 47 | X34493200Y-43918960D03* 48 | X34493200Y-46118960D03* 49 | X37668200Y-43918960D03* 50 | X37668200Y-46118960D03* 51 | X40970200Y-43918960D03* 52 | X40970200Y-46118960D03* 53 | M02* 54 | -------------------------------------------------------------------------------- /dp-to-hsmc/dp-to-hsmc.pro: -------------------------------------------------------------------------------- 1 | update=Fri 19 Jun 2015 11:13:06 AM AEST 2 | version=1 3 | last_client=kicad 4 | [pcbnew] 5 | version=1 6 | LastNetListRead= 7 | UseCmpFile=1 8 | PadDrill=0.600000000000 9 | PadDrillOvalY=0.600000000000 10 | PadSizeH=1.500000000000 11 | PadSizeV=1.500000000000 12 | PcbTextSizeV=1.500000000000 13 | PcbTextSizeH=1.500000000000 14 | PcbTextThickness=0.300000000000 15 | ModuleTextSizeV=1.000000000000 16 | ModuleTextSizeH=1.000000000000 17 | ModuleTextSizeThickness=0.150000000000 18 | SolderMaskClearance=0.000000000000 19 | SolderMaskMinWidth=0.000000000000 20 | DrawSegmentWidth=0.200000000000 21 | BoardOutlineThickness=0.100000000000 22 | ModuleOutlineThickness=0.150000000000 23 | [cvpcb] 24 | version=1 25 | NetIExt=net 26 | [general] 27 | version=1 28 | [eeschema] 29 | version=1 30 | LibDir=../libraries 31 | [eeschema/libraries] 32 | LibName1=power 33 | LibName2=device 34 | LibName3=transistors 35 | LibName4=conn 36 | LibName5=linear 37 | LibName6=regul 38 | LibName7=74xx 39 | LibName8=cmos4000 40 | LibName9=adc-dac 41 | LibName10=memory 42 | LibName11=xilinx 43 | LibName12=microcontrollers 44 | LibName13=dsp 45 | LibName14=microchip 46 | LibName15=analog_switches 47 | LibName16=motorola 48 | LibName17=texas 49 | LibName18=intel 50 | LibName19=audio 51 | LibName20=interface 52 | LibName21=digital-audio 53 | LibName22=philips 54 | LibName23=display 55 | LibName24=cypress 56 | LibName25=siliconi 57 | LibName26=opto 58 | LibName27=atmel 59 | LibName28=contrib 60 | LibName29=valves 61 | LibName30=display_port 62 | LibName31=hsmc 63 | -------------------------------------------------------------------------------- /dp-to-pcie/dp-to-pcie.pro: -------------------------------------------------------------------------------- 1 | update=Sat 13 Jun 2015 07:13:33 PM AEST 2 | version=1 3 | last_client=kicad 4 | [pcbnew] 5 | version=1 6 | LastNetListRead= 7 | UseCmpFile=1 8 | PadDrill=0.600000000000 9 | PadDrillOvalY=0.600000000000 10 | PadSizeH=1.500000000000 11 | PadSizeV=1.500000000000 12 | PcbTextSizeV=1.500000000000 13 | PcbTextSizeH=1.500000000000 14 | PcbTextThickness=0.300000000000 15 | ModuleTextSizeV=1.000000000000 16 | ModuleTextSizeH=1.000000000000 17 | ModuleTextSizeThickness=0.150000000000 18 | SolderMaskClearance=0.000000000000 19 | SolderMaskMinWidth=0.000000000000 20 | DrawSegmentWidth=0.200000000000 21 | BoardOutlineThickness=0.100000000000 22 | ModuleOutlineThickness=0.150000000000 23 | [cvpcb] 24 | version=1 25 | NetIExt=net 26 | [general] 27 | version=1 28 | [eeschema] 29 | version=1 30 | LibDir=../libraries 31 | [eeschema/libraries] 32 | LibName1=power 33 | LibName2=device 34 | LibName3=transistors 35 | LibName4=conn 36 | LibName5=linear 37 | LibName6=regul 38 | LibName7=74xx 39 | LibName8=cmos4000 40 | LibName9=adc-dac 41 | LibName10=memory 42 | LibName11=xilinx 43 | LibName12=microcontrollers 44 | LibName13=dsp 45 | LibName14=microchip 46 | LibName15=analog_switches 47 | LibName16=motorola 48 | LibName17=texas 49 | LibName18=intel 50 | LibName19=audio 51 | LibName20=interface 52 | LibName21=digital-audio 53 | LibName22=philips 54 | LibName23=display 55 | LibName24=cypress 56 | LibName25=siliconi 57 | LibName26=opto 58 | LibName27=atmel 59 | LibName28=contrib 60 | LibName29=valves 61 | LibName30=display_port 62 | LibName31=timvideos-pcie-8x 63 | -------------------------------------------------------------------------------- /dp-to-hsmc/connectors.md: -------------------------------------------------------------------------------- 1 | 2 | * ASP-122952-01 3 | 4 | This is a customized version of the QTH family connectors with 3 banks. Bank 1 5 | is differential only (-DP) and banks 2 and 3 are like a normal QTH. This 6 | connector has 172 physical pins. 7 | 8 | * ASP-122953-01 9 | 10 | Recommended connector for host boards. This is a semicustom version of the QSH 11 | family connectors with 3 banks. Bank 1 is differential only (-DP) and banks 2 12 | and 3 are like a normal QSH. This connector has 172 physical pins. 13 | 14 | ------ 15 | 16 | * QTH-090-01-L-D-A 17 | 18 | QTH family connector with three banks. The difference between this connector 19 | and the ASP version is that all pins are populated in bank 1 of the connector. 20 | This difference equates to slightly lower signal integrity in that bank which 21 | typically carries multi-GHz clock-data-recovery signals. It is recommended that 22 | you do not leave the undefined pins in bank 1 floating; ground them or tie them 23 | to power. This connector has 192 physical pins. 24 | 25 | * QSH-090-01-L-D-A 26 | 27 | QSH family connector with three banks. The difference between this connector 28 | and the ASP version is that all pins are populated in bank 1 of the connector. 29 | This equates to slightly lower signal integrity in that bank which typically 30 | carries multi-GHz clock-data-recovery signals. It is recommended that you do 31 | not leave the undefined pins in bank 1 floating; ground them or tie them to 32 | power. This connector has 192 physical pins 33 | 34 | ------ 35 | 36 | QTH-090-01-F-D-A: $8.06, QSH-090-01-F-D-A: $7.90. 37 | 38 | Available from Digi-Key. 39 | 40 | 41 | -------------------------------------------------------------------------------- /dp-to-hsmc/dp-to-hsmc.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 2 2 | LIBS:power 3 | LIBS:device 4 | LIBS:transistors 5 | LIBS:conn 6 | LIBS:linear 7 | LIBS:regul 8 | LIBS:74xx 9 | LIBS:cmos4000 10 | LIBS:adc-dac 11 | LIBS:memory 12 | LIBS:xilinx 13 | LIBS:microcontrollers 14 | LIBS:dsp 15 | LIBS:microchip 16 | LIBS:analog_switches 17 | LIBS:motorola 18 | LIBS:texas 19 | LIBS:intel 20 | LIBS:audio 21 | LIBS:interface 22 | LIBS:digital-audio 23 | LIBS:philips 24 | LIBS:display 25 | LIBS:cypress 26 | LIBS:siliconi 27 | LIBS:opto 28 | LIBS:atmel 29 | LIBS:contrib 30 | LIBS:valves 31 | LIBS:display_port 32 | LIBS:hsmc 33 | EELAYER 25 0 34 | EELAYER END 35 | $Descr A4 11693 8268 36 | encoding utf-8 37 | Sheet 1 1 38 | Title "" 39 | Date "" 40 | Rev "" 41 | Comp "" 42 | Comment1 "" 43 | Comment2 "" 44 | Comment3 "" 45 | Comment4 "" 46 | $EndDescr 47 | $Comp 48 | L QTH-090-01-L-D-A CON? 49 | U 1 1 55836CBF 50 | P 1620 2410 51 | F 0 "CON?" H 1620 760 50 0000 C CNN 52 | F 1 "QTH-090-01-L-D-A" H 1620 4060 50 0000 C CNN 53 | F 2 "MODULE" H 1620 2510 50 0001 C CNN 54 | F 3 "DOCUMENTATION" H 1620 2310 50 0001 C CNN 55 | 1 1620 2410 56 | 1 0 0 -1 57 | $EndComp 58 | $Comp 59 | L QTH-090-01-L-D-A CON? 60 | U 2 1 55836D2F 61 | P 3240 2410 62 | F 0 "CON?" H 3240 760 50 0000 C CNN 63 | F 1 "QTH-090-01-L-D-A" H 3240 4060 50 0000 C CNN 64 | F 2 "MODULE" H 3240 2510 50 0001 C CNN 65 | F 3 "DOCUMENTATION" H 3240 2310 50 0001 C CNN 66 | 2 3240 2410 67 | 1 0 0 -1 68 | $EndComp 69 | $Comp 70 | L QTH-090-01-L-D-A CON? 71 | U 3 1 55836E66 72 | P 4930 2410 73 | F 0 "CON?" H 4930 760 50 0000 C CNN 74 | F 1 "QTH-090-01-L-D-A" H 4930 4060 50 0000 C CNN 75 | F 2 "MODULE" H 4930 2510 50 0001 C CNN 76 | F 3 "DOCUMENTATION" H 4930 2310 50 0001 C CNN 77 | 3 4930 2410 78 | 1 0 0 -1 79 | $EndComp 80 | $EndSCHEMATC 81 | -------------------------------------------------------------------------------- /dp-to-pcie/README.md: -------------------------------------------------------------------------------- 1 | 2 | This schematic is design to allow FPGA development boards which have their high 3 | speed transceivers broken out to a PCI-Express header to be used with 4 | DisplayPort connectors instead. 5 | 6 | For this to work, the board must meet the following requirements; 7 | * Have reconfigurable high speed transceivers compatible with 2.5V LVDS used 8 | by DisplayPort. 9 | * Have enough transceivers to support 4 channels (PCI-Express 4x). 10 | 11 | The auxiliary, hot plug and config lines can be mapped to three locations; 12 | * TOFE compatible locations. 13 | * Diligent PMOD headers compatible with the dp-aux-interceptor. 14 | * Spare pins on the PCI express connector. 15 | 16 | The PCIe clock lines can be used to provide a suitable Display Port clock via; 17 | * Connecting a signal generator to the SMA connectors. 18 | * Populated a suitable oscillator to connector XXXX. 19 | 20 | This information is based on information from the 21 | [Tim's Open FPGA Expansion (TOFE) board connector interface](https://docs.google.com/spreadsheets/d/15rivtOcSG4kqKf0AUK_OwBfs67XQtW8byr8kc5FUTgE/edit#gid=1672381710) 22 | 23 | The following FPGA development boards have been tested and known working with 24 | this design; 25 | 26 | * None - This project is still a work in progress. 27 | 28 | The following FPGA boards are being considered for testing and their pin 29 | information is being tracked in the following 30 | [Google Doc](https://docs.google.com/spreadsheets/d/1lWmWJ1-ANhsEsvpYTgBhPL2qnzWC2HEEkqb_Rro3W5U/edit#gid=939622631). 31 | 32 | * [Xilinx Kintex-7 FPGA KC705 Evaluation Kit](http://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html) 33 | (See the boards-kc705.csv file for pin information.) 34 | 35 | * Lattice Semiconductor's [ECP5PCIExpressDevKit](http://latticesemi.com/Products/DevelopmentBoardsAndKits/ECP5PCIExpressDevKit.aspx) 36 | -------------------------------------------------------------------------------- /dp-to-hsmc/README.md: -------------------------------------------------------------------------------- 1 | 2 | This schematic is designed to connect the high speed transceivers found in 3 | Altera boards on their HSMC interface to DisplayPort connectors. 4 | 5 | The board uses the "4.2.2 Standard Differential Host Pinout" format. 6 | 7 | The first 4 XCVR pairs (found in the first bank) are mapped to the DisplayPort 8 | lanes. 9 | 10 | The 3.3V power is used to provide the DisplayPort connectors with power. The 11 | 12V power is not used. 12 | 13 | A LVDS compatible clock is provided on CLKIN1p/CLKIN1n for generating the 14 | DisplayPort signals. 15 | 16 | The auxiliary lines are mapped to LVDS pairs. 17 | 18 | The hot plug and config lines can be mapped to CMOS pins. 19 | 20 | See the following 21 | [Google Spreadsheet for how this maps to development boards](https://docs.google.com/a/mithis.com/spreadsheets/d/11ZIs2P0CqnqOLfFEEVHmpYmOVtex8-fZbPhicQQ8PLs/edit?usp=sharing). 22 | 23 | # TODO List 24 | 25 | - [ ] Create a HSMC compatible schematic part in the library. 26 | - [ ] Create a HSMC connector PCB component. 27 | - [ ] Create a HSMC compatible PCB template with holes and stuff. 28 | - [ ] Generate the schematic for the board. 29 | - [ ] Layout the board. 30 | 31 | You can find the HSMC specification 32 | [here](https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ds/hsmc_spec.pdf). 33 | 34 | The HSMC specification suggests three different connectors for making a 35 | Mezzanine card, but only the 36 | [QTH-090-01-L-D-A](http://www.digikey.com/product-detail/en/QTH-090-01-L-D-A/SAM8193-ND/1106537) 37 | variant seems to be easily available from Digikey. When using this connector 38 | the HSMC spec says; 39 | 40 | > QTH family connector with three banks. The difference between this connector 41 | > and the ASP version is that all pins are populated in bank 1 of the 42 | > connector. This difference equates to slightly lower signal integrity in that 43 | > bank which typically carries multi-GHz clock-data-recovery signals. It is 44 | > recommended that you do not leave the undefined pins in bank 1 floating; 45 | > ground them or tie them to power. This connector has 192 physical pins. 46 | -------------------------------------------------------------------------------- /dp-to-hsmc/hsmc-spec-pins.csv: -------------------------------------------------------------------------------- 1 | Pin Number,Function,Function,Pin Number,Description 2 | 1,XCVR_TXp7,XCVR_RXp7,2,Transceiver 3 | 3,XCVR_TXn7,XCVR_RXn7,4,Transceiver 4 | 5,XCVR_TXp6,XCVR_RXp6,6,Transceiver 5 | 7,XCVR_TXn6,XCVR_RXn6,8,Transceiver 6 | 9,XCVR_TXp5,XCVR_RXp5,10,Transceiver 7 | 11,XCVR_TXn5,XCVR_RXn5,12,Transceiver 8 | 13,XCVR_TXp4,XCVR_RXp4,14,Transceiver 9 | 15,XCVR_TXn4,XCVR_RXn4,16,Transceiver 10 | 17,XCVR_TXp3,XCVR_RXp3,18,Transceiver 11 | 19,XCVR_TXn3,XCVR_RXn3,20,Transceiver 12 | 21,XCVR_TXp2,XCVR_RXp2,22,Transceiver 13 | 23,XCVR_TXn2,XCVR_RXn2,24,Transceiver 14 | 25,XCVR_TXp1,XCVR_RXp1,26,Transceiver 15 | 27,XCVR_TXn1,XCVR_RXn1,28,Transceiver 16 | 29,XCVR_TXp0,XCVR_RXp0,30,Transceiver 17 | 31,XCVR_TXn0,XCVR_RXn0,32,Transceiver 18 | 33,SDA,SCL,34,SMBUS/CMOS 19 | 35,JTAG_TCK,JTAG_TMS,36,JTAG/CMOS 20 | 37,JTAG_TDO,JTAG_TDI,38,JTAG/CMOS 21 | 39,CLKOUT0,CLKIN0,40,CMOS CLK 22 | 41,D0,D1,42,CMOS 23 | 43,D2,D3,44,CMOS 24 | 45,3.3V,12V,46,Power 25 | 47,LVDS_TXp0,LVDS_RXp0,48,CMOS/LVDS 26 | 49,LVDS_TXn0,LVDS_RXn0,50,CMOS/LVDS 27 | 51,3.3V,12V,52,Power 28 | 53,LVDS_TXp1,LVDS_RXp1,54,CMOS/LVDS 29 | 55,LVDS_TXn1,LVDS_RXn1,56,CMOS/LVDS 30 | 57,3.3V,12V,58,Power 31 | 59,LVDS_TXp2,LVDS_RXp2,60,CMOS/LVDS 32 | 61,LVDS_TXn2,LVDS_RXn2,62,CMOS/LVDS 33 | 63,3.3V,12V,64,Power 34 | 65,LVDS_TXp3,LVDS_RXp3,66,CMOS/LVDS 35 | 67,LVDS_TXn3,LVDS_RXn3,68,CMOS/LVDS 36 | 69,3.3V,12V,70,Power 37 | 71,LVDS_TXp4,LVDS_RXp4,72,CMOS/LVDS 38 | 73,LVDS_TXn4,LVDS_RXn4,74,CMOS/LVDS 39 | 75,3.3V,12V,76,Power 40 | 77,LVDS_TXp5,LVDS_RXp5,78,CMOS/LVDS 41 | 79,LVDS_TXn5,LVDS_RXn5,80,CMOS/LVDS 42 | 81,3.3V,12V,82,Power 43 | 83,LVDS_TXp6,LVDS_RXp6,84,CMOS/LVDS 44 | 85,LVDS_TXn6,LVDS_RXn6,86,CMOS/LVDS 45 | 87,3.3V,12V,88,Power 46 | 89,LVDS_TXp7,LVDS_RXp7,90,CMOS/LVDS 47 | 91,LVDS_TXn7,LVDS_RXn7,92,CMOS/LVDS 48 | 93,3.3V,12V,94,Power 49 | 95,CLKOUT1p,CLKIN1p,96,LVDS CLKp/CMOS 50 | 97,CLKOUT1n,CLKIN1n,98,LVDS CLKn/CMOS 51 | 99,3.3V,12V,100,Power 52 | 101,LVDS_TXp8,LVDS_RXp8,102,CMOS/LVDS 53 | 103,LVDS_TXn8,LVDS_RXn8,104,CMOS/LVDS 54 | 105,3.3V,12V,106,Power 55 | 107,LVDS_TXp9,LVDS_RXp9,108,CMOS/LVDS 56 | 109,LVDS_TXn9,LVDS_RXn9,110,CMOS/LVDS 57 | 111,3.3V,12V,112,Power 58 | 113,LVDS_TXp10,LVDS_RXp10,114,CMOS/LVDS 59 | 115,LVDS_TXn10,LVDS_RXn10,116,CMOS/LVDS 60 | 117,3.3V,12V,118,Power 61 | 119,LVDS_TXp11,LVDS_RXp11,120,CMOS/LVDS 62 | 121,LVDS_TXn11,LVDS_RXn11,122,CMOS/LVDS 63 | 123,3.3V,12V,124,Power 64 | 125,LVDS_TXp12,LVDS_RXp12,126,CMOS/LVDS 65 | 127,LVDS_TXn12,LVDS_RXn12,128,CMOS/LVDS 66 | 129,3.3V,12V,130,Power 67 | 131,LVDS_TXp13,LVDS_RXp13,132,CMOS/LVDS 68 | 133,LVDS_TXn13,LVDS_RXn13,134,CMOS/LVDS 69 | 135,3.3V,12V,136,Power 70 | 137,LVDS_TXp14,LVDS_RXp14,138,CMOS/LVDS 71 | 139,LVDS_TXn14,LVDS_RXn14,140,CMOS/LVDS 72 | 141,3.3V,12V,142,Power 73 | 143,LVDS_TXp15,LVDS_RXp15,144,CMOS/LVDS 74 | 145,LVDS_TXn15,LVDS_RXn15,146,CMOS/LVDS 75 | 147,3.3V,12V,148,Power 76 | 149,LVDS_TXp16,LVDS_RXp16,150,CMOS/LVDS 77 | 151,LVDS_TXn16,LVDS_RXn16,152,CMOS/LVDS 78 | 153,3.3V,12V,154,Power 79 | 155,CLKOUT2n,CLKIN2n,158,LVDS CLKn/CMOS 80 | 157,CLKOUT2p,CLKIN2p,156,LVDS CLKp/CMOS 81 | 159,3.3V,PSNTn,160,Power/PSNTn 82 | 83 | 84 | 85 | -------------------------------------------------------------------------------- /libraries/2040204-1.pretty/2040210-1.kicad_mod: -------------------------------------------------------------------------------- 1 | (module 2040210-1 (layer F.Cu) (tedit 557E56AE) 2 | (fp_text reference CON** (at 0 8) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value 2040210-1 (at 0 -8.6) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 8.45 6.6) (end 8.45 -7.5) (layer F.SilkS) (width 0.15)) 9 | (fp_line (start -8.45 -7.5) (end -8.45 6.5) (layer F.SilkS) (width 0.15)) 10 | (fp_line (start -8.45 -7.49) (end 8.45 -7.49) (layer F.SilkS) (width 0.15)) 11 | (fp_line (start -8.45 6.56) (end 8.45 6.56) (layer F.SilkS) (width 0.15)) 12 | (fp_line (start 8.45 6.6) (end 8.45 -7.5) (layer B.SilkS) (width 0.15)) 13 | (fp_line (start -8.45 -7.5) (end -8.45 6.5) (layer B.SilkS) (width 0.15)) 14 | (fp_line (start -8.45 -7.49) (end 8.45 -7.49) (layer B.SilkS) (width 0.15)) 15 | (fp_line (start -8.45 6.56) (end 8.45 6.56) (layer B.SilkS) (width 0.15)) 16 | (pad "" np_thru_hole circle (at 0 3.225) (size 1.4 1.4) (drill 1.4) (layers *.Cu *.Mask F.SilkS)) 17 | (pad 21 thru_hole oval (at -8.25 2.325) (size 1.2 1.7) (drill oval 0.6 1.1) (layers *.Cu *.Mask F.SilkS)) 18 | (pad 22 thru_hole oval (at 8.25 2.325) (size 1.2 1.7) (drill oval 0.6 1.1) (layers *.Cu *.Mask F.SilkS)) 19 | (pad 23 thru_hole oval (at -8.25 -4.455) (size 1.2 2.2) (drill oval 0.6 1.6) (layers *.Cu *.Mask F.SilkS)) 20 | (pad 24 thru_hole oval (at 8.25 -4.455) (size 1.2 2.2) (drill oval 0.6 1.6) (layers *.Cu *.Mask F.SilkS)) 21 | (pad 12 thru_hole circle (at 0 -6.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 22 | (pad 15 thru_hole circle (at -1.5 -6.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 23 | (pad 18 thru_hole circle (at -3 -6.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 24 | (pad 9 thru_hole circle (at 1.5 -6.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 25 | (pad 6 thru_hole circle (at 3 -6.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 26 | (pad 3 thru_hole circle (at 4.5 -6.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 27 | (pad 13 thru_hole circle (at -0.5 -5.005) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 28 | (pad 16 thru_hole circle (at -2 -5.005) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 29 | (pad 19 thru_hole circle (at -3.5 -5.005) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 30 | (pad 10 thru_hole circle (at 1 -5.005) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 31 | (pad 7 thru_hole circle (at 2.5 -5.005) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 32 | (pad 4 thru_hole circle (at 4 -5.005) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 33 | (pad 1 thru_hole circle (at 5.5 -5.005) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 34 | (pad 14 thru_hole circle (at -1 -3.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 35 | (pad 17 thru_hole circle (at -2.5 -3.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 36 | (pad 20 thru_hole circle (at -4 -3.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 37 | (pad 11 thru_hole circle (at 0.5 -3.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 38 | (pad 8 thru_hole circle (at 2 -3.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 39 | (pad 5 thru_hole circle (at 3.5 -3.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 40 | (pad 2 thru_hole circle (at 5 -3.505) (size 1 1) (drill 0.55) (layers *.Cu *.Mask F.SilkS)) 41 | ) 42 | -------------------------------------------------------------------------------- /libraries/DP1RD20JQ1R400.pretty/DP1RD20JQ1R400.kicad_mod: -------------------------------------------------------------------------------- 1 | (module DP1RD20JQ1R400 (layer F.Cu) (tedit 5548A98F) 2 | (descr "Display Port Receptacle - Surface Mount, Right Angle Horizontal") 3 | (tags 670-2589-1-ND) 4 | (fp_text reference J8 (at 10.06348 4.03352) (layer F.SilkS) 5 | (effects (font (size 1.016 1.016) (thickness 0.254))) 6 | ) 7 | (fp_text value DISPLAY_PORT (at 0 5.08) (layer F.SilkS) hide 8 | (effects (font (size 1.27 1.27) (thickness 0.254))) 9 | ) 10 | (fp_line (start -8.5 -3) (end -8.5 -1.5) (layer F.SilkS) (width 0.15)) 11 | (fp_line (start 8.5 -1.5) (end 8.5 -3) (layer F.SilkS) (width 0.15)) 12 | (fp_line (start 8.5 5.5) (end 8.5 1.5) (layer F.SilkS) (width 0.15)) 13 | (fp_line (start 8.5 8.5) (end 8.5 8) (layer F.SilkS) (width 0.15)) 14 | (fp_line (start -8.5 8.5) (end -8.5 8) (layer F.SilkS) (width 0.15)) 15 | (fp_line (start -8.5 1.5) (end -8.5 5.5) (layer F.SilkS) (width 0.15)) 16 | (fp_line (start -8.5 -3) (end -4.5 -3) (layer F.SilkS) (width 0.15)) 17 | (fp_line (start 6 -3) (end 8.5 -3) (layer F.SilkS) (width 0.15)) 18 | (fp_line (start -8.5 10.96) (end -8.5 8.5) (layer F.SilkS) (width 0.15)) 19 | (fp_line (start 8.5 10.96) (end 8.5 8.5) (layer F.SilkS) (width 0.15)) 20 | (fp_line (start 8.45 10.96) (end -8.45 10.96) (layer F.SilkS) (width 0.15)) 21 | (pad 12 smd rect (at 0 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 22 | (pad 11 smd rect (at 0.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 23 | (pad 10 smd rect (at 1 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 24 | (pad 9 smd rect (at 1.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 25 | (pad 8 smd rect (at 2 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 26 | (pad 7 smd rect (at 2.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 27 | (pad 6 smd rect (at 3 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 28 | (pad 5 smd rect (at 3.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 29 | (pad 4 smd rect (at 4 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 30 | (pad 3 smd rect (at 4.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 31 | (pad 13 smd rect (at -0.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 32 | (pad 14 smd rect (at -1 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 33 | (pad 15 smd rect (at -1.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 34 | (pad 16 smd rect (at -2 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 35 | (pad 17 smd rect (at -2.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 36 | (pad 18 smd rect (at -3 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 37 | (pad 19 smd rect (at -3.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 38 | (pad 20 smd rect (at -4 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 39 | (pad 0 thru_hole oval (at -8.25 0) (size 1.3 2.3) (drill oval 0.65 1.65) (layers *.Cu *.Mask F.SilkS)) 40 | (pad 0 thru_hole oval (at 8.25 0) (size 1.3 2.3) (drill oval 0.65 1.65) (layers *.Cu *.Mask F.SilkS)) 41 | (pad 0 thru_hole oval (at -8.25 6.78) (size 1.3 1.9) (drill oval 0.65 1.2) (layers *.Cu *.Mask F.SilkS)) 42 | (pad 0 thru_hole oval (at 8.25 6.78) (size 1.3 1.9) (drill oval 0.65 1.2) (layers *.Cu *.Mask F.SilkS)) 43 | (pad "" np_thru_hole circle (at 0 7.68) (size 1.45 1.45) (drill 1.45) (layers *.Cu *.Mask F.SilkS)) 44 | (pad 2 smd rect (at 5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 45 | (pad 1 smd rect (at 5.5 -2.6) (size 0.3302 2.75) (layers F.Cu F.Paste F.Mask)) 46 | ) 47 | -------------------------------------------------------------------------------- /dp-aux-intercept/dp-aux-intercept.cmp: -------------------------------------------------------------------------------- 1 | Cmp-Mod V01 Created by Cvpcb 0.201506030104+5696~23~ubuntu14.04.1-product date = Tue 16 Jun 2015 21:43:30 AEST 2 | 3 | BeginCmp 4 | TimeStamp = /557C4D19; 5 | Reference = CCAN1; 6 | ValeurCmp = C; 7 | IdModule = Capacitors_SMD:C_0805_HandSoldering; 8 | EndCmp 9 | 10 | BeginCmp 11 | TimeStamp = /557C4C4E; 12 | Reference = CCAP1; 13 | ValeurCmp = C; 14 | IdModule = Capacitors_SMD:C_0805_HandSoldering; 15 | EndCmp 16 | 17 | BeginCmp 18 | TimeStamp = /557C6A13; 19 | Reference = CDAN1; 20 | ValeurCmp = C; 21 | IdModule = Capacitors_SMD:C_0805_HandSoldering; 22 | EndCmp 23 | 24 | BeginCmp 25 | TimeStamp = /557C6A0D; 26 | Reference = CDAP1; 27 | ValeurCmp = C; 28 | IdModule = Capacitors_SMD:C_0805_HandSoldering; 29 | EndCmp 30 | 31 | BeginCmp 32 | TimeStamp = /557BFC21; 33 | Reference = DPC1; 34 | ValeurCmp = DISPLAY_PORT; 35 | IdModule = 2040204-1:2040210-1; 36 | EndCmp 37 | 38 | BeginCmp 39 | TimeStamp = /557BFD1C; 40 | Reference = DPD1; 41 | ValeurCmp = DISPLAY_PORT; 42 | IdModule = 2040204-1:2040210-1; 43 | EndCmp 44 | 45 | BeginCmp 46 | TimeStamp = /557C2606; 47 | Reference = JCCFG1; 48 | ValeurCmp = CONN_02X03; 49 | IdModule = Pin_Headers:Pin_Header_Straight_2x03; 50 | EndCmp 51 | 52 | BeginCmp 53 | TimeStamp = /557C1F39; 54 | Reference = JDCFG1; 55 | ValeurCmp = CONN_02X03; 56 | IdModule = Pin_Headers:Pin_Header_Straight_2x03; 57 | EndCmp 58 | 59 | BeginCmp 60 | TimeStamp = /55800EEB; 61 | Reference = PAUX1; 62 | ValeurCmp = CONN_02X10; 63 | IdModule = Socket_Strips:Socket_Strip_Angled_2x10; 64 | EndCmp 65 | 66 | BeginCmp 67 | TimeStamp = /557C0681; 68 | Reference = PCFG1; 69 | ValeurCmp = CONN_02X06; 70 | IdModule = Pin_Headers:Pin_Header_Straight_2x06; 71 | EndCmp 72 | 73 | BeginCmp 74 | TimeStamp = /557C4ADA; 75 | Reference = RCAN1; 76 | ValeurCmp = 100K; 77 | IdModule = Resistors_SMD:R_0603_HandSoldering; 78 | EndCmp 79 | 80 | BeginCmp 81 | TimeStamp = /557C4BC4; 82 | Reference = RCAN2; 83 | ValeurCmp = 50; 84 | IdModule = Resistors_SMD:R_0603_HandSoldering; 85 | EndCmp 86 | 87 | BeginCmp 88 | TimeStamp = /557C4A36; 89 | Reference = RCAP1; 90 | ValeurCmp = 100K; 91 | IdModule = Resistors_SMD:R_0603_HandSoldering; 92 | EndCmp 93 | 94 | BeginCmp 95 | TimeStamp = /557C4B50; 96 | Reference = RCAP2; 97 | ValeurCmp = 50; 98 | IdModule = Resistors_SMD:R_0603_HandSoldering; 99 | EndCmp 100 | 101 | BeginCmp 102 | TimeStamp = /557C25E8; 103 | Reference = RCCFG1; 104 | ValeurCmp = 1M; 105 | IdModule = Resistors_SMD:R_0603_HandSoldering; 106 | EndCmp 107 | 108 | BeginCmp 109 | TimeStamp = /557C25F4; 110 | Reference = RCCFG2; 111 | ValeurCmp = 5M; 112 | IdModule = Resistors_SMD:R_0603_HandSoldering; 113 | EndCmp 114 | 115 | BeginCmp 116 | TimeStamp = /557C25FA; 117 | Reference = RCHPD1; 118 | ValeurCmp = 100K; 119 | IdModule = Resistors_SMD:R_0603_HandSoldering; 120 | EndCmp 121 | 122 | BeginCmp 123 | TimeStamp = /557C6A07; 124 | Reference = RDAN1; 125 | ValeurCmp = 10K; 126 | IdModule = Resistors_SMD:R_0603_HandSoldering; 127 | EndCmp 128 | 129 | BeginCmp 130 | TimeStamp = /557C69FB; 131 | Reference = RDAN2; 132 | ValeurCmp = 50; 133 | IdModule = Resistors_SMD:R_0603_HandSoldering; 134 | EndCmp 135 | 136 | BeginCmp 137 | TimeStamp = /557C6A01; 138 | Reference = RDAP1; 139 | ValeurCmp = 10K; 140 | IdModule = Resistors_SMD:R_0603_HandSoldering; 141 | EndCmp 142 | 143 | BeginCmp 144 | TimeStamp = /557C69F5; 145 | Reference = RDAP2; 146 | ValeurCmp = 50; 147 | IdModule = Resistors_SMD:R_0603_HandSoldering; 148 | EndCmp 149 | 150 | BeginCmp 151 | TimeStamp = /557C1AF8; 152 | Reference = RDCFG1; 153 | ValeurCmp = 1M; 154 | IdModule = Resistors_SMD:R_0603_HandSoldering; 155 | EndCmp 156 | 157 | BeginCmp 158 | TimeStamp = /557C1BC9; 159 | Reference = RDCFG2; 160 | ValeurCmp = 5M; 161 | IdModule = Resistors_SMD:R_0603_HandSoldering; 162 | EndCmp 163 | 164 | BeginCmp 165 | TimeStamp = /557C1C66; 166 | Reference = RDHPD1; 167 | ValeurCmp = 100K; 168 | IdModule = Resistors_SMD:R_0603_HandSoldering; 169 | EndCmp 170 | 171 | EndListe 172 | -------------------------------------------------------------------------------- /third_party/gen_gerber_and_drill_files_board.py: -------------------------------------------------------------------------------- 1 | ''' 2 | A python script example to create plot files to build a board: 3 | Gerber files 4 | Drill files 5 | Map dril files 6 | 7 | Important note: 8 | this python script does not plot frame references (page layout). 9 | the reason is it is not yet possible from a python script because plotting 10 | plot frame references needs loading the corresponding page layout file 11 | (.wks file) or the default template. 12 | 13 | This info (the page layout template) is not stored in the board, and therefore 14 | not available. 15 | 16 | Do not try to change SetPlotFrameRef(False) to SetPlotFrameRef(true) 17 | the result is the pcbnew lib will crash if you try to plot 18 | the unknown frame references template. 19 | 20 | Anyway, in gerber and drill files the page layout is not plot 21 | ''' 22 | 23 | import sys 24 | 25 | from pcbnew import * 26 | filename=sys.argv[1] 27 | 28 | board = LoadBoard(filename) 29 | 30 | plotDir = sys.argv[2] 31 | 32 | pctl = PLOT_CONTROLLER(board) 33 | 34 | popt = pctl.GetPlotOptions() 35 | 36 | popt.SetOutputDirectory(plotDir) 37 | 38 | # Set some important plot options: 39 | popt.SetPlotFrameRef(False) #do not change it 40 | popt.SetLineWidth(FromMM(0.35)) 41 | 42 | popt.SetAutoScale(False) #do not change it 43 | popt.SetScale(1) #do not change it 44 | popt.SetMirror(False) 45 | popt.SetUseGerberAttributes(False) 46 | popt.SetUseGerberProtelExtensions(True) 47 | popt.SetExcludeEdgeLayer(False); 48 | popt.SetScale(1) 49 | popt.SetUseAuxOrigin(True) 50 | 51 | # This by gerbers only (also the name is truly horrid!) 52 | popt.SetSubtractMaskFromSilk(False) 53 | 54 | # Once the defaults are set it become pretty easy... 55 | # I have a Turing-complete programming language here: I'll use it... 56 | # param 0 is a string added to the file base name to identify the drawing 57 | # param 1 is the layer ID 58 | # param 2 is a comment 59 | plot_plan = [ 60 | ( "CuTop", F_Cu, "Top layer" ), 61 | ( "CuBottom", B_Cu, "Bottom layer" ), 62 | ( "PasteBottom", B_Paste, "Paste Bottom" ), 63 | ( "PasteTop", F_Paste, "Paste top" ), 64 | ( "SilkTop", F_SilkS, "Silk top" ), 65 | ( "SilkBottom", B_SilkS, "Silk top" ), 66 | ( "MaskBottom", B_Mask, "Mask bottom" ), 67 | ( "MaskTop", F_Mask, "Mask top" ), 68 | ( "EdgeCuts", Edge_Cuts, "Edges" ), 69 | ] 70 | 71 | 72 | for layer_info in plot_plan: 73 | pctl.SetLayer(layer_info[1]) 74 | pctl.OpenPlotfile(layer_info[0], PLOT_FORMAT_GERBER, layer_info[2]) 75 | print 'plot %s' % pctl.GetPlotFileName() 76 | if pctl.PlotLayer() == False: 77 | print "plot error" 78 | 79 | #generate internal copper layers, if any 80 | lyrcnt = board.GetCopperLayerCount(); 81 | 82 | for innerlyr in range ( 1, lyrcnt-1 ): 83 | pctl.SetLayer(innerlyr) 84 | lyrname = 'inner%s' % innerlyr 85 | pctl.OpenPlotfile(lyrname, PLOT_FORMAT_GERBER, "inner") 86 | print 'plot %s' % pctl.GetPlotFileName() 87 | if pctl.PlotLayer() == False: 88 | print "plot error" 89 | 90 | 91 | # At the end you have to close the last plot, otherwise you don't know when 92 | # the object will be recycled! 93 | pctl.ClosePlot() 94 | 95 | # Fabricators need drill files. 96 | # sometimes a drill map file is asked (for verification purpose) 97 | drlwriter = EXCELLON_WRITER( board ) 98 | drlwriter.SetMapFileFormat( PLOT_FORMAT_PDF ) 99 | 100 | mirror = False 101 | minimalHeader = False 102 | offset = wxPoint(0,0) 103 | # False to generate 2 separate drill files (one for plated holes, one for non plated holes) 104 | # True to generate only one drill file 105 | mergeNPTH = False 106 | drlwriter.SetOptions( mirror, minimalHeader, offset, mergeNPTH ) 107 | 108 | metricFmt = True 109 | drlwriter.SetFormat( metricFmt ) 110 | 111 | genDrl = True 112 | genMap = True 113 | print 'create drill and map files in %s' % pctl.GetPlotDirName() 114 | drlwriter.CreateDrillandMapFilesSet( pctl.GetPlotDirName(), genDrl, genMap ); 115 | 116 | # One can create a text file to report drill statistics 117 | rptfn = pctl.GetPlotDirName() + 'drill_report.rpt' 118 | print 'report: %s' % rptfn 119 | drlwriter.GenDrillReportFile( rptfn ); 120 | -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-MaskBottom.gbs: -------------------------------------------------------------------------------- 1 | G04 #@! TF.FileFunction,Soldermask,Bot* 2 | %FSLAX46Y46*% 3 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 4 | G04 Created by KiCad (PCBNEW 4.0.2+e4-6225~38~ubuntu14.04.1-stable) date Mon Aug 1 15:26:05 2016* 5 | %MOMM*% 6 | G01* 7 | G04 APERTURE LIST* 8 | %ADD10C,0.350000*% 9 | %ADD11C,0.100000*% 10 | %ADD12C,1.400000*% 11 | %ADD13O,1.200000X1.700000*% 12 | %ADD14O,1.200000X2.200000*% 13 | %ADD15C,1.000000*% 14 | %ADD16R,1.727200X1.727200*% 15 | %ADD17O,1.727200X1.727200*% 16 | %ADD18R,1.500000X1.250000*% 17 | %ADD19R,0.900000X1.200000*% 18 | %ADD20R,1.200000X0.900000*% 19 | %ADD21C,0.254000*% 20 | G04 APERTURE END LIST* 21 | D10* 22 | D11* 23 | X50520600Y-22275800D02* 24 | X20574000Y-22275800D01* 25 | X50520600Y-95123000D02* 26 | X50520600Y-22275800D01* 27 | X20574000Y-95123000D02* 28 | X50520600Y-95123000D01* 29 | X20574000Y-22273033D02* 30 | X20574000Y-95123070D01* 31 | D12* 32 | X31242000Y-93268000D03* 33 | D13* 34 | X39492000Y-92368000D03* 35 | X22992000Y-92368000D03* 36 | D14* 37 | X39492000Y-85588000D03* 38 | X22992000Y-85588000D03* 39 | D15* 40 | X31242000Y-83538000D03* 41 | X32742000Y-83538000D03* 42 | X34242000Y-83538000D03* 43 | X29742000Y-83538000D03* 44 | X28242000Y-83538000D03* 45 | X26742000Y-83538000D03* 46 | X31742000Y-85038000D03* 47 | X33242000Y-85038000D03* 48 | X34742000Y-85038000D03* 49 | X30242000Y-85038000D03* 50 | X28742000Y-85038000D03* 51 | X27242000Y-85038000D03* 52 | X25742000Y-85038000D03* 53 | X32242000Y-86538000D03* 54 | X33742000Y-86538000D03* 55 | X35242000Y-86538000D03* 56 | X30742000Y-86538000D03* 57 | X29242000Y-86538000D03* 58 | X27742000Y-86538000D03* 59 | X26242000Y-86538000D03* 60 | D16* 61 | X45206920Y-68453000D03* 62 | D17* 63 | X47746920Y-68453000D03* 64 | X45206920Y-70993000D03* 65 | X47746920Y-70993000D03* 66 | X45206920Y-73533000D03* 67 | X47746920Y-73533000D03* 68 | X45206920Y-76073000D03* 69 | X47746920Y-76073000D03* 70 | X45206920Y-78613000D03* 71 | X47746920Y-78613000D03* 72 | X45206920Y-81153000D03* 73 | X47746920Y-81153000D03* 74 | X45206920Y-83693000D03* 75 | X47746920Y-83693000D03* 76 | X45206920Y-86233000D03* 77 | X47746920Y-86233000D03* 78 | X45206920Y-88773000D03* 79 | X47746920Y-88773000D03* 80 | X45206920Y-91313000D03* 81 | X47746920Y-91313000D03* 82 | D16* 83 | X35191700Y-51432460D03* 84 | D17* 85 | X35191700Y-48892460D03* 86 | X37731700Y-51432460D03* 87 | X37731700Y-48892460D03* 88 | X40271700Y-51432460D03* 89 | X40271700Y-48892460D03* 90 | D18* 91 | X37520560Y-76840080D03* 92 | X40020560Y-76840080D03* 93 | D19* 94 | X35532060Y-74470080D03* 95 | X35532060Y-76670080D03* 96 | X42164000Y-80178000D03* 97 | X42164000Y-77978000D03* 98 | D18* 99 | X38455920Y-78994000D03* 100 | X35955920Y-78994000D03* 101 | D16* 102 | X35191700Y-57782460D03* 103 | D17* 104 | X35191700Y-55242460D03* 105 | X37731700Y-57782460D03* 106 | X37731700Y-55242460D03* 107 | X40271700Y-57782460D03* 108 | X40271700Y-55242460D03* 109 | X42811700Y-57782460D03* 110 | X42811700Y-55242460D03* 111 | X45351700Y-57782460D03* 112 | X45351700Y-55242460D03* 113 | X47891700Y-57782460D03* 114 | X47891700Y-55242460D03* 115 | D20* 116 | X38178920Y-81026000D03* 117 | X35978920Y-81026000D03* 118 | D19* 119 | X40380920Y-81300500D03* 120 | X40380920Y-79100500D03* 121 | D16* 122 | X35191700Y-61592460D03* 123 | D17* 124 | X35191700Y-64132460D03* 125 | X37731700Y-61592460D03* 126 | X37731700Y-64132460D03* 127 | X40271700Y-61592460D03* 128 | X40271700Y-64132460D03* 129 | D12* 130 | X31242000Y-24080000D03* 131 | D13* 132 | X39492000Y-24980000D03* 133 | X22992000Y-24980000D03* 134 | D14* 135 | X39492000Y-31760000D03* 136 | X22992000Y-31760000D03* 137 | D15* 138 | X31242000Y-33810000D03* 139 | X32742000Y-33810000D03* 140 | X34242000Y-33810000D03* 141 | X29742000Y-33810000D03* 142 | X28242000Y-33810000D03* 143 | X26742000Y-33810000D03* 144 | X31742000Y-32310000D03* 145 | X33242000Y-32310000D03* 146 | X34742000Y-32310000D03* 147 | X30242000Y-32310000D03* 148 | X28742000Y-32310000D03* 149 | X27242000Y-32310000D03* 150 | X25742000Y-32310000D03* 151 | X32242000Y-30810000D03* 152 | X33742000Y-30810000D03* 153 | X35242000Y-30810000D03* 154 | X30742000Y-30810000D03* 155 | X29242000Y-30810000D03* 156 | X27742000Y-30810000D03* 157 | X26242000Y-30810000D03* 158 | D21* 159 | G36* 160 | X50190400Y-23625504D02* 161 | X50190400Y-27127200D01* 162 | X41681400Y-27127200D01* 163 | X41681400Y-22606000D01* 164 | X49123477Y-22606000D01* 165 | X50190400Y-23625504D01* 166 | X50190400Y-23625504D01* 167 | G37* 168 | X50190400Y-23625504D02* 169 | X50190400Y-27127200D01* 170 | X41681400Y-27127200D01* 171 | X41681400Y-22606000D01* 172 | X49123477Y-22606000D01* 173 | X50190400Y-23625504D01* 174 | M02* 175 | -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept-MaskTop.gts: -------------------------------------------------------------------------------- 1 | G04 #@! TF.FileFunction,Soldermask,Top* 2 | %FSLAX46Y46*% 3 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 4 | G04 Created by KiCad (PCBNEW 4.0.2+e4-6225~38~ubuntu14.04.1-stable) date Mon Aug 1 15:26:05 2016* 5 | %MOMM*% 6 | G01* 7 | G04 APERTURE LIST* 8 | %ADD10C,0.350000*% 9 | %ADD11C,0.100000*% 10 | %ADD12C,1.400000*% 11 | %ADD13O,1.200000X1.700000*% 12 | %ADD14O,1.200000X2.200000*% 13 | %ADD15C,1.000000*% 14 | %ADD16R,1.727200X1.727200*% 15 | %ADD17O,1.727200X1.727200*% 16 | %ADD18R,1.500000X1.250000*% 17 | %ADD19R,0.900000X1.200000*% 18 | %ADD20R,1.200000X0.900000*% 19 | %ADD21C,0.254000*% 20 | G04 APERTURE END LIST* 21 | D10* 22 | D11* 23 | X50520600Y-22275800D02* 24 | X20574000Y-22275800D01* 25 | X50520600Y-95123000D02* 26 | X50520600Y-22275800D01* 27 | X20574000Y-95123000D02* 28 | X50520600Y-95123000D01* 29 | X20574000Y-22273033D02* 30 | X20574000Y-95123070D01* 31 | D12* 32 | X31242000Y-93268000D03* 33 | D13* 34 | X39492000Y-92368000D03* 35 | X22992000Y-92368000D03* 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| X47746920Y-81153000D03* 74 | X45206920Y-83693000D03* 75 | X47746920Y-83693000D03* 76 | X45206920Y-86233000D03* 77 | X47746920Y-86233000D03* 78 | X45206920Y-88773000D03* 79 | X47746920Y-88773000D03* 80 | X45206920Y-91313000D03* 81 | X47746920Y-91313000D03* 82 | D16* 83 | X35191700Y-51432460D03* 84 | D17* 85 | X35191700Y-48892460D03* 86 | X37731700Y-51432460D03* 87 | X37731700Y-48892460D03* 88 | X40271700Y-51432460D03* 89 | X40271700Y-48892460D03* 90 | D18* 91 | X37520560Y-76840080D03* 92 | X40020560Y-76840080D03* 93 | D19* 94 | X35532060Y-76670080D03* 95 | X35532060Y-74470080D03* 96 | X42164000Y-77978000D03* 97 | X42164000Y-80178000D03* 98 | D18* 99 | X38455920Y-78994000D03* 100 | X35955920Y-78994000D03* 101 | D16* 102 | X35191700Y-57782460D03* 103 | D17* 104 | X35191700Y-55242460D03* 105 | X37731700Y-57782460D03* 106 | X37731700Y-55242460D03* 107 | X40271700Y-57782460D03* 108 | X40271700Y-55242460D03* 109 | X42811700Y-57782460D03* 110 | X42811700Y-55242460D03* 111 | X45351700Y-57782460D03* 112 | X45351700Y-55242460D03* 113 | X47891700Y-57782460D03* 114 | X47891700Y-55242460D03* 115 | D20* 116 | X35978920Y-81026000D03* 117 | X38178920Y-81026000D03* 118 | D19* 119 | X40380920Y-79100500D03* 120 | X40380920Y-81300500D03* 121 | X34493200Y-69105960D03* 122 | X34493200Y-66905960D03* 123 | X37668200Y-69105960D03* 124 | X37668200Y-66905960D03* 125 | X40843200Y-69105960D03* 126 | X40843200Y-66905960D03* 127 | X34493200Y-43918960D03* 128 | X34493200Y-46118960D03* 129 | X37668200Y-43918960D03* 130 | X37668200Y-46118960D03* 131 | D16* 132 | X35191700Y-61592460D03* 133 | D17* 134 | X35191700Y-64132460D03* 135 | X37731700Y-61592460D03* 136 | X37731700Y-64132460D03* 137 | X40271700Y-61592460D03* 138 | X40271700Y-64132460D03* 139 | D12* 140 | X31242000Y-24080000D03* 141 | D13* 142 | X39492000Y-24980000D03* 143 | X22992000Y-24980000D03* 144 | D14* 145 | X39492000Y-31760000D03* 146 | X22992000Y-31760000D03* 147 | D15* 148 | X31242000Y-33810000D03* 149 | X32742000Y-33810000D03* 150 | X34242000Y-33810000D03* 151 | X29742000Y-33810000D03* 152 | X28242000Y-33810000D03* 153 | X26742000Y-33810000D03* 154 | X31742000Y-32310000D03* 155 | X33242000Y-32310000D03* 156 | X34742000Y-32310000D03* 157 | X30242000Y-32310000D03* 158 | X28742000Y-32310000D03* 159 | X27242000Y-32310000D03* 160 | X25742000Y-32310000D03* 161 | X32242000Y-30810000D03* 162 | X33742000Y-30810000D03* 163 | X35242000Y-30810000D03* 164 | X30742000Y-30810000D03* 165 | X29242000Y-30810000D03* 166 | X27742000Y-30810000D03* 167 | X26242000Y-30810000D03* 168 | D19* 169 | X40970200Y-43918960D03* 170 | X40970200Y-46118960D03* 171 | D21* 172 | G36* 173 | X50190400Y-23625504D02* 174 | X50190400Y-27127200D01* 175 | X41681400Y-27127200D01* 176 | X41681400Y-22606000D01* 177 | X49123477Y-22606000D01* 178 | X50190400Y-23625504D01* 179 | X50190400Y-23625504D01* 180 | G37* 181 | X50190400Y-23625504D02* 182 | X50190400Y-27127200D01* 183 | X41681400Y-27127200D01* 184 | X41681400Y-22606000D01* 185 | X49123477Y-22606000D01* 186 | X50190400Y-23625504D01* 187 | M02* 188 | -------------------------------------------------------------------------------- /libraries/timvideos-pcie-8x.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # TIMVIDEOS-PCIE-8X 5 | # 6 | DEF TIMVIDEOS-PCIE-8X U 0 40 Y Y 1 F N 7 | F0 "U" 0 -2850 60 H V C CNN 8 | F1 "TIMVIDEOS-PCIE-8X" -650 -2850 60 H V C CNN 9 | F2 "" -1300 -300 60 H V C CNN 10 | F3 "" -1300 -300 60 H V C CNN 11 | DRAW 12 | T 0 -450 700 60 0 0 0 1x Normal 0 C C 13 | T 0 -450 -700 60 0 0 0 4x Normal 0 C C 14 | T 0 -450 -2600 60 0 0 0 8x Normal 0 C C 15 | T 0 -750 1550 60 0 0 0 Key~Notch Normal 0 C C 16 | T 0 -150 1550 60 0 0 0 Key~Notch Normal 0 C C 17 | S -1100 -2550 200 -2650 0 0 0 N 18 | S -1100 -650 200 -750 0 0 0 N 19 | S -1100 750 200 650 0 0 0 N 20 | S -1100 1600 200 1500 0 0 0 N 21 | S -1100 1650 200 1450 0 0 0 N 22 | S -1100 2800 200 -2800 0 0 0 N 23 | S -500 2800 -400 -2800 0 0 0 N 24 | X 12V A2 400 2600 200 L 50 50 1 1 P X 25 | X 12V A3 400 2500 200 L 50 50 1 1 P X 26 | X 12V B1 -1300 2700 200 R 50 50 1 1 P X 27 | X 12V B2 -1300 2600 200 R 50 50 1 1 P X 28 | X 12V B3 -1300 2500 200 R 50 50 1 1 P X 29 | X 3V3 A10 400 1800 200 L 50 50 1 1 P X 30 | X 3V3 A9 400 1900 200 L 50 50 1 1 P X 31 | X 3V3 B10 -1300 1800 200 R 50 50 1 1 P X 32 | X 3V3 B8 -1300 2000 200 R 50 50 1 1 P X 33 | X DIFF_CLK_A0N A30 400 -500 200 L 50 50 1 1 B C 34 | X DIFF_CLK_A0P A29 400 -400 200 L 50 50 1 1 B C 35 | X DIFF_CLK_A1N A48 400 -2400 200 L 50 50 1 1 B C 36 | X DIFF_CLK_A1P A47 400 -2300 200 L 50 50 1 1 B C 37 | X DIFF_CLK_B0N B28 -1300 -300 200 R 50 50 1 1 B C 38 | X DIFF_CLK_B0P B27 -1300 -200 200 R 50 50 1 1 B C 39 | X DIFF_CLK_B1N B46 -1300 -2200 200 R 50 50 1 1 B C 40 | X DIFF_CLK_B1P B45 -1300 -2100 200 R 50 50 1 1 B C 41 | X DIFF_CLK_XN A14 400 1200 200 L 50 50 1 1 B C 42 | X DIFF_CLK_XP A13 400 1300 200 L 50 50 1 1 B C 43 | X DIFF_IO_A0N A6 400 2200 200 L 50 50 1 1 B 44 | X DIFF_IO_A0P A5 400 2300 200 L 50 50 1 1 B 45 | X DIFF_IO_A1N A17 400 900 200 L 50 50 1 1 B 46 | X DIFF_IO_A1P A16 400 1000 200 L 50 50 1 1 B 47 | X DIFF_IO_A2N A22 400 300 200 L 50 50 1 1 B 48 | X DIFF_IO_A2P A21 400 400 200 L 50 50 1 1 B 49 | X DIFF_IO_A3N A26 400 -100 200 L 50 50 1 1 B 50 | X DIFF_IO_A3P A25 400 0 200 L 50 50 1 1 B 51 | X DIFF_IO_A4N A36 400 -1200 200 L 50 50 1 1 B 52 | X DIFF_IO_A4P A35 400 -1100 200 L 50 50 1 1 B 53 | X DIFF_IO_A5N A40 400 -1600 200 L 50 50 1 1 B 54 | X DIFF_IO_A5P A39 400 -1500 200 L 50 50 1 1 B 55 | X DIFF_IO_A6N A44 400 -2000 200 L 50 50 1 1 B 56 | X DIFF_IO_A6P A43 400 -1900 200 L 50 50 1 1 B 57 | X DIFF_IO_B0N A8 400 2000 200 L 50 50 1 1 B 58 | X DIFF_IO_B0P A7 400 2100 200 L 50 50 1 1 B 59 | X DIFF_IO_B1N B15 -1300 1100 200 R 50 50 1 1 B 60 | X DIFF_IO_B1P B14 -1300 1200 200 R 50 50 1 1 B 61 | X DIFF_IO_B2N B20 -1300 500 200 R 50 50 1 1 B 62 | X DIFF_IO_B2P B19 -1300 600 200 R 50 50 1 1 B 63 | X DIFF_IO_B3N B24 -1300 100 200 R 50 50 1 1 B 64 | X DIFF_IO_B3P B23 -1300 200 200 R 50 50 1 1 B 65 | X DIFF_IO_B4N B34 -1300 -1000 200 R 50 50 1 1 B 66 | X DIFF_IO_B4P B33 -1300 -900 200 R 50 50 1 1 B 67 | X DIFF_IO_B5N B38 -1300 -1400 200 R 50 50 1 1 B 68 | X DIFF_IO_B5P B37 -1300 -1300 200 R 50 50 1 1 B 69 | X DIFF_IO_B6N B42 -1300 -1800 200 R 50 50 1 1 B 70 | X DIFF_IO_B6P B41 -1300 -1700 200 R 50 50 1 1 B 71 | X DIFF_IO_XN B11 -1300 1700 200 R 50 50 1 1 B 72 | X DIFF_IO_XP B9 -1300 1900 200 R 50 50 1 1 B 73 | X DIFF_IO_YN B12 -1300 1400 200 R 50 50 1 1 B 74 | X DIFF_IO_YP A19 400 600 200 L 50 50 1 1 B 75 | X DIFF_IO_ZN B30 -1300 -500 200 R 50 50 1 1 B 76 | X DIFF_IO_ZP A32 400 -800 200 L 50 50 1 1 B 77 | X GND A12 400 1400 200 L 50 50 1 1 P 78 | X GND A15 400 1100 200 L 50 50 1 1 P 79 | X GND A18 400 800 200 L 50 50 1 1 P 80 | X GND A20 400 500 200 L 50 50 1 1 P 81 | X GND A23 400 200 200 L 50 50 1 1 P 82 | X GND A24 400 100 200 L 50 50 1 1 P 83 | X GND A27 400 -200 200 L 50 50 1 1 P 84 | X GND A28 400 -300 200 L 50 50 1 1 P 85 | X GND A31 400 -600 200 L 50 50 1 1 P 86 | X GND A34 400 -1000 200 L 50 50 1 1 P 87 | X GND A37 400 -1300 200 L 50 50 1 1 P 88 | X GND A38 400 -1400 200 L 50 50 1 1 P 89 | X GND A4 400 2400 200 L 50 50 1 1 P 90 | X GND A41 400 -1700 200 L 50 50 1 1 P 91 | X GND A42 400 -1800 200 L 50 50 1 1 P 92 | X GND A45 400 -2100 200 L 50 50 1 1 P 93 | X GND A46 400 -2200 200 L 50 50 1 1 P 94 | X GND A49 400 -2500 200 L 50 50 1 1 P 95 | X GND B13 -1300 1300 200 R 50 50 1 1 P 96 | X GND B16 -1300 1000 200 R 50 50 1 1 P 97 | X GND B18 -1300 800 200 R 50 50 1 1 P 98 | X GND B21 -1300 400 200 R 50 50 1 1 P 99 | X GND B22 -1300 300 200 R 50 50 1 1 P 100 | X GND B25 -1300 0 200 R 50 50 1 1 P 101 | X GND B26 -1300 -100 200 R 50 50 1 1 P 102 | X GND B29 -1300 -400 200 R 50 50 1 1 P 103 | X GND B32 -1300 -800 200 R 50 50 1 1 P 104 | X GND B35 -1300 -1100 200 R 50 50 1 1 P 105 | X GND B36 -1300 -1200 200 R 50 50 1 1 P 106 | X GND B39 -1300 -1500 200 R 50 50 1 1 P 107 | X GND B4 -1300 2400 200 R 50 50 1 1 P 108 | X GND B40 -1300 -1600 200 R 50 50 1 1 P 109 | X GND B43 -1300 -1900 200 R 50 50 1 1 P 110 | X GND B44 -1300 -2000 200 R 50 50 1 1 P 111 | X GND B47 -1300 -2300 200 R 50 50 1 1 P 112 | X GND B49 -1300 -2500 200 R 50 50 1 1 P 113 | X GND B7 -1300 2100 200 R 50 50 1 1 P 114 | X IDCLK B5 -1300 2300 200 R 50 50 1 1 B F 115 | X IDDAT B6 -1300 2200 200 R 50 50 1 1 B 116 | X IO1 A33 400 -900 200 L 50 50 1 1 B 117 | X ~PRSNT1 A1 400 2700 200 L 50 50 1 1 P 118 | X ~PRSNT2 B17 -1300 900 200 R 50 50 1 1 P 119 | X ~PRSNT2 B31 -1300 -600 200 R 50 50 1 1 P 120 | X ~PRSNT2 B48 -1300 -2400 200 R 50 50 1 1 P 121 | X ~RST A11 400 1700 200 L 50 50 1 1 P 122 | ENDDRAW 123 | ENDDEF 124 | # 125 | #End Library 126 | -------------------------------------------------------------------------------- /dp-to-hsmc/boards/Terasic-Cyclone-V-GX-Starter-Kit.csv: -------------------------------------------------------------------------------- 1 | 2 | 3 | Signal Name,Description I/O Standard,Cyclone V GX Pin Number 4 | HSMC_CLKIN0,Dedicated clock input 2.5-V,PIN_N9 5 | HSMC_CLKIN_n1,LVDS RX or CMOS I/O or differential clock input 2.5-V or LVDS,PIN_G14 6 | HSMC_CLKIN_n2,LVDS RX or CMOS I/O or differential clock input 2.5-V or LVDS,PIN_K9 7 | HSMC_CLKIN_p1,LVDS RX or CMOS I/O or differential clock input 2.5-V or LVDS,PIN_G15 8 | HSMC_CLKIN_p2,LVDS RX or CMOS I/O or differential clock input 2.5-V or LVDS,PIN_L8 9 | HSMC_CLKOUT0,Dedicated clock output 2.5-V,PIN_A7 10 | HSMC_CLKOUT_n1,LVDS TX or CMOS I/O or differential clock input/output 2.5-V or LVDS,PIN_A18 11 | HSMC_CLKOUT_n2,LVDS TX or CMOS I/O or differential clock input/output 2.5-V or LVDS,PIN_A16 12 | HSMC_CLKOUT_p1,LVDS TX or CMOS I/O or differential clock input/output 2.5-V or LVDS,PIN_A19 13 | HSMC_CLKOUT_p2,LVDS TX or CMOS I/O or differential clock input/output 2.5-V or LVDS,PIN_A17 14 | HSMC_D0,LVDS TX or CMOS I/O 2.5-V,PIN_D11 15 | HSMC_D1,LVDS RX or CMOS I/O 2.5-V,PIN_H14 16 | HSMC_D2,LVDS TX or CMOS I/O 2.5-V,PIN_D12 17 | HSMC_D3,LVDS RX or CMOS I/O 2.5-V,PIN_H13 18 | I2C_SCL,I2C Bus Clock 2.5-V,PIN_B7 19 | I2C_SDA,I2C Bus Data 2.5-V,PIN_G11 20 | HSMC_GXB_RX_p0,Transceiver RX bit 0 1.5-V PCML,PIN_AD2 21 | HSMC_GXB_RX_p1,Transceiver RX bit 1 1.5-V PCML,PIN_AB2 22 | HSMC_GXB_RX_p2,Transceiver RX bit 2 1.5-V PCML,PIN_Y2 23 | HSMC_GXB_RX_p3,Transceiver RX bit 3 1.5-V PCML,PIN_V2 24 | HSMC_GXB_TX_p0,Transceiver TX bit 0 1.5-V PCML,PIN_AE4 25 | HSMC_GXB_TX_p1,Transceiver TX bit 1 1.5-V PCML,PIN_AC4 26 | HSMC_GXB_TX_p2,Transceiver TX bit 2 1.5-V PCML,PIN_AA4 27 | HSMC_GXB_TX_p3,Transceiver TX bit 3 1.5-V PCML,PIN_W4 28 | HSMC_GXB_RX_n0,Transceiver RX bit 0 1.5-V PCML,PIN_AD1 29 | HSMC_GXB_RX_n1,Transceiver RX bit 1 1.5-V PCML,PIN_AB1 30 | HSMC_GXB_RX_n2,Transceiver RX bit 2 1.5-V PCML,PIN_Y1 31 | HSMC_GXB_RX_n3,Transceiver RX bit 3 1.5-V PCML,PIN_V1 32 | HSMC_GXB_TX_n0,Transceiver TX bit 0 1.5-V PCML,PIN_AE3 33 | HSMC_GXB_TX_n1,Transceiver TX bit 1 1.5-V PCML,PIN_AC3 34 | HSMC_GXB_TX_n2,Transceiver TX bit 2 1.5-V PCML,PIN_AA3 35 | HSMC_GXB_TX_n3,Transceiver TX bit 3 1.5-V PCML,PIN_W3 36 | HSMC_RX_n0,LVDS RX bit 0n or CMOS I/O LVDS or 2.5-V,PIN_M12 37 | HSMC_RX_n1,LVDS RX bit 1n or CMOS I/O LVDS or 2.5-V,PIN_L11 38 | HSMC_RX_n2,LVDS RX bit 2n or CMOS I/O LVDS or 2.5-V,PIN_H17 39 | HSMC_RX_n3,LVDS RX bit 3n or CMOS I/O LVDS or 2.5-V,PIN_K11 40 | HSMC_RX_n4,LVDS RX bit 4n or CMOS I/O LVDS or 2.5-V,PIN_J16 41 | HSMC_RX_n5,LVDS RX bit 5n or CMOS I/O LVDS or 2.5-V,PIN_J11 42 | HSMC_RX_n6,LVDS RX bit 6n or CMOS I/O LVDS or 2.5-V,PIN_G17 43 | HSMC_RX_n7,LVDS RX bit 7n or CMOS I/O LVDS or 2.5-V,PIN_F12 44 | HSMC_RX_n8,LVDS RX bit 8n or CMOS I/O LVDS or 2.5-V,PIN_F18 45 | HSMC_RX_n9,LVDS RX bit 9n or CMOS I/O LVDS or 2.5-V,PIN_E15 46 | HSMC_RX_n10,LVDS RX bit 10n or CMOS I/O LVDS or 2.5-V,PIN_D13 47 | HSMC_RX_n11,LVDS RX bit 11n or CMOS I/O LVDS or 2.5-V,PIN_D15 48 | HSMC_RX_n12,LVDS RX bit 12n or CMOS I/O LVDS or 2.5-V,PIN_D16 49 | HSMC_RX_n13,LVDS RX bit 13n or CMOS I/O LVDS or 2.5-V,PIN_D17 50 | HSMC_RX_n14,LVDS RX bit 14n or CMOS I/O LVDS or 2.5-V,PIN_E19 51 | HSMC_RX_n15,LVDS RX bit 15n or CMOS I/O LVDS or 2.5-V,PIN_D20 52 | HSMC_RX_n16,LVDS RX bit 16n or CMOS I/O LVDS or 2.5-V,PIN_A24 53 | HSMC_RX_p0,LVDS RX bit 0 or CMOS I/O LVDS or 2.5-V,PIN_N12 54 | HSMC_RX_p1,LVDS RX bit 1 or CMOS I/O LVDS or 2.5-V,PIN_M11 55 | HSMC_RX_p2,LVDS RX bit 2 or CMOS I/O LVDS or 2.5-V,PIN_H18 56 | HSMC_RX_p3,LVDS RX bit 3 or CMOS I/O LVDS or 2.5-V,PIN_L12 57 | HSMC_RX_p4,LVDS RX bit 4 or CMOS I/O LVDS or 2.5-V,PIN_H15 58 | HSMC_RX_p5,LVDS RX bit 5 or CMOS I/O LVDS or 2.5-V,PIN_J12 59 | HSMC_RX_p6,LVDS RX bit 6 or CMOS I/O LVDS or 2.5-V,PIN_G16 60 | HSMC_RX_p7,LVDS RX bit 7 or CMOS I/O LVDS or 2.5-V,PIN_G12 61 | HSMC_RX_p8,LVDS RX bit 8 or CMOS I/O LVDS or 2.5-V,PIN_E18 62 | HSMC_RX_p9,LVDS RX bit 9 or CMOS I/O LVDS or 2.5-V,PIN_F16 63 | HSMC_RX_p10,LVDS RX bit 10 or CMOS I/O LVDS or 2.5-V,PIN_E13 64 | HSMC_RX_p11,LVDS RX bit 11 or CMOS I/O LVDS or 2.5-V,PIN_C14 65 | HSMC_RX_p12,LVDS RX bit 12 or CMOS I/O LVDS or 2.5-V,PIN_E16 66 | HSMC_RX_p13,LVDS RX bit 13 or CMOS I/O LVDS or 2.5-V,PIN_D18 67 | HSMC_RX_p14,LVDS RX bit 14 or CMOS I/O LVDS or 2.5-V,PIN_E20 68 | HSMC_RX_p15,LVDS RX bit 15 or CMOS I/O LVDS or 2.5-V,PIN_D21 69 | HSMC_RX_p16,LVDS RX bit 16 or CMOS I/O LVDS or 2.5-V,PIN_B24 70 | HSMC_TX_n0,LVDS TX bit 0n or CMOS I/O LVDS or 2.5-V,PIN_E11 71 | HSMC_TX_n1,LVDS TX bit 1n or CMOS I/O LVDS or 2.5-V,PIN_B9 72 | HSMC_TX_n2,LVDS TX bit 2n or CMOS I/O LVDS or 2.5-V,PIN_C10 73 | HSMC_TX_n3,LVDS TX bit 3n or CMOS I/O LVDS or 2.5-V,PIN_B11 74 | HSMC_TX_n4,LVDS TX bit 4n or CMOS I/O LVDS or 2.5-V,PIN_A11 75 | HSMC_TX_n5,LVDS TX bit 5n or CMOS I/O LVDS or 2.5-V,PIN_B19 76 | HSMC_TX_n6,LVDS TX bit 6n or CMOS I/O LVDS or 2.5-V,PIN_C15 77 | HSMC_TX_n7,LVDS TX bit 7n or CMOS I/O LVDS or 2.5-V,PIN_A21 78 | HSMC_TX_n8,LVDS TX bit 8n or CMOS I/O LVDS or 2.5-V,PIN_C12 79 | HSMC_TX_n9,LVDS TX bit 9n or CMOS I/O LVDS or 2.5-V,PIN_A9 80 | HSMC_TX_n10,LVDS TX bit 10n or CMOS I/O LVDS or 2.5-V,PIN_A13 81 | HSMC_TX_n11,LVDS TX bit 11n or CMOS I/O LVDS or 2.5-V,PIN_C22 82 | HSMC_TX_n12,LVDS TX bit 12n or CMOS I/O LVDS or 2.5-V,PIN_B14 83 | HSMC_TX_n13,LVDS TX bit 13n or CMOS I/O LVDS or 2.5-V,PIN_A22 84 | HSMC_TX_n14,LVDS TX bit 14n or CMOS I/O LVDS or 2.5-V,PIN_B17 85 | HSMC_TX_n15,LVDS TX bit 15n or CMOS I/O LVDS or 2.5-V,PIN_C18 86 | HSMC_TX_n16,LVDS TX bit 16n or CMOS I/O LVDS or 2.5-V,PIN_B20 87 | HSMC_TX_p0,LVDS TX bit 0 or CMOS I/O LVDS or 2.5-V,PIN_E10 88 | HSMC_TX_p1,LVDS TX bit 1 or CMOS I/O LVDS or 2.5-V,PIN_C9 89 | HSMC_TX_p2,LVDS TX bit 2 or CMOS I/O LVDS or 2.5-V,PIN_D10 90 | HSMC_TX_p3,LVDS TX bit 3 or CMOS I/O LVDS or 2.5-V,PIN_A12 91 | HSMC_TX_p4,LVDS TX bit 4 or CMOS I/O LVDS or 2.5-V,PIN_B10 92 | HSMC_TX_p5,LVDS TX bit 5 or CMOS I/O LVDS or 2.5-V,PIN_C20 93 | HSMC_TX_p6,LVDS TX bit 6 or CMOS I/O LVDS or 2.5-V,PIN_B15 94 | HSMC_TX_p7,LVDS TX bit 7 or CMOS I/O LVDS or 2.5-V,PIN_B22 95 | HSMC_TX_p8,LVDS TX bit 8 or CMOS I/O LVDS or 2.5-V,PIN_C13 96 | HSMC_TX_p9,LVDS TX bit 9 or CMOS I/O LVDS or 2.5-V,PIN_A8 97 | HSMC_TX_p10,LVDS TX bit 10 or CMOS I/O LVDS or 2.5-V,PIN_B12 98 | HSMC_TX_p11,LVDS TX bit 11 or CMOS I/O LVDS or 2.5-V,PIN_C23 99 | HSMC_TX_p12,LVDS TX bit 12 or CMOS I/O LVDS or 2.5-V,PIN_A14 100 | HSMC_TX_p13,LVDS TX bit 13 or CMOS I/O LVDS or 2.5-V,PIN_A23 101 | HSMC_TX_p14,LVDS TX bit 14 or CMOS I/O LVDS or 2.5-V,PIN_C17 102 | HSMC_TX_p15,LVDS TX bit 15 or CMOS I/O LVDS or 2.5-V,PIN_C19 103 | HSMC_TX_p16,LVDS TX bit 16 or CMOS I/O LVDS or 2.5-V,PIN_B21 104 | 105 | -------------------------------------------------------------------------------- /dp-aux-intercept/dp-aux-intercept-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # C 5 | # 6 | DEF C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 30 H V C CNN 10 | F3 "" 0 0 60 H V C CNN 11 | $FPLIST 12 | C? 13 | C_????_* 14 | C_???? 15 | SMD*_c 16 | Capacitor* 17 | $ENDFPLIST 18 | DRAW 19 | P 2 0 1 20 -80 -30 80 -30 N 20 | P 2 0 1 20 -80 30 80 30 N 21 | X ~ 1 0 150 110 D 40 40 1 1 P 22 | X ~ 2 0 -150 110 U 40 40 1 1 P 23 | ENDDRAW 24 | ENDDEF 25 | # 26 | # CONN_02X03 27 | # 28 | DEF CONN_02X03 P 0 1 Y N 1 F N 29 | F0 "P" 0 200 50 H V C CNN 30 | F1 "CONN_02X03" 0 -200 50 H V C CNN 31 | F2 "" 0 -1200 60 H V C CNN 32 | F3 "" 0 -1200 60 H V C CNN 33 | $FPLIST 34 | Pin_Header_Straight_2X03 35 | Pin_Header_Angled_2X03 36 | Socket_Strip_Straight_2X03 37 | Socket_Strip_Angled_2X03 38 | $ENDFPLIST 39 | DRAW 40 | S -100 -95 -50 -105 0 1 0 N 41 | S -100 5 -50 -5 0 1 0 N 42 | S -100 105 -50 95 0 1 0 N 43 | S -100 150 100 -150 0 1 0 N 44 | S 50 -95 100 -105 0 1 0 N 45 | S 50 5 100 -5 0 1 0 N 46 | S 50 105 100 95 0 1 0 N 47 | X P1 1 -250 100 150 R 50 50 1 1 P 48 | X P2 2 250 100 150 L 50 50 1 1 P 49 | X P3 3 -250 0 150 R 50 50 1 1 P 50 | X P4 4 250 0 150 L 50 50 1 1 P 51 | X P5 5 -250 -100 150 R 50 50 1 1 P 52 | X P6 6 250 -100 150 L 50 50 1 1 P 53 | ENDDRAW 54 | ENDDEF 55 | # 56 | # CONN_02X06 57 | # 58 | DEF CONN_02X06 P 0 1 Y N 1 F N 59 | F0 "P" 0 350 50 H V C CNN 60 | F1 "CONN_02X06" 0 -350 50 H V C CNN 61 | F2 "" 0 -1200 60 H V C CNN 62 | F3 "" 0 -1200 60 H V C CNN 63 | $FPLIST 64 | Pin_Header_Straight_2X06 65 | Pin_Header_Angled_2X06 66 | Socket_Strip_Straight_2X06 67 | Socket_Strip_Angled_2X06 68 | $ENDFPLIST 69 | DRAW 70 | S -100 -245 -50 -255 0 1 0 N 71 | S -100 -145 -50 -155 0 1 0 N 72 | S -100 -45 -50 -55 0 1 0 N 73 | S -100 55 -50 45 0 1 0 N 74 | S -100 155 -50 145 0 1 0 N 75 | S -100 255 -50 245 0 1 0 N 76 | S -100 300 100 -300 0 1 0 N 77 | S 50 -245 100 -255 0 1 0 N 78 | S 50 -145 100 -155 0 1 0 N 79 | S 50 -45 100 -55 0 1 0 N 80 | S 50 55 100 45 0 1 0 N 81 | S 50 155 100 145 0 1 0 N 82 | S 50 255 100 245 0 1 0 N 83 | X P1 1 -250 250 150 R 50 50 1 1 P 84 | X P2 2 250 250 150 L 50 50 1 1 P 85 | X P3 3 -250 150 150 R 50 50 1 1 P 86 | X P4 4 250 150 150 L 50 50 1 1 P 87 | X P5 5 -250 50 150 R 50 50 1 1 P 88 | X P6 6 250 50 150 L 50 50 1 1 P 89 | X P7 7 -250 -50 150 R 50 50 1 1 P 90 | X P8 8 250 -50 150 L 50 50 1 1 P 91 | X P9 9 -250 -150 150 R 50 50 1 1 P 92 | X P10 10 250 -150 150 L 50 50 1 1 P 93 | X P11 11 -250 -250 150 R 50 50 1 1 P 94 | X P12 12 250 -250 150 L 50 50 1 1 P 95 | ENDDRAW 96 | ENDDEF 97 | # 98 | # CONN_02X10 99 | # 100 | DEF CONN_02X10 P 0 1 Y N 1 F N 101 | F0 "P" 0 550 50 H V C CNN 102 | F1 "CONN_02X10" 0 0 50 V V C CNN 103 | F2 "" 0 -1200 60 H V C CNN 104 | F3 "" 0 -1200 60 H V C CNN 105 | $FPLIST 106 | Pin_Header_Straight_2X10 107 | Pin_Header_Angled_2X10 108 | Socket_Strip_Straight_2X10 109 | Socket_Strip_Angled_2X10 110 | $ENDFPLIST 111 | DRAW 112 | S -100 -445 -50 -455 0 1 0 N 113 | S -100 -345 -50 -355 0 1 0 N 114 | S -100 -245 -50 -255 0 1 0 N 115 | S -100 -145 -50 -155 0 1 0 N 116 | S -100 -45 -50 -55 0 1 0 N 117 | S -100 55 -50 45 0 1 0 N 118 | S -100 155 -50 145 0 1 0 N 119 | S -100 255 -50 245 0 1 0 N 120 | S -100 355 -50 345 0 1 0 N 121 | S -100 455 -50 445 0 1 0 N 122 | S -100 500 100 -500 0 1 0 N 123 | S 50 -445 100 -455 0 1 0 N 124 | S 50 -345 100 -355 0 1 0 N 125 | S 50 -245 100 -255 0 1 0 N 126 | S 50 -145 100 -155 0 1 0 N 127 | S 50 -45 100 -55 0 1 0 N 128 | S 50 55 100 45 0 1 0 N 129 | S 50 155 100 145 0 1 0 N 130 | S 50 255 100 245 0 1 0 N 131 | S 50 355 100 345 0 1 0 N 132 | S 50 455 100 445 0 1 0 N 133 | X P1 1 -250 450 150 R 50 50 1 1 P 134 | X P2 2 250 450 150 L 50 50 1 1 P 135 | X P3 3 -250 350 150 R 50 50 1 1 P 136 | X P4 4 250 350 150 L 50 50 1 1 P 137 | X P5 5 -250 250 150 R 50 50 1 1 P 138 | X P6 6 250 250 150 L 50 50 1 1 P 139 | X P7 7 -250 150 150 R 50 50 1 1 P 140 | X P8 8 250 150 150 L 50 50 1 1 P 141 | X P9 9 -250 50 150 R 50 50 1 1 P 142 | X P10 10 250 50 150 L 50 50 1 1 P 143 | X P20 20 250 -450 150 L 50 50 1 1 P 144 | X P11 11 -250 -50 150 R 50 50 1 1 P 145 | X P12 12 250 -50 150 L 50 50 1 1 P 146 | X P13 13 -250 -150 150 R 50 50 1 1 P 147 | X P14 14 250 -150 150 L 50 50 1 1 P 148 | X P15 15 -250 -250 150 R 50 50 1 1 P 149 | X P16 16 250 -250 150 L 50 50 1 1 P 150 | X P17 17 -250 -350 150 R 50 50 1 1 P 151 | X P18 18 250 -350 150 L 50 50 1 1 P 152 | X P19 19 -250 -450 150 R 50 50 1 1 P 153 | ENDDRAW 154 | ENDDEF 155 | # 156 | # DISPLAY_PORT 157 | # 158 | DEF DISPLAY_PORT J 0 40 Y Y 1 F N 159 | F0 "J" -600 1100 60 H V C CNN 160 | F1 "DISPLAY_PORT" 150 0 60 V V C CNN 161 | F2 "" -50 0 60 H V C CNN 162 | F3 "" -50 0 60 H V C CNN 163 | DRAW 164 | S -650 1050 250 -1150 0 1 0 N 165 | S 50 450 200 -550 0 1 0 N 166 | P 7 0 1 0 250 550 250 -650 50 -650 -50 -550 -50 450 50 550 250 550 N 167 | X ML_LaneP0 1 -850 900 197 R 50 50 1 1 B 168 | X GND 2 -850 800 197 R 50 50 1 1 W 169 | X ML_LaneN0 3 -850 700 197 R 50 50 1 1 B 170 | X ML_LaneP1 4 -850 600 197 R 50 50 1 1 B 171 | X GND 5 -850 500 197 R 50 50 1 1 W 172 | X ML_LaneN1 6 -850 400 197 R 50 50 1 1 B 173 | X ML_LaneP2 7 -850 300 197 R 50 50 1 1 B 174 | X GND 8 -850 200 197 R 50 50 1 1 W 175 | X ML_LaneN2 9 -850 100 197 R 50 50 1 1 B 176 | X ML_LaneP3 10 -850 0 197 R 50 50 1 1 B 177 | X DP_PWR 20 -850 -1000 197 R 50 50 1 1 B 178 | X GND 11 -850 -100 197 R 50 50 1 1 B 179 | X ML_LaneN3 12 -850 -200 197 R 50 50 1 1 B 180 | X CONFIG1 13 -850 -300 197 R 50 50 1 1 B 181 | X CONFIG2 14 -850 -400 197 R 50 50 1 1 P 182 | X AUXCH_P 15 -850 -500 197 R 50 50 1 1 B 183 | X GND 16 -850 -600 197 R 50 50 1 1 B 184 | X AUXCH_N 17 -850 -700 197 R 50 50 1 1 B 185 | X HPD 18 -850 -800 197 R 50 50 1 1 I 186 | X RETURN 19 -850 -900 197 R 50 50 1 1 B 187 | ENDDRAW 188 | ENDDEF 189 | # 190 | # GND 191 | # 192 | DEF GND #PWR 0 0 Y Y 1 F P 193 | F0 "#PWR" 0 -250 50 H I C CNN 194 | F1 "GND" 0 -150 50 H V C CNN 195 | F2 "" 0 0 60 H V C CNN 196 | F3 "" 0 0 60 H V C CNN 197 | DRAW 198 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 199 | X GND 1 0 0 0 D 50 50 1 1 W N 200 | ENDDRAW 201 | ENDDEF 202 | # 203 | # R 204 | # 205 | DEF R R 0 0 N Y 1 F N 206 | F0 "R" 80 0 50 V V C CNN 207 | F1 "R" 0 0 50 V V C CNN 208 | F2 "" -70 0 30 V V C CNN 209 | F3 "" 0 0 30 H V C CNN 210 | $FPLIST 211 | R_* 212 | Resistor_* 213 | $ENDFPLIST 214 | DRAW 215 | S -40 -100 40 100 0 1 10 N 216 | X ~ 1 0 150 50 D 60 60 1 1 P 217 | X ~ 2 0 -150 50 U 60 60 1 1 P 218 | ENDDRAW 219 | ENDDEF 220 | # 221 | # VDD 222 | # 223 | DEF VDD #PWR 0 0 Y Y 1 F P 224 | F0 "#PWR" 0 -150 50 H I C CNN 225 | F1 "VDD" 0 150 50 H V C CNN 226 | F2 "" 0 0 60 H V C CNN 227 | F3 "" 0 0 60 H V C CNN 228 | DRAW 229 | C 0 75 25 0 1 0 N 230 | P 2 0 1 0 0 0 0 50 N 231 | X VDD 1 0 0 0 U 50 50 1 1 W N 232 | ENDDRAW 233 | ENDDEF 234 | # 235 | #End Library 236 | -------------------------------------------------------------------------------- /dp-to-pcie/boards-kc705.csv: -------------------------------------------------------------------------------- 1 | Transceiver Bank,Associated Net Name,Connections,,, 2 | MGT_BANK_115,GTXE2_CHANNEL_X0Y0,PCIe7,,, 3 | MGT_BANK_115,GTXE2_CHANNEL_X0Y1,PCIe6,,, 4 | MGT_BANK_115,GTXE2_CHANNEL_X0Y2,PCIe5,,, 5 | MGT_BANK_115,GTXE2_CHANNEL_X0Y3,PCIe4,,, 6 | MGT_BANK_115,MGTREFCLK0,N/C,,, 7 | MGT_BANK_115,MGTREFCLK1,PCIe_CLK,,, 8 | MGT_BANK_116,GTXE2_CHANNEL_X0Y4,PCIe3,,, 9 | MGT_BANK_116,GTXE2_CHANNEL_X0Y5,PCIe2,,, 10 | MGT_BANK_116,GTXE2_CHANNEL_X0Y6,PCIe1,,, 11 | MGT_BANK_116,GTXE2_CHANNEL_X0Y7,PCIe0,,, 12 | MGT_BANK_116,MGTREFCLK0,Si5326,,, 13 | MGT_BANK_116,MGTREFCLK1,FMC LPC GBT_CLK0,,, 14 | MGT_BANK_117,GTXE2_CHANNEL_X0Y8,SMA,,, 15 | MGT_BANK_117,GTXE2_CHANNEL_X0Y9,SGMII,,, 16 | MGT_BANK_117,GTXE2_CHANNEL_X0Y10,SFP+,,, 17 | MGT_BANK_117,GTXE2_CHANNEL_X0Y11,FMC LPC DP0,,, 18 | MGT_BANK_117,MGTREFCLK0,SGMII_CLK,,, 19 | MGT_BANK_117,MGTREFCLK1,SMA_CLK,,, 20 | MGT_BANK_118,GTXE2_CHANNEL_X0Y12,FMC HPC DP0,,, 21 | MGT_BANK_118,GTXE2_CHANNEL_X0Y13,FMC HPC DP1,,, 22 | MGT_BANK_118,GTXE2_CHANNEL_X0Y14,FMC HPC DP2,,, 23 | MGT_BANK_118,GTXE2_CHANNEL_X0Y15,FMC HPC DP3,,, 24 | MGT_BANK_118,MGTREFCLK0,FMC HPC GBT_CLK0,,, 25 | MGT_BANK_118,MGTREFCLK1,FMC HPC GBT_CLK1,,, 26 | ,,,,, 27 | ,,,,, 28 | PCIe Edge Connector Connections,,,,, 29 | Schematic Net Name,FPGA Pin (U1),PCIe Edge Connector Pin,PCIe Edge Pin Name,Function,FFG900 Placement 30 | PCIE_RX0_P,M6,B14,PETp0,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y7 31 | PCIE_RX0_N,M5,B15,PETn0,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y7 32 | PCIE_RX1_P,P6,B19,PETp1,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y6 33 | PCIE_RX1_N,P5,B20,PETn1,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y6 34 | PCIE_RX2_P,R4,B23,PETp2,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y5 35 | PCIE_RX2_N,R3,B24,PETn2,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y5 36 | PCIE_RX3_P,T6,B27,PETp3,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y4 37 | PCIE_RX3_N,T5,B28,PETn3,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y4 38 | PCIE_RX4_P,V6,B33,PETp4,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y3 39 | PCIE_RX4_N,V5,B34,PETn4,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y3 40 | PCIE_RX5_P,W4,B37,PETp5,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y2 41 | PCIE_RX5_N,W3,B38,PETn5,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y2 42 | PCIE_RX6_P,Y6,B41,PETp6,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y1 43 | PCIE_RX6_N,Y5,B42,PETn6,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y1 44 | PCIE_RX7_P,AA4,B45,PETp7,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y0 45 | PCIE_RX7_N,AA3,B46,PETn7,Integrated Endpoint block receive pair,GTXE2_CHANNEL_X0Y0 46 | PCIE_TX0_P,L4,A16,PERp0,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y7 47 | PCIE_TX0_N,L3,A17,PERn0,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y7 48 | PCIE_TX1_P,M2,A21,PERp1,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y6 49 | PCIE_TX1_N,M1,A22,PERn1,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y6 50 | PCIE_TX2_P,N4,A25,PERp2,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y5 51 | PCIE_TX2_N,N3,A26,PERn2,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y5 52 | PCIE_TX3_P,P2,A29,PERp3,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y4 53 | PCIE_TX3_N,P1,A30,PERn3,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y4 54 | PCIE_TX4_P,T2,A35,PERp4,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y3 55 | PCIE_TX4_N,T1,A36,PERn4,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y3 56 | PCIE_TX5_P,U4,A39,PERp5,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y2 57 | PCIE_TX5_N,U3,A40,PERn5,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y2 58 | PCIE_TX6_P,V2,A43,PERp6,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y1 59 | PCIE_TX6_N,V1,A44,PERn6,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y1 60 | PCIE_TX7_P,Y2,A47,PERp7,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y0 61 | PCIE_TX7_N,Y1,A48,PERn7,Integrated Endpoint block transmit pair,GTXE2_CHANNEL_X0Y0 62 | PCIE_CLK_QO_P,U8,A13,REFCLK+,Integrated Endpoint block differential clock pair from PCIe MGT_BANK_115,MGT_BANK_115 63 | PCIE_CLK_QO_N,U7,A14,REFCLK-,Integrated Endpoint block differential clock pair from PCIe MGT_BANK_115,MGT_BANK_115 64 | PCIE_PRSNT_B,J32 2/4/6,A1,PRSNT#1,J42 Lane Size Select jumper,N/A 65 | PCIE_WAKE_B,F23,B11,WAKE#,"Integrated Endpoint block wake signal,not connected on KC705 board",N/A 66 | PCIE_PERST_B,G25,A11,PERST,Integrated Endpoint block reset signal,N/A 67 | ,,,,, 68 | GTX Quad 115 PCIe Edge Connector Connections,,,,, 69 | Quad 115 Pin Name,FPGA Pin (U1), Schematic Net Name, PCIe Edge Connector Pin,PCIe Edge Pin Name,FFG900 Placement 70 | MGTXTXP0_115_Y2,Y2,PCIE_TX7_P,A47,PERp7,GTXE2_CHANNEL_X0Y0 71 | MGTXTXN0_115_Y1,Y1,PCIE_TX7_N,A48,PERn7,GTXE2_CHANNEL_X0Y0 72 | MGTXRXP0_115_AA4,AA4,PCIE_RX7_P,B45,PETp7,GTXE2_CHANNEL_X0Y0 73 | MGTXRXN0_115_AA3,AA3,PCIE_RX7_N,B46,PETn7,GTXE2_CHANNEL_X0Y0 74 | MGTXTXP1_115_V2,V2,PCIE_TX6_P,A43,PERp6,GTXE2_CHANNEL_X0Y1 75 | MGTXTXN1_115_V1,V1,PCIE_TX6_N,A44,PERn6,GTXE2_CHANNEL_X0Y1 76 | MGTXRXP1_115_Y6,Y6,PCIE_RX6_P,B41,PETp6,GTXE2_CHANNEL_X0Y1 77 | MGTXRXN1_115_Y5,Y5,PCIE_RX6_N,B42,PETn6,GTXE2_CHANNEL_X0Y1 78 | MGTXTXP2_115_U4,U4,PCIE_TX5_P,A39,PERp5,GTXE2_CHANNEL_X0Y2 79 | MGTXTXN2_115_U3,U3,PCIE_TX5_N,A40,PERn5,GTXE2_CHANNEL_X0Y2 80 | MGTXRXP2_115_W4,W4,PCIE_RX5_P,B37,PETp5,GTXE2_CHANNEL_X0Y2 81 | MGTXRXN2_115_W3,W3,PCIE_RX5_N,B38,PETn5,GTXE2_CHANNEL_X0Y2 82 | MGTXTXP3_115_T2,T2,PCIE_TX4_P,A35,PERp4,GTXE2_CHANNEL_X0Y3 83 | MGTXTXN3_115_T1,T1,PCIE_TX4_N,A36,PERn4,GTXE2_CHANNEL_X0Y3 84 | MGTXRXP3_115_V6,V6,PCIE_RX4_P,B33,PETp4,GTXE2_CHANNEL_X0Y3 85 | MGTXRXN3_115_V5,V5,PCIE_RX4_N,B34,PETn4,GTXE2_CHANNEL_X0Y3 86 | MGTREFCLK0P_115_R8,R8,NC,NC,,MGT_BANK_115 87 | MGTREFCLK0N_115_R7,R7,NC,NC,,MGT_BANK_115 88 | MGTREFCLK1P_115_U8,U8,PCIE_CLK_QO_P,A13,REFCLK+,MGT_BANK_115 89 | MGTREFCLK1N_115_U7,U7,PCIE_CLK_QO_N,A14,REFCLK-,MGT_BANK_115 90 | MGTAVTTRCAL_115_W7,W7,NC,NC,MGTAVTT,MGT_BANK_115 91 | MGTRREF_115_W8,W8,NC,NC,100 ohm P/U to MGTAVTT,MGT_BANK_115 92 | MGTXTXP0_116_P2,P2,PCIE_TX3_P,A29,PERp3,GTXE2_CHANNEL_X0Y4 93 | MGTXTXN0_116_P1,P1,PCIE_TX3_N,A30,PERn3,GTXE2_CHANNEL_X0Y4 94 | MGTXRXP0_116_T6,T6,PCIE_RX3_P,B27,PETp3,GTXE2_CHANNEL_X0Y4 95 | MGTXRXN0_116_T5,T5,PCIE_RX3_N,B28,PETn3,GTXE2_CHANNEL_X0Y4 96 | MGTXTXP1_116_N4,N4,PCIE_TX2_P,A25,PERp2,GTXE2_CHANNEL_X0Y5 97 | MGTXTXN1_116_N3,N3,PCIE_TX2_N,A26,PERn2,GTXE2_CHANNEL_X0Y5 98 | MGTXRXP1_116_R4,R4,PCIE_RX2_P,B23,PETp2,GTXE2_CHANNEL_X0Y5 99 | MGTXRXN1_116_R3,R3,PCIE_RX2_N,B24,PETn2,GTXE2_CHANNEL_X0Y5 100 | MGTXTXP2_116_M2,M2,PCIE_TX1_P,A21,PERp1,GTXE2_CHANNEL_X0Y6 101 | MGTXTXN2_116_M1,M1,PCIE_TX1_N,A22,PERn1,GTXE2_CHANNEL_X0Y6 102 | MGTXRXP2_116_P6,P6,PCIE_RX1_P,B19,PETp1,GTXE2_CHANNEL_X0Y6 103 | MGTXRXN2_116_P5,P5,PCIE_RX1_N,B20,PETn1,GTXE2_CHANNEL_X0Y6 104 | MGTXTXP3_116_L4,L4,PCIE_TX0_P,A16,PERp0,GTXE2_CHANNEL_X0Y7 105 | MGTXTXN3_116_L3,L3,PCIE_TX0_N,A17,PERn0,GTXE2_CHANNEL_X0Y7 106 | MGTXRXP3_116_M6,M6,PCIE_RX0_P,B14,PETp0,GTXE2_CHANNEL_X0Y7 107 | MGTXRXN3_116_M5,M5,PCIE_RX0_N,B15,PETn0,GTXE2_CHANNEL_X0Y7 108 | MGTREFCLK0P_116_L8,L8,NC,NC,SI5326_OUT_C_P,MGT_BANK_116 109 | MGTREFCLK0N_116_L7,L7,NC,NC,SI5326_OUT_C_N,MGT_BANK_116 110 | MGTREFCLK1P_116_N8,N8,NC,NC,FMC_LPC_GBTCLK0_M2C_C_P,MGT_BANK_116 111 | MGTREFCLK1N_116_N7,N7,NC,NC,FMC_LPC_GBTCLK0_M2C_C_N,MGT_BANK_116 112 | -------------------------------------------------------------------------------- /dp-to-hsmc/boards/Terasic-Cyclone-SoCKit.csv: -------------------------------------------------------------------------------- 1 | Signal Name,FPGA Pin No.,Description,I/O Standard 2 | HSMC_CLK_IN0,PIN_J14,Dedicated clock input,Depend on JP2 3 | HSMC_CLKIN_n1,PIN_AB27,LVDS RX or CMOS I/O or differential clock input,Depend on JP2 4 | HSMC_CLKIN_n2,PIN_G15,LVDS RX or CMOS I/O or differential clock input,Depend on JP2 5 | HSMC_CLKIN_p1,PIN_AA26,LVDS RX or CMOS I/O or differential clock input,Depend on JP2 6 | HSMC_CLKIN_p2,PIN_H15,LVDS RX or CMOS I/O or differential clock input,Depend on JP2 7 | HSMC_CLK_OUT0,PIN_AD29,Dedicated clock output,Depend on JP2 8 | HSMC_CLKOUT_n1,PIN_E6,LVDS TX or CMOS I/O or differential clock input/output,Depend on JP2 9 | HSMC_CLKOUT_n2,PIN_A10,LVDS TX or CMOS I/O or differential clock input/output,Depend on JP2 10 | HSMC_CLKOUT_p1,PIN_E7,LVDS TX or CMOS I/O or differential clock input/output,Depend on JP2 11 | HSMC_CLKOUT_p2,PIN_A11,LVDS TX or CMOS I/O or differential clock input/output,Depend on JP2 12 | HSMC_D[0],PIN_C10,LVDS TX or CMOS I/O,Depend on JP2 13 | HSMC_D[1],PIN_H13,LVDS RX or CMOS I/O,Depend on JP2 14 | HSMC_D[2],PIN_C9,LVDS TX or CMOS I/O,Depend on JP2 15 | HSMC_D[3],PIN_H12,LVDS RX or CMOS I/O,Depend on JP2 16 | HSMC_SCL,PIN_AA28,Management serial data,Depend on JP2 17 | HSMC_SDA,PIN_AE29,Management serial clock,Depend on JP2 18 | HSMC_GXB_RX_p[0],PIN_AE2,Transceiver RX bit 0,1.5-V PCML 19 | HSMC_GXB_RX_p[1],PIN_AC2,Transceiver RX bit 1,1.5-V PCML 20 | HSMC_GXB_RX_p[2],PIN_AA2,Transceiver RX bit 2,1.5-V PCML 21 | HSMC_GXB_RX_p[3],PIN_W2,Transceiver RX bit 3,1.5-V PCML 22 | HSMC_GXB_RX_p[4],PIN_U2,Transceiver RX bit 4,1.5-V PCML 23 | HSMC_GXB_RX_p[5],PIN_R2,Transceiver RX bit 5,1.5-V PCML 24 | HSMC_GXB_RX_p[6],PIN_N2,Transceiver RX bit 6,1.5-V PCML 25 | HSMC_GXB_RX_p[7],PIN_J2,Transceiver RX bit 7,1.5-V PCML 26 | HSMC_GXB_TX_p[0],PIN_AD4,Transceiver TX bit 0,1.5-V PCML 27 | HSMC_GXB_TX_p[1],PIN_AB4,Transceiver TX bit 1,1.5-V PCML 28 | HSMC_GXB_TX_p[2],PIN_Y4,Transceiver TX bit 2,1.5-V PCML 29 | HSMC_GXB_TX_p[3],PIN_V4,Transceiver TX bit 3,1.5-V PCML 30 | HSMC_GXB_TX_p[4],PIN_T4,Transceiver TX bit 4,1.5-V PCML 31 | HSMC_GXB_TX_p[5],PIN_P4,Transceiver TX bit 5,1.5-V PCML 32 | HSMC_GXB_TX_p[6],PIN_M4,Transceiver TX bit 6,1.5-V PCML 33 | HSMC_GXB_TX_p[7],PIN_H4,Transceiver TX bit 7,1.5-V PCML 34 | HSMC_GXB_RX_n[0],PIN_AE1,Transceiver RX bit 0n,1.5-V PCML 35 | HSMC_GXB_RX_n[1],PIN_AC1,Transceiver RX bit 1n,1.5-V PCML 36 | HSMC_GXB_RX_n[2],PIN_AA1,Transceiver RX bit 2n,1.5-V PCML 37 | HSMC_GXB_RX_n[3],PIN_W1,Transceiver RX bit 3n,1.5-V PCML 38 | HSMC_GXB_RX_n[4],PIN_U1,Transceiver RX bit 4n,1.5-V PCML 39 | HSMC_GXB_RX_n[5],PIN_R1,Transceiver RX bit 5n,1.5-V PCML 40 | HSMC_GXB_RX_n[6],PIN_N1,Transceiver RX bit 6n,1.5-V PCML 41 | HSMC_GXB_RX_n[7],PIN_J1,Transceiver RX bit 7n,1.5-V PCML 42 | HSMC_GXB_TX_n[0],PIN_AD3,Transceiver TX bit 0n,1.5-V PCML 43 | HSMC_GXB_TX_n[1],PIN_AB3,Transceiver TX bit 1n,1.5-V PCML 44 | HSMC_GXB_TX_n[2],PIN_Y3,Transceiver TX bit 2n,1.5-V PCML 45 | HSMC_GXB_TX_n[3],PIN_V3,Transceiver TX bit 3n,1.5-V PCML 46 | HSMC_GXB_TX_n[4],PIN_T3,Transceiver TX bit 4n,1.5-V PCML 47 | HSMC_GXB_TX_n[5],PIN_P3,Transceiver TX bit 5n,1.5-V PCML 48 | HSMC_GXB_TX_n[6],PIN_M3,Transceiver TX bit 6n,1.5-V PCML 49 | HSMC_GXB_TX_n[7],PIN_H3,Transceiver TX bit 7n,1.5-V PCML 50 | HSMC_RX_n[0],PIN_G11,LVDS RX bit 0n or CMOS I/O,Depend on JP2 51 | HSMC_RX_n[1],PIN_J12,LVDS RX bit 1n or CMOS I/O,Depend on JP2 52 | HSMC_RX_n[2],PIN_F10,LVDS RX bit 2n or CMOS I/O,Depend on JP2 53 | HSMC_RX_n[3],PIN_J9,LVDS RX bit 3n or CMOS I/O,Depend on JP2 54 | HSMC_RX_n[4],PIN_K8,LVDS RX bit 4n or CMOS I/O,Depend on JP2 55 | HSMC_RX_n[5],PIN_H7,LVDS RX bit 5n or CMOS I/O,Depend on JP2 56 | HSMC_RX_n[6],PIN_G8,LVDS RX bit 6n or CMOS I/O,Depend on JP2 57 | HSMC_RX_n[7],PIN_F8,LVDS RX bit 7n or CMOS I/O,Depend on JP2 58 | HSMC_RX_n[8],PIN_E11,LVDS RX bit 8n or CMOS I/O,Depend on JP2 59 | HSMC_RX_n[9],PIN_B5,LVDS RX bit 9n or CMOS I/O,Depend on JP2 60 | HSMC_RX_n[10],PIN_D9,LVDS RX bit 10n or CMOS I/O,Depend on JP2 61 | HSMC_RX_n[11],PIN_D12,LVDS RX bit 11n or CMOS I/O,Depend on JP2 62 | HSMC_RX_n[12],PIN_D10,LVDS RX bit 12n or CMOS I/O,Depend on JP2 63 | HSMC_RX_n[13],PIN_B12,LVDS RX bit 13n or CMOS I/O,Depend on JP2 64 | HSMC_RX_n[14],PIN_E13,LVDS RX bit 14n or CMOS I/O,Depend on JP2 65 | HSMC_RX_n[15],PIN_G13,LVDS RX bit 15n or CMOS I/O,Depend on JP2 66 | HSMC_RX_n[16],PIN_F14,LVDS RX bit 16n or CMOS I/O,Depend on JP2 67 | HSMC_RX_p[0],PIN_G12,LVDS RX bit 0 or CMOS I/O,Depend on JP2 68 | HSMC_RX_p[1],PIN_K12,LVDS RX bit 1 or CMOS I/O,Depend on JP2 69 | HSMC_RX_p[2],PIN_G10,LVDS RX bit 2 or CMOS I/O,Depend on JP2 70 | HSMC_RX_p[3],PIN_J10,LVDS RX bit 3 or CMOS I/O,Depend on JP2 71 | HSMC_RX_p[4],PIN_K7,LVDS RX bit 4 or CMOS I/O,Depend on JP2 72 | HSMC_RX_p[5],PIN_J7,LVDS RX bit 5 or CMOS I/O,Depend on JP2 73 | HSMC_RX_p[6],PIN_H8,LVDS RX bit 6 or CMOS I/O,Depend on JP2 74 | HSMC_RX_p[7],PIN_F9,LVDS RX bit 7 or CMOS I/O,Depend on JP2 75 | HSMC_RX_p[8],PIN_F11,LVDS RX bit 8 or CMOS I/O,Depend on JP2 76 | HSMC_RX_p[9],PIN_B6,LVDS RX bit 9 or CMOS I/O,Depend on JP2 77 | HSMC_RX_p[10],PIN_E9,LVDS RX bit 10 or CMOS I/O,Depend on JP2 78 | HSMC_RX_p[11],PIN_E12,LVDS RX bit 11 or CMOS I/O,Depend on JP2 79 | HSMC_RX_p[12],PIN_D11,LVDS RX bit 12 or CMOS I/O,Depend on JP2 80 | HSMC_RX_p[13],PIN_C13,LVDS RX bit 13 or CMOS I/O,Depend on JP2 81 | HSMC_RX_p[14],PIN_F13,LVDS RX bit 14 or CMOS I/O,Depend on JP2 82 | HSMC_RX_p[15],PIN_H14,LVDS RX bit 15 or CMOS I/O,Depend on JP2 83 | HSMC_RX_p[16],PIN_F15,LVDS RX bit 16 or CMOS I/O,Depend on JP2 84 | HSMC_TX_n[0],PIN_A8,LVDS TX bit 0n or CMOS I/O,Depend on JP2 85 | HSMC_TX_n[1],PIN_D7,LVDS TX bit 1n or CMOS I/O,Depend on JP2 86 | HSMC_TX_n[2],PIN_F6,LVDS TX bit 2n or CMOS I/O,Depend on JP2 87 | HSMC_TX_n[3],PIN_C5,LVDS TX bit 3n or CMOS I/O,Depend on JP2 88 | HSMC_TX_n[4],PIN_C4,LVDS TX bit 4n or CMOS I/O,Depend on JP2 89 | HSMC_TX_n[5],PIN_E2,LVDS TX bit 5n or CMOS I/O,Depend on JP2 90 | HSMC_TX_n[6],PIN_D4,LVDS TX bit 6n or CMOS I/O,Depend on JP2 91 | HSMC_TX_n[7],PIN_B3,LVDS TX bit 7n or CMOS I/O,Depend on JP2 92 | HSMC_TX_n[8],PIN_D1,LVDS TX bit 8n or CMOS I/O,Depend on JP2 93 | HSMC_TX_n[9],PIN_C2,LVDS TX bit 9n or CMOS I/O,Depend on JP2 94 | HSMC_TX_n[10],PIN_B1,LVDS TX bit 10n or CMOS I/O,Depend on JP2 95 | HSMC_TX_n[11],PIN_A3,LVDS TX bit 11n or CMOS I/O,Depend on JP2 96 | HSMC_TX_n[12],PIN_A5,LVDS TX bit 12n or CMOS I/O,Depend on JP2 97 | HSMC_TX_n[13],PIN_B7,LVDS TX bit 13n or CMOS I/O,Depend on JP2 98 | HSMC_TX_n[14],PIN_B8,LVDS TX bit 14n or CMOS I/O,Depend on JP2 99 | HSMC_TX_n[15],PIN_B11,LVDS TX bit 15n or CMOS I/O,Depend on JP2 100 | HSMC_TX_n[16],PIN_A13,LVDS TX bit 16n or CMOS I/O,Depend on JP2 101 | HSMC_TX_p[0],PIN_A9,LVDS TX bit 0 or CMOS I/O,Depend on JP2 102 | HSMC_TX_p[1],PIN_E8,LVDS TX bit 1 or CMOS I/O,Depend on JP2 103 | HSMC_TX_p[2],PIN_G7,LVDS TX bit 2 or CMOS I/O,Depend on JP2 104 | HSMC_TX_p[3],PIN_D6,LVDS TX bit 3 or CMOS I/O,Depend on JP2 105 | HSMC_TX_p[4],PIN_D5,LVDS TX bit 4 or CMOS I/O,Depend on JP2 106 | HSMC_TX_p[5],PIN_E3,LVDS TX bit 5 or CMOS I/O,Depend on JP2 107 | HSMC_TX_p[6],PIN_E4,LVDS TX bit 6 or CMOS I/O,Depend on JP2 108 | HSMC_TX_p[7],PIN_C3,LVDS TX bit 7 or CMOS I/O,Depend on JP2 109 | HSMC_TX_p[8],PIN_E1,LVDS TX bit 8 or CMOS I/O,Depend on JP2 110 | HSMC_TX_p[9],PIN_D2,LVDS TX bit 9 or CMOS I/O,Depend on JP2 111 | HSMC_TX_p[10],PIN_B2,LVDS TX bit 10 or CMOS I/O,Depend on JP2 112 | HSMC_TX_p[11],PIN_A4,LVDS TX bit 11 or CMOS I/O,Depend on JP2 113 | HSMC_TX_p[12],PIN_A6,LVDS TX bit 12 or CMOS I/O,Depend on JP2 114 | HSMC_TX_p[13],PIN_C7,LVDS TX bit 13 or CMOS I/O,Depend on JP2 115 | HSMC_TX_p[14],PIN_C8,LVDS TX bit 14 or CMOS I/O,Depend on JP2 116 | HSMC_TX_p[15],PIN_C12,LVDS TX bit 15 or CMOS I/O,Depend on JP2 117 | HSMC_TX_p[16],PIN_B13,LVDS TX bit 16 or CMOS I/O,Depend on JP2 118 | -------------------------------------------------------------------------------- /dp-to-pcie/dp-to-pcie-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # CONN_02X04 5 | # 6 | DEF CONN_02X04 P 0 1 Y N 1 F N 7 | F0 "P" 0 250 50 H V C CNN 8 | F1 "CONN_02X04" 0 -250 50 H V C CNN 9 | F2 "" 0 -1200 60 H V C CNN 10 | F3 "" 0 -1200 60 H V C CNN 11 | $FPLIST 12 | Pin_Header_Straight_2X04 13 | Pin_Header_Angled_2X04 14 | Socket_Strip_Straight_2X04 15 | Socket_Strip_Angled_2X04 16 | $ENDFPLIST 17 | DRAW 18 | S -100 -145 -50 -155 0 1 0 N 19 | S -100 -45 -50 -55 0 1 0 N 20 | S -100 55 -50 45 0 1 0 N 21 | S -100 155 -50 145 0 1 0 N 22 | S -100 200 100 -200 0 1 0 N 23 | S 50 -145 100 -155 0 1 0 N 24 | S 50 -45 100 -55 0 1 0 N 25 | S 50 55 100 45 0 1 0 N 26 | S 50 155 100 145 0 1 0 N 27 | X P1 1 -250 150 150 R 50 50 1 1 P 28 | X P2 2 250 150 150 L 50 50 1 1 P 29 | X P3 3 -250 50 150 R 50 50 1 1 P 30 | X P4 4 250 50 150 L 50 50 1 1 P 31 | X P5 5 -250 -50 150 R 50 50 1 1 P 32 | X P6 6 250 -50 150 L 50 50 1 1 P 33 | X P7 7 -250 -150 150 R 50 50 1 1 P 34 | X P8 8 250 -150 150 L 50 50 1 1 P 35 | ENDDRAW 36 | ENDDEF 37 | # 38 | # DISPLAY_PORT 39 | # 40 | DEF DISPLAY_PORT J 0 40 Y Y 1 F N 41 | F0 "J" -600 1100 60 H V C CNN 42 | F1 "DISPLAY_PORT" 150 0 60 V V C CNN 43 | F2 "" -50 0 60 H V C CNN 44 | F3 "" -50 0 60 H V C CNN 45 | DRAW 46 | S -650 1050 250 -1150 0 1 0 N 47 | S 50 450 200 -550 0 1 0 N 48 | P 7 0 1 0 250 550 250 -650 50 -650 -50 -550 -50 450 50 550 250 550 N 49 | X ML_LaneP0 1 -850 900 197 R 50 50 1 1 B 50 | X GND 2 -850 800 197 R 50 50 1 1 W 51 | X ML_LaneN0 3 -850 700 197 R 50 50 1 1 B 52 | X ML_LaneP1 4 -850 600 197 R 50 50 1 1 B 53 | X GND 5 -850 500 197 R 50 50 1 1 W 54 | X ML_LaneN1 6 -850 400 197 R 50 50 1 1 B 55 | X ML_LaneP2 7 -850 300 197 R 50 50 1 1 B 56 | X GND 8 -850 200 197 R 50 50 1 1 W 57 | X ML_LaneN2 9 -850 100 197 R 50 50 1 1 B 58 | X ML_LaneP3 10 -850 0 197 R 50 50 1 1 B 59 | X DP_PWR 20 -850 -1000 197 R 50 50 1 1 B 60 | X GND 11 -850 -100 197 R 50 50 1 1 B 61 | X ML_LaneN3 12 -850 -200 197 R 50 50 1 1 B 62 | X CONFIG1 13 -850 -300 197 R 50 50 1 1 B 63 | X CONFIG2 14 -850 -400 197 R 50 50 1 1 P 64 | X AUXCH_P 15 -850 -500 197 R 50 50 1 1 B 65 | X GND 16 -850 -600 197 R 50 50 1 1 B 66 | X AUXCH_N 17 -850 -700 197 R 50 50 1 1 B 67 | X HPD 18 -850 -800 197 R 50 50 1 1 I 68 | X RETURN 19 -850 -900 197 R 50 50 1 1 B 69 | ENDDRAW 70 | ENDDEF 71 | # 72 | # SW_PUSH_SMALL 73 | # 74 | DEF SW_PUSH_SMALL SW 0 40 N N 1 F N 75 | F0 "SW" 150 110 30 H V C CNN 76 | F1 "SW_PUSH_SMALL" 0 -79 30 H V C CNN 77 | F2 "" 0 0 60 H V C CNN 78 | F3 "" 0 0 60 H V C CNN 79 | DRAW 80 | C -60 60 10 0 1 0 N 81 | C 60 -60 10 0 1 0 N 82 | P 3 0 1 0 -100 100 -60 60 -60 60 N 83 | P 4 0 1 0 60 -60 100 -100 100 -100 100 -100 N 84 | P 6 0 1 0 -10 60 10 70 70 10 60 -10 60 -10 60 -10 N 85 | P 7 0 1 0 -50 80 80 -50 90 -40 -40 90 -50 80 -50 80 -50 80 N 86 | X 1 1 -100 100 0 R 60 60 0 1 P 87 | X 2 2 100 -100 0 L 60 60 0 1 P 88 | ENDDRAW 89 | ENDDEF 90 | # 91 | # TIMVIDEOS-PCIE-8X 92 | # 93 | DEF TIMVIDEOS-PCIE-8X U 0 40 Y Y 1 F N 94 | F0 "U" 0 -2850 60 H V C CNN 95 | F1 "TIMVIDEOS-PCIE-8X" -650 -2850 60 H V C CNN 96 | F2 "" -1300 -300 60 H V C CNN 97 | F3 "" -1300 -300 60 H V C CNN 98 | DRAW 99 | T 0 -450 700 60 0 0 0 1x Normal 0 C C 100 | T 0 -450 -700 60 0 0 0 4x Normal 0 C C 101 | T 0 -450 -2600 60 0 0 0 8x Normal 0 C C 102 | T 0 -750 1550 60 0 0 0 Key~Notch Normal 0 C C 103 | T 0 -150 1550 60 0 0 0 Key~Notch Normal 0 C C 104 | S -1100 -2550 200 -2650 0 0 0 N 105 | S -1100 -650 200 -750 0 0 0 N 106 | S -1100 750 200 650 0 0 0 N 107 | S -1100 1600 200 1500 0 0 0 N 108 | S -1100 1650 200 1450 0 0 0 N 109 | S -1100 2800 200 -2800 0 0 0 N 110 | S -500 2800 -400 -2800 0 0 0 N 111 | X ~PRSNT1 A1 400 2700 200 L 50 50 1 1 P 112 | X 12V B1 -1300 2700 200 R 50 50 1 1 P X 113 | X 12V A2 400 2600 200 L 50 50 1 1 P X 114 | X 12V B2 -1300 2600 200 R 50 50 1 1 P X 115 | X 12V A3 400 2500 200 L 50 50 1 1 P X 116 | X 12V B3 -1300 2500 200 R 50 50 1 1 P X 117 | X GND A4 400 2400 200 L 50 50 1 1 P 118 | X GND B4 -1300 2400 200 R 50 50 1 1 P 119 | X DIFF_IO_A0P A5 400 2300 200 L 50 50 1 1 B 120 | X IDCLK B5 -1300 2300 200 R 50 50 1 1 B F 121 | X DIFF_IO_A0N A6 400 2200 200 L 50 50 1 1 B 122 | X IDDAT B6 -1300 2200 200 R 50 50 1 1 B 123 | X DIFF_IO_B0P A7 400 2100 200 L 50 50 1 1 B 124 | X GND B7 -1300 2100 200 R 50 50 1 1 P 125 | X DIFF_IO_B0N A8 400 2000 200 L 50 50 1 1 B 126 | X 3V3 B8 -1300 2000 200 R 50 50 1 1 P X 127 | X 3V3 A9 400 1900 200 L 50 50 1 1 P X 128 | X DIFF_IO_XP B9 -1300 1900 200 R 50 50 1 1 B 129 | X 3V3 A10 400 1800 200 L 50 50 1 1 P X 130 | X 3V3 B10 -1300 1800 200 R 50 50 1 1 P X 131 | X GND A20 400 500 200 L 50 50 1 1 P 132 | X DIFF_IO_B2N B20 -1300 500 200 R 50 50 1 1 B 133 | X DIFF_CLK_A0N A30 400 -500 200 L 50 50 1 1 B C 134 | X DIFF_IO_ZN B30 -1300 -500 200 R 50 50 1 1 B 135 | X DIFF_IO_A5N A40 400 -1600 200 L 50 50 1 1 B 136 | X GND B40 -1300 -1600 200 R 50 50 1 1 P 137 | X ~RST A11 400 1700 200 L 50 50 1 1 P 138 | X DIFF_IO_XN B11 -1300 1700 200 R 50 50 1 1 B 139 | X DIFF_IO_A2P A21 400 400 200 L 50 50 1 1 B 140 | X GND B21 -1300 400 200 R 50 50 1 1 P 141 | X GND A31 400 -600 200 L 50 50 1 1 P 142 | X ~PRSNT2 B31 -1300 -600 200 R 50 50 1 1 P 143 | X GND A41 400 -1700 200 L 50 50 1 1 P 144 | X DIFF_IO_B6P B41 -1300 -1700 200 R 50 50 1 1 B 145 | X GND A12 400 1400 200 L 50 50 1 1 P 146 | X DIFF_IO_YN B12 -1300 1400 200 R 50 50 1 1 B 147 | X DIFF_IO_A2N A22 400 300 200 L 50 50 1 1 B 148 | X GND B22 -1300 300 200 R 50 50 1 1 P 149 | X DIFF_IO_ZP A32 400 -800 200 L 50 50 1 1 B 150 | X GND B32 -1300 -800 200 R 50 50 1 1 P 151 | X GND A42 400 -1800 200 L 50 50 1 1 P 152 | X DIFF_IO_B6N B42 -1300 -1800 200 R 50 50 1 1 B 153 | X DIFF_CLK_XP A13 400 1300 200 L 50 50 1 1 B C 154 | X GND B13 -1300 1300 200 R 50 50 1 1 P 155 | X GND A23 400 200 200 L 50 50 1 1 P 156 | X DIFF_IO_B3P B23 -1300 200 200 R 50 50 1 1 B 157 | X IO1 A33 400 -900 200 L 50 50 1 1 B 158 | X DIFF_IO_B4P B33 -1300 -900 200 R 50 50 1 1 B 159 | X DIFF_IO_A6P A43 400 -1900 200 L 50 50 1 1 B 160 | X GND B43 -1300 -1900 200 R 50 50 1 1 P 161 | X DIFF_CLK_XN A14 400 1200 200 L 50 50 1 1 B C 162 | X DIFF_IO_B1P B14 -1300 1200 200 R 50 50 1 1 B 163 | X GND A24 400 100 200 L 50 50 1 1 P 164 | X DIFF_IO_B3N B24 -1300 100 200 R 50 50 1 1 B 165 | X GND A34 400 -1000 200 L 50 50 1 1 P 166 | X DIFF_IO_B4N B34 -1300 -1000 200 R 50 50 1 1 B 167 | X DIFF_IO_A6N A44 400 -2000 200 L 50 50 1 1 B 168 | X GND B44 -1300 -2000 200 R 50 50 1 1 P 169 | X GND A15 400 1100 200 L 50 50 1 1 P 170 | X DIFF_IO_B1N B15 -1300 1100 200 R 50 50 1 1 B 171 | X DIFF_IO_A3P A25 400 0 200 L 50 50 1 1 B 172 | X GND B25 -1300 0 200 R 50 50 1 1 P 173 | X DIFF_IO_A4P A35 400 -1100 200 L 50 50 1 1 B 174 | X GND B35 -1300 -1100 200 R 50 50 1 1 P 175 | X GND A45 400 -2100 200 L 50 50 1 1 P 176 | X DIFF_CLK_B1P B45 -1300 -2100 200 R 50 50 1 1 B C 177 | X DIFF_IO_A1P A16 400 1000 200 L 50 50 1 1 B 178 | X GND B16 -1300 1000 200 R 50 50 1 1 P 179 | X DIFF_IO_A3N A26 400 -100 200 L 50 50 1 1 B 180 | X GND B26 -1300 -100 200 R 50 50 1 1 P 181 | X DIFF_IO_A4N A36 400 -1200 200 L 50 50 1 1 B 182 | X GND B36 -1300 -1200 200 R 50 50 1 1 P 183 | X GND A46 400 -2200 200 L 50 50 1 1 P 184 | X DIFF_CLK_B1N B46 -1300 -2200 200 R 50 50 1 1 B C 185 | X DIFF_IO_A1N A17 400 900 200 L 50 50 1 1 B 186 | X ~PRSNT2 B17 -1300 900 200 R 50 50 1 1 P 187 | X GND A27 400 -200 200 L 50 50 1 1 P 188 | X DIFF_CLK_B0P B27 -1300 -200 200 R 50 50 1 1 B C 189 | X GND A37 400 -1300 200 L 50 50 1 1 P 190 | X DIFF_IO_B5P B37 -1300 -1300 200 R 50 50 1 1 B 191 | X DIFF_CLK_A1P A47 400 -2300 200 L 50 50 1 1 B C 192 | X GND B47 -1300 -2300 200 R 50 50 1 1 P 193 | X GND A18 400 800 200 L 50 50 1 1 P 194 | X GND B18 -1300 800 200 R 50 50 1 1 P 195 | X GND A28 400 -300 200 L 50 50 1 1 P 196 | X DIFF_CLK_B0N B28 -1300 -300 200 R 50 50 1 1 B C 197 | X GND A38 400 -1400 200 L 50 50 1 1 P 198 | X DIFF_IO_B5N B38 -1300 -1400 200 R 50 50 1 1 B 199 | X DIFF_CLK_A1N A48 400 -2400 200 L 50 50 1 1 B C 200 | X ~PRSNT2 B48 -1300 -2400 200 R 50 50 1 1 P 201 | X DIFF_IO_YP A19 400 600 200 L 50 50 1 1 B 202 | X DIFF_IO_B2P B19 -1300 600 200 R 50 50 1 1 B 203 | X DIFF_CLK_A0P A29 400 -400 200 L 50 50 1 1 B C 204 | X GND B29 -1300 -400 200 R 50 50 1 1 P 205 | X DIFF_IO_A5P A39 400 -1500 200 L 50 50 1 1 B 206 | X GND B39 -1300 -1500 200 R 50 50 1 1 P 207 | X GND A49 400 -2500 200 L 50 50 1 1 P 208 | X GND B49 -1300 -2500 200 R 50 50 1 1 P 209 | ENDDRAW 210 | ENDDEF 211 | # 212 | #End Library 213 | -------------------------------------------------------------------------------- /dp-aux-intercept/gerbers/v0.0-66-g0a24827/dp-aux-intercept.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ;DRILL file {KiCad 4.0.2+e4-6225~38~ubuntu14.04.1-stable} date Mon Aug 1 15:26:05 2016 3 | ;FORMAT={-:-/ absolute / metric / decimal} 4 | FMAT,2 5 | METRIC,TZ 6 | T1C0.305 7 | T2C0.550 8 | T3C0.600 9 | T4C1.016 10 | % 11 | G90 12 | G05 13 | M71 14 | T1 15 | X21.336Y-22.904 16 | X21.336Y-25.08 17 | X21.336Y-27.256 18 | X21.336Y-29.432 19 | X21.336Y-31.608 20 | X21.336Y-33.784 21 | X21.336Y-35.96 22 | X21.336Y-35.96 23 | X21.336Y-38.136 24 | X21.336Y-38.136 25 | X21.336Y-40.312 26 | X21.336Y-40.312 27 | X21.336Y-42.488 28 | X21.336Y-44.664 29 | X21.336Y-46.84 30 | X21.336Y-49.016 31 | X21.336Y-51.191 32 | X21.336Y-53.367 33 | X21.336Y-55.543 34 | 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175 | X29.845Y-94.482 176 | X31.064Y-35.96 177 | X31.064Y-38.136 178 | X31.064Y-40.312 179 | X31.064Y-42.488 180 | X31.064Y-42.488 181 | X31.064Y-44.664 182 | X31.064Y-46.84 183 | X31.064Y-49.016 184 | X31.064Y-49.016 185 | X31.064Y-51.191 186 | X31.064Y-53.367 187 | X31.064Y-55.543 188 | X31.064Y-55.543 189 | X31.064Y-57.719 190 | X31.064Y-59.895 191 | X31.064Y-62.071 192 | X31.064Y-62.071 193 | X31.064Y-64.247 194 | X31.064Y-66.423 195 | X31.064Y-68.599 196 | X31.064Y-68.599 197 | X31.064Y-70.775 198 | X31.064Y-72.951 199 | X31.064Y-75.127 200 | X31.064Y-75.127 201 | X31.064Y-77.303 202 | X31.064Y-81.655 203 | X32.639Y-35.96 204 | X32.639Y-38.136 205 | X32.639Y-40.312 206 | X32.639Y-42.488 207 | X32.639Y-42.488 208 | X32.639Y-44.664 209 | X32.639Y-46.84 210 | X32.639Y-49.016 211 | X32.639Y-49.016 212 | X32.639Y-51.191 213 | X32.639Y-53.367 214 | X32.639Y-55.543 215 | X32.639Y-55.543 216 | X32.639Y-57.719 217 | X32.639Y-59.895 218 | X32.639Y-62.071 219 | X32.639Y-62.071 220 | X32.639Y-64.247 221 | X32.639Y-66.423 222 | X32.639Y-68.599 223 | X32.639Y-68.599 224 | X32.639Y-70.775 225 | X32.639Y-72.951 226 | X32.639Y-77.303 227 | X32.639Y-79.479 228 | X32.639Y-81.655 229 | X32.893Y-94.482 230 | X33.386Y-76.419 231 | X34.417Y-94.482 232 | X34.468Y-88.595 233 | X34.468Y-90.805 234 | X34.493Y-42.479 235 | X34.493Y-70.292 236 | X34.646Y-53.367 237 | X35.255Y-47.346 238 | X35.738Y-53.367 239 | X35.75Y-33.591 240 | X35.865Y-94.158 241 | X36.144Y-88.595 242 | X36.144Y-90.805 243 | X36.576Y-86.462 244 | X36.639Y-32.322 245 | X36.779Y-92.608 246 | X37.008Y-47.346 247 | X37.135Y-53.365 248 | X37.16Y-82.626 249 | X37.668Y-42.479 250 | X37.668Y-70.292 251 | X38.329Y-53.365 252 | X38.329Y-84.709 253 | X38.354Y-47.346 254 | X38.786Y-26.695 255 | X38.786Y-28.981 256 | X39.218Y-82.728 257 | X39.7Y-53.365 258 | X39.929Y-47.346 259 | X40.843Y-70.292 260 | X40.869Y-53.367 261 | X40.97Y-42.479 262 | X41.173Y-93.409 263 | X41.58Y-26.695 264 | X41.58Y-28.981 265 | X42.037Y-81.99 266 | X43.307Y-80.289 267 | X44.425Y-92.888 268 | X44.526Y-26.695 269 | X44.526Y-28.981 270 | X46.533Y-30.988 271 | X46.533Y-35.744 272 | X46.533Y-40.5 273 | X46.533Y-45.256 274 | X46.533Y-50.013 275 | X46.533Y-60.192 276 | X46.533Y-63.7 277 | X46.533Y-67.208 278 | X46.914Y-93.37 279 | X48.844Y-92.583 280 | X49.428Y-30.988 281 | X49.428Y-35.744 282 | X49.428Y-40.5 283 | X49.428Y-45.256 284 | X49.428Y-50.013 285 | X49.428Y-60.192 286 | X49.428Y-63.7 287 | X49.428Y-67.208 288 | X49.682Y-90.729 289 | T2 290 | X25.742Y-32.31 291 | X25.742Y-85.038 292 | X26.242Y-30.81 293 | X26.242Y-86.538 294 | X26.742Y-33.81 295 | X26.742Y-83.538 296 | X27.242Y-32.31 297 | X27.242Y-85.038 298 | X27.742Y-30.81 299 | X27.742Y-86.538 300 | X28.242Y-33.81 301 | X28.242Y-83.538 302 | X28.742Y-32.31 303 | X28.742Y-85.038 304 | X29.242Y-30.81 305 | X29.242Y-86.538 306 | X29.742Y-33.81 307 | X29.742Y-83.538 308 | X30.242Y-32.31 309 | X30.242Y-85.038 310 | X30.742Y-30.81 311 | X30.742Y-86.538 312 | X31.242Y-33.81 313 | X31.242Y-83.538 314 | X31.742Y-32.31 315 | X31.742Y-85.038 316 | X32.242Y-30.81 317 | X32.242Y-86.538 318 | X32.742Y-33.81 319 | X32.742Y-83.538 320 | X33.242Y-32.31 321 | X33.242Y-85.038 322 | X33.742Y-30.81 323 | X33.742Y-86.538 324 | X34.242Y-33.81 325 | X34.242Y-83.538 326 | X34.742Y-32.31 327 | X34.742Y-85.038 328 | X35.242Y-30.81 329 | X35.242Y-86.538 330 | T4 331 | X35.192Y-48.892 332 | X35.192Y-51.432 333 | X35.192Y-55.242 334 | X35.192Y-57.782 335 | X35.192Y-61.592 336 | X35.192Y-64.132 337 | X37.732Y-48.892 338 | X37.732Y-51.432 339 | X37.732Y-55.242 340 | X37.732Y-57.782 341 | X37.732Y-61.592 342 | X37.732Y-64.132 343 | X40.272Y-48.892 344 | X40.272Y-51.432 345 | X40.272Y-55.242 346 | X40.272Y-57.782 347 | X40.272Y-61.592 348 | X40.272Y-64.132 349 | X42.812Y-55.242 350 | X42.812Y-57.782 351 | X45.207Y-68.453 352 | X45.207Y-70.993 353 | X45.207Y-73.533 354 | X45.207Y-76.073 355 | X45.207Y-78.613 356 | X45.207Y-81.153 357 | X45.207Y-83.693 358 | X45.207Y-86.233 359 | X45.207Y-88.773 360 | X45.207Y-91.313 361 | X45.352Y-55.242 362 | X45.352Y-57.782 363 | X47.747Y-68.453 364 | X47.747Y-70.993 365 | X47.747Y-73.533 366 | X47.747Y-76.073 367 | X47.747Y-78.613 368 | X47.747Y-81.153 369 | X47.747Y-83.693 370 | X47.747Y-86.233 371 | X47.747Y-88.773 372 | X47.747Y-91.313 373 | X47.892Y-55.242 374 | X47.892Y-57.782 375 | T3 376 | X22.992Y-25.23G85X22.992Y-24.73 377 | G05 378 | X22.992Y-32.26G85X22.992Y-31.26 379 | G05 380 | X22.992Y-86.088G85X22.992Y-85.088 381 | G05 382 | X22.992Y-92.618G85X22.992Y-92.118 383 | G05 384 | X39.492Y-25.23G85X39.492Y-24.73 385 | G05 386 | X39.492Y-32.26G85X39.492Y-31.26 387 | G05 388 | X39.492Y-86.088G85X39.492Y-85.088 389 | G05 390 | X39.492Y-92.618G85X39.492Y-92.118 391 | G05 392 | T0 393 | M30 394 | -------------------------------------------------------------------------------- /libraries/HSMC-SE.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # HSMC-SE 5 | # 6 | DEF HSMC-SE U 0 40 Y Y 3 L N 7 | F0 "U" 0 -1650 50 H V C CNN 8 | F1 "HSMC-SE" 0 1700 50 H V C CNN 9 | F2 "QTH-090-01-L-D-A" 0 -300 50 H I C CNN 10 | F3 "DOCUMENTATION" 0 0 50 H I C CNN 11 | DRAW 12 | S -450 -1750 450 1750 1 0 0 N 13 | S -450 -1750 450 1750 2 0 0 N 14 | S -2050 -1750 2050 1750 3 0 0 N 15 | X XCVR_TXp7 1 -750 1550 300 R 50 50 1 1 B 16 | X XCVR_RXp7 2 -750 1450 300 R 50 50 1 1 B 17 | X XCVR_TXn7 3 -750 1350 300 R 50 50 1 1 B 18 | X XCVR_RXn7 4 -750 1250 300 R 50 50 1 1 B 19 | X XCVR_TXp6 5 -750 1150 300 R 50 50 1 1 B 20 | X XCVR_RXp6 6 -750 1050 300 R 50 50 1 1 B 21 | X XCVR_TXn6 7 -750 950 300 R 50 50 1 1 B 22 | X XCVR_RXn6 8 -750 850 300 R 50 50 1 1 B 23 | X XCVR_TXp5 9 -750 750 300 R 50 50 1 1 B 24 | X XCVR_RXp5 10 -750 650 300 R 50 50 1 1 B 25 | X XCVR_RXn3 20 -750 -350 300 R 50 50 1 1 B 26 | X XCVR_RXp0 30 -750 -1350 300 R 50 50 1 1 B 27 | X CLKIN0 40 750 -850 300 L 50 50 1 1 B C 28 | X D7 50 750 150 300 L 50 50 1 1 B 29 | X D13 60 750 1150 300 L 50 50 1 1 B 30 | X XCVR_TXn5 11 -750 550 300 R 50 50 1 1 B 31 | X XCVR_TXp2 21 -750 -450 300 R 50 50 1 1 B 32 | X XCVR_TXn0 31 -750 -1450 300 R 50 50 1 1 B 33 | X D0 41 750 -750 300 L 50 50 1 1 B 34 | X 3.3V 51 750 250 300 L 50 50 1 1 w 35 | X D14 61 750 1250 300 L 50 50 1 1 B 36 | X XCVR_RXn5 12 -750 450 300 R 50 50 1 1 B 37 | X XCVR_RXp2 22 -750 -550 300 R 50 50 1 1 B 38 | X XCVR_RXn0 32 -750 -1550 300 R 50 50 1 1 B 39 | X D1 42 750 -650 300 L 50 50 1 1 B 40 | X 12V 52 750 350 300 L 50 50 1 1 w 41 | X D15 62 750 1350 300 L 50 50 1 1 B 42 | X XCVR_TXp4 13 -750 350 300 R 50 50 1 1 B 43 | X XCVR_TXn2 23 -750 -650 300 R 50 50 1 1 B 44 | X SDA 33 750 -1550 300 L 50 50 1 1 B 45 | X D2 43 750 -550 300 L 50 50 1 1 B 46 | X D8 53 750 450 300 L 50 50 1 1 B 47 | X 3.3V 63 750 1450 300 L 50 50 1 1 w 48 | X XCVR_RXp4 14 -750 250 300 R 50 50 1 1 B 49 | X XCVR_RXn2 24 -750 -750 300 R 50 50 1 1 B 50 | X SCL 34 750 -1450 300 L 50 50 1 1 B 51 | X D3 44 750 -450 300 L 50 50 1 1 B 52 | X D9 54 750 550 300 L 50 50 1 1 B 53 | X 12V 64 750 1550 300 L 50 50 1 1 w 54 | X XCVR_TXn4 15 -750 150 300 R 50 50 1 1 B 55 | X XCVR_TXp1 25 -750 -850 300 R 50 50 1 1 B 56 | X JTAG_TCK 35 750 -1350 300 L 50 50 1 1 B 57 | X 3.3V 45 750 -350 300 L 50 50 1 1 w 58 | X D10 55 750 650 300 L 50 50 1 1 B 59 | X XCVR_RXn4 16 -750 50 300 R 50 50 1 1 B 60 | X XCVR_RXp1 26 -750 -950 300 R 50 50 1 1 B 61 | X JTAG_TMS 36 750 -1250 300 L 50 50 1 1 B 62 | X 12V 46 750 -250 300 L 50 50 1 1 w 63 | X D11 56 750 750 300 L 50 50 1 1 B 64 | X XCVR_TXp3 17 -750 -50 300 R 50 50 1 1 B 65 | X XCVR_TXn1 27 -750 -1050 300 R 50 50 1 1 B 66 | X JTAG_TDO 37 750 -1150 300 L 50 50 1 1 B 67 | X D4 47 750 -150 300 L 50 50 1 1 B 68 | X 3.3V 57 750 850 300 L 50 50 1 1 w 69 | X XCVR_RXp3 18 -750 -150 300 R 50 50 1 1 B 70 | X XCVR_RXn1 28 -750 -1150 300 R 50 50 1 1 B 71 | X JTAG_TDI 38 750 -1050 300 L 50 50 1 1 B 72 | X D5 48 750 -50 300 L 50 50 1 1 B 73 | X 12V 58 750 950 300 L 50 50 1 1 w 74 | X XCVR_TXn3 19 -750 -250 300 R 50 50 1 1 B 75 | X XCVR_TXp0 29 -750 -1250 300 R 50 50 1 1 B 76 | X CLKOUT0 39 750 -950 300 L 50 50 1 1 B C 77 | X D6 49 750 50 300 L 50 50 1 1 B 78 | X D12 59 750 1050 300 L 50 50 1 1 B 79 | X 12V 70 -750 1050 300 R 50 50 2 1 w 80 | X D27 80 -750 50 300 R 50 50 2 1 B 81 | X D33 90 -750 -950 300 R 50 50 2 1 B 82 | X D20 71 -750 950 300 R 50 50 2 1 B 83 | X 3.3V 81 -750 -50 300 R 50 50 2 1 w 84 | X D34 91 -750 -1050 300 R 50 50 2 1 B 85 | X D21 72 -750 850 300 R 50 50 2 1 B 86 | X 12V 82 -750 -150 300 R 50 50 2 1 w 87 | X D35 92 -750 -1150 300 R 50 50 2 1 B 88 | X D22 73 -750 750 300 R 50 50 2 1 B 89 | X D28 83 -750 -250 300 R 50 50 2 1 B 90 | X 3.3V 93 -750 -1250 300 R 50 50 2 1 w 91 | X D23 74 -750 650 300 R 50 50 2 1 B 92 | X D29 84 -750 -350 300 R 50 50 2 1 B 93 | X 12V 94 -750 -1350 300 R 50 50 2 1 w 94 | X D16 65 -750 1550 300 R 50 50 2 1 B 95 | X 3.3V 75 -750 550 300 R 50 50 2 1 w 96 | X D30 85 -750 -450 300 R 50 50 2 1 B 97 | X D36 95 -750 -1450 300 R 50 50 2 1 B 98 | X D17 66 -750 1450 300 R 50 50 2 1 B 99 | X 12V 76 -750 450 300 R 50 50 2 1 w 100 | X D31 86 -750 -550 300 R 50 50 2 1 B 101 | X D37 96 -750 -1550 300 R 50 50 2 1 B 102 | X D18 67 -750 1350 300 R 50 50 2 1 B 103 | X D24 77 -750 350 300 R 50 50 2 1 B 104 | X 3.3V 87 -750 -650 300 R 50 50 2 1 w 105 | X D38 97 750 -1550 300 L 50 50 2 1 B 106 | X D19 68 -750 1250 300 R 50 50 2 1 B 107 | X D25 78 -750 250 300 R 50 50 2 1 B 108 | X 12V 88 -750 -750 300 R 50 50 2 1 w 109 | X D39 98 750 -1450 300 L 50 50 2 1 B 110 | X 3.3V 69 -750 1150 300 R 50 50 2 1 w 111 | X D26 79 -750 150 300 R 50 50 2 1 B 112 | X D32 89 -750 -850 300 R 50 50 2 1 B 113 | X 3.3V 99 750 -1350 300 L 50 50 2 1 w 114 | X 12V 100 750 -1250 300 L 50 50 2 1 w 115 | X D47 110 750 -250 300 L 50 50 2 1 B 116 | X D53 120 750 750 300 L 50 50 2 1 B 117 | X D40 101 750 -1150 300 L 50 50 2 1 B 118 | X 3.3V 111 750 -150 300 L 50 50 2 1 w 119 | X D54 121 750 850 300 L 50 50 2 1 B 120 | X D41 102 750 -1050 300 L 50 50 2 1 B 121 | X 12V 112 750 -50 300 L 50 50 2 1 w 122 | X D55 122 750 950 300 L 50 50 2 1 B 123 | X D42 103 750 -950 300 L 50 50 2 1 B 124 | X D48 113 750 50 300 L 50 50 2 1 B 125 | X 3.3V 123 750 1050 300 L 50 50 2 1 w 126 | X D43 104 750 -850 300 L 50 50 2 1 B 127 | X D49 114 750 150 300 L 50 50 2 1 B 128 | X 12V 124 750 1150 300 L 50 50 2 1 w 129 | X 3.3V 105 750 -750 300 L 50 50 2 1 w 130 | X D50 115 750 250 300 L 50 50 2 1 B 131 | X D56 125 750 1250 300 L 50 50 2 1 B 132 | X 12V 106 750 -650 300 L 50 50 2 1 w 133 | X D51 116 750 350 300 L 50 50 2 1 B 134 | X D57 126 750 1350 300 L 50 50 2 1 B 135 | X D44 107 750 -550 300 L 50 50 2 1 B 136 | X 3.3V 117 750 450 300 L 50 50 2 1 w 137 | X D58 127 750 1450 300 L 50 50 2 1 B 138 | X D45 108 750 -450 300 L 50 50 2 1 B 139 | X 12V 118 750 550 300 L 50 50 2 1 w 140 | X D59 128 750 1550 300 L 50 50 2 1 B 141 | X D46 109 750 -350 300 L 50 50 2 1 B 142 | X D52 119 750 650 300 L 50 50 2 1 B 143 | X 12V 130 -2350 1450 300 R 50 50 3 1 w 144 | X D67 140 -2350 450 300 R 50 50 3 1 B 145 | X D73 150 -2350 -550 300 R 50 50 3 1 B 146 | X PSNTn 160 -2350 -1550 300 R 50 50 3 1 B 147 | X GND 170 -650 -2050 300 U 50 50 3 1 W 148 | X GND 180 350 -2050 300 U 50 50 3 1 W 149 | X GND 190 1350 -2050 300 U 50 50 3 1 W 150 | X D60 131 -2350 1350 300 R 50 50 3 1 B 151 | X 3.3V 141 -2350 350 300 R 50 50 3 1 w 152 | X D74 151 -2350 -650 300 R 50 50 3 1 B 153 | X GND 161 -1550 -2050 300 U 50 50 3 1 W 154 | X GND 171 -550 -2050 300 U 50 50 3 1 W 155 | X GND 181 450 -2050 300 U 50 50 3 1 W 156 | X GND 191 1450 -2050 300 U 50 50 3 1 W 157 | X D61 132 -2350 1250 300 R 50 50 3 1 B 158 | X 12V 142 -2350 250 300 R 50 50 3 1 w 159 | X D75 152 -2350 -750 300 R 50 50 3 1 B 160 | X GND 162 -1450 -2050 300 U 50 50 3 1 W 161 | X GND 172 -450 -2050 300 U 50 50 3 1 W 162 | X GND 182 550 -2050 300 U 50 50 3 1 W 163 | X GND 192 1550 -2050 300 U 50 50 3 1 W 164 | X D62 133 -2350 1150 300 R 50 50 3 1 B 165 | X D68 143 -2350 150 300 R 50 50 3 1 B 166 | X 3.3V 153 -2350 -850 300 R 50 50 3 1 w 167 | X GND 163 -1350 -2050 300 U 50 50 3 1 W 168 | X GND 173 -350 -2050 300 U 50 50 3 1 W 169 | X GND 183 650 -2050 300 U 50 50 3 1 W 170 | X D63 134 -2350 1050 300 R 50 50 3 1 B 171 | X D69 144 -2350 50 300 R 50 50 3 1 B 172 | X 12V 154 -2350 -950 300 R 50 50 3 1 w 173 | X GND 164 -1250 -2050 300 U 50 50 3 1 W 174 | X GND 174 -250 -2050 300 U 50 50 3 1 W 175 | X GND 184 750 -2050 300 U 50 50 3 1 W 176 | X 3.3V 135 -2350 950 300 R 50 50 3 1 w 177 | X D70 145 -2350 -50 300 R 50 50 3 1 B 178 | X D76 155 -2350 -1050 300 R 50 50 3 1 B 179 | X GND 165 -1150 -2050 300 U 50 50 3 1 W 180 | X GND 175 -150 -2050 300 U 50 50 3 1 W 181 | X GND 185 850 -2050 300 U 50 50 3 1 W 182 | X 12V 136 -2350 850 300 R 50 50 3 1 w 183 | X D71 146 -2350 -150 300 R 50 50 3 1 B 184 | X D77 156 -2350 -1150 300 R 50 50 3 1 B 185 | X GND 166 -1050 -2050 300 U 50 50 3 1 W 186 | X GND 176 -50 -2050 300 U 50 50 3 1 W 187 | X GND 186 950 -2050 300 U 50 50 3 1 W 188 | X D64 137 -2350 750 300 R 50 50 3 1 B 189 | X 3.3V 147 -2350 -250 300 R 50 50 3 1 w 190 | X D78 157 -2350 -1250 300 R 50 50 3 1 B 191 | X GND 167 -950 -2050 300 U 50 50 3 1 W 192 | X GND 177 50 -2050 300 U 50 50 3 1 W 193 | X GND 187 1050 -2050 300 U 50 50 3 1 W 194 | X D65 138 -2350 650 300 R 50 50 3 1 B 195 | X 12V 148 -2350 -350 300 R 50 50 3 1 w 196 | X D79 158 -2350 -1350 300 R 50 50 3 1 B 197 | X GND 168 -850 -2050 300 U 50 50 3 1 W 198 | X GND 178 150 -2050 300 U 50 50 3 1 W 199 | X GND 188 1150 -2050 300 U 50 50 3 1 W 200 | X 3.3V 129 -2350 1550 300 R 50 50 3 1 w 201 | X D66 139 -2350 550 300 R 50 50 3 1 B 202 | X D72 149 -2350 -450 300 R 50 50 3 1 B 203 | X 3.3V 159 -2350 -1450 300 R 50 50 3 1 w 204 | X GND 169 -750 -2050 300 U 50 50 3 1 W 205 | X GND 179 250 -2050 300 U 50 50 3 1 W 206 | X GND 189 1250 -2050 300 U 50 50 3 1 W 207 | ENDDRAW 208 | ENDDEF 209 | # 210 | #End Library 211 | -------------------------------------------------------------------------------- /libraries/HSMC-RAW.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # QTH-090-01-L-D-A 5 | # 6 | DEF QTH-090-01-L-D-A CON 0 40 Y Y 3 F N 7 | F0 "CON" 0 -1650 50 H V C CNN 8 | F1 "QTH-090-01-L-D-A" 0 1650 50 H V C CNN 9 | F2 "MODULE" 0 100 50 H I C CNN 10 | F3 "DOCUMENTATION" 0 -100 50 H I C CNN 11 | DRAW 12 | S -450 -1750 450 1750 1 0 0 N 13 | S -450 -1750 450 1750 2 0 0 N 14 | S -450 -1750 450 1750 3 0 0 N 15 | X PIN1 1 -750 1550 300 R 50 50 1 1 B 16 | X PIN2 2 750 1550 300 L 50 50 1 1 B 17 | X PIN3 3 -750 1450 300 R 50 50 1 1 B 18 | X PIN4 4 750 1450 300 L 50 50 1 1 B 19 | X PIN5 5 -750 1350 300 R 50 50 1 1 B 20 | X PIN6 6 750 1350 300 L 50 50 1 1 B 21 | X PIN7 7 -750 1250 300 R 50 50 1 1 B 22 | X PIN8 8 750 1250 300 L 50 50 1 1 B 23 | X PIN9 9 -750 1150 300 R 50 50 1 1 B 24 | X PIN10 10 750 1150 300 L 50 50 1 1 B 25 | X PIN20 20 750 650 300 L 50 50 1 1 B 26 | X PIN30 30 750 150 300 L 50 50 1 1 B 27 | X PIN40 40 750 -350 300 L 50 50 1 1 B 28 | X PIN50 50 750 -850 300 L 50 50 1 1 B 29 | X PIN60 60 750 -1350 300 L 50 50 1 1 B 30 | X PIN11 11 -750 1050 300 R 50 50 1 1 B 31 | X PIN21 21 -750 550 300 R 50 50 1 1 B 32 | X PIN31 31 -750 50 300 R 50 50 1 1 B 33 | X PIN41 41 -750 -450 300 R 50 50 1 1 B 34 | X PIN51 51 -750 -950 300 R 50 50 1 1 B 35 | X PIN61 61 -750 -1450 300 R 50 50 1 1 B 36 | X PIN12 12 750 1050 300 L 50 50 1 1 B 37 | X PIN22 22 750 550 300 L 50 50 1 1 B 38 | X PIN32 32 750 50 300 L 50 50 1 1 B 39 | X PIN42 42 750 -450 300 L 50 50 1 1 B 40 | X PIN52 52 750 -950 300 L 50 50 1 1 B 41 | X PIN62 62 750 -1450 300 L 50 50 1 1 B 42 | X PIN13 13 -750 950 300 R 50 50 1 1 B 43 | X PIN23 23 -750 450 300 R 50 50 1 1 B 44 | X PIN33 33 -750 -50 300 R 50 50 1 1 B 45 | X PIN43 43 -750 -550 300 R 50 50 1 1 B 46 | X PIN53 53 -750 -1050 300 R 50 50 1 1 B 47 | X PIN63 63 -750 -1550 300 R 50 50 1 1 B 48 | X PIN14 14 750 950 300 L 50 50 1 1 B 49 | X PIN24 24 750 450 300 L 50 50 1 1 B 50 | X PIN34 34 750 -50 300 L 50 50 1 1 B 51 | X PIN44 44 750 -550 300 L 50 50 1 1 B 52 | X PIN54 54 750 -1050 300 L 50 50 1 1 B 53 | X PIN64 64 750 -1550 300 L 50 50 1 1 B 54 | X PIN15 15 -750 850 300 R 50 50 1 1 B 55 | X PIN25 25 -750 350 300 R 50 50 1 1 B 56 | X PIN35 35 -750 -150 300 R 50 50 1 1 B 57 | X PIN45 45 -750 -650 300 R 50 50 1 1 B 58 | X PIN55 55 -750 -1150 300 R 50 50 1 1 B 59 | X PIN16 16 750 850 300 L 50 50 1 1 B 60 | X PIN26 26 750 350 300 L 50 50 1 1 B 61 | X PIN36 36 750 -150 300 L 50 50 1 1 B 62 | X PIN46 46 750 -650 300 L 50 50 1 1 B 63 | X PIN56 56 750 -1150 300 L 50 50 1 1 B 64 | X PIN17 17 -750 750 300 R 50 50 1 1 B 65 | X PIN27 27 -750 250 300 R 50 50 1 1 B 66 | X PIN37 37 -750 -250 300 R 50 50 1 1 B 67 | X PIN47 47 -750 -750 300 R 50 50 1 1 B 68 | X PIN57 57 -750 -1250 300 R 50 50 1 1 B 69 | X PIN18 18 750 750 300 L 50 50 1 1 B 70 | X PIN28 28 750 250 300 L 50 50 1 1 B 71 | X PIN38 38 750 -250 300 L 50 50 1 1 B 72 | X PIN48 48 750 -750 300 L 50 50 1 1 B 73 | X PIN58 58 750 -1250 300 L 50 50 1 1 B 74 | X PIN19 19 -750 650 300 R 50 50 1 1 B 75 | X PIN29 29 -750 150 300 R 50 50 1 1 B 76 | X PIN39 39 -750 -350 300 R 50 50 1 1 B 77 | X PIN49 49 -750 -850 300 R 50 50 1 1 B 78 | X PIN59 59 -750 -1350 300 R 50 50 1 1 B 79 | X PIN70 70 750 1350 300 L 50 50 2 1 B 80 | X PIN80 80 750 850 300 L 50 50 2 1 B 81 | X PIN90 90 750 350 300 L 50 50 2 1 B 82 | X PIN71 71 -750 1250 300 R 50 50 2 1 B 83 | X PIN81 81 -750 750 300 R 50 50 2 1 B 84 | X PIN91 91 -750 250 300 R 50 50 2 1 B 85 | X PIN72 72 750 1250 300 L 50 50 2 1 B 86 | X PIN82 82 750 750 300 L 50 50 2 1 B 87 | X PIN92 92 750 250 300 L 50 50 2 1 B 88 | X PIN73 73 -750 1150 300 R 50 50 2 1 B 89 | X PIN83 83 -750 650 300 R 50 50 2 1 B 90 | X PIN93 93 -750 150 300 R 50 50 2 1 B 91 | X PIN74 74 750 1150 300 L 50 50 2 1 B 92 | X PIN84 84 750 650 300 L 50 50 2 1 B 93 | X PIN94 94 750 150 300 L 50 50 2 1 B 94 | X PIN65 65 -750 1550 300 R 50 50 2 1 B 95 | X PIN75 75 -750 1050 300 R 50 50 2 1 B 96 | X PIN85 85 -750 550 300 R 50 50 2 1 B 97 | X PIN95 95 -750 50 300 R 50 50 2 1 B 98 | X PIN66 66 750 1550 300 L 50 50 2 1 B 99 | X PIN76 76 750 1050 300 L 50 50 2 1 B 100 | X PIN86 86 750 550 300 L 50 50 2 1 B 101 | X PIN96 96 750 50 300 L 50 50 2 1 B 102 | X PIN67 67 -750 1450 300 R 50 50 2 1 B 103 | X PIN77 77 -750 950 300 R 50 50 2 1 B 104 | X PIN87 87 -750 450 300 R 50 50 2 1 B 105 | X PIN97 97 -750 -50 300 R 50 50 2 1 B 106 | X PIN68 68 750 1450 300 L 50 50 2 1 B 107 | X PIN78 78 750 950 300 L 50 50 2 1 B 108 | X PIN88 88 750 450 300 L 50 50 2 1 B 109 | X PIN98 98 750 -50 300 L 50 50 2 1 B 110 | X PIN69 69 -750 1350 300 R 50 50 2 1 B 111 | X PIN79 79 -750 850 300 R 50 50 2 1 B 112 | X PIN89 89 -750 350 300 R 50 50 2 1 B 113 | X PIN99 99 -750 -150 300 R 50 50 2 1 B 114 | X PIN100 100 750 -150 300 L 50 50 2 1 B 115 | X PIN110 110 750 -650 300 L 50 50 2 1 B 116 | X PIN120 120 750 -1150 300 L 50 50 2 1 B 117 | X PIN101 101 -750 -250 300 R 50 50 2 1 B 118 | X PIN111 111 -750 -750 300 R 50 50 2 1 B 119 | X PIN121 121 -750 -1250 300 R 50 50 2 1 B 120 | X PIN102 102 750 -250 300 L 50 50 2 1 B 121 | X PIN112 112 750 -750 300 L 50 50 2 1 B 122 | X PIN122 122 750 -1250 300 L 50 50 2 1 B 123 | X PIN103 103 -750 -350 300 R 50 50 2 1 B 124 | X PIN113 113 -750 -850 300 R 50 50 2 1 B 125 | X PIN123 123 -750 -1350 300 R 50 50 2 1 B 126 | X PIN104 104 750 -350 300 L 50 50 2 1 B 127 | X PIN114 114 750 -850 300 L 50 50 2 1 B 128 | X PIN124 124 750 -1350 300 L 50 50 2 1 B 129 | X PIN105 105 -750 -450 300 R 50 50 2 1 B 130 | X PIN115 115 -750 -950 300 R 50 50 2 1 B 131 | X PIN125 125 -750 -1450 300 R 50 50 2 1 B 132 | X PIN106 106 750 -450 300 L 50 50 2 1 B 133 | X PIN116 116 750 -950 300 L 50 50 2 1 B 134 | X PIN126 126 750 -1450 300 L 50 50 2 1 B 135 | X PIN107 107 -750 -550 300 R 50 50 2 1 B 136 | X PIN117 117 -750 -1050 300 R 50 50 2 1 B 137 | X PIN127 127 -750 -1550 300 R 50 50 2 1 B 138 | X PIN108 108 750 -550 300 L 50 50 2 1 B 139 | X PIN118 118 750 -1050 300 L 50 50 2 1 B 140 | X PIN128 128 750 -1550 300 L 50 50 2 1 B 141 | X PIN109 109 -750 -650 300 R 50 50 2 1 B 142 | X PIN119 119 -750 -1150 300 R 50 50 2 1 B 143 | X PIN130 130 750 1550 300 L 50 50 3 1 B 144 | X PIN140 140 750 1050 300 L 50 50 3 1 B 145 | X PIN150 150 750 550 300 L 50 50 3 1 B 146 | X PIN160 160 750 50 300 L 50 50 3 1 B 147 | X PIN170 170 750 -450 300 L 50 50 3 1 B 148 | X PIN180 180 750 -950 300 L 50 50 3 1 B 149 | X PIN190 190 750 -1450 300 L 50 50 3 1 B 150 | X PIN131 131 -750 1450 300 R 50 50 3 1 B 151 | X PIN141 141 -750 950 300 R 50 50 3 1 B 152 | X PIN151 151 -750 450 300 R 50 50 3 1 B 153 | X PIN161 161 -750 -50 300 R 50 50 3 1 B 154 | X PIN171 171 -750 -550 300 R 50 50 3 1 B 155 | X PIN181 181 -750 -1050 300 R 50 50 3 1 B 156 | X PIN191 191 -750 -1550 300 R 50 50 3 1 B 157 | X PIN132 132 750 1450 300 L 50 50 3 1 B 158 | X PIN142 142 750 950 300 L 50 50 3 1 B 159 | X PIN152 152 750 450 300 L 50 50 3 1 B 160 | X PIN162 162 750 -50 300 L 50 50 3 1 B 161 | X PIN172 172 750 -550 300 L 50 50 3 1 B 162 | X PIN182 182 750 -1050 300 L 50 50 3 1 B 163 | X PIN192 192 750 -1550 300 L 50 50 3 1 B 164 | X PIN133 133 -750 1350 300 R 50 50 3 1 B 165 | X PIN143 143 -750 850 300 R 50 50 3 1 B 166 | X PIN153 153 -750 350 300 R 50 50 3 1 B 167 | X PIN163 163 -750 -150 300 R 50 50 3 1 B 168 | X PIN173 173 -750 -650 300 R 50 50 3 1 B 169 | X PIN183 183 -750 -1150 300 R 50 50 3 1 B 170 | X PIN134 134 750 1350 300 L 50 50 3 1 B 171 | X PIN144 144 750 850 300 L 50 50 3 1 B 172 | X PIN154 154 750 350 300 L 50 50 3 1 B 173 | X PIN164 164 750 -150 300 L 50 50 3 1 B 174 | X PIN174 174 750 -650 300 L 50 50 3 1 B 175 | X PIN184 184 750 -1150 300 L 50 50 3 1 B 176 | X PIN135 135 -750 1250 300 R 50 50 3 1 B 177 | X PIN145 145 -750 750 300 R 50 50 3 1 B 178 | X PIN155 155 -750 250 300 R 50 50 3 1 B 179 | X PIN165 165 -750 -250 300 R 50 50 3 1 B 180 | X PIN175 175 -750 -750 300 R 50 50 3 1 B 181 | X PIN185 185 -750 -1250 300 R 50 50 3 1 B 182 | X PIN136 136 750 1250 300 L 50 50 3 1 B 183 | X PIN146 146 750 750 300 L 50 50 3 1 B 184 | X PIN156 156 750 250 300 L 50 50 3 1 B 185 | X PIN166 166 750 -250 300 L 50 50 3 1 B 186 | X PIN176 176 750 -750 300 L 50 50 3 1 B 187 | X PIN186 186 750 -1250 300 L 50 50 3 1 B 188 | X PIN137 137 -750 1150 300 R 50 50 3 1 B 189 | X PIN147 147 -750 650 300 R 50 50 3 1 B 190 | X PIN157 157 -750 150 300 R 50 50 3 1 B 191 | X PIN167 167 -750 -350 300 R 50 50 3 1 B 192 | X PIN177 177 -750 -850 300 R 50 50 3 1 B 193 | X PIN187 187 -750 -1350 300 R 50 50 3 1 B 194 | X PIN138 138 750 1150 300 L 50 50 3 1 B 195 | X PIN148 148 750 650 300 L 50 50 3 1 B 196 | X PIN158 158 750 150 300 L 50 50 3 1 B 197 | X PIN168 168 750 -350 300 L 50 50 3 1 B 198 | X PIN178 178 750 -850 300 L 50 50 3 1 B 199 | X PIN188 188 750 -1350 300 L 50 50 3 1 B 200 | X PIN129 129 -750 1550 300 R 50 50 3 1 B 201 | X PIN139 139 -750 1050 300 R 50 50 3 1 B 202 | X PIN149 149 -750 550 300 R 50 50 3 1 B 203 | X PIN159 159 -750 50 300 R 50 50 3 1 B 204 | X PIN169 169 -750 -450 300 R 50 50 3 1 B 205 | X PIN179 179 -750 -950 300 R 50 50 3 1 B 206 | X PIN189 189 -750 -1450 300 R 50 50 3 1 B 207 | ENDDRAW 208 | ENDDEF 209 | # 210 | #End Library 211 | -------------------------------------------------------------------------------- /libraries/hsmc.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # QTH-090-01-L-D-A 5 | # 6 | DEF QTH-090-01-L-D-A CON 0 40 Y Y 3 F N 7 | F0 "CON" 0 -1650 50 H V C CNN 8 | F1 "QTH-090-01-L-D-A" 0 1650 50 H V C CNN 9 | F2 "MODULE" 0 100 50 H I C CNN 10 | F3 "DOCUMENTATION" 0 -100 50 H I C CNN 11 | DRAW 12 | S -450 -1750 450 1750 1 0 0 N 13 | S -450 -1750 450 1750 2 0 0 N 14 | S -450 -1750 450 1750 3 0 0 N 15 | X PIN1 1 -750 1550 300 R 50 50 1 1 B 16 | X PIN2 2 750 1550 300 L 50 50 1 1 B 17 | X PIN3 3 -750 1450 300 R 50 50 1 1 B 18 | X PIN4 4 750 1450 300 L 50 50 1 1 B 19 | X PIN5 5 -750 1350 300 R 50 50 1 1 B 20 | X PIN6 6 750 1350 300 L 50 50 1 1 B 21 | X PIN7 7 -750 1250 300 R 50 50 1 1 B 22 | X PIN8 8 750 1250 300 L 50 50 1 1 B 23 | X PIN9 9 -750 1150 300 R 50 50 1 1 B 24 | X PIN10 10 750 1150 300 L 50 50 1 1 B 25 | X PIN20 20 750 650 300 L 50 50 1 1 B 26 | X PIN30 30 750 150 300 L 50 50 1 1 B 27 | X PIN40 40 750 -350 300 L 50 50 1 1 B 28 | X PIN50 50 750 -850 300 L 50 50 1 1 B 29 | X PIN60 60 750 -1350 300 L 50 50 1 1 B 30 | X PIN11 11 -750 1050 300 R 50 50 1 1 B 31 | X PIN21 21 -750 550 300 R 50 50 1 1 B 32 | X PIN31 31 -750 50 300 R 50 50 1 1 B 33 | X PIN41 41 -750 -450 300 R 50 50 1 1 B 34 | X PIN51 51 -750 -950 300 R 50 50 1 1 B 35 | X PIN61 61 -750 -1450 300 R 50 50 1 1 B 36 | X PIN12 12 750 1050 300 L 50 50 1 1 B 37 | X PIN22 22 750 550 300 L 50 50 1 1 B 38 | X PIN32 32 750 50 300 L 50 50 1 1 B 39 | X PIN42 42 750 -450 300 L 50 50 1 1 B 40 | X PIN52 52 750 -950 300 L 50 50 1 1 B 41 | X PIN62 62 750 -1450 300 L 50 50 1 1 B 42 | X PIN13 13 -750 950 300 R 50 50 1 1 B 43 | X PIN23 23 -750 450 300 R 50 50 1 1 B 44 | X PIN33 33 -750 -50 300 R 50 50 1 1 B 45 | X PIN43 43 -750 -550 300 R 50 50 1 1 B 46 | X PIN53 53 -750 -1050 300 R 50 50 1 1 B 47 | X PIN63 63 -750 -1550 300 R 50 50 1 1 B 48 | X PIN14 14 750 950 300 L 50 50 1 1 B 49 | X PIN24 24 750 450 300 L 50 50 1 1 B 50 | X PIN34 34 750 -50 300 L 50 50 1 1 B 51 | X PIN44 44 750 -550 300 L 50 50 1 1 B 52 | X PIN54 54 750 -1050 300 L 50 50 1 1 B 53 | X PIN64 64 750 -1550 300 L 50 50 1 1 B 54 | X PIN15 15 -750 850 300 R 50 50 1 1 B 55 | X PIN25 25 -750 350 300 R 50 50 1 1 B 56 | X PIN35 35 -750 -150 300 R 50 50 1 1 B 57 | X PIN45 45 -750 -650 300 R 50 50 1 1 B 58 | X PIN55 55 -750 -1150 300 R 50 50 1 1 B 59 | X PIN16 16 750 850 300 L 50 50 1 1 B 60 | X PIN26 26 750 350 300 L 50 50 1 1 B 61 | X PIN36 36 750 -150 300 L 50 50 1 1 B 62 | X PIN46 46 750 -650 300 L 50 50 1 1 B 63 | X PIN56 56 750 -1150 300 L 50 50 1 1 B 64 | X PIN17 17 -750 750 300 R 50 50 1 1 B 65 | X PIN27 27 -750 250 300 R 50 50 1 1 B 66 | X PIN37 37 -750 -250 300 R 50 50 1 1 B 67 | X PIN47 47 -750 -750 300 R 50 50 1 1 B 68 | X PIN57 57 -750 -1250 300 R 50 50 1 1 B 69 | X PIN18 18 750 750 300 L 50 50 1 1 B 70 | X PIN28 28 750 250 300 L 50 50 1 1 B 71 | X PIN38 38 750 -250 300 L 50 50 1 1 B 72 | X PIN48 48 750 -750 300 L 50 50 1 1 B 73 | X PIN58 58 750 -1250 300 L 50 50 1 1 B 74 | X PIN19 19 -750 650 300 R 50 50 1 1 B 75 | X PIN29 29 -750 150 300 R 50 50 1 1 B 76 | X PIN39 39 -750 -350 300 R 50 50 1 1 B 77 | X PIN49 49 -750 -850 300 R 50 50 1 1 B 78 | X PIN59 59 -750 -1350 300 R 50 50 1 1 B 79 | X PIN70 70 750 1350 300 L 50 50 2 1 B 80 | X PIN80 80 750 850 300 L 50 50 2 1 B 81 | X PIN90 90 750 350 300 L 50 50 2 1 B 82 | X PIN71 71 -750 1250 300 R 50 50 2 1 B 83 | X PIN81 81 -750 750 300 R 50 50 2 1 B 84 | X PIN91 91 -750 250 300 R 50 50 2 1 B 85 | X PIN72 72 750 1250 300 L 50 50 2 1 B 86 | X PIN82 82 750 750 300 L 50 50 2 1 B 87 | X PIN92 92 750 250 300 L 50 50 2 1 B 88 | X PIN73 73 -750 1150 300 R 50 50 2 1 B 89 | X PIN83 83 -750 650 300 R 50 50 2 1 B 90 | X PIN93 93 -750 150 300 R 50 50 2 1 B 91 | X PIN74 74 750 1150 300 L 50 50 2 1 B 92 | X PIN84 84 750 650 300 L 50 50 2 1 B 93 | X PIN94 94 750 150 300 L 50 50 2 1 B 94 | X PIN65 65 -750 1550 300 R 50 50 2 1 B 95 | X PIN75 75 -750 1050 300 R 50 50 2 1 B 96 | X PIN85 85 -750 550 300 R 50 50 2 1 B 97 | X PIN95 95 -750 50 300 R 50 50 2 1 B 98 | X PIN66 66 750 1550 300 L 50 50 2 1 B 99 | X PIN76 76 750 1050 300 L 50 50 2 1 B 100 | X PIN86 86 750 550 300 L 50 50 2 1 B 101 | X PIN96 96 750 50 300 L 50 50 2 1 B 102 | X PIN67 67 -750 1450 300 R 50 50 2 1 B 103 | X PIN77 77 -750 950 300 R 50 50 2 1 B 104 | X PIN87 87 -750 450 300 R 50 50 2 1 B 105 | X PIN97 97 -750 -50 300 R 50 50 2 1 B 106 | X PIN68 68 750 1450 300 L 50 50 2 1 B 107 | X PIN78 78 750 950 300 L 50 50 2 1 B 108 | X PIN88 88 750 450 300 L 50 50 2 1 B 109 | X PIN98 98 750 -50 300 L 50 50 2 1 B 110 | X PIN69 69 -750 1350 300 R 50 50 2 1 B 111 | X PIN79 79 -750 850 300 R 50 50 2 1 B 112 | X PIN89 89 -750 350 300 R 50 50 2 1 B 113 | X PIN99 99 -750 -150 300 R 50 50 2 1 B 114 | X PIN100 100 750 -150 300 L 50 50 2 1 B 115 | X PIN110 110 750 -650 300 L 50 50 2 1 B 116 | X PIN120 120 750 -1150 300 L 50 50 2 1 B 117 | X PIN101 101 -750 -250 300 R 50 50 2 1 B 118 | X PIN111 111 -750 -750 300 R 50 50 2 1 B 119 | X PIN121 121 -750 -1250 300 R 50 50 2 1 B 120 | X PIN102 102 750 -250 300 L 50 50 2 1 B 121 | X PIN112 112 750 -750 300 L 50 50 2 1 B 122 | X PIN122 122 750 -1250 300 L 50 50 2 1 B 123 | X PIN103 103 -750 -350 300 R 50 50 2 1 B 124 | X PIN113 113 -750 -850 300 R 50 50 2 1 B 125 | X PIN123 123 -750 -1350 300 R 50 50 2 1 B 126 | X PIN104 104 750 -350 300 L 50 50 2 1 B 127 | X PIN114 114 750 -850 300 L 50 50 2 1 B 128 | X PIN124 124 750 -1350 300 L 50 50 2 1 B 129 | X PIN105 105 -750 -450 300 R 50 50 2 1 B 130 | X PIN115 115 -750 -950 300 R 50 50 2 1 B 131 | X PIN125 125 -750 -1450 300 R 50 50 2 1 B 132 | X PIN106 106 750 -450 300 L 50 50 2 1 B 133 | X PIN116 116 750 -950 300 L 50 50 2 1 B 134 | X PIN126 126 750 -1450 300 L 50 50 2 1 B 135 | X PIN107 107 -750 -550 300 R 50 50 2 1 B 136 | X PIN117 117 -750 -1050 300 R 50 50 2 1 B 137 | X PIN127 127 -750 -1550 300 R 50 50 2 1 B 138 | X PIN108 108 750 -550 300 L 50 50 2 1 B 139 | X PIN118 118 750 -1050 300 L 50 50 2 1 B 140 | X PIN128 128 750 -1550 300 L 50 50 2 1 B 141 | X PIN109 109 -750 -650 300 R 50 50 2 1 B 142 | X PIN119 119 -750 -1150 300 R 50 50 2 1 B 143 | X PIN130 130 750 1550 300 L 50 50 3 1 B 144 | X PIN140 140 750 1050 300 L 50 50 3 1 B 145 | X PIN150 150 750 550 300 L 50 50 3 1 B 146 | X PIN160 160 750 50 300 L 50 50 3 1 B 147 | X PIN170 170 750 -450 300 L 50 50 3 1 B 148 | X PIN180 180 750 -950 300 L 50 50 3 1 B 149 | X PIN190 190 750 -1450 300 L 50 50 3 1 B 150 | X PIN131 131 -750 1450 300 R 50 50 3 1 B 151 | X PIN141 141 -750 950 300 R 50 50 3 1 B 152 | X PIN151 151 -750 450 300 R 50 50 3 1 B 153 | X PIN161 161 -750 -50 300 R 50 50 3 1 B 154 | X PIN171 171 -750 -550 300 R 50 50 3 1 B 155 | X PIN181 181 -750 -1050 300 R 50 50 3 1 B 156 | X PIN191 191 -750 -1550 300 R 50 50 3 1 B 157 | X PIN132 132 750 1450 300 L 50 50 3 1 B 158 | X PIN142 142 750 950 300 L 50 50 3 1 B 159 | X PIN152 152 750 450 300 L 50 50 3 1 B 160 | X PIN162 162 750 -50 300 L 50 50 3 1 B 161 | X PIN172 172 750 -550 300 L 50 50 3 1 B 162 | X PIN182 182 750 -1050 300 L 50 50 3 1 B 163 | X PIN192 192 750 -1550 300 L 50 50 3 1 B 164 | X PIN133 133 -750 1350 300 R 50 50 3 1 B 165 | X PIN143 143 -750 850 300 R 50 50 3 1 B 166 | X PIN153 153 -750 350 300 R 50 50 3 1 B 167 | X PIN163 163 -750 -150 300 R 50 50 3 1 B 168 | X PIN173 173 -750 -650 300 R 50 50 3 1 B 169 | X PIN183 183 -750 -1150 300 R 50 50 3 1 B 170 | X PIN134 134 750 1350 300 L 50 50 3 1 B 171 | X PIN144 144 750 850 300 L 50 50 3 1 B 172 | X PIN154 154 750 350 300 L 50 50 3 1 B 173 | X PIN164 164 750 -150 300 L 50 50 3 1 B 174 | X PIN174 174 750 -650 300 L 50 50 3 1 B 175 | X PIN184 184 750 -1150 300 L 50 50 3 1 B 176 | X PIN135 135 -750 1250 300 R 50 50 3 1 B 177 | X PIN145 145 -750 750 300 R 50 50 3 1 B 178 | X PIN155 155 -750 250 300 R 50 50 3 1 B 179 | X PIN165 165 -750 -250 300 R 50 50 3 1 B 180 | X PIN175 175 -750 -750 300 R 50 50 3 1 B 181 | X PIN185 185 -750 -1250 300 R 50 50 3 1 B 182 | X PIN136 136 750 1250 300 L 50 50 3 1 B 183 | X PIN146 146 750 750 300 L 50 50 3 1 B 184 | X PIN156 156 750 250 300 L 50 50 3 1 B 185 | X PIN166 166 750 -250 300 L 50 50 3 1 B 186 | X PIN176 176 750 -750 300 L 50 50 3 1 B 187 | X PIN186 186 750 -1250 300 L 50 50 3 1 B 188 | X PIN137 137 -750 1150 300 R 50 50 3 1 B 189 | X PIN147 147 -750 650 300 R 50 50 3 1 B 190 | X PIN157 157 -750 150 300 R 50 50 3 1 B 191 | X PIN167 167 -750 -350 300 R 50 50 3 1 B 192 | X PIN177 177 -750 -850 300 R 50 50 3 1 B 193 | X PIN187 187 -750 -1350 300 R 50 50 3 1 B 194 | X PIN138 138 750 1150 300 L 50 50 3 1 B 195 | X PIN148 148 750 650 300 L 50 50 3 1 B 196 | X PIN158 158 750 150 300 L 50 50 3 1 B 197 | X PIN168 168 750 -350 300 L 50 50 3 1 B 198 | X PIN178 178 750 -850 300 L 50 50 3 1 B 199 | X PIN188 188 750 -1350 300 L 50 50 3 1 B 200 | X PIN129 129 -750 1550 300 R 50 50 3 1 B 201 | X PIN139 139 -750 1050 300 R 50 50 3 1 B 202 | X PIN149 149 -750 550 300 R 50 50 3 1 B 203 | X PIN159 159 -750 50 300 R 50 50 3 1 B 204 | X PIN169 169 -750 -450 300 R 50 50 3 1 B 205 | X PIN179 179 -750 -950 300 R 50 50 3 1 B 206 | X PIN189 189 -750 -1450 300 R 50 50 3 1 B 207 | ENDDRAW 208 | ENDDEF 209 | # 210 | #End Library 211 | -------------------------------------------------------------------------------- /dp-to-hsmc/dp-to-hsmc-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # QTH-090-01-L-D-A 5 | # 6 | DEF QTH-090-01-L-D-A CON 0 40 Y Y 3 F N 7 | F0 "CON" 0 -1650 50 H V C CNN 8 | F1 "QTH-090-01-L-D-A" 0 1650 50 H V C CNN 9 | F2 "MODULE" 0 100 50 H I C CNN 10 | F3 "DOCUMENTATION" 0 -100 50 H I C CNN 11 | DRAW 12 | S -450 -1750 450 1750 1 0 0 N 13 | S -450 -1750 450 1750 2 0 0 N 14 | S -450 -1750 450 1750 3 0 0 N 15 | X PIN1 1 -750 1550 300 R 50 50 1 1 B 16 | X PIN2 2 750 1550 300 L 50 50 1 1 B 17 | X PIN3 3 -750 1450 300 R 50 50 1 1 B 18 | X PIN4 4 750 1450 300 L 50 50 1 1 B 19 | X PIN5 5 -750 1350 300 R 50 50 1 1 B 20 | X PIN6 6 750 1350 300 L 50 50 1 1 B 21 | X PIN7 7 -750 1250 300 R 50 50 1 1 B 22 | X PIN8 8 750 1250 300 L 50 50 1 1 B 23 | X PIN9 9 -750 1150 300 R 50 50 1 1 B 24 | X PIN10 10 750 1150 300 L 50 50 1 1 B 25 | X PIN20 20 750 650 300 L 50 50 1 1 B 26 | X PIN30 30 750 150 300 L 50 50 1 1 B 27 | X PIN40 40 750 -350 300 L 50 50 1 1 B 28 | X PIN50 50 750 -850 300 L 50 50 1 1 B 29 | X PIN60 60 750 -1350 300 L 50 50 1 1 B 30 | X PIN11 11 -750 1050 300 R 50 50 1 1 B 31 | X PIN21 21 -750 550 300 R 50 50 1 1 B 32 | X PIN31 31 -750 50 300 R 50 50 1 1 B 33 | X PIN41 41 -750 -450 300 R 50 50 1 1 B 34 | X PIN51 51 -750 -950 300 R 50 50 1 1 B 35 | X PIN61 61 -750 -1450 300 R 50 50 1 1 B 36 | X PIN12 12 750 1050 300 L 50 50 1 1 B 37 | X PIN22 22 750 550 300 L 50 50 1 1 B 38 | X PIN32 32 750 50 300 L 50 50 1 1 B 39 | X PIN42 42 750 -450 300 L 50 50 1 1 B 40 | X PIN52 52 750 -950 300 L 50 50 1 1 B 41 | X PIN62 62 750 -1450 300 L 50 50 1 1 B 42 | X PIN13 13 -750 950 300 R 50 50 1 1 B 43 | X PIN23 23 -750 450 300 R 50 50 1 1 B 44 | X PIN33 33 -750 -50 300 R 50 50 1 1 B 45 | X PIN43 43 -750 -550 300 R 50 50 1 1 B 46 | X PIN53 53 -750 -1050 300 R 50 50 1 1 B 47 | X PIN63 63 -750 -1550 300 R 50 50 1 1 B 48 | X PIN14 14 750 950 300 L 50 50 1 1 B 49 | X PIN24 24 750 450 300 L 50 50 1 1 B 50 | X PIN34 34 750 -50 300 L 50 50 1 1 B 51 | X PIN44 44 750 -550 300 L 50 50 1 1 B 52 | X PIN54 54 750 -1050 300 L 50 50 1 1 B 53 | X PIN64 64 750 -1550 300 L 50 50 1 1 B 54 | X PIN15 15 -750 850 300 R 50 50 1 1 B 55 | X PIN25 25 -750 350 300 R 50 50 1 1 B 56 | X PIN35 35 -750 -150 300 R 50 50 1 1 B 57 | X PIN45 45 -750 -650 300 R 50 50 1 1 B 58 | X PIN55 55 -750 -1150 300 R 50 50 1 1 B 59 | X PIN16 16 750 850 300 L 50 50 1 1 B 60 | X PIN26 26 750 350 300 L 50 50 1 1 B 61 | X PIN36 36 750 -150 300 L 50 50 1 1 B 62 | X PIN46 46 750 -650 300 L 50 50 1 1 B 63 | X PIN56 56 750 -1150 300 L 50 50 1 1 B 64 | X PIN17 17 -750 750 300 R 50 50 1 1 B 65 | X PIN27 27 -750 250 300 R 50 50 1 1 B 66 | X PIN37 37 -750 -250 300 R 50 50 1 1 B 67 | X PIN47 47 -750 -750 300 R 50 50 1 1 B 68 | X PIN57 57 -750 -1250 300 R 50 50 1 1 B 69 | X PIN18 18 750 750 300 L 50 50 1 1 B 70 | X PIN28 28 750 250 300 L 50 50 1 1 B 71 | X PIN38 38 750 -250 300 L 50 50 1 1 B 72 | X PIN48 48 750 -750 300 L 50 50 1 1 B 73 | X PIN58 58 750 -1250 300 L 50 50 1 1 B 74 | X PIN19 19 -750 650 300 R 50 50 1 1 B 75 | X PIN29 29 -750 150 300 R 50 50 1 1 B 76 | X PIN39 39 -750 -350 300 R 50 50 1 1 B 77 | X PIN49 49 -750 -850 300 R 50 50 1 1 B 78 | X PIN59 59 -750 -1350 300 R 50 50 1 1 B 79 | X PIN70 70 750 1350 300 L 50 50 2 1 B 80 | X PIN80 80 750 850 300 L 50 50 2 1 B 81 | X PIN90 90 750 350 300 L 50 50 2 1 B 82 | X PIN71 71 -750 1250 300 R 50 50 2 1 B 83 | X PIN81 81 -750 750 300 R 50 50 2 1 B 84 | X PIN91 91 -750 250 300 R 50 50 2 1 B 85 | X PIN72 72 750 1250 300 L 50 50 2 1 B 86 | X PIN82 82 750 750 300 L 50 50 2 1 B 87 | X PIN92 92 750 250 300 L 50 50 2 1 B 88 | X PIN73 73 -750 1150 300 R 50 50 2 1 B 89 | X PIN83 83 -750 650 300 R 50 50 2 1 B 90 | X PIN93 93 -750 150 300 R 50 50 2 1 B 91 | X PIN74 74 750 1150 300 L 50 50 2 1 B 92 | X PIN84 84 750 650 300 L 50 50 2 1 B 93 | X PIN94 94 750 150 300 L 50 50 2 1 B 94 | X PIN65 65 -750 1550 300 R 50 50 2 1 B 95 | X PIN75 75 -750 1050 300 R 50 50 2 1 B 96 | X PIN85 85 -750 550 300 R 50 50 2 1 B 97 | X PIN95 95 -750 50 300 R 50 50 2 1 B 98 | X PIN66 66 750 1550 300 L 50 50 2 1 B 99 | X PIN76 76 750 1050 300 L 50 50 2 1 B 100 | X PIN86 86 750 550 300 L 50 50 2 1 B 101 | X PIN96 96 750 50 300 L 50 50 2 1 B 102 | X PIN67 67 -750 1450 300 R 50 50 2 1 B 103 | X PIN77 77 -750 950 300 R 50 50 2 1 B 104 | X PIN87 87 -750 450 300 R 50 50 2 1 B 105 | X PIN97 97 -750 -50 300 R 50 50 2 1 B 106 | X PIN68 68 750 1450 300 L 50 50 2 1 B 107 | X PIN78 78 750 950 300 L 50 50 2 1 B 108 | X PIN88 88 750 450 300 L 50 50 2 1 B 109 | X PIN98 98 750 -50 300 L 50 50 2 1 B 110 | X PIN69 69 -750 1350 300 R 50 50 2 1 B 111 | X PIN79 79 -750 850 300 R 50 50 2 1 B 112 | X PIN89 89 -750 350 300 R 50 50 2 1 B 113 | X PIN99 99 -750 -150 300 R 50 50 2 1 B 114 | X PIN100 100 750 -150 300 L 50 50 2 1 B 115 | X PIN110 110 750 -650 300 L 50 50 2 1 B 116 | X PIN120 120 750 -1150 300 L 50 50 2 1 B 117 | X PIN101 101 -750 -250 300 R 50 50 2 1 B 118 | X PIN111 111 -750 -750 300 R 50 50 2 1 B 119 | X PIN121 121 -750 -1250 300 R 50 50 2 1 B 120 | X PIN102 102 750 -250 300 L 50 50 2 1 B 121 | X PIN112 112 750 -750 300 L 50 50 2 1 B 122 | X PIN122 122 750 -1250 300 L 50 50 2 1 B 123 | X PIN103 103 -750 -350 300 R 50 50 2 1 B 124 | X PIN113 113 -750 -850 300 R 50 50 2 1 B 125 | X PIN123 123 -750 -1350 300 R 50 50 2 1 B 126 | X PIN104 104 750 -350 300 L 50 50 2 1 B 127 | X PIN114 114 750 -850 300 L 50 50 2 1 B 128 | X PIN124 124 750 -1350 300 L 50 50 2 1 B 129 | X PIN105 105 -750 -450 300 R 50 50 2 1 B 130 | X PIN115 115 -750 -950 300 R 50 50 2 1 B 131 | X PIN125 125 -750 -1450 300 R 50 50 2 1 B 132 | X PIN106 106 750 -450 300 L 50 50 2 1 B 133 | X PIN116 116 750 -950 300 L 50 50 2 1 B 134 | X PIN126 126 750 -1450 300 L 50 50 2 1 B 135 | X PIN107 107 -750 -550 300 R 50 50 2 1 B 136 | X PIN117 117 -750 -1050 300 R 50 50 2 1 B 137 | X PIN127 127 -750 -1550 300 R 50 50 2 1 B 138 | X PIN108 108 750 -550 300 L 50 50 2 1 B 139 | X PIN118 118 750 -1050 300 L 50 50 2 1 B 140 | X PIN128 128 750 -1550 300 L 50 50 2 1 B 141 | X PIN109 109 -750 -650 300 R 50 50 2 1 B 142 | X PIN119 119 -750 -1150 300 R 50 50 2 1 B 143 | X PIN130 130 750 1550 300 L 50 50 3 1 B 144 | X PIN140 140 750 1050 300 L 50 50 3 1 B 145 | X PIN150 150 750 550 300 L 50 50 3 1 B 146 | X PIN160 160 750 50 300 L 50 50 3 1 B 147 | X PIN170 170 750 -450 300 L 50 50 3 1 B 148 | X PIN180 180 750 -950 300 L 50 50 3 1 B 149 | X PIN190 190 750 -1450 300 L 50 50 3 1 B 150 | X PIN131 131 -750 1450 300 R 50 50 3 1 B 151 | X PIN141 141 -750 950 300 R 50 50 3 1 B 152 | X PIN151 151 -750 450 300 R 50 50 3 1 B 153 | X PIN161 161 -750 -50 300 R 50 50 3 1 B 154 | X PIN171 171 -750 -550 300 R 50 50 3 1 B 155 | X PIN181 181 -750 -1050 300 R 50 50 3 1 B 156 | X PIN191 191 -750 -1550 300 R 50 50 3 1 B 157 | X PIN132 132 750 1450 300 L 50 50 3 1 B 158 | X PIN142 142 750 950 300 L 50 50 3 1 B 159 | X PIN152 152 750 450 300 L 50 50 3 1 B 160 | X PIN162 162 750 -50 300 L 50 50 3 1 B 161 | X PIN172 172 750 -550 300 L 50 50 3 1 B 162 | X PIN182 182 750 -1050 300 L 50 50 3 1 B 163 | X PIN192 192 750 -1550 300 L 50 50 3 1 B 164 | X PIN133 133 -750 1350 300 R 50 50 3 1 B 165 | X PIN143 143 -750 850 300 R 50 50 3 1 B 166 | X PIN153 153 -750 350 300 R 50 50 3 1 B 167 | X PIN163 163 -750 -150 300 R 50 50 3 1 B 168 | X PIN173 173 -750 -650 300 R 50 50 3 1 B 169 | X PIN183 183 -750 -1150 300 R 50 50 3 1 B 170 | X PIN134 134 750 1350 300 L 50 50 3 1 B 171 | X PIN144 144 750 850 300 L 50 50 3 1 B 172 | X PIN154 154 750 350 300 L 50 50 3 1 B 173 | X PIN164 164 750 -150 300 L 50 50 3 1 B 174 | X PIN174 174 750 -650 300 L 50 50 3 1 B 175 | X PIN184 184 750 -1150 300 L 50 50 3 1 B 176 | X PIN135 135 -750 1250 300 R 50 50 3 1 B 177 | X PIN145 145 -750 750 300 R 50 50 3 1 B 178 | X PIN155 155 -750 250 300 R 50 50 3 1 B 179 | X PIN165 165 -750 -250 300 R 50 50 3 1 B 180 | X PIN175 175 -750 -750 300 R 50 50 3 1 B 181 | X PIN185 185 -750 -1250 300 R 50 50 3 1 B 182 | X PIN136 136 750 1250 300 L 50 50 3 1 B 183 | X PIN146 146 750 750 300 L 50 50 3 1 B 184 | X PIN156 156 750 250 300 L 50 50 3 1 B 185 | X PIN166 166 750 -250 300 L 50 50 3 1 B 186 | X PIN176 176 750 -750 300 L 50 50 3 1 B 187 | X PIN186 186 750 -1250 300 L 50 50 3 1 B 188 | X PIN137 137 -750 1150 300 R 50 50 3 1 B 189 | X PIN147 147 -750 650 300 R 50 50 3 1 B 190 | X PIN157 157 -750 150 300 R 50 50 3 1 B 191 | X PIN167 167 -750 -350 300 R 50 50 3 1 B 192 | X PIN177 177 -750 -850 300 R 50 50 3 1 B 193 | X PIN187 187 -750 -1350 300 R 50 50 3 1 B 194 | X PIN138 138 750 1150 300 L 50 50 3 1 B 195 | X PIN148 148 750 650 300 L 50 50 3 1 B 196 | X PIN158 158 750 150 300 L 50 50 3 1 B 197 | X PIN168 168 750 -350 300 L 50 50 3 1 B 198 | X PIN178 178 750 -850 300 L 50 50 3 1 B 199 | X PIN188 188 750 -1350 300 L 50 50 3 1 B 200 | X PIN129 129 -750 1550 300 R 50 50 3 1 B 201 | X PIN139 139 -750 1050 300 R 50 50 3 1 B 202 | X PIN149 149 -750 550 300 R 50 50 3 1 B 203 | X PIN159 159 -750 50 300 R 50 50 3 1 B 204 | X PIN169 169 -750 -450 300 R 50 50 3 1 B 205 | X PIN179 179 -750 -950 300 R 50 50 3 1 B 206 | X PIN189 189 -750 -1450 300 R 50 50 3 1 B 207 | ENDDRAW 208 | ENDDEF 209 | # 210 | #End Library 211 | -------------------------------------------------------------------------------- /dp-aux-intercept/README.md: -------------------------------------------------------------------------------- 1 | 2 | This schematic is design to allow FPGA development boards to intercept and 3 | manipulate the auxiliary signals (plus hotplug and config signals) between a 4 | display port source (such as a computer) and a display port sink (such as a 5 | display). The high speed data lanes are connected directly between the source 6 | and sink and not accessible. 7 | 8 | The AUX signal is bi-directional, half duplex LVDS signal which operates at 9 | ~1.2 Megabit/s on older DisplayPort versions and ~720 Megabit/s in the later 10 | specifications. It carries information device management and control data such 11 | as EDID and DPMS standards. In theory it could also carry a USB signal. 12 | 13 | # Board Manufacturing 14 | 15 | * 5mil (0.127mm) trace width 16 | * 5mil (0.127mm) trace clearance 17 | 18 | * 12 mil (0.3048mm) drill size 19 | * 6 mil (0.1524mm) annular ring 20 | * 24 mil (0.6096mm) via size (6mil+12mil+6mil) 21 | 22 | * 6 mil (0.1524) silkscreen width 23 | 24 | This can be meet by; 25 | * [Hackvana by requesting the 5mil option](https://docs.google.com/document/d/1p6FH25ltGpzJQ5_8fbflDukqEKghiEcpuhJpngth2Is/edit) 26 | * [OHS Park's Four Layer Boards](http://docs.oshpark.com/services/) 27 | 28 | 29 | # Board connectors 30 | 31 | The board breaks out the AUX signals onto two Diligent PMOD compatible headers. 32 | The JAUX jumpers select which PMOD header is currently in use. 33 | 34 | ## PAUX1 Mode 35 | 36 | The first PMOD header labeled PAUX1 is designed to be used by devices which 37 | support switching the direction of their I/O pins quickly enough. It maps both 38 | AUX pairs and the HPD (hot plug) signal into a single PMOD connector. FPGAs 39 | compatible with this are; 40 | 41 | * Spartan 6 when using the DISPLAY_PORT I/O standard (which only supports the 42 | 1.2 Megabit/s mode). 43 | 44 | * Xilinx Series 7 FPGAs such as the Atrix, Zynq or Virtex-7 devices. 45 | 46 | PAUX1 should be connected to the FPGA; 47 | 48 | * Pin 1 - AUX+ signal on computer side, configure 2.5V compatible 49 | bi-directional LVDS. 50 | * Pin 3 - AUX- signal on computer side, configure 2.5V compatible 51 | bi-directional LVDS. 52 | * Pin 5 is NC. 53 | * Pin 7 - HPD on computer side, configure 3.3V compatible LVCMOS33 output. 54 | 55 | * Pin 2 - AUX+ signal on display side, configure 2.5V compatible 56 | bi-directional LVDS. 57 | * Pin 4 - AUX- signal on display side, configure 2.5V compatible 58 | bi-directional LVDS. 59 | * Pin 6 is NC. 60 | * Pin 8 - HPD on display side, configure 3.3V compatible LVCMOS33 input. 61 | 62 | * Pin 9 and Pin 10 - 3.3V - VCC 63 | * Pin 11 and Pin 12 - GND 64 | 65 | When using PAUX1 the board should be configured as follows; 66 | 67 | * All the JAUX jumpers are set to the "1" side (jumping Pin 1 and Pin 2 68 | together). 69 | 70 | * On PCFG1, Pins 5 and Pin 6 should **not be** connected. 71 | (**Dis**connecting the HPD signal from computer to display, allowing the 72 | FPGA to control the HPD signal.) 73 | 74 | * On J**C**CFG1, Pins 5 and Pin 6 should **be** connected. 75 | (Pulling the HPD signal on the **c**omputer side down.) 76 | 77 | * On J**D**CFG1, Pins 5 and Pin 6 should **be** connected. 78 | (Pulling the HPD signal on the **d**isplay side down.) 79 | 80 | ## PAUX2 Mode 81 | 82 | The second PMOD header labeled PAUX2 is designed to be used by devices which 83 | need to use two pairs of LVDS pins connected to each AUX lines. (When using 84 | PAUX2 a second PMOD header the only way to receive the HPD is to use the PCFG1 85 | header.) FPGAs compatible with this header are; 86 | 87 | * Spartan 6 when using the LVDS I/O standard. 88 | 89 | To use PAUX2, you must always make sure the board has the following configured; 90 | 91 | * All the JAUX jumpers are set to the "2" side (jumping Pin 2 and Pin 3 92 | together). 93 | 94 | PAUX2 should be connected to the FPGA in the following way; 95 | 96 | * Pin 1 - AUX+ signal on computer side, configure 2.5V compatible 97 | **output** LVDS. 98 | * Pin 3 - AUX- signal on computer side, configure 2.5V compatible 99 | **output** LVDS. 100 | 101 | * Pin 5 - AUX+ signal on computer side, configure 2.5V compatible 102 | **input** LVDS. 103 | * Pin 7 - AUX- signal on computer side, configure 2.5V compatible 104 | **input** LVDS. 105 | 106 | * Pin 2 - AUX+ signal on display side, configure 2.5V compatible 107 | **output** LVDS. 108 | * Pin 4 - AUX- signal on display side, configure 2.5V compatible 109 | **output** LVDS. 110 | 111 | * Pin 6 - AUX+ signal on display side, configure 2.5V compatible 112 | **input** LVDS. 113 | * Pin 8 - AUX- signal on display side, configure 2.5V compatible 114 | **input** LVDS. 115 | 116 | * Pin 9 and Pin 10 - 3.3V - VCC 117 | * Pin 11 and Pin 12 - GND 118 | 119 | When using PAUX2 the board should be configured in one of two ways. 120 | 121 | If access to the HPD is **needed** follow the instructions for **using** the 122 | PCFG1 expanded signals connector. 123 | 124 | If access to the HPD is **not needed**; 125 | 126 | * On PCFG1, Pins 5 and Pin 6 should **be** connected. 127 | (Connecting the HPD signal from computer to display.) 128 | 129 | * On J**C**CFG1, Pins 5 and Pin 6 should **not be** connected. 130 | (Leaving the HPD signal on the **c**omputer side floating.) 131 | 132 | * On J**D**CFG1, Pins 5 and Pin 6 should **not be** connected. 133 | (Leaving the HPD signal on the **d**isplay side floating.) 134 | 135 | 136 | ## PCFG1 - Expanded signals 137 | 138 | The PCFG1 is also a PMOD compatible header but is found in male form to allow 139 | it to also be used with jumpers. This header provides access to the CONFIG 140 | lines (used with DP++ signaling) and alternative access to the HPD signal when 141 | using PAUX2 mode. 142 | 143 | #### Not using extended signals 144 | 145 | When **not using** PCFG1, the board should be configured as follows; 146 | 147 | * On PCFG1; 148 | * Pin 1 and Pin 2 should **be** connected. 149 | (Connecting CONFIG1 directly from the computer to the display.) 150 | 151 | * Pin 3 and Pin 4 should **be** connected. 152 | (Connecting CONFIG2 directly from the computer to the display.) 153 | 154 | * Pin 5 and Pin 6 should be configured as described in either PAUX1 or PAUX2 155 | section. 156 | 157 | * On J**C**CFG1, 158 | * Pins 1 and Pin 2 should **not be** connected. 159 | (Leaving the CONFIG1 signal on the **c**omputer side floating.) 160 | 161 | * Pins 3 and Pin 4 should **not be** connected. 162 | (Leaving the CONFIG2 signal on the **c**omputer side floating.) 163 | 164 | * Pin 5 and Pin 6 should be configured as described in either PAUX1 or PAUX2 165 | section. 166 | 167 | * On J**D**CFG1, 168 | * Pins 1 and Pin 2 should **not be** connected. 169 | (Leaving the CONFIG1 signal on the **d**isplay side floating.) 170 | 171 | * Pins 3 and Pin 4 should **not be** connected. 172 | (Leaving the CONFIG2 signal on the **d**isplay side floating.) 173 | 174 | * Pin 5 and Pin 7 should be configured as described in either PAUX1 or PAUX2 175 | section. 176 | 177 | 178 | #### Using extended signals 179 | 180 | PCFG1 should be connected to your FPGA. 181 | 182 | * Pin 1 - CONFIG1 on computer side, configure 3.3V compatible LVCMOS33 183 | ?input?. 184 | * Pin 3 - CONFIG2 on computer side, configure 3.3V compatible LVCMOS33 185 | ?input?. 186 | * Pin 5 - HPD on computer side, configure 3.3V compatible LVCMOS33 output. 187 | 188 | * Pin 2 - CONFIG1 on display side, configure 3.3V compatible LVCMOS33 ?input?. 189 | * Pin 4 - CONFIG2 on display side, configure 3.3V compatible LVCMOS33 ?input?. 190 | * Pin 6 - HPD on display side, configure 3.3V compatible LVCMOS33 input. 191 | 192 | When **using** PCFG1, the board should be configured as follows; 193 | 194 | * On J**C**CFG1, 195 | * Pins 1 and Pin 2 should **be** connected. 196 | (Leaving the CONFIG1 signal on the **c**omputer side floating.) 197 | 198 | * Pins 3 and Pin 4 should **not be** connected. 199 | (Leaving the CONFIG2 signal on the **c**omputer side floating.) 200 | 201 | * Pin 4 and Pin 5 should be configured as described in either PAUX1 or PAUX2 202 | section. 203 | 204 | * On J**D**CFG1, 205 | * Pins 1 and Pin 2 should **not be** connected. 206 | (Leaving the CONFIG1 signal on the **d**isplay side floating.) 207 | 208 | * Pins 3 and Pin 4 should **not be** connected. 209 | (Leaving the CONFIG2 signal on the **d**isplay side floating.) 210 | 211 | * Pin 4 and Pin 5 should be configured as described in either PAUX1 or PAUX2 212 | section. 213 | 214 | 215 | * PCFG1 should be connected to the FPGA. Pins 5 and Pin 6 will provide the HPD 216 | signals. 217 | 218 | * On J**C**CFG1, Pins 5 and Pin 6 should **be** connected. 219 | (Pulling the HPD signal on the **c**omputer side down.) 220 | 221 | * On J**D**CFG1, Pins 5 and Pin 6 should **be** connected. 222 | (Pulling the HPD signal on the **d**isplay side down.) 223 | 224 | -------------------------------------------------------------------------------- /libraries/HSMC-DIFF.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # HSMC-DIFF 5 | # 6 | DEF HSMC-DIFF U 0 40 Y Y 3 L N 7 | F0 "U" 0 -1650 50 H V C CNN 8 | F1 "HSMC-DIFF" 0 1650 50 H V C CNN 9 | F2 "QTH-090-01-L-D-A" 0 -150 50 H I C CNN 10 | F3 "DOCUMENTATION" 0 0 50 H I C CNN 11 | DRAW 12 | S -650 -1750 650 1750 1 0 0 N 13 | S -650 -1750 650 1750 2 0 0 N 14 | S -1950 -1750 1950 1750 3 0 0 N 15 | X XCVR_TXp7 1 -950 1550 300 R 50 50 1 1 B 16 | X XCVR_RXp7 2 -950 1450 300 R 50 50 1 1 B 17 | X XCVR_TXn7 3 -950 1350 300 R 50 50 1 1 B 18 | X XCVR_RXn7 4 -950 1250 300 R 50 50 1 1 B 19 | X XCVR_TXp6 5 -950 1150 300 R 50 50 1 1 B 20 | X XCVR_RXp6 6 -950 1050 300 R 50 50 1 1 B 21 | X XCVR_TXn6 7 -950 950 300 R 50 50 1 1 B 22 | X XCVR_RXn6 8 -950 850 300 R 50 50 1 1 B 23 | X XCVR_TXp5 9 -950 750 300 R 50 50 1 1 B 24 | X XCVR_RXp5 10 -950 650 300 R 50 50 1 1 B 25 | X XCVR_RXn3 20 -950 -350 300 R 50 50 1 1 B 26 | X XCVR_RXp0 30 -950 -1350 300 R 50 50 1 1 B 27 | X CLKIN0 40 950 -850 300 L 50 50 1 1 B C 28 | X LVDS_RXn0 50 950 150 300 L 50 50 1 1 B 29 | X LVDS_RXp2 60 950 1150 300 L 50 50 1 1 B 30 | X XCVR_TXn5 11 -950 550 300 R 50 50 1 1 B 31 | X XCVR_TXp2 21 -950 -450 300 R 50 50 1 1 B 32 | X XCVR_TXn0 31 -950 -1450 300 R 50 50 1 1 B 33 | X D0 41 950 -750 300 L 50 50 1 1 B 34 | X 3.3V 51 950 250 300 L 50 50 1 1 w 35 | X LVDS_TXn2 61 950 1250 300 L 50 50 1 1 B 36 | X XCVR_RXn5 12 -950 450 300 R 50 50 1 1 B 37 | X XCVR_RXp2 22 -950 -550 300 R 50 50 1 1 B 38 | X XCVR_RXn0 32 -950 -1550 300 R 50 50 1 1 B 39 | X D1 42 950 -650 300 L 50 50 1 1 B 40 | X 12V 52 950 350 300 L 50 50 1 1 w 41 | X LVDS_RXn2 62 950 1350 300 L 50 50 1 1 B 42 | X XCVR_TXp4 13 -950 350 300 R 50 50 1 1 B 43 | X XCVR_TXn2 23 -950 -650 300 R 50 50 1 1 B 44 | X SDA 33 950 -1550 300 L 50 50 1 1 B 45 | X D2 43 950 -550 300 L 50 50 1 1 B 46 | X LVDS_TXp1 53 950 450 300 L 50 50 1 1 B 47 | X 3.3V 63 950 1450 300 L 50 50 1 1 w 48 | X XCVR_RXp4 14 -950 250 300 R 50 50 1 1 B 49 | X XCVR_RXn2 24 -950 -750 300 R 50 50 1 1 B 50 | X SCL 34 950 -1450 300 L 50 50 1 1 B 51 | X D3 44 950 -450 300 L 50 50 1 1 B 52 | X LVDS_RXp1 54 950 550 300 L 50 50 1 1 B 53 | X 12V 64 950 1550 300 L 50 50 1 1 w 54 | X XCVR_TXn4 15 -950 150 300 R 50 50 1 1 B 55 | X XCVR_TXp1 25 -950 -850 300 R 50 50 1 1 B 56 | X JTAG_TCK 35 950 -1350 300 L 50 50 1 1 B 57 | X 3.3V 45 950 -350 300 L 50 50 1 1 w 58 | X LVDS_TXn1 55 950 650 300 L 50 50 1 1 B 59 | X XCVR_RXn4 16 -950 50 300 R 50 50 1 1 B 60 | X XCVR_RXp1 26 -950 -950 300 R 50 50 1 1 B 61 | X JTAG_TMS 36 950 -1250 300 L 50 50 1 1 B 62 | X 12V 46 950 -250 300 L 50 50 1 1 w 63 | X LVDS_RXn1 56 950 750 300 L 50 50 1 1 B 64 | X XCVR_TXp3 17 -950 -50 300 R 50 50 1 1 B 65 | X XCVR_TXn1 27 -950 -1050 300 R 50 50 1 1 B 66 | X JTAG_TDO 37 950 -1150 300 L 50 50 1 1 B 67 | X LVDS_TXp0 47 950 -150 300 L 50 50 1 1 B 68 | X 3.3V 57 950 850 300 L 50 50 1 1 w 69 | X XCVR_RXp3 18 -950 -150 300 R 50 50 1 1 B 70 | X XCVR_RXn1 28 -950 -1150 300 R 50 50 1 1 B 71 | X JTAG_TDI 38 950 -1050 300 L 50 50 1 1 B 72 | X LVDS_RXp0 48 950 -50 300 L 50 50 1 1 B 73 | X 12V 58 950 950 300 L 50 50 1 1 w 74 | X XCVR_TXn3 19 -950 -250 300 R 50 50 1 1 B 75 | X XCVR_TXp0 29 -950 -1250 300 R 50 50 1 1 B 76 | X CLKOUT0 39 950 -950 300 L 50 50 1 1 B C 77 | X LVDS_TXn0 49 950 50 300 L 50 50 1 1 B 78 | X LVDS_TXp2 59 950 1050 300 L 50 50 1 1 B 79 | X 12V 70 -950 1050 300 R 50 50 2 1 w 80 | X LVDS_RXn5 80 -950 50 300 R 50 50 2 1 B 81 | X CLKIN1p 90 -950 -950 300 R 50 50 2 1 B 82 | X LVDS_TXp4 71 -950 950 300 R 50 50 2 1 B 83 | X 3.3V 81 -950 -50 300 R 50 50 2 1 w 84 | X CLKOUT1n 91 -950 -1050 300 R 50 50 2 1 B 85 | X LVDS_RXp4 72 -950 850 300 R 50 50 2 1 B 86 | X 12V 82 -950 -150 300 R 50 50 2 1 w 87 | X CLKIN1n 92 -950 -1150 300 R 50 50 2 1 B 88 | X LVDS_TXn4 73 -950 750 300 R 50 50 2 1 B 89 | X LVDS_TXp6 83 -950 -250 300 R 50 50 2 1 B 90 | X 3.3V 93 -950 -1250 300 R 50 50 2 1 w 91 | X LVDS_RXn4 74 -950 650 300 R 50 50 2 1 B 92 | X LVDS_RXp6 84 -950 -350 300 R 50 50 2 1 B 93 | X 12V 94 -950 -1350 300 R 50 50 2 1 w 94 | X LVDS_TXp3 65 -950 1550 300 R 50 50 2 1 B 95 | X 3.3V 75 -950 550 300 R 50 50 2 1 w 96 | X LVDS_TXn6 85 -950 -450 300 R 50 50 2 1 B 97 | X LVDS_TXp7 95 -950 -1450 300 R 50 50 2 1 B 98 | X LVDS_RXp3 66 -950 1450 300 R 50 50 2 1 B 99 | X 12V 76 -950 450 300 R 50 50 2 1 w 100 | X LVDS_RXn6 86 -950 -550 300 R 50 50 2 1 B 101 | X LVDS_RXp7 96 -950 -1550 300 R 50 50 2 1 B 102 | X LVDS_TXn3 67 -950 1350 300 R 50 50 2 1 B 103 | X LVDS_TXp5 77 -950 350 300 R 50 50 2 1 B 104 | X 3.3V 87 -950 -650 300 R 50 50 2 1 w 105 | X LVDS_TXn7 97 950 -1550 300 L 50 50 2 1 B 106 | X LVDS_RXn3 68 -950 1250 300 R 50 50 2 1 B 107 | X LVDS_RXp5 78 -950 250 300 R 50 50 2 1 B 108 | X 12V 88 -950 -750 300 R 50 50 2 1 w 109 | X LVDS_RXn7 98 950 -1450 300 L 50 50 2 1 B 110 | X 3.3V 69 -950 1150 300 R 50 50 2 1 w 111 | X LVDS_TXn5 79 -950 150 300 R 50 50 2 1 B 112 | X CLKOUT1p 89 -950 -850 300 R 50 50 2 1 B 113 | X 3.3V 99 950 -1350 300 L 50 50 2 1 w 114 | X 12V 100 950 -1250 300 L 50 50 2 1 w 115 | X LVDS_RXn9 110 950 -250 300 L 50 50 2 1 B 116 | X LVDS_RXp11 120 950 750 300 L 50 50 2 1 B 117 | X LVDS_TXp8 101 950 -1150 300 L 50 50 2 1 B 118 | X 3.3V 111 950 -150 300 L 50 50 2 1 w 119 | X LVDS_TXn11 121 950 850 300 L 50 50 2 1 B 120 | X LVDS_RXp8 102 950 -1050 300 L 50 50 2 1 B 121 | X 12V 112 950 -50 300 L 50 50 2 1 w 122 | X LVDS_RXn11 122 950 950 300 L 50 50 2 1 B 123 | X LVDS_TXn8 103 950 -950 300 L 50 50 2 1 B 124 | X LVDS_TXp10 113 950 50 300 L 50 50 2 1 B 125 | X 3.3V 123 950 1050 300 L 50 50 2 1 w 126 | X LVDS_RXn8 104 950 -850 300 L 50 50 2 1 B 127 | X LVDS_RXp10 114 950 150 300 L 50 50 2 1 B 128 | X 12V 124 950 1150 300 L 50 50 2 1 w 129 | X 3.3V 105 950 -750 300 L 50 50 2 1 w 130 | X LVDS_TXn10 115 950 250 300 L 50 50 2 1 B 131 | X LVDS_TXp12 125 950 1250 300 L 50 50 2 1 B 132 | X 12V 106 950 -650 300 L 50 50 2 1 w 133 | X LVDS_RXn10 116 950 350 300 L 50 50 2 1 B 134 | X LVDS_RXp12 126 950 1350 300 L 50 50 2 1 B 135 | X LVDS_TXp9 107 950 -550 300 L 50 50 2 1 B 136 | X 3.3V 117 950 450 300 L 50 50 2 1 w 137 | X LVDS_TXn12 127 950 1450 300 L 50 50 2 1 B 138 | X LVDS_RXp9 108 950 -450 300 L 50 50 2 1 B 139 | X 12V 118 950 550 300 L 50 50 2 1 w 140 | X LVDS_RXn12 128 950 1550 300 L 50 50 2 1 B 141 | X LVDS_TXn9 109 950 -350 300 L 50 50 2 1 B 142 | X LVDS_TXp11 119 950 650 300 L 50 50 2 1 B 143 | X 12V 130 -2250 1450 300 R 50 50 3 1 w 144 | X LVDS_RXn14 140 -2250 450 300 R 50 50 3 1 B 145 | X LVDS_RXp16 150 -2250 -550 300 R 50 50 3 1 B 146 | X PSNTn 160 -2250 -1550 300 R 50 50 3 1 B 147 | X GND 170 -350 -2050 300 U 50 50 3 1 W 148 | X GND 180 650 -2050 300 U 50 50 3 1 W 149 | X GND 190 2250 -1250 300 L 50 50 3 1 W 150 | X LVDS_TXp13 131 -2250 1350 300 R 50 50 3 1 B 151 | X 3.3V 141 -2250 350 300 R 50 50 3 1 w 152 | X LVDS_TXn16 151 -2250 -650 300 R 50 50 3 1 B 153 | X GND 161 -1250 -2050 300 U 50 50 3 1 W 154 | X GND 171 -250 -2050 300 U 50 50 3 1 W 155 | X GND 181 750 -2050 300 U 50 50 3 1 W 156 | X GND 191 2250 -1150 300 L 50 50 3 1 W 157 | X LVDS_RXp13 132 -2250 1250 300 R 50 50 3 1 B 158 | X 12V 142 -2250 250 300 R 50 50 3 1 w 159 | X LVDS_RXn16 152 -2250 -750 300 R 50 50 3 1 B 160 | X GND 162 -1150 -2050 300 U 50 50 3 1 W 161 | X GND 172 -150 -2050 300 U 50 50 3 1 W 162 | X GND 182 850 -2050 300 U 50 50 3 1 W 163 | X GND 192 2250 -1050 300 L 50 50 3 1 W 164 | X LVDS_TXn13 133 -2250 1150 300 R 50 50 3 1 B 165 | X LVDS_TXp15 143 -2250 150 300 R 50 50 3 1 B 166 | X 3.3V 153 -2250 -850 300 R 50 50 3 1 w 167 | X GND 163 -1050 -2050 300 U 50 50 3 1 W 168 | X GND 173 -50 -2050 300 U 50 50 3 1 W 169 | X GND 183 950 -2050 300 U 50 50 3 1 W 170 | X LVDS_RXn13 134 -2250 1050 300 R 50 50 3 1 B 171 | X LVDS_RXp15 144 -2250 50 300 R 50 50 3 1 B 172 | X 12V 154 -2250 -950 300 R 50 50 3 1 w 173 | X GND 164 -950 -2050 300 U 50 50 3 1 W 174 | X GND 174 50 -2050 300 U 50 50 3 1 W 175 | X GND 184 1050 -2050 300 U 50 50 3 1 W 176 | X 3.3V 135 -2250 950 300 R 50 50 3 1 w 177 | X LVDS_TXn15 145 -2250 -50 300 R 50 50 3 1 B 178 | X CLKOUT2p 155 -2250 -1050 300 R 50 50 3 1 B 179 | X GND 165 -850 -2050 300 U 50 50 3 1 W 180 | X GND 175 150 -2050 300 U 50 50 3 1 W 181 | X GND 185 1150 -2050 300 U 50 50 3 1 W 182 | X 12V 136 -2250 850 300 R 50 50 3 1 w 183 | X LVDS_RXn15 146 -2250 -150 300 R 50 50 3 1 B 184 | X CLKIN2p 156 -2250 -1150 300 R 50 50 3 1 B 185 | X GND 166 -750 -2050 300 U 50 50 3 1 W 186 | X GND 176 250 -2050 300 U 50 50 3 1 W 187 | X GND 186 1250 -2050 300 U 50 50 3 1 W 188 | X LVDS_TXp14 137 -2250 750 300 R 50 50 3 1 B 189 | X 3.3V 147 -2250 -250 300 R 50 50 3 1 w 190 | X CLKOUT2n 157 -2250 -1250 300 R 50 50 3 1 B 191 | X GND 167 -650 -2050 300 U 50 50 3 1 W 192 | X GND 177 350 -2050 300 U 50 50 3 1 W 193 | X GND 187 2250 -1550 300 L 50 50 3 1 W 194 | X LVDS_RXp14 138 -2250 650 300 R 50 50 3 1 B 195 | X 12V 148 -2250 -350 300 R 50 50 3 1 w 196 | X CLKIN2n 158 -2250 -1350 300 R 50 50 3 1 B 197 | X GND 168 -550 -2050 300 U 50 50 3 1 W 198 | X GND 178 450 -2050 300 U 50 50 3 1 W 199 | X GND 188 2250 -1450 300 L 50 50 3 1 W 200 | X 3.3V 129 -2250 1550 300 R 50 50 3 1 w 201 | X LVDS_TXn14 139 -2250 550 300 R 50 50 3 1 B 202 | X LVDS_TXp16 149 -2250 -450 300 R 50 50 3 1 B 203 | X 3.3V 159 -2250 -1450 300 R 50 50 3 1 w 204 | X GND 169 -450 -2050 300 U 50 50 3 1 W 205 | X GND 179 550 -2050 300 U 50 50 3 1 W 206 | X GND 189 2250 -1350 300 L 50 50 3 1 W 207 | ENDDRAW 208 | ENDDEF 209 | # 210 | #End Library 211 | -------------------------------------------------------------------------------- /dp-to-pcie/dp-to-pcie.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 2 2 | LIBS:power 3 | LIBS:device 4 | LIBS:transistors 5 | LIBS:conn 6 | LIBS:linear 7 | LIBS:regul 8 | LIBS:74xx 9 | LIBS:cmos4000 10 | LIBS:adc-dac 11 | LIBS:memory 12 | LIBS:xilinx 13 | LIBS:microcontrollers 14 | LIBS:dsp 15 | LIBS:microchip 16 | LIBS:analog_switches 17 | LIBS:motorola 18 | LIBS:texas 19 | LIBS:intel 20 | LIBS:audio 21 | LIBS:interface 22 | LIBS:digital-audio 23 | LIBS:philips 24 | LIBS:display 25 | LIBS:cypress 26 | LIBS:siliconi 27 | LIBS:opto 28 | LIBS:atmel 29 | LIBS:contrib 30 | LIBS:valves 31 | LIBS:display_port 32 | LIBS:timvideos-pcie-8x 33 | EELAYER 25 0 34 | EELAYER END 35 | $Descr A4 11693 8268 36 | encoding utf-8 37 | Sheet 1 1 38 | Title "" 39 | Date "" 40 | Rev "" 41 | Comp "" 42 | Comment1 "" 43 | Comment2 "" 44 | Comment3 "" 45 | Comment4 "" 46 | $EndDescr 47 | $Comp 48 | L TIMVIDEOS-PCIE-8X U? 49 | U 1 1 557BF484 50 | P 5910 3940 51 | F 0 "U?" H 5910 1090 60 0000 C CNN 52 | F 1 "TIMVIDEOS-PCIE-8X" H 5260 1090 60 0000 C CNN 53 | F 2 "" H 4610 3640 60 0000 C CNN 54 | F 3 "" H 4610 3640 60 0000 C CNN 55 | 1 5910 3940 56 | 1 0 0 -1 57 | $EndComp 58 | $Comp 59 | L DISPLAY_PORT DRX1 60 | U 1 1 557BFAB5 61 | P 2370 3640 62 | F 0 "DRX1" H 1770 4740 60 0000 C CNN 63 | F 1 "DISPLAY_PORT" V 2520 3640 60 0000 C CNN 64 | F 2 "" H 2320 3640 60 0000 C CNN 65 | F 3 "" H 2320 3640 60 0000 C CNN 66 | 1 2370 3640 67 | -1 0 0 -1 68 | $EndComp 69 | $Comp 70 | L DISPLAY_PORT DTX1 71 | U 1 1 557C04D0 72 | P 8620 3840 73 | F 0 "DTX1" H 8020 4940 60 0000 C CNN 74 | F 1 "DISPLAY_PORT" V 8770 3840 60 0000 C CNN 75 | F 2 "" H 8570 3840 60 0000 C CNN 76 | F 3 "" H 8570 3840 60 0000 C CNN 77 | 1 8620 3840 78 | 1 0 0 -1 79 | $EndComp 80 | Wire Wire Line 81 | 4610 2740 3220 2740 82 | Wire Wire Line 83 | 4610 2840 3420 2840 84 | Wire Wire Line 85 | 3420 2840 3420 2940 86 | Wire Wire Line 87 | 3420 2940 3220 2940 88 | Wire Wire Line 89 | 3220 2840 3350 2840 90 | Wire Wire Line 91 | 3350 3140 3220 3140 92 | Wire Wire Line 93 | 3350 2840 3350 3140 94 | Connection ~ 3350 3135 95 | Wire Wire Line 96 | 3220 3440 3350 3440 97 | Connection ~ 3350 3440 98 | Wire Wire Line 99 | 3350 3740 3220 3740 100 | Connection ~ 3350 3740 101 | Wire Wire Line 102 | 3350 4240 3220 4240 103 | Connection ~ 3350 4240 104 | Wire Wire Line 105 | 3350 4540 3220 4540 106 | Connection ~ 3350 4540 107 | Wire Wire Line 108 | 4610 1540 4510 1540 109 | Wire Wire Line 110 | 4510 1540 4510 6880 111 | Wire Wire Line 112 | 4610 1840 4510 1840 113 | Connection ~ 4510 1840 114 | Wire Wire Line 115 | 4610 2640 4510 2640 116 | Connection ~ 4510 2640 117 | Wire Wire Line 118 | 4610 2940 4510 2940 119 | Connection ~ 4510 2940 120 | Wire Wire Line 121 | 4610 3140 4510 3140 122 | Connection ~ 4510 3140 123 | Wire Wire Line 124 | 4610 3540 4510 3540 125 | Connection ~ 4510 3540 126 | Wire Wire Line 127 | 4610 3640 4510 3640 128 | Connection ~ 4510 3640 129 | Wire Wire Line 130 | 4610 3940 4510 3940 131 | Connection ~ 4510 3940 132 | Wire Wire Line 133 | 4610 4040 4510 4040 134 | Connection ~ 4510 4040 135 | Wire Wire Line 136 | 4610 4340 4510 4340 137 | Connection ~ 4510 4340 138 | Wire Wire Line 139 | 3350 4740 4610 4740 140 | Connection ~ 4510 4740 141 | Wire Wire Line 142 | 4610 5040 4510 5040 143 | Connection ~ 4510 5040 144 | Wire Wire Line 145 | 4610 5140 4510 5140 146 | Connection ~ 4510 5140 147 | Wire Wire Line 148 | 4610 5440 4510 5440 149 | Connection ~ 4510 5440 150 | Wire Wire Line 151 | 4610 5540 4510 5540 152 | Connection ~ 4510 5540 153 | Wire Wire Line 154 | 4610 5840 4510 5840 155 | Connection ~ 4510 5840 156 | Wire Wire Line 157 | 4610 5940 4510 5940 158 | Connection ~ 4510 5940 159 | Wire Wire Line 160 | 4610 6240 4510 6240 161 | Connection ~ 4510 6240 162 | Wire Wire Line 163 | 4610 6440 4510 6440 164 | Wire Wire Line 165 | 4510 6440 4510 6450 166 | Connection ~ 4510 6450 167 | Wire Wire Line 168 | 4610 3340 4350 3340 169 | Wire Wire Line 170 | 4350 3340 4350 3040 171 | Wire Wire Line 172 | 4350 3040 3220 3040 173 | Wire Wire Line 174 | 4320 3140 4320 3440 175 | Wire Wire Line 176 | 4320 3440 4610 3440 177 | Wire Wire Line 178 | 4610 3740 4280 3740 179 | Wire Wire Line 180 | 4280 3740 4280 3340 181 | Wire Wire Line 182 | 4280 3340 3220 3340 183 | Wire Wire Line 184 | 4250 3840 4610 3840 185 | Wire Wire Line 186 | 4250 3430 4250 3840 187 | Wire Wire Line 188 | 4610 4140 4210 4140 189 | Wire Wire Line 190 | 4210 4140 4210 3640 191 | Wire Wire Line 192 | 4210 3640 3220 3640 193 | Wire Wire Line 194 | 4180 3730 4180 4240 195 | Wire Wire Line 196 | 4180 4240 4610 4240 197 | Wire Wire Line 198 | 6310 1540 6420 1540 199 | Wire Wire Line 200 | 6420 1540 6420 6880 201 | Wire Wire Line 202 | 6420 6880 4510 6880 203 | Wire Wire Line 204 | 6310 2940 7770 2940 205 | Wire Wire Line 206 | 3350 3135 3350 4740 207 | Wire Wire Line 208 | 7770 3040 7670 3040 209 | Wire Wire Line 210 | 7670 3040 7670 4950 211 | Wire Wire Line 212 | 7770 3340 7670 3340 213 | Connection ~ 7670 3340 214 | Wire Wire Line 215 | 7770 3640 7670 3640 216 | Connection ~ 7670 3640 217 | Wire Wire Line 218 | 7770 3940 7670 3940 219 | Connection ~ 7670 3940 220 | Wire Wire Line 221 | 7770 4440 7670 4440 222 | Connection ~ 7670 4440 223 | Wire Wire Line 224 | 6310 2540 6420 2540 225 | Connection ~ 6420 2540 226 | Wire Wire Line 227 | 6310 2840 6420 2840 228 | Connection ~ 6420 2840 229 | Wire Wire Line 230 | 6310 3140 6420 3140 231 | Connection ~ 6420 3140 232 | Wire Wire Line 233 | 6310 3440 6420 3440 234 | Connection ~ 6420 3440 235 | Wire Wire Line 236 | 6310 3740 6420 3740 237 | Connection ~ 6420 3740 238 | Wire Wire Line 239 | 6310 3840 6420 3840 240 | Connection ~ 6420 3840 241 | Wire Wire Line 242 | 6310 4140 6420 4140 243 | Connection ~ 6420 4140 244 | Wire Wire Line 245 | 6310 4240 6420 4240 246 | Connection ~ 6420 4240 247 | Wire Wire Line 248 | 6310 4540 6420 4540 249 | Connection ~ 6420 4540 250 | Wire Wire Line 251 | 7770 3140 6670 3140 252 | Wire Wire Line 253 | 6670 3140 6670 3040 254 | Wire Wire Line 255 | 6670 3040 6310 3040 256 | Wire Wire Line 257 | 6310 3540 6670 3540 258 | Wire Wire Line 259 | 6670 3540 6670 3240 260 | Wire Wire Line 261 | 6670 3240 7770 3240 262 | Wire Wire Line 263 | 6310 3640 6700 3640 264 | Wire Wire Line 265 | 6700 3640 6700 3440 266 | Wire Wire Line 267 | 6700 3440 7770 3440 268 | Wire Wire Line 269 | 6310 3940 6790 3940 270 | Wire Wire Line 271 | 6790 3940 6790 3540 272 | Wire Wire Line 273 | 6790 3540 7770 3540 274 | Wire Wire Line 275 | 6310 4040 6820 4040 276 | Wire Wire Line 277 | 6820 4040 6820 3740 278 | Wire Wire Line 279 | 6820 3740 7770 3740 280 | Wire Wire Line 281 | 6310 4340 6910 4340 282 | Wire Wire Line 283 | 6910 4340 6910 3840 284 | Wire Wire Line 285 | 6910 3840 7770 3840 286 | Wire Wire Line 287 | 7770 4040 6930 4040 288 | Wire Wire Line 289 | 6930 4040 6930 4440 290 | Wire Wire Line 291 | 6930 4440 6310 4440 292 | Wire Wire Line 293 | 4510 1440 4610 1440 294 | Wire Wire Line 295 | 4510 920 4510 1440 296 | Wire Wire Line 297 | 4510 920 6420 920 298 | Wire Wire Line 299 | 6420 920 6420 1440 300 | Wire Wire Line 301 | 6420 1440 6310 1440 302 | Wire Wire Line 303 | 6310 1340 6420 1340 304 | Connection ~ 6420 1340 305 | Wire Wire Line 306 | 4610 1340 4510 1340 307 | Connection ~ 4510 1340 308 | Wire Wire Line 309 | 4610 1240 4510 1240 310 | Connection ~ 4510 1240 311 | Wire Wire Line 312 | 4220 2140 4610 2140 313 | Wire Wire Line 314 | 4220 690 4220 2140 315 | Wire Wire Line 316 | 4610 1940 4220 1940 317 | Connection ~ 4220 1940 318 | Wire Wire Line 319 | 6580 2140 6310 2140 320 | Wire Wire Line 321 | 6580 690 6580 2140 322 | Wire Wire Line 323 | 6580 690 4220 690 324 | Wire Wire Line 325 | 6310 2040 6580 2040 326 | Connection ~ 6580 2040 327 | Wire Wire Line 328 | 6310 1640 6970 1640 329 | Wire Wire Line 330 | 6970 1740 6310 1740 331 | Wire Wire Line 332 | 6310 1840 6970 1840 333 | Wire Wire Line 334 | 6310 1940 6970 1940 335 | $Comp 336 | L CONN_02X04 P? 337 | U 1 1 557C1921 338 | P 7220 1790 339 | F 0 "P?" H 7220 2040 50 0000 C CNN 340 | F 1 "CONN_02X04" H 7220 1540 50 0000 C CNN 341 | F 2 "" H 7220 590 60 0000 C CNN 342 | F 3 "" H 7220 590 60 0000 C CNN 343 | 1 7220 1790 344 | 1 0 0 -1 345 | $EndComp 346 | Text Label 3830 2740 0 60 ~ 0 347 | DRX0_P 348 | Text Label 3830 2840 0 60 ~ 0 349 | DRX0_N 350 | Text Label 3830 3140 0 60 ~ 0 351 | DRX1_N 352 | Text Label 3830 3430 0 60 ~ 0 353 | DRX2_N 354 | Text Label 3830 3730 0 60 ~ 0 355 | DRX3_N 356 | Text Label 3830 3040 0 60 ~ 0 357 | DRX1_P 358 | Text Label 3830 3340 0 60 ~ 0 359 | DRX2_P 360 | Text Label 3830 3640 0 60 ~ 0 361 | DRX3_P 362 | Wire Wire Line 363 | 3220 3240 3420 3240 364 | Wire Wire Line 365 | 3420 3240 3420 3140 366 | Wire Wire Line 367 | 3420 3140 4320 3140 368 | Wire Wire Line 369 | 3220 3540 3420 3540 370 | Wire Wire Line 371 | 3420 3540 3420 3430 372 | Wire Wire Line 373 | 3420 3430 4250 3430 374 | Wire Wire Line 375 | 3220 3840 3420 3840 376 | Wire Wire Line 377 | 3420 3840 3420 3730 378 | Wire Wire Line 379 | 3420 3730 4180 3730 380 | $Comp 381 | L SW_PUSH_SMALL SW? 382 | U 1 1 557C1E81 383 | P 9300 1690 384 | F 0 "SW?" H 9450 1800 30 0000 C CNN 385 | F 1 "SW_PUSH_SMALL" H 9300 1611 30 0000 C CNN 386 | F 2 "" H 9300 1690 60 0000 C CNN 387 | F 3 "" H 9300 1690 60 0000 C CNN 388 | 1 9300 1690 389 | 1 0 0 -1 390 | $EndComp 391 | Wire Wire Line 392 | 6310 2640 7710 2640 393 | Wire Wire Line 394 | 7710 2640 7710 2180 395 | Wire Wire Line 396 | 7710 2180 8410 2180 397 | Wire Wire Line 398 | 6310 2740 7740 2740 399 | Wire Wire Line 400 | 7740 2740 7740 2260 401 | Wire Wire Line 402 | 7740 2260 8450 2260 403 | Wire Wire Line 404 | 6310 2240 7640 2240 405 | Wire Wire Line 406 | 7640 2240 7640 1950 407 | Wire Wire Line 408 | 7640 1950 8510 1950 409 | Text Label 6670 2240 0 60 ~ 0 410 | ~RST 411 | Text Label 6520 2640 0 60 ~ 0 412 | EXTCLK_P 413 | Text Label 6520 2740 0 60 ~ 0 414 | EXTCLK_N 415 | $EndSCHEMATC 416 | -------------------------------------------------------------------------------- /libraries/timvideos-pcie-8x.pretty/timvideos-pcie-8x.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PCIe_98Pos (layer F.Cu) (tedit 553765C6) 2 | (fp_text reference U25 (at -17.727 3.624 90) (layer F.SilkS) 3 | (effects (font (size 1.016 1.016) (thickness 0.254))) 4 | ) 5 | (fp_text value TIMVIDEOS-PCIE-8X (at 0.1 11.3) (layer F.SilkS) hide 6 | (effects (font (thickness 0.3048))) 7 | ) 8 | (fp_line (start -16 0) (end -16 -5) (layer F.SilkS) (width 0.15)) 9 | (fp_line (start -16 -5) (end 41 -5) (layer F.SilkS) (width 0.15)) 10 | (fp_line (start 41 -5) (end 42 -5) (layer F.SilkS) (width 0.15)) 11 | (fp_line (start 42 -5) (end 42 5) (layer F.SilkS) (width 0.15)) 12 | (fp_line (start 42 5) (end -16 5) (layer F.SilkS) (width 0.15)) 13 | (fp_line (start -16 5) (end -16 0) (layer F.SilkS) (width 0.15)) 14 | (pad "" np_thru_hole circle (at 40.15 0) (size 2.45 2.45) (drill 2.45) (layers *.Cu *.Mask F.SilkS)) 15 | (pad "" np_thru_hole circle (at 0 0) (size 2.45 2.45) (drill 2.45) (layers *.Cu *.Mask F.SilkS)) 16 | (pad A1 thru_hole rect (at -11.65 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 17 | (pad A2 thru_hole circle (at -10.65 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 18 | (pad A3 thru_hole circle (at -9.65 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 19 | (pad A4 thru_hole circle (at -8.65 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 20 | (pad A5 thru_hole circle (at -7.65 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 21 | (pad A6 thru_hole circle (at -6.65 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 22 | (pad A7 thru_hole circle (at -5.65 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 23 | (pad A8 thru_hole circle (at -4.65 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 24 | (pad A9 thru_hole circle (at -3.65 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 25 | (pad A10 thru_hole circle (at -2.65 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 26 | (pad A11 thru_hole circle (at -1.65 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 27 | (pad A12 thru_hole circle (at 1.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 28 | (pad A13 thru_hole circle (at 2.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 29 | (pad A14 thru_hole circle (at 3.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 30 | (pad A15 thru_hole circle (at 4.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 31 | (pad A16 thru_hole circle (at 5.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 32 | (pad A17 thru_hole circle (at 6.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 33 | (pad A18 thru_hole circle (at 7.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 34 | (pad A19 thru_hole circle (at 8.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 35 | (pad A20 thru_hole circle (at 9.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 36 | (pad A21 thru_hole circle (at 10.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 37 | (pad A22 thru_hole circle (at 11.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 38 | (pad A23 thru_hole circle (at 12.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 39 | (pad A24 thru_hole circle (at 13.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 40 | (pad A25 thru_hole circle (at 14.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 41 | (pad A26 thru_hole circle (at 15.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 42 | (pad A27 thru_hole circle (at 16.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 43 | (pad A28 thru_hole circle (at 17.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 44 | (pad A29 thru_hole circle (at 18.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 45 | (pad A30 thru_hole circle (at 19.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 46 | (pad A31 thru_hole circle (at 20.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 47 | (pad A32 thru_hole circle (at 21.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 48 | (pad A33 thru_hole circle (at 22.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 49 | (pad A34 thru_hole circle (at 23.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 50 | (pad A35 thru_hole circle (at 24.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 51 | (pad A36 thru_hole circle (at 25.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 52 | (pad A37 thru_hole circle (at 26.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 53 | (pad A38 thru_hole circle (at 27.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 54 | (pad A39 thru_hole circle (at 28.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 55 | (pad A40 thru_hole circle (at 29.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 56 | (pad A41 thru_hole circle (at 30.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 57 | (pad A42 thru_hole circle (at 31.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 58 | (pad A43 thru_hole circle (at 32.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 59 | (pad A44 thru_hole circle (at 33.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 60 | (pad A45 thru_hole circle (at 34.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 61 | (pad A46 thru_hole circle (at 35.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 62 | (pad A47 thru_hole circle (at 36.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 63 | (pad A48 thru_hole circle (at 37.35 -3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 64 | (pad B1 thru_hole circle (at -11.65 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 65 | (pad B2 thru_hole circle (at -10.65 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 66 | (pad B3 thru_hole circle (at -9.65 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 67 | (pad B4 thru_hole circle (at -8.65 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 68 | (pad B5 thru_hole circle (at -7.65 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 69 | (pad B6 thru_hole circle (at -6.65 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 70 | (pad B7 thru_hole circle (at -5.65 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 71 | (pad B8 thru_hole circle (at -4.65 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 72 | (pad B9 thru_hole circle (at -3.65 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 73 | (pad B10 thru_hole circle (at -2.65 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 74 | (pad B11 thru_hole circle (at -1.65 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 75 | (pad B12 thru_hole circle (at 1.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 76 | (pad B13 thru_hole circle (at 2.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 77 | (pad B14 thru_hole circle (at 3.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 78 | (pad B15 thru_hole circle (at 4.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 79 | (pad B16 thru_hole circle (at 5.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 80 | (pad B17 thru_hole circle (at 6.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 81 | (pad B18 thru_hole circle (at 7.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 82 | (pad B19 thru_hole circle (at 8.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 83 | (pad B20 thru_hole circle (at 9.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 84 | (pad B21 thru_hole circle (at 10.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 85 | (pad B22 thru_hole circle (at 11.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 86 | (pad B23 thru_hole circle (at 12.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 87 | (pad B24 thru_hole circle (at 13.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 88 | (pad B25 thru_hole circle (at 14.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 89 | (pad B26 thru_hole circle (at 15.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 90 | (pad B27 thru_hole circle (at 16.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 91 | (pad B28 thru_hole circle (at 17.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 92 | (pad B29 thru_hole circle (at 18.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 93 | (pad B30 thru_hole circle (at 19.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 94 | (pad B31 thru_hole circle (at 20.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 95 | (pad B32 thru_hole circle (at 21.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 96 | (pad B33 thru_hole circle (at 22.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 97 | (pad B34 thru_hole circle (at 23.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 98 | (pad B35 thru_hole circle (at 24.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 99 | (pad B36 thru_hole circle (at 25.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 100 | (pad B37 thru_hole circle (at 26.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 101 | (pad B38 thru_hole circle (at 27.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 102 | (pad B39 thru_hole circle (at 28.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 103 | (pad B40 thru_hole circle (at 29.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 104 | (pad B41 thru_hole circle (at 30.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 105 | (pad B42 thru_hole circle (at 31.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 106 | (pad B43 thru_hole circle (at 32.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 107 | (pad B44 thru_hole circle (at 33.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 108 | (pad B45 thru_hole circle (at 34.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 109 | (pad B46 thru_hole circle (at 35.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 110 | (pad B47 thru_hole circle (at 36.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 111 | (pad B48 thru_hole circle (at 37.35 3.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 112 | (pad A49 thru_hole circle (at 38.35 -1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 113 | (pad B49 thru_hole circle (at 38.35 1.25) (size 1.2 1.2) (drill 0.78) (layers *.Cu *.Mask F.SilkS)) 114 | ) 115 | -------------------------------------------------------------------------------- /dp-aux-intercept/dp-aux-intercept.net: -------------------------------------------------------------------------------- 1 | (export (version D) 2 | (design 3 | (source /home/tansell/foss/hardware/displayport-hardware-hacking/dp-aux-intercept/dp-aux-intercept.sch) 4 | (date "Mon 29 Jun 2015 00:27:15 AEST") 5 | (tool "Eeschema 0.201506252249+5822~23~ubuntu14.04.1-product") 6 | (sheet (number 1) (name /) (tstamps /) 7 | (title_block 8 | (title "DisplayPort AUX Signals Interceptor Board") 9 | (company "Author: Tim 'mithro' Ansell") 10 | (rev) 11 | (date) 12 | (source dp-aux-intercept.sch) 13 | (comment (number 1) (value "License: CC-BY-SA 4.0 International")) 14 | (comment (number 2) (value "")) 15 | (comment (number 3) (value "")) 16 | (comment (number 4) (value ""))))) 17 | (components 18 | (comp (ref DPC1) 19 | (value DISPLAY_PORT) 20 | (footprint 2040204-1:2040210-1) 21 | (libsource (lib display_port) (part DISPLAY_PORT)) 22 | (sheetpath (names /) (tstamps /)) 23 | (tstamp 557BFC21)) 24 | (comp (ref DPD1) 25 | (value DISPLAY_PORT) 26 | (footprint 2040204-1:2040210-1) 27 | (libsource (lib display_port) (part DISPLAY_PORT)) 28 | (sheetpath (names /) (tstamps /)) 29 | (tstamp 557BFD1C)) 30 | (comp (ref PCFG1) 31 | (value CONN_02X06) 32 | (footprint Pin_Headers:Pin_Header_Straight_2x06) 33 | (libsource (lib conn) (part CONN_02X06)) 34 | (sheetpath (names /) (tstamps /)) 35 | (tstamp 557C0681)) 36 | (comp (ref RDCFG1) 37 | (value 1M) 38 | (footprint Resistors_SMD:R_0603_HandSoldering) 39 | (libsource (lib device) (part R)) 40 | (sheetpath (names /) (tstamps /)) 41 | (tstamp 557C1AF8)) 42 | (comp (ref RDCFG2) 43 | (value 5M) 44 | (footprint Resistors_SMD:R_0603_HandSoldering) 45 | (libsource (lib device) (part R)) 46 | (sheetpath (names /) (tstamps /)) 47 | (tstamp 557C1BC9)) 48 | (comp (ref RDHPD1) 49 | (value 100K) 50 | (footprint Resistors_SMD:R_0603_HandSoldering) 51 | (libsource (lib device) (part R)) 52 | (sheetpath (names /) (tstamps /)) 53 | (tstamp 557C1C66)) 54 | (comp (ref JDCFG1) 55 | (value CONN_02X03) 56 | (footprint Pin_Headers:Pin_Header_Straight_2x03) 57 | (libsource (lib conn) (part CONN_02X03)) 58 | (sheetpath (names /) (tstamps /)) 59 | (tstamp 557C1F39)) 60 | (comp (ref RCCFG1) 61 | (value 1M) 62 | (footprint Resistors_SMD:R_0603_HandSoldering) 63 | (libsource (lib device) (part R)) 64 | (sheetpath (names /) (tstamps /)) 65 | (tstamp 557C25E8)) 66 | (comp (ref RCCFG2) 67 | (value 5M) 68 | (footprint Resistors_SMD:R_0603_HandSoldering) 69 | (libsource (lib device) (part R)) 70 | (sheetpath (names /) (tstamps /)) 71 | (tstamp 557C25F4)) 72 | (comp (ref RCHPD1) 73 | (value 100K) 74 | (footprint Resistors_SMD:R_0603_HandSoldering) 75 | (libsource (lib device) (part R)) 76 | (sheetpath (names /) (tstamps /)) 77 | (tstamp 557C25FA)) 78 | (comp (ref JCCFG1) 79 | (value CONN_02X03) 80 | (footprint Pin_Headers:Pin_Header_Straight_2x03) 81 | (libsource (lib conn) (part CONN_02X03)) 82 | (sheetpath (names /) (tstamps /)) 83 | (tstamp 557C2606)) 84 | (comp (ref RCAP1) 85 | (value 100K) 86 | (footprint Resistors_SMD:R_0603_HandSoldering) 87 | (libsource (lib device) (part R)) 88 | (sheetpath (names /) (tstamps /)) 89 | (tstamp 557C4A36)) 90 | (comp (ref RCAN1) 91 | (value 100K) 92 | (footprint Resistors_SMD:R_0603_HandSoldering) 93 | (libsource (lib device) (part R)) 94 | (sheetpath (names /) (tstamps /)) 95 | (tstamp 557C4ADA)) 96 | (comp (ref RCAP2) 97 | (value 50) 98 | (footprint Resistors_SMD:R_0603_HandSoldering) 99 | (libsource (lib device) (part R)) 100 | (sheetpath (names /) (tstamps /)) 101 | (tstamp 557C4B50)) 102 | (comp (ref RCAN2) 103 | (value 50) 104 | (footprint Resistors_SMD:R_0603_HandSoldering) 105 | (libsource (lib device) (part R)) 106 | (sheetpath (names /) (tstamps /)) 107 | (tstamp 557C4BC4)) 108 | (comp (ref CCAP1) 109 | (value C) 110 | (footprint Capacitors_SMD:C_0805_HandSoldering) 111 | (libsource (lib device) (part C)) 112 | (sheetpath (names /) (tstamps /)) 113 | (tstamp 557C4C4E)) 114 | (comp (ref CCAN1) 115 | (value C) 116 | (footprint Capacitors_SMD:C_0805_HandSoldering) 117 | (libsource (lib device) (part C)) 118 | (sheetpath (names /) (tstamps /)) 119 | (tstamp 557C4D19)) 120 | (comp (ref RDAP2) 121 | (value 50) 122 | (footprint Resistors_SMD:R_0603_HandSoldering) 123 | (libsource (lib device) (part R)) 124 | (sheetpath (names /) (tstamps /)) 125 | (tstamp 557C69F5)) 126 | (comp (ref RDAN2) 127 | (value 50) 128 | (footprint Resistors_SMD:R_0603_HandSoldering) 129 | (libsource (lib device) (part R)) 130 | (sheetpath (names /) (tstamps /)) 131 | (tstamp 557C69FB)) 132 | (comp (ref RDAP1) 133 | (value 10K) 134 | (footprint Resistors_SMD:R_0603_HandSoldering) 135 | (libsource (lib device) (part R)) 136 | (sheetpath (names /) (tstamps /)) 137 | (tstamp 557C6A01)) 138 | (comp (ref RDAN1) 139 | (value 10K) 140 | (footprint Resistors_SMD:R_0603_HandSoldering) 141 | (libsource (lib device) (part R)) 142 | (sheetpath (names /) (tstamps /)) 143 | (tstamp 557C6A07)) 144 | (comp (ref CDAP1) 145 | (value C) 146 | (footprint Capacitors_SMD:C_0805_HandSoldering) 147 | (libsource (lib device) (part C)) 148 | (sheetpath (names /) (tstamps /)) 149 | (tstamp 557C6A0D)) 150 | (comp (ref CDAN1) 151 | (value C) 152 | (footprint Capacitors_SMD:C_0805_HandSoldering) 153 | (libsource (lib device) (part C)) 154 | (sheetpath (names /) (tstamps /)) 155 | (tstamp 557C6A13)) 156 | (comp (ref PAUX1) 157 | (value CONN_02X10) 158 | (footprint Socket_Strips:Socket_Strip_Angled_2x10) 159 | (libsource (lib conn) (part CONN_02X10)) 160 | (sheetpath (names /) (tstamps /)) 161 | (tstamp 55800EEB))) 162 | (libparts 163 | (libpart (lib conn) (part CONN_02X03) 164 | (footprints 165 | (fp Pin_Header_Straight_2X03) 166 | (fp Pin_Header_Angled_2X03) 167 | (fp Socket_Strip_Straight_2X03) 168 | (fp Socket_Strip_Angled_2X03)) 169 | (fields 170 | (field (name Reference) P) 171 | (field (name Value) CONN_02X03)) 172 | (pins 173 | (pin (num 1) (name P1) (type passive)) 174 | (pin (num 2) (name P2) (type passive)) 175 | (pin (num 3) (name P3) (type passive)) 176 | (pin (num 4) (name P4) (type passive)) 177 | (pin (num 5) (name P5) (type passive)) 178 | (pin (num 6) (name P6) (type passive)))) 179 | (libpart (lib conn) (part CONN_02X06) 180 | (footprints 181 | (fp Pin_Header_Straight_2X06) 182 | (fp Pin_Header_Angled_2X06) 183 | (fp Socket_Strip_Straight_2X06) 184 | (fp Socket_Strip_Angled_2X06)) 185 | (fields 186 | (field (name Reference) P) 187 | (field (name Value) CONN_02X06)) 188 | (pins 189 | (pin (num 1) (name P1) (type passive)) 190 | (pin (num 2) (name P2) (type passive)) 191 | (pin (num 3) (name P3) (type passive)) 192 | (pin (num 4) (name P4) (type passive)) 193 | (pin (num 5) (name P5) (type passive)) 194 | (pin (num 6) (name P6) (type passive)) 195 | (pin (num 7) (name P7) (type passive)) 196 | (pin (num 8) (name P8) (type passive)) 197 | (pin (num 9) (name P9) (type passive)) 198 | (pin (num 10) (name P10) (type passive)) 199 | (pin (num 11) (name P11) (type passive)) 200 | (pin (num 12) (name P12) (type passive)))) 201 | (libpart (lib conn) (part CONN_02X10) 202 | (footprints 203 | (fp Pin_Header_Straight_2X10) 204 | (fp Pin_Header_Angled_2X10) 205 | (fp Socket_Strip_Straight_2X10) 206 | (fp Socket_Strip_Angled_2X10)) 207 | (fields 208 | (field (name Reference) P) 209 | (field (name Value) CONN_02X10)) 210 | (pins 211 | (pin (num 1) (name P1) (type passive)) 212 | (pin (num 2) (name P2) (type passive)) 213 | (pin (num 3) (name P3) (type passive)) 214 | (pin (num 4) (name P4) (type passive)) 215 | (pin (num 5) (name P5) (type passive)) 216 | (pin (num 6) (name P6) (type passive)) 217 | (pin (num 7) (name P7) (type passive)) 218 | (pin (num 8) (name P8) (type passive)) 219 | (pin (num 9) (name P9) (type passive)) 220 | (pin (num 10) (name P10) (type passive)) 221 | (pin (num 11) (name P11) (type passive)) 222 | (pin (num 12) (name P12) (type passive)) 223 | (pin (num 13) (name P13) (type passive)) 224 | (pin (num 14) (name P14) (type passive)) 225 | (pin (num 15) (name P15) (type passive)) 226 | (pin (num 16) (name P16) (type passive)) 227 | (pin (num 17) (name P17) (type passive)) 228 | (pin (num 18) (name P18) (type passive)) 229 | (pin (num 19) (name P19) (type passive)) 230 | (pin (num 20) (name P20) (type passive)))) 231 | (libpart (lib device) (part C) 232 | (description "Unpolarized capacitor") 233 | (footprints 234 | (fp C?) 235 | (fp C_????_*) 236 | (fp C_????) 237 | (fp SMD*_c) 238 | (fp Capacitor*)) 239 | (fields 240 | (field (name Reference) C) 241 | (field (name Value) C)) 242 | (pins 243 | (pin (num 1) (name ~) (type passive)) 244 | (pin (num 2) (name ~) (type passive)))) 245 | (libpart (lib device) (part R) 246 | (description Resistor) 247 | (footprints 248 | (fp R_*) 249 | (fp Resistor_*)) 250 | (fields 251 | (field (name Reference) R) 252 | (field (name Value) R)) 253 | (pins 254 | (pin (num 1) (name ~) (type passive)) 255 | (pin (num 2) (name ~) (type passive)))) 256 | (libpart (lib display_port) (part DISPLAY_PORT) 257 | (fields 258 | (field (name Reference) J) 259 | (field (name Value) DISPLAY_PORT)) 260 | (pins 261 | (pin (num 1) (name ML_LaneP0) (type BiDi)) 262 | (pin (num 2) (name GND) (type power_in)) 263 | (pin (num 3) (name ML_LaneN0) (type BiDi)) 264 | (pin (num 4) (name ML_LaneP1) (type BiDi)) 265 | (pin (num 5) (name GND) (type power_in)) 266 | (pin (num 6) (name ML_LaneN1) (type BiDi)) 267 | (pin (num 7) (name ML_LaneP2) (type BiDi)) 268 | (pin (num 8) (name GND) (type power_in)) 269 | (pin (num 9) (name ML_LaneN2) (type BiDi)) 270 | (pin (num 10) (name ML_LaneP3) (type BiDi)) 271 | (pin (num 11) (name GND) (type BiDi)) 272 | (pin (num 12) (name ML_LaneN3) (type BiDi)) 273 | (pin (num 13) (name CONFIG1) (type BiDi)) 274 | (pin (num 14) (name CONFIG2) (type passive)) 275 | (pin (num 15) (name AUXCH_P) (type BiDi)) 276 | (pin (num 16) (name GND) (type BiDi)) 277 | (pin (num 17) (name AUXCH_N) (type BiDi)) 278 | (pin (num 18) (name HPD) (type input)) 279 | (pin (num 19) (name RETURN) (type BiDi)) 280 | (pin (num 20) (name DP_PWR) (type BiDi))))) 281 | (libraries 282 | (library (logical conn) 283 | (uri /usr/share/kicad/library/conn.lib)) 284 | (library (logical device) 285 | (uri /usr/share/kicad/library/device.lib)) 286 | (library (logical display_port) 287 | (uri /home/tansell/foss/hardware/displayport-hardware-hacking/libraries/display_port.lib))) 288 | (nets 289 | (net (code 1) (name GND) 290 | (node (ref PAUX1) (pin 18)) 291 | (node (ref PAUX1) (pin 17)) 292 | (node (ref PAUX1) (pin 4)) 293 | (node (ref PAUX1) (pin 3)) 294 | (node (ref DPD1) (pin 11)) 295 | (node (ref DPC1) (pin 16)) 296 | (node (ref DPC1) (pin 11)) 297 | (node (ref DPC1) (pin 8)) 298 | (node (ref DPC1) (pin 5)) 299 | (node (ref DPC1) (pin 2)) 300 | (node (ref DPD1) (pin 16)) 301 | (node (ref DPC1) (pin 19)) 302 | (node (ref DPD1) (pin 8)) 303 | (node (ref DPD1) (pin 5)) 304 | (node (ref DPD1) (pin 2)) 305 | (node (ref PCFG1) (pin 10)) 306 | (node (ref PCFG1) (pin 9)) 307 | (node (ref DPD1) (pin 19)) 308 | (node (ref RCHPD1) (pin 1)) 309 | (node (ref RCCFG2) (pin 1)) 310 | (node (ref RCCFG1) (pin 1)) 311 | (node (ref RDHPD1) (pin 1)) 312 | (node (ref RDCFG2) (pin 1)) 313 | (node (ref RDCFG1) (pin 1)) 314 | (node (ref RDAN1) (pin 1)) 315 | (node (ref RDAP1) (pin 2))) 316 | (net (code 2) (name VDD) 317 | (node (ref DPD1) (pin 20)) 318 | (node (ref RCAN1) (pin 1)) 319 | (node (ref RDAP2) (pin 2)) 320 | (node (ref RCAN2) (pin 1)) 321 | (node (ref RCAP2) (pin 2)) 322 | (node (ref DPC1) (pin 20)) 323 | (node (ref RDAN2) (pin 1)) 324 | (node (ref RCAP1) (pin 2)) 325 | (node (ref PCFG1) (pin 12)) 326 | (node (ref PCFG1) (pin 11)) 327 | (node (ref PAUX1) (pin 1)) 328 | (node (ref PAUX1) (pin 2)) 329 | (node (ref PAUX1) (pin 20)) 330 | (node (ref PAUX1) (pin 19))) 331 | (net (code 3) (name "Net-(PAUX1-Pad8)") 332 | (node (ref PAUX1) (pin 8))) 333 | (net (code 4) (name "Net-(PAUX1-Pad7)") 334 | (node (ref PAUX1) (pin 7))) 335 | (net (code 5) (name /JDCFG2) 336 | (node (ref JDCFG1) (pin 6)) 337 | (node (ref RDCFG2) (pin 2))) 338 | (net (code 6) (name /JDCFG1) 339 | (node (ref JDCFG1) (pin 4)) 340 | (node (ref RDCFG1) (pin 2))) 341 | (net (code 7) (name /JCCFG2) 342 | (node (ref JCCFG1) (pin 6)) 343 | (node (ref RCCFG2) (pin 2))) 344 | (net (code 8) (name /JCCFG1) 345 | (node (ref JCCFG1) (pin 4)) 346 | (node (ref RCCFG1) (pin 2))) 347 | (net (code 9) (name /JCHPD) 348 | (node (ref RCHPD1) (pin 2)) 349 | (node (ref JCCFG1) (pin 2))) 350 | (net (code 10) (name /JDHPD) 351 | (node (ref JDCFG1) (pin 2)) 352 | (node (ref RDHPD1) (pin 2))) 353 | (net (code 11) (name /CCFG1) 354 | (node (ref DPC1) (pin 13)) 355 | (node (ref PCFG1) (pin 3)) 356 | (node (ref JCCFG1) (pin 3))) 357 | (net (code 12) (name /DAUX2_N) 358 | (node (ref CDAN1) (pin 2)) 359 | (node (ref PAUX1) (pin 12)) 360 | (node (ref PAUX1) (pin 16)) 361 | (node (ref RDAN2) (pin 2))) 362 | (net (code 13) (name /DAUX2_P) 363 | (node (ref RDAP2) (pin 1)) 364 | (node (ref PAUX1) (pin 10)) 365 | (node (ref PAUX1) (pin 14)) 366 | (node (ref CDAP1) (pin 2))) 367 | (net (code 14) (name /CAUX2_N) 368 | (node (ref CCAN1) (pin 1)) 369 | (node (ref PAUX1) (pin 15)) 370 | (node (ref RCAN2) (pin 2)) 371 | (node (ref PAUX1) (pin 11))) 372 | (net (code 15) (name /CAUX2_P) 373 | (node (ref RCAP2) (pin 1)) 374 | (node (ref PAUX1) (pin 9)) 375 | (node (ref CCAP1) (pin 1)) 376 | (node (ref PAUX1) (pin 13))) 377 | (net (code 16) (name "Net-(PCFG1-Pad8)") 378 | (node (ref PCFG1) (pin 8))) 379 | (net (code 17) (name "Net-(PCFG1-Pad7)") 380 | (node (ref PCFG1) (pin 7))) 381 | (net (code 18) (name /DHPD) 382 | (node (ref PAUX1) (pin 6)) 383 | (node (ref JDCFG1) (pin 1)) 384 | (node (ref DPD1) (pin 18)) 385 | (node (ref PCFG1) (pin 2))) 386 | (net (code 19) (name /CCFG2) 387 | (node (ref JCCFG1) (pin 5)) 388 | (node (ref DPC1) (pin 14)) 389 | (node (ref PCFG1) (pin 5))) 390 | (net (code 20) (name /ML1_N) 391 | (node (ref DPC1) (pin 6)) 392 | (node (ref DPD1) (pin 6))) 393 | (net (code 21) (name /ML0_N) 394 | (node (ref DPD1) (pin 3)) 395 | (node (ref DPC1) (pin 3))) 396 | (net (code 22) (name /DCFG2) 397 | (node (ref JDCFG1) (pin 5)) 398 | (node (ref PCFG1) (pin 6)) 399 | (node (ref DPD1) (pin 14))) 400 | (net (code 23) (name /ML3_N) 401 | (node (ref DPD1) (pin 12)) 402 | (node (ref DPC1) (pin 12))) 403 | (net (code 24) (name /ML2_N) 404 | (node (ref DPC1) (pin 9)) 405 | (node (ref DPD1) (pin 9))) 406 | (net (code 25) (name /ML2_P) 407 | (node (ref DPC1) (pin 7)) 408 | (node (ref DPD1) (pin 7))) 409 | (net (code 26) (name /ML1_P) 410 | (node (ref DPC1) (pin 4)) 411 | (node (ref DPD1) (pin 4))) 412 | (net (code 27) (name /ML0_P) 413 | (node (ref DPD1) (pin 1)) 414 | (node (ref DPC1) (pin 1))) 415 | (net (code 28) (name /DAUX1_N) 416 | (node (ref DPD1) (pin 17)) 417 | (node (ref CDAN1) (pin 1)) 418 | (node (ref RDAN1) (pin 2))) 419 | (net (code 29) (name /DAUX1_P) 420 | (node (ref CDAP1) (pin 1)) 421 | (node (ref DPD1) (pin 15)) 422 | (node (ref RDAP1) (pin 1))) 423 | (net (code 30) (name /CAUX1_N) 424 | (node (ref RCAN1) (pin 2)) 425 | (node (ref CCAN1) (pin 2)) 426 | (node (ref DPC1) (pin 17))) 427 | (net (code 31) (name /CAUX1_P) 428 | (node (ref DPC1) (pin 15)) 429 | (node (ref RCAP1) (pin 1)) 430 | (node (ref CCAP1) (pin 2))) 431 | (net (code 32) (name /ML3_P) 432 | (node (ref DPD1) (pin 10)) 433 | (node (ref DPC1) (pin 10))) 434 | (net (code 33) (name /DCFG1) 435 | (node (ref PCFG1) (pin 4)) 436 | (node (ref JDCFG1) (pin 3)) 437 | (node (ref DPD1) (pin 13))) 438 | (net (code 34) (name /CHPD) 439 | (node (ref PAUX1) (pin 5)) 440 | (node (ref DPC1) (pin 18)) 441 | (node (ref JCCFG1) (pin 1)) 442 | (node (ref PCFG1) (pin 1))))) -------------------------------------------------------------------------------- /footprints-old/QTH-090-01-L-D-A.kicad_mod: -------------------------------------------------------------------------------- 1 | (module QTH-090-01-L-D-A (layer F.Cu) (tedit 5580F8D1) 2 | (descr 150) 3 | (fp_text reference REF** (at 0 12.9) (layer F.SilkS) 4 | (effects (font (size 1 1) (thickness 0.15))) 5 | ) 6 | (fp_text value QTH-090-01-L-D-A (at 0 -10.9) (layer F.Fab) 7 | (effects (font (size 1 1) (thickness 0.15))) 8 | ) 9 | (fp_line (start -30 -2.985) (end -30 2.985) (layer F.SilkS) (width 0.15)) 10 | (fp_line (start -30 2.985) (end 30 2.985) (layer F.SilkS) (width 0.15)) 11 | (fp_line (start 30 2.985) (end 30 -2.985) (layer F.SilkS) (width 0.15)) 12 | (fp_line (start 30 -2.985) (end -30 -2.985) (layer F.SilkS) (width 0.15)) 13 | (pad 181 smd rect (at -28.505 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 14 | (pad 182 smd rect (at -23.235 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 15 | (pad 183 smd rect (at -16.885 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 16 | (pad 184 smd rect (at -11.615 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 17 | (pad 192 smd rect (at 28.505 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 18 | (pad 191 smd rect (at 23.235 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 19 | (pad 190 smd rect (at 16.885 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 20 | (pad 189 smd rect (at 11.615 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 21 | (pad 2 smd rect (at -27.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 22 | (pad 40 smd rect (at -17.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 23 | (pad 30 smd rect (at -20.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 24 | (pad 32 smd rect (at -19.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 25 | (pad 34 smd rect (at -19.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 26 | (pad 36 smd rect (at -18.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 27 | (pad 38 smd rect (at -18.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 28 | (pad 42 smd rect (at -17.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 29 | (pad 44 smd rect (at -16.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 30 | (pad 46 smd rect (at -16.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 31 | (pad 48 smd rect (at -15.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 32 | (pad 50 smd rect (at -15.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 33 | (pad 52 smd rect (at -14.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 34 | (pad 54 smd rect (at -14.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 35 | (pad 56 smd rect (at -13.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 36 | (pad 58 smd rect (at -13.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 37 | (pad 60 smd rect (at -12.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 38 | (pad 28 smd rect (at -20.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 39 | (pad 26 smd rect (at -21.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 40 | (pad 24 smd rect (at -21.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 41 | (pad 22 smd rect (at -22.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 42 | (pad 20 smd rect (at -22.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 43 | (pad 18 smd rect (at -23.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 44 | (pad 16 smd rect (at -23.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 45 | (pad 14 smd rect (at -24.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 46 | (pad 12 smd rect (at -24.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 47 | (pad 10 smd rect (at -25.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 48 | (pad 8 smd rect (at -25.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 49 | (pad 6 smd rect (at -26.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 50 | (pad 4 smd rect (at -26.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 51 | (pad 64 smd rect (at -6.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 52 | (pad 66 smd rect (at -5.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 53 | (pad 68 smd rect (at -5.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 54 | (pad 70 smd rect (at -4.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 55 | (pad 72 smd rect (at -4.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 56 | (pad 74 smd rect (at -3.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 57 | (pad 76 smd rect (at -3.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 58 | (pad 78 smd rect (at -2.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 59 | (pad 80 smd rect (at -2.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 60 | (pad 82 smd rect (at -1.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 61 | (pad 84 smd rect (at -1.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 62 | (pad 86 smd rect (at -0.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 63 | (pad 88 smd rect (at -0.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 64 | (pad 120 smd rect (at 7.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 65 | (pad 118 smd rect (at 7.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 66 | (pad 116 smd rect (at 6.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 67 | (pad 114 smd rect (at 6.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 68 | (pad 112 smd rect (at 5.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 69 | (pad 110 smd rect (at 5.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 70 | (pad 108 smd rect (at 4.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 71 | (pad 106 smd rect (at 4.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 72 | (pad 104 smd rect (at 3.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 73 | (pad 102 smd rect (at 3.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 74 | (pad 98 smd rect (at 2.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 75 | (pad 96 smd rect (at 1.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 76 | (pad 94 smd rect (at 1.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 77 | (pad 92 smd rect (at 0.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 78 | (pad 90 smd rect (at 0.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 79 | (pad 100 smd rect (at 2.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 80 | (pad 62 smd rect (at -6.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 81 | (pad 122 smd rect (at 13.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 82 | (pad 160 smd rect (at 22.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 83 | (pad 150 smd rect (at 20.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 84 | (pad 152 smd rect (at 20.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 85 | (pad 154 smd rect (at 21.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 86 | (pad 156 smd rect (at 21.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 87 | (pad 158 smd rect (at 22.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 88 | (pad 162 smd rect (at 23.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 89 | (pad 164 smd rect (at 23.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 90 | (pad 166 smd rect (at 24.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 91 | (pad 168 smd rect (at 24.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 92 | (pad 170 smd rect (at 25.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 93 | (pad 172 smd rect (at 25.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 94 | (pad 174 smd rect (at 26.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 95 | (pad 176 smd rect (at 26.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 96 | (pad 178 smd rect (at 27.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 97 | (pad 180 smd rect (at 27.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 98 | (pad 148 smd rect (at 19.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 99 | (pad 146 smd rect (at 19.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 100 | (pad 144 smd rect (at 18.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 101 | (pad 142 smd rect (at 18.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 102 | (pad 140 smd rect (at 17.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 103 | (pad 138 smd rect (at 17.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 104 | (pad 136 smd rect (at 16.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 105 | (pad 134 smd rect (at 16.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 106 | (pad 132 smd rect (at 15.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 107 | (pad 130 smd rect (at 15.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 108 | (pad 128 smd rect (at 14.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 109 | (pad 126 smd rect (at 14.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 110 | (pad 124 smd rect (at 13.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 111 | (pad 121 smd rect (at 13.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 112 | (pad 159 smd rect (at 22.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 113 | (pad 149 smd rect (at 20.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 114 | (pad 151 smd rect (at 20.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 115 | (pad 153 smd rect (at 21.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 116 | (pad 155 smd rect (at 21.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 117 | (pad 157 smd rect (at 22.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 118 | (pad 161 smd rect (at 23.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 119 | (pad 163 smd rect (at 23.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 120 | (pad 165 smd rect (at 24.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 121 | (pad 167 smd rect (at 24.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 122 | (pad 169 smd rect (at 25.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 123 | (pad 171 smd rect (at 25.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 124 | (pad 173 smd rect (at 26.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 125 | (pad 175 smd rect (at 26.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 126 | (pad 177 smd rect (at 27.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 127 | (pad 179 smd rect (at 27.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 128 | (pad 147 smd rect (at 19.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 129 | (pad 145 smd rect (at 19.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 130 | (pad 143 smd rect (at 18.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 131 | (pad 141 smd rect (at 18.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 132 | (pad 139 smd rect (at 17.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 133 | (pad 137 smd rect (at 17.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 134 | (pad 135 smd rect (at 16.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 135 | (pad 133 smd rect (at 16.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 136 | (pad 131 smd rect (at 15.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 137 | (pad 129 smd rect (at 15.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 138 | (pad 127 smd rect (at 14.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 139 | (pad 125 smd rect (at 14.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 140 | (pad 123 smd rect (at 13.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 141 | (pad 63 smd rect (at -6.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 142 | (pad 65 smd rect (at -5.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 143 | (pad 67 smd rect (at -5.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 144 | (pad 69 smd rect (at -4.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 145 | (pad 71 smd rect (at -4.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 146 | (pad 73 smd rect (at -3.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 147 | (pad 75 smd rect (at -3.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 148 | (pad 77 smd rect (at -2.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 149 | (pad 79 smd rect (at -2.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 150 | (pad 81 smd rect (at -1.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 151 | (pad 83 smd rect (at -1.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 152 | (pad 85 smd rect (at -0.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 153 | (pad 87 smd rect (at -0.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 154 | (pad 119 smd rect (at 7.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 155 | (pad 117 smd rect (at 7.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 156 | (pad 115 smd rect (at 6.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 157 | (pad 113 smd rect (at 6.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 158 | (pad 111 smd rect (at 5.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 159 | (pad 109 smd rect (at 5.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 160 | (pad 107 smd rect (at 4.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 161 | (pad 105 smd rect (at 4.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 162 | (pad 103 smd rect (at 3.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 163 | (pad 101 smd rect (at 3.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 164 | (pad 97 smd rect (at 2.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 165 | (pad 95 smd rect (at 1.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 166 | (pad 93 smd rect (at 1.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 167 | (pad 91 smd rect (at 0.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 168 | (pad 89 smd rect (at 0.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 169 | (pad 99 smd rect (at 2.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 170 | (pad 61 smd rect (at -6.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 171 | (pad 1 smd rect (at -27.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 172 | (pad 39 smd rect (at -17.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 173 | (pad 29 smd rect (at -20.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 174 | (pad 31 smd rect (at -19.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 175 | (pad 33 smd rect (at -19.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 176 | (pad 35 smd rect (at -18.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 177 | (pad 37 smd rect (at -18.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 178 | (pad 41 smd rect (at -17.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 179 | (pad 43 smd rect (at -16.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 180 | (pad 45 smd rect (at -16.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 181 | (pad 47 smd rect (at -15.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 182 | (pad 49 smd rect (at -15.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 183 | (pad 51 smd rect (at -14.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 184 | (pad 53 smd rect (at -14.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 185 | (pad 55 smd rect (at -13.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 186 | (pad 57 smd rect (at -13.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 187 | (pad 59 smd rect (at -12.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 188 | (pad 27 smd rect (at -20.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 189 | (pad 25 smd rect (at -21.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 190 | (pad 23 smd rect (at -21.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 191 | (pad 21 smd rect (at -22.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 192 | (pad 19 smd rect (at -22.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 193 | (pad 17 smd rect (at -23.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 194 | (pad 15 smd rect (at -23.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 195 | (pad 13 smd rect (at -24.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 196 | (pad 11 smd rect (at -24.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 197 | (pad 9 smd rect (at -25.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 198 | (pad 7 smd rect (at -25.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 199 | (pad 5 smd rect (at -26.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 200 | (pad 3 smd rect (at -26.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 201 | (pad 185 smd rect (at -8.445 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 202 | (pad 186 smd rect (at -3.175 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 203 | (pad 187 smd rect (at 3.175 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 204 | (pad 188 smd rect (at 8.445 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 205 | (pad "" np_thru_hole circle (at 29.24 -2.03) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask F.SilkS)) 206 | (pad "" np_thru_hole circle (at -29.24 -2.03) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask F.SilkS)) 207 | ) 208 | -------------------------------------------------------------------------------- /libraries/QTH-090-01-L-D-A.pretty/QTH-090-01-L-D-A.kicad_mod: -------------------------------------------------------------------------------- 1 | (module QTH-090-01-L-D-A (layer F.Cu) (tedit 5580F8D1) 2 | (descr 150) 3 | (fp_text reference REF** (at 0 12.9) (layer F.SilkS) 4 | (effects (font (size 1 1) (thickness 0.15))) 5 | ) 6 | (fp_text value QTH-090-01-L-D-A (at 0 -10.9) (layer F.Fab) 7 | (effects (font (size 1 1) (thickness 0.15))) 8 | ) 9 | (fp_line (start -39.065 -18) (end -39.065 4) (layer F.SilkS) (width 0.15)) 10 | (fp_line (start -39.065 4) (end -39.065 5) (layer F.SilkS) (width 0.15)) 11 | (fp_line (start -39.065 5) (end 39.065 5) (layer F.SilkS) (width 0.15)) 12 | (fp_line (start 39.065 5) (end 39.065 -17) (layer F.SilkS) (width 0.15)) 13 | (fp_line (start 39.065 -17) (end 39.065 -18) (layer F.SilkS) (width 0.15)) 14 | (fp_line (start 39.065 -18) (end -39.065 -18) (layer F.SilkS) (width 0.15)) 15 | (fp_line (start -30 -2.985) (end -30 2.985) (layer F.SilkS) (width 0.15)) 16 | (fp_line (start -30 2.985) (end 30 2.985) (layer F.SilkS) (width 0.15)) 17 | (fp_line (start 30 2.985) (end 30 -2.985) (layer F.SilkS) (width 0.15)) 18 | (fp_line (start 30 -2.985) (end -30 -2.985) (layer F.SilkS) (width 0.15)) 19 | (pad 161 smd rect (at -28.505 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 20 | (pad 162 smd rect (at -23.235 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 21 | (pad 163 smd rect (at -16.885 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 22 | (pad 164 smd rect (at -11.615 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 23 | (pad 172 smd rect (at 28.505 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 24 | (pad 171 smd rect (at 23.235 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 25 | (pad 170 smd rect (at 16.885 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 26 | (pad 169 smd rect (at 11.615 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 27 | (pad 2 smd rect (at -27.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 28 | (pad 28 smd rect (at -17.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 29 | (pad 182 smd rect (at -20.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 30 | (pad 22 smd rect (at -19.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 31 | (pad 24 smd rect (at -19.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 32 | (pad 184 smd rect (at -18.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 33 | (pad 26 smd rect (at -18.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 34 | (pad 186 smd rect (at -17.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 35 | (pad 30 smd rect (at -16.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 36 | (pad 32 smd rect (at -16.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 37 | (pad 188 smd rect (at -15.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 38 | (pad 34 smd rect (at -15.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 39 | (pad 36 smd rect (at -14.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 40 | (pad 190 smd rect (at -14.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 41 | (pad 38 smd rect (at -13.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 42 | (pad 40 smd rect (at -13.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 43 | (pad 192 smd rect (at -12.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 44 | (pad 20 smd rect (at -20.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 45 | (pad 18 smd rect (at -21.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 46 | (pad 180 smd rect (at -21.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 47 | (pad 16 smd rect (at -22.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 48 | (pad 14 smd rect (at -22.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 49 | (pad 178 smd rect (at -23.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 50 | (pad 12 smd rect (at -23.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 51 | (pad 10 smd rect (at -24.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 52 | (pad 176 smd rect (at -24.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 53 | (pad 8 smd rect (at -25.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 54 | (pad 6 smd rect (at -25.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 55 | (pad 174 smd rect (at -26.003 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 56 | (pad 4 smd rect (at -26.503 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 57 | (pad 44 smd rect (at -6.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 58 | (pad 46 smd rect (at -5.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 59 | (pad 48 smd rect (at -5.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 60 | (pad 50 smd rect (at -4.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 61 | (pad 52 smd rect (at -4.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 62 | (pad 54 smd rect (at -3.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 63 | (pad 56 smd rect (at -3.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 64 | (pad 58 smd rect (at -2.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 65 | (pad 60 smd rect (at -2.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 66 | (pad 62 smd rect (at -1.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 67 | (pad 64 smd rect (at -1.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 68 | (pad 66 smd rect (at -0.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 69 | (pad 68 smd rect (at -0.443 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 70 | (pad 100 smd rect (at 7.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 71 | (pad 98 smd rect (at 7.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 72 | (pad 96 smd rect (at 6.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 73 | (pad 94 smd rect (at 6.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 74 | (pad 92 smd rect (at 5.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 75 | (pad 90 smd rect (at 5.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 76 | (pad 88 smd rect (at 4.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 77 | (pad 86 smd rect (at 4.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 78 | (pad 84 smd rect (at 3.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 79 | (pad 82 smd rect (at 3.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 80 | (pad 78 smd rect (at 2.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 81 | (pad 76 smd rect (at 1.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 82 | (pad 74 smd rect (at 1.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 83 | (pad 72 smd rect (at 0.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 84 | (pad 70 smd rect (at 0.057 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 85 | (pad 80 smd rect (at 2.557 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 86 | (pad 42 smd rect (at -6.943 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 87 | (pad 102 smd rect (at 13.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 88 | (pad 140 smd rect (at 22.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 89 | (pad 130 smd rect (at 20.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 90 | (pad 132 smd rect (at 20.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 91 | (pad 134 smd rect (at 21.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 92 | (pad 136 smd rect (at 21.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 93 | (pad 138 smd rect (at 22.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 94 | (pad 142 smd rect (at 23.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 95 | (pad 144 smd rect (at 23.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 96 | (pad 146 smd rect (at 24.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 97 | (pad 148 smd rect (at 24.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 98 | (pad 150 smd rect (at 25.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 99 | (pad 152 smd rect (at 25.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 100 | (pad 154 smd rect (at 26.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 101 | (pad 156 smd rect (at 26.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 102 | (pad 158 smd rect (at 27.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 103 | (pad 160 smd rect (at 27.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 104 | (pad 128 smd rect (at 19.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 105 | (pad 126 smd rect (at 19.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 106 | (pad 124 smd rect (at 18.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 107 | (pad 122 smd rect (at 18.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 108 | (pad 120 smd rect (at 17.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 109 | (pad 118 smd rect (at 17.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 110 | (pad 116 smd rect (at 16.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 111 | (pad 114 smd rect (at 16.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 112 | (pad 112 smd rect (at 15.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 113 | (pad 110 smd rect (at 15.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 114 | (pad 108 smd rect (at 14.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 115 | (pad 106 smd rect (at 14.117 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 116 | (pad 104 smd rect (at 13.617 3.106) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 117 | (pad 101 smd rect (at 13.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 118 | (pad 139 smd rect (at 22.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 119 | (pad 129 smd rect (at 20.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 120 | (pad 131 smd rect (at 20.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 121 | (pad 133 smd rect (at 21.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 122 | (pad 135 smd rect (at 21.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 123 | (pad 137 smd rect (at 22.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 124 | (pad 141 smd rect (at 23.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 125 | (pad 143 smd rect (at 23.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 126 | (pad 145 smd rect (at 24.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 127 | (pad 147 smd rect (at 24.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 128 | (pad 149 smd rect (at 25.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 129 | (pad 151 smd rect (at 25.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 130 | (pad 153 smd rect (at 26.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 131 | (pad 155 smd rect (at 26.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 132 | (pad 157 smd rect (at 27.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 133 | (pad 159 smd rect (at 27.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 134 | (pad 127 smd rect (at 19.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 135 | (pad 125 smd rect (at 19.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 136 | (pad 123 smd rect (at 18.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 137 | (pad 121 smd rect (at 18.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 138 | (pad 119 smd rect (at 17.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 139 | (pad 117 smd rect (at 17.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 140 | (pad 115 smd rect (at 16.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 141 | (pad 113 smd rect (at 16.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 142 | (pad 111 smd rect (at 15.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 143 | (pad 109 smd rect (at 15.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 144 | (pad 107 smd rect (at 14.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 145 | (pad 105 smd rect (at 14.117 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 146 | (pad 103 smd rect (at 13.617 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 147 | (pad 43 smd rect (at -6.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 148 | (pad 45 smd rect (at -5.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 149 | (pad 47 smd rect (at -5.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 150 | (pad 49 smd rect (at -4.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 151 | (pad 51 smd rect (at -4.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 152 | (pad 53 smd rect (at -3.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 153 | (pad 55 smd rect (at -3.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 154 | (pad 57 smd rect (at -2.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 155 | (pad 59 smd rect (at -2.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 156 | (pad 61 smd rect (at -1.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 157 | (pad 63 smd rect (at -1.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 158 | (pad 65 smd rect (at -0.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 159 | (pad 67 smd rect (at -0.443 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 160 | (pad 99 smd rect (at 7.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 161 | (pad 97 smd rect (at 7.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 162 | (pad 95 smd rect (at 6.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 163 | (pad 93 smd rect (at 6.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 164 | (pad 91 smd rect (at 5.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 165 | (pad 89 smd rect (at 5.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 166 | (pad 87 smd rect (at 4.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 167 | (pad 85 smd rect (at 4.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 168 | (pad 83 smd rect (at 3.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 169 | (pad 81 smd rect (at 3.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 170 | (pad 77 smd rect (at 2.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 171 | (pad 75 smd rect (at 1.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 172 | (pad 73 smd rect (at 1.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 173 | (pad 71 smd rect (at 0.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 174 | (pad 69 smd rect (at 0.057 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 175 | (pad 79 smd rect (at 2.557 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 176 | (pad 41 smd rect (at -6.943 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 177 | (pad 1 smd rect (at -27.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 178 | (pad 27 smd rect (at -17.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 179 | (pad 181 smd rect (at -20.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 180 | (pad 21 smd rect (at -19.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 181 | (pad 23 smd rect (at -19.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 182 | (pad 183 smd rect (at -18.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 183 | (pad 25 smd rect (at -18.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 184 | (pad 185 smd rect (at -17.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 185 | (pad 29 smd rect (at -16.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 186 | (pad 31 smd rect (at -16.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 187 | (pad 187 smd rect (at -15.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 188 | (pad 33 smd rect (at -15.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 189 | (pad 35 smd rect (at -14.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 190 | (pad 189 smd rect (at -14.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 191 | (pad 37 smd rect (at -13.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 192 | (pad 39 smd rect (at -13.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 193 | (pad 191 smd rect (at -12.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 194 | (pad 19 smd rect (at -20.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 195 | (pad 17 smd rect (at -21.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 196 | (pad 179 smd rect (at -21.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 197 | (pad 15 smd rect (at -22.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 198 | (pad 13 smd rect (at -22.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 199 | (pad 177 smd rect (at -23.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 200 | (pad 11 smd rect (at -23.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 201 | (pad 9 smd rect (at -24.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 202 | (pad 175 smd rect (at -24.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 203 | (pad 7 smd rect (at -25.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 204 | (pad 5 smd rect (at -25.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 205 | (pad 173 smd rect (at -26.003 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 206 | (pad 3 smd rect (at -26.503 -3.066) (size 0.305 1.45) (layers F.Cu F.Paste F.Mask)) 207 | (pad 165 smd rect (at -8.445 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 208 | (pad 166 smd rect (at -3.175 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 209 | (pad 167 smd rect (at 3.175 0) (size 4.7 0.64) (layers F.Cu F.Paste F.Mask)) 210 | (pad 168 smd rect (at 8.445 0) (size 2.54 0.64) (layers F.Cu F.Paste F.Mask)) 211 | (pad "" np_thru_hole circle (at 29.24 -2.03) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask F.SilkS)) 212 | (pad "" np_thru_hole circle (at -29.24 -2.03) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask F.SilkS)) 213 | (pad "" thru_hole circle (at -35.56 0) (size 6.35 6.35) (drill 3.175) (layers *.Cu *.Mask F.SilkS)) 214 | (pad "" thru_hole circle (at 35.56 0) (size 6.35 6.35) (drill 3.175) (layers *.Cu *.Mask F.SilkS)) 215 | (pad "" thru_hole circle (at -35.56 -14.3) (size 6.35 6.35) (drill 3.175) (layers *.Cu *.Mask F.SilkS)) 216 | (pad "" thru_hole circle (at 35.56 -14.3) (size 6.35 6.35) (drill 3.175) (layers *.Cu *.Mask F.SilkS)) 217 | ) 218 | --------------------------------------------------------------------------------