├── .gitignore
├── stm32f4_canpong
    ├── stm32_flash.ld
    ├── src
    │   ├── system_stm32f4xx.c
    │   ├── main.c
    │   └── setup.c
    ├── inc
    │   ├── STM32F4xx
    │   │   ├── stm32f4xx.h
    │   │   ├── stm32f4xx_conf.h
    │   │   └── system_stm32f4xx.h
    │   ├── STM32F4xx_StdPeriph_Driver
    │   │   ├── Release_Notes.html
    │   │   ├── src
    │   │   │   ├── stm32f4xx_qspi.c
    │   │   │   ├── stm32f4xx_crc.c
    │   │   │   ├── stm32f4xx_flash_ramfunc.c
    │   │   │   ├── stm32f4xx_dbgmcu.c
    │   │   │   ├── stm32f4xx_iwdg.c
    │   │   │   ├── stm32f4xx_hash_md5.c
    │   │   │   ├── stm32f4xx_cryp_des.c
    │   │   │   ├── stm32f4xx_hash_sha1.c
    │   │   │   ├── stm32f4xx_exti.c
    │   │   │   ├── stm32f4xx_syscfg.c
    │   │   │   ├── stm32f4xx_wwdg.c
    │   │   │   └── stm32f4xx_cryp_tdes.c
    │   │   └── inc
    │   │   │   ├── stm32f4xx_crc.h
    │   │   │   ├── stm32f4xx_flash_ramfunc.h
    │   │   │   ├── stm32f4xx_wwdg.h
    │   │   │   ├── stm32f4xx_rng.h
    │   │   │   ├── stm32f4xx_dbgmcu.h
    │   │   │   ├── stm32f4xx_iwdg.h
    │   │   │   ├── misc.h
    │   │   │   ├── stm32f4xx_exti.h
    │   │   │   ├── stm32f4xx_pwr.h
    │   │   │   ├── stm32f4xx_syscfg.h
    │   │   │   └── stm32f4xx_hash.h
    │   ├── setup.h
    │   └── CMSIS
    │   │   ├── arm_const_structs.h
    │   │   └── arm_common_tables.h
    └── Makefile
├── leds.sh
├── install.sh
├── iface.sh
├── BB-DCAN1-00A0.dts
├── README.md
├── canping.c
└── canpong.c


/.gitignore:
--------------------------------------------------------------------------------
1 | canping
2 | canpong
3 | BB-DCAN1-00A0.dtbo
4 | stm32f4_canpong/build/
5 | 


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/stm32f4_canpong/stm32_flash.ld:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/mvollrath/canbus_bbone_stm32/HEAD/stm32f4_canpong/stm32_flash.ld


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/stm32f4_canpong/src/system_stm32f4xx.c:
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https://raw.githubusercontent.com/mvollrath/canbus_bbone_stm32/HEAD/stm32f4_canpong/src/system_stm32f4xx.c


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/stm32f4_canpong/inc/STM32F4xx/stm32f4xx.h:
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https://raw.githubusercontent.com/mvollrath/canbus_bbone_stm32/HEAD/stm32f4_canpong/inc/STM32F4xx/stm32f4xx.h


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/leds.sh:
--------------------------------------------------------------------------------
1 | #!/bin/sh
2 | 
3 | # clear all LED's to turn off the default heartbeat
4 | 
5 | for led in /sys/class/leds/beaglebone\:green\:usr*; do
6 |   echo none | sudo tee ${led}/trigger
7 | done
8 | 


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/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/Release_Notes.html:
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https://raw.githubusercontent.com/mvollrath/canbus_bbone_stm32/HEAD/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/Release_Notes.html


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/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_qspi.c:
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https://raw.githubusercontent.com/mvollrath/canbus_bbone_stm32/HEAD/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_qspi.c


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/stm32f4_canpong/inc/STM32F4xx/stm32f4xx_conf.h:
--------------------------------------------------------------------------------
1 | #ifndef STM32F4XX_CONF_H_
2 | #define STM32F4XX_CONF_H_
3 | 
4 | #ifndef assert_param
5 | #define assert_param(x)
6 | #endif
7 | 
8 | #endif /* STM32F4XX_CONF_H_ */
9 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/setup.h:
--------------------------------------------------------------------------------
 1 | #ifndef _SETUP_H_
 2 | #define _SETUP_H_
 3 | 
 4 | #include "stm32f4xx.h"
 5 | 
 6 | #define SETUP_SUCCESS ((uint8_t)0x00)
 7 | #define SETUP_FAIL    ((uint8_t)0x01)
 8 | 
 9 | uint8_t setup();
10 | 
11 | #endif
12 | 


--------------------------------------------------------------------------------
/install.sh:
--------------------------------------------------------------------------------
1 | #!/bin/sh
2 | 
3 | # install DCAN1 firmware
4 | 
5 | sudo cp BB-DCAN1-00A0.dtbo /lib/firmware
6 | echo BB-DCAN1 | sudo tee /sys/devices/bone_capemgr.*/slots
7 | dmesg | tail -n 14
8 | sudo cat /sys/kernel/debug/pinctrl/44e10800.pinmux/pinmux-pins | grep -i can
9 | 


--------------------------------------------------------------------------------
/iface.sh:
--------------------------------------------------------------------------------
 1 | #!/bin/sh
 2 | 
 3 | # set up real and virtual CAN interfaces
 4 | 
 5 | BITRATE=${1:-500000}
 6 | 
 7 | sudo ip link add can0 type can
 8 | sudo ip link set can0 up type can loopback off bitrate ${BITRATE}
 9 | sudo ifconfig can0 up
10 | 
11 | ip link show up dev can0
12 | ifconfig can0
13 | 
14 | sudo modprobe vcan
15 | sudo ip link add vcan0 type vcan
16 | sudo ifconfig vcan0 up
17 | 
18 | ip link show up dev vcan0
19 | ifconfig vcan0
20 | 


--------------------------------------------------------------------------------
/BB-DCAN1-00A0.dts:
--------------------------------------------------------------------------------
 1 | /dts-v1/;
 2 | /plugin/;
 3 |  
 4 | / {
 5 |     compatible = "ti,beaglebone", "ti,beaglebone-black";
 6 |  
 7 |     /* identification */
 8 |     part-number = "dcan1pinmux";
 9 |  
10 |     fragment@0 {
11 |         target = <&am33xx_pinmux>;
12 |         __overlay__ {
13 |             dcan1_pins_s0: dcan1_pins_s0 {
14 |                 pinctrl-single,pins = <
15 |                     0x180 0x12  /* d_can1_tx, SLEWCTRL_FAST | INPUT_PULLUP | MODE2 */
16 |                     0x184 0x32  /* d_can1_rx, SLEWCTRL_FAST | RECV_ENABLE | INPUT_PULLUP | MODE2 */
17 |                 >;
18 |             };
19 |         };
20 |     };
21 |  
22 |     fragment@1 {
23 |         target = <&dcan1>;
24 |         __overlay__ {
25 |              #address-cells = <1>;
26 |              #size-cells = <0>;
27 |  
28 |              status = "okay";
29 |              pinctrl-names = "default";
30 |              pinctrl-0 = <&dcan1_pins_s0>;
31 |         };
32 |     };
33 | };
34 | 


--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
 1 | ### Video
 2 | 
 3 | I swear this works at least a little bit, here look:
 4 | 
 5 | <https://www.youtube.com/watch?v=pqwqNU--IbQ>
 6 | 
 7 | ### Enabling CAN Bus on BeagleBone Black
 8 | 
 9 | You'll need to compile and install a dtbo.
10 | 
11 | <http://www.embedded-things.com/bbb/enable-canbus-on-the-beaglebone-black/>
12 | 
13 | There are a couple of scripts that can do this for you:
14 | 
15 | ```
16 | ./build_dtbo.sh
17 | ./install.sh
18 | ```
19 | 
20 | ### DIY CAN Bus Cape
21 | 
22 | This describes how to put together a CAN Bus transceiver project board.
23 | 
24 | <http://www.instructables.com/id/DIY-Beaglebone-CAN-Bus-Cape/>
25 | 
26 | ### SocketCAN
27 | 
28 | The canping and canpong binaries use the excellent [SocketCAN](https://www.kernel.org/doc/Documentation/networking/can.txt) interface.  Once DCAN1 is enabled, use `iface.sh` to set up `can0` and `vcan0` interfaces.
29 | 
30 | ### Preparing LED's on BeagleBone Black
31 | 
32 | Use `leds.sh` to disable the default LED triggers on the BBB.
33 | 
34 | ### Building canping and canpong
35 | 
36 | Shouldn't need anything special.
37 | 
38 | ```
39 | gcc -o canping canping.c
40 | gcc -o canpong canpong.c
41 | ```
42 | 
43 | ### Testing canping and canpong
44 | 
45 | As long as `vcan0` is available, this should give you some blinkage.
46 | 
47 | ```
48 | ./canping -n vcan0 &
49 | sudo ./canpong -n vcan0 &
50 | ```
51 | 
52 | Kill everything with `pkill canping` and `sudo pkill canpong` when you're done.
53 | 
54 | ### Building and burning the STM32F4 binary
55 | 
56 | I used [stlink](https://github.com/texane/stlink) to build and burn to the STM32F4 board from the BBB.  Follow the README in that repo to set up the toolchain.
57 | 
58 | Set the STLINK path in `stm32f4_canpong/Makefile` and try a build:
59 | 
60 | ```
61 | cd stm32f4_canpong
62 | make
63 | ```
64 | 
65 | If that works, burn it:
66 | 
67 | ```
68 | make burn
69 | ```
70 | 
71 | Reset the board and, if everything is hooked up correctly and you're lucky, you should see lights blinking in concert.  Be sure to startup `canping` and `canpong` against `can0`.
72 | 
73 | ### Debugging
74 | 
75 | The `candump` tool is really handy for spitting out all CAN messages that the BBB can see:
76 | 
77 | ```
78 | candump can0
79 | ```
80 | 
81 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/Makefile:
--------------------------------------------------------------------------------
 1 | PROJECT_NAME=stm32f4_pong
 2 | 
 3 | STLINK=~/src/stlink
 4 | 
 5 | BUILDDIR = build
 6 | 
 7 | DEVICE = inc/STM32F4xx
 8 | CORE = inc/CMSIS
 9 | PERIPH = inc/STM32F4xx_StdPeriph_Driver
10 | DISCOVERY = inc
11 | USB = inc/STM32_USB_Device_Library
12 | USB_OTG = inc/STM32_USB_OTG_Driver
13 | 
14 | SOURCES += \
15 | 			$(PERIPH)/src/misc.c \
16 | 			$(PERIPH)/src/stm32f4xx_can.c \
17 | 			$(PERIPH)/src/stm32f4xx_exti.c \
18 | 			$(PERIPH)/src/stm32f4xx_gpio.c \
19 | 			$(PERIPH)/src/stm32f4xx_pwr.c \
20 | 			$(PERIPH)/src/stm32f4xx_rcc.c \
21 | 			$(PERIPH)/src/stm32f4xx_tim.c \
22 | 			$(PERIPH)/src/stm32f4xx_syscfg.c \
23 | 
24 | SOURCES += startup_stm32f4xx.S
25 | 
26 | SOURCES += \
27 | 		src/main.c \
28 | 		src/setup.c \
29 | 		src/system_stm32f4xx.c
30 | 
31 | OBJECTS = $(addprefix $(BUILDDIR)/, $(addsuffix .o, $(basename $(SOURCES))))
32 | 
33 | INCLUDES +=             -I$(DEVICE) \
34 | 			-I$(CORE) \
35 | 			-I$(PERIPH)/inc \
36 | 			-I$(DISCOVERY) \
37 | 			-I$(USB)/Class/cdc/inc \
38 | 			-I$(USB)/Core/inc \
39 | 			-I$(USB_OTG)/inc \
40 | 			-I.
41 | 
42 | ELF = $(BUILDDIR)/$(PROJECT_NAME).elf
43 | HEX = $(BUILDDIR)/$(PROJECT_NAME).hex
44 | BIN = $(BUILDDIR)/$(PROJECT_NAME).bin
45 | 
46 | CC = arm-none-eabi-gcc
47 | LD = arm-none-eabi-gcc
48 | AR = arm-none-eabi-ar
49 | OBJCOPY = arm-none-eabi-objcopy
50 | GDB = arm-none-eabi-gdb
51 | 
52 | CFLAGS  = -O0 -g -Wall -I.\
53 |    -mcpu=cortex-m4 -mthumb \
54 |    -mfpu=fpv4-sp-d16 -mfloat-abi=hard \
55 |    $(INCLUDES) -DUSE_STDPERIPH_DRIVER \
56 |    -DSTM32F4XX -DUSE_STM32F4_DISCOVERY \
57 |    -DHSE_VALUE=8000000 \
58 |    -DUSE_USB_OTG_FS
59 | 
60 | LDSCRIPT = stm32_flash.ld
61 | LDFLAGS += -T$(LDSCRIPT) -mthumb -mcpu=cortex-m4 -nostdlib
62 | 
63 | $(BIN): $(ELF)
64 | 	$(OBJCOPY) -O binary $< $@
65 | 
66 | $(HEX): $(ELF)
67 | 	$(OBJCOPY) -O ihex $< $@
68 | 
69 | $(ELF): $(OBJECTS)
70 | 	$(LD) $(LDFLAGS) -o $@ $(OBJECTS) $(LDLIBS)
71 | 
72 | $(BUILDDIR)/%.o: %.c
73 | 	mkdir -p $(dir $@)
74 | 	$(CC) -c $(CFLAGS) $< -o $@
75 | 
76 | $(BUILDDIR)/%.o: %.S
77 | 	mkdir -p $(dir $@)
78 | 	$(CC) -c $(CFLAGS) $< -o $@
79 | 
80 | flash: $(BIN)
81 | 	st-flash write $(BIN) 0x8000000
82 | 
83 | debug: $(ELF)
84 | 	$(GDB) -tui $(ELF)
85 | 
86 | all: $(HEX) $(BIN)
87 | 
88 | .PHONY: clean
89 | clean:
90 | 	rm -rf build
91 | 
92 | burn: $(BIN)
93 | 	$(STLINK)/st-flash write $(BIN) 0x8000000
94 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/src/main.c:
--------------------------------------------------------------------------------
 1 | #include "setup.h"
 2 | #include "stm32f4xx_can.h"
 3 | #include "stm32f4xx_exti.h"
 4 | #include "stm32f4xx_gpio.h"
 5 | #include "stm32f4xx_pwr.h"
 6 | #include "stm32f4xx_tim.h"
 7 | 
 8 | #define LED_GREEN GPIO_Pin_12
 9 | #define LED_ORANGE GPIO_Pin_13
10 | #define LED_RED GPIO_Pin_14
11 | #define LED_BLUE GPIO_Pin_15
12 | 
13 | // counter for outgoing messages
14 | static uint8_t led_counter = 0;
15 | 
16 | static void tx(uint8_t data) {
17 |     CanTxMsg message;
18 |     uint8_t mailbox;
19 |     uint8_t status;
20 | 
21 |     message.StdId = 0x23;
22 |     message.ExtId = 0x0;
23 |     message.RTR = CAN_RTR_DATA;
24 |     message.IDE = CAN_ID_STD;
25 |     message.DLC = 1;
26 |     message.Data[0] = data;
27 | 
28 |     mailbox = CAN_Transmit(CAN1, &message);
29 |     status = CAN_TransmitStatus(CAN1, mailbox);
30 |     if (status == CAN_TxStatus_Failed) {
31 |         GPIO_SetBits(GPIOD, LED_RED);
32 |     }
33 | }
34 | 
35 | static void rx() {
36 |     CanRxMsg message;
37 |     uint8_t counter;
38 | 
39 |     while (CAN_MessagePending(CAN1, CAN_FIFO0) > 0) {
40 |         CAN_Receive(CAN1, CAN_FIFO0, &message);
41 | 
42 |         if (message.DLC < 1) {
43 |             GPIO_SetBits(GPIOD, LED_RED);
44 |             return;
45 |         }
46 | 
47 |         counter = message.Data[0];
48 |         if (counter % 2 == 0) {
49 |             GPIO_ResetBits(GPIOD, LED_BLUE);
50 |         } else {
51 |             GPIO_SetBits(GPIOD, LED_BLUE);
52 |         }
53 |     }
54 | }
55 | 
56 | // timer handler
57 | void TIM2_IRQHandler() {
58 |     if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) {
59 |         TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
60 |         GPIO_ToggleBits(GPIOD, LED_ORANGE);
61 |         tx(led_counter++);
62 |     }
63 | }
64 | 
65 | // can message handler
66 | void CAN1_RX0_IRQHandler() {
67 |     if (CAN_GetITStatus(CAN1, CAN_IT_FMP0) != RESET) {
68 |         rx();
69 |     }
70 | }
71 | 
72 | // user button handler
73 | void EXTI0_IRQHandler() {
74 |     if (EXTI_GetITStatus(EXTI_Line0) != RESET) {
75 |         EXTI_ClearITPendingBit(EXTI_Line0);
76 |         GPIO_ResetBits(GPIOD, LED_RED);
77 |     }
78 | }
79 | 
80 | int main() {
81 |     if (setup() != 0) {
82 |         GPIO_SetBits(GPIOD, LED_RED);
83 |         return -1;
84 |     }
85 |     GPIO_SetBits(GPIOD, LED_GREEN);
86 | 
87 |     while (1) asm("wfi");
88 | 
89 |     return 0;
90 | }
91 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_crc.h:
--------------------------------------------------------------------------------
 1 | /**
 2 |   ******************************************************************************
 3 |   * @file    stm32f4xx_crc.h
 4 |   * @author  MCD Application Team
 5 |   * @version V1.6.0
 6 |   * @date    10-July-2015
 7 |   * @brief   This file contains all the functions prototypes for the CRC firmware 
 8 |   *          library.
 9 |   ******************************************************************************
10 |   * @attention
11 |   *
12 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
13 |   *
14 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 |   * You may not use this file except in compliance with the License.
16 |   * You may obtain a copy of the License at:
17 |   *
18 |   *        http://www.st.com/software_license_agreement_liberty_v2
19 |   *
20 |   * Unless required by applicable law or agreed to in writing, software 
21 |   * distributed under the License is distributed on an "AS IS" BASIS, 
22 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 |   * See the License for the specific language governing permissions and
24 |   * limitations under the License.
25 |   *
26 |   ******************************************************************************
27 |   */
28 | 
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_CRC_H
31 | #define __STM32F4xx_CRC_H
32 | 
33 | #ifdef __cplusplus
34 |  extern "C" {
35 | #endif
36 | 
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 | 
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 |   * @{
42 |   */
43 | 
44 | /** @addtogroup CRC
45 |   * @{
46 |   */
47 | 
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 | 
51 | /** @defgroup CRC_Exported_Constants
52 |   * @{
53 |   */
54 | 
55 | /**
56 |   * @}
57 |   */
58 | 
59 | /* Exported macro ------------------------------------------------------------*/
60 | /* Exported functions --------------------------------------------------------*/  
61 | 
62 | void CRC_ResetDR(void);
63 | uint32_t CRC_CalcCRC(uint32_t Data);
64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
65 | uint32_t CRC_GetCRC(void);
66 | void CRC_SetIDRegister(uint8_t IDValue);
67 | uint8_t CRC_GetIDRegister(void);
68 | 
69 | #ifdef __cplusplus
70 | }
71 | #endif
72 | 
73 | #endif /* __STM32F4xx_CRC_H */
74 | 
75 | /**
76 |   * @}
77 |   */
78 | 
79 | /**
80 |   * @}
81 |   */
82 | 
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx/system_stm32f4xx.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    system_stm32f4xx.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.1
  6 |   * @date    21-October-2015
  7 |   * @brief   CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.       
  8 |   ******************************************************************************  
  9 |   * @attention
 10 |   *
 11 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 12 |   *
 13 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 14 |   * You may not use this file except in compliance with the License.
 15 |   * You may obtain a copy of the License at:
 16 |   *
 17 |   *        http://www.st.com/software_license_agreement_liberty_v2
 18 |   *
 19 |   * Unless required by applicable law or agreed to in writing, software 
 20 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 21 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 22 |   * See the License for the specific language governing permissions and
 23 |   * limitations under the License.
 24 |   *
 25 |   ******************************************************************************  
 26 |   */ 
 27 | 
 28 | /** @addtogroup CMSIS
 29 |   * @{
 30 |   */
 31 | 
 32 | /** @addtogroup stm32f4xx_system
 33 |   * @{
 34 |   */  
 35 |   
 36 | /**
 37 |   * @brief Define to prevent recursive inclusion
 38 |   */
 39 | #ifndef __SYSTEM_STM32F4XX_H
 40 | #define __SYSTEM_STM32F4XX_H
 41 | 
 42 | #ifdef __cplusplus
 43 |  extern "C" {
 44 | #endif 
 45 | 
 46 | /** @addtogroup STM32F4xx_System_Includes
 47 |   * @{
 48 |   */
 49 | 
 50 | /**
 51 |   * @}
 52 |   */
 53 | 
 54 | 
 55 | /** @addtogroup STM32F4xx_System_Exported_types
 56 |   * @{
 57 |   */
 58 | 
 59 | extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
 60 | 
 61 | 
 62 | /**
 63 |   * @}
 64 |   */
 65 | 
 66 | /** @addtogroup STM32F4xx_System_Exported_Constants
 67 |   * @{
 68 |   */
 69 | 
 70 | /**
 71 |   * @}
 72 |   */
 73 | 
 74 | /** @addtogroup STM32F4xx_System_Exported_Macros
 75 |   * @{
 76 |   */
 77 | 
 78 | /**
 79 |   * @}
 80 |   */
 81 | 
 82 | /** @addtogroup STM32F4xx_System_Exported_Functions
 83 |   * @{
 84 |   */
 85 |   
 86 | extern void SystemInit(void);
 87 | extern void SystemCoreClockUpdate(void);
 88 | /**
 89 |   * @}
 90 |   */
 91 | 
 92 | #ifdef __cplusplus
 93 | }
 94 | #endif
 95 | 
 96 | #endif /*__SYSTEM_STM32F4XX_H */
 97 | 
 98 | /**
 99 |   * @}
100 |   */
101 |   
102 | /**
103 |   * @}
104 |   */  
105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
106 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_flash_ramfunc.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_flash_ramfunc.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   Header file of FLASH RAMFUNC driver.
  8 |   ******************************************************************************
  9 |   * @attention
 10 |   *
 11 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 12 |   *
 13 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 14 |   * You may not use this file except in compliance with the License.
 15 |   * You may obtain a copy of the License at:
 16 |   *
 17 |   *        http://www.st.com/software_license_agreement_liberty_v2
 18 |   *
 19 |   * Unless required by applicable law or agreed to in writing, software 
 20 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 21 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 22 |   * See the License for the specific language governing permissions and
 23 |   * limitations under the License.
 24 |   *
 25 |   ******************************************************************************
 26 |   */
 27 | 
 28 | 
 29 | /* Define to prevent recursive inclusion -------------------------------------*/
 30 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H
 31 | #define __STM32F4xx_FLASH_RAMFUNC_H
 32 | 
 33 | #ifdef __cplusplus
 34 |  extern "C" {
 35 | #endif
 36 | 
 37 | /* Includes ------------------------------------------------------------------*/
 38 | #include "stm32f4xx.h"
 39 | 
 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 41 |   * @{
 42 |   */
 43 | 
 44 | /** @addtogroup FLASH RAMFUNC
 45 |   * @{
 46 |   */ 
 47 | 
 48 | /* Exported types ------------------------------------------------------------*/
 49 | /* Private define ------------------------------------------------------------*/
 50 | /** 
 51 |   * @brief  __RAM_FUNC definition
 52 |   */ 
 53 | #if defined ( __CC_ARM   )
 54 | /* ARM Compiler
 55 |    ------------
 56 |    RAM functions are defined using the toolchain options. 
 57 |    Functions that are executed in RAM should reside in a separate source module.
 58 |    Using the 'Options for File' dialog you can simply change the 'Code / Const' 
 59 |    area of a module to a memory space in physical RAM.
 60 |    Available memory areas are declared in the 'Target' tab of the 'Options for Target'
 61 |    dialog. 
 62 | */
 63 | #define __RAM_FUNC void 
 64 | 
 65 | #elif defined ( __ICCARM__ )
 66 | /* ICCARM Compiler
 67 |    ---------------
 68 |    RAM functions are defined using a specific toolchain keyword "__ramfunc". 
 69 | */
 70 | #define __RAM_FUNC __ramfunc void
 71 | 
 72 | #elif defined   (  __GNUC__  )
 73 | /* GNU Compiler
 74 |    ------------
 75 |   RAM functions are defined using a specific toolchain attribute 
 76 |    "__attribute__((section(".RamFunc")))".
 77 | */
 78 | #define __RAM_FUNC void  __attribute__((section(".RamFunc")))
 79 | 
 80 | #endif
 81 | /* Exported constants --------------------------------------------------------*/
 82 | /* Exported macro ------------------------------------------------------------*/
 83 | /* Exported functions --------------------------------------------------------*/
 84 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState);
 85 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState);
 86 | 
 87 | 
 88 | #ifdef __cplusplus
 89 | }
 90 | #endif
 91 | 
 92 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */
 93 | 
 94 | /**
 95 |   * @}
 96 |   */ 
 97 | 
 98 | /**
 99 |   * @}
100 |   */ 
101 | 
102 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
103 | 
104 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_wwdg.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_wwdg.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file contains all the functions prototypes for the WWDG firmware
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 13 |   *
 14 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 15 |   * You may not use this file except in compliance with the License.
 16 |   * You may obtain a copy of the License at:
 17 |   *
 18 |   *        http://www.st.com/software_license_agreement_liberty_v2
 19 |   *
 20 |   * Unless required by applicable law or agreed to in writing, software 
 21 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 22 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 23 |   * See the License for the specific language governing permissions and
 24 |   * limitations under the License.
 25 |   *
 26 |   ******************************************************************************
 27 |   */
 28 | 
 29 | /* Define to prevent recursive inclusion -------------------------------------*/
 30 | #ifndef __STM32F4xx_WWDG_H
 31 | #define __STM32F4xx_WWDG_H
 32 | 
 33 | #ifdef __cplusplus
 34 |  extern "C" {
 35 | #endif
 36 | 
 37 | /* Includes ------------------------------------------------------------------*/
 38 | #include "stm32f4xx.h"
 39 | 
 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 41 |   * @{
 42 |   */
 43 | 
 44 | /** @addtogroup WWDG
 45 |   * @{
 46 |   */ 
 47 | 
 48 | /* Exported types ------------------------------------------------------------*/
 49 | /* Exported constants --------------------------------------------------------*/
 50 | 
 51 | /** @defgroup WWDG_Exported_Constants
 52 |   * @{
 53 |   */ 
 54 |   
 55 | /** @defgroup WWDG_Prescaler 
 56 |   * @{
 57 |   */
 58 |   
 59 | #define WWDG_Prescaler_1    ((uint32_t)0x00000000)
 60 | #define WWDG_Prescaler_2    ((uint32_t)0x00000080)
 61 | #define WWDG_Prescaler_4    ((uint32_t)0x00000100)
 62 | #define WWDG_Prescaler_8    ((uint32_t)0x00000180)
 63 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
 64 |                                       ((PRESCALER) == WWDG_Prescaler_2) || \
 65 |                                       ((PRESCALER) == WWDG_Prescaler_4) || \
 66 |                                       ((PRESCALER) == WWDG_Prescaler_8))
 67 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
 68 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
 69 | 
 70 | /**
 71 |   * @}
 72 |   */ 
 73 | 
 74 | /**
 75 |   * @}
 76 |   */ 
 77 | 
 78 | /* Exported macro ------------------------------------------------------------*/
 79 | /* Exported functions --------------------------------------------------------*/
 80 |   
 81 | /*  Function used to set the WWDG configuration to the default reset state ****/  
 82 | void WWDG_DeInit(void);
 83 | 
 84 | /* Prescaler, Refresh window and Counter configuration functions **************/
 85 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
 86 | void WWDG_SetWindowValue(uint8_t WindowValue);
 87 | void WWDG_EnableIT(void);
 88 | void WWDG_SetCounter(uint8_t Counter);
 89 | 
 90 | /* WWDG activation function ***************************************************/
 91 | void WWDG_Enable(uint8_t Counter);
 92 | 
 93 | /* Interrupts and flags management functions **********************************/
 94 | FlagStatus WWDG_GetFlagStatus(void);
 95 | void WWDG_ClearFlag(void);
 96 | 
 97 | #ifdef __cplusplus
 98 | }
 99 | #endif
100 | 
101 | #endif /* __STM32F4xx_WWDG_H */
102 | 
103 | /**
104 |   * @}
105 |   */ 
106 | 
107 | /**
108 |   * @}
109 |   */ 
110 | 
111 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
112 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/CMSIS/arm_const_structs.h:
--------------------------------------------------------------------------------
 1 | /* ----------------------------------------------------------------------
 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
 3 | *
 4 | * $Date:        31. July 2014
 5 | * $Revision: 	V1.4.4
 6 | *
 7 | * Project: 	    CMSIS DSP Library
 8 | * Title:	    arm_const_structs.h
 9 | *
10 | * Description:	This file has constant structs that are initialized for
11 | *              user convenience.  For example, some can be given as
12 | *              arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | *   - Redistributions of source code must retain the above copyright
20 | *     notice, this list of conditions and the following disclaimer.
21 | *   - Redistributions in binary form must reproduce the above copyright
22 | *     notice, this list of conditions and the following disclaimer in
23 | *     the documentation and/or other materials provided with the
24 | *     distribution.
25 | *   - Neither the name of ARM LIMITED nor the names of its contributors
26 | *     may be used to endorse or promote products derived from this
27 | *     software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 | 
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 | 
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 | 
49 |    extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
50 |    extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
51 |    extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
52 |    extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
53 |    extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
54 |    extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
55 |    extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
56 |    extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
57 |    extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
58 | 
59 |    extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
60 |    extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
61 |    extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
62 |    extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
63 |    extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
64 |    extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
65 |    extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
66 |    extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
67 |    extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
68 | 
69 |    extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
70 |    extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
71 |    extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
72 |    extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
73 |    extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
74 |    extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
75 |    extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
76 |    extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
77 |    extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
78 | 
79 | #endif
80 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_crc.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides all the CRC firmware functions.
  8 |   ******************************************************************************
  9 |   * @attention
 10 |   *
 11 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 12 |   *
 13 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 14 |   * You may not use this file except in compliance with the License.
 15 |   * You may obtain a copy of the License at:
 16 |   *
 17 |   *        http://www.st.com/software_license_agreement_liberty_v2
 18 |   *
 19 |   * Unless required by applicable law or agreed to in writing, software 
 20 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 21 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 22 |   * See the License for the specific language governing permissions and
 23 |   * limitations under the License.
 24 |   *
 25 |   ******************************************************************************
 26 |   */
 27 | 
 28 | /* Includes ------------------------------------------------------------------*/
 29 | #include "stm32f4xx_crc.h"
 30 | 
 31 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 32 |   * @{
 33 |   */
 34 | 
 35 | /** @defgroup CRC 
 36 |   * @brief CRC driver modules
 37 |   * @{
 38 |   */
 39 | 
 40 | /* Private typedef -----------------------------------------------------------*/
 41 | /* Private define ------------------------------------------------------------*/
 42 | /* Private macro -------------------------------------------------------------*/
 43 | /* Private variables ---------------------------------------------------------*/
 44 | /* Private function prototypes -----------------------------------------------*/
 45 | /* Private functions ---------------------------------------------------------*/
 46 | 
 47 | /** @defgroup CRC_Private_Functions
 48 |   * @{
 49 |   */
 50 | 
 51 | /**
 52 |   * @brief  Resets the CRC Data register (DR).
 53 |   * @param  None
 54 |   * @retval None
 55 |   */
 56 | void CRC_ResetDR(void)
 57 | {
 58 |   /* Reset CRC generator */
 59 |   CRC->CR = CRC_CR_RESET;
 60 | }
 61 | 
 62 | /**
 63 |   * @brief  Computes the 32-bit CRC of a given data word(32-bit).
 64 |   * @param  Data: data word(32-bit) to compute its CRC
 65 |   * @retval 32-bit CRC
 66 |   */
 67 | uint32_t CRC_CalcCRC(uint32_t Data)
 68 | {
 69 |   CRC->DR = Data;
 70 |   
 71 |   return (CRC->DR);
 72 | }
 73 | 
 74 | /**
 75 |   * @brief  Computes the 32-bit CRC of a given buffer of data word(32-bit).
 76 |   * @param  pBuffer: pointer to the buffer containing the data to be computed
 77 |   * @param  BufferLength: length of the buffer to be computed					
 78 |   * @retval 32-bit CRC
 79 |   */
 80 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
 81 | {
 82 |   uint32_t index = 0;
 83 |   
 84 |   for(index = 0; index < BufferLength; index++)
 85 |   {
 86 |     CRC->DR = pBuffer[index];
 87 |   }
 88 |   return (CRC->DR);
 89 | }
 90 | 
 91 | /**
 92 |   * @brief  Returns the current CRC value.
 93 |   * @param  None
 94 |   * @retval 32-bit CRC
 95 |   */
 96 | uint32_t CRC_GetCRC(void)
 97 | {
 98 |   return (CRC->DR);
 99 | }
100 | 
101 | /**
102 |   * @brief  Stores a 8-bit data in the Independent Data(ID) register.
103 |   * @param  IDValue: 8-bit value to be stored in the ID register 					
104 |   * @retval None
105 |   */
106 | void CRC_SetIDRegister(uint8_t IDValue)
107 | {
108 |   CRC->IDR = IDValue;
109 | }
110 | 
111 | /**
112 |   * @brief  Returns the 8-bit data stored in the Independent Data(ID) register
113 |   * @param  None
114 |   * @retval 8-bit value of the ID register 
115 |   */
116 | uint8_t CRC_GetIDRegister(void)
117 | {
118 |   return (CRC->IDR);
119 | }
120 | 
121 | /**
122 |   * @}
123 |   */
124 | 
125 | /**
126 |   * @}
127 |   */
128 | 
129 | /**
130 |   * @}
131 |   */
132 | 
133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
134 | 


--------------------------------------------------------------------------------
/canping.c:
--------------------------------------------------------------------------------
  1 | #include <inttypes.h>
  2 | #include <libgen.h>
  3 | #include <signal.h>
  4 | #include <stdio.h>
  5 | #include <stdlib.h>
  6 | #include <unistd.h>
  7 | #include <string.h>
  8 | 
  9 | #include <net/if.h>
 10 | #include <sys/types.h>
 11 | #include <sys/socket.h>
 12 | #include <sys/ioctl.h>
 13 | #include <sys/time.h>
 14 | 
 15 | #include <linux/can.h>
 16 | #include <linux/can/raw.h>
 17 | 
 18 | void print_usage(char* argv0) {
 19 |   char* my_name = basename(argv0);
 20 | 
 21 |   printf("%s: Send a counter message to CAN Bus every second.\n\n", my_name);
 22 |   printf("Usage:\n");
 23 |   printf("  %s -n [interface] -i [id]\n", my_name);
 24 |   printf("    -n [interface] : CAN interface. Required.\n");
 25 |   printf("    -i [id]        : CAN ID for pings. Default: 0x7FF\n");
 26 |   printf("Example:\n");
 27 |   printf("  %s -n can0\n", my_name);
 28 | }
 29 | 
 30 | int parse_cmdline(int argc, char** argv, char *ifname, canid_t *id) {
 31 |   int c;
 32 | 
 33 |   opterr = 0;
 34 | 
 35 |   while ((c = getopt(argc, argv, "hi:n:")) != -1)
 36 |      switch (c) {
 37 |        case 'h':
 38 |          print_usage(argv[0]);
 39 |          return 1;
 40 |        case 'i':
 41 |          *id = strtoumax(optarg, NULL, 0);
 42 |          break;
 43 |        case 'n':
 44 |          strncpy(ifname, optarg, IFNAMSIZ-1);
 45 |          break;
 46 |        case '?':
 47 |          if (optopt == 'i' || optopt == 'n')
 48 |            fprintf (stderr, "Option -%c requires an argument.\n", optopt);
 49 |          else if (isprint (optopt))
 50 |            fprintf (stderr, "Unknown option `-%c'.\n", optopt);
 51 |          else
 52 |            fprintf (stderr,
 53 |                     "Unknown option character `\\x%x'.\n",
 54 |                     optopt);
 55 |          print_usage(argv[0]);
 56 |          return 1;
 57 |        default:
 58 |          print_usage(argv[0]);
 59 |          abort();
 60 |        }
 61 | 
 62 |   if (ifname[0] == '\0') {
 63 |     fputs("option -n [ifname] is required.\n", stderr);
 64 |     print_usage(argv[0]);
 65 |     return 1;
 66 |   }
 67 | 
 68 |   return 0;
 69 | }
 70 | 
 71 | int main(int argc, char** argv) {
 72 |   int status;
 73 |   int sfd;
 74 |   struct sockaddr_can addr;
 75 |   struct can_frame frame;
 76 |   struct ifreq ifr;
 77 |   struct sigaction sa;
 78 |   struct itimerval timer;
 79 | 
 80 |   // default values for opts
 81 |   char ifname[IFNAMSIZ] = "";
 82 |   canid_t id = 0x7FF;
 83 | 
 84 |   // parse opts
 85 |   status = parse_cmdline(argc, argv, ifname, &id);
 86 |   if (status != 0) {
 87 |     return EXIT_FAILURE;
 88 |   }
 89 | 
 90 |   printf("using interface %s and id %02X\n", ifname, id);
 91 | 
 92 |   // open can socket
 93 |   sfd = socket(PF_CAN, SOCK_RAW, CAN_RAW);
 94 |   if (sfd < 0) {
 95 |     perror("opening socket");
 96 |     return EXIT_FAILURE;
 97 |   }
 98 | 
 99 |   // find interface index
100 |   strcpy(ifr.ifr_name, ifname);
101 |   status = ioctl(sfd, SIOCGIFINDEX, &ifr);
102 |   if (status < 0) {
103 |     perror("finding interface index");
104 |     return EXIT_FAILURE;
105 |   }
106 | 
107 |   // init can socket binding
108 |   addr.can_family  = AF_CAN;
109 |   addr.can_ifindex = ifr.ifr_ifindex; 
110 | 
111 |   // bind can socket
112 |   status = bind(sfd, (struct sockaddr *)&addr, sizeof(addr));
113 |   if (status < 0) {
114 |     perror("binding socket");
115 |     return EXIT_FAILURE;
116 |   }
117 | 
118 |   // init can frame
119 |   frame.can_id  = id;
120 |   frame.can_dlc = 1;
121 | 
122 |   // define timer callback
123 |   void ping(int signum) {
124 |     static unsigned char counter = 0;
125 |     int nbytes;
126 | 
127 |     #ifdef DEBUG
128 |     printf("ping : %02X\n", counter);
129 |     #endif
130 | 
131 |     frame.data[0] = counter++;
132 |     nbytes = write(sfd, &frame, sizeof(struct can_frame));
133 |     if (nbytes != sizeof(frame)) {
134 |       fprintf(stderr, "ERROR: Wrote %d bytes, expected %u\n", nbytes, sizeof(frame));
135 |       //abort();
136 |     }
137 |   }
138 | 
139 |   // set timer callback
140 |   memset (&sa, 0, sizeof(sa));
141 |   sa.sa_handler = &ping;
142 |   status = sigaction(SIGALRM, &sa, NULL);
143 |   if (status < 0) {
144 |     perror("setting sigaction");
145 |     return EXIT_FAILURE;
146 |   }
147 | 
148 |   // init timer
149 |   timer.it_value.tv_sec = 1;
150 |   timer.it_value.tv_usec = 0;
151 |   timer.it_interval.tv_sec = 0;
152 |   timer.it_interval.tv_usec = 500000;
153 | 
154 |   // start timer
155 |   status = setitimer (ITIMER_REAL, &timer, NULL);
156 |   if (status < 0) {
157 |     perror("setting timer");
158 |     return EXIT_FAILURE;
159 |   }
160 | 
161 |   while (1) {
162 |     pause();
163 |   }
164 | 
165 |   return EXIT_SUCCESS;
166 | }
167 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rng.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_rng.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file contains all the functions prototypes for the Random 
  8 |   *          Number Generator(RNG) firmware library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 13 |   *
 14 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 15 |   * You may not use this file except in compliance with the License.
 16 |   * You may obtain a copy of the License at:
 17 |   *
 18 |   *        http://www.st.com/software_license_agreement_liberty_v2
 19 |   *
 20 |   * Unless required by applicable law or agreed to in writing, software 
 21 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 22 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 23 |   * See the License for the specific language governing permissions and
 24 |   * limitations under the License.
 25 |   *
 26 |   ******************************************************************************
 27 |   */
 28 | 
 29 | /* Define to prevent recursive inclusion -------------------------------------*/
 30 | #ifndef __STM32F4xx_RNG_H
 31 | #define __STM32F4xx_RNG_H
 32 | 
 33 | #ifdef __cplusplus
 34 |  extern "C" {
 35 | #endif
 36 | 
 37 | /* Includes ------------------------------------------------------------------*/
 38 | #include "stm32f4xx.h"
 39 | 
 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 41 |   * @{
 42 |   */
 43 | 
 44 | /** @addtogroup RNG
 45 |   * @{
 46 |   */ 
 47 | #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F410xx) || defined(STM32F429_439xx) || defined(STM32F469_479xx)
 48 | /* Exported types ------------------------------------------------------------*/
 49 | /* Exported constants --------------------------------------------------------*/ 
 50 | 
 51 | /** @defgroup RNG_Exported_Constants
 52 |   * @{
 53 |   */
 54 |   
 55 | /** @defgroup RNG_flags_definition  
 56 |   * @{
 57 |   */ 
 58 | #define RNG_FLAG_DRDY               ((uint8_t)0x0001) /*!< Data ready */
 59 | #define RNG_FLAG_CECS               ((uint8_t)0x0002) /*!< Clock error current status */
 60 | #define RNG_FLAG_SECS               ((uint8_t)0x0004) /*!< Seed error current status */
 61 | 
 62 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \
 63 |                                    ((RNG_FLAG) == RNG_FLAG_CECS) || \
 64 |                                    ((RNG_FLAG) == RNG_FLAG_SECS))
 65 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \
 66 |                                     ((RNG_FLAG) == RNG_FLAG_SECS))
 67 | /**
 68 |   * @}
 69 |   */ 
 70 | 
 71 | /** @defgroup RNG_interrupts_definition   
 72 |   * @{
 73 |   */  
 74 | #define RNG_IT_CEI                  ((uint8_t)0x20) /*!< Clock error interrupt */
 75 | #define RNG_IT_SEI                  ((uint8_t)0x40) /*!< Seed error interrupt */
 76 | 
 77 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00))
 78 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI))
 79 | /**
 80 |   * @}
 81 |   */ 
 82 | 
 83 | /**
 84 |   * @}
 85 |   */ 
 86 | 
 87 | /* Exported macro ------------------------------------------------------------*/
 88 | /* Exported functions --------------------------------------------------------*/ 
 89 | 
 90 | /*  Function used to set the RNG configuration to the default reset state *****/ 
 91 | void RNG_DeInit(void);
 92 | 
 93 | /* Configuration function *****************************************************/
 94 | void RNG_Cmd(FunctionalState NewState);
 95 | 
 96 | /* Get 32 bit Random number function ******************************************/
 97 | uint32_t RNG_GetRandomNumber(void);
 98 | 
 99 | /* Interrupts and flags management functions **********************************/
100 | void RNG_ITConfig(FunctionalState NewState);
101 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG);
102 | void RNG_ClearFlag(uint8_t RNG_FLAG);
103 | ITStatus RNG_GetITStatus(uint8_t RNG_IT);
104 | void RNG_ClearITPendingBit(uint8_t RNG_IT);
105 | #endif /* STM32F40_41xxx || STM32F427_437xx || STM32F410xx || STM32F429_439xx || STM32F469_479xx */
106 | 
107 | #ifdef __cplusplus
108 | }
109 | #endif
110 | 
111 | #endif /*__STM32F4xx_RNG_H */
112 | 
113 | /**
114 |   * @}
115 |   */ 
116 | 
117 | /**
118 |   * @}
119 |   */ 
120 | 
121 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
122 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dbgmcu.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_dbgmcu.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file contains all the functions prototypes for the DBGMCU firmware library.
  8 |   ******************************************************************************
  9 |   * @attention
 10 |   *
 11 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 12 |   *
 13 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 14 |   * You may not use this file except in compliance with the License.
 15 |   * You may obtain a copy of the License at:
 16 |   *
 17 |   *        http://www.st.com/software_license_agreement_liberty_v2
 18 |   *
 19 |   * Unless required by applicable law or agreed to in writing, software 
 20 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 21 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 22 |   * See the License for the specific language governing permissions and
 23 |   * limitations under the License.
 24 |   *
 25 |   ******************************************************************************
 26 |   */
 27 | 
 28 | /* Define to prevent recursive inclusion -------------------------------------*/
 29 | #ifndef __STM32F4xx_DBGMCU_H
 30 | #define __STM32F4xx_DBGMCU_H
 31 | 
 32 | #ifdef __cplusplus
 33 |  extern "C" {
 34 | #endif
 35 | 
 36 | /* Includes ------------------------------------------------------------------*/
 37 | #include "stm32f4xx.h"
 38 | 
 39 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 40 |   * @{
 41 |   */
 42 | 
 43 | /** @addtogroup DBGMCU
 44 |   * @{
 45 |   */ 
 46 | 
 47 | /* Exported types ------------------------------------------------------------*/
 48 | /* Exported constants --------------------------------------------------------*/
 49 | 
 50 | /** @defgroup DBGMCU_Exported_Constants
 51 |   * @{
 52 |   */ 
 53 | #define DBGMCU_SLEEP                 ((uint32_t)0x00000001)
 54 | #define DBGMCU_STOP                  ((uint32_t)0x00000002)
 55 | #define DBGMCU_STANDBY               ((uint32_t)0x00000004)
 56 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00))
 57 | 
 58 | #define DBGMCU_TIM2_STOP             ((uint32_t)0x00000001)
 59 | #define DBGMCU_TIM3_STOP             ((uint32_t)0x00000002)
 60 | #define DBGMCU_TIM4_STOP             ((uint32_t)0x00000004)
 61 | #define DBGMCU_TIM5_STOP             ((uint32_t)0x00000008)
 62 | #define DBGMCU_TIM6_STOP             ((uint32_t)0x00000010)
 63 | #define DBGMCU_TIM7_STOP             ((uint32_t)0x00000020)
 64 | #define DBGMCU_TIM12_STOP            ((uint32_t)0x00000040)
 65 | #define DBGMCU_TIM13_STOP            ((uint32_t)0x00000080)
 66 | #define DBGMCU_TIM14_STOP            ((uint32_t)0x00000100)
 67 | #define DBGMCU_RTC_STOP              ((uint32_t)0x00000400)
 68 | #define DBGMCU_WWDG_STOP             ((uint32_t)0x00000800)
 69 | #define DBGMCU_IWDG_STOP             ((uint32_t)0x00001000)
 70 | #define DBGMCU_I2C1_SMBUS_TIMEOUT    ((uint32_t)0x00200000)
 71 | #define DBGMCU_I2C2_SMBUS_TIMEOUT    ((uint32_t)0x00400000)
 72 | #define DBGMCU_I2C3_SMBUS_TIMEOUT    ((uint32_t)0x00800000)
 73 | #define DBGMCU_CAN1_STOP             ((uint32_t)0x02000000)
 74 | #define DBGMCU_CAN2_STOP             ((uint32_t)0x04000000)
 75 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00))
 76 | 
 77 | #define DBGMCU_TIM1_STOP             ((uint32_t)0x00000001)
 78 | #define DBGMCU_TIM8_STOP             ((uint32_t)0x00000002)
 79 | #define DBGMCU_TIM9_STOP             ((uint32_t)0x00010000)
 80 | #define DBGMCU_TIM10_STOP            ((uint32_t)0x00020000)
 81 | #define DBGMCU_TIM11_STOP            ((uint32_t)0x00040000)
 82 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00))
 83 | /**
 84 |   * @}
 85 |   */ 
 86 | 
 87 | /* Exported macro ------------------------------------------------------------*/
 88 | /* Exported functions --------------------------------------------------------*/ 
 89 | uint32_t DBGMCU_GetREVID(void);
 90 | uint32_t DBGMCU_GetDEVID(void);
 91 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
 92 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
 93 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
 94 | 
 95 | #ifdef __cplusplus
 96 | }
 97 | #endif
 98 | 
 99 | #endif /* __STM32F4xx_DBGMCU_H */
100 | 
101 | /**
102 |   * @}
103 |   */ 
104 | 
105 | /**
106 |   * @}
107 |   */ 
108 | 
109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
110 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_iwdg.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_iwdg.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file contains all the functions prototypes for the IWDG 
  8 |   *          firmware library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 13 |   *
 14 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 15 |   * You may not use this file except in compliance with the License.
 16 |   * You may obtain a copy of the License at:
 17 |   *
 18 |   *        http://www.st.com/software_license_agreement_liberty_v2
 19 |   *
 20 |   * Unless required by applicable law or agreed to in writing, software 
 21 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 22 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 23 |   * See the License for the specific language governing permissions and
 24 |   * limitations under the License.
 25 |   *
 26 |   ******************************************************************************
 27 |   */
 28 | 
 29 | /* Define to prevent recursive inclusion -------------------------------------*/
 30 | #ifndef __STM32F4xx_IWDG_H
 31 | #define __STM32F4xx_IWDG_H
 32 | 
 33 | #ifdef __cplusplus
 34 |  extern "C" {
 35 | #endif
 36 | 
 37 | /* Includes ------------------------------------------------------------------*/
 38 | #include "stm32f4xx.h"
 39 | 
 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 41 |   * @{
 42 |   */
 43 | 
 44 | /** @addtogroup IWDG
 45 |   * @{
 46 |   */
 47 | 
 48 | /* Exported types ------------------------------------------------------------*/
 49 | /* Exported constants --------------------------------------------------------*/
 50 | 
 51 | /** @defgroup IWDG_Exported_Constants
 52 |   * @{
 53 |   */
 54 |   
 55 | /** @defgroup IWDG_WriteAccess
 56 |   * @{
 57 |   */
 58 | #define IWDG_WriteAccess_Enable     ((uint16_t)0x5555)
 59 | #define IWDG_WriteAccess_Disable    ((uint16_t)0x0000)
 60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
 61 |                                       ((ACCESS) == IWDG_WriteAccess_Disable))
 62 | /**
 63 |   * @}
 64 |   */
 65 | 
 66 | /** @defgroup IWDG_prescaler 
 67 |   * @{
 68 |   */
 69 | #define IWDG_Prescaler_4            ((uint8_t)0x00)
 70 | #define IWDG_Prescaler_8            ((uint8_t)0x01)
 71 | #define IWDG_Prescaler_16           ((uint8_t)0x02)
 72 | #define IWDG_Prescaler_32           ((uint8_t)0x03)
 73 | #define IWDG_Prescaler_64           ((uint8_t)0x04)
 74 | #define IWDG_Prescaler_128          ((uint8_t)0x05)
 75 | #define IWDG_Prescaler_256          ((uint8_t)0x06)
 76 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4)  || \
 77 |                                       ((PRESCALER) == IWDG_Prescaler_8)  || \
 78 |                                       ((PRESCALER) == IWDG_Prescaler_16) || \
 79 |                                       ((PRESCALER) == IWDG_Prescaler_32) || \
 80 |                                       ((PRESCALER) == IWDG_Prescaler_64) || \
 81 |                                       ((PRESCALER) == IWDG_Prescaler_128)|| \
 82 |                                       ((PRESCALER) == IWDG_Prescaler_256))
 83 | /**
 84 |   * @}
 85 |   */
 86 | 
 87 | /** @defgroup IWDG_Flag 
 88 |   * @{
 89 |   */
 90 | #define IWDG_FLAG_PVU               ((uint16_t)0x0001)
 91 | #define IWDG_FLAG_RVU               ((uint16_t)0x0002)
 92 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
 93 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
 94 | /**
 95 |   * @}
 96 |   */
 97 | 
 98 | /**
 99 |   * @}
100 |   */
101 | 
102 | /* Exported macro ------------------------------------------------------------*/
103 | /* Exported functions --------------------------------------------------------*/
104 | 
105 | /* Prescaler and Counter configuration functions ******************************/
106 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
107 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
108 | void IWDG_SetReload(uint16_t Reload);
109 | void IWDG_ReloadCounter(void);
110 | 
111 | /* IWDG activation function ***************************************************/
112 | void IWDG_Enable(void);
113 | 
114 | /* Flag management function ***************************************************/
115 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
116 | 
117 | #ifdef __cplusplus
118 | }
119 | #endif
120 | 
121 | #endif /* __STM32F4xx_IWDG_H */
122 | 
123 | /**
124 |   * @}
125 |   */
126 | 
127 | /**
128 |   * @}
129 |   */
130 | 
131 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
132 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/src/setup.c:
--------------------------------------------------------------------------------
  1 | #include "setup.h"
  2 | #include "stm32f4xx_can.h"
  3 | #include "stm32f4xx_exti.h"
  4 | #include "stm32f4xx_gpio.h"
  5 | #include "stm32f4xx_rcc.h"
  6 | #include "stm32f4xx_syscfg.h"
  7 | #include "stm32f4xx_tim.h"
  8 | #include "misc.h"
  9 | 
 10 | uint8_t setup() {
 11 |     GPIO_InitTypeDef GPIO_InitStructure;
 12 |     CAN_InitTypeDef CAN_InitStructure;
 13 |     NVIC_InitTypeDef NVIC_InitStructure;
 14 |     EXTI_InitTypeDef EXTI_InitStructure;
 15 | 
 16 |     // All four LED's
 17 |     RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
 18 |     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
 19 |     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
 20 |     GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
 21 |     GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
 22 |     GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
 23 |     GPIO_Init(GPIOD, &GPIO_InitStructure);
 24 |     GPIO_ResetBits(GPIOD, GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15);
 25 | 
 26 |     // CAN on PB8 (RX) and PB9 (TX)
 27 |     RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
 28 |     GPIO_PinAFConfig(GPIOB, GPIO_PinSource8, GPIO_AF_CAN1);
 29 |     GPIO_PinAFConfig(GPIOB, GPIO_PinSource9, GPIO_AF_CAN1);
 30 | 
 31 |     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9;
 32 |     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
 33 |     GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
 34 |     GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
 35 |     GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
 36 |     GPIO_Init(GPIOB, &GPIO_InitStructure);
 37 | 
 38 |     RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1, ENABLE);
 39 | 
 40 |     CAN_DeInit(CAN1);
 41 | 
 42 |     CAN_StructInit(&CAN_InitStructure);
 43 |     CAN_InitStructure.CAN_TTCM = DISABLE;
 44 |     CAN_InitStructure.CAN_ABOM = DISABLE;
 45 |     CAN_InitStructure.CAN_AWUM = DISABLE;
 46 |     CAN_InitStructure.CAN_NART = ENABLE;
 47 |     CAN_InitStructure.CAN_RFLM = DISABLE;
 48 |     CAN_InitStructure.CAN_TXFP = DISABLE;
 49 |     CAN_InitStructure.CAN_Mode = CAN_Mode_Normal;
 50 |     // Use Silent_LoopBack for self-testing
 51 |     //CAN_InitStructure.CAN_Mode = CAN_Mode_Silent_LoopBack;
 52 |     CAN_InitStructure.CAN_SJW = CAN_SJW_1tq;
 53 |     // 500kbps
 54 |     CAN_InitStructure.CAN_BS1 = CAN_BS1_14tq;
 55 |     CAN_InitStructure.CAN_BS2 = CAN_BS2_6tq;
 56 |     CAN_InitStructure.CAN_Prescaler = 4;
 57 | 
 58 |     if (CAN_Init(CAN1, &CAN_InitStructure) == CAN_InitStatus_Failed) {
 59 |         return SETUP_FAIL;
 60 |     }
 61 | 
 62 |     CAN_FilterInitTypeDef CAN_FilterInitStructure;
 63 | 
 64 |     CAN_FilterInitStructure.CAN_FilterNumber = 0;
 65 |     CAN_FilterInitStructure.CAN_FilterFIFOAssignment = CAN_FIFO0;
 66 |     CAN_FilterInitStructure.CAN_FilterMode = CAN_FilterMode_IdMask;
 67 |     CAN_FilterInitStructure.CAN_FilterScale = CAN_FilterScale_16bit;
 68 |     CAN_FilterInitStructure.CAN_FilterIdHigh = 0x0000;
 69 |     CAN_FilterInitStructure.CAN_FilterIdLow = 0x0000;
 70 |     CAN_FilterInitStructure.CAN_FilterMaskIdHigh = 0x0000;
 71 |     CAN_FilterInitStructure.CAN_FilterMaskIdLow = 0x0000;
 72 |     CAN_FilterInitStructure.CAN_FilterActivation = ENABLE;
 73 |     CAN_FilterInit(&CAN_FilterInitStructure);
 74 | 
 75 |     NVIC_InitStructure.NVIC_IRQChannel = CAN1_RX0_IRQn;
 76 |     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
 77 |     NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
 78 |     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
 79 |     NVIC_Init(&NVIC_InitStructure);
 80 |     CAN_ITConfig(CAN1, CAN_IT_FMP0, ENABLE);
 81 | 
 82 |     // Timer
 83 |     RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
 84 |     TIM_TimeBaseInitTypeDef TimeBaseInitStructure;
 85 |     TIM_TimeBaseStructInit(&TimeBaseInitStructure);
 86 |     TimeBaseInitStructure.TIM_Prescaler = 16;
 87 |     TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up;
 88 |     TimeBaseInitStructure.TIM_Period = 2000000;
 89 |     TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
 90 |     TimeBaseInitStructure.TIM_RepetitionCounter = 0;
 91 |     TIM_DeInit(TIM2);
 92 |     TIM_TimeBaseInit(TIM2, &TimeBaseInitStructure);
 93 |     TIM_Cmd(TIM2, ENABLE);
 94 |     TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
 95 | 
 96 |     NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
 97 |     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 5;
 98 |     NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
 99 |     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
100 |     NVIC_Init(&NVIC_InitStructure);
101 | 
102 |     // Button
103 |     RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
104 |     RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
105 | 
106 |     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
107 |     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
108 |     GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
109 |     GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
110 |     GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
111 |     GPIO_Init(GPIOA, &GPIO_InitStructure);
112 | 
113 |     SYSCFG_EXTILineConfig(EXTI_PortSourceGPIOA, EXTI_PinSource0);
114 | 
115 |     EXTI_InitStructure.EXTI_Line = EXTI_Line0;
116 |     EXTI_InitStructure.EXTI_LineCmd = ENABLE;
117 |     EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
118 |     EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
119 |     EXTI_Init(&EXTI_InitStructure);
120 | 
121 |     NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQn;
122 |     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
123 |     NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
124 |     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
125 |     NVIC_Init(&NVIC_InitStructure);
126 | 
127 |     return SETUP_SUCCESS;
128 | }
129 | 
130 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash_ramfunc.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_flash_ramfunc.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   FLASH RAMFUNC module driver.
  8 |   *          This file provides a FLASH firmware functions which should be 
  9 |   *          executed from internal SRAM
 10 |   *            + Stop/Start the flash interface while System Run
 11 |   *            + Enable/Disable the flash sleep while System Run
 12 |   *  
 13 |  @verbatim    
 14 |  ==============================================================================
 15 |                     ##### APIs executed from Internal RAM #####
 16 |   ==============================================================================
 17 |   [..]
 18 |     *** ARM Compiler ***
 19 |     --------------------
 20 |     [..] RAM functions are defined using the toolchain options. 
 21 |          Functions that are be executed in RAM should reside in a separate
 22 |          source module. Using the 'Options for File' dialog you can simply change
 23 |          the 'Code / Const' area of a module to a memory space in physical RAM.
 24 |          Available memory areas are declared in the 'Target' tab of the 
 25 |          Options for Target' dialog.
 26 | 
 27 |     *** ICCARM Compiler ***
 28 |     -----------------------
 29 |     [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
 30 | 
 31 |     *** GNU Compiler ***
 32 |     --------------------
 33 |     [..] RAM functions are defined using a specific toolchain attribute
 34 |          "__attribute__((section(".RamFunc")))".
 35 |   
 36 |   @endverbatim
 37 |   ******************************************************************************
 38 |   * @attention
 39 |   *
 40 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 41 |   *
 42 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 43 |   * You may not use this file except in compliance with the License.
 44 |   * You may obtain a copy of the License at:
 45 |   *
 46 |   *        http://www.st.com/software_license_agreement_liberty_v2
 47 |   *
 48 |   * Unless required by applicable law or agreed to in writing, software 
 49 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 50 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 51 |   * See the License for the specific language governing permissions and
 52 |   * limitations under the License.
 53 |   *
 54 |   ******************************************************************************
 55 |   */
 56 | 
 57 | /* Includes ------------------------------------------------------------------*/
 58 | #include "stm32f4xx_flash_ramfunc.h"
 59 | 
 60 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 61 |   * @{
 62 |   */
 63 | 
 64 | /** @defgroup FLASH RAMFUNC 
 65 |   * @brief FLASH RAMFUNC driver modules
 66 |   * @{
 67 |   */ 
 68 | 
 69 | /* Private typedef -----------------------------------------------------------*/
 70 | /* Private define ------------------------------------------------------------*/
 71 | /* Private macro -------------------------------------------------------------*/
 72 | /* Private variables ---------------------------------------------------------*/
 73 | /* Private function prototypes -----------------------------------------------*/
 74 | /* Private functions ---------------------------------------------------------*/
 75 | 
 76 | /** @defgroup FLASH_RAMFUNC_Private_Functions
 77 |   * @{
 78 |   */
 79 | 
 80 | /** @defgroup FLASH_RAMFUNC_Group1 Peripheral features functions executed from internal RAM 
 81 |   *  @brief Peripheral Extended features functions 
 82 |   *
 83 | @verbatim   
 84 | 
 85 |  ===============================================================================
 86 |                       ##### ramfunc functions #####
 87 |  ===============================================================================
 88 |     [..]
 89 |     This subsection provides a set of functions that should be executed from RAM 
 90 |     transfers.
 91 |     
 92 | @endverbatim
 93 |   * @{
 94 |   */
 95 | 
 96 | /**
 97 |   * @brief Start/Stop the flash interface while System Run
 98 |   * @note  This mode is only available for STM32F411xx devices. 
 99 |   * @note  This mode could n't be set while executing with the flash itself. 
100 |   *        It should be done with specific routine executed from RAM.     
101 |   * @param  NewState: new state of the Smart Card mode.
102 |   *          This parameter can be: ENABLE or DISABLE.  
103 |   * @retval None
104 |   */
105 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState)
106 | {
107 |   if (NewState != DISABLE)
108 |   {
109 |     /* Start the flash interface while System Run */
110 |     CLEAR_BIT(PWR->CR, PWR_CR_FISSR);
111 |   }
112 |   else
113 |   {
114 |     /* Stop the flash interface while System Run */  
115 |     SET_BIT(PWR->CR, PWR_CR_FISSR);
116 |   }
117 | }
118 | 
119 | /**
120 |   * @brief Enable/Disable the flash sleep while System Run
121 |   * @note  This mode is only available for STM32F411xx devices. 
122 |   * @note  This mode could n't be set while executing with the flash itself. 
123 |   *        It should be done with specific routine executed from RAM.     
124 |   * @param  NewState: new state of the Smart Card mode.
125 |   *          This parameter can be: ENABLE or DISABLE.  
126 |   * @retval None
127 |   */
128 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState)
129 | {
130 |   if (NewState != DISABLE)
131 |   {
132 |     /* Enable the flash sleep while System Run */
133 |     SET_BIT(PWR->CR, PWR_CR_FMSSR);
134 |   }
135 |   else
136 |   {
137 |     /* Disable the flash sleep while System Run */
138 |     CLEAR_BIT(PWR->CR, PWR_CR_FMSSR);
139 |   }
140 | }
141 | 
142 | /**
143 |   * @}
144 |   */
145 | 
146 | /**
147 |   * @}
148 |   */
149 | 
150 | /**
151 |   * @}
152 |   */
153 | 
154 | /**
155 |   * @}
156 |   */
157 | 
158 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
159 | 


--------------------------------------------------------------------------------
/canpong.c:
--------------------------------------------------------------------------------
  1 | #include <fcntl.h>
  2 | #include <inttypes.h>
  3 | #include <libgen.h>
  4 | #include <signal.h>
  5 | #include <stdio.h>
  6 | #include <stdlib.h>
  7 | #include <unistd.h>
  8 | #include <string.h>
  9 | 
 10 | #include <net/if.h>
 11 | #include <sys/types.h>
 12 | #include <sys/socket.h>
 13 | #include <sys/ioctl.h>
 14 | 
 15 | #include <linux/can.h>
 16 | #include <linux/can/raw.h>
 17 | 
 18 | const char* LED_PATH = "/sys/class/leds/beaglebone:green:usr0/brightness";
 19 | 
 20 | void print_usage(char* argv0) {
 21 |   char* my_name = basename(argv0);
 22 | 
 23 |   printf("%s: Listen for CAN Bus pings.\n\n", my_name);
 24 |   printf("Usage:\n");
 25 |   printf("  %s -n [interface] -i [id]\n", my_name);
 26 |   printf("    -n [interface] : CAN interface. Required.\n");
 27 |   printf("    -i [id]        : CAN ID for pings. Default: 0x7FF\n");
 28 |   printf("Example:\n");
 29 |   printf("  %s -n can0\n", my_name);
 30 | }
 31 | 
 32 | int parse_cmdline(int argc, char** argv, char *ifname, canid_t *id) {
 33 |   int c;
 34 | 
 35 |   opterr = 0;
 36 | 
 37 |   while ((c = getopt(argc, argv, "hi:n:")) != -1)
 38 |      switch (c) {
 39 |        case 'h':
 40 |          print_usage(argv[0]);
 41 |          return 1;
 42 |        case 'i':
 43 |          *id = strtoumax(optarg, NULL, 0);
 44 |          break;
 45 |        case 'n':
 46 |          strncpy(ifname, optarg, IFNAMSIZ-1);
 47 |          break;
 48 |        case '?':
 49 |          if (optopt == 'i' || optopt == 'n')
 50 |            fprintf (stderr, "Option -%c requires an argument.\n", optopt);
 51 |          else if (isprint (optopt))
 52 |            fprintf (stderr, "Unknown option `-%c'.\n", optopt);
 53 |          else
 54 |            fprintf (stderr,
 55 |                     "Unknown option character `\\x%x'.\n",
 56 |                     optopt);
 57 |          print_usage(argv[0]);
 58 |          return 1;
 59 |        default:
 60 |          print_usage(argv[0]);
 61 |          abort();
 62 |        }
 63 | 
 64 |   if (ifname[0] == '\0') {
 65 |     fputs("option -n [ifname] is required.\n", stderr);
 66 |     print_usage(argv[0]);
 67 |     return 1;
 68 |   }
 69 | 
 70 |   return 0;
 71 | }
 72 | 
 73 | int set_led_brightness(int ledfd, unsigned char brightness) {
 74 |   if (brightness > 1) {
 75 |     fputs("invalid brightness value (must be 0 or 1)\n", stderr);
 76 |     return -1;
 77 |   }
 78 | 
 79 |   char val = brightness + 0x30;
 80 | 
 81 |   size_t written = write(ledfd, &val, 1);
 82 | 
 83 |   if (written < 0) {
 84 |     perror("setting LED brightness");
 85 |     return -1;
 86 |   }
 87 | 
 88 |   if (written != 1) {
 89 |     fputs("wrote incorrect size to LED\n", stderr);
 90 |     return -1;
 91 |   }
 92 | 
 93 |   return 0;
 94 | }
 95 | 
 96 | int main(int argc, char** argv) {
 97 |   int status;
 98 |   int sfd;
 99 |   int ledfd;
100 |   struct sockaddr_can addr;
101 |   struct can_frame frame;
102 |   struct ifreq ifr;
103 | 
104 |   // default values for opts
105 |   char ifname[IFNAMSIZ] = "";
106 |   canid_t id = 0x7FF;
107 | 
108 |   // parse opts
109 |   status = parse_cmdline(argc, argv, ifname, &id);
110 |   if (status != 0) {
111 |     exit(EXIT_FAILURE);
112 |   }
113 | 
114 |   printf("using interface %s and id %02X\n", ifname, id);
115 | 
116 |   // open can socket
117 |   sfd = socket(PF_CAN, SOCK_RAW, CAN_RAW);
118 |   if (sfd < 0) {
119 |     perror("opening socket");
120 |     exit(EXIT_FAILURE);
121 |   }
122 | 
123 |   // find interface index
124 |   strcpy(ifr.ifr_name, ifname);
125 |   status = ioctl(sfd, SIOCGIFINDEX, &ifr);
126 |   if (status < 0) {
127 |     perror("finding interface index");
128 |     exit(EXIT_FAILURE);
129 |   }
130 | 
131 |   // init can socket binding
132 |   addr.can_family  = AF_CAN;
133 |   addr.can_ifindex = ifr.ifr_ifindex; 
134 | 
135 |   // bind can socket
136 |   status = bind(sfd, (struct sockaddr *)&addr, sizeof(addr));
137 |   if (status < 0) {
138 |     perror("binding socket");
139 |     exit(EXIT_FAILURE);
140 |   }
141 | 
142 |   // open LED
143 |   ledfd = open(LED_PATH, O_WRONLY);
144 |   if (ledfd < 0) {
145 |     perror("opening LED");
146 |     exit(EXIT_FAILURE);
147 |   }
148 | 
149 |   // define frame callback
150 |   int read_frame() {
151 |     unsigned char counter;
152 |     int nbytes = read(sfd, &frame, sizeof(struct can_frame));
153 | 
154 |     if (nbytes < 0) {
155 |       perror("can frame raw socket read");
156 |       return -1;
157 |     }
158 | 
159 |     if (nbytes != sizeof(struct can_frame)) {
160 |       fputs("incomplete can frame\n", stderr);
161 |       return -1;
162 |     }
163 | 
164 |     if (frame.can_dlc != 1) {
165 |       fputs("unexpected ping frame size\n", stderr);
166 |       return -1;
167 |     }
168 | 
169 |     if (frame.can_id != id) {
170 |       return 0;
171 |     }
172 | 
173 |     counter = frame.data[0];
174 | 
175 |     #ifdef DEBUG
176 |     printf("pong : %02X : %02X\n", frame.can_id, counter);
177 |     #endif
178 | 
179 |     status = set_led_brightness(ledfd, counter % 2);
180 |     if (status != 0) {
181 |       return -1;
182 |     }
183 | 
184 |     return 0;
185 |   }
186 | 
187 |   // init LED brightness
188 |   status = set_led_brightness(ledfd, 0);
189 |   if (status != 0) {
190 |     fputs("failed to init LED state\n", stderr);
191 |     exit(EXIT_FAILURE);
192 |   }
193 | 
194 |   // define exit handler(s)
195 |   void cleanup() {
196 |     #ifdef DEBUG
197 |     printf("cleaning up\n");
198 |     #endif
199 | 
200 |     status = set_led_brightness(ledfd, 0);
201 |     if (status != 0) {
202 |       fputs("failed to reset LED at exit\n", stderr);
203 |     }
204 |   }
205 |   void cleanup_sig(int signum) {
206 |     exit(EXIT_SUCCESS);
207 |   }
208 | 
209 |   // attach exit handler(s)
210 |   if (signal(SIGINT, cleanup_sig) == SIG_ERR) {
211 |     fputs("failed to set SIGINT handler\n", stderr);
212 |     exit(EXIT_FAILURE);
213 |   }
214 |   if (signal(SIGTERM, cleanup_sig) == SIG_ERR) {
215 |     fputs("failed to set SIGTERM handler\n", stderr);
216 |     exit(EXIT_FAILURE);
217 |   }
218 |   atexit(cleanup);
219 | 
220 |   // main loop
221 |   while (1) {
222 |     status = read_frame();
223 |     if (status != 0) {
224 |       fputs("error during read, exiting\n", stderr);
225 |       exit(EXIT_FAILURE);
226 |     }
227 |   }
228 | 
229 |   return EXIT_SUCCESS;
230 | }
231 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dbgmcu.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_dbgmcu.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides all the DBGMCU firmware functions.
  8 |   ******************************************************************************
  9 |   * @attention
 10 |   *
 11 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 12 |   *
 13 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 14 |   * You may not use this file except in compliance with the License.
 15 |   * You may obtain a copy of the License at:
 16 |   *
 17 |   *        http://www.st.com/software_license_agreement_liberty_v2
 18 |   *
 19 |   * Unless required by applicable law or agreed to in writing, software 
 20 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 21 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 22 |   * See the License for the specific language governing permissions and
 23 |   * limitations under the License.
 24 |   *
 25 |   ******************************************************************************
 26 |   */
 27 | 
 28 | /* Includes ------------------------------------------------------------------*/
 29 | #include "stm32f4xx_dbgmcu.h"
 30 | 
 31 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 32 |   * @{
 33 |   */
 34 | 
 35 | /** @defgroup DBGMCU 
 36 |   * @brief DBGMCU driver modules
 37 |   * @{
 38 |   */ 
 39 | 
 40 | /* Private typedef -----------------------------------------------------------*/
 41 | /* Private define ------------------------------------------------------------*/
 42 | #define IDCODE_DEVID_MASK    ((uint32_t)0x00000FFF)
 43 | 
 44 | /* Private macro -------------------------------------------------------------*/
 45 | /* Private variables ---------------------------------------------------------*/
 46 | /* Private function prototypes -----------------------------------------------*/
 47 | /* Private functions ---------------------------------------------------------*/
 48 | 
 49 | /** @defgroup DBGMCU_Private_Functions
 50 |   * @{
 51 |   */ 
 52 | 
 53 | /**
 54 |   * @brief  Returns the device revision identifier.
 55 |   * @param  None
 56 |   * @retval Device revision identifier
 57 |   */
 58 | uint32_t DBGMCU_GetREVID(void)
 59 | {
 60 |    return(DBGMCU->IDCODE >> 16);
 61 | }
 62 | 
 63 | /**
 64 |   * @brief  Returns the device identifier.
 65 |   * @param  None
 66 |   * @retval Device identifier
 67 |   */
 68 | uint32_t DBGMCU_GetDEVID(void)
 69 | {
 70 |    return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
 71 | }
 72 | 
 73 | /**
 74 |   * @brief  Configures low power mode behavior when the MCU is in Debug mode.
 75 |   * @param  DBGMCU_Periph: specifies the low power mode.
 76 |   *   This parameter can be any combination of the following values:
 77 |   *     @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode              
 78 |   *     @arg DBGMCU_STOP: Keep debugger connection during STOP mode               
 79 |   *     @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode        
 80 |   * @param  NewState: new state of the specified low power mode in Debug mode.
 81 |   *   This parameter can be: ENABLE or DISABLE.
 82 |   * @retval None
 83 |   */
 84 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
 85 | {
 86 |   /* Check the parameters */
 87 |   assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
 88 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
 89 |   if (NewState != DISABLE)
 90 |   {
 91 |     DBGMCU->CR |= DBGMCU_Periph;
 92 |   }
 93 |   else
 94 |   {
 95 |     DBGMCU->CR &= ~DBGMCU_Periph;
 96 |   }
 97 | }
 98 | 
 99 | /**
100 |   * @brief  Configures APB1 peripheral behavior when the MCU is in Debug mode.
101 |   * @param  DBGMCU_Periph: specifies the APB1 peripheral.
102 |   *   This parameter can be any combination of the following values:        
103 |   *     @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted          
104 |   *     @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted          
105 |   *     @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted
106 |   *     @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted          
107 |   *     @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted          
108 |   *     @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
109 |   *     @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted  
110 |   *     @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted  
111 |   *     @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 
112 |   *     @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped when Core is halted.                                                                                
113 |   *     @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
114 |   *     @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted        
115 |   *     @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted
116 |   *     @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted
117 |   *     @arg DBGMCU_I2C3_SMBUS_TIMEOUT: I2C3 SMBUS timeout mode stopped when Core is halted
118 |   *     @arg DBGMCU_CAN2_STOP: Debug CAN1 stopped when Core is halted           
119 |   *     @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted        
120 |   *   This parameter can be: ENABLE or DISABLE.
121 |   * @retval None
122 |   */
123 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
124 | {
125 |   /* Check the parameters */
126 |   assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph));
127 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
128 | 
129 |   if (NewState != DISABLE)
130 |   {
131 |     DBGMCU->APB1FZ |= DBGMCU_Periph;
132 |   }
133 |   else
134 |   {
135 |     DBGMCU->APB1FZ &= ~DBGMCU_Periph;
136 |   }
137 | }
138 | 
139 | /**
140 |   * @brief  Configures APB2 peripheral behavior when the MCU is in Debug mode.
141 |   * @param  DBGMCU_Periph: specifies the APB2 peripheral.
142 |   *   This parameter can be any combination of the following values:       
143 |   *     @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted                
144 |   *     @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
145 |   *     @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted   
146 |   *     @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted   
147 |   *     @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted                                                                                  
148 |   * @param  NewState: new state of the specified peripheral in Debug mode.
149 |   *   This parameter can be: ENABLE or DISABLE.
150 |   * @retval None
151 |   */
152 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
153 | {
154 |   /* Check the parameters */
155 |   assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph));
156 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
157 | 
158 |   if (NewState != DISABLE)
159 |   {
160 |     DBGMCU->APB2FZ |= DBGMCU_Periph;
161 |   }
162 |   else
163 |   {
164 |     DBGMCU->APB2FZ &= ~DBGMCU_Periph;
165 |   }
166 | }
167 | 
168 | /**
169 |   * @}
170 |   */ 
171 | 
172 | /**
173 |   * @}
174 |   */ 
175 | 
176 | /**
177 |   * @}
178 |   */ 
179 | 
180 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
181 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/misc.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    misc.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file contains all the functions prototypes for the miscellaneous
  8 |   *          firmware library functions (add-on to CMSIS functions).
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 13 |   *
 14 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 15 |   * You may not use this file except in compliance with the License.
 16 |   * You may obtain a copy of the License at:
 17 |   *
 18 |   *        http://www.st.com/software_license_agreement_liberty_v2
 19 |   *
 20 |   * Unless required by applicable law or agreed to in writing, software 
 21 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 22 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 23 |   * See the License for the specific language governing permissions and
 24 |   * limitations under the License.
 25 |   *
 26 |   ******************************************************************************
 27 |   */
 28 | 
 29 | /* Define to prevent recursive inclusion -------------------------------------*/
 30 | #ifndef __MISC_H
 31 | #define __MISC_H
 32 | 
 33 | #ifdef __cplusplus
 34 |  extern "C" {
 35 | #endif
 36 | 
 37 | /* Includes ------------------------------------------------------------------*/
 38 | #include "stm32f4xx.h"
 39 | 
 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 41 |   * @{
 42 |   */
 43 | 
 44 | /** @addtogroup MISC
 45 |   * @{
 46 |   */
 47 | 
 48 | /* Exported types ------------------------------------------------------------*/
 49 | 
 50 | /** 
 51 |   * @brief  NVIC Init Structure definition  
 52 |   */
 53 | 
 54 | typedef struct
 55 | {
 56 |   uint8_t NVIC_IRQChannel;                    /*!< Specifies the IRQ channel to be enabled or disabled.
 57 |                                                    This parameter can be an enumerator of @ref IRQn_Type 
 58 |                                                    enumeration (For the complete STM32 Devices IRQ Channels
 59 |                                                    list, please refer to stm32f4xx.h file) */
 60 | 
 61 |   uint8_t NVIC_IRQChannelPreemptionPriority;  /*!< Specifies the pre-emption priority for the IRQ channel
 62 |                                                    specified in NVIC_IRQChannel. This parameter can be a value
 63 |                                                    between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
 64 |                                                    A lower priority value indicates a higher priority */
 65 | 
 66 |   uint8_t NVIC_IRQChannelSubPriority;         /*!< Specifies the subpriority level for the IRQ channel specified
 67 |                                                    in NVIC_IRQChannel. This parameter can be a value
 68 |                                                    between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
 69 |                                                    A lower priority value indicates a higher priority */
 70 | 
 71 |   FunctionalState NVIC_IRQChannelCmd;         /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
 72 |                                                    will be enabled or disabled. 
 73 |                                                    This parameter can be set either to ENABLE or DISABLE */   
 74 | } NVIC_InitTypeDef;
 75 |  
 76 | /* Exported constants --------------------------------------------------------*/
 77 | 
 78 | /** @defgroup MISC_Exported_Constants
 79 |   * @{
 80 |   */
 81 | 
 82 | /** @defgroup MISC_Vector_Table_Base 
 83 |   * @{
 84 |   */
 85 | 
 86 | #define NVIC_VectTab_RAM             ((uint32_t)0x20000000)
 87 | #define NVIC_VectTab_FLASH           ((uint32_t)0x08000000)
 88 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
 89 |                                   ((VECTTAB) == NVIC_VectTab_FLASH))
 90 | /**
 91 |   * @}
 92 |   */
 93 | 
 94 | /** @defgroup MISC_System_Low_Power 
 95 |   * @{
 96 |   */
 97 | 
 98 | #define NVIC_LP_SEVONPEND            ((uint8_t)0x10)
 99 | #define NVIC_LP_SLEEPDEEP            ((uint8_t)0x04)
100 | #define NVIC_LP_SLEEPONEXIT          ((uint8_t)0x02)
101 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
102 |                         ((LP) == NVIC_LP_SLEEPDEEP) || \
103 |                         ((LP) == NVIC_LP_SLEEPONEXIT))
104 | /**
105 |   * @}
106 |   */
107 | 
108 | /** @defgroup MISC_Preemption_Priority_Group 
109 |   * @{
110 |   */
111 | 
112 | #define NVIC_PriorityGroup_0         ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
113 |                                                             4 bits for subpriority */
114 | #define NVIC_PriorityGroup_1         ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
115 |                                                             3 bits for subpriority */
116 | #define NVIC_PriorityGroup_2         ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
117 |                                                             2 bits for subpriority */
118 | #define NVIC_PriorityGroup_3         ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
119 |                                                             1 bits for subpriority */
120 | #define NVIC_PriorityGroup_4         ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
121 |                                                             0 bits for subpriority */
122 | 
123 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
124 |                                        ((GROUP) == NVIC_PriorityGroup_1) || \
125 |                                        ((GROUP) == NVIC_PriorityGroup_2) || \
126 |                                        ((GROUP) == NVIC_PriorityGroup_3) || \
127 |                                        ((GROUP) == NVIC_PriorityGroup_4))
128 | 
129 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10)
130 | 
131 | #define IS_NVIC_SUB_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10)
132 | 
133 | #define IS_NVIC_OFFSET(OFFSET)  ((OFFSET) < 0x000FFFFF)
134 | 
135 | /**
136 |   * @}
137 |   */
138 | 
139 | /** @defgroup MISC_SysTick_clock_source 
140 |   * @{
141 |   */
142 | 
143 | #define SysTick_CLKSource_HCLK_Div8    ((uint32_t)0xFFFFFFFB)
144 | #define SysTick_CLKSource_HCLK         ((uint32_t)0x00000004)
145 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
146 |                                        ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
147 | /**
148 |   * @}
149 |   */
150 | 
151 | /**
152 |   * @}
153 |   */
154 | 
155 | /* Exported macro ------------------------------------------------------------*/
156 | /* Exported functions --------------------------------------------------------*/
157 | 
158 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
159 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
160 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
161 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
162 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
163 | 
164 | #ifdef __cplusplus
165 | }
166 | #endif
167 | 
168 | #endif /* __MISC_H */
169 | 
170 | /**
171 |   * @}
172 |   */
173 | 
174 | /**
175 |   * @}
176 |   */
177 | 
178 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
179 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/CMSIS/arm_common_tables.h:
--------------------------------------------------------------------------------
  1 | /* ----------------------------------------------------------------------
  2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3 | *
  4 | * $Date:        31. July 2014
  5 | * $Revision: 	V1.4.4
  6 | *
  7 | * Project: 	    CMSIS DSP Library
  8 | * Title:	    arm_common_tables.h
  9 | *
 10 | * Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
 11 | *
 12 | * Target Processor: Cortex-M4/Cortex-M3
 13 | *
 14 | * Redistribution and use in source and binary forms, with or without
 15 | * modification, are permitted provided that the following conditions
 16 | * are met:
 17 | *   - Redistributions of source code must retain the above copyright
 18 | *     notice, this list of conditions and the following disclaimer.
 19 | *   - Redistributions in binary form must reproduce the above copyright
 20 | *     notice, this list of conditions and the following disclaimer in
 21 | *     the documentation and/or other materials provided with the
 22 | *     distribution.
 23 | *   - Neither the name of ARM LIMITED nor the names of its contributors
 24 | *     may be used to endorse or promote products derived from this
 25 | *     software without specific prior written permission.
 26 | *
 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 38 | * POSSIBILITY OF SUCH DAMAGE.
 39 | * -------------------------------------------------------------------- */
 40 | 
 41 | #ifndef _ARM_COMMON_TABLES_H
 42 | #define _ARM_COMMON_TABLES_H
 43 | 
 44 | #include "arm_math.h"
 45 | 
 46 | extern const uint16_t armBitRevTable[1024];
 47 | extern const q15_t armRecipTableQ15[64];
 48 | extern const q31_t armRecipTableQ31[64];
 49 | //extern const q31_t realCoefAQ31[1024];
 50 | //extern const q31_t realCoefBQ31[1024];
 51 | extern const float32_t twiddleCoef_16[32];
 52 | extern const float32_t twiddleCoef_32[64];
 53 | extern const float32_t twiddleCoef_64[128];
 54 | extern const float32_t twiddleCoef_128[256];
 55 | extern const float32_t twiddleCoef_256[512];
 56 | extern const float32_t twiddleCoef_512[1024];
 57 | extern const float32_t twiddleCoef_1024[2048];
 58 | extern const float32_t twiddleCoef_2048[4096];
 59 | extern const float32_t twiddleCoef_4096[8192];
 60 | #define twiddleCoef twiddleCoef_4096
 61 | extern const q31_t twiddleCoef_16_q31[24];
 62 | extern const q31_t twiddleCoef_32_q31[48];
 63 | extern const q31_t twiddleCoef_64_q31[96];
 64 | extern const q31_t twiddleCoef_128_q31[192];
 65 | extern const q31_t twiddleCoef_256_q31[384];
 66 | extern const q31_t twiddleCoef_512_q31[768];
 67 | extern const q31_t twiddleCoef_1024_q31[1536];
 68 | extern const q31_t twiddleCoef_2048_q31[3072];
 69 | extern const q31_t twiddleCoef_4096_q31[6144];
 70 | extern const q15_t twiddleCoef_16_q15[24];
 71 | extern const q15_t twiddleCoef_32_q15[48];
 72 | extern const q15_t twiddleCoef_64_q15[96];
 73 | extern const q15_t twiddleCoef_128_q15[192];
 74 | extern const q15_t twiddleCoef_256_q15[384];
 75 | extern const q15_t twiddleCoef_512_q15[768];
 76 | extern const q15_t twiddleCoef_1024_q15[1536];
 77 | extern const q15_t twiddleCoef_2048_q15[3072];
 78 | extern const q15_t twiddleCoef_4096_q15[6144];
 79 | extern const float32_t twiddleCoef_rfft_32[32];
 80 | extern const float32_t twiddleCoef_rfft_64[64];
 81 | extern const float32_t twiddleCoef_rfft_128[128];
 82 | extern const float32_t twiddleCoef_rfft_256[256];
 83 | extern const float32_t twiddleCoef_rfft_512[512];
 84 | extern const float32_t twiddleCoef_rfft_1024[1024];
 85 | extern const float32_t twiddleCoef_rfft_2048[2048];
 86 | extern const float32_t twiddleCoef_rfft_4096[4096];
 87 | 
 88 | 
 89 | /* floating-point bit reversal tables */
 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
 99 | 
100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
109 | 
110 | /* fixed-point bit reversal tables */
111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12  )
112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24  )
113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56  )
114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
120 | 
121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
130 | 
131 | /* Tables for Fast Math Sine and Cosine */
132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
135 | 
136 | #endif /*  ARM_COMMON_TABLES_H */
137 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_exti.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_exti.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file contains all the functions prototypes for the EXTI firmware
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 13 |   *
 14 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 15 |   * You may not use this file except in compliance with the License.
 16 |   * You may obtain a copy of the License at:
 17 |   *
 18 |   *        http://www.st.com/software_license_agreement_liberty_v2
 19 |   *
 20 |   * Unless required by applicable law or agreed to in writing, software 
 21 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 22 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 23 |   * See the License for the specific language governing permissions and
 24 |   * limitations under the License.
 25 |   *
 26 |   ******************************************************************************
 27 |   */
 28 | 
 29 | /* Define to prevent recursive inclusion -------------------------------------*/
 30 | #ifndef __STM32F4xx_EXTI_H
 31 | #define __STM32F4xx_EXTI_H
 32 | 
 33 | #ifdef __cplusplus
 34 |  extern "C" {
 35 | #endif
 36 | 
 37 | /* Includes ------------------------------------------------------------------*/
 38 | #include "stm32f4xx.h"
 39 | 
 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 41 |   * @{
 42 |   */
 43 | 
 44 | /** @addtogroup EXTI
 45 |   * @{
 46 |   */
 47 | 
 48 | /* Exported types ------------------------------------------------------------*/
 49 | 
 50 | /** 
 51 |   * @brief  EXTI mode enumeration  
 52 |   */
 53 | 
 54 | typedef enum
 55 | {
 56 |   EXTI_Mode_Interrupt = 0x00,
 57 |   EXTI_Mode_Event = 0x04
 58 | }EXTIMode_TypeDef;
 59 | 
 60 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
 61 | 
 62 | /** 
 63 |   * @brief  EXTI Trigger enumeration  
 64 |   */
 65 | 
 66 | typedef enum
 67 | {
 68 |   EXTI_Trigger_Rising = 0x08,
 69 |   EXTI_Trigger_Falling = 0x0C,  
 70 |   EXTI_Trigger_Rising_Falling = 0x10
 71 | }EXTITrigger_TypeDef;
 72 | 
 73 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
 74 |                                   ((TRIGGER) == EXTI_Trigger_Falling) || \
 75 |                                   ((TRIGGER) == EXTI_Trigger_Rising_Falling))
 76 | /** 
 77 |   * @brief  EXTI Init Structure definition  
 78 |   */
 79 | 
 80 | typedef struct
 81 | {
 82 |   uint32_t EXTI_Line;               /*!< Specifies the EXTI lines to be enabled or disabled.
 83 |                                          This parameter can be any combination value of @ref EXTI_Lines */
 84 |    
 85 |   EXTIMode_TypeDef EXTI_Mode;       /*!< Specifies the mode for the EXTI lines.
 86 |                                          This parameter can be a value of @ref EXTIMode_TypeDef */
 87 | 
 88 |   EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
 89 |                                          This parameter can be a value of @ref EXTITrigger_TypeDef */
 90 | 
 91 |   FunctionalState EXTI_LineCmd;     /*!< Specifies the new state of the selected EXTI lines.
 92 |                                          This parameter can be set either to ENABLE or DISABLE */ 
 93 | }EXTI_InitTypeDef;
 94 | 
 95 | /* Exported constants --------------------------------------------------------*/
 96 | 
 97 | /** @defgroup EXTI_Exported_Constants
 98 |   * @{
 99 |   */
100 | 
101 | /** @defgroup EXTI_Lines 
102 |   * @{
103 |   */
104 | 
105 | #define EXTI_Line0       ((uint32_t)0x00001)     /*!< External interrupt line 0 */
106 | #define EXTI_Line1       ((uint32_t)0x00002)     /*!< External interrupt line 1 */
107 | #define EXTI_Line2       ((uint32_t)0x00004)     /*!< External interrupt line 2 */
108 | #define EXTI_Line3       ((uint32_t)0x00008)     /*!< External interrupt line 3 */
109 | #define EXTI_Line4       ((uint32_t)0x00010)     /*!< External interrupt line 4 */
110 | #define EXTI_Line5       ((uint32_t)0x00020)     /*!< External interrupt line 5 */
111 | #define EXTI_Line6       ((uint32_t)0x00040)     /*!< External interrupt line 6 */
112 | #define EXTI_Line7       ((uint32_t)0x00080)     /*!< External interrupt line 7 */
113 | #define EXTI_Line8       ((uint32_t)0x00100)     /*!< External interrupt line 8 */
114 | #define EXTI_Line9       ((uint32_t)0x00200)     /*!< External interrupt line 9 */
115 | #define EXTI_Line10      ((uint32_t)0x00400)     /*!< External interrupt line 10 */
116 | #define EXTI_Line11      ((uint32_t)0x00800)     /*!< External interrupt line 11 */
117 | #define EXTI_Line12      ((uint32_t)0x01000)     /*!< External interrupt line 12 */
118 | #define EXTI_Line13      ((uint32_t)0x02000)     /*!< External interrupt line 13 */
119 | #define EXTI_Line14      ((uint32_t)0x04000)     /*!< External interrupt line 14 */
120 | #define EXTI_Line15      ((uint32_t)0x08000)     /*!< External interrupt line 15 */
121 | #define EXTI_Line16      ((uint32_t)0x10000)     /*!< External interrupt line 16 Connected to the PVD Output */
122 | #define EXTI_Line17      ((uint32_t)0x20000)     /*!< External interrupt line 17 Connected to the RTC Alarm event */
123 | #define EXTI_Line18      ((uint32_t)0x40000)     /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */                                    
124 | #define EXTI_Line19      ((uint32_t)0x80000)     /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
125 | #define EXTI_Line20      ((uint32_t)0x00100000)  /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event  */
126 | #define EXTI_Line21      ((uint32_t)0x00200000)  /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */                                               
127 | #define EXTI_Line22      ((uint32_t)0x00400000)  /*!< External interrupt line 22 Connected to the RTC Wakeup event */
128 | #define EXTI_Line23      ((uint32_t)0x00800000)  /*!< External interrupt line 23 Connected to the LPTIM Wakeup event */
129 | 
130 |                                           
131 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFF800000) == 0x00) && ((LINE) != (uint16_t)0x00))
132 | 
133 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
134 |                                 ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
135 |                                 ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
136 |                                 ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
137 |                                 ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
138 |                                 ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
139 |                                 ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
140 |                                 ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
141 |                                 ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
142 |                                 ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \
143 |                                 ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) ||\
144 |                                 ((LINE) == EXTI_Line22) || ((LINE) == EXTI_Line23))
145 |                     
146 | /**
147 |   * @}
148 |   */
149 | 
150 | /**
151 |   * @}
152 |   */
153 | 
154 | /* Exported macro ------------------------------------------------------------*/
155 | /* Exported functions --------------------------------------------------------*/
156 | 
157 | /*  Function used to set the EXTI configuration to the default reset state *****/
158 | void EXTI_DeInit(void);
159 | 
160 | /* Initialization and Configuration functions *********************************/
161 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
162 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
163 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
164 | 
165 | /* Interrupts and flags management functions **********************************/
166 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
167 | void EXTI_ClearFlag(uint32_t EXTI_Line);
168 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
169 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
170 | 
171 | #ifdef __cplusplus
172 | }
173 | #endif
174 | 
175 | #endif /* __STM32F4xx_EXTI_H */
176 | 
177 | /**
178 |   * @}
179 |   */
180 | 
181 | /**
182 |   * @}
183 |   */
184 | 
185 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
186 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_pwr.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_pwr.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file contains all the functions prototypes for the PWR firmware 
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 13 |   *
 14 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 15 |   * You may not use this file except in compliance with the License.
 16 |   * You may obtain a copy of the License at:
 17 |   *
 18 |   *        http://www.st.com/software_license_agreement_liberty_v2
 19 |   *
 20 |   * Unless required by applicable law or agreed to in writing, software 
 21 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 22 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 23 |   * See the License for the specific language governing permissions and
 24 |   * limitations under the License.
 25 |   *
 26 |   ******************************************************************************
 27 |   */ 
 28 | 
 29 | /* Define to prevent recursive inclusion -------------------------------------*/
 30 | #ifndef __STM32F4xx_PWR_H
 31 | #define __STM32F4xx_PWR_H
 32 | 
 33 | #ifdef __cplusplus
 34 |  extern "C" {
 35 | #endif
 36 | 
 37 | /* Includes ------------------------------------------------------------------*/
 38 | #include "stm32f4xx.h"
 39 | 
 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 41 |   * @{
 42 |   */
 43 | 
 44 | /** @addtogroup PWR
 45 |   * @{
 46 |   */ 
 47 | 
 48 | /* Exported types ------------------------------------------------------------*/
 49 | /* Exported constants --------------------------------------------------------*/
 50 | 
 51 | /** @defgroup PWR_Exported_Constants
 52 |   * @{
 53 |   */ 
 54 | 
 55 | /** @defgroup PWR_PVD_detection_level 
 56 |   * @{
 57 |   */ 
 58 | #define PWR_PVDLevel_0                  PWR_CR_PLS_LEV0
 59 | #define PWR_PVDLevel_1                  PWR_CR_PLS_LEV1
 60 | #define PWR_PVDLevel_2                  PWR_CR_PLS_LEV2
 61 | #define PWR_PVDLevel_3                  PWR_CR_PLS_LEV3
 62 | #define PWR_PVDLevel_4                  PWR_CR_PLS_LEV4
 63 | #define PWR_PVDLevel_5                  PWR_CR_PLS_LEV5
 64 | #define PWR_PVDLevel_6                  PWR_CR_PLS_LEV6
 65 | #define PWR_PVDLevel_7                  PWR_CR_PLS_LEV7
 66 | 
 67 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \
 68 |                                  ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
 69 |                                  ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
 70 |                                  ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
 71 | /**
 72 |   * @}
 73 |   */
 74 | 
 75 |   
 76 | /** @defgroup PWR_Regulator_state_in_STOP_mode 
 77 |   * @{
 78 |   */
 79 | #define PWR_MainRegulator_ON                        ((uint32_t)0x00000000)
 80 | #define PWR_LowPowerRegulator_ON                    PWR_CR_LPDS
 81 | 
 82 | /* --- PWR_Legacy ---*/
 83 | #define PWR_Regulator_ON                            PWR_MainRegulator_ON
 84 | #define PWR_Regulator_LowPower                      PWR_LowPowerRegulator_ON
 85 | 
 86 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MainRegulator_ON) || \
 87 |                                      ((REGULATOR) == PWR_LowPowerRegulator_ON))
 88 | 
 89 | /**
 90 |   * @}
 91 |   */
 92 | 
 93 | /** @defgroup PWR_Regulator_state_in_UnderDrive_mode 
 94 |   * @{
 95 |   */
 96 | #define PWR_MainRegulator_UnderDrive_ON               PWR_CR_MRUDS
 97 | #define PWR_LowPowerRegulator_UnderDrive_ON           ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
 98 | 
 99 | #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MainRegulator_UnderDrive_ON) || \
100 |                                                 ((REGULATOR) == PWR_LowPowerRegulator_UnderDrive_ON))
101 | 
102 | /**
103 |   * @}
104 |   */
105 | #if defined(STM32F410xx) || defined(STM32F446xx)
106 | /** @defgroup PWR_Wake_Up_Pin
107 |   * @{
108 |   */
109 | #define PWR_WakeUp_Pin1           ((uint32_t)0x00)
110 | #define PWR_WakeUp_Pin2           ((uint32_t)0x01)
111 | #if defined(STM32F410xx)
112 | #define PWR_WakeUp_Pin3           ((uint32_t)0x02)
113 | #endif /* STM32F410xx */
114 | 
115 | #if defined(STM32F446xx)
116 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WakeUp_Pin1) || \
117 |                                 ((PIN) == PWR_WakeUp_Pin2))
118 | #else /* STM32F410xx */
119 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
120 |                                 ((PIN) == PWR_WAKEUP_PIN3)) 
121 | #endif /* STM32F446xx */
122 | /**
123 |   * @}
124 |   */    
125 | #endif /* STM32F410xx || STM32F446xx */
126 | 
127 | /** @defgroup PWR_STOP_mode_entry 
128 |   * @{
129 |   */
130 | #define PWR_STOPEntry_WFI               ((uint8_t)0x01)
131 | #define PWR_STOPEntry_WFE               ((uint8_t)0x02)
132 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
133 | /**
134 |   * @}
135 |   */
136 | 
137 | /** @defgroup PWR_Regulator_Voltage_Scale 
138 |   * @{
139 |   */
140 | #define PWR_Regulator_Voltage_Scale1    ((uint32_t)0x0000C000)
141 | #define PWR_Regulator_Voltage_Scale2    ((uint32_t)0x00008000)
142 | #define PWR_Regulator_Voltage_Scale3    ((uint32_t)0x00004000)
143 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || \
144 |                                            ((VOLTAGE) == PWR_Regulator_Voltage_Scale2) || \
145 |                                            ((VOLTAGE) == PWR_Regulator_Voltage_Scale3))
146 | /**
147 |   * @}
148 |   */
149 | 
150 | /** @defgroup PWR_Flag 
151 |   * @{
152 |   */
153 | #define PWR_FLAG_WU                     PWR_CSR_WUF
154 | #define PWR_FLAG_SB                     PWR_CSR_SBF
155 | #define PWR_FLAG_PVDO                   PWR_CSR_PVDO
156 | #define PWR_FLAG_BRR                    PWR_CSR_BRR
157 | #define PWR_FLAG_VOSRDY                 PWR_CSR_VOSRDY
158 | #define PWR_FLAG_ODRDY                  PWR_CSR_ODRDY
159 | #define PWR_FLAG_ODSWRDY                PWR_CSR_ODSWRDY
160 | #define PWR_FLAG_UDRDY                  PWR_CSR_UDSWRDY
161 | 
162 | /* --- FLAG Legacy ---*/
163 | #define PWR_FLAG_REGRDY                  PWR_FLAG_VOSRDY               
164 | 
165 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
166 |                                ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \
167 |                                ((FLAG) == PWR_FLAG_VOSRDY) || ((FLAG) == PWR_FLAG_ODRDY) || \
168 |                                ((FLAG) == PWR_FLAG_ODSWRDY) || ((FLAG) == PWR_FLAG_UDRDY))
169 | 
170 | 
171 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
172 |                                  ((FLAG) == PWR_FLAG_UDRDY))
173 | 
174 | /**
175 |   * @}
176 |   */
177 | 
178 | /**
179 |   * @}
180 |   */
181 | 
182 | /* Exported macro ------------------------------------------------------------*/
183 | /* Exported functions --------------------------------------------------------*/ 
184 | 
185 | /* Function used to set the PWR configuration to the default reset state ******/ 
186 | void PWR_DeInit(void);
187 | 
188 | /* Backup Domain Access function **********************************************/ 
189 | void PWR_BackupAccessCmd(FunctionalState NewState);
190 | 
191 | /* PVD configuration functions ************************************************/ 
192 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
193 | void PWR_PVDCmd(FunctionalState NewState);
194 | 
195 | /* WakeUp pins configuration functions ****************************************/
196 | #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F401xx) || defined(STM32F411xE)
197 | void PWR_WakeUpPinCmd(FunctionalState NewState);
198 | #endif /* STM32F40_41xxx || STM32F427_437xx || STM32F429_439xx || STM32F401xx || STM32F411xE */
199 | #if defined(STM32F410xx) || defined(STM32F446xx)
200 | void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPinx, FunctionalState NewState);
201 | #endif /* STM32F410xx || STM32F446xx */
202 | /* Main and Backup Regulators configuration functions *************************/ 
203 | void PWR_BackupRegulatorCmd(FunctionalState NewState);
204 | void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage);
205 | void PWR_OverDriveCmd(FunctionalState NewState);
206 | void PWR_OverDriveSWCmd(FunctionalState NewState);
207 | void PWR_UnderDriveCmd(FunctionalState NewState);
208 | 
209 | #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx)
210 | void PWR_MainRegulatorUnderDriveCmd(FunctionalState NewState);
211 | void PWR_LowRegulatorUnderDriveCmd(FunctionalState NewState);
212 | #endif /* STM32F427_437xx || STM32F429_439xx || STM32F446xx */
213 | 
214 | #if defined(STM32F401xx) || defined(STM32F410xx) || defined(STM32F411xE)
215 | void PWR_MainRegulatorLowVoltageCmd(FunctionalState NewState);
216 | void PWR_LowRegulatorLowVoltageCmd(FunctionalState NewState);
217 | #endif /* STM32F401xx || STM32F410xx || STM32F411xE */
218 | 
219 | /* FLASH Power Down configuration functions ***********************************/ 
220 | void PWR_FlashPowerDownCmd(FunctionalState NewState);
221 | 
222 | /* Low Power modes configuration functions ************************************/ 
223 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
224 | void PWR_EnterUnderDriveSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
225 | void PWR_EnterSTANDBYMode(void);
226 | 
227 | /* Flags management functions *************************************************/ 
228 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
229 | void PWR_ClearFlag(uint32_t PWR_FLAG);
230 | 
231 | #ifdef __cplusplus
232 | }
233 | #endif
234 | 
235 | #endif /* __STM32F4xx_PWR_H */
236 | 
237 | /**
238 |   * @}
239 |   */
240 | 
241 | /**
242 |   * @}
243 |   */
244 | 
245 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
246 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_iwdg.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_iwdg.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides firmware functions to manage the following 
  8 |   *          functionalities of the Independent watchdog (IWDG) peripheral:           
  9 |   *           + Prescaler and Counter configuration
 10 |   *           + IWDG activation
 11 |   *           + Flag management
 12 |   *
 13 |     @verbatim    
 14 |  ===============================================================================
 15 |                           ##### IWDG features #####
 16 |  ===============================================================================
 17 |     [..]  
 18 |       The IWDG can be started by either software or hardware (configurable
 19 |       through option byte).
 20 |               
 21 |       The IWDG is clocked by its own dedicated low-speed clock (LSI) and
 22 |       thus stays active even if the main clock fails.
 23 |       Once the IWDG is started, the LSI is forced ON and cannot be disabled
 24 |       (LSI cannot be disabled too), and the counter starts counting down from 
 25 |       the reset value of 0xFFF. When it reaches the end of count value (0x000)
 26 |       a system reset is generated.
 27 |       The IWDG counter should be reloaded at regular intervals to prevent
 28 |       an MCU reset.
 29 |                              
 30 |       The IWDG is implemented in the VDD voltage domain that is still functional
 31 |       in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).          
 32 |               
 33 |       IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
 34 |       reset occurs.
 35 |               
 36 |       Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
 37 |       The IWDG timeout may vary due to LSI frequency dispersion. STM32F4xx
 38 |       devices provide the capability to measure the LSI frequency (LSI clock
 39 |       connected internally to TIM5 CH4 input capture). The measured value
 40 |       can be used to have an IWDG timeout with an acceptable accuracy. 
 41 |       For more information, please refer to the STM32F4xx Reference manual
 42 |             
 43 |                      ##### How to use this driver #####
 44 |  ===============================================================================
 45 |     [..]
 46 |       (#) Enable write access to IWDG_PR and IWDG_RLR registers using
 47 |           IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function
 48 |                  
 49 |       (#) Configure the IWDG prescaler using IWDG_SetPrescaler() function
 50 |               
 51 |       (#) Configure the IWDG counter value using IWDG_SetReload() function.
 52 |           This value will be loaded in the IWDG counter each time the counter
 53 |           is reloaded, then the IWDG will start counting down from this value.
 54 |               
 55 |       (#) Start the IWDG using IWDG_Enable() function, when the IWDG is used
 56 |           in software mode (no need to enable the LSI, it will be enabled
 57 |           by hardware)
 58 |                
 59 |       (#) Then the application program must reload the IWDG counter at regular
 60 |           intervals during normal operation to prevent an MCU reset, using
 61 |           IWDG_ReloadCounter() function.      
 62 |             
 63 |     @endverbatim    
 64 |   ******************************************************************************
 65 |   * @attention
 66 |   *
 67 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 68 |   *
 69 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 70 |   * You may not use this file except in compliance with the License.
 71 |   * You may obtain a copy of the License at:
 72 |   *
 73 |   *        http://www.st.com/software_license_agreement_liberty_v2
 74 |   *
 75 |   * Unless required by applicable law or agreed to in writing, software 
 76 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 77 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 78 |   * See the License for the specific language governing permissions and
 79 |   * limitations under the License.
 80 |   *
 81 |   ******************************************************************************
 82 |   */
 83 | 
 84 | /* Includes ------------------------------------------------------------------*/
 85 | #include "stm32f4xx_iwdg.h"
 86 | 
 87 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 88 |   * @{
 89 |   */
 90 | 
 91 | /** @defgroup IWDG 
 92 |   * @brief IWDG driver modules
 93 |   * @{
 94 |   */ 
 95 | 
 96 | /* Private typedef -----------------------------------------------------------*/
 97 | /* Private define ------------------------------------------------------------*/
 98 | 
 99 | /* KR register bit mask */
100 | #define KR_KEY_RELOAD    ((uint16_t)0xAAAA)
101 | #define KR_KEY_ENABLE    ((uint16_t)0xCCCC)
102 | 
103 | /* Private macro -------------------------------------------------------------*/
104 | /* Private variables ---------------------------------------------------------*/
105 | /* Private function prototypes -----------------------------------------------*/
106 | /* Private functions ---------------------------------------------------------*/
107 | 
108 | /** @defgroup IWDG_Private_Functions
109 |   * @{
110 |   */
111 | 
112 | /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
113 |  *  @brief   Prescaler and Counter configuration functions
114 |  *
115 | @verbatim   
116 |  ===============================================================================
117 |               ##### Prescaler and Counter configuration functions #####
118 |  ===============================================================================  
119 | 
120 | @endverbatim
121 |   * @{
122 |   */
123 | 
124 | /**
125 |   * @brief  Enables or disables write access to IWDG_PR and IWDG_RLR registers.
126 |   * @param  IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
127 |   *          This parameter can be one of the following values:
128 |   *            @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
129 |   *            @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
130 |   * @retval None
131 |   */
132 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
133 | {
134 |   /* Check the parameters */
135 |   assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
136 |   IWDG->KR = IWDG_WriteAccess;
137 | }
138 | 
139 | /**
140 |   * @brief  Sets IWDG Prescaler value.
141 |   * @param  IWDG_Prescaler: specifies the IWDG Prescaler value.
142 |   *          This parameter can be one of the following values:
143 |   *            @arg IWDG_Prescaler_4: IWDG prescaler set to 4
144 |   *            @arg IWDG_Prescaler_8: IWDG prescaler set to 8
145 |   *            @arg IWDG_Prescaler_16: IWDG prescaler set to 16
146 |   *            @arg IWDG_Prescaler_32: IWDG prescaler set to 32
147 |   *            @arg IWDG_Prescaler_64: IWDG prescaler set to 64
148 |   *            @arg IWDG_Prescaler_128: IWDG prescaler set to 128
149 |   *            @arg IWDG_Prescaler_256: IWDG prescaler set to 256
150 |   * @retval None
151 |   */
152 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
153 | {
154 |   /* Check the parameters */
155 |   assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
156 |   IWDG->PR = IWDG_Prescaler;
157 | }
158 | 
159 | /**
160 |   * @brief  Sets IWDG Reload value.
161 |   * @param  Reload: specifies the IWDG Reload value.
162 |   *          This parameter must be a number between 0 and 0x0FFF.
163 |   * @retval None
164 |   */
165 | void IWDG_SetReload(uint16_t Reload)
166 | {
167 |   /* Check the parameters */
168 |   assert_param(IS_IWDG_RELOAD(Reload));
169 |   IWDG->RLR = Reload;
170 | }
171 | 
172 | /**
173 |   * @brief  Reloads IWDG counter with value defined in the reload register
174 |   *         (write access to IWDG_PR and IWDG_RLR registers disabled).
175 |   * @param  None
176 |   * @retval None
177 |   */
178 | void IWDG_ReloadCounter(void)
179 | {
180 |   IWDG->KR = KR_KEY_RELOAD;
181 | }
182 | 
183 | /**
184 |   * @}
185 |   */
186 | 
187 | /** @defgroup IWDG_Group2 IWDG activation function
188 |  *  @brief   IWDG activation function 
189 |  *
190 | @verbatim   
191 |  ===============================================================================
192 |                     ##### IWDG activation function #####
193 |  ===============================================================================  
194 | 
195 | @endverbatim
196 |   * @{
197 |   */
198 | 
199 | /**
200 |   * @brief  Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
201 |   * @param  None
202 |   * @retval None
203 |   */
204 | void IWDG_Enable(void)
205 | {
206 |   IWDG->KR = KR_KEY_ENABLE;
207 | }
208 | 
209 | /**
210 |   * @}
211 |   */
212 | 
213 | /** @defgroup IWDG_Group3 Flag management function 
214 |  *  @brief  Flag management function  
215 |  *
216 | @verbatim   
217 |  ===============================================================================
218 |                     ##### Flag management function #####
219 |  ===============================================================================  
220 | 
221 | @endverbatim
222 |   * @{
223 |   */
224 | 
225 | /**
226 |   * @brief  Checks whether the specified IWDG flag is set or not.
227 |   * @param  IWDG_FLAG: specifies the flag to check.
228 |   *          This parameter can be one of the following values:
229 |   *            @arg IWDG_FLAG_PVU: Prescaler Value Update on going
230 |   *            @arg IWDG_FLAG_RVU: Reload Value Update on going
231 |   * @retval The new state of IWDG_FLAG (SET or RESET).
232 |   */
233 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
234 | {
235 |   FlagStatus bitstatus = RESET;
236 |   /* Check the parameters */
237 |   assert_param(IS_IWDG_FLAG(IWDG_FLAG));
238 |   if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
239 |   {
240 |     bitstatus = SET;
241 |   }
242 |   else
243 |   {
244 |     bitstatus = RESET;
245 |   }
246 |   /* Return the flag status */
247 |   return bitstatus;
248 | }
249 | 
250 | /**
251 |   * @}
252 |   */
253 | 
254 | /**
255 |   * @}
256 |   */
257 | 
258 | /**
259 |   * @}
260 |   */
261 | 
262 | /**
263 |   * @}
264 |   */
265 | 
266 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
267 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_md5.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_hash_md5.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides high level functions to compute the HASH MD5 and
  8 |   *          HMAC MD5 Digest of an input message.
  9 |   *          It uses the stm32f4xx_hash.c/.h drivers to access the STM32F4xx HASH
 10 |   *          peripheral.
 11 |   *
 12 | @verbatim
 13 |  ===================================================================
 14 |                   ##### How to use this driver #####
 15 |  ===================================================================
 16 |  [..]
 17 |    (#) Enable The HASH controller clock using 
 18 |        RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE); function.
 19 |   
 20 |    (#) Calculate the HASH MD5 Digest using HASH_MD5() function.
 21 |   
 22 |    (#) Calculate the HMAC MD5 Digest using HMAC_MD5() function.
 23 |   
 24 | @endverbatim
 25 |   *
 26 |   ******************************************************************************
 27 |   * @attention
 28 |   *
 29 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 30 |   *
 31 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 32 |   * You may not use this file except in compliance with the License.
 33 |   * You may obtain a copy of the License at:
 34 |   *
 35 |   *        http://www.st.com/software_license_agreement_liberty_v2
 36 |   *
 37 |   * Unless required by applicable law or agreed to in writing, software 
 38 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 39 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 40 |   * See the License for the specific language governing permissions and
 41 |   * limitations under the License.
 42 |   *
 43 |   ******************************************************************************
 44 |   */
 45 | 
 46 | /* Includes ------------------------------------------------------------------*/
 47 | #include "stm32f4xx_hash.h"
 48 | 
 49 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 50 |   * @{
 51 |   */
 52 | 
 53 | /** @defgroup HASH 
 54 |   * @brief HASH driver modules
 55 |   * @{
 56 |   */
 57 | 
 58 | /* Private typedef -----------------------------------------------------------*/
 59 | /* Private define ------------------------------------------------------------*/
 60 | #define MD5BUSY_TIMEOUT    ((uint32_t) 0x00010000)
 61 | 
 62 | /* Private macro -------------------------------------------------------------*/
 63 | /* Private variables ---------------------------------------------------------*/
 64 | /* Private function prototypes -----------------------------------------------*/
 65 | /* Private functions ---------------------------------------------------------*/
 66 | 
 67 | /** @defgroup HASH_Private_Functions
 68 |   * @{
 69 |   */ 
 70 | 
 71 | /** @defgroup HASH_Group7 High Level MD5 functions
 72 |  *  @brief   High Level MD5 Hash and HMAC functions 
 73 |  *
 74 | @verbatim   
 75 |  ===============================================================================
 76 |               ##### High Level MD5 Hash and HMAC functions #####
 77 |  ===============================================================================
 78 | 
 79 | 
 80 | @endverbatim
 81 |   * @{
 82 |   */
 83 | 
 84 | /**
 85 |   * @brief  Compute the HASH MD5 digest.
 86 |   * @param  Input: pointer to the Input buffer to be treated.
 87 |   * @param  Ilen: length of the Input buffer.
 88 |   * @param  Output: the returned digest
 89 |   * @retval An ErrorStatus enumeration value:
 90 |   *          - SUCCESS: digest computation done
 91 |   *          - ERROR: digest computation failed
 92 |   */
 93 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16])
 94 | {
 95 |   HASH_InitTypeDef MD5_HASH_InitStructure;
 96 |   HASH_MsgDigest MD5_MessageDigest;
 97 |   __IO uint16_t nbvalidbitsdata = 0;
 98 |   uint32_t i = 0;
 99 |   __IO uint32_t counter = 0;
100 |   uint32_t busystatus = 0;
101 |   ErrorStatus status = SUCCESS;
102 |   uint32_t inputaddr  = (uint32_t)Input;
103 |   uint32_t outputaddr = (uint32_t)Output;
104 | 
105 | 
106 |   /* Number of valid bits in last word of the Input data */
107 |   nbvalidbitsdata = 8 * (Ilen % 4);
108 | 
109 |   /* HASH peripheral initialization */
110 |   HASH_DeInit();
111 | 
112 |   /* HASH Configuration */
113 |   MD5_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_MD5;
114 |   MD5_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH;
115 |   MD5_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
116 |   HASH_Init(&MD5_HASH_InitStructure);
117 | 
118 |   /* Configure the number of valid bits in last word of the data */
119 |   HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
120 | 
121 |   /* Write the Input block in the IN FIFO */
122 |   for(i=0; i<Ilen; i+=4)
123 |   {
124 |     HASH_DataIn(*(uint32_t*)inputaddr);
125 |     inputaddr+=4;
126 |   }
127 | 
128 |   /* Start the HASH processor */
129 |   HASH_StartDigest();
130 | 
131 |   /* wait until the Busy flag is RESET */
132 |   do
133 |   {
134 |     busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
135 |     counter++;
136 |   }while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
137 | 
138 |   if (busystatus != RESET)
139 |   {
140 |      status = ERROR;
141 |   }
142 |   else
143 |   {
144 |     /* Read the message digest */
145 |     HASH_GetDigest(&MD5_MessageDigest);
146 |     *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[0]);
147 |     outputaddr+=4;
148 |     *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[1]);
149 |     outputaddr+=4;
150 |     *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[2]);
151 |     outputaddr+=4;
152 |     *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[3]);
153 |   }
154 |   return status; 
155 | }
156 | 
157 | /**
158 |   * @brief  Compute the HMAC MD5 digest.
159 |   * @param  Key: pointer to the Key used for HMAC.
160 |   * @param  Keylen: length of the Key used for HMAC.
161 |   * @param  Input: pointer to the Input buffer to be treated.
162 |   * @param  Ilen: length of the Input buffer.
163 |   * @param  Output: the returned digest  
164 |   * @retval An ErrorStatus enumeration value:
165 |   *          - SUCCESS: digest computation done
166 |   *          - ERROR: digest computation failed
167 |   */
168 | ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen, uint8_t *Input, 
169 |                      uint32_t Ilen, uint8_t Output[16])
170 | {
171 |   HASH_InitTypeDef MD5_HASH_InitStructure;
172 |   HASH_MsgDigest MD5_MessageDigest;
173 |   __IO uint16_t nbvalidbitsdata = 0;
174 |   __IO uint16_t nbvalidbitskey = 0;
175 |   uint32_t i = 0;
176 |   __IO uint32_t counter = 0;
177 |   uint32_t busystatus = 0;
178 |   ErrorStatus status = SUCCESS;
179 |   uint32_t keyaddr    = (uint32_t)Key;
180 |   uint32_t inputaddr  = (uint32_t)Input;
181 |   uint32_t outputaddr = (uint32_t)Output;
182 | 
183 |   /* Number of valid bits in last word of the Input data */
184 |   nbvalidbitsdata = 8 * (Ilen % 4);
185 | 
186 |   /* Number of valid bits in last word of the Key */
187 |   nbvalidbitskey = 8 * (Keylen % 4);
188 |    
189 |   /* HASH peripheral initialization */
190 |   HASH_DeInit();
191 | 
192 |   /* HASH Configuration */
193 |   MD5_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_MD5;
194 |   MD5_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HMAC;
195 |   MD5_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
196 |   if(Keylen > 64)
197 |   {
198 |     /* HMAC long Key */
199 |     MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey;
200 |   }
201 |   else
202 |   {
203 |     /* HMAC short Key */
204 |     MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
205 |   }
206 |   HASH_Init(&MD5_HASH_InitStructure);
207 | 
208 |   /* Configure the number of valid bits in last word of the Key */
209 |   HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
210 | 
211 |   /* Write the Key */
212 |   for(i=0; i<Keylen; i+=4)
213 |   {
214 |     HASH_DataIn(*(uint32_t*)keyaddr);
215 |     keyaddr+=4;
216 |   }
217 |   
218 |   /* Start the HASH processor */
219 |   HASH_StartDigest();
220 | 
221 |   /* wait until the Busy flag is RESET */
222 |   do
223 |   {
224 |     busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
225 |     counter++;
226 |   }while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
227 | 
228 |   if (busystatus != RESET)
229 |   {
230 |      status = ERROR;
231 |   }
232 |   else
233 |   {
234 |     /* Configure the number of valid bits in last word of the Input data */
235 |     HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
236 | 
237 |     /* Write the Input block in the IN FIFO */
238 |     for(i=0; i<Ilen; i+=4)
239 |     {
240 |       HASH_DataIn(*(uint32_t*)inputaddr);
241 |       inputaddr+=4;
242 |     }
243 | 
244 |     /* Start the HASH processor */
245 |     HASH_StartDigest();
246 | 
247 |     /* wait until the Busy flag is RESET */
248 |     counter =0;
249 |     do
250 |     {
251 |        busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
252 |        counter++;
253 |     }while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
254 | 
255 |     if (busystatus != RESET)
256 |     {
257 |       status = ERROR;
258 |     }
259 |     else
260 |     {  
261 |       /* Configure the number of valid bits in last word of the Key */
262 |       HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
263 | 
264 |       /* Write the Key */
265 |       keyaddr = (uint32_t)Key;
266 |       for(i=0; i<Keylen; i+=4)
267 |       {
268 |         HASH_DataIn(*(uint32_t*)keyaddr);
269 |         keyaddr+=4;
270 |       }
271 |   
272 |        /* Start the HASH processor */
273 |        HASH_StartDigest();
274 | 
275 |        /* wait until the Busy flag is RESET */
276 |        counter =0;
277 |        do
278 |        {
279 |           busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
280 |           counter++;
281 |       }while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
282 | 
283 |       if (busystatus != RESET)
284 |       {
285 |          status = ERROR;
286 |       }
287 |       else
288 |       {
289 |          /* Read the message digest */
290 |          HASH_GetDigest(&MD5_MessageDigest);
291 |          *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[0]);
292 |          outputaddr+=4;
293 |          *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[1]);
294 |          outputaddr+=4;
295 |          *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[2]);
296 |          outputaddr+=4;
297 |          *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[3]);
298 |       }
299 |     }
300 |   }
301 |   return status;  
302 | }
303 | /**
304 |   * @}
305 |   */ 
306 | 
307 | /**
308 |   * @}
309 |   */ 
310 | 
311 | /**
312 |   * @}
313 |   */ 
314 | 
315 | /**
316 |   * @}
317 |   */ 
318 | 
319 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
320 | 
321 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_syscfg.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_syscfg.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file contains all the functions prototypes for the SYSCFG firmware
  8 |   *          library. 
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 13 |   *
 14 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 15 |   * You may not use this file except in compliance with the License.
 16 |   * You may obtain a copy of the License at:
 17 |   *
 18 |   *        http://www.st.com/software_license_agreement_liberty_v2
 19 |   *
 20 |   * Unless required by applicable law or agreed to in writing, software 
 21 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 22 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 23 |   * See the License for the specific language governing permissions and
 24 |   * limitations under the License.
 25 |   *
 26 |   ******************************************************************************
 27 |   */
 28 | 
 29 | /* Define to prevent recursive inclusion -------------------------------------*/
 30 | #ifndef __STM32F4xx_SYSCFG_H
 31 | #define __STM32F4xx_SYSCFG_H
 32 | 
 33 | #ifdef __cplusplus
 34 |  extern "C" {
 35 | #endif
 36 | 
 37 | /* Includes ------------------------------------------------------------------*/
 38 | #include "stm32f4xx.h"
 39 | 
 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 41 |   * @{
 42 |   */
 43 | 
 44 | /** @addtogroup SYSCFG
 45 |   * @{
 46 |   */ 
 47 | 
 48 | /* Exported types ------------------------------------------------------------*/
 49 | /* Exported constants --------------------------------------------------------*/
 50 |   
 51 | /** @defgroup SYSCFG_Exported_Constants 
 52 |   * @{
 53 |   */ 
 54 | 
 55 | /** @defgroup SYSCFG_EXTI_Port_Sources 
 56 |   * @{
 57 |   */ 
 58 | #define EXTI_PortSourceGPIOA       ((uint8_t)0x00)
 59 | #define EXTI_PortSourceGPIOB       ((uint8_t)0x01)
 60 | #define EXTI_PortSourceGPIOC       ((uint8_t)0x02)
 61 | #define EXTI_PortSourceGPIOD       ((uint8_t)0x03)
 62 | #define EXTI_PortSourceGPIOE       ((uint8_t)0x04)
 63 | #define EXTI_PortSourceGPIOF       ((uint8_t)0x05)
 64 | #define EXTI_PortSourceGPIOG       ((uint8_t)0x06)
 65 | #define EXTI_PortSourceGPIOH       ((uint8_t)0x07)
 66 | #define EXTI_PortSourceGPIOI       ((uint8_t)0x08)
 67 | #define EXTI_PortSourceGPIOJ       ((uint8_t)0x09)
 68 | #define EXTI_PortSourceGPIOK       ((uint8_t)0x0A)
 69 | 
 70 | #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
 71 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
 72 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
 73 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
 74 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
 75 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOF) || \
 76 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOG) || \
 77 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOH) || \
 78 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOI) || \
 79 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOJ) || \
 80 |                                          ((PORTSOURCE) == EXTI_PortSourceGPIOK))
 81 |                                          
 82 | /**
 83 |   * @}
 84 |   */ 
 85 | 
 86 | 
 87 | /** @defgroup SYSCFG_EXTI_Pin_Sources 
 88 |   * @{
 89 |   */ 
 90 | #define EXTI_PinSource0            ((uint8_t)0x00)
 91 | #define EXTI_PinSource1            ((uint8_t)0x01)
 92 | #define EXTI_PinSource2            ((uint8_t)0x02)
 93 | #define EXTI_PinSource3            ((uint8_t)0x03)
 94 | #define EXTI_PinSource4            ((uint8_t)0x04)
 95 | #define EXTI_PinSource5            ((uint8_t)0x05)
 96 | #define EXTI_PinSource6            ((uint8_t)0x06)
 97 | #define EXTI_PinSource7            ((uint8_t)0x07)
 98 | #define EXTI_PinSource8            ((uint8_t)0x08)
 99 | #define EXTI_PinSource9            ((uint8_t)0x09)
100 | #define EXTI_PinSource10           ((uint8_t)0x0A)
101 | #define EXTI_PinSource11           ((uint8_t)0x0B)
102 | #define EXTI_PinSource12           ((uint8_t)0x0C)
103 | #define EXTI_PinSource13           ((uint8_t)0x0D)
104 | #define EXTI_PinSource14           ((uint8_t)0x0E)
105 | #define EXTI_PinSource15           ((uint8_t)0x0F)
106 | #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0)  || \
107 |                                        ((PINSOURCE) == EXTI_PinSource1)  || \
108 |                                        ((PINSOURCE) == EXTI_PinSource2)  || \
109 |                                        ((PINSOURCE) == EXTI_PinSource3)  || \
110 |                                        ((PINSOURCE) == EXTI_PinSource4)  || \
111 |                                        ((PINSOURCE) == EXTI_PinSource5)  || \
112 |                                        ((PINSOURCE) == EXTI_PinSource6)  || \
113 |                                        ((PINSOURCE) == EXTI_PinSource7)  || \
114 |                                        ((PINSOURCE) == EXTI_PinSource8)  || \
115 |                                        ((PINSOURCE) == EXTI_PinSource9)  || \
116 |                                        ((PINSOURCE) == EXTI_PinSource10) || \
117 |                                        ((PINSOURCE) == EXTI_PinSource11) || \
118 |                                        ((PINSOURCE) == EXTI_PinSource12) || \
119 |                                        ((PINSOURCE) == EXTI_PinSource13) || \
120 |                                        ((PINSOURCE) == EXTI_PinSource14) || \
121 |                                        ((PINSOURCE) == EXTI_PinSource15))
122 | /**
123 |   * @}
124 |   */ 
125 | 
126 | 
127 | /** @defgroup SYSCFG_Memory_Remap_Config 
128 |   * @{
129 |   */ 
130 | #define SYSCFG_MemoryRemap_Flash       ((uint8_t)0x00)
131 | #define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01)
132 | #define SYSCFG_MemoryRemap_SRAM        ((uint8_t)0x03)
133 | #define SYSCFG_MemoryRemap_SDRAM       ((uint8_t)0x04)
134 | 
135 | #if defined (STM32F40_41xxx)
136 | #define SYSCFG_MemoryRemap_FSMC        ((uint8_t)0x02) 
137 | #endif /* STM32F40_41xxx */
138 | 
139 | #if defined (STM32F427_437xx) || defined (STM32F429_439xx)
140 | #define SYSCFG_MemoryRemap_FMC         ((uint8_t)0x02) 
141 | #endif /* STM32F427_437xx ||  STM32F429_439xx */  
142 | 
143 | #if defined (STM32F446xx) || defined (STM32F469_479xx)
144 | #define SYSCFG_MemoryRemap_ExtMEM      ((uint8_t)0x02) 
145 | #endif /*  STM32F446xx || STM32F469_479xx */ 
146 | 
147 | #if defined (STM32F40_41xxx) 
148 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash)       || \
149 |                                                ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
150 |                                                ((REMAP) == SYSCFG_MemoryRemap_SRAM)        || \
151 |                                                ((REMAP) == SYSCFG_MemoryRemap_FSMC))
152 | #endif /* STM32F40_41xxx */
153 | 
154 | #if defined (STM32F401xx) || defined (STM32F410xx) || defined (STM32F411xE)
155 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash)       || \
156 |                                                ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
157 |                                                ((REMAP) == SYSCFG_MemoryRemap_SRAM))
158 | #endif /* STM32F401xx || STM32F410xx || STM32F411xE */
159 | 
160 | #if defined (STM32F427_437xx) || defined (STM32F429_439xx)
161 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash)       || \
162 |                                                ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
163 |                                                ((REMAP) == SYSCFG_MemoryRemap_SRAM)        || \
164 |                                                ((REMAP) == SYSCFG_MemoryRemap_SDRAM)       || \
165 |                                                ((REMAP) == SYSCFG_MemoryRemap_FMC))
166 | #endif /* STM32F427_437xx ||  STM32F429_439xx */
167 | 
168 | #if defined (STM32F446xx) || defined (STM32F469_479xx)
169 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash)       || \
170 |                                                ((REMAP) == SYSCFG_MemoryRemap_ExtMEM)      || \
171 |                                                ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
172 |                                                ((REMAP) == SYSCFG_MemoryRemap_SRAM)        || \
173 |                                                ((REMAP) == SYSCFG_MemoryRemap_SDRAM))
174 | #endif /* STM32F446xx || STM32F469_479xx */
175 | 
176 | #if defined(STM32F410xx)
177 | #define SYSCFG_Break_PVD             SYSCFG_CFGR2_PVDL
178 | #define SYSCFG_Break_HardFault       SYSCFG_CFGR2_CLL
179 | 
180 | #define IS_SYSCFG_LOCK_CONFIG(BREAK) (((BREAK) == SYSCFG_Break_PVD)       || \
181 |                                       ((BREAK) == SYSCFG_Break_PVD))
182 | #endif /* STM32F410xx */
183 | /**
184 |   * @}
185 |   */ 
186 | 
187 | 
188 | /** @defgroup SYSCFG_ETHERNET_Media_Interface 
189 |   * @{
190 |   */ 
191 | #define SYSCFG_ETH_MediaInterface_MII    ((uint32_t)0x00000000)
192 | #define SYSCFG_ETH_MediaInterface_RMII   ((uint32_t)0x00000001)
193 | 
194 | #define IS_SYSCFG_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == SYSCFG_ETH_MediaInterface_MII) || \
195 |                                                  ((INTERFACE) == SYSCFG_ETH_MediaInterface_RMII))
196 | /**
197 |   * @}
198 |   */ 
199 | 
200 | /**
201 |   * @}
202 |   */ 
203 | 
204 | /* Exported macro ------------------------------------------------------------*/
205 | /* Exported functions --------------------------------------------------------*/ 
206 |  
207 | void       SYSCFG_DeInit(void);
208 | void       SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
209 | void       SYSCFG_MemorySwappingBank(FunctionalState NewState);
210 | void       SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
211 | void       SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface); 
212 | void       SYSCFG_CompensationCellCmd(FunctionalState NewState); 
213 | FlagStatus SYSCFG_GetCompensationCellStatus(void);
214 | #if defined(STM32F410xx)
215 | void       SYSCFG_BreakConfig(uint32_t SYSCFG_Break);
216 | #endif /* STM32F410xx */
217 | #ifdef __cplusplus
218 | }
219 | #endif
220 | 
221 | #endif /*__STM32F4xx_SYSCFG_H */
222 | 
223 | /**
224 |   * @}
225 |   */ 
226 | 
227 | /**
228 |   * @}
229 |   */ 
230 | 
231 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
232 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_des.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_cryp_des.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides high level functions to encrypt and decrypt an 
  8 |   *          input message using DES in ECB/CBC modes.
  9 |   *          It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP
 10 |   *          peripheral.
 11 |   *
 12 | @verbatim
 13 |   
 14 |  ===================================================================
 15 |                   ##### How to use this driver #####
 16 |  ===================================================================
 17 |  [..] 
 18 |    (#) Enable The CRYP controller clock using 
 19 |        RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
 20 |   
 21 |    (#) Encrypt and decrypt using DES in ECB Mode using CRYP_DES_ECB() function.
 22 |   
 23 |    (#) Encrypt and decrypt using DES in CBC Mode using CRYP_DES_CBC() function.
 24 |   
 25 | @endverbatim
 26 |   *
 27 |   ******************************************************************************
 28 |   * @attention
 29 |   *
 30 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 31 |   *
 32 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 33 |   * You may not use this file except in compliance with the License.
 34 |   * You may obtain a copy of the License at:
 35 |   *
 36 |   *        http://www.st.com/software_license_agreement_liberty_v2
 37 |   *
 38 |   * Unless required by applicable law or agreed to in writing, software 
 39 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 40 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 41 |   * See the License for the specific language governing permissions and
 42 |   * limitations under the License.
 43 |   *
 44 |   ******************************************************************************
 45 |   */
 46 | 
 47 | /* Includes ------------------------------------------------------------------*/
 48 | #include "stm32f4xx_cryp.h"
 49 | 
 50 | 
 51 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 52 |   * @{
 53 |   */
 54 | 
 55 | /** @defgroup CRYP 
 56 |   * @brief CRYP driver modules
 57 |   * @{
 58 |   */
 59 | 
 60 | /* Private typedef -----------------------------------------------------------*/
 61 | /* Private define ------------------------------------------------------------*/
 62 | #define DESBUSY_TIMEOUT    ((uint32_t) 0x00010000)
 63 | 
 64 | /* Private macro -------------------------------------------------------------*/
 65 | /* Private variables ---------------------------------------------------------*/
 66 | /* Private function prototypes -----------------------------------------------*/
 67 | /* Private functions ---------------------------------------------------------*/
 68 | 
 69 | 
 70 | /** @defgroup CRYP_Private_Functions
 71 |   * @{
 72 |   */ 
 73 | 
 74 | /** @defgroup CRYP_Group8 High Level DES functions
 75 |  *  @brief   High Level DES functions 
 76 |  *
 77 | @verbatim   
 78 |  ===============================================================================
 79 |                        ##### High Level DES functions #####
 80 |  ===============================================================================
 81 | @endverbatim
 82 |   * @{
 83 |   */
 84 | 
 85 | /**
 86 |   * @brief  Encrypt and decrypt using DES in ECB Mode
 87 |   * @param  Mode: encryption or decryption Mode.
 88 |   *           This parameter can be one of the following values:
 89 |   *            @arg MODE_ENCRYPT: Encryption
 90 |   *            @arg MODE_DECRYPT: Decryption
 91 |   * @param  Key: Key used for DES algorithm.
 92 |   * @param  Ilength: length of the Input buffer, must be a multiple of 8.
 93 |   * @param  Input: pointer to the Input buffer.
 94 |   * @param  Output: pointer to the returned buffer.
 95 |   * @retval An ErrorStatus enumeration value:
 96 |   *          - SUCCESS: Operation done
 97 |   *          - ERROR: Operation failed
 98 |   */
 99 | ErrorStatus CRYP_DES_ECB(uint8_t Mode, uint8_t Key[8], uint8_t *Input, 
100 |                          uint32_t Ilength, uint8_t *Output)
101 | {
102 |   CRYP_InitTypeDef DES_CRYP_InitStructure;
103 |   CRYP_KeyInitTypeDef DES_CRYP_KeyInitStructure;
104 |   __IO uint32_t counter = 0;
105 |   uint32_t busystatus = 0;
106 |   ErrorStatus status = SUCCESS;
107 |   uint32_t keyaddr    = (uint32_t)Key;
108 |   uint32_t inputaddr  = (uint32_t)Input;
109 |   uint32_t outputaddr = (uint32_t)Output;
110 |   uint32_t i = 0;
111 | 
112 |   /* Crypto structures initialisation*/
113 |   CRYP_KeyStructInit(&DES_CRYP_KeyInitStructure);
114 | 
115 |   /* Crypto Init for Encryption process */
116 |   if( Mode == MODE_ENCRYPT ) /* DES encryption */
117 |   {
118 |      DES_CRYP_InitStructure.CRYP_AlgoDir  = CRYP_AlgoDir_Encrypt;
119 |   }
120 |   else/* if( Mode == MODE_DECRYPT )*/ /* DES decryption */
121 |   {      
122 |      DES_CRYP_InitStructure.CRYP_AlgoDir  = CRYP_AlgoDir_Decrypt;
123 |   }
124 | 
125 |   DES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_DES_ECB;
126 |   DES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
127 |   CRYP_Init(&DES_CRYP_InitStructure);
128 | 
129 |   /* Key Initialisation */
130 |   DES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
131 |   keyaddr+=4;
132 |   DES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
133 |   CRYP_KeyInit(& DES_CRYP_KeyInitStructure);
134 | 
135 |   /* Flush IN/OUT FIFO */
136 |   CRYP_FIFOFlush();
137 | 
138 |   /* Enable Crypto processor */
139 |   CRYP_Cmd(ENABLE);
140 | 
141 |   if(CRYP_GetCmdStatus() == DISABLE)
142 |   {
143 |     /* The CRYP peripheral clock is not enabled or the device doesn't embed 
144 |        the CRYP peripheral (please check the device sales type. */
145 |     return(ERROR);
146 |   }
147 |   for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
148 |   {
149 | 
150 |     /* Write the Input block in the Input FIFO */
151 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
152 |     inputaddr+=4;
153 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
154 |     inputaddr+=4;
155 | 
156 | /* Wait until the complete message has been processed */
157 |     counter = 0;
158 |     do
159 |     {
160 |       busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
161 |       counter++;
162 |     }while ((counter != DESBUSY_TIMEOUT) && (busystatus != RESET));
163 | 
164 |     if (busystatus != RESET)
165 |    {
166 |        status = ERROR;
167 |     }
168 |     else
169 |     {
170 | 
171 |       /* Read the Output block from the Output FIFO */
172 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
173 |       outputaddr+=4;
174 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
175 |       outputaddr+=4;
176 |     }
177 |   }
178 | 
179 |   /* Disable Crypto */
180 |   CRYP_Cmd(DISABLE);
181 | 
182 |   return status; 
183 | }
184 | 
185 | /**
186 |   * @brief  Encrypt and decrypt using DES in CBC Mode
187 |   * @param  Mode: encryption or decryption Mode.
188 |   *          This parameter can be one of the following values:
189 |   *            @arg MODE_ENCRYPT: Encryption
190 |   *            @arg MODE_DECRYPT: Decryption
191 |   * @param  Key: Key used for DES algorithm.
192 |   * @param  InitVectors: Initialisation Vectors used for DES algorithm.
193 |   * @param  Ilength: length of the Input buffer, must be a multiple of 8.
194 |   * @param  Input: pointer to the Input buffer.
195 |   * @param  Output: pointer to the returned buffer.
196 |   * @retval An ErrorStatus enumeration value:
197 |   *          - SUCCESS: Operation done
198 |   *          - ERROR: Operation failed
199 |   */
200 | ErrorStatus CRYP_DES_CBC(uint8_t Mode, uint8_t Key[8], uint8_t InitVectors[8],
201 |                          uint8_t *Input, uint32_t Ilength, uint8_t *Output)
202 | {
203 |   CRYP_InitTypeDef DES_CRYP_InitStructure;
204 |   CRYP_KeyInitTypeDef DES_CRYP_KeyInitStructure;
205 |   CRYP_IVInitTypeDef DES_CRYP_IVInitStructure;
206 |   __IO uint32_t counter = 0;
207 |   uint32_t busystatus = 0;
208 |   ErrorStatus status = SUCCESS;
209 |   uint32_t keyaddr    = (uint32_t)Key;
210 |   uint32_t inputaddr  = (uint32_t)Input;
211 |   uint32_t outputaddr = (uint32_t)Output;
212 |   uint32_t ivaddr     = (uint32_t)InitVectors;
213 |   uint32_t i = 0;
214 | 
215 |   /* Crypto structures initialisation*/
216 |   CRYP_KeyStructInit(&DES_CRYP_KeyInitStructure);
217 | 
218 |   /* Crypto Init for Encryption process */
219 |   if(Mode == MODE_ENCRYPT) /* DES encryption */
220 |   {
221 |      DES_CRYP_InitStructure.CRYP_AlgoDir  = CRYP_AlgoDir_Encrypt;
222 |   }
223 |   else /*if(Mode == MODE_DECRYPT)*/ /* DES decryption */
224 |   {
225 |      DES_CRYP_InitStructure.CRYP_AlgoDir  = CRYP_AlgoDir_Decrypt;
226 |   }
227 | 
228 |   DES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_DES_CBC;
229 |   DES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
230 |   CRYP_Init(&DES_CRYP_InitStructure);
231 | 
232 |   /* Key Initialisation */
233 |   DES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
234 |   keyaddr+=4;
235 |   DES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
236 |   CRYP_KeyInit(& DES_CRYP_KeyInitStructure);
237 | 
238 |   /* Initialization Vectors */
239 |   DES_CRYP_IVInitStructure.CRYP_IV0Left = __REV(*(uint32_t*)(ivaddr));
240 |   ivaddr+=4;
241 |   DES_CRYP_IVInitStructure.CRYP_IV0Right= __REV(*(uint32_t*)(ivaddr));
242 |   CRYP_IVInit(&DES_CRYP_IVInitStructure);
243 | 
244 |   /* Flush IN/OUT FIFO */
245 |   CRYP_FIFOFlush();
246 |   
247 |   /* Enable Crypto processor */
248 |   CRYP_Cmd(ENABLE);
249 | 
250 |   if(CRYP_GetCmdStatus() == DISABLE)
251 |   {
252 |     /* The CRYP peripheral clock is not enabled or the device doesn't embed 
253 |        the CRYP peripheral (please check the device sales type. */
254 |     return(ERROR);
255 |   }
256 |   for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
257 |   {
258 |     /* Write the Input block in the Input FIFO */
259 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
260 |     inputaddr+=4;
261 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
262 |     inputaddr+=4;
263 | 
264 |     /* Wait until the complete message has been processed */
265 |     counter = 0;
266 |     do
267 |     {
268 |       busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
269 |       counter++;
270 |     }while ((counter != DESBUSY_TIMEOUT) && (busystatus != RESET));
271 | 
272 |     if (busystatus != RESET)
273 |    {
274 |        status = ERROR;
275 |     }
276 |     else
277 |     {
278 |       /* Read the Output block from the Output FIFO */
279 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
280 |       outputaddr+=4;
281 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
282 |       outputaddr+=4;
283 |     }
284 |   }
285 | 
286 |   /* Disable Crypto */
287 |   CRYP_Cmd(DISABLE);
288 | 
289 |   return status; 
290 | }
291 | 
292 | /**
293 |   * @}
294 |   */ 
295 | 
296 | /**
297 |   * @}
298 |   */ 
299 | 
300 | /**
301 |   * @}
302 |   */ 
303 | 
304 | /**
305 |   * @}
306 |   */ 
307 | 
308 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
309 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_hash.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_hash.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file contains all the functions prototypes for the HASH 
  8 |   *          firmware library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 13 |   *
 14 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 15 |   * You may not use this file except in compliance with the License.
 16 |   * You may obtain a copy of the License at:
 17 |   *
 18 |   *        http://www.st.com/software_license_agreement_liberty_v2
 19 |   *
 20 |   * Unless required by applicable law or agreed to in writing, software 
 21 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 22 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 23 |   * See the License for the specific language governing permissions and
 24 |   * limitations under the License.
 25 |   *
 26 |   ******************************************************************************
 27 |   */
 28 | 
 29 | /* Define to prevent recursive inclusion -------------------------------------*/
 30 | #ifndef __STM32F4xx_HASH_H
 31 | #define __STM32F4xx_HASH_H
 32 | 
 33 | #ifdef __cplusplus
 34 |  extern "C" {
 35 | #endif
 36 | 
 37 | /* Includes ------------------------------------------------------------------*/
 38 | #include "stm32f4xx.h"
 39 | 
 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 41 |   * @{
 42 |   */
 43 | 
 44 | /** @addtogroup HASH
 45 |   * @{
 46 |   */ 
 47 | 
 48 | /* Exported types ------------------------------------------------------------*/
 49 | 
 50 | /** 
 51 |   * @brief   HASH Init structure definition
 52 |   */ 
 53 | typedef struct
 54 | {
 55 |   uint32_t HASH_AlgoSelection; /*!< SHA-1, SHA-224, SHA-256 or MD5. This parameter
 56 |                                     can be a value of @ref HASH_Algo_Selection */
 57 |   uint32_t HASH_AlgoMode;      /*!< HASH or HMAC. This parameter can be a value 
 58 |                                     of @ref HASH_processor_Algorithm_Mode */
 59 |   uint32_t HASH_DataType;      /*!< 32-bit data, 16-bit data, 8-bit data or 
 60 |                                     bit string. This parameter can be a value of
 61 |                                     @ref HASH_Data_Type */
 62 |   uint32_t HASH_HMACKeyType;   /*!< HMAC Short key or HMAC Long Key. This parameter
 63 |                                     can be a value of @ref HASH_HMAC_Long_key_only_for_HMAC_mode */
 64 | }HASH_InitTypeDef;
 65 | 
 66 | /** 
 67 |   * @brief  HASH message digest result structure definition  
 68 |   */ 
 69 | typedef struct
 70 | {
 71 |   uint32_t Data[8];      /*!< Message digest result : 8x 32bit wors for SHA-256,
 72 |                                                       7x 32bit wors for SHA-224,
 73 |                                                       5x 32bit words for SHA-1 or
 74 |                                                       4x 32bit words for MD5  */
 75 | } HASH_MsgDigest; 
 76 | 
 77 | /** 
 78 |   * @brief  HASH context swapping structure definition  
 79 |   */ 
 80 | typedef struct
 81 | {
 82 |   uint32_t HASH_IMR; 
 83 |   uint32_t HASH_STR;      
 84 |   uint32_t HASH_CR;     
 85 |   uint32_t HASH_CSR[54];       
 86 | }HASH_Context;
 87 | 
 88 | /* Exported constants --------------------------------------------------------*/
 89 | 
 90 | /** @defgroup HASH_Exported_Constants
 91 |   * @{
 92 |   */ 
 93 | 
 94 | /** @defgroup HASH_Algo_Selection 
 95 |   * @{
 96 |   */ 
 97 | #define HASH_AlgoSelection_SHA1      ((uint32_t)0x0000) /*!< HASH function is SHA1   */
 98 | #define HASH_AlgoSelection_SHA224    HASH_CR_ALGO_1     /*!< HASH function is SHA224 */
 99 | #define HASH_AlgoSelection_SHA256    HASH_CR_ALGO       /*!< HASH function is SHA256 */
100 | #define HASH_AlgoSelection_MD5       HASH_CR_ALGO_0     /*!< HASH function is MD5    */
101 | 
102 | #define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \
103 |                                               ((ALGOSELECTION) == HASH_AlgoSelection_SHA224) || \
104 |                                               ((ALGOSELECTION) == HASH_AlgoSelection_SHA256) || \
105 |                                               ((ALGOSELECTION) == HASH_AlgoSelection_MD5))
106 | /**
107 |   * @}
108 |   */
109 | 
110 | /** @defgroup HASH_processor_Algorithm_Mode 
111 |   * @{
112 |   */ 
113 | #define HASH_AlgoMode_HASH         ((uint32_t)0x00000000) /*!< Algorithm is HASH */ 
114 | #define HASH_AlgoMode_HMAC         HASH_CR_MODE           /*!< Algorithm is HMAC */
115 | 
116 | #define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \
117 |                                     ((ALGOMODE) == HASH_AlgoMode_HMAC))
118 | /**
119 |   * @}
120 |   */
121 | 
122 | /** @defgroup HASH_Data_Type  
123 |   * @{
124 |   */  
125 | #define HASH_DataType_32b          ((uint32_t)0x0000) /*!< 32-bit data. No swapping                     */
126 | #define HASH_DataType_16b          HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped       */
127 | #define HASH_DataType_8b           HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped            */
128 | #define HASH_DataType_1b           HASH_CR_DATATYPE   /*!< 1-bit data. In the word all bits are swapped */
129 | 
130 | #define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DataType_32b)|| \
131 |                                     ((DATATYPE) == HASH_DataType_16b)|| \
132 |                                     ((DATATYPE) == HASH_DataType_8b) || \
133 |                                     ((DATATYPE) == HASH_DataType_1b))
134 | /**
135 |   * @}
136 |   */
137 | 
138 | /** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode  
139 |   * @{
140 |   */ 
141 | #define HASH_HMACKeyType_ShortKey      ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */
142 | #define HASH_HMACKeyType_LongKey       HASH_CR_LKEY           /*!< HMAC Key is > 64 bytes  */
143 | 
144 | #define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \
145 |                                        ((KEYTYPE) == HASH_HMACKeyType_LongKey))
146 | /**
147 |   * @}
148 |   */
149 | 
150 | /** @defgroup Number_of_valid_bits_in_last_word_of_the_message   
151 |   * @{
152 |   */  
153 | #define IS_HASH_VALIDBITSNUMBER(VALIDBITS) ((VALIDBITS) <= 0x1F)
154 | 
155 | /**
156 |   * @}
157 |   */
158 | 
159 | /** @defgroup HASH_interrupts_definition   
160 |   * @{
161 |   */  
162 | #define HASH_IT_DINI               HASH_IMR_DINIM  /*!< A new block can be entered into the input buffer (DIN) */
163 | #define HASH_IT_DCI                HASH_IMR_DCIM   /*!< Digest calculation complete                            */
164 | 
165 | #define IS_HASH_IT(IT) ((((IT) & (uint32_t)0xFFFFFFFC) == 0x00000000) && ((IT) != 0x00000000))
166 | #define IS_HASH_GET_IT(IT) (((IT) == HASH_IT_DINI) || ((IT) == HASH_IT_DCI))
167 | 				   
168 | /**
169 |   * @}
170 |   */
171 | 
172 | /** @defgroup HASH_flags_definition   
173 |   * @{
174 |   */  
175 | #define HASH_FLAG_DINIS            HASH_SR_DINIS  /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer */
176 | #define HASH_FLAG_DCIS             HASH_SR_DCIS   /*!< Digest calculation complete                                                         */
177 | #define HASH_FLAG_DMAS             HASH_SR_DMAS   /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing                          */
178 | #define HASH_FLAG_BUSY             HASH_SR_BUSY   /*!< The hash core is Busy : processing a block of data                                  */
179 | #define HASH_FLAG_DINNE            HASH_CR_DINNE  /*!< DIN not empty : The input buffer contains at least one word of data                 */
180 | 
181 | #define IS_HASH_GET_FLAG(FLAG) (((FLAG) == HASH_FLAG_DINIS) || \
182 |                                 ((FLAG) == HASH_FLAG_DCIS)  || \
183 |                                 ((FLAG) == HASH_FLAG_DMAS)  || \
184 |                                 ((FLAG) == HASH_FLAG_BUSY)  || \
185 |                                 ((FLAG) == HASH_FLAG_DINNE)) 
186 | 
187 | #define IS_HASH_CLEAR_FLAG(FLAG)(((FLAG) == HASH_FLAG_DINIS) || \
188 |                                  ((FLAG) == HASH_FLAG_DCIS))                                 
189 | 
190 | /**
191 |   * @}
192 |   */ 
193 | 
194 | /**
195 |   * @}
196 |   */ 
197 | 
198 | /* Exported macro ------------------------------------------------------------*/
199 | /* Exported functions --------------------------------------------------------*/ 
200 |   
201 | /*  Function used to set the HASH configuration to the default reset state ****/
202 | void HASH_DeInit(void);
203 | 
204 | /* HASH Configuration function ************************************************/
205 | void HASH_Init(HASH_InitTypeDef* HASH_InitStruct);
206 | void HASH_StructInit(HASH_InitTypeDef* HASH_InitStruct);
207 | void HASH_Reset(void);
208 | 
209 | /* HASH Message Digest generation functions ***********************************/
210 | void HASH_DataIn(uint32_t Data);
211 | uint8_t HASH_GetInFIFOWordsNbr(void);
212 | void HASH_SetLastWordValidBitsNbr(uint16_t ValidNumber);
213 | void HASH_StartDigest(void);
214 | void HASH_AutoStartDigest(FunctionalState NewState);
215 | void HASH_GetDigest(HASH_MsgDigest* HASH_MessageDigest);
216 | 
217 | /* HASH Context swapping functions ********************************************/
218 | void HASH_SaveContext(HASH_Context* HASH_ContextSave);
219 | void HASH_RestoreContext(HASH_Context* HASH_ContextRestore);
220 | 
221 | /* HASH DMA interface function ************************************************/
222 | void HASH_DMACmd(FunctionalState NewState);
223 | 
224 | /* HASH Interrupts and flags management functions *****************************/
225 | void HASH_ITConfig(uint32_t HASH_IT, FunctionalState NewState);
226 | FlagStatus HASH_GetFlagStatus(uint32_t HASH_FLAG);
227 | void HASH_ClearFlag(uint32_t HASH_FLAG);
228 | ITStatus HASH_GetITStatus(uint32_t HASH_IT);
229 | void HASH_ClearITPendingBit(uint32_t HASH_IT);
230 | 
231 | /* High Level SHA1 functions **************************************************/
232 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20]);
233 | ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen,
234 |                       uint8_t *Input, uint32_t Ilen,
235 |                       uint8_t Output[20]);
236 | 
237 | /* High Level MD5 functions ***************************************************/
238 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16]);
239 | ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen,
240 |                      uint8_t *Input, uint32_t Ilen,
241 |                      uint8_t Output[16]);
242 | 
243 | #ifdef __cplusplus
244 | }
245 | #endif
246 | 
247 | #endif /*__STM32F4xx_HASH_H */
248 | 
249 | /**
250 |   * @}
251 |   */ 
252 | 
253 | /**
254 |   * @}
255 |   */ 
256 | 
257 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
258 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_sha1.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_hash_sha1.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides high level functions to compute the HASH SHA1 and
  8 |   *          HMAC SHA1 Digest of an input message.
  9 |   *          It uses the stm32f4xx_hash.c/.h drivers to access the STM32F4xx HASH
 10 |   *          peripheral.
 11 |   *
 12 | @verbatim
 13 |  ===================================================================
 14 |                  ##### How to use this driver #####
 15 |  ===================================================================
 16 |  [..]
 17 |    (#) Enable The HASH controller clock using 
 18 |        RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE); function.
 19 |   
 20 |    (#) Calculate the HASH SHA1 Digest using HASH_SHA1() function.
 21 |   
 22 |    (#) Calculate the HMAC SHA1 Digest using HMAC_SHA1() function.
 23 |   
 24 | @endverbatim
 25 |   *
 26 |   ******************************************************************************
 27 |   * @attention
 28 |   *
 29 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 30 |   *
 31 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 32 |   * You may not use this file except in compliance with the License.
 33 |   * You may obtain a copy of the License at:
 34 |   *
 35 |   *        http://www.st.com/software_license_agreement_liberty_v2
 36 |   *
 37 |   * Unless required by applicable law or agreed to in writing, software 
 38 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 39 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 40 |   * See the License for the specific language governing permissions and
 41 |   * limitations under the License.
 42 |   *
 43 |   ******************************************************************************
 44 |   */
 45 | 
 46 | /* Includes ------------------------------------------------------------------*/
 47 | #include "stm32f4xx_hash.h"
 48 | 
 49 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 50 |   * @{
 51 |   */
 52 | 
 53 | /** @defgroup HASH 
 54 |   * @brief HASH driver modules
 55 |   * @{
 56 |   */
 57 | 
 58 | /* Private typedef -----------------------------------------------------------*/
 59 | /* Private define ------------------------------------------------------------*/
 60 | #define SHA1BUSY_TIMEOUT    ((uint32_t) 0x00010000)
 61 | 
 62 | /* Private macro -------------------------------------------------------------*/
 63 | /* Private variables ---------------------------------------------------------*/
 64 | /* Private function prototypes -----------------------------------------------*/
 65 | /* Private functions ---------------------------------------------------------*/
 66 | 
 67 | /** @defgroup HASH_Private_Functions
 68 |   * @{
 69 |   */ 
 70 | 
 71 | /** @defgroup HASH_Group6 High Level SHA1 functions
 72 |  *  @brief   High Level SHA1 Hash and HMAC functions 
 73 |  *
 74 | @verbatim   
 75 |  ===============================================================================
 76 |                ##### High Level SHA1 Hash and HMAC functions #####
 77 |  ===============================================================================
 78 | 
 79 | 
 80 | @endverbatim
 81 |   * @{
 82 |   */
 83 | 
 84 | /**
 85 |   * @brief  Compute the HASH SHA1 digest.
 86 |   * @param  Input: pointer to the Input buffer to be treated.
 87 |   * @param  Ilen: length of the Input buffer.
 88 |   * @param  Output: the returned digest
 89 |   * @retval An ErrorStatus enumeration value:
 90 |   *          - SUCCESS: digest computation done
 91 |   *          - ERROR: digest computation failed
 92 |   */
 93 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20])
 94 | {
 95 |   HASH_InitTypeDef SHA1_HASH_InitStructure;
 96 |   HASH_MsgDigest SHA1_MessageDigest;
 97 |   __IO uint16_t nbvalidbitsdata = 0;
 98 |   uint32_t i = 0;
 99 |   __IO uint32_t counter = 0;
100 |   uint32_t busystatus = 0;
101 |   ErrorStatus status = SUCCESS;
102 |   uint32_t inputaddr  = (uint32_t)Input;
103 |   uint32_t outputaddr = (uint32_t)Output;
104 | 
105 |   /* Number of valid bits in last word of the Input data */
106 |   nbvalidbitsdata = 8 * (Ilen % 4);
107 | 
108 |   /* HASH peripheral initialization */
109 |   HASH_DeInit();
110 | 
111 |   /* HASH Configuration */
112 |   SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
113 |   SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH;
114 |   SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
115 |   HASH_Init(&SHA1_HASH_InitStructure);
116 | 
117 |   /* Configure the number of valid bits in last word of the data */
118 |   HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
119 | 
120 |   /* Write the Input block in the IN FIFO */
121 |   for(i=0; i<Ilen; i+=4)
122 |   {
123 |     HASH_DataIn(*(uint32_t*)inputaddr);
124 |     inputaddr+=4;
125 |   }
126 | 
127 |   /* Start the HASH processor */
128 |   HASH_StartDigest();
129 | 
130 |   /* wait until the Busy flag is RESET */
131 |   do
132 |   {
133 |     busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
134 |     counter++;
135 |   }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
136 | 
137 |   if (busystatus != RESET)
138 |   {
139 |      status = ERROR;
140 |   }
141 |   else
142 |   {
143 |     /* Read the message digest */
144 |     HASH_GetDigest(&SHA1_MessageDigest);
145 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[0]);
146 |     outputaddr+=4;
147 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[1]);
148 |     outputaddr+=4;
149 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[2]);
150 |     outputaddr+=4;
151 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[3]);
152 |     outputaddr+=4;
153 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[4]);
154 |   }
155 |   return status;
156 | }
157 | 
158 | /**
159 |   * @brief  Compute the HMAC SHA1 digest.
160 |   * @param  Key: pointer to the Key used for HMAC.
161 |   * @param  Keylen: length of the Key used for HMAC.  
162 |   * @param  Input: pointer to the Input buffer to be treated.
163 |   * @param  Ilen: length of the Input buffer.
164 |   * @param  Output: the returned digest
165 |   * @retval An ErrorStatus enumeration value:
166 |   *          - SUCCESS: digest computation done
167 |   *          - ERROR: digest computation failed
168 |   */
169 | ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen, uint8_t *Input,
170 |                       uint32_t Ilen, uint8_t Output[20])
171 | {
172 |   HASH_InitTypeDef SHA1_HASH_InitStructure;
173 |   HASH_MsgDigest SHA1_MessageDigest;
174 |   __IO uint16_t nbvalidbitsdata = 0;
175 |   __IO uint16_t nbvalidbitskey = 0;
176 |   uint32_t i = 0;
177 |   __IO uint32_t counter = 0;
178 |   uint32_t busystatus = 0;
179 |   ErrorStatus status = SUCCESS;
180 |   uint32_t keyaddr    = (uint32_t)Key;
181 |   uint32_t inputaddr  = (uint32_t)Input;
182 |   uint32_t outputaddr = (uint32_t)Output;
183 | 
184 |   /* Number of valid bits in last word of the Input data */
185 |   nbvalidbitsdata = 8 * (Ilen % 4);
186 | 
187 |   /* Number of valid bits in last word of the Key */
188 |   nbvalidbitskey = 8 * (Keylen % 4);
189 | 
190 |   /* HASH peripheral initialization */
191 |   HASH_DeInit();
192 | 
193 |   /* HASH Configuration */
194 |   SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
195 |   SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HMAC;
196 |   SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
197 |   if(Keylen > 64)
198 |   {
199 |     /* HMAC long Key */
200 |     SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey;
201 |   }
202 |   else
203 |   {
204 |     /* HMAC short Key */
205 |     SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
206 |   }
207 |   HASH_Init(&SHA1_HASH_InitStructure);
208 | 
209 |   /* Configure the number of valid bits in last word of the Key */
210 |   HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
211 | 
212 |   /* Write the Key */
213 |   for(i=0; i<Keylen; i+=4)
214 |   {
215 |     HASH_DataIn(*(uint32_t*)keyaddr);
216 |     keyaddr+=4;
217 |   }
218 | 
219 |   /* Start the HASH processor */
220 |   HASH_StartDigest();
221 | 
222 |   /* wait until the Busy flag is RESET */
223 |   do
224 |   {
225 |     busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
226 |     counter++;
227 |   }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
228 | 
229 |   if (busystatus != RESET)
230 |   {
231 |      status = ERROR;
232 |   }
233 |   else
234 |   {
235 |     /* Configure the number of valid bits in last word of the Input data */
236 |     HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
237 | 
238 |     /* Write the Input block in the IN FIFO */
239 |     for(i=0; i<Ilen; i+=4)
240 |     {
241 |       HASH_DataIn(*(uint32_t*)inputaddr);
242 |       inputaddr+=4;
243 |     }
244 | 
245 |     /* Start the HASH processor */
246 |     HASH_StartDigest();
247 | 
248 | 
249 |     /* wait until the Busy flag is RESET */
250 |     counter =0;
251 |     do
252 |     {
253 |       busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
254 |       counter++;
255 |     }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
256 | 
257 |     if (busystatus != RESET)
258 |     {
259 |       status = ERROR;
260 |     }
261 |     else
262 |     {  
263 |       /* Configure the number of valid bits in last word of the Key */
264 |       HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
265 | 
266 |       /* Write the Key */
267 |       keyaddr = (uint32_t)Key;
268 |       for(i=0; i<Keylen; i+=4)
269 |       {
270 |         HASH_DataIn(*(uint32_t*)keyaddr);
271 |         keyaddr+=4;
272 |       }
273 | 
274 |       /* Start the HASH processor */
275 |       HASH_StartDigest();
276 | 
277 |       /* wait until the Busy flag is RESET */
278 |       counter =0;
279 |       do
280 |       {
281 |         busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
282 |         counter++;
283 |       }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
284 | 
285 |       if (busystatus != RESET)
286 |       {
287 |         status = ERROR;
288 |       }
289 |       else
290 |       {
291 |         /* Read the message digest */
292 |         HASH_GetDigest(&SHA1_MessageDigest);
293 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[0]);
294 |         outputaddr+=4;
295 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[1]);
296 |         outputaddr+=4;
297 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[2]);
298 |         outputaddr+=4;
299 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[3]);
300 |         outputaddr+=4;
301 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[4]);
302 |       }
303 |     }  
304 |   }
305 |   return status;  
306 | }
307 | /**
308 |   * @}
309 |   */ 
310 | 
311 | /**
312 |   * @}
313 |   */ 
314 | 
315 | /**
316 |   * @}
317 |   */ 
318 | 
319 | /**
320 |   * @}
321 |   */ 
322 | 
323 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
324 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_exti.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_exti.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides firmware functions to manage the following 
  8 |   *          functionalities of the EXTI peripheral:
  9 |   *           + Initialization and Configuration
 10 |   *           + Interrupts and flags management
 11 |   *
 12 | @verbatim  
 13 | 
 14 |  ===============================================================================
 15 |                               ##### EXTI features #####
 16 |  ===============================================================================
 17 | 
 18 |  [..] External interrupt/event lines are mapped as following:
 19 |    (#) All available GPIO pins are connected to the 16 external 
 20 |        interrupt/event lines from EXTI0 to EXTI15.
 21 |    (#) EXTI line 16 is connected to the PVD Output
 22 |    (#) EXTI line 17 is connected to the RTC Alarm event
 23 |    (#) EXTI line 18 is connected to the USB OTG FS Wakeup from suspend event
 24 |    (#) EXTI line 19 is connected to the Ethernet Wakeup event
 25 |    (#) EXTI line 20 is connected to the USB OTG HS (configured in FS) Wakeup event 
 26 |    (#) EXTI line 21 is connected to the RTC Tamper and Time Stamp events
 27 |    (#) EXTI line 22 is connected to the RTC Wakeup event
 28 |    (#) EXTI line 23 is connected to the LPTIM Wakeup event 
 29 | 
 30 |                        ##### How to use this driver #####
 31 |  ===============================================================================
 32 |  
 33 |  [..] In order to use an I/O pin as an external interrupt source, follow steps 
 34 |       below:
 35 |    (#) Configure the I/O in input mode using GPIO_Init()
 36 |    (#) Select the input source pin for the EXTI line using SYSCFG_EXTILineConfig()
 37 |    (#) Select the mode(interrupt, event) and configure the trigger 
 38 |        selection (Rising, falling or both) using EXTI_Init()
 39 |    (#) Configure NVIC IRQ channel mapped to the EXTI line using NVIC_Init()
 40 | 
 41 |  [..]     
 42 |    (@) SYSCFG APB clock must be enabled to get write access to SYSCFG_EXTICRx
 43 |        registers using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
 44 | 
 45 | @endverbatim
 46 |   *
 47 |   ******************************************************************************
 48 |   * @attention
 49 |   *
 50 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 51 |   *
 52 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 53 |   * You may not use this file except in compliance with the License.
 54 |   * You may obtain a copy of the License at:
 55 |   *
 56 |   *        http://www.st.com/software_license_agreement_liberty_v2
 57 |   *
 58 |   * Unless required by applicable law or agreed to in writing, software 
 59 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 60 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 61 |   * See the License for the specific language governing permissions and
 62 |   * limitations under the License.
 63 |   *
 64 |   ******************************************************************************
 65 |   */
 66 | 
 67 | /* Includes ------------------------------------------------------------------*/
 68 | #include "stm32f4xx_exti.h"
 69 | 
 70 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 71 |   * @{
 72 |   */
 73 | 
 74 | /** @defgroup EXTI 
 75 |   * @brief EXTI driver modules
 76 |   * @{
 77 |   */
 78 | 
 79 | /* Private typedef -----------------------------------------------------------*/
 80 | /* Private define ------------------------------------------------------------*/
 81 | 
 82 | #define EXTI_LINENONE    ((uint32_t)0x00000)  /* No interrupt selected */
 83 | 
 84 | /* Private macro -------------------------------------------------------------*/
 85 | /* Private variables ---------------------------------------------------------*/
 86 | /* Private function prototypes -----------------------------------------------*/
 87 | /* Private functions ---------------------------------------------------------*/
 88 | 
 89 | /** @defgroup EXTI_Private_Functions
 90 |   * @{
 91 |   */
 92 | 
 93 | /** @defgroup EXTI_Group1 Initialization and Configuration functions
 94 |  *  @brief   Initialization and Configuration functions 
 95 |  *
 96 | @verbatim   
 97 |  ===============================================================================
 98 |              ##### Initialization and Configuration functions #####
 99 |  ===============================================================================
100 | 
101 | @endverbatim
102 |   * @{
103 |   */
104 | 
105 | /**
106 |   * @brief  Deinitializes the EXTI peripheral registers to their default reset values.
107 |   * @param  None
108 |   * @retval None
109 |   */
110 | void EXTI_DeInit(void)
111 | {
112 |   EXTI->IMR = 0x00000000;
113 |   EXTI->EMR = 0x00000000;
114 |   EXTI->RTSR = 0x00000000;
115 |   EXTI->FTSR = 0x00000000;
116 |   EXTI->PR = 0x007FFFFF;
117 | }
118 | 
119 | /**
120 |   * @brief  Initializes the EXTI peripheral according to the specified
121 |   *         parameters in the EXTI_InitStruct.
122 |   * @param  EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
123 |   *         that contains the configuration information for the EXTI peripheral.
124 |   * @retval None
125 |   */
126 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
127 | {
128 |   uint32_t tmp = 0;
129 | 
130 |   /* Check the parameters */
131 |   assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
132 |   assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
133 |   assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));  
134 |   assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
135 | 
136 |   tmp = (uint32_t)EXTI_BASE;
137 |      
138 |   if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
139 |   {
140 |     /* Clear EXTI line configuration */
141 |     EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
142 |     EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
143 |     
144 |     tmp += EXTI_InitStruct->EXTI_Mode;
145 | 
146 |     *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
147 | 
148 |     /* Clear Rising Falling edge configuration */
149 |     EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
150 |     EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
151 |     
152 |     /* Select the trigger for the selected external interrupts */
153 |     if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
154 |     {
155 |       /* Rising Falling edge */
156 |       EXTI->RTSR |= EXTI_InitStruct->EXTI_Line;
157 |       EXTI->FTSR |= EXTI_InitStruct->EXTI_Line;
158 |     }
159 |     else
160 |     {
161 |       tmp = (uint32_t)EXTI_BASE;
162 |       tmp += EXTI_InitStruct->EXTI_Trigger;
163 | 
164 |       *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
165 |     }
166 |   }
167 |   else
168 |   {
169 |     tmp += EXTI_InitStruct->EXTI_Mode;
170 | 
171 |     /* Disable the selected external lines */
172 |     *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line;
173 |   }
174 | }
175 | 
176 | /**
177 |   * @brief  Fills each EXTI_InitStruct member with its reset value.
178 |   * @param  EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will
179 |   *         be initialized.
180 |   * @retval None
181 |   */
182 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
183 | {
184 |   EXTI_InitStruct->EXTI_Line = EXTI_LINENONE;
185 |   EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
186 |   EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
187 |   EXTI_InitStruct->EXTI_LineCmd = DISABLE;
188 | }
189 | 
190 | /**
191 |   * @brief  Generates a Software interrupt on selected EXTI line.
192 |   * @param  EXTI_Line: specifies the EXTI line on which the software interrupt
193 |   *         will be generated.
194 |   *         This parameter can be any combination of EXTI_Linex where x can be (0..22)
195 |   * @retval None
196 |   */
197 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
198 | {
199 |   /* Check the parameters */
200 |   assert_param(IS_EXTI_LINE(EXTI_Line));
201 |   
202 |   EXTI->SWIER |= EXTI_Line;
203 | }
204 | 
205 | /**
206 |   * @}
207 |   */
208 | 
209 | /** @defgroup EXTI_Group2 Interrupts and flags management functions
210 |  *  @brief   Interrupts and flags management functions 
211 |  *
212 | @verbatim   
213 |  ===============================================================================
214 |              ##### Interrupts and flags management functions #####
215 |  ===============================================================================
216 | 
217 | @endverbatim
218 |   * @{
219 |   */
220 | 
221 | /**
222 |   * @brief  Checks whether the specified EXTI line flag is set or not.
223 |   * @param  EXTI_Line: specifies the EXTI line flag to check.
224 |   *          This parameter can be EXTI_Linex where x can be(0..22)
225 |   * @retval The new state of EXTI_Line (SET or RESET).
226 |   */
227 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
228 | {
229 |   FlagStatus bitstatus = RESET;
230 |   /* Check the parameters */
231 |   assert_param(IS_GET_EXTI_LINE(EXTI_Line));
232 |   
233 |   if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
234 |   {
235 |     bitstatus = SET;
236 |   }
237 |   else
238 |   {
239 |     bitstatus = RESET;
240 |   }
241 |   return bitstatus;
242 | }
243 | 
244 | /**
245 |   * @brief  Clears the EXTI's line pending flags.
246 |   * @param  EXTI_Line: specifies the EXTI lines flags to clear.
247 |   *          This parameter can be any combination of EXTI_Linex where x can be (0..22)
248 |   * @retval None
249 |   */
250 | void EXTI_ClearFlag(uint32_t EXTI_Line)
251 | {
252 |   /* Check the parameters */
253 |   assert_param(IS_EXTI_LINE(EXTI_Line));
254 |   
255 |   EXTI->PR = EXTI_Line;
256 | }
257 | 
258 | /**
259 |   * @brief  Checks whether the specified EXTI line is asserted or not.
260 |   * @param  EXTI_Line: specifies the EXTI line to check.
261 |   *          This parameter can be EXTI_Linex where x can be(0..22)
262 |   * @retval The new state of EXTI_Line (SET or RESET).
263 |   */
264 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
265 | {
266 |   FlagStatus bitstatus = RESET;
267 |   /* Check the parameters */
268 |   assert_param(IS_GET_EXTI_LINE(EXTI_Line));
269 |   
270 |   if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
271 |   {
272 |     bitstatus = SET;
273 |   }
274 |   else
275 |   {
276 |     bitstatus = RESET;
277 |   }
278 |   return bitstatus;
279 |   
280 | }
281 | 
282 | /**
283 |   * @brief  Clears the EXTI's line pending bits.
284 |   * @param  EXTI_Line: specifies the EXTI lines to clear.
285 |   *          This parameter can be any combination of EXTI_Linex where x can be (0..22)
286 |   * @retval None
287 |   */
288 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
289 | {
290 |   /* Check the parameters */
291 |   assert_param(IS_EXTI_LINE(EXTI_Line));
292 |   
293 |   EXTI->PR = EXTI_Line;
294 | }
295 | 
296 | /**
297 |   * @}
298 |   */
299 | 
300 | /**
301 |   * @}
302 |   */
303 | 
304 | /**
305 |   * @}
306 |   */
307 | 
308 | /**
309 |   * @}
310 |   */
311 | 
312 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
313 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_syscfg.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_syscfg.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides firmware functions to manage the SYSCFG peripheral.
  8 |   *
  9 |  @verbatim
 10 |     
 11 |  ===============================================================================
 12 |                      ##### How to use this driver #####
 13 |  ===============================================================================
 14 |     [..] This driver provides functions for:
 15 |             
 16 |        (#) Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig()
 17 |             
 18 |        (#) Swapping the internal flash Bank1 and Bank2 this features is only visible for 
 19 |            STM32F42xxx/43xxx devices Devices. 
 20 |                 
 21 |        (#) Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig()
 22 |               
 23 |        (#) Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig()
 24 |   
 25 |        -@- SYSCFG APB clock must be enabled to get write access to SYSCFG registers,
 26 |            using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
 27 |                    
 28 |  @endverbatim      
 29 |   ******************************************************************************
 30 |   * @attention
 31 |   *
 32 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 33 |   *
 34 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 35 |   * You may not use this file except in compliance with the License.
 36 |   * You may obtain a copy of the License at:
 37 |   *
 38 |   *        http://www.st.com/software_license_agreement_liberty_v2
 39 |   *
 40 |   * Unless required by applicable law or agreed to in writing, software 
 41 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 42 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 43 |   * See the License for the specific language governing permissions and
 44 |   * limitations under the License.
 45 |   *
 46 |   ******************************************************************************
 47 |   */
 48 | 
 49 | /* Includes ------------------------------------------------------------------*/
 50 | #include "stm32f4xx_syscfg.h"
 51 | #include "stm32f4xx_rcc.h"
 52 | 
 53 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 54 |   * @{
 55 |   */
 56 | 
 57 | /** @defgroup SYSCFG 
 58 |   * @brief SYSCFG driver modules
 59 |   * @{
 60 |   */ 
 61 | 
 62 | /* Private typedef -----------------------------------------------------------*/
 63 | /* Private define ------------------------------------------------------------*/
 64 | /* ------------ RCC registers bit address in the alias region ----------- */
 65 | #define SYSCFG_OFFSET             (SYSCFG_BASE - PERIPH_BASE)
 66 | /* ---  MEMRMP Register ---*/ 
 67 | /* Alias word address of UFB_MODE bit */ 
 68 | #define MEMRMP_OFFSET             SYSCFG_OFFSET 
 69 | #define UFB_MODE_BitNumber        ((uint8_t)0x8) 
 70 | #define UFB_MODE_BB               (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (UFB_MODE_BitNumber * 4)) 
 71 |     
 72 | /* ---  PMC Register ---*/ 
 73 | /* Alias word address of MII_RMII_SEL bit */ 
 74 | #define PMC_OFFSET                (SYSCFG_OFFSET + 0x04) 
 75 | #define MII_RMII_SEL_BitNumber    ((uint8_t)0x17) 
 76 | #define PMC_MII_RMII_SEL_BB       (PERIPH_BB_BASE + (PMC_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4)) 
 77 |     
 78 | /* ---  CMPCR Register ---*/ 
 79 | /* Alias word address of CMP_PD bit */ 
 80 | #define CMPCR_OFFSET              (SYSCFG_OFFSET + 0x20) 
 81 | #define CMP_PD_BitNumber          ((uint8_t)0x00) 
 82 | #define CMPCR_CMP_PD_BB           (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BitNumber * 4)) 
 83 | 
 84 | /* Private macro -------------------------------------------------------------*/
 85 | /* Private variables ---------------------------------------------------------*/
 86 | /* Private function prototypes -----------------------------------------------*/
 87 | /* Private functions ---------------------------------------------------------*/
 88 | 
 89 | /** @defgroup SYSCFG_Private_Functions
 90 |   * @{
 91 |   */ 
 92 | 
 93 | /**
 94 |   * @brief  Deinitializes the Alternate Functions (remap and EXTI configuration)
 95 |   *   registers to their default reset values.
 96 |   * @param  None
 97 |   * @retval None
 98 |   */
 99 | void SYSCFG_DeInit(void)
100 | {
101 |    RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
102 |    RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
103 | }
104 | 
105 | /**
106 |   * @brief  Changes the mapping of the specified pin.
107 |   * @param  SYSCFG_Memory: selects the memory remapping.
108 |   *         This parameter can be one of the following values:
109 |   *            @arg SYSCFG_MemoryRemap_Flash:       Main Flash memory mapped at 0x00000000  
110 |   *            @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
111 |   *            @arg SYSCFG_MemoryRemap_FSMC:        FSMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 for STM32F405xx/407xx and STM32F415xx/417xx devices. 
112 |   *            @arg SYSCFG_MemoryRemap_FMC:         FMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 for STM32F42xxx/43xxx devices. 
113 |   *            @arg SYSCFG_MemoryRemap_ExtMEM:      External Memory mapped at 0x00000000 for STM32F446xx/STM32F469_479xx devices. 
114 |   *            @arg SYSCFG_MemoryRemap_SRAM:        Embedded SRAM (112kB) mapped at 0x00000000
115 |   *            @arg SYSCFG_MemoryRemap_SDRAM:       FMC (External SDRAM)  mapped at 0x00000000 for STM32F42xxx/43xxx devices.            
116 |   * @retval None
117 |   */
118 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
119 | {
120 |   /* Check the parameters */
121 |   assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
122 | 
123 |   SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
124 | }
125 | 
126 | /**
127 |   * @brief  Enables or disables the Internal FLASH Bank Swapping.
128 |   *   
129 |   * @note   This function can be used only for STM32F42xxx/43xxx devices. 
130 |   *
131 |   * @param  NewState: new state of Internal FLASH Bank swapping.
132 |   *          This parameter can be one of the following values:
133 |   *            @arg ENABLE: Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000) 
134 |   *                         and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)   
135 |   *            @arg DISABLE:(the default state) Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000) 
136 |                             and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)  
137 |   * @retval None
138 |   */
139 | void SYSCFG_MemorySwappingBank(FunctionalState NewState)
140 | {
141 |   /* Check the parameters */
142 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
143 | 
144 |   *(__IO uint32_t *) UFB_MODE_BB = (uint32_t)NewState;
145 | }
146 | 
147 | /**
148 |   * @brief  Selects the GPIO pin used as EXTI Line.
149 |   * @param  EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
150 |   *          EXTI lines where x can be (A..K) for STM32F42xxx/43xxx devices, (A..I) 
151 |   *          for STM32F405xx/407xx and STM32F415xx/417xx devices or (A, B, C, D and H)
152 |   *          for STM32401xx devices.  
153 |   *            
154 |   * @param  EXTI_PinSourcex: specifies the EXTI line to be configured.
155 |   *           This parameter can be EXTI_PinSourcex where x can be (0..15, except
156 |   *           for EXTI_PortSourceGPIOI x can be (0..11) for STM32F405xx/407xx
157 |   *           and STM32F405xx/407xx devices and for EXTI_PortSourceGPIOK x can   
158 |   *           be (0..7) for STM32F42xxx/43xxx devices. 
159 |   *             
160 |   * @retval None
161 |   */
162 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
163 | {
164 |   uint32_t tmp = 0x00;
165 | 
166 |   /* Check the parameters */
167 |   assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
168 |   assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
169 | 
170 |   tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
171 |   SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
172 |   SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
173 | }
174 | 
175 | /**
176 |   * @brief  Selects the ETHERNET media interface 
177 |   * @param  SYSCFG_ETH_MediaInterface: specifies the Media Interface mode. 
178 |   *          This parameter can be one of the following values: 
179 |   *            @arg SYSCFG_ETH_MediaInterface_MII: MII mode selected
180 |   *            @arg SYSCFG_ETH_MediaInterface_RMII: RMII mode selected 
181 |   * @retval None 
182 |   */
183 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface) 
184 | { 
185 |   assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE(SYSCFG_ETH_MediaInterface)); 
186 |   /* Configure MII_RMII selection bit */ 
187 |   *(__IO uint32_t *) PMC_MII_RMII_SEL_BB = SYSCFG_ETH_MediaInterface; 
188 | }
189 | 
190 | /**
191 |   * @brief  Enables or disables the I/O Compensation Cell.
192 |   * @note   The I/O compensation cell can be used only when the device supply
193 |   *         voltage ranges from 2.4 to 3.6 V.  
194 |   * @param  NewState: new state of the I/O Compensation Cell.
195 |   *          This parameter can be one of the following values:
196 |   *            @arg ENABLE: I/O compensation cell enabled  
197 |   *            @arg DISABLE: I/O compensation cell power-down mode  
198 |   * @retval None
199 |   */
200 | void SYSCFG_CompensationCellCmd(FunctionalState NewState)
201 | {
202 |   /* Check the parameters */
203 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
204 | 
205 |   *(__IO uint32_t *) CMPCR_CMP_PD_BB = (uint32_t)NewState;
206 | }
207 | 
208 | /**
209 |   * @brief  Checks whether the I/O Compensation Cell ready flag is set or not.
210 |   * @param  None
211 |   * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET)
212 |   */
213 | FlagStatus SYSCFG_GetCompensationCellStatus(void)
214 | {
215 |   FlagStatus bitstatus = RESET;
216 |     
217 |   if ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET)
218 |   {
219 |     bitstatus = SET;
220 |   }
221 |   else
222 |   {
223 |     bitstatus = RESET;
224 |   }
225 |   return bitstatus;
226 | }
227 | 
228 | #if defined(STM32F410xx)
229 | /**
230 |   * @brief  Connects the selected parameter to the break input of TIM1.
231 |   * @note   The selected configuration is locked and can be unlocked by system reset
232 |   * @param  SYSCFG_Break: selects the configuration to be connected to break
233 |   *         input of TIM1
234 |   *   This parameter can be any combination of the following values:
235 |   *     @arg SYSCFG_Break_PVD: PVD interrupt is connected to the break input of TIM1/8.
236 |   *     @arg SYSCFG_Break_HardFault: Lockup output of CortexM4 is connected to the break input of TIM1/8.
237 |   * @retval None
238 |   */
239 | void SYSCFG_BreakConfig(uint32_t SYSCFG_Break)
240 | {
241 |   /* Check the parameter */
242 |   assert_param(IS_SYSCFG_LOCK_CONFIG(SYSCFG_Break));
243 | 
244 |   SYSCFG->CFGR2 |= (uint32_t) SYSCFG_Break;
245 | }
246 | #endif /* STM32F410xx */
247 | /**
248 |   * @}
249 |   */
250 | 
251 | /**
252 |   * @}
253 |   */
254 | 
255 | /**
256 |   * @}
257 |   */
258 | 
259 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/   
260 | 


--------------------------------------------------------------------------------
/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_wwdg.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_wwdg.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides firmware functions to manage the following 
  8 |   *          functionalities of the Window watchdog (WWDG) peripheral:           
  9 |   *           + Prescaler, Refresh window and Counter configuration
 10 |   *           + WWDG activation
 11 |   *           + Interrupts and flags management
 12 |   *             
 13 |  @verbatim    
 14 |  ===============================================================================
 15 |                            ##### WWDG features #####
 16 |  ===============================================================================
 17 |     [..]                                      
 18 |         Once enabled the WWDG generates a system reset on expiry of a programmed
 19 |         time period, unless the program refreshes the counter (downcounter) 
 20 |         before to reach 0x3F value (i.e. a reset is generated when the counter
 21 |         value rolls over from 0x40 to 0x3F). 
 22 |         An MCU reset is also generated if the counter value is refreshed
 23 |         before the counter has reached the refresh window value. This 
 24 |         implies that the counter must be refreshed in a limited window.
 25 |               
 26 |         Once enabled the WWDG cannot be disabled except by a system reset.
 27 |           
 28 |         WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
 29 |         reset occurs.
 30 |              
 31 |         The WWDG counter input clock is derived from the APB clock divided 
 32 |         by a programmable prescaler.
 33 |                 
 34 |         WWDG counter clock = PCLK1 / Prescaler
 35 |         WWDG timeout = (WWDG counter clock) * (counter value)
 36 |                        
 37 |         Min-max timeout value @42 MHz(PCLK1): ~97.5 us / ~49.9 ms
 38 |                              
 39 |                       ##### How to use this driver #####
 40 |  ===============================================================================
 41 |     [..]
 42 |       (#) Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
 43 |               
 44 |       (#) Configure the WWDG prescaler using WWDG_SetPrescaler() function
 45 |                              
 46 |       (#) Configure the WWDG refresh window using WWDG_SetWindowValue() function
 47 |               
 48 |       (#) Set the WWDG counter value and start it using WWDG_Enable() function.
 49 |           When the WWDG is enabled the counter value should be configured to 
 50 |           a value greater than 0x40 to prevent generating an immediate reset.     
 51 |               
 52 |       (#) Optionally you can enable the Early wakeup interrupt which is 
 53 |           generated when the counter reach 0x40.
 54 |           Once enabled this interrupt cannot be disabled except by a system reset.
 55 |                   
 56 |       (#) Then the application program must refresh the WWDG counter at regular
 57 |           intervals during normal operation to prevent an MCU reset, using
 58 |           WWDG_SetCounter() function. This operation must occur only when
 59 |           the counter value is lower than the refresh window value, 
 60 |           programmed using WWDG_SetWindowValue().         
 61 |   
 62 |     @endverbatim
 63 |   ******************************************************************************
 64 |   * @attention
 65 |   *
 66 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 67 |   *
 68 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 69 |   * You may not use this file except in compliance with the License.
 70 |   * You may obtain a copy of the License at:
 71 |   *
 72 |   *        http://www.st.com/software_license_agreement_liberty_v2
 73 |   *
 74 |   * Unless required by applicable law or agreed to in writing, software 
 75 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 76 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 77 |   * See the License for the specific language governing permissions and
 78 |   * limitations under the License.
 79 |   *
 80 |   ******************************************************************************
 81 |   */
 82 | 
 83 | /* Includes ------------------------------------------------------------------*/
 84 | #include "stm32f4xx_wwdg.h"
 85 | #include "stm32f4xx_rcc.h"
 86 | 
 87 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 88 |   * @{
 89 |   */
 90 | 
 91 | /** @defgroup WWDG 
 92 |   * @brief WWDG driver modules
 93 |   * @{
 94 |   */
 95 | 
 96 | /* Private typedef -----------------------------------------------------------*/
 97 | /* Private define ------------------------------------------------------------*/
 98 | 
 99 | /* ----------- WWDG registers bit address in the alias region ----------- */
100 | #define WWDG_OFFSET       (WWDG_BASE - PERIPH_BASE)
101 | /* Alias word address of EWI bit */
102 | #define CFR_OFFSET        (WWDG_OFFSET + 0x04)
103 | #define EWI_BitNumber     0x09
104 | #define CFR_EWI_BB        (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
105 | 
106 | /* --------------------- WWDG registers bit mask ------------------------ */
107 | /* CFR register bit mask */
108 | #define CFR_WDGTB_MASK    ((uint32_t)0xFFFFFE7F)
109 | #define CFR_W_MASK        ((uint32_t)0xFFFFFF80)
110 | #define BIT_MASK          ((uint8_t)0x7F)
111 | 
112 | /* Private macro -------------------------------------------------------------*/
113 | /* Private variables ---------------------------------------------------------*/
114 | /* Private function prototypes -----------------------------------------------*/
115 | /* Private functions ---------------------------------------------------------*/
116 | 
117 | /** @defgroup WWDG_Private_Functions
118 |   * @{
119 |   */
120 | 
121 | /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
122 |  *  @brief   Prescaler, Refresh window and Counter configuration functions 
123 |  *
124 | @verbatim   
125 |  ===============================================================================
126 |     ##### Prescaler, Refresh window and Counter configuration functions #####
127 |  ===============================================================================  
128 | 
129 | @endverbatim
130 |   * @{
131 |   */
132 | 
133 | /**
134 |   * @brief  Deinitializes the WWDG peripheral registers to their default reset values.
135 |   * @param  None
136 |   * @retval None
137 |   */
138 | void WWDG_DeInit(void)
139 | {
140 |   RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
141 |   RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
142 | }
143 | 
144 | /**
145 |   * @brief  Sets the WWDG Prescaler.
146 |   * @param  WWDG_Prescaler: specifies the WWDG Prescaler.
147 |   *   This parameter can be one of the following values:
148 |   *     @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
149 |   *     @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
150 |   *     @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
151 |   *     @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
152 |   * @retval None
153 |   */
154 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
155 | {
156 |   uint32_t tmpreg = 0;
157 |   /* Check the parameters */
158 |   assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
159 |   /* Clear WDGTB[1:0] bits */
160 |   tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
161 |   /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
162 |   tmpreg |= WWDG_Prescaler;
163 |   /* Store the new value */
164 |   WWDG->CFR = tmpreg;
165 | }
166 | 
167 | /**
168 |   * @brief  Sets the WWDG window value.
169 |   * @param  WindowValue: specifies the window value to be compared to the downcounter.
170 |   *   This parameter value must be lower than 0x80.
171 |   * @retval None
172 |   */
173 | void WWDG_SetWindowValue(uint8_t WindowValue)
174 | {
175 |   __IO uint32_t tmpreg = 0;
176 | 
177 |   /* Check the parameters */
178 |   assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
179 |   /* Clear W[6:0] bits */
180 | 
181 |   tmpreg = WWDG->CFR & CFR_W_MASK;
182 | 
183 |   /* Set W[6:0] bits according to WindowValue value */
184 |   tmpreg |= WindowValue & (uint32_t) BIT_MASK;
185 | 
186 |   /* Store the new value */
187 |   WWDG->CFR = tmpreg;
188 | }
189 | 
190 | /**
191 |   * @brief  Enables the WWDG Early Wakeup interrupt(EWI).
192 |   * @note   Once enabled this interrupt cannot be disabled except by a system reset.
193 |   * @param  None
194 |   * @retval None
195 |   */
196 | void WWDG_EnableIT(void)
197 | {
198 |   *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
199 | }
200 | 
201 | /**
202 |   * @brief  Sets the WWDG counter value.
203 |   * @param  Counter: specifies the watchdog counter value.
204 |   *   This parameter must be a number between 0x40 and 0x7F (to prevent generating
205 |   *   an immediate reset) 
206 |   * @retval None
207 |   */
208 | void WWDG_SetCounter(uint8_t Counter)
209 | {
210 |   /* Check the parameters */
211 |   assert_param(IS_WWDG_COUNTER(Counter));
212 |   /* Write to T[6:0] bits to configure the counter value, no need to do
213 |      a read-modify-write; writing a 0 to WDGA bit does nothing */
214 |   WWDG->CR = Counter & BIT_MASK;
215 | }
216 | /**
217 |   * @}
218 |   */
219 | 
220 | /** @defgroup WWDG_Group2 WWDG activation functions
221 |  *  @brief   WWDG activation functions 
222 |  *
223 | @verbatim   
224 |  ===============================================================================
225 |                     ##### WWDG activation function #####
226 |  ===============================================================================  
227 | 
228 | @endverbatim
229 |   * @{
230 |   */
231 | 
232 | /**
233 |   * @brief  Enables WWDG and load the counter value.                  
234 |   * @param  Counter: specifies the watchdog counter value.
235 |   *   This parameter must be a number between 0x40 and 0x7F (to prevent generating
236 |   *   an immediate reset)
237 |   * @retval None
238 |   */
239 | void WWDG_Enable(uint8_t Counter)
240 | {
241 |   /* Check the parameters */
242 |   assert_param(IS_WWDG_COUNTER(Counter));
243 |   WWDG->CR = WWDG_CR_WDGA | Counter;
244 | }
245 | /**
246 |   * @}
247 |   */
248 | 
249 | /** @defgroup WWDG_Group3 Interrupts and flags management functions
250 |  *  @brief   Interrupts and flags management functions 
251 |  *
252 | @verbatim   
253 |  ===============================================================================
254 |             ##### Interrupts and flags management functions #####
255 |  ===============================================================================  
256 | 
257 | @endverbatim
258 |   * @{
259 |   */
260 | 
261 | /**
262 |   * @brief  Checks whether the Early Wakeup interrupt flag is set or not.
263 |   * @param  None
264 |   * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
265 |   */
266 | FlagStatus WWDG_GetFlagStatus(void)
267 | {
268 |   FlagStatus bitstatus = RESET;
269 |     
270 |   if ((WWDG->SR) != (uint32_t)RESET)
271 |   {
272 |     bitstatus = SET;
273 |   }
274 |   else
275 |   {
276 |     bitstatus = RESET;
277 |   }
278 |   return bitstatus;
279 | }
280 | 
281 | /**
282 |   * @brief  Clears Early Wakeup interrupt flag.
283 |   * @param  None
284 |   * @retval None
285 |   */
286 | void WWDG_ClearFlag(void)
287 | {
288 |   WWDG->SR = (uint32_t)RESET;
289 | }
290 | 
291 | /**
292 |   * @}
293 |   */
294 | 
295 | /**
296 |   * @}
297 |   */
298 | 
299 | /**
300 |   * @}
301 |   */
302 | 
303 | /**
304 |   * @}
305 |   */
306 | 
307 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
308 | 


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/stm32f4_canpong/inc/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_tdes.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_cryp_tdes.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.6.0
  6 |   * @date    10-July-2015
  7 |   * @brief   This file provides high level functions to encrypt and decrypt an 
  8 |   *          input message using TDES in ECB/CBC modes .
  9 |   *          It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP
 10 |   *          peripheral.
 11 |   *
 12 | @verbatim
 13 | 
 14 |  ===============================================================================
 15 |                            ##### How to use this driver #####
 16 |  ===============================================================================
 17 |  [..]
 18 |    (#) Enable The CRYP controller clock using 
 19 |        RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
 20 |   
 21 |    (#) Encrypt and decrypt using TDES in ECB Mode using CRYP_TDES_ECB() function.
 22 |   
 23 |    (#) Encrypt and decrypt using TDES in CBC Mode using CRYP_TDES_CBC() function.
 24 |   
 25 | @endverbatim
 26 |   *
 27 |   ******************************************************************************
 28 |   * @attention
 29 |   *
 30 |   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
 31 |   *
 32 |   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
 33 |   * You may not use this file except in compliance with the License.
 34 |   * You may obtain a copy of the License at:
 35 |   *
 36 |   *        http://www.st.com/software_license_agreement_liberty_v2
 37 |   *
 38 |   * Unless required by applicable law or agreed to in writing, software 
 39 |   * distributed under the License is distributed on an "AS IS" BASIS, 
 40 |   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 41 |   * See the License for the specific language governing permissions and
 42 |   * limitations under the License.
 43 |   *
 44 |   ******************************************************************************
 45 |   */ 
 46 | 
 47 | /* Includes ------------------------------------------------------------------*/
 48 | #include "stm32f4xx_cryp.h"
 49 | 
 50 | 
 51 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 52 |   * @{
 53 |   */
 54 | 
 55 | /** @defgroup CRYP 
 56 |   * @brief CRYP driver modules
 57 |   * @{
 58 |   */
 59 | 
 60 | /* Private typedef -----------------------------------------------------------*/
 61 | /* Private define ------------------------------------------------------------*/
 62 | #define TDESBUSY_TIMEOUT    ((uint32_t) 0x00010000)
 63 | 
 64 | /* Private macro -------------------------------------------------------------*/
 65 | /* Private variables ---------------------------------------------------------*/
 66 | /* Private function prototypes -----------------------------------------------*/
 67 | /* Private functions ---------------------------------------------------------*/
 68 | 
 69 | 
 70 | /** @defgroup CRYP_Private_Functions
 71 |   * @{
 72 |   */ 
 73 | 
 74 | /** @defgroup CRYP_Group7 High Level TDES functions
 75 |  *  @brief   High Level TDES functions 
 76 |  *
 77 | @verbatim   
 78 |  ===============================================================================
 79 |                       ##### High Level TDES functions #####
 80 |  ===============================================================================
 81 | 
 82 | @endverbatim
 83 |   * @{
 84 |   */
 85 | 
 86 | /**
 87 |   * @brief  Encrypt and decrypt using TDES in ECB Mode
 88 |   * @param  Mode: encryption or decryption Mode.
 89 |   *           This parameter can be one of the following values:
 90 |   *            @arg MODE_ENCRYPT: Encryption
 91 |   *            @arg MODE_DECRYPT: Decryption
 92 |   * @param  Key: Key used for TDES algorithm.
 93 |   * @param  Ilength: length of the Input buffer, must be a multiple of 8.
 94 |   * @param  Input: pointer to the Input buffer.
 95 |   * @param  Output: pointer to the returned buffer.
 96 |   * @retval An ErrorStatus enumeration value:
 97 |   *          - SUCCESS: Operation done
 98 |   *          - ERROR: Operation failed
 99 |   */
100 | ErrorStatus CRYP_TDES_ECB(uint8_t Mode, uint8_t Key[24], uint8_t *Input, 
101 |                           uint32_t Ilength, uint8_t *Output)
102 | {
103 |   CRYP_InitTypeDef TDES_CRYP_InitStructure;
104 |   CRYP_KeyInitTypeDef TDES_CRYP_KeyInitStructure;
105 |   __IO uint32_t counter = 0;
106 |   uint32_t busystatus = 0;
107 |   ErrorStatus status = SUCCESS;
108 |   uint32_t keyaddr    = (uint32_t)Key;
109 |   uint32_t inputaddr  = (uint32_t)Input;
110 |   uint32_t outputaddr = (uint32_t)Output;
111 |   uint32_t i = 0;
112 | 
113 |   /* Crypto structures initialisation*/
114 |   CRYP_KeyStructInit(&TDES_CRYP_KeyInitStructure);
115 | 
116 |   /* Crypto Init for Encryption process */
117 |   if(Mode == MODE_ENCRYPT) /* TDES encryption */
118 |   {
119 |      TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
120 |   }
121 |   else /*if(Mode == MODE_DECRYPT)*/ /* TDES decryption */
122 |   {
123 |      TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
124 |   }
125 | 
126 |   TDES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_TDES_ECB;
127 |   TDES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
128 |   CRYP_Init(&TDES_CRYP_InitStructure);
129 | 
130 |   /* Key Initialisation */
131 |   TDES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
132 |   keyaddr+=4;
133 |   TDES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
134 |   keyaddr+=4;
135 |   TDES_CRYP_KeyInitStructure.CRYP_Key2Left = __REV(*(uint32_t*)(keyaddr));
136 |   keyaddr+=4;
137 |   TDES_CRYP_KeyInitStructure.CRYP_Key2Right= __REV(*(uint32_t*)(keyaddr));
138 |   keyaddr+=4;
139 |   TDES_CRYP_KeyInitStructure.CRYP_Key3Left = __REV(*(uint32_t*)(keyaddr));
140 |   keyaddr+=4;
141 |   TDES_CRYP_KeyInitStructure.CRYP_Key3Right= __REV(*(uint32_t*)(keyaddr));
142 |   CRYP_KeyInit(& TDES_CRYP_KeyInitStructure);
143 | 
144 |   /* Flush IN/OUT FIFO */
145 |   CRYP_FIFOFlush();
146 | 
147 |   /* Enable Crypto processor */
148 |   CRYP_Cmd(ENABLE);
149 | 
150 |   if(CRYP_GetCmdStatus() == DISABLE)
151 |   {
152 |     /* The CRYP peripheral clock is not enabled or the device doesn't embed 
153 |        the CRYP peripheral (please check the device sales type. */
154 |     return(ERROR);
155 |   }
156 |   for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
157 |   {
158 |     /* Write the Input block in the Input FIFO */
159 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
160 |     inputaddr+=4;
161 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
162 |     inputaddr+=4;
163 | 
164 |     /* Wait until the complete message has been processed */
165 |     counter = 0;
166 |     do
167 |     {
168 |       busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
169 |       counter++;
170 |     }while ((counter != TDESBUSY_TIMEOUT) && (busystatus != RESET));
171 | 
172 |     if (busystatus != RESET)
173 |     {
174 |        status = ERROR;
175 |     }
176 |     else
177 |     {
178 | 
179 |       /* Read the Output block from the Output FIFO */
180 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
181 |       outputaddr+=4;
182 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
183 |       outputaddr+=4;
184 |     }
185 |   }
186 | 
187 |   /* Disable Crypto */
188 |   CRYP_Cmd(DISABLE);
189 | 
190 |   return status; 
191 | }
192 | 
193 | /**
194 |   * @brief  Encrypt and decrypt using TDES in CBC Mode
195 |   * @param  Mode: encryption or decryption Mode.
196 |   *           This parameter can be one of the following values:
197 |   *            @arg MODE_ENCRYPT: Encryption
198 |   *            @arg MODE_DECRYPT: Decryption
199 |   * @param  Key: Key used for TDES algorithm.
200 |   * @param  InitVectors: Initialisation Vectors used for TDES algorithm.
201 |   * @param  Input: pointer to the Input buffer.
202 |   * @param  Ilength: length of the Input buffer, must be a multiple of 8.
203 |   * @param  Output: pointer to the returned buffer.
204 |   * @retval An ErrorStatus enumeration value:
205 |   *          - SUCCESS: Operation done
206 |   *          - ERROR: Operation failed
207 |   */
208 | ErrorStatus CRYP_TDES_CBC(uint8_t Mode, uint8_t Key[24], uint8_t InitVectors[8],
209 |                           uint8_t *Input, uint32_t Ilength, uint8_t *Output)
210 | {
211 |   CRYP_InitTypeDef TDES_CRYP_InitStructure;
212 |   CRYP_KeyInitTypeDef TDES_CRYP_KeyInitStructure;
213 |   CRYP_IVInitTypeDef TDES_CRYP_IVInitStructure;
214 |   __IO uint32_t counter = 0;
215 |   uint32_t busystatus = 0;
216 |   ErrorStatus status = SUCCESS;
217 |   uint32_t keyaddr    = (uint32_t)Key;
218 |   uint32_t inputaddr  = (uint32_t)Input;
219 |   uint32_t outputaddr = (uint32_t)Output;
220 |   uint32_t ivaddr     = (uint32_t)InitVectors;
221 |   uint32_t i = 0;
222 | 
223 |   /* Crypto structures initialisation*/
224 |   CRYP_KeyStructInit(&TDES_CRYP_KeyInitStructure);
225 | 
226 |   /* Crypto Init for Encryption process */
227 |   if(Mode == MODE_ENCRYPT) /* TDES encryption */
228 |   {
229 |     TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
230 |   }
231 |   else
232 |   {
233 |     TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
234 |   }
235 |   TDES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_TDES_CBC;
236 |   TDES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
237 | 
238 |   CRYP_Init(&TDES_CRYP_InitStructure);
239 | 
240 |   /* Key Initialisation */
241 |   TDES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
242 |   keyaddr+=4;
243 |   TDES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
244 |   keyaddr+=4;
245 |   TDES_CRYP_KeyInitStructure.CRYP_Key2Left = __REV(*(uint32_t*)(keyaddr));
246 |   keyaddr+=4;
247 |   TDES_CRYP_KeyInitStructure.CRYP_Key2Right= __REV(*(uint32_t*)(keyaddr));
248 |   keyaddr+=4;
249 |   TDES_CRYP_KeyInitStructure.CRYP_Key3Left = __REV(*(uint32_t*)(keyaddr));
250 |   keyaddr+=4;
251 |   TDES_CRYP_KeyInitStructure.CRYP_Key3Right= __REV(*(uint32_t*)(keyaddr));
252 |   CRYP_KeyInit(& TDES_CRYP_KeyInitStructure);
253 | 
254 |   /* Initialization Vectors */
255 |   TDES_CRYP_IVInitStructure.CRYP_IV0Left = __REV(*(uint32_t*)(ivaddr));
256 |   ivaddr+=4;
257 |   TDES_CRYP_IVInitStructure.CRYP_IV0Right= __REV(*(uint32_t*)(ivaddr));
258 |   CRYP_IVInit(&TDES_CRYP_IVInitStructure);
259 | 
260 |   /* Flush IN/OUT FIFO */
261 |   CRYP_FIFOFlush();
262 | 
263 |   /* Enable Crypto processor */
264 |   CRYP_Cmd(ENABLE);
265 | 
266 |   if(CRYP_GetCmdStatus() == DISABLE)
267 |   {
268 |     /* The CRYP peripheral clock is not enabled or the device doesn't embed 
269 |        the CRYP peripheral (please check the device sales type. */
270 |     return(ERROR);
271 |   }
272 |   
273 |   for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
274 |   {
275 |     /* Write the Input block in the Input FIFO */
276 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
277 |     inputaddr+=4;
278 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
279 |     inputaddr+=4;
280 | 
281 |     /* Wait until the complete message has been processed */
282 |     counter = 0;
283 |     do
284 |     {
285 |       busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
286 |       counter++;
287 |     }while ((counter != TDESBUSY_TIMEOUT) && (busystatus != RESET));
288 | 
289 |     if (busystatus != RESET)
290 |    {
291 |        status = ERROR;
292 |     }
293 |     else
294 |     {
295 | 
296 |       /* Read the Output block from the Output FIFO */
297 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
298 |       outputaddr+=4;
299 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
300 |       outputaddr+=4;
301 |     }
302 |   }
303 | 
304 |   /* Disable Crypto */
305 |   CRYP_Cmd(DISABLE);
306 | 
307 |   return status; 
308 | }
309 | /**
310 |   * @}
311 |   */ 
312 | 
313 | /**
314 |   * @}
315 |   */ 
316 | 
317 | /**
318 |   * @}
319 |   */ 
320 | 
321 | /**
322 |   * @}
323 |   */ 
324 | 
325 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
326 | 


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