├── Docs ├── Bootloader Commands.pdf └── Course_PPT.pptx ├── LICENSE ├── README.md └── SourceCode ├── BOOTLOADER └── KEIL │ └── Nucleo-F446RE │ └── bootloader_STM32F446xx │ ├── .mxproject │ ├── Drivers │ ├── CMSIS │ │ ├── Device │ │ │ └── ST │ │ │ │ └── STM32F4xx │ │ │ │ └── Include │ │ │ │ ├── stm32f446xx.h │ │ │ │ ├── stm32f4xx.h │ │ │ │ └── system_stm32f4xx.h │ │ └── Include │ │ │ ├── arm_common_tables.h │ │ │ ├── arm_const_structs.h │ │ │ ├── arm_math.h │ │ │ ├── cmsis_armcc.h │ │ │ ├── cmsis_armcc_V6.h │ │ │ ├── cmsis_gcc.h │ │ │ ├── core_cm0.h │ │ │ ├── core_cm0plus.h │ │ │ ├── core_cm3.h │ │ │ ├── core_cm4.h │ │ │ ├── core_cm7.h │ │ │ ├── core_cmFunc.h │ │ │ ├── core_cmInstr.h │ │ │ ├── core_cmSimd.h │ │ │ ├── core_sc000.h │ │ │ └── core_sc300.h │ └── STM32F4xx_HAL_Driver │ │ ├── Inc │ │ ├── Legacy │ │ │ └── stm32_hal_legacy.h │ │ ├── stm32f4xx_hal.h │ │ ├── stm32f4xx_hal_cortex.h │ │ ├── stm32f4xx_hal_crc.h │ │ ├── stm32f4xx_hal_def.h │ │ ├── stm32f4xx_hal_dma.h │ │ ├── stm32f4xx_hal_dma_ex.h │ │ ├── stm32f4xx_hal_flash.h │ │ ├── stm32f4xx_hal_flash_ex.h │ │ ├── stm32f4xx_hal_flash_ramfunc.h │ │ ├── stm32f4xx_hal_gpio.h │ │ ├── stm32f4xx_hal_gpio_ex.h │ │ ├── stm32f4xx_hal_pwr.h │ │ ├── stm32f4xx_hal_pwr_ex.h │ │ ├── stm32f4xx_hal_rcc.h │ │ ├── stm32f4xx_hal_rcc_ex.h │ │ ├── stm32f4xx_hal_tim.h │ │ ├── stm32f4xx_hal_tim_ex.h │ │ └── stm32f4xx_hal_uart.h │ │ └── Src │ │ ├── stm32f4xx_hal.c │ │ ├── stm32f4xx_hal_cortex.c │ │ ├── stm32f4xx_hal_crc.c │ │ ├── stm32f4xx_hal_dma.c │ │ ├── stm32f4xx_hal_dma_ex.c │ │ ├── stm32f4xx_hal_flash.c │ │ ├── stm32f4xx_hal_flash_ex.c │ │ ├── stm32f4xx_hal_flash_ramfunc.c │ │ ├── stm32f4xx_hal_gpio.c │ │ ├── stm32f4xx_hal_pwr.c │ │ ├── stm32f4xx_hal_pwr_ex.c │ │ ├── stm32f4xx_hal_rcc.c │ │ ├── stm32f4xx_hal_rcc_ex.c │ │ ├── stm32f4xx_hal_tim.c │ │ ├── stm32f4xx_hal_tim_ex.c │ │ └── stm32f4xx_hal_uart.c │ ├── Inc │ ├── main.h │ ├── stm32f4xx_hal_conf.h │ └── stm32f4xx_it.h │ ├── MDK-ARM │ ├── DebugConfig │ │ └── bootloader_STM32F446xx_STM32F446RETx.dbgconf │ ├── EventRecorderStub.scvd │ ├── RTE │ │ └── _bootloader_STM32F446xx │ │ │ └── RTE_Components.h │ ├── bootloader_STM32F446xx.uvguix.kiran │ ├── bootloader_STM32F446xx.uvoptx │ ├── bootloader_STM32F446xx.uvprojx │ ├── bootloader_STM32F446xx │ │ ├── ExtDll.iex │ │ ├── bootloader_STM32F446xx.map │ │ ├── bootloader_STM32F446xx.sct │ │ ├── main.crf │ │ ├── stm32f4xx_hal.crf │ │ ├── stm32f4xx_hal_cortex.crf │ │ ├── stm32f4xx_hal_crc.crf │ │ ├── stm32f4xx_hal_dma.crf │ │ ├── stm32f4xx_hal_dma_ex.crf │ │ ├── stm32f4xx_hal_flash.crf │ │ ├── stm32f4xx_hal_flash_ex.crf │ │ ├── stm32f4xx_hal_flash_ramfunc.crf │ │ ├── stm32f4xx_hal_gpio.crf │ │ ├── stm32f4xx_hal_msp.crf │ │ ├── stm32f4xx_hal_pwr.crf │ │ ├── stm32f4xx_hal_pwr_ex.crf │ │ ├── stm32f4xx_hal_rcc.crf │ │ ├── stm32f4xx_hal_rcc_ex.crf │ │ ├── stm32f4xx_hal_tim.crf │ │ ├── stm32f4xx_hal_tim_ex.crf │ │ ├── stm32f4xx_hal_uart.crf │ │ ├── stm32f4xx_it.crf │ │ └── system_stm32f4xx.crf │ └── startup_stm32f446xx.s │ ├── Src │ ├── main.c │ ├── stm32f4xx_hal_msp.c │ ├── stm32f4xx_it.c │ └── system_stm32f4xx.c │ └── bootloader_STM32F446xx.ioc ├── HOST ├── C │ └── STM32_Programmer_V1 │ │ ├── Headers │ │ ├── LinuxSerialPort.h │ │ ├── OSxSerialPort.h │ │ ├── WindowsSerialPort.h │ │ └── main.h │ │ ├── STM32_Programmer_V1.cbp │ │ ├── STM32_Programmer_V1.cscope_file_list │ │ ├── STM32_Programmer_V1.depend │ │ ├── STM32_Programmer_V1.layout │ │ ├── Sources │ │ ├── BlCommands.c │ │ ├── BlReplyProcessing.c │ │ ├── LinuxSerialPort.c │ │ ├── OSxSerialPort.c │ │ ├── WindowsSerialPort.c │ │ ├── fileops.c │ │ ├── main.c │ │ └── utilities.c │ │ ├── bin │ │ └── Debug │ │ │ └── STM32_Programmer_V1.exe │ │ ├── obj │ │ └── Debug │ │ │ ├── BlCommands.o │ │ │ ├── BlReplyProcessing.o │ │ │ ├── LinuxSerialPort.o │ │ │ ├── OSxSerialPort.o │ │ │ ├── WindowsSerialPort.o │ │ │ ├── fileops.o │ │ │ ├── main.o │ │ │ └── utilities.o │ │ └── user_app.bin └── python │ ├── STM32_Programmer_V1.py │ └── user_app.bin └── User_app_stm32f446x └── Src ├── main.c ├── stm32f4xx_hal_msp.c ├── stm32f4xx_it.c └── system_stm32f4xx.c /Docs/Bootloader Commands.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/niekiran/BootloaderProjectSTM32/20f63047037437f5d5a61407ff7d338a141994d6/Docs/Bootloader Commands.pdf -------------------------------------------------------------------------------- /Docs/Course_PPT.pptx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/niekiran/BootloaderProjectSTM32/20f63047037437f5d5a61407ff7d338a141994d6/Docs/Course_PPT.pptx -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # BootloaderProjectSTM32 2 | This is the repo for BootLoader Development for STM32 Udemy online course 3 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/.mxproject: -------------------------------------------------------------------------------- 1 | [PreviousGenFiles] 2 | HeaderPath=E:/Workspace/KeilWorkspace/Nucleo-F446RE/bootloader_STM32F446xx/Inc 3 | HeaderFiles=stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h; 4 | SourcePath=E:/Workspace/KeilWorkspace/Nucleo-F446RE/bootloader_STM32F446xx/Src 5 | SourceFiles=stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h;stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c; 6 | 7 | [PreviousLibFiles] 8 | LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f446xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; 9 | 10 | [PreviousUsedKeilFiles] 11 | SourceFiles=../Src/main.c;../Src/stm32f4xx_it.c;../Src/stm32f4xx_hal_msp.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/arm/startup_stm32f446xx.s; 12 | HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include; 13 | 14 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/niekiran/BootloaderProjectSTM32/20f63047037437f5d5a61407ff7d338a141994d6/SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f4xx.h 4 | * @author MCD Application Team 5 | * @version V2.6.1 6 | * @date 14-February-2017 7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2017 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /** @addtogroup CMSIS 39 | * @{ 40 | */ 41 | 42 | /** @addtogroup stm32f4xx_system 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @brief Define to prevent recursive inclusion 48 | */ 49 | #ifndef __SYSTEM_STM32F4XX_H 50 | #define __SYSTEM_STM32F4XX_H 51 | 52 | #ifdef __cplusplus 53 | extern "C" { 54 | #endif 55 | 56 | /** @addtogroup STM32F4xx_System_Includes 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | 65 | /** @addtogroup STM32F4xx_System_Exported_types 66 | * @{ 67 | */ 68 | /* This variable is updated in three ways: 69 | 1) by calling CMSIS function SystemCoreClockUpdate() 70 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 71 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 72 | Note: If you use this function to configure the system clock; then there 73 | is no need to call the 2 first functions listed above, since SystemCoreClock 74 | variable is updated automatically. 75 | */ 76 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 77 | 78 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 79 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** @addtogroup STM32F4xx_System_Exported_Constants 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @addtogroup STM32F4xx_System_Exported_Macros 94 | * @{ 95 | */ 96 | 97 | /** 98 | * @} 99 | */ 100 | 101 | /** @addtogroup STM32F4xx_System_Exported_Functions 102 | * @{ 103 | */ 104 | 105 | extern void SystemInit(void); 106 | extern void SystemCoreClockUpdate(void); 107 | /** 108 | * @} 109 | */ 110 | 111 | #ifdef __cplusplus 112 | } 113 | #endif 114 | 115 | #endif /*__SYSTEM_STM32F4XX_H */ 116 | 117 | /** 118 | * @} 119 | */ 120 | 121 | /** 122 | * @} 123 | */ 124 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 125 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/CMSIS/Include/arm_common_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. October 2015 5 | * $Revision: V.1.4.5 a 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_common_tables.h 9 | * 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 11 | * 12 | * Target Processor: Cortex-M4/Cortex-M3 13 | * 14 | * Redistribution and use in source and binary forms, with or without 15 | * modification, are permitted provided that the following conditions 16 | * are met: 17 | * - Redistributions of source code must retain the above copyright 18 | * notice, this list of conditions and the following disclaimer. 19 | * - Redistributions in binary form must reproduce the above copyright 20 | * notice, this list of conditions and the following disclaimer in 21 | * the documentation and/or other materials provided with the 22 | * distribution. 23 | * - Neither the name of ARM LIMITED nor the names of its contributors 24 | * may be used to endorse or promote products derived from this 25 | * software without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * -------------------------------------------------------------------- */ 40 | 41 | #ifndef _ARM_COMMON_TABLES_H 42 | #define _ARM_COMMON_TABLES_H 43 | 44 | #include "arm_math.h" 45 | 46 | extern const uint16_t armBitRevTable[1024]; 47 | extern const q15_t armRecipTableQ15[64]; 48 | extern const q31_t armRecipTableQ31[64]; 49 | /* extern const q31_t realCoefAQ31[1024]; */ 50 | /* extern const q31_t realCoefBQ31[1024]; */ 51 | extern const float32_t twiddleCoef_16[32]; 52 | extern const float32_t twiddleCoef_32[64]; 53 | extern const float32_t twiddleCoef_64[128]; 54 | extern const float32_t twiddleCoef_128[256]; 55 | extern const float32_t twiddleCoef_256[512]; 56 | extern const float32_t twiddleCoef_512[1024]; 57 | extern const float32_t twiddleCoef_1024[2048]; 58 | extern const float32_t twiddleCoef_2048[4096]; 59 | extern const float32_t twiddleCoef_4096[8192]; 60 | #define twiddleCoef twiddleCoef_4096 61 | extern const q31_t twiddleCoef_16_q31[24]; 62 | extern const q31_t twiddleCoef_32_q31[48]; 63 | extern const q31_t twiddleCoef_64_q31[96]; 64 | extern const q31_t twiddleCoef_128_q31[192]; 65 | extern const q31_t twiddleCoef_256_q31[384]; 66 | extern const q31_t twiddleCoef_512_q31[768]; 67 | extern const q31_t twiddleCoef_1024_q31[1536]; 68 | extern const q31_t twiddleCoef_2048_q31[3072]; 69 | extern const q31_t twiddleCoef_4096_q31[6144]; 70 | extern const q15_t twiddleCoef_16_q15[24]; 71 | extern const q15_t twiddleCoef_32_q15[48]; 72 | extern const q15_t twiddleCoef_64_q15[96]; 73 | extern const q15_t twiddleCoef_128_q15[192]; 74 | extern const q15_t twiddleCoef_256_q15[384]; 75 | extern const q15_t twiddleCoef_512_q15[768]; 76 | extern const q15_t twiddleCoef_1024_q15[1536]; 77 | extern const q15_t twiddleCoef_2048_q15[3072]; 78 | extern const q15_t twiddleCoef_4096_q15[6144]; 79 | extern const float32_t twiddleCoef_rfft_32[32]; 80 | extern const float32_t twiddleCoef_rfft_64[64]; 81 | extern const float32_t twiddleCoef_rfft_128[128]; 82 | extern const float32_t twiddleCoef_rfft_256[256]; 83 | extern const float32_t twiddleCoef_rfft_512[512]; 84 | extern const float32_t twiddleCoef_rfft_1024[1024]; 85 | extern const float32_t twiddleCoef_rfft_2048[2048]; 86 | extern const float32_t twiddleCoef_rfft_4096[4096]; 87 | 88 | 89 | /* floating-point bit reversal tables */ 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) 99 | 100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; 101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; 102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; 103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; 104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; 105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; 106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; 107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; 108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; 109 | 110 | /* fixed-point bit reversal tables */ 111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) 112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) 113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) 114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) 115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) 116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) 117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) 118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) 119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) 120 | 121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; 122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; 123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; 124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; 125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; 126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; 127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; 128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; 129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; 130 | 131 | /* Tables for Fast Math Sine and Cosine */ 132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; 133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; 134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; 135 | 136 | #endif /* ARM_COMMON_TABLES_H */ 137 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/CMSIS/Include/arm_const_structs.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. March 2015 5 | * $Revision: V.1.4.5 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_const_structs.h 9 | * 10 | * Description: This file has constant structs that are initialized for 11 | * user convenience. For example, some can be given as 12 | * arguments to the arm_cfft_f32() function. 13 | * 14 | * Target Processor: Cortex-M4/Cortex-M3 15 | * 16 | * Redistribution and use in source and binary forms, with or without 17 | * modification, are permitted provided that the following conditions 18 | * are met: 19 | * - Redistributions of source code must retain the above copyright 20 | * notice, this list of conditions and the following disclaimer. 21 | * - Redistributions in binary form must reproduce the above copyright 22 | * notice, this list of conditions and the following disclaimer in 23 | * the documentation and/or other materials provided with the 24 | * distribution. 25 | * - Neither the name of ARM LIMITED nor the names of its contributors 26 | * may be used to endorse or promote products derived from this 27 | * software without specific prior written permission. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 | * POSSIBILITY OF SUCH DAMAGE. 41 | * -------------------------------------------------------------------- */ 42 | 43 | #ifndef _ARM_CONST_STRUCTS_H 44 | #define _ARM_CONST_STRUCTS_H 45 | 46 | #include "arm_math.h" 47 | #include "arm_common_tables.h" 48 | 49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; 50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; 51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; 52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; 53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; 54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; 55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; 56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; 57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; 58 | 59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; 60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; 61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; 62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; 63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; 64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; 65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; 66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; 67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; 68 | 69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; 70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; 71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; 72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; 73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; 74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; 75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; 76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; 77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; 78 | 79 | #endif 80 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/CMSIS/Include/core_cmFunc.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmFunc.h 3 | * @brief CMSIS Cortex-M Core Function Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMFUNC_H 42 | #define __CORE_CMFUNC_H 43 | 44 | 45 | /* ########################### Core Function Access ########################### */ 46 | /** \ingroup CMSIS_Core_FunctionInterface 47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@} end of CMSIS_Core_RegAccFunctions */ 86 | 87 | #endif /* __CORE_CMFUNC_H */ 88 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/CMSIS/Include/core_cmInstr.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmInstr.h 3 | * @brief CMSIS Cortex-M Core Instruction Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMINSTR_H 42 | #define __CORE_CMINSTR_H 43 | 44 | 45 | /* ########################## Core Instruction Access ######################### */ 46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 47 | Access to dedicated instructions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 86 | 87 | #endif /* __CORE_CMINSTR_H */ 88 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/CMSIS/Include/core_cmSimd.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmSimd.h 3 | * @brief CMSIS Cortex-M SIMD Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMSIMD_H 42 | #define __CORE_CMSIMD_H 43 | 44 | #ifdef __cplusplus 45 | extern "C" { 46 | #endif 47 | 48 | 49 | /* ################### Compiler specific Intrinsics ########################### */ 50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics 51 | Access to dedicated SIMD instructions 52 | @{ 53 | */ 54 | 55 | /*------------------ RealView Compiler -----------------*/ 56 | #if defined ( __CC_ARM ) 57 | #include "cmsis_armcc.h" 58 | 59 | /*------------------ ARM Compiler V6 -------------------*/ 60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 61 | #include "cmsis_armcc_V6.h" 62 | 63 | /*------------------ GNU Compiler ----------------------*/ 64 | #elif defined ( __GNUC__ ) 65 | #include "cmsis_gcc.h" 66 | 67 | /*------------------ ICC Compiler ----------------------*/ 68 | #elif defined ( __ICCARM__ ) 69 | #include 70 | 71 | /*------------------ TI CCS Compiler -------------------*/ 72 | #elif defined ( __TMS470__ ) 73 | #include 74 | 75 | /*------------------ TASKING Compiler ------------------*/ 76 | #elif defined ( __TASKING__ ) 77 | /* 78 | * The CMSIS functions have been implemented as intrinsics in the compiler. 79 | * Please use "carm -?i" to get an up to date list of all intrinsics, 80 | * Including the CMSIS ones. 81 | */ 82 | 83 | /*------------------ COSMIC Compiler -------------------*/ 84 | #elif defined ( __CSMC__ ) 85 | #include 86 | 87 | #endif 88 | 89 | /*@} end of group CMSIS_SIMD_intrinsics */ 90 | 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /* __CORE_CMSIMD_H */ 97 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal.h 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 14-April-2017 7 | * @brief This file contains all the functions prototypes for the HAL 8 | * module driver. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT(c) 2017 STMicroelectronics

13 | * 14 | * Redistribution and use in source and binary forms, with or without modification, 15 | * are permitted provided that the following conditions are met: 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 22 | * may be used to endorse or promote products derived from this software 23 | * without specific prior written permission. 24 | * 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 | * 36 | ****************************************************************************** 37 | */ 38 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ 40 | #ifndef __STM32F4xx_HAL_H 41 | #define __STM32F4xx_HAL_H 42 | 43 | #ifdef __cplusplus 44 | extern "C" { 45 | #endif 46 | 47 | /* Includes ------------------------------------------------------------------*/ 48 | #include "stm32f4xx_hal_conf.h" 49 | 50 | /** @addtogroup STM32F4xx_HAL_Driver 51 | * @{ 52 | */ 53 | 54 | /** @addtogroup HAL 55 | * @{ 56 | */ 57 | 58 | /* Exported types ------------------------------------------------------------*/ 59 | /* Exported constants --------------------------------------------------------*/ 60 | 61 | /* Exported macro ------------------------------------------------------------*/ 62 | /** @defgroup HAL_Exported_Macros HAL Exported Macros 63 | * @{ 64 | */ 65 | 66 | /** @brief Freeze/Unfreeze Peripherals in Debug mode 67 | */ 68 | #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP)) 69 | #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP)) 70 | #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP)) 71 | #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP)) 72 | #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP)) 73 | #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP)) 74 | #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP)) 75 | #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP)) 76 | #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP)) 77 | #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP)) 78 | #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP)) 79 | #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP)) 80 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) 81 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) 82 | #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) 83 | #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP)) 84 | #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP)) 85 | #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP)) 86 | #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP)) 87 | #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP)) 88 | #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP)) 89 | #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP)) 90 | 91 | #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP)) 92 | #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP)) 93 | #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP)) 94 | #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP)) 95 | #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP)) 96 | #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP)) 97 | #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP)) 98 | #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP)) 99 | #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP)) 100 | #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP)) 101 | #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP)) 102 | #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP)) 103 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) 104 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) 105 | #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) 106 | #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP)) 107 | #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP)) 108 | #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP)) 109 | #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP)) 110 | #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP)) 111 | #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP)) 112 | #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP)) 113 | 114 | /** @brief Main Flash memory mapped at 0x00000000 115 | */ 116 | #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE)) 117 | 118 | /** @brief System Flash memory mapped at 0x00000000 119 | */ 120 | #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 121 | SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\ 122 | }while(0); 123 | 124 | /** @brief Embedded SRAM mapped at 0x00000000 125 | */ 126 | #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 127 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\ 128 | }while(0); 129 | 130 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) 131 | /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 132 | */ 133 | #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 134 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ 135 | }while(0); 136 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ 137 | 138 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 139 | defined(STM32F469xx) || defined(STM32F479xx) 140 | /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 141 | */ 142 | #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 143 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ 144 | }while(0); 145 | 146 | /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000 147 | */ 148 | #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 149 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\ 150 | }while(0); 151 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 152 | 153 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx) 154 | /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable 155 | * @{ 156 | */ 157 | /** @brief SYSCFG Break Lockup lock 158 | * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input 159 | * @note The selected configuration is locked and can be unlocked by system reset 160 | */ 161 | #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \ 162 | SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \ 163 | }while(0) 164 | /** 165 | * @} 166 | */ 167 | 168 | /** @defgroup PVD_Lock_Enable PVD Lock 169 | * @{ 170 | */ 171 | /** @brief SYSCFG Break PVD lock 172 | * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register 173 | * @note The selected configuration is locked and can be unlocked by system reset 174 | */ 175 | #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \ 176 | SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \ 177 | }while(0) 178 | /** 179 | * @} 180 | */ 181 | #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */ 182 | /** 183 | * @} 184 | */ 185 | 186 | /* Exported functions --------------------------------------------------------*/ 187 | /** @addtogroup HAL_Exported_Functions 188 | * @{ 189 | */ 190 | /** @addtogroup HAL_Exported_Functions_Group1 191 | * @{ 192 | */ 193 | /* Initialization and de-initialization functions ******************************/ 194 | HAL_StatusTypeDef HAL_Init(void); 195 | HAL_StatusTypeDef HAL_DeInit(void); 196 | void HAL_MspInit(void); 197 | void HAL_MspDeInit(void); 198 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); 199 | /** 200 | * @} 201 | */ 202 | 203 | /** @addtogroup HAL_Exported_Functions_Group2 204 | * @{ 205 | */ 206 | /* Peripheral Control functions ************************************************/ 207 | void HAL_IncTick(void); 208 | void HAL_Delay(__IO uint32_t Delay); 209 | uint32_t HAL_GetTick(void); 210 | void HAL_SuspendTick(void); 211 | void HAL_ResumeTick(void); 212 | uint32_t HAL_GetHalVersion(void); 213 | uint32_t HAL_GetREVID(void); 214 | uint32_t HAL_GetDEVID(void); 215 | void HAL_DBGMCU_EnableDBGSleepMode(void); 216 | void HAL_DBGMCU_DisableDBGSleepMode(void); 217 | void HAL_DBGMCU_EnableDBGStopMode(void); 218 | void HAL_DBGMCU_DisableDBGStopMode(void); 219 | void HAL_DBGMCU_EnableDBGStandbyMode(void); 220 | void HAL_DBGMCU_DisableDBGStandbyMode(void); 221 | void HAL_EnableCompensationCell(void); 222 | void HAL_DisableCompensationCell(void); 223 | void HAL_GetUID(uint32_t *UID); 224 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 225 | defined(STM32F469xx) || defined(STM32F479xx) 226 | void HAL_EnableMemorySwappingBank(void); 227 | void HAL_DisableMemorySwappingBank(void); 228 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 229 | /** 230 | * @} 231 | */ 232 | 233 | /** 234 | * @} 235 | */ 236 | /* Private types -------------------------------------------------------------*/ 237 | /* Private variables ---------------------------------------------------------*/ 238 | /** @defgroup HAL_Private_Variables HAL Private Variables 239 | * @{ 240 | */ 241 | /** 242 | * @} 243 | */ 244 | /* Private constants ---------------------------------------------------------*/ 245 | /** @defgroup HAL_Private_Constants HAL Private Constants 246 | * @{ 247 | */ 248 | /** 249 | * @} 250 | */ 251 | /* Private macros ------------------------------------------------------------*/ 252 | /* Private functions ---------------------------------------------------------*/ 253 | /** 254 | * @} 255 | */ 256 | 257 | /** 258 | * @} 259 | */ 260 | 261 | #ifdef __cplusplus 262 | } 263 | #endif 264 | 265 | #endif /* __STM32F4xx_HAL_H */ 266 | 267 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 268 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_crc.h 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 14-April-2017 7 | * @brief Header file of CRC HAL module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2017 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F4xx_HAL_CRC_H 40 | #define __STM32F4xx_HAL_CRC_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hal_def.h" 48 | 49 | /** @addtogroup STM32F4xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @defgroup CRC CRC 54 | * @brief CRC HAL module driver 55 | * @{ 56 | */ 57 | 58 | /* Exported types ------------------------------------------------------------*/ 59 | /** @defgroup CRC_Exported_Types CRC Exported Types 60 | * @{ 61 | */ 62 | 63 | /** @defgroup CRC_Exported_Types_Group1 CRC State Structure definition 64 | * @{ 65 | */ 66 | typedef enum 67 | { 68 | HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */ 69 | HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */ 70 | HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */ 71 | HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */ 72 | HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */ 73 | 74 | }HAL_CRC_StateTypeDef; 75 | /** 76 | * @} 77 | */ 78 | 79 | /** @defgroup CRC_Exported_Types_Group2 CRC Handle Structure definition 80 | * @{ 81 | */ 82 | typedef struct 83 | { 84 | CRC_TypeDef *Instance; /*!< Register base address */ 85 | 86 | HAL_LockTypeDef Lock; /*!< CRC locking object */ 87 | 88 | __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ 89 | 90 | }CRC_HandleTypeDef; 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /* Exported constants --------------------------------------------------------*/ 100 | /* Exported macro ------------------------------------------------------------*/ 101 | /** @defgroup CRC_Exported_Macros CRC Exported Macros 102 | * @{ 103 | */ 104 | 105 | /** @brief Resets CRC handle state 106 | * @param __HANDLE__: CRC handle 107 | * @retval None 108 | */ 109 | #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET) 110 | 111 | /** 112 | * @brief Resets CRC Data Register. 113 | * @param __HANDLE__: CRC handle 114 | * @retval None 115 | */ 116 | #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET) 117 | 118 | /** 119 | * @brief Stores a 8-bit data in the Independent Data(ID) register. 120 | * @param __HANDLE__: CRC handle 121 | * @param __VALUE__: 8-bit value to be stored in the ID register 122 | * @retval None 123 | */ 124 | #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) 125 | 126 | /** 127 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register. 128 | * @param __HANDLE__: CRC handle 129 | * @retval 8-bit value of the ID register 130 | */ 131 | #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) 132 | /** 133 | * @} 134 | */ 135 | 136 | /* Exported functions --------------------------------------------------------*/ 137 | /** @defgroup CRC_Exported_Functions CRC Exported Functions 138 | * @{ 139 | */ 140 | 141 | /** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions 142 | * @{ 143 | */ 144 | HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); 145 | HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc); 146 | void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); 147 | void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); 148 | /** 149 | * @} 150 | */ 151 | 152 | /** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions 153 | * @{ 154 | */ 155 | uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 156 | uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 157 | /** 158 | * @} 159 | */ 160 | 161 | /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions 162 | * @{ 163 | */ 164 | HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); 165 | /** 166 | * @} 167 | */ 168 | 169 | /** 170 | * @} 171 | */ 172 | /* Private types -------------------------------------------------------------*/ 173 | /** @defgroup CRC_Private_Types CRC Private Types 174 | * @{ 175 | */ 176 | 177 | /** 178 | * @} 179 | */ 180 | 181 | /* Private defines -----------------------------------------------------------*/ 182 | /** @defgroup CRC_Private_Defines CRC Private Defines 183 | * @{ 184 | */ 185 | 186 | /** 187 | * @} 188 | */ 189 | 190 | /* Private variables ---------------------------------------------------------*/ 191 | /** @defgroup CRC_Private_Variables CRC Private Variables 192 | * @{ 193 | */ 194 | 195 | /** 196 | * @} 197 | */ 198 | 199 | /* Private constants ---------------------------------------------------------*/ 200 | /** @defgroup CRC_Private_Constants CRC Private Constants 201 | * @{ 202 | */ 203 | 204 | /** 205 | * @} 206 | */ 207 | 208 | /* Private macros ------------------------------------------------------------*/ 209 | /** @defgroup CRC_Private_Macros CRC Private Macros 210 | * @{ 211 | */ 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | /* Private functions prototypes ----------------------------------------------*/ 218 | /** @defgroup CRC_Private_Functions_Prototypes CRC Private Functions Prototypes 219 | * @{ 220 | */ 221 | 222 | /** 223 | * @} 224 | */ 225 | 226 | /* Private functions ---------------------------------------------------------*/ 227 | /** @defgroup CRC_Private_Functions CRC Private Functions 228 | * @{ 229 | */ 230 | 231 | /** 232 | * @} 233 | */ 234 | 235 | /** 236 | * @} 237 | */ 238 | 239 | /** 240 | * @} 241 | */ 242 | 243 | #ifdef __cplusplus 244 | } 245 | #endif 246 | 247 | #endif /* __STM32F4xx_HAL_CRC_H */ 248 | 249 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 250 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_def.h 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 14-April-2017 7 | * @brief This file contains HAL common defines, enumeration, macros and 8 | * structures definitions. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT(c) 2017 STMicroelectronics

13 | * 14 | * Redistribution and use in source and binary forms, with or without modification, 15 | * are permitted provided that the following conditions are met: 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 22 | * may be used to endorse or promote products derived from this software 23 | * without specific prior written permission. 24 | * 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 | * 36 | ****************************************************************************** 37 | */ 38 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ 40 | #ifndef __STM32F4xx_HAL_DEF 41 | #define __STM32F4xx_HAL_DEF 42 | 43 | #ifdef __cplusplus 44 | extern "C" { 45 | #endif 46 | 47 | /* Includes ------------------------------------------------------------------*/ 48 | #include "stm32f4xx.h" 49 | #include "Legacy/stm32_hal_legacy.h" 50 | #include 51 | 52 | /* Exported types ------------------------------------------------------------*/ 53 | 54 | /** 55 | * @brief HAL Status structures definition 56 | */ 57 | typedef enum 58 | { 59 | HAL_OK = 0x00U, 60 | HAL_ERROR = 0x01U, 61 | HAL_BUSY = 0x02U, 62 | HAL_TIMEOUT = 0x03U 63 | } HAL_StatusTypeDef; 64 | 65 | /** 66 | * @brief HAL Lock structures definition 67 | */ 68 | typedef enum 69 | { 70 | HAL_UNLOCKED = 0x00U, 71 | HAL_LOCKED = 0x01U 72 | } HAL_LockTypeDef; 73 | 74 | /* Exported macro ------------------------------------------------------------*/ 75 | #define HAL_MAX_DELAY 0xFFFFFFFFU 76 | 77 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET) 78 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET) 79 | 80 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 81 | do{ \ 82 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 83 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 84 | } while(0) 85 | 86 | #define UNUSED(x) ((void)(x)) 87 | 88 | /** @brief Reset the Handle's State field. 89 | * @param __HANDLE__: specifies the Peripheral Handle. 90 | * @note This macro can be used for the following purpose: 91 | * - When the Handle is declared as local variable; before passing it as parameter 92 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 93 | * to set to 0 the Handle's "State" field. 94 | * Otherwise, "State" field may have any random value and the first time the function 95 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 96 | * (i.e. HAL_PPP_MspInit() will not be executed). 97 | * - When there is a need to reconfigure the low level hardware: instead of calling 98 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 99 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 100 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 101 | * @retval None 102 | */ 103 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 104 | 105 | #if (USE_RTOS == 1U) 106 | /* Reserved for future use */ 107 | #error "USE_RTOS should be 0 in the current HAL release" 108 | #else 109 | #define __HAL_LOCK(__HANDLE__) \ 110 | do{ \ 111 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 112 | { \ 113 | return HAL_BUSY; \ 114 | } \ 115 | else \ 116 | { \ 117 | (__HANDLE__)->Lock = HAL_LOCKED; \ 118 | } \ 119 | }while (0U) 120 | 121 | #define __HAL_UNLOCK(__HANDLE__) \ 122 | do{ \ 123 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 124 | }while (0U) 125 | #endif /* USE_RTOS */ 126 | 127 | #if defined ( __GNUC__ ) 128 | #ifndef __weak 129 | #define __weak __attribute__((weak)) 130 | #endif /* __weak */ 131 | #ifndef __packed 132 | #define __packed __attribute__((__packed__)) 133 | #endif /* __packed */ 134 | #endif /* __GNUC__ */ 135 | 136 | 137 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 138 | #if defined (__GNUC__) /* GNU Compiler */ 139 | #ifndef __ALIGN_END 140 | #define __ALIGN_END __attribute__ ((aligned (4))) 141 | #endif /* __ALIGN_END */ 142 | #ifndef __ALIGN_BEGIN 143 | #define __ALIGN_BEGIN 144 | #endif /* __ALIGN_BEGIN */ 145 | #else 146 | #ifndef __ALIGN_END 147 | #define __ALIGN_END 148 | #endif /* __ALIGN_END */ 149 | #ifndef __ALIGN_BEGIN 150 | #if defined (__CC_ARM) /* ARM Compiler */ 151 | #define __ALIGN_BEGIN __align(4) 152 | #elif defined (__ICCARM__) /* IAR Compiler */ 153 | #define __ALIGN_BEGIN 154 | #endif /* __CC_ARM */ 155 | #endif /* __ALIGN_BEGIN */ 156 | #endif /* __GNUC__ */ 157 | 158 | 159 | /** 160 | * @brief __RAM_FUNC definition 161 | */ 162 | #if defined ( __CC_ARM ) 163 | /* ARM Compiler 164 | ------------ 165 | RAM functions are defined using the toolchain options. 166 | Functions that are executed in RAM should reside in a separate source module. 167 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 168 | area of a module to a memory space in physical RAM. 169 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 170 | dialog. 171 | */ 172 | #define __RAM_FUNC HAL_StatusTypeDef 173 | 174 | #elif defined ( __ICCARM__ ) 175 | /* ICCARM Compiler 176 | --------------- 177 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 178 | */ 179 | #define __RAM_FUNC __ramfunc HAL_StatusTypeDef 180 | 181 | #elif defined ( __GNUC__ ) 182 | /* GNU Compiler 183 | ------------ 184 | RAM functions are defined using a specific toolchain attribute 185 | "__attribute__((section(".RamFunc")))". 186 | */ 187 | #define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc"))) 188 | 189 | #endif 190 | 191 | /** 192 | * @brief __NOINLINE definition 193 | */ 194 | #if defined ( __CC_ARM ) || defined ( __GNUC__ ) 195 | /* ARM & GNUCompiler 196 | ---------------- 197 | */ 198 | #define __NOINLINE __attribute__ ( (noinline) ) 199 | 200 | #elif defined ( __ICCARM__ ) 201 | /* ICCARM Compiler 202 | --------------- 203 | */ 204 | #define __NOINLINE _Pragma("optimize = no_inline") 205 | 206 | #endif 207 | 208 | #ifdef __cplusplus 209 | } 210 | #endif 211 | 212 | #endif /* ___STM32F4xx_HAL_DEF */ 213 | 214 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 215 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_dma_ex.h 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 14-April-2017 7 | * @brief Header file of DMA HAL extension module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2017 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F4xx_HAL_DMA_EX_H 40 | #define __STM32F4xx_HAL_DMA_EX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hal_def.h" 48 | 49 | /** @addtogroup STM32F4xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @addtogroup DMAEx 54 | * @{ 55 | */ 56 | 57 | /* Exported types ------------------------------------------------------------*/ 58 | /** @defgroup DMAEx_Exported_Types DMAEx Exported Types 59 | * @brief DMAEx Exported types 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @brief HAL DMA Memory definition 65 | */ 66 | typedef enum 67 | { 68 | MEMORY0 = 0x00U, /*!< Memory 0 */ 69 | MEMORY1 = 0x01U /*!< Memory 1 */ 70 | }HAL_DMA_MemoryTypeDef; 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /* Exported functions --------------------------------------------------------*/ 77 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions 78 | * @brief DMAEx Exported functions 79 | * @{ 80 | */ 81 | 82 | /** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions 83 | * @brief Extended features functions 84 | * @{ 85 | */ 86 | 87 | /* IO operation functions *******************************************************/ 88 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); 89 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); 90 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory); 91 | 92 | /** 93 | * @} 94 | */ 95 | /** 96 | * @} 97 | */ 98 | 99 | /* Private functions ---------------------------------------------------------*/ 100 | /** @defgroup DMAEx_Private_Functions DMAEx Private Functions 101 | * @brief DMAEx Private functions 102 | * @{ 103 | */ 104 | /** 105 | * @} 106 | */ 107 | 108 | /** 109 | * @} 110 | */ 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | #ifdef __cplusplus 117 | } 118 | #endif 119 | 120 | #endif /*__STM32F4xx_HAL_DMA_EX_H*/ 121 | 122 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 123 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_flash_ramfunc.h 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 14-April-2017 7 | * @brief Header file of FLASH RAMFUNC driver. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2017 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H 40 | #define __STM32F4xx_FLASH_RAMFUNC_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 46 | defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) 47 | 48 | /* Includes ------------------------------------------------------------------*/ 49 | #include "stm32f4xx_hal_def.h" 50 | 51 | /** @addtogroup STM32F4xx_HAL_Driver 52 | * @{ 53 | */ 54 | 55 | /** @addtogroup FLASH_RAMFUNC 56 | * @{ 57 | */ 58 | 59 | /* Exported types ------------------------------------------------------------*/ 60 | /* Exported macro ------------------------------------------------------------*/ 61 | /* Exported functions --------------------------------------------------------*/ 62 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions 63 | * @{ 64 | */ 65 | 66 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1 67 | * @{ 68 | */ 69 | __RAM_FUNC HAL_FLASHEx_StopFlashInterfaceClk(void); 70 | __RAM_FUNC HAL_FLASHEx_StartFlashInterfaceClk(void); 71 | __RAM_FUNC HAL_FLASHEx_EnableFlashSleepMode(void); 72 | __RAM_FUNC HAL_FLASHEx_DisableFlashSleepMode(void); 73 | /** 74 | * @} 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** 86 | * @} 87 | */ 88 | 89 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 90 | #ifdef __cplusplus 91 | } 92 | #endif 93 | 94 | 95 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */ 96 | 97 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 98 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_crc.c 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 14-April-2017 7 | * @brief CRC HAL module driver. 8 | * This file provides firmware functions to manage the following 9 | * functionalities of the Cyclic Redundancy Check (CRC) peripheral: 10 | * + Initialization and de-initialization functions 11 | * + Peripheral Control functions 12 | * + Peripheral State functions 13 | * 14 | @verbatim 15 | ============================================================================== 16 | ##### How to use this driver ##### 17 | ============================================================================== 18 | [..] 19 | The CRC HAL driver can be used as follows: 20 | 21 | (#) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE(); 22 | 23 | (#) Use HAL_CRC_Accumulate() function to compute the CRC value of 24 | a 32-bit data buffer using combination of the previous CRC value 25 | and the new one. 26 | 27 | (#) Use HAL_CRC_Calculate() function to compute the CRC Value of 28 | a new 32-bit data buffer. This function resets the CRC computation 29 | unit before starting the computation to avoid getting wrong CRC values. 30 | 31 | @endverbatim 32 | ****************************************************************************** 33 | * @attention 34 | * 35 | *

© COPYRIGHT(c) 2017 STMicroelectronics

36 | * 37 | * Redistribution and use in source and binary forms, with or without modification, 38 | * are permitted provided that the following conditions are met: 39 | * 1. Redistributions of source code must retain the above copyright notice, 40 | * this list of conditions and the following disclaimer. 41 | * 2. Redistributions in binary form must reproduce the above copyright notice, 42 | * this list of conditions and the following disclaimer in the documentation 43 | * and/or other materials provided with the distribution. 44 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 45 | * may be used to endorse or promote products derived from this software 46 | * without specific prior written permission. 47 | * 48 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 49 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 51 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 52 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 54 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 55 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 56 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 57 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 58 | * 59 | ****************************************************************************** 60 | */ 61 | 62 | /* Includes ------------------------------------------------------------------*/ 63 | #include "stm32f4xx_hal.h" 64 | 65 | /** @addtogroup STM32F4xx_HAL_Driver 66 | * @{ 67 | */ 68 | 69 | /** @addtogroup CRC 70 | * @{ 71 | */ 72 | 73 | #ifdef HAL_CRC_MODULE_ENABLED 74 | 75 | /* Private typedef -----------------------------------------------------------*/ 76 | /* Private define ------------------------------------------------------------*/ 77 | /* Private macro -------------------------------------------------------------*/ 78 | /* Private variables ---------------------------------------------------------*/ 79 | /* Private function prototypes -----------------------------------------------*/ 80 | /* Private functions ---------------------------------------------------------*/ 81 | /* Exported functions --------------------------------------------------------*/ 82 | 83 | /** @addtogroup CRC_Exported_Functions 84 | * @{ 85 | */ 86 | 87 | /** @addtogroup CRC_Exported_Functions_Group1 88 | * @brief Initialization and de-initialization functions 89 | * 90 | @verbatim 91 | ============================================================================== 92 | ##### Initialization and de-initialization functions ##### 93 | ============================================================================== 94 | [..] This section provides functions allowing to: 95 | (+) Initialize the CRC according to the specified parameters 96 | in the CRC_InitTypeDef and create the associated handle 97 | (+) DeInitialize the CRC peripheral 98 | (+) Initialize the CRC MSP 99 | (+) DeInitialize CRC MSP 100 | 101 | @endverbatim 102 | * @{ 103 | */ 104 | 105 | /** 106 | * @brief Initializes the CRC according to the specified 107 | * parameters in the CRC_InitTypeDef and creates the associated handle. 108 | * @param hcrc: pointer to a CRC_HandleTypeDef structure that contains 109 | * the configuration information for CRC 110 | * @retval HAL status 111 | */ 112 | HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) 113 | { 114 | /* Check the CRC handle allocation */ 115 | if(hcrc == NULL) 116 | { 117 | return HAL_ERROR; 118 | } 119 | 120 | /* Check the parameters */ 121 | assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); 122 | 123 | if(hcrc->State == HAL_CRC_STATE_RESET) 124 | { 125 | /* Allocate lock resource and initialize it */ 126 | hcrc->Lock = HAL_UNLOCKED; 127 | /* Init the low level hardware */ 128 | HAL_CRC_MspInit(hcrc); 129 | } 130 | 131 | /* Change CRC peripheral state */ 132 | hcrc->State = HAL_CRC_STATE_BUSY; 133 | 134 | /* Change CRC peripheral state */ 135 | hcrc->State = HAL_CRC_STATE_READY; 136 | 137 | /* Return function status */ 138 | return HAL_OK; 139 | } 140 | 141 | /** 142 | * @brief DeInitializes the CRC peripheral. 143 | * @param hcrc: pointer to a CRC_HandleTypeDef structure that contains 144 | * the configuration information for CRC 145 | * @retval HAL status 146 | */ 147 | HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc) 148 | { 149 | /* Check the CRC handle allocation */ 150 | if(hcrc == NULL) 151 | { 152 | return HAL_ERROR; 153 | } 154 | 155 | /* Check the parameters */ 156 | assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); 157 | 158 | /* Change CRC peripheral state */ 159 | hcrc->State = HAL_CRC_STATE_BUSY; 160 | 161 | /* DeInit the low level hardware */ 162 | HAL_CRC_MspDeInit(hcrc); 163 | 164 | /* Change CRC peripheral state */ 165 | hcrc->State = HAL_CRC_STATE_RESET; 166 | 167 | /* Release Lock */ 168 | __HAL_UNLOCK(hcrc); 169 | 170 | /* Return function status */ 171 | return HAL_OK; 172 | } 173 | 174 | /** 175 | * @brief Initializes the CRC MSP. 176 | * @param hcrc: pointer to a CRC_HandleTypeDef structure that contains 177 | * the configuration information for CRC 178 | * @retval None 179 | */ 180 | __weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc) 181 | { 182 | /* Prevent unused argument(s) compilation warning */ 183 | UNUSED(hcrc); 184 | /* NOTE : This function Should not be modified, when the callback is needed, 185 | the HAL_CRC_MspInit could be implemented in the user file 186 | */ 187 | } 188 | 189 | /** 190 | * @brief DeInitializes the CRC MSP. 191 | * @param hcrc: pointer to a CRC_HandleTypeDef structure that contains 192 | * the configuration information for CRC 193 | * @retval None 194 | */ 195 | __weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc) 196 | { 197 | /* Prevent unused argument(s) compilation warning */ 198 | UNUSED(hcrc); 199 | /* NOTE : This function Should not be modified, when the callback is needed, 200 | the HAL_CRC_MspDeInit could be implemented in the user file 201 | */ 202 | } 203 | 204 | /** 205 | * @} 206 | */ 207 | 208 | /** @addtogroup CRC_Exported_Functions_Group2 209 | * @brief Peripheral Control functions 210 | * 211 | @verbatim 212 | ============================================================================== 213 | ##### Peripheral Control functions ##### 214 | ============================================================================== 215 | [..] This section provides functions allowing to: 216 | (+) Compute the 32-bit CRC value of 32-bit data buffer, 217 | using combination of the previous CRC value and the new one. 218 | (+) Compute the 32-bit CRC value of 32-bit data buffer, 219 | independently of the previous CRC value. 220 | 221 | @endverbatim 222 | * @{ 223 | */ 224 | 225 | /** 226 | * @brief Computes the 32-bit CRC of 32-bit data buffer using combination 227 | * of the previous CRC value and the new one. 228 | * @param hcrc: pointer to a CRC_HandleTypeDef structure that contains 229 | * the configuration information for CRC 230 | * @param pBuffer: pointer to the buffer containing the data to be computed 231 | * @param BufferLength: length of the buffer to be computed 232 | * @retval 32-bit CRC 233 | */ 234 | uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength) 235 | { 236 | uint32_t index = 0U; 237 | 238 | /* Process Locked */ 239 | __HAL_LOCK(hcrc); 240 | 241 | /* Change CRC peripheral state */ 242 | hcrc->State = HAL_CRC_STATE_BUSY; 243 | 244 | /* Enter Data to the CRC calculator */ 245 | for(index = 0U; index < BufferLength; index++) 246 | { 247 | hcrc->Instance->DR = pBuffer[index]; 248 | } 249 | 250 | /* Change CRC peripheral state */ 251 | hcrc->State = HAL_CRC_STATE_READY; 252 | 253 | /* Process Unlocked */ 254 | __HAL_UNLOCK(hcrc); 255 | 256 | /* Return the CRC computed value */ 257 | return hcrc->Instance->DR; 258 | } 259 | 260 | /** 261 | * @brief Computes the 32-bit CRC of 32-bit data buffer independently 262 | * of the previous CRC value. 263 | * @param hcrc: pointer to a CRC_HandleTypeDef structure that contains 264 | * the configuration information for CRC 265 | * @param pBuffer: Pointer to the buffer containing the data to be computed 266 | * @param BufferLength: Length of the buffer to be computed 267 | * @retval 32-bit CRC 268 | */ 269 | uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength) 270 | { 271 | uint32_t index = 0U; 272 | 273 | /* Process Locked */ 274 | __HAL_LOCK(hcrc); 275 | 276 | /* Change CRC peripheral state */ 277 | hcrc->State = HAL_CRC_STATE_BUSY; 278 | 279 | /* Reset CRC Calculation Unit */ 280 | __HAL_CRC_DR_RESET(hcrc); 281 | 282 | /* Enter Data to the CRC calculator */ 283 | for(index = 0U; index < BufferLength; index++) 284 | { 285 | hcrc->Instance->DR = pBuffer[index]; 286 | } 287 | 288 | /* Change CRC peripheral state */ 289 | hcrc->State = HAL_CRC_STATE_READY; 290 | 291 | /* Process Unlocked */ 292 | __HAL_UNLOCK(hcrc); 293 | 294 | /* Return the CRC computed value */ 295 | return hcrc->Instance->DR; 296 | } 297 | 298 | /** 299 | * @} 300 | */ 301 | 302 | 303 | /** @addtogroup CRC_Exported_Functions_Group3 304 | * @brief Peripheral State functions 305 | * 306 | @verbatim 307 | ============================================================================== 308 | ##### Peripheral State functions ##### 309 | ============================================================================== 310 | [..] 311 | This subsection permits to get in run-time the status of the peripheral 312 | and the data flow. 313 | 314 | @endverbatim 315 | * @{ 316 | */ 317 | 318 | /** 319 | * @brief Returns the CRC state. 320 | * @param hcrc: pointer to a CRC_HandleTypeDef structure that contains 321 | * the configuration information for CRC 322 | * @retval HAL state 323 | */ 324 | HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc) 325 | { 326 | return hcrc->State; 327 | } 328 | 329 | /** 330 | * @} 331 | */ 332 | 333 | /** 334 | * @} 335 | */ 336 | 337 | #endif /* HAL_CRC_MODULE_ENABLED */ 338 | /** 339 | * @} 340 | */ 341 | 342 | /** 343 | * @} 344 | */ 345 | 346 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 347 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_dma_ex.c 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 14-April-2017 7 | * @brief DMA Extension HAL module driver 8 | * This file provides firmware functions to manage the following 9 | * functionalities of the DMA Extension peripheral: 10 | * + Extended features functions 11 | * 12 | @verbatim 13 | ============================================================================== 14 | ##### How to use this driver ##### 15 | ============================================================================== 16 | [..] 17 | The DMA Extension HAL driver can be used as follows: 18 | (#) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function 19 | for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode. 20 | 21 | -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed. 22 | -@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default. 23 | -@- In Multi (Double) buffer mode, it is possible to update the base address for 24 | the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled. 25 | 26 | @endverbatim 27 | ****************************************************************************** 28 | * @attention 29 | * 30 | *

© COPYRIGHT(c) 2017 STMicroelectronics

31 | * 32 | * Redistribution and use in source and binary forms, with or without modification, 33 | * are permitted provided that the following conditions are met: 34 | * 1. Redistributions of source code must retain the above copyright notice, 35 | * this list of conditions and the following disclaimer. 36 | * 2. Redistributions in binary form must reproduce the above copyright notice, 37 | * this list of conditions and the following disclaimer in the documentation 38 | * and/or other materials provided with the distribution. 39 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 40 | * may be used to endorse or promote products derived from this software 41 | * without specific prior written permission. 42 | * 43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 44 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 45 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 46 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 47 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 48 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 49 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 50 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 51 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 | * 54 | ****************************************************************************** 55 | */ 56 | 57 | /* Includes ------------------------------------------------------------------*/ 58 | #include "stm32f4xx_hal.h" 59 | 60 | /** @addtogroup STM32F4xx_HAL_Driver 61 | * @{ 62 | */ 63 | 64 | /** @defgroup DMAEx DMAEx 65 | * @brief DMA Extended HAL module driver 66 | * @{ 67 | */ 68 | 69 | #ifdef HAL_DMA_MODULE_ENABLED 70 | 71 | /* Private types -------------------------------------------------------------*/ 72 | /* Private variables ---------------------------------------------------------*/ 73 | /* Private Constants ---------------------------------------------------------*/ 74 | /* Private macros ------------------------------------------------------------*/ 75 | /* Private functions ---------------------------------------------------------*/ 76 | /** @addtogroup DMAEx_Private_Functions 77 | * @{ 78 | */ 79 | static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); 80 | /** 81 | * @} 82 | */ 83 | 84 | /* Exported functions ---------------------------------------------------------*/ 85 | 86 | /** @addtogroup DMAEx_Exported_Functions 87 | * @{ 88 | */ 89 | 90 | 91 | /** @addtogroup DMAEx_Exported_Functions_Group1 92 | * 93 | @verbatim 94 | =============================================================================== 95 | ##### Extended features functions ##### 96 | =============================================================================== 97 | [..] This section provides functions allowing to: 98 | (+) Configure the source, destination address and data length and 99 | Start MultiBuffer DMA transfer 100 | (+) Configure the source, destination address and data length and 101 | Start MultiBuffer DMA transfer with interrupt 102 | (+) Change on the fly the memory0 or memory1 address. 103 | 104 | @endverbatim 105 | * @{ 106 | */ 107 | 108 | 109 | /** 110 | * @brief Starts the multi_buffer DMA Transfer. 111 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains 112 | * the configuration information for the specified DMA Stream. 113 | * @param SrcAddress: The source memory Buffer address 114 | * @param DstAddress: The destination memory Buffer address 115 | * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer 116 | * @param DataLength: The length of data to be transferred from source to destination 117 | * @retval HAL status 118 | */ 119 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength) 120 | { 121 | HAL_StatusTypeDef status = HAL_OK; 122 | 123 | /* Check the parameters */ 124 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); 125 | 126 | /* Memory-to-memory transfer not supported in double buffering mode */ 127 | if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) 128 | { 129 | hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; 130 | status = HAL_ERROR; 131 | } 132 | else 133 | { 134 | /* Process Locked */ 135 | __HAL_LOCK(hdma); 136 | 137 | if(HAL_DMA_STATE_READY == hdma->State) 138 | { 139 | /* Change DMA peripheral state */ 140 | hdma->State = HAL_DMA_STATE_BUSY; 141 | 142 | /* Enable the double buffer mode */ 143 | hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM; 144 | 145 | /* Configure DMA Stream destination address */ 146 | hdma->Instance->M1AR = SecondMemAddress; 147 | 148 | /* Configure the source, destination address and the data length */ 149 | DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength); 150 | 151 | /* Enable the peripheral */ 152 | __HAL_DMA_ENABLE(hdma); 153 | } 154 | else 155 | { 156 | /* Return error status */ 157 | status = HAL_BUSY; 158 | } 159 | } 160 | return status; 161 | } 162 | 163 | /** 164 | * @brief Starts the multi_buffer DMA Transfer with interrupt enabled. 165 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 166 | * the configuration information for the specified DMA Stream. 167 | * @param SrcAddress: The source memory Buffer address 168 | * @param DstAddress: The destination memory Buffer address 169 | * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer 170 | * @param DataLength: The length of data to be transferred from source to destination 171 | * @retval HAL status 172 | */ 173 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength) 174 | { 175 | HAL_StatusTypeDef status = HAL_OK; 176 | 177 | /* Check the parameters */ 178 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); 179 | 180 | /* Memory-to-memory transfer not supported in double buffering mode */ 181 | if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) 182 | { 183 | hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; 184 | return HAL_ERROR; 185 | } 186 | 187 | /* Check callback functions */ 188 | if ((NULL == hdma->XferCpltCallback) || (NULL == hdma->XferM1CpltCallback) || (NULL == hdma->XferErrorCallback)) 189 | { 190 | hdma->ErrorCode = HAL_DMA_ERROR_PARAM; 191 | return HAL_ERROR; 192 | } 193 | 194 | /* Process locked */ 195 | __HAL_LOCK(hdma); 196 | 197 | if(HAL_DMA_STATE_READY == hdma->State) 198 | { 199 | /* Change DMA peripheral state */ 200 | hdma->State = HAL_DMA_STATE_BUSY; 201 | 202 | /* Initialize the error code */ 203 | hdma->ErrorCode = HAL_DMA_ERROR_NONE; 204 | 205 | /* Enable the Double buffer mode */ 206 | hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM; 207 | 208 | /* Configure DMA Stream destination address */ 209 | hdma->Instance->M1AR = SecondMemAddress; 210 | 211 | /* Configure the source, destination address and the data length */ 212 | DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength); 213 | 214 | /* Clear all flags */ 215 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 216 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 217 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); 218 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)); 219 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)); 220 | 221 | /* Enable Common interrupts*/ 222 | hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME; 223 | hdma->Instance->FCR |= DMA_IT_FE; 224 | 225 | if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) 226 | { 227 | hdma->Instance->CR |= DMA_IT_HT; 228 | } 229 | 230 | /* Enable the peripheral */ 231 | __HAL_DMA_ENABLE(hdma); 232 | } 233 | else 234 | { 235 | /* Process unlocked */ 236 | __HAL_UNLOCK(hdma); 237 | 238 | /* Return error status */ 239 | status = HAL_BUSY; 240 | } 241 | return status; 242 | } 243 | 244 | /** 245 | * @brief Change the memory0 or memory1 address on the fly. 246 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 247 | * the configuration information for the specified DMA Stream. 248 | * @param Address: The new address 249 | * @param memory: the memory to be changed, This parameter can be one of 250 | * the following values: 251 | * MEMORY0 / 252 | * MEMORY1 253 | * @note The MEMORY0 address can be changed only when the current transfer use 254 | * MEMORY1 and the MEMORY1 address can be changed only when the current 255 | * transfer use MEMORY0. 256 | * @retval HAL status 257 | */ 258 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory) 259 | { 260 | if(memory == MEMORY0) 261 | { 262 | /* change the memory0 address */ 263 | hdma->Instance->M0AR = Address; 264 | } 265 | else 266 | { 267 | /* change the memory1 address */ 268 | hdma->Instance->M1AR = Address; 269 | } 270 | 271 | return HAL_OK; 272 | } 273 | 274 | /** 275 | * @} 276 | */ 277 | 278 | /** 279 | * @} 280 | */ 281 | 282 | /** @addtogroup DMAEx_Private_Functions 283 | * @{ 284 | */ 285 | 286 | /** 287 | * @brief Set the DMA Transfer parameter. 288 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 289 | * the configuration information for the specified DMA Stream. 290 | * @param SrcAddress: The source memory Buffer address 291 | * @param DstAddress: The destination memory Buffer address 292 | * @param DataLength: The length of data to be transferred from source to destination 293 | * @retval HAL status 294 | */ 295 | static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) 296 | { 297 | /* Configure DMA Stream data length */ 298 | hdma->Instance->NDTR = DataLength; 299 | 300 | /* Peripheral to Memory */ 301 | if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 302 | { 303 | /* Configure DMA Stream destination address */ 304 | hdma->Instance->PAR = DstAddress; 305 | 306 | /* Configure DMA Stream source address */ 307 | hdma->Instance->M0AR = SrcAddress; 308 | } 309 | /* Memory to Peripheral */ 310 | else 311 | { 312 | /* Configure DMA Stream source address */ 313 | hdma->Instance->PAR = SrcAddress; 314 | 315 | /* Configure DMA Stream destination address */ 316 | hdma->Instance->M0AR = DstAddress; 317 | } 318 | } 319 | 320 | /** 321 | * @} 322 | */ 323 | 324 | #endif /* HAL_DMA_MODULE_ENABLED */ 325 | /** 326 | * @} 327 | */ 328 | 329 | /** 330 | * @} 331 | */ 332 | 333 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 334 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_flash_ramfunc.c 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 14-April-2017 7 | * @brief FLASH RAMFUNC module driver. 8 | * This file provides a FLASH firmware functions which should be 9 | * executed from internal SRAM 10 | * + Stop/Start the flash interface while System Run 11 | * + Enable/Disable the flash sleep while System Run 12 | @verbatim 13 | ============================================================================== 14 | ##### APIs executed from Internal RAM ##### 15 | ============================================================================== 16 | [..] 17 | *** ARM Compiler *** 18 | -------------------- 19 | [..] RAM functions are defined using the toolchain options. 20 | Functions that are be executed in RAM should reside in a separate 21 | source module. Using the 'Options for File' dialog you can simply change 22 | the 'Code / Const' area of a module to a memory space in physical RAM. 23 | Available memory areas are declared in the 'Target' tab of the 24 | Options for Target' dialog. 25 | 26 | *** ICCARM Compiler *** 27 | ----------------------- 28 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". 29 | 30 | *** GNU Compiler *** 31 | -------------------- 32 | [..] RAM functions are defined using a specific toolchain attribute 33 | "__attribute__((section(".RamFunc")))". 34 | 35 | @endverbatim 36 | ****************************************************************************** 37 | * @attention 38 | * 39 | *

© COPYRIGHT(c) 2017 STMicroelectronics

40 | * 41 | * Redistribution and use in source and binary forms, with or without modification, 42 | * are permitted provided that the following conditions are met: 43 | * 1. Redistributions of source code must retain the above copyright notice, 44 | * this list of conditions and the following disclaimer. 45 | * 2. Redistributions in binary form must reproduce the above copyright notice, 46 | * this list of conditions and the following disclaimer in the documentation 47 | * and/or other materials provided with the distribution. 48 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 49 | * may be used to endorse or promote products derived from this software 50 | * without specific prior written permission. 51 | * 52 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 53 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 55 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 56 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 58 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 59 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 60 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 | * 63 | ****************************************************************************** 64 | */ 65 | 66 | /* Includes ------------------------------------------------------------------*/ 67 | #include "stm32f4xx_hal.h" 68 | 69 | /** @addtogroup STM32F4xx_HAL_Driver 70 | * @{ 71 | */ 72 | 73 | /** @defgroup FLASH_RAMFUNC FLASH RAMFUNC 74 | * @brief FLASH functions executed from RAM 75 | * @{ 76 | */ 77 | #ifdef HAL_FLASH_MODULE_ENABLED 78 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ 79 | defined(STM32F412Rx) || defined(STM32F412Cx) 80 | 81 | /* Private typedef -----------------------------------------------------------*/ 82 | /* Private define ------------------------------------------------------------*/ 83 | /* Private macro -------------------------------------------------------------*/ 84 | /* Private variables ---------------------------------------------------------*/ 85 | /* Private function prototypes -----------------------------------------------*/ 86 | /* Exported functions --------------------------------------------------------*/ 87 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAMFUNC Exported Functions 88 | * @{ 89 | */ 90 | 91 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions executed from internal RAM 92 | * @brief Peripheral Extended features functions 93 | * 94 | @verbatim 95 | 96 | =============================================================================== 97 | ##### ramfunc functions ##### 98 | =============================================================================== 99 | [..] 100 | This subsection provides a set of functions that should be executed from RAM 101 | transfers. 102 | 103 | @endverbatim 104 | * @{ 105 | */ 106 | 107 | /** 108 | * @brief Stop the flash interface while System Run 109 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices. 110 | * @note This mode couldn't be set while executing with the flash itself. 111 | * It should be done with specific routine executed from RAM. 112 | * @retval None 113 | */ 114 | __RAM_FUNC HAL_FLASHEx_StopFlashInterfaceClk(void) 115 | { 116 | /* Enable Power ctrl clock */ 117 | __HAL_RCC_PWR_CLK_ENABLE(); 118 | /* Stop the flash interface while System Run */ 119 | SET_BIT(PWR->CR, PWR_CR_FISSR); 120 | 121 | return HAL_OK; 122 | } 123 | 124 | /** 125 | * @brief Start the flash interface while System Run 126 | * @note This mode is only available for STM32F411xx/STM32F446xx devices. 127 | * @note This mode couldn't be set while executing with the flash itself. 128 | * It should be done with specific routine executed from RAM. 129 | * @retval None 130 | */ 131 | __RAM_FUNC HAL_FLASHEx_StartFlashInterfaceClk(void) 132 | { 133 | /* Enable Power ctrl clock */ 134 | __HAL_RCC_PWR_CLK_ENABLE(); 135 | /* Start the flash interface while System Run */ 136 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR); 137 | 138 | return HAL_OK; 139 | } 140 | 141 | /** 142 | * @brief Enable the flash sleep while System Run 143 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices. 144 | * @note This mode could n't be set while executing with the flash itself. 145 | * It should be done with specific routine executed from RAM. 146 | * @retval None 147 | */ 148 | __RAM_FUNC HAL_FLASHEx_EnableFlashSleepMode(void) 149 | { 150 | /* Enable Power ctrl clock */ 151 | __HAL_RCC_PWR_CLK_ENABLE(); 152 | /* Enable the flash sleep while System Run */ 153 | SET_BIT(PWR->CR, PWR_CR_FMSSR); 154 | 155 | return HAL_OK; 156 | } 157 | 158 | /** 159 | * @brief Disable the flash sleep while System Run 160 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices. 161 | * @note This mode couldn't be set while executing with the flash itself. 162 | * It should be done with specific routine executed from RAM. 163 | * @retval None 164 | */ 165 | __RAM_FUNC HAL_FLASHEx_DisableFlashSleepMode(void) 166 | { 167 | /* Enable Power ctrl clock */ 168 | __HAL_RCC_PWR_CLK_ENABLE(); 169 | /* Disable the flash sleep while System Run */ 170 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR); 171 | 172 | return HAL_OK; 173 | } 174 | 175 | /** 176 | * @} 177 | */ 178 | 179 | /** 180 | * @} 181 | */ 182 | 183 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 184 | #endif /* HAL_FLASH_MODULE_ENABLED */ 185 | /** 186 | * @} 187 | */ 188 | 189 | /** 190 | * @} 191 | */ 192 | 193 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 194 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Inc/main.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : main.h 4 | * Description : This file contains the common defines of the application 5 | ****************************************************************************** 6 | ** This notice applies to any and all portions of this file 7 | * that are not between comment pairs USER CODE BEGIN and 8 | * USER CODE END. Other portions of this file, whether 9 | * inserted by the user or by software development tools 10 | * are owned by their respective copyright owners. 11 | * 12 | * COPYRIGHT(c) 2017 STMicroelectronics 13 | * 14 | * Redistribution and use in source and binary forms, with or without modification, 15 | * are permitted provided that the following conditions are met: 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 22 | * may be used to endorse or promote products derived from this software 23 | * without specific prior written permission. 24 | * 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 | * 36 | ****************************************************************************** 37 | */ 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __MAIN_H 40 | #define __MAIN_H 41 | /* Includes ------------------------------------------------------------------*/ 42 | 43 | /* USER CODE BEGIN Includes */ 44 | 45 | #include 46 | #include "stm32f4xx_hal.h" 47 | 48 | /* USER CODE END Includes */ 49 | 50 | /* Private define ------------------------------------------------------------*/ 51 | 52 | #define B1_Pin GPIO_PIN_13 53 | #define B1_GPIO_Port GPIOC 54 | #define USART_TX_Pin GPIO_PIN_2 55 | #define USART_TX_GPIO_Port GPIOA 56 | #define USART_RX_Pin GPIO_PIN_3 57 | #define USART_RX_GPIO_Port GPIOA 58 | #define LD2_Pin GPIO_PIN_5 59 | #define LD2_GPIO_Port GPIOA 60 | #define TMS_Pin GPIO_PIN_13 61 | #define TMS_GPIO_Port GPIOA 62 | #define TCK_Pin GPIO_PIN_14 63 | #define TCK_GPIO_Port GPIOA 64 | #define SWO_Pin GPIO_PIN_3 65 | #define SWO_GPIO_Port GPIOB 66 | 67 | 68 | #define FLASH_SECTOR2_BASE_ADDRESS 0x08008000U 69 | 70 | /* USER CODE BEGIN Private defines */ 71 | 72 | /* USER CODE END Private defines */ 73 | 74 | void _Error_Handler(char *, int); 75 | 76 | #define Error_Handler() _Error_Handler(__FILE__, __LINE__) 77 | 78 | 79 | /*Bootloader function prototypes */ 80 | 81 | void bootloader_uart_read_data(void); 82 | void bootloader_jump_to_user_app(void); 83 | 84 | void bootloader_handle_getver_cmd(uint8_t *bl_rx_buffer); 85 | void bootloader_handle_gethelp_cmd(uint8_t *pBuffer); 86 | void bootloader_handle_getcid_cmd(uint8_t *pBuffer); 87 | void bootloader_handle_getrdp_cmd(uint8_t *pBuffer); 88 | void bootloader_handle_go_cmd(uint8_t *pBuffer); 89 | void bootloader_handle_flash_erase_cmd(uint8_t *pBuffer); 90 | void bootloader_handle_mem_write_cmd(uint8_t *pBuffer); 91 | void bootloader_handle_en_rw_protect(uint8_t *pBuffer); 92 | void bootloader_handle_mem_read (uint8_t *pBuffer); 93 | void bootloader_handle_read_sector_protection_status(uint8_t *pBuffer); 94 | void bootloader_handle_read_otp(uint8_t *pBuffer); 95 | void bootloader_handle_dis_rw_protect(uint8_t *pBuffer); 96 | 97 | void bootloader_send_ack(uint8_t command_code, uint8_t follow_len); 98 | void bootloader_send_nack(void); 99 | 100 | uint8_t bootloader_verify_crc (uint8_t *pData, uint32_t len,uint32_t crc_host); 101 | uint8_t get_bootloader_version(void); 102 | void bootloader_uart_write_data(uint8_t *pBuffer,uint32_t len); 103 | 104 | uint16_t get_mcu_chip_id(void); 105 | uint8_t get_flash_rdp_level(void); 106 | uint8_t verify_address(uint32_t go_address); 107 | uint8_t execute_flash_erase(uint8_t sector_number , uint8_t number_of_sector); 108 | uint8_t execute_mem_write(uint8_t *pBuffer, uint32_t mem_address, uint32_t len); 109 | 110 | uint8_t configure_flash_sector_rw_protection(uint8_t sector_details, uint8_t protection_mode, uint8_t disable); 111 | 112 | uint16_t read_OB_rw_protection_status(void); 113 | 114 | //version 1.0 115 | #define BL_VERSION 0x10 116 | 117 | // our bootloader commands 118 | 119 | //#define 120 | 121 | //This command is used to read the bootloader version from the MCU 122 | #define BL_GET_VER 0x51 123 | 124 | //This command is used to know what are the commands supported by the bootloader 125 | #define BL_GET_HELP 0x52 126 | 127 | //This command is used to read the MCU chip identification number 128 | #define BL_GET_CID 0x53 129 | 130 | //This command is used to read the FLASH Read Protection level. 131 | #define BL_GET_RDP_STATUS 0x54 132 | 133 | //This command is used to jump bootloader to specified address. 134 | #define BL_GO_TO_ADDR 0x55 135 | 136 | //This command is used to mass erase or sector erase of the user flash . 137 | #define BL_FLASH_ERASE 0x56 138 | 139 | //This command is used to write data in to different memories of the MCU 140 | #define BL_MEM_WRITE 0x57 141 | 142 | //This command is used to enable or disable read/write protect on different sectors of the user flash . 143 | #define BL_EN_RW_PROTECT 0x58 144 | 145 | //This command is used to read data from different memories of the microcontroller. 146 | #define BL_MEM_READ 0x59 147 | 148 | //This command is used to read all the sector protection status. 149 | #define BL_READ_SECTOR_P_STATUS 0x5A 150 | 151 | 152 | //This command is used to read the OTP contents. 153 | #define BL_OTP_READ 0x5B 154 | 155 | 156 | //This command is used disable all sector read/write protection 157 | #define BL_DIS_R_W_PROTECT 0x5C 158 | 159 | /* ACK and NACK bytes*/ 160 | #define BL_ACK 0XA5 161 | #define BL_NACK 0X7F 162 | 163 | /*CRC*/ 164 | #define VERIFY_CRC_FAIL 1 165 | #define VERIFY_CRC_SUCCESS 0 166 | 167 | #define ADDR_VALID 0x00 168 | #define ADDR_INVALID 0x01 169 | 170 | #define INVALID_SECTOR 0x04 171 | 172 | /*Some Start and End addresses of different memories of STM32F446xx MCU */ 173 | /*Change this according to your MCU */ 174 | #define SRAM1_SIZE 112*1024 // STM32F446RE has 112KB of SRAM1 175 | #define SRAM1_END (SRAM1_BASE + SRAM1_SIZE) 176 | #define SRAM2_SIZE 16*1024 // STM32F446RE has 16KB of SRAM2 177 | #define SRAM2_END (SRAM2_BASE + SRAM2_SIZE) 178 | #define FLASH_SIZE 512*1024 // STM32F446RE has 512KB of SRAM2 179 | #define BKPSRAM_SIZE 4*1024 // STM32F446RE has 4KB of SRAM2 180 | #define BKPSRAM_END (BKPSRAM_BASE + BKPSRAM_SIZE) 181 | 182 | 183 | /** 184 | * @} 185 | */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | #endif /* __MAIN_H */ 192 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 193 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Inc/stm32f4xx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_it.h 4 | * @brief This file contains the headers of the interrupt handlers. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2017 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | 34 | /* Define to prevent recursive inclusion -------------------------------------*/ 35 | #ifndef __STM32F4xx_IT_H 36 | #define __STM32F4xx_IT_H 37 | 38 | #ifdef __cplusplus 39 | extern "C" { 40 | #endif 41 | 42 | /* Includes ------------------------------------------------------------------*/ 43 | #include "stm32f4xx_hal.h" 44 | #include "main.h" 45 | /* Exported types ------------------------------------------------------------*/ 46 | /* Exported constants --------------------------------------------------------*/ 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* Exported functions ------------------------------------------------------- */ 49 | 50 | void SysTick_Handler(void); 51 | 52 | #ifdef __cplusplus 53 | } 54 | #endif 55 | 56 | #endif /* __STM32F4xx_IT_H */ 57 | 58 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 59 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/MDK-ARM/DebugConfig/bootloader_STM32F446xx_STM32F446RETx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/MDK-ARM/EventRecorderStub.scvd: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/MDK-ARM/RTE/_bootloader_STM32F446xx/RTE_Components.h: -------------------------------------------------------------------------------- 1 | 2 | /* 3 | * Auto generated Run-Time-Environment Component Configuration File 4 | * *** Do not modify ! *** 5 | * 6 | * Project: 'bootloader_STM32F446xx' 7 | * Target: 'bootloader_STM32F446xx' 8 | */ 9 | 10 | #ifndef RTE_COMPONENTS_H 11 | #define RTE_COMPONENTS_H 12 | 13 | 14 | /* 15 | * Define the Device Header File: 16 | */ 17 | #define CMSIS_device_header "stm32f4xx.h" 18 | 19 | 20 | #endif /* RTE_COMPONENTS_H */ 21 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/MDK-ARM/bootloader_STM32F446xx/ExtDll.iex: -------------------------------------------------------------------------------- 1 | [EXTDLL] 2 | Count=0 3 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/MDK-ARM/bootloader_STM32F446xx/bootloader_STM32F446xx.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/MDK-ARM/bootloader_STM32F446xx/main.crf: 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/SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Src/stm32f4xx_hal_msp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : stm32f4xx_hal_msp.c 4 | * Description : This file provides code for the MSP Initialization 5 | * and de-Initialization codes. 6 | ****************************************************************************** 7 | ** This notice applies to any and all portions of this file 8 | * that are not between comment pairs USER CODE BEGIN and 9 | * USER CODE END. Other portions of this file, whether 10 | * inserted by the user or by software development tools 11 | * are owned by their respective copyright owners. 12 | * 13 | * COPYRIGHT(c) 2017 STMicroelectronics 14 | * 15 | * Redistribution and use in source and binary forms, with or without modification, 16 | * are permitted provided that the following conditions are met: 17 | * 1. Redistributions of source code must retain the above copyright notice, 18 | * this list of conditions and the following disclaimer. 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 23 | * may be used to endorse or promote products derived from this software 24 | * without specific prior written permission. 25 | * 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 | * 37 | ****************************************************************************** 38 | */ 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "stm32f4xx_hal.h" 41 | 42 | extern void _Error_Handler(char *, int); 43 | /* USER CODE BEGIN 0 */ 44 | 45 | /* USER CODE END 0 */ 46 | /** 47 | * Initializes the Global MSP. 48 | */ 49 | void HAL_MspInit(void) 50 | { 51 | /* USER CODE BEGIN MspInit 0 */ 52 | 53 | /* USER CODE END MspInit 0 */ 54 | 55 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0); 56 | 57 | /* System interrupt init*/ 58 | /* MemoryManagement_IRQn interrupt configuration */ 59 | HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); 60 | /* BusFault_IRQn interrupt configuration */ 61 | HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); 62 | /* UsageFault_IRQn interrupt configuration */ 63 | HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); 64 | /* SVCall_IRQn interrupt configuration */ 65 | HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); 66 | /* DebugMonitor_IRQn interrupt configuration */ 67 | HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); 68 | /* PendSV_IRQn interrupt configuration */ 69 | HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); 70 | /* SysTick_IRQn interrupt configuration */ 71 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); 72 | 73 | /* USER CODE BEGIN MspInit 1 */ 74 | 75 | /* USER CODE END MspInit 1 */ 76 | } 77 | 78 | void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc) 79 | { 80 | 81 | if(hcrc->Instance==CRC) 82 | { 83 | /* USER CODE BEGIN CRC_MspInit 0 */ 84 | 85 | /* USER CODE END CRC_MspInit 0 */ 86 | /* Peripheral clock enable */ 87 | __HAL_RCC_CRC_CLK_ENABLE(); 88 | /* USER CODE BEGIN CRC_MspInit 1 */ 89 | 90 | /* USER CODE END CRC_MspInit 1 */ 91 | } 92 | 93 | } 94 | 95 | void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc) 96 | { 97 | 98 | if(hcrc->Instance==CRC) 99 | { 100 | /* USER CODE BEGIN CRC_MspDeInit 0 */ 101 | 102 | /* USER CODE END CRC_MspDeInit 0 */ 103 | /* Peripheral clock disable */ 104 | __HAL_RCC_CRC_CLK_DISABLE(); 105 | /* USER CODE BEGIN CRC_MspDeInit 1 */ 106 | 107 | /* USER CODE END CRC_MspDeInit 1 */ 108 | } 109 | 110 | } 111 | 112 | void HAL_UART_MspInit(UART_HandleTypeDef* huart) 113 | { 114 | 115 | GPIO_InitTypeDef GPIO_InitStruct; 116 | if(huart->Instance==USART2) 117 | { 118 | /* USER CODE BEGIN USART2_MspInit 0 */ 119 | 120 | /* USER CODE END USART2_MspInit 0 */ 121 | /* Peripheral clock enable */ 122 | __HAL_RCC_USART2_CLK_ENABLE(); 123 | 124 | /**USART2 GPIO Configuration 125 | PA2 ------> USART2_TX 126 | PA3 ------> USART2_RX 127 | */ 128 | GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; 129 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 130 | GPIO_InitStruct.Pull = GPIO_PULLUP; 131 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 132 | GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 133 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 134 | 135 | /* USER CODE BEGIN USART2_MspInit 1 */ 136 | 137 | /* USER CODE END USART2_MspInit 1 */ 138 | } 139 | else if(huart->Instance==USART3) 140 | { 141 | /* USER CODE BEGIN USART3_MspInit 0 */ 142 | 143 | /* USER CODE END USART3_MspInit 0 */ 144 | /* Peripheral clock enable */ 145 | __HAL_RCC_USART3_CLK_ENABLE(); 146 | 147 | /**USART3 GPIO Configuration 148 | PC10 ------> USART3_TX 149 | PC11 ------> USART3_RX 150 | */ 151 | GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 152 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 153 | GPIO_InitStruct.Pull = GPIO_PULLUP; 154 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 155 | GPIO_InitStruct.Alternate = GPIO_AF7_USART3; 156 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 157 | 158 | /* USER CODE BEGIN USART3_MspInit 1 */ 159 | 160 | /* USER CODE END USART3_MspInit 1 */ 161 | } 162 | 163 | } 164 | 165 | void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) 166 | { 167 | 168 | if(huart->Instance==USART2) 169 | { 170 | /* USER CODE BEGIN USART2_MspDeInit 0 */ 171 | 172 | /* USER CODE END USART2_MspDeInit 0 */ 173 | /* Peripheral clock disable */ 174 | __HAL_RCC_USART2_CLK_DISABLE(); 175 | 176 | /**USART2 GPIO Configuration 177 | PA2 ------> USART2_TX 178 | PA3 ------> USART2_RX 179 | */ 180 | HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin); 181 | 182 | /* USER CODE BEGIN USART2_MspDeInit 1 */ 183 | 184 | /* USER CODE END USART2_MspDeInit 1 */ 185 | } 186 | else if(huart->Instance==USART3) 187 | { 188 | /* USER CODE BEGIN USART3_MspDeInit 0 */ 189 | 190 | /* USER CODE END USART3_MspDeInit 0 */ 191 | /* Peripheral clock disable */ 192 | __HAL_RCC_USART3_CLK_DISABLE(); 193 | 194 | /**USART3 GPIO Configuration 195 | PC10 ------> USART3_TX 196 | PC11 ------> USART3_RX 197 | */ 198 | HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11); 199 | 200 | /* USER CODE BEGIN USART3_MspDeInit 1 */ 201 | 202 | /* USER CODE END USART3_MspDeInit 1 */ 203 | } 204 | 205 | } 206 | 207 | /* USER CODE BEGIN 1 */ 208 | 209 | /* USER CODE END 1 */ 210 | 211 | /** 212 | * @} 213 | */ 214 | 215 | /** 216 | * @} 217 | */ 218 | 219 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 220 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/Src/stm32f4xx_it.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_it.c 4 | * @brief Interrupt Service Routines. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2017 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "stm32f4xx_hal.h" 35 | #include "stm32f4xx.h" 36 | #include "stm32f4xx_it.h" 37 | 38 | /* USER CODE BEGIN 0 */ 39 | 40 | /* USER CODE END 0 */ 41 | 42 | /* External variables --------------------------------------------------------*/ 43 | 44 | /******************************************************************************/ 45 | /* Cortex-M4 Processor Interruption and Exception Handlers */ 46 | /******************************************************************************/ 47 | 48 | /** 49 | * @brief This function handles System tick timer. 50 | */ 51 | void SysTick_Handler(void) 52 | { 53 | /* USER CODE BEGIN SysTick_IRQn 0 */ 54 | 55 | /* USER CODE END SysTick_IRQn 0 */ 56 | HAL_IncTick(); 57 | HAL_SYSTICK_IRQHandler(); 58 | /* USER CODE BEGIN SysTick_IRQn 1 */ 59 | 60 | /* USER CODE END SysTick_IRQn 1 */ 61 | } 62 | 63 | /******************************************************************************/ 64 | /* STM32F4xx Peripheral Interrupt Handlers */ 65 | /* Add here the Interrupt Handlers for the used peripherals. */ 66 | /* For the available peripheral interrupt handler names, */ 67 | /* please refer to the startup file (startup_stm32f4xx.s). */ 68 | /******************************************************************************/ 69 | 70 | /* USER CODE BEGIN 1 */ 71 | 72 | /* USER CODE END 1 */ 73 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 74 | -------------------------------------------------------------------------------- /SourceCode/BOOTLOADER/KEIL/Nucleo-F446RE/bootloader_STM32F446xx/bootloader_STM32F446xx.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | File.Version=6 3 | KeepUserPlacement=true 4 | Mcu.Family=STM32F4 5 | Mcu.IP0=CRC 6 | Mcu.IP1=NVIC 7 | Mcu.IP2=RCC 8 | Mcu.IP3=SYS 9 | Mcu.IP4=USART2 10 | Mcu.IP5=USART3 11 | Mcu.IPNb=6 12 | Mcu.Name=STM32F446R(C-E)Tx 13 | Mcu.Package=LQFP64 14 | Mcu.Pin0=PC13 15 | Mcu.Pin1=PC14-OSC32_IN 16 | Mcu.Pin10=PC10 17 | Mcu.Pin11=PC11 18 | Mcu.Pin12=PB3 19 | Mcu.Pin13=VP_CRC_VS_CRC 20 | Mcu.Pin14=VP_SYS_VS_Systick 21 | Mcu.Pin2=PC15-OSC32_OUT 22 | Mcu.Pin3=PH0-OSC_IN 23 | Mcu.Pin4=PH1-OSC_OUT 24 | Mcu.Pin5=PA2 25 | Mcu.Pin6=PA3 26 | Mcu.Pin7=PA5 27 | Mcu.Pin8=PA13 28 | Mcu.Pin9=PA14 29 | Mcu.PinsNb=15 30 | Mcu.UserConstants= 31 | Mcu.UserName=STM32F446RETx 32 | MxCube.Version=4.22.1 33 | MxDb.Version=DB.4.0.221 34 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:false 35 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:false 36 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:false 37 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:false 38 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:false 39 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:false\:false 40 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_0 41 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false 42 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true 43 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:false 44 | PA13.GPIOParameters=GPIO_Label 45 | PA13.GPIO_Label=TMS 46 | PA13.Locked=true 47 | PA13.Signal=SYS_JTMS-SWDIO 48 | PA14.GPIOParameters=GPIO_Label 49 | PA14.GPIO_Label=TCK 50 | PA14.Locked=true 51 | PA14.Signal=SYS_JTCK-SWCLK 52 | PA2.GPIOParameters=GPIO_Label 53 | PA2.GPIO_Label=USART_TX 54 | PA2.Locked=true 55 | PA2.Mode=Asynchronous 56 | PA2.Signal=USART2_TX 57 | PA3.GPIOParameters=GPIO_Label 58 | PA3.GPIO_Label=USART_RX 59 | PA3.Locked=true 60 | PA3.Mode=Asynchronous 61 | PA3.Signal=USART2_RX 62 | PA5.GPIOParameters=GPIO_Label 63 | PA5.GPIO_Label=LD2 [Green Led] 64 | PA5.Locked=true 65 | PA5.Signal=GPIO_Output 66 | PB3.GPIOParameters=GPIO_Label 67 | PB3.GPIO_Label=SWO 68 | PB3.Locked=true 69 | PB3.Signal=SYS_JTDO-SWO 70 | PC10.Locked=true 71 | PC10.Mode=Asynchronous 72 | PC10.Signal=USART3_TX 73 | PC11.Locked=true 74 | PC11.Mode=Asynchronous 75 | PC11.Signal=USART3_RX 76 | PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI 77 | PC13.GPIO_Label=B1 [Blue PushButton] 78 | PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING 79 | PC13.Locked=true 80 | PC13.Signal=GPXTI13 81 | PC14-OSC32_IN.Locked=true 82 | PC14-OSC32_IN.Signal=RCC_OSC32_IN 83 | PC15-OSC32_OUT.Locked=true 84 | PC15-OSC32_OUT.Signal=RCC_OSC32_OUT 85 | PCC.Checker=false 86 | PCC.Line=STM32F446 87 | PCC.MCU=STM32F446R(C-E)Tx 88 | PCC.PartNumber=STM32F446RETx 89 | PCC.Seq0=0 90 | PCC.Series=STM32F4 91 | PCC.Temperature=25 92 | PCC.Vdd=null 93 | PH0-OSC_IN.Locked=true 94 | PH0-OSC_IN.Signal=RCC_OSC_IN 95 | PH1-OSC_OUT.Locked=true 96 | PH1-OSC_OUT.Signal=RCC_OSC_OUT 97 | PinOutPanel.RotationAngle=0 98 | ProjectManager.AskForMigrate=true 99 | ProjectManager.BackupPrevious=false 100 | ProjectManager.CompilerOptimize=2 101 | ProjectManager.ComputerToolchain=false 102 | ProjectManager.CoupleFile=false 103 | ProjectManager.CustomerFirmwarePackage=C\:/Users/kiran/STM32Cube/Repository/STM32Cube_FW_F4_V1.16.0 104 | ProjectManager.DefaultFWLocation=true 105 | ProjectManager.DeletePrevious=true 106 | ProjectManager.DeviceId=STM32F446RETx 107 | ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.16.0 108 | ProjectManager.FreePins=false 109 | ProjectManager.HalAssertFull=false 110 | ProjectManager.HeapSize=0x200 111 | ProjectManager.KeepUserCode=true 112 | ProjectManager.LastFirmware=true 113 | ProjectManager.LibraryCopy=1 114 | ProjectManager.PreviousToolchain= 115 | ProjectManager.ProjectBuild=false 116 | ProjectManager.ProjectFileName=bootloader_STM32F446xx.ioc 117 | ProjectManager.ProjectName=bootloader_STM32F446xx 118 | ProjectManager.StackSize=0x400 119 | ProjectManager.TargetToolchain=MDK-ARM V5 120 | ProjectManager.ToolChainLocation= 121 | ProjectManager.UnderRoot=false 122 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL,2-SystemClock_Config-RCC-false-HAL,3-MX_CRC_Init-CRC-false-HAL,4-MX_USART2_UART_Init-USART2-false-HAL,5-MX_USART3_UART_Init-USART3-false-HAL 123 | RCC.AHBFreq_Value=84000000 124 | RCC.APB1CLKDivider=RCC_HCLK_DIV2 125 | RCC.APB1Freq_Value=42000000 126 | RCC.APB1TimFreq_Value=84000000 127 | RCC.APB2Freq_Value=84000000 128 | RCC.APB2TimFreq_Value=84000000 129 | RCC.CECFreq_Value=32786.88524590164 130 | RCC.CortexFreq_Value=84000000 131 | RCC.FCLKCortexFreq_Value=84000000 132 | RCC.FLatency-AdvancedSettings=FLASH_LATENCY_2 133 | RCC.FMPI2C1Freq_Value=42000000 134 | RCC.FamilyName=M 135 | RCC.HCLKFreq_Value=84000000 136 | RCC.HSE_VALUE=8000000 137 | RCC.HSI_VALUE=16000000 138 | RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,FCLKCortexFreq_Value,FLatency-AdvancedSettings,FMPI2C1Freq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLN,PLLP,PLLQCLKFreq_Value,PLLRCLKFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PWRFreq_Value,SAIAFreq_Value,SAIBFreq_Value,SDIOFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USBFreq_Value,VCOI2SInputFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIInputFreq_Value,VCOSAIOutputFreq_Value,VcooutputI2S 139 | RCC.LSE_VALUE=32768 140 | RCC.LSI_VALUE=32000 141 | RCC.MCO2PinFreq_Value=84000000 142 | RCC.PLLCLKFreq_Value=84000000 143 | RCC.PLLI2SPCLKFreq_Value=96000000 144 | RCC.PLLI2SQCLKFreq_Value=96000000 145 | RCC.PLLI2SRCLKFreq_Value=96000000 146 | RCC.PLLN=336 147 | RCC.PLLP=RCC_PLLP_DIV4 148 | RCC.PLLQCLKFreq_Value=168000000 149 | RCC.PLLRCLKFreq_Value=168000000 150 | RCC.PLLSAIPCLKFreq_Value=96000000 151 | RCC.PLLSAIQCLKFreq_Value=96000000 152 | RCC.PWRFreq_Value=84000000 153 | RCC.SAIAFreq_Value=96000000 154 | RCC.SAIBFreq_Value=96000000 155 | RCC.SDIOFreq_Value=168000000 156 | RCC.SPDIFRXFreq_Value=168000000 157 | RCC.SYSCLKFreq_VALUE=84000000 158 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 159 | RCC.USBFreq_Value=168000000 160 | RCC.VCOI2SInputFreq_Value=1000000 161 | RCC.VCOI2SOutputFreq_Value=192000000 162 | RCC.VCOInputFreq_Value=1000000 163 | RCC.VCOOutputFreq_Value=336000000 164 | RCC.VCOSAIInputFreq_Value=1000000 165 | RCC.VCOSAIOutputFreq_Value=192000000 166 | RCC.VcooutputI2S=96000000 167 | SH.GPXTI13.0=GPIO_EXTI13 168 | SH.GPXTI13.ConfNb=1 169 | USART2.IPParameters=VirtualMode 170 | USART2.VirtualMode=VM_ASYNC 171 | USART3.IPParameters=VirtualMode 172 | USART3.VirtualMode=VM_ASYNC 173 | VP_CRC_VS_CRC.Mode=CRC_Activate 174 | VP_CRC_VS_CRC.Signal=CRC_VS_CRC 175 | VP_SYS_VS_Systick.Mode=SysTick 176 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 177 | board=NUCLEO-F446RE 178 | boardIOC=true 179 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Headers/LinuxSerialPort.h: -------------------------------------------------------------------------------- 1 | #ifndef LINUX_SERIAL_H_INCLUDED 2 | #define LINUX_SERIAL_H_INCLUDED 3 | 4 | //Serial port related prototypes 5 | void Serial_Port_Configuration(void); 6 | uint32_t read_serial_port(uint8_t *pBuffer, uint32_t len); 7 | void Close_serial_port(void); 8 | void purge_serial_port(void); 9 | void Write_to_serial_port(uint8_t *data_buf, uint32_t len); 10 | 11 | 12 | #endif // LINUX_SERIAL_H_INCLUDED 13 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Headers/OSxSerialPort.h: -------------------------------------------------------------------------------- 1 | #ifndef OSX_SERIAL_H_INCLUDED 2 | #define OSX_SERIAL_H_INCLUDED 3 | 4 | //Serial port related prototypes 5 | void Serial_Port_Configuration(void); 6 | uint32_t read_serial_port(uint8_t *pBuffer, uint32_t len); 7 | void Close_serial_port(void); 8 | void purge_serial_port(void); 9 | void Write_to_serial_port(uint8_t *data_buf, uint32_t len); 10 | 11 | 12 | #endif // OSX_SERIAL_H_INCLUDED 13 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Headers/WindowsSerialPort.h: -------------------------------------------------------------------------------- 1 | #ifndef WINDOWS_SERIAL_H_INCLUDED 2 | #define WINDOWS_SERIAL_H_INCLUDED 3 | 4 | //Serial port related prototypes 5 | void Serial_Port_Configuration(void); 6 | uint32_t read_serial_port(uint8_t *pBuffer, uint32_t len); 7 | void Close_serial_port(void); 8 | void purge_serial_port(void); 9 | void Write_to_serial_port(uint8_t *data_buf, uint32_t len); 10 | 11 | 12 | #endif // WINDOWS_SERIAL_H_INCLUDED 13 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Headers/main.h: -------------------------------------------------------------------------------- 1 | #ifndef MAIN_H_INCLUDED 2 | #define MAIN_H_INCLUDED 3 | 4 | #include 5 | #include 6 | #include 7 | #include 8 | 9 | //enable one of the below macro according to your HOST 10 | #define WINDOWS_HOST 11 | //#define LINUX_HOST 12 | //s#define OSX_HOST 13 | 14 | #ifdef WINDOWS_HOST 15 | #include "WindowsSerialPort.h" 16 | #endif 17 | 18 | #ifdef LINUX_HOST 19 | #include "LinuxSerialPort.h" 20 | #endif 21 | 22 | #ifdef OSX_HOST 23 | #include "OSxSerialPort.h" 24 | #endif 25 | 26 | //Bl commands prototypes 27 | void decode_menu_command_code(uint32_t command_code); 28 | 29 | //BL Reply Process prototypes 30 | void process_COMMAND_BL_MY_NEW_COMMAND(uint32_t len); 31 | void process_COMMAND_BL_EN_R_W_PROTECT(uint8_t len); 32 | void process_COMMAND_BL_DIS_R_W_PROTECT(uint8_t len); 33 | void process_COMMAND_BL_READ_SECTOR_STATUS(uint32_t len); 34 | void process_COMMAND_BL_MEM_WRITE(uint32_t len); 35 | void process_COMMAND_BL_FLASH_ERASE(uint32_t len); 36 | void process_COMMAND_BL_FLASH_MASS_ERASE(uint32_t len_to_follow); 37 | void process_COMMAND_BL_GO_TO_ADDR(uint32_t len); 38 | void process_COMMAND_BL_GET_RDP_STATUS(uint32_t len); 39 | void process_COMMAND_BL_GET_CID(uint32_t len); 40 | void process_COMMAND_BL_GET_HELP(uint32_t len); 41 | void process_COMMAND_BL_GET_VER(uint32_t len); 42 | int read_bootloader_reply(uint8_t command_code); 43 | int check_flash_status(void); 44 | 45 | //utilities Prototypes 46 | uint32_t get_crc(uint8_t *buff, uint32_t len); 47 | uint8_t word_to_byte(uint32_t addr, uint8_t index, uint8_t lowerfirst); 48 | 49 | //file ops 50 | void close_the_file(void); 51 | uint32_t read_the_file(uint8_t *buffer, uint32_t len); 52 | void open_the_file(void); 53 | uint32_t calc_file_len(void); 54 | 55 | //BL Commands 56 | #define COMMAND_BL_GET_VER 0x51 57 | #define COMMAND_BL_GET_HELP 0x52 58 | #define COMMAND_BL_GET_CID 0x53 59 | #define COMMAND_BL_GET_RDP_STATUS 0x54 60 | #define COMMAND_BL_GO_TO_ADDR 0x55 61 | #define COMMAND_BL_FLASH_ERASE 0x56 62 | #define COMMAND_BL_MEM_WRITE 0x57 63 | #define COMMAND_BL_EN_R_W_PROTECT 0x58 64 | #define COMMAND_BL_MEM_READ 0x59 65 | #define COMMAND_BL_READ_SECTOR_P_STATUS 0x5A 66 | #define COMMAND_BL_OTP_READ 0x5B 67 | #define COMMAND_BL_DIS_R_W_PROTECT 0x5C 68 | #define COMMAND_BL_MY_NEW_COMMAND 0x5D 69 | 70 | //len details of the command 71 | #define COMMAND_BL_GET_VER_LEN 6 72 | #define COMMAND_BL_GET_HELP_LEN 6 73 | #define COMMAND_BL_GET_CID_LEN 6 74 | #define COMMAND_BL_GET_RDP_STATUS_LEN 6 75 | #define COMMAND_BL_GO_TO_ADDR_LEN 10 76 | #define COMMAND_BL_FLASH_ERASE_LEN 8 77 | #define COMMAND_BL_MEM_WRITE_LEN(x) (7+x+4) 78 | #define COMMAND_BL_EN_R_W_PROTECT_LEN 8 79 | #define COMMAND_BL_READ_SECTOR_P_STATUS_LEN 6 80 | #define COMMAND_BL_DIS_R_W_PROTECT_LEN 6 81 | #define COMMAND_BL_MY_NEW_COMMAND_LEN 8 82 | 83 | 84 | //These addresses are used for GO_TO_ADDR for testing purpose. 85 | #define GO_TO_ADDR1 0x20001234 86 | #define GO_TO_ADDR2 0x40804434 87 | #define GO_TO_ADDR3 0x08001234 88 | #define GO_TO_ADDR4 0x12801234 89 | #define GO_TO_ADDR5 0X08008248 90 | 91 | //This is the flash sector 2 base address where we have stored the user application 92 | #define USE_APP_FLASH_BASE_ADDR 0X08008000 93 | 94 | #define RESET_HANDLER_ADDR_OF_APP 0x080081D8 95 | 96 | //MCU HAL driver operation status .. currently not used. 97 | /** 98 | * @brief HAL Status structures definition 99 | */ 100 | typedef enum 101 | { 102 | HAL_OK = 0x00U, 103 | HAL_ERROR = 0x01U, 104 | HAL_BUSY = 0x02U, 105 | HAL_TIMEOUT = 0x03U 106 | } HAL_StatusTypeDef; 107 | 108 | //MCU HAL Flash driver operation status .. currently not used 109 | /** 110 | * @brief Flash HAL Status structures definition 111 | */ 112 | typedef enum 113 | { 114 | Flash_HAL_OK = 0x00U, 115 | Flash_HAL_ERROR = 0x01U, 116 | Flash_HAL_BUSY = 0x02U, 117 | Flash_HAL_TIMEOUT = 0x03U, 118 | Flash_HAL_INV_ADDR = 0x04U 119 | } HAL_FlashStatusTypeDef; 120 | 121 | 122 | typedef union 123 | { 124 | uint16_t flash_sector_status; 125 | struct 126 | { 127 | uint16_t sector0:2; 128 | uint16_t sector1:2; 129 | uint16_t sector2:2; 130 | uint16_t sector3:2; 131 | uint16_t sector4:2; 132 | uint16_t sector5:2; 133 | uint16_t sector6:2; 134 | uint16_t sector7:2; 135 | 136 | }sectors; 137 | 138 | }t_sector_status; 139 | 140 | 141 | #endif // MAIN_H_INCLUDED 142 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/STM32_Programmer_V1.cbp: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 69 | 70 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/STM32_Programmer_V1.cscope_file_list: -------------------------------------------------------------------------------- 1 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\BlCommands.c" 2 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\BlReplyProcessing.c" 3 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\LinuxSerialPort.c" 4 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\LinuxSerialPort.h" 5 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\OSxSerialPort.c" 6 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\OSxSerialPort.h" 7 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\WindowsSerialPort.c" 8 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\WindowsSerialPort.h" 9 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\fileops.c" 10 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\main.c" 11 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\main.h" 12 | "E:\fastBit\courses\bootloader\code\HOST\STM32_Programmer_V1\utilities.c" 13 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/STM32_Programmer_V1.depend: -------------------------------------------------------------------------------- 1 | # depslib dependency file v1.0 2 | 1517470165 source:e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\blcommands.c 3 | "main.h" 4 | 5 | 1517470025 e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\main.h 6 | 7 | 8 | 9 | 10 | "WindowsSerialPort.h" 11 | "LinuxSerialPort.h" 12 | "OSxSerialPort.h" 13 | 14 | 1517297446 e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\windowsserialport.h 15 | 16 | 1517297334 e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\linuxserialport.h 17 | 18 | 1517297369 e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\osxserialport.h 19 | 20 | 1517470035 source:e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\blreplyprocessing.c 21 | "main.h" 22 | 23 | 1517298511 source:e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\fileops.c 24 | "main.h" 25 | 26 | 1517297227 source:e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\linuxserialport.c 27 | "main.h" 28 | "LinuxSerialPort.h" 29 | 30 | 1517470111 source:e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\main.c 31 | "main.h" 32 | 33 | 1517297200 source:e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\osxserialport.c 34 | "main.h" 35 | "OSxSerialPort.h" 36 | 37 | 1522060862 source:e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\utilities.c 38 | "main.h" 39 | 40 | 1517470044 source:e:\fastbit\courses\bootloader\code\host\stm32_programmer_v1\windowsserialport.c 41 | "main.h" 42 | 43 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/STM32_Programmer_V1.layout: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Sources/BlCommands.c: -------------------------------------------------------------------------------- 1 | 2 | 3 | /* This file implements logic to decode the user input , prepare and send the bootloader command packet 4 | * over the serial port. This file is common across win/linux/mac 5 | */ 6 | 7 | #include "main.h" 8 | 9 | //Decode the Bootloader command selection by the user 10 | void decode_menu_command_code(uint32_t command_code) 11 | { 12 | 13 | unsigned char data_buf[255]; 14 | uint32_t crc32=0; int ret_value=0; 15 | 16 | switch(command_code) 17 | { 18 | case 0: 19 | printf("\n Exiting...!"); 20 | exit(0); 21 | 22 | case 1: 23 | printf("\n Command == > BL_GET_VER"); 24 | 25 | data_buf[0] = COMMAND_BL_GET_VER_LEN-1; 26 | data_buf[1] = COMMAND_BL_GET_VER; 27 | crc32 = get_crc(data_buf,COMMAND_BL_GET_VER_LEN-4); 28 | data_buf[2] = word_to_byte(crc32,1,1); 29 | data_buf[3] = word_to_byte(crc32,2,1); 30 | data_buf[4] = word_to_byte(crc32,3,1); 31 | data_buf[5] = word_to_byte(crc32,4,1); 32 | 33 | Write_to_serial_port(&data_buf[0],1); 34 | Write_to_serial_port(&data_buf[1],COMMAND_BL_GET_VER_LEN-1); 35 | 36 | ret_value = read_bootloader_reply(data_buf[1]); 37 | 38 | break; 39 | 40 | case 2: 41 | printf("\n Command == > BL_GET_HLP"); 42 | 43 | data_buf[0] = COMMAND_BL_GET_HELP_LEN-1; 44 | data_buf[1] = COMMAND_BL_GET_HELP; 45 | crc32 = get_crc(data_buf,COMMAND_BL_GET_HELP_LEN-4); 46 | data_buf[2] = word_to_byte(crc32,1,1); 47 | data_buf[3] = word_to_byte(crc32,2,1); 48 | data_buf[4] = word_to_byte(crc32,3,1); 49 | data_buf[5] = word_to_byte(crc32,4,1); 50 | 51 | Write_to_serial_port(&data_buf[0],1); 52 | Write_to_serial_port(&data_buf[1],COMMAND_BL_GET_HELP_LEN-1); 53 | 54 | ret_value = read_bootloader_reply(data_buf[1]); 55 | 56 | break; 57 | 58 | case 3: 59 | printf("\n Command == > BL_GET_CID"); 60 | 61 | data_buf[0] = COMMAND_BL_GET_CID_LEN-1; 62 | data_buf[1] = COMMAND_BL_GET_CID; 63 | crc32 = get_crc(data_buf,COMMAND_BL_GET_CID_LEN-4); 64 | data_buf[2] = word_to_byte(crc32,1,1); 65 | data_buf[3] = word_to_byte(crc32,2,1); 66 | data_buf[4] = word_to_byte(crc32,3,1); 67 | data_buf[5] = word_to_byte(crc32,4,1); 68 | 69 | Write_to_serial_port(&data_buf[0],1); 70 | Write_to_serial_port(&data_buf[1],COMMAND_BL_GET_CID_LEN-1); 71 | 72 | ret_value = read_bootloader_reply(data_buf[1]); 73 | 74 | break; 75 | 76 | case 4: 77 | printf("\n Command == > BL_GET_RDP_STATUS"); 78 | 79 | data_buf[0] = COMMAND_BL_GET_RDP_STATUS_LEN-1; 80 | data_buf[1] = COMMAND_BL_GET_RDP_STATUS; 81 | crc32 = get_crc(data_buf,COMMAND_BL_GET_RDP_STATUS_LEN-4); 82 | data_buf[2] = word_to_byte(crc32,1,1); 83 | data_buf[3] = word_to_byte(crc32,2,1); 84 | data_buf[4] = word_to_byte(crc32,3,1); 85 | data_buf[5] = word_to_byte(crc32,4,1); 86 | 87 | Write_to_serial_port(&data_buf[0],1); 88 | Write_to_serial_port(&data_buf[1],COMMAND_BL_GET_RDP_STATUS_LEN-1); 89 | 90 | ret_value = read_bootloader_reply(data_buf[1]); 91 | 92 | break; 93 | 94 | case 5: 95 | printf("\n Command == > BL_GO_TO_ADDR"); 96 | printf("\n\n Enter Address here :"); 97 | uint32_t go_address; 98 | scanf(" %x",&go_address); 99 | 100 | data_buf[0] = COMMAND_BL_GO_TO_ADDR_LEN-1; 101 | data_buf[1] = COMMAND_BL_GO_TO_ADDR; 102 | #if 0 103 | data_buf[2] = word_to_byte(RESET_HANDLER_ADDR_OF_APP,1,1); 104 | data_buf[3] = word_to_byte(RESET_HANDLER_ADDR_OF_APP,2,1); 105 | data_buf[4] = word_to_byte(RESET_HANDLER_ADDR_OF_APP,3,1); 106 | data_buf[5] = word_to_byte(RESET_HANDLER_ADDR_OF_APP,4,1); 107 | #endif 108 | data_buf[2] = word_to_byte(go_address,1,1); 109 | data_buf[3] = word_to_byte(go_address,2,1); 110 | data_buf[4] = word_to_byte(go_address,3,1); 111 | data_buf[5] = word_to_byte(go_address,4,1); 112 | crc32 = get_crc(data_buf,COMMAND_BL_GO_TO_ADDR_LEN-4); 113 | data_buf[6] = word_to_byte(crc32,1,1); 114 | data_buf[7] = word_to_byte(crc32,2,1); 115 | data_buf[8] = word_to_byte(crc32,3,1); 116 | data_buf[9] = word_to_byte(crc32,4,1); 117 | 118 | Write_to_serial_port(&data_buf[0],1); 119 | Write_to_serial_port(&data_buf[1],COMMAND_BL_GO_TO_ADDR_LEN-1); 120 | 121 | ret_value = read_bootloader_reply(data_buf[1]); 122 | 123 | break; 124 | 125 | case 6: 126 | printf("\n This command is not supported\n"); 127 | break; 128 | 129 | case 7: 130 | printf("\n Command == > BL_FLASH_ERASE"); 131 | 132 | data_buf[0] = COMMAND_BL_FLASH_ERASE_LEN-1; 133 | data_buf[1] = COMMAND_BL_FLASH_ERASE; 134 | uint32_t sector_num,nsec; 135 | 136 | printf("\n Enter sector number(0-7 or 0xFF) here :"); 137 | scanf(" %x",§or_num); 138 | if(sector_num != 0xff) 139 | { 140 | printf("\n Enter number of sectors to erase(max 8) here :"); 141 | scanf(" %d",&nsec); 142 | 143 | } 144 | 145 | 146 | data_buf[2]= sector_num; 147 | data_buf[3]= nsec; 148 | // printf(" sector num : %d %d \n",sector_num,nsec); 149 | 150 | crc32 = get_crc(data_buf,COMMAND_BL_FLASH_ERASE_LEN-4); 151 | data_buf[4] = word_to_byte(crc32,1,1); 152 | data_buf[5] = word_to_byte(crc32,2,1); 153 | data_buf[6] = word_to_byte(crc32,3,1); 154 | data_buf[7] = word_to_byte(crc32,4,1); 155 | 156 | Write_to_serial_port(&data_buf[0],1); 157 | Write_to_serial_port(&data_buf[1],COMMAND_BL_FLASH_ERASE_LEN-1); 158 | 159 | ret_value = read_bootloader_reply(data_buf[1]); 160 | 161 | break; 162 | 163 | case 8: 164 | printf("\n Command == > BL_MEM_WRITE"); 165 | uint32_t bytes_remaining=0; 166 | uint32_t t_len_of_file=0; 167 | uint32_t bytes_so_far_sent = 0,len_to_read=0; 168 | uint32_t base_mem_address=0; 169 | 170 | data_buf[1] = COMMAND_BL_MEM_WRITE; 171 | 172 | //First get the total number of bytes in the .bin file. 173 | t_len_of_file =calc_file_len(); 174 | 175 | //keep opening the file 176 | open_the_file(); 177 | 178 | bytes_remaining = t_len_of_file - bytes_so_far_sent; 179 | 180 | #if 0 181 | //Here you should get it from user input . but 182 | //for testing purpose just hard coded. 183 | base_mem_address = USE_APP_FLASH_BASE_ADDR; 184 | #endif 185 | printf("\n\n Enter the memory write address here :"); 186 | scanf(" %x",&base_mem_address); 187 | 188 | while(bytes_remaining) 189 | { 190 | 191 | if(bytes_remaining >= 128) 192 | { 193 | len_to_read = 128; 194 | }else 195 | { 196 | len_to_read = bytes_remaining; 197 | } 198 | 199 | //get the bytes in to buffer by reading file 200 | read_the_file(&data_buf[7],len_to_read); 201 | 202 | printf("\n base mem address = %#.8x\n",base_mem_address); 203 | 204 | //populate base mem address 205 | data_buf[2] = word_to_byte(base_mem_address,1,1); 206 | data_buf[3] = word_to_byte(base_mem_address,2,1); 207 | data_buf[4] = word_to_byte(base_mem_address,3,1); 208 | data_buf[5] = word_to_byte(base_mem_address,4,1); 209 | 210 | data_buf[6] = len_to_read; 211 | 212 | /* 1 byte len + 1 byte command code + 4 byte mem base address 213 | * 1 byte payload len + len_to_read is amount of bytes read from file + 4 byte CRC 214 | */ 215 | uint32_t mem_write_cmd_total_len = COMMAND_BL_MEM_WRITE_LEN(len_to_read); 216 | 217 | //first field is "len_to_follow" 218 | data_buf[0] =mem_write_cmd_total_len-1; 219 | 220 | crc32 = get_crc(&data_buf[0],mem_write_cmd_total_len-4); 221 | data_buf[7+len_to_read] = word_to_byte(crc32,1,1); 222 | data_buf[8+len_to_read] = word_to_byte(crc32,2,1); 223 | data_buf[9+len_to_read] = word_to_byte(crc32,3,1); 224 | data_buf[10+len_to_read] = word_to_byte(crc32,4,1); 225 | 226 | //update base mem address for the next loop 227 | base_mem_address+=len_to_read; 228 | 229 | Write_to_serial_port(&data_buf[0],1); 230 | Write_to_serial_port(&data_buf[1],mem_write_cmd_total_len-1); 231 | 232 | bytes_so_far_sent+=len_to_read; 233 | bytes_remaining = t_len_of_file - bytes_so_far_sent; 234 | 235 | printf("\n\n bytes_so_far_sent:%d -- bytes_remaining:%d\n",bytes_so_far_sent,bytes_remaining); 236 | 237 | ret_value = read_bootloader_reply(data_buf[1]); 238 | 239 | } 240 | break; 241 | 242 | case 9: 243 | printf("\n Command == > BL_EN_R_W_PROTECT"); 244 | printf("\n\n How many sectors do you want to protect ?: "); 245 | uint32_t total_sector,mode; 246 | char user_input; 247 | uint32_t sector_details = 0x00; 248 | uint8_t sector_numbers[8]; 249 | scanf(" %d",&total_sector); 250 | for(uint32_t i=0 ; i < total_sector ; i++) 251 | { 252 | printf("\n Enter sector number[%d]:",i+1); 253 | scanf(" %d",§or_numbers[i]); 254 | sector_details = sector_details | (1 << sector_numbers[i]); 255 | } 256 | 257 | // printf("\n Sector info : 0x%x",sector_details); 258 | 259 | printf("\n Mode:Flash sectors Write Protection: 1"); 260 | printf("\n Mode:Flash sectors Read/Write Protection: 2"); 261 | printf("\n Enter Sector Protection Mode(1 or 2 ):"); 262 | scanf(" %d",&mode); 263 | if(mode != 2 && mode != 1) 264 | { 265 | printf("\n Invalid option : Command Dropped"); 266 | return; 267 | } 268 | if(mode == 2) 269 | { 270 | #if 0 271 | printf("\n Mass Erase will be performed if you later want to change the Protection mode"); 272 | printf("\n Are you sure (y/n) ?:"); 273 | scanf(" %c",&user_input); 274 | if( (user_input != 'Y' ) && (user_input != 'y') ) 275 | { 276 | printf("\n Command Dropped"); 277 | return ; 278 | 279 | } 280 | #endif 281 | printf("\n This feature is currently not supported !"); 282 | return ; 283 | 284 | } 285 | 286 | data_buf[0] = COMMAND_BL_EN_R_W_PROTECT_LEN-1; 287 | data_buf[1] = COMMAND_BL_EN_R_W_PROTECT; 288 | data_buf[2] = sector_details; 289 | data_buf[3] = mode; 290 | crc32 = get_crc(data_buf,COMMAND_BL_EN_R_W_PROTECT_LEN-4); 291 | data_buf[4] = word_to_byte(crc32,1,1); 292 | data_buf[5] = word_to_byte(crc32,2,1); 293 | data_buf[6] = word_to_byte(crc32,3,1); 294 | data_buf[7] = word_to_byte(crc32,4,1); 295 | 296 | Write_to_serial_port(&data_buf[0],1); 297 | Write_to_serial_port(&data_buf[1],COMMAND_BL_EN_R_W_PROTECT_LEN-1); 298 | 299 | ret_value = read_bootloader_reply(data_buf[1]); 300 | break; 301 | case 10: 302 | printf("\n Command == > COMMAND_BL_MEM_READ"); 303 | printf("\n This command is not supported"); 304 | break; 305 | case 11: 306 | printf("\n Command == > COMMAND_BL_READ_SECTOR_P_STATUS"); 307 | 308 | data_buf[0] = COMMAND_BL_READ_SECTOR_P_STATUS_LEN-1; 309 | data_buf[1] = COMMAND_BL_READ_SECTOR_P_STATUS; 310 | 311 | crc32 = get_crc(data_buf,COMMAND_BL_READ_SECTOR_P_STATUS_LEN-4); 312 | data_buf[2] = word_to_byte(crc32,1,1); 313 | data_buf[3] = word_to_byte(crc32,2,1); 314 | data_buf[4] = word_to_byte(crc32,3,1); 315 | data_buf[5] = word_to_byte(crc32,4,1); 316 | 317 | Write_to_serial_port(&data_buf[0],1); 318 | Write_to_serial_port(&data_buf[1],COMMAND_BL_READ_SECTOR_P_STATUS_LEN-1); 319 | 320 | ret_value = read_bootloader_reply(data_buf[1]); 321 | 322 | break; 323 | case 12: 324 | 325 | printf("\n Command == > COMMAND_OTP_READ"); 326 | printf("\n This command is not supported"); 327 | 328 | break; 329 | case 13: 330 | printf("\n Command == > COMMAND_BL_DIS_R_W_PROTECT"); 331 | //printf("\n This command is not supported"); 332 | data_buf[0] = COMMAND_BL_DIS_R_W_PROTECT_LEN-1; 333 | data_buf[1] = COMMAND_BL_DIS_R_W_PROTECT; 334 | crc32 = get_crc(data_buf,COMMAND_BL_DIS_R_W_PROTECT_LEN-4); 335 | data_buf[2] = word_to_byte(crc32,1,1); 336 | data_buf[3] = word_to_byte(crc32,2,1); 337 | data_buf[4] = word_to_byte(crc32,3,1); 338 | data_buf[5] = word_to_byte(crc32,4,1); 339 | 340 | Write_to_serial_port(&data_buf[0],1); 341 | Write_to_serial_port(&data_buf[1],COMMAND_BL_DIS_R_W_PROTECT_LEN-1); 342 | 343 | ret_value = read_bootloader_reply(data_buf[1]); 344 | break; 345 | 346 | case 14: 347 | printf("\n Command == > COMMAND_BL_MY_NEW_COMMAND "); 348 | data_buf[0] = COMMAND_BL_MY_NEW_COMMAND_LEN-1; 349 | data_buf[1] = COMMAND_BL_MY_NEW_COMMAND; 350 | crc32 = get_crc(data_buf,COMMAND_BL_MY_NEW_COMMAND_LEN-4); 351 | data_buf[2] = word_to_byte(crc32,1,1); 352 | data_buf[3] = word_to_byte(crc32,2,1); 353 | data_buf[4] = word_to_byte(crc32,3,1); 354 | data_buf[5] = word_to_byte(crc32,4,1); 355 | 356 | Write_to_serial_port(&data_buf[0],1); 357 | Write_to_serial_port(&data_buf[1],COMMAND_BL_MY_NEW_COMMAND_LEN-1); 358 | 359 | ret_value = read_bootloader_reply(data_buf[1]); 360 | break; 361 | 362 | default: 363 | { 364 | printf("\n\n Please input valid command code\n"); 365 | return; 366 | } 367 | 368 | } 369 | 370 | if(ret_value == -2) 371 | { 372 | printf("\n\n TimeOut : No response from the bootloader"); 373 | printf("\n Reset the board and Try Again !\n"); 374 | return; 375 | } 376 | 377 | 378 | } 379 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Sources/BlReplyProcessing.c: -------------------------------------------------------------------------------- 1 | 2 | 3 | /* This file implements the logic to read and process the replies from the Bootloader . 4 | * This file is common across win/linux/mac 5 | */ 6 | 7 | #include "main.h" 8 | 9 | 10 | 11 | //Reads and processes the reply sent from the MCU bootloader 12 | int read_bootloader_reply(uint8_t command_code) 13 | { 14 | uint8_t ack[2]={0}; //MCU sends ack + len field 15 | uint32_t len_to_follow=0; 16 | int ret = -2; 17 | 18 | //The MCU bootloader always sends ack/nack first . read that !! 19 | read_serial_port(ack,2); 20 | if(ack[0] == 0xA5) 21 | { 22 | //CRC of last command was good .. received ACK and "len to follow" 23 | len_to_follow=ack[1]; 24 | printf("\n\n CRC : SUCCESS Len : %d\n",len_to_follow); 25 | 26 | switch(0x50 | command_code) 27 | { 28 | case COMMAND_BL_GET_VER: 29 | process_COMMAND_BL_GET_VER(len_to_follow); 30 | break; 31 | case COMMAND_BL_GET_HELP: 32 | process_COMMAND_BL_GET_HELP(len_to_follow); 33 | break; 34 | case COMMAND_BL_GET_CID: 35 | process_COMMAND_BL_GET_CID(len_to_follow); 36 | break; 37 | case COMMAND_BL_GET_RDP_STATUS: 38 | process_COMMAND_BL_GET_RDP_STATUS(len_to_follow); 39 | break; 40 | case COMMAND_BL_GO_TO_ADDR: 41 | process_COMMAND_BL_GO_TO_ADDR(len_to_follow); 42 | break; 43 | case COMMAND_BL_FLASH_ERASE: 44 | process_COMMAND_BL_FLASH_ERASE(len_to_follow); 45 | break; 46 | case COMMAND_BL_MEM_WRITE: 47 | process_COMMAND_BL_MEM_WRITE(len_to_follow); 48 | break; 49 | case COMMAND_BL_READ_SECTOR_P_STATUS: 50 | process_COMMAND_BL_READ_SECTOR_STATUS(len_to_follow); 51 | break; 52 | case COMMAND_BL_EN_R_W_PROTECT: 53 | process_COMMAND_BL_EN_R_W_PROTECT(len_to_follow); 54 | break; 55 | case COMMAND_BL_DIS_R_W_PROTECT: 56 | process_COMMAND_BL_DIS_R_W_PROTECT(len_to_follow); 57 | break; 58 | case COMMAND_BL_MY_NEW_COMMAND: 59 | process_COMMAND_BL_MY_NEW_COMMAND(len_to_follow); 60 | default: 61 | printf("\n Invalid command code\n"); 62 | 63 | } 64 | 65 | ret = 0; 66 | } 67 | else if( ack[0] == 0x7F) 68 | { 69 | //CRC of last command was bad .. received NACK 70 | printf("\n CRC: FAIL \n"); 71 | ret= -1; 72 | } 73 | 74 | return ret; 75 | } 76 | 77 | void process_COMMAND_BL_MY_NEW_COMMAND(uint32_t len) 78 | { 79 | 80 | 81 | } 82 | 83 | void process_COMMAND_BL_GET_VER(uint32_t len) 84 | { 85 | uint8_t ver; 86 | read_serial_port(&ver,len); 87 | printf("\n Bootloader Ver. : 0x%x\n",ver); 88 | } 89 | 90 | 91 | void process_COMMAND_BL_GET_HELP(uint32_t len) 92 | { 93 | uint8_t reply[15]; 94 | read_serial_port(reply,len); 95 | printf("\n Supported Commands :"); 96 | for(uint32_t i =0 ; i < len ; i++) 97 | printf("0x%x ",reply[i]); 98 | printf("\n"); 99 | } 100 | 101 | 102 | void process_COMMAND_BL_GET_CID(uint32_t len) 103 | { 104 | uint8_t cid[2]; 105 | uint16_t ci=0; 106 | read_serial_port(cid,len); 107 | ci = (uint16_t)(cid[1] << 8 )+ cid[0]; 108 | printf("\n Chip Id. : 0x%x\n",ci); 109 | } 110 | 111 | 112 | 113 | void process_COMMAND_BL_GET_RDP_STATUS(uint32_t len) 114 | { 115 | uint8_t rdp=0; 116 | read_serial_port(&rdp,len); 117 | printf("\n RDP Status : 0x%X\n",rdp); 118 | } 119 | 120 | 121 | void process_COMMAND_BL_GO_TO_ADDR(uint32_t len) 122 | { 123 | uint8_t addr_status=0; 124 | read_serial_port(&addr_status,len); 125 | printf("\n Address Status : 0x%x\n",addr_status); 126 | } 127 | 128 | 129 | void process_COMMAND_BL_FLASH_ERASE(uint32_t len) 130 | { 131 | uint8_t erase_status=0; 132 | read_serial_port(&erase_status,len); 133 | if(erase_status == Flash_HAL_OK) 134 | { 135 | printf("\n Erase Status: Success Code: Flash_HAL_OK\n"); 136 | } 137 | else if(erase_status == Flash_HAL_ERROR) 138 | { 139 | printf("\n Erase Status: Fail Code: Flash_HAL_ERROR\n"); 140 | 141 | } 142 | else if(erase_status == Flash_HAL_BUSY) 143 | { 144 | printf("\n Erase Status: Fail Code: Flash_HAL_BUSY\n"); 145 | } 146 | else if(erase_status == Flash_HAL_TIMEOUT) 147 | { 148 | printf("\n Erase Status: Fail Code: Flash_HAL_TIMEOUT\n"); 149 | } 150 | else if(erase_status == Flash_HAL_INV_ADDR) 151 | { 152 | printf("\n Erase Status: Fail Code: Flash_HAL_INV_SECTOR\n"); 153 | } 154 | else 155 | { 156 | printf("\n Erase Status: Fail Code: UNKNOWN_ERROR_CODE\n"); 157 | } 158 | // printf(" Erase Status : 0x%x\n",erase_status); 159 | } 160 | 161 | void process_COMMAND_BL_FLASH_MASS_ERASE(uint32_t len_to_follow) 162 | { 163 | 164 | 165 | } 166 | 167 | 168 | void process_COMMAND_BL_MEM_WRITE(uint32_t len) 169 | { 170 | uint8_t write_status=0; 171 | read_serial_port(&write_status,len); 172 | if(write_status == Flash_HAL_OK) 173 | { 174 | printf("\n Write_status: Flash_HAL_OK\n"); 175 | } 176 | else if(write_status == Flash_HAL_ERROR) 177 | { 178 | printf("\n Write_status: Flash_HAL_ERROR\n"); 179 | } 180 | else if(write_status == Flash_HAL_BUSY) 181 | { 182 | printf("\n Write_status: Flash_HAL_BUSY\n"); 183 | } 184 | else if(write_status == Flash_HAL_TIMEOUT) 185 | { 186 | printf("\n Write_status: Flash_HAL_TIMEOUT\n"); 187 | } 188 | else if(write_status == Flash_HAL_INV_ADDR) 189 | { 190 | printf("\n Write_status: Flash_HAL_INV_ADDR\n"); 191 | } 192 | else 193 | { 194 | printf("\n Write_status: UNKNOWN_ERROR\n"); 195 | } 196 | // printf(" Erase Status : 0x%x\n",erase_status); 197 | } 198 | 199 | 200 | 201 | char *mode[3]= { "Write Protection", "Read/Write Protection","No protection"}; 202 | char *protection_type(t_sector_status *pStatus, uint32_t n) 203 | { 204 | 205 | if(pStatus->flash_sector_status & (1 << 15)) 206 | { //PCROP is active 207 | // printf("\n Flash protection mode : Read/Write Protection(PCROP)"); 208 | 209 | if(pStatus->flash_sector_status & (1 << n)) 210 | { 211 | return mode[1]; 212 | }else 213 | { 214 | return mode[2]; 215 | } 216 | 217 | }else 218 | { 219 | // printf("\n Flash protection mode : Write Protection\n"); 220 | if(pStatus->flash_sector_status & (1 << n)) 221 | { 222 | return mode[2]; 223 | }else 224 | { 225 | return mode[0]; 226 | } 227 | } 228 | 229 | } 230 | 231 | void process_COMMAND_BL_READ_SECTOR_STATUS(uint32_t len) 232 | { 233 | uint32_t i; 234 | // uint16_t sectors_status=0; 235 | t_sector_status s_status; 236 | 237 | read_serial_port((uint8_t*)&s_status.flash_sector_status,len); 238 | // s_status.flash_sector_status = (uint16_t)(status[1] << 8 | status[0] ); 239 | printf("\n Sector Status : 0x%.4X\n",s_status.flash_sector_status); 240 | printf("\n ===================================="); 241 | printf("\n Sector Protection"); 242 | printf("\n ===================================="); 243 | if(s_status.flash_sector_status & (1 << 15)) 244 | { //PCROP is active 245 | printf("\n Flash protection mode : Read/Write Protection(PCROP)\n"); 246 | } 247 | else 248 | { 249 | printf("\n Flash protection mode : Write Protection\n"); 250 | } 251 | 252 | for(i=0;i<8;i++) 253 | printf("\n Sector%d %s",i,protection_type(&s_status,i)); 254 | 255 | printf("\n"); 256 | 257 | 258 | 259 | } 260 | 261 | 262 | void process_COMMAND_BL_EN_R_W_PROTECT(uint8_t len) 263 | { 264 | uint8_t status=0; 265 | read_serial_port(&status,len); 266 | if(status) 267 | { 268 | printf("\n FAIL\n"); 269 | }else 270 | { 271 | printf("\n SUCCESS\n"); 272 | } 273 | } 274 | 275 | process_COMMAND_BL_DIS_R_W_PROTECT(uint8_t len) 276 | { 277 | uint8_t status=0; 278 | read_serial_port(&status,len); 279 | if(status) 280 | { 281 | printf("\n FAIL \n"); 282 | }else 283 | { 284 | printf("\n SUCCESS\n"); 285 | } 286 | 287 | } 288 | 289 | int check_flash_status(void) 290 | { 291 | uint8_t ack[2]={0}; 292 | //uint32_t i =0; 293 | int ret = -1; 294 | 295 | uint8_t ch = 0; 296 | 297 | //The MCU bootloader always sends ack/nack first . read that !! 298 | read_serial_port(ack,2); 299 | if(ack[0] == 0xA5) 300 | { 301 | //CRC of last command was good .. received ACK and "len to follow" 302 | printf("ACK received : %d\n",ack[1]); 303 | //ReadFile(hComm, &ch, 1, &read, NULL); 304 | read_serial_port(&ch,1); 305 | printf("flash status : %d\n",ch); 306 | ret = 0; 307 | } 308 | else if ( ack[0] == 0x7F) 309 | { 310 | //CRC of last command was bad .. received NACK 311 | printf("\nNACK received \n"); 312 | ret= -1; 313 | } 314 | 315 | return ret; 316 | } 317 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Sources/LinuxSerialPort.c: -------------------------------------------------------------------------------- 1 | 2 | #include "main.h" 3 | 4 | #ifdef LINUX_HOST 5 | 6 | /* If you are here, then you may be trying to run this STM32_Programmer Application on Linux Host. 7 | Note1 : This file should implement the functions mentioned in the "LinuxSerialPort.h" 8 | Note2 : Take a reference from the source file "WindowsSerialPort.c 9 | */ 10 | 11 | #include "LinuxSerialPort.h" 12 | 13 | /* Code Begin */ 14 | 15 | 16 | 17 | /* Code End */ 18 | 19 | #endif 20 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Sources/OSxSerialPort.c: -------------------------------------------------------------------------------- 1 | 2 | #include "main.h" 3 | 4 | #ifdef OSX_HOST 5 | 6 | /* If you are here, then you may be trying to run this STM32_Programmer Application on OSX Host. 7 | Note1 : This file should implement the functions mentioned in the "OSxSerialPort.h" 8 | Note2 : Take a reference from the source file "WindowsSerialPort.c 9 | */ 10 | 11 | #include "OSxSerialPort.h" 12 | 13 | /* Code Begin */ 14 | 15 | 16 | 17 | /* Code End */ 18 | 19 | #endif 20 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Sources/WindowsSerialPort.c: -------------------------------------------------------------------------------- 1 | 2 | #include "main.h" 3 | 4 | #ifdef WINDOWS_HOST 5 | 6 | 7 | 8 | HANDLE hComm; // Handle to the Serial port 9 | 10 | void Serial_Port_Configuration(void) 11 | { 12 | char ComPortName[] = "\\\\.\\COM3"; // Name of the Serial port(May Change) to be opened, 13 | BOOL Status; 14 | 15 | /*----------------------------------- Opening the Serial Port --------------------------------------------*/ 16 | hComm = CreateFile( ComPortName, // Name of the Port to be Opened 17 | GENERIC_READ | GENERIC_WRITE, // Read/Write Access 18 | 0, // No Sharing, ports cant be shared 19 | NULL, // No Security 20 | OPEN_EXISTING, // Open existing port only 21 | 0, // Non Overlapped I/O 22 | NULL); // Null for Comm Devices 23 | 24 | if (hComm == INVALID_HANDLE_VALUE) 25 | { 26 | printf("\n Error! - Port %s can't be opened", ComPortName); 27 | printf("\n Check board connection and Port Number\n"); 28 | exit(-1); 29 | } 30 | 31 | else 32 | printf("\n Port %s Opened\n ", ComPortName); 33 | 34 | /*------------------------------- Setting the Parameters for the SerialPort ------------------------------*/ 35 | 36 | DCB dcbSerialParams = { 0 }; // Initializing DCB structure 37 | dcbSerialParams.DCBlength = sizeof(dcbSerialParams); 38 | 39 | Status = GetCommState(hComm, &dcbSerialParams); //retreives the current settings 40 | 41 | if (Status == FALSE) 42 | printf("\n Error! in GetCommState()"); 43 | 44 | dcbSerialParams.BaudRate = 115200; // Setting BaudRate = 9600 45 | dcbSerialParams.ByteSize = 8; // Setting ByteSize = 8 46 | dcbSerialParams.fBinary = 1; 47 | dcbSerialParams.StopBits = ONESTOPBIT; // Setting StopBits = 1 48 | dcbSerialParams.Parity = NOPARITY; // Setting Parity = None 49 | 50 | Status = SetCommState(hComm, &dcbSerialParams); //Configuring the port according to settings in DCB 51 | 52 | if (Status == FALSE) 53 | { 54 | printf("\n Error! in Setting DCB Structure"); 55 | } 56 | else 57 | { 58 | printf("\n Setting DCB Structure Successfull\n"); 59 | printf("\n Baudrate = %ld", dcbSerialParams.BaudRate); 60 | printf("\n ByteSize = %d", dcbSerialParams.ByteSize); 61 | printf("\n StopBits = %d", dcbSerialParams.StopBits); 62 | printf("\n Parity = %d", dcbSerialParams.Parity); 63 | } 64 | /*------------------------------------ Setting Timeouts --------------------------------------------------*/ 65 | #if 1 66 | COMMTIMEOUTS timeouts = { 0 }; 67 | 68 | timeouts.ReadIntervalTimeout = 300; 69 | timeouts.ReadTotalTimeoutConstant = 300; 70 | timeouts.ReadTotalTimeoutMultiplier = 300; 71 | timeouts.WriteTotalTimeoutConstant = 50; 72 | timeouts.WriteTotalTimeoutMultiplier = 10; 73 | 74 | if (SetCommTimeouts(hComm, &timeouts) == FALSE) 75 | printf("\n Error! in Setting Time Outs"); 76 | else 77 | printf("\n\n Setting Serial Port Timeouts Successfull"); 78 | 79 | Status = SetCommMask(hComm, EV_RXCHAR); //Configure Windows to Monitor the serial device for Character Reception 80 | 81 | if (Status == FALSE) 82 | printf("\n\n Error! in Setting CommMask"); 83 | else 84 | printf("\n\n Setting CommMask successfull"); 85 | #endif 86 | 87 | 88 | 89 | } 90 | 91 | /* This function reads from the serial port and returns count of bytes read */ 92 | uint32_t read_serial_port(uint8_t *pBuffer, uint32_t len) 93 | { 94 | uint32_t no_of_bytes_read; 95 | 96 | ReadFile(hComm, pBuffer, len, &no_of_bytes_read, NULL); 97 | 98 | return no_of_bytes_read; 99 | 100 | } 101 | 102 | //closes the serial port 103 | void Close_serial_port(void) 104 | { 105 | CloseHandle(hComm);//Closing the Serial Port 106 | } 107 | 108 | //explore : https://msdn.microsoft.com/en-us/library/windows/desktop/aa363428(v=vs.85).aspx 109 | void purge_serial_port(void) 110 | { 111 | PurgeComm(hComm,PURGE_RXCLEAR|PURGE_TXCLEAR); 112 | 113 | } 114 | 115 | 116 | //This fun is used to Send data over the serial port of "len" bytes 117 | void Write_to_serial_port(uint8_t *data_buf, uint32_t len) 118 | { 119 | DWORD dNoOfBytesWritten = 0; // No of bytes written to the port 120 | BOOL Status; 121 | 122 | Status = WriteFile( hComm, // Handle to the Serialport 123 | data_buf, // Data to be written to the port 124 | len, // No of bytes to write into the port 125 | &dNoOfBytesWritten, // No of bytes written to the port 126 | NULL); 127 | 128 | if (Status == TRUE) 129 | { 130 | printf("\n Sending Command:\n"); 131 | for(uint32_t i = 0 ; i < len ; i++) 132 | { 133 | printf(" 0x%2.2x ",data_buf[i]); 134 | if( i % 8 == 7) 135 | { 136 | printf("\n"); 137 | } 138 | } 139 | } 140 | else 141 | printf("\n Error %ld in Writing to Serial Port",GetLastError()); 142 | } 143 | 144 | #endif // WINDOWS_HOST 145 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Sources/fileops.c: -------------------------------------------------------------------------------- 1 | 2 | 3 | /* This file implements file operations functions . Used to open , close and read the binary file . 4 | * This file is common across win/linux/mac 5 | */ 6 | 7 | #include "main.h" 8 | 9 | FILE *file=NULL; //File pointer for our file related I/O 10 | 11 | //This is the name of the .bin file stored in the below path . 12 | #define USER_APP "C:\\Users\\kiran\\Documents\\bin\\user_app.bin" 13 | 14 | 15 | 16 | //This function opens the file, calculates and returns total length in bytes 17 | uint32_t calc_file_len(void) 18 | { 19 | FILE *file; 20 | uint32_t fileLen; 21 | 22 | //OPen the file in binary format to read. 23 | file = fopen(USER_APP, "rb"); 24 | 25 | if(! file){ 26 | // fprintf(stderr, "Unable to open file %s", "user_app.bin"); 27 | perror("\n\n bin file not found"); 28 | exit(0); 29 | } 30 | 31 | //Get file length 32 | fseek(file, 0, SEEK_END); 33 | fileLen=ftell(file); 34 | fseek(file, 0, SEEK_SET); 35 | 36 | fclose(file); 37 | 38 | return fileLen; 39 | 40 | } 41 | 42 | //This function opens the file , global file handle is used to store the file pointer 43 | void open_the_file(void) 44 | { 45 | file = fopen(USER_APP, "rb"); 46 | 47 | if(! file){ 48 | // fprintf(stderr, "Unable to open file %s", "user_app.bin"); 49 | perror("\n bin file not found"); 50 | exit(0); 51 | } 52 | 53 | } 54 | 55 | //This function reads the file for a given "len" bytes 56 | uint32_t read_the_file(uint8_t *buffer, uint32_t len) 57 | { 58 | uint32_t ret=0; 59 | 60 | //Read file contents into buffer 61 | ret=fread(buffer, 1, len, file); 62 | 63 | //return how much is really read 64 | return ret; 65 | 66 | } 67 | 68 | //close the global file handle 69 | void close_the_file(void) 70 | { 71 | fclose(file); 72 | } 73 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Sources/main.c: -------------------------------------------------------------------------------- 1 | #include "main.h" 2 | 3 | int main() 4 | { 5 | /*----------------------------- Ask Menu implementation----------------------------------------*/ 6 | printf("\n\n +==========================================+"); 7 | printf("\n | STM32F4 BootLoader v1 |"); 8 | printf("\n +==========================================+\n"); 9 | 10 | 11 | Serial_Port_Configuration(); 12 | 13 | while(1) 14 | { 15 | #if 1 16 | printf("\n\n +==========================================+"); 17 | printf("\n | Menu |"); 18 | printf("\n +==========================================+\n"); 19 | #endif 20 | printf("\n\n Which BL command do you want to send ??\n"); 21 | printf("\n BL_GET_VER --> 1"); 22 | printf("\n BL_GET_HLP --> 2"); 23 | printf("\n BL_GET_CID --> 3"); 24 | printf("\n BL_GET_RDP_STATUS --> 4"); 25 | printf("\n BL_GO_TO_ADDR --> 5"); 26 | printf("\n BL_FLASH_MASS_ERASE --> 6"); 27 | printf("\n BL_FLASH_ERASE --> 7"); 28 | printf("\n BL_MEM_WRITE --> 8"); 29 | printf("\n BL_EN_R_W_PROTECT --> 9"); 30 | printf("\n BL_MEM_READ --> 10"); 31 | printf("\n BL_READ_SECTOR_P_STATUS --> 11"); 32 | printf("\n BL_OTP_READ --> 12"); 33 | printf("\n BL_DIS_R_W_PROTECT --> 13"); 34 | printf("\n BL_MY_NEW_COMMAND --> 14"); 35 | printf("\n MENU_EXIT --> 0"); 36 | 37 | printf("\n\n Type the command code here :"); 38 | 39 | uint32_t command_code; 40 | scanf(" %d",&command_code); 41 | 42 | decode_menu_command_code(command_code); 43 | 44 | #if 0 45 | printf("\n\n Do you want to continue(y/n) ?:"); 46 | uint8_t proceed = 0; 47 | scanf(" %c",&proceed); 48 | proceed -= 'y'; 49 | if ( proceed) 50 | { 51 | printf("\n ****** Thank you ! Exiting ******\n"); 52 | break; 53 | } 54 | #endif 55 | printf("\n\n Press any key to continue :"); 56 | uint8_t ch = getch(); 57 | purge_serial_port(); 58 | } 59 | 60 | 61 | } 62 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/Sources/utilities.c: -------------------------------------------------------------------------------- 1 | 2 | /* This file implements some of the utility functions like conversions, CRC calculations , etc 3 | * This file is common across win/linux/mac 4 | */ 5 | 6 | #include "main.h" 7 | 8 | //Converts uint32t_t value to series of bytes. 9 | //if "lowerfirst" is 1 , then LSB is returned first (not used) 10 | uint8_t word_to_byte(uint32_t addr, uint8_t index, uint8_t lowerfirst) 11 | { 12 | uint8_t value = (addr >> ( 8 * ( index -1)) & 0x000000FF ); 13 | return value; 14 | } 15 | 16 | 17 | //This function computes the 4 byte CRC(CRC32) using polynomial method 18 | //Please refer these links for more details 19 | //https://community.st.com/thread/18626 20 | //http://www.st.com/content/ccc/resource/technical/document/application_note/39/89/da/89/9e/d7/49/b1/DM00068118.pdf/files/DM00068118.pdf/jcr:content/translations/en.DM00068118.pdf 21 | //http://www.hackersdelight.org/hdcodetxt/crc.c.txt 22 | //http://www.zlib.net/crc_v3.txt 23 | uint32_t get_crc(uint8_t *buff, uint32_t len) 24 | { 25 | uint32_t i; 26 | 27 | uint32_t Crc = 0XFFFFFFFF; 28 | 29 | for(uint32_t n = 0 ; n < len ; n++ ) 30 | { 31 | uint32_t data = buff[n]; 32 | Crc = Crc ^ data; 33 | for(i=0; i<32; i++) 34 | { 35 | 36 | if (Crc & 0x80000000) 37 | Crc = (Crc << 1) ^ 0x04C11DB7; // Polynomial used in STM32 38 | else 39 | Crc = (Crc << 1); 40 | } 41 | 42 | } 43 | 44 | return(Crc); 45 | } 46 | -------------------------------------------------------------------------------- /SourceCode/HOST/C/STM32_Programmer_V1/bin/Debug/STM32_Programmer_V1.exe: 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https://raw.githubusercontent.com/niekiran/BootloaderProjectSTM32/20f63047037437f5d5a61407ff7d338a141994d6/SourceCode/HOST/C/STM32_Programmer_V1/user_app.bin -------------------------------------------------------------------------------- /SourceCode/HOST/python/user_app.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/niekiran/BootloaderProjectSTM32/20f63047037437f5d5a61407ff7d338a141994d6/SourceCode/HOST/python/user_app.bin -------------------------------------------------------------------------------- /SourceCode/User_app_stm32f446x/Src/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : main.c 4 | * Description : Main program body 5 | ****************************************************************************** 6 | ** This notice applies to any and all portions of this file 7 | * that are not between comment pairs USER CODE BEGIN and 8 | * USER CODE END. Other portions of this file, whether 9 | * inserted by the user or by software development tools 10 | * are owned by their respective copyright owners. 11 | * 12 | * COPYRIGHT(c) 2017 STMicroelectronics 13 | * 14 | * Redistribution and use in source and binary forms, with or without modification, 15 | * are permitted provided that the following conditions are met: 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 22 | * may be used to endorse or promote products derived from this software 23 | * without specific prior written permission. 24 | * 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 | * 36 | ****************************************************************************** 37 | */ 38 | /* Includes ------------------------------------------------------------------*/ 39 | #include "main.h" 40 | #include "stm32f4xx_hal.h" 41 | 42 | /* USER CODE BEGIN Includes */ 43 | 44 | /* USER CODE END Includes */ 45 | 46 | /* Private variables ---------------------------------------------------------*/ 47 | UART_HandleTypeDef huart2; 48 | 49 | /* USER CODE BEGIN PV */ 50 | /* Private variables ---------------------------------------------------------*/ 51 | 52 | /* USER CODE END PV */ 53 | 54 | /* Private function prototypes -----------------------------------------------*/ 55 | void SystemClock_Config(void); 56 | static void MX_GPIO_Init(void); 57 | static void MX_USART2_UART_Init(void); 58 | 59 | /* USER CODE BEGIN PFP */ 60 | /* Private function prototypes -----------------------------------------------*/ 61 | 62 | /* USER CODE END PFP */ 63 | 64 | /* USER CODE BEGIN 0 */ 65 | 66 | char userdata[] = "Hello From user Application \r\n"; 67 | 68 | /* USER CODE END 0 */ 69 | 70 | int main(void) 71 | { 72 | 73 | /* USER CODE BEGIN 1 */ 74 | 75 | /* USER CODE END 1 */ 76 | 77 | /* MCU Configuration----------------------------------------------------------*/ 78 | 79 | /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ 80 | HAL_Init(); 81 | 82 | /* USER CODE BEGIN Init */ 83 | 84 | /* USER CODE END Init */ 85 | 86 | /* Configure the system clock */ 87 | SystemClock_Config(); 88 | 89 | /* USER CODE BEGIN SysInit */ 90 | 91 | /* USER CODE END SysInit */ 92 | 93 | /* Initialize all configured peripherals */ 94 | MX_GPIO_Init(); 95 | MX_USART2_UART_Init(); 96 | 97 | /* USER CODE BEGIN 2 */ 98 | 99 | /* USER CODE END 2 */ 100 | 101 | /* Infinite loop */ 102 | /* USER CODE BEGIN WHILE */ 103 | while (1) 104 | { 105 | /* USER CODE END WHILE */ 106 | HAL_UART_Transmit(&huart2,(uint8_t*)userdata,sizeof(userdata),HAL_MAX_DELAY); 107 | uint32_t current_tick = HAL_GetTick(); 108 | while(HAL_GetTick() <= current_tick +1000); 109 | 110 | /* USER CODE BEGIN 3 */ 111 | 112 | } 113 | /* USER CODE END 3 */ 114 | 115 | } 116 | 117 | /** System Clock Configuration 118 | */ 119 | void SystemClock_Config(void) 120 | { 121 | 122 | RCC_OscInitTypeDef RCC_OscInitStruct; 123 | RCC_ClkInitTypeDef RCC_ClkInitStruct; 124 | 125 | /**Configure the main internal regulator output voltage 126 | */ 127 | __HAL_RCC_PWR_CLK_ENABLE(); 128 | 129 | __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); 130 | 131 | /**Initializes the CPU, AHB and APB busses clocks 132 | */ 133 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 134 | RCC_OscInitStruct.HSIState = RCC_HSI_ON; 135 | RCC_OscInitStruct.HSICalibrationValue = 16; 136 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 137 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; 138 | RCC_OscInitStruct.PLL.PLLM = 16; 139 | RCC_OscInitStruct.PLL.PLLN = 336; 140 | RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; 141 | RCC_OscInitStruct.PLL.PLLQ = 2; 142 | RCC_OscInitStruct.PLL.PLLR = 2; 143 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 144 | { 145 | _Error_Handler(__FILE__, __LINE__); 146 | } 147 | 148 | /**Initializes the CPU, AHB and APB busses clocks 149 | */ 150 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 151 | |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 152 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 153 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 154 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 155 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 156 | 157 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 158 | { 159 | _Error_Handler(__FILE__, __LINE__); 160 | } 161 | 162 | /**Configure the Systick interrupt time 163 | */ 164 | HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); 165 | 166 | /**Configure the Systick 167 | */ 168 | HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); 169 | 170 | /* SysTick_IRQn interrupt configuration */ 171 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); 172 | } 173 | 174 | /* USART2 init function */ 175 | static void MX_USART2_UART_Init(void) 176 | { 177 | 178 | huart2.Instance = USART2; 179 | huart2.Init.BaudRate = 115200; 180 | huart2.Init.WordLength = UART_WORDLENGTH_8B; 181 | huart2.Init.StopBits = UART_STOPBITS_1; 182 | huart2.Init.Parity = UART_PARITY_NONE; 183 | huart2.Init.Mode = UART_MODE_TX_RX; 184 | huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 185 | huart2.Init.OverSampling = UART_OVERSAMPLING_16; 186 | if (HAL_UART_Init(&huart2) != HAL_OK) 187 | { 188 | _Error_Handler(__FILE__, __LINE__); 189 | } 190 | 191 | } 192 | 193 | /** Configure pins as 194 | * Analog 195 | * Input 196 | * Output 197 | * EVENT_OUT 198 | * EXTI 199 | */ 200 | static void MX_GPIO_Init(void) 201 | { 202 | 203 | GPIO_InitTypeDef GPIO_InitStruct; 204 | 205 | /* GPIO Ports Clock Enable */ 206 | __HAL_RCC_GPIOC_CLK_ENABLE(); 207 | __HAL_RCC_GPIOH_CLK_ENABLE(); 208 | __HAL_RCC_GPIOA_CLK_ENABLE(); 209 | __HAL_RCC_GPIOB_CLK_ENABLE(); 210 | 211 | /*Configure GPIO pin Output Level */ 212 | HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET); 213 | 214 | /*Configure GPIO pin : B1_Pin */ 215 | GPIO_InitStruct.Pin = B1_Pin; 216 | GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; 217 | GPIO_InitStruct.Pull = GPIO_NOPULL; 218 | HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); 219 | 220 | /*Configure GPIO pin : LD2_Pin */ 221 | GPIO_InitStruct.Pin = LD2_Pin; 222 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 223 | GPIO_InitStruct.Pull = GPIO_NOPULL; 224 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 225 | HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); 226 | 227 | /* EXTI interrupt init*/ 228 | HAL_NVIC_SetPriority(EXTI15_10_IRQn, 0, 0); 229 | HAL_NVIC_EnableIRQ(EXTI15_10_IRQn); 230 | 231 | } 232 | 233 | /* USER CODE BEGIN 4 */ 234 | 235 | /* USER CODE END 4 */ 236 | 237 | /** 238 | * @brief This function is executed in case of error occurrence. 239 | * @param None 240 | * @retval None 241 | */ 242 | void _Error_Handler(char * file, int line) 243 | { 244 | /* USER CODE BEGIN Error_Handler_Debug */ 245 | /* User can add his own implementation to report the HAL error return state */ 246 | while(1) 247 | { 248 | } 249 | /* USER CODE END Error_Handler_Debug */ 250 | } 251 | 252 | #ifdef USE_FULL_ASSERT 253 | 254 | /** 255 | * @brief Reports the name of the source file and the source line number 256 | * where the assert_param error has occurred. 257 | * @param file: pointer to the source file name 258 | * @param line: assert_param error line source number 259 | * @retval None 260 | */ 261 | void assert_failed(uint8_t* file, uint32_t line) 262 | { 263 | /* USER CODE BEGIN 6 */ 264 | /* User can add his own implementation to report the file name and line number, 265 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 266 | /* USER CODE END 6 */ 267 | 268 | } 269 | 270 | #endif 271 | 272 | /** 273 | * @} 274 | */ 275 | 276 | /** 277 | * @} 278 | */ 279 | 280 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 281 | -------------------------------------------------------------------------------- /SourceCode/User_app_stm32f446x/Src/stm32f4xx_hal_msp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : stm32f4xx_hal_msp.c 4 | * Description : This file provides code for the MSP Initialization 5 | * and de-Initialization codes. 6 | ****************************************************************************** 7 | ** This notice applies to any and all portions of this file 8 | * that are not between comment pairs USER CODE BEGIN and 9 | * USER CODE END. Other portions of this file, whether 10 | * inserted by the user or by software development tools 11 | * are owned by their respective copyright owners. 12 | * 13 | * COPYRIGHT(c) 2017 STMicroelectronics 14 | * 15 | * Redistribution and use in source and binary forms, with or without modification, 16 | * are permitted provided that the following conditions are met: 17 | * 1. Redistributions of source code must retain the above copyright notice, 18 | * this list of conditions and the following disclaimer. 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 23 | * may be used to endorse or promote products derived from this software 24 | * without specific prior written permission. 25 | * 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 | * 37 | ****************************************************************************** 38 | */ 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "stm32f4xx_hal.h" 41 | 42 | extern void _Error_Handler(char *, int); 43 | /* USER CODE BEGIN 0 */ 44 | 45 | /* USER CODE END 0 */ 46 | /** 47 | * Initializes the Global MSP. 48 | */ 49 | void HAL_MspInit(void) 50 | { 51 | /* USER CODE BEGIN MspInit 0 */ 52 | 53 | /* USER CODE END MspInit 0 */ 54 | 55 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0); 56 | 57 | /* System interrupt init*/ 58 | /* MemoryManagement_IRQn interrupt configuration */ 59 | HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); 60 | /* BusFault_IRQn interrupt configuration */ 61 | HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); 62 | /* UsageFault_IRQn interrupt configuration */ 63 | HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); 64 | /* SVCall_IRQn interrupt configuration */ 65 | HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); 66 | /* DebugMonitor_IRQn interrupt configuration */ 67 | HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); 68 | /* PendSV_IRQn interrupt configuration */ 69 | HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); 70 | /* SysTick_IRQn interrupt configuration */ 71 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); 72 | 73 | /* USER CODE BEGIN MspInit 1 */ 74 | 75 | /* USER CODE END MspInit 1 */ 76 | } 77 | 78 | void HAL_UART_MspInit(UART_HandleTypeDef* huart) 79 | { 80 | 81 | GPIO_InitTypeDef GPIO_InitStruct; 82 | if(huart->Instance==USART2) 83 | { 84 | /* USER CODE BEGIN USART2_MspInit 0 */ 85 | 86 | /* USER CODE END USART2_MspInit 0 */ 87 | /* Peripheral clock enable */ 88 | __HAL_RCC_USART2_CLK_ENABLE(); 89 | 90 | /**USART2 GPIO Configuration 91 | PA2 ------> USART2_TX 92 | PA3 ------> USART2_RX 93 | */ 94 | GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; 95 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 96 | GPIO_InitStruct.Pull = GPIO_PULLUP; 97 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 98 | GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 99 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 100 | 101 | /* USER CODE BEGIN USART2_MspInit 1 */ 102 | 103 | /* USER CODE END USART2_MspInit 1 */ 104 | } 105 | 106 | } 107 | 108 | void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) 109 | { 110 | 111 | if(huart->Instance==USART2) 112 | { 113 | /* USER CODE BEGIN USART2_MspDeInit 0 */ 114 | 115 | /* USER CODE END USART2_MspDeInit 0 */ 116 | /* Peripheral clock disable */ 117 | __HAL_RCC_USART2_CLK_DISABLE(); 118 | 119 | /**USART2 GPIO Configuration 120 | PA2 ------> USART2_TX 121 | PA3 ------> USART2_RX 122 | */ 123 | HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin); 124 | 125 | /* USER CODE BEGIN USART2_MspDeInit 1 */ 126 | 127 | /* USER CODE END USART2_MspDeInit 1 */ 128 | } 129 | 130 | } 131 | 132 | /* USER CODE BEGIN 1 */ 133 | 134 | /* USER CODE END 1 */ 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /** 141 | * @} 142 | */ 143 | 144 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 145 | -------------------------------------------------------------------------------- /SourceCode/User_app_stm32f446x/Src/stm32f4xx_it.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_it.c 4 | * @brief Interrupt Service Routines. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2017 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "stm32f4xx_hal.h" 35 | #include "stm32f4xx.h" 36 | #include "stm32f4xx_it.h" 37 | 38 | /* USER CODE BEGIN 0 */ 39 | 40 | /* USER CODE END 0 */ 41 | 42 | /* External variables --------------------------------------------------------*/ 43 | 44 | /******************************************************************************/ 45 | /* Cortex-M4 Processor Interruption and Exception Handlers */ 46 | /******************************************************************************/ 47 | 48 | /** 49 | * @brief This function handles System tick timer. 50 | */ 51 | void SysTick_Handler(void) 52 | { 53 | /* USER CODE BEGIN SysTick_IRQn 0 */ 54 | 55 | /* USER CODE END SysTick_IRQn 0 */ 56 | HAL_IncTick(); 57 | HAL_SYSTICK_IRQHandler(); 58 | /* USER CODE BEGIN SysTick_IRQn 1 */ 59 | 60 | /* USER CODE END SysTick_IRQn 1 */ 61 | } 62 | 63 | /******************************************************************************/ 64 | /* STM32F4xx Peripheral Interrupt Handlers */ 65 | /* Add here the Interrupt Handlers for the used peripherals. */ 66 | /* For the available peripheral interrupt handler names, */ 67 | /* please refer to the startup file (startup_stm32f4xx.s). */ 68 | /******************************************************************************/ 69 | 70 | /** 71 | * @brief This function handles EXTI line[15:10] interrupts. 72 | */ 73 | uint8_t flag=0; 74 | void EXTI15_10_IRQHandler(void) 75 | { 76 | /* USER CODE BEGIN EXTI15_10_IRQn 0 */ 77 | 78 | HAL_GPIO_WritePin(GPIOA,GPIO_PIN_5,!flag); 79 | flag = ! flag; 80 | 81 | /* USER CODE END EXTI15_10_IRQn 0 */ 82 | HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13); 83 | /* USER CODE BEGIN EXTI15_10_IRQn 1 */ 84 | 85 | /* USER CODE END EXTI15_10_IRQn 1 */ 86 | } 87 | 88 | /* USER CODE BEGIN 1 */ 89 | 90 | /* USER CODE END 1 */ 91 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 92 | --------------------------------------------------------------------------------