├── .gitattributes ├── .gitignore ├── README.md ├── Space_Invaders.v ├── alien.coe ├── alien2.coe ├── alien3.coe ├── constraints.xdc ├── gameover.coe ├── hsync.v ├── space.coe ├── space_invaders ├── space_invaders.cache │ ├── ip │ │ ├── 252364defa79ed69.logs │ │ │ └── runme.log │ │ ├── 252364defa79ed69 │ │ │ ├── 252364defa79ed69.xci │ │ │ ├── blk_mem_gen_6.dcp │ │ │ ├── blk_mem_gen_6_sim_netlist.v │ │ │ ├── blk_mem_gen_6_sim_netlist.vhdl │ │ │ ├── blk_mem_gen_6_stub.v │ │ │ └── blk_mem_gen_6_stub.vhdl │ │ ├── 45517b27f3e86e7c.logs │ │ │ └── runme.log │ │ ├── 45517b27f3e86e7c │ │ │ ├── 45517b27f3e86e7c.xci │ │ │ ├── blk_mem_gen_0.dcp │ │ │ ├── blk_mem_gen_0_sim_netlist.v │ │ │ ├── blk_mem_gen_0_sim_netlist.vhdl │ │ │ ├── blk_mem_gen_0_stub.v │ │ │ └── blk_mem_gen_0_stub.vhdl │ │ ├── 70c61db667320b22.logs │ │ │ └── runme.log │ │ ├── 70c61db667320b22 │ │ │ ├── 70c61db667320b22.xci │ │ │ ├── blk_mem_gen_5.dcp │ │ │ ├── blk_mem_gen_5_sim_netlist.v │ │ │ ├── blk_mem_gen_5_sim_netlist.vhdl │ │ │ ├── blk_mem_gen_5_stub.v │ │ │ └── blk_mem_gen_5_stub.vhdl │ │ ├── 9e71f7e25cb01dce.logs │ │ │ └── runme.log │ │ ├── 9e71f7e25cb01dce │ │ │ ├── 9e71f7e25cb01dce.xci │ │ │ ├── blk_mem_gen_1.dcp │ │ │ ├── blk_mem_gen_1_sim_netlist.v │ │ │ ├── blk_mem_gen_1_sim_netlist.vhdl │ │ │ ├── blk_mem_gen_1_stub.v │ │ │ └── blk_mem_gen_1_stub.vhdl │ │ ├── b003169092ecbcb9.logs │ │ │ └── runme.log │ │ ├── b003169092ecbcb9 │ │ │ ├── b003169092ecbcb9.xci │ │ │ ├── blk_mem_gen_2.dcp │ │ │ ├── blk_mem_gen_2_sim_netlist.v │ │ │ ├── blk_mem_gen_2_sim_netlist.vhdl │ │ │ ├── blk_mem_gen_2_stub.v │ │ │ └── blk_mem_gen_2_stub.vhdl │ │ ├── c75828b1ffc933a0.logs │ │ │ └── runme.log │ │ ├── c75828b1ffc933a0 │ │ │ ├── blk_mem_gen_4.dcp │ │ │ ├── blk_mem_gen_4_sim_netlist.v │ │ │ ├── blk_mem_gen_4_sim_netlist.vhdl │ │ │ ├── blk_mem_gen_4_stub.v │ │ │ ├── blk_mem_gen_4_stub.vhdl │ │ │ └── c75828b1ffc933a0.xci │ │ ├── f3acee1dd1998006.logs │ │ │ └── runme.log │ │ ├── f3acee1dd1998006 │ │ │ ├── blk_mem_gen_3.dcp │ │ │ ├── blk_mem_gen_3_sim_netlist.v │ │ │ ├── blk_mem_gen_3_sim_netlist.vhdl │ │ │ ├── blk_mem_gen_3_stub.v │ │ │ ├── blk_mem_gen_3_stub.vhdl │ │ │ └── f3acee1dd1998006.xci │ │ ├── f77c1c4690449727.logs │ │ │ └── runme.log │ │ └── f77c1c4690449727 │ │ │ ├── blk_mem_gen_7.dcp │ │ │ ├── blk_mem_gen_7_sim_netlist.v │ │ │ ├── blk_mem_gen_7_sim_netlist.vhdl │ │ │ ├── blk_mem_gen_7_stub.v │ │ │ ├── blk_mem_gen_7_stub.vhdl │ │ │ └── f77c1c4690449727.xci │ └── wt │ │ ├── gui_resources.wdf │ │ ├── java_command_handlers.wdf │ │ ├── project.wpc │ │ ├── synthesis.wdf │ │ ├── synthesis_details.wdf │ │ └── webtalk_pa.xml ├── space_invaders.hw │ ├── hw_1 │ │ └── hw.xml │ └── space_invaders.lpr ├── space_invaders.ip_user_files │ ├── README.txt │ └── mem_init_files │ │ ├── alien.coe │ │ ├── alien2.coe │ │ ├── alien3.coe │ │ ├── blk_mem_gen_0.mif │ │ ├── gameover.coe │ │ ├── space.coe │ │ ├── spaceship.coe │ │ ├── spaveinvaders.coe │ │ ├── summary.log │ │ └── win.coe ├── space_invaders.runs │ └── .jobs │ │ ├── vrs_config_1.xml │ │ ├── vrs_config_2.xml │ │ ├── vrs_config_3.xml │ │ └── vrs_config_4.xml ├── space_invaders.srcs │ └── sources_1 │ │ └── ip │ │ ├── blk_mem_gen_0 │ │ ├── blk_mem_gen_0.xci │ │ └── blk_mem_gen_0.xml │ │ ├── blk_mem_gen_1 │ │ ├── blk_mem_gen_1.xci │ │ └── blk_mem_gen_1.xml │ │ ├── blk_mem_gen_2 │ │ ├── blk_mem_gen_2.xci │ │ └── blk_mem_gen_2.xml │ │ ├── blk_mem_gen_3 │ │ ├── blk_mem_gen_3.xci │ │ └── blk_mem_gen_3.xml │ │ ├── blk_mem_gen_4 │ │ ├── blk_mem_gen_4.xci │ │ └── blk_mem_gen_4.xml │ │ ├── blk_mem_gen_5 │ │ ├── blk_mem_gen_5.xci │ │ └── blk_mem_gen_5.xml │ │ ├── blk_mem_gen_6 │ │ ├── blk_mem_gen_6.xci │ │ └── blk_mem_gen_6.xml │ │ └── blk_mem_gen_7 │ │ ├── blk_mem_gen_7.xci │ │ └── blk_mem_gen_7.xml └── space_invaders.xpr ├── spaceship.coe ├── spaveinvaders.coe ├── vsync.v └── win.coe /.gitattributes: -------------------------------------------------------------------------------- 1 | # Auto detect text files and perform LF normalization 2 | * text=auto 3 | 4 | # Custom for Visual Studio 5 | *.cs diff=csharp 6 | 7 | # Standard to msysgit 8 | *.doc diff=astextplain 9 | *.DOC diff=astextplain 10 | *.docx diff=astextplain 11 | *.DOCX diff=astextplain 12 | *.dot diff=astextplain 13 | *.DOT diff=astextplain 14 | *.pdf diff=astextplain 15 | *.PDF diff=astextplain 16 | *.rtf diff=astextplain 17 | *.RTF diff=astextplain 18 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Windows image file caches 2 | Thumbs.db 3 | ehthumbs.db 4 | 5 | # Folder config file 6 | Desktop.ini 7 | 8 | # Recycle Bin used on file shares 9 | $RECYCLE.BIN/ 10 | 11 | # Windows Installer files 12 | *.cab 13 | *.msi 14 | *.msm 15 | *.msp 16 | 17 | # Windows shortcuts 18 | *.lnk 19 | 20 | # ========================= 21 | # Operating System Files 22 | # ========================= 23 | 24 | # OSX 25 | # ========================= 26 | 27 | .DS_Store 28 | .AppleDouble 29 | .LSOverride 30 | 31 | # Thumbnails 32 | ._* 33 | 34 | # Files that might appear in the root of a volume 35 | .DocumentRevisions-V100 36 | .fseventsd 37 | .Spotlight-V100 38 | .TemporaryItems 39 | .Trashes 40 | .VolumeIcon.icns 41 | 42 | # Directories potentially created on remote AFP share 43 | .AppleDB 44 | .AppleDesktop 45 | Network Trash Folder 46 | Temporary Items 47 | .apdisk 48 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Space Invaders Fpga Game 2 | 3 | This two person project was completed through the course of Embedded Systems 4 | at the University of Thessaly, Department of Computer Engineering. 5 | 6 | In the context of this game we implemented the classic space invaders game 7 | using a zedboard fpga. The project consists of 3 parts. First the connection 8 | with the monitor through the vga interface, the game logic and the sprite memory modules. 9 | 10 | # Video demonstration 11 | 12 | [![Youtube Video](https://img.youtube.com/vi/RFtkbf2oi48/0.jpg)](https://www.youtube.com/watch?v=RFtkbf2oi48) 13 | 14 | -------------------------------------------------------------------------------- /alien.coe: -------------------------------------------------------------------------------- 1 | ; VGA Memory Map 2 | ; .COE file with hex coefficients 3 | ; Height: 22, Width: 30 4 | 5 | memory_initialization_radix=16; 6 | memory_initialization_vector= 7 | 00,00,00,00,00,49,FF,FF,6D,00,00,00,00,00,00,00, 8 | 00,00,00,00,00,49,FF,FF,6D,00,00,00,00,00,00,00, 9 | 00,00,00,49,FF,FF,6D,00,00,00,00,00,00,00,00,00, 10 | 00,00,00,49,FF,FF,6D,00,00,00,00,00,00,00,00,00, 11 | 00,49,B6,B6,6D,25,25,00,00,00,00,00,00,00,00,25, 12 | 25,6D,B6,B6,49,00,00,00,00,00,00,00,00,00,00,00, 13 | 00,00,92,FF,FF,25,00,00,00,00,00,00,00,FF,FF,B6, 14 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 15 | 92,FF,FF,25,00,00,00,00,00,00,00,FF,FF,B6,00,00, 16 | 00,00,00,00,00,00,00,00,00,00,00,24,6D,6D,B6,FF, 17 | FF,92,6D,6D,6D,6D,6D,6D,6D,FF,FF,DA,6D,6D,25,00, 18 | 00,00,00,00,00,00,00,00,00,49,FF,FF,FF,FF,FF,FF, 19 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,6D,00,00,00, 20 | 00,00,00,00,00,00,00,49,FF,FF,FF,FF,FF,FF,FF,FF, 21 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,6D,00,00,00,00,00, 22 | 00,00,00,FF,FF,FF,FF,FF,6D,00,00,DA,FF,FF,FF,FF, 23 | FF,FF,FF,00,00,49,FF,FF,FF,FF,FF,00,00,00,00,00, 24 | 00,FF,FF,FF,FF,FF,6D,00,00,DA,FF,FF,FF,FF,FF,FF, 25 | FF,00,00,49,FF,FF,FF,FF,FF,00,00,00,24,25,25,FF, 26 | FF,FF,FF,FF,92,25,25,DB,FF,FF,FF,FF,FF,FF,FF,25, 27 | 25,6D,FF,FF,FF,FF,FF,49,25,24,B6,FF,FF,FF,FF,FF, 28 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 29 | FF,FF,FF,FF,FF,FF,FF,B6,B6,FF,FF,FF,FF,FF,FF,FF, 30 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 31 | FF,FF,FF,FF,FF,B6,B6,FF,FF,6D,6D,92,FF,FF,FF,FF, 32 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,92,6D, 33 | 6D,FF,FF,B6,B6,FF,FF,00,00,49,FF,FF,FF,FF,FF,FF, 34 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,6D,00,00,FF, 35 | FF,B6,B6,FF,FF,00,00,49,FF,FF,FF,FF,FF,FF,FF,FF, 36 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,6D,00,00,FF,FF,B6, 37 | B6,FF,FF,00,00,49,FF,FF,6D,24,24,24,24,24,24,24, 38 | 24,24,24,24,24,6D,FF,FF,6D,00,00,FF,FF,B6,B6,FF, 39 | FF,00,00,49,FF,FF,6D,00,00,00,00,00,00,00,00,00, 40 | 00,00,00,49,FF,FF,6D,00,00,FF,FF,B6,92,B6,B6,00, 41 | 00,25,B6,B6,6D,25,25,25,25,24,00,00,24,25,25,25, 42 | 25,6D,DA,DA,49,00,00,B6,B6,92,00,00,00,00,00,00, 43 | 00,00,B6,FF,FF,FF,FF,92,00,00,92,FF,FF,FF,FF,B6, 44 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 45 | B6,FF,FF,FF,FF,92,00,00,92,FF,FF,FF,FF,B6,00,00, 46 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,49,6D, 47 | 6D,6D,6D,49,00,00,49,6D,6D,6D,6D,49,00,00,00,00, 48 | 00,00,00,00; -------------------------------------------------------------------------------- /alien2.coe: -------------------------------------------------------------------------------- 1 | ; VGA Memory Map 2 | ; .COE file with hex coefficients 3 | ; Height: 30, Width: 31 4 | 5 | memory_initialization_radix=16; 6 | memory_initialization_vector= 7 | 00,00,00,00,00,00,00,00,00,00,00,49,92,92,92,92, 8 | 92,92,25,00,00,00,00,00,00,00,00,00,00,00,00,00, 9 | 00,00,00,00,00,00,00,00,00,00,49,FF,FF,FF,FF,FF, 10 | FF,49,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 11 | 00,00,00,00,00,00,00,00,00,49,FF,FF,FF,FF,FF,FF, 12 | 49,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 13 | 00,00,00,00,00,00,00,00,6D,FF,FF,FF,FF,FF,FF,49, 14 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 15 | 00,00,00,24,DB,DB,DB,FF,FF,FF,FF,FF,FF,FF,DB,DB, 16 | DB,DB,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 17 | 00,00,24,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 18 | FF,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 19 | 00,24,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 20 | 00,00,00,00,00,00,00,00,00,00,00,00,00,24,24,24, 21 | 24,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,24, 22 | 24,24,24,00,00,00,00,00,00,00,00,00,DB,FF,FF,FF, 23 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 24 | FF,DA,00,00,00,00,00,00,00,00,00,DB,FF,FF,FF,FF, 25 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 26 | DA,00,00,00,00,00,00,00,00,00,DB,FF,FF,DA,DA,DA, 27 | DA,DB,FF,FF,FF,FF,FF,FF,DB,DA,DA,DA,DA,FF,FF,DA, 28 | 00,00,00,00,00,49,49,49,6D,FF,FF,FF,24,00,00,00, 29 | 6D,FF,FF,FF,FF,FF,FF,49,00,00,00,24,FF,FF,DB,6D, 30 | 49,49,49,00,92,FF,FF,FF,FF,FF,FF,00,00,00,00,49, 31 | FF,FF,FF,FF,FF,FF,49,00,00,00,24,FF,FF,FF,FF,FF, 32 | FF,92,00,92,FF,FF,FF,FF,FF,FF,00,00,00,00,49,FF, 33 | FF,FF,FF,FF,FF,49,00,00,00,24,FF,FF,FF,FF,FF,FF, 34 | 92,00,92,FF,FF,FF,FF,FF,FF,00,00,00,00,49,FF,FF, 35 | FF,FF,FF,FF,49,00,00,00,24,FF,FF,FF,FF,FF,FF,92, 36 | 00,92,FF,FF,FF,FF,FF,FF,92,92,92,92,B6,FF,FF,FF, 37 | FF,FF,FF,B6,92,92,92,92,FF,FF,FF,FF,FF,FF,92,00, 38 | 92,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 39 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,92,00,92, 40 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 41 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,92,00,25,49, 42 | 49,49,49,49,49,49,FF,FF,DB,49,49,49,49,49,49,49, 43 | 49,DB,FF,FF,49,49,49,49,49,49,49,25,00,00,00,00, 44 | 00,00,00,00,24,FF,FF,DA,00,00,00,00,00,00,00,00, 45 | DB,FF,FF,00,00,00,00,00,00,00,00,00,00,00,00,00, 46 | 00,00,00,24,FF,FF,DA,00,00,00,00,00,00,00,00,DB, 47 | FF,FF,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 48 | 00,00,24,FF,FF,DA,00,00,00,00,00,00,00,00,DB,FF, 49 | FF,00,00,00,00,00,00,00,00,00,00,00,00,00,24,24, 50 | 24,24,00,00,24,24,24,24,24,24,24,24,24,00,00,00, 51 | 24,24,24,24,00,00,00,00,00,00,00,00,00,DB,FF,FF, 52 | 00,00,00,00,49,FF,FF,FF,FF,FF,FF,49,00,00,00,24, 53 | FF,FF,DA,00,00,00,00,00,00,00,00,00,DB,FF,FF,00, 54 | 00,00,00,49,FF,FF,FF,FF,FF,FF,49,00,00,00,24,FF, 55 | FF,DA,00,00,00,00,00,00,00,00,00,B6,DA,DA,24,00, 56 | 00,00,49,DA,DA,DA,DA,DA,DA,49,00,00,00,24,DA,DA, 57 | B6,00,00,00,00,00,49,49,49,24,00,00,00,24,49,49, 58 | 49,00,00,00,00,00,00,00,00,49,49,49,24,00,00,00, 59 | 24,49,49,49,00,92,FF,FF,49,00,00,00,24,FF,FF,DA, 60 | 00,00,00,00,00,00,00,00,DB,FF,FF,00,00,00,00,49, 61 | FF,FF,92,00,92,FF,FF,49,00,00,00,24,FF,FF,DA,00, 62 | 00,00,00,00,00,00,00,DB,FF,FF,00,00,00,00,49,FF, 63 | FF,92,00,6D,92,92,25,00,00,00,24,92,92,6D,00,00, 64 | 00,00,00,00,00,00,92,92,92,00,00,00,00,49,92,92, 65 | 6D,00; -------------------------------------------------------------------------------- /alien3.coe: -------------------------------------------------------------------------------- 1 | ; VGA Memory Map 2 | ; .COE file with hex coefficients 3 | ; Height: 22, Width: 33 4 | 5 | memory_initialization_radix=16; 6 | memory_initialization_vector= 7 | 00,00,00,00,00,00,00,00,00,00,25,B6,B6,B6,B6,B6, 8 | B6,B6,B6,B6,92,24,00,00,00,00,00,00,00,00,00,00, 9 | 00,00,00,00,00,00,00,00,00,00,00,49,FF,FF,FF,FF, 10 | FF,FF,FF,FF,FF,DB,24,00,00,00,00,00,00,00,00,00, 11 | 00,00,00,00,00,25,25,25,25,25,25,25,6D,FF,FF,FF, 12 | FF,FF,FF,FF,FF,FF,DB,49,25,25,25,25,25,25,25,00, 13 | 00,00,00,00,00,49,DB,FF,FF,FF,FF,FF,FF,FF,FF,FF, 14 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,DA, 15 | 24,00,00,00,00,00,49,FF,FF,FF,FF,FF,FF,FF,FF,FF, 16 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 17 | DB,24,00,00,00,49,6D,92,FF,FF,FF,FF,FF,FF,FF,FF, 18 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 19 | FF,DB,6D,6D,49,00,B6,FF,FF,FF,FF,FF,FF,FF,FF,FF, 20 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 21 | FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF,FF,FF,DB,B6, 22 | B6,B6,B6,B6,DB,FF,FF,FF,FF,DA,B6,B6,B6,B6,B6,DB, 23 | FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF,FF,FF,B6, 24 | 00,00,00,00,00,92,FF,FF,FF,FF,49,00,00,00,00,00, 25 | B6,FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF,FF,FF, 26 | B6,00,00,00,00,00,92,FF,FF,FF,FF,25,00,00,00,00, 27 | 00,B6,FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF,FF, 28 | FF,B6,24,24,24,24,24,92,FF,FF,FF,FF,49,24,24,24, 29 | 24,24,B6,FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF, 30 | FF,FF,FF,DA,DA,DA,DA,DA,DB,FF,FF,FF,FF,DB,DA,DA, 31 | DA,DA,DA,FF,FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF, 32 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 33 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,B6,00,49,6D,6D, 34 | 6D,6D,6D,6D,6D,DA,FF,FF,FF,DB,6D,6D,6D,6D,6D,92, 35 | FF,FF,FF,FF,DA,6D,6D,6D,6D,6D,6D,6D,49,00,00,00, 36 | 00,00,00,00,00,00,B6,FF,FF,FF,DB,24,00,00,00,00, 37 | 49,FF,FF,FF,FF,B6,00,00,00,00,00,00,00,00,00,00, 38 | 00,00,00,00,00,00,00,B6,FF,DB,DB,B6,24,00,00,00, 39 | 00,49,DB,DB,FF,FF,B6,00,00,00,00,00,00,00,00,00, 40 | 00,00,00,00,00,25,49,49,DA,FF,49,24,24,49,49,49, 41 | 49,49,24,24,24,92,FF,B6,49,49,24,00,00,00,00,00, 42 | 00,00,00,00,00,00,92,FF,FF,FF,FF,25,00,00,92,FF, 43 | FF,FF,FF,25,00,00,92,FF,FF,FF,FF,25,00,00,00,00, 44 | 00,00,00,00,00,00,00,6D,B6,B6,B6,B6,24,00,00,6D, 45 | B6,B6,B6,B6,24,00,00,6D,B6,B6,B6,B6,25,00,00,00, 46 | 00,00,00,6D,92,92,92,92,24,00,00,00,00,00,00,00, 47 | 00,00,00,00,00,00,00,00,00,00,00,00,00,25,92,92, 48 | 92,92,6D,00,B6,FF,FF,FF,DB,24,00,00,00,00,00,00, 49 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,49,FF, 50 | FF,FF,FF,B6,00,6D,B6,B6,B6,92,24,00,00,00,00,00, 51 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,25, 52 | 92,B6,B6,B6,6D,00; -------------------------------------------------------------------------------- /constraints.xdc: -------------------------------------------------------------------------------- 1 | set_property PACKAGE_PIN Y9 [get_ports clk] 2 | set_property PACKAGE_PIN Y21 [get_ports {VGA_B[0]}] 3 | set_property PACKAGE_PIN Y20 [get_ports {VGA_B[1]}] 4 | set_property PACKAGE_PIN AB20 [get_ports {VGA_B[2]}] 5 | set_property PACKAGE_PIN AB19 [get_ports {VGA_B[3]}] 6 | set_property PACKAGE_PIN AB22 [get_ports {VGA_G[0]}] 7 | set_property PACKAGE_PIN AA22 [get_ports {VGA_G[1]}] 8 | set_property PACKAGE_PIN AB21 [get_ports {VGA_G[2]}] 9 | set_property PACKAGE_PIN AA21 [get_ports {VGA_G[3]}] 10 | set_property PACKAGE_PIN AA19 [get_ports {VGA_hSync}] 11 | set_property PACKAGE_PIN Y19 [get_ports {VGA_vSync}] 12 | set_property PACKAGE_PIN V20 [get_ports {VGA_R[0]}] 13 | set_property PACKAGE_PIN U20 [get_ports {VGA_R[1]}] 14 | set_property PACKAGE_PIN V19 [get_ports {VGA_R[2]}] 15 | set_property PACKAGE_PIN V18 [get_ports {VGA_R[3]}] 16 | 17 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_B[0]}] 18 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_B[1]}] 19 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_B[2]}] 20 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_B[3]}] 21 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_G[0]}] 22 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_G[1]}] 23 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_G[2]}] 24 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_G[3]}] 25 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_hSync}] 26 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_vSync}] 27 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_R[0]}] 28 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_R[1]}] 29 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_R[2]}] 30 | set_property IOSTANDARD LVCMOS33 [get_ports {VGA_R[3]}] 31 | 32 | set_property PACKAGE_PIN N15 [get_ports {btnL}] 33 | set_property PACKAGE_PIN R18 [get_ports {btnR}] 34 | set_property PACKAGE_PIN T18 [get_ports {fire}] 35 | set_property PACKAGE_PIN R16 [get_ports {startbtn}] 36 | 37 | set_property IOSTANDARD LVCMOS33 [get_ports {btnL}] 38 | set_property IOSTANDARD LVCMOS33 [get_ports {btnR}] 39 | set_property IOSTANDARD LVCMOS33 [get_ports {fire}] 40 | set_property IOSTANDARD LVCMOS33 [get_ports {startbtn}] 41 | 42 | create_clock -period 10.000 -name clk -waveform {0.000 5.000} [get_ports clk -filter direction==in] 43 | set_property PACKAGE_PIN P16 [get_ports rst] 44 | 45 | set_property IOSTANDARD LVCMOS33 [get_ports clk] 46 | set_property IOSTANDARD LVCMOS33 [get_ports rst] 47 | -------------------------------------------------------------------------------- /hsync.v: -------------------------------------------------------------------------------- 1 | module horizontal(clk,rst,haddr,hsync,display_area); 2 | 3 | input clk,rst; 4 | output reg [9:0] haddr; //mapped address 5 | reg divide_counter; //1/5 divider 6 | reg [10:0] counter; 7 | output reg display_area; 8 | 9 | output hsync; 10 | 11 | always@(posedge clk or posedge rst) 12 | begin 13 | if(rst) 14 | begin 15 | counter = 11'b0; 16 | end 17 | else 18 | begin 19 | if(counter == 11'b110_0011_1111)//1599 20 | begin 21 | counter = 11'b00; 22 | end 23 | else 24 | begin 25 | counter = counter + 1'b1; 26 | end 27 | end 28 | end 29 | 30 | assign hsync = (counter < 11'b000_1100_0000)? 0 : 1;//192 31 | 32 | always@(posedge clk or posedge rst) 33 | begin 34 | if(rst) 35 | begin 36 | divide_counter <= 0; 37 | haddr <= 7'b0; 38 | display_area <= 0; 39 | end 40 | else 41 | begin 42 | if((counter > 11'd289) && (counter < 11'd1568))//rgb up 43 | begin 44 | display_area <= 1'b1; 45 | divide_counter <= divide_counter + 1'b1; 46 | if(divide_counter == 0)begin 47 | haddr <= haddr + 1'b1; 48 | end 49 | end 50 | else 51 | begin 52 | haddr = 7'b0; 53 | divide_counter <= 0; 54 | display_area <= 0; 55 | 56 | end 57 | end 58 | end 59 | 60 | endmodule -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/252364defa79ed69.logs/runme.log: -------------------------------------------------------------------------------- 1 | 2 | *** Running vivado 3 | with args -log blk_mem_gen_6.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source blk_mem_gen_6.tcl 4 | 5 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 6 | 7 | ****** Vivado v2016.4 (64-bit) 8 | **** SW Build 1756540 on Mon Jan 23 19:11:19 MST 2017 9 | **** IP Build 1755317 on Mon Jan 23 20:30:07 MST 2017 10 | ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 11 | 12 | source blk_mem_gen_6.tcl -notrace 13 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 14 | Starting RTL Elaboration : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 1057.559 ; gain = 127.086 ; free physical = 139 ; free virtual = 11570 15 | INFO: [Synth 8-638] synthesizing module 'blk_mem_gen_6' [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_6/synth/blk_mem_gen_6.vhd:70] 16 | INFO: [Synth 8-256] done synthesizing module 'blk_mem_gen_6' (11#1) [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_6/synth/blk_mem_gen_6.vhd:70] 17 | Finished RTL Elaboration : Time (s): cpu = 00:01:40 ; elapsed = 00:01:40 . Memory (MB): peak = 1267.699 ; gain = 337.227 ; free physical = 130 ; free virtual = 10472 18 | Finished RTL Optimization Phase 1 : Time (s): cpu = 00:01:40 ; elapsed = 00:01:41 . Memory (MB): peak = 1267.699 ; gain = 337.227 ; free physical = 129 ; free virtual = 10471 19 | INFO: [Device 21-403] Loading part xc7z020clg484-1 20 | Constraint Validation Runtime : Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.03 . Memory (MB): peak = 1508.535 ; gain = 0.000 ; free physical = 1821 ; free virtual = 11976 21 | Finished Constraint Validation : Time (s): cpu = 00:01:50 ; elapsed = 00:02:31 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2383 ; free virtual = 12538 22 | Finished Loading Part and Timing Information : Time (s): cpu = 00:01:50 ; elapsed = 00:02:31 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2383 ; free virtual = 12538 23 | Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:01:50 ; elapsed = 00:02:31 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2383 ; free virtual = 12538 24 | Finished RTL Optimization Phase 2 : Time (s): cpu = 00:01:51 ; elapsed = 00:02:32 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2371 ; free virtual = 12527 25 | Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:01:51 ; elapsed = 00:02:32 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2356 ; free virtual = 12511 26 | Finished Applying XDC Timing Constraints : Time (s): cpu = 00:01:57 ; elapsed = 00:02:38 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2293 ; free virtual = 12448 27 | Finished Timing Optimization : Time (s): cpu = 00:01:58 ; elapsed = 00:02:39 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2291 ; free virtual = 12446 28 | Finished Technology Mapping : Time (s): cpu = 00:01:58 ; elapsed = 00:02:39 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2281 ; free virtual = 12436 29 | Finished IO Insertion : Time (s): cpu = 00:01:58 ; elapsed = 00:02:39 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2281 ; free virtual = 12436 30 | Finished Renaming Generated Instances : Time (s): cpu = 00:01:58 ; elapsed = 00:02:39 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2281 ; free virtual = 12436 31 | Finished Rebuilding User Hierarchy : Time (s): cpu = 00:01:58 ; elapsed = 00:02:39 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2281 ; free virtual = 12436 32 | Finished Renaming Generated Ports : Time (s): cpu = 00:01:58 ; elapsed = 00:02:39 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2281 ; free virtual = 12436 33 | Finished Handling Custom Attributes : Time (s): cpu = 00:01:58 ; elapsed = 00:02:39 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2281 ; free virtual = 12436 34 | Finished Renaming Generated Nets : Time (s): cpu = 00:01:58 ; elapsed = 00:02:39 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2281 ; free virtual = 12436 35 | 36 | Report Cell Usage: 37 | +------+------------+------+ 38 | | |Cell |Count | 39 | +------+------------+------+ 40 | |1 |LUT5 | 8| 41 | |2 |LUT6 | 95| 42 | |3 |MUXF7 | 32| 43 | |4 |RAMB36E1 | 1| 44 | |5 |RAMB36E1_1 | 1| 45 | |6 |RAMB36E1_10 | 1| 46 | |7 |RAMB36E1_11 | 1| 47 | |8 |RAMB36E1_12 | 1| 48 | |9 |RAMB36E1_13 | 1| 49 | |10 |RAMB36E1_14 | 1| 50 | |11 |RAMB36E1_15 | 1| 51 | |12 |RAMB36E1_16 | 1| 52 | |13 |RAMB36E1_17 | 1| 53 | |14 |RAMB36E1_18 | 1| 54 | |15 |RAMB36E1_19 | 1| 55 | |16 |RAMB36E1_2 | 1| 56 | |17 |RAMB36E1_20 | 1| 57 | |18 |RAMB36E1_21 | 1| 58 | |19 |RAMB36E1_22 | 1| 59 | |20 |RAMB36E1_23 | 1| 60 | |21 |RAMB36E1_24 | 1| 61 | |22 |RAMB36E1_25 | 1| 62 | |23 |RAMB36E1_26 | 1| 63 | |24 |RAMB36E1_27 | 1| 64 | |25 |RAMB36E1_28 | 1| 65 | |26 |RAMB36E1_29 | 1| 66 | |27 |RAMB36E1_3 | 1| 67 | |28 |RAMB36E1_30 | 1| 68 | |29 |RAMB36E1_4 | 1| 69 | |30 |RAMB36E1_5 | 1| 70 | |31 |RAMB36E1_6 | 1| 71 | |32 |RAMB36E1_7 | 1| 72 | |33 |RAMB36E1_8 | 1| 73 | |34 |RAMB36E1_9 | 1| 74 | |35 |FDRE | 10| 75 | +------+------------+------+ 76 | Finished Writing Synthesis Report : Time (s): cpu = 00:01:58 ; elapsed = 00:02:39 . Memory (MB): peak = 1508.535 ; gain = 578.062 ; free physical = 2281 ; free virtual = 12436 77 | synth_design: Time (s): cpu = 00:01:56 ; elapsed = 00:02:37 . Memory (MB): peak = 1508.535 ; gain = 510.559 ; free physical = 2262 ; free virtual = 12417 78 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/252364defa79ed69/blk_mem_gen_6.dcp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nikkatsa7/SpaceInvadersFpgaGame/bb3e97b9ab3f9b6dd7c274d5660d7f510696bb67/space_invaders/space_invaders.cache/ip/252364defa79ed69/blk_mem_gen_6.dcp -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/252364defa79ed69/blk_mem_gen_6_stub.v: -------------------------------------------------------------------------------- 1 | // Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | // -------------------------------------------------------------------------------- 3 | // Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | // Date : Mon Mar 5 11:24:27 2018 5 | // Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | // Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | // decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_6_stub.v 8 | // Design : blk_mem_gen_6 9 | // Purpose : Stub declaration of top-level module interface 10 | // Device : xc7z020clg484-1 11 | // -------------------------------------------------------------------------------- 12 | 13 | // This empty module with port declaration file causes synthesis tools to infer a black box for IP. 14 | // The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion. 15 | // Please paste the declaration into a Verilog source file or add the file as an additional source. 16 | (* x_core_info = "blk_mem_gen_v8_3_5,Vivado 2016.4" *) 17 | module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(clka, ena, wea, addra, dina, douta) 18 | /* synthesis syn_black_box black_box_pad_pin="clka,ena,wea[0:0],addra[16:0],dina[7:0],douta[7:0]" */; 19 | input clka; 20 | input ena; 21 | input [0:0]wea; 22 | input [16:0]addra; 23 | input [7:0]dina; 24 | output [7:0]douta; 25 | endmodule 26 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/252364defa79ed69/blk_mem_gen_6_stub.vhdl: -------------------------------------------------------------------------------- 1 | -- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | -- -------------------------------------------------------------------------------- 3 | -- Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | -- Date : Mon Mar 5 11:24:27 2018 5 | -- Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | -- Command : write_vhdl -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | -- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_6_stub.vhdl 8 | -- Design : blk_mem_gen_6 9 | -- Purpose : Stub declaration of top-level module interface 10 | -- Device : xc7z020clg484-1 11 | -- -------------------------------------------------------------------------------- 12 | library IEEE; 13 | use IEEE.STD_LOGIC_1164.ALL; 14 | 15 | entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 16 | Port ( 17 | clka : in STD_LOGIC; 18 | ena : in STD_LOGIC; 19 | wea : in STD_LOGIC_VECTOR ( 0 to 0 ); 20 | addra : in STD_LOGIC_VECTOR ( 16 downto 0 ); 21 | dina : in STD_LOGIC_VECTOR ( 7 downto 0 ); 22 | douta : out STD_LOGIC_VECTOR ( 7 downto 0 ) 23 | ); 24 | 25 | end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix; 26 | 27 | architecture stub of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 28 | attribute syn_black_box : boolean; 29 | attribute black_box_pad_pin : string; 30 | attribute syn_black_box of stub : architecture is true; 31 | attribute black_box_pad_pin of stub : architecture is "clka,ena,wea[0:0],addra[16:0],dina[7:0],douta[7:0]"; 32 | attribute x_core_info : string; 33 | attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4"; 34 | begin 35 | end; 36 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/45517b27f3e86e7c.logs/runme.log: -------------------------------------------------------------------------------- 1 | 2 | *** Running vivado 3 | with args -log blk_mem_gen_0.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source blk_mem_gen_0.tcl 4 | 5 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 6 | 7 | ****** Vivado v2016.4 (64-bit) 8 | **** SW Build 1756540 on Mon Jan 23 19:11:19 MST 2017 9 | **** IP Build 1755317 on Mon Jan 23 20:30:07 MST 2017 10 | ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 11 | 12 | source blk_mem_gen_0.tcl -notrace 13 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 14 | Starting RTL Elaboration : Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 1058.559 ; gain = 128.086 ; free physical = 2021 ; free virtual = 13234 15 | INFO: [Synth 8-638] synthesizing module 'blk_mem_gen_0' [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_0/synth/blk_mem_gen_0.vhd:70] 16 | INFO: [Synth 8-256] done synthesizing module 'blk_mem_gen_0' (9#1) [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_0/synth/blk_mem_gen_0.vhd:70] 17 | Finished RTL Elaboration : Time (s): cpu = 00:00:43 ; elapsed = 00:00:43 . Memory (MB): peak = 1257.699 ; gain = 327.227 ; free physical = 1814 ; free virtual = 13029 18 | Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:43 ; elapsed = 00:00:43 . Memory (MB): peak = 1257.699 ; gain = 327.227 ; free physical = 1814 ; free virtual = 13029 19 | INFO: [Device 21-403] Loading part xc7z020clg484-1 20 | Constraint Validation Runtime : Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 1406.535 ; gain = 0.000 ; free physical = 1758 ; free virtual = 12994 21 | Finished Constraint Validation : Time (s): cpu = 00:00:51 ; elapsed = 00:01:32 . Memory (MB): peak = 1406.535 ; gain = 476.062 ; free physical = 1757 ; free virtual = 12994 22 | Finished Loading Part and Timing Information : Time (s): cpu = 00:00:51 ; elapsed = 00:01:32 . Memory (MB): peak = 1406.535 ; gain = 476.062 ; free physical = 1757 ; free virtual = 12994 23 | Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:51 ; elapsed = 00:01:32 . Memory (MB): peak = 1406.535 ; gain = 476.062 ; free physical = 1757 ; free virtual = 12994 24 | Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:51 ; elapsed = 00:01:32 . Memory (MB): peak = 1406.535 ; gain = 476.062 ; free physical = 1751 ; free virtual = 12988 25 | Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:52 ; elapsed = 00:01:32 . Memory (MB): peak = 1406.535 ; gain = 476.062 ; free physical = 1751 ; free virtual = 12988 26 | Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:58 ; elapsed = 00:01:38 . Memory (MB): peak = 1406.535 ; gain = 476.062 ; free physical = 1704 ; free virtual = 12948 27 | Finished Timing Optimization : Time (s): cpu = 00:00:58 ; elapsed = 00:01:38 . Memory (MB): peak = 1406.535 ; gain = 476.062 ; free physical = 1703 ; free virtual = 12948 28 | Finished Technology Mapping : Time (s): cpu = 00:00:58 ; elapsed = 00:01:38 . Memory (MB): peak = 1412.535 ; gain = 482.062 ; free physical = 1694 ; free virtual = 12939 29 | Finished IO Insertion : Time (s): cpu = 00:00:58 ; elapsed = 00:01:39 . Memory (MB): peak = 1412.535 ; gain = 482.062 ; free physical = 1694 ; free virtual = 12939 30 | Finished Renaming Generated Instances : Time (s): cpu = 00:00:58 ; elapsed = 00:01:39 . Memory (MB): peak = 1412.535 ; gain = 482.062 ; free physical = 1694 ; free virtual = 12939 31 | Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:58 ; elapsed = 00:01:39 . Memory (MB): peak = 1412.535 ; gain = 482.062 ; free physical = 1694 ; free virtual = 12939 32 | Finished Renaming Generated Ports : Time (s): cpu = 00:00:58 ; elapsed = 00:01:39 . Memory (MB): peak = 1412.535 ; gain = 482.062 ; free physical = 1694 ; free virtual = 12939 33 | Finished Handling Custom Attributes : Time (s): cpu = 00:00:58 ; elapsed = 00:01:39 . Memory (MB): peak = 1412.535 ; gain = 482.062 ; free physical = 1694 ; free virtual = 12938 34 | Finished Renaming Generated Nets : Time (s): cpu = 00:00:58 ; elapsed = 00:01:39 . Memory (MB): peak = 1412.535 ; gain = 482.062 ; free physical = 1694 ; free virtual = 12938 35 | 36 | Report Cell Usage: 37 | +------+---------+------+ 38 | | |Cell |Count | 39 | +------+---------+------+ 40 | |1 |RAMB18E1 | 1| 41 | +------+---------+------+ 42 | Finished Writing Synthesis Report : Time (s): cpu = 00:00:58 ; elapsed = 00:01:39 . Memory (MB): peak = 1412.535 ; gain = 482.062 ; free physical = 1694 ; free virtual = 12938 43 | synth_design: Time (s): cpu = 00:00:57 ; elapsed = 00:01:38 . Memory (MB): peak = 1431.051 ; gain = 433.074 ; free physical = 1674 ; free virtual = 12920 44 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/45517b27f3e86e7c/45517b27f3e86e7c.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | ipcache 5 | 45517b27f3e86e7c 6 | 0 7 | 8 | 9 | blk_mem_gen_0 10 | 11 | 12 | 4 13 | Memory_Slave 14 | AXI4_Full 15 | false 16 | Minimum_Area 17 | false 18 | 9 19 | NONE 20 | ../../../../../spaceship.coe 21 | ALL 22 | blk_mem_gen_0 23 | false 24 | false 25 | false 26 | false 27 | false 28 | false 29 | false 30 | false 31 | false 32 | Use_ENA_Pin 33 | Always_Enabled 34 | Single_Bit_Error_Injection 35 | false 36 | Native 37 | true 38 | no_mem_loaded 39 | Single_Port_RAM 40 | WRITE_FIRST 41 | WRITE_FIRST 42 | 0 43 | 0 44 | BRAM 45 | 0 46 | 100 47 | 100 48 | 50 49 | 0 50 | 0 51 | 0 52 | 8kx2 53 | false 54 | false 55 | 8 56 | 8 57 | false 58 | true 59 | false 60 | false 61 | 0 62 | false 63 | false 64 | CE 65 | CE 66 | SYNC 67 | false 68 | false 69 | false 70 | false 71 | false 72 | false 73 | false 74 | 496 75 | 8 76 | 8 77 | No_ECC 78 | false 79 | false 80 | false 81 | Stand_Alone 82 | zynq 83 | em.avnet.com:zed:part0:1.3 84 | xc7z020 85 | clg484 86 | VERILOG 87 | 88 | MIXED 89 | -1 90 | 91 | TRUE 92 | TRUE 93 | eaba6970 94 | 45517b27f3e86e7c 95 | IP_Unknown 96 | 5 97 | TRUE 98 | . 99 | 100 | . 101 | 2016.4 102 | GLOBAL 103 | 104 | 105 | 106 | 107 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/45517b27f3e86e7c/blk_mem_gen_0.dcp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nikkatsa7/SpaceInvadersFpgaGame/bb3e97b9ab3f9b6dd7c274d5660d7f510696bb67/space_invaders/space_invaders.cache/ip/45517b27f3e86e7c/blk_mem_gen_0.dcp -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/45517b27f3e86e7c/blk_mem_gen_0_stub.v: -------------------------------------------------------------------------------- 1 | // Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | // -------------------------------------------------------------------------------- 3 | // Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | // Date : Mon Mar 5 11:06:28 2018 5 | // Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | // Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | // decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_0_stub.v 8 | // Design : blk_mem_gen_0 9 | // Purpose : Stub declaration of top-level module interface 10 | // Device : xc7z020clg484-1 11 | // -------------------------------------------------------------------------------- 12 | 13 | // This empty module with port declaration file causes synthesis tools to infer a black box for IP. 14 | // The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion. 15 | // Please paste the declaration into a Verilog source file or add the file as an additional source. 16 | (* x_core_info = "blk_mem_gen_v8_3_5,Vivado 2016.4" *) 17 | module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(clka, ena, wea, addra, dina, douta) 18 | /* synthesis syn_black_box black_box_pad_pin="clka,ena,wea[0:0],addra[8:0],dina[7:0],douta[7:0]" */; 19 | input clka; 20 | input ena; 21 | input [0:0]wea; 22 | input [8:0]addra; 23 | input [7:0]dina; 24 | output [7:0]douta; 25 | endmodule 26 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/45517b27f3e86e7c/blk_mem_gen_0_stub.vhdl: -------------------------------------------------------------------------------- 1 | -- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | -- -------------------------------------------------------------------------------- 3 | -- Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | -- Date : Mon Mar 5 11:06:28 2018 5 | -- Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | -- Command : write_vhdl -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | -- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_0_stub.vhdl 8 | -- Design : blk_mem_gen_0 9 | -- Purpose : Stub declaration of top-level module interface 10 | -- Device : xc7z020clg484-1 11 | -- -------------------------------------------------------------------------------- 12 | library IEEE; 13 | use IEEE.STD_LOGIC_1164.ALL; 14 | 15 | entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 16 | Port ( 17 | clka : in STD_LOGIC; 18 | ena : in STD_LOGIC; 19 | wea : in STD_LOGIC_VECTOR ( 0 to 0 ); 20 | addra : in STD_LOGIC_VECTOR ( 8 downto 0 ); 21 | dina : in STD_LOGIC_VECTOR ( 7 downto 0 ); 22 | douta : out STD_LOGIC_VECTOR ( 7 downto 0 ) 23 | ); 24 | 25 | end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix; 26 | 27 | architecture stub of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 28 | attribute syn_black_box : boolean; 29 | attribute black_box_pad_pin : string; 30 | attribute syn_black_box of stub : architecture is true; 31 | attribute black_box_pad_pin of stub : architecture is "clka,ena,wea[0:0],addra[8:0],dina[7:0],douta[7:0]"; 32 | attribute x_core_info : string; 33 | attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4"; 34 | begin 35 | end; 36 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/70c61db667320b22.logs/runme.log: -------------------------------------------------------------------------------- 1 | 2 | *** Running vivado 3 | with args -log blk_mem_gen_5.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source blk_mem_gen_5.tcl 4 | 5 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 6 | 7 | ****** Vivado v2016.4 (64-bit) 8 | **** SW Build 1756540 on Mon Jan 23 19:11:19 MST 2017 9 | **** IP Build 1755317 on Mon Jan 23 20:30:07 MST 2017 10 | ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 11 | 12 | source blk_mem_gen_5.tcl -notrace 13 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 14 | Starting RTL Elaboration : Time (s): cpu = 00:00:10 ; elapsed = 00:00:10 . Memory (MB): peak = 1058.566 ; gain = 128.086 ; free physical = 124 ; free virtual = 11579 15 | INFO: [Synth 8-638] synthesizing module 'blk_mem_gen_5' [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_5/synth/blk_mem_gen_5.vhd:70] 16 | INFO: [Synth 8-256] done synthesizing module 'blk_mem_gen_5' (11#1) [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_5/synth/blk_mem_gen_5.vhd:70] 17 | Finished RTL Elaboration : Time (s): cpu = 00:01:19 ; elapsed = 00:01:20 . Memory (MB): peak = 1258.707 ; gain = 328.227 ; free physical = 133 ; free virtual = 10492 18 | Finished RTL Optimization Phase 1 : Time (s): cpu = 00:01:19 ; elapsed = 00:01:20 . Memory (MB): peak = 1258.707 ; gain = 328.227 ; free physical = 133 ; free virtual = 10492 19 | INFO: [Device 21-403] Loading part xc7z020clg484-1 20 | Constraint Validation Runtime : Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.02 . Memory (MB): peak = 1455.543 ; gain = 0.000 ; free physical = 607 ; free virtual = 10751 21 | Finished Constraint Validation : Time (s): cpu = 00:01:34 ; elapsed = 00:02:15 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 506 ; free virtual = 10657 22 | Finished Loading Part and Timing Information : Time (s): cpu = 00:01:34 ; elapsed = 00:02:15 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 506 ; free virtual = 10657 23 | Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:01:34 ; elapsed = 00:02:15 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 506 ; free virtual = 10657 24 | Finished RTL Optimization Phase 2 : Time (s): cpu = 00:01:35 ; elapsed = 00:02:16 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 502 ; free virtual = 10653 25 | Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:01:35 ; elapsed = 00:02:16 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 486 ; free virtual = 10637 26 | Finished Applying XDC Timing Constraints : Time (s): cpu = 00:01:43 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1903 ; free virtual = 12057 27 | Finished Timing Optimization : Time (s): cpu = 00:01:43 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1902 ; free virtual = 12056 28 | Finished Technology Mapping : Time (s): cpu = 00:01:43 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1893 ; free virtual = 12047 29 | Finished IO Insertion : Time (s): cpu = 00:01:44 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1893 ; free virtual = 12047 30 | Finished Renaming Generated Instances : Time (s): cpu = 00:01:44 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1893 ; free virtual = 12047 31 | Finished Rebuilding User Hierarchy : Time (s): cpu = 00:01:44 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1893 ; free virtual = 12047 32 | Finished Renaming Generated Ports : Time (s): cpu = 00:01:44 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1893 ; free virtual = 12047 33 | Finished Handling Custom Attributes : Time (s): cpu = 00:01:44 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1893 ; free virtual = 12047 34 | Finished Renaming Generated Nets : Time (s): cpu = 00:01:44 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1893 ; free virtual = 12047 35 | 36 | Report Cell Usage: 37 | +------+-----------+------+ 38 | | |Cell |Count | 39 | +------+-----------+------+ 40 | |1 |LUT4 | 8| 41 | |2 |LUT6 | 16| 42 | |3 |MUXF7 | 8| 43 | |4 |RAMB36E1 | 1| 44 | |5 |RAMB36E1_1 | 1| 45 | |6 |RAMB36E1_2 | 1| 46 | |7 |RAMB36E1_3 | 1| 47 | |8 |RAMB36E1_4 | 1| 48 | |9 |RAMB36E1_5 | 1| 49 | |10 |RAMB36E1_6 | 1| 50 | |11 |RAMB36E1_7 | 1| 51 | |12 |FDRE | 6| 52 | +------+-----------+------+ 53 | Finished Writing Synthesis Report : Time (s): cpu = 00:01:44 ; elapsed = 00:02:25 . Memory (MB): peak = 1455.543 ; gain = 525.062 ; free physical = 1893 ; free virtual = 12047 54 | synth_design: Time (s): cpu = 00:01:43 ; elapsed = 00:02:23 . Memory (MB): peak = 1455.543 ; gain = 457.559 ; free physical = 1873 ; free virtual = 12026 55 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/70c61db667320b22/70c61db667320b22.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | ipcache 5 | 70c61db667320b22 6 | 0 7 | 8 | 9 | blk_mem_gen_5 10 | 11 | 12 | 4 13 | Memory_Slave 14 | AXI4_Full 15 | false 16 | Minimum_Area 17 | false 18 | 9 19 | NONE 20 | ../../../../../gameover.coe 21 | ALL 22 | blk_mem_gen_5 23 | false 24 | false 25 | false 26 | false 27 | false 28 | false 29 | false 30 | false 31 | false 32 | Use_ENA_Pin 33 | Always_Enabled 34 | Single_Bit_Error_Injection 35 | false 36 | Native 37 | true 38 | no_mem_loaded 39 | Single_Port_RAM 40 | WRITE_FIRST 41 | WRITE_FIRST 42 | 0 43 | 0 44 | BRAM 45 | 0 46 | 100 47 | 100 48 | 50 49 | 0 50 | 0 51 | 0 52 | 8kx2 53 | false 54 | false 55 | 8 56 | 8 57 | false 58 | true 59 | false 60 | false 61 | 0 62 | false 63 | false 64 | CE 65 | CE 66 | SYNC 67 | false 68 | false 69 | false 70 | false 71 | false 72 | false 73 | false 74 | 32592 75 | 8 76 | 8 77 | No_ECC 78 | false 79 | false 80 | false 81 | Stand_Alone 82 | zynq 83 | em.avnet.com:zed:part0:1.3 84 | xc7z020 85 | clg484 86 | VERILOG 87 | 88 | MIXED 89 | -1 90 | 91 | TRUE 92 | TRUE 93 | eaba6970 94 | 70c61db667320b22 95 | IP_Unknown 96 | 5 97 | TRUE 98 | . 99 | 100 | . 101 | 2016.4 102 | GLOBAL 103 | 104 | 105 | 106 | 107 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/70c61db667320b22/blk_mem_gen_5.dcp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nikkatsa7/SpaceInvadersFpgaGame/bb3e97b9ab3f9b6dd7c274d5660d7f510696bb67/space_invaders/space_invaders.cache/ip/70c61db667320b22/blk_mem_gen_5.dcp -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/70c61db667320b22/blk_mem_gen_5_stub.v: -------------------------------------------------------------------------------- 1 | // Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | // -------------------------------------------------------------------------------- 3 | // Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | // Date : Mon Mar 5 11:24:13 2018 5 | // Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | // Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | // decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_5_stub.v 8 | // Design : blk_mem_gen_5 9 | // Purpose : Stub declaration of top-level module interface 10 | // Device : xc7z020clg484-1 11 | // -------------------------------------------------------------------------------- 12 | 13 | // This empty module with port declaration file causes synthesis tools to infer a black box for IP. 14 | // The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion. 15 | // Please paste the declaration into a Verilog source file or add the file as an additional source. 16 | (* x_core_info = "blk_mem_gen_v8_3_5,Vivado 2016.4" *) 17 | module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(clka, ena, wea, addra, dina, douta) 18 | /* synthesis syn_black_box black_box_pad_pin="clka,ena,wea[0:0],addra[14:0],dina[7:0],douta[7:0]" */; 19 | input clka; 20 | input ena; 21 | input [0:0]wea; 22 | input [14:0]addra; 23 | input [7:0]dina; 24 | output [7:0]douta; 25 | endmodule 26 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/70c61db667320b22/blk_mem_gen_5_stub.vhdl: -------------------------------------------------------------------------------- 1 | -- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | -- -------------------------------------------------------------------------------- 3 | -- Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | -- Date : Mon Mar 5 11:24:13 2018 5 | -- Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | -- Command : write_vhdl -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | -- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_5_stub.vhdl 8 | -- Design : blk_mem_gen_5 9 | -- Purpose : Stub declaration of top-level module interface 10 | -- Device : xc7z020clg484-1 11 | -- -------------------------------------------------------------------------------- 12 | library IEEE; 13 | use IEEE.STD_LOGIC_1164.ALL; 14 | 15 | entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 16 | Port ( 17 | clka : in STD_LOGIC; 18 | ena : in STD_LOGIC; 19 | wea : in STD_LOGIC_VECTOR ( 0 to 0 ); 20 | addra : in STD_LOGIC_VECTOR ( 14 downto 0 ); 21 | dina : in STD_LOGIC_VECTOR ( 7 downto 0 ); 22 | douta : out STD_LOGIC_VECTOR ( 7 downto 0 ) 23 | ); 24 | 25 | end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix; 26 | 27 | architecture stub of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 28 | attribute syn_black_box : boolean; 29 | attribute black_box_pad_pin : string; 30 | attribute syn_black_box of stub : architecture is true; 31 | attribute black_box_pad_pin of stub : architecture is "clka,ena,wea[0:0],addra[14:0],dina[7:0],douta[7:0]"; 32 | attribute x_core_info : string; 33 | attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4"; 34 | begin 35 | end; 36 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/9e71f7e25cb01dce.logs/runme.log: -------------------------------------------------------------------------------- 1 | 2 | *** Running vivado 3 | with args -log blk_mem_gen_1.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source blk_mem_gen_1.tcl 4 | 5 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 6 | 7 | ****** Vivado v2016.4 (64-bit) 8 | **** SW Build 1756540 on Mon Jan 23 19:11:19 MST 2017 9 | **** IP Build 1755317 on Mon Jan 23 20:30:07 MST 2017 10 | ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 11 | 12 | source blk_mem_gen_1.tcl -notrace 13 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 14 | Starting RTL Elaboration : Time (s): cpu = 00:00:11 ; elapsed = 00:00:11 . Memory (MB): peak = 1058.559 ; gain = 128.086 ; free physical = 122 ; free virtual = 11623 15 | INFO: [Synth 8-638] synthesizing module 'blk_mem_gen_1' [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_1/synth/blk_mem_gen_1.vhd:70] 16 | INFO: [Synth 8-256] done synthesizing module 'blk_mem_gen_1' (9#1) [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_1/synth/blk_mem_gen_1.vhd:70] 17 | Finished RTL Elaboration : Time (s): cpu = 00:01:18 ; elapsed = 00:01:19 . Memory (MB): peak = 1257.699 ; gain = 327.227 ; free physical = 135 ; free virtual = 10493 18 | Finished RTL Optimization Phase 1 : Time (s): cpu = 00:01:18 ; elapsed = 00:01:19 . Memory (MB): peak = 1257.699 ; gain = 327.227 ; free physical = 135 ; free virtual = 10493 19 | INFO: [Device 21-403] Loading part xc7z020clg484-1 20 | Constraint Validation Runtime : Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 1407.535 ; gain = 1.000 ; free physical = 131 ; free virtual = 10298 21 | Finished Constraint Validation : Time (s): cpu = 00:01:31 ; elapsed = 00:02:12 . Memory (MB): peak = 1407.535 ; gain = 477.062 ; free physical = 606 ; free virtual = 10749 22 | Finished Loading Part and Timing Information : Time (s): cpu = 00:01:31 ; elapsed = 00:02:12 . Memory (MB): peak = 1407.535 ; gain = 477.062 ; free physical = 606 ; free virtual = 10749 23 | Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:01:31 ; elapsed = 00:02:12 . Memory (MB): peak = 1407.535 ; gain = 477.062 ; free physical = 606 ; free virtual = 10749 24 | Finished RTL Optimization Phase 2 : Time (s): cpu = 00:01:31 ; elapsed = 00:02:12 . Memory (MB): peak = 1407.535 ; gain = 477.062 ; free physical = 599 ; free virtual = 10742 25 | Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:01:31 ; elapsed = 00:02:12 . Memory (MB): peak = 1407.535 ; gain = 477.062 ; free physical = 589 ; free virtual = 10739 26 | Finished Applying XDC Timing Constraints : Time (s): cpu = 00:01:41 ; elapsed = 00:02:22 . Memory (MB): peak = 1407.535 ; gain = 477.062 ; free physical = 911 ; free virtual = 11063 27 | Finished Timing Optimization : Time (s): cpu = 00:01:41 ; elapsed = 00:02:22 . Memory (MB): peak = 1407.535 ; gain = 477.062 ; free physical = 911 ; free virtual = 11063 28 | Finished Technology Mapping : Time (s): cpu = 00:01:41 ; elapsed = 00:02:22 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 902 ; free virtual = 11054 29 | Finished IO Insertion : Time (s): cpu = 00:01:42 ; elapsed = 00:02:23 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 888 ; free virtual = 11039 30 | Finished Renaming Generated Instances : Time (s): cpu = 00:01:42 ; elapsed = 00:02:23 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 888 ; free virtual = 11039 31 | Finished Rebuilding User Hierarchy : Time (s): cpu = 00:01:42 ; elapsed = 00:02:23 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 888 ; free virtual = 11039 32 | Finished Renaming Generated Ports : Time (s): cpu = 00:01:42 ; elapsed = 00:02:23 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 888 ; free virtual = 11039 33 | Finished Handling Custom Attributes : Time (s): cpu = 00:01:42 ; elapsed = 00:02:23 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 887 ; free virtual = 11039 34 | Finished Renaming Generated Nets : Time (s): cpu = 00:01:42 ; elapsed = 00:02:23 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 887 ; free virtual = 11039 35 | 36 | Report Cell Usage: 37 | +------+---------+------+ 38 | | |Cell |Count | 39 | +------+---------+------+ 40 | |1 |RAMB18E1 | 1| 41 | +------+---------+------+ 42 | Finished Writing Synthesis Report : Time (s): cpu = 00:01:42 ; elapsed = 00:02:23 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 887 ; free virtual = 11039 43 | synth_design: Time (s): cpu = 00:01:40 ; elapsed = 00:02:20 . Memory (MB): peak = 1431.051 ; gain = 433.074 ; free physical = 851 ; free virtual = 11006 44 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/9e71f7e25cb01dce/9e71f7e25cb01dce.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | ipcache 5 | 9e71f7e25cb01dce 6 | 0 7 | 8 | 9 | blk_mem_gen_1 10 | 11 | 12 | 4 13 | Memory_Slave 14 | AXI4_Full 15 | false 16 | Minimum_Area 17 | false 18 | 9 19 | NONE 20 | ../../../../../alien.coe 21 | ALL 22 | blk_mem_gen_1 23 | false 24 | false 25 | false 26 | false 27 | false 28 | false 29 | false 30 | false 31 | false 32 | Use_ENA_Pin 33 | Always_Enabled 34 | Single_Bit_Error_Injection 35 | false 36 | Native 37 | true 38 | no_mem_loaded 39 | Single_Port_RAM 40 | WRITE_FIRST 41 | WRITE_FIRST 42 | 0 43 | 0 44 | BRAM 45 | 0 46 | 100 47 | 100 48 | 50 49 | 0 50 | 0 51 | 0 52 | 8kx2 53 | false 54 | false 55 | 8 56 | 8 57 | false 58 | true 59 | false 60 | false 61 | 0 62 | false 63 | false 64 | CE 65 | CE 66 | SYNC 67 | false 68 | false 69 | false 70 | false 71 | false 72 | false 73 | false 74 | 660 75 | 8 76 | 8 77 | No_ECC 78 | false 79 | false 80 | false 81 | Stand_Alone 82 | zynq 83 | em.avnet.com:zed:part0:1.3 84 | xc7z020 85 | clg484 86 | VERILOG 87 | 88 | MIXED 89 | -1 90 | 91 | TRUE 92 | TRUE 93 | eaba6970 94 | 9e71f7e25cb01dce 95 | IP_Unknown 96 | 5 97 | TRUE 98 | . 99 | 100 | . 101 | 2016.4 102 | GLOBAL 103 | 104 | 105 | 106 | 107 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/9e71f7e25cb01dce/blk_mem_gen_1.dcp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nikkatsa7/SpaceInvadersFpgaGame/bb3e97b9ab3f9b6dd7c274d5660d7f510696bb67/space_invaders/space_invaders.cache/ip/9e71f7e25cb01dce/blk_mem_gen_1.dcp -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/9e71f7e25cb01dce/blk_mem_gen_1_stub.v: -------------------------------------------------------------------------------- 1 | // Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | // -------------------------------------------------------------------------------- 3 | // Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | // Date : Mon Mar 5 11:24:10 2018 5 | // Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | // Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | // decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_1_stub.v 8 | // Design : blk_mem_gen_1 9 | // Purpose : Stub declaration of top-level module interface 10 | // Device : xc7z020clg484-1 11 | // -------------------------------------------------------------------------------- 12 | 13 | // This empty module with port declaration file causes synthesis tools to infer a black box for IP. 14 | // The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion. 15 | // Please paste the declaration into a Verilog source file or add the file as an additional source. 16 | (* x_core_info = "blk_mem_gen_v8_3_5,Vivado 2016.4" *) 17 | module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(clka, ena, wea, addra, dina, douta) 18 | /* synthesis syn_black_box black_box_pad_pin="clka,ena,wea[0:0],addra[9:0],dina[7:0],douta[7:0]" */; 19 | input clka; 20 | input ena; 21 | input [0:0]wea; 22 | input [9:0]addra; 23 | input [7:0]dina; 24 | output [7:0]douta; 25 | endmodule 26 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/9e71f7e25cb01dce/blk_mem_gen_1_stub.vhdl: -------------------------------------------------------------------------------- 1 | -- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | -- -------------------------------------------------------------------------------- 3 | -- Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | -- Date : Mon Mar 5 11:24:10 2018 5 | -- Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | -- Command : write_vhdl -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | -- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_1_stub.vhdl 8 | -- Design : blk_mem_gen_1 9 | -- Purpose : Stub declaration of top-level module interface 10 | -- Device : xc7z020clg484-1 11 | -- -------------------------------------------------------------------------------- 12 | library IEEE; 13 | use IEEE.STD_LOGIC_1164.ALL; 14 | 15 | entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 16 | Port ( 17 | clka : in STD_LOGIC; 18 | ena : in STD_LOGIC; 19 | wea : in STD_LOGIC_VECTOR ( 0 to 0 ); 20 | addra : in STD_LOGIC_VECTOR ( 9 downto 0 ); 21 | dina : in STD_LOGIC_VECTOR ( 7 downto 0 ); 22 | douta : out STD_LOGIC_VECTOR ( 7 downto 0 ) 23 | ); 24 | 25 | end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix; 26 | 27 | architecture stub of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 28 | attribute syn_black_box : boolean; 29 | attribute black_box_pad_pin : string; 30 | attribute syn_black_box of stub : architecture is true; 31 | attribute black_box_pad_pin of stub : architecture is "clka,ena,wea[0:0],addra[9:0],dina[7:0],douta[7:0]"; 32 | attribute x_core_info : string; 33 | attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4"; 34 | begin 35 | end; 36 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/b003169092ecbcb9.logs/runme.log: -------------------------------------------------------------------------------- 1 | 2 | *** Running vivado 3 | with args -log blk_mem_gen_2.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source blk_mem_gen_2.tcl 4 | 5 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 6 | 7 | ****** Vivado v2016.4 (64-bit) 8 | **** SW Build 1756540 on Mon Jan 23 19:11:19 MST 2017 9 | **** IP Build 1755317 on Mon Jan 23 20:30:07 MST 2017 10 | ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 11 | 12 | source blk_mem_gen_2.tcl -notrace 13 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 14 | Starting RTL Elaboration : Time (s): cpu = 00:00:10 ; elapsed = 00:00:10 . Memory (MB): peak = 1057.559 ; gain = 127.086 ; free physical = 125 ; free virtual = 11639 15 | INFO: [Synth 8-638] synthesizing module 'blk_mem_gen_2' [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_2/synth/blk_mem_gen_2.vhd:70] 16 | INFO: [Synth 8-256] done synthesizing module 'blk_mem_gen_2' (9#1) [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_2/synth/blk_mem_gen_2.vhd:70] 17 | Finished RTL Elaboration : Time (s): cpu = 00:01:17 ; elapsed = 00:01:17 . Memory (MB): peak = 1256.699 ; gain = 326.227 ; free physical = 135 ; free virtual = 10493 18 | Finished RTL Optimization Phase 1 : Time (s): cpu = 00:01:17 ; elapsed = 00:01:17 . Memory (MB): peak = 1256.699 ; gain = 326.227 ; free physical = 135 ; free virtual = 10493 19 | INFO: [Device 21-403] Loading part xc7z020clg484-1 20 | Constraint Validation Runtime : Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 1405.535 ; gain = 0.000 ; free physical = 125 ; free virtual = 10386 21 | Finished Constraint Validation : Time (s): cpu = 00:01:26 ; elapsed = 00:02:07 . Memory (MB): peak = 1405.535 ; gain = 475.062 ; free physical = 648 ; free virtual = 10795 22 | Finished Loading Part and Timing Information : Time (s): cpu = 00:01:26 ; elapsed = 00:02:07 . Memory (MB): peak = 1405.535 ; gain = 475.062 ; free physical = 648 ; free virtual = 10795 23 | Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:01:26 ; elapsed = 00:02:07 . Memory (MB): peak = 1405.535 ; gain = 475.062 ; free physical = 648 ; free virtual = 10795 24 | Finished RTL Optimization Phase 2 : Time (s): cpu = 00:01:27 ; elapsed = 00:02:07 . Memory (MB): peak = 1405.535 ; gain = 475.062 ; free physical = 643 ; free virtual = 10789 25 | Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:01:27 ; elapsed = 00:02:08 . Memory (MB): peak = 1405.535 ; gain = 475.062 ; free physical = 642 ; free virtual = 10789 26 | Finished Applying XDC Timing Constraints : Time (s): cpu = 00:01:34 ; elapsed = 00:02:15 . Memory (MB): peak = 1405.535 ; gain = 475.062 ; free physical = 515 ; free virtual = 10666 27 | Finished Timing Optimization : Time (s): cpu = 00:01:34 ; elapsed = 00:02:15 . Memory (MB): peak = 1405.535 ; gain = 475.062 ; free physical = 515 ; free virtual = 10666 28 | Finished Technology Mapping : Time (s): cpu = 00:01:34 ; elapsed = 00:02:15 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 507 ; free virtual = 10658 29 | Finished IO Insertion : Time (s): cpu = 00:01:35 ; elapsed = 00:02:16 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 500 ; free virtual = 10651 30 | Finished Renaming Generated Instances : Time (s): cpu = 00:01:35 ; elapsed = 00:02:16 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 500 ; free virtual = 10651 31 | Finished Rebuilding User Hierarchy : Time (s): cpu = 00:01:35 ; elapsed = 00:02:16 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 500 ; free virtual = 10651 32 | Finished Renaming Generated Ports : Time (s): cpu = 00:01:35 ; elapsed = 00:02:16 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 500 ; free virtual = 10651 33 | Finished Handling Custom Attributes : Time (s): cpu = 00:01:35 ; elapsed = 00:02:16 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 500 ; free virtual = 10651 34 | Finished Renaming Generated Nets : Time (s): cpu = 00:01:35 ; elapsed = 00:02:16 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 500 ; free virtual = 10651 35 | 36 | Report Cell Usage: 37 | +------+---------+------+ 38 | | |Cell |Count | 39 | +------+---------+------+ 40 | |1 |RAMB18E1 | 1| 41 | +------+---------+------+ 42 | Finished Writing Synthesis Report : Time (s): cpu = 00:01:35 ; elapsed = 00:02:16 . Memory (MB): peak = 1411.535 ; gain = 481.062 ; free physical = 500 ; free virtual = 10651 43 | synth_design: Time (s): cpu = 00:01:33 ; elapsed = 00:02:13 . Memory (MB): peak = 1430.051 ; gain = 432.074 ; free physical = 459 ; free virtual = 10610 44 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/b003169092ecbcb9/b003169092ecbcb9.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | ipcache 5 | b003169092ecbcb9 6 | 0 7 | 8 | 9 | blk_mem_gen_2 10 | 11 | 12 | 4 13 | Memory_Slave 14 | AXI4_Full 15 | false 16 | Minimum_Area 17 | false 18 | 9 19 | NONE 20 | ../../../../../alien2.coe 21 | ALL 22 | blk_mem_gen_2 23 | false 24 | false 25 | false 26 | false 27 | false 28 | false 29 | false 30 | false 31 | false 32 | Use_ENA_Pin 33 | Always_Enabled 34 | Single_Bit_Error_Injection 35 | false 36 | Native 37 | true 38 | no_mem_loaded 39 | Single_Port_RAM 40 | WRITE_FIRST 41 | WRITE_FIRST 42 | 0 43 | 0 44 | BRAM 45 | 0 46 | 100 47 | 100 48 | 50 49 | 0 50 | 0 51 | 0 52 | 8kx2 53 | false 54 | false 55 | 8 56 | 8 57 | false 58 | true 59 | false 60 | false 61 | 0 62 | false 63 | false 64 | CE 65 | CE 66 | SYNC 67 | false 68 | false 69 | false 70 | false 71 | false 72 | false 73 | false 74 | 930 75 | 8 76 | 8 77 | No_ECC 78 | false 79 | false 80 | false 81 | Stand_Alone 82 | zynq 83 | em.avnet.com:zed:part0:1.3 84 | xc7z020 85 | clg484 86 | VERILOG 87 | 88 | MIXED 89 | -1 90 | 91 | TRUE 92 | TRUE 93 | eaba6970 94 | b003169092ecbcb9 95 | IP_Unknown 96 | 5 97 | TRUE 98 | . 99 | 100 | . 101 | 2016.4 102 | GLOBAL 103 | 104 | 105 | 106 | 107 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/b003169092ecbcb9/blk_mem_gen_2.dcp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nikkatsa7/SpaceInvadersFpgaGame/bb3e97b9ab3f9b6dd7c274d5660d7f510696bb67/space_invaders/space_invaders.cache/ip/b003169092ecbcb9/blk_mem_gen_2.dcp -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/b003169092ecbcb9/blk_mem_gen_2_stub.v: -------------------------------------------------------------------------------- 1 | // Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | // -------------------------------------------------------------------------------- 3 | // Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | // Date : Mon Mar 5 11:24:04 2018 5 | // Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | // Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | // decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_2_stub.v 8 | // Design : blk_mem_gen_2 9 | // Purpose : Stub declaration of top-level module interface 10 | // Device : xc7z020clg484-1 11 | // -------------------------------------------------------------------------------- 12 | 13 | // This empty module with port declaration file causes synthesis tools to infer a black box for IP. 14 | // The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion. 15 | // Please paste the declaration into a Verilog source file or add the file as an additional source. 16 | (* x_core_info = "blk_mem_gen_v8_3_5,Vivado 2016.4" *) 17 | module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(clka, ena, wea, addra, dina, douta) 18 | /* synthesis syn_black_box black_box_pad_pin="clka,ena,wea[0:0],addra[9:0],dina[7:0],douta[7:0]" */; 19 | input clka; 20 | input ena; 21 | input [0:0]wea; 22 | input [9:0]addra; 23 | input [7:0]dina; 24 | output [7:0]douta; 25 | endmodule 26 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/b003169092ecbcb9/blk_mem_gen_2_stub.vhdl: -------------------------------------------------------------------------------- 1 | -- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | -- -------------------------------------------------------------------------------- 3 | -- Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | -- Date : Mon Mar 5 11:24:04 2018 5 | -- Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | -- Command : write_vhdl -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | -- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_2_stub.vhdl 8 | -- Design : blk_mem_gen_2 9 | -- Purpose : Stub declaration of top-level module interface 10 | -- Device : xc7z020clg484-1 11 | -- -------------------------------------------------------------------------------- 12 | library IEEE; 13 | use IEEE.STD_LOGIC_1164.ALL; 14 | 15 | entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 16 | Port ( 17 | clka : in STD_LOGIC; 18 | ena : in STD_LOGIC; 19 | wea : in STD_LOGIC_VECTOR ( 0 to 0 ); 20 | addra : in STD_LOGIC_VECTOR ( 9 downto 0 ); 21 | dina : in STD_LOGIC_VECTOR ( 7 downto 0 ); 22 | douta : out STD_LOGIC_VECTOR ( 7 downto 0 ) 23 | ); 24 | 25 | end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix; 26 | 27 | architecture stub of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 28 | attribute syn_black_box : boolean; 29 | attribute black_box_pad_pin : string; 30 | attribute syn_black_box of stub : architecture is true; 31 | attribute black_box_pad_pin of stub : architecture is "clka,ena,wea[0:0],addra[9:0],dina[7:0],douta[7:0]"; 32 | attribute x_core_info : string; 33 | attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4"; 34 | begin 35 | end; 36 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/c75828b1ffc933a0.logs/runme.log: -------------------------------------------------------------------------------- 1 | 2 | *** Running vivado 3 | with args -log blk_mem_gen_4.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source blk_mem_gen_4.tcl 4 | 5 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 6 | 7 | ****** Vivado v2016.4 (64-bit) 8 | **** SW Build 1756540 on Mon Jan 23 19:11:19 MST 2017 9 | **** IP Build 1755317 on Mon Jan 23 20:30:07 MST 2017 10 | ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 11 | 12 | source blk_mem_gen_4.tcl -notrace 13 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 14 | Starting RTL Elaboration : Time (s): cpu = 00:00:11 ; elapsed = 00:00:11 . Memory (MB): peak = 1057.562 ; gain = 127.086 ; free physical = 127 ; free virtual = 11478 15 | INFO: [Synth 8-638] synthesizing module 'blk_mem_gen_4' [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_4/synth/blk_mem_gen_4.vhd:70] 16 | INFO: [Synth 8-256] done synthesizing module 'blk_mem_gen_4' (11#1) [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_4/synth/blk_mem_gen_4.vhd:70] 17 | Finished RTL Elaboration : Time (s): cpu = 00:02:21 ; elapsed = 00:02:22 . Memory (MB): peak = 1301.680 ; gain = 371.203 ; free physical = 870 ; free virtual = 11023 18 | Finished RTL Optimization Phase 1 : Time (s): cpu = 00:02:22 ; elapsed = 00:02:23 . Memory (MB): peak = 1301.680 ; gain = 371.203 ; free physical = 850 ; free virtual = 11006 19 | INFO: [Device 21-403] Loading part xc7z020clg484-1 20 | Constraint Validation Runtime : Time (s): cpu = 00:00:00.05 ; elapsed = 00:00:00.04 . Memory (MB): peak = 1543.516 ; gain = 0.000 ; free physical = 2786 ; free virtual = 12942 21 | Finished Constraint Validation : Time (s): cpu = 00:02:31 ; elapsed = 00:03:12 . Memory (MB): peak = 1543.516 ; gain = 613.039 ; free physical = 2785 ; free virtual = 12941 22 | Finished Loading Part and Timing Information : Time (s): cpu = 00:02:31 ; elapsed = 00:03:12 . Memory (MB): peak = 1543.516 ; gain = 613.039 ; free physical = 2785 ; free virtual = 12941 23 | Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:02:31 ; elapsed = 00:03:12 . Memory (MB): peak = 1543.516 ; gain = 613.039 ; free physical = 2785 ; free virtual = 12941 24 | Finished RTL Optimization Phase 2 : Time (s): cpu = 00:02:33 ; elapsed = 00:03:13 . Memory (MB): peak = 1543.516 ; gain = 613.039 ; free physical = 2770 ; free virtual = 12928 25 | Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:02:34 ; elapsed = 00:03:15 . Memory (MB): peak = 1543.516 ; gain = 613.039 ; free physical = 2753 ; free virtual = 12913 26 | Finished Applying XDC Timing Constraints : Time (s): cpu = 00:02:40 ; elapsed = 00:03:21 . Memory (MB): peak = 1543.516 ; gain = 613.039 ; free physical = 2607 ; free virtual = 12776 27 | Finished Timing Optimization : Time (s): cpu = 00:02:41 ; elapsed = 00:03:22 . Memory (MB): peak = 1547.500 ; gain = 617.023 ; free physical = 2601 ; free virtual = 12770 28 | Finished Technology Mapping : Time (s): cpu = 00:02:41 ; elapsed = 00:03:22 . Memory (MB): peak = 1566.523 ; gain = 636.047 ; free physical = 2583 ; free virtual = 12752 29 | Finished IO Insertion : Time (s): cpu = 00:02:41 ; elapsed = 00:03:22 . Memory (MB): peak = 1566.523 ; gain = 636.047 ; free physical = 2583 ; free virtual = 12752 30 | Finished Renaming Generated Instances : Time (s): cpu = 00:02:41 ; elapsed = 00:03:22 . Memory (MB): peak = 1566.523 ; gain = 636.047 ; free physical = 2583 ; free virtual = 12752 31 | Finished Rebuilding User Hierarchy : Time (s): cpu = 00:02:41 ; elapsed = 00:03:22 . Memory (MB): peak = 1566.523 ; gain = 636.047 ; free physical = 2583 ; free virtual = 12752 32 | Finished Renaming Generated Ports : Time (s): cpu = 00:02:41 ; elapsed = 00:03:22 . Memory (MB): peak = 1566.523 ; gain = 636.047 ; free physical = 2583 ; free virtual = 12752 33 | Finished Handling Custom Attributes : Time (s): cpu = 00:02:41 ; elapsed = 00:03:22 . Memory (MB): peak = 1566.523 ; gain = 636.047 ; free physical = 2583 ; free virtual = 12752 34 | Finished Renaming Generated Nets : Time (s): cpu = 00:02:41 ; elapsed = 00:03:22 . Memory (MB): peak = 1566.523 ; gain = 636.047 ; free physical = 2583 ; free virtual = 12752 35 | 36 | Report Cell Usage: 37 | +------+------------+------+ 38 | | |Cell |Count | 39 | +------+------------+------+ 40 | |1 |LUT3 | 8| 41 | |2 |LUT4 | 6| 42 | |3 |LUT5 | 14| 43 | |4 |LUT6 | 229| 44 | |5 |MUXF7 | 80| 45 | |6 |MUXF8 | 32| 46 | |7 |RAMB36E1 | 1| 47 | |8 |RAMB36E1_1 | 1| 48 | |9 |RAMB36E1_10 | 1| 49 | |10 |RAMB36E1_11 | 1| 50 | |11 |RAMB36E1_12 | 1| 51 | |12 |RAMB36E1_13 | 1| 52 | |13 |RAMB36E1_14 | 1| 53 | |14 |RAMB36E1_15 | 1| 54 | |15 |RAMB36E1_16 | 1| 55 | |16 |RAMB36E1_17 | 1| 56 | |17 |RAMB36E1_18 | 1| 57 | |18 |RAMB36E1_19 | 1| 58 | |19 |RAMB36E1_2 | 1| 59 | |20 |RAMB36E1_20 | 1| 60 | |21 |RAMB36E1_21 | 1| 61 | |22 |RAMB36E1_22 | 1| 62 | |23 |RAMB36E1_23 | 1| 63 | |24 |RAMB36E1_24 | 1| 64 | |25 |RAMB36E1_25 | 1| 65 | |26 |RAMB36E1_26 | 1| 66 | |27 |RAMB36E1_27 | 1| 67 | |28 |RAMB36E1_28 | 1| 68 | |29 |RAMB36E1_29 | 1| 69 | |30 |RAMB36E1_3 | 1| 70 | |31 |RAMB36E1_30 | 1| 71 | |32 |RAMB36E1_31 | 1| 72 | |33 |RAMB36E1_32 | 1| 73 | |34 |RAMB36E1_33 | 1| 74 | |35 |RAMB36E1_34 | 1| 75 | |36 |RAMB36E1_35 | 1| 76 | |37 |RAMB36E1_36 | 1| 77 | |38 |RAMB36E1_37 | 1| 78 | |39 |RAMB36E1_38 | 1| 79 | |40 |RAMB36E1_39 | 1| 80 | |41 |RAMB36E1_4 | 1| 81 | |42 |RAMB36E1_40 | 1| 82 | |43 |RAMB36E1_41 | 1| 83 | |44 |RAMB36E1_42 | 1| 84 | |45 |RAMB36E1_43 | 1| 85 | |46 |RAMB36E1_44 | 1| 86 | |47 |RAMB36E1_45 | 1| 87 | |48 |RAMB36E1_46 | 1| 88 | |49 |RAMB36E1_47 | 1| 89 | |50 |RAMB36E1_48 | 1| 90 | |51 |RAMB36E1_49 | 1| 91 | |52 |RAMB36E1_5 | 1| 92 | |53 |RAMB36E1_50 | 1| 93 | |54 |RAMB36E1_51 | 1| 94 | |55 |RAMB36E1_52 | 1| 95 | |56 |RAMB36E1_53 | 1| 96 | |57 |RAMB36E1_54 | 1| 97 | |58 |RAMB36E1_55 | 1| 98 | |59 |RAMB36E1_56 | 1| 99 | |60 |RAMB36E1_57 | 1| 100 | |61 |RAMB36E1_58 | 1| 101 | |62 |RAMB36E1_59 | 1| 102 | |63 |RAMB36E1_6 | 1| 103 | |64 |RAMB36E1_60 | 1| 104 | |65 |RAMB36E1_61 | 1| 105 | |66 |RAMB36E1_62 | 1| 106 | |67 |RAMB36E1_63 | 1| 107 | |68 |RAMB36E1_64 | 1| 108 | |69 |RAMB36E1_65 | 1| 109 | |70 |RAMB36E1_66 | 1| 110 | |71 |RAMB36E1_67 | 1| 111 | |72 |RAMB36E1_68 | 1| 112 | |73 |RAMB36E1_69 | 1| 113 | |74 |RAMB36E1_7 | 1| 114 | |75 |RAMB36E1_70 | 1| 115 | |76 |RAMB36E1_71 | 1| 116 | |77 |RAMB36E1_72 | 1| 117 | |78 |RAMB36E1_73 | 1| 118 | |79 |RAMB36E1_74 | 1| 119 | |80 |RAMB36E1_8 | 1| 120 | |81 |RAMB36E1_9 | 1| 121 | |82 |FDRE | 14| 122 | +------+------------+------+ 123 | Finished Writing Synthesis Report : Time (s): cpu = 00:02:41 ; elapsed = 00:03:22 . Memory (MB): peak = 1566.523 ; gain = 636.047 ; free physical = 2583 ; free virtual = 12752 124 | synth_design: Time (s): cpu = 00:02:40 ; elapsed = 00:03:20 . Memory (MB): peak = 1580.039 ; gain = 582.059 ; free physical = 2565 ; free virtual = 12740 125 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/c75828b1ffc933a0/blk_mem_gen_4.dcp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nikkatsa7/SpaceInvadersFpgaGame/bb3e97b9ab3f9b6dd7c274d5660d7f510696bb67/space_invaders/space_invaders.cache/ip/c75828b1ffc933a0/blk_mem_gen_4.dcp -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/c75828b1ffc933a0/blk_mem_gen_4_stub.v: -------------------------------------------------------------------------------- 1 | // Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | // -------------------------------------------------------------------------------- 3 | // Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | // Date : Mon Mar 5 11:25:11 2018 5 | // Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | // Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | // decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_4_stub.v 8 | // Design : blk_mem_gen_4 9 | // Purpose : Stub declaration of top-level module interface 10 | // Device : xc7z020clg484-1 11 | // -------------------------------------------------------------------------------- 12 | 13 | // This empty module with port declaration file causes synthesis tools to infer a black box for IP. 14 | // The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion. 15 | // Please paste the declaration into a Verilog source file or add the file as an additional source. 16 | (* x_core_info = "blk_mem_gen_v8_3_5,Vivado 2016.4" *) 17 | module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(clka, ena, wea, addra, dina, douta) 18 | /* synthesis syn_black_box black_box_pad_pin="clka,ena,wea[0:0],addra[18:0],dina[7:0],douta[7:0]" */; 19 | input clka; 20 | input ena; 21 | input [0:0]wea; 22 | input [18:0]addra; 23 | input [7:0]dina; 24 | output [7:0]douta; 25 | endmodule 26 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/c75828b1ffc933a0/blk_mem_gen_4_stub.vhdl: -------------------------------------------------------------------------------- 1 | -- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | -- -------------------------------------------------------------------------------- 3 | -- Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | -- Date : Mon Mar 5 11:25:11 2018 5 | -- Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | -- Command : write_vhdl -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | -- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_4_stub.vhdl 8 | -- Design : blk_mem_gen_4 9 | -- Purpose : Stub declaration of top-level module interface 10 | -- Device : xc7z020clg484-1 11 | -- -------------------------------------------------------------------------------- 12 | library IEEE; 13 | use IEEE.STD_LOGIC_1164.ALL; 14 | 15 | entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 16 | Port ( 17 | clka : in STD_LOGIC; 18 | ena : in STD_LOGIC; 19 | wea : in STD_LOGIC_VECTOR ( 0 to 0 ); 20 | addra : in STD_LOGIC_VECTOR ( 18 downto 0 ); 21 | dina : in STD_LOGIC_VECTOR ( 7 downto 0 ); 22 | douta : out STD_LOGIC_VECTOR ( 7 downto 0 ) 23 | ); 24 | 25 | end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix; 26 | 27 | architecture stub of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 28 | attribute syn_black_box : boolean; 29 | attribute black_box_pad_pin : string; 30 | attribute syn_black_box of stub : architecture is true; 31 | attribute black_box_pad_pin of stub : architecture is "clka,ena,wea[0:0],addra[18:0],dina[7:0],douta[7:0]"; 32 | attribute x_core_info : string; 33 | attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4"; 34 | begin 35 | end; 36 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f3acee1dd1998006.logs/runme.log: -------------------------------------------------------------------------------- 1 | 2 | *** Running vivado 3 | with args -log blk_mem_gen_3.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source blk_mem_gen_3.tcl 4 | 5 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 6 | 7 | ****** Vivado v2016.4 (64-bit) 8 | **** SW Build 1756540 on Mon Jan 23 19:11:19 MST 2017 9 | **** IP Build 1755317 on Mon Jan 23 20:30:07 MST 2017 10 | ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 11 | 12 | source blk_mem_gen_3.tcl -notrace 13 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 14 | Starting RTL Elaboration : Time (s): cpu = 00:00:11 ; elapsed = 00:00:11 . Memory (MB): peak = 1058.566 ; gain = 128.086 ; free physical = 122 ; free virtual = 11518 15 | INFO: [Synth 8-638] synthesizing module 'blk_mem_gen_3' [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_3/synth/blk_mem_gen_3.vhd:70] 16 | INFO: [Synth 8-256] done synthesizing module 'blk_mem_gen_3' (9#1) [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_3/synth/blk_mem_gen_3.vhd:70] 17 | Finished RTL Elaboration : Time (s): cpu = 00:01:07 ; elapsed = 00:01:08 . Memory (MB): peak = 1257.707 ; gain = 327.227 ; free physical = 126 ; free virtual = 10494 18 | Finished RTL Optimization Phase 1 : Time (s): cpu = 00:01:07 ; elapsed = 00:01:08 . Memory (MB): peak = 1257.707 ; gain = 327.227 ; free physical = 125 ; free virtual = 10494 19 | INFO: [Device 21-403] Loading part xc7z020clg484-1 20 | Constraint Validation Runtime : Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.01 . Memory (MB): peak = 1406.543 ; gain = 0.000 ; free physical = 117 ; free virtual = 10434 21 | Finished Constraint Validation : Time (s): cpu = 00:01:16 ; elapsed = 00:01:56 . Memory (MB): peak = 1406.543 ; gain = 476.062 ; free physical = 134 ; free virtual = 10433 22 | Finished Loading Part and Timing Information : Time (s): cpu = 00:01:16 ; elapsed = 00:01:56 . Memory (MB): peak = 1406.543 ; gain = 476.062 ; free physical = 134 ; free virtual = 10433 23 | Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:01:16 ; elapsed = 00:01:56 . Memory (MB): peak = 1406.543 ; gain = 476.062 ; free physical = 134 ; free virtual = 10433 24 | Finished RTL Optimization Phase 2 : Time (s): cpu = 00:01:16 ; elapsed = 00:01:57 . Memory (MB): peak = 1406.543 ; gain = 476.062 ; free physical = 127 ; free virtual = 10426 25 | Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:01:16 ; elapsed = 00:01:57 . Memory (MB): peak = 1406.543 ; gain = 476.062 ; free physical = 127 ; free virtual = 10426 26 | Finished Applying XDC Timing Constraints : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1406.543 ; gain = 476.062 ; free physical = 130 ; free virtual = 10353 27 | Finished Timing Optimization : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1406.543 ; gain = 476.062 ; free physical = 130 ; free virtual = 10353 28 | Finished Technology Mapping : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1411.543 ; gain = 481.062 ; free physical = 121 ; free virtual = 10344 29 | Finished IO Insertion : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1411.543 ; gain = 481.062 ; free physical = 125 ; free virtual = 10344 30 | Finished Renaming Generated Instances : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1411.543 ; gain = 481.062 ; free physical = 125 ; free virtual = 10344 31 | Finished Rebuilding User Hierarchy : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1411.543 ; gain = 481.062 ; free physical = 125 ; free virtual = 10344 32 | Finished Renaming Generated Ports : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1411.543 ; gain = 481.062 ; free physical = 125 ; free virtual = 10344 33 | Finished Handling Custom Attributes : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1411.543 ; gain = 481.062 ; free physical = 125 ; free virtual = 10344 34 | Finished Renaming Generated Nets : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1411.543 ; gain = 481.062 ; free physical = 125 ; free virtual = 10344 35 | 36 | Report Cell Usage: 37 | +------+---------+------+ 38 | | |Cell |Count | 39 | +------+---------+------+ 40 | |1 |RAMB18E1 | 1| 41 | +------+---------+------+ 42 | Finished Writing Synthesis Report : Time (s): cpu = 00:01:23 ; elapsed = 00:02:04 . Memory (MB): peak = 1411.543 ; gain = 481.062 ; free physical = 125 ; free virtual = 10344 43 | synth_design: Time (s): cpu = 00:01:21 ; elapsed = 00:02:02 . Memory (MB): peak = 1431.059 ; gain = 433.074 ; free physical = 123 ; free virtual = 10302 44 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f3acee1dd1998006/blk_mem_gen_3.dcp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nikkatsa7/SpaceInvadersFpgaGame/bb3e97b9ab3f9b6dd7c274d5660d7f510696bb67/space_invaders/space_invaders.cache/ip/f3acee1dd1998006/blk_mem_gen_3.dcp -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f3acee1dd1998006/blk_mem_gen_3_stub.v: -------------------------------------------------------------------------------- 1 | // Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | // -------------------------------------------------------------------------------- 3 | // Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | // Date : Mon Mar 5 11:23:52 2018 5 | // Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | // Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | // decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_3_stub.v 8 | // Design : blk_mem_gen_3 9 | // Purpose : Stub declaration of top-level module interface 10 | // Device : xc7z020clg484-1 11 | // -------------------------------------------------------------------------------- 12 | 13 | // This empty module with port declaration file causes synthesis tools to infer a black box for IP. 14 | // The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion. 15 | // Please paste the declaration into a Verilog source file or add the file as an additional source. 16 | (* x_core_info = "blk_mem_gen_v8_3_5,Vivado 2016.4" *) 17 | module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(clka, ena, wea, addra, dina, douta) 18 | /* synthesis syn_black_box black_box_pad_pin="clka,ena,wea[0:0],addra[9:0],dina[7:0],douta[7:0]" */; 19 | input clka; 20 | input ena; 21 | input [0:0]wea; 22 | input [9:0]addra; 23 | input [7:0]dina; 24 | output [7:0]douta; 25 | endmodule 26 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f3acee1dd1998006/blk_mem_gen_3_stub.vhdl: -------------------------------------------------------------------------------- 1 | -- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | -- -------------------------------------------------------------------------------- 3 | -- Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | -- Date : Mon Mar 5 11:23:52 2018 5 | -- Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | -- Command : write_vhdl -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | -- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_3_stub.vhdl 8 | -- Design : blk_mem_gen_3 9 | -- Purpose : Stub declaration of top-level module interface 10 | -- Device : xc7z020clg484-1 11 | -- -------------------------------------------------------------------------------- 12 | library IEEE; 13 | use IEEE.STD_LOGIC_1164.ALL; 14 | 15 | entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 16 | Port ( 17 | clka : in STD_LOGIC; 18 | ena : in STD_LOGIC; 19 | wea : in STD_LOGIC_VECTOR ( 0 to 0 ); 20 | addra : in STD_LOGIC_VECTOR ( 9 downto 0 ); 21 | dina : in STD_LOGIC_VECTOR ( 7 downto 0 ); 22 | douta : out STD_LOGIC_VECTOR ( 7 downto 0 ) 23 | ); 24 | 25 | end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix; 26 | 27 | architecture stub of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 28 | attribute syn_black_box : boolean; 29 | attribute black_box_pad_pin : string; 30 | attribute syn_black_box of stub : architecture is true; 31 | attribute black_box_pad_pin of stub : architecture is "clka,ena,wea[0:0],addra[9:0],dina[7:0],douta[7:0]"; 32 | attribute x_core_info : string; 33 | attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4"; 34 | begin 35 | end; 36 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f3acee1dd1998006/f3acee1dd1998006.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | ipcache 5 | f3acee1dd1998006 6 | 0 7 | 8 | 9 | blk_mem_gen_3 10 | 11 | 12 | 4 13 | Memory_Slave 14 | AXI4_Full 15 | false 16 | Minimum_Area 17 | false 18 | 9 19 | NONE 20 | ../../../../../alien3.coe 21 | ALL 22 | blk_mem_gen_3 23 | false 24 | false 25 | false 26 | false 27 | false 28 | false 29 | false 30 | false 31 | false 32 | Use_ENA_Pin 33 | Always_Enabled 34 | Single_Bit_Error_Injection 35 | false 36 | Native 37 | true 38 | no_mem_loaded 39 | Single_Port_RAM 40 | WRITE_FIRST 41 | WRITE_FIRST 42 | 0 43 | 0 44 | BRAM 45 | 0 46 | 100 47 | 100 48 | 50 49 | 0 50 | 0 51 | 0 52 | 8kx2 53 | false 54 | false 55 | 8 56 | 8 57 | false 58 | true 59 | false 60 | false 61 | 0 62 | false 63 | false 64 | CE 65 | CE 66 | SYNC 67 | false 68 | false 69 | false 70 | false 71 | false 72 | false 73 | false 74 | 726 75 | 8 76 | 8 77 | No_ECC 78 | false 79 | false 80 | false 81 | Stand_Alone 82 | zynq 83 | em.avnet.com:zed:part0:1.3 84 | xc7z020 85 | clg484 86 | VERILOG 87 | 88 | MIXED 89 | -1 90 | 91 | TRUE 92 | TRUE 93 | eaba6970 94 | f3acee1dd1998006 95 | IP_Unknown 96 | 5 97 | TRUE 98 | . 99 | 100 | . 101 | 2016.4 102 | GLOBAL 103 | 104 | 105 | 106 | 107 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f77c1c4690449727.logs/runme.log: -------------------------------------------------------------------------------- 1 | 2 | *** Running vivado 3 | with args -log blk_mem_gen_7.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source blk_mem_gen_7.tcl 4 | 5 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 6 | 7 | ****** Vivado v2016.4 (64-bit) 8 | **** SW Build 1756540 on Mon Jan 23 19:11:19 MST 2017 9 | **** IP Build 1755317 on Mon Jan 23 20:30:07 MST 2017 10 | ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 11 | 12 | source blk_mem_gen_7.tcl -notrace 13 | awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub 14 | Starting RTL Elaboration : Time (s): cpu = 00:00:10 ; elapsed = 00:00:10 . Memory (MB): peak = 1057.559 ; gain = 127.086 ; free physical = 125 ; free virtual = 11617 15 | INFO: [Synth 8-638] synthesizing module 'blk_mem_gen_7' [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_7/synth/blk_mem_gen_7.vhd:70] 16 | INFO: [Synth 8-256] done synthesizing module 'blk_mem_gen_7' (11#1) [/home/nick/Documents/SpaceInvadersFpgaGame/space_invaders/space_invaders.srcs/sources_1/ip/blk_mem_gen_7/synth/blk_mem_gen_7.vhd:70] 17 | Finished RTL Elaboration : Time (s): cpu = 00:01:17 ; elapsed = 00:01:18 . Memory (MB): peak = 1257.699 ; gain = 327.227 ; free physical = 134 ; free virtual = 10493 18 | Finished RTL Optimization Phase 1 : Time (s): cpu = 00:01:18 ; elapsed = 00:01:18 . Memory (MB): peak = 1257.699 ; gain = 327.227 ; free physical = 134 ; free virtual = 10492 19 | INFO: [Device 21-403] Loading part xc7z020clg484-1 20 | Constraint Validation Runtime : Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.01 . Memory (MB): peak = 1482.535 ; gain = 0.000 ; free physical = 134 ; free virtual = 10277 21 | Finished Constraint Validation : Time (s): cpu = 00:01:30 ; elapsed = 00:02:11 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 589 ; free virtual = 10739 22 | Finished Loading Part and Timing Information : Time (s): cpu = 00:01:30 ; elapsed = 00:02:11 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 589 ; free virtual = 10739 23 | Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:01:30 ; elapsed = 00:02:11 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 589 ; free virtual = 10739 24 | Finished RTL Optimization Phase 2 : Time (s): cpu = 00:01:31 ; elapsed = 00:02:12 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 576 ; free virtual = 10725 25 | Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:01:31 ; elapsed = 00:02:12 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 557 ; free virtual = 10708 26 | Finished Applying XDC Timing Constraints : Time (s): cpu = 00:01:38 ; elapsed = 00:02:19 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 955 ; free virtual = 11107 27 | Finished Timing Optimization : Time (s): cpu = 00:01:38 ; elapsed = 00:02:20 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 954 ; free virtual = 11106 28 | Finished Technology Mapping : Time (s): cpu = 00:01:38 ; elapsed = 00:02:20 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 945 ; free virtual = 11097 29 | Finished IO Insertion : Time (s): cpu = 00:01:39 ; elapsed = 00:02:20 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 945 ; free virtual = 11097 30 | Finished Renaming Generated Instances : Time (s): cpu = 00:01:39 ; elapsed = 00:02:20 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 945 ; free virtual = 11097 31 | Finished Rebuilding User Hierarchy : Time (s): cpu = 00:01:39 ; elapsed = 00:02:20 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 945 ; free virtual = 11097 32 | Finished Renaming Generated Ports : Time (s): cpu = 00:01:39 ; elapsed = 00:02:20 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 945 ; free virtual = 11097 33 | Finished Handling Custom Attributes : Time (s): cpu = 00:01:39 ; elapsed = 00:02:20 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 945 ; free virtual = 11097 34 | Finished Renaming Generated Nets : Time (s): cpu = 00:01:39 ; elapsed = 00:02:20 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 945 ; free virtual = 11097 35 | 36 | Report Cell Usage: 37 | +------+-----------+------+ 38 | | |Cell |Count | 39 | +------+-----------+------+ 40 | |1 |LUT5 | 20| 41 | |2 |LUT6 | 24| 42 | |3 |RAMB36E1 | 9| 43 | |4 |RAMB36E1_1 | 1| 44 | |5 |RAMB36E1_2 | 1| 45 | |6 |RAMB36E1_3 | 1| 46 | |7 |FDRE | 8| 47 | +------+-----------+------+ 48 | Finished Writing Synthesis Report : Time (s): cpu = 00:01:39 ; elapsed = 00:02:20 . Memory (MB): peak = 1482.535 ; gain = 552.062 ; free physical = 945 ; free virtual = 11097 49 | synth_design: Time (s): cpu = 00:01:38 ; elapsed = 00:02:19 . Memory (MB): peak = 1482.535 ; gain = 484.559 ; free physical = 891 ; free virtual = 11042 50 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f77c1c4690449727/blk_mem_gen_7.dcp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nikkatsa7/SpaceInvadersFpgaGame/bb3e97b9ab3f9b6dd7c274d5660d7f510696bb67/space_invaders/space_invaders.cache/ip/f77c1c4690449727/blk_mem_gen_7.dcp -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f77c1c4690449727/blk_mem_gen_7_stub.v: -------------------------------------------------------------------------------- 1 | // Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | // -------------------------------------------------------------------------------- 3 | // Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | // Date : Mon Mar 5 11:24:09 2018 5 | // Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | // Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | // decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_7_stub.v 8 | // Design : blk_mem_gen_7 9 | // Purpose : Stub declaration of top-level module interface 10 | // Device : xc7z020clg484-1 11 | // -------------------------------------------------------------------------------- 12 | 13 | // This empty module with port declaration file causes synthesis tools to infer a black box for IP. 14 | // The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion. 15 | // Please paste the declaration into a Verilog source file or add the file as an additional source. 16 | (* x_core_info = "blk_mem_gen_v8_3_5,Vivado 2016.4" *) 17 | module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(clka, ena, wea, addra, dina, douta) 18 | /* synthesis syn_black_box black_box_pad_pin="clka,ena,wea[0:0],addra[15:0],dina[7:0],douta[7:0]" */; 19 | input clka; 20 | input ena; 21 | input [0:0]wea; 22 | input [15:0]addra; 23 | input [7:0]dina; 24 | output [7:0]douta; 25 | endmodule 26 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f77c1c4690449727/blk_mem_gen_7_stub.vhdl: -------------------------------------------------------------------------------- 1 | -- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. 2 | -- -------------------------------------------------------------------------------- 3 | -- Tool Version: Vivado v.2016.4 (lin64) Build 1756540 Mon Jan 23 19:11:19 MST 2017 4 | -- Date : Mon Mar 5 11:24:09 2018 5 | -- Host : nick-laptop running 64-bit Ubuntu 16.04.4 LTS 6 | -- Command : write_vhdl -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix 7 | -- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ blk_mem_gen_7_stub.vhdl 8 | -- Design : blk_mem_gen_7 9 | -- Purpose : Stub declaration of top-level module interface 10 | -- Device : xc7z020clg484-1 11 | -- -------------------------------------------------------------------------------- 12 | library IEEE; 13 | use IEEE.STD_LOGIC_1164.ALL; 14 | 15 | entity decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 16 | Port ( 17 | clka : in STD_LOGIC; 18 | ena : in STD_LOGIC; 19 | wea : in STD_LOGIC_VECTOR ( 0 to 0 ); 20 | addra : in STD_LOGIC_VECTOR ( 15 downto 0 ); 21 | dina : in STD_LOGIC_VECTOR ( 7 downto 0 ); 22 | douta : out STD_LOGIC_VECTOR ( 7 downto 0 ) 23 | ); 24 | 25 | end decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix; 26 | 27 | architecture stub of decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix is 28 | attribute syn_black_box : boolean; 29 | attribute black_box_pad_pin : string; 30 | attribute syn_black_box of stub : architecture is true; 31 | attribute black_box_pad_pin of stub : architecture is "clka,ena,wea[0:0],addra[15:0],dina[7:0],douta[7:0]"; 32 | attribute x_core_info : string; 33 | attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4"; 34 | begin 35 | end; 36 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/ip/f77c1c4690449727/f77c1c4690449727.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | ipcache 5 | f77c1c4690449727 6 | 0 7 | 8 | 9 | blk_mem_gen_7 10 | 11 | 12 | 4 13 | Memory_Slave 14 | AXI4_Full 15 | false 16 | Minimum_Area 17 | false 18 | 9 19 | NONE 20 | ../../../../../win.coe 21 | ALL 22 | blk_mem_gen_7 23 | false 24 | false 25 | false 26 | false 27 | false 28 | false 29 | false 30 | false 31 | false 32 | Use_ENA_Pin 33 | Always_Enabled 34 | Single_Bit_Error_Injection 35 | false 36 | Native 37 | true 38 | no_mem_loaded 39 | Single_Port_RAM 40 | WRITE_FIRST 41 | WRITE_FIRST 42 | 0 43 | 0 44 | BRAM 45 | 0 46 | 100 47 | 100 48 | 50 49 | 0 50 | 0 51 | 0 52 | 8kx2 53 | false 54 | false 55 | 8 56 | 8 57 | false 58 | true 59 | false 60 | false 61 | 0 62 | false 63 | false 64 | CE 65 | CE 66 | SYNC 67 | false 68 | false 69 | false 70 | false 71 | false 72 | false 73 | false 74 | 49152 75 | 8 76 | 8 77 | No_ECC 78 | false 79 | false 80 | false 81 | Stand_Alone 82 | zynq 83 | em.avnet.com:zed:part0:1.3 84 | xc7z020 85 | clg484 86 | VERILOG 87 | 88 | MIXED 89 | -1 90 | 91 | TRUE 92 | TRUE 93 | eaba6970 94 | f77c1c4690449727 95 | IP_Unknown 96 | 5 97 | TRUE 98 | . 99 | 100 | . 101 | 2016.4 102 | GLOBAL 103 | 104 | 105 | 106 | 107 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/wt/gui_resources.wdf: -------------------------------------------------------------------------------- 1 | version:1 2 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:626173656469616c6f675f6f6b:3137:00:00 3 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:626173656469616c6f675f796573:32:00:00 4 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:636d646d73676469616c6f675f6f6b:32:00:00 5 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:636f6e73747261696e747363686f6f73657270616e656c5f6164645f66696c6573:31:00:00 6 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:636f7265747265657461626c6570616e656c5f636f72655f747265655f7461626c65:3235:00:00 7 | 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70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:7061636f6d6d616e646e616d65735f6f70656e5f68617264776172655f6d616e61676572:31:00:00 21 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:7061636f6d6d616e646e616d65735f70726f6a6563745f73756d6d617279:31:00:00 22 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:7061636f6d6d616e646e616d65735f72657365745f72756e73:31:00:00 23 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:7061727463686f6f7365725f626f61726473:32:00:00 24 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:70726f6772616d64656275677461625f6f70656e5f746172676574:33:00:00 25 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:70726f6772616d64656275677461625f70726f6772616d5f646576696365:31:00:00 26 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:70726f6772616d667067616469616c6f675f70726f6772616d:31:00:00 27 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:70726f67726573736469616c6f675f6261636b67726f756e64:34:00:00 28 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:70726f6a6563746e616d6563686f6f7365725f70726f6a6563745f6e616d65:31:00:00 29 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:70726f6a65637473756d6d61727964726370616e656c5f6f70656e5f6472635f7265706f7274:31:00:00 30 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:72756e6761646765745f73686f775f6572726f72:31:00:00 31 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:72756e6761646765745f73686f775f7761726e696e675f616e645f6572726f725f6d657373616765735f696e5f6d65737361676573:32:00:00 32 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:73696d706c656f757470757470726f647563746469616c6f675f636c6f73655f6469616c6f675f756e73617665645f6368616e6765735f77696c6c:38:00:00 33 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:73696d706c656f757470757470726f647563746469616c6f675f67656e65726174655f6f75747075745f70726f64756374735f696d6d6564696174656c79:31:00:00 34 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:73696d706c656f757470757470726f647563746469616c6f675f72657365745f6f75747075745f70726f6475637473:32:00:00 35 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:73726363686f6f73657270616e656c5f6164645f68646c5f616e645f6e65746c6973745f66696c65735f746f5f796f75725f70726f6a656374:31:00:00 36 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:73726363686f6f7365727461626c655f7372635f63686f6f7365725f7461626c65:32:00:00 37 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:7372636d656e755f69705f686965726172636879:32:00:00 38 | 70726f6a656374:76697661646f5f75736167655c6775695f7265736f7572636573:7461736b62616e6e65725f636c6f7365:31:00:00 39 | eof:1453868234 40 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/wt/java_command_handlers.wdf: -------------------------------------------------------------------------------- 1 | version:1 2 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:616464736f7572636573:31:00:00 3 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6175746f636f6e6e656374746172676574:33:00:00 4 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:636f726576696577:31:00:00 5 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:637573746f6d697a65636f7265:3131:00:00 6 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6c61756e636870726f6772616d66706761:31:00:00 7 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6e657770726f6a656374:31:00:00 8 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e68617264776172656d616e61676572:32:00:00 9 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:70726f6a65637473756d6d617279:31:00:00 10 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:7265637573746f6d697a65636f7265:31:00:00 11 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:72756e62697467656e:32:00:00 12 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:72756e73796e746865736973:31:00:00 13 | 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:73686f7776696577:34:00:00 14 | eof:2776218235 15 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/wt/project.wpc: -------------------------------------------------------------------------------- 1 | version:1 2 | 57656254616c6b5472616e736d697373696f6e417474656d70746564:1 3 | 6d6f64655f636f756e7465727c4755494d6f6465:3 4 | eof: 5 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/wt/synthesis.wdf: -------------------------------------------------------------------------------- 1 | version:1 2 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d70617274:7863377a303230636c673438342d31:00:00 3 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6e616d65:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 4 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d746f70:766761636f6e74726f6c6c6572:00:00 5 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d696e636c7564655f64697273:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 6 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d67656e65726963:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 7 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d766572696c6f675f646566696e65:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 8 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d636f6e737472736574:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 9 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d7365755f70726f74656374:64656661756c743a3a6e6f6e65:00:00 10 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d666c617474656e5f686965726172636879:64656661756c743a3a72656275696c74:00:00 11 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d67617465645f636c6f636b5f636f6e76657273696f6e:64656661756c743a3a6f6666:00:00 12 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d646972656374697665:64656661756c743a3a64656661756c74:00:00 13 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d72746c:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 14 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d72746c5f736b69705f6970:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 15 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d72746c5f736b69705f636f6e73747261696e7473:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 16 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6e6f5f6c63:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 17 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d62756667:64656661756c743a3a3132:00:00 18 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d66616e6f75745f6c696d6974:64656661756c743a3a3130303030:00:00 19 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d73687265675f6d696e5f73697a65:64656661756c743a3a33:00:00 20 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6d6f6465:64656661756c743a3a64656661756c74:00:00 21 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d66736d5f65787472616374696f6e:64656661756c743a3a6175746f:00:00 22 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6b6565705f6571756976616c656e745f726567697374657273:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 23 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d7265736f757263655f73686172696e67:64656661756c743a3a6175746f:00:00 24 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d636173636164655f647370:64656661756c743a3a6175746f:00:00 25 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d636f6e74726f6c5f7365745f6f70745f7468726573686f6c64:64656661756c743a3a6175746f:00:00 26 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6d61785f6272616d:64656661756c743a3a2d31:00:00 27 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6d61785f7572616d:64656661756c743a3a2d31:00:00 28 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6d61785f647370:64656661756c743a3a2d31:00:00 29 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6d61785f6272616d5f636173636164655f686569676874:64656661756c743a3a2d31:00:00 30 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6d61785f7572616d5f636173636164655f686569676874:64656661756c743a3a2d31:00:00 31 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d726574696d696e67:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 32 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6e6f5f73726c65787472616374:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 33 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d617373657274:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 34 | 73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6e6f5f74696d696e675f64726976656e:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00 35 | 73796e746865736973:73796e7468657369735c7573616765:656c6170736564:30303a30303a353273:00:00 36 | 73796e746865736973:73796e7468657369735c7573616765:6d656d6f72795f7065616b:313538302e3435374d42:00:00 37 | 73796e746865736973:73796e7468657369735c7573616765:6d656d6f72795f6761696e:3538322e3438304d42:00:00 38 | eof:2355559816 39 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/wt/synthesis_details.wdf: -------------------------------------------------------------------------------- 1 | version:1 2 | 73796e746865736973:73796e7468657369735c7573616765:686c735f6970:30:00:00 3 | eof:2511430288 4 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.cache/wt/webtalk_pa.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 6 | 7 |
8 | 9 | 10 |
11 |
12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 |
78 | 79 | 80 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.hw/hw_1/hw.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.hw/space_invaders.lpr: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.ip_user_files/README.txt: -------------------------------------------------------------------------------- 1 | The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended. 2 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.ip_user_files/mem_init_files/alien.coe: -------------------------------------------------------------------------------- 1 | ; VGA Memory Map 2 | ; .COE file with hex coefficients 3 | ; Height: 22, Width: 30 4 | 5 | memory_initialization_radix=16; 6 | memory_initialization_vector= 7 | 00,00,00,00,00,49,FF,FF,6D,00,00,00,00,00,00,00, 8 | 00,00,00,00,00,49,FF,FF,6D,00,00,00,00,00,00,00, 9 | 00,00,00,49,FF,FF,6D,00,00,00,00,00,00,00,00,00, 10 | 00,00,00,49,FF,FF,6D,00,00,00,00,00,00,00,00,00, 11 | 00,49,B6,B6,6D,25,25,00,00,00,00,00,00,00,00,25, 12 | 25,6D,B6,B6,49,00,00,00,00,00,00,00,00,00,00,00, 13 | 00,00,92,FF,FF,25,00,00,00,00,00,00,00,FF,FF,B6, 14 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 15 | 92,FF,FF,25,00,00,00,00,00,00,00,FF,FF,B6,00,00, 16 | 00,00,00,00,00,00,00,00,00,00,00,24,6D,6D,B6,FF, 17 | FF,92,6D,6D,6D,6D,6D,6D,6D,FF,FF,DA,6D,6D,25,00, 18 | 00,00,00,00,00,00,00,00,00,49,FF,FF,FF,FF,FF,FF, 19 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,6D,00,00,00, 20 | 00,00,00,00,00,00,00,49,FF,FF,FF,FF,FF,FF,FF,FF, 21 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,6D,00,00,00,00,00, 22 | 00,00,00,FF,FF,FF,FF,FF,6D,00,00,DA,FF,FF,FF,FF, 23 | FF,FF,FF,00,00,49,FF,FF,FF,FF,FF,00,00,00,00,00, 24 | 00,FF,FF,FF,FF,FF,6D,00,00,DA,FF,FF,FF,FF,FF,FF, 25 | FF,00,00,49,FF,FF,FF,FF,FF,00,00,00,24,25,25,FF, 26 | FF,FF,FF,FF,92,25,25,DB,FF,FF,FF,FF,FF,FF,FF,25, 27 | 25,6D,FF,FF,FF,FF,FF,49,25,24,B6,FF,FF,FF,FF,FF, 28 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 29 | FF,FF,FF,FF,FF,FF,FF,B6,B6,FF,FF,FF,FF,FF,FF,FF, 30 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 31 | FF,FF,FF,FF,FF,B6,B6,FF,FF,6D,6D,92,FF,FF,FF,FF, 32 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,92,6D, 33 | 6D,FF,FF,B6,B6,FF,FF,00,00,49,FF,FF,FF,FF,FF,FF, 34 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,6D,00,00,FF, 35 | FF,B6,B6,FF,FF,00,00,49,FF,FF,FF,FF,FF,FF,FF,FF, 36 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,6D,00,00,FF,FF,B6, 37 | B6,FF,FF,00,00,49,FF,FF,6D,24,24,24,24,24,24,24, 38 | 24,24,24,24,24,6D,FF,FF,6D,00,00,FF,FF,B6,B6,FF, 39 | FF,00,00,49,FF,FF,6D,00,00,00,00,00,00,00,00,00, 40 | 00,00,00,49,FF,FF,6D,00,00,FF,FF,B6,92,B6,B6,00, 41 | 00,25,B6,B6,6D,25,25,25,25,24,00,00,24,25,25,25, 42 | 25,6D,DA,DA,49,00,00,B6,B6,92,00,00,00,00,00,00, 43 | 00,00,B6,FF,FF,FF,FF,92,00,00,92,FF,FF,FF,FF,B6, 44 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 45 | B6,FF,FF,FF,FF,92,00,00,92,FF,FF,FF,FF,B6,00,00, 46 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,49,6D, 47 | 6D,6D,6D,49,00,00,49,6D,6D,6D,6D,49,00,00,00,00, 48 | 00,00,00,00; -------------------------------------------------------------------------------- /space_invaders/space_invaders.ip_user_files/mem_init_files/alien2.coe: -------------------------------------------------------------------------------- 1 | ; VGA Memory Map 2 | ; .COE file with hex coefficients 3 | ; Height: 30, Width: 31 4 | 5 | memory_initialization_radix=16; 6 | memory_initialization_vector= 7 | 00,00,00,00,00,00,00,00,00,00,00,49,92,92,92,92, 8 | 92,92,25,00,00,00,00,00,00,00,00,00,00,00,00,00, 9 | 00,00,00,00,00,00,00,00,00,00,49,FF,FF,FF,FF,FF, 10 | FF,49,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 11 | 00,00,00,00,00,00,00,00,00,49,FF,FF,FF,FF,FF,FF, 12 | 49,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 13 | 00,00,00,00,00,00,00,00,6D,FF,FF,FF,FF,FF,FF,49, 14 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 15 | 00,00,00,24,DB,DB,DB,FF,FF,FF,FF,FF,FF,FF,DB,DB, 16 | DB,DB,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 17 | 00,00,24,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 18 | FF,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 19 | 00,24,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 20 | 00,00,00,00,00,00,00,00,00,00,00,00,00,24,24,24, 21 | 24,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,24, 22 | 24,24,24,00,00,00,00,00,00,00,00,00,DB,FF,FF,FF, 23 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 24 | FF,DA,00,00,00,00,00,00,00,00,00,DB,FF,FF,FF,FF, 25 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 26 | DA,00,00,00,00,00,00,00,00,00,DB,FF,FF,DA,DA,DA, 27 | DA,DB,FF,FF,FF,FF,FF,FF,DB,DA,DA,DA,DA,FF,FF,DA, 28 | 00,00,00,00,00,49,49,49,6D,FF,FF,FF,24,00,00,00, 29 | 6D,FF,FF,FF,FF,FF,FF,49,00,00,00,24,FF,FF,DB,6D, 30 | 49,49,49,00,92,FF,FF,FF,FF,FF,FF,00,00,00,00,49, 31 | FF,FF,FF,FF,FF,FF,49,00,00,00,24,FF,FF,FF,FF,FF, 32 | FF,92,00,92,FF,FF,FF,FF,FF,FF,00,00,00,00,49,FF, 33 | FF,FF,FF,FF,FF,49,00,00,00,24,FF,FF,FF,FF,FF,FF, 34 | 92,00,92,FF,FF,FF,FF,FF,FF,00,00,00,00,49,FF,FF, 35 | FF,FF,FF,FF,49,00,00,00,24,FF,FF,FF,FF,FF,FF,92, 36 | 00,92,FF,FF,FF,FF,FF,FF,92,92,92,92,B6,FF,FF,FF, 37 | FF,FF,FF,B6,92,92,92,92,FF,FF,FF,FF,FF,FF,92,00, 38 | 92,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 39 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,92,00,92, 40 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 41 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,92,00,25,49, 42 | 49,49,49,49,49,49,FF,FF,DB,49,49,49,49,49,49,49, 43 | 49,DB,FF,FF,49,49,49,49,49,49,49,25,00,00,00,00, 44 | 00,00,00,00,24,FF,FF,DA,00,00,00,00,00,00,00,00, 45 | DB,FF,FF,00,00,00,00,00,00,00,00,00,00,00,00,00, 46 | 00,00,00,24,FF,FF,DA,00,00,00,00,00,00,00,00,DB, 47 | FF,FF,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 48 | 00,00,24,FF,FF,DA,00,00,00,00,00,00,00,00,DB,FF, 49 | FF,00,00,00,00,00,00,00,00,00,00,00,00,00,24,24, 50 | 24,24,00,00,24,24,24,24,24,24,24,24,24,00,00,00, 51 | 24,24,24,24,00,00,00,00,00,00,00,00,00,DB,FF,FF, 52 | 00,00,00,00,49,FF,FF,FF,FF,FF,FF,49,00,00,00,24, 53 | FF,FF,DA,00,00,00,00,00,00,00,00,00,DB,FF,FF,00, 54 | 00,00,00,49,FF,FF,FF,FF,FF,FF,49,00,00,00,24,FF, 55 | FF,DA,00,00,00,00,00,00,00,00,00,B6,DA,DA,24,00, 56 | 00,00,49,DA,DA,DA,DA,DA,DA,49,00,00,00,24,DA,DA, 57 | B6,00,00,00,00,00,49,49,49,24,00,00,00,24,49,49, 58 | 49,00,00,00,00,00,00,00,00,49,49,49,24,00,00,00, 59 | 24,49,49,49,00,92,FF,FF,49,00,00,00,24,FF,FF,DA, 60 | 00,00,00,00,00,00,00,00,DB,FF,FF,00,00,00,00,49, 61 | FF,FF,92,00,92,FF,FF,49,00,00,00,24,FF,FF,DA,00, 62 | 00,00,00,00,00,00,00,DB,FF,FF,00,00,00,00,49,FF, 63 | FF,92,00,6D,92,92,25,00,00,00,24,92,92,6D,00,00, 64 | 00,00,00,00,00,00,92,92,92,00,00,00,00,49,92,92, 65 | 6D,00; -------------------------------------------------------------------------------- /space_invaders/space_invaders.ip_user_files/mem_init_files/alien3.coe: -------------------------------------------------------------------------------- 1 | ; VGA Memory Map 2 | ; .COE file with hex coefficients 3 | ; Height: 22, Width: 33 4 | 5 | memory_initialization_radix=16; 6 | memory_initialization_vector= 7 | 00,00,00,00,00,00,00,00,00,00,25,B6,B6,B6,B6,B6, 8 | B6,B6,B6,B6,92,24,00,00,00,00,00,00,00,00,00,00, 9 | 00,00,00,00,00,00,00,00,00,00,00,49,FF,FF,FF,FF, 10 | FF,FF,FF,FF,FF,DB,24,00,00,00,00,00,00,00,00,00, 11 | 00,00,00,00,00,25,25,25,25,25,25,25,6D,FF,FF,FF, 12 | FF,FF,FF,FF,FF,FF,DB,49,25,25,25,25,25,25,25,00, 13 | 00,00,00,00,00,49,DB,FF,FF,FF,FF,FF,FF,FF,FF,FF, 14 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,DA, 15 | 24,00,00,00,00,00,49,FF,FF,FF,FF,FF,FF,FF,FF,FF, 16 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 17 | DB,24,00,00,00,49,6D,92,FF,FF,FF,FF,FF,FF,FF,FF, 18 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 19 | FF,DB,6D,6D,49,00,B6,FF,FF,FF,FF,FF,FF,FF,FF,FF, 20 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 21 | FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF,FF,FF,DB,B6, 22 | B6,B6,B6,B6,DB,FF,FF,FF,FF,DA,B6,B6,B6,B6,B6,DB, 23 | FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF,FF,FF,B6, 24 | 00,00,00,00,00,92,FF,FF,FF,FF,49,00,00,00,00,00, 25 | B6,FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF,FF,FF, 26 | B6,00,00,00,00,00,92,FF,FF,FF,FF,25,00,00,00,00, 27 | 00,B6,FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF,FF, 28 | FF,B6,24,24,24,24,24,92,FF,FF,FF,FF,49,24,24,24, 29 | 24,24,B6,FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF,FF, 30 | FF,FF,FF,DA,DA,DA,DA,DA,DB,FF,FF,FF,FF,DB,DA,DA, 31 | DA,DA,DA,FF,FF,FF,FF,FF,FF,FF,B6,00,B6,FF,FF,FF, 32 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF, 33 | FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,B6,00,49,6D,6D, 34 | 6D,6D,6D,6D,6D,DA,FF,FF,FF,DB,6D,6D,6D,6D,6D,92, 35 | FF,FF,FF,FF,DA,6D,6D,6D,6D,6D,6D,6D,49,00,00,00, 36 | 00,00,00,00,00,00,B6,FF,FF,FF,DB,24,00,00,00,00, 37 | 49,FF,FF,FF,FF,B6,00,00,00,00,00,00,00,00,00,00, 38 | 00,00,00,00,00,00,00,B6,FF,DB,DB,B6,24,00,00,00, 39 | 00,49,DB,DB,FF,FF,B6,00,00,00,00,00,00,00,00,00, 40 | 00,00,00,00,00,25,49,49,DA,FF,49,24,24,49,49,49, 41 | 49,49,24,24,24,92,FF,B6,49,49,24,00,00,00,00,00, 42 | 00,00,00,00,00,00,92,FF,FF,FF,FF,25,00,00,92,FF, 43 | FF,FF,FF,25,00,00,92,FF,FF,FF,FF,25,00,00,00,00, 44 | 00,00,00,00,00,00,00,6D,B6,B6,B6,B6,24,00,00,6D, 45 | B6,B6,B6,B6,24,00,00,6D,B6,B6,B6,B6,25,00,00,00, 46 | 00,00,00,6D,92,92,92,92,24,00,00,00,00,00,00,00, 47 | 00,00,00,00,00,00,00,00,00,00,00,00,00,25,92,92, 48 | 92,92,6D,00,B6,FF,FF,FF,DB,24,00,00,00,00,00,00, 49 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,49,FF, 50 | FF,FF,FF,B6,00,6D,B6,B6,B6,92,24,00,00,00,00,00, 51 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,25, 52 | 92,B6,B6,B6,6D,00; -------------------------------------------------------------------------------- /space_invaders/space_invaders.ip_user_files/mem_init_files/blk_mem_gen_0.mif: -------------------------------------------------------------------------------- 1 | 00000000 2 | 00000000 3 | 00000000 4 | 00000000 5 | 00000000 6 | 00000000 7 | 00000000 8 | 00000000 9 | 00000000 10 | 00000000 11 | 00000000 12 | 00000000 13 | 00000000 14 | 00000000 15 | 00011100 16 | 00011100 17 | 00000000 18 | 00000000 19 | 00000000 20 | 00000000 21 | 00000000 22 | 00000000 23 | 00000000 24 | 00000000 25 | 00000000 26 | 00000000 27 | 00000000 28 | 00000000 29 | 00000000 30 | 00000000 31 | 00000000 32 | 00000000 33 | 00000000 34 | 00000000 35 | 00000000 36 | 00000000 37 | 00000000 38 | 00000000 39 | 00000000 40 | 00000000 41 | 00000000 42 | 00000000 43 | 00000000 44 | 00000000 45 | 00000000 46 | 00011100 47 | 00011100 48 | 00000000 49 | 00000000 50 | 00000000 51 | 00000000 52 | 00000000 53 | 00000000 54 | 00000000 55 | 00000000 56 | 00000000 57 | 00000000 58 | 00000000 59 | 00000000 60 | 00000000 61 | 00000000 62 | 00000000 63 | 00000000 64 | 00000000 65 | 00000000 66 | 00000000 67 | 00000000 68 | 00000000 69 | 00000000 70 | 00000000 71 | 00000000 72 | 00000000 73 | 00000000 74 | 00000000 75 | 00011100 76 | 00011100 77 | 00011100 78 | 00011100 79 | 00011100 80 | 00011100 81 | 00000000 82 | 00000000 83 | 00000000 84 | 00000000 85 | 00000000 86 | 00000000 87 | 00000000 88 | 00000000 89 | 00000000 90 | 00000000 91 | 00000000 92 | 00000000 93 | 00000000 94 | 00000000 95 | 00000000 96 | 00000000 97 | 00000000 98 | 00000000 99 | 00000000 100 | 00000000 101 | 00000000 102 | 00000000 103 | 00000000 104 | 00000000 105 | 00000000 106 | 00011100 107 | 00011100 108 | 00011100 109 | 00011100 110 | 00011100 111 | 00011100 112 | 00000000 113 | 00000000 114 | 00000000 115 | 00000000 116 | 00000000 117 | 00000000 118 | 00000000 119 | 00000000 120 | 00000000 121 | 00000000 122 | 00000000 123 | 00000000 124 | 00000000 125 | 00000000 126 | 00000000 127 | 00000000 128 | 00000000 129 | 00000000 130 | 00000000 131 | 00000000 132 | 00000000 133 | 00000000 134 | 00000000 135 | 00000000 136 | 00000000 137 | 00011100 138 | 00011100 139 | 00011100 140 | 00011100 141 | 00011100 142 | 00011100 143 | 00000000 144 | 00000000 145 | 00000000 146 | 00000000 147 | 00000000 148 | 00000000 149 | 00000000 150 | 00000000 151 | 00000000 152 | 00000000 153 | 00000000 154 | 00000000 155 | 00000000 156 | 00000000 157 | 00000000 158 | 00000000 159 | 00000000 160 | 00000000 161 | 00000000 162 | 00000000 163 | 00000000 164 | 00000000 165 | 00000000 166 | 00000000 167 | 00000000 168 | 00011100 169 | 00011100 170 | 00011100 171 | 00011100 172 | 00011100 173 | 00011100 174 | 00000000 175 | 00000000 176 | 00000000 177 | 00000000 178 | 00000000 179 | 00000000 180 | 00000000 181 | 00000000 182 | 00000000 183 | 00000000 184 | 00000000 185 | 00000000 186 | 00000000 187 | 00000000 188 | 00000000 189 | 00011100 190 | 00011100 191 | 00011100 192 | 00011100 193 | 00011100 194 | 00011100 195 | 00011100 196 | 00011100 197 | 00011100 198 | 00011100 199 | 00011100 200 | 00011100 201 | 00011100 202 | 00011100 203 | 00011100 204 | 00011100 205 | 00011100 206 | 00011100 207 | 00011100 208 | 00011100 209 | 00011100 210 | 00011100 211 | 00011100 212 | 00011100 213 | 00011100 214 | 00011100 215 | 00000000 216 | 00000000 217 | 00000000 218 | 00000000 219 | 00000000 220 | 00011100 221 | 00011100 222 | 00011100 223 | 00011100 224 | 00011100 225 | 00011100 226 | 00011100 227 | 00011100 228 | 00011100 229 | 00011100 230 | 00011100 231 | 00011100 232 | 00011100 233 | 00011100 234 | 00011100 235 | 00011100 236 | 00011100 237 | 00011100 238 | 00011100 239 | 00011100 240 | 00011100 241 | 00011100 242 | 00011100 243 | 00011100 244 | 00011100 245 | 00011100 246 | 00000000 247 | 00000000 248 | 00000000 249 | 00011100 250 | 00011100 251 | 00011100 252 | 00011100 253 | 00011100 254 | 00011100 255 | 00011100 256 | 00011100 257 | 00011100 258 | 00011100 259 | 00011100 260 | 00011100 261 | 00011100 262 | 00011100 263 | 00011100 264 | 00011100 265 | 00011100 266 | 00011100 267 | 00011100 268 | 00011100 269 | 00011100 270 | 00011100 271 | 00011100 272 | 00011100 273 | 00011100 274 | 00011100 275 | 00011100 276 | 00011100 277 | 00011100 278 | 00011100 279 | 00000000 280 | 00011100 281 | 00011100 282 | 00011100 283 | 00011100 284 | 00011100 285 | 00011100 286 | 00011100 287 | 00011100 288 | 00011100 289 | 00011100 290 | 00011100 291 | 00011100 292 | 00011100 293 | 00011100 294 | 00011100 295 | 00011100 296 | 00011100 297 | 00011100 298 | 00011100 299 | 00011100 300 | 00011100 301 | 00011100 302 | 00011100 303 | 00011100 304 | 00011100 305 | 00011100 306 | 00011100 307 | 00011100 308 | 00011100 309 | 00011100 310 | 00000000 311 | 00011100 312 | 00011100 313 | 00011100 314 | 00011100 315 | 00011100 316 | 00011100 317 | 00011100 318 | 00011100 319 | 00011100 320 | 00011100 321 | 00011100 322 | 00011100 323 | 00011100 324 | 00011100 325 | 00011100 326 | 00011100 327 | 00011100 328 | 00011100 329 | 00011100 330 | 00011100 331 | 00011100 332 | 00011100 333 | 00011100 334 | 00011100 335 | 00011100 336 | 00011100 337 | 00011100 338 | 00011100 339 | 00011100 340 | 00011100 341 | 00000000 342 | 00011100 343 | 00011100 344 | 00011100 345 | 00011100 346 | 00011100 347 | 00011100 348 | 00011100 349 | 00011100 350 | 00011100 351 | 00011100 352 | 00011100 353 | 00011100 354 | 00011100 355 | 00011100 356 | 00011100 357 | 00011100 358 | 00011100 359 | 00011100 360 | 00011100 361 | 00011100 362 | 00011100 363 | 00011100 364 | 00011100 365 | 00011100 366 | 00011100 367 | 00011100 368 | 00011100 369 | 00011100 370 | 00011100 371 | 00011100 372 | 00000000 373 | 00011100 374 | 00011100 375 | 00011100 376 | 00011100 377 | 00011100 378 | 00011100 379 | 00011100 380 | 00011100 381 | 00011100 382 | 00011100 383 | 00011100 384 | 00011100 385 | 00011100 386 | 00011100 387 | 00011100 388 | 00011100 389 | 00011100 390 | 00011100 391 | 00011100 392 | 00011100 393 | 00011100 394 | 00011100 395 | 00011100 396 | 00011100 397 | 00011100 398 | 00011100 399 | 00011100 400 | 00011100 401 | 00011100 402 | 00011100 403 | 00000000 404 | 00011100 405 | 00011100 406 | 00011100 407 | 00011100 408 | 00011100 409 | 00011100 410 | 00011100 411 | 00011100 412 | 00011100 413 | 00011100 414 | 00011100 415 | 00011100 416 | 00011100 417 | 00011100 418 | 00011100 419 | 00011100 420 | 00011100 421 | 00011100 422 | 00011100 423 | 00011100 424 | 00011100 425 | 00011100 426 | 00011100 427 | 00011100 428 | 00011100 429 | 00011100 430 | 00011100 431 | 00011100 432 | 00011100 433 | 00011100 434 | 00000000 435 | 00011100 436 | 00011100 437 | 00011100 438 | 00011100 439 | 00011100 440 | 00011100 441 | 00011100 442 | 00011100 443 | 00011100 444 | 00011100 445 | 00011100 446 | 00011100 447 | 00011100 448 | 00011100 449 | 00011100 450 | 00011100 451 | 00011100 452 | 00011100 453 | 00011100 454 | 00011100 455 | 00011100 456 | 00011100 457 | 00011100 458 | 00011100 459 | 00011100 460 | 00011100 461 | 00011100 462 | 00011100 463 | 00011100 464 | 00011100 465 | 00000000 466 | 00011100 467 | 00011100 468 | 00011100 469 | 00011100 470 | 00011100 471 | 00011100 472 | 00011100 473 | 00011100 474 | 00011100 475 | 00011100 476 | 00011100 477 | 00011100 478 | 00011100 479 | 00011100 480 | 00011100 481 | 00011100 482 | 00011100 483 | 00011100 484 | 00011100 485 | 00011100 486 | 00011100 487 | 00011100 488 | 00011100 489 | 00011100 490 | 00011100 491 | 00011100 492 | 00011100 493 | 00011100 494 | 00011100 495 | 00011100 496 | 00000000 497 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.ip_user_files/mem_init_files/spaceship.coe: -------------------------------------------------------------------------------- 1 | ; VGA Memory Map 2 | ; .COE file with hex coefficients 3 | ; Height: 16, Width: 31 4 | 5 | memory_initialization_radix=16; 6 | memory_initialization_vector= 7 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,1C,1C, 8 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 9 | 00,00,00,00,00,00,00,00,00,00,00,00,00,1C,1C,00, 10 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 11 | 00,00,00,00,00,00,00,00,00,00,1C,1C,1C,1C,1C,1C, 12 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 13 | 00,00,00,00,00,00,00,00,00,1C,1C,1C,1C,1C,1C,00, 14 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 15 | 00,00,00,00,00,00,00,00,1C,1C,1C,1C,1C,1C,00,00, 16 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 17 | 00,00,00,00,00,00,00,1C,1C,1C,1C,1C,1C,00,00,00, 18 | 00,00,00,00,00,00,00,00,00,00,00,00,1C,1C,1C,1C, 19 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 20 | 1C,1C,1C,1C,1C,1C,00,00,00,00,00,1C,1C,1C,1C,1C, 21 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 22 | 1C,1C,1C,1C,1C,00,00,00,1C,1C,1C,1C,1C,1C,1C,1C, 23 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 24 | 1C,1C,1C,1C,1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C, 25 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 26 | 1C,1C,1C,1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 27 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 28 | 1C,1C,1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 29 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 30 | 1C,1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 31 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 32 | 1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 33 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 34 | 1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 35 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 36 | 00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 37 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,00; -------------------------------------------------------------------------------- /space_invaders/space_invaders.ip_user_files/mem_init_files/summary.log: -------------------------------------------------------------------------------- 1 | 2 | User Configuration 3 | -------------------------------------------------------------------------------- 4 | Algorithm : Minimum_Area 5 | Memory Type : Single_Port_RAM 6 | Port A Read Width : [8] 7 | Port A Write Width : [8] 8 | Memory Depth : [496] 9 | 10 | ---------------------------------------------------------------------------------- 11 | 12 | Block RAM resource(s) (18K BRAMs) : [1] 13 | Block RAM resource(s) (36K BRAMs) : [0] 14 | ---------------------------------------------------------------------------------- 15 | Clock A Frequency : [100] 16 | Port A Enable Rate : [100] 17 | Port A Write Rate : [50] 18 | ---------------------------------------------------------------------------------- 19 | Estimated Power for IP : 2.54005 mW 20 | ---------------------------------------------------------------------------------- 21 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.runs/.jobs/vrs_config_1.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.runs/.jobs/vrs_config_2.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.runs/.jobs/vrs_config_3.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.runs/.jobs/vrs_config_4.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | -------------------------------------------------------------------------------- /space_invaders/space_invaders.xpr: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99 | 100 | 101 | 102 | 103 | 104 | 105 | 106 | 107 | 108 | 109 | 110 | 111 | 112 | 113 | 114 | 115 | 116 | 117 | 118 | 119 | 120 | 121 | 122 | 123 | 124 | 125 | 126 | 127 | 128 | 129 | 130 | 131 | 132 | 133 | 134 | 135 | 136 | 137 | 138 | 139 | 140 | 141 | 142 | 143 | 144 | 145 | 146 | 147 | 148 | 149 | 150 | 151 | 152 | 153 | 154 | 155 | 156 | 157 | 158 | 159 | 160 | 161 | 162 | 163 | 164 | 165 | 166 | 167 | 168 | 169 | 170 | 171 | 172 | 173 | 174 | 175 | 176 | 177 | 178 | 179 | 180 | 181 | 182 | 186 | 187 | 188 | 189 | 190 | 191 | 192 | 193 | 194 | 195 | 196 | 198 | 199 | 200 | 201 | 202 | 210 | 211 | 212 | 213 | 214 | 217 | 218 | 220 | 221 | 223 | 224 | 226 | 227 | 229 | 230 | 232 | 233 | 234 | 235 | 236 | 237 | 238 | 239 | 240 | 241 | 242 | 243 | 244 | 245 | 246 | 247 | 248 | 249 | 250 | 251 | 252 | 253 | 254 | 255 | 256 | 257 | 258 | -------------------------------------------------------------------------------- /spaceship.coe: -------------------------------------------------------------------------------- 1 | ; VGA Memory Map 2 | ; .COE file with hex coefficients 3 | ; Height: 16, Width: 31 4 | 5 | memory_initialization_radix=16; 6 | memory_initialization_vector= 7 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,1C,1C, 8 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 9 | 00,00,00,00,00,00,00,00,00,00,00,00,00,1C,1C,00, 10 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 11 | 00,00,00,00,00,00,00,00,00,00,1C,1C,1C,1C,1C,1C, 12 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 13 | 00,00,00,00,00,00,00,00,00,1C,1C,1C,1C,1C,1C,00, 14 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 15 | 00,00,00,00,00,00,00,00,1C,1C,1C,1C,1C,1C,00,00, 16 | 00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00, 17 | 00,00,00,00,00,00,00,1C,1C,1C,1C,1C,1C,00,00,00, 18 | 00,00,00,00,00,00,00,00,00,00,00,00,1C,1C,1C,1C, 19 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 20 | 1C,1C,1C,1C,1C,1C,00,00,00,00,00,1C,1C,1C,1C,1C, 21 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 22 | 1C,1C,1C,1C,1C,00,00,00,1C,1C,1C,1C,1C,1C,1C,1C, 23 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 24 | 1C,1C,1C,1C,1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C, 25 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 26 | 1C,1C,1C,1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 27 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 28 | 1C,1C,1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 29 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 30 | 1C,1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 31 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 32 | 1C,1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 33 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 34 | 1C,00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 35 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 36 | 00,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C, 37 | 1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,1C,00; -------------------------------------------------------------------------------- /vsync.v: -------------------------------------------------------------------------------- 1 | module vertical(clk,rst,vaddr,vsync,display_area); 2 | 3 | input clk,rst; 4 | output reg [8:0] vaddr; //mapped address 5 | reg [10:0] divide_counter; //1/5 divider 6 | reg [19:0] counter; 7 | output reg display_area; 8 | output vsync; 9 | 10 | always@(posedge clk or posedge rst) 11 | begin 12 | if(rst) 13 | begin 14 | counter <= 20'b0; 15 | end 16 | else 17 | begin 18 | if(counter == 20'b1100_1011_1000_0011_1111) 19 | begin 20 | counter <= 20'b0; 21 | end 22 | else 23 | begin 24 | counter <= counter + 1'b1; 25 | end 26 | end 27 | end 28 | 29 | assign vsync = (counter < 20'b0000_0000_1100_1000_0000)? 0 : 1; 30 | 31 | always@(posedge clk or posedge rst) 32 | begin 33 | if(rst) 34 | begin 35 | vaddr <= 7'b0; 36 | divide_counter <= 0; 37 | display_area <= 0; 38 | end 39 | else 40 | begin 41 | 42 | if((counter > 20'd49600) && (counter < 20'd817601)) 43 | begin 44 | display_area <= 1'b1; 45 | if(divide_counter == 11'd1599) 46 | begin 47 | divide_counter <= 0; 48 | if(vaddr == 9'd479) 49 | begin 50 | vaddr <= 0; 51 | end 52 | else 53 | begin 54 | vaddr <= vaddr + 1'b1; 55 | end 56 | end else 57 | begin 58 | divide_counter <= divide_counter + 1'b1; 59 | vaddr <= vaddr; 60 | end 61 | end 62 | else 63 | begin 64 | vaddr <= 7'b0; 65 | display_area <= 0; 66 | end 67 | end 68 | end 69 | 70 | endmodule --------------------------------------------------------------------------------