├── .gitignore ├── LICENSE ├── README.md ├── bin ├── debug │ ├── .git-empty │ └── helloworld_1_0.map └── release │ └── .git-empty ├── helloworld.qbs ├── img ├── compiler.png ├── debugger.png ├── device.png ├── kit.png ├── openocd-gdb.png └── plugin.png ├── lib └── STM32F4xx │ ├── Include │ ├── arm_common_tables.h │ ├── arm_const_structs.h │ ├── arm_math.h │ ├── core_cm0.h │ ├── core_cm0plus.h │ ├── core_cm3.h │ ├── core_cm4.h │ ├── core_cm7.h │ ├── core_cmFunc.h │ ├── core_cmInstr.h │ ├── core_cmSimd.h │ ├── core_sc000.h │ └── core_sc300.h │ ├── STM32F4xx_StdPeriph_Driver │ ├── Release_Notes.html │ ├── inc │ │ ├── misc.h │ │ ├── stm32f4xx_adc.h │ │ ├── stm32f4xx_can.h │ │ ├── stm32f4xx_cec.h │ │ ├── stm32f4xx_crc.h │ │ ├── stm32f4xx_cryp.h │ │ ├── stm32f4xx_dac.h │ │ ├── stm32f4xx_dbgmcu.h │ │ ├── stm32f4xx_dcmi.h │ │ ├── stm32f4xx_dma.h │ │ ├── stm32f4xx_dma2d.h │ │ ├── stm32f4xx_dsi.h │ │ ├── stm32f4xx_exti.h │ │ ├── stm32f4xx_flash.h │ │ ├── stm32f4xx_flash_ramfunc.h │ │ ├── stm32f4xx_fmc.h │ │ ├── stm32f4xx_fmpi2c.h │ │ ├── stm32f4xx_fsmc.h │ │ ├── stm32f4xx_gpio.h │ │ ├── stm32f4xx_hash.h │ │ ├── stm32f4xx_i2c.h │ │ ├── stm32f4xx_iwdg.h │ │ ├── stm32f4xx_lptim.h │ │ ├── stm32f4xx_ltdc.h │ │ ├── stm32f4xx_pwr.h │ │ ├── stm32f4xx_qspi.h │ │ ├── stm32f4xx_rcc.h │ │ ├── stm32f4xx_rng.h │ │ ├── stm32f4xx_rtc.h │ │ ├── stm32f4xx_sai.h │ │ ├── stm32f4xx_sdio.h │ │ ├── stm32f4xx_spdifrx.h │ │ ├── stm32f4xx_spi.h │ │ ├── stm32f4xx_syscfg.h │ │ ├── stm32f4xx_tim.h │ │ ├── stm32f4xx_usart.h │ │ └── stm32f4xx_wwdg.h │ └── src │ │ ├── misc.c │ │ ├── stm32f4xx_adc.c │ │ ├── stm32f4xx_can.c │ │ ├── stm32f4xx_cec.c │ │ ├── stm32f4xx_crc.c │ │ ├── stm32f4xx_cryp.c │ │ ├── stm32f4xx_cryp_aes.c │ │ ├── stm32f4xx_cryp_des.c │ │ ├── stm32f4xx_cryp_tdes.c │ │ ├── stm32f4xx_dac.c │ │ ├── stm32f4xx_dbgmcu.c │ │ ├── stm32f4xx_dcmi.c │ │ ├── stm32f4xx_dma.c │ │ ├── stm32f4xx_dma2d.c │ │ ├── stm32f4xx_dsi.c │ │ ├── stm32f4xx_exti.c │ │ ├── stm32f4xx_flash.c │ │ ├── stm32f4xx_flash_ramfunc.c │ │ ├── stm32f4xx_fmc.c │ │ ├── stm32f4xx_fmpi2c.c │ │ ├── stm32f4xx_fsmc.c │ │ ├── stm32f4xx_gpio.c │ │ ├── stm32f4xx_hash.c │ │ ├── stm32f4xx_hash_md5.c │ │ ├── stm32f4xx_hash_sha1.c │ │ ├── stm32f4xx_i2c.c │ │ ├── stm32f4xx_iwdg.c │ │ ├── stm32f4xx_lptim.c │ │ ├── stm32f4xx_ltdc.c │ │ ├── stm32f4xx_pwr.c │ │ ├── stm32f4xx_qspi.c │ │ ├── stm32f4xx_rcc.c │ │ ├── stm32f4xx_rng.c │ │ ├── stm32f4xx_rtc.c │ │ ├── stm32f4xx_sai.c │ │ ├── stm32f4xx_sdio.c │ │ ├── stm32f4xx_spdifrx.c │ │ ├── stm32f4xx_spi.c │ │ ├── stm32f4xx_syscfg.c │ │ ├── stm32f4xx_tim.c │ │ ├── stm32f4xx_usart.c │ │ └── stm32f4xx_wwdg.c │ ├── Startup │ ├── startup_stm32f401xx.s │ ├── startup_stm32f40_41xxx.s │ ├── startup_stm32f40xx.s │ ├── startup_stm32f427_437xx.s │ ├── startup_stm32f427x.s │ └── startup_stm32f429_439xx.s │ ├── dummylib.c │ ├── stm32f407_std.ld │ ├── stm32f4x7_eth.c │ ├── stm32f4x7_eth.h │ ├── stm32f4x7_eth_bsp.c │ ├── stm32f4x7_eth_bsp.h │ ├── stm32f4x7_eth_conf.h │ ├── stm32f4x7_eth_conf_template.h │ ├── stm32f4xx.h │ ├── system_stm32f4xx.c │ └── system_stm32f4xx.h ├── project ├── prj.qbs └── qbs │ └── imports │ ├── FileExtension.js │ └── Stm32f4Application.qbs └── src └── main.c /.gitignore: -------------------------------------------------------------------------------- 1 | # C++ objects and libs 2 | 3 | *.slo 4 | *.lo 5 | *.o 6 | *.a 7 | *.la 8 | *.lai 9 | *.so 10 | *.dll 11 | *.dylib 12 | 13 | # Qt-es 14 | 15 | /.qmake.cache 16 | /.qmake.stash 17 | *.pro.user 18 | *.pro.user.* 19 | *.qbs.user 20 | *.qbs.user.* 21 | *.moc 22 | moc_*.cpp 23 | qrc_*.cpp 24 | ui_*.h 25 | Makefile* 26 | *build-* 27 | 28 | # QtCreator 29 | 30 | *.autosave 31 | 32 | #QtCtreator Qml 33 | *.qmlproject.user 34 | *.qmlproject.user.* 35 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | This reposistory is an example Qt Creator for use with ARM Cortex m-devices. This readme will describe a tutorial to set this all up. 2 | The main reason for creating this reposistory is to answer [this question thoroughly on StackExchange Electronics](http://electronics.stackexchange.com/questions/212018/creating-a-qt-project-for-an-arm-stm32-microcontroller/212077#212077) 3 | 4 | Requisites: 5 | 6 | - Qt Creator (download from QT site) 7 | - ARM GCC (Ubuntu: apt-get install gcc-arm-none-eabi) 8 | - GDB source archive (download from [archive](http://ftp.gnu.org/gnu/gdb/)) 9 | - OpenOCD (Ubuntu: apt-get install openocd) 10 | 11 | I used versions: Qt Creator 3.6.0, ARM GCC 4.8.2-14ubuntu1+6, ARM GDB 7.6/7.10 with python support and OpenOCD 0.7.0. 12 | 13 | 1) Install Qt Creator. Open Help -> About Plugins. Find category Device Support and check BareMetal. 14 | ![Plugins](https://raw.githubusercontent.com/nlhans/qt-baremetal/master/img/plugin.png) 15 | 16 | 2) Go to Tools -> Options. There are a few settings we need to create and adjust in order to compile for an ARM Cortex controller. 17 | 18 | a) Go to "Bare Metal" (last category) - add a debugger of your choice. I personally use OpenOCD. At this point you can set the connection to gdb and it's port, as well as init commands. The standard commands are set for STM32F4xx chips - but I guess you can modify it to work with any ARM Cortex controller. 19 | ![OpenOCD gdb](https://raw.githubusercontent.com/nlhans/qt-baremetal/master/img/openocd-gdb.png) 20 | 21 | b) Go to "Devices". Add a new device, choose Bare Metal and the GDB provider you have just created. There is nothing else to setup here. 22 | ![Device](https://raw.githubusercontent.com/nlhans/qt-baremetal/master/img/device.png) 23 | 24 | c) Go to "Build & Run" - tab Debuggers. This has been the most trickiest thing to do. 25 | 26 | You need an arm gdb version **with python scripting support**. At the time (about 9 months back when I write this post) the binaries in Ubuntu repo does not have this option. You can save a lot of time/hassle by checking if this has changed. 27 | 28 | Nevertheless if you do need to compile GDB with python support, here is how to do it. Download GDB from the [download archives](http://ftp.gnu.org/gnu/gdb/). I still use GDB-7.6 which seems to work fine, but for this tutorial I have recompiled it for GDB-7.10. 29 | 30 | Extract the source archive. Open in terminal and run "./configure --with-python --target=arm-elf". This sets up the make environment for ARM targets with python scripting enabled. Then run make. This takes a while, depending on your system speed. Unfortunately you may be a bit on your own once the compilation stops because of dependency issues. Don't be afraid - this happened to me on my first try too and I figured it out with a bunch of google searches! 31 | If python fails, make sure to install the python2.x-dev package (check your version no - likely 2.7). Assuming compilation went well, you can find the gdb executable in the main directory. 32 | 33 | If you're on Mac, the process will likely be similar. But I am not familiar with OSX. 34 | If you're on Windows, sorry you will need to google a bit on how to do this with Mingw or whatever (honestly I don't know). Or maybe find binaries that have this support enabled. 35 | 36 | Once you acquired a gdb executable, call it e.g. "ARM GDB" and set the path to it. I personally don't bother to place it in /usr/bin/, but I guess you could. 37 | 38 | This window will throw an error if you use a gdb executable that is not compiled with Python Scripting. 39 | ![GDB debugger](https://raw.githubusercontent.com/nlhans/qt-baremetal/master/img/debugger.png) 40 | 41 | d) Tab "Build & Run" - "Compilers" 42 | 43 | Create a new "GCC compiler" and call it "ARM GCC". For path use "/usr/bin/arm-none-eabi-gcc". The "ABI" is not really important, I have just set it to arm-unknown-unknown-unknown-32bit. 44 | 45 | e) Tab "Build & Run" - "Kits". Add a new kit, I called mine "ARM Bare Metal". 46 | Device type: "Bare Metal" 47 | Device: point to the Device you have created with it's OpenOCD/St link GDB server 48 | Sysroot: leave it empty 49 | Compiler: ARM GCC 50 | Debugger: ARM GDB 51 | Qt Version: None - You obviously cannot run the QT runtime on a Cortex m4! 52 | Cmake tool: unused 53 | 54 | ![Kit](https://raw.githubusercontent.com/nlhans/qt-baremetal/master/img/kit.png) 55 | 56 | Make sure there are no warnings in any of the Build & Run tabs 57 | 58 | 3) Make your make/qmake/QBS project. This reposistory contains an example QBS project for the STM32F4 discovery. It contains the CMSIS library, linker script as well as an (outdated?) ethernet library for the STM32F407. 59 | 60 | On left side go to tab "projects" and at left-top add the "ARM Bare Metal" kit. This should work without errors. 61 | Your project may start out with a desktop kit. Replacing usually does not work. In that case add an ARM kit and then remove the desktop one. 62 | 63 | 4) Start your OpenOcd server. I use a STM32F4 discovery for development, and also off-board programming to my own STM32 boards. For any STM32F40x/STM32F41x targets run: 64 | 65 | openocd -f board/stm32f4discovery.cfg 66 | 67 | This starts a gdb server at port 3333 and a telnet server (for OpenOCD commands) at 4444. As a shortcut I create a few .sh files in my home directory for a quick startup of a GDB server. 68 | 69 | 5) Start the debug session. It should program and run now! :) 70 | 71 | You can set breakpoints, step through code, even move PC back, watch call stack, variables (locals / watch), and disassembly. I'm really quited please with this, but obviously it lacks a few things like: 72 | 73 | 1) "Register view". Yes it has one, but that's just the CPU registers. I want register view of my peripherals as well. 74 | 2) Download progress or more detailed info about connection state. You need to refer to openocd for this. 75 | -------------------------------------------------------------------------------- /bin/debug/.git-empty: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/bin/debug/.git-empty -------------------------------------------------------------------------------- /bin/release/.git-empty: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/bin/release/.git-empty -------------------------------------------------------------------------------- /helloworld.qbs: -------------------------------------------------------------------------------- 1 | import qbs 2 | 3 | Project { 4 | qbsSearchPaths: "/home/hans/projects/Software/qt-baremetal/project/qbs" 5 | 6 | references: [ 7 | "project/prj.qbs" 8 | ] 9 | } 10 | -------------------------------------------------------------------------------- /img/compiler.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/img/compiler.png -------------------------------------------------------------------------------- /img/debugger.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/img/debugger.png -------------------------------------------------------------------------------- /img/device.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/img/device.png -------------------------------------------------------------------------------- /img/kit.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/img/kit.png -------------------------------------------------------------------------------- /img/openocd-gdb.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/img/openocd-gdb.png -------------------------------------------------------------------------------- /img/plugin.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/img/plugin.png -------------------------------------------------------------------------------- /lib/STM32F4xx/Include/arm_common_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 31. July 2014 5 | * $Revision: V1.4.4 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_common_tables.h 9 | * 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 11 | * 12 | * Target Processor: Cortex-M4/Cortex-M3 13 | * 14 | * Redistribution and use in source and binary forms, with or without 15 | * modification, are permitted provided that the following conditions 16 | * are met: 17 | * - Redistributions of source code must retain the above copyright 18 | * notice, this list of conditions and the following disclaimer. 19 | * - Redistributions in binary form must reproduce the above copyright 20 | * notice, this list of conditions and the following disclaimer in 21 | * the documentation and/or other materials provided with the 22 | * distribution. 23 | * - Neither the name of ARM LIMITED nor the names of its contributors 24 | * may be used to endorse or promote products derived from this 25 | * software without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * -------------------------------------------------------------------- */ 40 | 41 | #ifndef _ARM_COMMON_TABLES_H 42 | #define _ARM_COMMON_TABLES_H 43 | 44 | #include "arm_math.h" 45 | 46 | extern const uint16_t armBitRevTable[1024]; 47 | extern const q15_t armRecipTableQ15[64]; 48 | extern const q31_t armRecipTableQ31[64]; 49 | //extern const q31_t realCoefAQ31[1024]; 50 | //extern const q31_t realCoefBQ31[1024]; 51 | extern const float32_t twiddleCoef_16[32]; 52 | extern const float32_t twiddleCoef_32[64]; 53 | extern const float32_t twiddleCoef_64[128]; 54 | extern const float32_t twiddleCoef_128[256]; 55 | extern const float32_t twiddleCoef_256[512]; 56 | extern const float32_t twiddleCoef_512[1024]; 57 | extern const float32_t twiddleCoef_1024[2048]; 58 | extern const float32_t twiddleCoef_2048[4096]; 59 | extern const float32_t twiddleCoef_4096[8192]; 60 | #define twiddleCoef twiddleCoef_4096 61 | extern const q31_t twiddleCoef_16_q31[24]; 62 | extern const q31_t twiddleCoef_32_q31[48]; 63 | extern const q31_t twiddleCoef_64_q31[96]; 64 | extern const q31_t twiddleCoef_128_q31[192]; 65 | extern const q31_t twiddleCoef_256_q31[384]; 66 | extern const q31_t twiddleCoef_512_q31[768]; 67 | extern const q31_t twiddleCoef_1024_q31[1536]; 68 | extern const q31_t twiddleCoef_2048_q31[3072]; 69 | extern const q31_t twiddleCoef_4096_q31[6144]; 70 | extern const q15_t twiddleCoef_16_q15[24]; 71 | extern const q15_t twiddleCoef_32_q15[48]; 72 | extern const q15_t twiddleCoef_64_q15[96]; 73 | extern const q15_t twiddleCoef_128_q15[192]; 74 | extern const q15_t twiddleCoef_256_q15[384]; 75 | extern const q15_t twiddleCoef_512_q15[768]; 76 | extern const q15_t twiddleCoef_1024_q15[1536]; 77 | extern const q15_t twiddleCoef_2048_q15[3072]; 78 | extern const q15_t twiddleCoef_4096_q15[6144]; 79 | extern const float32_t twiddleCoef_rfft_32[32]; 80 | extern const float32_t twiddleCoef_rfft_64[64]; 81 | extern const float32_t twiddleCoef_rfft_128[128]; 82 | extern const float32_t twiddleCoef_rfft_256[256]; 83 | extern const float32_t twiddleCoef_rfft_512[512]; 84 | extern const float32_t twiddleCoef_rfft_1024[1024]; 85 | extern const float32_t twiddleCoef_rfft_2048[2048]; 86 | extern const float32_t twiddleCoef_rfft_4096[4096]; 87 | 88 | 89 | /* floating-point bit reversal tables */ 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) 99 | 100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; 101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; 102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; 103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; 104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; 105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; 106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; 107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; 108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; 109 | 110 | /* fixed-point bit reversal tables */ 111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) 112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) 113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) 114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) 115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) 116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) 117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) 118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) 119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) 120 | 121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; 122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; 123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; 124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; 125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; 126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; 127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; 128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; 129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; 130 | 131 | /* Tables for Fast Math Sine and Cosine */ 132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; 133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; 134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; 135 | 136 | #endif /* ARM_COMMON_TABLES_H */ 137 | -------------------------------------------------------------------------------- /lib/STM32F4xx/Include/arm_const_structs.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 31. July 2014 5 | * $Revision: V1.4.4 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_const_structs.h 9 | * 10 | * Description: This file has constant structs that are initialized for 11 | * user convenience. For example, some can be given as 12 | * arguments to the arm_cfft_f32() function. 13 | * 14 | * Target Processor: Cortex-M4/Cortex-M3 15 | * 16 | * Redistribution and use in source and binary forms, with or without 17 | * modification, are permitted provided that the following conditions 18 | * are met: 19 | * - Redistributions of source code must retain the above copyright 20 | * notice, this list of conditions and the following disclaimer. 21 | * - Redistributions in binary form must reproduce the above copyright 22 | * notice, this list of conditions and the following disclaimer in 23 | * the documentation and/or other materials provided with the 24 | * distribution. 25 | * - Neither the name of ARM LIMITED nor the names of its contributors 26 | * may be used to endorse or promote products derived from this 27 | * software without specific prior written permission. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 | * POSSIBILITY OF SUCH DAMAGE. 41 | * -------------------------------------------------------------------- */ 42 | 43 | #ifndef _ARM_CONST_STRUCTS_H 44 | #define _ARM_CONST_STRUCTS_H 45 | 46 | #include "arm_math.h" 47 | #include "arm_common_tables.h" 48 | 49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; 50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; 51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; 52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; 53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; 54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; 55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; 56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; 57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; 58 | 59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; 60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; 61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; 62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; 63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; 64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; 65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; 66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; 67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; 68 | 69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; 70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; 71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; 72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; 73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; 74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; 75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; 76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; 77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; 78 | 79 | #endif 80 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/Release_Notes.html: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/Release_Notes.html -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/misc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file misc.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the miscellaneous 8 | * firmware library functions (add-on to CMSIS functions). 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2015 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __MISC_H 31 | #define __MISC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup MISC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /** 51 | * @brief NVIC Init Structure definition 52 | */ 53 | 54 | typedef struct 55 | { 56 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. 57 | This parameter can be an enumerator of @ref IRQn_Type 58 | enumeration (For the complete STM32 Devices IRQ Channels 59 | list, please refer to stm32f4xx.h file) */ 60 | 61 | uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel 62 | specified in NVIC_IRQChannel. This parameter can be a value 63 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table 64 | A lower priority value indicates a higher priority */ 65 | 66 | uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified 67 | in NVIC_IRQChannel. This parameter can be a value 68 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table 69 | A lower priority value indicates a higher priority */ 70 | 71 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel 72 | will be enabled or disabled. 73 | This parameter can be set either to ENABLE or DISABLE */ 74 | } NVIC_InitTypeDef; 75 | 76 | /* Exported constants --------------------------------------------------------*/ 77 | 78 | /** @defgroup MISC_Exported_Constants 79 | * @{ 80 | */ 81 | 82 | /** @defgroup MISC_Vector_Table_Base 83 | * @{ 84 | */ 85 | 86 | #define NVIC_VectTab_RAM ((uint32_t)0x20000000) 87 | #define NVIC_VectTab_FLASH ((uint32_t)0x08000000) 88 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \ 89 | ((VECTTAB) == NVIC_VectTab_FLASH)) 90 | /** 91 | * @} 92 | */ 93 | 94 | /** @defgroup MISC_System_Low_Power 95 | * @{ 96 | */ 97 | 98 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10) 99 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) 100 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) 101 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ 102 | ((LP) == NVIC_LP_SLEEPDEEP) || \ 103 | ((LP) == NVIC_LP_SLEEPONEXIT)) 104 | /** 105 | * @} 106 | */ 107 | 108 | /** @defgroup MISC_Preemption_Priority_Group 109 | * @{ 110 | */ 111 | 112 | #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority 113 | 4 bits for subpriority */ 114 | #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority 115 | 3 bits for subpriority */ 116 | #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority 117 | 2 bits for subpriority */ 118 | #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority 119 | 1 bits for subpriority */ 120 | #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority 121 | 0 bits for subpriority */ 122 | 123 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ 124 | ((GROUP) == NVIC_PriorityGroup_1) || \ 125 | ((GROUP) == NVIC_PriorityGroup_2) || \ 126 | ((GROUP) == NVIC_PriorityGroup_3) || \ 127 | ((GROUP) == NVIC_PriorityGroup_4)) 128 | 129 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 130 | 131 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 132 | 133 | #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @defgroup MISC_SysTick_clock_source 140 | * @{ 141 | */ 142 | 143 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) 144 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) 145 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ 146 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8)) 147 | /** 148 | * @} 149 | */ 150 | 151 | /** 152 | * @} 153 | */ 154 | 155 | /* Exported macro ------------------------------------------------------------*/ 156 | /* Exported functions --------------------------------------------------------*/ 157 | 158 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); 159 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); 160 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset); 161 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState); 162 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource); 163 | 164 | #ifdef __cplusplus 165 | } 166 | #endif 167 | 168 | #endif /* __MISC_H */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 179 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_crc.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the CRC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2015 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_CRC_H 31 | #define __STM32F4xx_CRC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup CRC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup CRC_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /* Exported macro ------------------------------------------------------------*/ 60 | /* Exported functions --------------------------------------------------------*/ 61 | 62 | void CRC_ResetDR(void); 63 | uint32_t CRC_CalcCRC(uint32_t Data); 64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); 65 | uint32_t CRC_GetCRC(void); 66 | void CRC_SetIDRegister(uint8_t IDValue); 67 | uint8_t CRC_GetIDRegister(void); 68 | 69 | #ifdef __cplusplus 70 | } 71 | #endif 72 | 73 | #endif /* __STM32F4xx_CRC_H */ 74 | 75 | /** 76 | * @} 77 | */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 84 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dbgmcu.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_dbgmcu.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the DBGMCU firmware library. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2015 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32F4xx_DBGMCU_H 30 | #define __STM32F4xx_DBGMCU_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32f4xx.h" 38 | 39 | /** @addtogroup STM32F4xx_StdPeriph_Driver 40 | * @{ 41 | */ 42 | 43 | /** @addtogroup DBGMCU 44 | * @{ 45 | */ 46 | 47 | /* Exported types ------------------------------------------------------------*/ 48 | /* Exported constants --------------------------------------------------------*/ 49 | 50 | /** @defgroup DBGMCU_Exported_Constants 51 | * @{ 52 | */ 53 | #define DBGMCU_SLEEP ((uint32_t)0x00000001) 54 | #define DBGMCU_STOP ((uint32_t)0x00000002) 55 | #define DBGMCU_STANDBY ((uint32_t)0x00000004) 56 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00)) 57 | 58 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000001) 59 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00000002) 60 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00000004) 61 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00000008) 62 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00000010) 63 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00000020) 64 | #define DBGMCU_TIM12_STOP ((uint32_t)0x00000040) 65 | #define DBGMCU_TIM13_STOP ((uint32_t)0x00000080) 66 | #define DBGMCU_TIM14_STOP ((uint32_t)0x00000100) 67 | #define DBGMCU_RTC_STOP ((uint32_t)0x00000400) 68 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000800) 69 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00001000) 70 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000) 71 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000) 72 | #define DBGMCU_I2C3_SMBUS_TIMEOUT ((uint32_t)0x00800000) 73 | #define DBGMCU_CAN1_STOP ((uint32_t)0x02000000) 74 | #define DBGMCU_CAN2_STOP ((uint32_t)0x04000000) 75 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00)) 76 | 77 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000001) 78 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00000002) 79 | #define DBGMCU_TIM9_STOP ((uint32_t)0x00010000) 80 | #define DBGMCU_TIM10_STOP ((uint32_t)0x00020000) 81 | #define DBGMCU_TIM11_STOP ((uint32_t)0x00040000) 82 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00)) 83 | /** 84 | * @} 85 | */ 86 | 87 | /* Exported macro ------------------------------------------------------------*/ 88 | /* Exported functions --------------------------------------------------------*/ 89 | uint32_t DBGMCU_GetREVID(void); 90 | uint32_t DBGMCU_GetDEVID(void); 91 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); 92 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState); 93 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState); 94 | 95 | #ifdef __cplusplus 96 | } 97 | #endif 98 | 99 | #endif /* __STM32F4xx_DBGMCU_H */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | /** 106 | * @} 107 | */ 108 | 109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 110 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_exti.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the EXTI firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2015 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_EXTI_H 31 | #define __STM32F4xx_EXTI_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup EXTI 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /** 51 | * @brief EXTI mode enumeration 52 | */ 53 | 54 | typedef enum 55 | { 56 | EXTI_Mode_Interrupt = 0x00, 57 | EXTI_Mode_Event = 0x04 58 | }EXTIMode_TypeDef; 59 | 60 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) 61 | 62 | /** 63 | * @brief EXTI Trigger enumeration 64 | */ 65 | 66 | typedef enum 67 | { 68 | EXTI_Trigger_Rising = 0x08, 69 | EXTI_Trigger_Falling = 0x0C, 70 | EXTI_Trigger_Rising_Falling = 0x10 71 | }EXTITrigger_TypeDef; 72 | 73 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ 74 | ((TRIGGER) == EXTI_Trigger_Falling) || \ 75 | ((TRIGGER) == EXTI_Trigger_Rising_Falling)) 76 | /** 77 | * @brief EXTI Init Structure definition 78 | */ 79 | 80 | typedef struct 81 | { 82 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. 83 | This parameter can be any combination value of @ref EXTI_Lines */ 84 | 85 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. 86 | This parameter can be a value of @ref EXTIMode_TypeDef */ 87 | 88 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 89 | This parameter can be a value of @ref EXTITrigger_TypeDef */ 90 | 91 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. 92 | This parameter can be set either to ENABLE or DISABLE */ 93 | }EXTI_InitTypeDef; 94 | 95 | /* Exported constants --------------------------------------------------------*/ 96 | 97 | /** @defgroup EXTI_Exported_Constants 98 | * @{ 99 | */ 100 | 101 | /** @defgroup EXTI_Lines 102 | * @{ 103 | */ 104 | 105 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ 106 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ 107 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ 108 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ 109 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ 110 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ 111 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ 112 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ 113 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ 114 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ 115 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ 116 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ 117 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ 118 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ 119 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ 120 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ 121 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ 122 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ 123 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */ 124 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ 125 | #define EXTI_Line20 ((uint32_t)0x00100000) /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */ 126 | #define EXTI_Line21 ((uint32_t)0x00200000) /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */ 127 | #define EXTI_Line22 ((uint32_t)0x00400000) /*!< External interrupt line 22 Connected to the RTC Wakeup event */ 128 | #define EXTI_Line23 ((uint32_t)0x00800000) /*!< External interrupt line 23 Connected to the LPTIM Wakeup event */ 129 | 130 | 131 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFF800000) == 0x00) && ((LINE) != (uint16_t)0x00)) 132 | 133 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ 134 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ 135 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ 136 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ 137 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ 138 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ 139 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ 140 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ 141 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ 142 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \ 143 | ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) ||\ 144 | ((LINE) == EXTI_Line22) || ((LINE) == EXTI_Line23)) 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /* Exported macro ------------------------------------------------------------*/ 155 | /* Exported functions --------------------------------------------------------*/ 156 | 157 | /* Function used to set the EXTI configuration to the default reset state *****/ 158 | void EXTI_DeInit(void); 159 | 160 | /* Initialization and Configuration functions *********************************/ 161 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); 162 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); 163 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); 164 | 165 | /* Interrupts and flags management functions **********************************/ 166 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); 167 | void EXTI_ClearFlag(uint32_t EXTI_Line); 168 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); 169 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line); 170 | 171 | #ifdef __cplusplus 172 | } 173 | #endif 174 | 175 | #endif /* __STM32F4xx_EXTI_H */ 176 | 177 | /** 178 | * @} 179 | */ 180 | 181 | /** 182 | * @} 183 | */ 184 | 185 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 186 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_flash_ramfunc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_flash_ramfunc.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief Header file of FLASH RAMFUNC driver. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2015 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H 31 | #define __STM32F4xx_FLASH_RAMFUNC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup FLASH RAMFUNC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Private define ------------------------------------------------------------*/ 50 | /** 51 | * @brief __RAM_FUNC definition 52 | */ 53 | #if defined ( __CC_ARM ) 54 | /* ARM Compiler 55 | ------------ 56 | RAM functions are defined using the toolchain options. 57 | Functions that are executed in RAM should reside in a separate source module. 58 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 59 | area of a module to a memory space in physical RAM. 60 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 61 | dialog. 62 | */ 63 | #define __RAM_FUNC void 64 | 65 | #elif defined ( __ICCARM__ ) 66 | /* ICCARM Compiler 67 | --------------- 68 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 69 | */ 70 | #define __RAM_FUNC __ramfunc void 71 | 72 | #elif defined ( __GNUC__ ) 73 | /* GNU Compiler 74 | ------------ 75 | RAM functions are defined using a specific toolchain attribute 76 | "__attribute__((section(".RamFunc")))". 77 | */ 78 | #define __RAM_FUNC void __attribute__((section(".RamFunc"))) 79 | 80 | #endif 81 | /* Exported constants --------------------------------------------------------*/ 82 | /* Exported macro ------------------------------------------------------------*/ 83 | /* Exported functions --------------------------------------------------------*/ 84 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState); 85 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState); 86 | 87 | 88 | #ifdef __cplusplus 89 | } 90 | #endif 91 | 92 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */ 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 103 | 104 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_hash.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hash.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the HASH 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2015 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_HASH_H 31 | #define __STM32F4xx_HASH_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup HASH 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /** 51 | * @brief HASH Init structure definition 52 | */ 53 | typedef struct 54 | { 55 | uint32_t HASH_AlgoSelection; /*!< SHA-1, SHA-224, SHA-256 or MD5. This parameter 56 | can be a value of @ref HASH_Algo_Selection */ 57 | uint32_t HASH_AlgoMode; /*!< HASH or HMAC. This parameter can be a value 58 | of @ref HASH_processor_Algorithm_Mode */ 59 | uint32_t HASH_DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 60 | bit string. This parameter can be a value of 61 | @ref HASH_Data_Type */ 62 | uint32_t HASH_HMACKeyType; /*!< HMAC Short key or HMAC Long Key. This parameter 63 | can be a value of @ref HASH_HMAC_Long_key_only_for_HMAC_mode */ 64 | }HASH_InitTypeDef; 65 | 66 | /** 67 | * @brief HASH message digest result structure definition 68 | */ 69 | typedef struct 70 | { 71 | uint32_t Data[8]; /*!< Message digest result : 8x 32bit wors for SHA-256, 72 | 7x 32bit wors for SHA-224, 73 | 5x 32bit words for SHA-1 or 74 | 4x 32bit words for MD5 */ 75 | } HASH_MsgDigest; 76 | 77 | /** 78 | * @brief HASH context swapping structure definition 79 | */ 80 | typedef struct 81 | { 82 | uint32_t HASH_IMR; 83 | uint32_t HASH_STR; 84 | uint32_t HASH_CR; 85 | uint32_t HASH_CSR[54]; 86 | }HASH_Context; 87 | 88 | /* Exported constants --------------------------------------------------------*/ 89 | 90 | /** @defgroup HASH_Exported_Constants 91 | * @{ 92 | */ 93 | 94 | /** @defgroup HASH_Algo_Selection 95 | * @{ 96 | */ 97 | #define HASH_AlgoSelection_SHA1 ((uint32_t)0x0000) /*!< HASH function is SHA1 */ 98 | #define HASH_AlgoSelection_SHA224 HASH_CR_ALGO_1 /*!< HASH function is SHA224 */ 99 | #define HASH_AlgoSelection_SHA256 HASH_CR_ALGO /*!< HASH function is SHA256 */ 100 | #define HASH_AlgoSelection_MD5 HASH_CR_ALGO_0 /*!< HASH function is MD5 */ 101 | 102 | #define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \ 103 | ((ALGOSELECTION) == HASH_AlgoSelection_SHA224) || \ 104 | ((ALGOSELECTION) == HASH_AlgoSelection_SHA256) || \ 105 | ((ALGOSELECTION) == HASH_AlgoSelection_MD5)) 106 | /** 107 | * @} 108 | */ 109 | 110 | /** @defgroup HASH_processor_Algorithm_Mode 111 | * @{ 112 | */ 113 | #define HASH_AlgoMode_HASH ((uint32_t)0x00000000) /*!< Algorithm is HASH */ 114 | #define HASH_AlgoMode_HMAC HASH_CR_MODE /*!< Algorithm is HMAC */ 115 | 116 | #define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \ 117 | ((ALGOMODE) == HASH_AlgoMode_HMAC)) 118 | /** 119 | * @} 120 | */ 121 | 122 | /** @defgroup HASH_Data_Type 123 | * @{ 124 | */ 125 | #define HASH_DataType_32b ((uint32_t)0x0000) /*!< 32-bit data. No swapping */ 126 | #define HASH_DataType_16b HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped */ 127 | #define HASH_DataType_8b HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped */ 128 | #define HASH_DataType_1b HASH_CR_DATATYPE /*!< 1-bit data. In the word all bits are swapped */ 129 | 130 | #define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DataType_32b)|| \ 131 | ((DATATYPE) == HASH_DataType_16b)|| \ 132 | ((DATATYPE) == HASH_DataType_8b) || \ 133 | ((DATATYPE) == HASH_DataType_1b)) 134 | /** 135 | * @} 136 | */ 137 | 138 | /** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode 139 | * @{ 140 | */ 141 | #define HASH_HMACKeyType_ShortKey ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */ 142 | #define HASH_HMACKeyType_LongKey HASH_CR_LKEY /*!< HMAC Key is > 64 bytes */ 143 | 144 | #define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \ 145 | ((KEYTYPE) == HASH_HMACKeyType_LongKey)) 146 | /** 147 | * @} 148 | */ 149 | 150 | /** @defgroup Number_of_valid_bits_in_last_word_of_the_message 151 | * @{ 152 | */ 153 | #define IS_HASH_VALIDBITSNUMBER(VALIDBITS) ((VALIDBITS) <= 0x1F) 154 | 155 | /** 156 | * @} 157 | */ 158 | 159 | /** @defgroup HASH_interrupts_definition 160 | * @{ 161 | */ 162 | #define HASH_IT_DINI HASH_IMR_DINIM /*!< A new block can be entered into the input buffer (DIN) */ 163 | #define HASH_IT_DCI HASH_IMR_DCIM /*!< Digest calculation complete */ 164 | 165 | #define IS_HASH_IT(IT) ((((IT) & (uint32_t)0xFFFFFFFC) == 0x00000000) && ((IT) != 0x00000000)) 166 | #define IS_HASH_GET_IT(IT) (((IT) == HASH_IT_DINI) || ((IT) == HASH_IT_DCI)) 167 | 168 | /** 169 | * @} 170 | */ 171 | 172 | /** @defgroup HASH_flags_definition 173 | * @{ 174 | */ 175 | #define HASH_FLAG_DINIS HASH_SR_DINIS /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer */ 176 | #define HASH_FLAG_DCIS HASH_SR_DCIS /*!< Digest calculation complete */ 177 | #define HASH_FLAG_DMAS HASH_SR_DMAS /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */ 178 | #define HASH_FLAG_BUSY HASH_SR_BUSY /*!< The hash core is Busy : processing a block of data */ 179 | #define HASH_FLAG_DINNE HASH_CR_DINNE /*!< DIN not empty : The input buffer contains at least one word of data */ 180 | 181 | #define IS_HASH_GET_FLAG(FLAG) (((FLAG) == HASH_FLAG_DINIS) || \ 182 | ((FLAG) == HASH_FLAG_DCIS) || \ 183 | ((FLAG) == HASH_FLAG_DMAS) || \ 184 | ((FLAG) == HASH_FLAG_BUSY) || \ 185 | ((FLAG) == HASH_FLAG_DINNE)) 186 | 187 | #define IS_HASH_CLEAR_FLAG(FLAG)(((FLAG) == HASH_FLAG_DINIS) || \ 188 | ((FLAG) == HASH_FLAG_DCIS)) 189 | 190 | /** 191 | * @} 192 | */ 193 | 194 | /** 195 | * @} 196 | */ 197 | 198 | /* Exported macro ------------------------------------------------------------*/ 199 | /* Exported functions --------------------------------------------------------*/ 200 | 201 | /* Function used to set the HASH configuration to the default reset state ****/ 202 | void HASH_DeInit(void); 203 | 204 | /* HASH Configuration function ************************************************/ 205 | void HASH_Init(HASH_InitTypeDef* HASH_InitStruct); 206 | void HASH_StructInit(HASH_InitTypeDef* HASH_InitStruct); 207 | void HASH_Reset(void); 208 | 209 | /* HASH Message Digest generation functions ***********************************/ 210 | void HASH_DataIn(uint32_t Data); 211 | uint8_t HASH_GetInFIFOWordsNbr(void); 212 | void HASH_SetLastWordValidBitsNbr(uint16_t ValidNumber); 213 | void HASH_StartDigest(void); 214 | void HASH_AutoStartDigest(FunctionalState NewState); 215 | void HASH_GetDigest(HASH_MsgDigest* HASH_MessageDigest); 216 | 217 | /* HASH Context swapping functions ********************************************/ 218 | void HASH_SaveContext(HASH_Context* HASH_ContextSave); 219 | void HASH_RestoreContext(HASH_Context* HASH_ContextRestore); 220 | 221 | /* HASH DMA interface function ************************************************/ 222 | void HASH_DMACmd(FunctionalState NewState); 223 | 224 | /* HASH Interrupts and flags management functions *****************************/ 225 | void HASH_ITConfig(uint32_t HASH_IT, FunctionalState NewState); 226 | FlagStatus HASH_GetFlagStatus(uint32_t HASH_FLAG); 227 | void HASH_ClearFlag(uint32_t HASH_FLAG); 228 | ITStatus HASH_GetITStatus(uint32_t HASH_IT); 229 | void HASH_ClearITPendingBit(uint32_t HASH_IT); 230 | 231 | /* High Level SHA1 functions **************************************************/ 232 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20]); 233 | ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen, 234 | uint8_t *Input, uint32_t Ilen, 235 | uint8_t Output[20]); 236 | 237 | /* High Level MD5 functions ***************************************************/ 238 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16]); 239 | ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen, 240 | uint8_t *Input, uint32_t Ilen, 241 | uint8_t Output[16]); 242 | 243 | #ifdef __cplusplus 244 | } 245 | #endif 246 | 247 | #endif /*__STM32F4xx_HASH_H */ 248 | 249 | /** 250 | * @} 251 | */ 252 | 253 | /** 254 | * @} 255 | */ 256 | 257 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 258 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_iwdg.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the IWDG 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2015 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_IWDG_H 31 | #define __STM32F4xx_IWDG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup IWDG 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup IWDG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup IWDG_WriteAccess 56 | * @{ 57 | */ 58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) 59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000) 60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ 61 | ((ACCESS) == IWDG_WriteAccess_Disable)) 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup IWDG_prescaler 67 | * @{ 68 | */ 69 | #define IWDG_Prescaler_4 ((uint8_t)0x00) 70 | #define IWDG_Prescaler_8 ((uint8_t)0x01) 71 | #define IWDG_Prescaler_16 ((uint8_t)0x02) 72 | #define IWDG_Prescaler_32 ((uint8_t)0x03) 73 | #define IWDG_Prescaler_64 ((uint8_t)0x04) 74 | #define IWDG_Prescaler_128 ((uint8_t)0x05) 75 | #define IWDG_Prescaler_256 ((uint8_t)0x06) 76 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ 77 | ((PRESCALER) == IWDG_Prescaler_8) || \ 78 | ((PRESCALER) == IWDG_Prescaler_16) || \ 79 | ((PRESCALER) == IWDG_Prescaler_32) || \ 80 | ((PRESCALER) == IWDG_Prescaler_64) || \ 81 | ((PRESCALER) == IWDG_Prescaler_128)|| \ 82 | ((PRESCALER) == IWDG_Prescaler_256)) 83 | /** 84 | * @} 85 | */ 86 | 87 | /** @defgroup IWDG_Flag 88 | * @{ 89 | */ 90 | #define IWDG_FLAG_PVU ((uint16_t)0x0001) 91 | #define IWDG_FLAG_RVU ((uint16_t)0x0002) 92 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) 93 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) 94 | /** 95 | * @} 96 | */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /* Exported macro ------------------------------------------------------------*/ 103 | /* Exported functions --------------------------------------------------------*/ 104 | 105 | /* Prescaler and Counter configuration functions ******************************/ 106 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); 107 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); 108 | void IWDG_SetReload(uint16_t Reload); 109 | void IWDG_ReloadCounter(void); 110 | 111 | /* IWDG activation function ***************************************************/ 112 | void IWDG_Enable(void); 113 | 114 | /* Flag management function ***************************************************/ 115 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); 116 | 117 | #ifdef __cplusplus 118 | } 119 | #endif 120 | 121 | #endif /* __STM32F4xx_IWDG_H */ 122 | 123 | /** 124 | * @} 125 | */ 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 132 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_pwr.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the PWR firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2015 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_PWR_H 31 | #define __STM32F4xx_PWR_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup PWR 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup PWR_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup PWR_PVD_detection_level 56 | * @{ 57 | */ 58 | #define PWR_PVDLevel_0 PWR_CR_PLS_LEV0 59 | #define PWR_PVDLevel_1 PWR_CR_PLS_LEV1 60 | #define PWR_PVDLevel_2 PWR_CR_PLS_LEV2 61 | #define PWR_PVDLevel_3 PWR_CR_PLS_LEV3 62 | #define PWR_PVDLevel_4 PWR_CR_PLS_LEV4 63 | #define PWR_PVDLevel_5 PWR_CR_PLS_LEV5 64 | #define PWR_PVDLevel_6 PWR_CR_PLS_LEV6 65 | #define PWR_PVDLevel_7 PWR_CR_PLS_LEV7 66 | 67 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \ 68 | ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \ 69 | ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \ 70 | ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7)) 71 | /** 72 | * @} 73 | */ 74 | 75 | 76 | /** @defgroup PWR_Regulator_state_in_STOP_mode 77 | * @{ 78 | */ 79 | #define PWR_MainRegulator_ON ((uint32_t)0x00000000) 80 | #define PWR_LowPowerRegulator_ON PWR_CR_LPDS 81 | 82 | /* --- PWR_Legacy ---*/ 83 | #define PWR_Regulator_ON PWR_MainRegulator_ON 84 | #define PWR_Regulator_LowPower PWR_LowPowerRegulator_ON 85 | 86 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MainRegulator_ON) || \ 87 | ((REGULATOR) == PWR_LowPowerRegulator_ON)) 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @defgroup PWR_Regulator_state_in_UnderDrive_mode 94 | * @{ 95 | */ 96 | #define PWR_MainRegulator_UnderDrive_ON PWR_CR_MRUDS 97 | #define PWR_LowPowerRegulator_UnderDrive_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS)) 98 | 99 | #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MainRegulator_UnderDrive_ON) || \ 100 | ((REGULATOR) == PWR_LowPowerRegulator_UnderDrive_ON)) 101 | 102 | /** 103 | * @} 104 | */ 105 | #if defined(STM32F410xx) || defined(STM32F446xx) 106 | /** @defgroup PWR_Wake_Up_Pin 107 | * @{ 108 | */ 109 | #define PWR_WakeUp_Pin1 ((uint32_t)0x00) 110 | #define PWR_WakeUp_Pin2 ((uint32_t)0x01) 111 | #if defined(STM32F410xx) 112 | #define PWR_WakeUp_Pin3 ((uint32_t)0x02) 113 | #endif /* STM32F410xx */ 114 | 115 | #if defined(STM32F446xx) 116 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WakeUp_Pin1) || \ 117 | ((PIN) == PWR_WakeUp_Pin2)) 118 | #else /* STM32F410xx */ 119 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \ 120 | ((PIN) == PWR_WAKEUP_PIN3)) 121 | #endif /* STM32F446xx */ 122 | /** 123 | * @} 124 | */ 125 | #endif /* STM32F410xx || STM32F446xx */ 126 | 127 | /** @defgroup PWR_STOP_mode_entry 128 | * @{ 129 | */ 130 | #define PWR_STOPEntry_WFI ((uint8_t)0x01) 131 | #define PWR_STOPEntry_WFE ((uint8_t)0x02) 132 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) 133 | /** 134 | * @} 135 | */ 136 | 137 | /** @defgroup PWR_Regulator_Voltage_Scale 138 | * @{ 139 | */ 140 | #define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x0000C000) 141 | #define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00008000) 142 | #define PWR_Regulator_Voltage_Scale3 ((uint32_t)0x00004000) 143 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || \ 144 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale2) || \ 145 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale3)) 146 | /** 147 | * @} 148 | */ 149 | 150 | /** @defgroup PWR_Flag 151 | * @{ 152 | */ 153 | #define PWR_FLAG_WU PWR_CSR_WUF 154 | #define PWR_FLAG_SB PWR_CSR_SBF 155 | #define PWR_FLAG_PVDO PWR_CSR_PVDO 156 | #define PWR_FLAG_BRR PWR_CSR_BRR 157 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY 158 | #define PWR_FLAG_ODRDY PWR_CSR_ODRDY 159 | #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY 160 | #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY 161 | 162 | /* --- FLAG Legacy ---*/ 163 | #define PWR_FLAG_REGRDY PWR_FLAG_VOSRDY 164 | 165 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 166 | ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \ 167 | ((FLAG) == PWR_FLAG_VOSRDY) || ((FLAG) == PWR_FLAG_ODRDY) || \ 168 | ((FLAG) == PWR_FLAG_ODSWRDY) || ((FLAG) == PWR_FLAG_UDRDY)) 169 | 170 | 171 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 172 | ((FLAG) == PWR_FLAG_UDRDY)) 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /* Exported macro ------------------------------------------------------------*/ 183 | /* Exported functions --------------------------------------------------------*/ 184 | 185 | /* Function used to set the PWR configuration to the default reset state ******/ 186 | void PWR_DeInit(void); 187 | 188 | /* Backup Domain Access function **********************************************/ 189 | void PWR_BackupAccessCmd(FunctionalState NewState); 190 | 191 | /* PVD configuration functions ************************************************/ 192 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); 193 | void PWR_PVDCmd(FunctionalState NewState); 194 | 195 | /* WakeUp pins configuration functions ****************************************/ 196 | #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F401xx) || defined(STM32F411xE) 197 | void PWR_WakeUpPinCmd(FunctionalState NewState); 198 | #endif /* STM32F40_41xxx || STM32F427_437xx || STM32F429_439xx || STM32F401xx || STM32F411xE */ 199 | #if defined(STM32F410xx) || defined(STM32F446xx) 200 | void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPinx, FunctionalState NewState); 201 | #endif /* STM32F410xx || STM32F446xx */ 202 | /* Main and Backup Regulators configuration functions *************************/ 203 | void PWR_BackupRegulatorCmd(FunctionalState NewState); 204 | void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage); 205 | void PWR_OverDriveCmd(FunctionalState NewState); 206 | void PWR_OverDriveSWCmd(FunctionalState NewState); 207 | void PWR_UnderDriveCmd(FunctionalState NewState); 208 | 209 | #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) 210 | void PWR_MainRegulatorUnderDriveCmd(FunctionalState NewState); 211 | void PWR_LowRegulatorUnderDriveCmd(FunctionalState NewState); 212 | #endif /* STM32F427_437xx || STM32F429_439xx || STM32F446xx */ 213 | 214 | #if defined(STM32F401xx) || defined(STM32F410xx) || defined(STM32F411xE) 215 | void PWR_MainRegulatorLowVoltageCmd(FunctionalState NewState); 216 | void PWR_LowRegulatorLowVoltageCmd(FunctionalState NewState); 217 | #endif /* STM32F401xx || STM32F410xx || STM32F411xE */ 218 | 219 | /* FLASH Power Down configuration functions ***********************************/ 220 | void PWR_FlashPowerDownCmd(FunctionalState NewState); 221 | 222 | /* Low Power modes configuration functions ************************************/ 223 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 224 | void PWR_EnterUnderDriveSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 225 | void PWR_EnterSTANDBYMode(void); 226 | 227 | /* Flags management functions *************************************************/ 228 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); 229 | void PWR_ClearFlag(uint32_t PWR_FLAG); 230 | 231 | #ifdef __cplusplus 232 | } 233 | #endif 234 | 235 | #endif /* __STM32F4xx_PWR_H */ 236 | 237 | /** 238 | * @} 239 | */ 240 | 241 | /** 242 | * @} 243 | */ 244 | 245 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 246 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rng.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_rng.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the Random 8 | * Number Generator(RNG) firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2015 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_RNG_H 31 | #define __STM32F4xx_RNG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup RNG 45 | * @{ 46 | */ 47 | #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F410xx) || defined(STM32F429_439xx) || defined(STM32F469_479xx) 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup RNG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup RNG_flags_definition 56 | * @{ 57 | */ 58 | #define RNG_FLAG_DRDY ((uint8_t)0x0001) /*!< Data ready */ 59 | #define RNG_FLAG_CECS ((uint8_t)0x0002) /*!< Clock error current status */ 60 | #define RNG_FLAG_SECS ((uint8_t)0x0004) /*!< Seed error current status */ 61 | 62 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \ 63 | ((RNG_FLAG) == RNG_FLAG_CECS) || \ 64 | ((RNG_FLAG) == RNG_FLAG_SECS)) 65 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \ 66 | ((RNG_FLAG) == RNG_FLAG_SECS)) 67 | /** 68 | * @} 69 | */ 70 | 71 | /** @defgroup RNG_interrupts_definition 72 | * @{ 73 | */ 74 | #define RNG_IT_CEI ((uint8_t)0x20) /*!< Clock error interrupt */ 75 | #define RNG_IT_SEI ((uint8_t)0x40) /*!< Seed error interrupt */ 76 | 77 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00)) 78 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI)) 79 | /** 80 | * @} 81 | */ 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /* Exported macro ------------------------------------------------------------*/ 88 | /* Exported functions --------------------------------------------------------*/ 89 | 90 | /* Function used to set the RNG configuration to the default reset state *****/ 91 | void RNG_DeInit(void); 92 | 93 | /* Configuration function *****************************************************/ 94 | void RNG_Cmd(FunctionalState NewState); 95 | 96 | /* Get 32 bit Random number function ******************************************/ 97 | uint32_t RNG_GetRandomNumber(void); 98 | 99 | /* Interrupts and flags management functions **********************************/ 100 | void RNG_ITConfig(FunctionalState NewState); 101 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG); 102 | void RNG_ClearFlag(uint8_t RNG_FLAG); 103 | ITStatus RNG_GetITStatus(uint8_t RNG_IT); 104 | void RNG_ClearITPendingBit(uint8_t RNG_IT); 105 | #endif /* STM32F40_41xxx || STM32F427_437xx || STM32F410xx || STM32F429_439xx || STM32F469_479xx */ 106 | 107 | #ifdef __cplusplus 108 | } 109 | #endif 110 | 111 | #endif /*__STM32F4xx_RNG_H */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /** 118 | * @} 119 | */ 120 | 121 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 122 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_syscfg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_syscfg.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the SYSCFG firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2015 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_SYSCFG_H 31 | #define __STM32F4xx_SYSCFG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup SYSCFG 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup SYSCFG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup SYSCFG_EXTI_Port_Sources 56 | * @{ 57 | */ 58 | #define EXTI_PortSourceGPIOA ((uint8_t)0x00) 59 | #define EXTI_PortSourceGPIOB ((uint8_t)0x01) 60 | #define EXTI_PortSourceGPIOC ((uint8_t)0x02) 61 | #define EXTI_PortSourceGPIOD ((uint8_t)0x03) 62 | #define EXTI_PortSourceGPIOE ((uint8_t)0x04) 63 | #define EXTI_PortSourceGPIOF ((uint8_t)0x05) 64 | #define EXTI_PortSourceGPIOG ((uint8_t)0x06) 65 | #define EXTI_PortSourceGPIOH ((uint8_t)0x07) 66 | #define EXTI_PortSourceGPIOI ((uint8_t)0x08) 67 | #define EXTI_PortSourceGPIOJ ((uint8_t)0x09) 68 | #define EXTI_PortSourceGPIOK ((uint8_t)0x0A) 69 | 70 | #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \ 71 | ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \ 72 | ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \ 73 | ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \ 74 | ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \ 75 | ((PORTSOURCE) == EXTI_PortSourceGPIOF) || \ 76 | ((PORTSOURCE) == EXTI_PortSourceGPIOG) || \ 77 | ((PORTSOURCE) == EXTI_PortSourceGPIOH) || \ 78 | ((PORTSOURCE) == EXTI_PortSourceGPIOI) || \ 79 | ((PORTSOURCE) == EXTI_PortSourceGPIOJ) || \ 80 | ((PORTSOURCE) == EXTI_PortSourceGPIOK)) 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | 87 | /** @defgroup SYSCFG_EXTI_Pin_Sources 88 | * @{ 89 | */ 90 | #define EXTI_PinSource0 ((uint8_t)0x00) 91 | #define EXTI_PinSource1 ((uint8_t)0x01) 92 | #define EXTI_PinSource2 ((uint8_t)0x02) 93 | #define EXTI_PinSource3 ((uint8_t)0x03) 94 | #define EXTI_PinSource4 ((uint8_t)0x04) 95 | #define EXTI_PinSource5 ((uint8_t)0x05) 96 | #define EXTI_PinSource6 ((uint8_t)0x06) 97 | #define EXTI_PinSource7 ((uint8_t)0x07) 98 | #define EXTI_PinSource8 ((uint8_t)0x08) 99 | #define EXTI_PinSource9 ((uint8_t)0x09) 100 | #define EXTI_PinSource10 ((uint8_t)0x0A) 101 | #define EXTI_PinSource11 ((uint8_t)0x0B) 102 | #define EXTI_PinSource12 ((uint8_t)0x0C) 103 | #define EXTI_PinSource13 ((uint8_t)0x0D) 104 | #define EXTI_PinSource14 ((uint8_t)0x0E) 105 | #define EXTI_PinSource15 ((uint8_t)0x0F) 106 | #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \ 107 | ((PINSOURCE) == EXTI_PinSource1) || \ 108 | ((PINSOURCE) == EXTI_PinSource2) || \ 109 | ((PINSOURCE) == EXTI_PinSource3) || \ 110 | ((PINSOURCE) == EXTI_PinSource4) || \ 111 | ((PINSOURCE) == EXTI_PinSource5) || \ 112 | ((PINSOURCE) == EXTI_PinSource6) || \ 113 | ((PINSOURCE) == EXTI_PinSource7) || \ 114 | ((PINSOURCE) == EXTI_PinSource8) || \ 115 | ((PINSOURCE) == EXTI_PinSource9) || \ 116 | ((PINSOURCE) == EXTI_PinSource10) || \ 117 | ((PINSOURCE) == EXTI_PinSource11) || \ 118 | ((PINSOURCE) == EXTI_PinSource12) || \ 119 | ((PINSOURCE) == EXTI_PinSource13) || \ 120 | ((PINSOURCE) == EXTI_PinSource14) || \ 121 | ((PINSOURCE) == EXTI_PinSource15)) 122 | /** 123 | * @} 124 | */ 125 | 126 | 127 | /** @defgroup SYSCFG_Memory_Remap_Config 128 | * @{ 129 | */ 130 | #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00) 131 | #define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01) 132 | #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03) 133 | #define SYSCFG_MemoryRemap_SDRAM ((uint8_t)0x04) 134 | 135 | #if defined (STM32F40_41xxx) 136 | #define SYSCFG_MemoryRemap_FSMC ((uint8_t)0x02) 137 | #endif /* STM32F40_41xxx */ 138 | 139 | #if defined (STM32F427_437xx) || defined (STM32F429_439xx) 140 | #define SYSCFG_MemoryRemap_FMC ((uint8_t)0x02) 141 | #endif /* STM32F427_437xx || STM32F429_439xx */ 142 | 143 | #if defined (STM32F446xx) || defined (STM32F469_479xx) 144 | #define SYSCFG_MemoryRemap_ExtMEM ((uint8_t)0x02) 145 | #endif /* STM32F446xx || STM32F469_479xx */ 146 | 147 | #if defined (STM32F40_41xxx) 148 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \ 149 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \ 150 | ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \ 151 | ((REMAP) == SYSCFG_MemoryRemap_FSMC)) 152 | #endif /* STM32F40_41xxx */ 153 | 154 | #if defined (STM32F401xx) || defined (STM32F410xx) || defined (STM32F411xE) 155 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \ 156 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \ 157 | ((REMAP) == SYSCFG_MemoryRemap_SRAM)) 158 | #endif /* STM32F401xx || STM32F410xx || STM32F411xE */ 159 | 160 | #if defined (STM32F427_437xx) || defined (STM32F429_439xx) 161 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \ 162 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \ 163 | ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \ 164 | ((REMAP) == SYSCFG_MemoryRemap_SDRAM) || \ 165 | ((REMAP) == SYSCFG_MemoryRemap_FMC)) 166 | #endif /* STM32F427_437xx || STM32F429_439xx */ 167 | 168 | #if defined (STM32F446xx) || defined (STM32F469_479xx) 169 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \ 170 | ((REMAP) == SYSCFG_MemoryRemap_ExtMEM) || \ 171 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \ 172 | ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \ 173 | ((REMAP) == SYSCFG_MemoryRemap_SDRAM)) 174 | #endif /* STM32F446xx || STM32F469_479xx */ 175 | 176 | #if defined(STM32F410xx) 177 | #define SYSCFG_Break_PVD SYSCFG_CFGR2_PVDL 178 | #define SYSCFG_Break_HardFault SYSCFG_CFGR2_CLL 179 | 180 | #define IS_SYSCFG_LOCK_CONFIG(BREAK) (((BREAK) == SYSCFG_Break_PVD) || \ 181 | ((BREAK) == SYSCFG_Break_PVD)) 182 | #endif /* STM32F410xx */ 183 | /** 184 | * @} 185 | */ 186 | 187 | 188 | /** @defgroup SYSCFG_ETHERNET_Media_Interface 189 | * @{ 190 | */ 191 | #define SYSCFG_ETH_MediaInterface_MII ((uint32_t)0x00000000) 192 | #define SYSCFG_ETH_MediaInterface_RMII ((uint32_t)0x00000001) 193 | 194 | #define IS_SYSCFG_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == SYSCFG_ETH_MediaInterface_MII) || \ 195 | ((INTERFACE) == SYSCFG_ETH_MediaInterface_RMII)) 196 | /** 197 | * @} 198 | */ 199 | 200 | /** 201 | * @} 202 | */ 203 | 204 | /* Exported macro ------------------------------------------------------------*/ 205 | /* Exported functions --------------------------------------------------------*/ 206 | 207 | void SYSCFG_DeInit(void); 208 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap); 209 | void SYSCFG_MemorySwappingBank(FunctionalState NewState); 210 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex); 211 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface); 212 | void SYSCFG_CompensationCellCmd(FunctionalState NewState); 213 | FlagStatus SYSCFG_GetCompensationCellStatus(void); 214 | #if defined(STM32F410xx) 215 | void SYSCFG_BreakConfig(uint32_t SYSCFG_Break); 216 | #endif /* STM32F410xx */ 217 | #ifdef __cplusplus 218 | } 219 | #endif 220 | 221 | #endif /*__STM32F4xx_SYSCFG_H */ 222 | 223 | /** 224 | * @} 225 | */ 226 | 227 | /** 228 | * @} 229 | */ 230 | 231 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 232 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_wwdg.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file contains all the functions prototypes for the WWDG firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2015 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_WWDG_H 31 | #define __STM32F4xx_WWDG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup WWDG 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup WWDG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup WWDG_Prescaler 56 | * @{ 57 | */ 58 | 59 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000) 60 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080) 61 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100) 62 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180) 63 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ 64 | ((PRESCALER) == WWDG_Prescaler_2) || \ 65 | ((PRESCALER) == WWDG_Prescaler_4) || \ 66 | ((PRESCALER) == WWDG_Prescaler_8)) 67 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) 68 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /* Exported macro ------------------------------------------------------------*/ 79 | /* Exported functions --------------------------------------------------------*/ 80 | 81 | /* Function used to set the WWDG configuration to the default reset state ****/ 82 | void WWDG_DeInit(void); 83 | 84 | /* Prescaler, Refresh window and Counter configuration functions **************/ 85 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); 86 | void WWDG_SetWindowValue(uint8_t WindowValue); 87 | void WWDG_EnableIT(void); 88 | void WWDG_SetCounter(uint8_t Counter); 89 | 90 | /* WWDG activation function ***************************************************/ 91 | void WWDG_Enable(uint8_t Counter); 92 | 93 | /* Interrupts and flags management functions **********************************/ 94 | FlagStatus WWDG_GetFlagStatus(void); 95 | void WWDG_ClearFlag(void); 96 | 97 | #ifdef __cplusplus 98 | } 99 | #endif 100 | 101 | #endif /* __STM32F4xx_WWDG_H */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 112 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_crc.c 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file provides all the CRC firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2015 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f4xx_crc.h" 30 | 31 | /** @addtogroup STM32F4xx_StdPeriph_Driver 32 | * @{ 33 | */ 34 | 35 | /** @defgroup CRC 36 | * @brief CRC driver modules 37 | * @{ 38 | */ 39 | 40 | /* Private typedef -----------------------------------------------------------*/ 41 | /* Private define ------------------------------------------------------------*/ 42 | /* Private macro -------------------------------------------------------------*/ 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | /* Private functions ---------------------------------------------------------*/ 46 | 47 | /** @defgroup CRC_Private_Functions 48 | * @{ 49 | */ 50 | 51 | /** 52 | * @brief Resets the CRC Data register (DR). 53 | * @param None 54 | * @retval None 55 | */ 56 | void CRC_ResetDR(void) 57 | { 58 | /* Reset CRC generator */ 59 | CRC->CR = CRC_CR_RESET; 60 | } 61 | 62 | /** 63 | * @brief Computes the 32-bit CRC of a given data word(32-bit). 64 | * @param Data: data word(32-bit) to compute its CRC 65 | * @retval 32-bit CRC 66 | */ 67 | uint32_t CRC_CalcCRC(uint32_t Data) 68 | { 69 | CRC->DR = Data; 70 | 71 | return (CRC->DR); 72 | } 73 | 74 | /** 75 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). 76 | * @param pBuffer: pointer to the buffer containing the data to be computed 77 | * @param BufferLength: length of the buffer to be computed 78 | * @retval 32-bit CRC 79 | */ 80 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) 81 | { 82 | uint32_t index = 0; 83 | 84 | for(index = 0; index < BufferLength; index++) 85 | { 86 | CRC->DR = pBuffer[index]; 87 | } 88 | return (CRC->DR); 89 | } 90 | 91 | /** 92 | * @brief Returns the current CRC value. 93 | * @param None 94 | * @retval 32-bit CRC 95 | */ 96 | uint32_t CRC_GetCRC(void) 97 | { 98 | return (CRC->DR); 99 | } 100 | 101 | /** 102 | * @brief Stores a 8-bit data in the Independent Data(ID) register. 103 | * @param IDValue: 8-bit value to be stored in the ID register 104 | * @retval None 105 | */ 106 | void CRC_SetIDRegister(uint8_t IDValue) 107 | { 108 | CRC->IDR = IDValue; 109 | } 110 | 111 | /** 112 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register 113 | * @param None 114 | * @retval 8-bit value of the ID register 115 | */ 116 | uint8_t CRC_GetIDRegister(void) 117 | { 118 | return (CRC->IDR); 119 | } 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 134 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_des.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_cryp_des.c 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file provides high level functions to encrypt and decrypt an 8 | * input message using DES in ECB/CBC modes. 9 | * It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP 10 | * peripheral. 11 | * 12 | @verbatim 13 | 14 | =================================================================== 15 | ##### How to use this driver ##### 16 | =================================================================== 17 | [..] 18 | (#) Enable The CRYP controller clock using 19 | RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function. 20 | 21 | (#) Encrypt and decrypt using DES in ECB Mode using CRYP_DES_ECB() function. 22 | 23 | (#) Encrypt and decrypt using DES in CBC Mode using CRYP_DES_CBC() function. 24 | 25 | @endverbatim 26 | * 27 | ****************************************************************************** 28 | * @attention 29 | * 30 | *

© COPYRIGHT 2015 STMicroelectronics

31 | * 32 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 33 | * You may not use this file except in compliance with the License. 34 | * You may obtain a copy of the License at: 35 | * 36 | * http://www.st.com/software_license_agreement_liberty_v2 37 | * 38 | * Unless required by applicable law or agreed to in writing, software 39 | * distributed under the License is distributed on an "AS IS" BASIS, 40 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 41 | * See the License for the specific language governing permissions and 42 | * limitations under the License. 43 | * 44 | ****************************************************************************** 45 | */ 46 | 47 | /* Includes ------------------------------------------------------------------*/ 48 | #include "stm32f4xx_cryp.h" 49 | 50 | 51 | /** @addtogroup STM32F4xx_StdPeriph_Driver 52 | * @{ 53 | */ 54 | 55 | /** @defgroup CRYP 56 | * @brief CRYP driver modules 57 | * @{ 58 | */ 59 | 60 | /* Private typedef -----------------------------------------------------------*/ 61 | /* Private define ------------------------------------------------------------*/ 62 | #define DESBUSY_TIMEOUT ((uint32_t) 0x00010000) 63 | 64 | /* Private macro -------------------------------------------------------------*/ 65 | /* Private variables ---------------------------------------------------------*/ 66 | /* Private function prototypes -----------------------------------------------*/ 67 | /* Private functions ---------------------------------------------------------*/ 68 | 69 | 70 | /** @defgroup CRYP_Private_Functions 71 | * @{ 72 | */ 73 | 74 | /** @defgroup CRYP_Group8 High Level DES functions 75 | * @brief High Level DES functions 76 | * 77 | @verbatim 78 | =============================================================================== 79 | ##### High Level DES functions ##### 80 | =============================================================================== 81 | @endverbatim 82 | * @{ 83 | */ 84 | 85 | /** 86 | * @brief Encrypt and decrypt using DES in ECB Mode 87 | * @param Mode: encryption or decryption Mode. 88 | * This parameter can be one of the following values: 89 | * @arg MODE_ENCRYPT: Encryption 90 | * @arg MODE_DECRYPT: Decryption 91 | * @param Key: Key used for DES algorithm. 92 | * @param Ilength: length of the Input buffer, must be a multiple of 8. 93 | * @param Input: pointer to the Input buffer. 94 | * @param Output: pointer to the returned buffer. 95 | * @retval An ErrorStatus enumeration value: 96 | * - SUCCESS: Operation done 97 | * - ERROR: Operation failed 98 | */ 99 | ErrorStatus CRYP_DES_ECB(uint8_t Mode, uint8_t Key[8], uint8_t *Input, 100 | uint32_t Ilength, uint8_t *Output) 101 | { 102 | CRYP_InitTypeDef DES_CRYP_InitStructure; 103 | CRYP_KeyInitTypeDef DES_CRYP_KeyInitStructure; 104 | __IO uint32_t counter = 0; 105 | uint32_t busystatus = 0; 106 | ErrorStatus status = SUCCESS; 107 | uint32_t keyaddr = (uint32_t)Key; 108 | uint32_t inputaddr = (uint32_t)Input; 109 | uint32_t outputaddr = (uint32_t)Output; 110 | uint32_t i = 0; 111 | 112 | /* Crypto structures initialisation*/ 113 | CRYP_KeyStructInit(&DES_CRYP_KeyInitStructure); 114 | 115 | /* Crypto Init for Encryption process */ 116 | if( Mode == MODE_ENCRYPT ) /* DES encryption */ 117 | { 118 | DES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt; 119 | } 120 | else/* if( Mode == MODE_DECRYPT )*/ /* DES decryption */ 121 | { 122 | DES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt; 123 | } 124 | 125 | DES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_DES_ECB; 126 | DES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b; 127 | CRYP_Init(&DES_CRYP_InitStructure); 128 | 129 | /* Key Initialisation */ 130 | DES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr)); 131 | keyaddr+=4; 132 | DES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr)); 133 | CRYP_KeyInit(& DES_CRYP_KeyInitStructure); 134 | 135 | /* Flush IN/OUT FIFO */ 136 | CRYP_FIFOFlush(); 137 | 138 | /* Enable Crypto processor */ 139 | CRYP_Cmd(ENABLE); 140 | 141 | if(CRYP_GetCmdStatus() == DISABLE) 142 | { 143 | /* The CRYP peripheral clock is not enabled or the device doesn't embed 144 | the CRYP peripheral (please check the device sales type. */ 145 | return(ERROR); 146 | } 147 | for(i=0; ((i
© COPYRIGHT 2015 STMicroelectronics
12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f4xx_dbgmcu.h" 30 | 31 | /** @addtogroup STM32F4xx_StdPeriph_Driver 32 | * @{ 33 | */ 34 | 35 | /** @defgroup DBGMCU 36 | * @brief DBGMCU driver modules 37 | * @{ 38 | */ 39 | 40 | /* Private typedef -----------------------------------------------------------*/ 41 | /* Private define ------------------------------------------------------------*/ 42 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) 43 | 44 | /* Private macro -------------------------------------------------------------*/ 45 | /* Private variables ---------------------------------------------------------*/ 46 | /* Private function prototypes -----------------------------------------------*/ 47 | /* Private functions ---------------------------------------------------------*/ 48 | 49 | /** @defgroup DBGMCU_Private_Functions 50 | * @{ 51 | */ 52 | 53 | /** 54 | * @brief Returns the device revision identifier. 55 | * @param None 56 | * @retval Device revision identifier 57 | */ 58 | uint32_t DBGMCU_GetREVID(void) 59 | { 60 | return(DBGMCU->IDCODE >> 16); 61 | } 62 | 63 | /** 64 | * @brief Returns the device identifier. 65 | * @param None 66 | * @retval Device identifier 67 | */ 68 | uint32_t DBGMCU_GetDEVID(void) 69 | { 70 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); 71 | } 72 | 73 | /** 74 | * @brief Configures low power mode behavior when the MCU is in Debug mode. 75 | * @param DBGMCU_Periph: specifies the low power mode. 76 | * This parameter can be any combination of the following values: 77 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode 78 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode 79 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode 80 | * @param NewState: new state of the specified low power mode in Debug mode. 81 | * This parameter can be: ENABLE or DISABLE. 82 | * @retval None 83 | */ 84 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) 85 | { 86 | /* Check the parameters */ 87 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); 88 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 89 | if (NewState != DISABLE) 90 | { 91 | DBGMCU->CR |= DBGMCU_Periph; 92 | } 93 | else 94 | { 95 | DBGMCU->CR &= ~DBGMCU_Periph; 96 | } 97 | } 98 | 99 | /** 100 | * @brief Configures APB1 peripheral behavior when the MCU is in Debug mode. 101 | * @param DBGMCU_Periph: specifies the APB1 peripheral. 102 | * This parameter can be any combination of the following values: 103 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted 104 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted 105 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted 106 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted 107 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted 108 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted 109 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted 110 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted 111 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 112 | * @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped when Core is halted. 113 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted 114 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted 115 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted 116 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted 117 | * @arg DBGMCU_I2C3_SMBUS_TIMEOUT: I2C3 SMBUS timeout mode stopped when Core is halted 118 | * @arg DBGMCU_CAN2_STOP: Debug CAN1 stopped when Core is halted 119 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted 120 | * This parameter can be: ENABLE or DISABLE. 121 | * @retval None 122 | */ 123 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) 124 | { 125 | /* Check the parameters */ 126 | assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph)); 127 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 128 | 129 | if (NewState != DISABLE) 130 | { 131 | DBGMCU->APB1FZ |= DBGMCU_Periph; 132 | } 133 | else 134 | { 135 | DBGMCU->APB1FZ &= ~DBGMCU_Periph; 136 | } 137 | } 138 | 139 | /** 140 | * @brief Configures APB2 peripheral behavior when the MCU is in Debug mode. 141 | * @param DBGMCU_Periph: specifies the APB2 peripheral. 142 | * This parameter can be any combination of the following values: 143 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted 144 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted 145 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted 146 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted 147 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted 148 | * @param NewState: new state of the specified peripheral in Debug mode. 149 | * This parameter can be: ENABLE or DISABLE. 150 | * @retval None 151 | */ 152 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) 153 | { 154 | /* Check the parameters */ 155 | assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph)); 156 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 157 | 158 | if (NewState != DISABLE) 159 | { 160 | DBGMCU->APB2FZ |= DBGMCU_Periph; 161 | } 162 | else 163 | { 164 | DBGMCU->APB2FZ &= ~DBGMCU_Periph; 165 | } 166 | } 167 | 168 | /** 169 | * @} 170 | */ 171 | 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 181 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_exti.c 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file provides firmware functions to manage the following 8 | * functionalities of the EXTI peripheral: 9 | * + Initialization and Configuration 10 | * + Interrupts and flags management 11 | * 12 | @verbatim 13 | 14 | =============================================================================== 15 | ##### EXTI features ##### 16 | =============================================================================== 17 | 18 | [..] External interrupt/event lines are mapped as following: 19 | (#) All available GPIO pins are connected to the 16 external 20 | interrupt/event lines from EXTI0 to EXTI15. 21 | (#) EXTI line 16 is connected to the PVD Output 22 | (#) EXTI line 17 is connected to the RTC Alarm event 23 | (#) EXTI line 18 is connected to the USB OTG FS Wakeup from suspend event 24 | (#) EXTI line 19 is connected to the Ethernet Wakeup event 25 | (#) EXTI line 20 is connected to the USB OTG HS (configured in FS) Wakeup event 26 | (#) EXTI line 21 is connected to the RTC Tamper and Time Stamp events 27 | (#) EXTI line 22 is connected to the RTC Wakeup event 28 | (#) EXTI line 23 is connected to the LPTIM Wakeup event 29 | 30 | ##### How to use this driver ##### 31 | =============================================================================== 32 | 33 | [..] In order to use an I/O pin as an external interrupt source, follow steps 34 | below: 35 | (#) Configure the I/O in input mode using GPIO_Init() 36 | (#) Select the input source pin for the EXTI line using SYSCFG_EXTILineConfig() 37 | (#) Select the mode(interrupt, event) and configure the trigger 38 | selection (Rising, falling or both) using EXTI_Init() 39 | (#) Configure NVIC IRQ channel mapped to the EXTI line using NVIC_Init() 40 | 41 | [..] 42 | (@) SYSCFG APB clock must be enabled to get write access to SYSCFG_EXTICRx 43 | registers using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); 44 | 45 | @endverbatim 46 | * 47 | ****************************************************************************** 48 | * @attention 49 | * 50 | *

© COPYRIGHT 2015 STMicroelectronics

51 | * 52 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 53 | * You may not use this file except in compliance with the License. 54 | * You may obtain a copy of the License at: 55 | * 56 | * http://www.st.com/software_license_agreement_liberty_v2 57 | * 58 | * Unless required by applicable law or agreed to in writing, software 59 | * distributed under the License is distributed on an "AS IS" BASIS, 60 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 61 | * See the License for the specific language governing permissions and 62 | * limitations under the License. 63 | * 64 | ****************************************************************************** 65 | */ 66 | 67 | /* Includes ------------------------------------------------------------------*/ 68 | #include "stm32f4xx_exti.h" 69 | 70 | /** @addtogroup STM32F4xx_StdPeriph_Driver 71 | * @{ 72 | */ 73 | 74 | /** @defgroup EXTI 75 | * @brief EXTI driver modules 76 | * @{ 77 | */ 78 | 79 | /* Private typedef -----------------------------------------------------------*/ 80 | /* Private define ------------------------------------------------------------*/ 81 | 82 | #define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */ 83 | 84 | /* Private macro -------------------------------------------------------------*/ 85 | /* Private variables ---------------------------------------------------------*/ 86 | /* Private function prototypes -----------------------------------------------*/ 87 | /* Private functions ---------------------------------------------------------*/ 88 | 89 | /** @defgroup EXTI_Private_Functions 90 | * @{ 91 | */ 92 | 93 | /** @defgroup EXTI_Group1 Initialization and Configuration functions 94 | * @brief Initialization and Configuration functions 95 | * 96 | @verbatim 97 | =============================================================================== 98 | ##### Initialization and Configuration functions ##### 99 | =============================================================================== 100 | 101 | @endverbatim 102 | * @{ 103 | */ 104 | 105 | /** 106 | * @brief Deinitializes the EXTI peripheral registers to their default reset values. 107 | * @param None 108 | * @retval None 109 | */ 110 | void EXTI_DeInit(void) 111 | { 112 | EXTI->IMR = 0x00000000; 113 | EXTI->EMR = 0x00000000; 114 | EXTI->RTSR = 0x00000000; 115 | EXTI->FTSR = 0x00000000; 116 | EXTI->PR = 0x007FFFFF; 117 | } 118 | 119 | /** 120 | * @brief Initializes the EXTI peripheral according to the specified 121 | * parameters in the EXTI_InitStruct. 122 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure 123 | * that contains the configuration information for the EXTI peripheral. 124 | * @retval None 125 | */ 126 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct) 127 | { 128 | uint32_t tmp = 0; 129 | 130 | /* Check the parameters */ 131 | assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode)); 132 | assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger)); 133 | assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line)); 134 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd)); 135 | 136 | tmp = (uint32_t)EXTI_BASE; 137 | 138 | if (EXTI_InitStruct->EXTI_LineCmd != DISABLE) 139 | { 140 | /* Clear EXTI line configuration */ 141 | EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line; 142 | EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line; 143 | 144 | tmp += EXTI_InitStruct->EXTI_Mode; 145 | 146 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; 147 | 148 | /* Clear Rising Falling edge configuration */ 149 | EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line; 150 | EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line; 151 | 152 | /* Select the trigger for the selected external interrupts */ 153 | if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling) 154 | { 155 | /* Rising Falling edge */ 156 | EXTI->RTSR |= EXTI_InitStruct->EXTI_Line; 157 | EXTI->FTSR |= EXTI_InitStruct->EXTI_Line; 158 | } 159 | else 160 | { 161 | tmp = (uint32_t)EXTI_BASE; 162 | tmp += EXTI_InitStruct->EXTI_Trigger; 163 | 164 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; 165 | } 166 | } 167 | else 168 | { 169 | tmp += EXTI_InitStruct->EXTI_Mode; 170 | 171 | /* Disable the selected external lines */ 172 | *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line; 173 | } 174 | } 175 | 176 | /** 177 | * @brief Fills each EXTI_InitStruct member with its reset value. 178 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will 179 | * be initialized. 180 | * @retval None 181 | */ 182 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) 183 | { 184 | EXTI_InitStruct->EXTI_Line = EXTI_LINENONE; 185 | EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt; 186 | EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling; 187 | EXTI_InitStruct->EXTI_LineCmd = DISABLE; 188 | } 189 | 190 | /** 191 | * @brief Generates a Software interrupt on selected EXTI line. 192 | * @param EXTI_Line: specifies the EXTI line on which the software interrupt 193 | * will be generated. 194 | * This parameter can be any combination of EXTI_Linex where x can be (0..22) 195 | * @retval None 196 | */ 197 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) 198 | { 199 | /* Check the parameters */ 200 | assert_param(IS_EXTI_LINE(EXTI_Line)); 201 | 202 | EXTI->SWIER |= EXTI_Line; 203 | } 204 | 205 | /** 206 | * @} 207 | */ 208 | 209 | /** @defgroup EXTI_Group2 Interrupts and flags management functions 210 | * @brief Interrupts and flags management functions 211 | * 212 | @verbatim 213 | =============================================================================== 214 | ##### Interrupts and flags management functions ##### 215 | =============================================================================== 216 | 217 | @endverbatim 218 | * @{ 219 | */ 220 | 221 | /** 222 | * @brief Checks whether the specified EXTI line flag is set or not. 223 | * @param EXTI_Line: specifies the EXTI line flag to check. 224 | * This parameter can be EXTI_Linex where x can be(0..22) 225 | * @retval The new state of EXTI_Line (SET or RESET). 226 | */ 227 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) 228 | { 229 | FlagStatus bitstatus = RESET; 230 | /* Check the parameters */ 231 | assert_param(IS_GET_EXTI_LINE(EXTI_Line)); 232 | 233 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET) 234 | { 235 | bitstatus = SET; 236 | } 237 | else 238 | { 239 | bitstatus = RESET; 240 | } 241 | return bitstatus; 242 | } 243 | 244 | /** 245 | * @brief Clears the EXTI's line pending flags. 246 | * @param EXTI_Line: specifies the EXTI lines flags to clear. 247 | * This parameter can be any combination of EXTI_Linex where x can be (0..22) 248 | * @retval None 249 | */ 250 | void EXTI_ClearFlag(uint32_t EXTI_Line) 251 | { 252 | /* Check the parameters */ 253 | assert_param(IS_EXTI_LINE(EXTI_Line)); 254 | 255 | EXTI->PR = EXTI_Line; 256 | } 257 | 258 | /** 259 | * @brief Checks whether the specified EXTI line is asserted or not. 260 | * @param EXTI_Line: specifies the EXTI line to check. 261 | * This parameter can be EXTI_Linex where x can be(0..22) 262 | * @retval The new state of EXTI_Line (SET or RESET). 263 | */ 264 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) 265 | { 266 | FlagStatus bitstatus = RESET; 267 | /* Check the parameters */ 268 | assert_param(IS_GET_EXTI_LINE(EXTI_Line)); 269 | 270 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET) 271 | { 272 | bitstatus = SET; 273 | } 274 | else 275 | { 276 | bitstatus = RESET; 277 | } 278 | return bitstatus; 279 | 280 | } 281 | 282 | /** 283 | * @brief Clears the EXTI's line pending bits. 284 | * @param EXTI_Line: specifies the EXTI lines to clear. 285 | * This parameter can be any combination of EXTI_Linex where x can be (0..22) 286 | * @retval None 287 | */ 288 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line) 289 | { 290 | /* Check the parameters */ 291 | assert_param(IS_EXTI_LINE(EXTI_Line)); 292 | 293 | EXTI->PR = EXTI_Line; 294 | } 295 | 296 | /** 297 | * @} 298 | */ 299 | 300 | /** 301 | * @} 302 | */ 303 | 304 | /** 305 | * @} 306 | */ 307 | 308 | /** 309 | * @} 310 | */ 311 | 312 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 313 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash_ramfunc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_flash_ramfunc.c 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief FLASH RAMFUNC module driver. 8 | * This file provides a FLASH firmware functions which should be 9 | * executed from internal SRAM 10 | * + Stop/Start the flash interface while System Run 11 | * + Enable/Disable the flash sleep while System Run 12 | * 13 | @verbatim 14 | ============================================================================== 15 | ##### APIs executed from Internal RAM ##### 16 | ============================================================================== 17 | [..] 18 | *** ARM Compiler *** 19 | -------------------- 20 | [..] RAM functions are defined using the toolchain options. 21 | Functions that are be executed in RAM should reside in a separate 22 | source module. Using the 'Options for File' dialog you can simply change 23 | the 'Code / Const' area of a module to a memory space in physical RAM. 24 | Available memory areas are declared in the 'Target' tab of the 25 | Options for Target' dialog. 26 | 27 | *** ICCARM Compiler *** 28 | ----------------------- 29 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". 30 | 31 | *** GNU Compiler *** 32 | -------------------- 33 | [..] RAM functions are defined using a specific toolchain attribute 34 | "__attribute__((section(".RamFunc")))". 35 | 36 | @endverbatim 37 | ****************************************************************************** 38 | * @attention 39 | * 40 | *

© COPYRIGHT 2015 STMicroelectronics

41 | * 42 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 43 | * You may not use this file except in compliance with the License. 44 | * You may obtain a copy of the License at: 45 | * 46 | * http://www.st.com/software_license_agreement_liberty_v2 47 | * 48 | * Unless required by applicable law or agreed to in writing, software 49 | * distributed under the License is distributed on an "AS IS" BASIS, 50 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 51 | * See the License for the specific language governing permissions and 52 | * limitations under the License. 53 | * 54 | ****************************************************************************** 55 | */ 56 | 57 | /* Includes ------------------------------------------------------------------*/ 58 | #include "stm32f4xx_flash_ramfunc.h" 59 | 60 | /** @addtogroup STM32F4xx_StdPeriph_Driver 61 | * @{ 62 | */ 63 | 64 | /** @defgroup FLASH RAMFUNC 65 | * @brief FLASH RAMFUNC driver modules 66 | * @{ 67 | */ 68 | 69 | /* Private typedef -----------------------------------------------------------*/ 70 | /* Private define ------------------------------------------------------------*/ 71 | /* Private macro -------------------------------------------------------------*/ 72 | /* Private variables ---------------------------------------------------------*/ 73 | /* Private function prototypes -----------------------------------------------*/ 74 | /* Private functions ---------------------------------------------------------*/ 75 | 76 | /** @defgroup FLASH_RAMFUNC_Private_Functions 77 | * @{ 78 | */ 79 | 80 | /** @defgroup FLASH_RAMFUNC_Group1 Peripheral features functions executed from internal RAM 81 | * @brief Peripheral Extended features functions 82 | * 83 | @verbatim 84 | 85 | =============================================================================== 86 | ##### ramfunc functions ##### 87 | =============================================================================== 88 | [..] 89 | This subsection provides a set of functions that should be executed from RAM 90 | transfers. 91 | 92 | @endverbatim 93 | * @{ 94 | */ 95 | 96 | /** 97 | * @brief Start/Stop the flash interface while System Run 98 | * @note This mode is only available for STM32F411xx devices. 99 | * @note This mode could n't be set while executing with the flash itself. 100 | * It should be done with specific routine executed from RAM. 101 | * @param NewState: new state of the Smart Card mode. 102 | * This parameter can be: ENABLE or DISABLE. 103 | * @retval None 104 | */ 105 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState) 106 | { 107 | if (NewState != DISABLE) 108 | { 109 | /* Start the flash interface while System Run */ 110 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR); 111 | } 112 | else 113 | { 114 | /* Stop the flash interface while System Run */ 115 | SET_BIT(PWR->CR, PWR_CR_FISSR); 116 | } 117 | } 118 | 119 | /** 120 | * @brief Enable/Disable the flash sleep while System Run 121 | * @note This mode is only available for STM32F411xx devices. 122 | * @note This mode could n't be set while executing with the flash itself. 123 | * It should be done with specific routine executed from RAM. 124 | * @param NewState: new state of the Smart Card mode. 125 | * This parameter can be: ENABLE or DISABLE. 126 | * @retval None 127 | */ 128 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState) 129 | { 130 | if (NewState != DISABLE) 131 | { 132 | /* Enable the flash sleep while System Run */ 133 | SET_BIT(PWR->CR, PWR_CR_FMSSR); 134 | } 135 | else 136 | { 137 | /* Disable the flash sleep while System Run */ 138 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR); 139 | } 140 | } 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 159 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_md5.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hash_md5.c 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file provides high level functions to compute the HASH MD5 and 8 | * HMAC MD5 Digest of an input message. 9 | * It uses the stm32f4xx_hash.c/.h drivers to access the STM32F4xx HASH 10 | * peripheral. 11 | * 12 | @verbatim 13 | =================================================================== 14 | ##### How to use this driver ##### 15 | =================================================================== 16 | [..] 17 | (#) Enable The HASH controller clock using 18 | RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE); function. 19 | 20 | (#) Calculate the HASH MD5 Digest using HASH_MD5() function. 21 | 22 | (#) Calculate the HMAC MD5 Digest using HMAC_MD5() function. 23 | 24 | @endverbatim 25 | * 26 | ****************************************************************************** 27 | * @attention 28 | * 29 | *

© COPYRIGHT 2015 STMicroelectronics

30 | * 31 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 32 | * You may not use this file except in compliance with the License. 33 | * You may obtain a copy of the License at: 34 | * 35 | * http://www.st.com/software_license_agreement_liberty_v2 36 | * 37 | * Unless required by applicable law or agreed to in writing, software 38 | * distributed under the License is distributed on an "AS IS" BASIS, 39 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 40 | * See the License for the specific language governing permissions and 41 | * limitations under the License. 42 | * 43 | ****************************************************************************** 44 | */ 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hash.h" 48 | 49 | /** @addtogroup STM32F4xx_StdPeriph_Driver 50 | * @{ 51 | */ 52 | 53 | /** @defgroup HASH 54 | * @brief HASH driver modules 55 | * @{ 56 | */ 57 | 58 | /* Private typedef -----------------------------------------------------------*/ 59 | /* Private define ------------------------------------------------------------*/ 60 | #define MD5BUSY_TIMEOUT ((uint32_t) 0x00010000) 61 | 62 | /* Private macro -------------------------------------------------------------*/ 63 | /* Private variables ---------------------------------------------------------*/ 64 | /* Private function prototypes -----------------------------------------------*/ 65 | /* Private functions ---------------------------------------------------------*/ 66 | 67 | /** @defgroup HASH_Private_Functions 68 | * @{ 69 | */ 70 | 71 | /** @defgroup HASH_Group7 High Level MD5 functions 72 | * @brief High Level MD5 Hash and HMAC functions 73 | * 74 | @verbatim 75 | =============================================================================== 76 | ##### High Level MD5 Hash and HMAC functions ##### 77 | =============================================================================== 78 | 79 | 80 | @endverbatim 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @brief Compute the HASH MD5 digest. 86 | * @param Input: pointer to the Input buffer to be treated. 87 | * @param Ilen: length of the Input buffer. 88 | * @param Output: the returned digest 89 | * @retval An ErrorStatus enumeration value: 90 | * - SUCCESS: digest computation done 91 | * - ERROR: digest computation failed 92 | */ 93 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16]) 94 | { 95 | HASH_InitTypeDef MD5_HASH_InitStructure; 96 | HASH_MsgDigest MD5_MessageDigest; 97 | __IO uint16_t nbvalidbitsdata = 0; 98 | uint32_t i = 0; 99 | __IO uint32_t counter = 0; 100 | uint32_t busystatus = 0; 101 | ErrorStatus status = SUCCESS; 102 | uint32_t inputaddr = (uint32_t)Input; 103 | uint32_t outputaddr = (uint32_t)Output; 104 | 105 | 106 | /* Number of valid bits in last word of the Input data */ 107 | nbvalidbitsdata = 8 * (Ilen % 4); 108 | 109 | /* HASH peripheral initialization */ 110 | HASH_DeInit(); 111 | 112 | /* HASH Configuration */ 113 | MD5_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_MD5; 114 | MD5_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH; 115 | MD5_HASH_InitStructure.HASH_DataType = HASH_DataType_8b; 116 | HASH_Init(&MD5_HASH_InitStructure); 117 | 118 | /* Configure the number of valid bits in last word of the data */ 119 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata); 120 | 121 | /* Write the Input block in the IN FIFO */ 122 | for(i=0; i 64) 197 | { 198 | /* HMAC long Key */ 199 | MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey; 200 | } 201 | else 202 | { 203 | /* HMAC short Key */ 204 | MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey; 205 | } 206 | HASH_Init(&MD5_HASH_InitStructure); 207 | 208 | /* Configure the number of valid bits in last word of the Key */ 209 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey); 210 | 211 | /* Write the Key */ 212 | for(i=0; i
© COPYRIGHT 2015 STMicroelectronics
30 | * 31 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 32 | * You may not use this file except in compliance with the License. 33 | * You may obtain a copy of the License at: 34 | * 35 | * http://www.st.com/software_license_agreement_liberty_v2 36 | * 37 | * Unless required by applicable law or agreed to in writing, software 38 | * distributed under the License is distributed on an "AS IS" BASIS, 39 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 40 | * See the License for the specific language governing permissions and 41 | * limitations under the License. 42 | * 43 | ****************************************************************************** 44 | */ 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hash.h" 48 | 49 | /** @addtogroup STM32F4xx_StdPeriph_Driver 50 | * @{ 51 | */ 52 | 53 | /** @defgroup HASH 54 | * @brief HASH driver modules 55 | * @{ 56 | */ 57 | 58 | /* Private typedef -----------------------------------------------------------*/ 59 | /* Private define ------------------------------------------------------------*/ 60 | #define SHA1BUSY_TIMEOUT ((uint32_t) 0x00010000) 61 | 62 | /* Private macro -------------------------------------------------------------*/ 63 | /* Private variables ---------------------------------------------------------*/ 64 | /* Private function prototypes -----------------------------------------------*/ 65 | /* Private functions ---------------------------------------------------------*/ 66 | 67 | /** @defgroup HASH_Private_Functions 68 | * @{ 69 | */ 70 | 71 | /** @defgroup HASH_Group6 High Level SHA1 functions 72 | * @brief High Level SHA1 Hash and HMAC functions 73 | * 74 | @verbatim 75 | =============================================================================== 76 | ##### High Level SHA1 Hash and HMAC functions ##### 77 | =============================================================================== 78 | 79 | 80 | @endverbatim 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @brief Compute the HASH SHA1 digest. 86 | * @param Input: pointer to the Input buffer to be treated. 87 | * @param Ilen: length of the Input buffer. 88 | * @param Output: the returned digest 89 | * @retval An ErrorStatus enumeration value: 90 | * - SUCCESS: digest computation done 91 | * - ERROR: digest computation failed 92 | */ 93 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20]) 94 | { 95 | HASH_InitTypeDef SHA1_HASH_InitStructure; 96 | HASH_MsgDigest SHA1_MessageDigest; 97 | __IO uint16_t nbvalidbitsdata = 0; 98 | uint32_t i = 0; 99 | __IO uint32_t counter = 0; 100 | uint32_t busystatus = 0; 101 | ErrorStatus status = SUCCESS; 102 | uint32_t inputaddr = (uint32_t)Input; 103 | uint32_t outputaddr = (uint32_t)Output; 104 | 105 | /* Number of valid bits in last word of the Input data */ 106 | nbvalidbitsdata = 8 * (Ilen % 4); 107 | 108 | /* HASH peripheral initialization */ 109 | HASH_DeInit(); 110 | 111 | /* HASH Configuration */ 112 | SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1; 113 | SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH; 114 | SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b; 115 | HASH_Init(&SHA1_HASH_InitStructure); 116 | 117 | /* Configure the number of valid bits in last word of the data */ 118 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata); 119 | 120 | /* Write the Input block in the IN FIFO */ 121 | for(i=0; i 64) 198 | { 199 | /* HMAC long Key */ 200 | SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey; 201 | } 202 | else 203 | { 204 | /* HMAC short Key */ 205 | SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey; 206 | } 207 | HASH_Init(&SHA1_HASH_InitStructure); 208 | 209 | /* Configure the number of valid bits in last word of the Key */ 210 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey); 211 | 212 | /* Write the Key */ 213 | for(i=0; i
© COPYRIGHT 2015 STMicroelectronics
68 | * 69 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 70 | * You may not use this file except in compliance with the License. 71 | * You may obtain a copy of the License at: 72 | * 73 | * http://www.st.com/software_license_agreement_liberty_v2 74 | * 75 | * Unless required by applicable law or agreed to in writing, software 76 | * distributed under the License is distributed on an "AS IS" BASIS, 77 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 78 | * See the License for the specific language governing permissions and 79 | * limitations under the License. 80 | * 81 | ****************************************************************************** 82 | */ 83 | 84 | /* Includes ------------------------------------------------------------------*/ 85 | #include "stm32f4xx_iwdg.h" 86 | 87 | /** @addtogroup STM32F4xx_StdPeriph_Driver 88 | * @{ 89 | */ 90 | 91 | /** @defgroup IWDG 92 | * @brief IWDG driver modules 93 | * @{ 94 | */ 95 | 96 | /* Private typedef -----------------------------------------------------------*/ 97 | /* Private define ------------------------------------------------------------*/ 98 | 99 | /* KR register bit mask */ 100 | #define KR_KEY_RELOAD ((uint16_t)0xAAAA) 101 | #define KR_KEY_ENABLE ((uint16_t)0xCCCC) 102 | 103 | /* Private macro -------------------------------------------------------------*/ 104 | /* Private variables ---------------------------------------------------------*/ 105 | /* Private function prototypes -----------------------------------------------*/ 106 | /* Private functions ---------------------------------------------------------*/ 107 | 108 | /** @defgroup IWDG_Private_Functions 109 | * @{ 110 | */ 111 | 112 | /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions 113 | * @brief Prescaler and Counter configuration functions 114 | * 115 | @verbatim 116 | =============================================================================== 117 | ##### Prescaler and Counter configuration functions ##### 118 | =============================================================================== 119 | 120 | @endverbatim 121 | * @{ 122 | */ 123 | 124 | /** 125 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. 126 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. 127 | * This parameter can be one of the following values: 128 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers 129 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers 130 | * @retval None 131 | */ 132 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) 133 | { 134 | /* Check the parameters */ 135 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); 136 | IWDG->KR = IWDG_WriteAccess; 137 | } 138 | 139 | /** 140 | * @brief Sets IWDG Prescaler value. 141 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value. 142 | * This parameter can be one of the following values: 143 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 144 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 145 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 146 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 147 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 148 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 149 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 150 | * @retval None 151 | */ 152 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) 153 | { 154 | /* Check the parameters */ 155 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); 156 | IWDG->PR = IWDG_Prescaler; 157 | } 158 | 159 | /** 160 | * @brief Sets IWDG Reload value. 161 | * @param Reload: specifies the IWDG Reload value. 162 | * This parameter must be a number between 0 and 0x0FFF. 163 | * @retval None 164 | */ 165 | void IWDG_SetReload(uint16_t Reload) 166 | { 167 | /* Check the parameters */ 168 | assert_param(IS_IWDG_RELOAD(Reload)); 169 | IWDG->RLR = Reload; 170 | } 171 | 172 | /** 173 | * @brief Reloads IWDG counter with value defined in the reload register 174 | * (write access to IWDG_PR and IWDG_RLR registers disabled). 175 | * @param None 176 | * @retval None 177 | */ 178 | void IWDG_ReloadCounter(void) 179 | { 180 | IWDG->KR = KR_KEY_RELOAD; 181 | } 182 | 183 | /** 184 | * @} 185 | */ 186 | 187 | /** @defgroup IWDG_Group2 IWDG activation function 188 | * @brief IWDG activation function 189 | * 190 | @verbatim 191 | =============================================================================== 192 | ##### IWDG activation function ##### 193 | =============================================================================== 194 | 195 | @endverbatim 196 | * @{ 197 | */ 198 | 199 | /** 200 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). 201 | * @param None 202 | * @retval None 203 | */ 204 | void IWDG_Enable(void) 205 | { 206 | IWDG->KR = KR_KEY_ENABLE; 207 | } 208 | 209 | /** 210 | * @} 211 | */ 212 | 213 | /** @defgroup IWDG_Group3 Flag management function 214 | * @brief Flag management function 215 | * 216 | @verbatim 217 | =============================================================================== 218 | ##### Flag management function ##### 219 | =============================================================================== 220 | 221 | @endverbatim 222 | * @{ 223 | */ 224 | 225 | /** 226 | * @brief Checks whether the specified IWDG flag is set or not. 227 | * @param IWDG_FLAG: specifies the flag to check. 228 | * This parameter can be one of the following values: 229 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going 230 | * @arg IWDG_FLAG_RVU: Reload Value Update on going 231 | * @retval The new state of IWDG_FLAG (SET or RESET). 232 | */ 233 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) 234 | { 235 | FlagStatus bitstatus = RESET; 236 | /* Check the parameters */ 237 | assert_param(IS_IWDG_FLAG(IWDG_FLAG)); 238 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) 239 | { 240 | bitstatus = SET; 241 | } 242 | else 243 | { 244 | bitstatus = RESET; 245 | } 246 | /* Return the flag status */ 247 | return bitstatus; 248 | } 249 | 250 | /** 251 | * @} 252 | */ 253 | 254 | /** 255 | * @} 256 | */ 257 | 258 | /** 259 | * @} 260 | */ 261 | 262 | /** 263 | * @} 264 | */ 265 | 266 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 267 | -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_qspi.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_qspi.c -------------------------------------------------------------------------------- /lib/STM32F4xx/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_syscfg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_syscfg.c 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief This file provides firmware functions to manage the SYSCFG peripheral. 8 | * 9 | @verbatim 10 | 11 | =============================================================================== 12 | ##### How to use this driver ##### 13 | =============================================================================== 14 | [..] This driver provides functions for: 15 | 16 | (#) Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig() 17 | 18 | (#) Swapping the internal flash Bank1 and Bank2 this features is only visible for 19 | STM32F42xxx/43xxx devices Devices. 20 | 21 | (#) Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig() 22 | 23 | (#) Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig() 24 | 25 | -@- SYSCFG APB clock must be enabled to get write access to SYSCFG registers, 26 | using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); 27 | 28 | @endverbatim 29 | ****************************************************************************** 30 | * @attention 31 | * 32 | *

© COPYRIGHT 2015 STMicroelectronics

33 | * 34 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 35 | * You may not use this file except in compliance with the License. 36 | * You may obtain a copy of the License at: 37 | * 38 | * http://www.st.com/software_license_agreement_liberty_v2 39 | * 40 | * Unless required by applicable law or agreed to in writing, software 41 | * distributed under the License is distributed on an "AS IS" BASIS, 42 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 43 | * See the License for the specific language governing permissions and 44 | * limitations under the License. 45 | * 46 | ****************************************************************************** 47 | */ 48 | 49 | /* Includes ------------------------------------------------------------------*/ 50 | #include "stm32f4xx_syscfg.h" 51 | #include "stm32f4xx_rcc.h" 52 | 53 | /** @addtogroup STM32F4xx_StdPeriph_Driver 54 | * @{ 55 | */ 56 | 57 | /** @defgroup SYSCFG 58 | * @brief SYSCFG driver modules 59 | * @{ 60 | */ 61 | 62 | /* Private typedef -----------------------------------------------------------*/ 63 | /* Private define ------------------------------------------------------------*/ 64 | /* ------------ RCC registers bit address in the alias region ----------- */ 65 | #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE) 66 | /* --- MEMRMP Register ---*/ 67 | /* Alias word address of UFB_MODE bit */ 68 | #define MEMRMP_OFFSET SYSCFG_OFFSET 69 | #define UFB_MODE_BitNumber ((uint8_t)0x8) 70 | #define UFB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (UFB_MODE_BitNumber * 4)) 71 | 72 | /* --- PMC Register ---*/ 73 | /* Alias word address of MII_RMII_SEL bit */ 74 | #define PMC_OFFSET (SYSCFG_OFFSET + 0x04) 75 | #define MII_RMII_SEL_BitNumber ((uint8_t)0x17) 76 | #define PMC_MII_RMII_SEL_BB (PERIPH_BB_BASE + (PMC_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4)) 77 | 78 | /* --- CMPCR Register ---*/ 79 | /* Alias word address of CMP_PD bit */ 80 | #define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20) 81 | #define CMP_PD_BitNumber ((uint8_t)0x00) 82 | #define CMPCR_CMP_PD_BB (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BitNumber * 4)) 83 | 84 | /* Private macro -------------------------------------------------------------*/ 85 | /* Private variables ---------------------------------------------------------*/ 86 | /* Private function prototypes -----------------------------------------------*/ 87 | /* Private functions ---------------------------------------------------------*/ 88 | 89 | /** @defgroup SYSCFG_Private_Functions 90 | * @{ 91 | */ 92 | 93 | /** 94 | * @brief Deinitializes the Alternate Functions (remap and EXTI configuration) 95 | * registers to their default reset values. 96 | * @param None 97 | * @retval None 98 | */ 99 | void SYSCFG_DeInit(void) 100 | { 101 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE); 102 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE); 103 | } 104 | 105 | /** 106 | * @brief Changes the mapping of the specified pin. 107 | * @param SYSCFG_Memory: selects the memory remapping. 108 | * This parameter can be one of the following values: 109 | * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000 110 | * @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000 111 | * @arg SYSCFG_MemoryRemap_FSMC: FSMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 for STM32F405xx/407xx and STM32F415xx/417xx devices. 112 | * @arg SYSCFG_MemoryRemap_FMC: FMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 for STM32F42xxx/43xxx devices. 113 | * @arg SYSCFG_MemoryRemap_ExtMEM: External Memory mapped at 0x00000000 for STM32F446xx/STM32F469_479xx devices. 114 | * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM (112kB) mapped at 0x00000000 115 | * @arg SYSCFG_MemoryRemap_SDRAM: FMC (External SDRAM) mapped at 0x00000000 for STM32F42xxx/43xxx devices. 116 | * @retval None 117 | */ 118 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap) 119 | { 120 | /* Check the parameters */ 121 | assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap)); 122 | 123 | SYSCFG->MEMRMP = SYSCFG_MemoryRemap; 124 | } 125 | 126 | /** 127 | * @brief Enables or disables the Internal FLASH Bank Swapping. 128 | * 129 | * @note This function can be used only for STM32F42xxx/43xxx devices. 130 | * 131 | * @param NewState: new state of Internal FLASH Bank swapping. 132 | * This parameter can be one of the following values: 133 | * @arg ENABLE: Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000) 134 | * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000) 135 | * @arg DISABLE:(the default state) Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000) 136 | and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000) 137 | * @retval None 138 | */ 139 | void SYSCFG_MemorySwappingBank(FunctionalState NewState) 140 | { 141 | /* Check the parameters */ 142 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 143 | 144 | *(__IO uint32_t *) UFB_MODE_BB = (uint32_t)NewState; 145 | } 146 | 147 | /** 148 | * @brief Selects the GPIO pin used as EXTI Line. 149 | * @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for 150 | * EXTI lines where x can be (A..K) for STM32F42xxx/43xxx devices, (A..I) 151 | * for STM32F405xx/407xx and STM32F415xx/417xx devices or (A, B, C, D and H) 152 | * for STM32401xx devices. 153 | * 154 | * @param EXTI_PinSourcex: specifies the EXTI line to be configured. 155 | * This parameter can be EXTI_PinSourcex where x can be (0..15, except 156 | * for EXTI_PortSourceGPIOI x can be (0..11) for STM32F405xx/407xx 157 | * and STM32F405xx/407xx devices and for EXTI_PortSourceGPIOK x can 158 | * be (0..7) for STM32F42xxx/43xxx devices. 159 | * 160 | * @retval None 161 | */ 162 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex) 163 | { 164 | uint32_t tmp = 0x00; 165 | 166 | /* Check the parameters */ 167 | assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx)); 168 | assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex)); 169 | 170 | tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)); 171 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp; 172 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03))); 173 | } 174 | 175 | /** 176 | * @brief Selects the ETHERNET media interface 177 | * @param SYSCFG_ETH_MediaInterface: specifies the Media Interface mode. 178 | * This parameter can be one of the following values: 179 | * @arg SYSCFG_ETH_MediaInterface_MII: MII mode selected 180 | * @arg SYSCFG_ETH_MediaInterface_RMII: RMII mode selected 181 | * @retval None 182 | */ 183 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface) 184 | { 185 | assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE(SYSCFG_ETH_MediaInterface)); 186 | /* Configure MII_RMII selection bit */ 187 | *(__IO uint32_t *) PMC_MII_RMII_SEL_BB = SYSCFG_ETH_MediaInterface; 188 | } 189 | 190 | /** 191 | * @brief Enables or disables the I/O Compensation Cell. 192 | * @note The I/O compensation cell can be used only when the device supply 193 | * voltage ranges from 2.4 to 3.6 V. 194 | * @param NewState: new state of the I/O Compensation Cell. 195 | * This parameter can be one of the following values: 196 | * @arg ENABLE: I/O compensation cell enabled 197 | * @arg DISABLE: I/O compensation cell power-down mode 198 | * @retval None 199 | */ 200 | void SYSCFG_CompensationCellCmd(FunctionalState NewState) 201 | { 202 | /* Check the parameters */ 203 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 204 | 205 | *(__IO uint32_t *) CMPCR_CMP_PD_BB = (uint32_t)NewState; 206 | } 207 | 208 | /** 209 | * @brief Checks whether the I/O Compensation Cell ready flag is set or not. 210 | * @param None 211 | * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET) 212 | */ 213 | FlagStatus SYSCFG_GetCompensationCellStatus(void) 214 | { 215 | FlagStatus bitstatus = RESET; 216 | 217 | if ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET) 218 | { 219 | bitstatus = SET; 220 | } 221 | else 222 | { 223 | bitstatus = RESET; 224 | } 225 | return bitstatus; 226 | } 227 | 228 | #if defined(STM32F410xx) 229 | /** 230 | * @brief Connects the selected parameter to the break input of TIM1. 231 | * @note The selected configuration is locked and can be unlocked by system reset 232 | * @param SYSCFG_Break: selects the configuration to be connected to break 233 | * input of TIM1 234 | * This parameter can be any combination of the following values: 235 | * @arg SYSCFG_Break_PVD: PVD interrupt is connected to the break input of TIM1/8. 236 | * @arg SYSCFG_Break_HardFault: Lockup output of CortexM4 is connected to the break input of TIM1/8. 237 | * @retval None 238 | */ 239 | void SYSCFG_BreakConfig(uint32_t SYSCFG_Break) 240 | { 241 | /* Check the parameter */ 242 | assert_param(IS_SYSCFG_LOCK_CONFIG(SYSCFG_Break)); 243 | 244 | SYSCFG->CFGR2 |= (uint32_t) SYSCFG_Break; 245 | } 246 | #endif /* STM32F410xx */ 247 | /** 248 | * @} 249 | */ 250 | 251 | /** 252 | * @} 253 | */ 254 | 255 | /** 256 | * @} 257 | */ 258 | 259 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 260 | -------------------------------------------------------------------------------- /lib/STM32F4xx/dummylib.c: -------------------------------------------------------------------------------- 1 | /* 2 | * newlib_stubs.c 3 | * 4 | * Created on: 2 Nov 2010 5 | * Author: nanoage.co.uk 6 | */ 7 | #include 8 | #include 9 | #include 10 | #include 11 | 12 | 13 | #ifndef STDOUT_USART 14 | #define STDOUT_USART 2 15 | #endif 16 | 17 | #ifndef STDERR_USART 18 | #define STDERR_USART 2 19 | #endif 20 | 21 | #ifndef STDIN_USART 22 | #define STDIN_USART 2 23 | #endif 24 | 25 | #undef errno 26 | extern int errno; 27 | 28 | /* 29 | environ 30 | A pointer to a list of environment variables and their values. 31 | For a minimal environment, this empty list is adequate: 32 | */ 33 | char *__env[1] = { 0 }; 34 | char **environ = __env; 35 | 36 | int _write(int file, char *ptr, int len); 37 | 38 | void _exit(int status) { 39 | if(status){} 40 | _write(1, "exit", 4); 41 | while (1) { 42 | ; 43 | } 44 | } 45 | 46 | int _close(int file) { 47 | if(file){} 48 | return -1; 49 | } 50 | /* 51 | execve 52 | Transfer control to a new process. Minimal implementation (for a system without processes): 53 | */ 54 | int _execve(char *name, char **argv, char **env) { 55 | if(name){} 56 | if(argv){} 57 | if(env){} 58 | errno = ENOMEM; 59 | return -1; 60 | } 61 | /* 62 | fork 63 | Create a new process. Minimal implementation (for a system without processes): 64 | */ 65 | 66 | int _fork() { 67 | errno = EAGAIN; 68 | return -1; 69 | } 70 | /* 71 | fstat 72 | Status of an open file. For consistency with other minimal implementations in these examples, 73 | all files are regarded as character special devices. 74 | The `sys/stat.h' header file required is distributed in the `include' subdirectory for this C library. 75 | */ 76 | int _fstat(int file, struct stat *st) { 77 | if(file){} 78 | st->st_mode = S_IFCHR; 79 | return 0; 80 | } 81 | 82 | /* 83 | getpid 84 | Process-ID; this is sometimes used to generate strings unlikely to conflict with other processes. Minimal implementation, for a system without processes: 85 | */ 86 | 87 | int _getpid() { 88 | return 1; 89 | } 90 | 91 | /* 92 | isatty 93 | Query whether output stream is a terminal. For consistency with the other minimal implementations, 94 | */ 95 | int _isatty(int file) { 96 | switch (file){ 97 | case STDOUT_FILENO: 98 | case STDERR_FILENO: 99 | case STDIN_FILENO: 100 | return 1; 101 | default: 102 | //errno = ENOTTY; 103 | errno = EBADF; 104 | return 0; 105 | } 106 | } 107 | 108 | 109 | /* 110 | kill 111 | Send a signal. Minimal implementation: 112 | */ 113 | int _kill(int pid, int sig) { 114 | if(pid){} 115 | if(sig){} 116 | errno = EINVAL; 117 | return (-1); 118 | } 119 | 120 | /* 121 | link 122 | Establish a new name for an existing file. Minimal implementation: 123 | */ 124 | 125 | int _link(char *old, char *new) { 126 | if(old){} 127 | if(new){} 128 | errno = EMLINK; 129 | return -1; 130 | } 131 | 132 | /* 133 | lseek 134 | Set position in a file. Minimal implementation: 135 | */ 136 | int _lseek(int file, int ptr, int dir) { 137 | if(file){} 138 | if(dir){} 139 | if(ptr){} 140 | return 0; 141 | } 142 | 143 | /* 144 | sbrk 145 | Increase program data space. 146 | Malloc and related functions depend on this 147 | */ 148 | caddr_t _sbrk(int incr) { 149 | 150 | char _ebss; // Defined by the linker 151 | static char *heap_end; 152 | char *prev_heap_end; 153 | 154 | if (heap_end == 0) { 155 | heap_end = &_ebss; 156 | } 157 | prev_heap_end = heap_end; 158 | 159 | //char * stack = (char*) __get_MSP(); 160 | char * stack = 0; 161 | if (heap_end + incr > stack) 162 | { 163 | _write (STDERR_FILENO, "Heap and stack collision\n", 25); 164 | errno = ENOMEM; 165 | return (caddr_t) -1; 166 | //abort (); 167 | } 168 | 169 | heap_end += incr; 170 | return (caddr_t) prev_heap_end; 171 | 172 | } 173 | 174 | /* 175 | read 176 | Read a character to a file. `libc' subroutines will use this system routine for input from all files, including stdin 177 | Returns -1 on error or blocks until the number of characters have been read. 178 | */ 179 | 180 | 181 | int _read(int file, char *ptr, int len) { 182 | int n; 183 | int num = 0; 184 | switch (file) { 185 | case STDIN_FILENO: 186 | for (n = 0; n < len; n++) { 187 | // Put read char in c 188 | char c = '\0'; 189 | *ptr++ = c; 190 | num++; 191 | } 192 | break; 193 | default: 194 | errno = EBADF; 195 | return -1; 196 | } 197 | return num; 198 | } 199 | 200 | /* 201 | stat 202 | Status of a file (by name). Minimal implementation: 203 | int _EXFUN(stat,( const char *__path, struct stat *__sbuf )); 204 | */ 205 | 206 | int _stat(const char *filepath, struct stat *st) { 207 | if(filepath){} 208 | st->st_mode = S_IFCHR; 209 | return 0; 210 | } 211 | 212 | /* 213 | times 214 | Timing information for current process. Minimal implementation: 215 | */ 216 | 217 | clock_t _times(struct tms *buf) { 218 | if(buf){} 219 | return -1; 220 | } 221 | 222 | /* 223 | unlink 224 | Remove a file's directory entry. Minimal implementation: 225 | */ 226 | int _unlink(char *name) { 227 | if(name){} 228 | errno = ENOENT; 229 | return -1; 230 | } 231 | 232 | /* 233 | wait 234 | Wait for a child process. Minimal implementation: 235 | */ 236 | int _wait(int *status) { 237 | if(status){} 238 | errno = ECHILD; 239 | return -1; 240 | } 241 | 242 | /* 243 | write 244 | Write a character to a file. `libc' subroutines will use this system routine for output to all files, including stdout 245 | Returns -1 on error or number of bytes sent 246 | */ 247 | int _write(int file, char *ptr, int len) { 248 | if(ptr){} 249 | int n; 250 | switch (file) { 251 | case STDOUT_FILENO: /*stdout*/ 252 | for (n = 0; n < len; n++) { 253 | // TODO: write *ptr out 254 | } 255 | break; 256 | case STDERR_FILENO: /* stderr */ 257 | for (n = 0; n < len; n++) { 258 | // TODO: write *ptr out 259 | } 260 | break; 261 | default: 262 | errno = EBADF; 263 | return -1; 264 | } 265 | return len; 266 | } 267 | -------------------------------------------------------------------------------- /lib/STM32F4xx/stm32f407_std.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : stm32_flash.ld 5 | ** 6 | ** Abstract : Linker script for STM32F407VG Device with 7 | ** 1024KByte FLASH, 128KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** Environment : Atollic TrueSTUDIO(R) 17 | ** 18 | ** Distribution: The file is distributed “as is,” without any warranty 19 | ** of any kind. 20 | ** 21 | ** (c)Copyright Atollic AB. 22 | ** You may use this file as-is or modify it according to the needs of your 23 | ** project. This file may only be built (assembled or compiled and linked) 24 | ** using the Atollic TrueSTUDIO(R) product. The use of this file together 25 | ** with other tools than Atollic TrueSTUDIO(R) is not permitted. 26 | ** 27 | ***************************************************************************** 28 | */ 29 | 30 | /* Entry Point */ 31 | ENTRY(Reset_Handler) 32 | 33 | /* Highest address of the user mode stack */ 34 | _estack = 0x2001FFFF; /* end of RAM */ 35 | 36 | /* Generate a link error if heap and stack don't fit into RAM */ 37 | _Min_Heap_Size = 0x0; /* required amount of heap */ 38 | _Min_Stack_Size = 0x0; /* required amount of stack */ 39 | 40 | /* Specify the memory areas */ 41 | MEMORY 42 | { 43 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K 44 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K 45 | CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | _siccmram = LOADADDR(.ccmram); 129 | 130 | /* CCM-RAM section 131 | * 132 | * IMPORTANT NOTE! 133 | * If initialized variables will be placed in this section, 134 | * the startup code needs to be modified to copy the init-values. 135 | */ 136 | .ccmram : 137 | { 138 | . = ALIGN(4); 139 | _sccmram = .; /* create a global symbol at ccmram start */ 140 | *(.ccmram) 141 | *(.ccmram*) 142 | 143 | . = ALIGN(4); 144 | _eccmram = .; /* create a global symbol at ccmram end */ 145 | } >CCMRAM AT> FLASH 146 | 147 | 148 | /* Uninitialized data section */ 149 | . = ALIGN(4); 150 | .bss : 151 | { 152 | /* This is used by the startup in order to initialize the .bss secion */ 153 | _sbss = .; /* define a global symbol at bss start */ 154 | __bss_start__ = _sbss; 155 | *(.bss) 156 | *(.bss*) 157 | *(COMMON) 158 | 159 | . = ALIGN(4); 160 | _ebss = .; /* define a global symbol at bss end */ 161 | __bss_end__ = _ebss; 162 | } >RAM 163 | 164 | /* User_heap_stack section, used to check that there is enough RAM left */ 165 | ._user_heap_stack : 166 | { 167 | . = ALIGN(4); 168 | PROVIDE ( end = . ); 169 | PROVIDE ( _end = . ); 170 | . = . + _Min_Heap_Size; 171 | . = . + _Min_Stack_Size; 172 | . = ALIGN(4); 173 | } >RAM 174 | 175 | 176 | 177 | /* Remove information from the standard libraries */ 178 | /DISCARD/ : 179 | { 180 | libc.a ( * ) 181 | libm.a ( * ) 182 | libgcc.a ( * ) 183 | } 184 | 185 | .ARM.attributes 0 : { *(.ARM.attributes) } 186 | } 187 | -------------------------------------------------------------------------------- /lib/STM32F4xx/stm32f4x7_eth.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nlhans/qt-baremetal/c18a010c0cd4b711e5bd58f136a6252e073479b8/lib/STM32F4xx/stm32f4x7_eth.h -------------------------------------------------------------------------------- /lib/STM32F4xx/stm32f4x7_eth_bsp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4x7_eth_bsp.c 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 31-October-2011 7 | * @brief STM32F4x7 Ethernet hardware configuration. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f4xx_rcc.h" 24 | #include "misc.h" 25 | #include "stm32f4xx_syscfg.h" 26 | 27 | #include "stm32f4x7_eth.h" 28 | #include "stm32f4x7_eth_conf.h" 29 | #include "stm32f4x7_eth_bsp.h" 30 | #include 31 | 32 | /* Private typedef -----------------------------------------------------------*/ 33 | /* Private define ------------------------------------------------------------*/ 34 | /* Private macro -------------------------------------------------------------*/ 35 | /* Private variables ---------------------------------------------------------*/ 36 | __IO uint32_t EthInitStatus = 0; 37 | __IO uint8_t EthLinkStatus = 0; 38 | 39 | /* Private function prototypes -----------------------------------------------*/ 40 | static void ETH_MACDMA_Config(void); 41 | 42 | /* Private functions ---------------------------------------------------------*/ 43 | 44 | /** 45 | * @brief ETH_BSP_Config 46 | * @param None 47 | * @retval None 48 | */ 49 | void ETH_BSP_Config(void) 50 | { RCC_ClocksTypeDef RCC_Clocks; 51 | 52 | SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_MII); 53 | 54 | /* Configure the Ethernet MAC/DMA */ 55 | ETH_MACDMA_Config(); 56 | 57 | if (EthInitStatus == 0) 58 | { 59 | printf("\r\nEthernet init failed\r\n"); 60 | while(1); 61 | } 62 | 63 | 64 | /* Configure Systick clock source as HCLK */ 65 | SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK); 66 | 67 | /* SystTick configuration: an interrupt every 10ms */ 68 | RCC_GetClocksFreq(&RCC_Clocks); 69 | SysTick_Config(RCC_Clocks.HCLK_Frequency / 100); 70 | } 71 | 72 | /** 73 | * @brief Configures the Ethernet Interface 74 | * @param None 75 | * @retval None 76 | */ 77 | static void ETH_MACDMA_Config(void) 78 | { 79 | ETH_InitTypeDef ETH_InitStructure; 80 | 81 | 82 | /* Enable ETHERNET clock */ 83 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_ETH_MAC | RCC_AHB1Periph_ETH_MAC_Tx | 84 | RCC_AHB1Periph_ETH_MAC_Rx, ENABLE); 85 | 86 | 87 | /* Reset ETHERNET on AHB Bus */ 88 | ETH_DeInit(); 89 | 90 | /* Software reset */ 91 | ETH_SoftwareReset(); 92 | 93 | /* Wait for software reset */ 94 | while (ETH_GetSoftwareResetStatus() == SET); 95 | 96 | /* ETHERNET Configuration --------------------------------------------------*/ 97 | /* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */ 98 | ETH_StructInit(Ð_InitStructure); 99 | 100 | /* Fill ETH_InitStructure parametrs */ 101 | /*------------------------ MAC -----------------------------------*/ 102 | //ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable; 103 | ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable; 104 | ETH_InitStructure.ETH_Speed = ETH_Speed_10M; 105 | ETH_InitStructure.ETH_Mode = ETH_Mode_HalfDuplex; 106 | ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable; 107 | ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable; 108 | ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable; 109 | ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable; 110 | ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable; 111 | ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable; 112 | ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect; 113 | ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect; 114 | #ifdef CHECKSUM_BY_HARDWARE 115 | ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable; 116 | #endif 117 | 118 | 119 | /*------------------------ DMA -----------------------------------*/ 120 | 121 | /* When we use the Checksum offload feature, we need to enable the Store and Forward mode: 122 | the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum, 123 | if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */ 124 | ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable; 125 | ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable; 126 | ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable; 127 | 128 | ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable; 129 | ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable; 130 | ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable; 131 | ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable; 132 | ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable; 133 | ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat; 134 | ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat; 135 | ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1; 136 | 137 | /* Configure Ethernet */ 138 | EthInitStatus = ETH_Init(Ð_InitStructure, KSZ8051MLL_PHY_ADDRESS); 139 | } 140 | -------------------------------------------------------------------------------- /lib/STM32F4xx/stm32f4x7_eth_bsp.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4x7_eth_bsp.h 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 31-October-2011 7 | * @brief Header for stm32f4x7_eth_bsp.c file. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Define to prevent recursive inclusion -------------------------------------*/ 23 | #ifndef __STM32F4x7_ETH_BSP_H 24 | #define __STM32F4x7_ETH_BSP_H 25 | 26 | #ifdef __cplusplus 27 | extern "C" { 28 | #endif 29 | 30 | /* Exported types ------------------------------------------------------------*/ 31 | /* Exported constants --------------------------------------------------------*/ 32 | #define KSZ8051MLL_PHY_ADDRESS 0x01 /* Relative to STM324xG-EVAL Board */ 33 | 34 | /* Specific defines for EXTI line, used to manage Ethernet link status */ 35 | #define ETH_LINK_EXTI_LINE EXTI_Line14 36 | #define ETH_LINK_EXTI_PORT_SOURCE EXTI_PortSourceGPIOB 37 | #define ETH_LINK_EXTI_PIN_SOURCE EXTI_PinSource14 38 | #define ETH_LINK_EXTI_IRQn EXTI15_10_IRQn 39 | /* PB14 */ 40 | #define ETH_LINK_PIN GPIO_Pin_14 41 | #define ETH_LINK_GPIO_PORT GPIOB 42 | #define ETH_LINK_GPIO_CLK RCC_AHB1Periph_GPIOB 43 | /* PHY registers */ 44 | #define PHY_MICR 0x11 /* MII Interrupt Control Register */ 45 | #define PHY_MICR_INT_EN ((uint16_t)0x0002) /* PHY Enable interrupts */ 46 | #define PHY_MICR_INT_OE ((uint16_t)0x0001) /* PHY Enable output interrupt events */ 47 | #define PHY_MISR 0x12 /* MII Interrupt Status and Misc. Control Register */ 48 | #define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /* Enable Interrupt on change of link status */ 49 | #define PHY_LINK_STATUS ((uint16_t)0x2000) /* PHY link status interrupt mask */ 50 | 51 | /* Exported macro ------------------------------------------------------------*/ 52 | /* Exported functions ------------------------------------------------------- */ 53 | void ETH_BSP_Config(void); 54 | //uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress); 55 | //void Eth_Link_EXTIConfig(void); 56 | //void Eth_Link_ITHandler(uint16_t PHYAddress); 57 | 58 | #ifdef __cplusplus 59 | } 60 | #endif 61 | 62 | #endif /* __STM32F4x7_ETH_BSP_H */ 63 | 64 | 65 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 66 | -------------------------------------------------------------------------------- /lib/STM32F4xx/stm32f4x7_eth_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4x7_eth_conf.h 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 31-October-2011 7 | * @brief Configuration file for the STM32F4x7 Ethernet driver. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Define to prevent recursive inclusion -------------------------------------*/ 23 | #ifndef __STM32F4x7_ETH_CONF_H 24 | #define __STM32F4x7_ETH_CONF_H 25 | 26 | #ifdef __cplusplus 27 | extern "C" { 28 | #endif 29 | 30 | /* Includes ------------------------------------------------------------------*/ 31 | #include "stm32f4xx.h" 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | /* Exported constants --------------------------------------------------------*/ 35 | 36 | /* Uncomment the line below when using time stamping and/or IPv4 checksum offload */ 37 | #define USE_ENHANCED_DMA_DESCRIPTORS 38 | 39 | /* Uncomment the line below if you want to use user defined Delay function 40 | (for precise timing), otherwise default _eth_delay_ function defined within 41 | the Ethernet driver is used (less precise timing) */ 42 | //#define USE_Delay 43 | 44 | #ifdef USE_Delay 45 | #include "main.h" /* Header file where the Delay function prototype is exported */ 46 | #define _eth_delay_ Delay /* User can provide more timing precise _eth_delay_ function */ 47 | #else 48 | #define _eth_delay_ ETH_Delay /* Default _eth_delay_ function with less precise timing */ 49 | #endif 50 | 51 | 52 | /* Uncomment the line below to allow custom configuration of the Ethernet driver buffers */ 53 | //#define CUSTOM_DRIVER_BUFFERS_CONFIG 54 | 55 | #ifdef CUSTOM_DRIVER_BUFFERS_CONFIG 56 | /* Redefinition of the Ethernet driver buffers size and count */ 57 | #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ 58 | #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ 59 | #define ETH_RXBUFNB 20 /* 20 Rx buffers of size ETH_RX_BUF_SIZE */ 60 | #define ETH_TXBUFNB 5 /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ 61 | #endif 62 | 63 | 64 | /* PHY configuration section **************************************************/ 65 | /* PHY Reset delay */ 66 | #define PHY_RESET_DELAY ((uint32_t)0x000FFFFF) 67 | /* PHY Configuration delay */ 68 | #define PHY_CONFIG_DELAY ((uint32_t)0x00FFFFFF) 69 | 70 | /* The PHY status register value change from a PHY to another, so the user have 71 | to update this value depending on the used external PHY */ 72 | #define PHY_SR ((uint16_t)0x1E) /* Value for KSZ8051 PHY */ 73 | 74 | /* The Speed and Duplex mask values change from a PHY to another, so the user 75 | have to update this value depending on the used external PHY */ 76 | #define PHY_SPEED_STATUS ((uint16_t)0x0001) /* Value for DP83848 PHY */ 77 | #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /* Value for DP83848 PHY */ 78 | 79 | 80 | /* Exported macro ------------------------------------------------------------*/ 81 | /* Exported functions ------------------------------------------------------- */ 82 | 83 | #ifdef __cplusplus 84 | } 85 | #endif 86 | 87 | #endif /* __STM32F4x7_ETH_CONF_H */ 88 | 89 | 90 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 91 | 92 | -------------------------------------------------------------------------------- /lib/STM32F4xx/stm32f4x7_eth_conf_template.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4x7_eth_conf_template.h 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 14-October-2011 7 | * @brief Configuration file for the STM32F407xx/417xx Ethernet driver. 8 | * This file should be copied to the application folder and renamed to 9 | * stm32f4x7_eth_conf.h 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 14 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 15 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 16 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 17 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 18 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 19 | * 20 | *

© COPYRIGHT 2011 STMicroelectronics

21 | ****************************************************************************** 22 | */ 23 | 24 | /* Define to prevent recursive inclusion -------------------------------------*/ 25 | #ifndef __STM32F4x7_ETH_CONF_H 26 | #define __STM32F4x7_ETH_CONF_H 27 | 28 | #ifdef __cplusplus 29 | extern "C" { 30 | #endif 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm32f4xx.h" 34 | 35 | /* Exported types ------------------------------------------------------------*/ 36 | /* Exported constants --------------------------------------------------------*/ 37 | 38 | /* Uncomment the line below when using time stamping and/or IPv4 checksum offload */ 39 | #define USE_ENHANCED_DMA_DESCRIPTORS 40 | 41 | /* Uncomment the line below if you want to use user defined Delay function 42 | (for precise timing), otherwise default _eth_delay_ function defined within 43 | the Ethernet driver is used (less precise timing) */ 44 | //#define USE_Delay 45 | 46 | #ifdef USE_Delay 47 | #include "main.h" /* Header file where the Delay function prototype is exported */ 48 | #define _eth_delay_ Delay /* User can provide more timing precise _eth_delay_ function */ 49 | #else 50 | #define _eth_delay_ ETH_Delay /* Default _eth_delay_ function with less precise timing */ 51 | #endif 52 | 53 | /* Uncomment the line below to allow custom configuration of the Ethernet driver buffers */ 54 | //#define CUSTOM_DRIVER_BUFFERS_CONFIG 55 | 56 | #ifdef CUSTOM_DRIVER_BUFFERS_CONFIG 57 | /* Redefinition of the Ethernet driver buffers size and count */ 58 | #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ 59 | #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ 60 | #define ETH_RXBUFNB 20 /* 20 Rx buffers of size ETH_RX_BUF_SIZE */ 61 | #define ETH_TXBUFNB 5 /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ 62 | #endif 63 | 64 | 65 | /* PHY configuration section **************************************************/ 66 | /* PHY Reset delay */ 67 | #define PHY_RESET_DELAY ((uint32_t)0x000FFFFF) 68 | /* PHY Configuration delay */ 69 | #define PHY_CONFIG_DELAY ((uint32_t)0x00FFFFFF) 70 | 71 | /* The PHY status register value change from a PHY to another, so the user have 72 | to update this value depending on the used external PHY */ 73 | #define PHY_SR ((uint16_t)16) /* Value for DP83848 PHY */ 74 | 75 | /* The Speed and Duplex mask values change from a PHY to another, so the user 76 | have to update this value depending on the used external PHY */ 77 | #define PHY_SPEED_STATUS ((uint16_t)0x0002) /* Value for DP83848 PHY */ 78 | #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /* Value for DP83848 PHY */ 79 | 80 | 81 | /* Exported macro ------------------------------------------------------------*/ 82 | /* Exported functions ------------------------------------------------------- */ 83 | 84 | #ifdef __cplusplus 85 | } 86 | #endif 87 | 88 | #endif /* __STM32F4x7_ETH_CONF_H */ 89 | 90 | 91 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 92 | 93 | -------------------------------------------------------------------------------- /lib/STM32F4xx/system_stm32f4xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f4xx.h 4 | * @author MCD Application Team 5 | * @version V1.6.1 6 | * @date 21-October-2015 7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2015 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /** @addtogroup CMSIS 29 | * @{ 30 | */ 31 | 32 | /** @addtogroup stm32f4xx_system 33 | * @{ 34 | */ 35 | 36 | /** 37 | * @brief Define to prevent recursive inclusion 38 | */ 39 | #ifndef __SYSTEM_STM32F4XX_H 40 | #define __SYSTEM_STM32F4XX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /** @addtogroup STM32F4xx_System_Includes 47 | * @{ 48 | */ 49 | 50 | /** 51 | * @} 52 | */ 53 | 54 | 55 | /** @addtogroup STM32F4xx_System_Exported_types 56 | * @{ 57 | */ 58 | 59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 60 | 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @addtogroup STM32F4xx_System_Exported_Constants 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @addtogroup STM32F4xx_System_Exported_Macros 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @addtogroup STM32F4xx_System_Exported_Functions 83 | * @{ 84 | */ 85 | 86 | extern void SystemInit(void); 87 | extern void SystemCoreClockUpdate(void); 88 | /** 89 | * @} 90 | */ 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /*__SYSTEM_STM32F4XX_H */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /** 103 | * @} 104 | */ 105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 106 | -------------------------------------------------------------------------------- /project/prj.qbs: -------------------------------------------------------------------------------- 1 | import qbs 2 | import Stm32f4Application 3 | 4 | Stm32f4Application 5 | { 6 | property string basePath : "/home/hans/projects/Software/qt-baremetal/" 7 | 8 | property string outPath : basePath + "bin/" + qbs.buildVariant + "/" 9 | 10 | property string srcPath : basePath + "src/" 11 | property string incPath : basePath + "src/" 12 | property string libPath : basePath + "lib/" 13 | 14 | property string targetFile : "helloworld_1_0" 15 | 16 | type: ["application", "hex","bin","size", "elf", "disassembly"] 17 | name: "Hello World!" 18 | consoleApplication: true 19 | 20 | Group { 21 | name: "application" 22 | prefix: srcPath 23 | files: [ 24 | "*.c" 25 | ] 26 | } 27 | } 28 | -------------------------------------------------------------------------------- /project/qbs/imports/FileExtension.js: -------------------------------------------------------------------------------- 1 | function FileExtension(filename, skip) 2 | { 3 | var p = filename.split('.'); 4 | while(skip-- > 0) 5 | p.pop(); 6 | return p.pop(); 7 | } -------------------------------------------------------------------------------- /project/qbs/imports/Stm32f4Application.qbs: -------------------------------------------------------------------------------- 1 | import qbs 2 | import qbs.FileInfo 3 | import qbs.File 4 | import "FileExtension.js" as FileExtension 5 | 6 | Product { 7 | property string convertPath : outPath 8 | Depends { name: "cpp" } 9 | name: "ARM STM32F4xx GCC" 10 | 11 | targetName: targetFile 12 | cpp.warningLevel: 'all' 13 | cpp.positionIndependentCode: false 14 | 15 | cpp.includePaths: [ 16 | incPath, 17 | 18 | libPath + "STM32F4xx/STM32F4xx_StdPeriph_Driver/inc/", 19 | libPath + "STM32F4xx/Include/", 20 | libPath + "STM32F4xx/", 21 | ] 22 | 23 | Properties { 24 | condition: qbs.buildVariant === "debug" 25 | 26 | cpp.commonCompilerFlags: [ 27 | "-mcpu=cortex-m4", 28 | "-mthumb", 29 | "-mfloat-abi=hard", 30 | "-mfpu=fpv4-sp-d16", 31 | //"-O0", 32 | "-g", 33 | "-DSTM32F40_41xxx", 34 | "-std=gnu99", 35 | //"-flto", // standard link-time optimizer 36 | "-ffunction-sections", 37 | "-fdata-sections", 38 | "-Wno-missing-braces" 39 | ] 40 | cpp.debugInformation: true 41 | cpp.optimization: "none" 42 | } 43 | 44 | Properties { 45 | condition: qbs.buildVariant === "release" 46 | 47 | cpp.commonCompilerFlags: [ 48 | "-mcpu=cortex-m4", 49 | "-mthumb", 50 | "-mfloat-abi=hard", 51 | "-mfpu=fpv4-sp-d16", 52 | "-DNDEBUG", 53 | "-DSTM32F40_41xxx", 54 | "-O3", 55 | "-std=gnu99", 56 | "-flto", 57 | "-ffunction-sections", 58 | "-fdata-sections", 59 | ] 60 | cpp.debugInformation: false 61 | cpp.optimization: "small" 62 | } 63 | 64 | cpp.linkerFlags: [ 65 | "-T"+libPath+"STM32F4xx/stm32f407_std.ld", 66 | "-mcpu=cortex-m4", 67 | "-mfloat-abi=hard", 68 | "-mfpu=fpv4-sp-d16", 69 | "-mthumb", 70 | "-Wl,-Map," + outPath + targetFile + ".map", 71 | "-ffunction-sections", 72 | "-fdata-sections", 73 | "-Wl,--gc-sections", 74 | //"--specs=nano.specs", 75 | //"--specs=nosys.specs" 76 | ] 77 | 78 | Group { 79 | name: "CMSIS-StdPeriph" 80 | prefix: libPath + "STM32F4xx/STM32F4xx_StdPeriph_Driver/src/" 81 | files: [ 82 | "*.c" 83 | ] 84 | excludeFiles: [ 85 | "stm32f4xx_fmc.c" 86 | ] 87 | } 88 | Group { 89 | name: "CMSIS-Startup" 90 | prefix: libPath + "STM32F4xx/" 91 | files: [ 92 | "*.c", 93 | "Startup/startup_stm32f40xx.s" 94 | ] 95 | } 96 | 97 | 98 | 99 | 100 | Rule { 101 | id: hex 102 | inputs: "application" 103 | Artifact { 104 | fileTags: "hex" 105 | filePath: "../../" + FileExtension.FileExtension(input.filePath, 1) + "/" + FileInfo.baseName(input.filePath) + ".hex" 106 | } 107 | prepare: { 108 | var args = ["-O", "ihex", input.filePath, output.filePath]; 109 | var cmd = new Command("arm-none-eabi-objcopy", args); 110 | cmd.description = "converting to hex: "+FileInfo.fileName(input.filePath); 111 | cmd.highlight = "linker"; 112 | return cmd; 113 | } 114 | } 115 | 116 | Rule { 117 | id: elf 118 | inputs: "application" 119 | Artifact { 120 | fileTags: "elf" 121 | filePath: "../../" + FileExtension.FileExtension(input.filePath, 1) + "/" + FileInfo.baseName(input.filePath) + ".elf" 122 | } 123 | prepare: { 124 | var cmd = new JavaScriptCommand(); 125 | cmd.sourceCode = function() { 126 | File.copy(input.filePath, output.filePath) 127 | }; 128 | cmd.description = "copying elf: " + FileInfo.fileName(input.filePath); 129 | cmd.highlight = "linker"; 130 | return cmd; 131 | } 132 | } 133 | 134 | Rule { 135 | id: bin 136 | inputs: "application" 137 | Artifact { 138 | fileTags: "bin" 139 | filePath: "../../" + FileExtension.FileExtension(input.filePath, 1) + "/" + FileInfo.baseName(input.filePath) + ".bin" 140 | } 141 | prepare: { 142 | var args = ["-O", "binary", input.filePath, output.filePath]; 143 | var cmd = new Command("arm-none-eabi-objcopy", args); 144 | cmd.description = "converting to bin: "+FileInfo.fileName(input.filePath); 145 | cmd.highlight = "linker"; 146 | return cmd; 147 | 148 | } 149 | } 150 | 151 | Rule { 152 | id: size 153 | inputs: "application" 154 | Artifact { 155 | fileTags: "size" 156 | filePath: "-" 157 | } 158 | prepare: { 159 | var args = [input.filePath]; 160 | var cmd = new Command("arm-none-eabi-size", args); 161 | cmd.description = "File size: " + FileInfo.fileName(input.filePath); 162 | cmd.highlight = "linker"; 163 | return cmd; 164 | } 165 | } 166 | 167 | Rule { 168 | id: disassmbly 169 | inputs: "application" 170 | Artifact { 171 | fileTags: "disassembly" 172 | filePath: "../../" + FileExtension.FileExtension(input.filePath, 1) + "/" + FileInfo.baseName(input.filePath) + ".lst" 173 | } 174 | prepare: { 175 | var cmd = new Command("arm-none-eabi-objdump", [input.filePath, '-D','-S']); 176 | cmd.stdoutFilePath = output.filePath; 177 | cmd.description = "Disassembly listing for " + cmd.workingDirectory; 178 | cmd.highlight = "disassembler"; 179 | cmd.silent = true; 180 | 181 | return cmd; 182 | } 183 | } 184 | } 185 | -------------------------------------------------------------------------------- /src/main.c: -------------------------------------------------------------------------------- 1 | #include "stm32f4xx_rcc.h" 2 | #include "stm32f4xx_gpio.h" 3 | 4 | #include 5 | #include 6 | #include 7 | 8 | void assert_param(bool x) 9 | { 10 | if (x) {} 11 | } 12 | 13 | int main(void) 14 | { 15 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); 16 | 17 | GPIO_InitTypeDef gpioInit; 18 | 19 | gpioInit.GPIO_Mode = GPIO_Mode_OUT; 20 | gpioInit.GPIO_OType = GPIO_OType_PP; 21 | gpioInit.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_12; 22 | gpioInit.GPIO_PuPd = GPIO_PuPd_NOPULL; 23 | gpioInit.GPIO_Speed = GPIO_Speed_2MHz; 24 | 25 | GPIO_Init(GPIOD, &gpioInit); 26 | 27 | GPIO_SetBits(GPIOD, GPIO_Pin_12); 28 | GPIO_ResetBits(GPIOD, GPIO_Pin_13); 29 | 30 | volatile uint32_t c = 0; 31 | while(1) 32 | { 33 | 34 | c = 1000000; 35 | while (c > 0) c--; 36 | 37 | GPIO_ToggleBits(GPIOD, GPIO_Pin_12 | GPIO_Pin_13); 38 | 39 | c = 1000000; 40 | while (c > 0) c--; 41 | 42 | GPIO_ToggleBits(GPIOD, GPIO_Pin_12 | GPIO_Pin_13); 43 | } 44 | 45 | return EXIT_SUCCESS; 46 | } 47 | --------------------------------------------------------------------------------