├── 03_LCD_Example_EM-32G880F128-STK_basic ├── EmBlocks │ ├── 01_LCD_Example.depend │ ├── 01_LCD_Example.ebp │ ├── 01_LCD_Example.elay │ ├── EFM32G880F128.svd │ ├── bin │ │ └── Debug │ │ │ ├── Basic_Example_EFM32G880F128-STK_EmBlocks.elf │ │ │ └── Basic_Example_EFM32G880F128-STK_EmBlocks.map │ ├── efm32g.ld │ └── openocd-0.8.0 │ │ ├── OpenOCD User’s Guide.pdf │ │ ├── bin-x64 │ │ ├── libftdi1.dll │ │ ├── libhidapi-0.dll │ │ ├── libusb-1.0.dll │ │ ├── libusb0.dll │ │ └── openocd-x64-0.8.0.exe │ │ ├── bin │ │ ├── libftdi1.dll │ │ ├── libgcc_s_sjlj-1.dll │ │ ├── libhidapi-0.dll │ │ ├── libusb-1.0.dll │ │ ├── libusb0.dll │ │ ├── libwinpthread-1.dll │ │ └── openocd-0.8.0.exe │ │ ├── drivers │ │ ├── giveio.zip │ │ ├── libusb-1.0 drivers.txt │ │ └── libusb-win32_rlink_driver-120229.zip │ │ ├── info.txt │ │ ├── license-hidapi.txt │ │ ├── license-libftdi.txt │ │ ├── license-libusb-win32.txt │ │ ├── license-libusb.txt │ │ ├── license-openocd.txt │ │ ├── news-0.2.0.txt │ │ ├── news-0.3.0.txt │ │ ├── news-0.4.0.txt │ │ ├── news-0.5.0.txt │ │ ├── news-0.6.0.txt │ │ ├── news-0.7.0.txt │ │ ├── news-0.8.0.txt │ │ ├── scripts │ │ ├── bitsbytes.tcl │ │ ├── board │ │ │ ├── actux3.cfg │ │ │ ├── altera_sockit.cfg │ │ │ ├── am3517evm.cfg │ │ │ ├── arm_evaluator7t.cfg │ │ │ ├── asus-rt-n16.cfg │ │ │ ├── at91cap7a-stk-sdram.cfg │ │ │ ├── at91eb40a.cfg │ │ │ ├── at91rm9200-dk.cfg │ │ │ ├── at91rm9200-ek.cfg │ │ │ ├── at91sam9261-ek.cfg │ │ │ ├── at91sam9263-ek.cfg │ │ │ ├── at91sam9g20-ek.cfg │ │ │ ├── atmel_at91sam7s-ek.cfg │ │ │ ├── atmel_at91sam9260-ek.cfg │ │ │ ├── atmel_at91sam9rl-ek.cfg │ │ │ ├── atmel_sam3n_ek.cfg │ │ │ ├── atmel_sam3s_ek.cfg │ │ │ ├── atmel_sam3u_ek.cfg │ │ │ ├── atmel_sam3x_ek.cfg │ │ │ ├── atmel_sam4l8_xplained_pro.cfg │ │ │ ├── atmel_sam4s_ek.cfg │ │ │ ├── atmel_sam4s_xplained_pro.cfg │ │ │ ├── atmel_samd20_xplained_pro.cfg │ │ │ ├── atmel_samd21_xplained_pro.cfg │ │ │ ├── atmel_samg53_xplained_pro.cfg │ │ │ ├── balloon3-cpu.cfg │ │ │ ├── bcm28155_ap.cfg │ │ │ ├── bt-homehubv1.cfg │ │ │ ├── colibri.cfg │ │ │ ├── crossbow_tech_imote2.cfg │ │ │ ├── csb337.cfg │ │ │ ├── csb732.cfg │ │ │ ├── da850evm.cfg │ │ │ ├── digi_connectcore_wi-9c.cfg │ │ │ ├── digilent_zedboard.cfg │ │ │ ├── diolan_lpc4350-db1.cfg │ │ │ ├── dm355evm.cfg │ │ │ ├── dm365evm.cfg │ │ │ ├── dm6446evm.cfg │ │ │ ├── dp_busblaster_v3.cfg │ │ │ ├── efikamx.cfg │ │ │ ├── eir.cfg │ │ │ ├── ek-lm3s1968.cfg │ │ │ ├── ek-lm3s3748.cfg │ │ │ ├── ek-lm3s6965.cfg │ │ │ ├── ek-lm3s811-revb.cfg │ │ │ ├── ek-lm3s811.cfg │ │ │ ├── ek-lm3s8962.cfg │ │ │ ├── ek-lm3s9b9x.cfg │ │ │ ├── ek-lm3s9d92.cfg │ │ │ ├── ek-lm4f120xl.cfg │ │ │ ├── ek-lm4f232.cfg │ │ │ ├── ek-tm4c123gxl.cfg │ │ │ ├── embedded-artists_lpc2478-32.cfg │ │ │ ├── ethernut3.cfg │ │ │ ├── frdm-kl25z.cfg │ │ │ ├── frdm-kl46z.cfg │ │ │ ├── glyn_tonga2.cfg │ │ │ ├── hammer.cfg │ │ │ ├── hilscher_nxdb500sys.cfg │ │ │ ├── hilscher_nxeb500hmi.cfg │ │ │ ├── hilscher_nxhx10.cfg │ │ │ ├── hilscher_nxhx50.cfg │ │ │ ├── hilscher_nxhx500.cfg │ │ │ ├── hilscher_nxsb100.cfg │ │ │ ├── hitex_lpc1768stick.cfg │ │ │ ├── hitex_lpc2929.cfg │ │ │ ├── hitex_stm32-performancestick.cfg │ │ │ ├── hitex_str9-comstick.cfg │ │ │ ├── iar_lpc1768.cfg │ │ │ ├── iar_str912_sk.cfg │ │ │ ├── icnova_imx53_sodimm.cfg │ │ │ ├── icnova_sam9g45_sodimm.cfg │ │ │ ├── imx27ads.cfg │ │ │ ├── imx27lnst.cfg │ │ │ ├── imx28evk.cfg │ │ │ ├── imx31pdk.cfg │ │ │ ├── imx35pdk.cfg │ │ │ ├── imx53-m53evk.cfg │ │ │ ├── imx53loco.cfg │ │ │ ├── keil_mcb1700.cfg │ │ │ ├── keil_mcb2140.cfg │ │ │ ├── kwikstik.cfg │ │ │ ├── linksys-wrt54gl.cfg │ │ │ ├── linksys_nslu2.cfg │ │ │ ├── lisa-l.cfg │ │ │ ├── logicpd_imx27.cfg │ │ │ ├── lpc1850_spifi_generic.cfg │ │ │ ├── lpc4350_spifi_generic.cfg │ │ │ ├── lubbock.cfg │ │ │ ├── mbed-lpc11u24.cfg │ │ │ ├── mbed-lpc1768.cfg │ │ │ ├── mcb1700.cfg │ │ │ ├── microchip_explorer16.cfg │ │ │ ├── mini2440.cfg │ │ │ ├── mini6410.cfg │ │ │ ├── nds32_xc5.cfg │ │ │ ├── netgear-dg834v3.cfg │ │ │ ├── olimex_LPC2378STK.cfg │ │ │ ├── olimex_lpc_h2148.cfg │ │ │ ├── olimex_sam7_ex256.cfg │ │ │ ├── olimex_sam9_l9260.cfg │ │ │ ├── olimex_stm32_h103.cfg │ │ │ ├── olimex_stm32_h107.cfg │ │ │ ├── olimex_stm32_p107.cfg │ │ │ ├── omap2420_h4.cfg │ │ │ ├── open-bldc.cfg │ │ │ ├── openrd.cfg │ │ │ ├── or1k_generic.cfg │ │ │ ├── osk5912.cfg │ │ │ ├── phone_se_j100i.cfg │ │ │ ├── phytec_lpc3250.cfg │ │ │ ├── pic-p32mx.cfg │ │ │ ├── propox_mmnet1001.cfg │ │ │ ├── pxa255_sst.cfg │ │ │ ├── quark_x10xx_board.cfg │ │ │ ├── redbee.cfg │ │ │ ├── rsc-w910.cfg │ │ │ ├── sheevaplug.cfg │ │ │ ├── smdk6410.cfg │ │ │ ├── spear300evb.cfg │ │ │ ├── spear300evb_mod.cfg │ │ │ ├── spear310evb20.cfg │ │ │ ├── spear310evb20_mod.cfg │ │ │ ├── spear320cpu.cfg │ │ │ ├── spear320cpu_mod.cfg │ │ │ ├── st_nucleo_f030r8.cfg │ │ │ ├── st_nucleo_f103rb.cfg │ │ │ ├── st_nucleo_f401re.cfg │ │ │ ├── steval_pcc010.cfg │ │ │ ├── stm320518_eval.cfg │ │ │ ├── stm320518_eval_stlink.cfg │ │ │ ├── stm32100b_eval.cfg │ │ │ ├── stm3210b_eval.cfg │ │ │ ├── stm3210c_eval.cfg │ │ │ ├── stm3210e_eval.cfg │ │ │ ├── stm3220g_eval.cfg │ │ │ ├── stm3220g_eval_stlink.cfg │ │ │ ├── stm3241g_eval.cfg │ │ │ ├── stm3241g_eval_stlink.cfg │ │ │ ├── stm32f0discovery.cfg │ │ │ ├── stm32f3discovery.cfg │ │ │ ├── stm32f429discovery.cfg │ │ │ ├── stm32f4discovery.cfg │ │ │ ├── stm32ldiscovery.cfg │ │ │ ├── stm32vldiscovery.cfg │ │ │ ├── str910-eval.cfg │ │ │ ├── telo.cfg │ │ │ ├── ti_am335xevm.cfg │ │ │ ├── ti_am43xx_evm.cfg │ │ │ ├── ti_beagleboard.cfg │ │ │ ├── ti_beagleboard_xm.cfg │ │ │ ├── ti_beaglebone.cfg │ │ │ ├── ti_blaze.cfg │ │ │ ├── ti_pandaboard.cfg │ │ │ ├── ti_pandaboard_es.cfg │ │ │ ├── ti_tmdx570ls31usb.cfg │ │ │ ├── topas910.cfg │ │ │ ├── topasa900.cfg │ │ │ ├── twr-k60f120m.cfg │ │ │ ├── twr-k60n512.cfg │ │ │ ├── tx25_stk5.cfg │ │ │ ├── tx27_stk5.cfg │ │ │ ├── unknown_at91sam9260.cfg │ │ │ ├── uptech_2410.cfg │ │ │ ├── verdex.cfg │ │ │ ├── voipac.cfg │ │ │ ├── voltcraft_dso-3062c.cfg │ │ │ ├── x300t.cfg │ │ │ └── zy1000.cfg │ │ ├── chip │ │ │ ├── atmel │ │ │ │ └── at91 │ │ │ │ │ ├── aic.tcl │ │ │ │ │ ├── at91_pio.cfg │ │ │ │ │ ├── at91_pmc.cfg │ │ │ │ │ ├── at91_rstc.cfg │ │ │ │ │ ├── at91_wdt.cfg │ │ │ │ │ ├── at91sam7x128.tcl │ │ │ │ │ ├── at91sam7x256.tcl │ │ │ │ │ ├── at91sam9261.cfg │ │ │ │ │ ├── at91sam9261_matrix.cfg │ │ │ │ │ ├── at91sam9263.cfg │ │ │ │ │ ├── at91sam9263_matrix.cfg │ │ │ │ │ ├── at91sam9_init.cfg │ │ │ │ │ ├── at91sam9_sdramc.cfg │ │ │ │ │ ├── at91sam9_smc.cfg │ │ │ │ │ ├── hardware.cfg │ │ │ │ │ ├── pmc.tcl │ │ │ │ │ ├── rtt.tcl │ │ │ │ │ ├── sam9_smc.cfg │ │ │ │ │ └── usarts.tcl │ │ │ ├── st │ │ │ │ ├── spear │ │ │ │ │ ├── quirk_no_srst.tcl │ │ │ │ │ ├── spear3xx.tcl │ │ │ │ │ └── spear3xx_ddr.tcl │ │ │ │ └── stm32 │ │ │ │ │ ├── stm32.tcl │ │ │ │ │ ├── stm32_rcc.tcl │ │ │ │ │ └── stm32_regs.tcl │ │ │ └── ti │ │ │ │ └── lm3s │ │ │ │ ├── lm3s.tcl │ │ │ │ └── lm3s_regs.tcl │ │ ├── cpld │ │ │ ├── lattice-lc4032ze.cfg │ │ │ └── xilinx-xcr3256.cfg │ │ ├── cpu │ │ │ └── arm │ │ │ │ ├── arm7tdmi.tcl │ │ │ │ ├── arm920.tcl │ │ │ │ ├── arm946.tcl │ │ │ │ ├── arm966.tcl │ │ │ │ └── cortex_m3.tcl │ │ ├── interface │ │ │ ├── altera-usb-blaster.cfg │ │ │ ├── altera-usb-blaster2.cfg │ │ │ ├── arm-jtag-ew.cfg │ │ │ ├── at91rm9200.cfg │ │ │ ├── axm0432.cfg │ │ │ ├── busblaster.cfg │ │ │ ├── buspirate.cfg │ │ │ ├── calao-usb-a9260-c01.cfg │ │ │ ├── calao-usb-a9260-c02.cfg │ │ │ ├── calao-usb-a9260.cfg │ │ │ ├── chameleon.cfg │ │ │ ├── cmsis-dap.cfg │ │ │ ├── cortino.cfg │ │ │ ├── digilent-hs1.cfg │ │ │ ├── dlp-usb1232h.cfg │ │ │ ├── dummy.cfg │ │ │ ├── estick.cfg │ │ │ ├── flashlink.cfg │ │ │ ├── flossjtag-noeeprom.cfg │ │ │ ├── flossjtag.cfg │ │ │ ├── flyswatter.cfg │ │ │ ├── flyswatter2.cfg │ │ │ ├── ftdi │ │ │ │ ├── axm0432.cfg │ │ │ │ ├── calao-usb-a9260-c01.cfg │ │ │ │ ├── calao-usb-a9260-c02.cfg │ │ │ │ ├── cortino.cfg │ │ │ │ ├── digilent_jtag_smt2.cfg │ │ │ │ ├── dlp-usb1232h.cfg │ │ │ │ ├── dp_busblaster.cfg │ │ │ │ ├── flossjtag-noeeprom.cfg │ │ │ │ ├── flossjtag.cfg │ │ │ │ ├── flyswatter.cfg │ │ │ │ ├── flyswatter2.cfg │ │ │ │ ├── gw16042.cfg │ │ │ │ ├── hilscher_nxhx10_etm.cfg │ │ │ │ ├── hilscher_nxhx500_etm.cfg │ │ │ │ ├── hilscher_nxhx500_re.cfg │ │ │ │ ├── hilscher_nxhx50_etm.cfg │ │ │ │ ├── hilscher_nxhx50_re.cfg │ │ │ │ ├── hitex_lpc1768stick.cfg │ │ │ │ ├── hitex_str9-comstick.cfg │ │ │ │ ├── icebear.cfg │ │ │ │ ├── jtag-lock-pick_tiny_2.cfg │ │ │ │ ├── jtagkey.cfg │ │ │ │ ├── jtagkey2.cfg │ │ │ │ ├── jtagkey2p.cfg │ │ │ │ ├── kt-link.cfg │ │ │ │ ├── lisa-l.cfg │ │ │ │ ├── luminary-icdi.cfg │ │ │ │ ├── luminary-lm3s811.cfg │ │ │ │ ├── luminary.cfg │ │ │ │ ├── m53evk.cfg │ │ │ │ ├── minimodule.cfg │ │ │ │ ├── neodb.cfg │ │ │ │ ├── ngxtech.cfg │ │ │ │ ├── olimex-arm-usb-ocd-h.cfg │ │ │ │ ├── olimex-arm-usb-ocd.cfg │ │ │ │ ├── olimex-arm-usb-tiny-h.cfg │ │ │ │ ├── olimex-jtag-tiny.cfg │ │ │ │ ├── oocdlink.cfg │ │ │ │ ├── opendous_ftdi.cfg │ │ │ │ ├── openocd-usb-hs.cfg │ │ │ │ ├── openocd-usb.cfg │ │ │ │ ├── openrd.cfg │ │ │ │ ├── redbee-econotag.cfg │ │ │ │ ├── redbee-usb.cfg │ │ │ │ ├── sheevaplug.cfg │ │ │ │ ├── signalyzer-lite.cfg │ │ │ │ ├── signalyzer.cfg │ │ │ │ ├── stm32-stick.cfg │ │ │ │ ├── tumpa-lite.cfg │ │ │ │ ├── tumpa.cfg │ │ │ │ ├── turtelizer2-revB.cfg │ │ │ │ ├── turtelizer2-revC.cfg │ │ │ │ ├── vpaclink.cfg │ │ │ │ └── xds100v2.cfg │ │ │ ├── hilscher_nxhx10_etm.cfg │ │ │ ├── hilscher_nxhx500_etm.cfg │ │ │ ├── hilscher_nxhx500_re.cfg │ │ │ ├── hilscher_nxhx50_etm.cfg │ │ │ ├── hilscher_nxhx50_re.cfg │ │ │ ├── hitex_str9-comstick.cfg │ │ │ ├── icebear.cfg │ │ │ ├── jlink.cfg │ │ │ ├── jtag-lock-pick_tiny_2.cfg │ │ │ ├── jtag_vpi.cfg │ │ │ ├── jtagkey-tiny.cfg │ │ │ ├── jtagkey.cfg │ │ │ ├── jtagkey2.cfg │ │ │ ├── jtagkey2p.cfg │ │ │ ├── kt-link.cfg │ │ │ ├── lisa-l.cfg │ │ │ ├── luminary-icdi.cfg │ │ │ ├── luminary-lm3s811.cfg │ │ │ ├── luminary.cfg │ │ │ ├── minimodule.cfg │ │ │ ├── nds32-aice.cfg │ │ │ ├── neodb.cfg │ │ │ ├── ngxtech.cfg │ │ │ ├── olimex-arm-usb-ocd-h.cfg │ │ │ ├── olimex-arm-usb-ocd.cfg │ │ │ ├── olimex-arm-usb-tiny-h.cfg │ │ │ ├── olimex-jtag-tiny.cfg │ │ │ ├── oocdlink.cfg │ │ │ ├── opendous.cfg │ │ │ ├── opendous_ftdi.cfg │ │ │ ├── openjtag.cfg │ │ │ ├── openocd-usb-hs.cfg │ │ │ ├── openocd-usb.cfg │ │ │ ├── openrd.cfg │ │ │ ├── osbdm.cfg │ │ │ ├── parport.cfg │ │ │ ├── parport_dlc5.cfg │ │ │ ├── raspberrypi-native.cfg │ │ │ ├── redbee-econotag.cfg │ │ │ ├── redbee-usb.cfg │ │ │ ├── rlink.cfg │ │ │ ├── sheevaplug.cfg │ │ │ ├── signalyzer-h2.cfg │ │ │ ├── signalyzer-h4.cfg │ │ │ ├── signalyzer-lite.cfg │ │ │ ├── signalyzer.cfg │ │ │ ├── stlink-v1.cfg │ │ │ ├── stlink-v2-1.cfg │ │ │ ├── stlink-v2.cfg │ │ │ ├── stm32-stick.cfg │ │ │ ├── sysfsgpio-raspberrypi.cfg │ │ │ ├── ti-icdi.cfg │ │ │ ├── turtelizer2.cfg │ │ │ ├── ulink.cfg │ │ │ ├── usb-jtag.cfg │ │ │ ├── usbprog.cfg │ │ │ ├── vpaclink.cfg │ │ │ ├── vsllink.cfg │ │ │ └── xds100v2.cfg │ │ ├── mem_helper.tcl │ │ ├── memory.tcl │ │ ├── mmr_helpers.tcl │ │ ├── target │ │ │ ├── 1986ве1т.cfg │ │ │ ├── aduc702x.cfg │ │ │ ├── altera_fpgasoc.cfg │ │ │ ├── am335x.cfg │ │ │ ├── am437x.cfg │ │ │ ├── amdm37x.cfg │ │ │ ├── ar71xx.cfg │ │ │ ├── armada370.cfg │ │ │ ├── at32ap7000.cfg │ │ │ ├── at91r40008.cfg │ │ │ ├── at91rm9200.cfg │ │ │ ├── at91sam3XXX.cfg │ │ │ ├── at91sam3ax_4x.cfg │ │ │ ├── at91sam3ax_8x.cfg │ │ │ ├── at91sam3ax_xx.cfg │ │ │ ├── at91sam3nXX.cfg │ │ │ ├── at91sam3sXX.cfg │ │ │ ├── at91sam3u1c.cfg │ │ │ ├── at91sam3u1e.cfg │ │ │ ├── at91sam3u2c.cfg │ │ │ ├── at91sam3u2e.cfg │ │ │ ├── at91sam3u4c.cfg │ │ │ ├── at91sam3u4e.cfg │ │ │ ├── at91sam3uxx.cfg │ │ │ ├── at91sam4XXX.cfg │ │ │ ├── at91sam4lXX.cfg │ │ │ ├── at91sam4sXX.cfg │ │ │ ├── at91sam4sd32x.cfg │ │ │ ├── at91sam7se512.cfg │ │ │ ├── at91sam7sx.cfg │ │ │ ├── at91sam7x256.cfg │ │ │ ├── at91sam7x512.cfg │ │ │ ├── at91sam9.cfg │ │ │ ├── at91sam9260.cfg │ │ │ ├── at91sam9260_ext_RAM_ext_flash.cfg │ │ │ ├── at91sam9261.cfg │ │ │ ├── at91sam9263.cfg │ │ │ ├── at91sam9g10.cfg │ │ │ ├── at91sam9g20.cfg │ │ │ ├── at91sam9g45.cfg │ │ │ ├── at91sam9rl.cfg │ │ │ ├── at91samdXX.cfg │ │ │ ├── at91samg5x.cfg │ │ │ ├── atmega128.cfg │ │ │ ├── avr32.cfg │ │ │ ├── bcm281xx.cfg │ │ │ ├── bcm4718.cfg │ │ │ ├── bcm47xx.cfg │ │ │ ├── bcm5352e.cfg │ │ │ ├── bcm6348.cfg │ │ │ ├── c100.cfg │ │ │ ├── c100config.tcl │ │ │ ├── c100helper.tcl │ │ │ ├── c100regs.tcl │ │ │ ├── cs351x.cfg │ │ │ ├── davinci.cfg │ │ │ ├── dragonite.cfg │ │ │ ├── dsp56321.cfg │ │ │ ├── dsp568013.cfg │ │ │ ├── dsp568037.cfg │ │ │ ├── efm32_stlink.cfg │ │ │ ├── epc9301.cfg │ │ │ ├── faux.cfg │ │ │ ├── feroceon.cfg │ │ │ ├── fm3.cfg │ │ │ ├── hilscher_netx10.cfg │ │ │ ├── hilscher_netx50.cfg │ │ │ ├── hilscher_netx500.cfg │ │ │ ├── icepick.cfg │ │ │ ├── imx.cfg │ │ │ ├── imx21.cfg │ │ │ ├── imx25.cfg │ │ │ ├── imx27.cfg │ │ │ ├── imx28.cfg │ │ │ ├── imx31.cfg │ │ │ ├── imx35.cfg │ │ │ ├── imx51.cfg │ │ │ ├── imx53.cfg │ │ │ ├── imx6.cfg │ │ │ ├── is5114.cfg │ │ │ ├── ixp42x.cfg │ │ │ ├── k40.cfg │ │ │ ├── k60.cfg │ │ │ ├── kl25.cfg │ │ │ ├── kl25z_hla.cfg │ │ │ ├── kl46.cfg │ │ │ ├── lpc11uxx.cfg │ │ │ ├── lpc1751.cfg │ │ │ ├── lpc1752.cfg │ │ │ ├── lpc1754.cfg │ │ │ ├── lpc1756.cfg │ │ │ ├── lpc1758.cfg │ │ │ ├── lpc1759.cfg │ │ │ ├── lpc1763.cfg │ │ │ ├── lpc1764.cfg │ │ │ ├── lpc1765.cfg │ │ │ ├── lpc1766.cfg │ │ │ ├── lpc1767.cfg │ │ │ ├── lpc1768.cfg │ │ │ ├── lpc1769.cfg │ │ │ ├── lpc1788.cfg │ │ │ ├── lpc17xx.cfg │ │ │ ├── lpc1850.cfg │ │ │ ├── lpc2103.cfg │ │ │ ├── lpc2124.cfg │ │ │ ├── lpc2129.cfg │ │ │ ├── lpc2148.cfg │ │ │ ├── lpc2294.cfg │ │ │ ├── lpc2378.cfg │ │ │ ├── lpc2460.cfg │ │ │ ├── lpc2478.cfg │ │ │ ├── lpc2900.cfg │ │ │ ├── lpc2xxx.cfg │ │ │ ├── lpc3131.cfg │ │ │ ├── lpc3250.cfg │ │ │ ├── lpc4350.cfg │ │ │ ├── mc13224v.cfg │ │ │ ├── mdr32f9q2i.cfg │ │ │ ├── nds32v2.cfg │ │ │ ├── nds32v3.cfg │ │ │ ├── nds32v3m.cfg │ │ │ ├── nrf51_stlink.tcl │ │ │ ├── nuc910.cfg │ │ │ ├── omap2420.cfg │ │ │ ├── omap3530.cfg │ │ │ ├── omap4430.cfg │ │ │ ├── omap4460.cfg │ │ │ ├── omap5912.cfg │ │ │ ├── omapl138.cfg │ │ │ ├── or1k.cfg │ │ │ ├── pic32mx.cfg │ │ │ ├── pxa255.cfg │ │ │ ├── pxa270.cfg │ │ │ ├── pxa3xx.cfg │ │ │ ├── quark_x10xx.cfg │ │ │ ├── readme.txt │ │ │ ├── samsung_s3c2410.cfg │ │ │ ├── samsung_s3c2440.cfg │ │ │ ├── samsung_s3c2450.cfg │ │ │ ├── samsung_s3c4510.cfg │ │ │ ├── samsung_s3c6410.cfg │ │ │ ├── sharp_lh79532.cfg │ │ │ ├── smp8634.cfg │ │ │ ├── spear3xx.cfg │ │ │ ├── stellaris.cfg │ │ │ ├── stellaris_icdi.cfg │ │ │ ├── stm32_stlink.cfg │ │ │ ├── stm32f0x.cfg │ │ │ ├── stm32f0x_stlink.cfg │ │ │ ├── stm32f1x.cfg │ │ │ ├── stm32f1x_stlink.cfg │ │ │ ├── stm32f2x.cfg │ │ │ ├── stm32f2x_stlink.cfg │ │ │ ├── stm32f3x.cfg │ │ │ ├── stm32f3x_stlink.cfg │ │ │ ├── stm32f4x.cfg │ │ │ ├── stm32f4x_stlink.cfg │ │ │ ├── stm32l.cfg │ │ │ ├── stm32lx_dual_bank.cfg │ │ │ ├── stm32lx_stlink.cfg │ │ │ ├── stm32w108_stlink.cfg │ │ │ ├── stm32w108xx.cfg │ │ │ ├── stm32xl.cfg │ │ │ ├── str710.cfg │ │ │ ├── str730.cfg │ │ │ ├── str750.cfg │ │ │ ├── str912.cfg │ │ │ ├── swj-dp.tcl │ │ │ ├── test_reset_syntax_error.cfg │ │ │ ├── test_syntax_error.cfg │ │ │ ├── ti-ar7.cfg │ │ │ ├── ti_calypso.cfg │ │ │ ├── ti_dm355.cfg │ │ │ ├── ti_dm365.cfg │ │ │ ├── ti_dm6446.cfg │ │ │ ├── ti_tms570.cfg │ │ │ ├── tmpa900.cfg │ │ │ ├── tmpa910.cfg │ │ │ ├── u8500.cfg │ │ │ └── zynq_7000.cfg │ │ ├── test │ │ │ ├── selftest.cfg │ │ │ └── syntax1.cfg │ │ └── tools │ │ │ ├── firmware-recovery.tcl │ │ │ └── memtest.tcl │ │ └── source │ │ └── info.txt ├── emlcd.c ├── lcdtest.c └── lcdtest.h ├── CMSIS ├── core_cm3.h ├── core_cmFunc.h └── core_cmInstr.h ├── Datasheet ├── EM-32G880F128-STK-SCHEMATIC.pdf ├── STM32F4Discovery.pdf └── stlink_olimex_wire.JPG ├── EFM32G ├── Changes-EnergyMicro.txt ├── Include │ ├── efm32.h │ ├── efm32g200f16.h │ ├── efm32g200f32.h │ ├── efm32g200f64.h │ ├── efm32g210f128.h │ ├── efm32g222f128.h │ ├── efm32g222f32.h │ ├── efm32g222f64.h │ ├── efm32g230f128.h │ ├── efm32g230f32.h │ ├── efm32g230f64.h │ ├── efm32g232f128.h │ ├── efm32g232f32.h │ ├── efm32g232f64.h │ ├── efm32g280f128.h │ ├── efm32g280f32.h │ ├── efm32g280f64.h │ ├── efm32g290f128.h │ ├── efm32g290f32.h │ ├── efm32g290f64.h │ ├── efm32g840f128.h │ ├── efm32g840f32.h │ ├── efm32g840f64.h │ ├── efm32g842f128.h │ ├── efm32g842f32.h │ ├── efm32g842f64.h │ ├── efm32g880f128.h │ ├── efm32g880f32.h │ ├── efm32g880f64.h │ ├── efm32g890f128.h │ ├── efm32g890f32.h │ ├── efm32g890f64.h │ ├── efm32g_acmp.h │ ├── efm32g_adc.h │ ├── efm32g_aes.h │ ├── efm32g_af_pins.h │ ├── efm32g_af_ports.h │ ├── efm32g_calibrate.h │ ├── efm32g_cmu.h │ ├── efm32g_dac.h │ ├── efm32g_devinfo.h │ ├── efm32g_dma.h │ ├── efm32g_dma_ch.h │ ├── efm32g_dma_descriptor.h │ ├── efm32g_dmactrl.h │ ├── efm32g_dmareq.h │ ├── efm32g_ebi.h │ ├── efm32g_emu.h │ ├── efm32g_gpio.h │ ├── efm32g_gpio_p.h │ ├── efm32g_i2c.h │ ├── efm32g_lcd.h │ ├── efm32g_letimer.h │ ├── efm32g_leuart.h │ ├── efm32g_msc.h │ ├── efm32g_pcnt.h │ ├── efm32g_prs.h │ ├── efm32g_prs_ch.h │ ├── efm32g_prs_signals.h │ ├── efm32g_rmu.h │ ├── efm32g_romtable.h │ ├── efm32g_rtc.h │ ├── efm32g_timer.h │ ├── efm32g_timer_cc.h │ ├── efm32g_uart.h │ ├── efm32g_usart.h │ ├── efm32g_vcmp.h │ ├── efm32g_wdog.h │ ├── em_device.h │ └── system_efm32g.h ├── ReadMe-EnergyMicro.txt └── Source │ ├── ARM │ └── startup_efm32g.s │ ├── GCC │ ├── efm32g.ld │ └── startup_efm32g.S │ └── system_efm32g.c ├── README.md ├── drivers ├── rtcdrv.c ├── rtcdrv.h ├── segmentlcd.c ├── segmentlcd.h └── segmentlcdconfig_olimex.h ├── emlib ├── Changes_emlib.txt ├── ReadMe_emlib.txt ├── inc │ ├── em_acmp.h │ ├── em_adc.h │ ├── em_aes.h │ ├── em_assert.h │ ├── em_bitband.h │ ├── em_burtc.h │ ├── em_chip.h │ ├── em_cmu.h │ ├── em_common.h │ ├── em_dac.h │ ├── em_dbg.h │ ├── em_dma.h │ ├── em_ebi.h │ ├── em_emu.h │ ├── em_gpio.h │ ├── em_i2c.h │ ├── em_int.h │ ├── em_lcd.h │ ├── em_lesense.h │ ├── em_letimer.h │ ├── em_leuart.h │ ├── em_mpu.h │ ├── em_msc.h │ ├── em_opamp.h │ ├── em_part.h │ ├── em_pcnt.h │ ├── em_prs.h │ ├── em_rmu.h │ ├── em_rtc.h │ ├── em_system.h │ ├── em_timer.h │ ├── em_usart.h │ ├── em_vcmp.h │ ├── em_version.h │ └── em_wdog.h └── src │ ├── em_acmp.c │ ├── em_adc.c │ ├── em_aes.c │ ├── em_assert.c │ ├── em_burtc.c │ ├── em_cmu.c │ ├── em_dac.c │ ├── em_dbg.c │ ├── em_dma.c │ ├── em_ebi.c │ ├── em_emu.c │ ├── em_gpio.c │ ├── em_i2c.c │ ├── em_int.c │ ├── em_lcd.c │ ├── em_lesense.c │ ├── em_letimer.c │ ├── em_leuart.c │ ├── em_mpu.c │ ├── em_msc.c │ ├── em_opamp.c │ ├── em_pcnt.c │ ├── em_prs.c │ ├── em_rmu.c │ ├── em_rtc.c │ ├── em_system.c │ ├── em_timer.c │ ├── em_usart.c │ ├── em_vcmp.c │ └── em_wdog.c └── putty.exe /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/bin/Debug/Basic_Example_EFM32G880F128-STK_EmBlocks.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nopeppermint/openocd_efm32/4e91368c933e1357ba97155af134f3eba0a48e7a/03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/bin/Debug/Basic_Example_EFM32G880F128-STK_EmBlocks.elf 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(WinUSB) drivers using zadig software from this link: 7 | http://zadig.akeo.ie/ 8 | 9 | Installation procedure is as easy as: 10 | 1. Plug in your interface 11 | 2. Start zadig.exe 12 | a. you may be asked by UAC to allow this application to change system settings - click Yes 13 | 3. If you device is visible in drop-down list go to step 5 14 | 4. Check Options > List All Devices 15 | 5. Select your device in drop-down list 16 | 6. From the right (active) selector choose WinUSB (...) driver 17 | 7. Click Install Driver or Replace Driver below 18 | a. you may be asked by OS to accept driver installation - click Yes 19 | 8. Click Close in the message box that will appear informing you about success 20 | 21 | That's all! 22 | 23 | You can also use zadig to install libusb-win32 drivers. 24 | _______________ 25 | 26 | http://www.freddiechopin.info/ 27 | 28 | document version: 140330 -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/drivers/libusb-win32_rlink_driver-120229.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nopeppermint/openocd_efm32/4e91368c933e1357ba97155af134f3eba0a48e7a/03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/drivers/libusb-win32_rlink_driver-120229.zip -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/license-hidapi.txt: -------------------------------------------------------------------------------- 1 | HIDAPI - Multi-Platform library for 2 | communication with HID devices. 3 | 4 | Copyright 2009, Alan Ott, Signal 11 Software. 5 | All Rights Reserved. 6 | 7 | This software may be used by anyone for any reason so 8 | long as the copyright notice in the source files 9 | remains intact. 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/altera_sockit.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Cyclone V SocKit board 3 | # http://www.altera.com/b/arrow-sockit.html 4 | # 5 | # Software support page: 6 | # http://www.rocketboards.org/ 7 | 8 | # openocd does not currently support the on-board USB Blaster II. 9 | # Install the JTAG header and use a USB Blaster instead. 10 | interface usb_blaster 11 | 12 | source [find target/altera_fpgasoc.cfg] 13 | 14 | # If the USB Blaster II were supported, these settings would be needed 15 | #usb_blaster_vid_pid 0x6810 0x09fb 16 | #usb_blaster_device_desc "USB-Blaster II" 17 | 18 | adapter_khz 100 19 | 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/am3517evm.cfg: -------------------------------------------------------------------------------- 1 | # DANGER!!!! early work in progress for this PCB/target. 2 | # 3 | # The most basic operations work well enough that it is 4 | # useful to have this in the repository for cooperation 5 | # alpha testing purposes. 6 | # 7 | # TI AM3517 8 | # 9 | # http://focus.ti.com/docs/prod/folders/print/am3517.html 10 | # http://processors.wiki.ti.com/index.php/Debug_Access_Port_(DAP) 11 | # http://processors.wiki.ti.com/index.php?title=How_to_Find_the_Silicon_Revision_of_your_OMAP35x 12 | 13 | set CHIPTYPE "am35x" 14 | source [find target/amdm37x.cfg] 15 | 16 | # The TI-14 JTAG connector does not have srst. CPU reset is handled in 17 | # hardware. 18 | reset_config trst_only 19 | 20 | # "amdm37x_dbginit am35x.cpu" needs to be run after init. 21 | 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/arm_evaluator7t.cfg: -------------------------------------------------------------------------------- 1 | # This board is from ARM and has an samsung s3c45101x01 chip 2 | 3 | source [find target/samsung_s3c4510.cfg] 4 | 5 | # 6 | # FIXME: 7 | # Add (A) sdram configuration 8 | # Add (B) flash cfi programing configuration 9 | # 10 | 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/asus-rt-n16.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # http://wikidevi.com/wiki/ASUS_RT-N16 3 | # 4 | 5 | set partition_list { 6 | CFE { Bootloader 0xbc000000 0x00040000 } 7 | firmware { "Kernel+rootfs" 0xbc040000 0x01fa0000 } 8 | nvram { "Config space" 0xbdfe0000 0x00020000 } 9 | } 10 | 11 | source [find target/bcm4718.cfg] 12 | 13 | # External 32MB NOR Flash (Macronix MX29GL256EHTI2I-90Q) 14 | set _FLASHNAME $_CHIPNAME.flash 15 | flash bank $_FLASHNAME cfi 0xbc000000 0x02000000 1 1 $_TARGETNAME x16_as_x8 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_at91sam7s-ek.cfg: -------------------------------------------------------------------------------- 1 | # Atmel AT91SAM7S-EK 2 | # http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3784 3 | 4 | set CHIPNAME at91sam7s256 5 | 6 | source [find target/at91sam7sx.cfg] 7 | 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_sam3n_ek.cfg: -------------------------------------------------------------------------------- 1 | 2 | # 3 | # Board configuration for Atmel's SAM3N-EK 4 | # 5 | 6 | reset_config srst_only 7 | 8 | set CHIPNAME at91sam3n4c 9 | 10 | adapter_khz 32 11 | 12 | source [find target/at91sam3nXX.cfg] 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_sam3s_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam3sXX.cfg] 2 | 3 | $_TARGETNAME configure -event gdb-attach { reset init } 4 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_sam3u_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam3u4e.cfg] 2 | 3 | reset_config srst_only 4 | 5 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_sam3x_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam3ax_8x.cfg] 2 | 3 | reset_config srst_only 4 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_sam4l8_xplained_pro.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Atmel SAM4L8 Xplained Pro evaluation kit. 3 | # http://www.atmel.com/tools/ATSAM4L8-XPRO.aspx 4 | # 5 | 6 | source [find interface/cmsis-dap.cfg] 7 | 8 | # chip name 9 | set CHIPNAME ATSAM4LC8CA 10 | 11 | source [find target/at91sam4lXX.cfg] 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_sam4s_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam4sXX.cfg] 2 | 3 | $_TARGETNAME configure -event gdb-attach { reset init } 4 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_sam4s_xplained_pro.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Atmel SAM4S Xplained Pro evaluation kit. 3 | # http://www.atmel.com/tools/ATSAM4S-XPRO.aspx 4 | # 5 | 6 | source [find interface/cmsis-dap.cfg] 7 | 8 | # chip name 9 | set CHIPNAME ATSAM4SD32C 10 | 11 | source [find target/at91sam4sd32x.cfg] 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_samd20_xplained_pro.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Atmel SAMD20 Xplained Pro evaluation kit. 3 | # http://www.atmel.com/tools/ATSAMD20-XPRO.aspx 4 | # 5 | 6 | source [find interface/cmsis-dap.cfg] 7 | 8 | # chip name 9 | set CHIPNAME at91samd20j18 10 | 11 | source [find target/at91samdXX.cfg] 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_samd21_xplained_pro.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Atmel SAMD21 Xplained Pro evaluation kit. 3 | # 4 | 5 | source [find interface/cmsis-dap.cfg] 6 | 7 | # chip name 8 | set CHIPNAME at91samd21j18 9 | 10 | source [find target/at91samdXX.cfg] 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/atmel_samg53_xplained_pro.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Atmel SAMG53 Xplained Pro evaluation kit. 3 | # http://www.atmel.com/tools/ATSAMG53-XPRO.aspx 4 | # 5 | 6 | source [find interface/cmsis-dap.cfg] 7 | 8 | # chip name 9 | set CHIPNAME ATSAMG53N19 10 | 11 | source [find target/at91samg5x.cfg] 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/balloon3-cpu.cfg: -------------------------------------------------------------------------------- 1 | # Config for balloon3 board, cpu JTAG port. http://balloonboard.org/ 2 | # The board has separate JTAG ports for cpu and CPLD/FPGA devices 3 | # Chaining is done on IO interfaces if desired. 4 | 5 | source [find target/pxa270.cfg] 6 | 7 | # The board supports separate reset lines 8 | # Override this in the interface config for parallel dongles 9 | reset_config trst_and_srst separate 10 | 11 | # flash bank 12 | # 29LV650 64Mbit Flash 13 | set _FLASHNAME $_CHIPNAME.flash 14 | flash bank $_FLASHNAME cfi 0x00000000 0x800000 2 2 $_TARGETNAME 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/bcm28155_ap.cfg: -------------------------------------------------------------------------------- 1 | # BCM28155_AP 2 | 3 | adapter_khz 20000 4 | 5 | set CHIPNAME bcm28155 6 | source [find target/bcm281xx.cfg] 7 | 8 | reset_config trst_and_srst 9 | 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/bt-homehubv1.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # BT HomeHub v1 3 | # 4 | 5 | set partition_list { 6 | CFE { Bootloader 0xbe400000 0x00020000 } 7 | firmware { "Kernel+rootfs" 0xbe420000 0x007d0000 } 8 | fisdir { "FIS Directory" 0xbebf0000 0x0000f000 } 9 | nvram { "Config space" 0xbebff000 0x00001000 } 10 | } 11 | 12 | source [find target/bcm6348.cfg] 13 | 14 | set _FLASHNAME $_CHIPNAME.norflash 15 | flash bank $_FLASHNAME cfi 0xbe400000 0x00800000 2 2 $_TARGETNAME 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/colibri.cfg: -------------------------------------------------------------------------------- 1 | # Toradex Colibri PXA270 2 | source [find target/pxa270.cfg] 3 | reset_config trst_and_srst srst_push_pull 4 | adapter_nsrst_assert_width 40 5 | 6 | # CS0 -- one bank of CFI flash, 32 MBytes 7 | # the bank is 32-bits wide, two 16-bit chips in parallel 8 | set _FLASHNAME $_CHIPNAME.flash 9 | flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME 10 | 11 | 12 | 13 | 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/crossbow_tech_imote2.cfg: -------------------------------------------------------------------------------- 1 | # Crossbow Technology iMote2 2 | 3 | set CHIPNAME imote2 4 | source [find target/pxa270.cfg] 5 | 6 | # longer-than-normal reset delay 7 | adapter_nsrst_delay 800 8 | 9 | reset_config trst_and_srst separate 10 | 11 | # works for P30 flash 12 | set _FLASHNAME $_CHIPNAME.flash 13 | flash bank $_FLASHNAME cfi 0x00000000 0x2000000 2 2 $_TARGETNAME 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/da850evm.cfg: -------------------------------------------------------------------------------- 1 | #DA850 EVM board 2 | # http://focus.ti.com/dsp/docs/thirdparty/catalog/devtoolsproductfolder.tsp?actionPerformed=productFolder&productId=5939 3 | # http://www.logicpd.com/products/development-kits/zoom-omap-l138-evm-development-kit 4 | 5 | source [find target/omapl138.cfg] 6 | 7 | reset_config trst_and_srst separate 8 | 9 | #currently any pinmux/timing must be setup by UBL before openocd can do debug 10 | #TODO: implement pinmux/timing on reset like in board/dm365evm.cfg 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/digilent_zedboard.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Digilent Zedboard Rev.C, Rev.D with Xilinx Zynq chip 3 | # 4 | # http://zedboard.com/product/zedboard 5 | # 6 | 7 | source [find interface/ftdi/digilent_jtag_smt2.cfg] 8 | 9 | reset_config srst_only srst_push_pull 10 | 11 | source [find target/zynq_7000.cfg] 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/diolan_lpc4350-db1.cfg: -------------------------------------------------------------------------------- 1 | 2 | # 3 | # Diolan LPC-4350-DB1 development board 4 | # 5 | 6 | set CHIPNAME lpc4350 7 | 8 | source [find target/lpc4350.cfg] 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/dp_busblaster_v3.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Dangerous Prototypes - Bus Blaster 3 | # 4 | # http://dangerousprototypes.com/docs/Bus_Blaster 5 | # 6 | # To reprogram the on-board CPLD do: 7 | # openocd -f board/dp_busblaster_v3.cfg -c "adapter_khz 1000; init; svf ; shutdown" 8 | # 9 | 10 | source [find interface/ftdi/dp_busblaster.cfg] 11 | ftdi_channel 1 12 | 13 | jtag newtap xc2c32a tap -expected-id 0x06e1c093 -irlen 8 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/efikamx.cfg: -------------------------------------------------------------------------------- 1 | # Genesi USA EfikaMX 2 | # http://www.genesi-usa.com/products/efika 3 | 4 | # Fall back to 6MHz if RTCK is not supported 5 | jtag_rclk 6000 6 | $_TARGETNAME configure -event "reset-start" { jtag_rclk 6000 } 7 | 8 | source [find target/imx51.cfg] 9 | 10 | reset_config trst_only 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm3s1968.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S1968 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s1968 5 | # 6 | 7 | # NOTE: to use J-Link instead of the on-board interface, 8 | # you may also need to reduce adapter_khz to be about 1200. 9 | # source [find interface/jlink.cfg] 10 | 11 | # include the FT2232 interface config for on-board JTAG interface 12 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 13 | # so is using in JTAG mode, as done here. 14 | source [find interface/luminary.cfg] 15 | 16 | # include the target config 17 | set WORKAREASIZE 0x2000 18 | set CHIPNAME lm3s1968 19 | source [find target/stellaris.cfg] 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm3s3748.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris lm3s3748 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s3748 5 | # 6 | 7 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using it in JTAG mode, as done here. 9 | source [find interface/luminary.cfg] 10 | 11 | # 20k working area 12 | set WORKAREASIZE 0x4000 13 | set CHIPNAME lm3s3748 14 | source [find target/stellaris.cfg] 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm3s6965.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S6965 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s6965 5 | # 6 | 7 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using it in JTAG mode, as done here. 9 | source [find interface/luminary.cfg] 10 | 11 | # 20k working area 12 | set WORKAREASIZE 0x5000 13 | set CHIPNAME lm3s6965 14 | # include the target config 15 | source [find target/stellaris.cfg] 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm3s811-revb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S811 Evaluation Kits (rev B and earlier) 3 | # 4 | # http://www.ti.com/tool/ek-lm3s811 5 | # 6 | 7 | # NOTE: newer 811-EK boards (rev C and above) shouldn't use this. 8 | # use board/ek-lm3s811.cfg 9 | source [find interface/luminary-lm3s811.cfg] 10 | 11 | # include the target config 12 | set WORKAREASIZE 0x2000 13 | set CHIPNAME lm3s811 14 | source [find target/stellaris.cfg] 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm3s811.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S811 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s811 5 | # 6 | 7 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using it in JTAG mode, as done here. 9 | # NOTE: older '811-EK boards (before rev C) shouldn't use this. 10 | source [find interface/luminary.cfg] 11 | 12 | # include the target config 13 | set WORKAREASIZE 0x2000 14 | set CHIPNAME lm3s811 15 | source [find target/stellaris.cfg] 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm3s8962.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S8962 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s8962 5 | # 6 | 7 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using it in JTAG mode, as done here. 9 | source [find interface/luminary.cfg] 10 | 11 | # 64k working area 12 | set WORKAREASIZE 0x10000 13 | set CHIPNAME lm3s8962 14 | # include the target config 15 | source [find target/stellaris.cfg] 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm3s9b9x.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S9B9x Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s9b90 5 | # http://www.ti.com/tool/ek-lm3s9b92 6 | # 7 | 8 | # NOTE: using the bundled FT2232 JTAG/SWD/SWO interface is optional! 9 | # so is using in JTAG mode, as done here. 10 | source [find interface/luminary-icdi.cfg] 11 | 12 | set WORKAREASIZE 0x4000 13 | set CHIPNAME lm3s9b9x 14 | source [find target/stellaris.cfg] 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm3s9d92.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S9D92 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s9d92 5 | # 6 | 7 | # NOTE: using the bundled FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using in JTAG mode, as done here. 9 | source [find interface/luminary-icdi.cfg] 10 | 11 | # 64k working area 12 | set WORKAREASIZE 0x10000 13 | set CHIPNAME lm3s9d92 14 | source [find target/stellaris.cfg] 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm4f120xl.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI Stellaris Launchpad ek-lm4f120xl Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm4f120xl 5 | # 6 | 7 | # 8 | # NOTE: using the bundled ICDI interface is optional! 9 | # This interface is not ftdi based as previous boards were 10 | # 11 | source [find interface/ti-icdi.cfg] 12 | 13 | set WORKAREASIZE 0x8000 14 | set CHIPNAME lm4f120h5qr 15 | source [find target/stellaris_icdi.cfg] 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-lm4f232.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI Stellaris LM4F232 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm4f232 5 | # 6 | 7 | # 8 | # NOTE: using the bundled ICDI interface is optional! 9 | # This interface is not ftdi based as previous boards were 10 | # 11 | source [find interface/ti-icdi.cfg] 12 | 13 | set WORKAREASIZE 0x8000 14 | set CHIPNAME lm4f23x 15 | source [find target/stellaris_icdi.cfg] 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ek-tm4c123gxl.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI Tiva C Series ek-tm4c123gxl Launchpad Evaluation Kit 3 | # 4 | # http://www.ti.com/tool/ek-tm4c123gxl 5 | # 6 | 7 | source [find interface/ti-icdi.cfg] 8 | 9 | set WORKAREASIZE 0x8000 10 | set CHIPNAME tm4c123gh6pm 11 | source [find target/stellaris_icdi.cfg] 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/frdm-kl25z.cfg: -------------------------------------------------------------------------------- 1 | # This is an Freescale Freedom eval board with a single MKL25Z128VLK4 chip. 2 | # http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=FRDM-KL25Z 3 | # 4 | 5 | source [find interface/cmsis-dap.cfg] 6 | 7 | # increase working area to 16KB 8 | set WORKAREASIZE 0x4000 9 | 10 | # chip name 11 | set CHIPNAME MKL25Z128VLK4 12 | 13 | source [find target/kl25.cfg] 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/frdm-kl46z.cfg: -------------------------------------------------------------------------------- 1 | # This is an Freescale Freedom eval board with a single MKL46Z256VLL4 chip. 2 | # http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=FRDM-KL46Z 3 | # 4 | 5 | source [find interface/cmsis-dap.cfg] 6 | 7 | # increase working area to 16KB 8 | set WORKAREASIZE 0x4000 9 | 10 | # chip name 11 | set CHIPNAME MKL46Z256VLL4 12 | 13 | source [find target/kl46.cfg] 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/hilscher_nxsb100.cfg: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | # Author: Michael Trensch (MTrensch@googlemail.com) 3 | ################################################################################ 4 | 5 | source [find target/hilscher_netx500.cfg] 6 | 7 | reset_config trst_and_srst 8 | adapter_nsrst_delay 500 9 | jtag_ntrst_delay 500 10 | 11 | $_TARGETNAME configure -work-area-virt 0x1000 -work-area-phys 0x1000 -work-area-size 0x4000 -work-area-backup 1 12 | 13 | $_TARGETNAME configure -event reset-init { 14 | halt 15 | 16 | arm7_9 fast_memory_access enable 17 | arm7_9 dcc_downloads enable 18 | 19 | sdram_fix 20 | 21 | puts "Configuring SDRAM controller for MT48LC2M32 (8MB) " 22 | mww 0x00100140 0 23 | mww 0x00100144 0x03C23251 24 | mww 0x00100140 0x030D0001 25 | 26 | } 27 | 28 | init 29 | reset init 30 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/hitex_lpc1768stick.cfg: -------------------------------------------------------------------------------- 1 | # Hitex LPC1768 Stick 2 | # 3 | # http://www.hitex.com/?id=1602 4 | # 5 | 6 | reset_config trst_and_srst 7 | 8 | source [find interface/ftdi/hitex_lpc1768stick.cfg] 9 | 10 | source [find target/lpc1768.cfg] 11 | 12 | 13 | # startup @ 500kHz 14 | adapter_khz 500 15 | 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/hitex_stm32-performancestick.cfg: -------------------------------------------------------------------------------- 1 | # Hitex stm32 performance stick 2 | 3 | reset_config trst_and_srst 4 | 5 | source [find interface/stm32-stick.cfg] 6 | 7 | set CHIPNAME stm32_hitex 8 | source [find target/stm32f1x.cfg] 9 | 10 | # configure str750 connected to jtag chain 11 | # FIXME -- source [find target/str750.cfg] after cleaning that up 12 | jtag newtap str750 cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id 0x4f1f0041 13 | 14 | # for some reason this board like to startup @ 500kHz 15 | adapter_khz 500 16 | 17 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/iar_lpc1768.cfg: -------------------------------------------------------------------------------- 1 | # Board from IAR KickStart Kit for LPC1768 2 | # See www.iar.com and also 3 | # http://www.olimex.com/dev/lpc-1766stk.html 4 | # 5 | 6 | source [find target/lpc1768.cfg] 7 | 8 | # The chip has just been reset. 9 | # 10 | $_TARGETNAME configure -event reset-init { 11 | # FIXME update the core clock to run at 100 MHz; 12 | # and update JTAG clocking similarly; then 13 | # make CCLK match, 14 | 15 | flash probe 0 16 | } 17 | 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/iar_str912_sk.cfg: -------------------------------------------------------------------------------- 1 | # The IAR str912-sk evaluation kick start board has an str912 2 | 3 | source [find target/str912.cfg] -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/keil_mcb1700.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Keil MCB1700 eval board 3 | # 4 | # http://www.keil.com/mcb1700/picture.asp 5 | # 6 | 7 | source [find target/lpc1768.cfg] 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/keil_mcb2140.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Keil MCB2140 eval board 3 | # 4 | # http://www.keil.com/mcb2140/picture.asp 5 | # 6 | 7 | source [find target/lpc2148.cfg] 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/kwikstik.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale KwikStik development board 3 | # 4 | 5 | # 6 | # JLINK interface is onboard 7 | # 8 | source [find interface/jlink.cfg] 9 | 10 | jtag_rclk 100 11 | 12 | source [find target/k40.cfg] 13 | 14 | reset_config trst_and_srst 15 | 16 | # 17 | # Bank definition for the 'program flash' (instructions and/or data) 18 | # 19 | flash bank $_CHIPNAME.pflash kinetis 0x00000000 0x40000 0 4 $_TARGETNAME 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/linksys-wrt54gl.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Linksys WRT54GL v1.1 3 | # 4 | 5 | source [find target/bcm5352e.cfg] 6 | 7 | set partition_list { 8 | CFE { Bootloader 0x1c000000 0x00040000 } 9 | firmware { "Kernel+rootfs" 0x1c040000 0x003b0000 } 10 | nvram { "Config space" 0x1c3f0000 0x00010000 } 11 | } 12 | 13 | # External 4MB NOR Flash (Intel TE28F320C3BD90 or similar) 14 | set _FLASHNAME $_CHIPNAME.flash 15 | flash bank $_FLASHNAME cfi 0x1c000000 0x00400000 2 2 $_TARGETNAME 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/linksys_nslu2.cfg: -------------------------------------------------------------------------------- 1 | # This is for the LinkSys (CISCO) NSLU2 board 2 | # It is an Intel XSCALE IXP420 CPU. 3 | 4 | source [find target/ixp42x.cfg] 5 | # The _TARGETNAME is set by the above. 6 | 7 | $_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x10000 -work-area-backup 0 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/lisa-l.cfg: -------------------------------------------------------------------------------- 1 | # the Lost Illusions Serendipitous Autopilot 2 | # http://paparazzi.enac.fr/wiki/Lisa 3 | 4 | # Work-area size (RAM size) = 20kB for STM32F103RB device 5 | set WORKAREASIZE 0x5000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/logicpd_imx27.cfg: -------------------------------------------------------------------------------- 1 | # The LogicPD Eval IMX27 eval board has a single IMX27 chip 2 | source [find target/imx27.cfg] 3 | 4 | # The Logic PD board has a NOR flash on CS0 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME cfi 0xc0000000 0x00200000 2 2 $_TARGETNAME 7 | 8 | # 9 | # FIX ME, Add support to 10 | # 11 | # (A) hard reset the board. 12 | # (B) Initialize the SDRAM on the board 13 | # 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/lpc1850_spifi_generic.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Generic LPC1850 board w/ SPIFI flash. 3 | # This config file is intended as an example of how to 4 | # use the lpcspifi flash driver, but it should be functional 5 | # for most LPC1850 boards utilizing SPIFI flash. 6 | 7 | set CHIPNAME lpc1850 8 | 9 | source [find target/lpc1850.cfg] 10 | 11 | #A large working area greatly reduces flash write times 12 | set _WORKAREASIZE 0x4000 13 | 14 | $_CHIPNAME.m3 configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE 15 | 16 | #Configure the flash bank; 0x14000000 is the base address for 17 | #lpc43xx/lpc18xx family micros. 18 | flash bank SPIFI_FLASH lpcspifi 0x14000000 0 0 0 $_CHIPNAME.m3 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/lpc4350_spifi_generic.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Generic LPC4350 board w/ SPIFI flash. 3 | # This config file is intended as an example of how to 4 | # use the lpcspifi flash driver, but it should be functional 5 | # for most LPC4350 boards utilizing SPIFI flash. 6 | 7 | set CHIPNAME lpc4350 8 | 9 | source [find target/lpc4350.cfg] 10 | 11 | #A large working area greatly reduces flash write times 12 | set _WORKAREASIZE 0x2000 13 | 14 | $_CHIPNAME.m4 configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE 15 | 16 | #Configure the flash bank; 0x14000000 is the base address for 17 | #lpc43xx/lpc18xx family micros. 18 | flash bank SPIFI_FLASH lpcspifi 0x14000000 0 0 0 $_CHIPNAME.m4 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/mbed-lpc11u24.cfg: -------------------------------------------------------------------------------- 1 | # This is an mbed eval board with a single NXP LPC11U24 chip. 2 | # http://mbed.org/handbook/mbed-NXP-LPC11U24 3 | # 4 | 5 | source [find interface/cmsis-dap.cfg] 6 | 7 | # increase working area to 8KB 8 | set WORKAREASIZE 0x2000 9 | 10 | # chip name 11 | set CHIPNAME lpc11u24 12 | 13 | source [find target/lpc11uxx.cfg] 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/mbed-lpc1768.cfg: -------------------------------------------------------------------------------- 1 | # This is an mbed eval board with a single NXP LPC1768 chip. 2 | # http://mbed.org/handbook/mbed-NXP-LPC1768 3 | # 4 | 5 | source [find interface/cmsis-dap.cfg] 6 | 7 | source [find target/lpc1768.cfg] 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/microchip_explorer16.cfg: -------------------------------------------------------------------------------- 1 | # Microchip Explorer 16 with PIC32MX360F512L PIM module. 2 | # http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en024858 3 | 4 | # TAPID for PIC32MX360F512L 5 | set CPUTAPID 0x30938053 6 | 7 | # use 32k working area 8 | set WORKAREASIZE 32768 9 | 10 | source [find target/pic32mx.cfg] 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/nds32_xc5.cfg: -------------------------------------------------------------------------------- 1 | set _CPUTAPID 0x1000063d 2 | set _CHIPNAME nds32 3 | source [find target/nds32v3.cfg] 4 | 5 | jtag init 6 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/netgear-dg834v3.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Netgear DG834v3 Router 3 | # Internal 4Kb RAM (@0x80000000) 4 | # Flash is located at 0x90000000 (CS0) and RAM is located at 0x94000000 (CS1) 5 | # 6 | 7 | set partition_list { 8 | loader { "Bootloader (ADAM2)" 0x90000000 0x00020000 } 9 | firmware { "Kernel+rootfs" 0x90020000 0x003d0000 } 10 | config { "Bootloader config space" 0x903f0000 0x00010000 } 11 | } 12 | 13 | source [find target/ti-ar7.cfg] 14 | 15 | # External 16MB SDRAM - disabled as we use internal sram 16 | #$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x00001000 17 | 18 | # External 4MB NOR Flash 19 | set _FLASHNAME $_CHIPNAME.norflash 20 | flash bank $_FLASHNAME cfi 0x90000000 0x00400000 2 2 $_TARGETNAME 21 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/olimex_LPC2378STK.cfg: -------------------------------------------------------------------------------- 1 | ##################################################### 2 | # Olimex LPC2378STK eval board 3 | # 4 | # http://olimex.com/dev/lpc-2378stk.html 5 | # 6 | # Author: Sten, debian@sansys-electronic.com 7 | ##################################################### 8 | # 9 | 10 | source [find target/lpc2378.cfg] 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/olimex_lpc_h2148.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex LPC-H2148 eval board 3 | # 4 | # http://www.olimex.com/dev/lpc-h2148.html 5 | # 6 | 7 | source [find target/lpc2148.cfg] 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/olimex_sam7_ex256.cfg: -------------------------------------------------------------------------------- 1 | # Olimex SAM7-EX256 has a single Atmel at91sam7ex256 on it. 2 | 3 | source [find target/sam7x256.cfg] 4 | 5 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/olimex_stm32_h103.cfg: -------------------------------------------------------------------------------- 1 | # Olimex STM32-H103 eval board 2 | # http://olimex.com/dev/stm32-h103.html 3 | 4 | # Work-area size (RAM size) = 20kB for STM32F103RB device 5 | set WORKAREASIZE 0x5000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/olimex_stm32_h107.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex STM32-H107 3 | # 4 | # http://olimex.com/dev/stm32-h107.html 5 | # 6 | 7 | # Work-area size (RAM size) = 64kB for STM32F107VC device 8 | set WORKAREASIZE 0x10000 9 | 10 | source [find target/stm32f1x.cfg] 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/olimex_stm32_p107.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex STM32-P107 3 | # 4 | # http://olimex.com/dev/stm32-p107.html 5 | # 6 | 7 | # Work-area size (RAM size) = 64kB for STM32F107VC device 8 | set WORKAREASIZE 0x10000 9 | 10 | source [find target/stm32f1x.cfg] 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/omap2420_h4.cfg: -------------------------------------------------------------------------------- 1 | # OMAP2420 SDP board ("H4") 2 | 3 | source [find target/omap2420.cfg] 4 | 5 | # NOTE: this assumes you're *NOT* using a TI-14 connector. 6 | reset_config trst_and_srst separate 7 | 8 | # Board configs can vary a *LOT* ... parts, jumpers, etc. 9 | # This GP board boots from cs0 using NOR (2x32M), and also 10 | # has 64M NAND on cs6. 11 | flash bank h4.u10 cfi 0x04000000 0x02000000 2 2 $_TARGETNAME 12 | flash bank h4.u11 cfi 0x06000000 0x02000000 2 2 $_TARGETNAME 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/open-bldc.cfg: -------------------------------------------------------------------------------- 1 | # Open Source Brush Less DC Motor Controller 2 | # http://open-bldc.org 3 | 4 | # Work-area size (RAM size) = 20kB for STM32F103RB device 5 | set WORKAREASIZE 0x5000 6 | 7 | source [find target/stm32.cfg] 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/phone_se_j100i.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Sony Ericsson J100I Phone 3 | # 4 | # more informations can be found on 5 | # http://bb.osmocom.org/trac/wiki/SonyEricssonJ100i 6 | # 7 | source [find target/ti_calypso.cfg] 8 | 9 | # external flash 10 | 11 | set _FLASHNAME $_CHIPNAME.flash 12 | flash bank $_FLASHNAME cfi 0x00000000 0x400000 2 2 $_TARGETNAME 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/pic-p32mx.cfg: -------------------------------------------------------------------------------- 1 | # The Olimex PIC-P32MX has a PIC32MX 2 | 3 | set CPUTAPID 0x40916053 4 | source [find target/pic32mx.cfg] 5 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/quark_x10xx_board.cfg: -------------------------------------------------------------------------------- 1 | # There are many Quark boards that can host the quark_x10xx SoC 2 | # Galileo is an example board 3 | 4 | source [find target/quark_x10xx.cfg] 5 | 6 | #default frequency but this can be adjusted at runtime 7 | adapter_khz 4000 8 | 9 | reset_config trst_only 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/redbee.cfg: -------------------------------------------------------------------------------- 1 | source [find target/mc13224v.cfg] 2 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/smdk6410.cfg: -------------------------------------------------------------------------------- 1 | # Target configuration for the Samsung s3c6410 system on chip 2 | # Tested on a SMDK6410 3 | # Processor : ARM1176 4 | # Info: JTAG device found: 0x0032409d (Manufacturer: 0x04e, Part: 0x0324, Version: 0x0) 5 | 6 | source [find target/samsung_s3c6410.cfg] 7 | 8 | set _FLASHNAME $_CHIPNAME.flash 9 | flash bank $_FLASHNAME cfi 0x00000000 0x00100000 2 2 $_TARGETNAME jedec_probe 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/st_nucleo_f030r8.cfg: -------------------------------------------------------------------------------- 1 | # This is an ST NUCLEO-F030R8 board with a single STM32F030R8T6 chip. 2 | # http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF259997 3 | 4 | source [find interface/stlink-v2-1.cfg] 5 | 6 | source [find target/stm32f0x_stlink.cfg] 7 | 8 | # use hardware reset, connect under reset 9 | reset_config srst_only srst_nogate 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/st_nucleo_f103rb.cfg: -------------------------------------------------------------------------------- 1 | # This is an ST NUCLEO F103RB board with a single STM32F103RBT6 chip. 2 | # http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF259875 3 | 4 | source [find interface/stlink-v2-1.cfg] 5 | 6 | source [find target/stm32f1x_stlink.cfg] 7 | 8 | # use hardware reset, connect under reset 9 | reset_config srst_only srst_nogate 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/st_nucleo_f401re.cfg: -------------------------------------------------------------------------------- 1 | # This is an ST NUCLEO F401RE board with a single STM32F401RET6 chip. 2 | # http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF260000 3 | 4 | source [find interface/stlink-v2-1.cfg] 5 | 6 | source [find target/stm32f4x_stlink.cfg] 7 | 8 | # use hardware reset, connect under reset 9 | reset_config srst_only srst_nogate 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/steval_pcc010.cfg: -------------------------------------------------------------------------------- 1 | # Use for the STM207VG plug-in board (1 MiB Flash and 112+16 KiB Ram 2 | # comming with the STEVAL-PCC010 board 3 | # http://www.st.com/internet/evalboard/product/251530.jsp 4 | # or any other board with only a STM32F2x in the JTAG chain 5 | 6 | # increase working area to 32KB for faster flash programming 7 | set WORKAREASIZE 0x8000 8 | 9 | source [find target/stm32f2x.cfg] 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm320518_eval.cfg: -------------------------------------------------------------------------------- 1 | # STM320518-EVAL: This is an STM32F0 eval board with a single STM32F051R8T6 2 | # (64KB) chip. 3 | # http://www.st.com/internet/evalboard/product/252994.jsp 4 | # 5 | 6 | # increase working area to 8KB 7 | set WORKAREASIZE 0x2000 8 | 9 | # chip name 10 | set CHIPNAME STM32F051R8T6 11 | 12 | source [find target/stm32f0x.cfg] 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm320518_eval_stlink.cfg: -------------------------------------------------------------------------------- 1 | # STM320518-EVAL: This is an STM32F0 eval board with a single STM32F051R8T6 2 | # (64KB) chip. 3 | # http://www.st.com/internet/evalboard/product/252994.jsp 4 | # 5 | # This is for using the onboard STLINK/V2 6 | 7 | source [find interface/stlink-v2.cfg] 8 | 9 | # increase working area to 8KB 10 | set WORKAREASIZE 0x2000 11 | 12 | # chip name 13 | set CHIPNAME STM32F051R8T6 14 | 15 | source [find target/stm32f0x_stlink.cfg] 16 | 17 | # use hardware reset, connect under reset 18 | reset_config srst_only srst_nogate 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm32100b_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F100VBT6 chip. 2 | # http://www.st.com/internet/evalboard/product/247099.jsp 3 | 4 | # The chip has only 8KB sram 5 | set WORKAREASIZE 0x2000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm3210b_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F10x (128KB) chip. 2 | # http://www.st.com/internet/evalboard/product/176090.jsp 3 | 4 | # increase working area to 32KB for faster flash programming 5 | set WORKAREASIZE 0x8000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm3210c_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F107VCT chip. 2 | # http://www.st.com/internet/evalboard/product/217965.jsp 3 | 4 | # increase working area to 32KB for faster flash programming 5 | set WORKAREASIZE 0x8000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm3220g_eval.cfg: -------------------------------------------------------------------------------- 1 | # STM3220G-EVAL: This is an STM32F2 eval board with a single STM32F207IGH6 2 | # (128KB) chip. 3 | # http://www.st.com/internet/evalboard/product/250374.jsp 4 | 5 | # increase working area to 128KB 6 | set WORKAREASIZE 0x20000 7 | 8 | # chip name 9 | set CHIPNAME STM32F207IGH6 10 | 11 | source [find target/stm32f2x.cfg] 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm3220g_eval_stlink.cfg: -------------------------------------------------------------------------------- 1 | # STM3220G-EVAL: This is an STM32F2 eval board with a single STM32F207IGH6 2 | # (128KB) chip. 3 | # http://www.st.com/internet/evalboard/product/250374.jsp 4 | # 5 | # This is for using the onboard STLINK/V2 6 | 7 | source [find interface/stlink-v2.cfg] 8 | 9 | # increase working area to 128KB 10 | set WORKAREASIZE 0x20000 11 | 12 | # chip name 13 | set CHIPNAME STM32F207IGH6 14 | 15 | source [find target/stm32f2x_stlink.cfg] 16 | 17 | # use hardware reset, connect under reset 18 | reset_config srst_only srst_nogate 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm3241g_eval.cfg: -------------------------------------------------------------------------------- 1 | # STM3241G-EVAL: This is an STM32F4 eval board with a single STM32F417IGH6 2 | # (1024KB) chip. 3 | # http://www.st.com/internet/evalboard/product/252216.jsp 4 | 5 | # increase working area to 128KB 6 | set WORKAREASIZE 0x20000 7 | 8 | # chip name 9 | set CHIPNAME STM32F417IGH6 10 | 11 | source [find target/stm32f4x.cfg] 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm3241g_eval_stlink.cfg: -------------------------------------------------------------------------------- 1 | # STM3241G-EVAL: This is an STM32F4 eval board with a single STM32F417IGH6 2 | # (1024KB) chip. 3 | # http://www.st.com/internet/evalboard/product/252216.jsp 4 | # 5 | # This is for using the onboard STLINK/V2 6 | 7 | source [find interface/stlink-v2.cfg] 8 | 9 | # increase working area to 128KB 10 | set WORKAREASIZE 0x20000 11 | 12 | # chip name 13 | set CHIPNAME STM32F417IGH6 14 | 15 | source [find target/stm32f4x_stlink.cfg] 16 | 17 | # use hardware reset, connect under reset 18 | reset_config srst_only srst_nogate 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm32f0discovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32F0 discovery board with a single STM32F051R8T6 chip. 2 | # http://www.st.com/internet/evalboard/product/253215.jsp 3 | 4 | source [find interface/stlink-v2.cfg] 5 | 6 | set WORKAREASIZE 0x2000 7 | source [find target/stm32f0x_stlink.cfg] 8 | 9 | # use hardware reset, connect under reset 10 | reset_config srst_only srst_nogate 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm32f3discovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32F3 discovery board with a single STM32F303VCT6 chip. 2 | # http://www.st.com/internet/evalboard/product/254044.jsp 3 | 4 | source [find interface/stlink-v2.cfg] 5 | 6 | source [find target/stm32f3x_stlink.cfg] 7 | 8 | # use hardware reset, connect under reset 9 | reset_config srst_only srst_nogate 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm32f429discovery.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # This is an STM32F429 discovery board with a single STM32F429ZI chip. 3 | # http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF259090 4 | # 5 | 6 | source [find interface/stlink-v2.cfg] 7 | 8 | source [find target/stm32f4x_stlink.cfg] 9 | 10 | # use hardware reset, connect under reset supported 11 | reset_config srst_only srst_nogate 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm32f4discovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32F4 discovery board with a single STM32F407VGT6 chip. 2 | # http://www.st.com/internet/evalboard/product/252419.jsp 3 | 4 | source [find interface/stlink-v2.cfg] 5 | 6 | source [find target/stm32f4x_stlink.cfg] 7 | 8 | # use hardware reset, connect under reset 9 | reset_config srst_only srst_nogate 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm32ldiscovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32L discovery board with a single STM32L152RBT6 chip. 2 | # http://www.st.com/internet/evalboard/product/250990.jsp 3 | 4 | source [find interface/stlink-v2.cfg] 5 | 6 | set WORKAREASIZE 0x4000 7 | source [find target/stm32lx_stlink.cfg] 8 | 9 | # use hardware reset, connect under reset 10 | reset_config srst_only srst_nogate 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/stm32vldiscovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32VL discovery board with a single STM32F100RB chip. 2 | # http://www.st.com/internet/evalboard/product/250863.jsp 3 | 4 | source [find interface/stlink-v1.cfg] 5 | 6 | set WORKAREASIZE 0x2000 7 | source [find target/stm32f1x_stlink.cfg] 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ti_am335xevm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI AM335x Evaluation Module 3 | # 4 | # For more information please see http://www.ti.com/tool/tmdxevm3358 5 | # 6 | jtag_rclk 6000 7 | 8 | source [find target/am335x.cfg] 9 | 10 | reset_config trst_and_srst 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ti_am43xx_evm.cfg: -------------------------------------------------------------------------------- 1 | # Works on both AM437x GP EVM and AM438x ePOS EVM 2 | 3 | # The JTAG interface is built directly on the board. 4 | source [find interface/ftdi/xds100v2.cfg] 5 | 6 | adapter_khz 16000 7 | 8 | source [find target/am437x.cfg] 9 | 10 | reset_config trst_and_srst 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ti_beagleboard.cfg: -------------------------------------------------------------------------------- 1 | # OMAP3 BeagleBoard 2 | # http://beagleboard.org 3 | 4 | # Fall back to 6MHz if RTCK is not supported 5 | jtag_rclk 6000 6 | 7 | source [find target/omap3530.cfg] 8 | 9 | # TI-14 JTAG connector 10 | reset_config trst_only 11 | 12 | # Later run: omap3_dbginit 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ti_beagleboard_xm.cfg: -------------------------------------------------------------------------------- 1 | # BeagleBoard xM (DM37x) 2 | # http://beagleboard.org 3 | 4 | set CHIPTYPE "dm37x" 5 | source [find target/amdm37x.cfg] 6 | 7 | # The TI-14 JTAG connector does not have srst. CPU reset is handled in 8 | # hardware. 9 | reset_config trst_only 10 | 11 | # "amdm37x_dbginit dm37x.cpu" needs to be run after init. 12 | 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ti_beaglebone.cfg: -------------------------------------------------------------------------------- 1 | # AM335x Beaglebone 2 | # http://beagleboard.org/bone 3 | 4 | # The JTAG interface is built directly on the board. 5 | source [find interface/ftdi/xds100v2.cfg] 6 | 7 | adapter_khz 16000 8 | 9 | source [find target/am335x.cfg] 10 | 11 | reset_config trst_and_srst 12 | 13 | 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ti_blaze.cfg: -------------------------------------------------------------------------------- 1 | jtag_rclk 6000 2 | 3 | source [find target/omap4430.cfg] 4 | 5 | reset_config trst_and_srst 6 | 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ti_pandaboard.cfg: -------------------------------------------------------------------------------- 1 | jtag_rclk 6000 2 | 3 | source [find target/omap4430.cfg] 4 | 5 | reset_config trst_only 6 | 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ti_pandaboard_es.cfg: -------------------------------------------------------------------------------- 1 | jtag_rclk 6000 2 | 3 | source [find target/omap4460.cfg] 4 | 5 | reset_config trst_only 6 | 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/ti_tmdx570ls31usb.cfg: -------------------------------------------------------------------------------- 1 | adapter_khz 1500 2 | 3 | source [find interface/ftdi/xds100v2.cfg] 4 | source [find target/ti_tms570.cfg] 5 | 6 | reset_config trst_only 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/twr-k60f120m.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale TWRK60F120M development board 3 | # 4 | 5 | source [find target/k60.cfg] 6 | 7 | $_TARGETNAME configure -event reset-init { 8 | puts "-event reset-init occured" 9 | } 10 | 11 | # 12 | # Bank definition for the 'program flash' (instructions and/or data) 13 | # 14 | flash bank pflash.0 kinetis 0x00000000 0x40000 0 4 $_TARGETNAME 15 | flash bank pflash.1 kinetis 0x00040000 0x40000 0 4 $_TARGETNAME 16 | flash bank pflash.2 kinetis 0x00080000 0x40000 0 4 $_TARGETNAME 17 | flash bank pflash.3 kinetis 0x000c0000 0x40000 0 4 $_TARGETNAME 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/twr-k60n512.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale TWRK60N512 development board 3 | # 4 | 5 | source [find target/k60.cfg] 6 | 7 | $_TARGETNAME configure -event reset-init { 8 | puts "-event reset-init occured" 9 | } 10 | 11 | # 12 | # Bank definition for the 'program flash' (instructions and/or data) 13 | # 14 | flash bank pflash.0 kinetis 0x00000000 0x40000 0 4 $_TARGETNAME 15 | flash bank pflash.1 kinetis 0x00040000 0x40000 0 4 $_TARGETNAME 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/verdex.cfg: -------------------------------------------------------------------------------- 1 | # Config for Gumstix Verdex XM4 and XL6P (PXA270) 2 | 3 | set CHIPNAME verdex 4 | source [find target/pxa270.cfg] 5 | 6 | # The board supports separate reset lines 7 | # Override this in the interface config for parallel dongles 8 | reset_config trst_and_srst separate 9 | 10 | # XM4 = 400MHz, XL6P = 600MHz...let's run at 0.1*400MHz=40MHz 11 | adapter_khz 40000 12 | 13 | # flash bank 14 | # XL6P has 32 MB flash 15 | flash bank $_CHIPNAME.flash0 cfi 0x00000000 0x02000000 2 2 $_TARGETNAME 16 | # XM4 has 16 MB flash 17 | #flash bank $_CHIPNAME.flash0 cfi 0x00000000 0x01000000 2 2 $_TARGETNAME 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/voipac.cfg: -------------------------------------------------------------------------------- 1 | # Config for Voipac PXA270/PXA270M module. 2 | 3 | set CHIPNAME voipac 4 | source [find target/pxa270.cfg] 5 | 6 | # The board supports separate reset lines 7 | # Override this in the interface config for parallel dongles 8 | reset_config trst_and_srst separate 9 | 10 | # flash bank 11 | flash bank $_CHIPNAME.flash0 cfi 0x00000000 0x2000000 2 2 $_TARGETNAME 12 | flash bank $_CHIPNAME.flash1 cfi 0x02000000 0x2000000 2 2 $_TARGETNAME 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/voltcraft_dso-3062c.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Voltcraft DSO-3062C digital oscilloscope (uses a Samsung S3C2440) 3 | # 4 | # http://www.eevblog.com/forum/general-chat/hantek-tekway-dso-hack-get-200mhz-bw-for-free/ 5 | # http://www.mikrocontroller.net/topic/249628 6 | # http://elinux.org/Das_Oszi 7 | # http://randomprojects.org/wiki/Voltcraft_DSO-3062C 8 | # 9 | 10 | # Enable this if your JTAG adapter supports multiple transports (JTAG or SWD). 11 | # Otherwise comment it out, as it will cause an OpenOCD error. 12 | ### transport select jtag 13 | 14 | source [find target/samsung_s3c2440.cfg] 15 | 16 | adapter_khz 16000 17 | 18 | # Samsung K9F1208U0C NAND flash chip (64MiB, 3.3V, 8-bit) 19 | nand device $_CHIPNAME.nand s3c2440 $_TARGETNAME 20 | 21 | # arm7_9 fast_memory_access enable 22 | # arm7_9 dcc_downloads enable 23 | 24 | init 25 | reset 26 | halt 27 | scan_chain 28 | targets 29 | nand probe 0 30 | nand list 31 | 32 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/board/x300t.cfg: -------------------------------------------------------------------------------- 1 | # This is for the T-Home X300T / X301T IPTV box, 2 | # which are based on IPTV reference designs from Kiss/Cisco KMM-3*** 3 | # 4 | # It has Sigma Designs SMP8634 chip. 5 | source [find target/smp8634.cfg] 6 | 7 | $_TARGETNAME configure -event reset-init { x300t_init } 8 | 9 | # 1MB CFI capable flash 10 | # flash bank 11 | set _FLASHNAME $_CHIPNAME.flash 12 | flash bank $_FLASHNAME cfi 0xac000000 0x100000 2 2 $_TARGETNAME 13 | 14 | proc x300t_init { } { 15 | # Setup SDRAM config and flash mapping 16 | # initialize ram 17 | mww 0xa003fffc 3 18 | mww 0xa003fffc 2 19 | mww 0xa0030000 0xE34111BA 20 | mww 0xa003fffc 0xa4444 21 | mww 0xa003fffc 0 22 | 23 | # remap boot vector in CPU local RAM 24 | mww 0xa006f000 0x60000 25 | 26 | # map flash to CPU address space REG_BASE_cpu_block+CPU_remap4 27 | mww 0x0006f010 0x48000000 28 | 29 | # map flash addr to REG_BASE_cpu_block + LR_XENV_LOCATION (normally done by XOS) 30 | mww 0x00061ff0 0x48000000 31 | } 32 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/chip/atmel/at91/at91_wdt.cfg: -------------------------------------------------------------------------------- 1 | set AT91_WDT_CR [expr ($AT91_WDT + 0x00)] ;# Watchdog Control Register 2 | set AT91_WDT_WDRSTT [expr (1 << 0)] ;# Restart 3 | set AT91_WDT_KEY [expr (0xa5 << 24)] ;# KEY Password 4 | 5 | set AT91_WDT_MR [expr ($AT91_WDT + 0x04)] ;# Watchdog Mode Register 6 | set AT91_WDT_WDV [expr (0xfff << 0)] ;# Counter Value 7 | set AT91_WDT_WDFIEN [expr (1 << 12)] ;# Fault Interrupt Enable 8 | set AT91_WDT_WDRSTEN [expr (1 << 13)] ;# Reset Processor 9 | set AT91_WDT_WDRPROC [expr (1 << 14)] ;# Timer Restart 10 | set AT91_WDT_WDDIS [expr (1 << 15)] ;# Watchdog Disable 11 | set AT91_WDT_WDD [expr (0xfff << 16)] ;# Delta Value 12 | set AT91_WDT_WDDBGHLT [expr (1 << 28)] ;# Debug Halt 13 | set AT91_WDT_WDIDLEHLT [expr (1 << 29)] ;# Idle Halt 14 | 15 | set AT91_WDT_SR [expr ($AT91_WDT + 0x08)] ;# Watchdog Status Register 16 | set AT91_WDT_WDUNF [expr (1 << 0)] ;# Watchdog Underflow 17 | set AT91_WDT_WDERR [expr (1 << 1)] ;# Watchdog Error 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/chip/atmel/at91/hardware.cfg: -------------------------------------------------------------------------------- 1 | # External Memory Map 2 | set AT91_CHIPSELECT_0 0x10000000 3 | set AT91_CHIPSELECT_1 0x20000000 4 | set AT91_CHIPSELECT_2 0x30000000 5 | set AT91_CHIPSELECT_3 0x40000000 6 | set AT91_CHIPSELECT_4 0x50000000 7 | set AT91_CHIPSELECT_5 0x60000000 8 | set AT91_CHIPSELECT_6 0x70000000 9 | set AT91_CHIPSELECT_7 0x80000000 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/chip/atmel/at91/pmc.tcl: -------------------------------------------------------------------------------- 1 | 2 | if [info exists AT91C_MAINOSC_FREQ] { 3 | # user set this... let it be. 4 | } { 5 | # 18.432mhz is a common thing... 6 | set AT91C_MAINOSC_FREQ 18432000 7 | } 8 | global AT91C_MAINOSC_FREQ 9 | 10 | if [info exists AT91C_SLOWOSC_FREQ] { 11 | # user set this... let it be. 12 | } { 13 | # 32khz is the norm 14 | set AT91C_SLOWOSC_FREQ 32768 15 | } 16 | global AT91C_SLOWOSC_FREQ 17 | 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/chip/st/stm32/stm32.tcl: -------------------------------------------------------------------------------- 1 | source [find bitsbytes.tcl] 2 | source [find cpu/arm/cortex_m3.tcl] 3 | source [find memory.tcl] 4 | source [find mmr_helpers.tcl] 5 | 6 | source [find chip/st/stm32/stm32_regs.tcl] 7 | source [find chip/st/stm32/stm32_rcc.tcl] 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/chip/ti/lm3s/lm3s.tcl: -------------------------------------------------------------------------------- 1 | source [find chip/ti/lm3s/lm3s_regs.tcl] 2 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/cpld/lattice-lc4032ze.cfg: -------------------------------------------------------------------------------- 1 | # Lattice ispMACH 4000ZE family, device LC4032ZE 2 | # just configure a tap 3 | jtag newtap LC4032ZE tap -irlen 8 -expected-id 0x01806043 4 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/cpld/xilinx-xcr3256.cfg: -------------------------------------------------------------------------------- 1 | #xilinx coolrunner xcr3256 2 | #simple device - just configure a tap 3 | jtag newtap xcr tap -irlen 5 -ircapture 0x01 -irmask 0x1f -expected-id 0x0494c093 4 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/cpu/arm/arm7tdmi.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm7tdmi 3 | set CPU_ARCH armv4t 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/cpu/arm/arm920.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm920 3 | set CPU_ARCH armv4t 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/cpu/arm/arm946.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm946 3 | set CPU_ARCH armv5te 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/cpu/arm/arm966.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm966 3 | set CPU_ARCH armv5te 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/cpu/arm/cortex_m3.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME cortex_m3 3 | set CPU_ARCH armv7 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/altera-usb-blaster.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Altera USB-Blaster 3 | # 4 | # http://www.altera.com/literature/ug/ug_usb_blstr.pdf 5 | # 6 | 7 | interface usb_blaster 8 | # These are already the defaults. 9 | # usb_blaster_vid_pid 0x09FB 0x6001 10 | # usb_blaster_device_desc "USB-Blaster" 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/altera-usb-blaster2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Altera USB-Blaster II 3 | # 4 | 5 | interface usb_blaster 6 | usb_blaster_vid_pid 0x09fb 0x6010 0x09fb 0x6810 7 | usb_blaster_lowlevel_driver ublast2 8 | usb_blaster_firmware /path/to/quartus/blaster_6810.hex 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/arm-jtag-ew.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-JTAG-EW 3 | # 4 | # http://www.olimex.com/dev/arm-jtag-ew.html 5 | # 6 | 7 | interface arm-jtag-ew 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/at91rm9200.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Various Atmel AT91RM9200 boards 3 | # 4 | # TODO: URL? 5 | # 6 | 7 | interface at91rm9200 8 | at91rm9200_device rea_ecr 9 | 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/axm0432.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Axiom axm0432 3 | # 4 | # http://www.axman.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Symphony SoundBite" 9 | ft2232_layout "axm0432_jtag" 10 | ft2232_vid_pid 0x0403 0x6010 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/busblaster.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Dangerous Prototypes - Bus Blaster 3 | # 4 | # The Bus Blaster has a configurable buffer between the FTDI FT2232H and the 5 | # JTAG header which allows it to emulate various debugger types. It comes 6 | # configured as a JTAGkey device. 7 | # 8 | # http://dangerousprototypes.com/docs/Bus_Blaster 9 | # 10 | 11 | interface ft2232 12 | ft2232_device_desc "Dual RS232-HS" 13 | ft2232_layout jtagkey 14 | ft2232_vid_pid 0x0403 0x6010 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/buspirate.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Buspirate with OpenOCD support 3 | # 4 | # http://dangerousprototypes.com/bus-pirate-manual/ 5 | # 6 | 7 | interface buspirate 8 | 9 | # you need to specify port on which BP lives 10 | #buspirate_port /dev/ttyUSB0 11 | 12 | # communication speed setting 13 | buspirate_speed normal ;# or fast 14 | 15 | # voltage regulator Enabled = 1 Disabled = 0 16 | #buspirate_vreg 0 17 | 18 | # pin mode normal or open-drain 19 | #buspirate_mode normal 20 | 21 | # pullup state Enabled = 1 Disabled = 0 22 | #buspirate_pullup 0 23 | 24 | # this depends on the cable, you are safe with this option 25 | reset_config srst_only 26 | 27 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/calao-usb-a9260-c01.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C01 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout jtagkey 9 | ft2232_device_desc "USB-A9260" 10 | ft2232_vid_pid 0x0403 0x6010 11 | script interface/calao-usb-a9260.cfg 12 | script target/at91sam9260minimal.cfg 13 | 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/calao-usb-a9260-c02.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C02 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout jtagkey 9 | ft2232_device_desc "USB-A9260" 10 | ft2232_vid_pid 0x0403 0x6001 11 | script interface/calao-usb-a9260.cfg 12 | script target/at91sam9260minimal.cfg 13 | 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/calao-usb-a9260.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260 common -C01 -C02 setup 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | # See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg. 7 | # 8 | 9 | adapter_nsrst_delay 200 10 | jtag_ntrst_delay 200 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/chameleon.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec Chameleon POD 3 | # 4 | # http://www.amontec.com/chameleon.shtml 5 | # 6 | 7 | interface parport 8 | parport_cable chameleon 9 | 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/cmsis-dap.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # ARM CMSIS-DAP compliant adapter 3 | # 4 | # http://www.keil.com/support/man/docs/dapdebug/ 5 | # 6 | 7 | interface cmsis-dap 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/cortino.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex Cortino 3 | # 4 | # http://www.hitex.com/index.php?id=cortino 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Cortino" 9 | ft2232_layout cortino 10 | ft2232_vid_pid 0x0640 0x0032 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/digilent-hs1.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Digilent HS1 3 | # 4 | # The Digilent HS1 is a high-speed FT2232H-based adapter, compliant with the 5 | # Xilinx JTAG 14-pin pinout. 6 | # It does not support ARM reset signals (SRST and TRST) but can still be used for 7 | # hardware debugging, with some limitations. 8 | # 9 | # http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,395,922&Prod=JTAG-HS1 10 | # 11 | 12 | interface ft2232 13 | ft2232_device_desc "Digilent Adept USB Device" 14 | ft2232_layout digilent-hs1 15 | ft2232_vid_pid 0x0403 0x6010 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/dlp-usb1232h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # DLP Design DLP-USB1232H USB-to-UART/FIFO interface module 3 | # 4 | # http://www.dlpdesign.com/usb/usb1232h.shtml 5 | # 6 | # Schematics for OpenOCD usage: 7 | # http://randomprojects.org/wiki/DLP-USB1232H_and_OpenOCD_based_JTAG_adapter 8 | # 9 | 10 | interface ft2232 11 | ft2232_device_desc "Dual RS232-HS" 12 | ft2232_layout usbjtag 13 | ft2232_vid_pid 0x0403 0x6010 14 | 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/dummy.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Dummy interface (for testing purposes) 3 | # 4 | 5 | interface dummy 6 | 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/estick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # eStick 3 | # 4 | # http://code.google.com/p/estick-jtag/ 5 | # 6 | 7 | interface opendous 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/flashlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # ST FlashLINK JTAG parallel cable 3 | # 4 | # http://www.st.com/internet/evalboard/product/94023.jsp 5 | # http://www.st.com/stonline/products/literature/um/7889.pdf 6 | # 7 | 8 | if { [info exists PARPORTADDR] } { 9 | set _PARPORTADDR $PARPORTADDR 10 | } else { 11 | set _PARPORTADDR 0 12 | } 13 | 14 | interface parport 15 | parport_port $_PARPORTADDR 16 | parport_cable flashlink 17 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/flossjtag-noeeprom.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FlossJTAG 3 | # 4 | # http://github.com/esden/floss-jtag 5 | # 6 | # This is the pre v0.3 Floss-JTAG compatible config file. It can also be used 7 | # for newer versions of Floss-JTAG with empty or not populated EEPROM. If you 8 | # have several Floss-JTAG connected you have to use the USB ID to select a 9 | # specific one. 10 | # 11 | # If you have a Floss-JTAG WITH EEPROM that is programmed, use the 12 | # flossjtag.cfg file. 13 | # 14 | 15 | interface ft2232 16 | ft2232_vid_pid 0x0403 0x6010 17 | ft2232_device_desc "Dual RS232-HS" 18 | ft2232_layout "usbjtag" 19 | ft2232_latency 2 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/flossjtag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FlossJTAG 3 | # 4 | # http://github.com/esden/floss-jtag 5 | # 6 | # This is the v0.3 and v1.0 Floss-JTAG compatible config file. It relies on the 7 | # existence of an EEPROM on Floss-JTAG containing a name. If you have several 8 | # Floss-JTAG adapters connected you can use the serial number to select a 9 | # specific device. 10 | # 11 | # If your Floss-JTAG does not have an EEPROM, or the EEPROM is empty, use the 12 | # flossjtag-noeeprom.cfg file. 13 | # 14 | 15 | interface ft2232 16 | ft2232_vid_pid 0x0403 0x6010 17 | ft2232_device_desc "FLOSS-JTAG" 18 | #ft2232_serial "FJ000001" 19 | ft2232_layout "flossjtag" 20 | ft2232_latency 2 21 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/flyswatter.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TinCanTools Flyswatter 3 | # 4 | # http://www.tincantools.com/product.php?productid=16134 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Flyswatter" 9 | ft2232_layout "flyswatter" 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/flyswatter2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TinCanTools Flyswatter 2 3 | # 4 | # http://www.tincantools.com/product.php?productid=16153 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Flyswatter2" 9 | ft2232_layout "flyswatter2" 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/axm0432.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Axiom axm0432 3 | # 4 | # http://www.axman.com 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Symphony SoundBite" 14 | ftdi_vid_pid 0x0403 0x6010 15 | 16 | ftdi_layout_init 0x0c08 0x0c2b 17 | ftdi_layout_signal nTRST -data 0x0800 18 | ftdi_layout_signal nSRST -data 0x0400 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/calao-usb-a9260-c01.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C01 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "USB-A9260" 15 | ftdi_vid_pid 0x0403 0x6010 16 | 17 | ftdi_layout_init 0x0c08 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 19 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 20 | 21 | script interface/calao-usb-a9260.cfg 22 | script target/at91sam9260minimal.cfg 23 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/calao-usb-a9260-c02.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C02 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "USB-A9260" 15 | ftdi_vid_pid 0x0403 0x6001 16 | 17 | ftdi_layout_init 0x0c08 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 19 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 20 | 21 | script interface/calao-usb-a9260.cfg 22 | script target/at91sam9260minimal.cfg 23 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/cortino.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex Cortino 3 | # 4 | # http://www.hitex.com/index.php?id=cortino 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Cortino" 9 | ftdi_vid_pid 0x0640 0x0032 10 | 11 | ftdi_layout_init 0x0108 0x010b 12 | ftdi_layout_signal nTRST -data 0x0100 13 | ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/digilent_jtag_smt2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Digilent JTAG-SMT2 3 | # 4 | # http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,395,1053&Prod=JTAG-SMT2 5 | # 6 | # Config is based on data from 7 | # http://electronix.ru/forum/index.php?showtopic=114633&view=findpost&p=1215497 and ZedBoard schematics 8 | # 9 | 10 | interface ftdi 11 | ftdi_vid_pid 0x0403 0x6014 12 | 13 | ftdi_layout_init 0x2088 0x3f8b 14 | ftdi_layout_signal nSRST -data 0x2000 15 | ftdi_layout_signal GPIO2 -data 0x2000 16 | ftdi_layout_signal GPIO1 -data 0x0200 17 | ftdi_layout_signal GPIO0 -data 0x0100 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/dlp-usb1232h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # DLP Design DLP-USB1232H USB-to-UART/FIFO interface module 3 | # 4 | # http://www.dlpdesign.com/usb/usb1232h.shtml 5 | # 6 | # Schematics for OpenOCD usage: 7 | # http://randomprojects.org/wiki/DLP-USB1232H_and_OpenOCD_based_JTAG_adapter 8 | # 9 | 10 | echo "WARNING!" 11 | echo "This file was not tested with real interface, it is based on schematics and code" 12 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 13 | echo "mailing list, so it could be marked as working or fixed." 14 | 15 | interface ftdi 16 | ftdi_device_desc "Dual RS232-HS" 17 | ftdi_vid_pid 0x0403 0x6010 18 | 19 | ftdi_layout_init 0x0008 0x000b 20 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 21 | ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/dp_busblaster.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Dangerous Prototypes - Bus Blaster 3 | # 4 | # The Bus Blaster has a configurable buffer between the FTDI FT2232H and the 5 | # JTAG header which allows it to emulate various debugger types. It comes 6 | # configured as a JTAGkey device. 7 | # 8 | # http://dangerousprototypes.com/docs/Bus_Blaster 9 | # 10 | 11 | interface ftdi 12 | ftdi_device_desc "Dual RS232-HS" 13 | ftdi_vid_pid 0x0403 0x6010 14 | 15 | ftdi_layout_init 0x0c08 0x0f1b 16 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 17 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/flossjtag-noeeprom.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FlossJTAG 3 | # 4 | # http://github.com/esden/floss-jtag 5 | # 6 | # This is the pre v0.3 Floss-JTAG compatible config file. It can also be used 7 | # for newer versions of Floss-JTAG with empty or not populated EEPROM. If you 8 | # have several Floss-JTAG connected you have to use the USB ID to select a 9 | # specific one. 10 | # 11 | # If you have a Floss-JTAG WITH EEPROM that is programmed, use the 12 | # flossjtag.cfg file. 13 | # 14 | 15 | echo "WARNING!" 16 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 17 | echo "Please report your experience with this file to openocd-devel mailing list," 18 | echo "so it could be marked as working or fixed." 19 | 20 | interface ftdi 21 | ftdi_device_desc "Dual RS232-HS" 22 | ftdi_vid_pid 0x0403 0x6010 23 | 24 | ftdi_layout_init 0x0008 0x000b 25 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 26 | ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 27 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/flyswatter.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TinCanTools Flyswatter 3 | # 4 | # http://www.tincantools.com/product.php?productid=16134 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Flyswatter" 14 | ftdi_vid_pid 0x0403 0x6010 15 | 16 | ftdi_layout_init 0x0818 0x0cfb 17 | ftdi_layout_signal nTRST -data 0x0010 18 | ftdi_layout_signal nSRST -oe 0x0020 19 | ftdi_layout_signal LED -data 0x0c00 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/flyswatter2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TinCanTools Flyswatter2 3 | # 4 | # http://www.tincantools.com/product.php?productid=16153 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Flyswatter2" 9 | ftdi_vid_pid 0x0403 0x6010 10 | 11 | ftdi_layout_init 0x0538 0x057b 12 | ftdi_layout_signal LED -ndata 0x0400 13 | ftdi_layout_signal nTRST -data 0x0010 14 | ftdi_layout_signal nSRST -data 0x0020 -noe 0x0100 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/gw16042.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Gateworks GW16042 JTAG Dongle 3 | # 4 | # http://www.gateworks.com/ 5 | # 6 | # Layout: FTDI FT2232H 7 | # ADBUS0 TCK 8 | # ADBUS1 TDI 9 | # ADBUS2 TDO (input) 10 | # ADBUS3 TMS 11 | # ADBUS4 nTRST 12 | # ADBUS5 nSRST 13 | # ADBUS6 OE (active high) for TRST, TDI, TMS, TCK 14 | # ADBUS7 NC 15 | # ACBUS0-7 NC 16 | # BDBUS0 RXD 17 | # BDBUS1 TXD (input) 18 | # 19 | 20 | interface ftdi 21 | ftdi_device_desc "USB-JTAG" 22 | ftdi_vid_pid 0x0403 0x6010 23 | 24 | ftdi_layout_init 0x0058 0x007b 25 | ftdi_layout_signal nTRST -data 0x0010 26 | ftdi_layout_signal nSRST -oe 0x0020 27 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/hilscher_nxhx10_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 10-ETM 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_4ce145a5983e6 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX 10-ETM" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/hilscher_nxhx500_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 500-ETM 3 | # 4 | # http://de.hilscher.com/files_design/8/NXHX500-ETM_description_Rev01_EN.pdf 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX 500-ETM" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/hilscher_nxhx500_re.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 500-RE 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_461ff2053bad1&bs=20 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX 500-RE" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/hilscher_nxhx50_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 50-ETM 3 | # 4 | # http://de.hilscher.com/files_design/8/NXHX50-ETM_description_Rev01_EN.pdf 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX 50-ETM" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/hilscher_nxhx50_re.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 50-RE 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_483c0f582ad36&bs=20 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX50-RE" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/hitex_lpc1768stick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex LPC1768-Stick 3 | # 4 | # http://www.hitex.com/?id=1602 5 | # 6 | 7 | 8 | interface ftdi 9 | ftdi_device_desc "LPC1768-Stick" 10 | ftdi_vid_pid 0x0640 0x0026 11 | 12 | ftdi_layout_init 0x0388 0x038b 13 | ftdi_layout_signal nTRST -data 0x0100 14 | ftdi_layout_signal nSRST -data 0x0080 -noe 0x200 15 | 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/hitex_str9-comstick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STR9-comStick 3 | # 4 | # http://www.hitex.com/index.php?id=383 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "STR9-comStick" 9 | ftdi_vid_pid 0x0640 0x002c 10 | 11 | ftdi_layout_init 0x0108 0x010b 12 | ftdi_layout_signal nTRST -data 0x0100 13 | ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/icebear.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Section5 ICEBear 3 | # 4 | # http://section5.ch/icebear 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "ICEbear JTAG adapter" 14 | ftdi_vid_pid 0x0403 0xc140 15 | 16 | ftdi_layout_init 0x0028 0x002b 17 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 18 | ftdi_layout_signal nSRST -data 0x0020 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/jtag-lock-pick_tiny_2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # DISTORTEC JTAG-lock-pick Tiny 2 3 | # 4 | # http://www.distortec.com 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "JTAG-lock-pick Tiny 2" 9 | ftdi_vid_pid 0x0403 0x8220 10 | 11 | ftdi_layout_init 0x8c28 0xff3b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | ftdi_layout_signal LED -ndata 0x8000 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/jtagkey.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey 3 | # 4 | # http://www.amontec.com/jtagkey.shtml 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Amontec JTAGkey" 9 | ftdi_vid_pid 0x0403 0xcff8 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/jtagkey2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2 3 | # 4 | # http://www.amontec.com/jtagkey2.shtml 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Amontec JTAGkey-2" 9 | ftdi_vid_pid 0x0403 0xcff8 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/jtagkey2p.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2P 3 | # 4 | # http://www.amontec.com/jtagkey2p.shtml 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Amontec JTAGkey-2P" 9 | ftdi_vid_pid 0x0403 0xcff8 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/kt-link.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Kristech KT-Link 3 | # 4 | # http://www.kristech.eu 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "KT-LINK" 9 | ftdi_vid_pid 0x0403 0xbbe2 10 | 11 | ftdi_layout_init 0x8c28 0xff3b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | ftdi_layout_signal LED -data 0x8000 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/lisa-l.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Lisa/L 3 | # 4 | # http://paparazzi.enac.fr/wiki/Lisa 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Lisa/L" 14 | ftdi_vid_pid 0x0403 0x6010 15 | ftdi_channel 1 16 | 17 | ftdi_layout_init 0x0008 0x180b 18 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 19 | ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 20 | ftdi_layout_signal LED -data 0x1800 21 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/luminary-icdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S9B9x Evaluation Kits 3 | # In-Circuit Debug Interface (ICDI) Board 4 | # 5 | # Essentially all Luminary debug hardware is the same, (with both 6 | # JTAG and SWD support compatible with ICDI boards. This ICDI adapter 7 | # configuration is JTAG-only, but the same hardware handles SWD too. 8 | # 9 | # This is a discrete ftdi based debug board which supports ARM's 10 | # JTAG/SWD connectors in both backwards-compatible 20-pin format and 11 | # in the new-style compact 10-pin. There's also an 8-pin connector 12 | # with serial port support. It's included with LM3S9B9x eval boards. 13 | # 14 | # http://www.luminarymicro.com/products/ek-lm3s9b90.html 15 | # http://www.luminarymicro.com/products/ek-lm3s9b92.html 16 | # 17 | 18 | interface ftdi 19 | ftdi_device_desc "Luminary Micro ICDI Board" 20 | ftdi_vid_pid 0x0403 0xbcda 21 | 22 | ftdi_layout_init 0x00a8 0x00eb 23 | ftdi_layout_signal nSRST -noe 0x0020 24 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/luminary-lm3s811.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S811 Evaluation Kit 3 | # 4 | # http://www.luminarymicro.com/products/stellaris_811_evaluation_kits.html 5 | # 6 | # NOTE: this is only for boards *before* Rev C, which adds support 7 | # for SWO tracing with ADBUS_6 DBG_ENn and BDBUS_4 SWO_EN signals. 8 | # The "evb_lm3s811" layout doesn't set up those signals. 9 | # 10 | # Rev C boards work more like the other Stellaris eval boards. They 11 | # need to use the "luminary_icdi" layout to work correctly. 12 | # 13 | 14 | interface ftdi 15 | ftdi_device_desc "LM3S811 Evaluation Board" 16 | ftdi_vid_pid 0x0403 0xbcd9 17 | 18 | ftdi_layout_init 0x0088 0x008b 19 | ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/m53evk.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # DENX M53EVK 3 | # 4 | # http://www.denx-cs.de/?q=M53EVK 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Dual RS232-HS" 9 | ftdi_vid_pid 0x0403 0x6010 10 | 11 | ftdi_channel 0 12 | ftdi_layout_init 0x0008 0x000b 13 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 14 | ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/minimodule.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FTDI MiniModule 3 | # 4 | # http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_FT2232H_Mini_Module.pdf 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "FT2232H MiniModule" 14 | ftdi_vid_pid 0x0403 0x6010 15 | 16 | ftdi_layout_init 0x0018 0x05fb 17 | ftdi_layout_signal nSRST -data 0x0020 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/neodb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Openmoko USB JTAG/RS232 adapter 3 | # 4 | # http://wiki.openmoko.org/wiki/Debug_Board_v3 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Debug Board for Neo1973" 9 | ftdi_vid_pid 0x1457 0x5118 10 | 11 | ftdi_layout_init 0x0508 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 13 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 14 | ftdi_layout_signal nNOR_WP -data 0x0010 -oe 0x0010 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/ngxtech.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # NGX ARM USB JTAG 3 | # 4 | # http://shop.ngxtechnologies.com/product_info.php?cPath=26&products_id=30 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "NGX JTAG" 15 | ftdi_vid_pid 0x0403 0x6010 16 | 17 | ftdi_layout_init 0x0508 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 19 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/olimex-arm-usb-ocd-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd-h.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-OCD-H" 9 | ftdi_vid_pid 0x15ba 0x002b 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nSRST -oe 0x0200 13 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 14 | ftdi_layout_signal LED -data 0x0800 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/olimex-arm-usb-ocd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Olimex OpenOCD JTAG" 9 | ftdi_vid_pid 0x15ba 0x0003 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nSRST -oe 0x0200 13 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 14 | ftdi_layout_signal LED -data 0x0800 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/olimex-arm-usb-tiny-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny-h.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" 9 | ftdi_vid_pid 0x15ba 0x002a 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nSRST -oe 0x0200 13 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 14 | ftdi_layout_signal LED -data 0x0800 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/olimex-jtag-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Olimex OpenOCD JTAG TINY" 9 | ftdi_vid_pid 0x15ba 0x0004 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nSRST -oe 0x0200 13 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 14 | ftdi_layout_signal LED -data 0x0800 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/oocdlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Joern Kaipf's OOCDLink 3 | # 4 | # http://www.joernonline.de/contrexx2/cms/index.php?page=126 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "OOCDLink" 15 | ftdi_vid_pid 0x0403 0xbaf8 16 | 17 | ftdi_layout_init 0x0508 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 19 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/opendous_ftdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Opendous 3 | # 4 | # http://code.google.com/p/opendous/wiki/JTAG 5 | # 6 | # According to the website, it is similar to jtagkey, but it uses channel B 7 | # (and it has a different pid number). 8 | # 9 | 10 | interface ftdi 11 | ftdi_device_desc "Dual RS232-HS" 12 | ftdi_vid_pid 0x0403 0x6010 13 | ftdi_channel 1 14 | 15 | ftdi_layout_init 0x0c08 0x0f1b 16 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 17 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/openocd-usb-hs.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # embedded projects openocd usb adapter v3 3 | # 4 | # http://shop.embedded-projects.net/index.php?module=artikel&action=artikel&id=14 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Dual RS232-HS" 9 | ftdi_vid_pid 0x0403 0x6010 10 | 11 | ftdi_layout_init 0x0508 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 13 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/openocd-usb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hubert Hoegl's USB to JTAG 3 | # 4 | # http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Dual RS232" 9 | ftdi_vid_pid 0x0403 0x6010 10 | 11 | ftdi_layout_init 0x0508 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 13 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/openrd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvell OpenRD 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/openrd.jsp 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "OpenRD JTAGKey FT2232D" 14 | ftdi_vid_pid 0x0403 0x9e90 15 | ftdi_channel 1 16 | 17 | ftdi_layout_init 0x0608 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 19 | ftdi_layout_signal nSRST -noe 0x0400 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/redbee-econotag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Redwire Redbee-Econotag 3 | # 4 | # http://www.redwirellc.com/store/node/1 5 | # 6 | # The Redbee-Econotag has an onboard FT2232H with: 7 | # - FT2232H channel A wired to mc13224v JTAG 8 | # - FT2232H channel B wired to mc13224v UART1 9 | # 10 | 11 | echo "WARNING!" 12 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 13 | echo "Please report your experience with this file to openocd-devel mailing list," 14 | echo "so it could be marked as working or fixed." 15 | 16 | interface ftdi 17 | ftdi_vid_pid 0x0403 0x6010 18 | 19 | ftdi_layout_init 0x0c08 0x0c2b 20 | ftdi_layout_signal nTRST -data 0x0800 21 | ftdi_layout_signal nSRST -data 0x0400 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/redbee-usb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Redwire Redbee-USB 3 | # 4 | # http://www.redwirellc.com 5 | # 6 | # The Redbee-USB has an onboard FT2232H with: 7 | # - FT2232H channel B wired to mc13224v JTAG 8 | # - FT2232H channel A wired to mc13224v UART1 9 | # 10 | 11 | echo "WARNING!" 12 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 13 | echo "Please report your experience with this file to openocd-devel mailing list," 14 | echo "so it could be marked as working or fixed." 15 | 16 | interface ftdi 17 | ftdi_vid_pid 0x0403 0x6010 18 | ftdi_channel 1 19 | 20 | ftdi_layout_init 0x0c08 0x0c2b 21 | ftdi_layout_signal nTRST -data 0x0800 22 | ftdi_layout_signal nSRST -data 0x0400 23 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/sheevaplug.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvel SheevaPlug Development Kit 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/sheevaplug.jsp 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "SheevaPlug JTAGKey FT2232D" 14 | ftdi_vid_pid 0x9e88 0x9e8f 15 | ftdi_channel 1 16 | 17 | ftdi_layout_init 0x0608 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 19 | ftdi_layout_signal nSRST -noe 0x0400 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/signalyzer-lite.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer LITE (DT-USB-SLITE) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Signalyzer LITE" 14 | ftdi_vid_pid 0x0403 0xbca1 15 | 16 | ftdi_layout_init 0x0008 0x000b 17 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 18 | ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/signalyzer.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer Tool (DT-USB-ST) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Signalyzer" 14 | ftdi_vid_pid 0x0403 0xbca0 15 | 16 | ftdi_layout_init 0x0008 0x000b 17 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 18 | ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/stm32-stick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STM32-PerformanceStick 3 | # 4 | # http://www.hitex.com/index.php?id=340 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "STM32-PerformanceStick" 9 | ftdi_vid_pid 0x0640 0x002d 10 | 11 | ftdi_layout_init 0x0388 0x038b 12 | ftdi_layout_signal nTRST -data 0x0100 13 | ftdi_layout_signal nSRST -data 0x0080 -noe 0x200 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/tumpa-lite.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TIAO USB Multi-Protocol Adapter (TUMPA) Lite 3 | # 4 | # http://www.diygadget.com/tiao-usb-multi-protocol-adapter-lite-jtag-spi-i2c-serial.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_vid_pid 0x0403 0x8a99 9 | 10 | ftdi_layout_init 0x0038 0x087b 11 | ftdi_layout_signal nTRST -data 0x0020 -oe 0x0020 12 | ftdi_layout_signal nSRST -data 0x0010 -oe 0x0010 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/tumpa.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TIAO USB Multi-Protocol Adapter (TUMPA) 3 | # 4 | # http://www.diygadget.com/tiao-usb-multi-protocol-adapter-jtag-spi-i2c-serial.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_vid_pid 0x0403 0x8a98 0x0403 0x6010 9 | 10 | ftdi_layout_init 0x0038 0x087b 11 | ftdi_layout_signal nTRST -data 0x0020 12 | ftdi_layout_signal nSRST -data 0x0010 13 | 14 | reset_config srst_push_pull 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/turtelizer2-revB.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # egnite Turtelizer 2 rev B (with SRST only) 3 | # 4 | # http://www.ethernut.de/en/hardware/turtelizer/index.html 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Turtelizer JTAG/RS232 Adapter" 14 | ftdi_vid_pid 0x0403 0xbdc8 15 | 16 | ftdi_layout_init 0x0008 0x0c5b 17 | ftdi_layout_signal nSRST -oe 0x0040 18 | ftdi_layout_signal LED -data 0x0c00 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/turtelizer2-revC.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # egnite Turtelizer 2 revC (with TRST and SRST) 3 | # 4 | # http://www.ethernut.de/en/hardware/turtelizer/index.html 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Turtelizer JTAG/RS232 Adapter" 14 | ftdi_vid_pid 0x0403 0xbdc8 15 | 16 | ftdi_layout_init 0x0008 0x0c7b 17 | ftdi_layout_signal nTRST -oe 0x0020 18 | ftdi_layout_signal nSRST -oe 0x0040 19 | ftdi_layout_signal LED -ndata 0x0c00 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/vpaclink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Voipac VPACLink 3 | # 4 | # http://voipac.com/27M-JTG-000 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "VPACLink" 15 | ftdi_vid_pid 0x0403 0x6010 16 | 17 | ftdi_layout_init 0x0508 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 19 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ftdi/xds100v2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Texas Instruments XDS100v2 3 | # 4 | # http://processors.wiki.ti.com/index.php/XDS100#XDS100v2_Features 5 | # 6 | 7 | interface ftdi 8 | ftdi_vid_pid 0x0403 0xa6d0 0x0403 0x6010 9 | 10 | ftdi_layout_init 0x0038 0x597b 11 | ftdi_layout_signal nTRST -data 0x0010 12 | ftdi_layout_signal nSRST -oe 0x0100 13 | ftdi_layout_signal nEMU_EN -data 0x0020 14 | ftdi_layout_signal nEMU0 -data 0x0040 15 | ftdi_layout_signal nEMU1 -data 0x1000 16 | ftdi_layout_signal PWR_RST -data 0x0800 17 | ftdi_layout_signal LOOPBACK -data 0x4000 18 | 19 | echo "\nInfo : to use this adapter you MUST add ``init; ftdi_set_signal PWR_RST 1; jtag arp_init'' to the end of your config file!\n" 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/hilscher_nxhx10_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 10-ETM 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_4ce145a5983e6 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX 10-ETM" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/hilscher_nxhx500_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 500-ETM 3 | # 4 | # http://de.hilscher.com/files_design/8/NXHX500-ETM_description_Rev01_EN.pdf 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX 500-ETM" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/hilscher_nxhx500_re.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 500-RE 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_461ff2053bad1&bs=20 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX 500-RE" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/hilscher_nxhx50_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 50-ETM 3 | # 4 | # http://de.hilscher.com/files_design/8/NXHX50-ETM_description_Rev01_EN.pdf 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX 50-ETM" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/hilscher_nxhx50_re.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 50-RE 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_483c0f582ad36&bs=20 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX50-RE" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/hitex_str9-comstick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STR9-comStick 3 | # 4 | # http://www.hitex.com/index.php?id=383 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "STR9-comStick" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x002c 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/icebear.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Section5 ICEBear 3 | # 4 | # http://section5.ch/icebear 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "ICEbear JTAG adapter" 9 | ft2232_layout icebear 10 | ft2232_vid_pid 0x0403 0xc140 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/jlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Segger J-Link 3 | # 4 | # http://www.segger.com/jlink.html 5 | # 6 | 7 | interface jlink 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/jtag-lock-pick_tiny_2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # DISTORTEC JTAG-lock-pick Tiny 2 3 | # 4 | # http://www.distortec.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "JTAG-lock-pick Tiny 2" 9 | ft2232_layout ktlink 10 | ft2232_vid_pid 0x0403 0x8220 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/jtag_vpi.cfg: -------------------------------------------------------------------------------- 1 | interface jtag_vpi 2 | 3 | # Set the VPI JTAG server port 4 | if { [info exists VPI_PORT] } { 5 | set _VPI_PORT $VPI_PORT 6 | } else { 7 | set _VPI_PORT 5555 8 | } 9 | 10 | # Set the VPI JTAG server address 11 | if { [info exists VPI_ADDRESS] } { 12 | set _VPI_ADDRESS $VPI_ADDRESS 13 | } else { 14 | set _VPI_ADDRESS "127.0.0.1" 15 | } 16 | 17 | jtag_vpi_set_port $_VPI_PORT 18 | jtag_vpi_set_address $_VPI_ADDRESS 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/jtagkey-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey-tiny 3 | # 4 | # http://www.amontec.com/jtagkey-tiny.shtml 5 | # 6 | 7 | # The JTAGkey-tiny uses exactly the same config as the JTAGkey. 8 | source [find interface/jtagkey.cfg] 9 | 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/jtagkey.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey 3 | # 4 | # http://www.amontec.com/jtagkey.shtml 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Amontec JTAGkey" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x0403 0xcff8 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/jtagkey2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2 3 | # 4 | # http://www.amontec.com/jtagkey2.shtml 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Amontec JTAGkey-2" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x0403 0xCFF8 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/jtagkey2p.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2P 3 | # 4 | # http://www.amontec.com/jtagkey2p.shtml 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Amontec JTAGkey-2P" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x0403 0xCFF8 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/kt-link.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Kristech KT-Link 3 | # 4 | # http://www.kristech.eu 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "KT-LINK" 9 | ft2232_layout ktlink 10 | ft2232_vid_pid 0x0403 0xBBE2 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/lisa-l.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Lisa/L 3 | # 4 | # http://paparazzi.enac.fr/wiki/Lisa 5 | # 6 | 7 | interface ft2232 8 | ft2232_vid_pid 0x0403 0x6010 9 | ft2232_device_desc "Lisa/L" 10 | ft2232_layout "lisa-l" 11 | ft2232_latency 2 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/luminary-icdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S9B9x Evaluation Kits 3 | # In-Circuit Debug Interface (ICDI) Board 4 | # 5 | # Essentially all Luminary debug hardware is the same, (with both 6 | # JTAG and SWD support compatible with ICDI boards. This ICDI adapter 7 | # configuration is JTAG-only, but the same hardware handles SWD too. 8 | # 9 | # This is a discrete FT2232 based debug board which supports ARM's 10 | # JTAG/SWD connectors in both backwards-compatible 20-pin format and 11 | # in the new-style compact 10-pin. There's also an 8-pin connector 12 | # with serial port support. It's included with LM3S9B9x eval boards. 13 | # 14 | # http://www.luminarymicro.com/products/ek-lm3s9b90.html 15 | # http://www.luminarymicro.com/products/ek-lm3s9b92.html 16 | # 17 | 18 | interface ft2232 19 | ft2232_device_desc "Luminary Micro ICDI Board" 20 | ft2232_layout luminary_icdi 21 | ft2232_vid_pid 0x0403 0xbcda 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/luminary-lm3s811.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S811 Evaluation Kit 3 | # 4 | # http://www.luminarymicro.com/products/stellaris_811_evaluation_kits.html 5 | # 6 | # NOTE: this is only for boards *before* Rev C, which adds support 7 | # for SWO tracing with ADBUS_6 DBG_ENn and BDBUS_4 SWO_EN signals. 8 | # The "evb_lm3s811" layout doesn't set up those signals. 9 | # 10 | # Rev C boards work more like the other Stellaris eval boards. They 11 | # need to use the "luminary_icdi" layout to work correctly. 12 | # 13 | 14 | interface ft2232 15 | ft2232_device_desc "LM3S811 Evaluation Board" 16 | ft2232_layout evb_lm3s811 17 | ft2232_vid_pid 0x0403 0xbcd9 18 | 19 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/minimodule.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FTDI MiniModule 3 | # 4 | # http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_FT2232H_Mini_Module.pdf 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "FT2232H MiniModule" 9 | ft2232_layout "minimodule" 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/nds32-aice.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Andes AICE 3 | # 4 | # http://www.andestech.com 5 | # 6 | 7 | interface aice 8 | aice desc "Andes AICE adapter" 9 | aice serial "C001-42163" 10 | aice vid_pid 0x1CFC 0x0000 11 | aice port aice_usb 12 | reset_config trst_and_srst 13 | adapter_khz 24000 14 | aice retry_times 50 15 | aice count_to_check_dbger 30 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/neodb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Openmoko USB JTAG/RS232 adapter 3 | # 4 | # http://wiki.openmoko.org/wiki/Debug_Board_v3 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Debug Board for Neo1973" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x1457 0x5118 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ngxtech.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # NGX ARM USB JTAG 3 | # 4 | # http://shop.ngxtechnologies.com/product_info.php?cPath=26&products_id=30 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NGX JTAG A" 9 | ft2232_vid_pid 0x0403 0x6010 10 | ft2232_layout "oocdlink" 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/olimex-arm-usb-ocd-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-OCD-H" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x002b 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/olimex-arm-usb-ocd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x0003 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/olimex-arm-usb-tiny-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny-h.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x002a 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/olimex-jtag-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG TINY" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x0004 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/oocdlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Joern Kaipf's OOCDLink 3 | # 4 | # http://www.joernonline.de/contrexx2/cms/index.php?page=126 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "OOCDLink" 9 | ft2232_layout oocdlink 10 | ft2232_vid_pid 0x0403 0xbaf8 11 | adapter_khz 5 12 | 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/opendous.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # opendous-jtag 3 | # 4 | # http://code.google.com/p/opendous-jtag/ 5 | # 6 | 7 | interface opendous 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/opendous_ftdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Opendous 3 | # 4 | # http://code.google.com/p/opendous/wiki/JTAG 5 | # 6 | # According to the website, it is similar to jtagkey, but it uses channel B 7 | # (and it has a different pid number). 8 | # 9 | 10 | interface ft2232 11 | ft2232_device_desc "Dual RS232-HS" 12 | ft2232_layout jtagkey 13 | ft2232_vid_pid 0x0403 0x6010 14 | ft2232_channel 2 15 | 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/openjtag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # OpenJTAG 3 | # 4 | # www.openjtag.org 5 | # 6 | 7 | interface openjtag 8 | openjtag_device_desc "Open JTAG Project" -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/openocd-usb-hs.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # embedded projects openocd usb adapter v3 3 | # 4 | # http://shop.embedded-projects.net/index.php?module=artikel&action=artikel&id=14 5 | # 6 | 7 | interface ft2232 8 | ft2232_vid_pid 0x0403 0x6010 9 | ft2232_device_desc "Dual RS232-HS" 10 | ft2232_layout "oocdlink" 11 | ft2232_latency 2 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/openocd-usb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hubert Hoegl's USB to JTAG 3 | # 4 | # http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_vid_pid 0x0403 0x6010 9 | ft2232_device_desc "Dual RS232" 10 | ft2232_layout "oocdlink" 11 | ft2232_latency 2 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/openrd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvell OpenRD 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/openrd.jsp 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout sheevaplug 9 | ft2232_vid_pid 0x0403 0x9e90 10 | ft2232_device_desc "OpenRD JTAGKey FT2232D B" 11 | adapter_khz 3000 12 | 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/osbdm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # P&E Micro OSBDM (aka OSJTAG) interface 3 | # 4 | # http://pemicro.com/osbdm/ 5 | # 6 | interface osbdm 7 | reset_config srst_only 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/parport.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Parallel port wiggler (many clones available) on port 0x378 3 | # 4 | # Addresses: 0x378/LPT1 or 0x278/LPT2 ... 5 | # 6 | 7 | if { [info exists PARPORTADDR] } { 8 | set _PARPORTADDR $PARPORTADDR 9 | } else { 10 | set _PARPORTADDR 0x378 11 | } 12 | 13 | interface parport 14 | parport_port $_PARPORTADDR 15 | parport_cable wiggler 16 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/parport_dlc5.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xilinx Parallel Cable III 'DLC 5' (and various clones) 3 | # 4 | # http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html 5 | # 6 | 7 | if { [info exists PARPORTADDR] } { 8 | set _PARPORTADDR $PARPORTADDR 9 | } else { 10 | set _PARPORTADDR 0 11 | } 12 | 13 | interface parport 14 | parport_port $_PARPORTADDR 15 | parport_cable dlc5 16 | 17 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/redbee-econotag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Redwire Redbee-Econotag 3 | # 4 | # http://www.redwirellc.com/store/node/1 5 | # 6 | # The Redbee-Econotag has an onboard FT2232H with: 7 | # - FT2232H channel A wired to mc13224v JTAG 8 | # - FT2232H channel B wired to mc13224v UART1 9 | # 10 | 11 | interface ft2232 12 | ft2232_layout redbee-econotag 13 | ft2232_vid_pid 0x0403 0x6010 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/redbee-usb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Redwire Redbee-USB 3 | # 4 | # http://www.redwirellc.com 5 | # 6 | # The Redbee-USB has an onboard FT2232H with: 7 | # - FT2232H channel B wired to mc13224v JTAG 8 | # - FT2232H channel A wired to mc13224v UART1 9 | # 10 | 11 | interface ft2232 12 | ft2232_layout redbee-usb 13 | ft2232_vid_pid 0x0403 0x6010 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/rlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Raisonance RLink 3 | # 4 | # http://www.mcu-raisonance.com/~rlink-debugger-programmer__microcontrollers__tool~tool__T018:4cn9ziz4bnx6.html 5 | # 6 | 7 | interface rlink 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/sheevaplug.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvel SheevaPlug Development Kit 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/sheevaplug.jsp 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout sheevaplug 9 | ft2232_vid_pid 0x9e88 0x9e8f 10 | ft2232_device_desc "SheevaPlug JTAGKey FT2232D B" 11 | adapter_khz 2000 12 | 13 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/signalyzer-h2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer H2 (DT-USB-SH2) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer H2" 9 | ft2232_layout signalyzer-h 10 | ft2232_vid_pid 0x0403 0xbca2 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/signalyzer-h4.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer H4 (DT-USB-SH4) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer H4" 9 | ft2232_layout signalyzer-h 10 | ft2232_vid_pid 0x0403 0xbca4 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/signalyzer-lite.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer LITE (DT-USB-SLITE) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer LITE" 9 | ft2232_layout signalyzer 10 | ft2232_vid_pid 0x0403 0xbca1 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/signalyzer.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer Tool (DT-USB-ST) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer" 9 | ft2232_layout signalyzer 10 | ft2232_vid_pid 0x0403 0xbca0 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/stlink-v1.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STMicroelectronics ST-LINK/V1 in-circuit debugger/programmer 3 | # 4 | 5 | interface hla 6 | hla_layout stlink 7 | hla_device_desc "ST-LINK/V1" 8 | hla_vid_pid 0x0483 0x3744 9 | 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/stlink-v2-1.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STMicroelectronics ST-LINK/V2-1 in-circuit debugger/programmer 3 | # 4 | 5 | interface hla 6 | hla_layout stlink 7 | hla_device_desc "ST-LINK/V2-1" 8 | hla_vid_pid 0x0483 0x374b 9 | 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/stlink-v2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STMicroelectronics ST-LINK/V2 in-circuit debugger/programmer 3 | # 4 | 5 | interface hla 6 | hla_layout stlink 7 | hla_device_desc "ST-LINK/V2" 8 | hla_vid_pid 0x0483 0x3748 9 | 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/stm32-stick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STM32-PerformanceStick 3 | # 4 | # http://www.hitex.com/index.php?id=340 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "STM32-PerformanceStick" 9 | ft2232_layout stm32stick 10 | ft2232_vid_pid 0x0640 0x002d 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/sysfsgpio-raspberrypi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Config for using RaspberryPi's expansion header 3 | # 4 | # This is best used with a fast enough buffer but also 5 | # is suitable for direct connection if the target voltage 6 | # matches RPi's 3.3V 7 | # 8 | # Do not forget the GND connection, pin 6 of the expansion header. 9 | # 10 | 11 | interface sysfsgpio 12 | 13 | # Each of the JTAG lines need a gpio number set: tck tms tdi tdo 14 | # Header pin numbers: 23 22 19 21 15 | sysfsgpio_jtag_nums 11 25 10 9 16 | 17 | # At least one of srst or trst needs to be specified 18 | # Header pin numbers: TRST - 26, SRST - 18 19 | sysfsgpio_trst_num 7 20 | # sysfsgpio_srst_num 24 21 | 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ti-icdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI Stellaris In-Circuit Debug Interface (ICDI) Board 3 | # 4 | # This is the propriety ICDI interface used on newer boards such as 5 | # LM4F232 Evaluation Kit - http://www.ti.com/tool/ek-lm4f232 6 | # Stellaris Launchpad - http://www.ti.com/stellaris-launchpad 7 | # http://www.ti.com/tool/ek-lm4f232 8 | # 9 | 10 | interface hla 11 | hla_layout ti-icdi 12 | hla_vid_pid 0x1cbe 0x00fd 13 | 14 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/turtelizer2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # egnite Turtelizer 2 3 | # 4 | # http://www.ethernut.de/en/hardware/turtelizer/index.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Turtelizer JTAG/RS232 Adapter" 9 | ft2232_layout turtelizer2 10 | ft2232_vid_pid 0x0403 0xbdc8 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/ulink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Keil ULINK running OpenULINK firmware. 3 | # 4 | # http://www.keil.com/ulink1/ 5 | # http://article.gmane.org/gmane.comp.debugging.openocd.devel/17362 6 | # 7 | 8 | interface ulink 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/usb-jtag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Kolja Waschk's USB-JTAG 3 | # 4 | # http://www.ixo.de/info/usb_jtag/ 5 | # 6 | 7 | interface usb_blaster 8 | usb_blaster_vid_pid 0x16C0 0x06AD 9 | usb_blaster_device_desc "USB-JTAG-IF" 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/usbprog.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Embedded Projects USBprog 3 | # 4 | # http://embedded-projects.net/index.php?page_id=135 5 | # 6 | 7 | interface usbprog 8 | # USBprog is broken w/short TMS sequences, this is a workaround 9 | # until the C code can be fixed. 10 | tms_sequence long 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/vpaclink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Voipac VPACLink 3 | # 4 | # http://voipac.com/27M-JTG-000 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "VPACLink A" 9 | ft2232_layout oocdlink 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/vsllink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Versaloon Link -- VSLLink 3 | # 4 | # http://www.versaloon.com/ 5 | # 6 | 7 | interface vsllink 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/interface/xds100v2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Texas Instruments XDS100v2 3 | # 4 | # http://processors.wiki.ti.com/index.php/XDS100#XDS100v2_Features 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Texas Instruments Inc.XDS100 Ver 2.0" 9 | ft2232_layout xds100v2 10 | ft2232_vid_pid 0x0403 0xa6d0 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/mem_helper.tcl: -------------------------------------------------------------------------------- 1 | # Helper for common memory read/modify/write procedures 2 | 3 | # mrw: "memory read word", returns value of $reg 4 | proc mrw {reg} { 5 | set value "" 6 | mem2array value 32 $reg 1 7 | return $value(0) 8 | } 9 | 10 | add_usage_text mrw "address" 11 | add_help_text mrw "Returns value of word in memory." 12 | 13 | # mmw: "memory modify word", updates value of $reg 14 | # $reg <== ((value & ~$clearbits) | $setbits) 15 | proc mmw {reg setbits clearbits} { 16 | set old [mrw $reg] 17 | set new [expr ($old & ~$clearbits) | $setbits] 18 | mww $reg $new 19 | } 20 | 21 | add_usage_text mmw "address setbits clearbits" 22 | add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;" 23 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/armada370.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # armada370 -- support for the Marvell Armada/370 CPU family 3 | # 4 | # gerg@uclinux.org, OCT-2013 5 | # 6 | 7 | if { [info exists CHIPNAME] } { 8 | set _CHIPNAME $CHIPNAME 9 | } else { 10 | set _CHIPNAME armada370 11 | } 12 | 13 | if { [info exists CPUTAPID] } { 14 | set _CPUTAPID $CPUTAPID 15 | } else { 16 | set _CPUTAPID 0x4ba00477 17 | } 18 | 19 | jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 20 | 21 | set _TARGETNAME $_CHIPNAME.cpu 22 | target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap 23 | 24 | proc armada370_dbginit {target} { 25 | cortex_a dbginit 26 | } 27 | 28 | $_TARGETNAME configure -event reset-assert-post "armada370_dbginit $_TARGETNAME" 29 | 30 | # We need to init now, so we can run the apsel command. 31 | init 32 | dap apsel 1 33 | 34 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at32ap7000.cfg: -------------------------------------------------------------------------------- 1 | # Atmel AT32AP7000 2 | # 3 | # This is the only core in the now-inactive high end AVR32 product line, 4 | # with MMU, Java Acceleration, and "pixel coprocessor". The AP7 line 5 | # is for "Application Processors" (AP) with 7-stage pipelines. 6 | # 7 | # Most current AVR32 parts are in the UC3 flash based microcontroller (UC) 8 | # product line with 3-stage pipelines and without those extras. 9 | # 10 | # All AVR32 parts provide the Nexus Class 3 on-chip debug interfaces 11 | # through their JTAG interfaces. 12 | 13 | jtag newtap ap7 nexus -irlen 5 -expected-id 0x21e8203f 14 | 15 | # REVISIT declare an avr32 target ... needs OpenOCD infrastructure 16 | # for both Nexus (generic) and AVR32 (Atmel-specific). 17 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91r40008.cfg: -------------------------------------------------------------------------------- 1 | # AT91R40008 target configuration file 2 | 3 | # TRST is tied to SRST on the AT91X40 family. 4 | reset_config srst_only srst_pulls_trst 5 | 6 | 7 | if {[info exists CHIPNAME]} { 8 | set _CHIPNAME $CHIPNAME 9 | } else { 10 | set _CHIPNAME at91r40008 11 | } 12 | 13 | if { [info exists ENDIAN] } { 14 | set _ENDIAN $ENDIAN 15 | } else { 16 | set _ENDIAN little 17 | } 18 | 19 | # Setup the JTAG scan chain. 20 | if { [info exists CPUTAPID] } { 21 | set _CPUTAPID $CPUTAPID 22 | } else { 23 | set _CPUTAPID 0x1f0f0f0f 24 | } 25 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 26 | 27 | set _TARGETNAME $_CHIPNAME.cpu 28 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi 29 | $_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0 30 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3ax_4x.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3ax_xx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 256K chip - it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x0000A0000 0 1 1 $_TARGETNAME 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3ax_8x.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3ax_xx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 512K chip - it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x0000C0000 0 1 1 $_TARGETNAME 10 | 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3ax_xx.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam3, a CORTEX-M3 chip 2 | # 3 | # at91sam3A4C 4 | # at91sam3A8C 5 | # at91sam3X4C 6 | # at91sam3X4E 7 | # at91sam3X8C 8 | # at91sam3X8E 9 | # at91sam3X8H 10 | source [find target/at91sam3XXX.cfg] 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3nXX.cfg: -------------------------------------------------------------------------------- 1 | 2 | # 3 | # Configuration for Atmel's SAM3N series 4 | # 5 | 6 | if { [info exists CHIPNAME] } { 7 | set _CHIPNAME $CHIPNAME 8 | } else { 9 | set _CHIPNAME at91sam3n 10 | } 11 | 12 | if { [info exists CPUTAPID] } { 13 | set _CPUTAPID $CPUTAPID 14 | } else { 15 | set _CPUTAPID 0x4ba00477 16 | } 17 | 18 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 19 | 20 | set _TARGETNAME $_CHIPNAME.cpu 21 | target create $_TARGETNAME cortex_m -endian little -chain-position $_TARGETNAME 22 | 23 | set _FLASHNAME $_CHIPNAME.flash 24 | flash bank flash0 at91sam3 0x00400000 0 0 0 $_TARGETNAME 25 | 26 | # if srst is not fitted use SYSRESETREQ to 27 | # perform a soft reset 28 | cortex_m reset_config sysresetreq 29 | 30 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3sXX.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam3, a CORTEX-M3 chip 2 | # 3 | # at91sam3s4c 4 | # at91sam3s4b 5 | # at91sam3s4a 6 | # at91sam3s2c 7 | # at91sam3s2b 8 | # at91sam3s2a 9 | # at91sam3s1c 10 | # at91sam3s1b 11 | # at91sam3s1a 12 | 13 | source [find target/at91sam3XXX.cfg] 14 | 15 | set _FLASHNAME $_CHIPNAME.flash 16 | flash bank $_FLASHNAME at91sam3 0x00400000 0 1 1 $_TARGETNAME 17 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3u1c.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3u1e.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3u2c.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3u2e.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3u4c.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 256K chip, it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME 10 | 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3u4e.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 256K chip - it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME 10 | 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam3uxx.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam3, a CORTEX-M3 chip 2 | # 3 | # at91sam3u4e 4 | # at91sam3u2e 5 | # at91sam3u1e 6 | # at91sam3u4c 7 | # at91sam3u2c 8 | # at91sam3u1c 9 | 10 | source [find target/at91sam3XXX.cfg] 11 | 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam4lXX.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam4l, a CORTEX-M4 chip 2 | # 3 | 4 | source [find target/at91sam4XXX.cfg] 5 | 6 | set _FLASHNAME $_CHIPNAME.flash 7 | flash bank $_FLASHNAME at91sam4l 0x00000000 0 1 1 $_TARGETNAME 8 | 9 | # if srst is not fitted use VECTRESET to perform a soft reset 10 | # this will only reset the core, not the peripherals 11 | cortex_m reset_config vectreset 12 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam4sXX.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam4, a CORTEX-M4 chip 2 | # 3 | 4 | source [find target/at91sam4XXX.cfg] 5 | 6 | set _FLASHNAME $_CHIPNAME.flash 7 | flash bank $_FLASHNAME at91sam4 0x00400000 0 1 1 $_TARGETNAME 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam4sd32x.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam4sd32, a CORTEX-M4 chip 2 | # 3 | 4 | source [find target/at91sam4XXX.cfg] 5 | 6 | set _FLASHNAME $_CHIPNAME.flash0 7 | flash bank $_FLASHNAME at91sam4 0x00400000 0 1 1 $_TARGETNAME 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam4 0x00500000 0 1 1 $_TARGETNAME 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam9.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9 3 | ###################################### 4 | 5 | if { [info exists AT91_CHIPNAME] } { 6 | set _CHIPNAME $AT91_CHIPNAME 7 | } else { 8 | error "you must specify a chip name" 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x0792603f 21 | } 22 | 23 | reset_config trst_and_srst separate trst_push_pull srst_open_drain 24 | 25 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 26 | 27 | adapter_nsrst_delay 300 28 | jtag_ntrst_delay 200 29 | 30 | adapter_khz 3 31 | 32 | ###################### 33 | # Target configuration 34 | ###################### 35 | 36 | set _TARGETNAME $_CHIPNAME.cpu 37 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 38 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam9260.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9260 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9260 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | 14 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 15 | # AT91SAM9260 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000. 16 | # Both areas are 4 kB long. 17 | 18 | #$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x1000 -work-area-backup 1 19 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1 20 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam9261.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9261 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9261 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Internal sram1 memory 14 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x28000 -work-area-backup 1 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam9263.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9263 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9263 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 14 | # AT91SAM9263 has two SRAM areas, 15 | # one starting at 0x00300000 of 80KiB 16 | # and the other starting at 0x00500000 of 16KiB. 17 | 18 | # Internal sram1 memory 19 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x14000 -work-area-backup 1 20 | #$_TARGETNAME configure -work-area-phys 0x00500000 -work-area-size 0x4000 -work-area-backup 1 21 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam9g10.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9G10 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9g10 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 14 | # AT91SAM9G10 has one SRAM area at 0x00300000 of 16KiB 15 | 16 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1 17 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam9g20.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9G20 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9g20 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock). 14 | 15 | adapter_khz 5 16 | 17 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 18 | # AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000. 19 | # Both areas are 16 kB long. 20 | 21 | #$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1 22 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1 23 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam9g45.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9G45 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9g45 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 14 | # AT91SAM9G45 has one SRAM area starting at 0x00300000 of 64 KiB. 15 | 16 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x200000 -work-area-backup 1 17 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91sam9rl.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9RL 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9rl 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Internal sram1 memory 14 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x10000 -work-area-backup 1 15 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/at91samg5x.cfg: -------------------------------------------------------------------------------- 1 | # script for the ATMEL samg5x CORTEX-M4F chip family 2 | # 3 | 4 | source [find target/at91sam4XXX.cfg] 5 | 6 | set _FLASHNAME $_CHIPNAME.flash 7 | flash bank $_FLASHNAME at91sam4 0x00400000 0 1 1 $_TARGETNAME 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/atmega128.cfg: -------------------------------------------------------------------------------- 1 | # for avr 2 | 3 | set _CHIPNAME avr 4 | set _ENDIAN little 5 | 6 | # jtag speed 7 | adapter_khz 4500 8 | 9 | reset_config srst_only 10 | adapter_nsrst_delay 100 11 | 12 | #jtag scan chain 13 | if { [info exists CPUTAPID] } { 14 | set _CPUTAPID $CPUTAPID 15 | } else { 16 | set _CPUTAPID 0x8970203F 17 | } 18 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 19 | 20 | set _TARGETNAME $_CHIPNAME.cpu 21 | target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME 22 | 23 | #$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 24 | 25 | set _FLASHNAME $_CHIPNAME.flash 26 | flash bank $_FLASHNAME avr 0 0 0 0 $_TARGETNAME 27 | 28 | #to use it, script will be like: 29 | #init 30 | #adapter_khz 4500 31 | #reset init 32 | #verify_ircapture disable 33 | # 34 | #halt 35 | #wait halt 36 | #poll 37 | #avr mass_erase 0 38 | #flash write_image E:/Versaloon/Software/CAMERAPROTOCOLAGENT.hex 39 | #reset run 40 | #shutdown 41 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/avr32.cfg: -------------------------------------------------------------------------------- 1 | set _CHIPNAME avr32 2 | set _ENDIAN big 3 | 4 | set _CPUTAPID 0x21e8203f 5 | 6 | adapter_nsrst_delay 100 7 | jtag_ntrst_delay 100 8 | 9 | reset_config trst_and_srst separate 10 | 11 | # jtag scan chain 12 | # format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) 13 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_CPUTAPID 14 | 15 | set _TARGETNAME [format "%s.cpu" $_CHIPNAME] 16 | target create $_TARGETNAME avr32_ap7k -endian $_ENDIAN -chain-position $_TARGETNAME 17 | 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/bcm281xx.cfg: -------------------------------------------------------------------------------- 1 | # BCM281xx 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME bcm281xx 7 | } 8 | 9 | 10 | # Main CPU DAP 11 | if { [info exists DAP_TAPID] } { 12 | set _DAP_TAPID $DAP_TAPID 13 | } else { 14 | set _DAP_TAPID 0x4ba00477 15 | } 16 | 17 | jtag newtap $_CHIPNAME dap -expected-id $_DAP_TAPID -irlen 4 18 | 19 | 20 | # Dual Cortex A9s 21 | set _TARGETNAME0 $_CHIPNAME.cpu0 22 | set _TARGETNAME1 $_CHIPNAME.cpu1 23 | 24 | target create $_TARGETNAME0 cortex_a -chain-position $_CHIPNAME.dap -coreid 0 -dbgbase 0x3fe10000 25 | target create $_TARGETNAME1 cortex_a -chain-position $_CHIPNAME.dap -coreid 1 -dbgbase 0x3fe12000 26 | target smp $_TARGETNAME0 $_TARGETNAME1 27 | 28 | $_TARGETNAME0 configure -event gdb-attach { 29 | cortex_a dbginit 30 | } 31 | $_TARGETNAME1 configure -event gdb-attach { 32 | cortex_a dbginit 33 | } 34 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/bcm4718.cfg: -------------------------------------------------------------------------------- 1 | set _CHIPNAME bcm4718 2 | set _LVTAPID 0x1471617f 3 | set _CPUID 0x0008c17f 4 | 5 | source [find target/bcm47xx.cfg] 6 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/bcm47xx.cfg: -------------------------------------------------------------------------------- 1 | echo "Forcing reset_config to none to prevent OpenOCD from pulling SRST after the switch from LV is already performed" 2 | reset_config none 3 | 4 | jtag newtap $_CHIPNAME-lv tap -irlen 32 -ircapture 0x1 -irmask 0x1f -expected-id $_LVTAPID -expected-id $_CPUID 5 | jtag configure $_CHIPNAME-lv.tap -event setup "jtag tapenable $_CHIPNAME.cpu" 6 | jtag configure $_CHIPNAME-lv.tap -event tap-disable {} 7 | 8 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUID -disable 9 | jtag configure $_CHIPNAME.cpu -event tap-enable "switch_lv_to_ejtag" 10 | 11 | set _TARGETNAME $_CHIPNAME.cpu 12 | target create $_TARGETNAME mips_m4k -endian little -chain-position $_TARGETNAME 13 | 14 | proc switch_lv_to_ejtag {} { 15 | global _CHIPNAME 16 | poll 0 17 | irscan $_CHIPNAME-lv.tap 0x143ff3a 18 | drscan $_CHIPNAME-lv.tap 32 1 19 | jtag tapdisable $_CHIPNAME-lv.tap 20 | poll 1 21 | } 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/bcm5352e.cfg: -------------------------------------------------------------------------------- 1 | set _CHIPNAME bcm5352e 2 | set _CPUID 0x0535217f 3 | 4 | jtag newtap $_CHIPNAME cpu -irlen 8 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUID 5 | 6 | set _TARGETNAME $_CHIPNAME.cpu 7 | target create $_TARGETNAME mips_m4k -endian little -chain-position $_TARGETNAME 8 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/bcm6348.cfg: -------------------------------------------------------------------------------- 1 | set _CHIPNAME bcm6348 2 | set _CPUID 0x0634817f 3 | 4 | adapter_khz 1000 5 | 6 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUID 7 | 8 | set _TARGETNAME $_CHIPNAME.cpu 9 | target create $_TARGETNAME mips_m4k -endian big -chain-position $_TARGETNAME 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/cs351x.cfg: -------------------------------------------------------------------------------- 1 | if { [info exists CHIPNAME] } { 2 | set _CHIPNAME $CHIPNAME 3 | } else { 4 | set _CHIPNAME cs351x 5 | } 6 | 7 | if { [info exists ENDIAN] } { 8 | set _ENDIAN $ENDIAN 9 | } else { 10 | set _ENDIAN little 11 | } 12 | 13 | if { [info exists CPUTAPID] } { 14 | set _CPUTAPID $CPUTAPID 15 | } else { 16 | set _CPUTAPID 0x00526fa1 17 | } 18 | 19 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 20 | 21 | # Create the GDB Target. 22 | set _TARGETNAME $_CHIPNAME.cpu 23 | target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526 24 | 25 | # There is 16K of SRAM on this chip 26 | # FIXME: flash programming is not working by using this work area. So comment this out for now. 27 | #$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1 28 | 29 | # This chip has a DCC ... use it 30 | arm7_9 dcc_downloads enable 31 | 32 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/dragonite.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Marvell Dragonite CPU core 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME dragonite 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x121003d3 21 | } 22 | 23 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 24 | 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME dragonite -endian $_ENDIAN -chain-position $_TARGETNAME 27 | 28 | reset_config trst_and_srst 29 | adapter_nsrst_delay 200 30 | jtag_ntrst_delay 200 31 | 32 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/dsp56321.cfg: -------------------------------------------------------------------------------- 1 | # Script for freescale DSP56321 2 | # 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME dsp56321 8 | } 9 | 10 | if { [info exists ENDIAN] } { 11 | set _ENDIAN $ENDIAN 12 | } else { 13 | # this defaults to a big endian 14 | set _ENDIAN big 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x1181501d 21 | } 22 | 23 | #jtag speed 24 | adapter_khz 4500 25 | 26 | #has only srst 27 | reset_config srst_only 28 | 29 | #jtag scan chain 30 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0x1 -expected-id $_CPUTAPID 31 | 32 | #target configuration 33 | set _TARGETNAME $_CHIPNAME.cpu 34 | target create $_TARGETNAME dsp563xx -endian $_ENDIAN -chain-position $_TARGETNAME 35 | 36 | #working area at base of ram 37 | $_TARGETNAME configure -work-area-virt 0 38 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/epc9301.cfg: -------------------------------------------------------------------------------- 1 | # Cirrus Logic EP9301 processor on an Olimex CS-E9301 board. 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME ep9301 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | # Force an error until we get a good number. 19 | set _CPUTAPID 0xffffffff 20 | } 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | adapter_nsrst_delay 100 24 | jtag_ntrst_delay 100 25 | 26 | set _TARGETNAME $_CHIPNAME.cpu 27 | target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -work-area-phys 0x80014000 -work-area-size 0x1000 -work-area-backup 1 28 | 29 | #flash configuration 30 | #flash bank [driver_options ...] 31 | set _FLASHNAME $_CHIPNAME.flash 32 | flash bank $_FLASHNAME cfi 0x60000000 0x1000000 2 2 $_TARGETNAME 33 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/faux.cfg: -------------------------------------------------------------------------------- 1 | #Script for faux target - used for testing 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME at91eb40a 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | set _CPUTAPID 0x00000000 19 | } 20 | 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | 24 | #target configuration 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 27 | 28 | #dummy flash driver 29 | set _FLASHNAME $_CHIPNAME.flash 30 | flash bank $_FLASHNAME faux 0x01000000 0x200000 2 2 $_TARGETNAME 31 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/feroceon.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Marvell Feroceon CPU core 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME feroceon 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x20a023d3 21 | } 22 | 23 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 24 | 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME 27 | 28 | reset_config trst_and_srst 29 | adapter_nsrst_delay 200 30 | jtag_ntrst_delay 200 31 | 32 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/hilscher_netx10.cfg: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | # Author: Michael Trensch (MTrensch@googlemail.com) 3 | ################################################################################ 4 | 5 | #Hilscher netX 10 CPU 6 | 7 | if { [info exists CHIPNAME] } { 8 | set _CHIPNAME $CHIPNAME 9 | } else { 10 | set _CHIPNAME netx10 11 | } 12 | 13 | if { [info exists ENDIAN] } { 14 | set _ENDIAN $ENDIAN 15 | } else { 16 | set _ENDIAN little 17 | } 18 | 19 | if { [info exists CPUTAPID] } { 20 | set _CPUTAPID $CPUTAPID 21 | } else { 22 | set _CPUTAPID 0x25966021 23 | } 24 | 25 | # jtag scan chain 26 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 27 | 28 | # that TAP is associated with a target 29 | set _TARGETNAME $_CHIPNAME.cpu 30 | target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME 31 | 32 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/imx.cfg: -------------------------------------------------------------------------------- 1 | # utility fn's for Freescale i.MX series 2 | 3 | global TARGETNAME 4 | set TARGETNAME $_TARGETNAME 5 | 6 | # rewrite commands of the form below to arm11 mcr... 7 | # Data.Set c15:0x042f %long 0x40000015 8 | proc setc15 {regs value} { 9 | global TARGETNAME 10 | 11 | echo [format "set p15 0x%04x, 0x%08x" $regs $value] 12 | 13 | arm mcr 15 [expr ($regs>>12)&0x7] [expr ($regs>>0)&0xf] [expr ($regs>>4)&0xf] [expr ($regs>>8)&0x7] $value 14 | } 15 | 16 | 17 | proc imx3x_reset {} { 18 | # this reset script comes from the Freescale PDK 19 | # 20 | # http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX35PDK 21 | 22 | echo "Target Setup: initialize DRAM controller and peripherals" 23 | 24 | # Data.Set c15:0x01 %long 0x00050078 25 | setc15 0x01 0x00050078 26 | 27 | echo "configuring CP15 for enabling the peripheral bus" 28 | # Data.Set c15:0x042f %long 0x40000015 29 | setc15 0x042f 0x40000015 30 | } 31 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/imx21.cfg: -------------------------------------------------------------------------------- 1 | #use combined on interfaces or targets that can't set TRST/SRST separately 2 | # 3 | # Hmmm.... should srst_pulls_trst be used here like i.MX27??? 4 | reset_config trst_and_srst 5 | 6 | if { [info exists CHIPNAME] } { 7 | set _CHIPNAME $CHIPNAME 8 | } else { 9 | set _CHIPNAME imx21 10 | } 11 | 12 | if { [info exists ENDIAN] } { 13 | set _ENDIAN $ENDIAN 14 | } else { 15 | set _ENDIAN little 16 | } 17 | 18 | 19 | # Note above there is 1 tap 20 | 21 | # The CPU tap 22 | if { [info exists CPUTAPID] } { 23 | set _CPUTAPID $CPUTAPID 24 | } else { 25 | set _CPUTAPID 0x0792611f 26 | } 27 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 28 | 29 | 30 | # Create the GDB Target. 31 | set _TARGETNAME $_CHIPNAME.cpu 32 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 33 | 34 | arm7_9 dcc_downloads enable 35 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/imx28.cfg: -------------------------------------------------------------------------------- 1 | # i.MX28 config file. 2 | # based off of the imx21.cfg file. 3 | 4 | reset_config trst_and_srst 5 | 6 | #jtag nTRST and nSRST delay 7 | adapter_nsrst_delay 100 8 | jtag_ntrst_delay 100 9 | 10 | if { [info exists CHIPNAME] } { 11 | set _CHIPNAME $CHIPNAME 12 | } else { 13 | set _CHIPNAME imx28 14 | } 15 | 16 | if { [info exists ENDIAN] } { 17 | set _ENDIAN $ENDIAN 18 | } else { 19 | set _ENDIAN little 20 | } 21 | 22 | 23 | # Note above there is 1 tap 24 | 25 | # The CPU tap 26 | if { [info exists CPUTAPID] } { 27 | set _CPUTAPID $CPUTAPID 28 | } else { 29 | set _CPUTAPID 0x079264f3 30 | } 31 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | 33 | 34 | # Create the GDB Target. 35 | set _TARGETNAME $_CHIPNAME.cpu 36 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 37 | 38 | arm7_9 dcc_downloads enable 39 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/k40.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale Kinetis K40 devices 3 | # 4 | 5 | # 6 | # K40 devices support both JTAG and SWD transports. 7 | # 8 | source [find target/swj-dp.tcl] 9 | 10 | if { [info exists CHIPNAME] } { 11 | set _CHIPNAME $CHIPNAME 12 | } else { 13 | set _CHIPNAME k40 14 | } 15 | 16 | if { [info exists ENDIAN] } { 17 | set _ENDIAN $ENDIAN 18 | } else { 19 | set _ENDIAN little 20 | } 21 | 22 | if { [info exists CPUTAPID] } { 23 | set _CPUTAPID $CPUTAPID 24 | } else { 25 | set _CPUTAPID 0x4ba00477 26 | } 27 | 28 | set _TARGETNAME $_CHIPNAME.cpu 29 | 30 | swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 31 | 32 | target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu 33 | 34 | $_CHIPNAME.cpu configure -event examine-start { puts "START..." ; } 35 | $_CHIPNAME.cpu configure -event examine-end { puts "END..." ; } 36 | 37 | # if srst is not fitted use SYSRESETREQ to 38 | # perform a soft reset 39 | cortex_m reset_config sysresetreq 40 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/k60.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale Kinetis K60 devices 3 | # 4 | 5 | # 6 | # K60 devices support both JTAG and SWD transports. 7 | # 8 | source [find target/swj-dp.tcl] 9 | 10 | if { [info exists CHIPNAME] } { 11 | set _CHIPNAME $CHIPNAME 12 | } else { 13 | set _CHIPNAME k60 14 | } 15 | 16 | if { [info exists ENDIAN] } { 17 | set _ENDIAN $ENDIAN 18 | } else { 19 | set _ENDIAN little 20 | } 21 | 22 | if { [info exists CPUTAPID] } { 23 | set _CPUTAPID $CPUTAPID 24 | } else { 25 | set _CPUTAPID 0x4ba00477 26 | } 27 | 28 | set _TARGETNAME $_CHIPNAME.cpu 29 | 30 | swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 31 | 32 | target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu 33 | 34 | $_CHIPNAME.cpu configure -event examine-start { puts "START..." ; } 35 | $_CHIPNAME.cpu configure -event examine-end { puts "END..." ; } 36 | 37 | # if srst is not fitted use SYSRESETREQ to 38 | # perform a soft reset 39 | cortex_m reset_config sysresetreq 40 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1751.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1751 Cortex-M3 with 32kB Flash and 8kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1751 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x2000 9 | set CPUROMSIZE 0x8000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1752.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1752 Cortex-M3 with 64kB Flash and 16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1752 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x4000 9 | set CPUROMSIZE 0x10000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1754.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1754 Cortex-M3 with 128kB Flash and 16kB+16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1754 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x4000 9 | set CPUROMSIZE 0x20000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1756.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1756 Cortex-M3 with 256kB Flash and 16kB+16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1756 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x40000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1758.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1758 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1758 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x80000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1759.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1759 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1759 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x80000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1763.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1763 Cortex-M3 with 256kB Flash and 32kB+32kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1763 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x40000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1764.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1764 Cortex-M3 with 256kB Flash and 16kB+16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1764 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x4000 9 | set CPUROMSIZE 0x20000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1765.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1765 Cortex-M3 with 256kB Flash and 32kB+1632kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1765 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x40000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1766.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1766 Cortex-M3 with 256kB Flash and 16kB+16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1766 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x40000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1767.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1767 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1767 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x80000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1768.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 2 | set CHIPNAME lpc1768 3 | set CPUTAPID 0x4ba00477 4 | set CPURAMSIZE 0x8000 5 | set CPUROMSIZE 0x80000 6 | 7 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 8 | # When board-specific code (reset-init handler or device firmware) 9 | # configures another oscillator and/or PLL0, set CCLK to match; if 10 | # you don't, then flash erase and write operations may misbehave. 11 | # (The ROM code doing those updates cares about core clock speed...) 12 | # 13 | # CCLK is the core clock frequency in KHz 14 | set CCLK 4000 15 | 16 | #Include the main configuration file. 17 | source [find target/lpc17xx.cfg]; 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1769.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC1769 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 2 | set CHIPNAME lpc1769 3 | set CPUTAPID 0x4ba00477 4 | set CPURAMSIZE 0x8000 5 | set CPUROMSIZE 0x80000 6 | 7 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 8 | # When board-specific code (reset-init handler or device firmware) 9 | # configures another oscillator and/or PLL0, set CCLK to match; if 10 | # you don't, then flash erase and write operations may misbehave. 11 | # (The ROM code doing those updates cares about core clock speed...) 12 | # 13 | # CCLK is the core clock frequency in KHz 14 | set CCLK 4000 15 | 16 | #Include the main configuration file. 17 | source [find target/lpc17xx.cfg]; 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1788.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC1788 Cortex-M3 with 512kB Flash and 64kB Local On-Chip SRAM, 2 | set CHIPNAME lpc1788 3 | set CPUTAPID 0x4ba00477 4 | set CPURAMSIZE 0x10000 5 | set CPUROMSIZE 0x80000 6 | 7 | # After reset the chip is clocked by the ~12MHz internal RC oscillator. 8 | # When board-specific code (reset-init handler or device firmware) 9 | # configures another oscillator and/or PLL0, set CCLK to match; if 10 | # you don't, then flash erase and write operations may misbehave. 11 | # (The ROM code doing those updates cares about core clock speed...) 12 | # 13 | # CCLK is the core clock frequency in KHz 14 | set CCLK 12000 15 | 16 | #Include the main configuration file. 17 | source [find target/lpc17xx.cfg]; 18 | 19 | # if srst is not fitted, use SYSRESETREQ to perform a soft reset 20 | cortex_m reset_config sysresetreq 21 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc1850.cfg: -------------------------------------------------------------------------------- 1 | 2 | adapter_khz 500 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME lpc1850 8 | } 9 | 10 | if { [info exists ENDIAN] } { 11 | set _ENDIAN $ENDIAN 12 | } else { 13 | set _ENDIAN little 14 | } 15 | # 16 | # M3 JTAG mode TAP 17 | # 18 | if { [info exists M3_JTAG_TAPID] } { 19 | set _M3_JTAG_TAPID $M3_JTAG_TAPID 20 | } else { 21 | set _M3_JTAG_TAPID 0x4ba00477 22 | } 23 | 24 | jtag newtap $_CHIPNAME m3 -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_JTAG_TAPID 25 | 26 | set _TARGETNAME $_CHIPNAME.m3 27 | target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME 28 | 29 | # if srst is not fitted use SYSRESETREQ to 30 | # perform a soft reset 31 | cortex_m reset_config sysresetreq 32 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc2103.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2103 ARM7TDMI-S with 32kB flash and 8kB SRAM, clocked with 12MHz crystal 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2103 {core_freq_khz adapter_freq_khz} { 10 | # 32kB flash and 8kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2103 0x4f1f0f0f 0x8000 lpc2000_v2 0x2000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 12MHz crystal 17 | echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2103 20 | setup_lpc2103 12000 1500 21 | } 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc2124.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2124 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2124 {core_freq_khz adapter_freq_khz} { 10 | # 256kB flash and 16kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2124 0x4f1f0f0f 0x40000 lpc2000_v1 0x4000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 12MHz crystal 17 | echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2124 20 | setup_lpc2124 12000 1500 21 | } 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc2129.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2129 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2129 {core_freq_khz adapter_freq_khz} { 10 | # 256kB flash and 16kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2129 0xcf1f0f0f 0x40000 lpc2000_v1 0x4000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 12MHz crystal 17 | echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2129 20 | setup_lpc2129 12000 1500 21 | } 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/lpc2460.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2460 ARM7TDMI-S with 98kB SRAM (16kB for ETH, 16kB for DMA, 2kB for RTC), clocked with 4MHz internal oscillator 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2460 {core_freq_khz adapter_freq_khz} { 10 | # 64kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2460 0x4f1f0f0f 0 lpc2000_v2 0x10000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 4MHz internal oscillator 17 | echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2460 20 | setup_lpc2460 4000 500 21 | } 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/nds32v2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Andes Core 3 | # 4 | # http://www.andestech.com 5 | # 6 | 7 | jtag newtap $_CHIPNAME cpu -expected-id $_CPUTAPID 8 | 9 | set _TARGETNAME $_CHIPNAME.cpu 10 | target create $_TARGETNAME nds32_v2 -endian little -chain-position $_TARGETNAME 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/nds32v3.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Andes Core 3 | # 4 | # http://www.andestech.com 5 | # 6 | 7 | jtag newtap $_CHIPNAME cpu -expected-id $_CPUTAPID 8 | 9 | set _TARGETNAME $_CHIPNAME.cpu 10 | target create $_TARGETNAME nds32_v3 -endian little -chain-position $_TARGETNAME 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/nds32v3m.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Andes Core 3 | # 4 | # http://www.andestech.com 5 | # 6 | 7 | jtag newtap $_CHIPNAME cpu -expected-id $_CPUTAPID 8 | 9 | set _TARGETNAME $_CHIPNAME.cpu 10 | target create $_TARGETNAME nds32_v3m -endian little -chain-position $_TARGETNAME 11 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/nuc910.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Nuvoton nuc910 (previously W90P910) based soc 3 | # 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME nuc910 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | # set useful default 21 | set _CPUTAPID 0x07926f0f 22 | } 23 | 24 | set _TARGETNAME $_CHIPNAME.cpu 25 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 26 | 27 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME 28 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/samsung_s3c4510.cfg: -------------------------------------------------------------------------------- 1 | if { [info exists CHIPNAME] } { 2 | set _CHIPNAME $CHIPNAME 3 | } else { 4 | set _CHIPNAME s3c4510 5 | } 6 | 7 | if { [info exists ENDIAN] } { 8 | set _ENDIAN $ENDIAN 9 | } else { 10 | set _ENDIAN little 11 | } 12 | 13 | 14 | # This appears to be a "Version 1" arm7tdmi. 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | set _CPUTAPID 0x1f0f0f0f 19 | } 20 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 21 | 22 | set _TARGETNAME $_CHIPNAME.cpu 23 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME 24 | 25 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/sharp_lh79532.cfg: -------------------------------------------------------------------------------- 1 | reset_config srst_only srst_pulls_trst 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME lh79532 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | # sharp changed the number! 19 | set _CPUTAPID 0x00002061 20 | } 21 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 22 | 23 | set _TARGETNAME $_CHIPNAME.cpu 24 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME 25 | 26 | 27 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/smp8634.cfg: -------------------------------------------------------------------------------- 1 | # script for Sigma Designs SMP8634 (eventually even SMP8635) 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME smp8634 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | set _CPUTAPID 0x08630001 19 | } 20 | 21 | adapter_nsrst_delay 100 22 | jtag_ntrst_delay 100 23 | 24 | reset_config trst_and_srst separate 25 | 26 | # jtag scan chain 27 | # format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) 28 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1 29 | 30 | set _TARGETNAME $_CHIPNAME.cpu 31 | target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant 32 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/stellaris_icdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # lm3s icdi pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME lm3s 9 | } 10 | 11 | # Work-area is a space in RAM used for flash programming 12 | # By default use 16kB 13 | if { [info exists WORKAREASIZE] } { 14 | set _WORKAREASIZE $WORKAREASIZE 15 | } else { 16 | set _WORKAREASIZE 0x4000 17 | } 18 | 19 | # 20 | # possible value are hla_jtag 21 | # currently swd is not supported 22 | # 23 | transport select hla_jtag 24 | 25 | # do not check id as icdi currently does not support it 26 | hla newtap $_CHIPNAME cpu -expected-id 0 27 | 28 | set _TARGETNAME $_CHIPNAME.cpu 29 | target create $_TARGETNAME hla_target -chain-position $_TARGETNAME 30 | 31 | $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 32 | 33 | # flash configuration ... autodetects sizes, autoprobed 34 | flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME 35 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/stm32f0x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f0x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f0x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x0bb11477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x1000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | # stm32f0x family uses stm32f1x driver 20 | set _FLASHNAME $_CHIPNAME.flash 21 | flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/stm32f1x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f1x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f1x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x1ba01477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x1000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | set _FLASHNAME $_CHIPNAME.flash 20 | flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME 21 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/stm32f2x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f2x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f2x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x2ba01477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x10000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | set _FLASHNAME $_CHIPNAME.flash 20 | flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME 21 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/stm32f3x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f3x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f3x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x2ba01477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x4000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | set _FLASHNAME $_CHIPNAME.flash 20 | flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME 21 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/stm32f4x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f4x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f4x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x2ba01477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x10000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | # stm32f4x family uses stm32f2x driver 20 | set _FLASHNAME $_CHIPNAME.flash 21 | flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME 22 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/stm32lx_dual_bank.cfg: -------------------------------------------------------------------------------- 1 | # The stm32lx 384kb have a dual bank flash. 2 | # Let's add a definition for the second bank here. 3 | 4 | # script for stm32lx family 5 | source [find target/stm32lx_stlink.cfg] 6 | 7 | # Add the second flash bank. 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME stm32lx 0x8030000 0 0 0 $_TARGETNAME 10 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/stm32w108_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32W108xx stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32w108 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x1ba01477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | # 4k -- This should work for all chips, though perhaps not optimally 15 | set WORKAREASIZE 0x1000 16 | } 17 | 18 | source [find target/stm32_stlink.cfg] 19 | 20 | # Use the flash driver from the EM357 21 | set _FLASHNAME $_CHIPNAME.flash 22 | # 64k (0x10000) of flash 23 | flash bank $_FLASHNAME em357 0x08000000 0x10000 0 0 $_TARGETNAME 24 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/stm32xl.cfg: -------------------------------------------------------------------------------- 1 | # script for stm32xl family (dual flash bank) 2 | source [find target/stm32f1x.cfg] 3 | 4 | # flash size will be probed 5 | set _FLASHNAME $_CHIPNAME.flash1 6 | flash bank $_FLASHNAME stm32f1x 0x08080000 0 0 0 $_TARGETNAME 7 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/test_reset_syntax_error.cfg: -------------------------------------------------------------------------------- 1 | # Test script to check that syntax error in reset 2 | # script is reported properly. 3 | 4 | # at91eb40a target 5 | 6 | #jtag scan chain 7 | set _CHIPNAME syntaxtest 8 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf 9 | 10 | #target configuration 11 | set _TARGETNAME $_CHIPNAME.cpu 12 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 13 | 14 | $_TARGETNAME configure -event reset-init { 15 | 16 | syntax error 17 | } 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/test_syntax_error.cfg: -------------------------------------------------------------------------------- 1 | # This script tests a syntax error in the startup 2 | # config script 3 | 4 | syntax error here 5 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/ti-ar7.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Texas Instruments AR7 SOC - used in many adsl modems. 3 | # http://www.linux-mips.org/wiki/AR7 4 | # 5 | 6 | if { [info exists CHIPNAME] } { 7 | set _CHIPNAME $CHIPNAME 8 | } else { 9 | set _CHIPNAME ti-ar7 10 | } 11 | 12 | if { [info exists ENDIAN] } { 13 | set _ENDIAN $ENDIAN 14 | } else { 15 | set _ENDIAN little 16 | } 17 | 18 | if { [info exists CPUTAPID] } { 19 | set _CPUTAPID $CPUTAPID 20 | } else { 21 | set _CPUTAPID 0x0000100f 22 | } 23 | 24 | jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID 25 | 26 | set _TARGETNAME $_CHIPNAME.cpu 27 | target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_CHIPNAME.cpu 28 | 29 | # use onboard 4k sram as working area 30 | $_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x00001000 31 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/target/zynq_7000.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xilinx Zynq-7000 All Programmable SoC 3 | # 4 | # http://www.xilinx.com/products/silicon-devices/soc/zynq-7000/index.htm 5 | # 6 | 7 | set _CHIPNAME zynq 8 | set _TARGETNAME $_CHIPNAME.cpu 9 | 10 | jtag newtap zynq_pl bs -irlen 6 -ircapture 0x1 -irmask 0x03 \ 11 | -expected-id 0x23727093 \ 12 | -expected-id 0x03727093 13 | 14 | jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4ba00477 15 | 16 | target create ${_TARGETNAME}0 cortex_a -chain-position $_CHIPNAME.dap \ 17 | -coreid 0 -dbgbase 0x80090000 18 | target create ${_TARGETNAME}1 cortex_a -chain-position $_CHIPNAME.dap \ 19 | -coreid 1 -dbgbase 0x80092000 20 | target smp ${_TARGETNAME}0 ${_TARGETNAME}1 21 | 22 | adapter_khz 1000 23 | 24 | ${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit" 25 | ${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit" 26 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/test/selftest.cfg: -------------------------------------------------------------------------------- 1 | 2 | add_help_text selftest "run selftest using working ram
" 3 | 4 | proc selftest {tmpfile address size} { 5 | 6 | for {set i 0} {$i < $size } {set i [expr $i+4]} { 7 | mww [expr $address+$i] $i 8 | } 9 | 10 | for {set i 0} {$i < 10 } {set i [expr $i+1]} { 11 | echo "Test iteration $i" 12 | dump_image $tmpfile $address $size 13 | verify_image $tmpfile $address bin 14 | load_image $tmpfile $address bin 15 | } 16 | 17 | } 18 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/scripts/test/syntax1.cfg: -------------------------------------------------------------------------------- 1 | adapter_nsrst_delay 200 2 | jtag_ntrst_delay 200 3 | 4 | #use combined on interfaces or targets that can't set TRST/SRST separately 5 | reset_config trst_and_srst srst_pulls_trst 6 | 7 | #LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-on reset is not enough 8 | jtag_reset 1 1 9 | jtag_reset 0 0 10 | 11 | #jtag scan chain 12 | #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) 13 | jtag newtap lpc2148 one -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4f1f0f0f 14 | 15 | #target configuration 16 | #daemon_startup reset 17 | 18 | set _TARGETNAME [format "%s.cpu" lpc2148] 19 | target create lpc2148.cpu arm7tdmi -endian little -work-area-size 0x4000 -work-area-phys 0x40000000 -work-area-backup 0 20 | 21 | $_TARGETNAME configure -event reset-init { 22 | soft_reset_halt 23 | mvb 0xE01FC040 0x01 24 | } 25 | 26 | 27 | 28 | set _FLASHNAME $_CHIPNAME.flash 29 | flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 30 | 31 | -------------------------------------------------------------------------------- /03_LCD_Example_EM-32G880F128-STK_basic/EmBlocks/openocd-0.8.0/source/info.txt: -------------------------------------------------------------------------------- 1 | You can download the source code from sourceforge 2 | http://sourceforge.net/projects/openocd/files/openocd/0.8.0/ -------------------------------------------------------------------------------- /Datasheet/EM-32G880F128-STK-SCHEMATIC.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nopeppermint/openocd_efm32/4e91368c933e1357ba97155af134f3eba0a48e7a/Datasheet/EM-32G880F128-STK-SCHEMATIC.pdf -------------------------------------------------------------------------------- /Datasheet/STM32F4Discovery.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nopeppermint/openocd_efm32/4e91368c933e1357ba97155af134f3eba0a48e7a/Datasheet/STM32F4Discovery.pdf -------------------------------------------------------------------------------- /Datasheet/stlink_olimex_wire.JPG: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nopeppermint/openocd_efm32/4e91368c933e1357ba97155af134f3eba0a48e7a/Datasheet/stlink_olimex_wire.JPG -------------------------------------------------------------------------------- /emlib/inc/em_acmp.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nopeppermint/openocd_efm32/4e91368c933e1357ba97155af134f3eba0a48e7a/emlib/inc/em_acmp.h -------------------------------------------------------------------------------- /putty.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/nopeppermint/openocd_efm32/4e91368c933e1357ba97155af134f3eba0a48e7a/putty.exe --------------------------------------------------------------------------------