├── .gitignore ├── include └── spi-bcm283x-rtdm.h ├── README.md ├── ksrc ├── spi-bcm283x-rtdm.c ├── bcm2835.c └── bcm2835.h └── LICENSE /.gitignore: -------------------------------------------------------------------------------- 1 | # Ignore Eclipse project files 2 | .project 3 | .cproject 4 | .settings/* 5 | 6 | # Ignore build generated files 7 | build/* 8 | !build/Makefile 9 | ksrc/*.o 10 | ksrc/*.o.cmd 11 | 12 | # Ignore release files 13 | release/* 14 | -------------------------------------------------------------------------------- /include/spi-bcm283x-rtdm.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Copyright (C) 2016 Nicolas Schurando 3 | * 4 | * This program is free software; you can redistribute it and/or 5 | * modify it under the terms of the GNU General Public License 6 | * as published by the Free Software Foundation; either version 2 7 | * of the License, or (at your option) any later version. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * GNU General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU General Public License 15 | * along with this program; if not, write to the Free Software Foundation, 16 | * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 17 | */ 18 | 19 | #ifndef BCM283X_SPI_RTDM_H 20 | #define BCM283X_SPI_RTDM_H 21 | 22 | /** 23 | * Maximum size for transmit and receive buffers. 24 | */ 25 | #define BCM283X_SPI_BUFFER_SIZE_MAX 1024 26 | 27 | /** 28 | * IOCTL request for changing the SPI bit order. 29 | */ 30 | #define BCM283X_SPI_SET_BIT_ORDER 0 31 | 32 | /** 33 | * IOCTL request for changing the SPI data mode. 34 | */ 35 | #define BCM283X_SPI_SET_DATA_MODE 1 36 | 37 | /** 38 | * IOCTL request for changing the SPI bus speed. 39 | */ 40 | #define BCM283X_SPI_SET_SPEED 2 41 | 42 | /** 43 | * IOCTL request for changing the SPI chip select polarity. 44 | */ 45 | #define BCM283X_SPI_SET_CS_POLARITY 3 46 | 47 | /** 48 | * List of available speeds for the SPI bus. 49 | */ 50 | typedef enum bcm283x_spi_speed { 51 | BCM283X_SPI_SPEED_4kHz = 0, 52 | BCM283X_SPI_SPEED_7kHz = 32768, 53 | BCM283X_SPI_SPEED_15kHz = 16384, 54 | BCM283X_SPI_SPEED_30kHz = 8192, 55 | BCM283X_SPI_SPEED_61kHz = 4096, 56 | BCM283X_SPI_SPEED_122kHz = 2048, 57 | BCM283X_SPI_SPEED_244kHz = 1024, 58 | BCM283X_SPI_SPEED_488kHz = 512, 59 | BCM283X_SPI_SPEED_976kHz = 256, 60 | BCM283X_SPI_SPEED_2MHz = 128, 61 | BCM283X_SPI_SPEED_4MHz = 64, 62 | BCM283X_SPI_SPEED_8MHz = 32, 63 | BCM283X_SPI_SPEED_15MHz = 16, 64 | BCM283X_SPI_SPEED_31MHz = 8, 65 | BCM283X_SPI_SPEED_62MHz = 4, 66 | BCM283X_SPI_SPEED_125MHz = 2 67 | } bcm2835_spi_speed_e; 68 | 69 | /** 70 | * SPI chip select polarity. 71 | */ 72 | typedef enum { 73 | BCM283X_SPI_CS_POL_LOW = 0, 74 | BCM283X_SPI_CS_POL_HIGH = 1 75 | } bcm283x_spi_cs_polarity_e; 76 | 77 | /** 78 | * SPI data bit ordering. 79 | */ 80 | typedef enum { 81 | BCM283X_SPI_BIT_ORDER_LSBFIRST = 0, 82 | BCM283X_SPI_BIT_ORDER_MSBFIRST = 1 83 | } bcm283x_spi_bit_order_e; 84 | 85 | /** 86 | * SPI data mode. 87 | * - Mode 0 : CPOL = 0, CPHA = 0 88 | * - Mode 1 : CPOL = 0, CPHA = 1 89 | * - Mode 2 : CPOL = 1, CPHA = 0 90 | * - Mode 3 : CPOL = 1, CPHA = 1 91 | */ 92 | typedef enum { 93 | BCM283X_SPI_DATA_MODE_0 = 0, 94 | BCM283X_SPI_DATA_MODE_1 = 1, 95 | BCM283X_SPI_DATA_MODE_2 = 2, 96 | BCM283X_SPI_DATA_MODE_3 = 3 97 | } bcm283x_spi_mode_e; 98 | 99 | #endif /* BCM283X_SPI_RTDM_H */ 100 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # spi-bcm283x-rtdm 2 | 3 | Real-Time SPI driver for the Broadcom BCM2835 (BCM2708) and BCM2836 (BCM2709) SoCs using the RTDM API. 4 | 5 | ## Introduction 6 | 7 | This RTDM driver is intended to provide SPI communication between a Raspberry Pi running Xenomai 3.0 (or greater, potentially) and a maximum of two slave devices. 8 | 9 | ## Limitations 10 | 11 | The driver currently only supports blocking data transfer. 12 | 13 | Possible future improvements would be implementing interrupt-based and dma-based transfer. 14 | 15 | ## Build 16 | 17 | The provided makefile will build the module out-of-tree. 18 | If you are unfamiliar with this technique, you can read the related documentation at https://www.kernel.org/doc/Documentation/kbuild/modules.txt. 19 | This requires that you provide, as an argument, the location of the sources of an already built Xenomai-enabled kernel. 20 | 21 | Start by retrieving the source of the driver. 22 | ```bash 23 | $ git clone https://github.com/nicolas-schurando/spi-bcm283x-rtdm.git 24 | ``` 25 | 26 | Then build against your already built kernel source. 27 | ```bash 28 | $ make ARCH=arm CROSS_COMPILER=/path-to-gcc/prefix- KERNEL_DIR=/path-to-kernel-sources 29 | ``` 30 | 31 | Upon success, the release sub-folder will be populated with the generated kernel module. 32 | 33 | ## Usage 34 | 35 | Copy the generated kernel module onto the target and load it with the following command. 36 | ```bash 37 | $ sudo insmod spi-bcm283x-rtdm.ko 38 | ``` 39 | 40 | The system log should display something like: 41 | ``` 42 | [ 59.577534] bcm283x_spi_rtdm_init: Starting driver ... 43 | [ 59.577582] bcm2835_init: Found device-tree node /soc. 44 | [ 59.577615] bcm2835_init: /soc/ranges = 0x7e000000 0x3f000000 0x01000000. 45 | [ 59.577638] bcm2835_init: Using device-tree values. 46 | [ 59.577998] mapmem: mapping 0x3f000000 for gpio succeded to 0xbe000000 47 | [ 59.578867] bcm283x_spi_rtdm_init: Device spidev0.0 registered without errors. 48 | [ 59.579362] bcm283x_spi_rtdm_init: Device spidev0.1 registered without errors. 49 | ``` 50 | 51 | Once loaded, the driver will expose the two devices listed below. 52 | The number before the dot refers to the SPI interface and the number after the dot corresponds to the chip select pin. 53 | The Raspberry Pi only exposes the SPI0 interface, with CS0 and CS1. 54 | * `/dev/rtdm/spidev0.0` 55 | * `/dev/rtdm/spidev0.1` 56 | 57 | The driver uses hard-coded values for the Pi 1, but needs to fetch information from the device tree if running on a Pi 2. 58 | For the latter, make sure that you compiled the kernel with device-tree enabled, and that you used the `mkknlimg` tool to add the DT-compatibility trailer. 59 | 60 | Finally, below are a few relevant lines that should help you make use of the driver inside a Xenomai application. 61 | ```c 62 | /* RTDM header */ 63 | #include 64 | 65 | /* BCM283x SPI RTDM driver header */ 66 | #include "spi-bcm283x-rtdm.h" 67 | 68 | /** Transmit buffer */ 69 | static uint8_t tx_buffer[BCM283X_SPI_BUFFER_SIZE_MAX]; 70 | 71 | /** Receive buffer */ 72 | static uint8_t rx_buffer[BCM283X_SPI_BUFFER_SIZE_MAX]; 73 | 74 | /** Handle to the bcm283x rtdm spi driver instance. */ 75 | static int device_handle = -1; 76 | 77 | /** 78 | * Open and configure device 79 | * @return 0 in case of success, a negative value otherwise. 80 | */ 81 | int open_device() { 82 | 83 | int res; 84 | int value; 85 | 86 | /* Open device */ 87 | res = open("/dev/rtdm/spidev0.0", O_RDWR); 88 | if (res < 0) { 89 | printf("%s: Could not open spi device, open has failed with %d (%s).", __FUNCTION__, errno, strerror(errno)); 90 | return; 91 | } else { 92 | printf("%s: Device opened.", __FUNCTION__); 93 | device_handle = res; 94 | } 95 | 96 | /* Configure device */ 97 | value = BCM283X_SPI_BIT_ORDER_MSBFIRST; 98 | res = ioctl(device_handle, BCM283X_SPI_SET_BIT_ORDER, &value); 99 | if (res < 0) { 100 | printf("%s: Could not configure bit order, ioctl has failed with %d (%s).", __FUNCTION__, errno, strerror(errno)); 101 | device_handle = NULL; 102 | return -1; 103 | } 104 | value = BCM283X_SPI_DATA_MODE_0; 105 | res = ioctl(device_handle, BCM283X_SPI_SET_DATA_MODE, &value); 106 | if (res < 0) { 107 | printf("%s: Could not configure data mode, ioctl has failed with %d (%s).", __FUNCTION__, errno, strerror(errno)); 108 | device_handle = NULL; 109 | return -1; 110 | } 111 | value = BCM283X_SPI_SPEED_8MHz; 112 | res = ioctl(device_handle, BCM283X_SPI_SET_SPEED, &value); 113 | if (res < 0) { 114 | printf("%s: Could not configure bus speed, ioctl has failed with %d (%s).", __FUNCTION__, errno, strerror(errno)); 115 | device_handle = NULL; 116 | return -1; 117 | } 118 | value = BCM283X_SPI_CS_POL_LOW; 119 | res = ioctl(device_handle, BCM283X_SPI_SET_CS_POLARITY, &value); 120 | if (res < 0) { 121 | printf("%s: Could not configure chip select polarity, ioctl has failed with %d (%s).", __FUNCTION__, errno, strerror(errno)); 122 | device_handle = NULL; 123 | return -1; 124 | } 125 | 126 | printf("%s: Device sucessfully configured.", __FUNCTION__); 127 | return 0; 128 | 129 | } 130 | 131 | int main() { 132 | 133 | int res; 134 | 135 | /* Open device */ 136 | res = open_device(); 137 | if (res < 0) { 138 | printf("%s: Could not open device, exiting.", __FUNCTION__); 139 | return -1; 140 | } 141 | 142 | /* Do stuff */ 143 | while (...) { 144 | ssize_t size; 145 | 146 | /* Write from tx buffer */ 147 | size = write(device_handle, (const void *) tx_buffer, spi_frame_size); 148 | 149 | /* Receive to rx buffer */ 150 | memset(rx_buffer, 0, 1024); 151 | size = read(device_handle, (void *) rx_buffer, spi_frame_size); 152 | 153 | /* ... */ 154 | } 155 | 156 | } 157 | ``` 158 | 159 | ## Credits 160 | 161 | This code should be considered as a wrapper around the great user-space bcm2835 library written by Mike McCauley and available at http://www.airspayce.com/mikem/bcm2835/. 162 | 163 | His code underwent only minor modifications, in order to make it compatible with kernel-space. 164 | 165 | Both the original work and this driver are licensed under the GNU General Public License version 2 (GPLv2). 166 | 167 | Comments, issues, and contributions are welcome. 168 | 169 | Author Nicolas Schurando (schurann@ext.essilor.com). -------------------------------------------------------------------------------- /ksrc/spi-bcm283x-rtdm.c: -------------------------------------------------------------------------------- 1 | /** 2 | * Copyright (C) 2016 Nicolas Schurando 3 | * 4 | * This program is free software; you can redistribute it and/or 5 | * modify it under the terms of the GNU General Public License 6 | * as published by the Free Software Foundation; either version 2 7 | * of the License, or (at your option) any later version. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * GNU General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU General Public License 15 | * along with this program; if not, write to the Free Software Foundation, 16 | * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 17 | */ 18 | 19 | /* Self header */ 20 | #include "../include/spi-bcm283x-rtdm.h" 21 | 22 | /* Linux headers */ 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include 28 | 29 | /* RTDM headers */ 30 | #include 31 | #include 32 | 33 | /* BCM2835 library header */ 34 | #include "bcm2835.h" 35 | 36 | /* Bypass eclipse syntax checker */ 37 | #ifdef __CDT_PARSER__ 38 | #define __init 39 | #define __exit 40 | #endif /* __CDT_PARSER__ */ 41 | 42 | /** 43 | * Buffer type. 44 | */ 45 | typedef struct buffer_s { 46 | int size; 47 | char data[BCM283X_SPI_BUFFER_SIZE_MAX]; 48 | } buffer_t; 49 | 50 | /** 51 | * Device config structure stored inside each context. 52 | */ 53 | typedef struct config_s { 54 | int bit_order; 55 | int data_mode; 56 | int clock_divider; 57 | int chip_select; 58 | int chip_select_polarity; 59 | } config_t; 60 | 61 | /** 62 | * Device context, associated with every open device instance. 63 | */ 64 | typedef struct spi_bcm283x_context_s { 65 | config_t config; 66 | buffer_t transmit_buffer; 67 | buffer_t receive_buffer; 68 | } spi_bcm283x_context_t; 69 | 70 | /** 71 | * This structure enumerates the two RTDM devices created for SPI0. 72 | */ 73 | static struct rtdm_device spi_bcm283x_devices[2]; 74 | 75 | /** 76 | * Open handler. Note: opening a named device instance always happens from secondary mode. 77 | * @param[in] fd File descriptor associated with opened device instance. 78 | * @param[in] oflags Open flags as passed by the user. 79 | * @return 0 on success. On failure, a negative error code is returned. 80 | */ 81 | static int bcm283x_spi_rtdm_open(struct rtdm_fd *fd, int oflags) { 82 | 83 | spi_bcm283x_context_t *context; 84 | 85 | /* Retrieve context */ 86 | context = (spi_bcm283x_context_t *) rtdm_fd_to_private(fd); 87 | 88 | /* Set default config */ 89 | context->config.bit_order = BCM2835_SPI_BIT_ORDER_MSBFIRST; 90 | context->config.data_mode = BCM2835_SPI_MODE0; 91 | context->config.clock_divider = BCM2835_SPI_CLOCK_DIVIDER_65536; 92 | context->config.chip_select = rtdm_fd_minor(fd); 93 | context->config.chip_select_polarity = LOW; 94 | 95 | return 0; 96 | 97 | } 98 | 99 | /** 100 | * Close handler. Note: closing a device instance always happens from secondary mode. 101 | * @param[in] fd File descriptor associated with opened device instance. 102 | * @return 0 on success. On failure return a negative error code. 103 | */ 104 | static void bcm283x_spi_rtdm_close(struct rtdm_fd *fd) { 105 | 106 | return; 107 | 108 | } 109 | 110 | /** 111 | * Read from the device. 112 | * @param[in] fd File descriptor. 113 | * @param[out] buf Input buffer as passed by the user. 114 | * @param[in] size Number of bytes the user requests to read. 115 | * @return On success, the number of bytes read. On failure return either -ENOSYS, to request that this handler be called again from the opposite realtime/non-realtime context, or another negative error code. 116 | */ 117 | static ssize_t bcm283x_spi_rtdm_read_rt(struct rtdm_fd *fd, void __user *buf, size_t size) { 118 | 119 | spi_bcm283x_context_t *context; 120 | size_t read_size; 121 | int res; 122 | 123 | /* Retrieve context */ 124 | context = (spi_bcm283x_context_t *) rtdm_fd_to_private(fd); 125 | 126 | /* Limit size */ 127 | read_size = (size > BCM283X_SPI_BUFFER_SIZE_MAX) ? BCM283X_SPI_BUFFER_SIZE_MAX : size; 128 | read_size = (read_size > context->receive_buffer.size) ? context->receive_buffer.size : read_size; 129 | 130 | /* Copy data to user space */ 131 | res = rtdm_safe_copy_to_user(fd, buf, (const void *) context->receive_buffer.data, read_size); 132 | if (res) { 133 | printk(KERN_ERR "%s: Can't copy data from driver to user space (%d)!\r\n", __FUNCTION__, res); 134 | return (res < 0) ? res : -res; 135 | } 136 | 137 | /* Reset buffer size */ 138 | context->receive_buffer.size = 0; 139 | 140 | /* Return read bytes */ 141 | return read_size; 142 | 143 | } 144 | 145 | /** 146 | * Write to the device. 147 | * @warning If unread data was present in the receive buffer, it will be overwritten. 148 | * @param[in] fd File descriptor. 149 | * @param[in] buf Output buffer as passed by the user. 150 | * @param[in] size Number of bytes the user requests to write. 151 | * @return On success, the number of bytes written. On failure return either -ENOSYS, to request that this handler be called again from the opposite realtime/non-realtime context, or another negative error code. 152 | */ 153 | static ssize_t bcm283x_spi_rtdm_write_rt(struct rtdm_fd *fd, const void __user *buf, size_t size) { 154 | 155 | spi_bcm283x_context_t *context; 156 | size_t write_size; 157 | int res; 158 | 159 | /* Ensure that there will be enough space in the buffer */ 160 | if (size > BCM283X_SPI_BUFFER_SIZE_MAX) { 161 | printk(KERN_ERR "%s: Trying to transmit data larger than buffer size !", __FUNCTION__); 162 | return -EINVAL; 163 | } 164 | write_size = size; 165 | 166 | /* Retrieve context */ 167 | context = (spi_bcm283x_context_t *) rtdm_fd_to_private(fd); 168 | 169 | /* Save data in kernel space buffer */ 170 | res = rtdm_safe_copy_from_user(fd, context->transmit_buffer.data, buf, write_size); 171 | if (res) { 172 | printk(KERN_ERR "%s: Can't copy data from user space to driver (%d)!\r\n", __FUNCTION__, res); 173 | return (res < 0) ? res : -res; 174 | } 175 | context->transmit_buffer.size = write_size; 176 | 177 | /* Warn if receive buffer was not empty */ 178 | if (context->receive_buffer.size > 0) { 179 | printk(KERN_WARNING "%s: Receive buffer was not empty and will be overwritten.\r\n", __FUNCTION__); 180 | } 181 | 182 | /* Restore device spi settings */ 183 | bcm2835_spi_setBitOrder(context->config.bit_order); 184 | bcm2835_spi_setDataMode(context->config.data_mode); 185 | bcm2835_spi_setClockDivider(context->config.clock_divider); 186 | bcm2835_spi_setChipSelectPolarity(context->config.chip_select, context->config.chip_select_polarity); 187 | 188 | /* Initiate an outgoing transfer which will also store read content in input buffer. */ 189 | bcm2835_spi_chipSelect(context->config.chip_select); 190 | bcm2835_spi_transfernb(context->transmit_buffer.data, context->receive_buffer.data, write_size); 191 | context->receive_buffer.size = write_size; 192 | 193 | /* Return bytes written */ 194 | return write_size; 195 | 196 | } 197 | 198 | /** 199 | * Changes the bit order setting for one device. 200 | * @param context The context associated with the device. 201 | * @param value An integer representing a bit order preference. 202 | * @return 0 on success, -EINVAL if the specified value is invalid. 203 | */ 204 | static int bcm283x_spi_change_bit_order(spi_bcm283x_context_t *context, const int value) { 205 | 206 | switch (value) { 207 | case BCM283X_SPI_BIT_ORDER_LSBFIRST: 208 | case BCM283X_SPI_BIT_ORDER_MSBFIRST: 209 | printk(KERN_DEBUG "%s: Changing bit order to %d.\r\n", __FUNCTION__, value); 210 | context->config.bit_order = value; 211 | return 0; 212 | } 213 | 214 | printk(KERN_ERR "%s: Unexpected value!\r\n", __FUNCTION__); 215 | return -EINVAL; 216 | 217 | } 218 | 219 | /** 220 | * Changes the data mode setting for one device. 221 | * @param context The context associated with the device. 222 | * @param value An integer representing a data mode. 223 | * @return 0 on success, -EINVAL if the specified value is invalid. 224 | */ 225 | static int bcm283x_spi_change_data_mode(spi_bcm283x_context_t *context, const int value) { 226 | 227 | switch (value) { 228 | case BCM283X_SPI_DATA_MODE_0: 229 | case BCM283X_SPI_DATA_MODE_1: 230 | case BCM283X_SPI_DATA_MODE_2: 231 | case BCM283X_SPI_DATA_MODE_3: 232 | printk(KERN_DEBUG "%s: Changing data mode to %d.\r\n", __FUNCTION__, value); 233 | context->config.data_mode = value; 234 | return 0; 235 | } 236 | 237 | printk(KERN_ERR "%s: Unexpected value!\r\n", __FUNCTION__); 238 | return -EINVAL; 239 | 240 | } 241 | 242 | /** 243 | * Changes the clock divider setting for one device. 244 | * @param context The context associated with the device. 245 | * @param value An integer representing a clock divider preference. 246 | * @return 0 on success, -EINVAL if the specified value is invalid. 247 | */ 248 | static int bcm283x_spi_change_clock_divider(spi_bcm283x_context_t *context, const int value) { 249 | 250 | switch (value) { 251 | case BCM283X_SPI_SPEED_4kHz: 252 | case BCM283X_SPI_SPEED_7kHz: 253 | case BCM283X_SPI_SPEED_15kHz: 254 | case BCM283X_SPI_SPEED_30kHz: 255 | case BCM283X_SPI_SPEED_61kHz: 256 | case BCM283X_SPI_SPEED_122kHz: 257 | case BCM283X_SPI_SPEED_244kHz: 258 | case BCM283X_SPI_SPEED_488kHz: 259 | case BCM283X_SPI_SPEED_976kHz: 260 | case BCM283X_SPI_SPEED_2MHz: 261 | case BCM283X_SPI_SPEED_4MHz: 262 | case BCM283X_SPI_SPEED_8MHz: 263 | case BCM283X_SPI_SPEED_15MHz: 264 | case BCM283X_SPI_SPEED_31MHz: 265 | case BCM283X_SPI_SPEED_62MHz: 266 | case BCM283X_SPI_SPEED_125MHz: 267 | printk(KERN_DEBUG "%s: Changing clock divider to %d.\r\n", __FUNCTION__, value); 268 | context->config.clock_divider = value; 269 | return 0; 270 | } 271 | 272 | printk(KERN_ERR "%s: Unexpected value!\r\n", __FUNCTION__); 273 | return -EINVAL; 274 | } 275 | 276 | /** 277 | * Changes the chip select polarity setting for one device. 278 | * @param context The context associated with the device. 279 | * @param value An integer representing a polarity preference. 280 | * @return 0 on success, -EINVAL if the specified value is invalid. 281 | */ 282 | static int bcm283x_spi_change_cs_polarity(spi_bcm283x_context_t *context, const int value) { 283 | 284 | switch (value) { 285 | case BCM283X_SPI_CS_POL_LOW: 286 | case BCM283X_SPI_CS_POL_HIGH: 287 | printk(KERN_DEBUG "%s: Changing chip select polarity to %d.\r\n", __FUNCTION__, value); 288 | context->config.chip_select_polarity = value; 289 | return 0; 290 | } 291 | 292 | printk(KERN_ERR "%s: Unexpected value!\r\n", __FUNCTION__); 293 | return -EINVAL; 294 | 295 | } 296 | 297 | /** 298 | * IOCTL handler. 299 | * @param[in] fd File descriptor. 300 | * @param[in] request Request number as passed by the user. 301 | * @param[in,out] arg Request argument as passed by the user. 302 | * @return A positive value or 0 on success. On failure return either -ENOSYS, to request that the function be called again from the opposite realtime/non-realtime context, or another negative error code. 303 | */ 304 | static int bcm283x_spi_rtdm_ioctl_rt(struct rtdm_fd *fd, unsigned int request, void __user *arg) { 305 | 306 | spi_bcm283x_context_t *context; 307 | int value; 308 | int res; 309 | 310 | /* Retrieve context */ 311 | context = (spi_bcm283x_context_t *) rtdm_fd_to_private(fd); 312 | 313 | /* 314 | * // Speed 315 | bcm2835_spi_setBitOrder(BCM2835_SPI_BIT_ORDER_MSBFIRST); 316 | bcm2835_spi_setDataMode(BCM2835_SPI_MODE0); 317 | bcm2835_spi_setClockDivider(BCM2835_SPI_CLOCK_DIVIDER_65536); 318 | bcm2835_spi_chipSelect(BCM2835_SPI_CS_NONE); 319 | */ 320 | 321 | 322 | /* Analyze request */ 323 | switch (request) { 324 | 325 | case BCM283X_SPI_SET_BIT_ORDER: /* Change the bit order */ 326 | res = rtdm_safe_copy_from_user(fd, &value, arg, sizeof(int)); 327 | if (res) { 328 | printk(KERN_ERR "%s: Can't retrieve argument from user space (%d)!\r\n", __FUNCTION__, res); 329 | return (res < 0) ? res : -res; 330 | } 331 | return bcm283x_spi_change_bit_order(context, value); 332 | 333 | case BCM283X_SPI_SET_DATA_MODE: /* Change the data mode */ 334 | res = rtdm_safe_copy_from_user(fd, &value, arg, sizeof(int)); 335 | if (res) { 336 | printk(KERN_ERR "%s: Can't retrieve argument from user space (%d)!\r\n", __FUNCTION__, res); 337 | return (res < 0) ? res : -res; 338 | } 339 | return bcm283x_spi_change_data_mode(context, value); 340 | 341 | case BCM283X_SPI_SET_SPEED: /* Change the bus speed */ 342 | res = rtdm_safe_copy_from_user(fd, &value, arg, sizeof(int)); 343 | if (res) { 344 | printk(KERN_ERR "%s: Can't retrieve argument from user space (%d)!\r\n", __FUNCTION__, res); 345 | return (res < 0) ? res : -res; 346 | } 347 | return bcm283x_spi_change_clock_divider(context, value); 348 | 349 | case BCM283X_SPI_SET_CS_POLARITY: /* Change the chip select polarity */ 350 | res = rtdm_safe_copy_from_user(fd, &value, arg, sizeof(int)); 351 | if (res) { 352 | printk(KERN_ERR "%s: Can't retrieve argument from user space (%d)!\r\n", __FUNCTION__, res); 353 | return (res < 0) ? res : -res; 354 | } 355 | return bcm283x_spi_change_cs_polarity(context, value); 356 | 357 | default: /* Unexpected case */ 358 | printk(KERN_ERR "%s: Unexpected request : %d!\r\n", __FUNCTION__, request); 359 | return -EINVAL; 360 | 361 | } 362 | 363 | } 364 | 365 | /** 366 | * This structure describes the RTDM driver. 367 | */ 368 | static struct rtdm_driver spi_bcm283x_driver = { 369 | .profile_info = RTDM_PROFILE_INFO(foo, RTDM_CLASS_EXPERIMENTAL, RTDM_SUBCLASS_GENERIC, 42), 370 | .device_flags = RTDM_NAMED_DEVICE | RTDM_EXCLUSIVE | RTDM_FIXED_MINOR, 371 | .device_count = 2, 372 | .context_size = sizeof(struct spi_bcm283x_context_s), 373 | .ops = { 374 | .open = bcm283x_spi_rtdm_open, 375 | .read_rt = bcm283x_spi_rtdm_read_rt, 376 | .write_rt = bcm283x_spi_rtdm_write_rt, 377 | .ioctl_rt = bcm283x_spi_rtdm_ioctl_rt, 378 | .close = bcm283x_spi_rtdm_close 379 | } 380 | }; 381 | 382 | /** 383 | * This function is called when the module is loaded. It initializes the 384 | * spi device using the bcm2835 libary, and registers the RTDM device. 385 | */ 386 | static int __init bcm283x_spi_rtdm_init(void) { 387 | 388 | int res; 389 | int device_id; 390 | 391 | /* Log */ 392 | printk(KERN_INFO "%s: Starting driver ...", __FUNCTION__); 393 | 394 | /* Ensure cobalt is enabled */ 395 | if (!realtime_core_enabled()) { 396 | printk(KERN_ERR "%s: Exiting as cobalt is not enabled!\r\n", __FUNCTION__); 397 | return -1; 398 | } 399 | 400 | /* Initialize the bcm2835 library */ 401 | res = bcm2835_init(); 402 | if (res != 1) { 403 | printk(KERN_ERR "%s: Error in bcm2835_init (%d).\r\n", __FUNCTION__, res); 404 | return -1; 405 | } 406 | 407 | /* Configure the spi port from bcm2835 library with arbitrary settings */ 408 | bcm2835_spi_begin(); 409 | bcm2835_spi_setBitOrder(BCM2835_SPI_BIT_ORDER_MSBFIRST); 410 | bcm2835_spi_setDataMode(BCM2835_SPI_MODE0); 411 | bcm2835_spi_setClockDivider(BCM2835_SPI_CLOCK_DIVIDER_65536); 412 | bcm2835_spi_chipSelect(BCM2835_SPI_CS_NONE); 413 | 414 | /* Prepare to register the two devices */ 415 | for(device_id = 0; device_id < 2; device_id++){ 416 | 417 | /* Set device parameters */ 418 | spi_bcm283x_devices[device_id].driver = &spi_bcm283x_driver; 419 | spi_bcm283x_devices[device_id].label = "spidev0.%d"; 420 | spi_bcm283x_devices[device_id].minor = device_id; 421 | 422 | /* Try to register the device */ 423 | res = rtdm_dev_register(&spi_bcm283x_devices[device_id]); 424 | if (res == 0) { 425 | printk(KERN_INFO "%s: Device spidev0.%d registered without errors.\r\n", __FUNCTION__, device_id); 426 | } else { 427 | printk(KERN_ERR "%s: Device spidev0.%d registration failed : ", __FUNCTION__, device_id); 428 | switch (res) { 429 | case -EINVAL: 430 | printk(KERN_ERR "The descriptor contains invalid entries.\r\n"); 431 | break; 432 | 433 | case -EEXIST: 434 | printk(KERN_ERR "The specified device name of protocol ID is already in use.\r\n"); 435 | break; 436 | 437 | case -ENOMEM: 438 | printk(KERN_ERR "A memory allocation failed in the process of registering the device.\r\n"); 439 | break; 440 | 441 | default: 442 | printk(KERN_ERR "Unknown error code returned.\r\n"); 443 | break; 444 | } 445 | return res; 446 | } 447 | } 448 | 449 | return 0; 450 | 451 | } 452 | 453 | /** 454 | * This function is called when the module is unloaded. It unregisters the RTDM device. 455 | */ 456 | static void __exit bcm283x_spi_rtdm_exit(void) { 457 | 458 | int device_id; 459 | 460 | /* Log */ 461 | printk(KERN_INFO "%s: Stopping driver ...\r\n", __FUNCTION__); 462 | 463 | /* Ensure cobalt is enabled */ 464 | if (!realtime_core_enabled()) { 465 | printk(KERN_ERR "%s: Exiting as cobalt is not enabled!\r\n", __FUNCTION__); 466 | return; 467 | } 468 | 469 | /* Unregister the two devices */ 470 | for (device_id = 0; device_id < 2; device_id++) { 471 | printk(KERN_INFO "%s: Unregistering device %d ...\r\n", __FUNCTION__, device_id); 472 | rtdm_dev_unregister(&spi_bcm283x_devices[device_id]); 473 | } 474 | 475 | /* Release the spi pins */ 476 | bcm2835_spi_end(); 477 | 478 | /* Unmap memory */ 479 | bcm2835_close(); 480 | 481 | /* Log */ 482 | printk(KERN_INFO "%s: All done!\r\n", __FUNCTION__); 483 | 484 | } 485 | 486 | /* 487 | * Link init and exit functions with driver entry and exit points. 488 | */ 489 | module_init(bcm283x_spi_rtdm_init); 490 | module_exit(bcm283x_spi_rtdm_exit); 491 | 492 | /* 493 | * Register module values 494 | */ 495 | #ifndef GIT_VERSION 496 | #define GIT_VERSION 0.1-untracked 497 | #endif /* ! GIT_VERSION */ 498 | MODULE_VERSION(GIT_VERSION); 499 | MODULE_DESCRIPTION("Real-Time SPI driver for the Broadcom BCM283x SoC familly using the RTDM API"); 500 | MODULE_AUTHOR("Nicolas Schurando "); 501 | MODULE_LICENSE("GPL v2"); 502 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 2, June 1991 3 | 4 | Copyright (C) 1989, 1991 Free Software Foundation, Inc., 5 | 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 6 | Everyone is permitted to copy and distribute verbatim copies 7 | of this license document, but changing it is not allowed. 8 | 9 | Preamble 10 | 11 | The licenses for most software are designed to take away your 12 | freedom to share and change it. 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See the 304 | GNU General Public License for more details. 305 | 306 | You should have received a copy of the GNU General Public License along 307 | with this program; if not, write to the Free Software Foundation, Inc., 308 | 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 309 | 310 | Also add information on how to contact you by electronic and paper mail. 311 | 312 | If the program is interactive, make it output a short notice like this 313 | when it starts in an interactive mode: 314 | 315 | Gnomovision version 69, Copyright (C) year name of author 316 | Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 317 | This is free software, and you are welcome to redistribute it 318 | under certain conditions; type `show c' for details. 319 | 320 | The hypothetical commands `show w' and `show c' should show the appropriate 321 | parts of the General Public License. Of course, the commands you use may 322 | be called something other than `show w' and `show c'; they could even be 323 | mouse-clicks or menu items--whatever suits your program. 324 | 325 | You should also get your employer (if you work as a programmer) or your 326 | school, if any, to sign a "copyright disclaimer" for the program, if 327 | necessary. Here is a sample; alter the names: 328 | 329 | Yoyodyne, Inc., hereby disclaims all copyright interest in the program 330 | `Gnomovision' (which makes passes at compilers) written by James Hacker. 331 | 332 | {signature of Ty Coon}, 1 April 1989 333 | Ty Coon, President of Vice 334 | 335 | This General Public License does not permit incorporating your program into 336 | proprietary programs. If your program is a subroutine library, you may 337 | consider it more useful to permit linking proprietary applications with the 338 | library. If this is what you want to do, use the GNU Lesser General 339 | Public License instead of this License. 340 | 341 | -------------------------------------------------------------------------------- /ksrc/bcm2835.c: -------------------------------------------------------------------------------- 1 | /* bcm2835.c 2 | // C and C++ support for Broadcom BCM 2835 as used in Raspberry Pi 3 | // http://elinux.org/RPi_Low-level_peripherals 4 | // http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf 5 | // 6 | // Author: Mike McCauley 7 | // Copyright (C) 2011-2013 Mike McCauley 8 | // $Id: bcm2835.c,v 1.23 2015/03/31 04:55:41 mikem Exp mikem $ 9 | */ 10 | 11 | 12 | #include 13 | #include 14 | #include 15 | #include 16 | #include 17 | #include 18 | #include 19 | #include 20 | #include 21 | 22 | #define BCK2835_LIBRARY_BUILD 23 | #include "bcm2835.h" 24 | 25 | /* Return value of `mmap' in case of an error, as a replacement of the one provided by mman.h */ 26 | #define MAP_FAILED ((void *) -1) 27 | 28 | /* Uncommenting this define compiles alternative I2C code for the version 1 RPi 29 | // The P1 header I2C pins are connected to SDA0 and SCL0 on V1. 30 | // By default I2C code is generated for the V2 RPi which has SDA1 and SCL1 connected. 31 | */ 32 | /* #define I2C_V1*/ 33 | 34 | /* Physical address and size of the peripherals block 35 | // May be overridden on RPi2 36 | */ 37 | uint32_t *bcm2835_peripherals_base = (uint32_t *)BCM2835_PERI_BASE; 38 | uint32_t bcm2835_peripherals_size = BCM2835_PERI_SIZE; 39 | 40 | /* Virtual memory address of the mapped peripherals block 41 | */ 42 | uint32_t *bcm2835_peripherals = (uint32_t *)MAP_FAILED; 43 | 44 | /* And the register bases within the peripherals block 45 | */ 46 | volatile uint32_t *bcm2835_gpio = (uint32_t *)MAP_FAILED; 47 | volatile uint32_t *bcm2835_pwm = (uint32_t *)MAP_FAILED; 48 | volatile uint32_t *bcm2835_clk = (uint32_t *)MAP_FAILED; 49 | volatile uint32_t *bcm2835_pads = (uint32_t *)MAP_FAILED; 50 | volatile uint32_t *bcm2835_spi0 = (uint32_t *)MAP_FAILED; 51 | volatile uint32_t *bcm2835_bsc0 = (uint32_t *)MAP_FAILED; 52 | volatile uint32_t *bcm2835_bsc1 = (uint32_t *)MAP_FAILED; 53 | volatile uint32_t *bcm2835_st = (uint32_t *)MAP_FAILED; 54 | 55 | /* SoC ranges from device tree 56 | */ 57 | struct dt_soc_ranges{ 58 | uint32_t p1; 59 | uint32_t p2; 60 | uint32_t p3; 61 | }; 62 | 63 | /* This variable allows us to test on hardware other than RPi. 64 | // It prevents access to the kernel memory, and does not do any peripheral access 65 | // Instead it prints out what it _would_ do if debug were 0 66 | */ 67 | static uint8_t debug = 0; 68 | 69 | /* I2C The time needed to transmit one byte. In microseconds. 70 | */ 71 | static int i2c_byte_wait_us = 0; 72 | 73 | /* 74 | // Low level register access functions 75 | */ 76 | 77 | /* Function to return the pointers to the hardware register bases */ 78 | uint32_t* bcm2835_regbase(uint8_t regbase) 79 | { 80 | switch (regbase) 81 | { 82 | case BCM2835_REGBASE_ST: 83 | return (uint32_t *)bcm2835_st; 84 | case BCM2835_REGBASE_GPIO: 85 | return (uint32_t *)bcm2835_gpio; 86 | case BCM2835_REGBASE_PWM: 87 | return (uint32_t *)bcm2835_pwm; 88 | case BCM2835_REGBASE_CLK: 89 | return (uint32_t *)bcm2835_clk; 90 | case BCM2835_REGBASE_PADS: 91 | return (uint32_t *)bcm2835_pads; 92 | case BCM2835_REGBASE_SPI0: 93 | return (uint32_t *)bcm2835_spi0; 94 | case BCM2835_REGBASE_BSC0: 95 | return (uint32_t *)bcm2835_bsc0; 96 | case BCM2835_REGBASE_BSC1: 97 | return (uint32_t *)bcm2835_st; 98 | } 99 | return (uint32_t *)MAP_FAILED; 100 | } 101 | 102 | void bcm2835_set_debug(uint8_t d) 103 | { 104 | debug = d; 105 | } 106 | 107 | unsigned int bcm2835_version(void) 108 | { 109 | return BCM2835_VERSION; 110 | } 111 | 112 | /* Read with memory barriers from peripheral 113 | * 114 | */ 115 | uint32_t bcm2835_peri_read(volatile uint32_t* paddr) 116 | { 117 | uint32_t ret; 118 | if (debug) 119 | { 120 | printk("bcm2835_peri_read paddr %08X\n", (unsigned) paddr); 121 | return 0; 122 | } 123 | else 124 | { 125 | __sync_synchronize(); 126 | ret = *paddr; 127 | __sync_synchronize(); 128 | return ret; 129 | } 130 | } 131 | 132 | /* read from peripheral without the read barrier 133 | * This can only be used if more reads to THE SAME peripheral 134 | * will follow. The sequence must terminate with memory barrier 135 | * before any read or write to another peripheral can occur. 136 | * The MB can be explicit, or one of the barrier read/write calls. 137 | */ 138 | uint32_t bcm2835_peri_read_nb(volatile uint32_t* paddr) 139 | { 140 | if (debug) 141 | { 142 | printk("bcm2835_peri_read_nb paddr %08X\n", (unsigned) paddr); 143 | return 0; 144 | } 145 | else 146 | { 147 | return *paddr; 148 | } 149 | } 150 | 151 | /* Write with memory barriers to peripheral 152 | */ 153 | 154 | void bcm2835_peri_write(volatile uint32_t* paddr, uint32_t value) 155 | { 156 | if (debug) 157 | { 158 | printk("bcm2835_peri_write paddr %08X, value %08X\n", (unsigned) paddr, value); 159 | } 160 | else 161 | { 162 | __sync_synchronize(); 163 | *paddr = value; 164 | __sync_synchronize(); 165 | } 166 | } 167 | 168 | /* write to peripheral without the write barrier */ 169 | void bcm2835_peri_write_nb(volatile uint32_t* paddr, uint32_t value) 170 | { 171 | if (debug) 172 | { 173 | printk("bcm2835_peri_write_nb paddr %08X, value %08X\n", 174 | (unsigned) paddr, value); 175 | } 176 | else 177 | { 178 | *paddr = value; 179 | } 180 | } 181 | 182 | /* Set/clear only the bits in value covered by the mask 183 | * This is not atomic - can be interrupted. 184 | */ 185 | void bcm2835_peri_set_bits(volatile uint32_t* paddr, uint32_t value, uint32_t mask) 186 | { 187 | uint32_t v = bcm2835_peri_read(paddr); 188 | v = (v & ~mask) | (value & mask); 189 | bcm2835_peri_write(paddr, v); 190 | } 191 | 192 | /* 193 | // Low level convenience functions 194 | */ 195 | 196 | /* Function select 197 | // pin is a BCM2835 GPIO pin number NOT RPi pin number 198 | // There are 6 control registers, each control the functions of a block 199 | // of 10 pins. 200 | // Each control register has 10 sets of 3 bits per GPIO pin: 201 | // 202 | // 000 = GPIO Pin X is an input 203 | // 001 = GPIO Pin X is an output 204 | // 100 = GPIO Pin X takes alternate function 0 205 | // 101 = GPIO Pin X takes alternate function 1 206 | // 110 = GPIO Pin X takes alternate function 2 207 | // 111 = GPIO Pin X takes alternate function 3 208 | // 011 = GPIO Pin X takes alternate function 4 209 | // 010 = GPIO Pin X takes alternate function 5 210 | // 211 | // So the 3 bits for port X are: 212 | // X / 10 + ((X % 10) * 3) 213 | */ 214 | void bcm2835_gpio_fsel(uint8_t pin, uint8_t mode) 215 | { 216 | /* Function selects are 10 pins per 32 bit word, 3 bits per pin */ 217 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPFSEL0/4 + (pin/10); 218 | uint8_t shift = (pin % 10) * 3; 219 | uint32_t mask = BCM2835_GPIO_FSEL_MASK << shift; 220 | uint32_t value = mode << shift; 221 | bcm2835_peri_set_bits(paddr, value, mask); 222 | } 223 | 224 | /* Set output pin */ 225 | void bcm2835_gpio_set(uint8_t pin) 226 | { 227 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPSET0/4 + pin/32; 228 | uint8_t shift = pin % 32; 229 | bcm2835_peri_write(paddr, 1 << shift); 230 | } 231 | 232 | /* Clear output pin */ 233 | void bcm2835_gpio_clr(uint8_t pin) 234 | { 235 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPCLR0/4 + pin/32; 236 | uint8_t shift = pin % 32; 237 | bcm2835_peri_write(paddr, 1 << shift); 238 | } 239 | 240 | /* Set all output pins in the mask */ 241 | void bcm2835_gpio_set_multi(uint32_t mask) 242 | { 243 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPSET0/4; 244 | bcm2835_peri_write(paddr, mask); 245 | } 246 | 247 | /* Clear all output pins in the mask */ 248 | void bcm2835_gpio_clr_multi(uint32_t mask) 249 | { 250 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPCLR0/4; 251 | bcm2835_peri_write(paddr, mask); 252 | } 253 | 254 | /* Read input pin */ 255 | uint8_t bcm2835_gpio_lev(uint8_t pin) 256 | { 257 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPLEV0/4 + pin/32; 258 | uint8_t shift = pin % 32; 259 | uint32_t value = bcm2835_peri_read(paddr); 260 | return (value & (1 << shift)) ? HIGH : LOW; 261 | } 262 | 263 | /* See if an event detection bit is set 264 | // Sigh cant support interrupts yet 265 | */ 266 | uint8_t bcm2835_gpio_eds(uint8_t pin) 267 | { 268 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPEDS0/4 + pin/32; 269 | uint8_t shift = pin % 32; 270 | uint32_t value = bcm2835_peri_read(paddr); 271 | return (value & (1 << shift)) ? HIGH : LOW; 272 | } 273 | 274 | uint32_t bcm2835_gpio_eds_multi(uint32_t mask) 275 | { 276 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPEDS0/4; 277 | uint32_t value = bcm2835_peri_read(paddr); 278 | return (value & mask); 279 | } 280 | 281 | /* Write a 1 to clear the bit in EDS */ 282 | void bcm2835_gpio_set_eds(uint8_t pin) 283 | { 284 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPEDS0/4 + pin/32; 285 | uint8_t shift = pin % 32; 286 | uint32_t value = 1 << shift; 287 | bcm2835_peri_write(paddr, value); 288 | } 289 | 290 | void bcm2835_gpio_set_eds_multi(uint32_t mask) 291 | { 292 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPEDS0/4; 293 | bcm2835_peri_write(paddr, mask); 294 | } 295 | 296 | /* Rising edge detect enable */ 297 | void bcm2835_gpio_ren(uint8_t pin) 298 | { 299 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPREN0/4 + pin/32; 300 | uint8_t shift = pin % 32; 301 | uint32_t value = 1 << shift; 302 | bcm2835_peri_set_bits(paddr, value, value); 303 | } 304 | void bcm2835_gpio_clr_ren(uint8_t pin) 305 | { 306 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPREN0/4 + pin/32; 307 | uint8_t shift = pin % 32; 308 | uint32_t value = 1 << shift; 309 | bcm2835_peri_set_bits(paddr, 0, value); 310 | } 311 | 312 | /* Falling edge detect enable */ 313 | void bcm2835_gpio_fen(uint8_t pin) 314 | { 315 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPFEN0/4 + pin/32; 316 | uint8_t shift = pin % 32; 317 | uint32_t value = 1 << shift; 318 | bcm2835_peri_set_bits(paddr, value, value); 319 | } 320 | void bcm2835_gpio_clr_fen(uint8_t pin) 321 | { 322 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPFEN0/4 + pin/32; 323 | uint8_t shift = pin % 32; 324 | uint32_t value = 1 << shift; 325 | bcm2835_peri_set_bits(paddr, 0, value); 326 | } 327 | 328 | /* High detect enable */ 329 | void bcm2835_gpio_hen(uint8_t pin) 330 | { 331 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPHEN0/4 + pin/32; 332 | uint8_t shift = pin % 32; 333 | uint32_t value = 1 << shift; 334 | bcm2835_peri_set_bits(paddr, value, value); 335 | } 336 | void bcm2835_gpio_clr_hen(uint8_t pin) 337 | { 338 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPHEN0/4 + pin/32; 339 | uint8_t shift = pin % 32; 340 | uint32_t value = 1 << shift; 341 | bcm2835_peri_set_bits(paddr, 0, value); 342 | } 343 | 344 | /* Low detect enable */ 345 | void bcm2835_gpio_len(uint8_t pin) 346 | { 347 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPLEN0/4 + pin/32; 348 | uint8_t shift = pin % 32; 349 | uint32_t value = 1 << shift; 350 | bcm2835_peri_set_bits(paddr, value, value); 351 | } 352 | void bcm2835_gpio_clr_len(uint8_t pin) 353 | { 354 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPLEN0/4 + pin/32; 355 | uint8_t shift = pin % 32; 356 | uint32_t value = 1 << shift; 357 | bcm2835_peri_set_bits(paddr, 0, value); 358 | } 359 | 360 | /* Async rising edge detect enable */ 361 | void bcm2835_gpio_aren(uint8_t pin) 362 | { 363 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPAREN0/4 + pin/32; 364 | uint8_t shift = pin % 32; 365 | uint32_t value = 1 << shift; 366 | bcm2835_peri_set_bits(paddr, value, value); 367 | } 368 | void bcm2835_gpio_clr_aren(uint8_t pin) 369 | { 370 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPAREN0/4 + pin/32; 371 | uint8_t shift = pin % 32; 372 | uint32_t value = 1 << shift; 373 | bcm2835_peri_set_bits(paddr, 0, value); 374 | } 375 | 376 | /* Async falling edge detect enable */ 377 | void bcm2835_gpio_afen(uint8_t pin) 378 | { 379 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPAFEN0/4 + pin/32; 380 | uint8_t shift = pin % 32; 381 | uint32_t value = 1 << shift; 382 | bcm2835_peri_set_bits(paddr, value, value); 383 | } 384 | void bcm2835_gpio_clr_afen(uint8_t pin) 385 | { 386 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPAFEN0/4 + pin/32; 387 | uint8_t shift = pin % 32; 388 | uint32_t value = 1 << shift; 389 | bcm2835_peri_set_bits(paddr, 0, value); 390 | } 391 | 392 | /* Set pullup/down */ 393 | void bcm2835_gpio_pud(uint8_t pud) 394 | { 395 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPPUD/4; 396 | bcm2835_peri_write(paddr, pud); 397 | } 398 | 399 | /* Pullup/down clock 400 | // Clocks the value of pud into the GPIO pin 401 | */ 402 | void bcm2835_gpio_pudclk(uint8_t pin, uint8_t on) 403 | { 404 | volatile uint32_t* paddr = bcm2835_gpio + BCM2835_GPPUDCLK0/4 + pin/32; 405 | uint8_t shift = pin % 32; 406 | bcm2835_peri_write(paddr, (on ? 1 : 0) << shift); 407 | } 408 | 409 | /* Read GPIO pad behaviour for groups of GPIOs */ 410 | uint32_t bcm2835_gpio_pad(uint8_t group) 411 | { 412 | volatile uint32_t* paddr = bcm2835_pads + BCM2835_PADS_GPIO_0_27/4 + group; 413 | return bcm2835_peri_read(paddr); 414 | } 415 | 416 | /* Set GPIO pad behaviour for groups of GPIOs 417 | // powerup value for all pads is 418 | // BCM2835_PAD_SLEW_RATE_UNLIMITED | BCM2835_PAD_HYSTERESIS_ENABLED | BCM2835_PAD_DRIVE_8mA 419 | */ 420 | void bcm2835_gpio_set_pad(uint8_t group, uint32_t control) 421 | { 422 | volatile uint32_t* paddr = bcm2835_pads + BCM2835_PADS_GPIO_0_27/4 + group; 423 | bcm2835_peri_write(paddr, control | BCM2835_PAD_PASSWRD); 424 | } 425 | 426 | /* Some convenient arduino-like functions 427 | // milliseconds 428 | */ 429 | void bcm2835_delay(unsigned int millis) 430 | { 431 | struct timespec sleeper; 432 | 433 | sleeper.tv_sec = (time_t)(millis / 1000); 434 | sleeper.tv_nsec = (long)(millis % 1000) * 1000000; 435 | //nanosleep(&sleeper, NULL); 436 | } 437 | 438 | /* microseconds */ 439 | void bcm2835_delayMicroseconds(uint64_t micros) 440 | { 441 | struct timespec t1; 442 | uint64_t start; 443 | 444 | if (debug) 445 | { 446 | /* Cant access sytem timers in debug mode */ 447 | printk("bcm2835_delayMicroseconds %lld\n", micros); 448 | return; 449 | } 450 | 451 | /* Calling nanosleep() takes at least 100-200 us, so use it for 452 | // long waits and use a busy wait on the System Timer for the rest. 453 | */ 454 | start = bcm2835_st_read(); 455 | 456 | if (micros > 450) 457 | { 458 | t1.tv_sec = 0; 459 | t1.tv_nsec = 1000 * (long)(micros - 200); 460 | //nanosleep(&t1, NULL); 461 | } 462 | 463 | bcm2835_st_delay(start, micros); 464 | } 465 | 466 | /* 467 | // Higher level convenience functions 468 | */ 469 | 470 | /* Set the state of an output */ 471 | void bcm2835_gpio_write(uint8_t pin, uint8_t on) 472 | { 473 | if (on) 474 | bcm2835_gpio_set(pin); 475 | else 476 | bcm2835_gpio_clr(pin); 477 | } 478 | 479 | /* Set the state of a all 32 outputs in the mask to on or off */ 480 | void bcm2835_gpio_write_multi(uint32_t mask, uint8_t on) 481 | { 482 | if (on) 483 | bcm2835_gpio_set_multi(mask); 484 | else 485 | bcm2835_gpio_clr_multi(mask); 486 | } 487 | 488 | /* Set the state of a all 32 outputs in the mask to the values in value */ 489 | void bcm2835_gpio_write_mask(uint32_t value, uint32_t mask) 490 | { 491 | bcm2835_gpio_set_multi(value & mask); 492 | bcm2835_gpio_clr_multi((~value) & mask); 493 | } 494 | 495 | /* Set the pullup/down resistor for a pin 496 | // 497 | // The GPIO Pull-up/down Clock Registers control the actuation of internal pull-downs on 498 | // the respective GPIO pins. These registers must be used in conjunction with the GPPUD 499 | // register to effect GPIO Pull-up/down changes. The following sequence of events is 500 | // required: 501 | // 1. Write to GPPUD to set the required control signal (i.e. Pull-up or Pull-Down or neither 502 | // to remove the current Pull-up/down) 503 | // 2. Wait 150 cycles ? this provides the required set-up time for the control signal 504 | // 3. Write to GPPUDCLK0/1 to clock the control signal into the GPIO pads you wish to 505 | // modify ? NOTE only the pads which receive a clock will be modified, all others will 506 | // retain their previous state. 507 | // 4. Wait 150 cycles ? this provides the required hold time for the control signal 508 | // 5. Write to GPPUD to remove the control signal 509 | // 6. Write to GPPUDCLK0/1 to remove the clock 510 | // 511 | // RPi has P1-03 and P1-05 with 1k8 pullup resistor 512 | */ 513 | void bcm2835_gpio_set_pud(uint8_t pin, uint8_t pud) 514 | { 515 | bcm2835_gpio_pud(pud); 516 | delayMicroseconds(10); 517 | bcm2835_gpio_pudclk(pin, 1); 518 | delayMicroseconds(10); 519 | bcm2835_gpio_pud(BCM2835_GPIO_PUD_OFF); 520 | bcm2835_gpio_pudclk(pin, 0); 521 | } 522 | 523 | void bcm2835_spi_begin(void) 524 | { 525 | volatile uint32_t* paddr; 526 | 527 | /* Set the SPI0 pins to the Alt 0 function to enable SPI0 access on them */ 528 | bcm2835_gpio_fsel(RPI_GPIO_P1_26, BCM2835_GPIO_FSEL_ALT0); /* CE1 */ 529 | bcm2835_gpio_fsel(RPI_GPIO_P1_24, BCM2835_GPIO_FSEL_ALT0); /* CE0 */ 530 | bcm2835_gpio_fsel(RPI_GPIO_P1_21, BCM2835_GPIO_FSEL_ALT0); /* MISO */ 531 | bcm2835_gpio_fsel(RPI_GPIO_P1_19, BCM2835_GPIO_FSEL_ALT0); /* MOSI */ 532 | bcm2835_gpio_fsel(RPI_GPIO_P1_23, BCM2835_GPIO_FSEL_ALT0); /* CLK */ 533 | 534 | /* Set the SPI CS register to the some sensible defaults */ 535 | paddr = bcm2835_spi0 + BCM2835_SPI0_CS/4; 536 | bcm2835_peri_write(paddr, 0); /* All 0s */ 537 | 538 | /* Clear TX and RX fifos */ 539 | bcm2835_peri_write_nb(paddr, BCM2835_SPI0_CS_CLEAR); 540 | } 541 | 542 | void bcm2835_spi_end(void) 543 | { 544 | /* Set all the SPI0 pins back to input */ 545 | bcm2835_gpio_fsel(RPI_GPIO_P1_26, BCM2835_GPIO_FSEL_INPT); /* CE1 */ 546 | bcm2835_gpio_fsel(RPI_GPIO_P1_24, BCM2835_GPIO_FSEL_INPT); /* CE0 */ 547 | bcm2835_gpio_fsel(RPI_GPIO_P1_21, BCM2835_GPIO_FSEL_INPT); /* MISO */ 548 | bcm2835_gpio_fsel(RPI_GPIO_P1_19, BCM2835_GPIO_FSEL_INPT); /* MOSI */ 549 | bcm2835_gpio_fsel(RPI_GPIO_P1_23, BCM2835_GPIO_FSEL_INPT); /* CLK */ 550 | } 551 | 552 | void bcm2835_spi_setBitOrder(uint8_t __attribute__((unused)) order) 553 | { 554 | /* BCM2835_SPI_BIT_ORDER_MSBFIRST is the only one suported by SPI0 */ 555 | } 556 | 557 | /* defaults to 0, which means a divider of 65536. 558 | // The divisor must be a power of 2. Odd numbers 559 | // rounded down. The maximum SPI clock rate is 560 | // of the APB clock 561 | */ 562 | void bcm2835_spi_setClockDivider(uint16_t divider) 563 | { 564 | volatile uint32_t* paddr = bcm2835_spi0 + BCM2835_SPI0_CLK/4; 565 | bcm2835_peri_write(paddr, divider); 566 | } 567 | 568 | void bcm2835_spi_setDataMode(uint8_t mode) 569 | { 570 | volatile uint32_t* paddr = bcm2835_spi0 + BCM2835_SPI0_CS/4; 571 | /* Mask in the CPO and CPHA bits of CS */ 572 | bcm2835_peri_set_bits(paddr, mode << 2, BCM2835_SPI0_CS_CPOL | BCM2835_SPI0_CS_CPHA); 573 | } 574 | 575 | /* Writes (and reads) a single byte to SPI */ 576 | uint8_t bcm2835_spi_transfer(uint8_t value) 577 | { 578 | volatile uint32_t* paddr = bcm2835_spi0 + BCM2835_SPI0_CS/4; 579 | volatile uint32_t* fifo = bcm2835_spi0 + BCM2835_SPI0_FIFO/4; 580 | uint32_t ret; 581 | 582 | /* This is Polled transfer as per section 10.6.1 583 | // BUG ALERT: what happens if we get interupted in this section, and someone else 584 | // accesses a different peripheral? 585 | // Clear TX and RX fifos 586 | */ 587 | bcm2835_peri_set_bits(paddr, BCM2835_SPI0_CS_CLEAR, BCM2835_SPI0_CS_CLEAR); 588 | 589 | /* Set TA = 1 */ 590 | bcm2835_peri_set_bits(paddr, BCM2835_SPI0_CS_TA, BCM2835_SPI0_CS_TA); 591 | 592 | /* Maybe wait for TXD */ 593 | while (!(bcm2835_peri_read(paddr) & BCM2835_SPI0_CS_TXD)) 594 | ; 595 | 596 | /* Write to FIFO, no barrier */ 597 | bcm2835_peri_write_nb(fifo, value); 598 | 599 | /* Wait for DONE to be set */ 600 | while (!(bcm2835_peri_read_nb(paddr) & BCM2835_SPI0_CS_DONE)) 601 | ; 602 | 603 | /* Read any byte that was sent back by the slave while we sere sending to it */ 604 | ret = bcm2835_peri_read_nb(fifo); 605 | 606 | /* Set TA = 0, and also set the barrier */ 607 | bcm2835_peri_set_bits(paddr, 0, BCM2835_SPI0_CS_TA); 608 | 609 | return ret; 610 | } 611 | 612 | /* Writes (and reads) an number of bytes to SPI */ 613 | void bcm2835_spi_transfernb(char* tbuf, char* rbuf, uint32_t len) 614 | { 615 | volatile uint32_t* paddr = bcm2835_spi0 + BCM2835_SPI0_CS/4; 616 | volatile uint32_t* fifo = bcm2835_spi0 + BCM2835_SPI0_FIFO/4; 617 | uint32_t TXCnt=0; 618 | uint32_t RXCnt=0; 619 | 620 | /* This is Polled transfer as per section 10.6.1 621 | // BUG ALERT: what happens if we get interupted in this section, and someone else 622 | // accesses a different peripheral? 623 | */ 624 | 625 | /* Clear TX and RX fifos */ 626 | bcm2835_peri_set_bits(paddr, BCM2835_SPI0_CS_CLEAR, BCM2835_SPI0_CS_CLEAR); 627 | 628 | /* Set TA = 1 */ 629 | bcm2835_peri_set_bits(paddr, BCM2835_SPI0_CS_TA, BCM2835_SPI0_CS_TA); 630 | 631 | /* Use the FIFO's to reduce the interbyte times */ 632 | while((TXCnt < len)||(RXCnt < len)) 633 | { 634 | /* TX fifo not full, so add some more bytes */ 635 | while(((bcm2835_peri_read(paddr) & BCM2835_SPI0_CS_TXD))&&(TXCnt < len )) 636 | { 637 | bcm2835_peri_write_nb(fifo, tbuf[TXCnt]); 638 | TXCnt++; 639 | } 640 | /* Rx fifo not empty, so get the next received bytes */ 641 | while(((bcm2835_peri_read(paddr) & BCM2835_SPI0_CS_RXD))&&( RXCnt < len )) 642 | { 643 | rbuf[RXCnt] = bcm2835_peri_read_nb(fifo); 644 | RXCnt++; 645 | } 646 | } 647 | /* Wait for DONE to be set */ 648 | while (!(bcm2835_peri_read_nb(paddr) & BCM2835_SPI0_CS_DONE)) 649 | ; 650 | 651 | /* Set TA = 0, and also set the barrier */ 652 | bcm2835_peri_set_bits(paddr, 0, BCM2835_SPI0_CS_TA); 653 | } 654 | 655 | /* Writes an number of bytes to SPI */ 656 | void bcm2835_spi_writenb(char* tbuf, uint32_t len) 657 | { 658 | volatile uint32_t* paddr = bcm2835_spi0 + BCM2835_SPI0_CS/4; 659 | volatile uint32_t* fifo = bcm2835_spi0 + BCM2835_SPI0_FIFO/4; 660 | uint32_t i; 661 | 662 | /* This is Polled transfer as per section 10.6.1 663 | // BUG ALERT: what happens if we get interupted in this section, and someone else 664 | // accesses a different peripheral? 665 | // Answer: an ISR is required to issue the required memory barriers. 666 | */ 667 | 668 | /* Clear TX and RX fifos */ 669 | bcm2835_peri_set_bits(paddr, BCM2835_SPI0_CS_CLEAR, BCM2835_SPI0_CS_CLEAR); 670 | 671 | /* Set TA = 1 */ 672 | bcm2835_peri_set_bits(paddr, BCM2835_SPI0_CS_TA, BCM2835_SPI0_CS_TA); 673 | 674 | for (i = 0; i < len; i++) 675 | { 676 | /* Maybe wait for TXD */ 677 | while (!(bcm2835_peri_read(paddr) & BCM2835_SPI0_CS_TXD)) 678 | ; 679 | 680 | /* Write to FIFO, no barrier */ 681 | bcm2835_peri_write_nb(fifo, tbuf[i]); 682 | 683 | /* Read from FIFO to prevent stalling */ 684 | while (bcm2835_peri_read(paddr) & BCM2835_SPI0_CS_RXD) 685 | (void) bcm2835_peri_read_nb(fifo); 686 | } 687 | 688 | /* Wait for DONE to be set */ 689 | while (!(bcm2835_peri_read_nb(paddr) & BCM2835_SPI0_CS_DONE)) { 690 | while (bcm2835_peri_read(paddr) & BCM2835_SPI0_CS_RXD) 691 | (void) bcm2835_peri_read_nb(fifo); 692 | }; 693 | 694 | /* Set TA = 0, and also set the barrier */ 695 | bcm2835_peri_set_bits(paddr, 0, BCM2835_SPI0_CS_TA); 696 | } 697 | 698 | /* Writes (and reads) an number of bytes to SPI 699 | // Read bytes are copied over onto the transmit buffer 700 | */ 701 | void bcm2835_spi_transfern(char* buf, uint32_t len) 702 | { 703 | bcm2835_spi_transfernb(buf, buf, len); 704 | } 705 | 706 | void bcm2835_spi_chipSelect(uint8_t cs) 707 | { 708 | volatile uint32_t* paddr = bcm2835_spi0 + BCM2835_SPI0_CS/4; 709 | /* Mask in the CS bits of CS */ 710 | bcm2835_peri_set_bits(paddr, cs, BCM2835_SPI0_CS_CS); 711 | } 712 | 713 | void bcm2835_spi_setChipSelectPolarity(uint8_t cs, uint8_t active) 714 | { 715 | volatile uint32_t* paddr = bcm2835_spi0 + BCM2835_SPI0_CS/4; 716 | uint8_t shift = 21 + cs; 717 | /* Mask in the appropriate CSPOLn bit */ 718 | bcm2835_peri_set_bits(paddr, active << shift, 1 << shift); 719 | } 720 | 721 | void bcm2835_i2c_begin(void) 722 | { 723 | uint16_t cdiv; 724 | 725 | #ifdef I2C_V1 726 | volatile uint32_t* paddr = bcm2835_bsc0 + BCM2835_BSC_DIV/4; 727 | /* Set the I2C/BSC0 pins to the Alt 0 function to enable I2C access on them */ 728 | bcm2835_gpio_fsel(RPI_GPIO_P1_03, BCM2835_GPIO_FSEL_ALT0); /* SDA */ 729 | bcm2835_gpio_fsel(RPI_GPIO_P1_05, BCM2835_GPIO_FSEL_ALT0); /* SCL */ 730 | #else 731 | volatile uint32_t* paddr = bcm2835_bsc1 + BCM2835_BSC_DIV/4; 732 | /* Set the I2C/BSC1 pins to the Alt 0 function to enable I2C access on them */ 733 | bcm2835_gpio_fsel(RPI_V2_GPIO_P1_03, BCM2835_GPIO_FSEL_ALT0); /* SDA */ 734 | bcm2835_gpio_fsel(RPI_V2_GPIO_P1_05, BCM2835_GPIO_FSEL_ALT0); /* SCL */ 735 | #endif 736 | 737 | /* Read the clock divider register */ 738 | cdiv = bcm2835_peri_read(paddr); 739 | /* Calculate time for transmitting one byte 740 | // 1000000 = micros seconds in a second 741 | // 9 = Clocks per byte : 8 bits + ACK 742 | */ 743 | //i2c_byte_wait_us = ((float)cdiv / BCM2835_CORE_CLK_HZ) * 1000000 * 9; 744 | } 745 | 746 | void bcm2835_i2c_end(void) 747 | { 748 | #ifdef I2C_V1 749 | /* Set all the I2C/BSC0 pins back to input */ 750 | bcm2835_gpio_fsel(RPI_GPIO_P1_03, BCM2835_GPIO_FSEL_INPT); /* SDA */ 751 | bcm2835_gpio_fsel(RPI_GPIO_P1_05, BCM2835_GPIO_FSEL_INPT); /* SCL */ 752 | #else 753 | /* Set all the I2C/BSC1 pins back to input */ 754 | bcm2835_gpio_fsel(RPI_V2_GPIO_P1_03, BCM2835_GPIO_FSEL_INPT); /* SDA */ 755 | bcm2835_gpio_fsel(RPI_V2_GPIO_P1_05, BCM2835_GPIO_FSEL_INPT); /* SCL */ 756 | #endif 757 | } 758 | 759 | void bcm2835_i2c_setSlaveAddress(uint8_t addr) 760 | { 761 | /* Set I2C Device Address */ 762 | #ifdef I2C_V1 763 | volatile uint32_t* paddr = bcm2835_bsc0 + BCM2835_BSC_A/4; 764 | #else 765 | volatile uint32_t* paddr = bcm2835_bsc1 + BCM2835_BSC_A/4; 766 | #endif 767 | bcm2835_peri_write(paddr, addr); 768 | } 769 | 770 | /* defaults to 0x5dc, should result in a 166.666 kHz I2C clock frequency. 771 | // The divisor must be a power of 2. Odd numbers 772 | // rounded down. 773 | */ 774 | void bcm2835_i2c_setClockDivider(uint16_t divider) 775 | { 776 | #ifdef I2C_V1 777 | volatile uint32_t* paddr = bcm2835_bsc0 + BCM2835_BSC_DIV/4; 778 | #else 779 | volatile uint32_t* paddr = bcm2835_bsc1 + BCM2835_BSC_DIV/4; 780 | #endif 781 | bcm2835_peri_write(paddr, divider); 782 | /* Calculate time for transmitting one byte 783 | // 1000000 = micros seconds in a second 784 | // 9 = Clocks per byte : 8 bits + ACK 785 | */ 786 | //i2c_byte_wait_us = ((float)divider / BCM2835_CORE_CLK_HZ) * 1000000 * 9; 787 | } 788 | 789 | /* set I2C clock divider by means of a baudrate number */ 790 | void bcm2835_i2c_set_baudrate(uint32_t baudrate) 791 | { 792 | uint32_t divider; 793 | /* use 0xFFFE mask to limit a max value and round down any odd number */ 794 | divider = (BCM2835_CORE_CLK_HZ / baudrate) & 0xFFFE; 795 | bcm2835_i2c_setClockDivider( (uint16_t)divider ); 796 | } 797 | 798 | /* Writes an number of bytes to I2C */ 799 | uint8_t bcm2835_i2c_write(const char * buf, uint32_t len) 800 | { 801 | #ifdef I2C_V1 802 | volatile uint32_t* dlen = bcm2835_bsc0 + BCM2835_BSC_DLEN/4; 803 | volatile uint32_t* fifo = bcm2835_bsc0 + BCM2835_BSC_FIFO/4; 804 | volatile uint32_t* status = bcm2835_bsc0 + BCM2835_BSC_S/4; 805 | volatile uint32_t* control = bcm2835_bsc0 + BCM2835_BSC_C/4; 806 | #else 807 | volatile uint32_t* dlen = bcm2835_bsc1 + BCM2835_BSC_DLEN/4; 808 | volatile uint32_t* fifo = bcm2835_bsc1 + BCM2835_BSC_FIFO/4; 809 | volatile uint32_t* status = bcm2835_bsc1 + BCM2835_BSC_S/4; 810 | volatile uint32_t* control = bcm2835_bsc1 + BCM2835_BSC_C/4; 811 | #endif 812 | 813 | uint32_t remaining = len; 814 | uint32_t i = 0; 815 | uint8_t reason = BCM2835_I2C_REASON_OK; 816 | 817 | /* Clear FIFO */ 818 | bcm2835_peri_set_bits(control, BCM2835_BSC_C_CLEAR_1 , BCM2835_BSC_C_CLEAR_1 ); 819 | /* Clear Status */ 820 | bcm2835_peri_write(status, BCM2835_BSC_S_CLKT | BCM2835_BSC_S_ERR | BCM2835_BSC_S_DONE); 821 | /* Set Data Length */ 822 | bcm2835_peri_write(dlen, len); 823 | /* pre populate FIFO with max buffer */ 824 | while( remaining && ( i < BCM2835_BSC_FIFO_SIZE ) ) 825 | { 826 | bcm2835_peri_write_nb(fifo, buf[i]); 827 | i++; 828 | remaining--; 829 | } 830 | 831 | /* Enable device and start transfer */ 832 | bcm2835_peri_write(control, BCM2835_BSC_C_I2CEN | BCM2835_BSC_C_ST); 833 | 834 | /* Transfer is over when BCM2835_BSC_S_DONE */ 835 | while(!(bcm2835_peri_read(status) & BCM2835_BSC_S_DONE )) 836 | { 837 | while ( remaining && (bcm2835_peri_read(status) & BCM2835_BSC_S_TXD )) 838 | { 839 | /* Write to FIFO */ 840 | bcm2835_peri_write(fifo, buf[i]); 841 | i++; 842 | remaining--; 843 | } 844 | } 845 | 846 | /* Received a NACK */ 847 | if (bcm2835_peri_read(status) & BCM2835_BSC_S_ERR) 848 | { 849 | reason = BCM2835_I2C_REASON_ERROR_NACK; 850 | } 851 | 852 | /* Received Clock Stretch Timeout */ 853 | else if (bcm2835_peri_read(status) & BCM2835_BSC_S_CLKT) 854 | { 855 | reason = BCM2835_I2C_REASON_ERROR_CLKT; 856 | } 857 | 858 | /* Not all data is sent */ 859 | else if (remaining) 860 | { 861 | reason = BCM2835_I2C_REASON_ERROR_DATA; 862 | } 863 | 864 | bcm2835_peri_set_bits(control, BCM2835_BSC_S_DONE , BCM2835_BSC_S_DONE); 865 | 866 | return reason; 867 | } 868 | 869 | /* Read an number of bytes from I2C */ 870 | uint8_t bcm2835_i2c_read(char* buf, uint32_t len) 871 | { 872 | #ifdef I2C_V1 873 | volatile uint32_t* dlen = bcm2835_bsc0 + BCM2835_BSC_DLEN/4; 874 | volatile uint32_t* fifo = bcm2835_bsc0 + BCM2835_BSC_FIFO/4; 875 | volatile uint32_t* status = bcm2835_bsc0 + BCM2835_BSC_S/4; 876 | volatile uint32_t* control = bcm2835_bsc0 + BCM2835_BSC_C/4; 877 | #else 878 | volatile uint32_t* dlen = bcm2835_bsc1 + BCM2835_BSC_DLEN/4; 879 | volatile uint32_t* fifo = bcm2835_bsc1 + BCM2835_BSC_FIFO/4; 880 | volatile uint32_t* status = bcm2835_bsc1 + BCM2835_BSC_S/4; 881 | volatile uint32_t* control = bcm2835_bsc1 + BCM2835_BSC_C/4; 882 | #endif 883 | 884 | uint32_t remaining = len; 885 | uint32_t i = 0; 886 | uint8_t reason = BCM2835_I2C_REASON_OK; 887 | 888 | /* Clear FIFO */ 889 | bcm2835_peri_set_bits(control, BCM2835_BSC_C_CLEAR_1 , BCM2835_BSC_C_CLEAR_1 ); 890 | /* Clear Status */ 891 | bcm2835_peri_write_nb(status, BCM2835_BSC_S_CLKT | BCM2835_BSC_S_ERR | BCM2835_BSC_S_DONE); 892 | /* Set Data Length */ 893 | bcm2835_peri_write_nb(dlen, len); 894 | /* Start read */ 895 | bcm2835_peri_write_nb(control, BCM2835_BSC_C_I2CEN | BCM2835_BSC_C_ST | BCM2835_BSC_C_READ); 896 | 897 | /* wait for transfer to complete */ 898 | while (!(bcm2835_peri_read_nb(status) & BCM2835_BSC_S_DONE)) 899 | { 900 | /* we must empty the FIFO as it is populated and not use any delay */ 901 | while (bcm2835_peri_read_nb(status) & BCM2835_BSC_S_RXD) 902 | { 903 | /* Read from FIFO, no barrier */ 904 | buf[i] = bcm2835_peri_read_nb(fifo); 905 | i++; 906 | remaining--; 907 | } 908 | } 909 | 910 | /* transfer has finished - grab any remaining stuff in FIFO */ 911 | while (remaining && (bcm2835_peri_read_nb(status) & BCM2835_BSC_S_RXD)) 912 | { 913 | /* Read from FIFO, no barrier */ 914 | buf[i] = bcm2835_peri_read_nb(fifo); 915 | i++; 916 | remaining--; 917 | } 918 | 919 | /* Received a NACK */ 920 | if (bcm2835_peri_read(status) & BCM2835_BSC_S_ERR) 921 | { 922 | reason = BCM2835_I2C_REASON_ERROR_NACK; 923 | } 924 | 925 | /* Received Clock Stretch Timeout */ 926 | else if (bcm2835_peri_read(status) & BCM2835_BSC_S_CLKT) 927 | { 928 | reason = BCM2835_I2C_REASON_ERROR_CLKT; 929 | } 930 | 931 | /* Not all data is received */ 932 | else if (remaining) 933 | { 934 | reason = BCM2835_I2C_REASON_ERROR_DATA; 935 | } 936 | 937 | bcm2835_peri_set_bits(control, BCM2835_BSC_S_DONE , BCM2835_BSC_S_DONE); 938 | 939 | return reason; 940 | } 941 | 942 | /* Read an number of bytes from I2C sending a repeated start after writing 943 | // the required register. Only works if your device supports this mode 944 | */ 945 | uint8_t bcm2835_i2c_read_register_rs(char* regaddr, char* buf, uint32_t len) 946 | { 947 | #ifdef I2C_V1 948 | volatile uint32_t* dlen = bcm2835_bsc0 + BCM2835_BSC_DLEN/4; 949 | volatile uint32_t* fifo = bcm2835_bsc0 + BCM2835_BSC_FIFO/4; 950 | volatile uint32_t* status = bcm2835_bsc0 + BCM2835_BSC_S/4; 951 | volatile uint32_t* control = bcm2835_bsc0 + BCM2835_BSC_C/4; 952 | #else 953 | volatile uint32_t* dlen = bcm2835_bsc1 + BCM2835_BSC_DLEN/4; 954 | volatile uint32_t* fifo = bcm2835_bsc1 + BCM2835_BSC_FIFO/4; 955 | volatile uint32_t* status = bcm2835_bsc1 + BCM2835_BSC_S/4; 956 | volatile uint32_t* control = bcm2835_bsc1 + BCM2835_BSC_C/4; 957 | #endif 958 | uint32_t remaining = len; 959 | uint32_t i = 0; 960 | uint8_t reason = BCM2835_I2C_REASON_OK; 961 | 962 | /* Clear FIFO */ 963 | bcm2835_peri_set_bits(control, BCM2835_BSC_C_CLEAR_1 , BCM2835_BSC_C_CLEAR_1 ); 964 | /* Clear Status */ 965 | bcm2835_peri_write(status, BCM2835_BSC_S_CLKT | BCM2835_BSC_S_ERR | BCM2835_BSC_S_DONE); 966 | /* Set Data Length */ 967 | bcm2835_peri_write(dlen, 1); 968 | /* Enable device and start transfer */ 969 | bcm2835_peri_write(control, BCM2835_BSC_C_I2CEN); 970 | bcm2835_peri_write(fifo, regaddr[0]); 971 | bcm2835_peri_write(control, BCM2835_BSC_C_I2CEN | BCM2835_BSC_C_ST); 972 | 973 | /* poll for transfer has started */ 974 | while ( !( bcm2835_peri_read(status) & BCM2835_BSC_S_TA ) ) 975 | { 976 | /* Linux may cause us to miss entire transfer stage */ 977 | if(bcm2835_peri_read(status) & BCM2835_BSC_S_DONE) 978 | break; 979 | } 980 | 981 | /* Send a repeated start with read bit set in address */ 982 | bcm2835_peri_write(dlen, len); 983 | bcm2835_peri_write(control, BCM2835_BSC_C_I2CEN | BCM2835_BSC_C_ST | BCM2835_BSC_C_READ ); 984 | 985 | /* Wait for write to complete and first byte back. */ 986 | bcm2835_delayMicroseconds(i2c_byte_wait_us * 3); 987 | 988 | /* wait for transfer to complete */ 989 | while (!(bcm2835_peri_read(status) & BCM2835_BSC_S_DONE)) 990 | { 991 | /* we must empty the FIFO as it is populated and not use any delay */ 992 | while (remaining && bcm2835_peri_read(status) & BCM2835_BSC_S_RXD) 993 | { 994 | /* Read from FIFO */ 995 | buf[i] = bcm2835_peri_read(fifo); 996 | i++; 997 | remaining--; 998 | } 999 | } 1000 | 1001 | /* transfer has finished - grab any remaining stuff in FIFO */ 1002 | while (remaining && (bcm2835_peri_read(status) & BCM2835_BSC_S_RXD)) 1003 | { 1004 | /* Read from FIFO */ 1005 | buf[i] = bcm2835_peri_read(fifo); 1006 | i++; 1007 | remaining--; 1008 | } 1009 | 1010 | /* Received a NACK */ 1011 | if (bcm2835_peri_read(status) & BCM2835_BSC_S_ERR) 1012 | { 1013 | reason = BCM2835_I2C_REASON_ERROR_NACK; 1014 | } 1015 | 1016 | /* Received Clock Stretch Timeout */ 1017 | else if (bcm2835_peri_read(status) & BCM2835_BSC_S_CLKT) 1018 | { 1019 | reason = BCM2835_I2C_REASON_ERROR_CLKT; 1020 | } 1021 | 1022 | /* Not all data is sent */ 1023 | else if (remaining) 1024 | { 1025 | reason = BCM2835_I2C_REASON_ERROR_DATA; 1026 | } 1027 | 1028 | bcm2835_peri_set_bits(control, BCM2835_BSC_S_DONE , BCM2835_BSC_S_DONE); 1029 | 1030 | return reason; 1031 | } 1032 | 1033 | /* Sending an arbitrary number of bytes before issuing a repeated start 1034 | // (with no prior stop) and reading a response. Some devices require this behavior. 1035 | */ 1036 | uint8_t bcm2835_i2c_write_read_rs(char* cmds, uint32_t cmds_len, char* buf, uint32_t buf_len) 1037 | { 1038 | #ifdef I2C_V1 1039 | volatile uint32_t* dlen = bcm2835_bsc0 + BCM2835_BSC_DLEN/4; 1040 | volatile uint32_t* fifo = bcm2835_bsc0 + BCM2835_BSC_FIFO/4; 1041 | volatile uint32_t* status = bcm2835_bsc0 + BCM2835_BSC_S/4; 1042 | volatile uint32_t* control = bcm2835_bsc0 + BCM2835_BSC_C/4; 1043 | #else 1044 | volatile uint32_t* dlen = bcm2835_bsc1 + BCM2835_BSC_DLEN/4; 1045 | volatile uint32_t* fifo = bcm2835_bsc1 + BCM2835_BSC_FIFO/4; 1046 | volatile uint32_t* status = bcm2835_bsc1 + BCM2835_BSC_S/4; 1047 | volatile uint32_t* control = bcm2835_bsc1 + BCM2835_BSC_C/4; 1048 | #endif 1049 | 1050 | uint32_t remaining = cmds_len; 1051 | uint32_t i = 0; 1052 | uint8_t reason = BCM2835_I2C_REASON_OK; 1053 | 1054 | /* Clear FIFO */ 1055 | bcm2835_peri_set_bits(control, BCM2835_BSC_C_CLEAR_1 , BCM2835_BSC_C_CLEAR_1 ); 1056 | 1057 | /* Clear Status */ 1058 | bcm2835_peri_write(status, BCM2835_BSC_S_CLKT | BCM2835_BSC_S_ERR | BCM2835_BSC_S_DONE); 1059 | 1060 | /* Set Data Length */ 1061 | bcm2835_peri_write(dlen, cmds_len); 1062 | 1063 | /* pre populate FIFO with max buffer */ 1064 | while( remaining && ( i < BCM2835_BSC_FIFO_SIZE ) ) 1065 | { 1066 | bcm2835_peri_write_nb(fifo, cmds[i]); 1067 | i++; 1068 | remaining--; 1069 | } 1070 | 1071 | /* Enable device and start transfer */ 1072 | bcm2835_peri_write(control, BCM2835_BSC_C_I2CEN | BCM2835_BSC_C_ST); 1073 | 1074 | /* poll for transfer has started (way to do repeated start, from BCM2835 datasheet) */ 1075 | while ( !( bcm2835_peri_read(status) & BCM2835_BSC_S_TA ) ) 1076 | { 1077 | /* Linux may cause us to miss entire transfer stage */ 1078 | if(bcm2835_peri_read_nb(status) & BCM2835_BSC_S_DONE) 1079 | break; 1080 | } 1081 | 1082 | remaining = buf_len; 1083 | i = 0; 1084 | 1085 | /* Send a repeated start with read bit set in address */ 1086 | bcm2835_peri_write(dlen, buf_len); 1087 | bcm2835_peri_write(control, BCM2835_BSC_C_I2CEN | BCM2835_BSC_C_ST | BCM2835_BSC_C_READ ); 1088 | 1089 | /* Wait for write to complete and first byte back. */ 1090 | bcm2835_delayMicroseconds(i2c_byte_wait_us * (cmds_len + 1)); 1091 | 1092 | /* wait for transfer to complete */ 1093 | while (!(bcm2835_peri_read_nb(status) & BCM2835_BSC_S_DONE)) 1094 | { 1095 | /* we must empty the FIFO as it is populated and not use any delay */ 1096 | while (remaining && bcm2835_peri_read(status) & BCM2835_BSC_S_RXD) 1097 | { 1098 | /* Read from FIFO, no barrier */ 1099 | buf[i] = bcm2835_peri_read_nb(fifo); 1100 | i++; 1101 | remaining--; 1102 | } 1103 | } 1104 | 1105 | /* transfer has finished - grab any remaining stuff in FIFO */ 1106 | while (remaining && (bcm2835_peri_read(status) & BCM2835_BSC_S_RXD)) 1107 | { 1108 | /* Read from FIFO */ 1109 | buf[i] = bcm2835_peri_read(fifo); 1110 | i++; 1111 | remaining--; 1112 | } 1113 | 1114 | /* Received a NACK */ 1115 | if (bcm2835_peri_read(status) & BCM2835_BSC_S_ERR) 1116 | { 1117 | reason = BCM2835_I2C_REASON_ERROR_NACK; 1118 | } 1119 | 1120 | /* Received Clock Stretch Timeout */ 1121 | else if (bcm2835_peri_read(status) & BCM2835_BSC_S_CLKT) 1122 | { 1123 | reason = BCM2835_I2C_REASON_ERROR_CLKT; 1124 | } 1125 | 1126 | /* Not all data is sent */ 1127 | else if (remaining) 1128 | { 1129 | reason = BCM2835_I2C_REASON_ERROR_DATA; 1130 | } 1131 | 1132 | bcm2835_peri_set_bits(control, BCM2835_BSC_S_DONE , BCM2835_BSC_S_DONE); 1133 | 1134 | return reason; 1135 | } 1136 | 1137 | /* Read the System Timer Counter (64-bits) */ 1138 | uint64_t bcm2835_st_read(void) 1139 | { 1140 | volatile uint32_t* paddr; 1141 | uint32_t hi, lo; 1142 | uint64_t st; 1143 | paddr = bcm2835_st + BCM2835_ST_CHI/4; 1144 | hi = bcm2835_peri_read(paddr); 1145 | 1146 | paddr = bcm2835_st + BCM2835_ST_CLO/4; 1147 | lo = bcm2835_peri_read(paddr); 1148 | 1149 | paddr = bcm2835_st + BCM2835_ST_CHI/4; 1150 | st = bcm2835_peri_read(paddr); 1151 | 1152 | /* Test for overflow */ 1153 | if (st == hi) 1154 | { 1155 | st <<= 32; 1156 | st += lo; 1157 | } 1158 | else 1159 | { 1160 | st <<= 32; 1161 | paddr = bcm2835_st + BCM2835_ST_CLO/4; 1162 | st += bcm2835_peri_read(paddr); 1163 | } 1164 | return st; 1165 | } 1166 | 1167 | /* Delays for the specified number of microseconds with offset */ 1168 | void bcm2835_st_delay(uint64_t offset_micros, uint64_t micros) 1169 | { 1170 | uint64_t compare = offset_micros + micros; 1171 | 1172 | while(bcm2835_st_read() < compare) 1173 | ; 1174 | } 1175 | 1176 | /* PWM */ 1177 | 1178 | void bcm2835_pwm_set_clock(uint32_t divisor) 1179 | { 1180 | /* From Gerts code */ 1181 | divisor &= 0xfff; 1182 | /* Stop PWM clock */ 1183 | bcm2835_peri_write(bcm2835_clk + BCM2835_PWMCLK_CNTL, BCM2835_PWM_PASSWRD | 0x01); 1184 | bcm2835_delay(110); /* Prevents clock going slow */ 1185 | /* Wait for the clock to be not busy */ 1186 | while ((bcm2835_peri_read(bcm2835_clk + BCM2835_PWMCLK_CNTL) & 0x80) != 0) 1187 | bcm2835_delay(1); 1188 | /* set the clock divider and enable PWM clock */ 1189 | bcm2835_peri_write(bcm2835_clk + BCM2835_PWMCLK_DIV, BCM2835_PWM_PASSWRD | (divisor << 12)); 1190 | bcm2835_peri_write(bcm2835_clk + BCM2835_PWMCLK_CNTL, BCM2835_PWM_PASSWRD | 0x11); /* Source=osc and enable */ 1191 | } 1192 | 1193 | void bcm2835_pwm_set_mode(uint8_t channel, uint8_t markspace, uint8_t enabled) 1194 | { 1195 | uint32_t control = bcm2835_peri_read(bcm2835_pwm + BCM2835_PWM_CONTROL); 1196 | 1197 | if (channel == 0) 1198 | { 1199 | if (markspace) 1200 | control |= BCM2835_PWM0_MS_MODE; 1201 | else 1202 | control &= ~BCM2835_PWM0_MS_MODE; 1203 | if (enabled) 1204 | control |= BCM2835_PWM0_ENABLE; 1205 | else 1206 | control &= ~BCM2835_PWM0_ENABLE; 1207 | } 1208 | else if (channel == 1) 1209 | { 1210 | if (markspace) 1211 | control |= BCM2835_PWM1_MS_MODE; 1212 | else 1213 | control &= ~BCM2835_PWM1_MS_MODE; 1214 | if (enabled) 1215 | control |= BCM2835_PWM1_ENABLE; 1216 | else 1217 | control &= ~BCM2835_PWM1_ENABLE; 1218 | } 1219 | 1220 | /* If you use the barrier here, wierd things happen, and the commands dont work */ 1221 | bcm2835_peri_write_nb(bcm2835_pwm + BCM2835_PWM_CONTROL, control); 1222 | /* bcm2835_peri_write_nb(bcm2835_pwm + BCM2835_PWM_CONTROL, BCM2835_PWM0_ENABLE | BCM2835_PWM1_ENABLE | BCM2835_PWM0_MS_MODE | BCM2835_PWM1_MS_MODE); */ 1223 | 1224 | } 1225 | 1226 | void bcm2835_pwm_set_range(uint8_t channel, uint32_t range) 1227 | { 1228 | if (channel == 0) 1229 | bcm2835_peri_write_nb(bcm2835_pwm + BCM2835_PWM0_RANGE, range); 1230 | else if (channel == 1) 1231 | bcm2835_peri_write_nb(bcm2835_pwm + BCM2835_PWM1_RANGE, range); 1232 | } 1233 | 1234 | void bcm2835_pwm_set_data(uint8_t channel, uint32_t data) 1235 | { 1236 | if (channel == 0) 1237 | bcm2835_peri_write_nb(bcm2835_pwm + BCM2835_PWM0_DATA, data); 1238 | else if (channel == 1) 1239 | bcm2835_peri_write_nb(bcm2835_pwm + BCM2835_PWM1_DATA, data); 1240 | } 1241 | 1242 | /* Map 'size' bytes starting at 'off' in file 'fd' to memory. 1243 | // Return mapped address on success, MAP_FAILED otherwise. 1244 | // On error print message. 1245 | */ 1246 | static void *mapmem(const char *msg, size_t size, off_t off) 1247 | { 1248 | void* map = ioremap(off, size); 1249 | if (map < 0) 1250 | printk(KERN_ERR "%s: mapping 0x%08lx for %s failed\n", __FUNCTION__, off, msg); 1251 | else 1252 | printk(KERN_DEBUG "%s: mapping 0x%08lx for %s succeded to 0x%p\n", __FUNCTION__, off, msg, map); 1253 | return map; 1254 | } 1255 | 1256 | static void unmapmem(void **pmem, size_t size) 1257 | { 1258 | if (*pmem == MAP_FAILED) return; 1259 | printk(KERN_DEBUG "%s: unmapping 0x%p\n", __FUNCTION__, *pmem); 1260 | iounmap(*pmem); 1261 | *pmem = MAP_FAILED; 1262 | } 1263 | 1264 | /* Initialise this library. */ 1265 | int bcm2835_init(void) 1266 | { 1267 | int ok; 1268 | struct device_node *dtnode; 1269 | 1270 | if (debug) 1271 | { 1272 | bcm2835_peripherals = (uint32_t*)BCM2835_PERI_BASE; 1273 | 1274 | bcm2835_pads = bcm2835_peripherals + BCM2835_GPIO_PADS/4; 1275 | bcm2835_clk = bcm2835_peripherals + BCM2835_CLOCK_BASE/4; 1276 | bcm2835_gpio = bcm2835_peripherals + BCM2835_GPIO_BASE/4; 1277 | bcm2835_pwm = bcm2835_peripherals + BCM2835_GPIO_PWM/4; 1278 | bcm2835_spi0 = bcm2835_peripherals + BCM2835_SPI0_BASE/4; 1279 | bcm2835_bsc0 = bcm2835_peripherals + BCM2835_BSC0_BASE/4; 1280 | bcm2835_bsc1 = bcm2835_peripherals + BCM2835_BSC1_BASE/4; 1281 | bcm2835_st = bcm2835_peripherals + BCM2835_ST_BASE/4; 1282 | return 1; /* Success */ 1283 | } 1284 | 1285 | /* Figure out the base and size of the peripheral address block 1286 | // using the device-tree. Required for RPi2, optional for RPi 1 1287 | */ 1288 | dtnode = of_find_node_by_path("/soc"); 1289 | if (dtnode) { 1290 | const struct dt_soc_ranges* properties; 1291 | properties = of_get_property(dtnode, "ranges", NULL); 1292 | if (properties != NULL) { 1293 | printk(KERN_DEBUG "%s: Found device-tree node /soc.\r\n", __FUNCTION__); 1294 | printk(KERN_DEBUG "%s: /soc/ranges = 0x%08x 0x%08x 0x%08x.\r\n", __FUNCTION__, htonl(properties->p1), htonl(properties->p2), ntohl(properties->p3)); 1295 | bcm2835_peripherals_base = (uint32_t *) htonl(properties->p2); 1296 | bcm2835_peripherals_size = htonl(properties->p3); 1297 | printk(KERN_NOTICE "%s: Using device-tree values.\r\n", __FUNCTION__); 1298 | } else { 1299 | printk(KERN_ERR "%s: /soc/ranges property was null.\r\n", __FUNCTION__); 1300 | } 1301 | } else { 1302 | printk(KERN_WARNING "%s: Failed to find device-tree node /soc.\r\n", __FUNCTION__); 1303 | printk(KERN_NOTICE "%s: Using hard-coded values for raspberry pi 1.\r\n", __FUNCTION__); 1304 | } 1305 | /* else we are prob on RPi 1 with BCM2835, and use the hardwired defaults */ 1306 | 1307 | /* Base of the peripherals block is mapped to VM */ 1308 | bcm2835_peripherals = mapmem("gpio", bcm2835_peripherals_size, (uint32_t)bcm2835_peripherals_base); 1309 | if (bcm2835_peripherals == MAP_FAILED) goto exit; 1310 | 1311 | /* Now compute the base addresses of various peripherals, 1312 | // which are at fixed offsets within the mapped peripherals block 1313 | // Caution: bcm2835_peripherals is uint32_t*, so divide offsets by 4 1314 | */ 1315 | bcm2835_gpio = bcm2835_peripherals + BCM2835_GPIO_BASE/4; 1316 | bcm2835_pwm = bcm2835_peripherals + BCM2835_GPIO_PWM/4; 1317 | bcm2835_clk = bcm2835_peripherals + BCM2835_CLOCK_BASE/4; 1318 | bcm2835_pads = bcm2835_peripherals + BCM2835_GPIO_PADS/4; 1319 | bcm2835_spi0 = bcm2835_peripherals + BCM2835_SPI0_BASE/4; 1320 | bcm2835_bsc0 = bcm2835_peripherals + BCM2835_BSC0_BASE/4; /* I2C */ 1321 | bcm2835_bsc1 = bcm2835_peripherals + BCM2835_BSC1_BASE/4; /* I2C */ 1322 | bcm2835_st = bcm2835_peripherals + BCM2835_ST_BASE/4; 1323 | 1324 | ok = 1; 1325 | 1326 | exit: 1327 | 1328 | if (!ok) 1329 | bcm2835_close(); 1330 | 1331 | return ok; 1332 | } 1333 | 1334 | /* Close this library and deallocate everything */ 1335 | int bcm2835_close(void) 1336 | { 1337 | if (debug) return 1; /* Success */ 1338 | 1339 | unmapmem((void**) &bcm2835_peripherals, bcm2835_peripherals_size); 1340 | bcm2835_peripherals = MAP_FAILED; 1341 | bcm2835_gpio = MAP_FAILED; 1342 | bcm2835_pwm = MAP_FAILED; 1343 | bcm2835_clk = MAP_FAILED; 1344 | bcm2835_pads = MAP_FAILED; 1345 | bcm2835_spi0 = MAP_FAILED; 1346 | bcm2835_bsc0 = MAP_FAILED; 1347 | bcm2835_bsc1 = MAP_FAILED; 1348 | bcm2835_st = MAP_FAILED; 1349 | return 1; /* Success */ 1350 | } 1351 | -------------------------------------------------------------------------------- /ksrc/bcm2835.h: -------------------------------------------------------------------------------- 1 | /* bcm2835.h 2 | 3 | C and C++ support for Broadcom BCM 2835 as used in Raspberry Pi 4 | 5 | Author: Mike McCauley 6 | Copyright (C) 2011-2013 Mike McCauley 7 | $Id: bcm2835.h,v 1.20 2015/03/31 04:55:41 mikem Exp mikem $ 8 | */ 9 | 10 | /*! \mainpage C library for Broadcom BCM 2835 as used in Raspberry Pi 11 | 12 | This is a C library for Raspberry Pi (RPi). It provides access to 13 | GPIO and other IO functions on the Broadcom BCM 2835 chip, 14 | allowing access to the GPIO pins on the 15 | 26 pin IDE plug on the RPi board so you can control and interface with various external devices. 16 | 17 | It provides functions for reading digital inputs and setting digital outputs, using SPI and I2C, 18 | and for accessing the system timers. 19 | Pin event detection is supported by polling (interrupts are not supported). 20 | 21 | It is C++ compatible, and installs as a header file and non-shared library on 22 | any Linux-based distro (but clearly is no use except on Raspberry Pi or another board with 23 | BCM 2835). 24 | 25 | The version of the package that this documentation refers to can be downloaded 26 | from http://www.airspayce.com/mikem/bcm2835/bcm2835-1.49.tar.gz 27 | You can find the latest version at http://www.airspayce.com/mikem/bcm2835 28 | 29 | Several example programs are provided. 30 | 31 | Based on data in http://elinux.org/RPi_Low-level_peripherals and 32 | http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf 33 | and http://www.scribd.com/doc/101830961/GPIO-Pads-Control2 34 | 35 | You can also find online help and discussion at http://groups.google.com/group/bcm2835 36 | Please use that group for all questions and discussions on this topic. 37 | Do not contact the author directly, unless it is to discuss commercial licensing. 38 | Before asking a question or reporting a bug, please read http://www.catb.org/esr/faqs/smart-questions.html 39 | 40 | Tested on debian6-19-04-2012, 2012-07-15-wheezy-raspbian, 2013-07-26-wheezy-raspbian 41 | and Occidentalisv01 42 | CAUTION: it has been observed that when detect enables such as bcm2835_gpio_len() 43 | are used and the pin is pulled LOW 44 | it can cause temporary hangs on 2012-07-15-wheezy-raspbian, 2013-07-26-wheezy-raspbian 45 | and Occidentalisv01. 46 | Reason for this is not yet determined, but we suspect that an interrupt handler is 47 | hitting a hard loop on those OSs. 48 | If you must use bcm2835_gpio_len() and friends, make sure you disable the pins with 49 | bcm2835_gpio_clr_len() and friends after use. 50 | 51 | \par Installation 52 | 53 | This library consists of a single non-shared library and header file, which will be 54 | installed in the usual places by make install 55 | 56 | \code 57 | # download the latest version of the library, say bcm2835-1.xx.tar.gz, then: 58 | tar zxvf bcm2835-1.xx.tar.gz 59 | cd bcm2835-1.xx 60 | ./configure 61 | make 62 | sudo make check 63 | sudo make install 64 | \endcode 65 | 66 | \par Physical Addresses 67 | 68 | The functions bcm2835_peri_read(), bcm2835_peri_write() and bcm2835_peri_set_bits() 69 | are low level peripheral register access functions. They are designed to use 70 | physical addresses as described in section 1.2.3 ARM physical addresses 71 | of the BCM2835 ARM Peripherals manual. 72 | Physical addresses range from 0x20000000 to 0x20FFFFFF for peripherals. The bus 73 | addresses for peripherals are set up to map onto the peripheral bus address range starting at 74 | 0x7E000000. Thus a peripheral advertised in the manual at bus address 0x7Ennnnnn is available at 75 | physical address 0x20nnnnnn. 76 | 77 | On RPI 2, the peripheral addresses are different and the bcm2835 library gets them 78 | from reading /proc/device-tree/soc/ranges. This is only availble with recent versions of the kernel on RPI 2. 79 | 80 | After initialisation, the base address of the various peripheral 81 | registers are available with the following 82 | externals: 83 | bcm2835_gpio 84 | bcm2835_pwm 85 | bcm2835_clk 86 | bcm2835_pads 87 | bcm2835_spio0 88 | bcm2835_st 89 | bcm2835_bsc0 90 | bcm2835_bsc1 91 | 92 | \par Raspberry Pi 2 (RPI2) 93 | 94 | For this library to work correctly on RPI2, you MUST have the device tree support enabled in the kernel. 95 | You should also ensure you are using the latest version of Linux. The library has been tested on RPI2 96 | with 2015-02-16-raspbian-wheezy and ArchLinuxARM-rpi-2 as of 2015-03-29. 97 | 98 | When device tree suport is enabled, the file /proc/device-tree/soc/ranges will appear in the file system, 99 | and the bcm2835 module relies on its presence to correctly run on RPI2 (it is optional for RPI1). 100 | Without device tree support enabled and the presence of this file, it will not work on RPI2. 101 | 102 | To enable device tree support: 103 | 104 | \code 105 | sudo raspi-config 106 | under Advanced Options - enable Device Tree 107 | Reboot. 108 | \endcode 109 | 110 | \par Pin Numbering 111 | 112 | The GPIO pin numbering as used by RPi is different to and inconsistent with the underlying 113 | BCM 2835 chip pin numbering. http://elinux.org/RPi_BCM2835_GPIOs 114 | 115 | RPi has a 26 pin IDE header that provides access to some of the GPIO pins on the BCM 2835, 116 | as well as power and ground pins. Not all GPIO pins on the BCM 2835 are available on the 117 | IDE header. 118 | 119 | RPi Version 2 also has a P5 connector with 4 GPIO pins, 5V, 3.3V and Gnd. 120 | 121 | The functions in this library are designed to be passed the BCM 2835 GPIO pin number and _not_ 122 | the RPi pin number. There are symbolic definitions for each of the available pins 123 | that you should use for convenience. See \ref RPiGPIOPin. 124 | 125 | \par SPI Pins 126 | 127 | The bcm2835_spi_* functions allow you to control the BCM 2835 SPI0 interface, 128 | allowing you to send and received data by SPI (Serial Peripheral Interface). 129 | For more information about SPI, see http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus 130 | 131 | When bcm2835_spi_begin() is called it changes the bahaviour of the SPI interface pins from their 132 | default GPIO behaviour in order to support SPI. While SPI is in use, you will not be able 133 | to control the state of the SPI pins through the usual bcm2835_spi_gpio_write(). 134 | When bcm2835_spi_end() is called, the SPI pins will all revert to inputs, and can then be 135 | configured and controled with the usual bcm2835_gpio_* calls. 136 | 137 | The Raspberry Pi GPIO pins used for SPI are: 138 | 139 | - P1-19 (MOSI) 140 | - P1-21 (MISO) 141 | - P1-23 (CLK) 142 | - P1-24 (CE0) 143 | - P1-26 (CE1) 144 | 145 | \par I2C Pins 146 | 147 | The bcm2835_i2c_* functions allow you to control the BCM 2835 BSC interface, 148 | allowing you to send and received data by I2C ("eye-squared cee"; generically referred to as "two-wire interface") . 149 | For more information about I?C, see http://en.wikipedia.org/wiki/I%C2%B2C 150 | 151 | The Raspberry Pi V2 GPIO pins used for I2C are: 152 | 153 | - P1-03 (SDA) 154 | - P1-05 (SLC) 155 | 156 | \par PWM 157 | 158 | The BCM2835 supports hardware PWM on a limited subset of GPIO pins. This bcm2835 library provides 159 | functions for configuring and controlling PWM output on these pins. 160 | 161 | The BCM2835 contains 2 independent PWM channels (0 and 1), each of which be connnected to a limited subset of 162 | GPIO pins. The following GPIO pins may be connected to the following PWM channels (from section 9.5): 163 | \code 164 | GPIO PIN RPi pin PWM Channel ALT FUN 165 | 12 0 0 166 | 13 1 0 167 | 18 1-12 0 5 168 | 19 1 5 169 | 40 0 0 170 | 41 1 0 171 | 45 1 0 172 | 52 0 1 173 | 53 1 1 174 | \endcode 175 | In order for a GPIO pin to emit output from its PWM channel, it must be set to the Alt Function given above. 176 | Note carefully that current versions of the Raspberry Pi only expose one of these pins (GPIO 18 = RPi Pin 1-12) 177 | on the IO headers, and therefore this is the only IO pin on the RPi that can be used for PWM. 178 | Further it must be set to ALT FUN 5 to get PWM output. 179 | 180 | Both PWM channels are driven by the same PWM clock, whose clock dvider can be varied using 181 | bcm2835_pwm_set_clock(). Each channel can be separately enabled with bcm2835_pwm_set_mode(). 182 | The average output of the PWM channel is determined by the ratio of DATA/RANGE for that channel. 183 | Use bcm2835_pwm_set_range() to set the range and bcm2835_pwm_set_data() to set the data in that ratio 184 | 185 | Each PWM channel can run in either Balanced or Mark-Space mode. In Balanced mode, the hardware 186 | sends a combination of clock pulses that results in an overall DATA pulses per RANGE pulses. 187 | In Mark-Space mode, the hardware sets the output HIGH for DATA clock pulses wide, followed by 188 | LOW for RANGE-DATA clock pulses. 189 | 190 | The PWM clock can be set to control the PWM pulse widths. The PWM clock is derived from 191 | a 19.2MHz clock. You can set any divider, but some common ones are provided by the BCM2835_PWM_CLOCK_DIVIDER_* 192 | values of \ref bcm2835PWMClockDivider. 193 | 194 | For example, say you wanted to drive a DC motor with PWM at about 1kHz, 195 | and control the speed in 1/1024 increments from 196 | 0/1024 (stopped) through to 1024/1024 (full on). In that case you might set the 197 | clock divider to be 16, and the RANGE to 1024. The pulse repetition frequency will be 198 | 1.2MHz/1024 = 1171.875Hz. 199 | 200 | \par SPI 201 | 202 | In order for bcm2835 library SPI to work, you may need to disable the SPI kernel module using: 203 | 204 | \code 205 | sudo raspi-config 206 | under Advanced Options - enable Device Tree 207 | under Advanced Options - disable SPI 208 | Reboot. 209 | \endcode 210 | 211 | \par Real Time performance constraints 212 | 213 | The bcm2835 is a library for user programs (i.e. they run in 'userland'). 214 | Such programs are not part of the kernel and are usually 215 | subject to paging and swapping by the kernel while it does other things besides running your program. 216 | This means that you should not expect to get real-time performance or 217 | real-time timing constraints from such programs. In particular, there is no guarantee that the 218 | bcm2835_delay() and bcm2835_delayMicroseconds() will return after exactly the time requested. 219 | In fact, depending on other activity on the host, IO etc, you might get significantly longer delay times 220 | than the one you asked for. So please dont expect to get exactly the time delay you request. 221 | 222 | Arjan reports that you can prevent swapping on Linux with the following code fragment: 223 | 224 | \code 225 | struct sched_param sp; 226 | memset(&sp, 0, sizeof(sp)); 227 | sp.sched_priority = sched_get_priority_max(SCHED_FIFO); 228 | sched_setscheduler(0, SCHED_FIFO, &sp); 229 | mlockall(MCL_CURRENT | MCL_FUTURE); 230 | \endcode 231 | 232 | \par Bindings to other languages 233 | 234 | mikem has made Perl bindings available at CPAN: 235 | http://search.cpan.org/~mikem/Device-BCM2835-1.9/lib/Device/BCM2835.pm 236 | Matthew Baker has kindly made Python bindings available at: 237 | https: github.com/mubeta06/py-libbcm2835 238 | Gary Marks has created a Serial Peripheral Interface (SPI) command-line utility 239 | for Raspberry Pi, based on the bcm2835 library. The 240 | utility, spincl, is licensed under Open Source GNU GPLv3 by iP Solutions (http://ipsolutionscorp.com), as a 241 | free download with source included: http://ipsolutionscorp.com/raspberry-pi-spi-utility/ 242 | 243 | \par Open Source Licensing GPL V2 244 | 245 | This is the appropriate option if you want to share the source code of your 246 | application with everyone you distribute it to, and you also want to give them 247 | the right to share who uses it. If you wish to use this software under Open 248 | Source Licensing, you must contribute all your source code to the open source 249 | community in accordance with the GPL Version 2 when your application is 250 | distributed. See http://www.gnu.org/copyleft/gpl.html and COPYING 251 | 252 | \par Acknowledgements 253 | 254 | Some of this code has been inspired by Dom and Gert. 255 | The I2C code has been inspired by Alan Barr. 256 | 257 | \par Revision History 258 | 259 | \version 1.0 Initial release 260 | 261 | \version 1.1 Minor bug fixes 262 | 263 | \version 1.2 Added support for SPI 264 | 265 | \version 1.3 Added bcm2835_spi_transfern() 266 | 267 | \version 1.4 Fixed a problem that prevented SPI CE1 being used. Reported by David Robinson. 268 | 269 | \version 1.5 Added bcm2835_close() to deinit the library. Suggested by C?sar Ortiz 270 | 271 | \version 1.6 Document testing on 2012-07-15-wheezy-raspbian and Occidentalisv01 272 | Functions bcm2835_gpio_ren(), bcm2835_gpio_fen(), bcm2835_gpio_hen() 273 | bcm2835_gpio_len(), bcm2835_gpio_aren() and bcm2835_gpio_afen() now 274 | changes only the pin specified. Other pins that were already previously 275 | enabled stay enabled. 276 | Added bcm2835_gpio_clr_ren(), bcm2835_gpio_clr_fen(), bcm2835_gpio_clr_hen() 277 | bcm2835_gpio_clr_len(), bcm2835_gpio_clr_aren(), bcm2835_gpio_clr_afen() 278 | to clear the enable for individual pins, suggested by Andreas Sundstrom. 279 | 280 | \version 1.7 Added bcm2835_spi_transfernb to support different buffers for read and write. 281 | 282 | \version 1.8 Improvements to read barrier, as suggested by maddin. 283 | 284 | \version 1.9 Improvements contributed by mikew: 285 | I noticed that it was mallocing memory for the mmaps on /dev/mem. 286 | It's not necessary to do that, you can just mmap the file directly, 287 | so I've removed the mallocs (and frees). 288 | I've also modified delayMicroseconds() to use nanosleep() for long waits, 289 | and a busy wait on a high resolution timer for the rest. This is because 290 | I've found that calling nanosleep() takes at least 100-200 us. 291 | You need to link using '-lrt' using this version. 292 | I've added some unsigned casts to the debug prints to silence compiler 293 | warnings I was getting, fixed some typos, and changed the value of 294 | BCM2835_PAD_HYSTERESIS_ENABLED to 0x08 as per Gert van Loo's doc at 295 | http://www.scribd.com/doc/101830961/GPIO-Pads-Control2 296 | Also added a define for the passwrd value that Gert says is needed to 297 | change pad control settings. 298 | 299 | \version 1.10 Changed the names of the delay functions to bcm2835_delay() 300 | and bcm2835_delayMicroseconds() to prevent collisions with wiringPi. 301 | Macros to map delay()-> bcm2835_delay() and 302 | Macros to map delayMicroseconds()-> bcm2835_delayMicroseconds(), which 303 | can be disabled by defining BCM2835_NO_DELAY_COMPATIBILITY 304 | 305 | \version 1.11 Fixed incorrect link to download file 306 | 307 | \version 1.12 New GPIO pin definitions for RPi version 2 (which has a different GPIO mapping) 308 | 309 | \version 1.13 New GPIO pin definitions for RPi version 2 plug P5 310 | Hardware base pointers are now available (after initialisation) externally as bcm2835_gpio 311 | bcm2835_pwm bcm2835_clk bcm2835_pads bcm2835_spi0. 312 | 313 | \version 1.14 Now compiles even if CLOCK_MONOTONIC_RAW is not available, uses CLOCK_MONOTONIC instead. 314 | Fixed errors in documentation of SPI divider frequencies based on 250MHz clock. 315 | Reported by Ben Simpson. 316 | 317 | \version 1.15 Added bcm2835_close() to end of examples as suggested by Mark Wolfe. 318 | 319 | \version 1.16 Added bcm2835_gpio_set_multi, bcm2835_gpio_clr_multi and bcm2835_gpio_write_multi 320 | to allow a mask of pins to be set all at once. Requested by Sebastian Loncar. 321 | 322 | \version 1.17 Added bcm2835_gpio_write_mask. Requested by Sebastian Loncar. 323 | 324 | \version 1.18 Added bcm2835_i2c_* functions. Changes to bcm2835_delayMicroseconds: 325 | now uses the RPi system timer counter, instead of clock_gettime, for improved accuracy. 326 | No need to link with -lrt now. Contributed by Arjan van Vught. 327 | \version 1.19 Removed inlines added by previous patch since they don't seem to work everywhere. 328 | Reported by olly. 329 | 330 | \version 1.20 Patch from Mark Dootson to close /dev/mem after access to the peripherals has been granted. 331 | 332 | \version 1.21 delayMicroseconds is now not susceptible to 32 bit timer overruns. 333 | Patch courtesy Jeremy Mortis. 334 | 335 | \version 1.22 Fixed incorrect definition of BCM2835_GPFEN0 which broke the ability to set 336 | falling edge events. Reported by Mark Dootson. 337 | 338 | \version 1.23 Added bcm2835_i2c_set_baudrate and bcm2835_i2c_read_register_rs. 339 | Improvements to bcm2835_i2c_read and bcm2835_i2c_write functions 340 | to fix ocasional reads not completing. Patched by Mark Dootson. 341 | 342 | \version 1.24 Mark Dootson p[atched a problem with his previously submitted code 343 | under high load from other processes. 344 | 345 | \version 1.25 Updated author and distribution location details to airspayce.com 346 | 347 | \version 1.26 Added missing unmapmem for pads in bcm2835_close to prevent a memory leak. 348 | Reported by Hartmut Henkel. 349 | 350 | \version 1.27 bcm2835_gpio_set_pad() no longer needs BCM2835_PAD_PASSWRD: it is 351 | now automatically included. 352 | Added suport for PWM mode with bcm2835_pwm_* functions. 353 | 354 | \version 1.28 Fixed a problem where bcm2835_spi_writenb() would have problems with transfers of more than 355 | 64 bytes dues to read buffer filling. Patched by Peter Würtz. 356 | 357 | \version 1.29 Further fix to SPI from Peter Würtz. 358 | 359 | \version 1.30 10 microsecond delays from bcm2835_spi_transfer and bcm2835_spi_transfern for 360 | significant performance improvements, Patch by Alan Watson. 361 | 362 | \version 1.31 Fix a GCC warning about dummy variable, patched by Alan Watson. Thanks. 363 | 364 | \version 1.32 Added option I2C_V1 definition to compile for version 1 RPi. 365 | By default I2C code is generated for the V2 RPi which has SDA1 and SCL1 connected. 366 | Contributed by Malcolm Wiles based on work by Arvi Govindaraj. 367 | 368 | \version 1.33 Added command line utilities i2c and gpio to examples. Contributed by Shahrooz Shahparnia. 369 | 370 | \version 1.34 Added bcm2835_i2c_write_read_rs() which writes an arbitrary number of bytes, 371 | sends a repeat start, and reads from the device. Contributed by Eduardo Steinhorst. 372 | 373 | \version 1.35 Fix build errors when compiled under Qt. Also performance improvements with SPI transfers. Contributed b Udo Klaas. 374 | 375 | \version 1.36 Make automake's test runner detect that we're skipping tests when not root, the second 376 | one makes us skip the test when using fakeroot (as used when building 377 | Debian packages). Contributed by Guido Günther. 378 | 379 | \version 1.37 Moved confiure.in to configure.ac as receommnded by autoreconf.
380 | Improvements to bcm2835_st_read to account for possible timer overflow, contributed by 'Ed'.
381 | Added definitions for Raspberry Pi B+ J8 header GPIO pins.
382 | 383 | \version 1.38 Added bcm2835_regbase for the benefit of C# wrappers, patch by Frank Hommers
384 | 385 | \version 1.39 Beta version of RPi2 compatibility. Not tested here on RPi2 hardware. 386 | Testers please confirm correct operation on RPi2.
387 | Unneccessary 'volatile' qualifiers removed from all variables and signatures.
388 | Removed unsupportable PWM dividers, based on a report from Christophe Cecillon.
389 | Minor improvements to spi.c example.
390 | 391 | \version 1.40 Correct operation on RPi2 has been confirmed.
392 | Fixed a number of compiler errors and warnings that occur when bcm2835.h is included 393 | in code compiled with -Wall -Woverflow -Wstrict-overflow -Wshadow -Wextra -pedantic. 394 | Reported by tlhackque.
395 | Fixed a problem where calling bcm2835_delayMicroseconds loops forever when debug is set. Reported by tlhackque.
396 | Reinstated use of volatile in 2 functions where there was a danger of lost reads or writes. Reported by tlhackque.
397 | 398 | \version 1.41 Added BCM2835_VERSION macro and new function bcm2835_version(); Requested by tlhackque.
399 | Improvements to peripheral memory barriers as suggested by tlhackque.
400 | Reinstated some necessary volatile declarations as requested by tlhackque.
401 | 402 | \version 1.42 Further improvements to memory barriers with the patient assistance and patches of tlhackque.
403 | 404 | \version 1.43 Fixed problems with compiling barriers on RPI 2 with Arch Linux and gcc 4.9.2. 405 | Reported and patched by Lars Christensen.
406 | Testing on RPI 2, with ArchLinuxARM-rpi-2-latest and 2015-02-16-raspbian-wheezy.
407 | 408 | \version 1.44 Added documention about the need for device tree to be enabled on RPI2.
409 | Improvements to detection of availablity of DMB instruction based on value of __ARM_ARCH macro.
410 | 411 | \version 1.45 Fixed an error in the pad group offsets that would prevent bcm2835_gpio_set_pad() 412 | and bcm2835_gpio_pad() working correctly with non-0 pad groups. Reported by Guido. 413 | 414 | \version 1.46 2015-09-18 415 | Added symbolic definitions for remaining pins on 40 pin GPIO header on RPi 2.
416 | 417 | \version 1.47 2015-11-18 418 | Fixed possibly incorrect reads in bcm2835_i2c_read_register_rs, patch from Eckhardt Ulrich.
419 | 420 | \version 1.48 2015-12-08 421 | Added patch from Eckhardt Ulrich that fixed problems that could cause hanging with bcm2835_i2c_read_register_rs 422 | and others. 423 | 424 | \version 1.49 2016-01-05 425 | Added patch from Jonathan Perkin with new functions bcm2835_gpio_eds_multi() and bcm2835_gpio_set_eds_multi(). 426 | 427 | \author Mike McCauley (mikem@airspayce.com) DO NOT CONTACT THE AUTHOR DIRECTLY: USE THE LISTS 428 | */ 429 | 430 | 431 | /* Defines for BCM2835 */ 432 | #ifndef BCM2835_H 433 | #define BCM2835_H 434 | 435 | #define BCM2835_VERSION 10049 /* Version 1.49 */ 436 | 437 | /* RPi 2 is ARM v7, and has DMB instruction for memory barriers. 438 | Older RPis are ARM v6 and don't, so a coprocessor instruction must be used instead. 439 | However, not all versions of gcc in all distros support the dmb assembler instruction even on conmpatible processors. 440 | This test is so any ARMv7 or higher processors with suitable GCC will use DMB. 441 | */ 442 | #if __ARM_ARCH >= 7 443 | #define BCM2835_HAVE_DMB 444 | #endif 445 | 446 | /*! \defgroup constants Constants for passing to and from library functions 447 | The values here are designed to be passed to various functions in the bcm2835 library. 448 | @{ 449 | */ 450 | 451 | /*! This means pin HIGH, true, 3.3volts on a pin. */ 452 | #define HIGH 0x1 453 | /*! This means pin LOW, false, 0volts on a pin. */ 454 | #define LOW 0x0 455 | 456 | /*! Speed of the core clock core_clk */ 457 | #define BCM2835_CORE_CLK_HZ 250000000 /*!< 250 MHz */ 458 | 459 | /*! On RPi2 with BCM2836, and all recent OSs, the base of the peripherals is read from a /proc file */ 460 | #define BMC2835_RPI2_DT_FILENAME "/proc/device-tree/soc/ranges" 461 | /*! Offset into BMC2835_RPI2_DT_FILENAME for the peripherals base address */ 462 | #define BMC2835_RPI2_DT_PERI_BASE_ADDRESS_OFFSET 4 463 | /*! Offset into BMC2835_RPI2_DT_FILENAME for the peripherals size address */ 464 | #define BMC2835_RPI2_DT_PERI_SIZE_OFFSET 8 465 | 466 | /*! Physical addresses for various peripheral register sets 467 | Base Physical Address of the BCM 2835 peripheral registers 468 | Note this is different for the RPi2 BCM2836, where this is derived from /proc/device-tree/soc/ranges 469 | If /proc/device-tree/soc/ranges exists on a RPi 1 OS, it would be expected to contain the 470 | following numbers: 471 | */ 472 | /*! Peripherals block base address on RPi 1 */ 473 | #define BCM2835_PERI_BASE 0x20000000 474 | /*! Size of the peripherals block on RPi 1 */ 475 | #define BCM2835_PERI_SIZE 0x01000000 476 | 477 | /*! Offsets for the bases of various peripherals within the peripherals block 478 | / Base Address of the System Timer registers 479 | */ 480 | #define BCM2835_ST_BASE 0x3000 481 | /*! Base Address of the Pads registers */ 482 | #define BCM2835_GPIO_PADS 0x100000 483 | /*! Base Address of the Clock/timer registers */ 484 | #define BCM2835_CLOCK_BASE 0x101000 485 | /*! Base Address of the GPIO registers */ 486 | #define BCM2835_GPIO_BASE 0x200000 487 | /*! Base Address of the SPI0 registers */ 488 | #define BCM2835_SPI0_BASE 0x204000 489 | /*! Base Address of the BSC0 registers */ 490 | #define BCM2835_BSC0_BASE 0x205000 491 | /*! Base Address of the PWM registers */ 492 | #define BCM2835_GPIO_PWM 0x20C000 493 | /*! Base Address of the BSC1 registers */ 494 | #define BCM2835_BSC1_BASE 0x804000 495 | 496 | /*! Physical address and size of the peripherals block 497 | May be overridden on RPi2 498 | */ 499 | extern uint32_t *bcm2835_peripherals_base; 500 | /*! Size of the peripherals block to be mapped */ 501 | extern uint32_t bcm2835_peripherals_size; 502 | 503 | /*! Virtual memory address of the mapped peripherals block */ 504 | extern uint32_t *bcm2835_peripherals; 505 | 506 | /*! Base of the ST (System Timer) registers. 507 | Available after bcm2835_init has been called 508 | */ 509 | extern volatile uint32_t *bcm2835_st; 510 | 511 | /*! Base of the GPIO registers. 512 | Available after bcm2835_init has been called 513 | */ 514 | extern volatile uint32_t *bcm2835_gpio; 515 | 516 | /*! Base of the PWM registers. 517 | Available after bcm2835_init has been called 518 | */ 519 | extern volatile uint32_t *bcm2835_pwm; 520 | 521 | /*! Base of the CLK registers. 522 | Available after bcm2835_init has been called 523 | */ 524 | extern volatile uint32_t *bcm2835_clk; 525 | 526 | /*! Base of the PADS registers. 527 | Available after bcm2835_init has been called 528 | */ 529 | extern volatile uint32_t *bcm2835_pads; 530 | 531 | /*! Base of the SPI0 registers. 532 | Available after bcm2835_init has been called 533 | */ 534 | extern volatile uint32_t *bcm2835_spi0; 535 | 536 | /*! Base of the BSC0 registers. 537 | Available after bcm2835_init has been called 538 | */ 539 | extern volatile uint32_t *bcm2835_bsc0; 540 | 541 | /*! Base of the BSC1 registers. 542 | Available after bcm2835_init has been called 543 | */ 544 | extern volatile uint32_t *bcm2835_bsc1; 545 | 546 | /*! \brief bcm2835RegisterBase 547 | Register bases for bcm2835_regbase() 548 | */ 549 | typedef enum 550 | { 551 | BCM2835_REGBASE_ST = 1, /*!< Base of the ST (System Timer) registers. */ 552 | BCM2835_REGBASE_GPIO = 2, /*!< Base of the GPIO registers. */ 553 | BCM2835_REGBASE_PWM = 3, /*!< Base of the PWM registers. */ 554 | BCM2835_REGBASE_CLK = 4, /*!< Base of the CLK registers. */ 555 | BCM2835_REGBASE_PADS = 5, /*!< Base of the PADS registers. */ 556 | BCM2835_REGBASE_SPI0 = 6, /*!< Base of the SPI0 registers. */ 557 | BCM2835_REGBASE_BSC0 = 7, /*!< Base of the BSC0 registers. */ 558 | BCM2835_REGBASE_BSC1 = 8 /*!< Base of the BSC1 registers. */ 559 | } bcm2835RegisterBase; 560 | 561 | /*! Size of memory page on RPi */ 562 | #define BCM2835_PAGE_SIZE (4*1024) 563 | /*! Size of memory block on RPi */ 564 | #define BCM2835_BLOCK_SIZE (4*1024) 565 | 566 | 567 | /* Defines for GPIO 568 | The BCM2835 has 54 GPIO pins. 569 | BCM2835 data sheet, Page 90 onwards. 570 | */ 571 | /*! GPIO register offsets from BCM2835_GPIO_BASE. 572 | Offsets into the GPIO Peripheral block in bytes per 6.1 Register View 573 | */ 574 | #define BCM2835_GPFSEL0 0x0000 /*!< GPIO Function Select 0 */ 575 | #define BCM2835_GPFSEL1 0x0004 /*!< GPIO Function Select 1 */ 576 | #define BCM2835_GPFSEL2 0x0008 /*!< GPIO Function Select 2 */ 577 | #define BCM2835_GPFSEL3 0x000c /*!< GPIO Function Select 3 */ 578 | #define BCM2835_GPFSEL4 0x0010 /*!< GPIO Function Select 4 */ 579 | #define BCM2835_GPFSEL5 0x0014 /*!< GPIO Function Select 5 */ 580 | #define BCM2835_GPSET0 0x001c /*!< GPIO Pin Output Set 0 */ 581 | #define BCM2835_GPSET1 0x0020 /*!< GPIO Pin Output Set 1 */ 582 | #define BCM2835_GPCLR0 0x0028 /*!< GPIO Pin Output Clear 0 */ 583 | #define BCM2835_GPCLR1 0x002c /*!< GPIO Pin Output Clear 1 */ 584 | #define BCM2835_GPLEV0 0x0034 /*!< GPIO Pin Level 0 */ 585 | #define BCM2835_GPLEV1 0x0038 /*!< GPIO Pin Level 1 */ 586 | #define BCM2835_GPEDS0 0x0040 /*!< GPIO Pin Event Detect Status 0 */ 587 | #define BCM2835_GPEDS1 0x0044 /*!< GPIO Pin Event Detect Status 1 */ 588 | #define BCM2835_GPREN0 0x004c /*!< GPIO Pin Rising Edge Detect Enable 0 */ 589 | #define BCM2835_GPREN1 0x0050 /*!< GPIO Pin Rising Edge Detect Enable 1 */ 590 | #define BCM2835_GPFEN0 0x0058 /*!< GPIO Pin Falling Edge Detect Enable 0 */ 591 | #define BCM2835_GPFEN1 0x005c /*!< GPIO Pin Falling Edge Detect Enable 1 */ 592 | #define BCM2835_GPHEN0 0x0064 /*!< GPIO Pin High Detect Enable 0 */ 593 | #define BCM2835_GPHEN1 0x0068 /*!< GPIO Pin High Detect Enable 1 */ 594 | #define BCM2835_GPLEN0 0x0070 /*!< GPIO Pin Low Detect Enable 0 */ 595 | #define BCM2835_GPLEN1 0x0074 /*!< GPIO Pin Low Detect Enable 1 */ 596 | #define BCM2835_GPAREN0 0x007c /*!< GPIO Pin Async. Rising Edge Detect 0 */ 597 | #define BCM2835_GPAREN1 0x0080 /*!< GPIO Pin Async. Rising Edge Detect 1 */ 598 | #define BCM2835_GPAFEN0 0x0088 /*!< GPIO Pin Async. Falling Edge Detect 0 */ 599 | #define BCM2835_GPAFEN1 0x008c /*!< GPIO Pin Async. Falling Edge Detect 1 */ 600 | #define BCM2835_GPPUD 0x0094 /*!< GPIO Pin Pull-up/down Enable */ 601 | #define BCM2835_GPPUDCLK0 0x0098 /*!< GPIO Pin Pull-up/down Enable Clock 0 */ 602 | #define BCM2835_GPPUDCLK1 0x009c /*!< GPIO Pin Pull-up/down Enable Clock 1 */ 603 | 604 | /*! \brief bcm2835PortFunction 605 | Port function select modes for bcm2835_gpio_fsel() 606 | */ 607 | typedef enum 608 | { 609 | BCM2835_GPIO_FSEL_INPT = 0x00, /*!< Input 0b000 */ 610 | BCM2835_GPIO_FSEL_OUTP = 0x01, /*!< Output 0b001 */ 611 | BCM2835_GPIO_FSEL_ALT0 = 0x04, /*!< Alternate function 0 0b100 */ 612 | BCM2835_GPIO_FSEL_ALT1 = 0x05, /*!< Alternate function 1 0b101 */ 613 | BCM2835_GPIO_FSEL_ALT2 = 0x06, /*!< Alternate function 2 0b110, */ 614 | BCM2835_GPIO_FSEL_ALT3 = 0x07, /*!< Alternate function 3 0b111 */ 615 | BCM2835_GPIO_FSEL_ALT4 = 0x03, /*!< Alternate function 4 0b011 */ 616 | BCM2835_GPIO_FSEL_ALT5 = 0x02, /*!< Alternate function 5 0b010 */ 617 | BCM2835_GPIO_FSEL_MASK = 0x07 /*!< Function select bits mask 0b111 */ 618 | } bcm2835FunctionSelect; 619 | 620 | /*! \brief bcm2835PUDControl 621 | Pullup/Pulldown defines for bcm2835_gpio_pud() 622 | */ 623 | typedef enum 624 | { 625 | BCM2835_GPIO_PUD_OFF = 0x00, /*!< Off ? disable pull-up/down 0b00 */ 626 | BCM2835_GPIO_PUD_DOWN = 0x01, /*!< Enable Pull Down control 0b01 */ 627 | BCM2835_GPIO_PUD_UP = 0x02 /*!< Enable Pull Up control 0b10 */ 628 | } bcm2835PUDControl; 629 | 630 | /*! Pad control register offsets from BCM2835_GPIO_PADS */ 631 | #define BCM2835_PADS_GPIO_0_27 0x002c /*!< Pad control register for pads 0 to 27 */ 632 | #define BCM2835_PADS_GPIO_28_45 0x0030 /*!< Pad control register for pads 28 to 45 */ 633 | #define BCM2835_PADS_GPIO_46_53 0x0034 /*!< Pad control register for pads 46 to 53 */ 634 | 635 | /*! Pad Control masks */ 636 | #define BCM2835_PAD_PASSWRD (0x5A << 24) /*!< Password to enable setting pad mask */ 637 | #define BCM2835_PAD_SLEW_RATE_UNLIMITED 0x10 /*!< Slew rate unlimited */ 638 | #define BCM2835_PAD_HYSTERESIS_ENABLED 0x08 /*!< Hysteresis enabled */ 639 | #define BCM2835_PAD_DRIVE_2mA 0x00 /*!< 2mA drive current */ 640 | #define BCM2835_PAD_DRIVE_4mA 0x01 /*!< 4mA drive current */ 641 | #define BCM2835_PAD_DRIVE_6mA 0x02 /*!< 6mA drive current */ 642 | #define BCM2835_PAD_DRIVE_8mA 0x03 /*!< 8mA drive current */ 643 | #define BCM2835_PAD_DRIVE_10mA 0x04 /*!< 10mA drive current */ 644 | #define BCM2835_PAD_DRIVE_12mA 0x05 /*!< 12mA drive current */ 645 | #define BCM2835_PAD_DRIVE_14mA 0x06 /*!< 14mA drive current */ 646 | #define BCM2835_PAD_DRIVE_16mA 0x07 /*!< 16mA drive current */ 647 | 648 | /*! \brief bcm2835PadGroup 649 | Pad group specification for bcm2835_gpio_pad() 650 | */ 651 | typedef enum 652 | { 653 | BCM2835_PAD_GROUP_GPIO_0_27 = 0, /*!< Pad group for GPIO pads 0 to 27 */ 654 | BCM2835_PAD_GROUP_GPIO_28_45 = 1, /*!< Pad group for GPIO pads 28 to 45 */ 655 | BCM2835_PAD_GROUP_GPIO_46_53 = 2 /*!< Pad group for GPIO pads 46 to 53 */ 656 | } bcm2835PadGroup; 657 | 658 | /*! \brief GPIO Pin Numbers 659 | 660 | Here we define Raspberry Pin GPIO pins on P1 in terms of the underlying BCM GPIO pin numbers. 661 | These can be passed as a pin number to any function requiring a pin. 662 | Not all pins on the RPi 26 bin IDE plug are connected to GPIO pins 663 | and some can adopt an alternate function. 664 | RPi version 2 has some slightly different pinouts, and these are values RPI_V2_*. 665 | RPi B+ has yet differnet pinouts and these are defined in RPI_BPLUS_*. 666 | At bootup, pins 8 and 10 are set to UART0_TXD, UART0_RXD (ie the alt0 function) respectively 667 | When SPI0 is in use (ie after bcm2835_spi_begin()), SPI0 pins are dedicated to SPI 668 | and cant be controlled independently. 669 | If you are using the RPi Compute Module, just use the GPIO number: there is no need to use one of these 670 | symbolic names 671 | */ 672 | typedef enum 673 | { 674 | RPI_GPIO_P1_03 = 0, /*!< Version 1, Pin P1-03 */ 675 | RPI_GPIO_P1_05 = 1, /*!< Version 1, Pin P1-05 */ 676 | RPI_GPIO_P1_07 = 4, /*!< Version 1, Pin P1-07 */ 677 | RPI_GPIO_P1_08 = 14, /*!< Version 1, Pin P1-08, defaults to alt function 0 UART0_TXD */ 678 | RPI_GPIO_P1_10 = 15, /*!< Version 1, Pin P1-10, defaults to alt function 0 UART0_RXD */ 679 | RPI_GPIO_P1_11 = 17, /*!< Version 1, Pin P1-11 */ 680 | RPI_GPIO_P1_12 = 18, /*!< Version 1, Pin P1-12, can be PWM channel 0 in ALT FUN 5 */ 681 | RPI_GPIO_P1_13 = 21, /*!< Version 1, Pin P1-13 */ 682 | RPI_GPIO_P1_15 = 22, /*!< Version 1, Pin P1-15 */ 683 | RPI_GPIO_P1_16 = 23, /*!< Version 1, Pin P1-16 */ 684 | RPI_GPIO_P1_18 = 24, /*!< Version 1, Pin P1-18 */ 685 | RPI_GPIO_P1_19 = 10, /*!< Version 1, Pin P1-19, MOSI when SPI0 in use */ 686 | RPI_GPIO_P1_21 = 9, /*!< Version 1, Pin P1-21, MISO when SPI0 in use */ 687 | RPI_GPIO_P1_22 = 25, /*!< Version 1, Pin P1-22 */ 688 | RPI_GPIO_P1_23 = 11, /*!< Version 1, Pin P1-23, CLK when SPI0 in use */ 689 | RPI_GPIO_P1_24 = 8, /*!< Version 1, Pin P1-24, CE0 when SPI0 in use */ 690 | RPI_GPIO_P1_26 = 7, /*!< Version 1, Pin P1-26, CE1 when SPI0 in use */ 691 | 692 | /* RPi Version 2 */ 693 | RPI_V2_GPIO_P1_03 = 2, /*!< Version 2, Pin P1-03 */ 694 | RPI_V2_GPIO_P1_05 = 3, /*!< Version 2, Pin P1-05 */ 695 | RPI_V2_GPIO_P1_07 = 4, /*!< Version 2, Pin P1-07 */ 696 | RPI_V2_GPIO_P1_08 = 14, /*!< Version 2, Pin P1-08, defaults to alt function 0 UART0_TXD */ 697 | RPI_V2_GPIO_P1_10 = 15, /*!< Version 2, Pin P1-10, defaults to alt function 0 UART0_RXD */ 698 | RPI_V2_GPIO_P1_11 = 17, /*!< Version 2, Pin P1-11 */ 699 | RPI_V2_GPIO_P1_12 = 18, /*!< Version 2, Pin P1-12, can be PWM channel 0 in ALT FUN 5 */ 700 | RPI_V2_GPIO_P1_13 = 27, /*!< Version 2, Pin P1-13 */ 701 | RPI_V2_GPIO_P1_15 = 22, /*!< Version 2, Pin P1-15 */ 702 | RPI_V2_GPIO_P1_16 = 23, /*!< Version 2, Pin P1-16 */ 703 | RPI_V2_GPIO_P1_18 = 24, /*!< Version 2, Pin P1-18 */ 704 | RPI_V2_GPIO_P1_19 = 10, /*!< Version 2, Pin P1-19, MOSI when SPI0 in use */ 705 | RPI_V2_GPIO_P1_21 = 9, /*!< Version 2, Pin P1-21, MISO when SPI0 in use */ 706 | RPI_V2_GPIO_P1_22 = 25, /*!< Version 2, Pin P1-22 */ 707 | RPI_V2_GPIO_P1_23 = 11, /*!< Version 2, Pin P1-23, CLK when SPI0 in use */ 708 | RPI_V2_GPIO_P1_24 = 8, /*!< Version 2, Pin P1-24, CE0 when SPI0 in use */ 709 | RPI_V2_GPIO_P1_26 = 7, /*!< Version 2, Pin P1-26, CE1 when SPI0 in use */ 710 | RPI_V2_GPIO_P1_29 = 5, /*!< Version 2, Pin P1-29 */ 711 | RPI_V2_GPIO_P1_31 = 6, /*!< Version 2, Pin P1-31 */ 712 | RPI_V2_GPIO_P1_32 = 12, /*!< Version 2, Pin P1-32 */ 713 | RPI_V2_GPIO_P1_33 = 13, /*!< Version 2, Pin P1-33 */ 714 | RPI_V2_GPIO_P1_35 = 19, /*!< Version 2, Pin P1-35 */ 715 | RPI_V2_GPIO_P1_36 = 16, /*!< Version 2, Pin P1-36 */ 716 | RPI_V2_GPIO_P1_37 = 26, /*!< Version 2, Pin P1-37 */ 717 | RPI_V2_GPIO_P1_38 = 20, /*!< Version 2, Pin P1-38 */ 718 | RPI_V2_GPIO_P1_40 = 21, /*!< Version 2, Pin P1-40 */ 719 | 720 | /* RPi Version 2, new plug P5 */ 721 | RPI_V2_GPIO_P5_03 = 28, /*!< Version 2, Pin P5-03 */ 722 | RPI_V2_GPIO_P5_04 = 29, /*!< Version 2, Pin P5-04 */ 723 | RPI_V2_GPIO_P5_05 = 30, /*!< Version 2, Pin P5-05 */ 724 | RPI_V2_GPIO_P5_06 = 31, /*!< Version 2, Pin P5-06 */ 725 | 726 | /* RPi B+ J8 header, also RPi 2 40 pin GPIO header */ 727 | RPI_BPLUS_GPIO_J8_03 = 2, /*!< B+, Pin J8-03 */ 728 | RPI_BPLUS_GPIO_J8_05 = 3, /*!< B+, Pin J8-05 */ 729 | RPI_BPLUS_GPIO_J8_07 = 4, /*!< B+, Pin J8-07 */ 730 | RPI_BPLUS_GPIO_J8_08 = 14, /*!< B+, Pin J8-08, defaults to alt function 0 UART0_TXD */ 731 | RPI_BPLUS_GPIO_J8_10 = 15, /*!< B+, Pin J8-10, defaults to alt function 0 UART0_RXD */ 732 | RPI_BPLUS_GPIO_J8_11 = 17, /*!< B+, Pin J8-11 */ 733 | RPI_BPLUS_GPIO_J8_12 = 18, /*!< B+, Pin J8-12, can be PWM channel 0 in ALT FUN 5 */ 734 | RPI_BPLUS_GPIO_J8_13 = 27, /*!< B+, Pin J8-13 */ 735 | RPI_BPLUS_GPIO_J8_15 = 22, /*!< B+, Pin J8-15 */ 736 | RPI_BPLUS_GPIO_J8_16 = 23, /*!< B+, Pin J8-16 */ 737 | RPI_BPLUS_GPIO_J8_18 = 24, /*!< B+, Pin J8-18 */ 738 | RPI_BPLUS_GPIO_J8_19 = 10, /*!< B+, Pin J8-19, MOSI when SPI0 in use */ 739 | RPI_BPLUS_GPIO_J8_21 = 9, /*!< B+, Pin J8-21, MISO when SPI0 in use */ 740 | RPI_BPLUS_GPIO_J8_22 = 25, /*!< B+, Pin J8-22 */ 741 | RPI_BPLUS_GPIO_J8_23 = 11, /*!< B+, Pin J8-23, CLK when SPI0 in use */ 742 | RPI_BPLUS_GPIO_J8_24 = 8, /*!< B+, Pin J8-24, CE0 when SPI0 in use */ 743 | RPI_BPLUS_GPIO_J8_26 = 7, /*!< B+, Pin J8-26, CE1 when SPI0 in use */ 744 | RPI_BPLUS_GPIO_J8_29 = 5, /*!< B+, Pin J8-29, */ 745 | RPI_BPLUS_GPIO_J8_31 = 6, /*!< B+, Pin J8-31, */ 746 | RPI_BPLUS_GPIO_J8_32 = 12, /*!< B+, Pin J8-32, */ 747 | RPI_BPLUS_GPIO_J8_33 = 13, /*!< B+, Pin J8-33, */ 748 | RPI_BPLUS_GPIO_J8_35 = 19, /*!< B+, Pin J8-35, */ 749 | RPI_BPLUS_GPIO_J8_36 = 16, /*!< B+, Pin J8-36, */ 750 | RPI_BPLUS_GPIO_J8_37 = 26, /*!< B+, Pin J8-37, */ 751 | RPI_BPLUS_GPIO_J8_38 = 20, /*!< B+, Pin J8-38, */ 752 | RPI_BPLUS_GPIO_J8_40 = 21 /*!< B+, Pin J8-40, */ 753 | } RPiGPIOPin; 754 | 755 | /* Defines for SPI 756 | GPIO register offsets from BCM2835_SPI0_BASE. 757 | Offsets into the SPI Peripheral block in bytes per 10.5 SPI Register Map 758 | */ 759 | #define BCM2835_SPI0_CS 0x0000 /*!< SPI Master Control and Status */ 760 | #define BCM2835_SPI0_FIFO 0x0004 /*!< SPI Master TX and RX FIFOs */ 761 | #define BCM2835_SPI0_CLK 0x0008 /*!< SPI Master Clock Divider */ 762 | #define BCM2835_SPI0_DLEN 0x000c /*!< SPI Master Data Length */ 763 | #define BCM2835_SPI0_LTOH 0x0010 /*!< SPI LOSSI mode TOH */ 764 | #define BCM2835_SPI0_DC 0x0014 /*!< SPI DMA DREQ Controls */ 765 | 766 | /* Register masks for SPI0_CS */ 767 | #define BCM2835_SPI0_CS_LEN_LONG 0x02000000 /*!< Enable Long data word in Lossi mode if DMA_LEN is set */ 768 | #define BCM2835_SPI0_CS_DMA_LEN 0x01000000 /*!< Enable DMA mode in Lossi mode */ 769 | #define BCM2835_SPI0_CS_CSPOL2 0x00800000 /*!< Chip Select 2 Polarity */ 770 | #define BCM2835_SPI0_CS_CSPOL1 0x00400000 /*!< Chip Select 1 Polarity */ 771 | #define BCM2835_SPI0_CS_CSPOL0 0x00200000 /*!< Chip Select 0 Polarity */ 772 | #define BCM2835_SPI0_CS_RXF 0x00100000 /*!< RXF - RX FIFO Full */ 773 | #define BCM2835_SPI0_CS_RXR 0x00080000 /*!< RXR RX FIFO needs Reading (full) */ 774 | #define BCM2835_SPI0_CS_TXD 0x00040000 /*!< TXD TX FIFO can accept Data */ 775 | #define BCM2835_SPI0_CS_RXD 0x00020000 /*!< RXD RX FIFO contains Data */ 776 | #define BCM2835_SPI0_CS_DONE 0x00010000 /*!< Done transfer Done */ 777 | #define BCM2835_SPI0_CS_TE_EN 0x00008000 /*!< Unused */ 778 | #define BCM2835_SPI0_CS_LMONO 0x00004000 /*!< Unused */ 779 | #define BCM2835_SPI0_CS_LEN 0x00002000 /*!< LEN LoSSI enable */ 780 | #define BCM2835_SPI0_CS_REN 0x00001000 /*!< REN Read Enable */ 781 | #define BCM2835_SPI0_CS_ADCS 0x00000800 /*!< ADCS Automatically Deassert Chip Select */ 782 | #define BCM2835_SPI0_CS_INTR 0x00000400 /*!< INTR Interrupt on RXR */ 783 | #define BCM2835_SPI0_CS_INTD 0x00000200 /*!< INTD Interrupt on Done */ 784 | #define BCM2835_SPI0_CS_DMAEN 0x00000100 /*!< DMAEN DMA Enable */ 785 | #define BCM2835_SPI0_CS_TA 0x00000080 /*!< Transfer Active */ 786 | #define BCM2835_SPI0_CS_CSPOL 0x00000040 /*!< Chip Select Polarity */ 787 | #define BCM2835_SPI0_CS_CLEAR 0x00000030 /*!< Clear FIFO Clear RX and TX */ 788 | #define BCM2835_SPI0_CS_CLEAR_RX 0x00000020 /*!< Clear FIFO Clear RX */ 789 | #define BCM2835_SPI0_CS_CLEAR_TX 0x00000010 /*!< Clear FIFO Clear TX */ 790 | #define BCM2835_SPI0_CS_CPOL 0x00000008 /*!< Clock Polarity */ 791 | #define BCM2835_SPI0_CS_CPHA 0x00000004 /*!< Clock Phase */ 792 | #define BCM2835_SPI0_CS_CS 0x00000003 /*!< Chip Select */ 793 | 794 | /*! \brief bcm2835SPIBitOrder SPI Bit order 795 | Specifies the SPI data bit ordering for bcm2835_spi_setBitOrder() 796 | */ 797 | typedef enum 798 | { 799 | BCM2835_SPI_BIT_ORDER_LSBFIRST = 0, /*!< LSB First */ 800 | BCM2835_SPI_BIT_ORDER_MSBFIRST = 1 /*!< MSB First */ 801 | }bcm2835SPIBitOrder; 802 | 803 | /*! \brief SPI Data mode 804 | Specify the SPI data mode to be passed to bcm2835_spi_setDataMode() 805 | */ 806 | typedef enum 807 | { 808 | BCM2835_SPI_MODE0 = 0, /*!< CPOL = 0, CPHA = 0 */ 809 | BCM2835_SPI_MODE1 = 1, /*!< CPOL = 0, CPHA = 1 */ 810 | BCM2835_SPI_MODE2 = 2, /*!< CPOL = 1, CPHA = 0 */ 811 | BCM2835_SPI_MODE3 = 3 /*!< CPOL = 1, CPHA = 1 */ 812 | }bcm2835SPIMode; 813 | 814 | /*! \brief bcm2835SPIChipSelect 815 | Specify the SPI chip select pin(s) 816 | */ 817 | typedef enum 818 | { 819 | BCM2835_SPI_CS0 = 0, /*!< Chip Select 0 */ 820 | BCM2835_SPI_CS1 = 1, /*!< Chip Select 1 */ 821 | BCM2835_SPI_CS2 = 2, /*!< Chip Select 2 (ie pins CS1 and CS2 are asserted) */ 822 | BCM2835_SPI_CS_NONE = 3 /*!< No CS, control it yourself */ 823 | } bcm2835SPIChipSelect; 824 | 825 | /*! \brief bcm2835SPIClockDivider 826 | Specifies the divider used to generate the SPI clock from the system clock. 827 | Figures below give the divider, clock period and clock frequency. 828 | Clock divided is based on nominal base clock rate of 250MHz 829 | It is reported that (contrary to the documentation) any even divider may used. 830 | The frequencies shown for each divider have been confirmed by measurement 831 | */ 832 | typedef enum 833 | { 834 | BCM2835_SPI_CLOCK_DIVIDER_65536 = 0, /*!< 65536 = 262.144us = 3.814697260kHz */ 835 | BCM2835_SPI_CLOCK_DIVIDER_32768 = 32768, /*!< 32768 = 131.072us = 7.629394531kHz */ 836 | BCM2835_SPI_CLOCK_DIVIDER_16384 = 16384, /*!< 16384 = 65.536us = 15.25878906kHz */ 837 | BCM2835_SPI_CLOCK_DIVIDER_8192 = 8192, /*!< 8192 = 32.768us = 30/51757813kHz */ 838 | BCM2835_SPI_CLOCK_DIVIDER_4096 = 4096, /*!< 4096 = 16.384us = 61.03515625kHz */ 839 | BCM2835_SPI_CLOCK_DIVIDER_2048 = 2048, /*!< 2048 = 8.192us = 122.0703125kHz */ 840 | BCM2835_SPI_CLOCK_DIVIDER_1024 = 1024, /*!< 1024 = 4.096us = 244.140625kHz */ 841 | BCM2835_SPI_CLOCK_DIVIDER_512 = 512, /*!< 512 = 2.048us = 488.28125kHz */ 842 | BCM2835_SPI_CLOCK_DIVIDER_256 = 256, /*!< 256 = 1.024us = 976.5625kHz */ 843 | BCM2835_SPI_CLOCK_DIVIDER_128 = 128, /*!< 128 = 512ns = = 1.953125MHz */ 844 | BCM2835_SPI_CLOCK_DIVIDER_64 = 64, /*!< 64 = 256ns = 3.90625MHz */ 845 | BCM2835_SPI_CLOCK_DIVIDER_32 = 32, /*!< 32 = 128ns = 7.8125MHz */ 846 | BCM2835_SPI_CLOCK_DIVIDER_16 = 16, /*!< 16 = 64ns = 15.625MHz */ 847 | BCM2835_SPI_CLOCK_DIVIDER_8 = 8, /*!< 8 = 32ns = 31.25MHz */ 848 | BCM2835_SPI_CLOCK_DIVIDER_4 = 4, /*!< 4 = 16ns = 62.5MHz */ 849 | BCM2835_SPI_CLOCK_DIVIDER_2 = 2, /*!< 2 = 8ns = 125MHz, fastest you can get */ 850 | BCM2835_SPI_CLOCK_DIVIDER_1 = 1 /*!< 1 = 262.144us = 3.814697260kHz, same as 0/65536 */ 851 | } bcm2835SPIClockDivider; 852 | 853 | /* Defines for I2C 854 | GPIO register offsets from BCM2835_BSC*_BASE. 855 | Offsets into the BSC Peripheral block in bytes per 3.1 BSC Register Map 856 | */ 857 | #define BCM2835_BSC_C 0x0000 /*!< BSC Master Control */ 858 | #define BCM2835_BSC_S 0x0004 /*!< BSC Master Status */ 859 | #define BCM2835_BSC_DLEN 0x0008 /*!< BSC Master Data Length */ 860 | #define BCM2835_BSC_A 0x000c /*!< BSC Master Slave Address */ 861 | #define BCM2835_BSC_FIFO 0x0010 /*!< BSC Master Data FIFO */ 862 | #define BCM2835_BSC_DIV 0x0014 /*!< BSC Master Clock Divider */ 863 | #define BCM2835_BSC_DEL 0x0018 /*!< BSC Master Data Delay */ 864 | #define BCM2835_BSC_CLKT 0x001c /*!< BSC Master Clock Stretch Timeout */ 865 | 866 | /* Register masks for BSC_C */ 867 | #define BCM2835_BSC_C_I2CEN 0x00008000 /*!< I2C Enable, 0 = disabled, 1 = enabled */ 868 | #define BCM2835_BSC_C_INTR 0x00000400 /*!< Interrupt on RX */ 869 | #define BCM2835_BSC_C_INTT 0x00000200 /*!< Interrupt on TX */ 870 | #define BCM2835_BSC_C_INTD 0x00000100 /*!< Interrupt on DONE */ 871 | #define BCM2835_BSC_C_ST 0x00000080 /*!< Start transfer, 1 = Start a new transfer */ 872 | #define BCM2835_BSC_C_CLEAR_1 0x00000020 /*!< Clear FIFO Clear */ 873 | #define BCM2835_BSC_C_CLEAR_2 0x00000010 /*!< Clear FIFO Clear */ 874 | #define BCM2835_BSC_C_READ 0x00000001 /*!< Read transfer */ 875 | 876 | /* Register masks for BSC_S */ 877 | #define BCM2835_BSC_S_CLKT 0x00000200 /*!< Clock stretch timeout */ 878 | #define BCM2835_BSC_S_ERR 0x00000100 /*!< ACK error */ 879 | #define BCM2835_BSC_S_RXF 0x00000080 /*!< RXF FIFO full, 0 = FIFO is not full, 1 = FIFO is full */ 880 | #define BCM2835_BSC_S_TXE 0x00000040 /*!< TXE FIFO full, 0 = FIFO is not full, 1 = FIFO is full */ 881 | #define BCM2835_BSC_S_RXD 0x00000020 /*!< RXD FIFO contains data */ 882 | #define BCM2835_BSC_S_TXD 0x00000010 /*!< TXD FIFO can accept data */ 883 | #define BCM2835_BSC_S_RXR 0x00000008 /*!< RXR FIFO needs reading (full) */ 884 | #define BCM2835_BSC_S_TXW 0x00000004 /*!< TXW FIFO needs writing (full) */ 885 | #define BCM2835_BSC_S_DONE 0x00000002 /*!< Transfer DONE */ 886 | #define BCM2835_BSC_S_TA 0x00000001 /*!< Transfer Active */ 887 | 888 | #define BCM2835_BSC_FIFO_SIZE 16 /*!< BSC FIFO size */ 889 | 890 | /*! \brief bcm2835I2CClockDivider 891 | Specifies the divider used to generate the I2C clock from the system clock. 892 | Clock divided is based on nominal base clock rate of 250MHz 893 | */ 894 | typedef enum 895 | { 896 | BCM2835_I2C_CLOCK_DIVIDER_2500 = 2500, /*!< 2500 = 10us = 100 kHz */ 897 | BCM2835_I2C_CLOCK_DIVIDER_626 = 626, /*!< 622 = 2.504us = 399.3610 kHz */ 898 | BCM2835_I2C_CLOCK_DIVIDER_150 = 150, /*!< 150 = 60ns = 1.666 MHz (default at reset) */ 899 | BCM2835_I2C_CLOCK_DIVIDER_148 = 148 /*!< 148 = 59ns = 1.689 MHz */ 900 | } bcm2835I2CClockDivider; 901 | 902 | /*! \brief bcm2835I2CReasonCodes 903 | Specifies the reason codes for the bcm2835_i2c_write and bcm2835_i2c_read functions. 904 | */ 905 | typedef enum 906 | { 907 | BCM2835_I2C_REASON_OK = 0x00, /*!< Success */ 908 | BCM2835_I2C_REASON_ERROR_NACK = 0x01, /*!< Received a NACK */ 909 | BCM2835_I2C_REASON_ERROR_CLKT = 0x02, /*!< Received Clock Stretch Timeout */ 910 | BCM2835_I2C_REASON_ERROR_DATA = 0x04 /*!< Not all data is sent / received */ 911 | } bcm2835I2CReasonCodes; 912 | 913 | /* Defines for ST 914 | GPIO register offsets from BCM2835_ST_BASE. 915 | Offsets into the ST Peripheral block in bytes per 12.1 System Timer Registers 916 | The System Timer peripheral provides four 32-bit timer channels and a single 64-bit free running counter. 917 | BCM2835_ST_CLO is the System Timer Counter Lower bits register. 918 | The system timer free-running counter lower register is a read-only register that returns the current value 919 | of the lower 32-bits of the free running counter. 920 | BCM2835_ST_CHI is the System Timer Counter Upper bits register. 921 | The system timer free-running counter upper register is a read-only register that returns the current value 922 | of the upper 32-bits of the free running counter. 923 | */ 924 | #define BCM2835_ST_CS 0x0000 /*!< System Timer Control/Status */ 925 | #define BCM2835_ST_CLO 0x0004 /*!< System Timer Counter Lower 32 bits */ 926 | #define BCM2835_ST_CHI 0x0008 /*!< System Timer Counter Upper 32 bits */ 927 | 928 | /*! @} */ 929 | 930 | 931 | /* Defines for PWM, word offsets (ie 4 byte multiples) */ 932 | #define BCM2835_PWM_CONTROL 0 933 | #define BCM2835_PWM_STATUS 1 934 | #define BCM2835_PWM_DMAC 2 935 | #define BCM2835_PWM0_RANGE 4 936 | #define BCM2835_PWM0_DATA 5 937 | #define BCM2835_PWM_FIF1 6 938 | #define BCM2835_PWM1_RANGE 8 939 | #define BCM2835_PWM1_DATA 9 940 | 941 | /* Defines for PWM Clock, word offsets (ie 4 byte multiples) */ 942 | #define BCM2835_PWMCLK_CNTL 40 943 | #define BCM2835_PWMCLK_DIV 41 944 | #define BCM2835_PWM_PASSWRD (0x5A << 24) /*!< Password to enable setting PWM clock */ 945 | 946 | #define BCM2835_PWM1_MS_MODE 0x8000 /*!< Run in Mark/Space mode */ 947 | #define BCM2835_PWM1_USEFIFO 0x2000 /*!< Data from FIFO */ 948 | #define BCM2835_PWM1_REVPOLAR 0x1000 /*!< Reverse polarity */ 949 | #define BCM2835_PWM1_OFFSTATE 0x0800 /*!< Ouput Off state */ 950 | #define BCM2835_PWM1_REPEATFF 0x0400 /*!< Repeat last value if FIFO empty */ 951 | #define BCM2835_PWM1_SERIAL 0x0200 /*!< Run in serial mode */ 952 | #define BCM2835_PWM1_ENABLE 0x0100 /*!< Channel Enable */ 953 | 954 | #define BCM2835_PWM0_MS_MODE 0x0080 /*!< Run in Mark/Space mode */ 955 | #define BCM2835_PWM_CLEAR_FIFO 0x0040 /*!< Clear FIFO */ 956 | #define BCM2835_PWM0_USEFIFO 0x0020 /*!< Data from FIFO */ 957 | #define BCM2835_PWM0_REVPOLAR 0x0010 /*!< Reverse polarity */ 958 | #define BCM2835_PWM0_OFFSTATE 0x0008 /*!< Ouput Off state */ 959 | #define BCM2835_PWM0_REPEATFF 0x0004 /*!< Repeat last value if FIFO empty */ 960 | #define BCM2835_PWM0_SERIAL 0x0002 /*!< Run in serial mode */ 961 | #define BCM2835_PWM0_ENABLE 0x0001 /*!< Channel Enable */ 962 | 963 | /*! \brief bcm2835PWMClockDivider 964 | Specifies the divider used to generate the PWM clock from the system clock. 965 | Figures below give the divider, clock period and clock frequency. 966 | Clock divided is based on nominal PWM base clock rate of 19.2MHz 967 | The frequencies shown for each divider have been confirmed by measurement 968 | */ 969 | typedef enum 970 | { 971 | BCM2835_PWM_CLOCK_DIVIDER_2048 = 2048, /*!< 2048 = 9.375kHz */ 972 | BCM2835_PWM_CLOCK_DIVIDER_1024 = 1024, /*!< 1024 = 18.75kHz */ 973 | BCM2835_PWM_CLOCK_DIVIDER_512 = 512, /*!< 512 = 37.5kHz */ 974 | BCM2835_PWM_CLOCK_DIVIDER_256 = 256, /*!< 256 = 75kHz */ 975 | BCM2835_PWM_CLOCK_DIVIDER_128 = 128, /*!< 128 = 150kHz */ 976 | BCM2835_PWM_CLOCK_DIVIDER_64 = 64, /*!< 64 = 300kHz */ 977 | BCM2835_PWM_CLOCK_DIVIDER_32 = 32, /*!< 32 = 600.0kHz */ 978 | BCM2835_PWM_CLOCK_DIVIDER_16 = 16, /*!< 16 = 1.2MHz */ 979 | BCM2835_PWM_CLOCK_DIVIDER_8 = 8, /*!< 8 = 2.4MHz */ 980 | BCM2835_PWM_CLOCK_DIVIDER_4 = 4, /*!< 4 = 4.8MHz */ 981 | BCM2835_PWM_CLOCK_DIVIDER_2 = 2, /*!< 2 = 9.6MHz, fastest you can get */ 982 | BCM2835_PWM_CLOCK_DIVIDER_1 = 1 /*!< 1 = 4.6875kHz, same as divider 4096 */ 983 | } bcm2835PWMClockDivider; 984 | 985 | /* Historical name compatibility */ 986 | #ifndef BCM2835_NO_DELAY_COMPATIBILITY 987 | #define delay(x) bcm2835_delay(x) 988 | #define delayMicroseconds(x) bcm2835_delayMicroseconds(x) 989 | #endif 990 | 991 | #ifdef __cplusplus 992 | extern "C" { 993 | #endif 994 | 995 | /*! \defgroup init Library initialisation and management 996 | These functions allow you to intialise and control the bcm2835 library 997 | @{ 998 | */ 999 | 1000 | /*! Initialise the library by opening /dev/mem and getting pointers to the 1001 | internal memory for BCM 2835 device registers. You must call this (successfully) 1002 | before calling any other 1003 | functions in this library (except bcm2835_set_debug). 1004 | If bcm2835_init() fails by returning 0, 1005 | calling any other function may result in crashes or other failures. 1006 | Prints messages to stderr in case of errors. 1007 | \return 1 if successful else 0 1008 | */ 1009 | extern int bcm2835_init(void); 1010 | 1011 | /*! Close the library, deallocating any allocated memory and closing /dev/mem 1012 | \return 1 if successful else 0 1013 | */ 1014 | extern int bcm2835_close(void); 1015 | 1016 | /*! Sets the debug level of the library. 1017 | A value of 1 prevents mapping to /dev/mem, and makes the library print out 1018 | what it would do, rather than accessing the GPIO registers. 1019 | A value of 0, the default, causes normal operation. 1020 | Call this before calling bcm2835_init(); 1021 | \param[in] debug The new debug level. 1 means debug 1022 | */ 1023 | extern void bcm2835_set_debug(uint8_t debug); 1024 | 1025 | /*! Returns the version number of the library, same as BCM2835_VERSION 1026 | \return the current library version number 1027 | */ 1028 | extern unsigned int bcm2835_version(void); 1029 | 1030 | /*! @} */ 1031 | 1032 | /*! \defgroup lowlevel Low level register access 1033 | These functions provide low level register access, and should not generally 1034 | need to be used 1035 | 1036 | @{ 1037 | */ 1038 | 1039 | /*! Gets the base of a register 1040 | \param[in] regbase You can use one of the common values BCM2835_REGBASE_* 1041 | in \ref bcm2835RegisterBase 1042 | \return the register base 1043 | \sa Physical Addresses 1044 | */ 1045 | extern uint32_t* bcm2835_regbase(uint8_t regbase); 1046 | 1047 | /*! Reads 32 bit value from a peripheral address WITH a memory barrier before and after each read. 1048 | This is safe, but slow. The MB before protects this read from any in-flight reads that didn't 1049 | use a MB. The MB after protects subsequent reads from another peripheral. 1050 | 1051 | \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. 1052 | \return the value read from the 32 bit register 1053 | \sa Physical Addresses 1054 | */ 1055 | extern uint32_t bcm2835_peri_read(volatile uint32_t* paddr); 1056 | 1057 | /*! Reads 32 bit value from a peripheral address WITHOUT the read barriers 1058 | You should only use this when: 1059 | o your code has previously called bcm2835_peri_read() for a register 1060 | within the same peripheral, and no read or write to another peripheral has occurred since. 1061 | o your code has called bcm2835_memory_barrier() since the last access to ANOTHER peripheral. 1062 | 1063 | \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. 1064 | \return the value read from the 32 bit register 1065 | \sa Physical Addresses 1066 | */ 1067 | extern uint32_t bcm2835_peri_read_nb(volatile uint32_t* paddr); 1068 | 1069 | 1070 | /*! Writes 32 bit value from a peripheral address WITH a memory barrier before and after each write 1071 | This is safe, but slow. The MB before ensures that any in-flight write to another peripheral 1072 | completes before this write is issued. The MB after ensures that subsequent reads and writes 1073 | to another peripheral will see the effect of this write. 1074 | 1075 | This is a tricky optimization; if you aren't sure, use the barrier version. 1076 | 1077 | \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. 1078 | \param[in] value The 32 bit value to write 1079 | \sa Physical Addresses 1080 | */ 1081 | extern void bcm2835_peri_write(volatile uint32_t* paddr, uint32_t value); 1082 | 1083 | /*! Writes 32 bit value from a peripheral address without the write barrier 1084 | You should only use this when: 1085 | o your code has previously called bcm2835_peri_write() for a register 1086 | within the same peripheral, and no other peripheral access has occurred since. 1087 | o your code has called bcm2835_memory_barrier() since the last access to ANOTHER peripheral. 1088 | 1089 | This is a tricky optimization; if you aren't sure, use the barrier version. 1090 | 1091 | \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. 1092 | \param[in] value The 32 bit value to write 1093 | \sa Physical Addresses 1094 | */ 1095 | extern void bcm2835_peri_write_nb(volatile uint32_t* paddr, uint32_t value); 1096 | 1097 | /*! Alters a number of bits in a 32 peripheral regsiter. 1098 | It reads the current valu and then alters the bits defines as 1 in mask, 1099 | according to the bit value in value. 1100 | All other bits that are 0 in the mask are unaffected. 1101 | Use this to alter a subset of the bits in a register. 1102 | Memory barriers are used. Note that this is not atomic; an interrupt 1103 | routine can cause unexpected results. 1104 | \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. 1105 | \param[in] value The 32 bit value to write, masked in by mask. 1106 | \param[in] mask Bitmask that defines the bits that will be altered in the register. 1107 | \sa Physical Addresses 1108 | */ 1109 | extern void bcm2835_peri_set_bits(volatile uint32_t* paddr, uint32_t value, uint32_t mask); 1110 | /*! @} end of lowlevel */ 1111 | 1112 | /*! \defgroup gpio GPIO register access 1113 | These functions allow you to control the GPIO interface. You can set the 1114 | function of each GPIO pin, read the input state and set the output state. 1115 | @{ 1116 | */ 1117 | 1118 | /*! Sets the Function Select register for the given pin, which configures 1119 | the pin as Input, Output or one of the 6 alternate functions. 1120 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1121 | \param[in] mode Mode to set the pin to, one of BCM2835_GPIO_FSEL_* from \ref bcm2835FunctionSelect 1122 | */ 1123 | extern void bcm2835_gpio_fsel(uint8_t pin, uint8_t mode); 1124 | 1125 | /*! Sets the specified pin output to 1126 | HIGH. 1127 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1128 | \sa bcm2835_gpio_write() 1129 | */ 1130 | extern void bcm2835_gpio_set(uint8_t pin); 1131 | 1132 | /*! Sets the specified pin output to 1133 | LOW. 1134 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1135 | \sa bcm2835_gpio_write() 1136 | */ 1137 | extern void bcm2835_gpio_clr(uint8_t pin); 1138 | 1139 | /*! Sets any of the first 32 GPIO output pins specified in the mask to 1140 | HIGH. 1141 | \param[in] mask Mask of pins to affect. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) 1142 | \sa bcm2835_gpio_write_multi() 1143 | */ 1144 | extern void bcm2835_gpio_set_multi(uint32_t mask); 1145 | 1146 | /*! Sets any of the first 32 GPIO output pins specified in the mask to 1147 | LOW. 1148 | \param[in] mask Mask of pins to affect. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) 1149 | \sa bcm2835_gpio_write_multi() 1150 | */ 1151 | extern void bcm2835_gpio_clr_multi(uint32_t mask); 1152 | 1153 | /*! Reads the current level on the specified 1154 | pin and returns either HIGH or LOW. Works whether or not the pin 1155 | is an input or an output. 1156 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1157 | \return the current level either HIGH or LOW 1158 | */ 1159 | extern uint8_t bcm2835_gpio_lev(uint8_t pin); 1160 | 1161 | /*! Event Detect Status. 1162 | Tests whether the specified pin has detected a level or edge 1163 | as requested by bcm2835_gpio_ren(), bcm2835_gpio_fen(), bcm2835_gpio_hen(), 1164 | bcm2835_gpio_len(), bcm2835_gpio_aren(), bcm2835_gpio_afen(). 1165 | Clear the flag for a given pin by calling bcm2835_gpio_set_eds(pin); 1166 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1167 | \return HIGH if the event detect status for the given pin is true. 1168 | */ 1169 | extern uint8_t bcm2835_gpio_eds(uint8_t pin); 1170 | 1171 | /*! Same as bcm2835_gpio_eds() but checks if any of the pins specified in 1172 | the mask have detected a level or edge. 1173 | \param[in] mask Mask of pins to check. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) 1174 | \return Mask of pins HIGH if the event detect status for the given pin is true. 1175 | */ 1176 | extern uint32_t bcm2835_gpio_eds_multi(uint32_t mask); 1177 | 1178 | /*! Sets the Event Detect Status register for a given pin to 1, 1179 | which has the effect of clearing the flag. Use this afer seeing 1180 | an Event Detect Status on the pin. 1181 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1182 | */ 1183 | extern void bcm2835_gpio_set_eds(uint8_t pin); 1184 | 1185 | /*! Same as bcm2835_gpio_set_eds() but clears the flag for any pin which 1186 | is set in the mask. 1187 | \param[in] mask Mask of pins to clear. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) 1188 | */ 1189 | extern void bcm2835_gpio_set_eds_multi(uint32_t mask); 1190 | 1191 | /*! Enable Rising Edge Detect Enable for the specified pin. 1192 | When a rising edge is detected, sets the appropriate pin in Event Detect Status. 1193 | The GPRENn registers use 1194 | synchronous edge detection. This means the input signal is sampled using the 1195 | system clock and then it is looking for a ?011? pattern on the sampled signal. This 1196 | has the effect of suppressing glitches. 1197 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1198 | */ 1199 | extern void bcm2835_gpio_ren(uint8_t pin); 1200 | 1201 | /*! Disable Rising Edge Detect Enable for the specified pin. 1202 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1203 | */ 1204 | extern void bcm2835_gpio_clr_ren(uint8_t pin); 1205 | 1206 | /*! Enable Falling Edge Detect Enable for the specified pin. 1207 | When a falling edge is detected, sets the appropriate pin in Event Detect Status. 1208 | The GPRENn registers use 1209 | synchronous edge detection. This means the input signal is sampled using the 1210 | system clock and then it is looking for a ?100? pattern on the sampled signal. This 1211 | has the effect of suppressing glitches. 1212 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1213 | */ 1214 | extern void bcm2835_gpio_fen(uint8_t pin); 1215 | 1216 | /*! Disable Falling Edge Detect Enable for the specified pin. 1217 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1218 | */ 1219 | extern void bcm2835_gpio_clr_fen(uint8_t pin); 1220 | 1221 | /*! Enable High Detect Enable for the specified pin. 1222 | When a HIGH level is detected on the pin, sets the appropriate pin in Event Detect Status. 1223 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1224 | */ 1225 | extern void bcm2835_gpio_hen(uint8_t pin); 1226 | 1227 | /*! Disable High Detect Enable for the specified pin. 1228 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1229 | */ 1230 | extern void bcm2835_gpio_clr_hen(uint8_t pin); 1231 | 1232 | /*! Enable Low Detect Enable for the specified pin. 1233 | When a LOW level is detected on the pin, sets the appropriate pin in Event Detect Status. 1234 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1235 | */ 1236 | extern void bcm2835_gpio_len(uint8_t pin); 1237 | 1238 | /*! Disable Low Detect Enable for the specified pin. 1239 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1240 | */ 1241 | extern void bcm2835_gpio_clr_len(uint8_t pin); 1242 | 1243 | /*! Enable Asynchronous Rising Edge Detect Enable for the specified pin. 1244 | When a rising edge is detected, sets the appropriate pin in Event Detect Status. 1245 | Asynchronous means the incoming signal is not sampled by the system clock. As such 1246 | rising edges of very short duration can be detected. 1247 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1248 | */ 1249 | extern void bcm2835_gpio_aren(uint8_t pin); 1250 | 1251 | /*! Disable Asynchronous Rising Edge Detect Enable for the specified pin. 1252 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1253 | */ 1254 | extern void bcm2835_gpio_clr_aren(uint8_t pin); 1255 | 1256 | /*! Enable Asynchronous Falling Edge Detect Enable for the specified pin. 1257 | When a falling edge is detected, sets the appropriate pin in Event Detect Status. 1258 | Asynchronous means the incoming signal is not sampled by the system clock. As such 1259 | falling edges of very short duration can be detected. 1260 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1261 | */ 1262 | extern void bcm2835_gpio_afen(uint8_t pin); 1263 | 1264 | /*! Disable Asynchronous Falling Edge Detect Enable for the specified pin. 1265 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1266 | */ 1267 | extern void bcm2835_gpio_clr_afen(uint8_t pin); 1268 | 1269 | /*! Sets the Pull-up/down register for the given pin. This is 1270 | used with bcm2835_gpio_pudclk() to set the Pull-up/down resistor for the given pin. 1271 | However, it is usually more convenient to use bcm2835_gpio_set_pud(). 1272 | \param[in] pud The desired Pull-up/down mode. One of BCM2835_GPIO_PUD_* from bcm2835PUDControl 1273 | \sa bcm2835_gpio_set_pud() 1274 | */ 1275 | extern void bcm2835_gpio_pud(uint8_t pud); 1276 | 1277 | /*! Clocks the Pull-up/down value set earlier by bcm2835_gpio_pud() into the pin. 1278 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1279 | \param[in] on HIGH to clock the value from bcm2835_gpio_pud() into the pin. 1280 | LOW to remove the clock. 1281 | \sa bcm2835_gpio_set_pud() 1282 | */ 1283 | extern void bcm2835_gpio_pudclk(uint8_t pin, uint8_t on); 1284 | 1285 | /*! Reads and returns the Pad Control for the given GPIO group. 1286 | \param[in] group The GPIO pad group number, one of BCM2835_PAD_GROUP_GPIO_* 1287 | \return Mask of bits from BCM2835_PAD_* from \ref bcm2835PadGroup 1288 | */ 1289 | extern uint32_t bcm2835_gpio_pad(uint8_t group); 1290 | 1291 | /*! Sets the Pad Control for the given GPIO group. 1292 | \param[in] group The GPIO pad group number, one of BCM2835_PAD_GROUP_GPIO_* 1293 | \param[in] control Mask of bits from BCM2835_PAD_* from \ref bcm2835PadGroup. Note 1294 | that it is not necessary to include BCM2835_PAD_PASSWRD in the mask as this 1295 | is automatically included. 1296 | */ 1297 | extern void bcm2835_gpio_set_pad(uint8_t group, uint32_t control); 1298 | 1299 | /*! Delays for the specified number of milliseconds. 1300 | Uses nanosleep(), and therefore does not use CPU until the time is up. 1301 | However, you are at the mercy of nanosleep(). From the manual for nanosleep(): 1302 | If the interval specified in req is not an exact multiple of the granularity 1303 | underlying clock (see time(7)), then the interval will be 1304 | rounded up to the next multiple. Furthermore, after the sleep completes, 1305 | there may still be a delay before the CPU becomes free to once 1306 | again execute the calling thread. 1307 | \param[in] millis Delay in milliseconds 1308 | */ 1309 | extern void bcm2835_delay (unsigned int millis); 1310 | 1311 | /*! Delays for the specified number of microseconds. 1312 | Uses a combination of nanosleep() and a busy wait loop on the BCM2835 system timers, 1313 | However, you are at the mercy of nanosleep(). From the manual for nanosleep(): 1314 | If the interval specified in req is not an exact multiple of the granularity 1315 | underlying clock (see time(7)), then the interval will be 1316 | rounded up to the next multiple. Furthermore, after the sleep completes, 1317 | there may still be a delay before the CPU becomes free to once 1318 | again execute the calling thread. 1319 | For times less than about 450 microseconds, uses a busy wait on the System Timer. 1320 | It is reported that a delay of 0 microseconds on RaspberryPi will in fact 1321 | result in a delay of about 80 microseconds. Your mileage may vary. 1322 | \param[in] micros Delay in microseconds 1323 | */ 1324 | extern void bcm2835_delayMicroseconds (uint64_t micros); 1325 | 1326 | /*! Sets the output state of the specified pin 1327 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1328 | \param[in] on HIGH sets the output to HIGH and LOW to LOW. 1329 | */ 1330 | extern void bcm2835_gpio_write(uint8_t pin, uint8_t on); 1331 | 1332 | /*! Sets any of the first 32 GPIO output pins specified in the mask to the state given by on 1333 | \param[in] mask Mask of pins to affect. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) 1334 | \param[in] on HIGH sets the output to HIGH and LOW to LOW. 1335 | */ 1336 | extern void bcm2835_gpio_write_multi(uint32_t mask, uint8_t on); 1337 | 1338 | /*! Sets the first 32 GPIO output pins specified in the mask to the value given by value 1339 | \param[in] value values required for each bit masked in by mask, eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) 1340 | \param[in] mask Mask of pins to affect. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) 1341 | */ 1342 | extern void bcm2835_gpio_write_mask(uint32_t value, uint32_t mask); 1343 | 1344 | /*! Sets the Pull-up/down mode for the specified pin. This is more convenient than 1345 | clocking the mode in with bcm2835_gpio_pud() and bcm2835_gpio_pudclk(). 1346 | \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. 1347 | \param[in] pud The desired Pull-up/down mode. One of BCM2835_GPIO_PUD_* from bcm2835PUDControl 1348 | */ 1349 | extern void bcm2835_gpio_set_pud(uint8_t pin, uint8_t pud); 1350 | 1351 | /*! @} */ 1352 | 1353 | /*! \defgroup spi SPI access 1354 | These functions let you use SPI0 (Serial Peripheral Interface) to 1355 | interface with an external SPI device. 1356 | @{ 1357 | */ 1358 | 1359 | /*! Start SPI operations. 1360 | Forces RPi SPI0 pins P1-19 (MOSI), P1-21 (MISO), P1-23 (CLK), P1-24 (CE0) and P1-26 (CE1) 1361 | to alternate function ALT0, which enables those pins for SPI interface. 1362 | You should call bcm2835_spi_end() when all SPI funcitons are complete to return the pins to 1363 | their default functions 1364 | \sa bcm2835_spi_end() 1365 | */ 1366 | extern void bcm2835_spi_begin(void); 1367 | 1368 | /*! End SPI operations. 1369 | SPI0 pins P1-19 (MOSI), P1-21 (MISO), P1-23 (CLK), P1-24 (CE0) and P1-26 (CE1) 1370 | are returned to their default INPUT behaviour. 1371 | */ 1372 | extern void bcm2835_spi_end(void); 1373 | 1374 | /*! Sets the SPI bit order 1375 | NOTE: has no effect. Not supported by SPI0. 1376 | Defaults to 1377 | \param[in] order The desired bit order, one of BCM2835_SPI_BIT_ORDER_*, 1378 | see \ref bcm2835SPIBitOrder 1379 | */ 1380 | extern void bcm2835_spi_setBitOrder(uint8_t order); 1381 | 1382 | /*! Sets the SPI clock divider and therefore the 1383 | SPI clock speed. 1384 | \param[in] divider The desired SPI clock divider, one of BCM2835_SPI_CLOCK_DIVIDER_*, 1385 | see \ref bcm2835SPIClockDivider 1386 | */ 1387 | extern void bcm2835_spi_setClockDivider(uint16_t divider); 1388 | 1389 | /*! Sets the SPI data mode 1390 | Sets the clock polariy and phase 1391 | \param[in] mode The desired data mode, one of BCM2835_SPI_MODE*, 1392 | see \ref bcm2835SPIMode 1393 | */ 1394 | extern void bcm2835_spi_setDataMode(uint8_t mode); 1395 | 1396 | /*! Sets the chip select pin(s) 1397 | When an bcm2835_spi_transfer() is made, the selected pin(s) will be asserted during the 1398 | transfer. 1399 | \param[in] cs Specifies the CS pins(s) that are used to activate the desired slave. 1400 | One of BCM2835_SPI_CS*, see \ref bcm2835SPIChipSelect 1401 | */ 1402 | extern void bcm2835_spi_chipSelect(uint8_t cs); 1403 | 1404 | /*! Sets the chip select pin polarity for a given pin 1405 | When an bcm2835_spi_transfer() occurs, the currently selected chip select pin(s) 1406 | will be asserted to the 1407 | value given by active. When transfers are not happening, the chip select pin(s) 1408 | return to the complement (inactive) value. 1409 | \param[in] cs The chip select pin to affect 1410 | \param[in] active Whether the chip select pin is to be active HIGH 1411 | */ 1412 | extern void bcm2835_spi_setChipSelectPolarity(uint8_t cs, uint8_t active); 1413 | 1414 | /*! Transfers one byte to and from the currently selected SPI slave. 1415 | Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect) 1416 | during the transfer. 1417 | Clocks the 8 bit value out on MOSI, and simultaneously clocks in data from MISO. 1418 | Returns the read data byte from the slave. 1419 | Uses polled transfer as per section 10.6.1 of the BCM 2835 ARM Peripherls manual 1420 | \param[in] value The 8 bit data byte to write to MOSI 1421 | \return The 8 bit byte simultaneously read from MISO 1422 | \sa bcm2835_spi_transfern() 1423 | */ 1424 | extern uint8_t bcm2835_spi_transfer(uint8_t value); 1425 | 1426 | /*! Transfers any number of bytes to and from the currently selected SPI slave. 1427 | Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect) 1428 | during the transfer. 1429 | Clocks the len 8 bit bytes out on MOSI, and simultaneously clocks in data from MISO. 1430 | The data read read from the slave is placed into rbuf. rbuf must be at least len bytes long 1431 | Uses polled transfer as per section 10.6.1 of the BCM 2835 ARM Peripherls manual 1432 | \param[in] tbuf Buffer of bytes to send. 1433 | \param[out] rbuf Received bytes will by put in this buffer 1434 | \param[in] len Number of bytes in the tbuf buffer, and the number of bytes to send/received 1435 | \sa bcm2835_spi_transfer() 1436 | */ 1437 | extern void bcm2835_spi_transfernb(char* tbuf, char* rbuf, uint32_t len); 1438 | 1439 | /*! Transfers any number of bytes to and from the currently selected SPI slave 1440 | using bcm2835_spi_transfernb. 1441 | The returned data from the slave replaces the transmitted data in the buffer. 1442 | \param[in,out] buf Buffer of bytes to send. Received bytes will replace the contents 1443 | \param[in] len Number of bytes int eh buffer, and the number of bytes to send/received 1444 | \sa bcm2835_spi_transfer() 1445 | */ 1446 | extern void bcm2835_spi_transfern(char* buf, uint32_t len); 1447 | 1448 | /*! Transfers any number of bytes to the currently selected SPI slave. 1449 | Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect) 1450 | during the transfer. 1451 | \param[in] buf Buffer of bytes to send. 1452 | \param[in] len Number of bytes in the tbuf buffer, and the number of bytes to send 1453 | */ 1454 | extern void bcm2835_spi_writenb(char* buf, uint32_t len); 1455 | 1456 | /*! @} */ 1457 | 1458 | /*! \defgroup i2c I2C access 1459 | These functions let you use I2C (The Broadcom Serial Control bus with the Philips 1460 | I2C bus/interface version 2.1 January 2000.) to interface with an external I2C device. 1461 | @{ 1462 | */ 1463 | 1464 | /*! Start I2C operations. 1465 | Forces RPi I2C pins P1-03 (SDA) and P1-05 (SCL) 1466 | to alternate function ALT0, which enables those pins for I2C interface. 1467 | You should call bcm2835_i2c_end() when all I2C functions are complete to return the pins to 1468 | their default functions 1469 | \sa bcm2835_i2c_end() 1470 | */ 1471 | extern void bcm2835_i2c_begin(void); 1472 | 1473 | /*! End I2C operations. 1474 | I2C pins P1-03 (SDA) and P1-05 (SCL) 1475 | are returned to their default INPUT behaviour. 1476 | */ 1477 | extern void bcm2835_i2c_end(void); 1478 | 1479 | /*! Sets the I2C slave address. 1480 | \param[in] addr The I2C slave address. 1481 | */ 1482 | extern void bcm2835_i2c_setSlaveAddress(uint8_t addr); 1483 | 1484 | /*! Sets the I2C clock divider and therefore the I2C clock speed. 1485 | \param[in] divider The desired I2C clock divider, one of BCM2835_I2C_CLOCK_DIVIDER_*, 1486 | see \ref bcm2835I2CClockDivider 1487 | */ 1488 | extern void bcm2835_i2c_setClockDivider(uint16_t divider); 1489 | 1490 | /*! Sets the I2C clock divider by converting the baudrate parameter to 1491 | the equivalent I2C clock divider. ( see \sa bcm2835_i2c_setClockDivider) 1492 | For the I2C standard 100khz you would set baudrate to 100000 1493 | The use of baudrate corresponds to its use in the I2C kernel device 1494 | driver. (Of course, bcm2835 has nothing to do with the kernel driver) 1495 | */ 1496 | extern void bcm2835_i2c_set_baudrate(uint32_t baudrate); 1497 | 1498 | /*! Transfers any number of bytes to the currently selected I2C slave. 1499 | (as previously set by \sa bcm2835_i2c_setSlaveAddress) 1500 | \param[in] buf Buffer of bytes to send. 1501 | \param[in] len Number of bytes in the buf buffer, and the number of bytes to send. 1502 | \return reason see \ref bcm2835I2CReasonCodes 1503 | */ 1504 | extern uint8_t bcm2835_i2c_write(const char * buf, uint32_t len); 1505 | 1506 | /*! Transfers any number of bytes from the currently selected I2C slave. 1507 | (as previously set by \sa bcm2835_i2c_setSlaveAddress) 1508 | \param[in] buf Buffer of bytes to receive. 1509 | \param[in] len Number of bytes in the buf buffer, and the number of bytes to received. 1510 | \return reason see \ref bcm2835I2CReasonCodes 1511 | */ 1512 | extern uint8_t bcm2835_i2c_read(char* buf, uint32_t len); 1513 | 1514 | /*! Allows reading from I2C slaves that require a repeated start (without any prior stop) 1515 | to read after the required slave register has been set. For example, the popular 1516 | MPL3115A2 pressure and temperature sensor. Note that your device must support or 1517 | require this mode. If your device does not require this mode then the standard 1518 | combined: 1519 | \sa bcm2835_i2c_write 1520 | \sa bcm2835_i2c_read 1521 | are a better choice. 1522 | Will read from the slave previously set by \sa bcm2835_i2c_setSlaveAddress 1523 | \param[in] regaddr Buffer containing the slave register you wish to read from. 1524 | \param[in] buf Buffer of bytes to receive. 1525 | \param[in] len Number of bytes in the buf buffer, and the number of bytes to received. 1526 | \return reason see \ref bcm2835I2CReasonCodes 1527 | */ 1528 | extern uint8_t bcm2835_i2c_read_register_rs(char* regaddr, char* buf, uint32_t len); 1529 | 1530 | /*! Allows sending an arbitrary number of bytes to I2C slaves before issuing a repeated 1531 | start (with no prior stop) and reading a response. 1532 | Necessary for devices that require such behavior, such as the MLX90620. 1533 | Will write to and read from the slave previously set by \sa bcm2835_i2c_setSlaveAddress 1534 | \param[in] cmds Buffer containing the bytes to send before the repeated start condition. 1535 | \param[in] cmds_len Number of bytes to send from cmds buffer 1536 | \param[in] buf Buffer of bytes to receive. 1537 | \param[in] buf_len Number of bytes to receive in the buf buffer. 1538 | \return reason see \ref bcm2835I2CReasonCodes 1539 | */ 1540 | extern uint8_t bcm2835_i2c_write_read_rs(char* cmds, uint32_t cmds_len, char* buf, uint32_t buf_len); 1541 | 1542 | /*! @} */ 1543 | 1544 | /*! \defgroup st System Timer access 1545 | Allows access to and delays using the System Timer Counter. 1546 | @{ 1547 | */ 1548 | 1549 | /*! Read the System Timer Counter register. 1550 | \return the value read from the System Timer Counter Lower 32 bits register 1551 | */ 1552 | extern uint64_t bcm2835_st_read(void); 1553 | 1554 | /*! Delays for the specified number of microseconds with offset. 1555 | \param[in] offset_micros Offset in microseconds 1556 | \param[in] micros Delay in microseconds 1557 | */ 1558 | extern void bcm2835_st_delay(uint64_t offset_micros, uint64_t micros); 1559 | 1560 | /*! @} */ 1561 | 1562 | /*! \defgroup pwm Pulse Width Modulation 1563 | Allows control of 2 independent PWM channels. A limited subset of GPIO pins 1564 | can be connected to one of these 2 channels, allowing PWM control of GPIO pins. 1565 | You have to set the desired pin into a particular Alt Fun to PWM output. See the PWM 1566 | documentation on the Main Page. 1567 | @{ 1568 | */ 1569 | 1570 | /*! Sets the PWM clock divisor, 1571 | to control the basic PWM pulse widths. 1572 | \param[in] divisor Divides the basic 19.2MHz PWM clock. You can use one of the common 1573 | values BCM2835_PWM_CLOCK_DIVIDER_* in \ref bcm2835PWMClockDivider 1574 | */ 1575 | extern void bcm2835_pwm_set_clock(uint32_t divisor); 1576 | 1577 | /*! Sets the mode of the given PWM channel, 1578 | allowing you to control the PWM mode and enable/disable that channel 1579 | \param[in] channel The PWM channel. 0 or 1. 1580 | \param[in] markspace Set true if you want Mark-Space mode. 0 for Balanced mode. 1581 | \param[in] enabled Set true to enable this channel and produce PWM pulses. 1582 | */ 1583 | extern void bcm2835_pwm_set_mode(uint8_t channel, uint8_t markspace, uint8_t enabled); 1584 | 1585 | /*! Sets the maximum range of the PWM output. 1586 | The data value can vary between 0 and this range to control PWM output 1587 | \param[in] channel The PWM channel. 0 or 1. 1588 | \param[in] range The maximum value permitted for DATA. 1589 | */ 1590 | extern void bcm2835_pwm_set_range(uint8_t channel, uint32_t range); 1591 | 1592 | /*! Sets the PWM pulse ratio to emit to DATA/RANGE, 1593 | where RANGE is set by bcm2835_pwm_set_range(). 1594 | \param[in] channel The PWM channel. 0 or 1. 1595 | \param[in] data Controls the PWM output ratio as a fraction of the range. 1596 | Can vary from 0 to RANGE. 1597 | */ 1598 | extern void bcm2835_pwm_set_data(uint8_t channel, uint32_t data); 1599 | 1600 | /*! @} */ 1601 | #ifdef __cplusplus 1602 | } 1603 | #endif 1604 | 1605 | #endif /* BCM2835_H */ 1606 | 1607 | /*! @example blink.c 1608 | Blinks RPi GPIO pin 11 on and off 1609 | */ 1610 | 1611 | /*! @example input.c 1612 | Reads the state of an RPi input pin 1613 | */ 1614 | 1615 | /*! @example event.c 1616 | Shows how to use event detection on an input pin 1617 | */ 1618 | 1619 | /*! @example spi.c 1620 | Shows how to use SPI interface to transfer a byte to and from an SPI device 1621 | */ 1622 | 1623 | /*! @example spin.c 1624 | Shows how to use SPI interface to transfer a number of bytes to and from an SPI device 1625 | */ 1626 | 1627 | /*! @example pwm.c 1628 | Shows how to use PWM to control GPIO pins 1629 | */ 1630 | 1631 | /*! @example i2c.c 1632 | Command line utility for executing i2c commands with the 1633 | Broadcom bcm2835. Contributed by Shahrooz Shahparnia. 1634 | */ 1635 | 1636 | /*! example gpio.c 1637 | Command line utility for executing gpio commands with the 1638 | Broadcom bcm2835. Contributed by Shahrooz Shahparnia. 1639 | */ 1640 | --------------------------------------------------------------------------------