├── LICENSE ├── README.md ├── doc ├── WT32-ETH01_datasheet_V1.1- en.pdf ├── WT32-S1-DataSheet-V1.1.pdf ├── WT32_ETH01_V2.schematic.pdf ├── esp32_datasheet_en.pdf ├── wiring.png └── wiring.vsd ├── src ├── CMakeLists.txt ├── README.md ├── components │ └── ethernet_init │ │ ├── CMakeLists.txt │ │ ├── Kconfig.projbuild │ │ ├── ethernet_init.c │ │ └── ethernet_init.h ├── main │ ├── CMakeLists.txt │ ├── Kconfig.projbuild │ ├── ethernet_example_main.c │ ├── tcp_server.c │ └── tcp_server.h └── sdkconfig └── test ├── echo_perf.sh ├── echo_test.sh ├── uart_echo_perf.sh └── uart_echo_test.sh /LICENSE: -------------------------------------------------------------------------------- 1 | ESP32 ethernet to serial port bridge 2 | 3 | (C) 2024, Oleg Volkov 4 | 5 | Redistribution and use in source and binary forms, with or without 6 | modification, are permitted provided that the following conditions are met: 7 | 8 | 1. Redistributions of source code must retain the above copyright notice, 9 | this list of conditions and the following disclaimer. 10 | 2. Redistributions in binary form must reproduce the above copyright notice, 11 | this list of conditions and the following disclaimer in the documentation 12 | and/or other materials provided with the distribution. 13 | 3. The name of the author may not be used to endorse or promote products 14 | derived from this software without specific prior written permission. 15 | 16 | THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 17 | WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 18 | MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO 19 | EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 | PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 22 | OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 | WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 | OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 | ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # esp32-eth-serial 2 | ESP32 ethernet to serial port bridge 3 | 4 | ## Motivation 5 | 6 | There are no readily available Ethernet to UART bridge having high bit rate with hardware flow control and low price. For example the EBYTE NT1 Ethernet bridge has maximum baud rate of 230400 only. 7 | The ESP32 on the other hand provides an excellent platform for Ethernet to UART bridge implementation. We use WT32-ETH01 'wireless tag' module. Yet the code may be easily ported to any other 8 | module having Ethernet interface. 9 | 10 | ## Build environment 11 | 12 | See https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html 13 | 14 | ## Building 15 | ``` 16 | git clone git@github.com:olegv142/esp32-eth-serial.git 17 | cd esp32-eth-serial/src 18 | idf.py set-target esp32 19 | idf.py menuconfig 20 | idf.py build 21 | ``` 22 | 23 | ## Configuring 24 | 25 | The bridge has connection indicator output, serial data RX/TX lines and flow control lines RTS/CTS, the last one is optional and is not enabled by default. All pin locations can be configured by running *idf.py menuconfig*. Besides one can configure UART baud rate, buffer size and whether to use CTS flow control line. The supported serial baud rates are in the range from 9600 to 1843200 with 921600 being the default. 26 | 27 | ## Flashing 28 | 29 | Unless you have dev kit with USB programmer included you will need some minimal wiring made to the ESP32 module to be able to flash it. The following figure shows an example of such setup with programming connections shown in blue. The connections providing serial interface to your system are shown in black. 30 | 31 | ![ESP32 module wiring](https://github.com/olegv142/esp32-eth-serial/blob/master/doc/wiring.png) 32 | 33 | You can use virtually any USB-serial bridge capable of working at 115200 baud. The IO0 pin should be connected to the ground while powering up the module in order to turn it onto serial programming mode. After that you can issue *idf.py flash* command in the project directory and wait for the flashing completion. Then turn off power, disconnect programming circuit and enjoy using your brand new Ethernet to serial bridge. 34 | 35 | ## Connections 36 | 37 | You can use hardware flow control CTS/RTS lines or ignore them depending on your system design details. Basically not using RTS line is safe if packets you are sending to the module's RXD line are not exceeding 128 bytes. The CTS line usage is completely up to your implementation of the serial data receiver. If you are not going to use CTS line you should either connect it to the ground or disable at firmware build stage by means of *idf.py menuconfig*. The EN line plays the role of the reset to the module. Low level on this line turns the module onto the reset state with low power consumption. In case you are not going to use this line it should be pulled up. The pull up resistors on the TXD and RTS lines are needed to prevent them from floating during module boot. 38 | 39 | ## Detailed description 40 | 41 | The bridge does not have static network configuration. Its expecting to get network configuration via DHCP from network its connected to. There are two server sockets the bridge is listening on. The first one is 'echo socket' (3333 by default). Its used for testing exclusively. It just sends all data received from network back to the sender. The second one is 'bridge socket' (3142 by default). It sends all data received from network to UART and sends all data received from UART to network (to the other side of network connection). Once the connection is established to any of those sockets no other connection can be made to the same socket until the first one disconnects. Yet both sockets can serve connections simultaneously. The connection indicator output has high level while connection to bridge socket is established. 42 | 43 | ## Testing 44 | 45 | The *esp32-eth-serial/test* folder has scripts for testing both server sockets in echo mode. The *echo_perf.sh* script sends continuous stream of random data to echo socket and receives data back. The *echo_test.sh* sends chunks of random data to echo socket, receives them back and verify that data received is the same as data sent. The maximum throughput of the echo socket according to those tests is around 1.3 MBytes/sec. 46 | 47 | The *uart_echo_perf.sh* script sends continuous stream of random data to bridge socket and receives data back. To run UART echo tests one should enable CTS flow control and connect RX to TX and RTS to CTS pins. Similarly the *uart_echo_test.sh* script sends chunks of random data to bridge socket, receives them back and verify that data received is the same as data sent. 48 | 49 | ## Troubleshooting 50 | 51 | The ESP32 module is using the same serial channel used for programming to print error and debug messages. So if anything goes wrong you can attach the programming circuit without grounding the IO0 pin and monitor debug messages by calling *idf.py -p monitor*. 52 | 53 | ## Power consumption 54 | 55 | 130mA in idle state, up to 150mA while transferring data at maximum rate. 56 | 57 | ## Framework version 58 | 59 | The code was built with esp-idf version 5.2.1. 60 | 61 | ## Notes on porting and code modifications 62 | - The WT32-ETH01 used in this project has on-board clock generator with clock enable pin. Other platforms may not have such pin. One can run *idf.py menuconfig* to choose if clock enable pin is used. 63 | - More server sockets may be easily added to *main/tcp_server.c*. One can add yet another bridge socket with second UART if necessary. 64 | -------------------------------------------------------------------------------- /doc/WT32-ETH01_datasheet_V1.1- en.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olegv142/esp32-eth-serial/fe60a39dd85908b138fe6b55a35dadad5149c172/doc/WT32-ETH01_datasheet_V1.1- en.pdf -------------------------------------------------------------------------------- /doc/WT32-S1-DataSheet-V1.1.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olegv142/esp32-eth-serial/fe60a39dd85908b138fe6b55a35dadad5149c172/doc/WT32-S1-DataSheet-V1.1.pdf -------------------------------------------------------------------------------- /doc/WT32_ETH01_V2.schematic.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olegv142/esp32-eth-serial/fe60a39dd85908b138fe6b55a35dadad5149c172/doc/WT32_ETH01_V2.schematic.pdf -------------------------------------------------------------------------------- /doc/esp32_datasheet_en.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olegv142/esp32-eth-serial/fe60a39dd85908b138fe6b55a35dadad5149c172/doc/esp32_datasheet_en.pdf -------------------------------------------------------------------------------- /doc/wiring.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olegv142/esp32-eth-serial/fe60a39dd85908b138fe6b55a35dadad5149c172/doc/wiring.png -------------------------------------------------------------------------------- /doc/wiring.vsd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olegv142/esp32-eth-serial/fe60a39dd85908b138fe6b55a35dadad5149c172/doc/wiring.vsd -------------------------------------------------------------------------------- /src/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # The following lines of boilerplate have to be in your project's CMakeLists 2 | # in this exact order for cmake to work correctly 3 | cmake_minimum_required(VERSION 3.16) 4 | 5 | include($ENV{IDF_PATH}/tools/cmake/project.cmake) 6 | project(esp32-eth-serial) 7 | -------------------------------------------------------------------------------- /src/README.md: -------------------------------------------------------------------------------- 1 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | 2 | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | 3 | 4 | # Ethernet Example 5 | (See the README.md file in the upper level 'examples' directory for more information about examples.) 6 | 7 | ## Overview 8 | 9 | This example demonstrates basic usage of `Ethernet driver` together with `esp_netif`. Initialization of the `Ethernet driver` is wrapped in separate [sub-component](./components/ethernet_init/ethernet_init.c) of this project to clearly distinguish between the driver's and `esp_netif` initializations. The work flow of the example could be as follows: 10 | 11 | 1. Install Ethernet driver 12 | 2. Attach the driver to `esp_netif` 13 | 3. Send DHCP requests and wait for a DHCP lease 14 | 4. If get IP address successfully, then you will be able to ping the device 15 | 16 | If you have a new Ethernet application to go (for example, connect to IoT cloud via Ethernet), try this as a basic template, then add your own code. 17 | 18 | ## How to use example 19 | 20 | ### Hardware Required 21 | 22 | To run this example, it's recommended that you have an official ESP32 Ethernet development board - [ESP32-Ethernet-Kit](https://docs.espressif.com/projects/esp-idf/en/latest/hw-reference/get-started-ethernet-kit.html). This example should also work for 3rd party ESP32 board as long as it's integrated with a supported Ethernet PHY chip. Up until now, ESP-IDF supports up to four Ethernet PHY: `LAN8720`, `IP101`, `DP83848` and `RTL8201`, additional PHY drivers should be implemented by users themselves. 23 | 24 | Besides that, `esp_eth` component can drive third-party Ethernet module which integrates MAC and PHY and provides common communication interface (e.g. SPI, USB, etc). This example will take the `DM9051`, `W5500` or `KSZ8851SNL` SPI modules as an example, illustrating how to install the Ethernet driver in the same manner. 25 | 26 | The ESP-IDF supports the usage of multiple Ethernet interfaces at a time when external modules are utilized which is also demonstrated by this example. There are several options you can combine: 27 | * Internal EMAC and one SPI Ethernet module. 28 | * Two SPI Ethernet modules of the same type connected to single SPI interface and accessed by switching appropriate CS. 29 | * Internal EMAC and two SPI Ethernet modules of the same type. 30 | 31 | #### Pin Assignment 32 | 33 | See common pin assignments for Ethernet examples from [upper level](../README.md#common-pin-assignments). 34 | 35 | When using two Ethernet SPI modules at a time, they are to be connected to single SPI interface. Both modules then share data (MOSI/MISO) and CLK signals. However, the CS, interrupt and reset pins need to be connected to separate GPIO for each Ethernet SPI module. 36 | 37 | ### Configure the project 38 | 39 | ``` 40 | idf.py menuconfig 41 | ``` 42 | 43 | See common configurations for Ethernet examples from [upper level](../README.md#common-configurations). 44 | 45 | ### Build, Flash, and Run 46 | 47 | Build the project and flash it to the board, then run monitor tool to view serial output: 48 | 49 | ``` 50 | idf.py -p PORT build flash monitor 51 | ``` 52 | 53 | (Replace PORT with the name of the serial port to use.) 54 | 55 | (To exit the serial monitor, type ``Ctrl-]``.) 56 | 57 | See the [Getting Started Guide](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html) for full steps to configure and use ESP-IDF to build projects. 58 | 59 | ## Example Output 60 | 61 | ```bash 62 | I (394) eth_example: Ethernet Started 63 | I (3934) eth_example: Ethernet Link Up 64 | I (3934) eth_example: Ethernet HW Addr 30:ae:a4:c6:87:5b 65 | I (5864) esp_netif_handlers: eth ip: 192.168.2.151, mask: 255.255.255.0, gw: 192.168.2.2 66 | I (5864) eth_example: Ethernet Got IP Address 67 | I (5864) eth_example: ~~~~~~~~~~~ 68 | I (5864) eth_example: ETHIP:192.168.2.151 69 | I (5874) eth_example: ETHMASK:255.255.255.0 70 | I (5874) eth_example: ETHGW:192.168.2.2 71 | I (5884) eth_example: ~~~~~~~~~~~ 72 | ``` 73 | 74 | Now you can ping your ESP32 in the terminal by entering `ping 192.168.2.151` (it depends on the actual IP address you get). 75 | 76 | ## Troubleshooting 77 | 78 | See common troubleshooting for Ethernet examples from [upper level](../README.md#common-troubleshooting). 79 | 80 | (For any technical queries, please open an [issue](https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you as soon as possible.) 81 | -------------------------------------------------------------------------------- /src/components/ethernet_init/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | idf_component_register(SRCS "ethernet_init.c" 2 | PRIV_REQUIRES driver esp_eth 3 | INCLUDE_DIRS ".") 4 | -------------------------------------------------------------------------------- /src/components/ethernet_init/Kconfig.projbuild: -------------------------------------------------------------------------------- 1 | menu "Ethernet Configuration" 2 | 3 | orsource "$IDF_PATH/examples/common_components/env_caps/$IDF_TARGET/Kconfig.env_caps" 4 | 5 | config EXAMPLE_USE_INTERNAL_ETHERNET 6 | depends on SOC_EMAC_SUPPORTED 7 | select ETH_USE_ESP32_EMAC 8 | default y 9 | bool "Internal EMAC" 10 | help 11 | Use internal Ethernet MAC controller. 12 | 13 | if EXAMPLE_USE_INTERNAL_ETHERNET 14 | choice EXAMPLE_ETH_PHY_MODEL 15 | prompt "Ethernet PHY Device" 16 | default EXAMPLE_ETH_PHY_LAN87XX 17 | help 18 | Select the Ethernet PHY device to use in the example. 19 | 20 | config EXAMPLE_ETH_PHY_IP101 21 | bool "IP101" 22 | help 23 | IP101 is a single port 10/100 MII/RMII/TP/Fiber Fast Ethernet Transceiver. 24 | Goto http://www.icplus.com.tw/pp-IP101G.html for more information about it. 25 | 26 | config EXAMPLE_ETH_PHY_RTL8201 27 | bool "RTL8201/SR8201" 28 | help 29 | RTL8201F/SR8201F is a single port 10/100Mb Ethernet Transceiver with auto MDIX. 30 | Goto http://www.corechip-sz.com/productsview.asp?id=22 for more information about it. 31 | 32 | config EXAMPLE_ETH_PHY_LAN87XX 33 | bool "LAN87xx" 34 | help 35 | Below chips are supported: 36 | LAN8710A is a small footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and 37 | flexPWR® Technology. 38 | LAN8720A is a small footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support. 39 | LAN8740A/LAN8741A is a small footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver 40 | with HP Auto-MDIX and flexPWR® Technology. 41 | LAN8742A is a small footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and 42 | flexPWR® Technology. 43 | Goto https://www.microchip.com for more information about them. 44 | 45 | config EXAMPLE_ETH_PHY_DP83848 46 | bool "DP83848" 47 | help 48 | DP83848 is a single port 10/100Mb/s Ethernet Physical Layer Transceiver. 49 | Goto http://www.ti.com/product/DP83848J for more information about it. 50 | 51 | config EXAMPLE_ETH_PHY_KSZ80XX 52 | bool "KSZ80xx" 53 | help 54 | With the KSZ80xx series, Microchip offers single-chip 10BASE-T/100BASE-TX 55 | Ethernet Physical Layer Tranceivers (PHY). 56 | The following chips are supported: KSZ8001, KSZ8021, KSZ8031, KSZ8041, 57 | KSZ8051, KSZ8061, KSZ8081, KSZ8091 58 | Goto https://www.microchip.com for more information about them. 59 | endchoice # EXAMPLE_ETH_PHY_MODEL 60 | 61 | config EXAMPLE_ETH_MDC_GPIO 62 | int "SMI MDC GPIO number" 63 | range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX 64 | default 23 65 | help 66 | Set the GPIO number used by SMI MDC. 67 | 68 | config EXAMPLE_ETH_MDIO_GPIO 69 | int "SMI MDIO GPIO number" 70 | range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX 71 | default 18 72 | help 73 | Set the GPIO number used by SMI MDIO. 74 | 75 | config EXAMPLE_ETH_PHY_RST_GPIO 76 | int "PHY Reset GPIO number" 77 | range -1 ENV_GPIO_OUT_RANGE_MAX 78 | default 5 79 | help 80 | Set the GPIO number used to reset PHY chip. 81 | Set to -1 to disable PHY chip hardware reset. 82 | 83 | config EXAMPLE_ETH_PHY_ADDR 84 | int "PHY Address" 85 | range 0 31 86 | default 1 87 | help 88 | Set PHY address according your board schematic. 89 | endif # EXAMPLE_USE_INTERNAL_ETHERNET 90 | 91 | config EXAMPLE_USE_SPI_ETHERNET 92 | bool "SPI Ethernet" 93 | default n 94 | select ETH_USE_SPI_ETHERNET 95 | help 96 | Use external SPI-Ethernet module(s). 97 | 98 | if EXAMPLE_USE_SPI_ETHERNET 99 | config EXAMPLE_SPI_ETHERNETS_NUM 100 | int "Number of SPI Ethernet modules to use at a time" 101 | range 1 2 102 | default 1 103 | help 104 | Set the number of SPI Ethernet modules you want to use at a time. Multiple SPI modules can be connected 105 | to one SPI interface and can be separately accessed based on state of associated Chip Select (CS). 106 | 107 | choice EXAMPLE_ETHERNET_TYPE_SPI 108 | prompt "Ethernet SPI" 109 | default EXAMPLE_USE_W5500 110 | help 111 | Select which kind of Ethernet will be used in the example. 112 | 113 | config EXAMPLE_USE_DM9051 114 | bool "DM9051 Module" 115 | select ETH_SPI_ETHERNET_DM9051 116 | help 117 | Select external SPI-Ethernet module (DM9051). 118 | 119 | config EXAMPLE_USE_KSZ8851SNL 120 | bool "KSZ8851SNL Module" 121 | select ETH_SPI_ETHERNET_KSZ8851SNL 122 | help 123 | Select external SPI-Ethernet module (KSZ8851SNL). 124 | 125 | config EXAMPLE_USE_W5500 126 | bool "W5500 Module" 127 | select ETH_SPI_ETHERNET_W5500 128 | help 129 | Select external SPI-Ethernet module (W5500). 130 | endchoice 131 | 132 | config EXAMPLE_ETH_SPI_HOST 133 | int "SPI Host Number" 134 | range 0 2 135 | default 1 136 | help 137 | Set the SPI host used to communicate with the SPI Ethernet Controller. 138 | 139 | config EXAMPLE_ETH_SPI_SCLK_GPIO 140 | int "SPI SCLK GPIO number" 141 | range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX 142 | default 14 if IDF_TARGET_ESP32 143 | default 12 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 144 | default 6 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C6 145 | default 4 if IDF_TARGET_ESP32H2 146 | help 147 | Set the GPIO number used by SPI SCLK. 148 | 149 | config EXAMPLE_ETH_SPI_MOSI_GPIO 150 | int "SPI MOSI GPIO number" 151 | range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX 152 | default 13 if IDF_TARGET_ESP32 153 | default 11 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 154 | default 7 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C6 155 | default 5 if IDF_TARGET_ESP32H2 156 | help 157 | Set the GPIO number used by SPI MOSI. 158 | 159 | config EXAMPLE_ETH_SPI_MISO_GPIO 160 | int "SPI MISO GPIO number" 161 | range ENV_GPIO_RANGE_MIN ENV_GPIO_IN_RANGE_MAX 162 | default 12 if IDF_TARGET_ESP32 163 | default 13 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 164 | default 2 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C6 165 | default 0 if IDF_TARGET_ESP32H2 166 | help 167 | Set the GPIO number used by SPI MISO. 168 | 169 | config EXAMPLE_ETH_SPI_CLOCK_MHZ 170 | int "SPI clock speed (MHz)" 171 | range 5 80 172 | default 16 173 | help 174 | Set the clock speed (MHz) of SPI interface. 175 | 176 | config EXAMPLE_ETH_SPI_CS0_GPIO 177 | int "SPI CS0 GPIO number for SPI Ethernet module #1" 178 | range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX 179 | default 15 if IDF_TARGET_ESP32 180 | default 10 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2 181 | default 3 if IDF_TARGET_ESP32C6 182 | default 1 if IDF_TARGET_ESP32H2 183 | help 184 | Set the GPIO number used by SPI CS0, i.e. Chip Select associated with the first SPI Eth module). 185 | 186 | config EXAMPLE_ETH_SPI_CS1_GPIO 187 | depends on EXAMPLE_SPI_ETHERNETS_NUM > 1 188 | int "SPI CS1 GPIO number for SPI Ethernet module #2" 189 | range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX 190 | default 32 if IDF_TARGET_ESP32 191 | default 7 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 192 | default 8 if IDF_TARGET_ESP32C3 193 | default 21 if IDF_TARGET_ESP32C6 194 | default 3 if IDF_TARGET_ESP32C2 195 | default 11 if IDF_TARGET_ESP32H2 196 | help 197 | Set the GPIO number used by SPI CS1, i.e. Chip Select associated with the second SPI Eth module. 198 | 199 | config EXAMPLE_ETH_SPI_INT0_GPIO 200 | int "Interrupt GPIO number SPI Ethernet module #1" 201 | range -1 ENV_GPIO_IN_RANGE_MAX 202 | default 4 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 203 | default 4 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C6 204 | default 10 if IDF_TARGET_ESP32H2 205 | help 206 | Set the GPIO number used by the first SPI Ethernet module interrupt line. 207 | Set -1 to use SPI Ethernet module in polling mode. 208 | 209 | config EXAMPLE_ETH_SPI_INT1_GPIO 210 | depends on EXAMPLE_SPI_ETHERNETS_NUM > 1 211 | int "Interrupt GPIO number SPI Ethernet module #2" 212 | range -1 ENV_GPIO_IN_RANGE_MAX 213 | default 33 if IDF_TARGET_ESP32 214 | default 5 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2 215 | default 5 if IDF_TARGET_ESP32C6 216 | default 9 if IDF_TARGET_ESP32H2 217 | help 218 | Set the GPIO number used by the second SPI Ethernet module interrupt line. 219 | Set -1 to use SPI Ethernet module in polling mode. 220 | 221 | config EXAMPLE_ETH_SPI_POLLING0_MS_VAL 222 | depends on EXAMPLE_ETH_SPI_INT0_GPIO < 0 223 | int "Polling period in msec of SPI Ethernet Module #1" 224 | default 10 225 | help 226 | Set SPI Ethernet module polling period. 227 | 228 | config EXAMPLE_ETH_SPI_POLLING1_MS_VAL 229 | depends on EXAMPLE_SPI_ETHERNETS_NUM > 1 && EXAMPLE_ETH_SPI_INT1_GPIO < 0 230 | int "Polling period in msec of SPI Ethernet Module #2" 231 | default 10 232 | help 233 | Set SPI Ethernet module polling period. 234 | 235 | # Hidden variable to ensure that polling period option is visible only when interrupt is set disabled and 236 | # it is set to known value (0) when interrupt is enabled at the same time. 237 | config EXAMPLE_ETH_SPI_POLLING0_MS 238 | int 239 | default EXAMPLE_ETH_SPI_POLLING0_MS_VAL if EXAMPLE_ETH_SPI_POLLING0_MS_VAL > 0 240 | default 0 241 | 242 | # Hidden variable to ensure that polling period option is visible only when interrupt is set disabled and 243 | # it is set to known value (0) when interrupt is enabled at the same time. 244 | config EXAMPLE_ETH_SPI_POLLING1_MS 245 | depends on EXAMPLE_SPI_ETHERNETS_NUM > 1 246 | int 247 | default EXAMPLE_ETH_SPI_POLLING1_MS_VAL if EXAMPLE_ETH_SPI_POLLING1_MS_VAL > 0 248 | default 0 249 | 250 | config EXAMPLE_ETH_SPI_PHY_RST0_GPIO 251 | int "PHY Reset GPIO number of SPI Ethernet Module #1" 252 | range -1 ENV_GPIO_OUT_RANGE_MAX 253 | default -1 254 | help 255 | Set the GPIO number used to reset PHY chip on the first SPI Ethernet module. 256 | Set to -1 to disable PHY chip hardware reset. 257 | 258 | config EXAMPLE_ETH_SPI_PHY_RST1_GPIO 259 | depends on EXAMPLE_SPI_ETHERNETS_NUM > 1 260 | int "PHY Reset GPIO number of SPI Ethernet Module #2" 261 | range -1 ENV_GPIO_OUT_RANGE_MAX 262 | default -1 263 | help 264 | Set the GPIO number used to reset PHY chip on the second SPI Ethernet module. 265 | Set to -1 to disable PHY chip hardware reset. 266 | 267 | config EXAMPLE_ETH_SPI_PHY_ADDR0 268 | int "PHY Address of SPI Ethernet Module #1" 269 | range 0 31 270 | default 1 271 | help 272 | Set the first SPI Ethernet module PHY address according your board schematic. 273 | 274 | config EXAMPLE_ETH_SPI_PHY_ADDR1 275 | depends on EXAMPLE_SPI_ETHERNETS_NUM > 1 276 | int "PHY Address of SPI Ethernet Module #2" 277 | range 0 31 278 | default 1 279 | help 280 | Set the second SPI Ethernet module PHY address according your board schematic. 281 | endif # EXAMPLE_USE_SPI_ETHERNET 282 | endmenu 283 | -------------------------------------------------------------------------------- /src/components/ethernet_init/ethernet_init.c: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD 3 | * 4 | * SPDX-License-Identifier: Unlicense OR CC0-1.0 5 | */ 6 | #include "ethernet_init.h" 7 | #include "esp_log.h" 8 | #include "esp_check.h" 9 | #include "esp_mac.h" 10 | #include "driver/gpio.h" 11 | #include "sdkconfig.h" 12 | #if CONFIG_ETH_USE_SPI_ETHERNET 13 | #include "driver/spi_master.h" 14 | #endif // CONFIG_ETH_USE_SPI_ETHERNET 15 | 16 | static const char *TAG = "bridge_eth_init"; 17 | 18 | #if CONFIG_EXAMPLE_SPI_ETHERNETS_NUM 19 | #define SPI_ETHERNETS_NUM CONFIG_EXAMPLE_SPI_ETHERNETS_NUM 20 | #else 21 | #define SPI_ETHERNETS_NUM 0 22 | #endif 23 | 24 | #if CONFIG_EXAMPLE_USE_INTERNAL_ETHERNET 25 | #define INTERNAL_ETHERNETS_NUM 1 26 | #else 27 | #define INTERNAL_ETHERNETS_NUM 0 28 | #endif 29 | 30 | #define INIT_SPI_ETH_MODULE_CONFIG(eth_module_config, num) \ 31 | do { \ 32 | eth_module_config[num].spi_cs_gpio = CONFIG_EXAMPLE_ETH_SPI_CS ##num## _GPIO; \ 33 | eth_module_config[num].int_gpio = CONFIG_EXAMPLE_ETH_SPI_INT ##num## _GPIO; \ 34 | eth_module_config[num].polling_ms = CONFIG_EXAMPLE_ETH_SPI_POLLING ##num## _MS; \ 35 | eth_module_config[num].phy_reset_gpio = CONFIG_EXAMPLE_ETH_SPI_PHY_RST ##num## _GPIO; \ 36 | eth_module_config[num].phy_addr = CONFIG_EXAMPLE_ETH_SPI_PHY_ADDR ##num; \ 37 | } while(0) 38 | 39 | typedef struct { 40 | uint8_t spi_cs_gpio; 41 | int8_t int_gpio; 42 | uint32_t polling_ms; 43 | int8_t phy_reset_gpio; 44 | uint8_t phy_addr; 45 | uint8_t *mac_addr; 46 | }spi_eth_module_config_t; 47 | 48 | #if CONFIG_EXAMPLE_USE_INTERNAL_ETHERNET 49 | /** 50 | * @brief Internal ESP32 Ethernet initialization 51 | * 52 | * @param[out] mac_out optionally returns Ethernet MAC object 53 | * @param[out] phy_out optionally returns Ethernet PHY object 54 | * @return 55 | * - esp_eth_handle_t if init succeeded 56 | * - NULL if init failed 57 | */ 58 | static esp_eth_handle_t eth_init_internal(esp_eth_mac_t **mac_out, esp_eth_phy_t **phy_out) 59 | { 60 | esp_eth_handle_t ret = NULL; 61 | 62 | // Init common MAC and PHY configs to default 63 | eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG(); 64 | eth_phy_config_t phy_config = ETH_PHY_DEFAULT_CONFIG(); 65 | 66 | // Update PHY config based on board specific configuration 67 | phy_config.phy_addr = CONFIG_EXAMPLE_ETH_PHY_ADDR; 68 | phy_config.reset_gpio_num = CONFIG_EXAMPLE_ETH_PHY_RST_GPIO; 69 | // Init vendor specific MAC config to default 70 | eth_esp32_emac_config_t esp32_emac_config = ETH_ESP32_EMAC_DEFAULT_CONFIG(); 71 | // Update vendor specific MAC config based on board configuration 72 | esp32_emac_config.smi_mdc_gpio_num = CONFIG_EXAMPLE_ETH_MDC_GPIO; 73 | esp32_emac_config.smi_mdio_gpio_num = CONFIG_EXAMPLE_ETH_MDIO_GPIO; 74 | #if CONFIG_EXAMPLE_USE_SPI_ETHERNET 75 | // The DMA is shared resource between EMAC and the SPI. Therefore, adjust 76 | // EMAC DMA burst length when SPI Ethernet is used along with EMAC. 77 | esp32_emac_config.dma_burst_len = ETH_DMA_BURST_LEN_4; 78 | #endif // CONFIG_EXAMPLE_USE_SPI_ETHERNET 79 | // Create new ESP32 Ethernet MAC instance 80 | esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&esp32_emac_config, &mac_config); 81 | // Create new PHY instance based on board configuration 82 | #if CONFIG_EXAMPLE_ETH_PHY_IP101 83 | esp_eth_phy_t *phy = esp_eth_phy_new_ip101(&phy_config); 84 | #elif CONFIG_EXAMPLE_ETH_PHY_RTL8201 85 | esp_eth_phy_t *phy = esp_eth_phy_new_rtl8201(&phy_config); 86 | #elif CONFIG_EXAMPLE_ETH_PHY_LAN87XX 87 | esp_eth_phy_t *phy = esp_eth_phy_new_lan87xx(&phy_config); 88 | #elif CONFIG_EXAMPLE_ETH_PHY_DP83848 89 | esp_eth_phy_t *phy = esp_eth_phy_new_dp83848(&phy_config); 90 | #elif CONFIG_EXAMPLE_ETH_PHY_KSZ80XX 91 | esp_eth_phy_t *phy = esp_eth_phy_new_ksz80xx(&phy_config); 92 | #endif 93 | // Init Ethernet driver to default and install it 94 | esp_eth_handle_t eth_handle = NULL; 95 | esp_eth_config_t config = ETH_DEFAULT_CONFIG(mac, phy); 96 | ESP_GOTO_ON_FALSE(esp_eth_driver_install(&config, ð_handle) == ESP_OK, NULL, 97 | err, TAG, "Ethernet driver install failed"); 98 | 99 | if (mac_out != NULL) { 100 | *mac_out = mac; 101 | } 102 | if (phy_out != NULL) { 103 | *phy_out = phy; 104 | } 105 | return eth_handle; 106 | err: 107 | if (eth_handle != NULL) { 108 | esp_eth_driver_uninstall(eth_handle); 109 | } 110 | if (mac != NULL) { 111 | mac->del(mac); 112 | } 113 | if (phy != NULL) { 114 | phy->del(phy); 115 | } 116 | return ret; 117 | } 118 | #endif // CONFIG_EXAMPLE_USE_INTERNAL_ETHERNET 119 | 120 | #if CONFIG_EXAMPLE_USE_SPI_ETHERNET 121 | /** 122 | * @brief SPI bus initialization (to be used by Ethernet SPI modules) 123 | * 124 | * @return 125 | * - ESP_OK on success 126 | */ 127 | static esp_err_t spi_bus_init(void) 128 | { 129 | esp_err_t ret = ESP_OK; 130 | 131 | // Install GPIO ISR handler to be able to service SPI Eth modules interrupts 132 | ret = gpio_install_isr_service(0); 133 | if (ret != ESP_OK) { 134 | if (ret == ESP_ERR_INVALID_STATE) { 135 | ESP_LOGW(TAG, "GPIO ISR handler has been already installed"); 136 | ret = ESP_OK; // ISR handler has been already installed so no issues 137 | } else { 138 | ESP_LOGE(TAG, "GPIO ISR handler install failed"); 139 | goto err; 140 | } 141 | } 142 | 143 | // Init SPI bus 144 | spi_bus_config_t buscfg = { 145 | .miso_io_num = CONFIG_EXAMPLE_ETH_SPI_MISO_GPIO, 146 | .mosi_io_num = CONFIG_EXAMPLE_ETH_SPI_MOSI_GPIO, 147 | .sclk_io_num = CONFIG_EXAMPLE_ETH_SPI_SCLK_GPIO, 148 | .quadwp_io_num = -1, 149 | .quadhd_io_num = -1, 150 | }; 151 | ESP_GOTO_ON_ERROR(spi_bus_initialize(CONFIG_EXAMPLE_ETH_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO), 152 | err, TAG, "SPI host #%d init failed", CONFIG_EXAMPLE_ETH_SPI_HOST); 153 | 154 | err: 155 | return ret; 156 | } 157 | 158 | /** 159 | * @brief Ethernet SPI modules initialization 160 | * 161 | * @param[in] spi_eth_module_config specific SPI Ethernet module configuration 162 | * @param[out] mac_out optionally returns Ethernet MAC object 163 | * @param[out] phy_out optionally returns Ethernet PHY object 164 | * @return 165 | * - esp_eth_handle_t if init succeeded 166 | * - NULL if init failed 167 | */ 168 | static esp_eth_handle_t eth_init_spi(spi_eth_module_config_t *spi_eth_module_config, esp_eth_mac_t **mac_out, esp_eth_phy_t **phy_out) 169 | { 170 | esp_eth_handle_t ret = NULL; 171 | 172 | // Init common MAC and PHY configs to default 173 | eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG(); 174 | eth_phy_config_t phy_config = ETH_PHY_DEFAULT_CONFIG(); 175 | 176 | // Update PHY config based on board specific configuration 177 | phy_config.phy_addr = spi_eth_module_config->phy_addr; 178 | phy_config.reset_gpio_num = spi_eth_module_config->phy_reset_gpio; 179 | 180 | // Configure SPI interface for specific SPI module 181 | spi_device_interface_config_t spi_devcfg = { 182 | .mode = 0, 183 | .clock_speed_hz = CONFIG_EXAMPLE_ETH_SPI_CLOCK_MHZ * 1000 * 1000, 184 | .queue_size = 20, 185 | .spics_io_num = spi_eth_module_config->spi_cs_gpio 186 | }; 187 | // Init vendor specific MAC config to default, and create new SPI Ethernet MAC instance 188 | // and new PHY instance based on board configuration 189 | #if CONFIG_EXAMPLE_USE_KSZ8851SNL 190 | eth_ksz8851snl_config_t ksz8851snl_config = ETH_KSZ8851SNL_DEFAULT_CONFIG(CONFIG_EXAMPLE_ETH_SPI_HOST, &spi_devcfg); 191 | ksz8851snl_config.int_gpio_num = spi_eth_module_config->int_gpio; 192 | ksz8851snl_config.poll_period_ms = spi_eth_module_config->polling_ms; 193 | esp_eth_mac_t *mac = esp_eth_mac_new_ksz8851snl(&ksz8851snl_config, &mac_config); 194 | esp_eth_phy_t *phy = esp_eth_phy_new_ksz8851snl(&phy_config); 195 | #elif CONFIG_EXAMPLE_USE_DM9051 196 | eth_dm9051_config_t dm9051_config = ETH_DM9051_DEFAULT_CONFIG(CONFIG_EXAMPLE_ETH_SPI_HOST, &spi_devcfg); 197 | dm9051_config.int_gpio_num = spi_eth_module_config->int_gpio; 198 | dm9051_config.poll_period_ms = spi_eth_module_config->polling_ms; 199 | esp_eth_mac_t *mac = esp_eth_mac_new_dm9051(&dm9051_config, &mac_config); 200 | esp_eth_phy_t *phy = esp_eth_phy_new_dm9051(&phy_config); 201 | #elif CONFIG_EXAMPLE_USE_W5500 202 | eth_w5500_config_t w5500_config = ETH_W5500_DEFAULT_CONFIG(CONFIG_EXAMPLE_ETH_SPI_HOST, &spi_devcfg); 203 | w5500_config.int_gpio_num = spi_eth_module_config->int_gpio; 204 | w5500_config.poll_period_ms = spi_eth_module_config->polling_ms; 205 | esp_eth_mac_t *mac = esp_eth_mac_new_w5500(&w5500_config, &mac_config); 206 | esp_eth_phy_t *phy = esp_eth_phy_new_w5500(&phy_config); 207 | #endif //CONFIG_EXAMPLE_USE_W5500 208 | // Init Ethernet driver to default and install it 209 | esp_eth_handle_t eth_handle = NULL; 210 | esp_eth_config_t eth_config_spi = ETH_DEFAULT_CONFIG(mac, phy); 211 | ESP_GOTO_ON_FALSE(esp_eth_driver_install(ð_config_spi, ð_handle) == ESP_OK, NULL, err, TAG, "SPI Ethernet driver install failed"); 212 | 213 | // The SPI Ethernet module might not have a burned factory MAC address, we can set it manually. 214 | if (spi_eth_module_config->mac_addr != NULL) { 215 | ESP_GOTO_ON_FALSE(esp_eth_ioctl(eth_handle, ETH_CMD_S_MAC_ADDR, spi_eth_module_config->mac_addr) == ESP_OK, 216 | NULL, err, TAG, "SPI Ethernet MAC address config failed"); 217 | } 218 | 219 | if (mac_out != NULL) { 220 | *mac_out = mac; 221 | } 222 | if (phy_out != NULL) { 223 | *phy_out = phy; 224 | } 225 | return eth_handle; 226 | err: 227 | if (eth_handle != NULL) { 228 | esp_eth_driver_uninstall(eth_handle); 229 | } 230 | if (mac != NULL) { 231 | mac->del(mac); 232 | } 233 | if (phy != NULL) { 234 | phy->del(phy); 235 | } 236 | return ret; 237 | } 238 | #endif // CONFIG_EXAMPLE_USE_SPI_ETHERNET 239 | 240 | esp_err_t example_eth_init(esp_eth_handle_t *eth_handles_out[], uint8_t *eth_cnt_out) 241 | { 242 | esp_err_t ret = ESP_OK; 243 | esp_eth_handle_t *eth_handles = NULL; 244 | uint8_t eth_cnt = 0; 245 | 246 | #ifdef CONFIG_HAS_CLK_EN_PIN 247 | gpio_set_direction(CONFIG_CLK_EN_GPIO, GPIO_MODE_OUTPUT); 248 | gpio_set_level(CONFIG_CLK_EN_GPIO, 1); 249 | #endif 250 | 251 | #if CONFIG_EXAMPLE_USE_INTERNAL_ETHERNET || CONFIG_EXAMPLE_USE_SPI_ETHERNET 252 | ESP_GOTO_ON_FALSE(eth_handles_out != NULL && eth_cnt_out != NULL, ESP_ERR_INVALID_ARG, 253 | err, TAG, "invalid arguments: initialized handles array or number of interfaces"); 254 | eth_handles = calloc(SPI_ETHERNETS_NUM + INTERNAL_ETHERNETS_NUM, sizeof(esp_eth_handle_t)); 255 | ESP_GOTO_ON_FALSE(eth_handles != NULL, ESP_ERR_NO_MEM, err, TAG, "no memory"); 256 | 257 | #if CONFIG_EXAMPLE_USE_INTERNAL_ETHERNET 258 | eth_handles[eth_cnt] = eth_init_internal(NULL, NULL); 259 | ESP_GOTO_ON_FALSE(eth_handles[eth_cnt], ESP_FAIL, err, TAG, "internal Ethernet init failed"); 260 | eth_cnt++; 261 | #endif //CONFIG_EXAMPLE_USE_INTERNAL_ETHERNET 262 | 263 | #if CONFIG_EXAMPLE_USE_SPI_ETHERNET 264 | ESP_GOTO_ON_ERROR(spi_bus_init(), err, TAG, "SPI bus init failed"); 265 | // Init specific SPI Ethernet module configuration from Kconfig (CS GPIO, Interrupt GPIO, etc.) 266 | spi_eth_module_config_t spi_eth_module_config[CONFIG_EXAMPLE_SPI_ETHERNETS_NUM] = { 0 }; 267 | INIT_SPI_ETH_MODULE_CONFIG(spi_eth_module_config, 0); 268 | // The SPI Ethernet module(s) might not have a burned factory MAC address, hence use manually configured address(es). 269 | // In this example, Locally Administered MAC address derived from ESP32x base MAC address is used. 270 | // Note that Locally Administered OUI range should be used only when testing on a LAN under your control! 271 | uint8_t base_mac_addr[ETH_ADDR_LEN]; 272 | ESP_GOTO_ON_ERROR(esp_efuse_mac_get_default(base_mac_addr), err, TAG, "get EFUSE MAC failed"); 273 | uint8_t local_mac_1[ETH_ADDR_LEN]; 274 | esp_derive_local_mac(local_mac_1, base_mac_addr); 275 | spi_eth_module_config[0].mac_addr = local_mac_1; 276 | #if CONFIG_EXAMPLE_SPI_ETHERNETS_NUM > 1 277 | INIT_SPI_ETH_MODULE_CONFIG(spi_eth_module_config, 1); 278 | uint8_t local_mac_2[ETH_ADDR_LEN]; 279 | base_mac_addr[ETH_ADDR_LEN - 1] += 1; 280 | esp_derive_local_mac(local_mac_2, base_mac_addr); 281 | spi_eth_module_config[1].mac_addr = local_mac_2; 282 | #endif 283 | #if CONFIG_EXAMPLE_SPI_ETHERNETS_NUM > 2 284 | #error Maximum number of supported SPI Ethernet devices is currently limited to 2 by this example. 285 | #endif 286 | for (int i = 0; i < CONFIG_EXAMPLE_SPI_ETHERNETS_NUM; i++) { 287 | eth_handles[eth_cnt] = eth_init_spi(&spi_eth_module_config[i], NULL, NULL); 288 | ESP_GOTO_ON_FALSE(eth_handles[eth_cnt], ESP_FAIL, err, TAG, "SPI Ethernet init failed"); 289 | eth_cnt++; 290 | } 291 | #endif // CONFIG_ETH_USE_SPI_ETHERNET 292 | #else 293 | ESP_LOGD(TAG, "no Ethernet device selected to init"); 294 | #endif // CONFIG_EXAMPLE_USE_INTERNAL_ETHERNET || CONFIG_EXAMPLE_USE_SPI_ETHERNET 295 | *eth_handles_out = eth_handles; 296 | *eth_cnt_out = eth_cnt; 297 | 298 | return ret; 299 | #if CONFIG_EXAMPLE_USE_INTERNAL_ETHERNET || CONFIG_EXAMPLE_USE_SPI_ETHERNET 300 | err: 301 | free(eth_handles); 302 | return ret; 303 | #endif 304 | } 305 | -------------------------------------------------------------------------------- /src/components/ethernet_init/ethernet_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD 3 | * 4 | * SPDX-License-Identifier: Unlicense OR CC0-1.0 5 | */ 6 | #pragma once 7 | 8 | #include "esp_eth_driver.h" 9 | 10 | #ifdef __cplusplus 11 | extern "C" { 12 | #endif 13 | 14 | /** 15 | * @brief Initialize Ethernet driver based on Espressif IoT Development Framework Configuration 16 | * 17 | * @param[out] eth_handles_out array of initialized Ethernet driver handles 18 | * @param[out] eth_cnt_out number of initialized Ethernets 19 | * @return 20 | * - ESP_OK on success 21 | * - ESP_ERR_INVALID_ARG when passed invalid pointers 22 | * - ESP_ERR_NO_MEM when there is no memory to allocate for Ethernet driver handles array 23 | * - ESP_FAIL on any other failure 24 | */ 25 | esp_err_t example_eth_init(esp_eth_handle_t *eth_handles_out[], uint8_t *eth_cnt_out); 26 | 27 | #ifdef __cplusplus 28 | } 29 | #endif 30 | -------------------------------------------------------------------------------- /src/main/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | idf_component_register(SRCS "ethernet_example_main.c" "tcp_server.c" 2 | INCLUDE_DIRS ".") 3 | -------------------------------------------------------------------------------- /src/main/Kconfig.projbuild: -------------------------------------------------------------------------------- 1 | menu "Eth-UART Bridge Configuration" 2 | 3 | config HAS_CLK_EN_PIN 4 | bool "Has clock enable pin" 5 | default y 6 | 7 | config CLK_EN_GPIO 8 | int "CLK enable GPIO number" 9 | range 16 16 10 | default 16 11 | help 12 | GPIO number (IOxx) for 50MHz oscillator enable. 13 | 14 | config BRIDGE_PORT 15 | int "Bridge port" 16 | range 0 65535 17 | default 3142 18 | help 19 | Local port the UART bridge will listen on. 20 | 21 | config ECHO_PORT 22 | int "Echo port" 23 | range 0 65535 24 | default 3333 25 | help 26 | Local port the echo server will listen on. 27 | 28 | config EXAMPLE_KEEPALIVE_IDLE 29 | int "TCP keep-alive idle time(s)" 30 | default 5 31 | help 32 | Keep-alive idle time. In idle time without receiving any data from peer, will send keep-alive probe packet 33 | 34 | config EXAMPLE_KEEPALIVE_INTERVAL 35 | int "TCP keep-alive interval time(s)" 36 | default 5 37 | help 38 | Keep-alive probe packet interval time. 39 | 40 | config EXAMPLE_KEEPALIVE_COUNT 41 | int "TCP keep-alive packet retry send counts" 42 | default 3 43 | help 44 | Keep-alive probe packet retry count. 45 | 46 | config UART_TX_GPIO 47 | int "UART TX GPIO number" 48 | range 0 34 49 | default 4 50 | help 51 | GPIO number (IOxx) for serial data TX output. 52 | 53 | config UART_RX_GPIO 54 | int "UART RX GPIO number" 55 | range 0 35 56 | default 35 57 | help 58 | GPIO number (IOxx) for serial data RX input. 59 | 60 | config UART_RTS_GPIO 61 | int "UART RTS GPIO number" 62 | range 0 34 63 | default 15 64 | help 65 | GPIO number (IOxx) for serial data RTS output. Low level enables data reception from RX line. 66 | 67 | config UART_CTS_GPIO 68 | depends on UART_CTS_EN 69 | int "UART CTS GPIO number" 70 | range 0 34 71 | default 14 72 | help 73 | GPIO number (IOxx) for serial data CTS input. Low level enables data transmission to TX line. 74 | 75 | config UART_CTS_EN 76 | bool "UART CTS enable" 77 | default n 78 | help 79 | Enable using CTS input. Low level on this pin enables data transmission to TX line. 80 | 81 | config BRIDGE_LED_GPIO 82 | int "Bridge connected LED GPIO number" 83 | range 0 34 84 | default 2 85 | help 86 | GPIO number (IOxx) of the bridge connected indicator. Active level (connection established) is high. 87 | 88 | config UART_BITRATE 89 | int "UART baud rate" 90 | range 9600 1843200 91 | default 921600 92 | help 93 | UART data transfer rate in bits per second. 94 | 95 | config UART_TX_BUFF_SIZE 96 | int "UART transmit buffer size (KB)" 97 | range 0 64 98 | default 17 99 | help 100 | UART transmit data buffer size in kilobytes. 101 | 102 | config UART_RX_BUFF_SIZE 103 | int "UART receive buffer size (KB)" 104 | range 1 64 105 | default 17 106 | help 107 | UART receive data buffer size in kilobytes. 108 | 109 | endmenu 110 | -------------------------------------------------------------------------------- /src/main/ethernet_example_main.c: -------------------------------------------------------------------------------- 1 | /* Ethernet Basic Example 2 | 3 | This example code is in the Public Domain (or CC0 licensed, at your option.) 4 | 5 | Unless required by applicable law or agreed to in writing, this 6 | software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR 7 | CONDITIONS OF ANY KIND, either express or implied. 8 | */ 9 | #include 10 | #include 11 | #include "freertos/FreeRTOS.h" 12 | #include "freertos/task.h" 13 | #include "esp_netif.h" 14 | #include "esp_eth.h" 15 | #include "esp_event.h" 16 | #include "esp_log.h" 17 | #include "ethernet_init.h" 18 | #include "sdkconfig.h" 19 | #include "tcp_server.h" 20 | 21 | static const char *TAG = "bridge"; 22 | 23 | /** Event handler for Ethernet events */ 24 | static void eth_event_handler(void *arg, esp_event_base_t event_base, 25 | int32_t event_id, void *event_data) 26 | { 27 | uint8_t mac_addr[6] = {0}; 28 | /* we can get the ethernet driver handle from event data */ 29 | esp_eth_handle_t eth_handle = *(esp_eth_handle_t *)event_data; 30 | 31 | switch (event_id) { 32 | case ETHERNET_EVENT_CONNECTED: 33 | esp_eth_ioctl(eth_handle, ETH_CMD_G_MAC_ADDR, mac_addr); 34 | ESP_LOGI(TAG, "Ethernet Link Up"); 35 | ESP_LOGI(TAG, "Ethernet HW Addr %02x:%02x:%02x:%02x:%02x:%02x", 36 | mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]); 37 | break; 38 | case ETHERNET_EVENT_DISCONNECTED: 39 | ESP_LOGI(TAG, "Ethernet Link Down"); 40 | break; 41 | case ETHERNET_EVENT_START: 42 | ESP_LOGI(TAG, "Ethernet Started"); 43 | break; 44 | case ETHERNET_EVENT_STOP: 45 | ESP_LOGI(TAG, "Ethernet Stopped"); 46 | break; 47 | default: 48 | break; 49 | } 50 | } 51 | 52 | /** Event handler for IP_EVENT_ETH_GOT_IP */ 53 | static void got_ip_event_handler(void *arg, esp_event_base_t event_base, 54 | int32_t event_id, void *event_data) 55 | { 56 | ip_event_got_ip_t *event = (ip_event_got_ip_t *) event_data; 57 | const esp_netif_ip_info_t *ip_info = &event->ip_info; 58 | 59 | ESP_LOGI(TAG, "Ethernet Got IP Address"); 60 | ESP_LOGI(TAG, "~~~~~~~~~~~"); 61 | ESP_LOGI(TAG, "ETHIP:" IPSTR, IP2STR(&ip_info->ip)); 62 | ESP_LOGI(TAG, "ETHMASK:" IPSTR, IP2STR(&ip_info->netmask)); 63 | ESP_LOGI(TAG, "ETHGW:" IPSTR, IP2STR(&ip_info->gw)); 64 | ESP_LOGI(TAG, "~~~~~~~~~~~"); 65 | } 66 | 67 | void app_main(void) 68 | { 69 | // Initialize Ethernet driver 70 | uint8_t eth_port_cnt = 0; 71 | esp_eth_handle_t *eth_handles; 72 | ESP_ERROR_CHECK(example_eth_init(ð_handles, ð_port_cnt)); 73 | 74 | // Initialize TCP/IP network interface aka the esp-netif (should be called only once in application) 75 | ESP_ERROR_CHECK(esp_netif_init()); 76 | // Create default event loop that running in background 77 | ESP_ERROR_CHECK(esp_event_loop_create_default()); 78 | 79 | // Create instance(s) of esp-netif for Ethernet(s) 80 | if (eth_port_cnt == 1) { 81 | // Use ESP_NETIF_DEFAULT_ETH when just one Ethernet interface is used and you don't need to modify 82 | // default esp-netif configuration parameters. 83 | esp_netif_config_t cfg = ESP_NETIF_DEFAULT_ETH(); 84 | esp_netif_t *eth_netif = esp_netif_new(&cfg); 85 | // Attach Ethernet driver to TCP/IP stack 86 | ESP_ERROR_CHECK(esp_netif_attach(eth_netif, esp_eth_new_netif_glue(eth_handles[0]))); 87 | } else { 88 | // Use ESP_NETIF_INHERENT_DEFAULT_ETH when multiple Ethernet interfaces are used and so you need to modify 89 | // esp-netif configuration parameters for each interface (name, priority, etc.). 90 | esp_netif_inherent_config_t esp_netif_config = ESP_NETIF_INHERENT_DEFAULT_ETH(); 91 | esp_netif_config_t cfg_spi = { 92 | .base = &esp_netif_config, 93 | .stack = ESP_NETIF_NETSTACK_DEFAULT_ETH 94 | }; 95 | char if_key_str[10]; 96 | char if_desc_str[10]; 97 | char num_str[3]; 98 | for (int i = 0; i < eth_port_cnt; i++) { 99 | itoa(i, num_str, 10); 100 | strcat(strcpy(if_key_str, "ETH_"), num_str); 101 | strcat(strcpy(if_desc_str, "eth"), num_str); 102 | esp_netif_config.if_key = if_key_str; 103 | esp_netif_config.if_desc = if_desc_str; 104 | esp_netif_config.route_prio -= i*5; 105 | esp_netif_t *eth_netif = esp_netif_new(&cfg_spi); 106 | 107 | // Attach Ethernet driver to TCP/IP stack 108 | ESP_ERROR_CHECK(esp_netif_attach(eth_netif, esp_eth_new_netif_glue(eth_handles[i]))); 109 | } 110 | } 111 | 112 | // Register user defined event handers 113 | ESP_ERROR_CHECK(esp_event_handler_register(ETH_EVENT, ESP_EVENT_ANY_ID, ð_event_handler, NULL)); 114 | ESP_ERROR_CHECK(esp_event_handler_register(IP_EVENT, IP_EVENT_ETH_GOT_IP, &got_ip_event_handler, NULL)); 115 | 116 | // Start Ethernet driver state machine 117 | for (int i = 0; i < eth_port_cnt; i++) { 118 | ESP_ERROR_CHECK(esp_eth_start(eth_handles[i])); 119 | } 120 | 121 | tcp_server_create(); 122 | } 123 | -------------------------------------------------------------------------------- /src/main/tcp_server.c: -------------------------------------------------------------------------------- 1 | /* BSD Socket API Example 2 | 3 | This example code is in the Public Domain (or CC0 licensed, at your option.) 4 | 5 | Unless required by applicable law or agreed to in writing, this 6 | software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR 7 | CONDITIONS OF ANY KIND, either express or implied. 8 | */ 9 | #include 10 | #include 11 | #include "freertos/FreeRTOS.h" 12 | #include "freertos/task.h" 13 | #include "esp_system.h" 14 | #include "esp_wifi.h" 15 | #include "esp_event.h" 16 | #include "esp_log.h" 17 | #include "nvs_flash.h" 18 | #include "esp_netif.h" 19 | #include "esp_check.h" 20 | #include "driver/gpio.h" 21 | #include "driver/uart.h" 22 | 23 | #include "lwip/err.h" 24 | #include "lwip/sockets.h" 25 | #include "lwip/sys.h" 26 | #include 27 | #include 28 | 29 | #define KEEPALIVE_IDLE CONFIG_EXAMPLE_KEEPALIVE_IDLE 30 | #define KEEPALIVE_INTERVAL CONFIG_EXAMPLE_KEEPALIVE_INTERVAL 31 | #define KEEPALIVE_COUNT CONFIG_EXAMPLE_KEEPALIVE_COUNT 32 | 33 | static const char *TAG = "bridge_eth"; 34 | 35 | struct server_port; 36 | typedef void (*sock_handler_t)(int, struct server_port*); 37 | 38 | #define BUFF_SZ 4096 39 | 40 | struct server_port { 41 | uint16_t port; 42 | sock_handler_t handler; 43 | uart_port_t uart; 44 | char buff[BUFF_SZ]; 45 | }; 46 | 47 | static void do_echo(int sock, struct server_port* srv) 48 | { 49 | for (;;) 50 | { 51 | int len = recv(sock, srv->buff, BUFF_SZ, 0); 52 | if (len < 0) { 53 | ESP_LOGE(TAG, "Error occurred during receiving: errno %d", errno); 54 | return; 55 | } else if (len == 0) { 56 | ESP_LOGW(TAG, "Connection closed"); 57 | return; 58 | } else { 59 | // send() can return less bytes than supplied length. 60 | // Walk-around for robust implementation. 61 | char* ptr = srv->buff; 62 | while (len) { 63 | int const written = send(sock, ptr, len, 0); 64 | if (written < 0) { 65 | ESP_LOGE(TAG, "Error occurred during sending: errno %d", errno); 66 | // Failed to retransmit, giving up 67 | return; 68 | } 69 | len -= written; 70 | ptr += written; 71 | } 72 | } 73 | } 74 | } 75 | 76 | static void do_bridge(int sock, struct server_port* srv) 77 | { 78 | ESP_ERROR_CHECK(fcntl(sock, F_SETFL, fcntl(sock, F_GETFL, 0) | O_NONBLOCK)); 79 | gpio_set_level(CONFIG_BRIDGE_LED_GPIO, 1); 80 | for (;;) { 81 | bool idle = true; 82 | // Read UART 83 | for (;;) { 84 | int size = uart_read_bytes(srv->uart, srv->buff, BUFF_SZ, idle ? 0 : 1); 85 | if (size < 0) { 86 | ESP_LOGE(TAG, "Uart read failed"); 87 | return; 88 | } 89 | if (!size) 90 | break; 91 | 92 | ESP_LOGI(TAG, "UART -> Eth %d bytes", size); 93 | char* ptr = srv->buff; 94 | while (size > 0) { 95 | int const written = send(sock, ptr, size, 0); 96 | if (written < 0) { 97 | ESP_LOGE(TAG, "Error occurred during sending: errno %d", errno); 98 | break; 99 | } 100 | size -= written; 101 | ptr += written; 102 | } 103 | idle = false; 104 | } 105 | // Read Eth 106 | int const rx_len = recv(sock, srv->buff, BUFF_SZ, 0); 107 | if (rx_len < 0) { 108 | if (errno != EWOULDBLOCK) { 109 | ESP_LOGE(TAG, "Error occurred during receiving: errno %d", errno); 110 | break; 111 | } 112 | } else if (rx_len == 0) { 113 | ESP_LOGW(TAG, "Connection closed"); 114 | break; 115 | } else { 116 | ESP_LOGI(TAG, "Eth -> UART %d bytes", rx_len); 117 | uart_write_bytes(srv->uart, srv->buff, rx_len); 118 | idle = false; 119 | } 120 | if (idle) 121 | vTaskDelay(1); 122 | } 123 | for (;;) { 124 | int const left = uart_read_bytes(srv->uart, srv->buff, BUFF_SZ, 8); 125 | if (left <= 0) 126 | break; 127 | } 128 | gpio_set_level(CONFIG_BRIDGE_LED_GPIO, 0); 129 | } 130 | 131 | static void tcp_server_task(void *pvParameters) 132 | { 133 | char addr_str[128]; 134 | struct server_port* srv = pvParameters; 135 | int ip_protocol = 0; 136 | int keepAlive = 1; 137 | int keepIdle = KEEPALIVE_IDLE; 138 | int keepInterval = KEEPALIVE_INTERVAL; 139 | int keepCount = KEEPALIVE_COUNT; 140 | struct sockaddr_storage dest_addr; 141 | 142 | struct sockaddr_in *dest_addr_ip4 = (struct sockaddr_in *)&dest_addr; 143 | dest_addr_ip4->sin_addr.s_addr = htonl(INADDR_ANY); 144 | dest_addr_ip4->sin_family = AF_INET; 145 | dest_addr_ip4->sin_port = htons(srv->port); 146 | ip_protocol = IPPROTO_IP; 147 | 148 | int listen_sock = socket(AF_INET, SOCK_STREAM, ip_protocol); 149 | if (listen_sock < 0) { 150 | ESP_LOGE(TAG, "Unable to create socket: errno %d", errno); 151 | vTaskDelete(NULL); 152 | return; 153 | } 154 | int opt = 1; 155 | setsockopt(listen_sock, SOL_SOCKET, SO_REUSEADDR, &opt, sizeof(opt)); 156 | 157 | ESP_LOGI(TAG, "Socket created"); 158 | 159 | int err = bind(listen_sock, (struct sockaddr *)&dest_addr, sizeof(dest_addr)); 160 | if (err != 0) { 161 | ESP_LOGE(TAG, "Socket unable to bind: errno %d", errno); 162 | goto CLEAN_UP; 163 | } 164 | ESP_LOGI(TAG, "Socket bound, port %d", srv->port); 165 | 166 | err = listen(listen_sock, 1); 167 | if (err != 0) { 168 | ESP_LOGE(TAG, "Error occurred during listen: errno %d", errno); 169 | goto CLEAN_UP; 170 | } 171 | 172 | while (1) { 173 | 174 | ESP_LOGI(TAG, "Socket listening"); 175 | 176 | struct sockaddr_storage source_addr; // Large enough for both IPv4 or IPv6 177 | socklen_t addr_len = sizeof(source_addr); 178 | int sock = accept(listen_sock, (struct sockaddr *)&source_addr, &addr_len); 179 | if (sock < 0) { 180 | ESP_LOGE(TAG, "Unable to accept connection: errno %d", errno); 181 | break; 182 | } 183 | 184 | // Set tcp keepalive option 185 | setsockopt(sock, SOL_SOCKET, SO_KEEPALIVE, &keepAlive, sizeof(int)); 186 | setsockopt(sock, IPPROTO_TCP, TCP_KEEPIDLE, &keepIdle, sizeof(int)); 187 | setsockopt(sock, IPPROTO_TCP, TCP_KEEPINTVL, &keepInterval, sizeof(int)); 188 | setsockopt(sock, IPPROTO_TCP, TCP_KEEPCNT, &keepCount, sizeof(int)); 189 | // Convert ip address to string 190 | if (source_addr.ss_family == PF_INET) { 191 | inet_ntoa_r(((struct sockaddr_in *)&source_addr)->sin_addr, addr_str, sizeof(addr_str) - 1); 192 | } 193 | ESP_LOGI(TAG, "Socket accepted ip address: %s", addr_str); 194 | 195 | (srv->handler)(sock, srv); 196 | 197 | shutdown(sock, 0); 198 | close(sock); 199 | } 200 | 201 | CLEAN_UP: 202 | close(listen_sock); 203 | vTaskDelete(NULL); 204 | } 205 | 206 | #ifdef CONFIG_UART_CTS_EN 207 | #define UART_FLOWCTRL UART_HW_FLOWCTRL_CTS_RTS 208 | #define UART_CTS_GPIO CONFIG_UART_CTS_GPIO 209 | #else 210 | #define UART_FLOWCTRL UART_HW_FLOWCTRL_RTS 211 | #define UART_CTS_GPIO UART_PIN_NO_CHANGE 212 | #endif 213 | 214 | #define UART_TX_GPIO CONFIG_UART_TX_GPIO 215 | #define UART_RX_GPIO CONFIG_UART_RX_GPIO 216 | #define UART_RTS_GPIO CONFIG_UART_RTS_GPIO 217 | #define UART_BITRATE CONFIG_UART_BITRATE 218 | 219 | #define UART_RX_BUF_SZ (1024 * CONFIG_UART_RX_BUFF_SIZE) 220 | #define UART_TX_BUF_SZ (1024 * CONFIG_UART_TX_BUFF_SIZE) 221 | 222 | static esp_err_t bridge_uart_init(void) 223 | { 224 | /* Configure UART */ 225 | uart_config_t uart_config = { 226 | .baud_rate = CONFIG_UART_BITRATE, 227 | .data_bits = UART_DATA_8_BITS, 228 | .parity = UART_PARITY_DISABLE, 229 | .stop_bits = UART_STOP_BITS_1, 230 | .flow_ctrl = UART_FLOWCTRL, 231 | .rx_flow_ctrl_thresh = UART_HW_FIFO_LEN(UART_NUM_1) - 16 232 | }; 233 | 234 | ESP_RETURN_ON_ERROR(uart_param_config(UART_NUM_1, &uart_config), TAG, "uart_param_config failed"); 235 | ESP_RETURN_ON_ERROR(uart_set_pin(UART_NUM_1, UART_TX_GPIO, UART_RX_GPIO, UART_RTS_GPIO, UART_CTS_GPIO), TAG, "uart_set_pin failed"); 236 | ESP_RETURN_ON_ERROR(uart_driver_install(UART_NUM_1, UART_RX_BUF_SZ, UART_TX_BUF_SZ, 0, NULL, 0), TAG, "uart_driver_install failed"); 237 | 238 | gpio_set_level(CONFIG_BRIDGE_LED_GPIO, 0); 239 | gpio_set_direction(CONFIG_BRIDGE_LED_GPIO, GPIO_MODE_OUTPUT); 240 | 241 | return ESP_OK; 242 | } 243 | 244 | static struct server_port echo_server = {.port = CONFIG_ECHO_PORT, .handler = do_echo}; 245 | static struct server_port bridge_server = {.port = CONFIG_BRIDGE_PORT, .handler = do_bridge, .uart = UART_NUM_1}; 246 | 247 | void tcp_server_create(void) 248 | { 249 | ESP_ERROR_CHECK(bridge_uart_init()); 250 | xTaskCreate(tcp_server_task, "echo_server", 4096, (void*)&echo_server, 5, NULL); 251 | xTaskCreate(tcp_server_task, "bridge_server", 4096, (void*)&bridge_server, 5, NULL); 252 | } 253 | -------------------------------------------------------------------------------- /src/main/tcp_server.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void tcp_server_create(void); 4 | -------------------------------------------------------------------------------- /src/sdkconfig: -------------------------------------------------------------------------------- 1 | # 2 | # Automatically generated file. DO NOT EDIT. 3 | # Espressif IoT Development Framework (ESP-IDF) 5.2.1 Project Configuration 4 | # 5 | CONFIG_SOC_BROWNOUT_RESET_SUPPORTED="Not determined" 6 | CONFIG_SOC_TWAI_BRP_DIV_SUPPORTED="Not determined" 7 | CONFIG_SOC_DPORT_WORKAROUND="Not determined" 8 | CONFIG_SOC_CAPS_ECO_VER_MAX=301 9 | CONFIG_SOC_ADC_SUPPORTED=y 10 | CONFIG_SOC_DAC_SUPPORTED=y 11 | CONFIG_SOC_UART_SUPPORTED=y 12 | CONFIG_SOC_MCPWM_SUPPORTED=y 13 | CONFIG_SOC_GPTIMER_SUPPORTED=y 14 | CONFIG_SOC_SDMMC_HOST_SUPPORTED=y 15 | CONFIG_SOC_BT_SUPPORTED=y 16 | CONFIG_SOC_PCNT_SUPPORTED=y 17 | CONFIG_SOC_WIFI_SUPPORTED=y 18 | CONFIG_SOC_SDIO_SLAVE_SUPPORTED=y 19 | CONFIG_SOC_TWAI_SUPPORTED=y 20 | CONFIG_SOC_EFUSE_SUPPORTED=y 21 | CONFIG_SOC_EMAC_SUPPORTED=y 22 | CONFIG_SOC_ULP_SUPPORTED=y 23 | CONFIG_SOC_CCOMP_TIMER_SUPPORTED=y 24 | CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y 25 | CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED=y 26 | CONFIG_SOC_RTC_MEM_SUPPORTED=y 27 | CONFIG_SOC_I2S_SUPPORTED=y 28 | CONFIG_SOC_RMT_SUPPORTED=y 29 | CONFIG_SOC_SDM_SUPPORTED=y 30 | CONFIG_SOC_GPSPI_SUPPORTED=y 31 | CONFIG_SOC_LEDC_SUPPORTED=y 32 | CONFIG_SOC_I2C_SUPPORTED=y 33 | CONFIG_SOC_SUPPORT_COEXISTENCE=y 34 | CONFIG_SOC_AES_SUPPORTED=y 35 | CONFIG_SOC_MPI_SUPPORTED=y 36 | CONFIG_SOC_SHA_SUPPORTED=y 37 | CONFIG_SOC_FLASH_ENC_SUPPORTED=y 38 | CONFIG_SOC_SECURE_BOOT_SUPPORTED=y 39 | CONFIG_SOC_TOUCH_SENSOR_SUPPORTED=y 40 | CONFIG_SOC_BOD_SUPPORTED=y 41 | CONFIG_SOC_ULP_FSM_SUPPORTED=y 42 | CONFIG_SOC_CLK_TREE_SUPPORTED=y 43 | CONFIG_SOC_MPU_SUPPORTED=y 44 | CONFIG_SOC_WDT_SUPPORTED=y 45 | CONFIG_SOC_SPI_FLASH_SUPPORTED=y 46 | CONFIG_SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL=5 47 | CONFIG_SOC_XTAL_SUPPORT_26M=y 48 | CONFIG_SOC_XTAL_SUPPORT_40M=y 49 | CONFIG_SOC_XTAL_SUPPORT_AUTO_DETECT=y 50 | CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y 51 | CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y 52 | CONFIG_SOC_ADC_DMA_SUPPORTED=y 53 | CONFIG_SOC_ADC_PERIPH_NUM=2 54 | CONFIG_SOC_ADC_MAX_CHANNEL_NUM=10 55 | CONFIG_SOC_ADC_ATTEN_NUM=4 56 | CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=2 57 | CONFIG_SOC_ADC_PATT_LEN_MAX=16 58 | CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=9 59 | CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12 60 | CONFIG_SOC_ADC_DIGI_RESULT_BYTES=2 61 | CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV=4 62 | CONFIG_SOC_ADC_DIGI_MONITOR_NUM=0 63 | CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH=2 64 | CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW=20 65 | CONFIG_SOC_ADC_RTC_MIN_BITWIDTH=9 66 | CONFIG_SOC_ADC_RTC_MAX_BITWIDTH=12 67 | CONFIG_SOC_ADC_SHARED_POWER=y 68 | CONFIG_SOC_SHARED_IDCACHE_SUPPORTED=y 69 | CONFIG_SOC_IDCACHE_PER_CORE=y 70 | CONFIG_SOC_CPU_CORES_NUM=2 71 | CONFIG_SOC_CPU_INTR_NUM=32 72 | CONFIG_SOC_CPU_HAS_FPU=y 73 | CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES=y 74 | CONFIG_SOC_CPU_BREAKPOINTS_NUM=2 75 | CONFIG_SOC_CPU_WATCHPOINTS_NUM=2 76 | CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=64 77 | CONFIG_SOC_DAC_CHAN_NUM=2 78 | CONFIG_SOC_DAC_RESOLUTION=8 79 | CONFIG_SOC_DAC_DMA_16BIT_ALIGN=y 80 | CONFIG_SOC_GPIO_PORT=1 81 | CONFIG_SOC_GPIO_PIN_COUNT=40 82 | CONFIG_SOC_GPIO_VALID_GPIO_MASK=0xFFFFFFFFFF 83 | CONFIG_SOC_GPIO_IN_RANGE_MAX=39 84 | CONFIG_SOC_GPIO_OUT_RANGE_MAX=33 85 | CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0xEF0FEA 86 | CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX=y 87 | CONFIG_SOC_I2C_NUM=2 88 | CONFIG_SOC_I2C_FIFO_LEN=32 89 | CONFIG_SOC_I2C_CMD_REG_NUM=16 90 | CONFIG_SOC_I2C_SUPPORT_SLAVE=y 91 | CONFIG_SOC_I2C_SUPPORT_APB=y 92 | CONFIG_SOC_I2C_STOP_INDEPENDENT=y 93 | CONFIG_SOC_I2S_NUM=2 94 | CONFIG_SOC_I2S_HW_VERSION_1=y 95 | CONFIG_SOC_I2S_SUPPORTS_APLL=y 96 | CONFIG_SOC_I2S_SUPPORTS_PLL_F160M=y 97 | CONFIG_SOC_I2S_SUPPORTS_PDM=y 98 | CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y 99 | CONFIG_SOC_I2S_PDM_MAX_TX_LINES=1 100 | CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y 101 | CONFIG_SOC_I2S_PDM_MAX_RX_LINES=1 102 | CONFIG_SOC_I2S_SUPPORTS_ADC_DAC=y 103 | CONFIG_SOC_I2S_SUPPORTS_ADC=y 104 | CONFIG_SOC_I2S_SUPPORTS_DAC=y 105 | CONFIG_SOC_I2S_SUPPORTS_LCD_CAMERA=y 106 | CONFIG_SOC_I2S_TRANS_SIZE_ALIGN_WORD=y 107 | CONFIG_SOC_I2S_LCD_I80_VARIANT=y 108 | CONFIG_SOC_LCD_I80_SUPPORTED=y 109 | CONFIG_SOC_LCD_I80_BUSES=2 110 | CONFIG_SOC_LCD_I80_BUS_WIDTH=24 111 | CONFIG_SOC_LEDC_HAS_TIMER_SPECIFIC_MUX=y 112 | CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK=y 113 | CONFIG_SOC_LEDC_SUPPORT_REF_TICK=y 114 | CONFIG_SOC_LEDC_SUPPORT_HS_MODE=y 115 | CONFIG_SOC_LEDC_CHANNEL_NUM=8 116 | CONFIG_SOC_LEDC_TIMER_BIT_WIDTH=20 117 | CONFIG_SOC_MCPWM_GROUPS=2 118 | CONFIG_SOC_MCPWM_TIMERS_PER_GROUP=3 119 | CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP=3 120 | CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR=2 121 | CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR=2 122 | CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR=2 123 | CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP=3 124 | CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP=y 125 | CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER=3 126 | CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP=3 127 | CONFIG_SOC_MMU_PERIPH_NUM=2 128 | CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM=3 129 | CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000 130 | CONFIG_SOC_MPU_REGIONS_MAX_NUM=8 131 | CONFIG_SOC_PCNT_GROUPS=1 132 | CONFIG_SOC_PCNT_UNITS_PER_GROUP=8 133 | CONFIG_SOC_PCNT_CHANNELS_PER_UNIT=2 134 | CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT=2 135 | CONFIG_SOC_RMT_GROUPS=1 136 | CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP=8 137 | CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP=8 138 | CONFIG_SOC_RMT_CHANNELS_PER_GROUP=8 139 | CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=64 140 | CONFIG_SOC_RMT_SUPPORT_REF_TICK=y 141 | CONFIG_SOC_RMT_SUPPORT_APB=y 142 | CONFIG_SOC_RMT_CHANNEL_CLK_INDEPENDENT=y 143 | CONFIG_SOC_RTCIO_PIN_COUNT=18 144 | CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y 145 | CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y 146 | CONFIG_SOC_RTCIO_WAKE_SUPPORTED=y 147 | CONFIG_SOC_SDM_GROUPS=1 148 | CONFIG_SOC_SDM_CHANNELS_PER_GROUP=8 149 | CONFIG_SOC_SDM_CLK_SUPPORT_APB=y 150 | CONFIG_SOC_SPI_HD_BOTH_INOUT_SUPPORTED=y 151 | CONFIG_SOC_SPI_AS_CS_SUPPORTED=y 152 | CONFIG_SOC_SPI_PERIPH_NUM=3 153 | CONFIG_SOC_SPI_DMA_CHAN_NUM=2 154 | CONFIG_SOC_SPI_MAX_CS_NUM=3 155 | CONFIG_SOC_SPI_SUPPORT_CLK_APB=y 156 | CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64 157 | CONFIG_SOC_SPI_MAX_PRE_DIVIDER=8192 158 | CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y 159 | CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED=y 160 | CONFIG_SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED=y 161 | CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED=y 162 | CONFIG_SOC_TIMER_GROUPS=2 163 | CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP=2 164 | CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH=64 165 | CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS=4 166 | CONFIG_SOC_TIMER_GROUP_SUPPORT_APB=y 167 | CONFIG_SOC_TOUCH_VERSION_1=y 168 | CONFIG_SOC_TOUCH_SENSOR_NUM=10 169 | CONFIG_SOC_TOUCH_PAD_MEASURE_WAIT_MAX=0xFF 170 | CONFIG_SOC_TWAI_CONTROLLER_NUM=1 171 | CONFIG_SOC_TWAI_BRP_MIN=2 172 | CONFIG_SOC_TWAI_CLK_SUPPORT_APB=y 173 | CONFIG_SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT=y 174 | CONFIG_SOC_UART_NUM=3 175 | CONFIG_SOC_UART_HP_NUM=3 176 | CONFIG_SOC_UART_SUPPORT_APB_CLK=y 177 | CONFIG_SOC_UART_SUPPORT_REF_TICK=y 178 | CONFIG_SOC_UART_FIFO_LEN=128 179 | CONFIG_SOC_UART_BITRATE_MAX=5000000 180 | CONFIG_SOC_SPIRAM_SUPPORTED=y 181 | CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE=y 182 | CONFIG_SOC_SHA_SUPPORT_PARALLEL_ENG=y 183 | CONFIG_SOC_SHA_ENDIANNESS_BE=y 184 | CONFIG_SOC_SHA_SUPPORT_SHA1=y 185 | CONFIG_SOC_SHA_SUPPORT_SHA256=y 186 | CONFIG_SOC_SHA_SUPPORT_SHA384=y 187 | CONFIG_SOC_SHA_SUPPORT_SHA512=y 188 | CONFIG_SOC_MPI_MEM_BLOCKS_NUM=4 189 | CONFIG_SOC_MPI_OPERATIONS_NUM=y 190 | CONFIG_SOC_RSA_MAX_BIT_LEN=4096 191 | CONFIG_SOC_AES_SUPPORT_AES_128=y 192 | CONFIG_SOC_AES_SUPPORT_AES_192=y 193 | CONFIG_SOC_AES_SUPPORT_AES_256=y 194 | CONFIG_SOC_SECURE_BOOT_V1=y 195 | CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=y 196 | CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=32 197 | CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21 198 | CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP=y 199 | CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP=y 200 | CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP=y 201 | CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y 202 | CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD=y 203 | CONFIG_SOC_PM_SUPPORT_RTC_FAST_MEM_PD=y 204 | CONFIG_SOC_PM_SUPPORT_RTC_SLOW_MEM_PD=y 205 | CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y 206 | CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD=y 207 | CONFIG_SOC_PM_SUPPORT_MODEM_PD=y 208 | CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED=y 209 | CONFIG_SOC_CLK_APLL_SUPPORTED=y 210 | CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED=y 211 | CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256=y 212 | CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y 213 | CONFIG_SOC_CLK_XTAL32K_SUPPORTED=y 214 | CONFIG_SOC_SDMMC_USE_IOMUX=y 215 | CONFIG_SOC_SDMMC_NUM_SLOTS=2 216 | CONFIG_SOC_WIFI_WAPI_SUPPORT=y 217 | CONFIG_SOC_WIFI_CSI_SUPPORT=y 218 | CONFIG_SOC_WIFI_MESH_SUPPORT=y 219 | CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW=y 220 | CONFIG_SOC_WIFI_NAN_SUPPORT=y 221 | CONFIG_SOC_BLE_SUPPORTED=y 222 | CONFIG_SOC_BLE_MESH_SUPPORTED=y 223 | CONFIG_SOC_BT_CLASSIC_SUPPORTED=y 224 | CONFIG_SOC_BLUFI_SUPPORTED=y 225 | CONFIG_SOC_ULP_HAS_ADC=y 226 | CONFIG_SOC_PHY_COMBO_MODULE=y 227 | CONFIG_IDF_CMAKE=y 228 | CONFIG_IDF_TOOLCHAIN="gcc" 229 | CONFIG_IDF_TARGET_ARCH_XTENSA=y 230 | CONFIG_IDF_TARGET_ARCH="xtensa" 231 | CONFIG_IDF_TARGET="esp32" 232 | CONFIG_IDF_INIT_VERSION="5.2.1" 233 | CONFIG_IDF_TARGET_ESP32=y 234 | CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 235 | 236 | # 237 | # Build type 238 | # 239 | CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y 240 | # CONFIG_APP_BUILD_TYPE_RAM is not set 241 | CONFIG_APP_BUILD_GENERATE_BINARIES=y 242 | CONFIG_APP_BUILD_BOOTLOADER=y 243 | CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y 244 | # CONFIG_APP_REPRODUCIBLE_BUILD is not set 245 | # CONFIG_APP_NO_BLOBS is not set 246 | # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set 247 | # CONFIG_APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set 248 | # end of Build type 249 | 250 | # 251 | # Bootloader config 252 | # 253 | 254 | # 255 | # Bootloader manager 256 | # 257 | CONFIG_BOOTLOADER_COMPILE_TIME_DATE=y 258 | CONFIG_BOOTLOADER_PROJECT_VER=1 259 | # end of Bootloader manager 260 | 261 | CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000 262 | CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y 263 | # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set 264 | # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set 265 | # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set 266 | # CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set 267 | # CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set 268 | # CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set 269 | CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y 270 | # CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set 271 | # CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set 272 | CONFIG_BOOTLOADER_LOG_LEVEL=3 273 | 274 | # 275 | # Serial Flash Configurations 276 | # 277 | # CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set 278 | CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y 279 | # end of Serial Flash Configurations 280 | 281 | # CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set 282 | CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y 283 | # CONFIG_BOOTLOADER_FACTORY_RESET is not set 284 | # CONFIG_BOOTLOADER_APP_TEST is not set 285 | CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y 286 | CONFIG_BOOTLOADER_WDT_ENABLE=y 287 | # CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set 288 | CONFIG_BOOTLOADER_WDT_TIME_MS=9000 289 | # CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set 290 | # CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set 291 | # CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set 292 | # CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set 293 | CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 294 | # CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set 295 | # end of Bootloader config 296 | 297 | # 298 | # Security features 299 | # 300 | CONFIG_SECURE_BOOT_V1_SUPPORTED=y 301 | # CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set 302 | # CONFIG_SECURE_BOOT is not set 303 | # CONFIG_SECURE_FLASH_ENC_ENABLED is not set 304 | # end of Security features 305 | 306 | # 307 | # Application manager 308 | # 309 | CONFIG_APP_COMPILE_TIME_DATE=y 310 | # CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set 311 | # CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set 312 | # CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set 313 | CONFIG_APP_RETRIEVE_LEN_ELF_SHA=9 314 | # end of Application manager 315 | 316 | CONFIG_ESP_ROM_HAS_CRC_LE=y 317 | CONFIG_ESP_ROM_HAS_CRC_BE=y 318 | CONFIG_ESP_ROM_HAS_MZ_CRC32=y 319 | CONFIG_ESP_ROM_HAS_JPEG_DECODE=y 320 | CONFIG_ESP_ROM_HAS_UART_BUF_SWITCH=y 321 | CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND=y 322 | CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT=y 323 | CONFIG_ESP_ROM_HAS_SW_FLOAT=y 324 | CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM=-1 325 | 326 | # 327 | # Serial flasher config 328 | # 329 | # CONFIG_ESPTOOLPY_NO_STUB is not set 330 | # CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set 331 | # CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set 332 | CONFIG_ESPTOOLPY_FLASHMODE_DIO=y 333 | # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set 334 | CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y 335 | CONFIG_ESPTOOLPY_FLASHMODE="dio" 336 | # CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set 337 | CONFIG_ESPTOOLPY_FLASHFREQ_40M=y 338 | # CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set 339 | # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set 340 | CONFIG_ESPTOOLPY_FLASHFREQ="40m" 341 | # CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set 342 | CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y 343 | # CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set 344 | # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set 345 | # CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set 346 | # CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set 347 | # CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set 348 | # CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set 349 | CONFIG_ESPTOOLPY_FLASHSIZE="2MB" 350 | # CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set 351 | CONFIG_ESPTOOLPY_BEFORE_RESET=y 352 | # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set 353 | CONFIG_ESPTOOLPY_BEFORE="default_reset" 354 | CONFIG_ESPTOOLPY_AFTER_RESET=y 355 | # CONFIG_ESPTOOLPY_AFTER_NORESET is not set 356 | CONFIG_ESPTOOLPY_AFTER="hard_reset" 357 | CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 358 | # end of Serial flasher config 359 | 360 | # 361 | # Partition Table 362 | # 363 | CONFIG_PARTITION_TABLE_SINGLE_APP=y 364 | # CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set 365 | # CONFIG_PARTITION_TABLE_TWO_OTA is not set 366 | # CONFIG_PARTITION_TABLE_CUSTOM is not set 367 | CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" 368 | CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" 369 | CONFIG_PARTITION_TABLE_OFFSET=0x8000 370 | CONFIG_PARTITION_TABLE_MD5=y 371 | # end of Partition Table 372 | 373 | # 374 | # Eth-UART Bridge Configuration 375 | # 376 | CONFIG_HAS_CLK_EN_PIN=y 377 | CONFIG_CLK_EN_GPIO=16 378 | CONFIG_BRIDGE_PORT=3142 379 | CONFIG_ECHO_PORT=3333 380 | CONFIG_EXAMPLE_KEEPALIVE_IDLE=5 381 | CONFIG_EXAMPLE_KEEPALIVE_INTERVAL=5 382 | CONFIG_EXAMPLE_KEEPALIVE_COUNT=3 383 | CONFIG_UART_TX_GPIO=4 384 | CONFIG_UART_RX_GPIO=35 385 | CONFIG_UART_RTS_GPIO=15 386 | # CONFIG_UART_CTS_EN is not set 387 | CONFIG_BRIDGE_LED_GPIO=2 388 | CONFIG_UART_BITRATE=921600 389 | CONFIG_UART_TX_BUFF_SIZE=17 390 | CONFIG_UART_RX_BUFF_SIZE=17 391 | # end of Eth-UART Bridge Configuration 392 | 393 | # 394 | # Ethernet Configuration 395 | # 396 | CONFIG_ENV_GPIO_RANGE_MIN=0 397 | CONFIG_ENV_GPIO_RANGE_MAX=39 398 | CONFIG_ENV_GPIO_IN_RANGE_MAX=39 399 | CONFIG_ENV_GPIO_OUT_RANGE_MAX=33 400 | CONFIG_EXAMPLE_USE_INTERNAL_ETHERNET=y 401 | # CONFIG_EXAMPLE_ETH_PHY_IP101 is not set 402 | # CONFIG_EXAMPLE_ETH_PHY_RTL8201 is not set 403 | CONFIG_EXAMPLE_ETH_PHY_LAN87XX=y 404 | # CONFIG_EXAMPLE_ETH_PHY_DP83848 is not set 405 | # CONFIG_EXAMPLE_ETH_PHY_KSZ80XX is not set 406 | CONFIG_EXAMPLE_ETH_MDC_GPIO=23 407 | CONFIG_EXAMPLE_ETH_MDIO_GPIO=18 408 | CONFIG_EXAMPLE_ETH_PHY_RST_GPIO=5 409 | CONFIG_EXAMPLE_ETH_PHY_ADDR=1 410 | # CONFIG_EXAMPLE_USE_SPI_ETHERNET is not set 411 | # end of Ethernet Configuration 412 | 413 | # 414 | # Compiler options 415 | # 416 | CONFIG_COMPILER_OPTIMIZATION_DEBUG=y 417 | # CONFIG_COMPILER_OPTIMIZATION_SIZE is not set 418 | # CONFIG_COMPILER_OPTIMIZATION_PERF is not set 419 | # CONFIG_COMPILER_OPTIMIZATION_NONE is not set 420 | CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y 421 | # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set 422 | # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set 423 | CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB=y 424 | CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2 425 | # CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set 426 | CONFIG_COMPILER_HIDE_PATHS_MACROS=y 427 | # CONFIG_COMPILER_CXX_EXCEPTIONS is not set 428 | # CONFIG_COMPILER_CXX_RTTI is not set 429 | CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y 430 | # CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set 431 | # CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set 432 | # CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set 433 | # CONFIG_COMPILER_WARN_WRITE_STRINGS is not set 434 | # CONFIG_COMPILER_DISABLE_GCC12_WARNINGS is not set 435 | # CONFIG_COMPILER_DISABLE_GCC13_WARNINGS is not set 436 | # CONFIG_COMPILER_DUMP_RTL_FILES is not set 437 | CONFIG_COMPILER_RT_LIB_GCCLIB=y 438 | CONFIG_COMPILER_RT_LIB_NAME="gcc" 439 | # end of Compiler options 440 | 441 | # 442 | # Component config 443 | # 444 | 445 | # 446 | # Application Level Tracing 447 | # 448 | # CONFIG_APPTRACE_DEST_JTAG is not set 449 | CONFIG_APPTRACE_DEST_NONE=y 450 | # CONFIG_APPTRACE_DEST_UART1 is not set 451 | # CONFIG_APPTRACE_DEST_UART2 is not set 452 | CONFIG_APPTRACE_DEST_UART_NONE=y 453 | CONFIG_APPTRACE_UART_TASK_PRIO=1 454 | CONFIG_APPTRACE_LOCK_ENABLE=y 455 | # end of Application Level Tracing 456 | 457 | # 458 | # Bluetooth 459 | # 460 | # CONFIG_BT_ENABLED is not set 461 | # end of Bluetooth 462 | 463 | # 464 | # Driver Configurations 465 | # 466 | 467 | # 468 | # Legacy ADC Configuration 469 | # 470 | CONFIG_ADC_DISABLE_DAC=y 471 | # CONFIG_ADC_SUPPRESS_DEPRECATE_WARN is not set 472 | 473 | # 474 | # Legacy ADC Calibration Configuration 475 | # 476 | CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y 477 | CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y 478 | CONFIG_ADC_CAL_LUT_ENABLE=y 479 | # CONFIG_ADC_CALI_SUPPRESS_DEPRECATE_WARN is not set 480 | # end of Legacy ADC Calibration Configuration 481 | # end of Legacy ADC Configuration 482 | 483 | # 484 | # SPI Configuration 485 | # 486 | # CONFIG_SPI_MASTER_IN_IRAM is not set 487 | CONFIG_SPI_MASTER_ISR_IN_IRAM=y 488 | # CONFIG_SPI_SLAVE_IN_IRAM is not set 489 | CONFIG_SPI_SLAVE_ISR_IN_IRAM=y 490 | # end of SPI Configuration 491 | 492 | # 493 | # TWAI Configuration 494 | # 495 | # CONFIG_TWAI_ISR_IN_IRAM is not set 496 | CONFIG_TWAI_ERRATA_FIX_BUS_OFF_REC=y 497 | CONFIG_TWAI_ERRATA_FIX_TX_INTR_LOST=y 498 | CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID=y 499 | CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT=y 500 | CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM=y 501 | # end of TWAI Configuration 502 | 503 | # 504 | # UART Configuration 505 | # 506 | # CONFIG_UART_ISR_IN_IRAM is not set 507 | # end of UART Configuration 508 | 509 | # 510 | # GPIO Configuration 511 | # 512 | # CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL is not set 513 | # CONFIG_GPIO_CTRL_FUNC_IN_IRAM is not set 514 | # end of GPIO Configuration 515 | 516 | # 517 | # Sigma Delta Modulator Configuration 518 | # 519 | # CONFIG_SDM_CTRL_FUNC_IN_IRAM is not set 520 | # CONFIG_SDM_SUPPRESS_DEPRECATE_WARN is not set 521 | # CONFIG_SDM_ENABLE_DEBUG_LOG is not set 522 | # end of Sigma Delta Modulator Configuration 523 | 524 | # 525 | # GPTimer Configuration 526 | # 527 | CONFIG_GPTIMER_ISR_HANDLER_IN_IRAM=y 528 | # CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM is not set 529 | # CONFIG_GPTIMER_ISR_IRAM_SAFE is not set 530 | # CONFIG_GPTIMER_SUPPRESS_DEPRECATE_WARN is not set 531 | # CONFIG_GPTIMER_ENABLE_DEBUG_LOG is not set 532 | # end of GPTimer Configuration 533 | 534 | # 535 | # PCNT Configuration 536 | # 537 | # CONFIG_PCNT_CTRL_FUNC_IN_IRAM is not set 538 | # CONFIG_PCNT_ISR_IRAM_SAFE is not set 539 | # CONFIG_PCNT_SUPPRESS_DEPRECATE_WARN is not set 540 | # CONFIG_PCNT_ENABLE_DEBUG_LOG is not set 541 | # end of PCNT Configuration 542 | 543 | # 544 | # RMT Configuration 545 | # 546 | # CONFIG_RMT_ISR_IRAM_SAFE is not set 547 | # CONFIG_RMT_RECV_FUNC_IN_IRAM is not set 548 | # CONFIG_RMT_SUPPRESS_DEPRECATE_WARN is not set 549 | # CONFIG_RMT_ENABLE_DEBUG_LOG is not set 550 | # end of RMT Configuration 551 | 552 | # 553 | # MCPWM Configuration 554 | # 555 | # CONFIG_MCPWM_ISR_IRAM_SAFE is not set 556 | # CONFIG_MCPWM_CTRL_FUNC_IN_IRAM is not set 557 | # CONFIG_MCPWM_SUPPRESS_DEPRECATE_WARN is not set 558 | # CONFIG_MCPWM_ENABLE_DEBUG_LOG is not set 559 | # end of MCPWM Configuration 560 | 561 | # 562 | # I2S Configuration 563 | # 564 | # CONFIG_I2S_ISR_IRAM_SAFE is not set 565 | # CONFIG_I2S_SUPPRESS_DEPRECATE_WARN is not set 566 | # CONFIG_I2S_ENABLE_DEBUG_LOG is not set 567 | # end of I2S Configuration 568 | 569 | # 570 | # DAC Configuration 571 | # 572 | # CONFIG_DAC_CTRL_FUNC_IN_IRAM is not set 573 | # CONFIG_DAC_ISR_IRAM_SAFE is not set 574 | # CONFIG_DAC_SUPPRESS_DEPRECATE_WARN is not set 575 | # CONFIG_DAC_ENABLE_DEBUG_LOG is not set 576 | CONFIG_DAC_DMA_AUTO_16BIT_ALIGN=y 577 | # end of DAC Configuration 578 | 579 | # 580 | # LEDC Configuration 581 | # 582 | # CONFIG_LEDC_CTRL_FUNC_IN_IRAM is not set 583 | # end of LEDC Configuration 584 | 585 | # 586 | # I2C Configuration 587 | # 588 | # CONFIG_I2C_ISR_IRAM_SAFE is not set 589 | # CONFIG_I2C_ENABLE_DEBUG_LOG is not set 590 | # end of I2C Configuration 591 | # end of Driver Configurations 592 | 593 | # 594 | # eFuse Bit Manager 595 | # 596 | # CONFIG_EFUSE_CUSTOM_TABLE is not set 597 | # CONFIG_EFUSE_VIRTUAL is not set 598 | # CONFIG_EFUSE_CODE_SCHEME_COMPAT_NONE is not set 599 | CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4=y 600 | # CONFIG_EFUSE_CODE_SCHEME_COMPAT_REPEAT is not set 601 | CONFIG_EFUSE_MAX_BLK_LEN=192 602 | # end of eFuse Bit Manager 603 | 604 | # 605 | # ESP-TLS 606 | # 607 | CONFIG_ESP_TLS_USING_MBEDTLS=y 608 | # CONFIG_ESP_TLS_USE_SECURE_ELEMENT is not set 609 | # CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set 610 | # CONFIG_ESP_TLS_SERVER is not set 611 | # CONFIG_ESP_TLS_PSK_VERIFICATION is not set 612 | # CONFIG_ESP_TLS_INSECURE is not set 613 | # end of ESP-TLS 614 | 615 | # 616 | # ADC and ADC Calibration 617 | # 618 | # CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM is not set 619 | # CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE is not set 620 | 621 | # 622 | # ADC Calibration Configurations 623 | # 624 | CONFIG_ADC_CALI_EFUSE_TP_ENABLE=y 625 | CONFIG_ADC_CALI_EFUSE_VREF_ENABLE=y 626 | CONFIG_ADC_CALI_LUT_ENABLE=y 627 | # end of ADC Calibration Configurations 628 | 629 | CONFIG_ADC_DISABLE_DAC_OUTPUT=y 630 | # end of ADC and ADC Calibration 631 | 632 | # 633 | # Wireless Coexistence 634 | # 635 | # end of Wireless Coexistence 636 | 637 | # 638 | # Common ESP-related 639 | # 640 | CONFIG_ESP_ERR_TO_NAME_LOOKUP=y 641 | # end of Common ESP-related 642 | 643 | # 644 | # Ethernet 645 | # 646 | CONFIG_ETH_ENABLED=y 647 | CONFIG_ETH_USE_ESP32_EMAC=y 648 | CONFIG_ETH_PHY_INTERFACE_RMII=y 649 | CONFIG_ETH_RMII_CLK_INPUT=y 650 | # CONFIG_ETH_RMII_CLK_OUTPUT is not set 651 | CONFIG_ETH_RMII_CLK_IN_GPIO=0 652 | CONFIG_ETH_DMA_BUFFER_SIZE=512 653 | CONFIG_ETH_DMA_RX_BUFFER_NUM=10 654 | CONFIG_ETH_DMA_TX_BUFFER_NUM=10 655 | # CONFIG_ETH_IRAM_OPTIMIZATION is not set 656 | CONFIG_ETH_USE_SPI_ETHERNET=y 657 | # CONFIG_ETH_SPI_ETHERNET_DM9051 is not set 658 | # CONFIG_ETH_SPI_ETHERNET_W5500 is not set 659 | # CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL is not set 660 | # CONFIG_ETH_USE_OPENETH is not set 661 | # CONFIG_ETH_TRANSMIT_MUTEX is not set 662 | # end of Ethernet 663 | 664 | # 665 | # Event Loop Library 666 | # 667 | # CONFIG_ESP_EVENT_LOOP_PROFILING is not set 668 | CONFIG_ESP_EVENT_POST_FROM_ISR=y 669 | CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y 670 | # end of Event Loop Library 671 | 672 | # 673 | # GDB Stub 674 | # 675 | # CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set 676 | # end of GDB Stub 677 | 678 | # 679 | # ESP HTTP client 680 | # 681 | CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y 682 | # CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set 683 | # CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH is not set 684 | # end of ESP HTTP client 685 | 686 | # 687 | # HTTP Server 688 | # 689 | CONFIG_HTTPD_MAX_REQ_HDR_LEN=512 690 | CONFIG_HTTPD_MAX_URI_LEN=512 691 | CONFIG_HTTPD_ERR_RESP_NO_DELAY=y 692 | CONFIG_HTTPD_PURGE_BUF_LEN=32 693 | # CONFIG_HTTPD_LOG_PURGE_DATA is not set 694 | # CONFIG_HTTPD_WS_SUPPORT is not set 695 | # CONFIG_HTTPD_QUEUE_WORK_BLOCKING is not set 696 | # end of HTTP Server 697 | 698 | # 699 | # ESP HTTPS OTA 700 | # 701 | # CONFIG_ESP_HTTPS_OTA_DECRYPT_CB is not set 702 | # CONFIG_ESP_HTTPS_OTA_ALLOW_HTTP is not set 703 | # end of ESP HTTPS OTA 704 | 705 | # 706 | # ESP HTTPS server 707 | # 708 | # CONFIG_ESP_HTTPS_SERVER_ENABLE is not set 709 | # end of ESP HTTPS server 710 | 711 | # 712 | # Hardware Settings 713 | # 714 | 715 | # 716 | # Chip revision 717 | # 718 | CONFIG_ESP32_REV_MIN_0=y 719 | # CONFIG_ESP32_REV_MIN_1 is not set 720 | # CONFIG_ESP32_REV_MIN_1_1 is not set 721 | # CONFIG_ESP32_REV_MIN_2 is not set 722 | # CONFIG_ESP32_REV_MIN_3 is not set 723 | # CONFIG_ESP32_REV_MIN_3_1 is not set 724 | CONFIG_ESP32_REV_MIN=0 725 | CONFIG_ESP32_REV_MIN_FULL=0 726 | CONFIG_ESP_REV_MIN_FULL=0 727 | 728 | # 729 | # Maximum Supported ESP32 Revision (Rev v3.99) 730 | # 731 | CONFIG_ESP32_REV_MAX_FULL=399 732 | CONFIG_ESP_REV_MAX_FULL=399 733 | # end of Chip revision 734 | 735 | # 736 | # MAC Config 737 | # 738 | CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y 739 | CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y 740 | CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y 741 | CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y 742 | CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR=y 743 | # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set 744 | CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y 745 | CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 746 | # CONFIG_ESP_MAC_IGNORE_MAC_CRC_ERROR is not set 747 | # CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC is not set 748 | # end of MAC Config 749 | 750 | # 751 | # Sleep Config 752 | # 753 | # CONFIG_ESP_SLEEP_POWER_DOWN_FLASH is not set 754 | CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y 755 | # CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU is not set 756 | CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y 757 | # CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND is not set 758 | CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=2000 759 | # CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION is not set 760 | # CONFIG_ESP_SLEEP_DEBUG is not set 761 | CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS=y 762 | # end of Sleep Config 763 | 764 | # 765 | # RTC Clock Config 766 | # 767 | CONFIG_RTC_CLK_SRC_INT_RC=y 768 | # CONFIG_RTC_CLK_SRC_EXT_CRYS is not set 769 | # CONFIG_RTC_CLK_SRC_EXT_OSC is not set 770 | # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set 771 | CONFIG_RTC_CLK_CAL_CYCLES=1024 772 | # end of RTC Clock Config 773 | 774 | # 775 | # Peripheral Control 776 | # 777 | CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=y 778 | # end of Peripheral Control 779 | 780 | # 781 | # Main XTAL Config 782 | # 783 | # CONFIG_XTAL_FREQ_26 is not set 784 | CONFIG_XTAL_FREQ_40=y 785 | # CONFIG_XTAL_FREQ_AUTO is not set 786 | CONFIG_XTAL_FREQ=40 787 | # end of Main XTAL Config 788 | # end of Hardware Settings 789 | 790 | # 791 | # LCD and Touch Panel 792 | # 793 | 794 | # 795 | # LCD Touch Drivers are maintained in the IDF Component Registry 796 | # 797 | 798 | # 799 | # LCD Peripheral Configuration 800 | # 801 | CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE=32 802 | # CONFIG_LCD_ENABLE_DEBUG_LOG is not set 803 | # end of LCD Peripheral Configuration 804 | # end of LCD and Touch Panel 805 | 806 | # 807 | # ESP NETIF Adapter 808 | # 809 | CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 810 | CONFIG_ESP_NETIF_TCPIP_LWIP=y 811 | # CONFIG_ESP_NETIF_LOOPBACK is not set 812 | CONFIG_ESP_NETIF_USES_TCPIP_WITH_BSD_API=y 813 | # CONFIG_ESP_NETIF_RECEIVE_REPORT_ERRORS is not set 814 | # CONFIG_ESP_NETIF_L2_TAP is not set 815 | # CONFIG_ESP_NETIF_BRIDGE_EN is not set 816 | # end of ESP NETIF Adapter 817 | 818 | # 819 | # Partition API Configuration 820 | # 821 | # end of Partition API Configuration 822 | 823 | # 824 | # PHY 825 | # 826 | CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y 827 | # CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set 828 | CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 829 | CONFIG_ESP_PHY_MAX_TX_POWER=20 830 | # CONFIG_ESP_PHY_REDUCE_TX_POWER is not set 831 | CONFIG_ESP_PHY_RF_CAL_PARTIAL=y 832 | # CONFIG_ESP_PHY_RF_CAL_NONE is not set 833 | # CONFIG_ESP_PHY_RF_CAL_FULL is not set 834 | CONFIG_ESP_PHY_CALIBRATION_MODE=0 835 | # end of PHY 836 | 837 | # 838 | # Power Management 839 | # 840 | # CONFIG_PM_ENABLE is not set 841 | # end of Power Management 842 | 843 | # 844 | # ESP PSRAM 845 | # 846 | # CONFIG_SPIRAM is not set 847 | # end of ESP PSRAM 848 | 849 | # 850 | # ESP Ringbuf 851 | # 852 | # CONFIG_RINGBUF_PLACE_FUNCTIONS_INTO_FLASH is not set 853 | # end of ESP Ringbuf 854 | 855 | # 856 | # ESP System Settings 857 | # 858 | # CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set 859 | CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y 860 | # CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set 861 | CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160 862 | 863 | # 864 | # Memory 865 | # 866 | # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set 867 | 868 | # 869 | # Non-backward compatible options 870 | # 871 | # CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM is not set 872 | # end of Non-backward compatible options 873 | # end of Memory 874 | 875 | # 876 | # Trace memory 877 | # 878 | # CONFIG_ESP32_TRAX is not set 879 | CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0 880 | # end of Trace memory 881 | 882 | # CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set 883 | CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y 884 | # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set 885 | # CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set 886 | CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS=0 887 | 888 | # 889 | # Memory protection 890 | # 891 | # end of Memory protection 892 | 893 | CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 894 | CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 895 | CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 896 | CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y 897 | # CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set 898 | # CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set 899 | CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 900 | CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 901 | CONFIG_ESP_CONSOLE_UART_DEFAULT=y 902 | # CONFIG_ESP_CONSOLE_UART_CUSTOM is not set 903 | # CONFIG_ESP_CONSOLE_NONE is not set 904 | CONFIG_ESP_CONSOLE_UART=y 905 | CONFIG_ESP_CONSOLE_UART_NUM=0 906 | CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 907 | CONFIG_ESP_INT_WDT=y 908 | CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 909 | CONFIG_ESP_INT_WDT_CHECK_CPU1=y 910 | CONFIG_ESP_TASK_WDT_EN=y 911 | CONFIG_ESP_TASK_WDT_INIT=y 912 | # CONFIG_ESP_TASK_WDT_PANIC is not set 913 | CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 914 | CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y 915 | CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y 916 | # CONFIG_ESP_PANIC_HANDLER_IRAM is not set 917 | # CONFIG_ESP_DEBUG_STUBS_ENABLE is not set 918 | CONFIG_ESP_DEBUG_OCDAWARE=y 919 | # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set 920 | CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y 921 | 922 | # 923 | # Brownout Detector 924 | # 925 | CONFIG_ESP_BROWNOUT_DET=y 926 | CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0=y 927 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_1 is not set 928 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2 is not set 929 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3 is not set 930 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4 is not set 931 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_5 is not set 932 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6 is not set 933 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7 is not set 934 | CONFIG_ESP_BROWNOUT_DET_LVL=0 935 | # end of Brownout Detector 936 | 937 | # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set 938 | CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y 939 | # end of ESP System Settings 940 | 941 | # 942 | # IPC (Inter-Processor Call) 943 | # 944 | CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 945 | CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y 946 | CONFIG_ESP_IPC_ISR_ENABLE=y 947 | # end of IPC (Inter-Processor Call) 948 | 949 | # 950 | # High resolution timer (esp_timer) 951 | # 952 | # CONFIG_ESP_TIMER_PROFILING is not set 953 | CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y 954 | CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y 955 | CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 956 | CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1 957 | # CONFIG_ESP_TIMER_SHOW_EXPERIMENTAL is not set 958 | CONFIG_ESP_TIMER_TASK_AFFINITY=0x0 959 | CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0=y 960 | CONFIG_ESP_TIMER_ISR_AFFINITY=0x1 961 | CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0=y 962 | # CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set 963 | CONFIG_ESP_TIMER_IMPL_TG0_LAC=y 964 | # end of High resolution timer (esp_timer) 965 | 966 | # 967 | # Wi-Fi 968 | # 969 | CONFIG_ESP_WIFI_ENABLED=y 970 | CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM=10 971 | CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM=32 972 | # CONFIG_ESP_WIFI_STATIC_TX_BUFFER is not set 973 | CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER=y 974 | CONFIG_ESP_WIFI_TX_BUFFER_TYPE=1 975 | CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM=32 976 | CONFIG_ESP_WIFI_STATIC_RX_MGMT_BUFFER=y 977 | # CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUFFER is not set 978 | CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUF=0 979 | CONFIG_ESP_WIFI_RX_MGMT_BUF_NUM_DEF=5 980 | # CONFIG_ESP_WIFI_CSI_ENABLED is not set 981 | CONFIG_ESP_WIFI_AMPDU_TX_ENABLED=y 982 | CONFIG_ESP_WIFI_TX_BA_WIN=6 983 | CONFIG_ESP_WIFI_AMPDU_RX_ENABLED=y 984 | CONFIG_ESP_WIFI_RX_BA_WIN=6 985 | CONFIG_ESP_WIFI_NVS_ENABLED=y 986 | CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0=y 987 | # CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_1 is not set 988 | CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN=752 989 | CONFIG_ESP_WIFI_MGMT_SBUF_NUM=32 990 | CONFIG_ESP_WIFI_IRAM_OPT=y 991 | # CONFIG_ESP_WIFI_EXTRA_IRAM_OPT is not set 992 | CONFIG_ESP_WIFI_RX_IRAM_OPT=y 993 | CONFIG_ESP_WIFI_ENABLE_WPA3_SAE=y 994 | CONFIG_ESP_WIFI_ENABLE_SAE_PK=y 995 | CONFIG_ESP_WIFI_SOFTAP_SAE_SUPPORT=y 996 | CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA=y 997 | # CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set 998 | CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE=y 999 | # CONFIG_ESP_WIFI_GMAC_SUPPORT is not set 1000 | CONFIG_ESP_WIFI_SOFTAP_SUPPORT=y 1001 | # CONFIG_ESP_WIFI_SLP_BEACON_LOST_OPT is not set 1002 | CONFIG_ESP_WIFI_ESPNOW_MAX_ENCRYPT_NUM=7 1003 | # CONFIG_ESP_WIFI_NAN_ENABLE is not set 1004 | CONFIG_ESP_WIFI_MBEDTLS_CRYPTO=y 1005 | CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT=y 1006 | # CONFIG_ESP_WIFI_WAPI_PSK is not set 1007 | # CONFIG_ESP_WIFI_11KV_SUPPORT is not set 1008 | # CONFIG_ESP_WIFI_MBO_SUPPORT is not set 1009 | # CONFIG_ESP_WIFI_DPP_SUPPORT is not set 1010 | # CONFIG_ESP_WIFI_11R_SUPPORT is not set 1011 | # CONFIG_ESP_WIFI_WPS_SOFTAP_REGISTRAR is not set 1012 | 1013 | # 1014 | # WPS Configuration Options 1015 | # 1016 | # CONFIG_ESP_WIFI_WPS_STRICT is not set 1017 | # CONFIG_ESP_WIFI_WPS_PASSPHRASE is not set 1018 | # end of WPS Configuration Options 1019 | 1020 | # CONFIG_ESP_WIFI_DEBUG_PRINT is not set 1021 | # CONFIG_ESP_WIFI_TESTING_OPTIONS is not set 1022 | CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT=y 1023 | # CONFIG_ESP_WIFI_ENT_FREE_DYNAMIC_BUFFER is not set 1024 | # end of Wi-Fi 1025 | 1026 | # 1027 | # Core dump 1028 | # 1029 | # CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH is not set 1030 | # CONFIG_ESP_COREDUMP_ENABLE_TO_UART is not set 1031 | CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y 1032 | # end of Core dump 1033 | 1034 | # 1035 | # FAT Filesystem support 1036 | # 1037 | CONFIG_FATFS_VOLUME_COUNT=2 1038 | CONFIG_FATFS_LFN_NONE=y 1039 | # CONFIG_FATFS_LFN_HEAP is not set 1040 | # CONFIG_FATFS_LFN_STACK is not set 1041 | # CONFIG_FATFS_SECTOR_512 is not set 1042 | CONFIG_FATFS_SECTOR_4096=y 1043 | # CONFIG_FATFS_CODEPAGE_DYNAMIC is not set 1044 | CONFIG_FATFS_CODEPAGE_437=y 1045 | # CONFIG_FATFS_CODEPAGE_720 is not set 1046 | # CONFIG_FATFS_CODEPAGE_737 is not set 1047 | # CONFIG_FATFS_CODEPAGE_771 is not set 1048 | # CONFIG_FATFS_CODEPAGE_775 is not set 1049 | # CONFIG_FATFS_CODEPAGE_850 is not set 1050 | # CONFIG_FATFS_CODEPAGE_852 is not set 1051 | # CONFIG_FATFS_CODEPAGE_855 is not set 1052 | # CONFIG_FATFS_CODEPAGE_857 is not set 1053 | # CONFIG_FATFS_CODEPAGE_860 is not set 1054 | # CONFIG_FATFS_CODEPAGE_861 is not set 1055 | # CONFIG_FATFS_CODEPAGE_862 is not set 1056 | # CONFIG_FATFS_CODEPAGE_863 is not set 1057 | # CONFIG_FATFS_CODEPAGE_864 is not set 1058 | # CONFIG_FATFS_CODEPAGE_865 is not set 1059 | # CONFIG_FATFS_CODEPAGE_866 is not set 1060 | # CONFIG_FATFS_CODEPAGE_869 is not set 1061 | # CONFIG_FATFS_CODEPAGE_932 is not set 1062 | # CONFIG_FATFS_CODEPAGE_936 is not set 1063 | # CONFIG_FATFS_CODEPAGE_949 is not set 1064 | # CONFIG_FATFS_CODEPAGE_950 is not set 1065 | CONFIG_FATFS_CODEPAGE=437 1066 | CONFIG_FATFS_FS_LOCK=0 1067 | CONFIG_FATFS_TIMEOUT_MS=10000 1068 | CONFIG_FATFS_PER_FILE_CACHE=y 1069 | # CONFIG_FATFS_USE_FASTSEEK is not set 1070 | CONFIG_FATFS_VFS_FSTAT_BLKSIZE=0 1071 | # CONFIG_FATFS_IMMEDIATE_FSYNC is not set 1072 | # end of FAT Filesystem support 1073 | 1074 | # 1075 | # FreeRTOS 1076 | # 1077 | 1078 | # 1079 | # Kernel 1080 | # 1081 | # CONFIG_FREERTOS_SMP is not set 1082 | # CONFIG_FREERTOS_UNICORE is not set 1083 | CONFIG_FREERTOS_HZ=100 1084 | # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set 1085 | # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set 1086 | CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y 1087 | CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 1088 | CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 1089 | # CONFIG_FREERTOS_USE_IDLE_HOOK is not set 1090 | # CONFIG_FREERTOS_USE_TICK_HOOK is not set 1091 | CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 1092 | # CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY is not set 1093 | CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME="Tmr Svc" 1094 | CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 1095 | CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 1096 | CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 1097 | CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 1098 | CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES=1 1099 | # CONFIG_FREERTOS_USE_TRACE_FACILITY is not set 1100 | # CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set 1101 | # end of Kernel 1102 | 1103 | # 1104 | # Port 1105 | # 1106 | CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y 1107 | # CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set 1108 | CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS=y 1109 | # CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK is not set 1110 | # CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set 1111 | CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y 1112 | CONFIG_FREERTOS_ISR_STACKSIZE=1536 1113 | CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y 1114 | # CONFIG_FREERTOS_FPU_IN_ISR is not set 1115 | CONFIG_FREERTOS_TICK_SUPPORT_CORETIMER=y 1116 | CONFIG_FREERTOS_CORETIMER_0=y 1117 | # CONFIG_FREERTOS_CORETIMER_1 is not set 1118 | CONFIG_FREERTOS_SYSTICK_USES_CCOUNT=y 1119 | # CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set 1120 | # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set 1121 | # end of Port 1122 | 1123 | CONFIG_FREERTOS_PORT=y 1124 | CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF 1125 | CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y 1126 | CONFIG_FREERTOS_DEBUG_OCDAWARE=y 1127 | CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y 1128 | CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH=y 1129 | # end of FreeRTOS 1130 | 1131 | # 1132 | # Hardware Abstraction Layer (HAL) and Low Level (LL) 1133 | # 1134 | CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y 1135 | # CONFIG_HAL_ASSERTION_DISABLE is not set 1136 | # CONFIG_HAL_ASSERTION_SILENT is not set 1137 | # CONFIG_HAL_ASSERTION_ENABLE is not set 1138 | CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2 1139 | CONFIG_HAL_SPI_MASTER_FUNC_IN_IRAM=y 1140 | CONFIG_HAL_SPI_SLAVE_FUNC_IN_IRAM=y 1141 | # end of Hardware Abstraction Layer (HAL) and Low Level (LL) 1142 | 1143 | # 1144 | # Heap memory debugging 1145 | # 1146 | CONFIG_HEAP_POISONING_DISABLED=y 1147 | # CONFIG_HEAP_POISONING_LIGHT is not set 1148 | # CONFIG_HEAP_POISONING_COMPREHENSIVE is not set 1149 | CONFIG_HEAP_TRACING_OFF=y 1150 | # CONFIG_HEAP_TRACING_STANDALONE is not set 1151 | # CONFIG_HEAP_TRACING_TOHOST is not set 1152 | # CONFIG_HEAP_USE_HOOKS is not set 1153 | # CONFIG_HEAP_TASK_TRACKING is not set 1154 | # CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set 1155 | # CONFIG_HEAP_PLACE_FUNCTION_INTO_FLASH is not set 1156 | # end of Heap memory debugging 1157 | 1158 | # 1159 | # Log output 1160 | # 1161 | # CONFIG_LOG_DEFAULT_LEVEL_NONE is not set 1162 | # CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set 1163 | # CONFIG_LOG_DEFAULT_LEVEL_WARN is not set 1164 | CONFIG_LOG_DEFAULT_LEVEL_INFO=y 1165 | # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set 1166 | # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set 1167 | CONFIG_LOG_DEFAULT_LEVEL=3 1168 | CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y 1169 | # CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set 1170 | # CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set 1171 | CONFIG_LOG_MAXIMUM_LEVEL=3 1172 | # CONFIG_LOG_MASTER_LEVEL is not set 1173 | CONFIG_LOG_COLORS=y 1174 | CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y 1175 | # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set 1176 | # end of Log output 1177 | 1178 | # 1179 | # LWIP 1180 | # 1181 | CONFIG_LWIP_ENABLE=y 1182 | CONFIG_LWIP_LOCAL_HOSTNAME="es-eth-adapter" 1183 | # CONFIG_LWIP_NETIF_API is not set 1184 | CONFIG_LWIP_TCPIP_TASK_PRIO=18 1185 | # CONFIG_LWIP_TCPIP_CORE_LOCKING is not set 1186 | # CONFIG_LWIP_CHECK_THREAD_SAFETY is not set 1187 | CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y 1188 | # CONFIG_LWIP_L2_TO_L3_COPY is not set 1189 | # CONFIG_LWIP_IRAM_OPTIMIZATION is not set 1190 | # CONFIG_LWIP_EXTRA_IRAM_OPTIMIZATION is not set 1191 | CONFIG_LWIP_TIMERS_ONDEMAND=y 1192 | CONFIG_LWIP_ND6=y 1193 | # CONFIG_LWIP_FORCE_ROUTER_FORWARDING is not set 1194 | CONFIG_LWIP_MAX_SOCKETS=10 1195 | # CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set 1196 | # CONFIG_LWIP_SO_LINGER is not set 1197 | CONFIG_LWIP_SO_REUSE=y 1198 | CONFIG_LWIP_SO_REUSE_RXTOALL=y 1199 | # CONFIG_LWIP_SO_RCVBUF is not set 1200 | # CONFIG_LWIP_NETBUF_RECVINFO is not set 1201 | CONFIG_LWIP_IP_DEFAULT_TTL=64 1202 | CONFIG_LWIP_IP4_FRAG=y 1203 | CONFIG_LWIP_IP6_FRAG=y 1204 | # CONFIG_LWIP_IP4_REASSEMBLY is not set 1205 | # CONFIG_LWIP_IP6_REASSEMBLY is not set 1206 | CONFIG_LWIP_IP_REASS_MAX_PBUFS=10 1207 | # CONFIG_LWIP_IP_FORWARD is not set 1208 | # CONFIG_LWIP_STATS is not set 1209 | CONFIG_LWIP_ESP_GRATUITOUS_ARP=y 1210 | CONFIG_LWIP_GARP_TMR_INTERVAL=60 1211 | CONFIG_LWIP_ESP_MLDV6_REPORT=y 1212 | CONFIG_LWIP_MLDV6_TMR_INTERVAL=40 1213 | CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 1214 | CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y 1215 | # CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set 1216 | CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y 1217 | # CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set 1218 | CONFIG_LWIP_DHCP_OPTIONS_LEN=68 1219 | CONFIG_LWIP_NUM_NETIF_CLIENT_DATA=0 1220 | CONFIG_LWIP_DHCP_COARSE_TIMER_SECS=1 1221 | 1222 | # 1223 | # DHCP server 1224 | # 1225 | CONFIG_LWIP_DHCPS=y 1226 | CONFIG_LWIP_DHCPS_LEASE_UNIT=60 1227 | CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 1228 | CONFIG_LWIP_DHCPS_STATIC_ENTRIES=y 1229 | # end of DHCP server 1230 | 1231 | # CONFIG_LWIP_AUTOIP is not set 1232 | CONFIG_LWIP_IPV4=y 1233 | CONFIG_LWIP_IPV6=y 1234 | # CONFIG_LWIP_IPV6_AUTOCONFIG is not set 1235 | CONFIG_LWIP_IPV6_NUM_ADDRESSES=3 1236 | # CONFIG_LWIP_IPV6_FORWARD is not set 1237 | # CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set 1238 | CONFIG_LWIP_NETIF_LOOPBACK=y 1239 | CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 1240 | 1241 | # 1242 | # TCP 1243 | # 1244 | CONFIG_LWIP_MAX_ACTIVE_TCP=16 1245 | CONFIG_LWIP_MAX_LISTENING_TCP=16 1246 | CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y 1247 | CONFIG_LWIP_TCP_MAXRTX=12 1248 | CONFIG_LWIP_TCP_SYNMAXRTX=12 1249 | CONFIG_LWIP_TCP_MSS=1440 1250 | CONFIG_LWIP_TCP_TMR_INTERVAL=250 1251 | CONFIG_LWIP_TCP_MSL=60000 1252 | CONFIG_LWIP_TCP_FIN_WAIT_TIMEOUT=20000 1253 | CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5760 1254 | CONFIG_LWIP_TCP_WND_DEFAULT=5760 1255 | CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 1256 | CONFIG_LWIP_TCP_QUEUE_OOSEQ=y 1257 | CONFIG_LWIP_TCP_OOSEQ_TIMEOUT=6 1258 | CONFIG_LWIP_TCP_OOSEQ_MAX_PBUFS=4 1259 | # CONFIG_LWIP_TCP_SACK_OUT is not set 1260 | CONFIG_LWIP_TCP_OVERSIZE_MSS=y 1261 | # CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set 1262 | # CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set 1263 | CONFIG_LWIP_TCP_RTO_TIME=1500 1264 | # end of TCP 1265 | 1266 | # 1267 | # UDP 1268 | # 1269 | CONFIG_LWIP_MAX_UDP_PCBS=16 1270 | CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 1271 | # end of UDP 1272 | 1273 | # 1274 | # Checksums 1275 | # 1276 | # CONFIG_LWIP_CHECKSUM_CHECK_IP is not set 1277 | # CONFIG_LWIP_CHECKSUM_CHECK_UDP is not set 1278 | CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y 1279 | # end of Checksums 1280 | 1281 | CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 1282 | CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y 1283 | # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set 1284 | # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set 1285 | CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF 1286 | # CONFIG_LWIP_PPP_SUPPORT is not set 1287 | CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3 1288 | CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 1289 | # CONFIG_LWIP_SLIP_SUPPORT is not set 1290 | 1291 | # 1292 | # ICMP 1293 | # 1294 | CONFIG_LWIP_ICMP=y 1295 | # CONFIG_LWIP_MULTICAST_PING is not set 1296 | # CONFIG_LWIP_BROADCAST_PING is not set 1297 | # end of ICMP 1298 | 1299 | # 1300 | # LWIP RAW API 1301 | # 1302 | CONFIG_LWIP_MAX_RAW_PCBS=16 1303 | # end of LWIP RAW API 1304 | 1305 | # 1306 | # SNTP 1307 | # 1308 | CONFIG_LWIP_SNTP_MAX_SERVERS=1 1309 | # CONFIG_LWIP_DHCP_GET_NTP_SRV is not set 1310 | CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 1311 | # end of SNTP 1312 | 1313 | # 1314 | # DNS 1315 | # 1316 | CONFIG_LWIP_DNS_MAX_SERVERS=3 1317 | # CONFIG_LWIP_FALLBACK_DNS_SERVER_SUPPORT is not set 1318 | # end of DNS 1319 | 1320 | CONFIG_LWIP_BRIDGEIF_MAX_PORTS=7 1321 | CONFIG_LWIP_ESP_LWIP_ASSERT=y 1322 | 1323 | # 1324 | # Hooks 1325 | # 1326 | # CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set 1327 | CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y 1328 | # CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM is not set 1329 | CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y 1330 | # CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set 1331 | # CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set 1332 | CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y 1333 | # CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set 1334 | # CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set 1335 | CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_NONE=y 1336 | # CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_DEFAULT is not set 1337 | # CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_CUSTOM is not set 1338 | CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y 1339 | # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set 1340 | # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set 1341 | CONFIG_LWIP_HOOK_IP6_INPUT_NONE=y 1342 | # CONFIG_LWIP_HOOK_IP6_INPUT_DEFAULT is not set 1343 | # CONFIG_LWIP_HOOK_IP6_INPUT_CUSTOM is not set 1344 | # end of Hooks 1345 | 1346 | # CONFIG_LWIP_DEBUG is not set 1347 | # end of LWIP 1348 | 1349 | # 1350 | # mbedTLS 1351 | # 1352 | CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y 1353 | # CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set 1354 | # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set 1355 | CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y 1356 | CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 1357 | CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 1358 | # CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set 1359 | # CONFIG_MBEDTLS_DEBUG is not set 1360 | 1361 | # 1362 | # mbedTLS v3.x related 1363 | # 1364 | # CONFIG_MBEDTLS_SSL_PROTO_TLS1_3 is not set 1365 | # CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set 1366 | # CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set 1367 | # CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set 1368 | CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y 1369 | CONFIG_MBEDTLS_PKCS7_C=y 1370 | # end of mbedTLS v3.x related 1371 | 1372 | # 1373 | # Certificate Bundle 1374 | # 1375 | CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y 1376 | CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y 1377 | # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set 1378 | # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set 1379 | # CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set 1380 | CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS=200 1381 | # end of Certificate Bundle 1382 | 1383 | # CONFIG_MBEDTLS_ECP_RESTARTABLE is not set 1384 | CONFIG_MBEDTLS_CMAC_C=y 1385 | CONFIG_MBEDTLS_HARDWARE_AES=y 1386 | CONFIG_MBEDTLS_HARDWARE_MPI=y 1387 | CONFIG_MBEDTLS_HARDWARE_SHA=y 1388 | CONFIG_MBEDTLS_ROM_MD5=y 1389 | # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set 1390 | # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set 1391 | CONFIG_MBEDTLS_HAVE_TIME=y 1392 | # CONFIG_MBEDTLS_PLATFORM_TIME_ALT is not set 1393 | # CONFIG_MBEDTLS_HAVE_TIME_DATE is not set 1394 | CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y 1395 | CONFIG_MBEDTLS_SHA512_C=y 1396 | CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y 1397 | # CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set 1398 | # CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set 1399 | # CONFIG_MBEDTLS_TLS_DISABLED is not set 1400 | CONFIG_MBEDTLS_TLS_SERVER=y 1401 | CONFIG_MBEDTLS_TLS_CLIENT=y 1402 | CONFIG_MBEDTLS_TLS_ENABLED=y 1403 | 1404 | # 1405 | # TLS Key Exchange Methods 1406 | # 1407 | # CONFIG_MBEDTLS_PSK_MODES is not set 1408 | CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y 1409 | CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y 1410 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y 1411 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y 1412 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y 1413 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y 1414 | # end of TLS Key Exchange Methods 1415 | 1416 | CONFIG_MBEDTLS_SSL_RENEGOTIATION=y 1417 | CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y 1418 | # CONFIG_MBEDTLS_SSL_PROTO_GMTSSL1_1 is not set 1419 | # CONFIG_MBEDTLS_SSL_PROTO_DTLS is not set 1420 | CONFIG_MBEDTLS_SSL_ALPN=y 1421 | CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y 1422 | CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y 1423 | 1424 | # 1425 | # Symmetric Ciphers 1426 | # 1427 | CONFIG_MBEDTLS_AES_C=y 1428 | # CONFIG_MBEDTLS_CAMELLIA_C is not set 1429 | # CONFIG_MBEDTLS_DES_C is not set 1430 | # CONFIG_MBEDTLS_BLOWFISH_C is not set 1431 | # CONFIG_MBEDTLS_XTEA_C is not set 1432 | CONFIG_MBEDTLS_CCM_C=y 1433 | CONFIG_MBEDTLS_GCM_C=y 1434 | # CONFIG_MBEDTLS_NIST_KW_C is not set 1435 | # end of Symmetric Ciphers 1436 | 1437 | # CONFIG_MBEDTLS_RIPEMD160_C is not set 1438 | 1439 | # 1440 | # Certificates 1441 | # 1442 | CONFIG_MBEDTLS_PEM_PARSE_C=y 1443 | CONFIG_MBEDTLS_PEM_WRITE_C=y 1444 | CONFIG_MBEDTLS_X509_CRL_PARSE_C=y 1445 | CONFIG_MBEDTLS_X509_CSR_PARSE_C=y 1446 | # end of Certificates 1447 | 1448 | CONFIG_MBEDTLS_ECP_C=y 1449 | # CONFIG_MBEDTLS_DHM_C is not set 1450 | CONFIG_MBEDTLS_ECDH_C=y 1451 | CONFIG_MBEDTLS_ECDSA_C=y 1452 | # CONFIG_MBEDTLS_ECJPAKE_C is not set 1453 | CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y 1454 | CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y 1455 | CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y 1456 | CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y 1457 | CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y 1458 | CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y 1459 | CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y 1460 | CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y 1461 | CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y 1462 | CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y 1463 | CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y 1464 | CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y 1465 | CONFIG_MBEDTLS_ECP_NIST_OPTIM=y 1466 | CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM=y 1467 | # CONFIG_MBEDTLS_POLY1305_C is not set 1468 | # CONFIG_MBEDTLS_CHACHA20_C is not set 1469 | # CONFIG_MBEDTLS_HKDF_C is not set 1470 | # CONFIG_MBEDTLS_THREADING_C is not set 1471 | # CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set 1472 | # end of mbedTLS 1473 | 1474 | # 1475 | # ESP-MQTT Configurations 1476 | # 1477 | CONFIG_MQTT_PROTOCOL_311=y 1478 | # CONFIG_MQTT_PROTOCOL_5 is not set 1479 | CONFIG_MQTT_TRANSPORT_SSL=y 1480 | CONFIG_MQTT_TRANSPORT_WEBSOCKET=y 1481 | CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y 1482 | # CONFIG_MQTT_MSG_ID_INCREMENTAL is not set 1483 | # CONFIG_MQTT_SKIP_PUBLISH_IF_DISCONNECTED is not set 1484 | # CONFIG_MQTT_REPORT_DELETED_MESSAGES is not set 1485 | # CONFIG_MQTT_USE_CUSTOM_CONFIG is not set 1486 | # CONFIG_MQTT_TASK_CORE_SELECTION_ENABLED is not set 1487 | # CONFIG_MQTT_CUSTOM_OUTBOX is not set 1488 | # end of ESP-MQTT Configurations 1489 | 1490 | # 1491 | # Newlib 1492 | # 1493 | CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y 1494 | # CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set 1495 | # CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set 1496 | # CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set 1497 | # CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set 1498 | CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y 1499 | # CONFIG_NEWLIB_NANO_FORMAT is not set 1500 | CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT=y 1501 | # CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set 1502 | # CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT is not set 1503 | # CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set 1504 | # end of Newlib 1505 | 1506 | # 1507 | # NVS 1508 | # 1509 | # CONFIG_NVS_ASSERT_ERROR_CHECK is not set 1510 | # CONFIG_NVS_LEGACY_DUP_KEYS_COMPATIBILITY is not set 1511 | # end of NVS 1512 | 1513 | # 1514 | # OpenThread 1515 | # 1516 | # CONFIG_OPENTHREAD_ENABLED is not set 1517 | 1518 | # 1519 | # Thread Operational Dataset 1520 | # 1521 | CONFIG_OPENTHREAD_NETWORK_NAME="OpenThread-ESP" 1522 | CONFIG_OPENTHREAD_MESH_LOCAL_PREFIX="fd00:db8:a0:0::/64" 1523 | CONFIG_OPENTHREAD_NETWORK_CHANNEL=15 1524 | CONFIG_OPENTHREAD_NETWORK_PANID=0x1234 1525 | CONFIG_OPENTHREAD_NETWORK_EXTPANID="dead00beef00cafe" 1526 | CONFIG_OPENTHREAD_NETWORK_MASTERKEY="00112233445566778899aabbccddeeff" 1527 | CONFIG_OPENTHREAD_NETWORK_PSKC="104810e2315100afd6bc9215a6bfac53" 1528 | # end of Thread Operational Dataset 1529 | 1530 | CONFIG_OPENTHREAD_XTAL_ACCURACY=130 1531 | # CONFIG_OPENTHREAD_SPINEL_ONLY is not set 1532 | CONFIG_OPENTHREAD_RX_ON_WHEN_IDLE=y 1533 | 1534 | # 1535 | # Thread Address Query Config 1536 | # 1537 | # end of Thread Address Query Config 1538 | # end of OpenThread 1539 | 1540 | # 1541 | # Protocomm 1542 | # 1543 | CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_0=y 1544 | CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_1=y 1545 | CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_2=y 1546 | # end of Protocomm 1547 | 1548 | # 1549 | # PThreads 1550 | # 1551 | CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 1552 | CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 1553 | CONFIG_PTHREAD_STACK_MIN=768 1554 | CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y 1555 | # CONFIG_PTHREAD_DEFAULT_CORE_0 is not set 1556 | # CONFIG_PTHREAD_DEFAULT_CORE_1 is not set 1557 | CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 1558 | CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" 1559 | # end of PThreads 1560 | 1561 | # 1562 | # MMU Config 1563 | # 1564 | CONFIG_MMU_PAGE_SIZE_64KB=y 1565 | CONFIG_MMU_PAGE_MODE="64KB" 1566 | CONFIG_MMU_PAGE_SIZE=0x10000 1567 | # end of MMU Config 1568 | 1569 | # 1570 | # Main Flash configuration 1571 | # 1572 | 1573 | # 1574 | # SPI Flash behavior when brownout 1575 | # 1576 | CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC=y 1577 | CONFIG_SPI_FLASH_BROWNOUT_RESET=y 1578 | # end of SPI Flash behavior when brownout 1579 | 1580 | # 1581 | # Optional and Experimental Features (READ DOCS FIRST) 1582 | # 1583 | 1584 | # 1585 | # Features here require specific hardware (READ DOCS FIRST!) 1586 | # 1587 | # end of Optional and Experimental Features (READ DOCS FIRST) 1588 | # end of Main Flash configuration 1589 | 1590 | # 1591 | # SPI Flash driver 1592 | # 1593 | # CONFIG_SPI_FLASH_VERIFY_WRITE is not set 1594 | # CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set 1595 | CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y 1596 | CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y 1597 | # CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set 1598 | # CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set 1599 | # CONFIG_SPI_FLASH_SHARE_SPI1_BUS is not set 1600 | # CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set 1601 | CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y 1602 | CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 1603 | CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 1604 | CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 1605 | # CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set 1606 | # CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set 1607 | # CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set 1608 | 1609 | # 1610 | # Auto-detect flash chips 1611 | # 1612 | CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORTED=y 1613 | CONFIG_SPI_FLASH_VENDOR_GD_SUPPORTED=y 1614 | CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORTED=y 1615 | CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORTED=y 1616 | CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORTED=y 1617 | CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y 1618 | CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y 1619 | CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y 1620 | CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y 1621 | # CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP is not set 1622 | # CONFIG_SPI_FLASH_SUPPORT_TH_CHIP is not set 1623 | # end of Auto-detect flash chips 1624 | 1625 | CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y 1626 | # end of SPI Flash driver 1627 | 1628 | # 1629 | # SPIFFS Configuration 1630 | # 1631 | CONFIG_SPIFFS_MAX_PARTITIONS=3 1632 | 1633 | # 1634 | # SPIFFS Cache Configuration 1635 | # 1636 | CONFIG_SPIFFS_CACHE=y 1637 | CONFIG_SPIFFS_CACHE_WR=y 1638 | # CONFIG_SPIFFS_CACHE_STATS is not set 1639 | # end of SPIFFS Cache Configuration 1640 | 1641 | CONFIG_SPIFFS_PAGE_CHECK=y 1642 | CONFIG_SPIFFS_GC_MAX_RUNS=10 1643 | # CONFIG_SPIFFS_GC_STATS is not set 1644 | CONFIG_SPIFFS_PAGE_SIZE=256 1645 | CONFIG_SPIFFS_OBJ_NAME_LEN=32 1646 | # CONFIG_SPIFFS_FOLLOW_SYMLINKS is not set 1647 | CONFIG_SPIFFS_USE_MAGIC=y 1648 | CONFIG_SPIFFS_USE_MAGIC_LENGTH=y 1649 | CONFIG_SPIFFS_META_LENGTH=4 1650 | CONFIG_SPIFFS_USE_MTIME=y 1651 | 1652 | # 1653 | # Debug Configuration 1654 | # 1655 | # CONFIG_SPIFFS_DBG is not set 1656 | # CONFIG_SPIFFS_API_DBG is not set 1657 | # CONFIG_SPIFFS_GC_DBG is not set 1658 | # CONFIG_SPIFFS_CACHE_DBG is not set 1659 | # CONFIG_SPIFFS_CHECK_DBG is not set 1660 | # CONFIG_SPIFFS_TEST_VISUALISATION is not set 1661 | # end of Debug Configuration 1662 | # end of SPIFFS Configuration 1663 | 1664 | # 1665 | # TCP Transport 1666 | # 1667 | 1668 | # 1669 | # Websocket 1670 | # 1671 | CONFIG_WS_TRANSPORT=y 1672 | CONFIG_WS_BUFFER_SIZE=1024 1673 | # CONFIG_WS_DYNAMIC_BUFFER is not set 1674 | # end of Websocket 1675 | # end of TCP Transport 1676 | 1677 | # 1678 | # Ultra Low Power (ULP) Co-processor 1679 | # 1680 | # CONFIG_ULP_COPROC_ENABLED is not set 1681 | # end of Ultra Low Power (ULP) Co-processor 1682 | 1683 | # 1684 | # Unity unit testing library 1685 | # 1686 | CONFIG_UNITY_ENABLE_FLOAT=y 1687 | CONFIG_UNITY_ENABLE_DOUBLE=y 1688 | # CONFIG_UNITY_ENABLE_64BIT is not set 1689 | # CONFIG_UNITY_ENABLE_COLOR is not set 1690 | CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y 1691 | # CONFIG_UNITY_ENABLE_FIXTURE is not set 1692 | # CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set 1693 | # end of Unity unit testing library 1694 | 1695 | # 1696 | # Virtual file system 1697 | # 1698 | CONFIG_VFS_SUPPORT_IO=y 1699 | CONFIG_VFS_SUPPORT_DIR=y 1700 | CONFIG_VFS_SUPPORT_SELECT=y 1701 | CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y 1702 | # CONFIG_VFS_SELECT_IN_RAM is not set 1703 | CONFIG_VFS_SUPPORT_TERMIOS=y 1704 | CONFIG_VFS_MAX_COUNT=8 1705 | 1706 | # 1707 | # Host File System I/O (Semihosting) 1708 | # 1709 | CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 1710 | # end of Host File System I/O (Semihosting) 1711 | # end of Virtual file system 1712 | 1713 | # 1714 | # Wear Levelling 1715 | # 1716 | # CONFIG_WL_SECTOR_SIZE_512 is not set 1717 | CONFIG_WL_SECTOR_SIZE_4096=y 1718 | CONFIG_WL_SECTOR_SIZE=4096 1719 | # end of Wear Levelling 1720 | 1721 | # 1722 | # Wi-Fi Provisioning Manager 1723 | # 1724 | CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16 1725 | CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30 1726 | # CONFIG_WIFI_PROV_BLE_FORCE_ENCRYPTION is not set 1727 | CONFIG_WIFI_PROV_STA_ALL_CHANNEL_SCAN=y 1728 | # CONFIG_WIFI_PROV_STA_FAST_SCAN is not set 1729 | # end of Wi-Fi Provisioning Manager 1730 | # end of Component config 1731 | 1732 | # CONFIG_IDF_EXPERIMENTAL_FEATURES is not set 1733 | 1734 | # Deprecated options for backward compatibility 1735 | # CONFIG_APP_BUILD_TYPE_ELF_RAM is not set 1736 | # CONFIG_NO_BLOBS is not set 1737 | # CONFIG_ESP32_NO_BLOBS is not set 1738 | # CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set 1739 | # CONFIG_ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set 1740 | # CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set 1741 | # CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set 1742 | # CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set 1743 | CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y 1744 | # CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set 1745 | # CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set 1746 | CONFIG_LOG_BOOTLOADER_LEVEL=3 1747 | # CONFIG_APP_ROLLBACK_ENABLE is not set 1748 | # CONFIG_FLASH_ENCRYPTION_ENABLED is not set 1749 | # CONFIG_FLASHMODE_QIO is not set 1750 | # CONFIG_FLASHMODE_QOUT is not set 1751 | CONFIG_FLASHMODE_DIO=y 1752 | # CONFIG_FLASHMODE_DOUT is not set 1753 | CONFIG_MONITOR_BAUD=115200 1754 | CONFIG_OPTIMIZATION_LEVEL_DEBUG=y 1755 | CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y 1756 | CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y 1757 | # CONFIG_OPTIMIZATION_LEVEL_RELEASE is not set 1758 | # CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set 1759 | CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y 1760 | # CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set 1761 | # CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set 1762 | CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2 1763 | # CONFIG_CXX_EXCEPTIONS is not set 1764 | CONFIG_STACK_CHECK_NONE=y 1765 | # CONFIG_STACK_CHECK_NORM is not set 1766 | # CONFIG_STACK_CHECK_STRONG is not set 1767 | # CONFIG_STACK_CHECK_ALL is not set 1768 | # CONFIG_WARN_WRITE_STRINGS is not set 1769 | # CONFIG_ESP32_APPTRACE_DEST_TRAX is not set 1770 | CONFIG_ESP32_APPTRACE_DEST_NONE=y 1771 | CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y 1772 | CONFIG_ADC2_DISABLE_DAC=y 1773 | # CONFIG_MCPWM_ISR_IN_IRAM is not set 1774 | # CONFIG_EVENT_LOOP_PROFILING is not set 1775 | CONFIG_POST_EVENTS_FROM_ISR=y 1776 | CONFIG_POST_EVENTS_FROM_IRAM_ISR=y 1777 | # CONFIG_OTA_ALLOW_HTTP is not set 1778 | # CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set 1779 | CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y 1780 | CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 1781 | # CONFIG_ESP_SYSTEM_PD_FLASH is not set 1782 | CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 1783 | CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 1784 | CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y 1785 | CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y 1786 | # CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set 1787 | # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set 1788 | # CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set 1789 | # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set 1790 | # CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set 1791 | # CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set 1792 | CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 1793 | # CONFIG_ESP32_XTAL_FREQ_26 is not set 1794 | CONFIG_ESP32_XTAL_FREQ_40=y 1795 | # CONFIG_ESP32_XTAL_FREQ_AUTO is not set 1796 | CONFIG_ESP32_XTAL_FREQ=40 1797 | CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y 1798 | # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set 1799 | CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 1800 | CONFIG_ESP32_PHY_MAX_TX_POWER=20 1801 | # CONFIG_REDUCE_PHY_TX_POWER is not set 1802 | # CONFIG_ESP32_REDUCE_PHY_TX_POWER is not set 1803 | # CONFIG_SPIRAM_SUPPORT is not set 1804 | # CONFIG_ESP32_SPIRAM_SUPPORT is not set 1805 | # CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set 1806 | CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y 1807 | # CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set 1808 | CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160 1809 | CONFIG_TRACEMEM_RESERVE_DRAM=0x0 1810 | # CONFIG_ESP32_PANIC_PRINT_HALT is not set 1811 | CONFIG_ESP32_PANIC_PRINT_REBOOT=y 1812 | # CONFIG_ESP32_PANIC_SILENT_REBOOT is not set 1813 | # CONFIG_ESP32_PANIC_GDBSTUB is not set 1814 | CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 1815 | CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 1816 | CONFIG_MAIN_TASK_STACK_SIZE=3584 1817 | CONFIG_CONSOLE_UART_DEFAULT=y 1818 | # CONFIG_CONSOLE_UART_CUSTOM is not set 1819 | # CONFIG_CONSOLE_UART_NONE is not set 1820 | # CONFIG_ESP_CONSOLE_UART_NONE is not set 1821 | CONFIG_CONSOLE_UART=y 1822 | CONFIG_CONSOLE_UART_NUM=0 1823 | CONFIG_CONSOLE_UART_BAUDRATE=115200 1824 | CONFIG_INT_WDT=y 1825 | CONFIG_INT_WDT_TIMEOUT_MS=300 1826 | CONFIG_INT_WDT_CHECK_CPU1=y 1827 | CONFIG_TASK_WDT=y 1828 | CONFIG_ESP_TASK_WDT=y 1829 | # CONFIG_TASK_WDT_PANIC is not set 1830 | CONFIG_TASK_WDT_TIMEOUT_S=5 1831 | CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y 1832 | CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y 1833 | # CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set 1834 | CONFIG_ESP32_DEBUG_OCDAWARE=y 1835 | CONFIG_BROWNOUT_DET=y 1836 | CONFIG_ESP32_BROWNOUT_DET=y 1837 | CONFIG_BROWNOUT_DET_LVL_SEL_0=y 1838 | CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y 1839 | # CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set 1840 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_1 is not set 1841 | # CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set 1842 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_2 is not set 1843 | # CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set 1844 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_3 is not set 1845 | # CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set 1846 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_4 is not set 1847 | # CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set 1848 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_5 is not set 1849 | # CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set 1850 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6 is not set 1851 | # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set 1852 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set 1853 | CONFIG_BROWNOUT_DET_LVL=0 1854 | CONFIG_ESP32_BROWNOUT_DET_LVL=0 1855 | # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set 1856 | CONFIG_IPC_TASK_STACK_SIZE=1024 1857 | CONFIG_TIMER_TASK_STACK_SIZE=3584 1858 | CONFIG_ESP32_WIFI_ENABLED=y 1859 | CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 1860 | CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 1861 | # CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set 1862 | CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y 1863 | CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 1864 | CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 1865 | # CONFIG_ESP32_WIFI_CSI_ENABLED is not set 1866 | CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y 1867 | CONFIG_ESP32_WIFI_TX_BA_WIN=6 1868 | CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y 1869 | CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y 1870 | CONFIG_ESP32_WIFI_RX_BA_WIN=6 1871 | CONFIG_ESP32_WIFI_RX_BA_WIN=6 1872 | CONFIG_ESP32_WIFI_NVS_ENABLED=y 1873 | CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y 1874 | # CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set 1875 | CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 1876 | CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 1877 | CONFIG_ESP32_WIFI_IRAM_OPT=y 1878 | CONFIG_ESP32_WIFI_RX_IRAM_OPT=y 1879 | CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y 1880 | CONFIG_ESP32_WIFI_ENABLE_WPA3_OWE_STA=y 1881 | CONFIG_WPA_MBEDTLS_CRYPTO=y 1882 | CONFIG_WPA_MBEDTLS_TLS_CLIENT=y 1883 | # CONFIG_WPA_WAPI_PSK is not set 1884 | # CONFIG_WPA_11KV_SUPPORT is not set 1885 | # CONFIG_WPA_MBO_SUPPORT is not set 1886 | # CONFIG_WPA_DPP_SUPPORT is not set 1887 | # CONFIG_WPA_11R_SUPPORT is not set 1888 | # CONFIG_WPA_WPS_SOFTAP_REGISTRAR is not set 1889 | # CONFIG_WPA_WPS_STRICT is not set 1890 | # CONFIG_WPA_DEBUG_PRINT is not set 1891 | # CONFIG_WPA_TESTING_OPTIONS is not set 1892 | # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set 1893 | # CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set 1894 | CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y 1895 | CONFIG_TIMER_TASK_PRIORITY=1 1896 | CONFIG_TIMER_TASK_STACK_DEPTH=2048 1897 | CONFIG_TIMER_QUEUE_LENGTH=10 1898 | # CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set 1899 | # CONFIG_HAL_ASSERTION_SILIENT is not set 1900 | # CONFIG_L2_TO_L3_COPY is not set 1901 | CONFIG_ESP_GRATUITOUS_ARP=y 1902 | CONFIG_GARP_TMR_INTERVAL=60 1903 | CONFIG_TCPIP_RECVMBOX_SIZE=32 1904 | CONFIG_TCP_MAXRTX=12 1905 | CONFIG_TCP_SYNMAXRTX=12 1906 | CONFIG_TCP_MSS=1440 1907 | CONFIG_TCP_MSL=60000 1908 | CONFIG_TCP_SND_BUF_DEFAULT=5760 1909 | CONFIG_TCP_WND_DEFAULT=5760 1910 | CONFIG_TCP_RECVMBOX_SIZE=6 1911 | CONFIG_TCP_QUEUE_OOSEQ=y 1912 | CONFIG_TCP_OVERSIZE_MSS=y 1913 | # CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set 1914 | # CONFIG_TCP_OVERSIZE_DISABLE is not set 1915 | CONFIG_UDP_RECVMBOX_SIZE=6 1916 | CONFIG_TCPIP_TASK_STACK_SIZE=3072 1917 | CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y 1918 | # CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set 1919 | # CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set 1920 | CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF 1921 | # CONFIG_PPP_SUPPORT is not set 1922 | CONFIG_ESP32_TIME_SYSCALL_USE_RTC_HRT=y 1923 | CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y 1924 | # CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set 1925 | # CONFIG_ESP32_TIME_SYSCALL_USE_HRT is not set 1926 | # CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set 1927 | # CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set 1928 | CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 1929 | CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 1930 | CONFIG_ESP32_PTHREAD_STACK_MIN=768 1931 | CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y 1932 | # CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set 1933 | # CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set 1934 | CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 1935 | CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" 1936 | CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y 1937 | # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set 1938 | # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set 1939 | # CONFIG_ESP32_ULP_COPROC_ENABLED is not set 1940 | CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y 1941 | CONFIG_SUPPORT_TERMIOS=y 1942 | CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 1943 | # End of deprecated options 1944 | -------------------------------------------------------------------------------- /test/echo_perf.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | if [ -z "$1" ]; then 4 | echo -e "Call $0 to run this test" 5 | exit 1 6 | fi 7 | 8 | echo Testing echo server throughput. Type Ctrl-C to stop ... 9 | dd if=/dev/urandom | nc -N $1 3333 > /dev/null 10 | -------------------------------------------------------------------------------- /test/echo_test.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | if [ -z "$1" ]; then 4 | echo -e "Call $0 to run this test" 5 | exit 1 6 | fi 7 | 8 | fifo=/tmp/esp32-eth-echo 9 | cktx=echo_test_tx.txt 10 | ckrx=echo_test_rx.txt 11 | 12 | rm -f $fifo 13 | mkfifo $fifo 14 | 15 | echo Sending / receiving random data ... 16 | 17 | for (( ; ; )); do 18 | sum $fifo > $cktx & 19 | sum_pid=$! 20 | 21 | size=$((1 + ($RANDOM % 4096) + 4096 * ($RANDOM % 4096))) 22 | (dd if=/dev/urandom bs=1 count=$size 2>/dev/null ; sleep .5) | tee $fifo | nc -N $1 3333 | sum > $ckrx 23 | wait $sum_pid 24 | 25 | if diff $cktx $ckrx; then 26 | echo -n . 27 | continue 28 | fi 29 | 30 | echo 31 | echo !!! send and receive data don\'t match !!! 32 | exit 1 33 | done 34 | -------------------------------------------------------------------------------- /test/uart_echo_perf.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | if [ -z "$1" ]; then 4 | echo -e "Call $0 to run this test" 5 | exit 1 6 | fi 7 | 8 | echo Testing echo server throughput. Type Ctrl-C to stop ... 9 | dd if=/dev/urandom | nc -N $1 3142 > /dev/null 10 | -------------------------------------------------------------------------------- /test/uart_echo_test.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | if [ -z "$1" ]; then 4 | echo -e "Call $0 to run this test" 5 | exit 1 6 | fi 7 | 8 | fifo=/tmp/esp32-eth-uart-echo 9 | cktx=uart_echo_test_tx.txt 10 | ckrx=uart_echo_test_rx.txt 11 | 12 | rm -f $fifo 13 | mkfifo $fifo 14 | 15 | echo Sending / receiving random data ... 16 | 17 | for (( ; ; )); do 18 | sum $fifo > $cktx & 19 | sum_pid=$! 20 | 21 | size=$((1 + ($RANDOM % 4096) + 4096 * ($RANDOM % 512))) 22 | (dd if=/dev/urandom bs=1 count=$size 2>/dev/null ; sleep 15) | tee $fifo | nc -N $1 3142 | sum > $ckrx 23 | wait $sum_pid 24 | 25 | if diff $cktx $ckrx; then 26 | echo -n . 27 | continue 28 | fi 29 | 30 | echo 31 | echo !!! send and receive data don\'t match !!! 32 | exit 1 33 | done 34 | --------------------------------------------------------------------------------