├── LICENSE ├── README.md ├── common ├── cfg_pool.c ├── cfg_pool.h ├── cfg_storage.c ├── cfg_storage.h ├── crc16.c ├── crc16.h ├── debug.h └── flash_sec.h ├── doc └── cfg_storage.pdf ├── msp430 ├── cfg_test.c ├── cfg_test.ewp ├── cfg_test.eww ├── flash.h └── flash_sec.c ├── stm32 ├── Drivers │ ├── CMSIS │ │ ├── Device │ │ │ └── ST │ │ │ │ └── STM32F4xx │ │ │ │ ├── Include │ │ │ │ ├── stm32f401xc.h │ │ │ │ ├── stm32f401xe.h │ │ │ │ ├── stm32f405xx.h │ │ │ │ ├── stm32f407xx.h │ │ │ │ ├── stm32f411xe.h │ │ │ │ ├── stm32f415xx.h │ │ │ │ ├── stm32f417xx.h │ │ │ │ ├── stm32f427xx.h │ │ │ │ ├── stm32f429xx.h │ │ │ │ ├── stm32f437xx.h │ │ │ │ ├── stm32f439xx.h │ │ │ │ ├── stm32f446xx.h │ │ │ │ ├── stm32f4xx.h │ │ │ │ └── system_stm32f4xx.h │ │ │ │ └── Source │ │ │ │ └── Templates │ │ │ │ ├── iar │ │ │ │ └── startup_stm32f405xx.s │ │ │ │ └── system_stm32f4xx.c │ │ └── Include │ │ │ ├── arm_common_tables.h │ │ │ ├── arm_const_structs.h │ │ │ ├── arm_math.h │ │ │ ├── core_cm0.h │ │ │ ├── core_cm0plus.h │ │ │ ├── core_cm3.h │ │ │ ├── core_cm4.h │ │ │ ├── core_cm7.h │ │ │ ├── core_cmFunc.h │ │ │ ├── core_cmInstr.h │ │ │ ├── core_cmSimd.h │ │ │ ├── core_sc000.h │ │ │ └── core_sc300.h │ └── STM32F4xx_HAL_Driver │ │ ├── Inc │ │ ├── Legacy │ │ │ └── stm32_hal_legacy.h │ │ ├── stm32f4xx_hal.h │ │ ├── stm32f4xx_hal_cortex.h │ │ ├── stm32f4xx_hal_def.h │ │ ├── stm32f4xx_hal_dma.h │ │ ├── stm32f4xx_hal_dma_ex.h │ │ ├── stm32f4xx_hal_flash.h │ │ ├── stm32f4xx_hal_flash_ex.h │ │ ├── stm32f4xx_hal_flash_ramfunc.h │ │ ├── stm32f4xx_hal_gpio.h │ │ ├── stm32f4xx_hal_gpio_ex.h │ │ ├── stm32f4xx_hal_iwdg.h │ │ ├── stm32f4xx_hal_pcd.h │ │ ├── stm32f4xx_hal_pcd_ex.h │ │ ├── stm32f4xx_hal_pwr.h │ │ ├── stm32f4xx_hal_pwr_ex.h │ │ ├── stm32f4xx_hal_rcc.h │ │ ├── stm32f4xx_hal_rcc_ex.h │ │ └── stm32f4xx_ll_usb.h │ │ └── Src │ │ ├── stm32f4xx_hal.c │ │ ├── stm32f4xx_hal_cortex.c │ │ ├── stm32f4xx_hal_dma.c │ │ ├── stm32f4xx_hal_dma_ex.c │ │ ├── stm32f4xx_hal_flash.c │ │ ├── stm32f4xx_hal_flash_ex.c │ │ ├── stm32f4xx_hal_flash_ramfunc.c │ │ ├── stm32f4xx_hal_gpio.c │ │ ├── stm32f4xx_hal_iwdg.c │ │ ├── stm32f4xx_hal_pcd.c │ │ ├── stm32f4xx_hal_pcd_ex.c │ │ ├── stm32f4xx_hal_pwr.c │ │ ├── stm32f4xx_hal_pwr_ex.c │ │ ├── stm32f4xx_hal_rcc.c │ │ ├── stm32f4xx_hal_rcc_ex.c │ │ └── stm32f4xx_ll_usb.c ├── EWARM │ ├── Project.eww │ ├── config.ewd │ ├── config.ewp │ ├── stm32f405xx_flash.icf │ └── stm32f405xx_sram.icf ├── Inc │ ├── cfg_test.h │ ├── cli.h │ ├── config.h │ ├── errors.h │ ├── flash.h │ ├── main.h │ ├── stm32f4xx_hal_conf.h │ ├── stm32f4xx_it.h │ ├── usb_device.h │ ├── usbd_cdc_if.h │ ├── usbd_conf.h │ └── usbd_desc.h ├── Middlewares │ └── ST │ │ └── STM32_USB_Device_Library │ │ ├── Class │ │ └── CDC │ │ │ ├── Inc │ │ │ └── usbd_cdc.h │ │ │ └── Src │ │ │ └── usbd_cdc.c │ │ └── Core │ │ ├── Inc │ │ ├── usbd_core.h │ │ ├── usbd_ctlreq.h │ │ ├── usbd_def.h │ │ └── usbd_ioreq.h │ │ └── Src │ │ ├── usbd_core.c │ │ ├── usbd_ctlreq.c │ │ └── usbd_ioreq.c ├── Src │ ├── cfg_test.c │ ├── cli.c │ ├── config.c │ ├── flash.c │ ├── flash_sec.c │ ├── main.c │ ├── stm32f4xx_hal_msp.c │ ├── stm32f4xx_it.c │ ├── usb_device.c │ ├── usbd_cdc_if.c │ ├── usbd_conf.c │ └── usbd_desc.c └── config.ioc └── tests └── echo.py /LICENSE: -------------------------------------------------------------------------------- 1 | Framework for reliable storing of configuration data in STM32 embedded flash 2 | 3 | (C) 2015, Oleg Volkov 4 | 5 | Redistribution and use in source and binary forms, with or without 6 | modification, are permitted provided that the following conditions are met: 7 | 8 | 1. Redistributions of source code must retain the above copyright notice, 9 | this list of conditions and the following disclaimer. 10 | 2. Redistributions in binary form must reproduce the above copyright notice, 11 | this list of conditions and the following disclaimer in the documentation 12 | and/or other materials provided with the distribution. 13 | 3. The name of the author may not be used to endorse or promote products 14 | derived from this software without specific prior written permission. 15 | 16 | THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 17 | WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 18 | MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO 19 | EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 | PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 22 | OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 | WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 | OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 | ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | stm32-config 2 | ============ 3 | 4 | ### Framework for reliable storing of configuration data in STM32 and MSP430 embedded flash 5 | 6 | It supports storing of fixed size data in non-volatile storage using 2 flash sectors with atomic updates. 7 | The data is protected by CRC16 checksum. Additional measures are taken to ensure the durability of updates in 8 | the presence of power failures during flash writing and erasing. 9 | 10 | #### Major sources 11 | 12 | common\cfg_pool.c 13 | Configuration data pool over single sector 14 | 15 | common\cfg_storage.c 16 | Configuration data storage using 2 pools to provide strong consistency 17 | 18 | common\flash_sec.h 19 | Generic API for flash sector manipulation. 20 | It abstracts the storage implementation from the platform-specific 21 | flash write/erase code. 22 | 23 | stm32\Src\cfg_test.c 24 | Automated tests for configuration storages on STM32 platform 25 | 26 | stm32\Src\flash.c 27 | stm32\Src\flash_sec.c 28 | Flash write/erase implementation for STM32 platform 29 | 30 | stm32\Src\cli.c 31 | Command line interface over USB CDC with plain echo implementation 32 | 33 | stm32\EWARM 34 | Project for IAR Embedded Workbench for ARM compiler 35 | 36 | stm32\config.ioc 37 | Project for STM32CubeMX 38 | 39 | msp430\cfg_test.c 40 | Automated tests for configuration storages on MSP430 platform 41 | 42 | msp430\flash.h 43 | msp430\flash_sec.c 44 | Flash write/erase implementation for MSP430 platform 45 | 46 | msp430\cfg_test.eww 47 | Project for IAR Embedded Workbench for MSP430 compiler 48 | 49 | tests\echo.py 50 | USB CDC echo test 51 | 52 | doc\cfg_storage.pdf 53 | Storage design description (in Russian) 54 | 55 | The STM32 project is created for STM32-H405 board with STM32F405RGT6 MCU 56 | https://www.olimex.com/Products/ARM/ST/STM32-H405/ 57 | 58 | The MSP430 project is created for Launch Pad board with MSP430G2553 MCU 59 | http://www.ti.com/tool/msp-exp430g2 60 | 61 | -------------------------------------------------------------------------------- /common/cfg_pool.c: -------------------------------------------------------------------------------- 1 | #include "cfg_pool.h" 2 | #include "crc16.h" 3 | #include 4 | #include 5 | 6 | #define ALIGN_SZ sizeof(int) 7 | #define ALIGN_MASK (ALIGN_SZ-1) 8 | #define MARKER_SZ sizeof(struct cfg_rec_marker) 9 | 10 | /* Validator values */ 11 | #define VALID 0 12 | #define INVALID 0xff 13 | 14 | /* Record status bits (active level is 0) */ 15 | #define STA_COMPLETE_BIT 1 16 | #define STA_CHAINED_BIT 0x80 17 | 18 | #define STA_COMPLETE ((uint8_t)~STA_COMPLETE_BIT) 19 | #define STA_CHAINED ((uint8_t)~STA_CHAINED_BIT) 20 | #define STA_UNUSED_BITS ((uint8_t)~(STA_COMPLETE_BIT|STA_CHAINED_BIT)) 21 | 22 | /* The config pool contains the array of equally sized configuration items. The implementation uses checksum to 23 | * ensure data integrity and addresses the problem of repeatability of reads by carefully designed record structure. 24 | * The problem is that in case writing of the data were interrupted the resulting content as seen by reads may by unstable 25 | * due to the floating gate charge being close to the threshold value between 0 and 1. As a consequence we should not rely 26 | * on the checksum without some additional measures against unstable content. Moreover - we should not rely on the storage 27 | * as being erased since it may has unstable content as a consequence of the interrupted write. 28 | * The pool records have the following structure: 29 | * 30 | * data | alignment | crc16 | validator | status | next data 31 | * | | 32 | * 00000000 01111110 33 | * | | 34 | * complete chained 35 | * flag flag 36 | * 37 | * The validator allow us to tell if the crc16 was written completely. If it has 0 bits we can be sure 38 | * that writing of the crc16 bytes were not interrupted. In case the complete flag is set we can be sure that 39 | * validator is itself valid. If the chained flag is not set we have no more data and the next byte was never 40 | * written. 41 | */ 42 | 43 | /* Check if the area past the given offset is erased */ 44 | static int cfg_pool_erased(struct cfg_pool* p, unsigned off) 45 | { 46 | unsigned const *ptr = (unsigned const*)(p->flash->base + off), *end = (unsigned const*)(p->flash->base + p->flash->size); 47 | for (; ptr < end; ++ptr) { 48 | if (~*ptr) 49 | return 0; 50 | } 51 | return 1; 52 | } 53 | 54 | /* Initialize pool on boot */ 55 | int cfg_pool_validate(struct cfg_pool* p) 56 | { 57 | uint8_t last_status = STA_CHAINED; 58 | unsigned off, base = p->flash->base; 59 | unsigned rec_size = p->item_sz_aligned + MARKER_SZ; 60 | unsigned max_off = p->flash->size - rec_size; 61 | int erased, valid = 0; 62 | 63 | /* Scan data items */ 64 | for (off = 0; off <= max_off; off += rec_size) 65 | { 66 | unsigned addr = base + off; 67 | crc16_t chksum = crc16((void const*)addr, p->item_sz); 68 | struct cfg_rec_marker const* m = (struct cfg_rec_marker const*)(addr + p->item_sz_aligned); 69 | valid = m->validator == INVALID ? 0 : chksum == m->chksum; 70 | erased = !valid && cfg_pool_erased(p, off); 71 | if (erased && (last_status & STA_CHAINED_BIT)) { 72 | /* If chained flag is not set we never write to the next byte */ 73 | break; 74 | } 75 | if ( 76 | (last_status & STA_CHAINED_BIT) || /* Chained flag is not set on the previous item */ 77 | (m->status & STA_UNUSED_BITS) != STA_UNUSED_BITS || /* Unused status bits have unexpected content */ 78 | (m->validator != INVALID && !valid) || /* Checksum mismatch */ 79 | (m->validator != VALID && !(m->status & STA_COMPLETE_BIT)) /* Validator byte have unexpected content */ 80 | ) { 81 | /* The sector has either invalid or partially erased content */ 82 | cfg_pool_reset(p); 83 | return 0; 84 | } 85 | last_status = m->status; 86 | p->last_off = off; 87 | if (valid) { 88 | /* Remember last valid item offset for lookups */ 89 | p->valid_off = off; 90 | } 91 | if (erased) { 92 | /* Further area were never written */ 93 | break; 94 | } 95 | } 96 | if (valid && (last_status & STA_COMPLETE_BIT)) { 97 | /* 98 | * Fixup marker to avoid unrepeatable reads. Note that we still have the repeatability problem with 99 | * records treated as invalid. It can't be solved at the pool level since the only way to avoid dealing with 100 | * invalid records is to commit new valid record after the invalid one. It is impossible at this level since the 101 | * storage space is limited. So this solution is possible at cfg_storage level since it has 2 pools to manipulate with. 102 | */ 103 | struct cfg_rec_marker v = { 104 | .validator = VALID, 105 | .status = STA_COMPLETE 106 | }; 107 | return p->flash->write_bytes( 108 | p->flash, 109 | p->last_off + p->item_sz_aligned + offsetof(struct cfg_rec_marker, validator), 110 | &v.validator, 111 | MARKER_SZ - offsetof(struct cfg_rec_marker, validator) 112 | ); 113 | } else { 114 | return 0; 115 | } 116 | } 117 | 118 | /* Initialize pool on boot */ 119 | int cfg_pool_init(struct cfg_pool* p, unsigned item_sz, struct flash_sec const* flash) 120 | { 121 | p->item_sz = item_sz; 122 | p->item_sz_aligned = (item_sz + ALIGN_MASK) & ~ALIGN_MASK; 123 | p->flash = flash; 124 | p->put_cnt = p->erase_cnt = 0; 125 | cfg_pool_reset(p); 126 | return cfg_pool_validate(p); 127 | } 128 | 129 | /* Physically erase pool */ 130 | int cfg_pool_erase(struct cfg_pool* p) 131 | { 132 | cfg_pool_reset(p); 133 | if (p->flash->erase(p->flash)) { 134 | return -1; 135 | } 136 | ++p->erase_cnt; 137 | return 0; 138 | } 139 | 140 | /* Compute CRC of the sequence of 0xff bytes */ 141 | static crc16_t crc_ff(unsigned sz) 142 | { 143 | crc16_t crc = CRC16_INIT; 144 | for (; sz; --sz) { 145 | crc = crc16_up(crc, 0xff); 146 | } 147 | return crc; 148 | } 149 | 150 | /* Put next item. Caller may provide data in 2 parts. In case the hdr = 0 the corresponding storage 151 | * bytes will not be written, so they will keep 0xff values. Return 0 on success, -1 on flash writing error. 152 | */ 153 | int cfg_pool_put(struct cfg_pool* p, void const* hdr, unsigned hdr_sz, void const* tail) 154 | { 155 | unsigned off = cfg_pool_next_offset(p); 156 | struct cfg_rec_marker m = { 157 | .chksum = hdr ? crc16(hdr, hdr_sz) : crc_ff(hdr_sz), 158 | .validator = VALID, 159 | .status = STA_COMPLETE 160 | }; 161 | if (off) { 162 | /* Update status byte on the previous item */ 163 | uint8_t sta = STA_CHAINED; 164 | if (p->flash->write_bytes(p->flash, off - 1, &sta, 1)) { 165 | goto err; 166 | } 167 | } 168 | if (hdr && p->flash->write(p->flash, off, hdr, hdr_sz)) { 169 | goto err; 170 | } 171 | if (hdr_sz < p->item_sz) { 172 | unsigned tail_sz = p->item_sz - hdr_sz; 173 | m.chksum = crc16_up_buff(m.chksum, tail, tail_sz); 174 | if (p->flash->write(p->flash, off + hdr_sz, tail, tail_sz)) { 175 | goto err; 176 | } 177 | } 178 | if (p->flash->write_bytes(p->flash, off + p->item_sz_aligned, &m, MARKER_SZ)) { 179 | goto err; 180 | } 181 | if ( 182 | crc16((const void*)(p->flash->base + off), p->item_sz) != m.chksum || 183 | memcmp(&m, (const void*)(p->flash->base + off + p->item_sz_aligned), sizeof(m)) 184 | ) { 185 | goto err; 186 | } 187 | p->last_off = p->valid_off = off; 188 | ++p->put_cnt; 189 | return 0; 190 | err: 191 | cfg_pool_reset(p); 192 | return -1; 193 | } 194 | 195 | /* Put data item to the pool erasing it if necessary. Return 0 on success, -1 on flash writing error. */ 196 | int cfg_pool_commit(struct cfg_pool* p, void const* data) 197 | { 198 | if ((!cfg_pool_valid(p) || !cfg_pool_has_room(p)) && cfg_pool_erase(p)) { 199 | return -1; 200 | } 201 | return cfg_pool_put(p, data, p->item_sz, 0); 202 | } 203 | -------------------------------------------------------------------------------- /common/cfg_pool.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "flash_sec.h" 4 | #include 5 | 6 | /* The config pool contains the array of equally sized configuration items */ 7 | struct cfg_pool { 8 | unsigned item_sz; 9 | unsigned item_sz_aligned; 10 | int last_off; 11 | int valid_off; 12 | unsigned put_cnt; 13 | unsigned erase_cnt; 14 | struct flash_sec const* flash; 15 | }; 16 | 17 | /* Record marker is written after data to control integrity */ 18 | struct cfg_rec_marker { 19 | uint16_t chksum; 20 | uint8_t validator; 21 | uint8_t status; 22 | }; 23 | 24 | /* Return 1 if the pool is empty, 0 otherwise */ 25 | static inline int cfg_pool_empty(struct cfg_pool const* p) 26 | { 27 | return p->last_off < 0; 28 | } 29 | 30 | /* Return 1 if the pool has valid items, 0 otherwise */ 31 | static inline int cfg_pool_valid(struct cfg_pool const* p) 32 | { 33 | return p->valid_off >= 0; 34 | } 35 | 36 | /* The last item of the sealed pool is valid. So we can guarantee that cfg_pool_get always return the same value. */ 37 | static inline int cfg_pool_sealed(struct cfg_pool const* p) 38 | { 39 | return p->valid_off >= 0 && p->valid_off == p->last_off; 40 | } 41 | 42 | /* Returns pointer to the last valid data item */ 43 | static inline void const* cfg_pool_get(struct cfg_pool const* p) 44 | { 45 | return cfg_pool_valid(p) ? (void const*)(p->flash->base + p->valid_off) : (void const*)0; 46 | } 47 | 48 | /* Return offset of the next item */ 49 | static inline unsigned cfg_pool_next_offset(struct cfg_pool* p) 50 | { 51 | return cfg_pool_empty(p) ? 0 : p->last_off + p->item_sz_aligned + sizeof(struct cfg_rec_marker); 52 | } 53 | 54 | /* Check if we have space for the next item */ 55 | static inline int cfg_pool_has_room(struct cfg_pool* p) 56 | { 57 | return cfg_pool_next_offset(p) + p->item_sz_aligned + sizeof(struct cfg_rec_marker) <= p->flash->size; 58 | } 59 | 60 | /* Reset pool state to empty */ 61 | static inline void cfg_pool_reset(struct cfg_pool* p) 62 | { 63 | p->last_off = p->valid_off = -1; 64 | } 65 | 66 | /* Physically erase pool. Return 0 on success, -1 on flash erase error. */ 67 | int cfg_pool_erase(struct cfg_pool* p); 68 | 69 | /* Initialize pool on boot. Return 0 on success, -1 on flash writing error. */ 70 | int cfg_pool_init(struct cfg_pool* p, unsigned item_sz, struct flash_sec const* flash); 71 | 72 | /* Put next item. Caller may provide data in 2 parts. In case the hdr = 0 the corresponding storage 73 | * bytes will not be written, so they will keep 0xff values. Return 0 on success, -1 on flash writing error. 74 | */ 75 | int cfg_pool_put(struct cfg_pool* p, void const* hdr, unsigned hdr_sz, void const* tail); 76 | 77 | /* Put data item to the pool erasing it if necessary. Return 0 on success, -1 on flash writing error. */ 78 | int cfg_pool_commit(struct cfg_pool* p, void const* data); 79 | -------------------------------------------------------------------------------- /common/cfg_storage.c: -------------------------------------------------------------------------------- 1 | #include "cfg_storage.h" 2 | 3 | #define TOMBSTONE 0x80 4 | #define EPOCH_MASK ((uint8_t)~TOMBSTONE) 5 | 6 | static inline uint8_t get_raw_epoch(void const* item, unsigned item_sz) 7 | { 8 | return *((uint8_t const*)item + item_sz); 9 | } 10 | 11 | static inline uint8_t get_epoch(void const* item, unsigned item_sz) 12 | { 13 | return get_raw_epoch(item, item_sz) & EPOCH_MASK; 14 | } 15 | 16 | static inline uint8_t epoch_next(uint8_t e) 17 | { 18 | return (e + 1) & EPOCH_MASK; 19 | } 20 | 21 | static inline int8_t epoch_diff(uint8_t a, uint8_t b) 22 | { 23 | return (int8_t)((a - b) << 1) >> 1; 24 | } 25 | 26 | /* Get last committed item */ 27 | void const* cfg_stor_get(struct cfg_storage const* stor) 28 | { 29 | struct cfg_pool const* pool = &stor->pool[stor->epoch & 1]; 30 | void const* item = cfg_pool_get(pool); 31 | if (!item || (get_raw_epoch(item, pool->item_sz - 1) & TOMBSTONE)) { 32 | return 0; 33 | } 34 | return item; 35 | } 36 | 37 | /* Initialize storage epoch. Return 0 on success, -1 on flash writing error. */ 38 | int cfg_stor_init_epoch(struct cfg_storage* stor, unsigned item_sz) 39 | { 40 | void const* item[2] = { 41 | cfg_pool_get(&stor->pool[0]), 42 | cfg_pool_get(&stor->pool[1]) 43 | }; 44 | uint8_t epoch[2] = { 45 | item[0] ? get_epoch(item[0], item_sz) : TOMBSTONE, 46 | item[1] ? get_epoch(item[1], item_sz) : TOMBSTONE, 47 | }; 48 | /* Handle empty storage case */ 49 | if (!item[0] && !item[1]) { 50 | stor->epoch = 0; 51 | return 0; 52 | } 53 | /* Verify epoch parity */ 54 | if ( 55 | (item[0] && (epoch[0] & 1) != 0) || 56 | (item[1] && (epoch[1] & 1) != 1) 57 | ) { 58 | return cfg_stor_erase(stor); 59 | } 60 | /* First pool is empty ? */ 61 | if (!item[0]) { 62 | stor->epoch = epoch[1]; 63 | return 0; 64 | } 65 | /* Second pool is empty ? */ 66 | if (!item[1]) { 67 | stor->epoch = epoch[0]; 68 | return 0; 69 | } 70 | /* Choose most recently updated pool */ 71 | switch (epoch_diff(epoch[1], epoch[0])) { 72 | case -1: 73 | stor->epoch = epoch[0]; 74 | return 0; 75 | case 1: 76 | stor->epoch = epoch[1]; 77 | return 0; 78 | default: 79 | return cfg_stor_erase(stor); 80 | } 81 | } 82 | 83 | int cfg_stor_seal(struct cfg_storage* stor) 84 | { 85 | struct cfg_pool* pool = &stor->pool[stor->epoch & 1]; 86 | if (cfg_pool_sealed(pool)) { 87 | return 0; 88 | } 89 | return cfg_stor_commit(stor, cfg_pool_get(pool)); 90 | } 91 | 92 | /* Initialize pool on boot. Return 0 on success, -1 on flash writing error. */ 93 | int cfg_stor_init(struct cfg_storage* stor, unsigned item_sz, struct flash_sec const flash[2]) 94 | { 95 | /* Initialize pools */ 96 | if ( 97 | cfg_pool_init(&stor->pool[0], item_sz + 1, &flash[0]) || 98 | cfg_pool_init(&stor->pool[1], item_sz + 1, &flash[1]) 99 | ) { 100 | return -1; 101 | } 102 | if (cfg_stor_init_epoch(stor, item_sz)) { 103 | return -1; 104 | } 105 | if (cfg_stor_seal(stor)) { 106 | return -1; 107 | } 108 | return 0; 109 | } 110 | 111 | /* Commit data item */ 112 | int cfg_stor_commit(struct cfg_storage* stor, void const* data) 113 | { 114 | uint8_t epoch; 115 | struct cfg_pool* pool = &stor->pool[stor->epoch & 1]; 116 | if (!cfg_pool_valid(pool) && cfg_pool_erase(pool)) { 117 | return -1; 118 | } 119 | if (!cfg_pool_has_room(pool)) { 120 | /* Switch to other pool */ 121 | stor->epoch = epoch_next(stor->epoch); 122 | pool = &stor->pool[stor->epoch & 1]; 123 | if (cfg_pool_erase(pool)) { 124 | return -1; 125 | } 126 | } 127 | /* Put user data followed by epoch */ 128 | epoch = stor->epoch; 129 | if (!data) { 130 | epoch |= TOMBSTONE; 131 | } 132 | return cfg_pool_put(pool, data, pool->item_sz - 1, &epoch); 133 | } 134 | 135 | /* Erase storage content. Return 0 on success, -1 on flash writing error. */ 136 | int cfg_stor_erase(struct cfg_storage* stor) 137 | { 138 | if (cfg_pool_erase(&stor->pool[0]) || cfg_pool_erase(&stor->pool[1])) { 139 | return -1; 140 | } 141 | stor->epoch = 0; 142 | return 0; 143 | } 144 | -------------------------------------------------------------------------------- /common/cfg_storage.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "cfg_pool.h" 4 | 5 | /* 6 | * Configuration storage with atomic updates 7 | */ 8 | 9 | struct cfg_storage { 10 | struct cfg_pool pool[2]; 11 | uint8_t epoch; 12 | }; 13 | 14 | /* Initialize pool on boot. Return 0 on success, -1 on flash writing error. */ 15 | int cfg_stor_init(struct cfg_storage* stor, unsigned item_sz, struct flash_sec const flash[2]); 16 | 17 | /* Get last committed item */ 18 | void const* cfg_stor_get(struct cfg_storage const* stor); 19 | 20 | /* Commit data item. Return 0 on success, -1 on flash writing error. */ 21 | int cfg_stor_commit(struct cfg_storage* stor, void const* data); 22 | 23 | /* Erase storage content. Return 0 on success, -1 on flash writing error. */ 24 | int cfg_stor_erase(struct cfg_storage* stor); 25 | -------------------------------------------------------------------------------- /common/crc16.c: -------------------------------------------------------------------------------- 1 | #include "crc16.h" 2 | 3 | // CRC16 CCITT version 4 | static inline crc16_t crc16_up_(crc16_t crc, unsigned char data) 5 | { 6 | crc16_t t; 7 | data ^= crc & 0xff; 8 | data ^= data << 4; 9 | t = (((crc16_t)data << 8) | ((crc>>8) & 0xff)); 10 | t ^= (unsigned char)(data >> 4); 11 | t ^= ((crc16_t)data << 3); 12 | return t; 13 | } 14 | 15 | crc16_t crc16_up(crc16_t crc, unsigned char data) 16 | { 17 | return crc16_up_(crc, data); 18 | } 19 | 20 | crc16_t crc16_up_buff(crc16_t crc, const void* data, unsigned len) 21 | { 22 | const unsigned char* ptr = data; 23 | for (; len; ++ptr, --len) 24 | crc = crc16_up_(crc, *ptr); 25 | return crc; 26 | } 27 | 28 | crc16_t crc16_str(const char* str) 29 | { 30 | crc16_t crc = CRC16_INIT; 31 | for (; *str; ++str) 32 | crc = crc16_up_(crc, *str); 33 | return crc; 34 | } 35 | -------------------------------------------------------------------------------- /common/crc16.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #define CRC16_INIT 0xffff 4 | #define CRC16_CHK_STR "123456789" 5 | #define CRC16_CHK_VALUE 0x6F91 6 | 7 | typedef unsigned short crc16_t; 8 | 9 | crc16_t crc16_up(crc16_t crc, unsigned char data); 10 | crc16_t crc16_up_buff(crc16_t crc, const void* data, unsigned len); 11 | crc16_t crc16_str(const char* str); 12 | 13 | static inline crc16_t crc16(const void* data, unsigned len) 14 | { 15 | return crc16_up_buff(CRC16_INIT, data, len); 16 | } 17 | -------------------------------------------------------------------------------- /common/debug.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #define BUILD_BUG_ON(cond) extern void __build_bug_on_dummy(char a[1 - 2*!!(cond)]) 4 | 5 | #ifdef USE_FULL_ASSERT 6 | 7 | void assertion_failed(const char* file, unsigned line); 8 | 9 | #define BUG_ON(expr) do { if (expr) assertion_failed(__FILE__, __LINE__); } while (0) 10 | 11 | #else 12 | 13 | #define BUG_ON(expr) do {} while (0) 14 | 15 | #endif 16 | -------------------------------------------------------------------------------- /common/flash_sec.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | /* 4 | * Flash sector manipulation API 5 | */ 6 | 7 | struct flash_sec { 8 | unsigned no; /* sector number */ 9 | unsigned base; /* base address */ 10 | unsigned size; /* sector size in bytes */ 11 | /* The following functions are expected to return 0 on success, -1 on failure */ 12 | int (*erase)(struct flash_sec const*); 13 | int (*write)(struct flash_sec const*, unsigned off, void const* data, unsigned sz); 14 | int (*write_bytes)(struct flash_sec const*, unsigned off, void const* data, unsigned sz); 15 | }; 16 | 17 | int flash_sec_erase(struct flash_sec const* sec); 18 | int flash_sec_write(struct flash_sec const* sec, unsigned off, void const* data, unsigned sz); 19 | int flash_sec_write_bytes(struct flash_sec const* sec, unsigned off, void const* data, unsigned sz); 20 | 21 | static inline void flash_sec_init(struct flash_sec* sec, unsigned no, unsigned base, unsigned size) 22 | { 23 | sec->no = no; 24 | sec->base = base; 25 | sec->size = size; 26 | sec->erase = flash_sec_erase; 27 | sec->write = flash_sec_write; 28 | sec->write_bytes = flash_sec_write_bytes; 29 | } 30 | 31 | #define FLASH_SEC_INITIALIZER(no, base, size) {no, base, size, flash_sec_erase, flash_sec_write, flash_sec_write_bytes} 32 | -------------------------------------------------------------------------------- /doc/cfg_storage.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olegv142/stm32-config/862d30cbf3f107a3a15593e94419a7f0a7a6d8ee/doc/cfg_storage.pdf -------------------------------------------------------------------------------- /msp430/cfg_test.c: -------------------------------------------------------------------------------- 1 | #include "cfg_storage.h" 2 | #include "debug.h" 3 | #include "flash.h" 4 | #include 5 | 6 | static inline void LED_On(void) 7 | { 8 | P1OUT |= BIT0; 9 | } 10 | 11 | static inline void LED_Off(void) 12 | { 13 | P1OUT &= ~BIT0; 14 | } 15 | 16 | // Setup timer to power down the board. The timer clock is ~12KHz. 17 | // We connect timer output (TA0.1 - P1.6) to the ground and pass power 18 | // through 510 ohm resistor so after timer expiration the timer just 19 | // trigger power down. 20 | // 21 | static inline void timer_start(unsigned clocks) 22 | { 23 | TACCR1 = clocks; 24 | TACTL = TASSEL_1 + MC_2; // ACLK counting up 25 | } 26 | 27 | // Count segments from the flash end since the start of the flash depends on the capacity 28 | #define SEC_BASE(n) (0x10000ULL-(n+1)*FLASH_SEG_SZ) 29 | 30 | __no_init __root uint8_t const cfg_sec_1[FLASH_SEG_SZ] @ SEC_BASE(1); 31 | __no_init __root uint8_t const cfg_sec_2[FLASH_SEG_SZ] @ SEC_BASE(2); 32 | __no_init __root uint8_t const cfg_sec_3[FLASH_SEG_SZ] @ SEC_BASE(3); 33 | __no_init __root uint8_t const cfg_sec_4[FLASH_SEG_SZ] @ SEC_BASE(4); 34 | 35 | struct flash_sec const cfg_pool_sec[2] = { 36 | FLASH_SEC_INITIALIZER(1, SEC_BASE(1), FLASH_SEG_SZ), 37 | FLASH_SEC_INITIALIZER(2, SEC_BASE(2), FLASH_SEG_SZ) 38 | }; 39 | 40 | struct flash_sec const cfg_stor_sec[2] = { 41 | FLASH_SEC_INITIALIZER(3, SEC_BASE(3), FLASH_SEG_SZ), 42 | FLASH_SEC_INITIALIZER(4, SEC_BASE(4), FLASH_SEG_SZ) 43 | }; 44 | 45 | __no_init struct cfg_pool cfg_pool[2]; 46 | __no_init struct cfg_storage cfg_stor; 47 | 48 | typedef unsigned long test_cnt_t; 49 | 50 | // The test is incrementing counter and write it to several storages 51 | // comparing the results after each write and on the system start. 52 | struct test_item { 53 | test_cnt_t cnt; 54 | }; 55 | 56 | struct test_item cfg_t = {0}; 57 | 58 | __no_init unsigned cfg_last_writes; 59 | 60 | #define TOUT_PRIME 3571 61 | #define TOUT_DEF 10000 62 | #define MAX_WRITES 1000000 63 | #define REPEAT_READS 8 64 | 65 | void test_stop(void) 66 | { 67 | LED_On(); 68 | for (;;) __no_operation(); 69 | } 70 | 71 | void cfg_test(void) 72 | { 73 | int res; 74 | test_cnt_t cnt = 0; 75 | unsigned tout = TOUT_DEF; 76 | struct test_item const *p_last[2], *s_last; 77 | 78 | res = cfg_pool_init(&cfg_pool[0], sizeof(struct test_item), &cfg_pool_sec[0]); BUG_ON(res); 79 | res = cfg_pool_init(&cfg_pool[1], sizeof(struct test_item), &cfg_pool_sec[1]); BUG_ON(res); 80 | 81 | p_last[0] = cfg_pool_get(&cfg_pool[0]); 82 | p_last[1] = cfg_pool_get(&cfg_pool[1]); 83 | 84 | if (p_last[0]) { 85 | cnt = p_last[0]->cnt; 86 | tout = cnt * TOUT_PRIME; 87 | } else if (p_last[1]) { 88 | cnt = p_last[1]->cnt; 89 | tout = cnt * TOUT_PRIME; 90 | } 91 | 92 | if (!cfg_last_writes && tout < TOUT_DEF) { 93 | // Avoid situation when the timer is constantly firing 94 | // before we have a chance to update test counter 95 | tout = TOUT_DEF; 96 | } 97 | 98 | cfg_last_writes = 0; 99 | timer_start(tout); 100 | 101 | res = cfg_stor_init(&cfg_stor, sizeof(struct test_item), cfg_stor_sec); BUG_ON(res); 102 | s_last = cfg_stor_get(&cfg_stor); 103 | 104 | if (s_last) { 105 | int i; 106 | cfg_t.cnt = s_last->cnt; 107 | BUG_ON(!p_last[0] && !p_last[1]); 108 | BUG_ON(cnt != cfg_t.cnt && cnt != (test_cnt_t)(cfg_t.cnt + 1)); 109 | if (cfg_t.cnt >= MAX_WRITES) { 110 | test_stop(); 111 | } 112 | for (i = 0; i < REPEAT_READS; ++i) { 113 | res = cfg_stor_init(&cfg_stor, sizeof(struct test_item), cfg_stor_sec); BUG_ON(res); 114 | s_last = cfg_stor_get(&cfg_stor); 115 | BUG_ON(!s_last || cfg_t.cnt != s_last->cnt); 116 | } 117 | } else { 118 | // starting with empty flash 119 | cfg_t.cnt = 0; 120 | BUG_ON(p_last[0] || p_last[1]); 121 | } 122 | 123 | for (;;) { 124 | res = cfg_pool_commit(&cfg_pool[0], &cfg_t); BUG_ON(res); 125 | res = cfg_pool_commit(&cfg_pool[1], &cfg_t); BUG_ON(res); 126 | res = cfg_stor_commit(&cfg_stor, &cfg_t); BUG_ON(res); 127 | p_last[0] = cfg_pool_get(&cfg_pool[0]); 128 | p_last[1] = cfg_pool_get(&cfg_pool[1]); 129 | s_last = cfg_stor_get(&cfg_stor); 130 | BUG_ON(!p_last[0]); 131 | BUG_ON(!p_last[1]); 132 | BUG_ON(!s_last); 133 | BUG_ON(p_last[0]->cnt != cfg_t.cnt); 134 | BUG_ON(p_last[1]->cnt != cfg_t.cnt); 135 | BUG_ON(s_last->cnt != cfg_t.cnt); 136 | ++cfg_t.cnt; 137 | ++cfg_last_writes; 138 | } 139 | } 140 | 141 | void main(void) 142 | { 143 | WDTCTL = WDTPW + WDTHOLD; // Stop WDT 144 | BCSCTL3 = LFXT1S_2; // Enable VLO as ACLK source 145 | 146 | P1OUT = 0; // Reset outputs 147 | P1DIR = BIT0|BIT6; // LEDs pins output mode 148 | P1SEL = BIT6; // TA0.1 -> P1.6 149 | TACCTL1 = OUTMOD_1;// Set timer out mode 150 | 151 | LED_On(); 152 | __delay_cycles(50000); 153 | LED_Off(); 154 | 155 | cfg_test(); 156 | } 157 | 158 | void assertion_failed(const char* file, unsigned line) 159 | { 160 | if (!(P1IN & BIT6)) { 161 | P1SEL = 0; // Disconnect timer to prevent powering down 162 | } 163 | for (;;) { 164 | // Fast blinking red LED 165 | LED_On(); 166 | __delay_cycles(70000); 167 | LED_Off(); 168 | __delay_cycles(70000); 169 | } 170 | } 171 | -------------------------------------------------------------------------------- /msp430/cfg_test.eww: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | $WS_DIR$\cfg_test.ewp 6 | 7 | 8 | 9 | 10 | 11 | -------------------------------------------------------------------------------- /msp430/flash.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "io430.h" 4 | 5 | #define FLASH_SEG_SZ 512 6 | 7 | static inline void flash_unlock(void) 8 | { 9 | FCTL2 = FWKEY|FSSEL1|FN1; // Configure clock: SMCLK/3 (optimal for 1MHz clock) 10 | FCTL3 = FWKEY; // Clear Lock bit 11 | } 12 | 13 | static inline void flash_lock(void) 14 | { 15 | FCTL3 = FWKEY + LOCK; // Set Lock bit 16 | } 17 | 18 | static inline void flash_wr_enable(void) 19 | { 20 | FCTL1 = FWKEY + WRT; // Set Write bit 21 | } 22 | 23 | static inline void flash_wr_disable(void) 24 | { 25 | FCTL1 = FWKEY; // Clear Write bit 26 | } 27 | 28 | static inline void flash_wait(void) 29 | { 30 | // Since we are executing code from the flash wait is not required 31 | // The CPU just stops till operation completed 32 | // while (FCTL3 & BUSY) __no_operation(); 33 | } 34 | 35 | static inline void flash_erase(unsigned base, unsigned nsegs) 36 | { 37 | unsigned i; 38 | char *ptr = (char*)base; 39 | flash_wait(); 40 | flash_unlock(); 41 | for (i = 0; i < nsegs; ++i) { 42 | FCTL1 = FWKEY + ERASE; // Set Erase bit 43 | // Dummy write to erase segment 44 | *ptr = 0; 45 | ptr += FLASH_SEG_SZ; 46 | flash_wait(); 47 | } 48 | flash_lock(); 49 | } 50 | 51 | // Here we are expecting the address to be aligned but the size may be not 52 | static inline void flash_write(unsigned addr, void const* data, unsigned sz) 53 | { 54 | flash_wait(); 55 | flash_unlock(); 56 | flash_wr_enable(); 57 | for (; addr % sizeof(unsigned) && sz >= 1; sz -= 1, addr += 1) { 58 | // Write data to flash 59 | *(unsigned char*)addr = *(unsigned char const*)data; 60 | data = (unsigned char const*)data + 1; 61 | flash_wait(); 62 | } 63 | for (; sz >= sizeof(unsigned); sz -= sizeof(unsigned), addr += sizeof(unsigned)) { 64 | // Write data to flash 65 | *(unsigned*)addr = *(unsigned const*)data; 66 | data = (unsigned const*)data + 1; 67 | flash_wait(); 68 | } 69 | for (; sz >= 1; sz -= 1, addr += 1) { 70 | // Write data to flash 71 | *(unsigned char*)addr = *(unsigned char const*)data; 72 | data = (unsigned char const*)data + 1; 73 | flash_wait(); 74 | } 75 | flash_wr_disable(); 76 | flash_lock(); 77 | } 78 | 79 | // Here we are expecting the address to be aligned but the size may be not 80 | static inline void flash_write_bytes(unsigned addr, void const* data, unsigned sz) 81 | { 82 | flash_wait(); 83 | flash_unlock(); 84 | flash_wr_enable(); 85 | for (; sz >= 1; sz -= 1, addr += 1) { 86 | // Write data to flash 87 | *(unsigned char*)addr = *(unsigned char const*)data; 88 | data = (unsigned char const*)data + 1; 89 | flash_wait(); 90 | } 91 | flash_wr_disable(); 92 | flash_lock(); 93 | } 94 | -------------------------------------------------------------------------------- /msp430/flash_sec.c: -------------------------------------------------------------------------------- 1 | #include "flash_sec.h" 2 | #include "flash.h" 3 | 4 | int flash_sec_erase(struct flash_sec const* sec) 5 | { 6 | flash_erase(sec->base, 1); 7 | return 0; 8 | } 9 | 10 | int flash_sec_write(struct flash_sec const* sec, unsigned off, void const* data, unsigned sz) 11 | { 12 | flash_write(sec->base + off, data, sz); 13 | return 0; 14 | } 15 | 16 | int flash_sec_write_bytes(struct flash_sec const* sec, unsigned off, void const* data, unsigned sz) 17 | { 18 | flash_write_bytes(sec->base + off, data, sz); 19 | return 0; 20 | } 21 | 22 | -------------------------------------------------------------------------------- /stm32/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xc.h: -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- /stm32/Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f4xx.h 4 | * @author MCD Application Team 5 | * @version V2.3.0 6 | * @date 02-March-2015 7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2015 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /** @addtogroup CMSIS 39 | * @{ 40 | */ 41 | 42 | /** @addtogroup stm32f4xx_system 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @brief Define to prevent recursive inclusion 48 | */ 49 | #ifndef __SYSTEM_STM32F4XX_H 50 | #define __SYSTEM_STM32F4XX_H 51 | 52 | #ifdef __cplusplus 53 | extern "C" { 54 | #endif 55 | 56 | /** @addtogroup STM32F4xx_System_Includes 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | 65 | /** @addtogroup STM32F4xx_System_Exported_types 66 | * @{ 67 | */ 68 | /* This variable is updated in three ways: 69 | 1) by calling CMSIS function SystemCoreClockUpdate() 70 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 71 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 72 | Note: If you use this function to configure the system clock; then there 73 | is no need to call the 2 first functions listed above, since SystemCoreClock 74 | variable is updated automatically. 75 | */ 76 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 77 | 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /** @addtogroup STM32F4xx_System_Exported_Constants 84 | * @{ 85 | */ 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | /** @addtogroup STM32F4xx_System_Exported_Macros 92 | * @{ 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /** @addtogroup STM32F4xx_System_Exported_Functions 100 | * @{ 101 | */ 102 | 103 | extern void SystemInit(void); 104 | extern void SystemCoreClockUpdate(void); 105 | /** 106 | * @} 107 | */ 108 | 109 | #ifdef __cplusplus 110 | } 111 | #endif 112 | 113 | #endif /*__SYSTEM_STM32F4XX_H */ 114 | 115 | /** 116 | * @} 117 | */ 118 | 119 | /** 120 | * @} 121 | */ 122 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 123 | -------------------------------------------------------------------------------- /stm32/Drivers/CMSIS/Include/arm_common_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 31. July 2014 5 | * $Revision: V1.4.4 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_common_tables.h 9 | * 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 11 | * 12 | * Target Processor: Cortex-M4/Cortex-M3 13 | * 14 | * Redistribution and use in source and binary forms, with or without 15 | * modification, are permitted provided that the following conditions 16 | * are met: 17 | * - Redistributions of source code must retain the above copyright 18 | * notice, this list of conditions and the following disclaimer. 19 | * - Redistributions in binary form must reproduce the above copyright 20 | * notice, this list of conditions and the following disclaimer in 21 | * the documentation and/or other materials provided with the 22 | * distribution. 23 | * - Neither the name of ARM LIMITED nor the names of its contributors 24 | * may be used to endorse or promote products derived from this 25 | * software without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * -------------------------------------------------------------------- */ 40 | 41 | #ifndef _ARM_COMMON_TABLES_H 42 | #define _ARM_COMMON_TABLES_H 43 | 44 | #include "arm_math.h" 45 | 46 | extern const uint16_t armBitRevTable[1024]; 47 | extern const q15_t armRecipTableQ15[64]; 48 | extern const q31_t armRecipTableQ31[64]; 49 | //extern const q31_t realCoefAQ31[1024]; 50 | //extern const q31_t realCoefBQ31[1024]; 51 | extern const float32_t twiddleCoef_16[32]; 52 | extern const float32_t twiddleCoef_32[64]; 53 | extern const float32_t twiddleCoef_64[128]; 54 | extern const float32_t twiddleCoef_128[256]; 55 | extern const float32_t twiddleCoef_256[512]; 56 | extern const float32_t twiddleCoef_512[1024]; 57 | extern const float32_t twiddleCoef_1024[2048]; 58 | extern const float32_t twiddleCoef_2048[4096]; 59 | extern const float32_t twiddleCoef_4096[8192]; 60 | #define twiddleCoef twiddleCoef_4096 61 | extern const q31_t twiddleCoef_16_q31[24]; 62 | extern const q31_t twiddleCoef_32_q31[48]; 63 | extern const q31_t twiddleCoef_64_q31[96]; 64 | extern const q31_t twiddleCoef_128_q31[192]; 65 | extern const q31_t twiddleCoef_256_q31[384]; 66 | extern const q31_t twiddleCoef_512_q31[768]; 67 | extern const q31_t twiddleCoef_1024_q31[1536]; 68 | extern const q31_t twiddleCoef_2048_q31[3072]; 69 | extern const q31_t twiddleCoef_4096_q31[6144]; 70 | extern const q15_t twiddleCoef_16_q15[24]; 71 | extern const q15_t twiddleCoef_32_q15[48]; 72 | extern const q15_t twiddleCoef_64_q15[96]; 73 | extern const q15_t twiddleCoef_128_q15[192]; 74 | extern const q15_t twiddleCoef_256_q15[384]; 75 | extern const q15_t twiddleCoef_512_q15[768]; 76 | extern const q15_t twiddleCoef_1024_q15[1536]; 77 | extern const q15_t twiddleCoef_2048_q15[3072]; 78 | extern const q15_t twiddleCoef_4096_q15[6144]; 79 | extern const float32_t twiddleCoef_rfft_32[32]; 80 | extern const float32_t twiddleCoef_rfft_64[64]; 81 | extern const float32_t twiddleCoef_rfft_128[128]; 82 | extern const float32_t twiddleCoef_rfft_256[256]; 83 | extern const float32_t twiddleCoef_rfft_512[512]; 84 | extern const float32_t twiddleCoef_rfft_1024[1024]; 85 | extern const float32_t twiddleCoef_rfft_2048[2048]; 86 | extern const float32_t twiddleCoef_rfft_4096[4096]; 87 | 88 | 89 | /* floating-point bit reversal tables */ 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) 99 | 100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; 101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; 102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; 103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; 104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; 105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; 106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; 107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; 108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; 109 | 110 | /* fixed-point bit reversal tables */ 111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) 112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) 113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) 114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) 115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) 116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) 117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) 118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) 119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) 120 | 121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; 122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; 123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; 124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; 125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; 126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; 127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; 128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; 129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; 130 | 131 | /* Tables for Fast Math Sine and Cosine */ 132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; 133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; 134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; 135 | 136 | #endif /* ARM_COMMON_TABLES_H */ 137 | -------------------------------------------------------------------------------- /stm32/Drivers/CMSIS/Include/arm_const_structs.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 31. July 2014 5 | * $Revision: V1.4.4 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_const_structs.h 9 | * 10 | * Description: This file has constant structs that are initialized for 11 | * user convenience. For example, some can be given as 12 | * arguments to the arm_cfft_f32() function. 13 | * 14 | * Target Processor: Cortex-M4/Cortex-M3 15 | * 16 | * Redistribution and use in source and binary forms, with or without 17 | * modification, are permitted provided that the following conditions 18 | * are met: 19 | * - Redistributions of source code must retain the above copyright 20 | * notice, this list of conditions and the following disclaimer. 21 | * - Redistributions in binary form must reproduce the above copyright 22 | * notice, this list of conditions and the following disclaimer in 23 | * the documentation and/or other materials provided with the 24 | * distribution. 25 | * - Neither the name of ARM LIMITED nor the names of its contributors 26 | * may be used to endorse or promote products derived from this 27 | * software without specific prior written permission. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 | * POSSIBILITY OF SUCH DAMAGE. 41 | * -------------------------------------------------------------------- */ 42 | 43 | #ifndef _ARM_CONST_STRUCTS_H 44 | #define _ARM_CONST_STRUCTS_H 45 | 46 | #include "arm_math.h" 47 | #include "arm_common_tables.h" 48 | 49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; 50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; 51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; 52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; 53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; 54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; 55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; 56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; 57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; 58 | 59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; 60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; 61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; 62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; 63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; 64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; 65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; 66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; 67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; 68 | 69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; 70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; 71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; 72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; 73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; 74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; 75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; 76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; 77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; 78 | 79 | #endif 80 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 09-March-2015 7 | * @brief This file contains all the functions prototypes for the HAL 8 | * module driver. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT(c) 2015 STMicroelectronics

13 | * 14 | * Redistribution and use in source and binary forms, with or without modification, 15 | * are permitted provided that the following conditions are met: 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 22 | * may be used to endorse or promote products derived from this software 23 | * without specific prior written permission. 24 | * 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 | * 36 | ****************************************************************************** 37 | */ 38 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ 40 | #ifndef __STM32F4xx_HAL_H 41 | #define __STM32F4xx_HAL_H 42 | 43 | #ifdef __cplusplus 44 | extern "C" { 45 | #endif 46 | 47 | /* Includes ------------------------------------------------------------------*/ 48 | #include "stm32f4xx_hal_conf.h" 49 | 50 | /** @addtogroup STM32F4xx_HAL_Driver 51 | * @{ 52 | */ 53 | 54 | /** @addtogroup HAL 55 | * @{ 56 | */ 57 | 58 | /* Exported types ------------------------------------------------------------*/ 59 | /* Exported constants --------------------------------------------------------*/ 60 | /* Exported macro ------------------------------------------------------------*/ 61 | /** @defgroup HAL_Exported_Macros HAL Exported Macros 62 | * @{ 63 | */ 64 | 65 | /** @brief Freeze/Unfreeze Peripherals in Debug mode 66 | */ 67 | #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP)) 68 | #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP)) 69 | #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP)) 70 | #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP)) 71 | #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP)) 72 | #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP)) 73 | #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP)) 74 | #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP)) 75 | #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP)) 76 | #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP)) 77 | #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP)) 78 | #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP)) 79 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) 80 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) 81 | #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) 82 | #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP)) 83 | #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP)) 84 | #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP)) 85 | #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP)) 86 | #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP)) 87 | #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP)) 88 | #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP)) 89 | 90 | #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP)) 91 | #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP)) 92 | #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP)) 93 | #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP)) 94 | #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP)) 95 | #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP)) 96 | #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP)) 97 | #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP)) 98 | #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP)) 99 | #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP)) 100 | #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP)) 101 | #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP)) 102 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) 103 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) 104 | #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) 105 | #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP)) 106 | #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP)) 107 | #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP)) 108 | #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP)) 109 | #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP)) 110 | #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP)) 111 | #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP)) 112 | 113 | /** @brief Main Flash memory mapped at 0x00000000 114 | */ 115 | #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE)) 116 | 117 | /** @brief System Flash memory mapped at 0x00000000 118 | */ 119 | #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 120 | SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\ 121 | }while(0); 122 | 123 | /** @brief Embedded SRAM mapped at 0x00000000 124 | */ 125 | #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 126 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\ 127 | }while(0); 128 | 129 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) 130 | /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 131 | */ 132 | #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 133 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ 134 | }while(0); 135 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ 136 | 137 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) 138 | /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 139 | */ 140 | #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 141 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ 142 | }while(0); 143 | 144 | /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000 145 | */ 146 | #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 147 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\ 148 | }while(0); 149 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 150 | /** 151 | * @} 152 | */ 153 | 154 | /* Exported functions --------------------------------------------------------*/ 155 | /** @addtogroup HAL_Exported_Functions 156 | * @{ 157 | */ 158 | /** @addtogroup HAL_Exported_Functions_Group1 159 | * @{ 160 | */ 161 | /* Initialization and de-initialization functions ******************************/ 162 | HAL_StatusTypeDef HAL_Init(void); 163 | HAL_StatusTypeDef HAL_DeInit(void); 164 | void HAL_MspInit(void); 165 | void HAL_MspDeInit(void); 166 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); 167 | /** 168 | * @} 169 | */ 170 | 171 | /** @addtogroup HAL_Exported_Functions_Group2 172 | * @{ 173 | */ 174 | /* Peripheral Control functions ************************************************/ 175 | void HAL_IncTick(void); 176 | void HAL_Delay(__IO uint32_t Delay); 177 | uint32_t HAL_GetTick(void); 178 | void HAL_SuspendTick(void); 179 | void HAL_ResumeTick(void); 180 | uint32_t HAL_GetHalVersion(void); 181 | uint32_t HAL_GetREVID(void); 182 | uint32_t HAL_GetDEVID(void); 183 | void HAL_DBGMCU_EnableDBGSleepMode(void); 184 | void HAL_DBGMCU_DisableDBGSleepMode(void); 185 | void HAL_DBGMCU_EnableDBGStopMode(void); 186 | void HAL_DBGMCU_DisableDBGStopMode(void); 187 | void HAL_DBGMCU_EnableDBGStandbyMode(void); 188 | void HAL_DBGMCU_DisableDBGStandbyMode(void); 189 | void HAL_EnableCompensationCell(void); 190 | void HAL_DisableCompensationCell(void); 191 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) 192 | void HAL_EnableMemorySwappingBank(void); 193 | void HAL_DisableMemorySwappingBank(void); 194 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 195 | /** 196 | * @} 197 | */ 198 | 199 | /** 200 | * @} 201 | */ 202 | /* Private types -------------------------------------------------------------*/ 203 | /* Private variables ---------------------------------------------------------*/ 204 | /** @defgroup HAL_Private_Variables HAL Private Variables 205 | * @{ 206 | */ 207 | /** 208 | * @} 209 | */ 210 | /* Private constants ---------------------------------------------------------*/ 211 | /** @defgroup HAL_Private_Constants HAL Private Constants 212 | * @{ 213 | */ 214 | /** 215 | * @} 216 | */ 217 | /* Private macros ------------------------------------------------------------*/ 218 | /* Private functions ---------------------------------------------------------*/ 219 | /** 220 | * @} 221 | */ 222 | 223 | /** 224 | * @} 225 | */ 226 | 227 | #ifdef __cplusplus 228 | } 229 | #endif 230 | 231 | #endif /* __STM32F4xx_HAL_H */ 232 | 233 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 234 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_cortex.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 09-March-2015 7 | * @brief Header file of CORTEX HAL module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2015 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F4xx_HAL_CORTEX_H 40 | #define __STM32F4xx_HAL_CORTEX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hal_def.h" 48 | 49 | /** @addtogroup STM32F4xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @addtogroup CORTEX 54 | * @{ 55 | */ 56 | /* Exported types ------------------------------------------------------------*/ 57 | /* Exported constants --------------------------------------------------------*/ 58 | 59 | /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants 60 | * @{ 61 | */ 62 | 63 | /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group 64 | * @{ 65 | */ 66 | #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bits for pre-emption priority 67 | 4 bits for subpriority */ 68 | #define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bits for pre-emption priority 69 | 3 bits for subpriority */ 70 | #define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority 71 | 2 bits for subpriority */ 72 | #define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority 73 | 1 bits for subpriority */ 74 | #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority 75 | 0 bits for subpriority */ 76 | /** 77 | * @} 78 | */ 79 | 80 | /** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source 81 | * @{ 82 | */ 83 | #define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000) 84 | #define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004) 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | 95 | /* Exported Macros -----------------------------------------------------------*/ 96 | /** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros 97 | * @{ 98 | */ 99 | 100 | /** @brief Configures the SysTick clock source. 101 | * @param __CLKSRC__: specifies the SysTick clock source. 102 | * This parameter can be one of the following values: 103 | * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. 104 | * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. 105 | * @retval None 106 | */ 107 | #define __HAL_CORTEX_SYSTICKCLK_CONFIG(__CLKSRC__) \ 108 | do { \ 109 | if ((__CLKSRC__) == SYSTICK_CLKSOURCE_HCLK) \ 110 | { \ 111 | SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; \ 112 | } \ 113 | else \ 114 | SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; \ 115 | } while(0) 116 | /** 117 | * @} 118 | */ 119 | 120 | /* Exported functions --------------------------------------------------------*/ 121 | /** @addtogroup CORTEX_Exported_Functions 122 | * @{ 123 | */ 124 | 125 | /** @addtogroup CORTEX_Exported_Functions_Group1 126 | * @{ 127 | */ 128 | /* Initialization and de-initialization functions *****************************/ 129 | void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup); 130 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority); 131 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); 132 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); 133 | void HAL_NVIC_SystemReset(void); 134 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @addtogroup CORTEX_Exported_Functions_Group2 140 | * @{ 141 | */ 142 | /* Peripheral Control functions ***********************************************/ 143 | uint32_t HAL_NVIC_GetPriorityGrouping(void); 144 | void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority); 145 | uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); 146 | void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn); 147 | void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); 148 | uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn); 149 | void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); 150 | void HAL_SYSTICK_IRQHandler(void); 151 | void HAL_SYSTICK_Callback(void); 152 | /** 153 | * @} 154 | */ 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /* Private types -------------------------------------------------------------*/ 161 | /* Private variables ---------------------------------------------------------*/ 162 | /* Private constants ---------------------------------------------------------*/ 163 | /* Private macros ------------------------------------------------------------*/ 164 | /** @defgroup CORTEX_Private_Macros CORTEX Private Macros 165 | * @{ 166 | */ 167 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \ 168 | ((GROUP) == NVIC_PRIORITYGROUP_1) || \ 169 | ((GROUP) == NVIC_PRIORITYGROUP_2) || \ 170 | ((GROUP) == NVIC_PRIORITYGROUP_3) || \ 171 | ((GROUP) == NVIC_PRIORITYGROUP_4)) 172 | 173 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 174 | 175 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 176 | 177 | #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00) 178 | 179 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ 180 | ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) 181 | /** 182 | * @} 183 | */ 184 | 185 | /** 186 | * @} 187 | */ 188 | 189 | /** 190 | * @} 191 | */ 192 | 193 | #ifdef __cplusplus 194 | } 195 | #endif 196 | 197 | #endif /* __STM32F4xx_HAL_CORTEX_H */ 198 | 199 | 200 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 201 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olegv142/stm32-config/862d30cbf3f107a3a15593e94419a7f0a7a6d8ee/stm32/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_dma_ex.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 09-March-2015 7 | * @brief Header file of DMA HAL extension module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2015 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F4xx_HAL_DMA_EX_H 40 | #define __STM32F4xx_HAL_DMA_EX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hal_def.h" 48 | 49 | /** @addtogroup STM32F4xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @addtogroup DMAEx 54 | * @{ 55 | */ 56 | 57 | /* Exported types ------------------------------------------------------------*/ 58 | /** @defgroup DMAEx_Exported_Types DMAEx Exported Types 59 | * @brief DMAEx Exported types 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @brief HAL DMA Memory definition 65 | */ 66 | typedef enum 67 | { 68 | MEMORY0 = 0x00, /*!< Memory 0 */ 69 | MEMORY1 = 0x01, /*!< Memory 1 */ 70 | 71 | }HAL_DMA_MemoryTypeDef; 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /* Exported functions --------------------------------------------------------*/ 78 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions 79 | * @brief DMAEx Exported functions 80 | * @{ 81 | */ 82 | 83 | /** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions 84 | * @brief Extended features functions 85 | * @{ 86 | */ 87 | 88 | /* IO operation functions *******************************************************/ 89 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); 90 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); 91 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory); 92 | 93 | /** 94 | * @} 95 | */ 96 | /** 97 | * @} 98 | */ 99 | 100 | /* Private functions ---------------------------------------------------------*/ 101 | /** @defgroup DMAEx_Private_Functions DMAEx Private Functions 102 | * @brief DMAEx Private functions 103 | * @{ 104 | */ 105 | /** 106 | * @} 107 | */ 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | #ifdef __cplusplus 118 | } 119 | #endif 120 | 121 | #endif /*__STM32F4xx_HAL_DMA_EX_H*/ 122 | 123 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 124 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_flash_ramfunc.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 09-March-2015 7 | * @brief Header file of FLASH RAMFUNC driver. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2015 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H 40 | #define __STM32F4xx_FLASH_RAMFUNC_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | #if defined(STM32F411xE) || defined(STM32F446xx) 47 | 48 | /* Includes ------------------------------------------------------------------*/ 49 | #include "stm32f4xx_hal_def.h" 50 | 51 | /** @addtogroup STM32F4xx_HAL_Driver 52 | * @{ 53 | */ 54 | 55 | /** @addtogroup FLASHRAMFUNC 56 | * @{ 57 | */ 58 | 59 | /* Exported types ------------------------------------------------------------*/ 60 | /* Exported macro ------------------------------------------------------------*/ 61 | /* Exported functions --------------------------------------------------------*/ 62 | /** @addtogroup FLASHRAMFUNC_Exported_Functions 63 | * @{ 64 | */ 65 | 66 | /** @addtogroup FLASHRAMFUNC_Exported_Functions_Group1 67 | * @{ 68 | */ 69 | __RAM_FUNC HAL_FLASHEx_StopFlashInterfaceClk(void); 70 | __RAM_FUNC HAL_FLASHEx_StartFlashInterfaceClk(void); 71 | __RAM_FUNC HAL_FLASHEx_EnableFlashSleepMode(void); 72 | __RAM_FUNC HAL_FLASHEx_DisableFlashSleepMode(void); 73 | /** 74 | * @} 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | #endif /* STM32F411xE */ 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | #ifdef __cplusplus 91 | } 92 | #endif 93 | 94 | 95 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */ 96 | 97 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 98 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_iwdg.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 09-March-2015 7 | * @brief Header file of IWDG HAL module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2015 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F4xx_HAL_IWDG_H 40 | #define __STM32F4xx_HAL_IWDG_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hal_def.h" 48 | 49 | /** @addtogroup STM32F4xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @addtogroup IWDG 54 | * @{ 55 | */ 56 | 57 | /* Exported types ------------------------------------------------------------*/ 58 | /** @defgroup IWDG_Exported_Types IWDG Exported Types 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @brief IWDG HAL State Structure definition 64 | */ 65 | typedef enum 66 | { 67 | HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */ 68 | HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */ 69 | HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */ 70 | HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */ 71 | HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */ 72 | }HAL_IWDG_StateTypeDef; 73 | 74 | /** 75 | * @brief IWDG Init structure definition 76 | */ 77 | typedef struct 78 | { 79 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. 80 | This parameter can be a value of @ref IWDG_Prescaler */ 81 | 82 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. 83 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 84 | }IWDG_InitTypeDef; 85 | 86 | /** 87 | * @brief IWDG Handle Structure definition 88 | */ 89 | typedef struct 90 | { 91 | IWDG_TypeDef *Instance; /*!< Register base address */ 92 | 93 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ 94 | 95 | HAL_LockTypeDef Lock; /*!< IWDG Locking object */ 96 | 97 | __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */ 98 | }IWDG_HandleTypeDef; 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /* Exported constants --------------------------------------------------------*/ 105 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants 106 | * @{ 107 | */ 108 | 109 | /** @defgroup IWDG_Registers_BitMask IWDG Registers BitMask 110 | * @brief IWDG registers bit mask 111 | * @{ 112 | */ 113 | /* --- KR Register ---*/ 114 | /* KR register bit mask */ 115 | #define IWDG_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */ 116 | #define IWDG_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */ 117 | #define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */ 118 | #define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */ 119 | /** 120 | * @} 121 | */ 122 | 123 | /** @defgroup IWDG_Flag_definition IWDG Flag definition 124 | * @{ 125 | */ 126 | #define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update Flag */ 127 | #define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update Flag */ 128 | /** 129 | * @} 130 | */ 131 | 132 | /** @defgroup IWDG_Prescaler IWDG Prescaler 133 | * @{ 134 | */ 135 | #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */ 136 | #define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */ 137 | #define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */ 138 | #define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */ 139 | #define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */ 140 | #define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */ 141 | #define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */ 142 | /** 143 | * @} 144 | */ 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /* Exported macros -----------------------------------------------------------*/ 151 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros 152 | * @{ 153 | */ 154 | 155 | /** @brief Reset IWDG handle state 156 | * @param __HANDLE__: IWDG handle. 157 | * @retval None 158 | */ 159 | #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET) 160 | 161 | /** 162 | * @brief Enables the IWDG peripheral. 163 | * @param __HANDLE__: IWDG handle 164 | * @retval None 165 | */ 166 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 167 | 168 | /** 169 | * @brief Reloads IWDG counter with value defined in the reload register 170 | * (write access to IWDG_PR and IWDG_RLR registers disabled). 171 | * @param __HANDLE__: IWDG handle 172 | * @retval None 173 | */ 174 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 175 | 176 | /** 177 | * @brief Gets the selected IWDG's flag status. 178 | * @param __HANDLE__: IWDG handle 179 | * @param __FLAG__: specifies the flag to check. 180 | * This parameter can be one of the following values: 181 | * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag 182 | * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag 183 | * @retval The new state of __FLAG__ (TRUE or FALSE). 184 | */ 185 | #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | /* Exported functions --------------------------------------------------------*/ 192 | /** @addtogroup IWDG_Exported_Functions 193 | * @{ 194 | */ 195 | 196 | /** @addtogroup IWDG_Exported_Functions_Group1 197 | * @{ 198 | */ 199 | /* Initialization/de-initialization functions ********************************/ 200 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 201 | void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg); 202 | /** 203 | * @} 204 | */ 205 | 206 | /** @addtogroup IWDG_Exported_Functions_Group2 207 | * @{ 208 | */ 209 | /* I/O operation functions ****************************************************/ 210 | HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg); 211 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 212 | /** 213 | * @} 214 | */ 215 | 216 | /** @addtogroup IWDG_Exported_Functions_Group3 217 | * @{ 218 | */ 219 | /* Peripheral State functions ************************************************/ 220 | HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg); 221 | 222 | /** 223 | * @} 224 | */ 225 | 226 | /** 227 | * @} 228 | */ 229 | 230 | /* Private macro -------------------------------------------------------------*/ 231 | /** @defgroup IWDG_Private_Macros IWDG Private Macros 232 | * @{ 233 | */ 234 | 235 | /** 236 | * @brief Enables write access to IWDG_PR and IWDG_RLR registers. 237 | * @param __HANDLE__: IWDG handle 238 | * @retval None 239 | */ 240 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 241 | 242 | /** 243 | * @brief Disables write access to IWDG_PR and IWDG_RLR registers. 244 | * @param __HANDLE__: IWDG handle 245 | * @retval None 246 | */ 247 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 248 | 249 | 250 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 251 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 252 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 253 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 254 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 255 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 256 | ((__PRESCALER__) == IWDG_PRESCALER_256)) 257 | 258 | 259 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF) 260 | 261 | /** 262 | * @} 263 | */ 264 | 265 | /* Private define ------------------------------------------------------------*/ 266 | /** @defgroup IWDG_Private_Constants IWDG Private Constants 267 | * @{ 268 | */ 269 | 270 | /** 271 | * @} 272 | */ 273 | 274 | /** 275 | * @} 276 | */ 277 | 278 | /** 279 | * @} 280 | */ 281 | 282 | #ifdef __cplusplus 283 | } 284 | #endif 285 | 286 | #endif /* __STM32F4xx_HAL_IWDG_H */ 287 | 288 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 289 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_pcd_ex.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 09-March-2015 7 | * @brief Header file of PCD HAL module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2015 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F4xx_HAL_PCD_EX_H 40 | #define __STM32F4xx_HAL_PCD_EX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hal_def.h" 48 | 49 | /** @addtogroup STM32F4xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @addtogroup PCDEx 54 | * @{ 55 | */ 56 | /* Exported types ------------------------------------------------------------*/ 57 | #if defined(STM32F446xx) 58 | typedef enum 59 | { 60 | PCD_LPM_L0_ACTIVE = 0x00, /* on */ 61 | PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ 62 | }PCD_LPM_MsgTypeDef; 63 | #endif /* STM32F446xx */ 64 | 65 | /* Exported constants --------------------------------------------------------*/ 66 | /* Exported macros -----------------------------------------------------------*/ 67 | /* Exported functions --------------------------------------------------------*/ 68 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions 69 | * @{ 70 | */ 71 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 72 | * @{ 73 | */ 74 | HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size); 75 | HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); 76 | #if defined(STM32F446xx) 77 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); 78 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); 79 | void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); 80 | #endif /* STM32F446xx */ 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | #ifdef __cplusplus 99 | } 100 | #endif 101 | 102 | 103 | #endif /* __STM32F4xx_HAL_PCD_EX_H */ 104 | 105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 106 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_dma_ex.c 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 09-March-2015 7 | * @brief DMA Extension HAL module driver 8 | * This file provides firmware functions to manage the following 9 | * functionalities of the DMA Extension peripheral: 10 | * + Extended features functions 11 | * 12 | @verbatim 13 | ============================================================================== 14 | ##### How to use this driver ##### 15 | ============================================================================== 16 | [..] 17 | The DMA Extension HAL driver can be used as follows: 18 | (#) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function 19 | for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode. 20 | 21 | -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed. 22 | -@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default. 23 | -@- In Multi (Double) buffer mode, it is possible to update the base address for 24 | the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled. 25 | 26 | @endverbatim 27 | ****************************************************************************** 28 | * @attention 29 | * 30 | *

© COPYRIGHT(c) 2015 STMicroelectronics

31 | * 32 | * Redistribution and use in source and binary forms, with or without modification, 33 | * are permitted provided that the following conditions are met: 34 | * 1. Redistributions of source code must retain the above copyright notice, 35 | * this list of conditions and the following disclaimer. 36 | * 2. Redistributions in binary form must reproduce the above copyright notice, 37 | * this list of conditions and the following disclaimer in the documentation 38 | * and/or other materials provided with the distribution. 39 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 40 | * may be used to endorse or promote products derived from this software 41 | * without specific prior written permission. 42 | * 43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 44 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 45 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 46 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 47 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 48 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 49 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 50 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 51 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 | * 54 | ****************************************************************************** 55 | */ 56 | 57 | /* Includes ------------------------------------------------------------------*/ 58 | #include "stm32f4xx_hal.h" 59 | 60 | /** @addtogroup STM32F4xx_HAL_Driver 61 | * @{ 62 | */ 63 | 64 | /** @defgroup DMAEx DMAEx 65 | * @brief DMA Extended HAL module driver 66 | * @{ 67 | */ 68 | 69 | #ifdef HAL_DMA_MODULE_ENABLED 70 | 71 | /* Private types -------------------------------------------------------------*/ 72 | /* Private variables ---------------------------------------------------------*/ 73 | /* Private Constants ---------------------------------------------------------*/ 74 | /* Private macros ------------------------------------------------------------*/ 75 | /* Private functions ---------------------------------------------------------*/ 76 | /** @addtogroup DMAEx_Private_Functions 77 | * @{ 78 | */ 79 | static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); 80 | /** 81 | * @} 82 | */ 83 | 84 | /* Exported functions ---------------------------------------------------------*/ 85 | 86 | /** @addtogroup DMAEx_Exported_Functions 87 | * @{ 88 | */ 89 | 90 | 91 | /** @addtogroup DMAEx_Exported_Functions_Group1 92 | * 93 | @verbatim 94 | =============================================================================== 95 | ##### Extended features functions ##### 96 | =============================================================================== 97 | [..] This section provides functions allowing to: 98 | (+) Configure the source, destination address and data length and 99 | Start MultiBuffer DMA transfer 100 | (+) Configure the source, destination address and data length and 101 | Start MultiBuffer DMA transfer with interrupt 102 | (+) Change on the fly the memory0 or memory1 address. 103 | 104 | @endverbatim 105 | * @{ 106 | */ 107 | 108 | 109 | /** 110 | * @brief Starts the multi_buffer DMA Transfer. 111 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains 112 | * the configuration information for the specified DMA Stream. 113 | * @param SrcAddress: The source memory Buffer address 114 | * @param DstAddress: The destination memory Buffer address 115 | * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer 116 | * @param DataLength: The length of data to be transferred from source to destination 117 | * @retval HAL status 118 | */ 119 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength) 120 | { 121 | /* Process Locked */ 122 | __HAL_LOCK(hdma); 123 | 124 | /* Current memory buffer used is Memory 0 */ 125 | if((hdma->Instance->CR & DMA_SxCR_CT) == 0) 126 | { 127 | hdma->State = HAL_DMA_STATE_BUSY_MEM0; 128 | } 129 | /* Current memory buffer used is Memory 1 */ 130 | else if((hdma->Instance->CR & DMA_SxCR_CT) != 0) 131 | { 132 | hdma->State = HAL_DMA_STATE_BUSY_MEM1; 133 | } 134 | 135 | /* Check the parameters */ 136 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); 137 | 138 | /* Disable the peripheral */ 139 | __HAL_DMA_DISABLE(hdma); 140 | 141 | /* Enable the double buffer mode */ 142 | hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM; 143 | 144 | /* Configure DMA Stream destination address */ 145 | hdma->Instance->M1AR = SecondMemAddress; 146 | 147 | /* Configure the source, destination address and the data length */ 148 | DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength); 149 | 150 | /* Enable the peripheral */ 151 | __HAL_DMA_ENABLE(hdma); 152 | 153 | return HAL_OK; 154 | } 155 | 156 | /** 157 | * @brief Starts the multi_buffer DMA Transfer with interrupt enabled. 158 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 159 | * the configuration information for the specified DMA Stream. 160 | * @param SrcAddress: The source memory Buffer address 161 | * @param DstAddress: The destination memory Buffer address 162 | * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer 163 | * @param DataLength: The length of data to be transferred from source to destination 164 | * @retval HAL status 165 | */ 166 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength) 167 | { 168 | /* Process Locked */ 169 | __HAL_LOCK(hdma); 170 | 171 | /* Current memory buffer used is Memory 0 */ 172 | if((hdma->Instance->CR & DMA_SxCR_CT) == 0) 173 | { 174 | hdma->State = HAL_DMA_STATE_BUSY_MEM0; 175 | } 176 | /* Current memory buffer used is Memory 1 */ 177 | else if((hdma->Instance->CR & DMA_SxCR_CT) != 0) 178 | { 179 | hdma->State = HAL_DMA_STATE_BUSY_MEM1; 180 | } 181 | 182 | /* Check the parameters */ 183 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); 184 | 185 | /* Disable the peripheral */ 186 | __HAL_DMA_DISABLE(hdma); 187 | 188 | /* Enable the Double buffer mode */ 189 | hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM; 190 | 191 | /* Configure DMA Stream destination address */ 192 | hdma->Instance->M1AR = SecondMemAddress; 193 | 194 | /* Configure the source, destination address and the data length */ 195 | DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength); 196 | 197 | /* Enable the transfer complete interrupt */ 198 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC); 199 | 200 | /* Enable the Half transfer interrupt */ 201 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT); 202 | 203 | /* Enable the transfer Error interrupt */ 204 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE); 205 | 206 | /* Enable the fifo Error interrupt */ 207 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_FE); 208 | 209 | /* Enable the direct mode Error interrupt */ 210 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_DME); 211 | 212 | /* Enable the peripheral */ 213 | __HAL_DMA_ENABLE(hdma); 214 | 215 | return HAL_OK; 216 | } 217 | 218 | /** 219 | * @brief Change the memory0 or memory1 address on the fly. 220 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 221 | * the configuration information for the specified DMA Stream. 222 | * @param Address: The new address 223 | * @param memory: the memory to be changed, This parameter can be one of 224 | * the following values: 225 | * MEMORY0 / 226 | * MEMORY1 227 | * @note The MEMORY0 address can be changed only when the current transfer use 228 | * MEMORY1 and the MEMORY1 address can be changed only when the current 229 | * transfer use MEMORY0. 230 | * @retval HAL status 231 | */ 232 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory) 233 | { 234 | if(memory == MEMORY0) 235 | { 236 | /* change the memory0 address */ 237 | hdma->Instance->M0AR = Address; 238 | } 239 | else 240 | { 241 | /* change the memory1 address */ 242 | hdma->Instance->M1AR = Address; 243 | } 244 | 245 | return HAL_OK; 246 | } 247 | 248 | /** 249 | * @} 250 | */ 251 | 252 | /** 253 | * @} 254 | */ 255 | 256 | /** @addtogroup DMAEx_Private_Functions 257 | * @{ 258 | */ 259 | 260 | /** 261 | * @brief Set the DMA Transfer parameter. 262 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 263 | * the configuration information for the specified DMA Stream. 264 | * @param SrcAddress: The source memory Buffer address 265 | * @param DstAddress: The destination memory Buffer address 266 | * @param DataLength: The length of data to be transferred from source to destination 267 | * @retval HAL status 268 | */ 269 | static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) 270 | { 271 | /* Configure DMA Stream data length */ 272 | hdma->Instance->NDTR = DataLength; 273 | 274 | /* Peripheral to Memory */ 275 | if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 276 | { 277 | /* Configure DMA Stream destination address */ 278 | hdma->Instance->PAR = DstAddress; 279 | 280 | /* Configure DMA Stream source address */ 281 | hdma->Instance->M0AR = SrcAddress; 282 | } 283 | /* Memory to Peripheral */ 284 | else 285 | { 286 | /* Configure DMA Stream source address */ 287 | hdma->Instance->PAR = SrcAddress; 288 | 289 | /* Configure DMA Stream destination address */ 290 | hdma->Instance->M0AR = DstAddress; 291 | } 292 | } 293 | 294 | /** 295 | * @} 296 | */ 297 | 298 | #endif /* HAL_DMA_MODULE_ENABLED */ 299 | /** 300 | * @} 301 | */ 302 | 303 | /** 304 | * @} 305 | */ 306 | 307 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 308 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_flash_ramfunc.c 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 09-March-2015 7 | * @brief FLASH RAMFUNC module driver. 8 | * This file provides a FLASH firmware functions which should be 9 | * executed from internal SRAM 10 | * + Stop/Start the flash interface while System Run 11 | * + Enable/Disable the flash sleep while System Run 12 | @verbatim 13 | ============================================================================== 14 | ##### APIs executed from Internal RAM ##### 15 | ============================================================================== 16 | [..] 17 | *** ARM Compiler *** 18 | -------------------- 19 | [..] RAM functions are defined using the toolchain options. 20 | Functions that are be executed in RAM should reside in a separate 21 | source module. Using the 'Options for File' dialog you can simply change 22 | the 'Code / Const' area of a module to a memory space in physical RAM. 23 | Available memory areas are declared in the 'Target' tab of the 24 | Options for Target' dialog. 25 | 26 | *** ICCARM Compiler *** 27 | ----------------------- 28 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". 29 | 30 | *** GNU Compiler *** 31 | -------------------- 32 | [..] RAM functions are defined using a specific toolchain attribute 33 | "__attribute__((section(".RamFunc")))". 34 | 35 | @endverbatim 36 | ****************************************************************************** 37 | * @attention 38 | * 39 | *

© COPYRIGHT(c) 2015 STMicroelectronics

40 | * 41 | * Redistribution and use in source and binary forms, with or without modification, 42 | * are permitted provided that the following conditions are met: 43 | * 1. Redistributions of source code must retain the above copyright notice, 44 | * this list of conditions and the following disclaimer. 45 | * 2. Redistributions in binary form must reproduce the above copyright notice, 46 | * this list of conditions and the following disclaimer in the documentation 47 | * and/or other materials provided with the distribution. 48 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 49 | * may be used to endorse or promote products derived from this software 50 | * without specific prior written permission. 51 | * 52 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 53 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 55 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 56 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 58 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 59 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 60 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 | * 63 | ****************************************************************************** 64 | */ 65 | 66 | /* Includes ------------------------------------------------------------------*/ 67 | #include "stm32f4xx_hal.h" 68 | 69 | /** @addtogroup STM32F4xx_HAL_Driver 70 | * @{ 71 | */ 72 | 73 | /** @defgroup FLASHRAMFUNC FLASH RAMFUNC 74 | * @brief FLASH functions executed from RAM 75 | * @{ 76 | */ 77 | 78 | #ifdef HAL_FLASH_MODULE_ENABLED 79 | 80 | #if defined(STM32F411xE) || defined(STM32F446xx) 81 | 82 | /* Private typedef -----------------------------------------------------------*/ 83 | /* Private define ------------------------------------------------------------*/ 84 | /* Private macro -------------------------------------------------------------*/ 85 | /* Private variables ---------------------------------------------------------*/ 86 | /* Private function prototypes -----------------------------------------------*/ 87 | /* Exported functions --------------------------------------------------------*/ 88 | /** @defgroup FLASHRAMFUNC_Exported_Functions FLASH RAMFUNC Exported Functions 89 | * @{ 90 | */ 91 | 92 | /** @defgroup FLASHRAMFUNC_Exported_Functions_Group1 Peripheral features functions executed from internal RAM 93 | * @brief Peripheral Extended features functions 94 | * 95 | @verbatim 96 | 97 | =============================================================================== 98 | ##### ramfunc functions ##### 99 | =============================================================================== 100 | [..] 101 | This subsection provides a set of functions that should be executed from RAM 102 | transfers. 103 | 104 | @endverbatim 105 | * @{ 106 | */ 107 | 108 | /** 109 | * @brief Stop the flash interface while System Run 110 | * @note This mode is only available for STM32F411xx devices. 111 | * @note This mode couldn't be set while executing with the flash itself. 112 | * It should be done with specific routine executed from RAM. 113 | * @retval None 114 | */ 115 | __RAM_FUNC HAL_FLASHEx_StopFlashInterfaceClk(void) 116 | { 117 | /* Enable Power ctrl clock */ 118 | __HAL_RCC_PWR_CLK_ENABLE(); 119 | /* Stop the flash interface while System Run */ 120 | SET_BIT(PWR->CR, PWR_CR_FISSR); 121 | 122 | return HAL_OK; 123 | } 124 | 125 | /** 126 | * @brief Start the flash interface while System Run 127 | * @note This mode is only available for STM32F411xx devices. 128 | * @note This mode couldn't be set while executing with the flash itself. 129 | * It should be done with specific routine executed from RAM. 130 | * @retval None 131 | */ 132 | __RAM_FUNC HAL_FLASHEx_StartFlashInterfaceClk(void) 133 | { 134 | /* Enable Power ctrl clock */ 135 | __HAL_RCC_PWR_CLK_ENABLE(); 136 | /* Start the flash interface while System Run */ 137 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR); 138 | 139 | return HAL_OK; 140 | } 141 | 142 | /** 143 | * @brief Enable the flash sleep while System Run 144 | * @note This mode is only available for STM32F411xx devices. 145 | * @note This mode could n't be set while executing with the flash itself. 146 | * It should be done with specific routine executed from RAM. 147 | * @retval None 148 | */ 149 | __RAM_FUNC HAL_FLASHEx_EnableFlashSleepMode(void) 150 | { 151 | /* Enable Power ctrl clock */ 152 | __HAL_RCC_PWR_CLK_ENABLE(); 153 | /* Enable the flash sleep while System Run */ 154 | SET_BIT(PWR->CR, PWR_CR_FMSSR); 155 | 156 | return HAL_OK; 157 | } 158 | 159 | /** 160 | * @brief Disable the flash sleep while System Run 161 | * @note This mode is only available for STM32F411xx devices. 162 | * @note This mode couldn't be set while executing with the flash itself. 163 | * It should be done with specific routine executed from RAM. 164 | * @retval None 165 | */ 166 | __RAM_FUNC HAL_FLASHEx_DisableFlashSleepMode(void) 167 | { 168 | /* Enable Power ctrl clock */ 169 | __HAL_RCC_PWR_CLK_ENABLE(); 170 | /* Disable the flash sleep while System Run */ 171 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR); 172 | 173 | return HAL_OK; 174 | } 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /** 181 | * @} 182 | */ 183 | 184 | #endif /* STM32F411xE || STM32F446xx */ 185 | #endif /* HAL_FLASH_MODULE_ENABLED */ 186 | /** 187 | * @} 188 | */ 189 | 190 | /** 191 | * @} 192 | */ 193 | 194 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 195 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_pcd_ex.c 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 09-March-2015 7 | * @brief PCD HAL module driver. 8 | * This file provides firmware functions to manage the following 9 | * functionalities of the USB Peripheral Controller: 10 | * + Extended features functions 11 | * 12 | ****************************************************************************** 13 | * @attention 14 | * 15 | *

© COPYRIGHT(c) 2015 STMicroelectronics

16 | * 17 | * Redistribution and use in source and binary forms, with or without modification, 18 | * are permitted provided that the following conditions are met: 19 | * 1. Redistributions of source code must retain the above copyright notice, 20 | * this list of conditions and the following disclaimer. 21 | * 2. Redistributions in binary form must reproduce the above copyright notice, 22 | * this list of conditions and the following disclaimer in the documentation 23 | * and/or other materials provided with the distribution. 24 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 25 | * may be used to endorse or promote products derived from this software 26 | * without specific prior written permission. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 29 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 31 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 32 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | * 39 | ****************************************************************************** 40 | */ 41 | 42 | /* Includes ------------------------------------------------------------------*/ 43 | #include "stm32f4xx_hal.h" 44 | 45 | /** @addtogroup STM32F4xx_HAL_Driver 46 | * @{ 47 | */ 48 | 49 | /** @defgroup PCDEx PCDEx 50 | * @brief PCD Extended HAL module driver 51 | * @{ 52 | */ 53 | #ifdef HAL_PCD_MODULE_ENABLED 54 | 55 | /* Private types -------------------------------------------------------------*/ 56 | /* Private variables ---------------------------------------------------------*/ 57 | /* Private constants ---------------------------------------------------------*/ 58 | /* Private macros ------------------------------------------------------------*/ 59 | /* Private functions ---------------------------------------------------------*/ 60 | /* Exported functions --------------------------------------------------------*/ 61 | 62 | /** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions 63 | * @{ 64 | */ 65 | 66 | /** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 67 | * @brief PCDEx control functions 68 | * 69 | @verbatim 70 | =============================================================================== 71 | ##### Extended features functions ##### 72 | =============================================================================== 73 | [..] This section provides functions allowing to: 74 | (+) Update FIFO configuration 75 | 76 | @endverbatim 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Set Tx FIFO 82 | * @param hpcd: PCD handle 83 | * @param fifo: The number of Tx fifo 84 | * @param size: Fifo size 85 | * @retval HAL status 86 | */ 87 | HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size) 88 | { 89 | uint8_t i = 0; 90 | uint32_t Tx_Offset = 0; 91 | 92 | /* TXn min size = 16 words. (n : Transmit FIFO index) 93 | When a TxFIFO is not used, the Configuration should be as follows: 94 | case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes) 95 | --> Txm can use the space allocated for Txn. 96 | case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes) 97 | --> Txn should be configured with the minimum space of 16 words 98 | The FIFO is used optimally when used TxFIFOs are allocated in the top 99 | of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. 100 | When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */ 101 | 102 | Tx_Offset = hpcd->Instance->GRXFSIZ; 103 | 104 | if(fifo == 0) 105 | { 106 | hpcd->Instance->DIEPTXF0_HNPTXFSIZ = (size << 16) | Tx_Offset; 107 | } 108 | else 109 | { 110 | Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16; 111 | for (i = 0; i < (fifo - 1); i++) 112 | { 113 | Tx_Offset += (hpcd->Instance->DIEPTXF[i] >> 16); 114 | } 115 | 116 | /* Multiply Tx_Size by 2 to get higher performance */ 117 | hpcd->Instance->DIEPTXF[fifo - 1] = (size << 16) | Tx_Offset; 118 | 119 | } 120 | 121 | return HAL_OK; 122 | } 123 | 124 | /** 125 | * @brief Set Rx FIFO 126 | * @param hpcd: PCD handle 127 | * @param size: Size of Rx fifo 128 | * @retval HAL status 129 | */ 130 | HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size) 131 | { 132 | hpcd->Instance->GRXFSIZ = size; 133 | 134 | return HAL_OK; 135 | } 136 | 137 | #if defined(STM32F446xx) 138 | /** 139 | * @brief HAL_PCDEx_ActivateLPM : active LPM Feature 140 | * @param hpcd: PCD handle 141 | * @retval HAL status 142 | */ 143 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) 144 | { 145 | USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 146 | 147 | hpcd->lpm_active = ENABLE; 148 | hpcd->LPM_State = LPM_L0; 149 | USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM; 150 | USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); 151 | 152 | return HAL_OK; 153 | } 154 | 155 | /** 156 | * @brief HAL_PCDEx_DeActivateLPM : de-active LPM feature 157 | * @param hpcd: PCD handle 158 | * @retval HAL status 159 | */ 160 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) 161 | { 162 | USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 163 | 164 | hpcd->lpm_active = DISABLE; 165 | USBx->GINTMSK &= ~USB_OTG_GINTMSK_LPMINTM; 166 | USBx->GLPMCFG &= ~(USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); 167 | 168 | return HAL_OK; 169 | } 170 | 171 | /** 172 | * @brief HAL_PCDEx_LPM_Callback : Send LPM message to user layer 173 | * @param hpcd: PCD handle 174 | * @param msg: LPM message 175 | * @retval HAL status 176 | */ 177 | __weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) 178 | { 179 | } 180 | #endif /* STM32F446xx */ 181 | 182 | /** 183 | * @} 184 | */ 185 | 186 | /** 187 | * @} 188 | */ 189 | 190 | #endif /* HAL_PCD_MODULE_ENABLED */ 191 | /** 192 | * @} 193 | */ 194 | 195 | /** 196 | * @} 197 | */ 198 | 199 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 200 | -------------------------------------------------------------------------------- /stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olegv142/stm32-config/862d30cbf3f107a3a15593e94419a7f0a7a6d8ee/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c -------------------------------------------------------------------------------- /stm32/EWARM/Project.eww: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | $WS_DIR$\config.ewp 5 | 6 | 7 | 8 | -------------------------------------------------------------------------------- /stm32/EWARM/stm32f405xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x2000; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /stm32/EWARM/stm32f405xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /stm32/Inc/cfg_test.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void cfg_test_pool(void); 4 | void cfg_test_storage(void); 5 | -------------------------------------------------------------------------------- /stm32/Inc/cli.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include 4 | 5 | int8_t cli_receive(uint8_t* Buf, uint32_t *Len); 6 | void cli_run(void); -------------------------------------------------------------------------------- /stm32/Inc/config.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void cfg_init(void); 4 | -------------------------------------------------------------------------------- /stm32/Inc/errors.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | typedef enum { 4 | err_ok = 0, 5 | err_proto = 5, 6 | err_cmd = 9, 7 | err_param = 10, 8 | err_state = 15, 9 | err_overheat = 20, 10 | err_power = 21, 11 | err_malfunction = 22, 12 | err_internal = 100, 13 | } err_t; 14 | -------------------------------------------------------------------------------- /stm32/Inc/flash.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | int flash_erase_sec(int sec_no); 4 | int flash_write(unsigned addr, void const* data, unsigned sz); 5 | int flash_write_bytes(unsigned addr, void const* data, unsigned sz); 6 | 7 | -------------------------------------------------------------------------------- /stm32/Inc/main.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "stm32f4xx_hal.h" 4 | 5 | extern IWDG_HandleTypeDef hiwdg; 6 | 7 | #define LED_PORT GPIOC 8 | #define LED_PIN GPIO_PIN_12 9 | 10 | void LED_On(void); 11 | void LED_Off(void); 12 | void LED_Toggle(void); 13 | -------------------------------------------------------------------------------- /stm32/Inc/stm32f4xx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_it.h 4 | * @brief This file contains the headers of the interrupt handlers. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2015 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | 34 | /* Define to prevent recursive inclusion -------------------------------------*/ 35 | #ifndef __STM32F4xx_IT_H 36 | #define __STM32F4xx_IT_H 37 | 38 | #ifdef __cplusplus 39 | extern "C" { 40 | #endif 41 | 42 | /* Includes ------------------------------------------------------------------*/ 43 | /* Exported types ------------------------------------------------------------*/ 44 | /* Exported constants --------------------------------------------------------*/ 45 | /* Exported macro ------------------------------------------------------------*/ 46 | /* Exported functions ------------------------------------------------------- */ 47 | 48 | void SysTick_Handler(void); 49 | void OTG_FS_IRQHandler(void); 50 | 51 | #ifdef __cplusplus 52 | } 53 | #endif 54 | 55 | #endif /* __STM32F4xx_IT_H */ 56 | 57 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 58 | -------------------------------------------------------------------------------- /stm32/Inc/usb_device.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file : USB_DEVICE 4 | * @version : v1.0_Cube 5 | * @brief : Header for usb_device file. 6 | ****************************************************************************** 7 | * COPYRIGHT(c) 2015 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | /* Define to prevent recursive inclusion -------------------------------------*/ 34 | #ifndef __usb_device_H 35 | #define __usb_device_H 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /* Includes ------------------------------------------------------------------*/ 41 | #include "stm32f4xx.h" 42 | #include "stm32f4xx_hal.h" 43 | #include "usbd_def.h" 44 | 45 | extern USBD_HandleTypeDef hUsbDeviceFS; 46 | 47 | /* USB_Device init function */ 48 | void MX_USB_DEVICE_Init(void); 49 | 50 | #ifdef __cplusplus 51 | } 52 | #endif 53 | #endif /*__usb_device_H */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** 60 | * @} 61 | */ 62 | 63 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 64 | -------------------------------------------------------------------------------- /stm32/Inc/usbd_cdc_if.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file : usbd_cdc_if.h 4 | * @brief : Header for usbd_cdc_if file. 5 | ****************************************************************************** 6 | * COPYRIGHT(c) 2015 STMicroelectronics 7 | * 8 | * Redistribution and use in source and binary forms, with or without modification, 9 | * are permitted provided that the following conditions are met: 10 | * 1. Redistributions of source code must retain the above copyright notice, 11 | * this list of conditions and the following disclaimer. 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, 13 | * this list of conditions and the following disclaimer in the documentation 14 | * and/or other materials provided with the distribution. 15 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 16 | * may be used to endorse or promote products derived from this software 17 | * without specific prior written permission. 18 | * 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 | * 30 | ****************************************************************************** 31 | */ 32 | 33 | /* Define to prevent recursive inclusion -------------------------------------*/ 34 | #ifndef __USBD_CDC_IF_H 35 | #define __USBD_CDC_IF_H 36 | 37 | #ifdef __cplusplus 38 | extern "C" { 39 | #endif 40 | /* Includes ------------------------------------------------------------------*/ 41 | #include "usbd_cdc.h" 42 | 43 | /* Exported types ------------------------------------------------------------*/ 44 | /* Exported constants --------------------------------------------------------*/ 45 | /* Exported cariables --------------------------------------------------------*/ 46 | extern USBD_CDC_ItfTypeDef USBD_Interface_fops_FS; 47 | 48 | /* Exported macro ------------------------------------------------------------*/ 49 | /* Exported functions ------------------------------------------------------- */ 50 | /** @defgroup USBD_CDC_IF_Exported_FunctionsPrototype 51 | * @{ 52 | */ 53 | uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len); 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | #ifdef __cplusplus 60 | } 61 | #endif 62 | 63 | #endif /* __USBD_CDC_IF_H */ 64 | 65 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 66 | -------------------------------------------------------------------------------- /stm32/Inc/usbd_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file : usbd_conf.h 4 | * @version : v1.0_Cube 5 | * @brief : Header for usbd_conf file. 6 | ****************************************************************************** 7 | * COPYRIGHT(c) 2015 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | /* Define to prevent recursive inclusion -------------------------------------*/ 34 | #ifndef __USBD_CONF__H__ 35 | #define __USBD_CONF__H__ 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include 41 | #include 42 | #include 43 | #include "stm32f4xx.h" 44 | #include "stm32f4xx_hal.h" 45 | 46 | /** @addtogroup USBD_OTG_DRIVER 47 | * @{ 48 | */ 49 | 50 | /** @defgroup USBD_CONF 51 | * @brief usb otg low level driver configuration file 52 | * @{ 53 | */ 54 | 55 | /** @defgroup USBD_CONF_Exported_Defines 56 | * @{ 57 | */ 58 | 59 | /*---------- -----------*/ 60 | #define USBD_MAX_NUM_INTERFACES 1 61 | /*---------- -----------*/ 62 | #define USBD_MAX_NUM_CONFIGURATION 1 63 | /*---------- -----------*/ 64 | #define USBD_MAX_STR_DESC_SIZ 512 65 | /*---------- -----------*/ 66 | #define USBD_SUPPORT_USER_STRING 0 67 | /*---------- -----------*/ 68 | #define USBD_DEBUG_LEVEL 0 69 | /*---------- -----------*/ 70 | #define USBD_LPM_ENABLED 0 71 | /*---------- -----------*/ 72 | #define USBD_SELF_POWERED 1 73 | /*---------- -----------*/ 74 | #define USBD_CDC_INTERVAL 1000 75 | 76 | /****************************************/ 77 | /* #define for FS and HS identification */ 78 | #define DEVICE_FS 0 79 | #define DEVICE_HS 1 80 | 81 | /** @defgroup USBD_Exported_Macros 82 | * @{ 83 | */ 84 | 85 | /* Memory management macros */ 86 | #define USBD_malloc malloc 87 | #define USBD_free free 88 | #define USBD_memset memset 89 | #define USBD_memcpy memcpy 90 | 91 | #define USBD_Delay HAL_Delay 92 | 93 | /* DEBUG macros */ 94 | 95 | #if (USBD_DEBUG_LEVEL > 0) 96 | #define USBD_UsrLog(...) printf(__VA_ARGS__);\ 97 | printf("\n"); 98 | #else 99 | #define USBD_UsrLog(...) 100 | #endif 101 | 102 | 103 | #if (USBD_DEBUG_LEVEL > 1) 104 | 105 | #define USBD_ErrLog(...) printf("ERROR: ") ;\ 106 | printf(__VA_ARGS__);\ 107 | printf("\n"); 108 | #else 109 | #define USBD_ErrLog(...) 110 | #endif 111 | 112 | 113 | #if (USBD_DEBUG_LEVEL > 2) 114 | #define USBD_DbgLog(...) printf("DEBUG : ") ;\ 115 | printf(__VA_ARGS__);\ 116 | printf("\n"); 117 | #else 118 | #define USBD_DbgLog(...) 119 | #endif 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /** @defgroup USBD_CONF_Exported_Types 132 | * @{ 133 | */ 134 | /** 135 | * @} 136 | */ 137 | 138 | /** @defgroup USBD_CONF_Exported_Macros 139 | * @{ 140 | */ 141 | /** 142 | * @} 143 | */ 144 | 145 | /** @defgroup USBD_CONF_Exported_Variables 146 | * @{ 147 | */ 148 | /** 149 | * @} 150 | */ 151 | 152 | /** @defgroup USBD_CONF_Exported_FunctionsPrototype 153 | * @{ 154 | */ 155 | /** 156 | * @} 157 | */ 158 | #ifdef __cplusplus 159 | } 160 | #endif 161 | 162 | #endif //__USBD_CONF__H__ 163 | 164 | /** 165 | * @} 166 | */ 167 | 168 | /** 169 | * @} 170 | */ 171 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 172 | 173 | -------------------------------------------------------------------------------- /stm32/Inc/usbd_desc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file : usbd_desc.h 4 | * @version : v1.0_Cube 5 | * @brief : Header for usbd_desc file. 6 | ****************************************************************************** 7 | * COPYRIGHT(c) 2015 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | 34 | /* Define to prevent recursive inclusion -------------------------------------*/ 35 | #ifndef __USBD_DESC__H__ 36 | #define __USBD_DESC__H__ 37 | 38 | #ifdef __cplusplus 39 | extern "C" { 40 | #endif 41 | /* Includes ------------------------------------------------------------------*/ 42 | #include "usbd_def.h" 43 | 44 | /** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY 45 | * @{ 46 | */ 47 | 48 | /** @defgroup USB_DESC 49 | * @brief general defines for the usb device library file 50 | * @{ 51 | */ 52 | 53 | /** @defgroup USB_DESC_Exported_Defines 54 | * @{ 55 | */ 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /** @defgroup USBD_DESC_Exported_TypesDefinitions 62 | * @{ 63 | */ 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup USBD_DESC_Exported_Macros 69 | * @{ 70 | */ 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @defgroup USBD_DESC_Exported_Variables 76 | * @{ 77 | */ 78 | extern USBD_DescriptorsTypeDef FS_Desc; 79 | /** 80 | * @} 81 | */ 82 | 83 | /** @defgroup USBD_DESC_Exported_FunctionsPrototype 84 | * @{ 85 | */ 86 | 87 | /** 88 | * @} 89 | */ 90 | #ifdef __cplusplus 91 | } 92 | #endif 93 | 94 | #endif /* __USBD_DESC_H */ 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 104 | -------------------------------------------------------------------------------- /stm32/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_cdc.h 4 | * @author MCD Application Team 5 | * @version V2.4.0 6 | * @date 28-February-2015 7 | * @brief header file for the usbd_cdc.c file. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2015 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USB_CDC_H 30 | #define __USB_CDC_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "usbd_ioreq.h" 38 | 39 | /** @addtogroup STM32_USB_DEVICE_LIBRARY 40 | * @{ 41 | */ 42 | 43 | /** @defgroup usbd_cdc 44 | * @brief This file is the Header file for usbd_cdc.c 45 | * @{ 46 | */ 47 | 48 | 49 | /** @defgroup usbd_cdc_Exported_Defines 50 | * @{ 51 | */ 52 | #define CDC_IN_EP 0x81 /* EP1 for data IN */ 53 | #define CDC_OUT_EP 0x01 /* EP1 for data OUT */ 54 | #define CDC_CMD_EP 0x82 /* EP2 for CDC commands */ 55 | 56 | /* CDC Endpoints parameters: you can fine tune these values depending on the needed baudrates and performance. */ 57 | #define CDC_DATA_HS_MAX_PACKET_SIZE 512 /* Endpoint IN & OUT Packet size */ 58 | #define CDC_DATA_FS_MAX_PACKET_SIZE 64 /* Endpoint IN & OUT Packet size */ 59 | #define CDC_CMD_PACKET_SIZE 8 /* Control Endpoint Packet size */ 60 | 61 | #define USB_CDC_CONFIG_DESC_SIZ 67 62 | #define CDC_DATA_HS_IN_PACKET_SIZE CDC_DATA_HS_MAX_PACKET_SIZE 63 | #define CDC_DATA_HS_OUT_PACKET_SIZE CDC_DATA_HS_MAX_PACKET_SIZE 64 | 65 | #define CDC_DATA_FS_IN_PACKET_SIZE CDC_DATA_FS_MAX_PACKET_SIZE 66 | #define CDC_DATA_FS_OUT_PACKET_SIZE CDC_DATA_FS_MAX_PACKET_SIZE 67 | 68 | /*---------------------------------------------------------------------*/ 69 | /* CDC definitions */ 70 | /*---------------------------------------------------------------------*/ 71 | #define CDC_SEND_ENCAPSULATED_COMMAND 0x00 72 | #define CDC_GET_ENCAPSULATED_RESPONSE 0x01 73 | #define CDC_SET_COMM_FEATURE 0x02 74 | #define CDC_GET_COMM_FEATURE 0x03 75 | #define CDC_CLEAR_COMM_FEATURE 0x04 76 | #define CDC_SET_LINE_CODING 0x20 77 | #define CDC_GET_LINE_CODING 0x21 78 | #define CDC_SET_CONTROL_LINE_STATE 0x22 79 | #define CDC_SEND_BREAK 0x23 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | 86 | /** @defgroup USBD_CORE_Exported_TypesDefinitions 87 | * @{ 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | typedef struct 94 | { 95 | uint32_t bitrate; 96 | uint8_t format; 97 | uint8_t paritytype; 98 | uint8_t datatype; 99 | }USBD_CDC_LineCodingTypeDef; 100 | 101 | typedef struct _USBD_CDC_Itf 102 | { 103 | int8_t (* Init) (void); 104 | int8_t (* DeInit) (void); 105 | int8_t (* Control) (uint8_t, uint8_t * , uint16_t); 106 | int8_t (* Receive) (uint8_t *, uint32_t *); 107 | 108 | }USBD_CDC_ItfTypeDef; 109 | 110 | 111 | typedef struct 112 | { 113 | uint32_t data[CDC_DATA_HS_MAX_PACKET_SIZE/4]; /* Force 32bits alignment */ 114 | uint8_t CmdOpCode; 115 | uint8_t CmdLength; 116 | uint8_t *RxBuffer; 117 | uint8_t *TxBuffer; 118 | uint32_t RxLength; 119 | uint32_t TxLength; 120 | 121 | __IO uint32_t TxState; 122 | __IO uint32_t RxState; 123 | } 124 | USBD_CDC_HandleTypeDef; 125 | 126 | 127 | 128 | /** @defgroup USBD_CORE_Exported_Macros 129 | * @{ 130 | */ 131 | 132 | /** 133 | * @} 134 | */ 135 | 136 | /** @defgroup USBD_CORE_Exported_Variables 137 | * @{ 138 | */ 139 | 140 | extern USBD_ClassTypeDef USBD_CDC; 141 | #define USBD_CDC_CLASS &USBD_CDC 142 | /** 143 | * @} 144 | */ 145 | 146 | /** @defgroup USB_CORE_Exported_Functions 147 | * @{ 148 | */ 149 | uint8_t USBD_CDC_RegisterInterface (USBD_HandleTypeDef *pdev, 150 | USBD_CDC_ItfTypeDef *fops); 151 | 152 | uint8_t USBD_CDC_SetTxBuffer (USBD_HandleTypeDef *pdev, 153 | uint8_t *pbuff, 154 | uint16_t length); 155 | 156 | uint8_t USBD_CDC_SetRxBuffer (USBD_HandleTypeDef *pdev, 157 | uint8_t *pbuff); 158 | 159 | uint8_t USBD_CDC_ReceivePacket (USBD_HandleTypeDef *pdev); 160 | 161 | uint8_t USBD_CDC_TransmitPacket (USBD_HandleTypeDef *pdev); 162 | /** 163 | * @} 164 | */ 165 | 166 | #ifdef __cplusplus 167 | } 168 | #endif 169 | 170 | #endif /* __USB_CDC_H */ 171 | /** 172 | * @} 173 | */ 174 | 175 | /** 176 | * @} 177 | */ 178 | 179 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 180 | -------------------------------------------------------------------------------- /stm32/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_core.h 4 | * @author MCD Application Team 5 | * @version V2.4.0 6 | * @date 28-February-2015 7 | * @brief Header file for usbd_core.c file 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2015 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USBD_CORE_H 30 | #define __USBD_CORE_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "usbd_conf.h" 38 | #include "usbd_def.h" 39 | #include "usbd_ioreq.h" 40 | #include "usbd_ctlreq.h" 41 | 42 | /** @addtogroup STM32_USB_DEVICE_LIBRARY 43 | * @{ 44 | */ 45 | 46 | /** @defgroup USBD_CORE 47 | * @brief This file is the Header file for usbd_core.c file 48 | * @{ 49 | */ 50 | 51 | 52 | /** @defgroup USBD_CORE_Exported_Defines 53 | * @{ 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | 61 | /** @defgroup USBD_CORE_Exported_TypesDefinitions 62 | * @{ 63 | */ 64 | 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | 71 | 72 | /** @defgroup USBD_CORE_Exported_Macros 73 | * @{ 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | 80 | /** @defgroup USBD_CORE_Exported_Variables 81 | * @{ 82 | */ 83 | #define USBD_SOF USBD_LL_SOF 84 | /** 85 | * @} 86 | */ 87 | 88 | /** @defgroup USBD_CORE_Exported_FunctionsPrototype 89 | * @{ 90 | */ 91 | USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id); 92 | USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev); 93 | USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev); 94 | USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev); 95 | USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass); 96 | 97 | USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev); 98 | USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); 99 | USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); 100 | 101 | USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup); 102 | USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); 103 | USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); 104 | 105 | USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev); 106 | USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed); 107 | USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev); 108 | USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev); 109 | 110 | USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev); 111 | USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); 112 | USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); 113 | 114 | USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev); 115 | USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev); 116 | 117 | /* USBD Low Level Driver */ 118 | USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev); 119 | USBD_StatusTypeDef USBD_LL_DeInit (USBD_HandleTypeDef *pdev); 120 | USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev); 121 | USBD_StatusTypeDef USBD_LL_Stop (USBD_HandleTypeDef *pdev); 122 | USBD_StatusTypeDef USBD_LL_OpenEP (USBD_HandleTypeDef *pdev, 123 | uint8_t ep_addr, 124 | uint8_t ep_type, 125 | uint16_t ep_mps); 126 | 127 | USBD_StatusTypeDef USBD_LL_CloseEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); 128 | USBD_StatusTypeDef USBD_LL_FlushEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); 129 | USBD_StatusTypeDef USBD_LL_StallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); 130 | USBD_StatusTypeDef USBD_LL_ClearStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); 131 | uint8_t USBD_LL_IsStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); 132 | USBD_StatusTypeDef USBD_LL_SetUSBAddress (USBD_HandleTypeDef *pdev, uint8_t dev_addr); 133 | USBD_StatusTypeDef USBD_LL_Transmit (USBD_HandleTypeDef *pdev, 134 | uint8_t ep_addr, 135 | uint8_t *pbuf, 136 | uint16_t size); 137 | 138 | USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, 139 | uint8_t ep_addr, 140 | uint8_t *pbuf, 141 | uint16_t size); 142 | 143 | uint32_t USBD_LL_GetRxDataSize (USBD_HandleTypeDef *pdev, uint8_t ep_addr); 144 | void USBD_LL_Delay (uint32_t Delay); 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | #ifdef __cplusplus 151 | } 152 | #endif 153 | 154 | #endif /* __USBD_CORE_H */ 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /** 161 | * @} 162 | */ 163 | 164 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 165 | 166 | 167 | 168 | -------------------------------------------------------------------------------- /stm32/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_req.h 4 | * @author MCD Application Team 5 | * @version V2.4.0 6 | * @date 28-February-2015 7 | * @brief Header file for the usbd_req.c file 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2015 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USB_REQUEST_H 30 | #define __USB_REQUEST_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "usbd_def.h" 38 | 39 | 40 | /** @addtogroup STM32_USB_DEVICE_LIBRARY 41 | * @{ 42 | */ 43 | 44 | /** @defgroup USBD_REQ 45 | * @brief header file for the usbd_req.c file 46 | * @{ 47 | */ 48 | 49 | /** @defgroup USBD_REQ_Exported_Defines 50 | * @{ 51 | */ 52 | /** 53 | * @} 54 | */ 55 | 56 | 57 | /** @defgroup USBD_REQ_Exported_Types 58 | * @{ 59 | */ 60 | /** 61 | * @} 62 | */ 63 | 64 | 65 | 66 | /** @defgroup USBD_REQ_Exported_Macros 67 | * @{ 68 | */ 69 | /** 70 | * @} 71 | */ 72 | 73 | /** @defgroup USBD_REQ_Exported_Variables 74 | * @{ 75 | */ 76 | /** 77 | * @} 78 | */ 79 | 80 | /** @defgroup USBD_REQ_Exported_FunctionsPrototype 81 | * @{ 82 | */ 83 | 84 | USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); 85 | USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); 86 | USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); 87 | 88 | 89 | void USBD_CtlError (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); 90 | 91 | void USBD_ParseSetupRequest (USBD_SetupReqTypedef *req, uint8_t *pdata); 92 | 93 | void USBD_GetString (uint8_t *desc, uint8_t *unicode, uint16_t *len); 94 | /** 95 | * @} 96 | */ 97 | 98 | #ifdef __cplusplus 99 | } 100 | #endif 101 | 102 | #endif /* __USB_REQUEST_H */ 103 | 104 | /** 105 | * @} 106 | */ 107 | 108 | /** 109 | * @} 110 | */ 111 | 112 | 113 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 114 | -------------------------------------------------------------------------------- /stm32/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_ioreq.h 4 | * @author MCD Application Team 5 | * @version V2.4.0 6 | * @date 28-February-2015 7 | * @brief Header file for the usbd_ioreq.c file 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2015 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USBD_IOREQ_H 30 | #define __USBD_IOREQ_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "usbd_def.h" 38 | #include "usbd_core.h" 39 | 40 | /** @addtogroup STM32_USB_DEVICE_LIBRARY 41 | * @{ 42 | */ 43 | 44 | /** @defgroup USBD_IOREQ 45 | * @brief header file for the usbd_ioreq.c file 46 | * @{ 47 | */ 48 | 49 | /** @defgroup USBD_IOREQ_Exported_Defines 50 | * @{ 51 | */ 52 | /** 53 | * @} 54 | */ 55 | 56 | 57 | /** @defgroup USBD_IOREQ_Exported_Types 58 | * @{ 59 | */ 60 | 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | 67 | 68 | /** @defgroup USBD_IOREQ_Exported_Macros 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup USBD_IOREQ_Exported_Variables 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @} 82 | */ 83 | 84 | /** @defgroup USBD_IOREQ_Exported_FunctionsPrototype 85 | * @{ 86 | */ 87 | 88 | USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, 89 | uint8_t *buf, 90 | uint16_t len); 91 | 92 | USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, 93 | uint8_t *pbuf, 94 | uint16_t len); 95 | 96 | USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, 97 | uint8_t *pbuf, 98 | uint16_t len); 99 | 100 | USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, 101 | uint8_t *pbuf, 102 | uint16_t len); 103 | 104 | USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev); 105 | 106 | USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev); 107 | 108 | uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , 109 | uint8_t epnum); 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | #ifdef __cplusplus 116 | } 117 | #endif 118 | 119 | #endif /* __USBD_IOREQ_H */ 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** 126 | * @} 127 | */ 128 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 129 | -------------------------------------------------------------------------------- /stm32/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_ioreq.c 4 | * @author MCD Application Team 5 | * @version V2.4.0 6 | * @date 28-February-2015 7 | * @brief This file provides the IO requests APIs for control endpoints. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2015 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "usbd_ioreq.h" 30 | 31 | /** @addtogroup STM32_USB_DEVICE_LIBRARY 32 | * @{ 33 | */ 34 | 35 | 36 | /** @defgroup USBD_IOREQ 37 | * @brief control I/O requests module 38 | * @{ 39 | */ 40 | 41 | /** @defgroup USBD_IOREQ_Private_TypesDefinitions 42 | * @{ 43 | */ 44 | /** 45 | * @} 46 | */ 47 | 48 | 49 | /** @defgroup USBD_IOREQ_Private_Defines 50 | * @{ 51 | */ 52 | 53 | /** 54 | * @} 55 | */ 56 | 57 | 58 | /** @defgroup USBD_IOREQ_Private_Macros 59 | * @{ 60 | */ 61 | /** 62 | * @} 63 | */ 64 | 65 | 66 | /** @defgroup USBD_IOREQ_Private_Variables 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | 75 | /** @defgroup USBD_IOREQ_Private_FunctionPrototypes 76 | * @{ 77 | */ 78 | /** 79 | * @} 80 | */ 81 | 82 | 83 | /** @defgroup USBD_IOREQ_Private_Functions 84 | * @{ 85 | */ 86 | 87 | /** 88 | * @brief USBD_CtlSendData 89 | * send data on the ctl pipe 90 | * @param pdev: device instance 91 | * @param buff: pointer to data buffer 92 | * @param len: length of data to be sent 93 | * @retval status 94 | */ 95 | USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, 96 | uint8_t *pbuf, 97 | uint16_t len) 98 | { 99 | /* Set EP0 State */ 100 | pdev->ep0_state = USBD_EP0_DATA_IN; 101 | pdev->ep_in[0].total_length = len; 102 | pdev->ep_in[0].rem_length = len; 103 | /* Start the transfer */ 104 | USBD_LL_Transmit (pdev, 0x00, pbuf, len); 105 | 106 | return USBD_OK; 107 | } 108 | 109 | /** 110 | * @brief USBD_CtlContinueSendData 111 | * continue sending data on the ctl pipe 112 | * @param pdev: device instance 113 | * @param buff: pointer to data buffer 114 | * @param len: length of data to be sent 115 | * @retval status 116 | */ 117 | USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, 118 | uint8_t *pbuf, 119 | uint16_t len) 120 | { 121 | /* Start the next transfer */ 122 | USBD_LL_Transmit (pdev, 0x00, pbuf, len); 123 | 124 | return USBD_OK; 125 | } 126 | 127 | /** 128 | * @brief USBD_CtlPrepareRx 129 | * receive data on the ctl pipe 130 | * @param pdev: device instance 131 | * @param buff: pointer to data buffer 132 | * @param len: length of data to be received 133 | * @retval status 134 | */ 135 | USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, 136 | uint8_t *pbuf, 137 | uint16_t len) 138 | { 139 | /* Set EP0 State */ 140 | pdev->ep0_state = USBD_EP0_DATA_OUT; 141 | pdev->ep_out[0].total_length = len; 142 | pdev->ep_out[0].rem_length = len; 143 | /* Start the transfer */ 144 | USBD_LL_PrepareReceive (pdev, 145 | 0, 146 | pbuf, 147 | len); 148 | 149 | return USBD_OK; 150 | } 151 | 152 | /** 153 | * @brief USBD_CtlContinueRx 154 | * continue receive data on the ctl pipe 155 | * @param pdev: device instance 156 | * @param buff: pointer to data buffer 157 | * @param len: length of data to be received 158 | * @retval status 159 | */ 160 | USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, 161 | uint8_t *pbuf, 162 | uint16_t len) 163 | { 164 | 165 | USBD_LL_PrepareReceive (pdev, 166 | 0, 167 | pbuf, 168 | len); 169 | return USBD_OK; 170 | } 171 | /** 172 | * @brief USBD_CtlSendStatus 173 | * send zero lzngth packet on the ctl pipe 174 | * @param pdev: device instance 175 | * @retval status 176 | */ 177 | USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev) 178 | { 179 | 180 | /* Set EP0 State */ 181 | pdev->ep0_state = USBD_EP0_STATUS_IN; 182 | 183 | /* Start the transfer */ 184 | USBD_LL_Transmit (pdev, 0x00, NULL, 0); 185 | 186 | return USBD_OK; 187 | } 188 | 189 | /** 190 | * @brief USBD_CtlReceiveStatus 191 | * receive zero lzngth packet on the ctl pipe 192 | * @param pdev: device instance 193 | * @retval status 194 | */ 195 | USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev) 196 | { 197 | /* Set EP0 State */ 198 | pdev->ep0_state = USBD_EP0_STATUS_OUT; 199 | 200 | /* Start the transfer */ 201 | USBD_LL_PrepareReceive ( pdev, 202 | 0, 203 | NULL, 204 | 0); 205 | 206 | return USBD_OK; 207 | } 208 | 209 | 210 | /** 211 | * @brief USBD_GetRxCount 212 | * returns the received data length 213 | * @param pdev: device instance 214 | * @param ep_addr: endpoint address 215 | * @retval Rx Data blength 216 | */ 217 | uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , uint8_t ep_addr) 218 | { 219 | return USBD_LL_GetRxDataSize(pdev, ep_addr); 220 | } 221 | 222 | /** 223 | * @} 224 | */ 225 | 226 | 227 | /** 228 | * @} 229 | */ 230 | 231 | 232 | /** 233 | * @} 234 | */ 235 | 236 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 237 | -------------------------------------------------------------------------------- /stm32/Src/cfg_test.c: -------------------------------------------------------------------------------- 1 | #include "cfg_test.h" 2 | #include "cfg_storage.h" 3 | #include "flash_sec.h" 4 | #include "debug.h" 5 | #include "main.h" 6 | 7 | #include "stm32f4xx_hal.h" 8 | 9 | #define SECTOR_SZ 0x4000 // 16k 10 | #define SEC1_BASE (FLASH_BASE+1*SECTOR_SZ) 11 | #define SEC2_BASE (FLASH_BASE+2*SECTOR_SZ) 12 | #define SEC3_BASE (FLASH_BASE+3*SECTOR_SZ) 13 | #define TEST_POOL_SZ SECTOR_SZ 14 | #define TEST_STOR_SZ SECTOR_SZ 15 | 16 | __no_init __root uint8_t const cfg_sec_1[SECTOR_SZ] @ SEC1_BASE; 17 | __no_init __root uint8_t const cfg_sec_2[SECTOR_SZ] @ SEC2_BASE; 18 | __no_init __root uint8_t const cfg_sec_3[SECTOR_SZ] @ SEC3_BASE; 19 | 20 | struct test_item { 21 | unsigned cnt; 22 | }; 23 | 24 | #define TOUT_PRIME 3571 25 | #define TOUT_MIN 32 26 | 27 | void cfg_test_pool(void) 28 | { 29 | int res; 30 | unsigned tout; 31 | struct test_item t = {0}; 32 | struct flash_sec cfg_sec[2] = { 33 | FLASH_SEC_INITIALIZER(2, SEC2_BASE, TEST_POOL_SZ), 34 | FLASH_SEC_INITIALIZER(3, SEC3_BASE, TEST_POOL_SZ) 35 | }; 36 | struct cfg_pool cfg_pool[2]; 37 | struct test_item const* t_last[2]; 38 | 39 | res = cfg_pool_init(&cfg_pool[0], sizeof(struct test_item), &cfg_sec[0]); BUG_ON(res); 40 | res = cfg_pool_init(&cfg_pool[1], sizeof(struct test_item), &cfg_sec[1]); BUG_ON(res); 41 | 42 | t_last[0] = cfg_pool_get(&cfg_pool[0]); 43 | t_last[1] = cfg_pool_get(&cfg_pool[1]); 44 | 45 | BUG_ON(t_last[0] && t_last[1] && t_last[0]->cnt != t_last[1]->cnt && t_last[0]->cnt != t_last[1]->cnt + 1); 46 | 47 | if (t_last[0] && t_last[1]) { 48 | LED_Off(); 49 | } else { 50 | LED_On(); 51 | } 52 | 53 | if (t_last[1]) { 54 | t.cnt = t_last[1]->cnt; 55 | } 56 | if (t_last[0]) { 57 | t.cnt = t_last[0]->cnt; 58 | } 59 | 60 | tout = TOUT_PRIME * (t.cnt + 1) % 4095; 61 | if (tout < TOUT_MIN) { 62 | tout = TOUT_MIN; 63 | } 64 | 65 | hiwdg.Init.Reload = tout; 66 | HAL_IWDG_Init(&hiwdg); 67 | HAL_IWDG_Start(&hiwdg); 68 | 69 | for (;;) { 70 | res = cfg_pool_commit(&cfg_pool[0], &t); BUG_ON(res); 71 | res = cfg_pool_commit(&cfg_pool[1], &t); BUG_ON(res); 72 | t_last[0] = cfg_pool_get(&cfg_pool[0]); 73 | t_last[1] = cfg_pool_get(&cfg_pool[1]); 74 | BUG_ON(!t_last[0]); 75 | BUG_ON(!t_last[1]); 76 | BUG_ON(t_last[0]->cnt != t.cnt); 77 | BUG_ON(t_last[1]->cnt != t.cnt); 78 | ++t.cnt; 79 | } 80 | } 81 | 82 | void cfg_test_storage(void) 83 | { 84 | int res; 85 | unsigned tout; 86 | struct test_item t = {0}; 87 | struct flash_sec cfg_sec1 = FLASH_SEC_INITIALIZER(1, SEC1_BASE, TEST_POOL_SZ); 88 | struct flash_sec cfg_sec[2] = { 89 | FLASH_SEC_INITIALIZER(2, SEC2_BASE, TEST_STOR_SZ), 90 | FLASH_SEC_INITIALIZER(3, SEC3_BASE, TEST_STOR_SZ) 91 | }; 92 | struct cfg_pool cfg_pool; 93 | struct cfg_storage cfg_stor; 94 | struct test_item const *p_last, *s_last; 95 | 96 | res = cfg_pool_init(&cfg_pool, sizeof(struct test_item), &cfg_sec1); BUG_ON(res); 97 | res = cfg_stor_init(&cfg_stor, sizeof(struct test_item), cfg_sec); BUG_ON(res); 98 | 99 | p_last = cfg_pool_get(&cfg_pool); 100 | s_last = cfg_stor_get(&cfg_stor); 101 | 102 | BUG_ON(p_last && s_last && p_last->cnt != s_last->cnt && p_last->cnt != s_last->cnt + 1); 103 | BUG_ON(p_last && !s_last); 104 | 105 | if (p_last && s_last) { 106 | LED_Off(); 107 | } else { 108 | LED_On(); 109 | } 110 | 111 | if (s_last) { 112 | t.cnt = s_last->cnt; 113 | } 114 | if (p_last) { 115 | t.cnt = p_last->cnt; 116 | } 117 | 118 | tout = TOUT_PRIME * (t.cnt + 1) % 4095; 119 | if (tout < TOUT_MIN) { 120 | tout = TOUT_MIN; 121 | } 122 | 123 | hiwdg.Init.Reload = tout; 124 | HAL_IWDG_Init(&hiwdg); 125 | HAL_IWDG_Start(&hiwdg); 126 | 127 | for (;;) { 128 | res = cfg_pool_commit(&cfg_pool, &t); BUG_ON(res); 129 | res = cfg_stor_commit(&cfg_stor, &t); BUG_ON(res); 130 | p_last = cfg_pool_get(&cfg_pool); 131 | s_last = cfg_stor_get(&cfg_stor); 132 | BUG_ON(!p_last); 133 | BUG_ON(!s_last); 134 | BUG_ON(p_last->cnt != t.cnt); 135 | BUG_ON(s_last->cnt != t.cnt); 136 | ++t.cnt; 137 | } 138 | } 139 | -------------------------------------------------------------------------------- /stm32/Src/cli.c: -------------------------------------------------------------------------------- 1 | #include "cli.h" 2 | #include "usbd_cdc_if.h" 3 | #include "errors.h" 4 | 5 | #define RX_BUFF_SZ 1024 6 | #define TX_BUFF_SZ 1024 7 | 8 | extern USBD_HandleTypeDef *hUsbDevice_0; 9 | 10 | uint8_t rx_buff[RX_BUFF_SZ]; 11 | unsigned rx_sz; 12 | int rx_cmd_sz; 13 | err_t rx_err; 14 | 15 | uint8_t tx_buff[TX_BUFF_SZ]; 16 | unsigned tx_sz; 17 | 18 | static inline int cli_tx_busy(void) 19 | { 20 | if (hUsbDevice_0) { 21 | USBD_CDC_HandleTypeDef* hcdc = (USBD_CDC_HandleTypeDef*)hUsbDevice_0->pClassData; 22 | return !hcdc || hcdc->TxState != 0; 23 | } else 24 | return 1; 25 | } 26 | 27 | static err_t cli_reply(void) 28 | { 29 | if (USBD_OK == CDC_Transmit_FS(tx_buff, tx_sz)) { 30 | return err_ok; 31 | } else { 32 | tx_sz = 0; 33 | return err_internal; 34 | } 35 | } 36 | 37 | static err_t cli_handle_input(unsigned sz) 38 | { 39 | memcpy(tx_buff, rx_buff, tx_sz = sz); 40 | return cli_reply(); 41 | } 42 | 43 | static void cli_respond_err(err_t res) 44 | { 45 | tx_sz = snprintf((char*)tx_buff, TX_BUFF_SZ, "e%d\r", res); 46 | cli_reply(); 47 | } 48 | 49 | int8_t cli_receive(uint8_t* Buf, uint32_t *Len) 50 | { 51 | unsigned len = *Len; 52 | if (!rx_err) { 53 | if (rx_cmd_sz || rx_sz + len > RX_BUFF_SZ) { 54 | rx_err = err_proto; 55 | } else { 56 | memcpy(rx_buff + rx_sz, Buf, len); 57 | rx_sz += len; 58 | } 59 | } 60 | if (Buf[len-1] == '\r') { 61 | rx_cmd_sz = !rx_err ? rx_sz : -1; 62 | rx_sz = 0; 63 | } 64 | return USBD_OK; 65 | } 66 | 67 | void cli_run(void) 68 | { 69 | err_t err; 70 | unsigned sz; 71 | if (cli_tx_busy()) { 72 | return; 73 | } 74 | if (tx_sz) 75 | { 76 | if (!(tx_sz % USB_FS_MAX_PACKET_SIZE)) { 77 | CDC_Transmit_FS(tx_buff, 0); // ZLP 78 | } 79 | tx_sz = 0; 80 | return; 81 | } 82 | if ((sz = rx_cmd_sz)) 83 | { 84 | rx_cmd_sz = 0; 85 | if (!rx_err) { 86 | err = cli_handle_input(sz); 87 | } else { 88 | err = rx_err; 89 | rx_err = err_ok; 90 | } 91 | if (err) { 92 | cli_respond_err(err); 93 | } 94 | } 95 | } 96 | 97 | -------------------------------------------------------------------------------- /stm32/Src/config.c: -------------------------------------------------------------------------------- 1 | #include "config.h" 2 | #include "cfg_test.h" 3 | 4 | void cfg_init(void) 5 | { 6 | cfg_test_storage(); 7 | } 8 | -------------------------------------------------------------------------------- /stm32/Src/flash.c: -------------------------------------------------------------------------------- 1 | #include "flash.h" 2 | 3 | #include 4 | #include "stm32f4xx.h" 5 | #include 6 | 7 | int flash_erase_sec(int sec_no) 8 | { 9 | FLASH_EraseInitTypeDef er = { 10 | .TypeErase = FLASH_TYPEERASE_SECTORS, 11 | .Sector = sec_no, 12 | .NbSectors = 1, 13 | .VoltageRange = FLASH_VOLTAGE_RANGE_3 14 | }; 15 | uint32_t fault_sec = 0; 16 | HAL_FLASH_Unlock(); 17 | HAL_StatusTypeDef res = HAL_FLASHEx_Erase(&er, &fault_sec); 18 | HAL_FLASH_Lock(); 19 | return res == HAL_OK ? 0 : -1; 20 | } 21 | 22 | int flash_write(unsigned addr, void const* data, unsigned sz) 23 | { 24 | HAL_StatusTypeDef res = HAL_OK; 25 | HAL_FLASH_Unlock(); 26 | for (; addr % 4 && sz >= 1; sz -= 1, addr += 1) { 27 | res = HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, addr, *(uint8_t const*)data); 28 | data = (uint8_t const*)data + 1; 29 | if (res != HAL_OK) 30 | goto done; 31 | } 32 | for (; sz >= 4; sz -= 4, addr += 4) { 33 | res = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, addr, *(uint32_t const*)data); 34 | data = (uint32_t const*)data + 1; 35 | if (res != HAL_OK) 36 | goto done; 37 | } 38 | for (; sz >= 1; sz -= 1, addr += 1) { 39 | res = HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, addr, *(uint8_t const*)data); 40 | data = (uint8_t const*)data + 1; 41 | if (res != HAL_OK) 42 | goto done; 43 | } 44 | done: 45 | HAL_FLASH_Lock(); 46 | return res == HAL_OK ? 0 : -1; 47 | } 48 | 49 | int flash_write_bytes(unsigned addr, void const* data, unsigned sz) 50 | { 51 | HAL_StatusTypeDef res = HAL_OK; 52 | HAL_FLASH_Unlock(); 53 | for (; sz >= 1; sz -= 1, addr += 1) { 54 | res = HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, addr, *(uint8_t const*)data); 55 | data = (uint8_t const*)data + 1; 56 | if (res != HAL_OK) 57 | goto done; 58 | } 59 | done: 60 | HAL_FLASH_Lock(); 61 | return res == HAL_OK ? 0 : -1; 62 | } 63 | -------------------------------------------------------------------------------- /stm32/Src/flash_sec.c: -------------------------------------------------------------------------------- 1 | #include "flash_sec.h" 2 | #include "flash.h" 3 | 4 | int flash_sec_erase(struct flash_sec const* sec) 5 | { 6 | return flash_erase_sec(sec->no); 7 | } 8 | 9 | int flash_sec_write(struct flash_sec const* sec, unsigned off, void const* data, unsigned sz) 10 | { 11 | return flash_write(sec->base + off, data, sz); 12 | } 13 | 14 | int flash_sec_write_bytes(struct flash_sec const* sec, unsigned off, void const* data, unsigned sz) 15 | { 16 | return flash_write_bytes(sec->base + off, data, sz); 17 | } 18 | 19 | -------------------------------------------------------------------------------- /stm32/Src/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : main.c 4 | * Description : Main program body 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2015 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | 34 | /* Includes ------------------------------------------------------------------*/ 35 | #include "stm32f4xx_hal.h" 36 | #include "usb_device.h" 37 | 38 | /* USER CODE BEGIN Includes */ 39 | #include "main.h" 40 | #include "cli.h" 41 | #include "config.h" 42 | /* USER CODE END Includes */ 43 | 44 | /* Private variables ---------------------------------------------------------*/ 45 | IWDG_HandleTypeDef hiwdg; 46 | 47 | /* USER CODE BEGIN PV */ 48 | 49 | /* USER CODE END PV */ 50 | 51 | /* Private function prototypes -----------------------------------------------*/ 52 | void SystemClock_Config(void); 53 | static void MX_GPIO_Init(void); 54 | static void MX_IWDG_Init(void); 55 | 56 | /* USER CODE BEGIN PFP */ 57 | 58 | /* USER CODE END PFP */ 59 | 60 | /* USER CODE BEGIN 0 */ 61 | 62 | /* USER CODE END 0 */ 63 | 64 | int main(void) 65 | { 66 | 67 | /* USER CODE BEGIN 1 */ 68 | 69 | /* USER CODE END 1 */ 70 | 71 | /* MCU Configuration----------------------------------------------------------*/ 72 | 73 | /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ 74 | HAL_Init(); 75 | 76 | /* Configure the system clock */ 77 | SystemClock_Config(); 78 | 79 | /* Initialize all configured peripherals */ 80 | MX_GPIO_Init(); 81 | MX_IWDG_Init(); 82 | MX_USB_DEVICE_Init(); 83 | 84 | /* USER CODE BEGIN 2 */ 85 | cfg_init(); 86 | /* USER CODE END 2 */ 87 | 88 | /* Infinite loop */ 89 | /* USER CODE BEGIN WHILE */ 90 | while (1) 91 | { 92 | /* USER CODE END WHILE */ 93 | 94 | /* USER CODE BEGIN 3 */ 95 | cli_run(); 96 | 97 | } 98 | /* USER CODE END 3 */ 99 | 100 | } 101 | 102 | /** System Clock Configuration 103 | */ 104 | void SystemClock_Config(void) 105 | { 106 | 107 | RCC_OscInitTypeDef RCC_OscInitStruct; 108 | RCC_ClkInitTypeDef RCC_ClkInitStruct; 109 | 110 | __PWR_CLK_ENABLE(); 111 | 112 | __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); 113 | 114 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; 115 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; 116 | RCC_OscInitStruct.LSIState = RCC_LSI_ON; 117 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 118 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 119 | RCC_OscInitStruct.PLL.PLLM = 8; 120 | RCC_OscInitStruct.PLL.PLLN = 192; 121 | RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 122 | RCC_OscInitStruct.PLL.PLLQ = 4; 123 | HAL_RCC_OscConfig(&RCC_OscInitStruct); 124 | 125 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1 126 | |RCC_CLOCKTYPE_PCLK2; 127 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 128 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 129 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 130 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV4; 131 | HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3); 132 | 133 | HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); 134 | 135 | HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); 136 | 137 | } 138 | 139 | /* IWDG init function */ 140 | void MX_IWDG_Init(void) 141 | { 142 | 143 | hiwdg.Instance = IWDG; 144 | hiwdg.Init.Prescaler = IWDG_PRESCALER_32; 145 | hiwdg.Init.Reload = 4095; 146 | HAL_IWDG_Init(&hiwdg); 147 | 148 | } 149 | 150 | /** Configure pins as 151 | * Analog 152 | * Input 153 | * Output 154 | * EVENT_OUT 155 | * EXTI 156 | */ 157 | void MX_GPIO_Init(void) 158 | { 159 | 160 | GPIO_InitTypeDef GPIO_InitStruct; 161 | 162 | /* GPIO Ports Clock Enable */ 163 | __GPIOC_CLK_ENABLE(); 164 | __GPIOH_CLK_ENABLE(); 165 | __GPIOA_CLK_ENABLE(); 166 | 167 | /*Configure GPIO pin : PC12 */ 168 | GPIO_InitStruct.Pin = GPIO_PIN_12; 169 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; 170 | GPIO_InitStruct.Pull = GPIO_NOPULL; 171 | GPIO_InitStruct.Speed = GPIO_SPEED_LOW; 172 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 173 | 174 | } 175 | 176 | /* USER CODE BEGIN 4 */ 177 | 178 | void LED_On(void) 179 | { 180 | HAL_GPIO_WritePin(LED_PORT, LED_PIN, GPIO_PIN_RESET); 181 | } 182 | 183 | void LED_Off(void) 184 | { 185 | HAL_GPIO_WritePin(LED_PORT, LED_PIN, GPIO_PIN_SET); 186 | } 187 | 188 | void LED_Toggle(void) 189 | { 190 | HAL_GPIO_TogglePin(LED_PORT, LED_PIN); 191 | } 192 | 193 | #ifdef USE_FULL_ASSERT 194 | void assertion_failed(const char* file, unsigned line) 195 | { 196 | assert_failed((uint8_t*)file, line); 197 | } 198 | #endif 199 | 200 | /* USER CODE END 4 */ 201 | 202 | #ifdef USE_FULL_ASSERT 203 | 204 | /** 205 | * @brief Reports the name of the source file and the source line number 206 | * where the assert_param error has occurred. 207 | * @param file: pointer to the source file name 208 | * @param line: assert_param error line source number 209 | * @retval None 210 | */ 211 | void assert_failed(uint8_t* file, uint32_t line) 212 | { 213 | /* USER CODE BEGIN 6 */ 214 | /* User can add his own implementation to report the file name and line number, 215 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 216 | MX_IWDG_Init(); 217 | for (;;) { 218 | /* Fast blinking LED */ 219 | __HAL_IWDG_RELOAD_COUNTER(&hiwdg); 220 | LED_Toggle(); 221 | HAL_Delay(70); 222 | } 223 | /* USER CODE END 6 */ 224 | 225 | } 226 | 227 | #endif 228 | 229 | /** 230 | * @} 231 | */ 232 | 233 | /** 234 | * @} 235 | */ 236 | 237 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 238 | -------------------------------------------------------------------------------- /stm32/Src/stm32f4xx_hal_msp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : stm32f4xx_hal_msp.c 4 | * Description : This file provides code for the MSP Initialization 5 | * and de-Initialization codes. 6 | ****************************************************************************** 7 | * 8 | * COPYRIGHT(c) 2015 STMicroelectronics 9 | * 10 | * Redistribution and use in source and binary forms, with or without modification, 11 | * are permitted provided that the following conditions are met: 12 | * 1. Redistributions of source code must retain the above copyright notice, 13 | * this list of conditions and the following disclaimer. 14 | * 2. Redistributions in binary form must reproduce the above copyright notice, 15 | * this list of conditions and the following disclaimer in the documentation 16 | * and/or other materials provided with the distribution. 17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 18 | * may be used to endorse or promote products derived from this software 19 | * without specific prior written permission. 20 | * 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | * 32 | ****************************************************************************** 33 | */ 34 | /* Includes ------------------------------------------------------------------*/ 35 | #include "stm32f4xx_hal.h" 36 | 37 | /* USER CODE BEGIN 0 */ 38 | 39 | /* USER CODE END 0 */ 40 | 41 | /** 42 | * Initializes the Global MSP. 43 | */ 44 | void HAL_MspInit(void) 45 | { 46 | /* USER CODE BEGIN MspInit 0 */ 47 | 48 | /* USER CODE END MspInit 0 */ 49 | 50 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 51 | 52 | /* System interrupt init*/ 53 | /* SysTick_IRQn interrupt configuration */ 54 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); 55 | 56 | /* USER CODE BEGIN MspInit 1 */ 57 | 58 | /* USER CODE END MspInit 1 */ 59 | } 60 | 61 | void HAL_IWDG_MspInit(IWDG_HandleTypeDef* hiwdg) 62 | { 63 | 64 | } 65 | 66 | /* USER CODE BEGIN 1 */ 67 | 68 | /* USER CODE END 1 */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 79 | -------------------------------------------------------------------------------- /stm32/Src/stm32f4xx_it.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_it.c 4 | * @brief Interrupt Service Routines. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2015 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "stm32f4xx_hal.h" 35 | #include "stm32f4xx.h" 36 | #include "stm32f4xx_it.h" 37 | 38 | /* USER CODE BEGIN 0 */ 39 | 40 | /* USER CODE END 0 */ 41 | 42 | /* External variables --------------------------------------------------------*/ 43 | extern PCD_HandleTypeDef hpcd_USB_OTG_FS; 44 | 45 | /******************************************************************************/ 46 | /* Cortex-M4 Processor Interruption and Exception Handlers */ 47 | /******************************************************************************/ 48 | 49 | /** 50 | * @brief This function handles System tick timer. 51 | */ 52 | void SysTick_Handler(void) 53 | { 54 | /* USER CODE BEGIN SysTick_IRQn 0 */ 55 | 56 | /* USER CODE END SysTick_IRQn 0 */ 57 | HAL_IncTick(); 58 | HAL_SYSTICK_IRQHandler(); 59 | /* USER CODE BEGIN SysTick_IRQn 1 */ 60 | 61 | /* USER CODE END SysTick_IRQn 1 */ 62 | } 63 | 64 | /******************************************************************************/ 65 | /* STM32F4xx Peripheral Interrupt Handlers */ 66 | /* Add here the Interrupt Handlers for the used peripherals. */ 67 | /* For the available peripheral interrupt handler names, */ 68 | /* please refer to the startup file (startup_stm32f4xx.s). */ 69 | /******************************************************************************/ 70 | 71 | /** 72 | * @brief This function handles USB On The Go FS global interrupt. 73 | */ 74 | void OTG_FS_IRQHandler(void) 75 | { 76 | /* USER CODE BEGIN OTG_FS_IRQn 0 */ 77 | 78 | /* USER CODE END OTG_FS_IRQn 0 */ 79 | HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); 80 | /* USER CODE BEGIN OTG_FS_IRQn 1 */ 81 | 82 | /* USER CODE END OTG_FS_IRQn 1 */ 83 | } 84 | 85 | /* USER CODE BEGIN 1 */ 86 | 87 | /* USER CODE END 1 */ 88 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 89 | -------------------------------------------------------------------------------- /stm32/Src/usb_device.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file : USB_DEVICE 4 | * @version : v1.0_Cube 5 | * @brief : This file implements the USB Device 6 | ****************************************************************************** 7 | * 8 | * COPYRIGHT(c) 2015 STMicroelectronics 9 | * 10 | * Redistribution and use in source and binary forms, with or without modification, 11 | * are permitted provided that the following conditions are met: 12 | * 1. Redistributions of source code must retain the above copyright notice, 13 | * this list of conditions and the following disclaimer. 14 | * 2. Redistributions in binary form must reproduce the above copyright notice, 15 | * this list of conditions and the following disclaimer in the documentation 16 | * and/or other materials provided with the distribution. 17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 18 | * may be used to endorse or promote products derived from this software 19 | * without specific prior written permission. 20 | * 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | * 32 | ****************************************************************************** 33 | */ 34 | 35 | /* Includes ------------------------------------------------------------------*/ 36 | 37 | #include "usb_device.h" 38 | #include "usbd_core.h" 39 | #include "usbd_desc.h" 40 | #include "usbd_cdc.h" 41 | #include "usbd_cdc_if.h" 42 | 43 | /* USB Device Core handle declaration */ 44 | USBD_HandleTypeDef hUsbDeviceFS; 45 | 46 | /* init function */ 47 | void MX_USB_DEVICE_Init(void) 48 | { 49 | /* Init Device Library,Add Supported Class and Start the library*/ 50 | USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS); 51 | 52 | USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC); 53 | 54 | USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS); 55 | 56 | USBD_Start(&hUsbDeviceFS); 57 | 58 | } 59 | /** 60 | * @} 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 68 | -------------------------------------------------------------------------------- /stm32/Src/usbd_cdc_if.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file : usbd_cdc_if.c 4 | * @brief : 5 | ****************************************************************************** 6 | * COPYRIGHT(c) 2015 STMicroelectronics 7 | * 8 | * Redistribution and use in source and binary forms, with or without modification, 9 | * are permitted provided that the following conditions are met: 10 | * 1. Redistributions of source code must retain the above copyright notice, 11 | * this list of conditions and the following disclaimer. 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, 13 | * this list of conditions and the following disclaimer in the documentation 14 | * and/or other materials provided with the distribution. 15 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 16 | * may be used to endorse or promote products derived from this software 17 | * without specific prior written permission. 18 | * 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 | * 30 | ****************************************************************************** 31 | */ 32 | 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "usbd_cdc_if.h" 35 | 36 | /** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY 37 | * @{ 38 | */ 39 | 40 | /** @defgroup USBD_CDC 41 | * @brief usbd core module 42 | * @{ 43 | */ 44 | 45 | /** @defgroup USBD_CDC_Private_TypesDefinitions 46 | * @{ 47 | */ 48 | /* USER CODE BEGIN 0 */ 49 | #include "cli.h" 50 | /* USER CODE END 0 */ 51 | /** 52 | * @} 53 | */ 54 | 55 | /** @defgroup USBD_CDC_Private_Defines 56 | * @{ 57 | */ 58 | /* USER CODE BEGIN 1 */ 59 | /* Define size for the receive and transmit buffer over CDC */ 60 | /* It's up to user to redefine and/or remove those define */ 61 | #define APP_RX_DATA_SIZE 64 62 | #define APP_TX_DATA_SIZE 64 63 | 64 | /* The following structures groups all needed parameters to be configured for the 65 | ComPort. These parameters can modified on the fly by the host through CDC class 66 | command class requests. */ 67 | typedef struct 68 | { 69 | uint32_t bitrate; 70 | uint8_t format; 71 | uint8_t paritytype; 72 | uint8_t datatype; 73 | }LINE_CODING; 74 | 75 | LINE_CODING linecoding = 76 | { 77 | 115200, /* baud rate*/ 78 | 0x00, /* stop bits-1*/ 79 | 0x00, /* parity - none*/ 80 | 0x08 /* nb. of bits 8*/ 81 | }; 82 | 83 | /* USER CODE END 1 */ 84 | /** 85 | * @} 86 | */ 87 | 88 | /** @defgroup USBD_CDC_Private_Macros 89 | * @{ 90 | */ 91 | /* USER CODE BEGIN 2 */ 92 | /* USER CODE END 2 */ 93 | /** 94 | * @} 95 | */ 96 | 97 | /** @defgroup USBD_CDC_Private_Variables 98 | * @{ 99 | */ 100 | /* Create buffer for reception and transmission */ 101 | /* It's up to user to redefine and/or remove those define */ 102 | /* Received Data over USB are stored in this buffer */ 103 | uint8_t UserRxBufferFS[APP_RX_DATA_SIZE]; 104 | 105 | /* Send Data over USB CDC are stored in this buffer */ 106 | uint8_t UserTxBufferFS[APP_TX_DATA_SIZE]; 107 | 108 | /* USB handler declaration */ 109 | /* Handle for USB Full Speed IP */ 110 | USBD_HandleTypeDef *hUsbDevice_0; 111 | 112 | extern USBD_HandleTypeDef hUsbDeviceFS; 113 | 114 | /** 115 | * @} 116 | */ 117 | 118 | /** @defgroup USBD_CDC_Private_FunctionPrototypes 119 | * @{ 120 | */ 121 | static int8_t CDC_Init_FS (void); 122 | static int8_t CDC_DeInit_FS (void); 123 | static int8_t CDC_Control_FS (uint8_t cmd, uint8_t* pbuf, uint16_t length); 124 | static int8_t CDC_Receive_FS (uint8_t* pbuf, uint32_t *Len); 125 | 126 | USBD_CDC_ItfTypeDef USBD_Interface_fops_FS = 127 | { 128 | CDC_Init_FS, 129 | CDC_DeInit_FS, 130 | CDC_Control_FS, 131 | CDC_Receive_FS 132 | }; 133 | 134 | /* Private functions ---------------------------------------------------------*/ 135 | /** 136 | * @brief CDC_Init_FS 137 | * Initializes the CDC media low layer over the FS USB IP 138 | * @param None 139 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL 140 | */ 141 | static int8_t CDC_Init_FS(void) 142 | { 143 | hUsbDevice_0 = &hUsbDeviceFS; 144 | /* USER CODE BEGIN 3 */ 145 | /* Set Application Buffers */ 146 | USBD_CDC_SetTxBuffer(hUsbDevice_0, UserTxBufferFS, 0); 147 | USBD_CDC_SetRxBuffer(hUsbDevice_0, UserRxBufferFS); 148 | USBD_CDC_ReceivePacket(hUsbDevice_0); 149 | return (USBD_OK); 150 | /* USER CODE END 3 */ 151 | } 152 | 153 | /** 154 | * @brief CDC_DeInit_FS 155 | * DeInitializes the CDC media low layer 156 | * @param None 157 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL 158 | */ 159 | static int8_t CDC_DeInit_FS(void) 160 | { 161 | /* USER CODE BEGIN 4 */ 162 | return (USBD_OK); 163 | /* USER CODE END 4 */ 164 | } 165 | 166 | /** 167 | * @brief CDC_Control_FS 168 | * Manage the CDC class requests 169 | * @param cmd: Command code 170 | * @param pbuf: Buffer containing command data (request parameters) 171 | * @param length: Number of data to be sent (in bytes) 172 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL 173 | */ 174 | static int8_t CDC_Control_FS (uint8_t cmd, uint8_t* pbuf, uint16_t length) 175 | { 176 | /* USER CODE BEGIN 5 */ 177 | switch (cmd) 178 | { 179 | case CDC_SEND_ENCAPSULATED_COMMAND: 180 | 181 | break; 182 | 183 | case CDC_GET_ENCAPSULATED_RESPONSE: 184 | 185 | break; 186 | 187 | case CDC_SET_COMM_FEATURE: 188 | 189 | break; 190 | 191 | case CDC_GET_COMM_FEATURE: 192 | 193 | break; 194 | 195 | case CDC_CLEAR_COMM_FEATURE: 196 | 197 | break; 198 | 199 | /*******************************************************************************/ 200 | /* Line Coding Structure */ 201 | /*-----------------------------------------------------------------------------*/ 202 | /* Offset | Field | Size | Value | Description */ 203 | /* 0 | dwDTERate | 4 | Number |Data terminal rate, in bits per second*/ 204 | /* 4 | bCharFormat | 1 | Number | Stop bits */ 205 | /* 0 - 1 Stop bit */ 206 | /* 1 - 1.5 Stop bits */ 207 | /* 2 - 2 Stop bits */ 208 | /* 5 | bParityType | 1 | Number | Parity */ 209 | /* 0 - None */ 210 | /* 1 - Odd */ 211 | /* 2 - Even */ 212 | /* 3 - Mark */ 213 | /* 4 - Space */ 214 | /* 6 | bDataBits | 1 | Number Data bits (5, 6, 7, 8 or 16). */ 215 | /*******************************************************************************/ 216 | case CDC_SET_LINE_CODING: 217 | 218 | break; 219 | 220 | case CDC_GET_LINE_CODING: 221 | pbuf[0] = (uint8_t)(linecoding.bitrate); 222 | pbuf[1] = (uint8_t)(linecoding.bitrate >> 8); 223 | pbuf[2] = (uint8_t)(linecoding.bitrate >> 16); 224 | pbuf[3] = (uint8_t)(linecoding.bitrate >> 24); 225 | pbuf[4] = linecoding.format; 226 | pbuf[5] = linecoding.paritytype; 227 | pbuf[6] = linecoding.datatype; 228 | break; 229 | 230 | case CDC_SET_CONTROL_LINE_STATE: 231 | 232 | break; 233 | 234 | case CDC_SEND_BREAK: 235 | 236 | break; 237 | 238 | default: 239 | break; 240 | } 241 | 242 | return (USBD_OK); 243 | /* USER CODE END 5 */ 244 | } 245 | 246 | /** 247 | * @brief CDC_Receive_FS 248 | * Data received over USB OUT endpoint are sent over CDC interface 249 | * through this function. 250 | * 251 | * @note 252 | * This function will block any OUT packet reception on USB endpoint 253 | * untill exiting this function. If you exit this function before transfer 254 | * is complete on CDC interface (ie. using DMA controller) it will result 255 | * in receiving more data while previous ones are still not sent. 256 | * 257 | * @param Buf: Buffer of data to be received 258 | * @param Len: Number of data received (in bytes) 259 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL 260 | */ 261 | static int8_t CDC_Receive_FS (uint8_t* Buf, uint32_t *Len) 262 | { 263 | /* USER CODE BEGIN 6 */ 264 | int8_t res = cli_receive(Buf, Len); 265 | USBD_CDC_ReceivePacket(hUsbDevice_0); 266 | return res; 267 | /* USER CODE END 6 */ 268 | } 269 | 270 | /** 271 | * @brief CDC_Transmit_FS 272 | * Data send over USB IN endpoint are sent over CDC interface 273 | * through this function. 274 | * @note 275 | * 276 | * 277 | * @param Buf: Buffer of data to be send 278 | * @param Len: Number of data to be send (in bytes) 279 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY 280 | */ 281 | uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len) 282 | { 283 | uint8_t result = USBD_OK; 284 | /* USER CODE BEGIN 7 */ 285 | USBD_CDC_SetTxBuffer(hUsbDevice_0, Buf, Len); 286 | result = USBD_CDC_TransmitPacket(hUsbDevice_0); 287 | /* USER CODE END 7 */ 288 | return result; 289 | } 290 | 291 | /** 292 | * @} 293 | */ 294 | 295 | /** 296 | * @} 297 | */ 298 | 299 | /** 300 | * @} 301 | */ 302 | 303 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 304 | 305 | -------------------------------------------------------------------------------- /stm32/Src/usbd_desc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file : usbd_desc.c 4 | * @version : v1.0_Cube 5 | * @brief : This file implements the USB Device descriptors 6 | ****************************************************************************** 7 | * 8 | * COPYRIGHT(c) 2015 STMicroelectronics 9 | * 10 | * Redistribution and use in source and binary forms, with or without modification, 11 | * are permitted provided that the following conditions are met: 12 | * 1. Redistributions of source code must retain the above copyright notice, 13 | * this list of conditions and the following disclaimer. 14 | * 2. Redistributions in binary form must reproduce the above copyright notice, 15 | * this list of conditions and the following disclaimer in the documentation 16 | * and/or other materials provided with the distribution. 17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 18 | * may be used to endorse or promote products derived from this software 19 | * without specific prior written permission. 20 | * 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | * 32 | ****************************************************************************** 33 | */ 34 | 35 | /* Includes ------------------------------------------------------------------*/ 36 | #include "usbd_core.h" 37 | #include "usbd_desc.h" 38 | #include "usbd_conf.h" 39 | 40 | /** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY 41 | * @{ 42 | */ 43 | 44 | /** @defgroup USBD_DESC 45 | * @brief USBD descriptors module 46 | * @{ 47 | */ 48 | 49 | /** @defgroup USBD_DESC_Private_TypesDefinitions 50 | * @{ 51 | */ 52 | /** 53 | * @} 54 | */ 55 | 56 | /** @defgroup USBD_DESC_Private_Defines 57 | * @{ 58 | */ 59 | #define USBD_VID 1155 60 | #define USBD_LANGID_STRING 1033 61 | #define USBD_MANUFACTURER_STRING "STMicroelectronics" 62 | #define USBD_PID_FS 22336 63 | #define USBD_PRODUCT_STRING_FS "STM32 Virtual ComPort" 64 | /* USER CODE BEGIN SERIALNUMBER_STRING_FS */ 65 | #define USBD_SERIALNUMBER_STRING_FS "00000000001A" 66 | /* USER CODE END SERIALNUMBER_STRING_FS */ 67 | #define USBD_CONFIGURATION_STRING_FS "CDC Config" 68 | #define USBD_INTERFACE_STRING_FS "CDC Interface" 69 | 70 | #define USB_SIZ_BOS_DESC 0x0C 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup USBD_DESC_Private_Macros 77 | * @{ 78 | */ 79 | /** 80 | * @} 81 | */ 82 | 83 | /** @defgroup USBD_DESC_Private_Variables 84 | * @{ 85 | */ 86 | uint8_t * USBD_FS_DeviceDescriptor( USBD_SpeedTypeDef speed , uint16_t *length); 87 | uint8_t * USBD_FS_LangIDStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length); 88 | uint8_t * USBD_FS_ManufacturerStrDescriptor ( USBD_SpeedTypeDef speed , uint16_t *length); 89 | uint8_t * USBD_FS_ProductStrDescriptor ( USBD_SpeedTypeDef speed , uint16_t *length); 90 | uint8_t * USBD_FS_SerialStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length); 91 | uint8_t * USBD_FS_ConfigStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length); 92 | uint8_t * USBD_FS_InterfaceStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length); 93 | 94 | #ifdef USB_SUPPORT_USER_STRING_DESC 95 | uint8_t * USBD_FS_USRStringDesc (USBD_SpeedTypeDef speed, uint8_t idx , uint16_t *length); 96 | #endif /* USB_SUPPORT_USER_STRING_DESC */ 97 | 98 | #if (USBD_LPM_ENABLED == 1) 99 | uint8_t *USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed , uint16_t *length); 100 | #endif 101 | 102 | USBD_DescriptorsTypeDef FS_Desc = 103 | { 104 | USBD_FS_DeviceDescriptor, 105 | USBD_FS_LangIDStrDescriptor, 106 | USBD_FS_ManufacturerStrDescriptor, 107 | USBD_FS_ProductStrDescriptor, 108 | USBD_FS_SerialStrDescriptor, 109 | USBD_FS_ConfigStrDescriptor, 110 | USBD_FS_InterfaceStrDescriptor, 111 | #if (USBD_LPM_ENABLED == 1) 112 | USBD_FS_USR_BOSDescriptor, 113 | #endif 114 | }; 115 | 116 | #if defined ( __ICCARM__ ) /*!< IAR Compiler */ 117 | #pragma data_alignment=4 118 | #endif 119 | /* USB Standard Device Descriptor */ 120 | __ALIGN_BEGIN uint8_t USBD_FS_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END = 121 | { 122 | 0x12, /*bLength */ 123 | USB_DESC_TYPE_DEVICE, /*bDescriptorType*/ 124 | #if (USBD_LPM_ENABLED == 1) 125 | 0x01, /*bcdUSB */ /* changed to USB version 2.01 126 | in order to support LPM L1 suspend 127 | resume test of USBCV3.0*/ 128 | #else 129 | 0x00, /* bcdUSB */ 130 | #endif 131 | 0x02, 132 | 0x00, /*bDeviceClass*/ 133 | 0x00, /*bDeviceSubClass*/ 134 | 0x00, /*bDeviceProtocol*/ 135 | USB_MAX_EP0_SIZE, /*bMaxPacketSize*/ 136 | LOBYTE(USBD_VID), /*idVendor*/ 137 | HIBYTE(USBD_VID), /*idVendor*/ 138 | LOBYTE(USBD_PID_FS), /*idVendor*/ 139 | HIBYTE(USBD_PID_FS), /*idVendor*/ 140 | 0x00, /*bcdDevice rel. 2.00*/ 141 | 0x02, 142 | USBD_IDX_MFC_STR, /*Index of manufacturer string*/ 143 | USBD_IDX_PRODUCT_STR, /*Index of product string*/ 144 | USBD_IDX_SERIAL_STR, /*Index of serial number string*/ 145 | USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/ 146 | } ; 147 | /* USB_DeviceDescriptor */ 148 | /* BOS descriptor */ 149 | #if (USBD_LPM_ENABLED == 1) 150 | #if defined ( __ICCARM__ ) /*!< IAR Compiler */ 151 | #pragma data_alignment=4 152 | #endif 153 | __ALIGN_BEGIN uint8_t USBD_FS_BOSDesc[USB_SIZ_BOS_DESC] __ALIGN_END = 154 | { 155 | 0x5, 156 | USB_DESC_TYPE_BOS, 157 | 0xC, 158 | 0x0, 159 | 0x1, /* 1 device capability */ 160 | /* device capability*/ 161 | 0x7, 162 | USB_DEVICE_CAPABITY_TYPE, 163 | 0x2, 164 | 0x2, /*LPM capability bit set */ 165 | 0x0, 166 | 0x0, 167 | 0x0 168 | }; 169 | #endif 170 | 171 | #if defined ( __ICCARM__ ) /*!< IAR Compiler */ 172 | #pragma data_alignment=4 173 | #endif 174 | 175 | /* USB Standard Device Descriptor */ 176 | __ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END = 177 | { 178 | USB_LEN_LANGID_STR_DESC, 179 | USB_DESC_TYPE_STRING, 180 | LOBYTE(USBD_LANGID_STRING), 181 | HIBYTE(USBD_LANGID_STRING), 182 | }; 183 | 184 | #if defined ( __ICCARM__ ) /*!< IAR Compiler */ 185 | #pragma data_alignment=4 186 | #endif 187 | __ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END; 188 | /** 189 | * @} 190 | */ 191 | 192 | /** @defgroup USBD_DESC_Private_FunctionPrototypes 193 | * @{ 194 | */ 195 | /** 196 | * @} 197 | */ 198 | 199 | /** @defgroup USBD_DESC_Private_Functions 200 | * @{ 201 | */ 202 | 203 | /** 204 | * @brief USBD_FS_DeviceDescriptor 205 | * return the device descriptor 206 | * @param speed : current device speed 207 | * @param length : pointer to data length variable 208 | * @retval pointer to descriptor buffer 209 | */ 210 | uint8_t * USBD_FS_DeviceDescriptor( USBD_SpeedTypeDef speed , uint16_t *length) 211 | { 212 | *length = sizeof(USBD_FS_DeviceDesc); 213 | return USBD_FS_DeviceDesc; 214 | } 215 | 216 | /** 217 | * @brief USBD_FS_LangIDStrDescriptor 218 | * return the LangID string descriptor 219 | * @param speed : current device speed 220 | * @param length : pointer to data length variable 221 | * @retval pointer to descriptor buffer 222 | */ 223 | uint8_t * USBD_FS_LangIDStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length) 224 | { 225 | *length = sizeof(USBD_LangIDDesc); 226 | return USBD_LangIDDesc; 227 | } 228 | 229 | /** 230 | * @brief USBD_FS_ProductStrDescriptor 231 | * return the product string descriptor 232 | * @param speed : current device speed 233 | * @param length : pointer to data length variable 234 | * @retval pointer to descriptor buffer 235 | */ 236 | uint8_t * USBD_FS_ProductStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length) 237 | { 238 | if(speed == 0) 239 | { 240 | USBD_GetString (USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 241 | } 242 | else 243 | { 244 | USBD_GetString (USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 245 | } 246 | return USBD_StrDesc; 247 | } 248 | 249 | /** 250 | * @brief USBD_FS_ManufacturerStrDescriptor 251 | * return the manufacturer string descriptor 252 | * @param speed : current device speed 253 | * @param length : pointer to data length variable 254 | * @retval pointer to descriptor buffer 255 | */ 256 | uint8_t * USBD_FS_ManufacturerStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length) 257 | { 258 | USBD_GetString (USBD_MANUFACTURER_STRING, USBD_StrDesc, length); 259 | return USBD_StrDesc; 260 | } 261 | 262 | /** 263 | * @brief USBD_FS_SerialStrDescriptor 264 | * return the serial number string descriptor 265 | * @param speed : current device speed 266 | * @param length : pointer to data length variable 267 | * @retval pointer to descriptor buffer 268 | */ 269 | uint8_t * USBD_FS_SerialStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length) 270 | { 271 | if(speed == USBD_SPEED_HIGH) 272 | { 273 | USBD_GetString (USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length); 274 | } 275 | else 276 | { 277 | USBD_GetString (USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length); 278 | } 279 | return USBD_StrDesc; 280 | } 281 | 282 | /** 283 | * @brief USBD_FS_ConfigStrDescriptor 284 | * return the configuration string descriptor 285 | * @param speed : current device speed 286 | * @param length : pointer to data length variable 287 | * @retval pointer to descriptor buffer 288 | */ 289 | uint8_t * USBD_FS_ConfigStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length) 290 | { 291 | if(speed == USBD_SPEED_HIGH) 292 | { 293 | USBD_GetString (USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 294 | } 295 | else 296 | { 297 | USBD_GetString (USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 298 | } 299 | return USBD_StrDesc; 300 | } 301 | 302 | /** 303 | * @brief USBD_HS_InterfaceStrDescriptor 304 | * return the interface string descriptor 305 | * @param speed : current device speed 306 | * @param length : pointer to data length variable 307 | * @retval pointer to descriptor buffer 308 | */ 309 | uint8_t * USBD_FS_InterfaceStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length) 310 | { 311 | if(speed == 0) 312 | { 313 | USBD_GetString (USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 314 | } 315 | else 316 | { 317 | USBD_GetString (USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 318 | } 319 | return USBD_StrDesc; 320 | } 321 | #if (USBD_LPM_ENABLED == 1) 322 | /** 323 | * @brief USBD_FS_USR_BOSDescriptor 324 | * return the BOS descriptor 325 | * @param speed : current device speed 326 | * @param length : pointer to data length variable 327 | * @retval pointer to descriptor buffer 328 | */ 329 | uint8_t *USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed , uint16_t *length) 330 | { 331 | *length = sizeof(USBD_FS_BOSDesc); 332 | return (uint8_t*)USBD_FS_BOSDesc; 333 | } 334 | #endif 335 | /** 336 | * @} 337 | */ 338 | 339 | /** 340 | * @} 341 | */ 342 | 343 | /** 344 | * @} 345 | */ 346 | 347 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 348 | -------------------------------------------------------------------------------- /stm32/config.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | File.Version=5 3 | IWDG.IPParameters=Prescaler 4 | IWDG.Prescaler=IWDG_PRESCALER_32 5 | KeepUserPlacement=false 6 | Mcu.Family=STM32F4 7 | Mcu.IP0=IWDG 8 | Mcu.IP1=NVIC 9 | Mcu.IP2=RCC 10 | Mcu.IP3=USB_DEVICE 11 | Mcu.IP4=USB_OTG_FS 12 | Mcu.IPNb=5 13 | Mcu.Name=STM32F405RGTx 14 | Mcu.Package=LQFP64 15 | Mcu.Pin0=PC14-OSC32_IN 16 | Mcu.Pin1=PC15-OSC32_OUT 17 | Mcu.Pin2=PH0-OSC_IN 18 | Mcu.Pin3=PH1-OSC_OUT 19 | Mcu.Pin4=PA11 20 | Mcu.Pin5=PA12 21 | Mcu.Pin6=PC12 22 | Mcu.Pin7=VP_IWDG_VS_IWDG 23 | Mcu.Pin8=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS 24 | Mcu.PinsNb=9 25 | Mcu.UserName=STM32F405RGTx 26 | MxCube.Version=4.8.0 27 | MxDb.Version=DB.4.0.80 28 | NVIC.OTG_FS_IRQn=true\:0\:0\:false 29 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 30 | NVIC.SysTick_IRQn=true\:0\:0\:false 31 | PA11.Mode=Device_Only 32 | PA11.Signal=USB_OTG_FS_DM 33 | PA12.Mode=Device_Only 34 | PA12.Signal=USB_OTG_FS_DP 35 | PC12.GPIOParameters=GPIO_ModeDefaultOutputPP,GPIO_Label,GPIO_Speed,GPIO_PuPd 36 | PC12.GPIO_Label=LED 37 | PC12.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD 38 | PC12.GPIO_PuPd=GPIO_NOPULL 39 | PC12.GPIO_Speed=GPIO_SPEED_LOW 40 | PC12.Locked=true 41 | PC12.Signal=GPIO_Output 42 | PC14-OSC32_IN.Mode=LSE-External-Oscillator 43 | PC14-OSC32_IN.Signal=RCC_OSC32_IN 44 | PC15-OSC32_OUT.Mode=LSE-External-Oscillator 45 | PC15-OSC32_OUT.Signal=RCC_OSC32_OUT 46 | PCC.Checker=false 47 | PCC.Family=STM32F4 48 | PCC.MCU=STM32F405RGTx 49 | PCC.MXVersion=4.8.0 50 | PCC.PartNumber=STM32F405RGTx 51 | PCC.Seq0=0 52 | PCC.SubFamily=STM32F405/415 53 | PCC.Temperature=25 54 | PCC.Vdd=3.3 55 | PH0-OSC_IN.Mode=HSE-External-Oscillator 56 | PH0-OSC_IN.Signal=RCC_OSC_IN 57 | PH1-OSC_OUT.Mode=HSE-External-Oscillator 58 | PH1-OSC_OUT.Signal=RCC_OSC_OUT 59 | ProjectManager.AskForMigrate=true 60 | ProjectManager.BackupPrevious=false 61 | ProjectManager.CompilerOptimize=2 62 | ProjectManager.ComputerToolchain=false 63 | ProjectManager.CoupleFile=false 64 | ProjectManager.DeletePrevious=true 65 | ProjectManager.DeviceId=STM32F405RGTx 66 | ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.5.0 67 | ProjectManager.FreePins=false 68 | ProjectManager.HalAssertFull=false 69 | ProjectManager.KeepUserCode=true 70 | ProjectManager.LastFirmware=true 71 | ProjectManager.LibraryCopy=1 72 | ProjectManager.ProjectBuild=false 73 | ProjectManager.ProjectFileName=config.ioc 74 | ProjectManager.ProjectName=config 75 | ProjectManager.TargetToolchain=EWARM 76 | ProjectManager.ToolChainLocation= 77 | RCC.48MHZClocksFreq_Value=48000000 78 | RCC.AHBFreq_Value=96000000 79 | RCC.APB1CLKDivider=RCC_HCLK_DIV4 80 | RCC.APB1Freq_Value=24000000 81 | RCC.APB1TimFreq_Value=48000000 82 | RCC.APB2CLKDivider=RCC_HCLK_DIV4 83 | RCC.APB2Freq_Value=24000000 84 | RCC.APB2TimFreq_Value=48000000 85 | RCC.CortexFreq_Value=96000000 86 | RCC.EthernetFreq_Value=96000000 87 | RCC.FCLKCortexFreq_Value=96000000 88 | RCC.FamilyName=M 89 | RCC.HCLKFreq_Value=96000000 90 | RCC.HSE_VALUE=8000000 91 | RCC.HSI_VALUE=16000000 92 | RCC.I2SClocksFreq_Value=96000000 93 | RCC.IPParameters=HCLKFreq_Value,SYSCLKFreq_VALUE,I2SClocksFreq_Value,PLLCLKFreq_Value,FamilyName,RTCHSEDivFreq_Value,APB2CLKDivider,RTCFreq_Value,SYSCLKSource,MCO2PinFreq_Value,CortexFreq_Value,FCLKCortexFreq_Value,APB1CLKDivider,APB2Freq_Value,VCOI2SOutputFreq_Value,APB2TimFreq_Value,HSE_VALUE,PLLM,HSI_VALUE,VcooutputI2S,APB1Freq_Value,APB1TimFreq_Value,48MHZClocksFreq_Value,LSI_VALUE,AHBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,EthernetFreq_Value 94 | RCC.LSI_VALUE=32000 95 | RCC.MCO2PinFreq_Value=96000000 96 | RCC.PLLCLKFreq_Value=96000000 97 | RCC.PLLM=8 98 | RCC.RTCFreq_Value=32000 99 | RCC.RTCHSEDivFreq_Value=4000000 100 | RCC.SYSCLKFreq_VALUE=96000000 101 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 102 | RCC.VCOI2SOutputFreq_Value=192000000 103 | RCC.VCOInputFreq_Value=1000000 104 | RCC.VCOOutputFreq_Value=192000000 105 | RCC.VcooutputI2S=96000000 106 | USB_DEVICE.CLASS_NAME-CDC_FS=CDC 107 | USB_DEVICE.IPParameters=CLASS_NAME-CDC_FS,VirtualModeFS,USBD_HandleTypeDef-CDC_FS,VirtualMode-CDC_FS 108 | USB_DEVICE.USBD_HandleTypeDef-CDC_FS=hUsbDeviceFS 109 | USB_DEVICE.VirtualMode-CDC_FS=Cdc 110 | USB_DEVICE.VirtualModeFS=Cdc_FS 111 | USB_OTG_FS.IPParameters=VirtualMode,vbus_sensing_enable 112 | USB_OTG_FS.VirtualMode=Device_Only 113 | USB_OTG_FS.vbus_sensing_enable=DISABLE 114 | VP_IWDG_VS_IWDG.Mode=IWDG_Activate 115 | VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG 116 | VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS 117 | VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS 118 | board= 119 | -------------------------------------------------------------------------------- /tests/echo.py: -------------------------------------------------------------------------------- 1 | import serial 2 | import random 3 | import sys 4 | 5 | letters = [chr(ord('A') + i) for i in range(30)] 6 | 7 | def random_str(): 8 | n, str = random.randrange(1, 1024), '' 9 | for i in range(n): 10 | str += random.choice(letters) 11 | return str 12 | 13 | def test1(com): 14 | s = random_str() 15 | s += '\r' 16 | com.write(s) 17 | r = com.read(len(s)) 18 | assert r == s 19 | 20 | if __name__ == '__main__': 21 | n = 0 22 | port = sys.argv[1] 23 | com = serial.Serial(port) 24 | while True: 25 | test1(com) 26 | n += 1 27 | if not n % 100: 28 | print '.', 29 | 30 | --------------------------------------------------------------------------------