├── .editorconfig ├── .flake8 ├── .git-blame-ignore-revs ├── .github └── workflows │ ├── ci.yml │ └── lint.yml ├── .gitignore ├── .pre-commit-config.yaml ├── .readthedocs.yml ├── LICENSE ├── NEWS ├── README.md ├── dev-requirements.txt ├── doc ├── requirements.txt └── source │ ├── _static │ └── theme_overrides.css │ ├── conf.py │ ├── dev │ ├── devsetup.rst │ └── index.rst │ ├── index.rst │ ├── ref │ ├── capi1.rst │ ├── glossary.rst │ ├── index.rst │ └── migrations.rst │ └── user │ ├── build_system │ ├── core_files.rst │ ├── dependencies.rst │ ├── eda_flows.rst │ ├── filters.rst │ ├── flags.rst │ ├── flow_options.rst │ ├── generators.rst │ ├── hooks.rst │ ├── index.rst │ ├── mappings.rst │ ├── tool_options.rst │ ├── virtual_cores.rst │ └── vpi.rst │ ├── cli.rst │ ├── index.rst │ ├── installation.rst │ ├── introduction.rst │ ├── knowledgebase.rst │ ├── optional_deps.png │ ├── overview.rst │ └── package_manager │ └── index.rst ├── extras └── bash-completion ├── fusesoc ├── capi2 │ ├── core.py │ ├── coredata.py │ ├── coreparser.py │ ├── exprs.py │ ├── generator.py │ ├── inheritance.py │ └── json_schema.py ├── config.py ├── core.py ├── coremanager.py ├── edalizer.py ├── filters │ ├── autotype.py │ ├── coredepsmk.py │ ├── custom.py │ ├── dot.py │ └── splitlib.py ├── fusesoc.py ├── librarymanager.py ├── lockfile.py ├── main.py ├── parser │ └── coreparser.py ├── provider │ ├── git.py │ ├── github.py │ ├── local.py │ ├── opencores.py │ ├── provider.py │ ├── svn.py │ └── url.py ├── utils.py └── vlnv.py ├── pyproject.toml ├── tests ├── capi2_cores │ ├── dependencies │ │ ├── top.core │ │ ├── used-1.0.core │ │ └── used-1.1.core │ ├── deptree │ │ ├── child1.core │ │ ├── child2.core │ │ ├── child3.core │ │ ├── child4.core │ │ ├── generated_child_a.core │ │ ├── generated_child_a.py │ │ └── root.core │ ├── files_out_of_hierarchy │ │ ├── bad.sv │ │ └── subdir │ │ │ ├── files_out_of_hierarchy.core │ │ │ └── good.sv │ ├── mapping │ │ ├── a.core │ │ ├── b.core │ │ ├── c.core │ │ ├── d.core │ │ ├── e.core │ │ ├── f.core │ │ ├── map_rec.core │ │ ├── map_vers.core │ │ └── top.core │ ├── misc │ │ ├── append.core │ │ ├── depends.core │ │ ├── dontpickthisfile │ │ ├── dummy.tcl │ │ ├── empty.core │ │ ├── f1 │ │ ├── f2 │ │ ├── f3 │ │ ├── f4 │ │ ├── fileattrs.core │ │ ├── files.core │ │ ├── filters.core │ │ ├── flags.core │ │ ├── flow.core │ │ ├── generate │ │ │ ├── file_cachetest │ │ │ ├── generate.core │ │ │ ├── generators.core │ │ │ └── testgen.py │ │ ├── hooks.core │ │ ├── parameters.core │ │ ├── scriptfile │ │ ├── subdir │ │ │ └── dummy.extra │ │ ├── syntax_error.core │ │ ├── targets.core │ │ ├── toplevel.core │ │ ├── typecheck.core │ │ ├── uncachable.core │ │ ├── vhdlfile │ │ ├── vlogfile │ │ ├── vpi.core │ │ └── vpifile │ ├── override │ │ ├── 1 │ │ │ └── basic.core │ │ └── 2 │ │ │ └── basic.core │ ├── parser │ │ ├── inheritance.core │ │ ├── no_additional_properties.core │ │ └── with_additional_properties.core │ ├── providers │ │ ├── url_simple.core │ │ ├── url_simple_with_user_agent.core │ │ ├── url_tar.core │ │ └── url_zip.core │ └── virtual │ │ ├── impl1.core │ │ ├── impl2.core │ │ ├── top_conflict.core │ │ ├── top_impl1.core │ │ ├── top_impl2.core │ │ ├── top_non_deterministic.core │ │ └── user.core ├── cores │ ├── adv_debug_sys │ │ └── adv_debug_sys.core │ ├── atlys │ │ ├── atlys.core │ │ └── data │ │ │ ├── atlys.ucf │ │ │ └── dummy_backend_tcl_file.tcl │ ├── elf-loader │ │ ├── check_libelf.sh │ │ ├── elf-loader.c │ │ ├── elf-loader.core │ │ └── vpi_wrapper.c │ ├── gpio │ │ └── gpio.core │ ├── jtag_tap │ │ └── jtag_tap-1.13.core │ ├── libstorage │ │ └── libstorage-1.0.core │ ├── misc │ │ ├── c3demo.core │ │ ├── c3demo.pcf │ │ ├── copytocore │ │ │ ├── copytocore.core │ │ │ ├── dummy.tcl │ │ │ └── subdir │ │ │ │ └── dummy.extra │ │ ├── dummy.tcl │ │ ├── dummy.xci │ │ ├── filetypes.core │ │ ├── ghdltest.core │ │ ├── gitcore.core │ │ ├── no_exe_script.core │ │ ├── nomain.core │ │ ├── opencorescore.core │ │ ├── paramtest.core │ │ ├── scripts │ │ │ ├── no_exe_script │ │ │ ├── post_build_script │ │ │ ├── post_run_script │ │ │ ├── pre_build_script │ │ │ └── pre_run_script │ │ ├── scriptscore.core │ │ ├── subdir │ │ │ └── dummy.extra │ │ └── svn.core │ ├── mor1kx-arty │ │ ├── mor1kx-arty.core │ │ └── mor1kx-arty.system │ ├── mor1kx-generic │ │ ├── mor1kx-generic.core │ │ └── scripts │ │ │ ├── post_run_script │ │ │ ├── pre_build_script │ │ │ └── pre_run_script │ ├── mor1kx │ │ └── mor1kx-3.1.core │ ├── sockit │ │ └── sockit.core │ ├── uart16550 │ │ └── uart16550-1.5.core │ ├── verilator_tb_utils │ │ └── verilator_tb_utils.core │ ├── verilog-arbiter │ │ └── verilog-arbiter-r1.core │ ├── verilog_utils │ │ ├── verilog_utils.core │ │ └── verilog_utils.vh │ ├── vga_lcd │ │ └── vga_lcd.core │ ├── vlog_tb_utils │ │ ├── files │ │ │ └── 0001-testpatch.patch │ │ └── vlog_tb_utils-1.1.core │ ├── wb_common │ │ ├── wb_common.core │ │ ├── wb_common.v │ │ └── wb_common_params.v │ └── wb_intercon │ │ ├── dummy_icarus.v │ │ └── wb_intercon-1.0.core ├── lockfiles │ ├── dependencies-partial-1.0.lock.yml │ ├── dependencies-partial.lock.yml │ ├── dependencies.lock.yml │ ├── duplicates.lock.yml │ └── works.lock.yml ├── test_capi2.py ├── test_capi2 │ ├── generators.info │ └── targets.info ├── test_common.py ├── test_config.py ├── test_coremanager.py ├── test_edalizer.py ├── test_exprs.py ├── test_ignored_dirs.py ├── test_libraries.py ├── test_lockfile.py ├── test_provider.py ├── test_provider │ ├── file.tar.gz │ ├── file.v │ ├── file.zip │ └── vlog_functions.v ├── test_usecases.py ├── test_vlnv.py └── userguide │ ├── blinky │ ├── blinky.core │ ├── data │ │ └── nexys_video.xdc │ ├── rtl │ │ ├── blinky.sv │ │ └── macros.svh │ └── tb │ │ └── blinky_tb.sv │ └── dualblinky │ ├── data │ └── nexys_video.xdc │ ├── dualblinky.core │ └── rtl │ └── dualblinky.sv └── tox.ini /.editorconfig: -------------------------------------------------------------------------------- 1 | # Editorconfig, a commonly used configuration file for editors. 2 | # See https://editorconfig.org/ for details and syntax. 3 | root = true 4 | 5 | # Unix-style newlines with a newline ending every file 6 | [*] 7 | end_of_line = lf 8 | insert_final_newline = true 9 | charset = utf-8 10 | 11 | # 4 space indentation 12 | [*.py] 13 | indent_style = space 14 | indent_size = 4 15 | trim_trailing_whitespace = true 16 | 17 | # Tab indentation (no size specified) 18 | [Makefile] 19 | indent_style = tab 20 | -------------------------------------------------------------------------------- /.flake8: -------------------------------------------------------------------------------- 1 | [flake8] 2 | max-line-length = 88 3 | -------------------------------------------------------------------------------- /.git-blame-ignore-revs: -------------------------------------------------------------------------------- 1 | # Ignore reformatting changes in git blame. 2 | 3bd574aa7aa8330785a4362fde249dae7d7b6562 3 | -------------------------------------------------------------------------------- /.github/workflows/ci.yml: -------------------------------------------------------------------------------- 1 | name: CI 2 | 3 | on: 4 | push: 5 | pull_request: 6 | 7 | # Run CI once a week even without code changes to ensure tests pass with updated dependencies. 8 | schedule: 9 | - cron: '0 0 * * 5' 10 | 11 | # Allow triggering a CI run from the web UI. 12 | workflow_dispatch: 13 | 14 | jobs: 15 | build-and-test: 16 | strategy: 17 | fail-fast: false 18 | matrix: 19 | os: 20 | - { icon: 🐧, name: ubuntu-22.04 } 21 | - { icon: 🍎, name: macos-latest } 22 | # CI is currently broken on Windows 23 | # https://github.com/olofk/fusesoc/issues/528 24 | #- { icon: 🧊, name: windows-latest } 25 | pyver: 26 | - '3.7' 27 | - '3.8' 28 | - '3.9' 29 | - '3.10' 30 | - '3.11' 31 | - '3.12' 32 | exclude: 33 | #Fails because github can't find an arm64 image for Python 3.7??? 34 | - os: {name: macos-latest} 35 | pyver: '3.7' 36 | #Fails because one test expects a different output during an exception 37 | - os: {name: macos-latest} 38 | pyver: '3.8' 39 | runs-on: ${{ matrix.os.name }} 40 | name: ${{ matrix.os.icon }} ${{ matrix.os.name }} | ${{ matrix.pyver }} 41 | steps: 42 | 43 | - name: 🧰 Repository Checkout 44 | uses: actions/checkout@v4 45 | 46 | - name: 🐍 Set up Python ${{ matrix.pyver }} 47 | uses: actions/setup-python@v5 48 | with: 49 | python-version: ${{ matrix.pyver }} 50 | 51 | - name: Display Python version 52 | run: python -c "import sys; print(sys.version)" 53 | 54 | - name: 🛠️ Install Tox and any other packages 55 | run: pip install tox tox-gh-actions 56 | 57 | - name: 🚧 Build package and run tests with tox 58 | # XXX: Remove `-e py3-ci` and rely on the settings in tox.ini as soon as 59 | # https://github.com/ymyzk/tox-gh-actions/issues/44 is resolved. 60 | run: tox -e py3-ci 61 | -------------------------------------------------------------------------------- /.github/workflows/lint.yml: -------------------------------------------------------------------------------- 1 | name: lint 2 | 3 | on: [pull_request, push] 4 | 5 | jobs: 6 | pre-commit: 7 | runs-on: ubuntu-22.04 8 | steps: 9 | - uses: actions/checkout@v4 10 | - uses: actions/setup-python@v5 11 | - uses: pre-commit/action@v2.0.0 12 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | *.pyc 2 | fusesoc.log 3 | doc/*.html 4 | .eggs/ 5 | .tox/ 6 | fusesoc.egg-info/ 7 | __pycache__/ 8 | 9 | # auto-generated by setuptools_scm during the build 10 | fusesoc/version.py 11 | 12 | # pytest/coverage files 13 | .coverage 14 | htmlcov 15 | tests/build 16 | tests/cache 17 | .pytest_cache/ 18 | -------------------------------------------------------------------------------- /.pre-commit-config.yaml: -------------------------------------------------------------------------------- 1 | # Configuration for pre-commit (https://pre-commit.com/), a tool to run 2 | # formatters, linters, and other productivity tools before a commit. 3 | repos: 4 | - repo: https://github.com/pre-commit/pre-commit-hooks 5 | rev: v3.3.0 6 | hooks: 7 | - id: check-ast 8 | - id: check-builtin-literals 9 | - id: check-case-conflict 10 | - id: check-docstring-first 11 | - id: requirements-txt-fixer 12 | - id: check-yaml 13 | exclude: ^tests/capi2_cores/misc/syntax_error\.core$ 14 | types: [file] 15 | files: ^tests/capi2_cores/.+\.core$ 16 | - id: end-of-file-fixer 17 | # Test golden references 18 | exclude: ^tests/(.+\.(info|patch)|test_provider/.+\.v) 19 | - id: trailing-whitespace 20 | # Test golden references 21 | exclude: ^tests/(.+\.(info|patch)|test_provider/.+\.v) 22 | - repo: https://github.com/asottile/pyupgrade 23 | rev: v2.7.4 24 | hooks: 25 | - id: pyupgrade 26 | # for now don't force to change from %-operator to {} 27 | args: [--keep-percent-format, --py3-plus, --py36-plus] 28 | - repo: https://github.com/PyCQA/isort 29 | rev: "5.11.5" 30 | hooks: 31 | - id: isort 32 | args: ["--profile", "black", "--filter-files"] 33 | - repo: https://github.com/psf/black 34 | rev: 22.3.0 35 | hooks: 36 | - id: black 37 | -------------------------------------------------------------------------------- /.readthedocs.yml: -------------------------------------------------------------------------------- 1 | # Read the Docs configuration file 2 | # See https://docs.readthedocs.io/en/stable/config-file/v2.html for details 3 | 4 | version: 2 5 | 6 | sphinx: 7 | configuration: doc/source/conf.py 8 | 9 | # Optionally build your docs in additional formats such as PDF and ePub 10 | formats: all 11 | 12 | # Optionally set the version of Python and requirements required to build your docs 13 | python: 14 | install: 15 | - requirements: doc/requirements.txt 16 | - method: pip 17 | path: . 18 | 19 | build: 20 | os: "ubuntu-22.04" 21 | tools: 22 | python: "3.11" 23 | jobs: 24 | post_checkout: 25 | - git fetch --unshallow || true 26 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | BSD 2-Clause License 2 | 3 | Copyright FuseSoC contributors 4 | All rights reserved. 5 | 6 | Redistribution and use in source and binary forms, with or without 7 | modification, are permitted provided that the following conditions are met: 8 | 9 | * Redistributions of source code must retain the above copyright notice, this 10 | list of conditions and the following disclaimer. 11 | 12 | * Redistributions in binary form must reproduce the above copyright notice, 13 | this list of conditions and the following disclaimer in the documentation 14 | and/or other materials provided with the distribution. 15 | 16 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 20 | FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 | DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23 | CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 | OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # FuseSoC 2 | 3 | [![CI status](https://github.com/olofk/fusesoc/workflows/CI/badge.svg)](https://github.com/olofk/fusesoc/actions?query=workflow%3ACI) 4 | [![image](https://img.shields.io/pypi/dm/fusesoc.svg?label=PyPI%20downloads)](https://pypi.org/project/fusesoc/) 5 | 6 | ## Introduction 7 | 8 | FuseSoC is an award-winning package manager and a set of build tools for 9 | HDL (Hardware Description Language) code. 10 | 11 | Its main purpose is to increase reuse of IP (Intellectual Property) 12 | cores and be an aid for creating, building and simulating SoC solutions. 13 | 14 | FuseSoC makes it easier to 15 | 16 | - reuse existing cores 17 | - create compile-time or run-time configurations 18 | - run regression tests against multiple simulators 19 | - port designs to new targets 20 | - let other projects use your code 21 | - set up continuous integration 22 | 23 | To learn more about FuseSoC head over to the 24 | [User Guide](https://fusesoc.readthedocs.io/en/stable/user). 25 | 26 | ## Getting started 27 | 28 | ### Installing the latest release 29 | 30 | FuseSoC works on Linux, Windows, and macOS. It is written in Python and can be 31 | installed like any other Python package through "pip". Please refer to the 32 | full list of system requirements and installation instructions in the 33 | [Installation section in the User Guide](https://fusesoc.readthedocs.io/en/stable/user/installation.html). 34 | 35 | ### Quick start 36 | 37 | To check if FuseSoC is working, and to get an initial feeling for how FuseSoC 38 | works, you can try to simulate a simple hardware design from our core library. 39 | 40 | First, create and enter an empty workspace 41 | 42 | mkdir workspace 43 | cd workspace 44 | 45 | Install the FuseSoc base library into the workspace 46 | 47 | fusesoc library add fusesoc-cores https://github.com/fusesoc/fusesoc-cores 48 | 49 | Get a list of cores found in the workspace 50 | 51 | fusesoc core list 52 | 53 | If you have any of the supported simulators installed, you can try to 54 | run a simulation on one of the cores as well. For example, 55 | `fusesoc run --target=sim i2c` will run a regression test on the core 56 | i2c with Icarus Verilog. If you want to try another simulator instead, 57 | add e.g. `--tool=modelsim` or `--tool=xcelium` between `run` and `i2c`. 58 | 59 | `fusesoc --help` will give you more information on commands and switches. 60 | 61 | Did it work? Great! FuseSoC can be used to create FPGA images, perform 62 | linting, manage your IP libraries or do formal verification as well. 63 | Check out the [online documentation](https://fusesoc.readthedocs.io/en/stable/) 64 | to learn more about creating your own core files and using 65 | existing ones. If it didn't work, please get in touch (see below). 66 | 67 | ## Next steps 68 | 69 | A good way to get your first hands-on experience with FuseSoC is to 70 | contribute to the [LED to Believe](https://github.com/fusesoc/blinky) 71 | project. This project aims to used FuseSoC to blink a LED on every 72 | available FPGA development board in existence. There are already around 73 | 40 different boards supported. If your board is already supported, 74 | great, then you can run your first FuseSoC-based design. If it's not 75 | supported, great, you now have the chance to add it to the list of 76 | supported boards. Either way, head over to [LED to 77 | Believe](https://github.com/fusesoc/blinky) to learn more and see how to 78 | go from a blinking LED to running a RISC-V core on an FPGA. 79 | 80 | ## Need help? 81 | 82 | FuseSoC comes with extensive 83 | [online documentation](https://fusesoc.readthedocs.io/en/stable/index.html). 84 | 85 | For quick communication with the active developers, feel free to join us at the 86 | [FuseSoC chat](https://gitter.im/librecores/fusesoc). 87 | 88 | If you have found an issue, or want to know more about currently known problems, 89 | check out the 90 | [issue tracker on GitHub](https://github.com/olofk/fusesoc/issues). 91 | 92 | If you are looking for professional paid support, we are happy to 93 | provide feature additions, bug fixes, user training, setting up core 94 | libraries, migrating existing designs to FuseSoC and other things. 95 | Please contact for more information. 96 | 97 | ## Contributing to FuseSoC 98 | 99 | FuseSoC is developed by an active and friendly community, and you're welcome to 100 | join! You can read more about setting up a development environment in our 101 | [Developer's Guide](https://fusesoc.readthedocs.io/en/latest/dev/index.html). 102 | 103 | You can file bug reports and propose changes in the [olofk/fusesoc repository on GitHub](https://github.com/olofk/fusesoc). 104 | 105 | ## Further reading 106 | 107 | * A Scalable Approach to IP Management with FuseSoC [paper](https://osda.gitlab.io/19/kindgren.pdf) and [slides](https://osda.gitlab.io/19/kindgren-slides.pdf) from OSDA 2019 108 | * Antmicro blog post on [how to use FuseSoC as a linter](https://antmicro.com/blog/2020/04/systemverilog-linter-and-formatter-in-fusesoc/) 109 | * [FuseSoC-related posts on the Tales from Beyond the Register Map blog](https://blog.award-winning.me/search/label/FuseSoC) 110 | * [Presentation from RISC-V Week 2022](https://www.award-winning.me/fusesoc-rvweek22) 111 | * [Presentation from Latch-Up Portland 2019](https://www.youtube.com/watch?v=7eWRAOK9mns) 112 | * [Presentation from WOSH 2019](https://www.youtube.com/watch?v=HOFYplIBSWM) 113 | * [Presentation from ORConf 2017](https://www.youtube.com/watch?v=iPpT9k_H67k) 114 | * [Presentation from ORConf 2016](https://www.youtube.com/watch?v=pKlJWe_HKPM) 115 | 116 | ## License 117 | 118 | FuseSoC is licensed under the permissive 2-clause BSD license, freely allowing 119 | use, modification, and distribution of FuseSoC for all kinds of projects. 120 | Please refer to the [LICENSE](LICENSE) file for details. 121 | -------------------------------------------------------------------------------- /dev-requirements.txt: -------------------------------------------------------------------------------- 1 | # Python requirements needed to develop fusesoc 2 | # "End-user" dependencies (during build or install time) are listed in setup.py 3 | pre-commit>=2.9.0 4 | 5 | # It is recommended to run pytest through tox, in which case this dependency is 6 | # not needed. 7 | pytest>=3.3.0 8 | tox 9 | -------------------------------------------------------------------------------- /doc/requirements.txt: -------------------------------------------------------------------------------- 1 | myst_parser >= 0.18.0 2 | Sphinx >= 6.2.1 3 | sphinx-rtd-theme >= 1.2.0 4 | sphinxcontrib-programoutput 5 | -------------------------------------------------------------------------------- /doc/source/_static/theme_overrides.css: -------------------------------------------------------------------------------- 1 | /* override table width restrictions */ 2 | @media screen and (min-width: 767px) { 3 | 4 | .wy-table-responsive table td { 5 | /* !important prevents the common CSS stylesheets from overriding 6 | this as on RTD they are loaded after this stylesheet */ 7 | white-space: normal !important; 8 | } 9 | 10 | .wy-table-responsive { 11 | overflow: visible !important; 12 | } 13 | } 14 | -------------------------------------------------------------------------------- /doc/source/dev/devsetup.rst: -------------------------------------------------------------------------------- 1 | Development Setup 2 | ================= 3 | 4 | .. note:: 5 | 6 | To make changes to a backend, e.g. to the way a simulator or synthesis tool is called, you need to modify edalize, not fusesoc. 7 | Edalize is a separate project, see https://github.com/olofk/edalize for more information. 8 | 9 | Get the code 10 | ------------ 11 | 12 | The FuseSoC source code is maintained in a git repository hosted on GitHub. 13 | To improve FuseSoC itself, or to test the latest unreleased version, it is necessary to clone the git repository first. 14 | 15 | .. code-block:: bash 16 | 17 | cd your/preferred/source/directory 18 | git clone https://github.com/olofk/fusesoc 19 | 20 | 21 | Setup development environment 22 | ----------------------------- 23 | 24 | .. note:: 25 | 26 | If you have already installed FuseSoC, remove it first using ``pip3 uninstall fusesoc``. 27 | 28 | To develop FuseSoC and test the changes, the fusesoc package needs to be installed in editable or development mode. 29 | In this mode, the ``fusesoc`` command is linked to the source directory, and changes made to the source code are immediately visible when calling ``fusesoc``. 30 | 31 | .. code-block:: bash 32 | 33 | # Install all Python packages required to develop fusesoc 34 | pip3 install --user -r dev-requirements.txt 35 | 36 | # Install Git pre-commit hooks, e.g. for the code formatter and lint tools 37 | pre-commit install 38 | 39 | # Install the fusesoc package in editable mode 40 | pip3 install --user -e . 41 | 42 | .. note:: 43 | 44 | All commands above use Python 3 and install software only for the current user. 45 | If, after this installation, the ``fusesoc`` command cannot be found adjust your ``PATH`` environment variable to include ``~/.local/bin``. 46 | 47 | After this installation is completed, you can 48 | 49 | * edit files in the source directory and re-run ``fusesoc`` to immediately see the changes, 50 | * run the unit tests as outlined in the section below, and 51 | * use linter and automated code formatters. 52 | 53 | Formatting and linting code 54 | --------------------------- 55 | 56 | The FuseSoC code comes with tooling to automatically format code to conform to our expectations. 57 | These tools are installed and called through a tool called `pre-commit `_. 58 | No setup is required: whenever you do a ``git commit``, the necessary tools are called and your code is automatically formatted and checked for common mistakes. 59 | 60 | To check the whole source code ``pre-commit`` can be run directly: 61 | 62 | .. code-block:: bash 63 | 64 | # check and fix all files 65 | pre-commit run -a 66 | 67 | Running tests 68 | ------------- 69 | 70 | The FuseSoC contains unit tests written using the pytest framework. 71 | To run the tests in an isolated environment it is recommended to run pytest through tox, which first creates a package of the source code, installs it, and then runs the tests. 72 | This ensures that packaging and environment errors are less likely to slip through. 73 | 74 | .. code-block:: bash 75 | 76 | cd fusesoc/source/directory 77 | 78 | # Run all tests in an isolated environment (recommended) 79 | tox 80 | 81 | # All arguments passed to tox after -- are passed to pytest directly. 82 | # E.g. run a single test: use filename::method_name, e.g. 83 | tox -- tests/test_capi2.py::test_capi2_get_tool --verbose 84 | 85 | # Alternatively, tests can be run directly from the source tree. 86 | # E.g. to run a single test: use filename::method_name, e.g. 87 | python3 -m pytest 88 | 89 | Refer to the `pytest documentation `_ for more information how tests can be run. 90 | 91 | .. note:: 92 | 93 | In many installations you can replace ``python3 -m pytest`` with the shorter ``pytest`` command. 94 | 95 | Building the documentation 96 | -------------------------- 97 | 98 | The FuseSoC documentation (i.e., the thing you're reading right now) is built from files in the ``doc`` directory in the FuseSoC source repository. 99 | The documentation is written `reStructuredText `_, and `Sphinx `_ is used to convert the documentation into different output formats, such as HTML or PDF. 100 | 101 | The most convenient way of working on documentation is to have a browser window open with the rendered documentation next an editor where you work on the reStructuredText files. 102 | Run the following command to build the documentation: 103 | 104 | .. code-block:: bash 105 | 106 | cd fusesoc/source/directory 107 | tox -e doc-autobuild 108 | 109 | The documentation is now built and can be accessed in a browser. 110 | Look for a line similar to ``[sphinx-autobuild] Serving on http://127.0.0.1:8000`` and point your browser to the link, e.g. ``http://127.0.0.1:8000``. 111 | 112 | Whenever a change to a documentation file is detected the documentation will be rebuilt automatically and the refreshed in the browser without the need for further manual action (it might take a couple seconds, though). 113 | -------------------------------------------------------------------------------- /doc/source/dev/index.rst: -------------------------------------------------------------------------------- 1 | ######################### 2 | FuseSoC Developer's Guide 3 | ######################### 4 | 5 | .. toctree:: 6 | :maxdepth: 2 7 | :caption: Contents 8 | 9 | devsetup 10 | -------------------------------------------------------------------------------- /doc/source/index.rst: -------------------------------------------------------------------------------- 1 | ===================== 2 | FuseSoC Documentation 3 | ===================== 4 | 5 | FuseSoC is a build system for digital hardware (e.g. Verilog or VHDL designs), and a package manager for reusable blocks in hardware designs. 6 | 7 | This documentation contains material for different audiences. 8 | 9 | The :doc:`User Guide ` explains how to get started with FuseSoC, starting from the installation. 10 | 11 | The :doc:`Reference Guide ` provides a detailed description of all file formats and APIs. 12 | 13 | The :doc:`Developer's Guide ` is aimed at developers of FuseSoC itself. 14 | It explains how to set up a development environment, how the source code is structured, and how patches and bug reports can be submitted to the project. 15 | 16 | .. toctree:: 17 | :maxdepth: 1 18 | :caption: Chapters 19 | :hidden: 20 | 21 | user/index.rst 22 | ref/index.rst 23 | dev/index.rst 24 | -------------------------------------------------------------------------------- /doc/source/ref/glossary.rst: -------------------------------------------------------------------------------- 1 | ******** 2 | Glossary 3 | ******** 4 | 5 | In the context of FuseSoC some terms have special meaning. 6 | This glossary section explains some of the jargon used. 7 | 8 | .. glossary:: 9 | :sorted: 10 | 11 | CAPI2 12 | Short for "Core API version 2." 13 | The schema or "language" used in :term:`core files `. 14 | The :ref:`ref_capi2` describes the syntax in detail. 15 | 16 | core 17 | A core is a reasonably self-contained, reusable piece of IP, such as a FIFO implementation. 18 | See also :ref:`ug_overview_cores`. 19 | 20 | core file 21 | core description file 22 | A file describing a :term:`core`, including source files, available targets, etc. 23 | A core file is a :term:`YAML` file which follows :term:`CAPI2` schema. 24 | Core files names must end in ``.core``. 25 | 26 | semantic versioning 27 | SemVer 28 | Semantic versioning is a convention to give meaning to version numbers. 29 | See :ref:`ug_build_system_dependencies_semver` and `semver.org `_. 30 | 31 | target 32 | See :ref:`ug_overview_targets`. 33 | 34 | tool 35 | tool flow 36 | See :ref:`ug_overview_toolflows`. 37 | 38 | stage 39 | build stage 40 | See :ref:`ug_overview_buildstages`. 41 | 42 | YAML 43 | YAML is (among other things) a markup language, commonly used for configuration files. 44 | It is used in FuseSoC in various places, especially for :term:`core description files ` and for EDAM files. 45 | 46 | Read more about YAML on `Wikipedia `_ or on `yaml.org `_. 47 | 48 | VLNV 49 | Vendor, Library, Name, and Version: the format used for :term:`core` names. 50 | In core names, the four parts are separated by colons, forming a name like ``vendor:library:name:version``. 51 | 52 | See also :ref:`ug_build_system_core_name`. 53 | -------------------------------------------------------------------------------- /doc/source/ref/index.rst: -------------------------------------------------------------------------------- 1 | ######################## 2 | FuseSoC Reference Manual 3 | ######################## 4 | 5 | .. toctree:: 6 | :maxdepth: 2 7 | :caption: Contents 8 | 9 | capi2.md 10 | migrations.rst 11 | glossary.rst 12 | -------------------------------------------------------------------------------- /doc/source/user/build_system/eda_flows.rst: -------------------------------------------------------------------------------- 1 | .. _ug_build_system_eda_flows: 2 | 3 | Interfacing EDA tool flows 4 | ========================== 5 | 6 | A design described by FuseSoC core description files is intended to be used by one or more EDA tools such as simulators, synthesis tools, linters etc. FuseSoC uses `Edalize `_ to configure and run EDA tools. FuseSoC users still need to select which EDA tool or flow of tools to be run and in many cases also provide configuration to Edalize. This is done from the target section of the core description files. 7 | 8 | .. note:: 9 | 10 | Edalize currently exposes two different APIs called the *tool API* and *flow API* respectively. These have different configuration keys in the core description files. The new flow API is intended to become the default API. However, not all Edalize backends have been converted to the new API, so the old tool API remains in use. If both the `default_tool` key (from the tool API) and the `flow` key (from the flow API) is defined in a target, the flow API will take precedence. 11 | 12 | .. toctree:: 13 | :maxdepth: 2 14 | :caption: Using the Edalize tool interfacing APIs 15 | 16 | flow_options.rst 17 | tool_options.rst 18 | 19 | 20 | 21 | .. note:: 22 | 23 | Where to find tool- or flow-specific code in FuseSoC 24 | 25 | The tool- and flow-specific code is provided by the `Edalize library `_. 26 | Most files, such as project files and Makefiles, are templates within edalize and can be improved easily if necessary. 27 | Please open an issue at the `edalize issue tracker on GitHub `_ to suggest improvements to tool-specific code. 28 | -------------------------------------------------------------------------------- /doc/source/user/build_system/flow_options.rst: -------------------------------------------------------------------------------- 1 | .. _ug_build_system_flow_options: 2 | 3 | Edalize flow API 4 | ================ 5 | 6 | Edalize supports many different EDA tools and combinations of tools working together, called flows. A flow could e.g. be an FPGA bitstream flow where one EDA tool is used for synthesis, another one for place & route and a third one to convert the P&R database into an image that can be loaded into the FPGA. Another example could be a simulation flow, where the simulator itself is just one tool, but where a code conversion tool is used to preprocess the input to the simulator, e.g. ghdl to convert VHDL to Verilog for tools that don't handle the former well enough. 7 | 8 | FuseSoC abstracts away many differences between :term:`tools ` and tries to provide sane defaults to build many designs out of the box with no further configuration required. However, not all tool-specific details can be hidden. 9 | 10 | At the same time, a certain level of tool-specific configurability is required to make full use of the features available in different tools. 11 | 12 | There are two categories of options available for the Edalize flows. *Flow options* that affect how the tools are chained together (the flow graph) and *tool options* for the individual tools to be run as part of the flow. This means that since the flow options influence which tools that will be run, some tool options only become available for certain combinations of flow options. 13 | 14 | Only one flow can be defined for a target, but the flow itself can be configured in different ways. The example below shows how the `test` target selects and configures a flow. The `flow` key selects the flow itself. The selected `sim` flow has a *flow option* called `tool` that decides which simulator to use. `iverilog_options` and `vlog_options` are tool options for Icarus Verilog and Siemens QuestaSim/ModelSim and will be passed to the appropriate tool if it is present in the flow graph. 15 | 16 | This setup selects icarus as the tool, which means the `vlog_options` will not be used. However, all *flow options* and *tool options* are also automatically available on the command-line, which means that passing `--tool=modelsim` as a backend parameter will override the tool setting from the target. The same can be done for the two tool options, with the difference that for flow or tool option that are lists, any additional values passed on the command-line will append rather than replace the values in the core description file. 17 | 18 | .. code-block:: yaml 19 | 20 | # An excerpt from a core file. 21 | # ... 22 | targets: 23 | test: 24 | # ... 25 | flow: sim 26 | flow_options: 27 | tool: icarus 28 | iverilog_options: 29 | - -g2012 # Use SystemVerilog-2012 30 | vlog_options: 31 | - -timescale=1ns/1ns 32 | 33 | The available options for any flow can be found in the `Edalize `_ documentation. They can also be found by running a target with the `--help` flag. `fusesoc run --target= --help` 34 | -------------------------------------------------------------------------------- /doc/source/user/build_system/hooks.rst: -------------------------------------------------------------------------------- 1 | .. _ug_build_system_hooks: 2 | 3 | Hooks: intercept the build process 4 | ================================== 5 | 6 | .. todo:: 7 | 8 | Document hooks. 9 | -------------------------------------------------------------------------------- /doc/source/user/build_system/index.rst: -------------------------------------------------------------------------------- 1 | .. _ug_build_system: 2 | 3 | ****************************** 4 | Building a design with FuseSoC 5 | ****************************** 6 | 7 | The FuseSoC build system pieces together a hardware design from individual cores. 8 | 9 | *Building a design* in FuseSoC means *calling a tool flow to produce some output, and execute it.* 10 | Depending on the :term:`target` and the :term:`tool flow` chosen, the build process can do and produce very different things: 11 | it could produce a runnable simulation, generate an FPGA bitstream, or run a static analysis tool to check for common programming errors. 12 | 13 | Two steps are required to build a hardware design with FuseSoC: 14 | 15 | #. Write one or more FuseSoC core description files. 16 | See :ref:`ug_build_system_core_files` for information on how to write core description files. 17 | #. Call ``fusesoc run``. 18 | FuseSoC is a command-line tool and accessible through the ``fusesoc`` command. 19 | See :ref:`ug_cli` for information on how to use the ``fusesoc`` command. 20 | 21 | Typically, FuseSoC support can be added to an existing design without changes to the directory structure or the source files. 22 | 23 | The first three sections are recommended reading for all users of FuseSoC. 24 | The first section :ref:`ug_build_system_core_files` is an introduction into :term:`core description files ` and how to write them. 25 | The second and third section, :ref:`ug_build_system_eda_flows` and :ref:`ug_build_system_dependencies` look at how to customize what the (EDA) :term:`tools ` are doing, and how cores can be combined to form a larger system. 26 | 27 | The subsequent sections are advanced topics, which are only relevant in some projects. 28 | 29 | A full reference documentation on the CAPI2 core file format can be found in the section :ref:`ref_capi2`. 30 | 31 | .. toctree:: 32 | :maxdepth: 2 33 | :caption: In this section 34 | 35 | core_files.rst 36 | eda_flows.rst 37 | dependencies.rst 38 | filters.rst 39 | flags.rst 40 | generators.rst 41 | virtual_cores.rst 42 | mappings.rst 43 | hooks.rst 44 | vpi.rst 45 | -------------------------------------------------------------------------------- /doc/source/user/build_system/mappings.rst: -------------------------------------------------------------------------------- 1 | .. _ug_build_system_mappings: 2 | 3 | Mappings: Replace cores in the dependency tree 4 | ============================================== 5 | 6 | Mappings allow a user of a core to substitute dependencies of the core with other cores without having to edit any of the core or it's dependencies files. 7 | An example use case is making use of an existing core but substituting one of it's dependencies with a version that some desired changes (e.g. bug fixes). 8 | 9 | If you are looking to provide a core with multiple implementations, virtual cores is the recommended and more semantic solution. 10 | See :ref:`ug_build_system_virtual_cores` for more information on virtual cores. 11 | Note: virtual cores can also be substituted in mappings. 12 | 13 | Declaring mappings 14 | ------------------ 15 | 16 | Each core file can have one mapping. 17 | An example mapping core file: 18 | 19 | .. code:: yaml 20 | 21 | name: "local:map:override_fpu_and_fifo" 22 | mapping: 23 | "vendor:lib:fpu": "local:lib:fpu" 24 | "vendor:lib:fifo": "local:lib:fifo" 25 | 26 | The example above is a core file with only a mapping property, but any core file may contain a mapping in addition to other properties (e.g. filesets, targets & generators). 27 | 28 | Applying mappings 29 | ----------------- 30 | 31 | To apply a mapping, provide the VLNV of the core file that contains the desired 32 | mapping with `fusesoc run`'s `--mapping` argument. Multiple mappings may be 33 | provided as shown below. 34 | 35 | .. code:: sh 36 | 37 | fusesoc run \ 38 | --mapping local:map:override_fpu_and_fifo \ 39 | --mapping local:map:another_mapping \ 40 | vendor:top:main 41 | -------------------------------------------------------------------------------- /doc/source/user/build_system/tool_options.rst: -------------------------------------------------------------------------------- 1 | .. _ug_build_system_tool_options: 2 | 3 | Edalize tool API 4 | ================ 5 | 6 | .. note:: 7 | 8 | Refer to the :ref:`CAPI2 reference documentation ` or run ``fusesoc tool list`` for a list of all available tools and their options. 9 | 10 | FuseSoC abstracts away many differences between :term:`tools ` and tries to provide sane defaults to build many designs out of the box with no further configuration required. 11 | However, not all tool-specific details can be hidden. 12 | At the same time, a certain level of tool-specific configurability is required to make full use of the features available in different tools. 13 | Tool options are FuseSoC's way of customizing the way tools are used to build the design. 14 | 15 | When calling ``fusesoc run`` on the command line any tool can be chosen to build a design with the ``--tool`` argument. 16 | If no tool-specific configuration is given in the core file, the default tool configuration is used, which might or might not work for a given design. 17 | 18 | To customize tool behavior a tool-specific section can be added to a core file at ``targets.TARGETNAME.tools.TOOLNAME``. 19 | The name of the tool (``TOOLNAME``) must match FuseSoC's internal tool name (as passed to ``fusesoc run --tool=TOOLNAME``). 20 | Depending on the tool different options are available. 21 | Refer to the :ref:`CAPI2 reference documentation ` for a list of all available tools and their options. 22 | 23 | Most tool backends provide a way to set command line options to influence how the tools are called. 24 | Typically, these keys are called ``BINARYNAME_options``, and they take a list of arguments as value. 25 | 26 | The example below shows how tool options for Icarus Verilog (``icarus``) and Mentor ModelSim (``modelsim``) are set. 27 | 28 | * The ``iverilog`` binary will be called with the ``-g2012`` command-line argument, indicating that SystemVerilog 2012 support should be enabled. 29 | * Similarly, for ModelSim the argument ``-timescale=1ns/1ns`` will be passed to the ``vlog`` binary, which elaborates the design. 30 | 31 | .. code-block:: yaml 32 | 33 | # A fragment from blinky.core 34 | # ... 35 | targets: 36 | sim: 37 | # ... 38 | tools: 39 | icarus: 40 | iverilog_options: 41 | - -g2012 # Use SystemVerilog-2012 42 | modelsim: 43 | vlog_options: 44 | - -timescale=1ns/1ns 45 | -------------------------------------------------------------------------------- /doc/source/user/build_system/virtual_cores.rst: -------------------------------------------------------------------------------- 1 | .. _ug_build_system_virtual_cores: 2 | 3 | Virtual Cores: Provide a common interface 4 | ========================================= 5 | 6 | .. todo:: 7 | 8 | Document virtual cores. 9 | -------------------------------------------------------------------------------- /doc/source/user/build_system/vpi.rst: -------------------------------------------------------------------------------- 1 | .. _ug_build_system_vpi: 2 | 3 | VPI Support 4 | =========== 5 | 6 | .. todo:: 7 | 8 | Document VPI support. 9 | -------------------------------------------------------------------------------- /doc/source/user/cli.rst: -------------------------------------------------------------------------------- 1 | .. _ug_cli: 2 | 3 | *************** 4 | Running FuseSoC 5 | *************** 6 | 7 | FuseSoC is a command-line tool; this section explains how to use it. 8 | The following content is aimed at users who already have a hardware design which uses FuseSoC. 9 | 10 | Build a design 11 | ============== 12 | 13 | The ``fusesoc run`` group of commands is used to setup, build, and (if possible) run a design. 14 | The exact actions taken by the individual steps depend on the toolflow. 15 | 16 | :: 17 | 18 | usage: fusesoc run [-h] [--no-export] [--build-root BUILD_ROOT] [--setup] [--build] [--run] [--target TARGET] [--tool TOOL] [--flag FLAG] [--system-name SYSTEM_NAME] system ... 19 | 20 | positional arguments: 21 | system Select a system to operate on 22 | backendargs arguments to be sent to backend 23 | 24 | optional arguments: 25 | -h, --help show this help message and exit 26 | --no-export Reference source files from their current location instead of exporting to a build tree 27 | --build-root BUILD_ROOT 28 | Output directory for build. Defaults to build/$VLNV 29 | --setup Execute setup stage 30 | --build Execute build stage 31 | --run Execute run stage 32 | --target TARGET Override default target 33 | --tool TOOL Override default tool for target 34 | --flag FLAG Set custom use flags. Can be specified multiple times 35 | --system-name SYSTEM_NAME 36 | Override default VLNV name for system 37 | 38 | When FuseSoC is invoked with the run command, it will create an empty working directory called `work_root` internally, where it by default will create all project files, copy all used source files, build and optionally run the project. 39 | 40 | Setup, build and run 41 | -------------------- 42 | 43 | The process of running EDA tools is divided into three steps called *setup*, *build* and *run*. The *setup* stage creates the working directory and all project files. The *build* stage runs one or more EDA tools to build an artifact, e.g. a GDS, simulation model or FPGA image. The *run* stage is only implemented for some tool flows, such as simulation flows where it runs the simulation. Some FPGA flows uses the *run* stage to program an FPGA device. 44 | 45 | Normally FuseSoC runs all three stages, but if the `--setup` flag is added, it will stop after the setup stage and if the `--build` flag is set it will stop after the build stage. Many of the newer backends don't need these flags and will instead only run setup or build when input files or options have changed. 46 | 47 | Work root 48 | --------- 49 | `work_root` is a private working directory and should not be shared between different builds. It is however perfectly fine to reuse the working directory for e.g. running several simulations using different runtime options as long as the build-time options and source files are not modified. 50 | 51 | By default, FuseSoC will use `build//`, where `` is the top-level VLNV with underscore instead of colon as the separator. For the Flow API, `` is just the name of the target in the core description file, e.g. `sim`. For the old Tool API, it is a combination of target name and the tool backend, e.g. `sim-verilator`. The work root directory can be changed with the `--work-root` option. 52 | 53 | Exporting source files 54 | ---------------------- 55 | 56 | The standard behavior for FuseSoC is to copy all used source files into a subdirectory of the work root. This has three advantages. The work root is self-contained with all the source files and can be copied elsewhere for archival purposes or to build on another machine. No stray files are picked up by mistake from the original source directories. It is always possible to know from exactly which files a build was created. Despite this, there are situations where it is preferable to reference the source files from their original location. This can be done by adding the `--no-export` flag. 57 | -------------------------------------------------------------------------------- /doc/source/user/index.rst: -------------------------------------------------------------------------------- 1 | ################## 2 | FuseSoC User Guide 3 | ################## 4 | 5 | The FuseSoC User Guide is aimed at hardware developers utilizing FuseSoC to build and integrate their hardware designs. 6 | 7 | **Learn how to use FuseSoC in an existing project.** 8 | 9 | Have you checked out a hardware design project that uses FuseSoC and are trying to understand how to build the design? 10 | Get started by :ref:`installing FuseSoC `, and then have a look at the :ref:`usage documentation `. 11 | 12 | **Add FuseSoC support to your hardware project.** 13 | 14 | If you are starting a new hardware design project, or already have source files and are looking for a better way to build your project and integrate third-party components? 15 | Get started by :ref:`installing FuseSoC `, read a bit about the :ref:`concepts and terminology of FuseSoC `, and then move on to :ref:`add FuseSoC core description files ` to your project. 16 | 17 | 18 | .. toctree:: 19 | :maxdepth: 2 20 | :caption: Inside this User Guide 21 | 22 | introduction.rst 23 | installation.rst 24 | overview.rst 25 | cli.rst 26 | build_system/index.rst 27 | package_manager/index.rst 28 | knowledgebase.rst 29 | -------------------------------------------------------------------------------- /doc/source/user/installation.rst: -------------------------------------------------------------------------------- 1 | .. _ug_installation: 2 | 3 | ****************** 4 | Installing FuseSoC 5 | ****************** 6 | 7 | FuseSoC is written in Python and runs on all major operating systems. 8 | 9 | System Requirements 10 | =================== 11 | 12 | Before installing FuseSoC check your system requirements. 13 | 14 | - Operating System: Linux, Windows, macOS 15 | - Python 3.6 or newer. 16 | (The last version supporting Python 2.7 is FuseSoC 1.10.) 17 | - The Python packages ``setuptools`` and ``pip`` need to be installed for Python 3. 18 | 19 | Installation under Linux 20 | ======================== 21 | 22 | .. note:: 23 | 24 | Do not type the ``$`` symbol shown in the instructions below. 25 | The symbol indicates that the command is to be typed into a terminal window. 26 | Lines not prefixed with ``$`` show the output of the command. 27 | Depending on your system, the output might be different. 28 | 29 | FuseSoC is provided as ``fusesoc`` Python package and installed through pip, the Python package manager. 30 | The steps below cover the most common installation cases. 31 | Refer to the pip documentation for more advanced installation scenarios. 32 | 33 | FuseSoC, like all Python packages, can be installed for the current user, or system-wide for all users. 34 | The system-wide installation typically requires root permissions. 35 | 36 | Installation for the current user 37 | --------------------------------- 38 | 39 | To install the current stable version of FuseSoC for the current user, open a terminal window and run the following command. 40 | If an older version of FuseSoC is found, this version is upgraded to the latest stable release. 41 | 42 | .. code-block:: shell-session 43 | 44 | $ pip3 install --upgrade --user fusesoc 45 | 46 | Check that the installation worked by running 47 | 48 | .. command-output:: fusesoc --version 49 | 50 | 51 | If this command works FuseSoC is installed properly and ready to be used. 52 | 53 | If the terminal reports an error about the command not being found check that the directory ``~/.local/bin`` is in your command search path (``PATH``), or perform a system-wide installation instead (see below). 54 | 55 | 56 | System-wide installation 57 | ------------------------ 58 | 59 | FuseSoC can be installed for all users on a system. 60 | This operation typically requires root permissions. 61 | 62 | .. code-block:: shell-session 63 | 64 | $ sudo pip3 install --upgrade fusesoc 65 | 66 | Uninstalling FuseSoC 67 | -------------------- 68 | 69 | Use ``pip`` to remove FuseSoC from your system. 70 | 71 | .. code-block:: shell-session 72 | 73 | $ pip3 uninstall fusesoc 74 | 75 | 76 | Installation under Windows 77 | ========================== 78 | 79 | FuseSoC is provided as ``fusesoc`` Python package and installed through pip, the Python package manager. 80 | Python is not installed by default on Windows, so doing that is the first step. 81 | Install the latest version of Python, either from `python.org `_ or from the Windows store. 82 | 83 | Open up a shell (cmd, powershell, gitbash etc.) and run: 84 | 85 | .. code-block:: shell-session 86 | 87 | $ python --version 88 | 89 | If the output is something along the lines of ``Python 3.10.7``, Python has been successfully installed. 90 | 91 | 92 | Installation for the current user 93 | --------------------------------- 94 | 95 | To install the current stable version of FuseSoC for the current user, open a shell and run the following command. 96 | If an older version of FuseSoC is found, this version is upgraded to the latest stable release. 97 | 98 | .. code-block:: shell-session 99 | 100 | $ pip3 install --upgrade fusesoc 101 | 102 | Check that the installation worked by running 103 | 104 | .. command-output:: fusesoc --version 105 | 106 | 107 | If this command works FuseSoC is installed properly and ready to be used. 108 | 109 | The ``fusesoc.exe`` file should be installed in the Python ``Scripts`` directory (example: ``C:/Users/youruser/AppData/Local/Python/Python310/Scripts``) folder, which should have been automatically added to the search path (``PATH``) when Python was installed. 110 | 111 | Uninstalling FuseSoC 112 | -------------------- 113 | 114 | Use ``pip`` to remove FuseSoC from your system. 115 | 116 | .. code-block:: shell-session 117 | 118 | $ pip3 uninstall fusesoc 119 | 120 | 121 | Installation under macOS 122 | ======================== 123 | 124 | You can use ``pip`` to install as same as Linux. 125 | 126 | .. code-block:: shell-session 127 | 128 | $ pip3 install --upgrade --user fusesoc 129 | -------------------------------------------------------------------------------- /doc/source/user/introduction.rst: -------------------------------------------------------------------------------- 1 | ************ 2 | Why FuseSoC? 3 | ************ 4 | 5 | FuseSoC is an award-winning package manager and a set of build tools for HDL (Hardware Description Language) code. 6 | 7 | Its main purpose is to increase reuse of IP (Intellectual Property) cores and be an aid for creating, building and simulating SoC solutions. 8 | 9 | **FuseSoC makes it easier to** 10 | 11 | - reuse existing cores 12 | 13 | - create compile-time or run-time configurations 14 | 15 | - run regression tests against multiple simulators 16 | 17 | - Port designs to new targets 18 | 19 | - let other projects use your code 20 | 21 | - set up continuous integration 22 | 23 | **FuseSoC is non-intrusive** Most existing designs don't need any changes to work with FuseSoC. Any FuseSoC-specific patches can be applied on the fly during implementation or simulation 24 | 25 | **FuseSoC is modular** It can be used as an end-to-end flow, to create initial project files for an EDA tool or integrate with your custom workflow 26 | 27 | **FuseSoC is extendable** Latest release support simulating with GHDL, Icarus Verilog, Isim, ModelSim, Verilator and Xsim. It also supports building FPGA images with Altera Quartus, project IceStorm, Xilinx ISE and Xilinx Vivado. Support for a new EDA tool requires ~100 new lines of code and new tools are added continuously 28 | 29 | **FuseSoC is standard-compliant** Much effort has gone into leveraging existing standards such as IP-XACT and vendor-specific core formats where applicable. 30 | 31 | **FuseSoC is resourceful** The standard core library currently consisting of over 100 cores including CPUs, peripheral controllers, interconnects, complete SoCs and utility libraries. Other core libraries exist as well and can be added to complement the standard library 32 | 33 | **FuseSoC is free software** It puts however no restrictions on the cores and can be used to manage your company's internal proprietary core collections as well as public open source projects 34 | 35 | **FuseSoC is battle-proven** It has been used to successfully build or simulate projects such as Nyuzi, Pulpino, VScale, various OpenRISC SoCs, picorv32, osvvm and more. 36 | -------------------------------------------------------------------------------- /doc/source/user/knowledgebase.rst: -------------------------------------------------------------------------------- 1 | ***************************** 2 | Common Problems and Solutions 3 | ***************************** 4 | 5 | Making changes to cores in a library 6 | ==================================== 7 | 8 | A common situation is that a user wants to use their own copy of a core, 9 | instead of the one provided by a library, for example to fix a bug or 10 | add new functionality. The following steps can be used to achieve this: 11 | 12 | **Example.** Replace a core in a library with a user-specified version 13 | 14 | #. Create a new directory to keep the user-copies of the cores (this 15 | directory will be referred to as ``$corelib`` from now on) 16 | #. Download the core source (the repository or URL can be found in the 17 | ``[provider]`` section of the original core) 18 | #. *If the downloaded core already contains a .core file, this step is 19 | ignored* Copy the original .core file to the root of the downloaded 20 | core. Edit the file and remove the ``[provider]`` section. (This will 21 | stop FuseSoC from downloading the core and use files from the 22 | directory containing the .core file instead) 23 | #. Add ``$corelib`` to the end of your library search path, either by 24 | editing ``fusesoc.conf`` or by adding ``--cores-root=$corelib`` to 25 | the command-line arguments 26 | #. Verify that the new core is found by running fusesoc core-info $core. Check 27 | the output to see that “Core root:” is set to the directory where the core 28 | was downloaded 29 | 30 | Dependency tree for a core with optional components 31 | =================================================== 32 | 33 | Many cores have a part that is only used in some flows. This could for example be a BFM, VIP or some kind of behavioral model that is only used in simulation flows. Or it could be timing constraints for synthesis. As long as these are only by the core itself, it's easiest to put them into different filesets and let each simulation or synthesis target pick the right subset of filesets. 34 | 35 | A more complicated situation arises when a user uses this core as a dependency and wants to have different filesets for different flows in the toplevel core. In this case, it is typically better to split out the optional part into its own cores and have the toplevel filesets depend on the different cores. 36 | 37 | **Example** Let's assume a core (comp) comes with a BFM. We want to use the BFM when doing block-level simulations of the core and when doing full system simulations which uses this core. We don't want to have the BFM present when doing full system synthesis. The most general solution is to split out the BFM to a separate core file. The following example shows a setup with a component (comp.core) that has a BFM (comp_bfm.core) which is used inside a larger system (top.core). The component has a testbench target (sim) and the larger system has two testbenches (tb1 and tb2) which both uses the BFM and the component. The larger system can also be synthesized without the BFM. 38 | 39 | .. image:: optional_deps.png 40 | :alt: Alternative text 41 | 42 | .. code-block:: yaml 43 | :caption: comp_bfm.core 44 | 45 | CAPI=2: 46 | 47 | name : ::comp_bfm:0 48 | 49 | filesets: 50 | bfm: 51 | files: {comp_bfm.sv : {file_type : systemVerilogSource}} 52 | 53 | targets: 54 | default: 55 | filesets : [bfm] 56 | 57 | .. code-block:: yaml 58 | :caption: comp.core 59 | 60 | CAPI=2: 61 | 62 | name : ::comp:0 63 | 64 | filesets: 65 | rtl: 66 | files: {comp.sv : {file_type : systemVerilogSource}} 67 | 68 | tb_files: 69 | files: {comp_tb.sv : {file_type : systemVerilogSource}} 70 | depend: [comp_bfm] 71 | 72 | targets: 73 | default: 74 | filesets : [rtl] 75 | 76 | sim: 77 | filesets : [rtl, tb_files] 78 | 79 | .. code-block:: yaml 80 | :caption: top.core 81 | 82 | CAPI=2: 83 | 84 | name : ::top:0 85 | 86 | filesets: 87 | rtl: 88 | files: {top.sv : {file_type : systemVerilogSource}} 89 | depend: [comp] 90 | 91 | tb_common: 92 | files: {tb_common.sv : {file_type : systemVerilogSource}} 93 | depend: [comp_bfm] 94 | 95 | tb1_files: 96 | files: {tb1.sv : {file_type : systemVerilogSource}} 97 | 98 | tb2_files: 99 | files: {tb1.sv : {file_type : systemVerilogSource}} 100 | 101 | synth_files: 102 | files: {constraints.sdc : {file_type : SDC}} 103 | 104 | targets: 105 | sim: &sim 106 | filesets : [rtl, tb_files] 107 | 108 | tb1: 109 | <<: *sim 110 | filesets_append : [tb1_files] 111 | 112 | tb2: 113 | <<: *sim 114 | filesets_append : [tb2_files] 115 | 116 | synth: 117 | filesets : [rtl, synth_files] 118 | 119 | An alternative solution to the above, is to use flags, as described in :ref:`ug_build_system_flags`, where the inclusion of the optional files are controlled by flags. These flags can be assigned default values in the top level targets for convenience. 120 | -------------------------------------------------------------------------------- /doc/source/user/optional_deps.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/doc/source/user/optional_deps.png -------------------------------------------------------------------------------- /doc/source/user/package_manager/index.rst: -------------------------------------------------------------------------------- 1 | *************************** 2 | The FuseSoC package manager 3 | *************************** 4 | 5 | Core libraries 6 | --------------- 7 | 8 | A collection of one or more cores in a directory tree is called a core 9 | library. FuseSoC supports working with multiple core libraries. The 10 | locations of the libraries are specified in the FuseSoC configuration 11 | file, ``fusesoc.conf`` 12 | 13 | To find a configuration file, FuseSoC will first look for 14 | ``fusesoc.conf`` in the current directory, and if there is no file 15 | there, it will search next in ``$XDG_CONFIG_HOME/fusesoc`` (i.e. 16 | ``~/.config/fusesoc`` on Linux and ``%HOMEPATH%\.config\fusesoc`` on 17 | Windows) and lastly in ``/etc/fusesoc`` 18 | 19 | By running ``fusesoc library add fusesoc_cores https://github.com/fusesoc/fusesoc-cores`` after FuseSoC is installed, the standard 20 | libraries will be installed, and a default configuration file will be 21 | created in ``$XDG_CONFIG_HOME/fusesoc/fusesoc.conf`` on Linux and ``%HOMEPATH%\.config\fusesoc\fusesoc.conf`` on 22 | Windows with the following 23 | contents: 24 | 25 | :: 26 | 27 | [library.fusesoc-cores] 28 | sync-uri = https://github.com/fusesoc/fusesoc-cores 29 | sync-type = git 30 | 31 | Core search order 32 | ----------------- 33 | 34 | Once FuseSoC has found its configuration file, it will parse the library sections in the order they appear in the file. Library sections are all sections named `library.`. The following keys are valid in the library sections. 35 | 36 | location 37 | ~~~~~~~~ 38 | Specifies the library's location in the file system (required) 39 | 40 | auto-sync 41 | ~~~~~~~~~ 42 | Boolean value specifying if the library should be automatically updated when running `fusesoc library update` (optional. defaults to `true`) 43 | 44 | sync-uri 45 | ~~~~~~~~ 46 | The URI for non-local libraries where to fetch the library (optional) 47 | 48 | sync-type 49 | ~~~~~~~~~ 50 | The type of library. Can be set to `git` or `local`. A missing value indicates a `local` library. (optional) 51 | 52 | Additional library locations can be added on the command line by setting the ``--cores-root`` parameter when 53 | FuseSoC is launched. The library locations specified from the 54 | command-line will be parsed after those in ``fusesoc.conf`` 55 | 56 | For each library location, FuseSoC will recursively search for files 57 | with a *.core* suffix. Each of these files will be parsed and added to 58 | the in-memory FuseSoC database if they are valid ``.core`` files. 59 | 60 | Several ``.core`` files can reside in the same directory and they will all be parsed. 61 | 62 | If several cores with the same VLNV identifier are encountered the latter will 63 | replace the former. This can be used to override cores in a library with an 64 | alternative core in another library by specifying them in a library that will be 65 | parsed later, either temporarily by adding ``--cores-root`` to the command-line, 66 | or permanently by adding the other library at the end of fusesoc.conf 67 | 68 | If FuseSoC encounters a file called `FUSESOC_IGNORE` in a directory, this directory and all subdirectories will be ignored. 69 | -------------------------------------------------------------------------------- /extras/bash-completion: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | # Copy this script to /etc/bash_completion.d/fusesoc to enjoy bash completion 6 | # for fusesoc. 7 | 8 | _fusesoc() 9 | { 10 | local cur prev words cword 11 | _init_completion || return 12 | 13 | COMPREPLY=() 14 | 15 | case $prev in 16 | run|build|sim|pgm|fetch|core-info) 17 | COMPREPLY=( $( compgen -W "$( $1 list-cores | awk 'NR > 5' | 18 | awk '{print $1}' )" -- $cur ) ) 19 | ;; 20 | esac 21 | 22 | if [[ $cword -eq 1 ]]; then 23 | COMPREPLY=( $( compgen -W 'build init pgm fetch list-cores core-info 24 | list-paths library run sim update' -- "$cur" ) ) 25 | fi 26 | return 0 27 | 28 | } && 29 | complete -F _fusesoc fusesoc 30 | -------------------------------------------------------------------------------- /fusesoc/capi2/coreparser.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | # FIXME: Read schema from file or internet instead 6 | from fusesoc.capi2.json_schema import capi2_schema 7 | from fusesoc.parser.coreparser import CoreParser 8 | 9 | 10 | class Core2Parser(CoreParser): 11 | def __init__(self, resolve_env_vars=False, allow_additional_properties=False): 12 | self.capi_version = 2 13 | self.preamble = "CAPI=2:" 14 | self.schema = capi2_schema 15 | 16 | CoreParser.__init__( 17 | self, 18 | self.preamble, 19 | self.schema, 20 | self.capi_version, 21 | resolve_env_vars, 22 | allow_additional_properties, 23 | ) 24 | -------------------------------------------------------------------------------- /fusesoc/capi2/generator.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import sys 6 | 7 | from fusesoc import utils 8 | 9 | 10 | class Generator: 11 | filesets = {} 12 | parameters = {} 13 | targets = {} 14 | 15 | def __init__(self, data=None, resolve_env_vars=False): 16 | if data is None: 17 | data = utils.yaml_fread(sys.argv[1], resolve_env_vars) 18 | 19 | self.config = data.get("parameters") 20 | self.files_root = data.get("files_root") 21 | self.vlnv = data.get("vlnv") 22 | 23 | # Edalize decide core_file dir. generator creates file 24 | self.core_file = self.vlnv.split(":")[2] + ".core" 25 | 26 | def add_files( 27 | self, files, fileset="rtl", targets=["default"], file_type="", logical_name="" 28 | ): 29 | if not fileset in self.filesets: 30 | self.filesets[fileset] = {"files": []} 31 | self.filesets[fileset]["files"] = files 32 | self.filesets[fileset]["file_type"] = file_type 33 | self.filesets[fileset]["logical_name"] = logical_name 34 | 35 | for target in targets: 36 | if not target in self.targets: 37 | self.targets[target] = {"filesets": []} 38 | if not fileset in self.targets[target]["filesets"]: 39 | self.targets[target]["filesets"].append(fileset) 40 | 41 | def add_parameter(self, parameter, data={}, targets=["default"]): 42 | self.parameters[parameter] = data 43 | 44 | for target in targets: 45 | if not target in self.targets: 46 | self.targets[target] = {} 47 | if not "parameters" in self.targets[target]: 48 | self.targets[target]["parameters"] = [] 49 | if not parameter in self.targets[target]["parameters"]: 50 | self.targets[target]["parameters"].append(parameter) 51 | 52 | def write(self): 53 | coredata = { 54 | "name": self.vlnv, 55 | "filesets": self.filesets, 56 | "parameters": self.parameters, 57 | "targets": self.targets, 58 | } 59 | return utils.yaml_fwrite(self.core_file, coredata, "CAPI=2:") 60 | -------------------------------------------------------------------------------- /fusesoc/capi2/inheritance.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import copy 6 | import re 7 | 8 | from fusesoc import utils 9 | 10 | 11 | class Inheritance: 12 | MERGE_OPERATOR = "<<__FUSESOC_MERGE_OVERLOAD__<<" 13 | 14 | def yaml_merge_2_fusesoc_merge(capi): 15 | """ 16 | Replace YAML merge key operator (<<) with FuseSoC merge operator 17 | """ 18 | yaml_merge_pattern = ( 19 | r"((?:\n|{|\{\s*(?:[^{}]*\{[^{}]*\})*[^{}]*\},)\s*)<<(?=\s*:)" 20 | ) 21 | while re.search(yaml_merge_pattern, capi): 22 | capi = re.sub(yaml_merge_pattern, r"\1" + Inheritance.MERGE_OPERATOR, capi) 23 | return capi 24 | 25 | def elaborate_inheritance(capi): 26 | if not isinstance(capi, dict): 27 | return capi 28 | 29 | for key, value in capi.items(): 30 | if isinstance(value, dict): 31 | capi[key] = Inheritance.elaborate_inheritance(copy.deepcopy(value)) 32 | 33 | parent = capi.pop(Inheritance.MERGE_OPERATOR, {}) 34 | if isinstance(parent, dict): 35 | capi = utils.merge_dict(parent, capi, concat_list_appends_only=True) 36 | else: 37 | raise SyntaxError("Invalid use of inheritance operator") 38 | 39 | return capi 40 | -------------------------------------------------------------------------------- /fusesoc/core.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import logging 6 | 7 | from fusesoc.capi2.core import Core as Capi2Core 8 | 9 | logger = logging.getLogger(__name__) 10 | 11 | 12 | class Core: 13 | def __new__(cls, *args, **kwargs): 14 | return Capi2Core(*args, **kwargs) 15 | -------------------------------------------------------------------------------- /fusesoc/filters/autotype.py: -------------------------------------------------------------------------------- 1 | import logging 2 | import os 3 | 4 | logger = logging.getLogger(__name__) 5 | 6 | 7 | class Autotype: 8 | def run(self, edam, work_root): 9 | type_map = { 10 | ".c": "cSource", 11 | ".cpp": "cppSource", 12 | ".sv": "systemVerilogSource", 13 | ".tcl": "tclSource", 14 | ".v": "verilogSource", 15 | ".vlt": "vlt", 16 | ".xdc": "xdc", 17 | } 18 | for f in edam["files"]: 19 | if not "file_type" in f: 20 | fn = f["name"] 21 | (_, ext) = os.path.splitext(fn) 22 | ft = type_map.get(ext, "") 23 | if ft: 24 | f["file_type"] = ft 25 | logger.debug(f"Autoassigning file type {ft} to {fn}") 26 | else: 27 | logger.warning("Could not autoassign type for " + fn) 28 | return edam 29 | -------------------------------------------------------------------------------- /fusesoc/filters/coredepsmk.py: -------------------------------------------------------------------------------- 1 | import os 2 | 3 | 4 | class Coredepsmk: 5 | def run(self, edam, work_root): 6 | nodes = [] 7 | edges = [] 8 | deps = edam.get("dependencies", {}) 9 | for k, v in deps.items(): 10 | nodes.append(k) 11 | for e in v: 12 | edges.append((k, e)) 13 | 14 | s = "fusesoc-deps := \\\n " 15 | filenames = [f["name"] for f in edam["files"]] 16 | filenames += [c["core_file"] for c in edam["cores"].values()] 17 | s += " \\\n ".join( 18 | [os.path.abspath(os.path.join(work_root, f)) for f in filenames] 19 | ) 20 | 21 | with open(os.path.join(work_root, "core-deps.mk"), "w") as f: 22 | f.write(s) 23 | return edam 24 | -------------------------------------------------------------------------------- /fusesoc/filters/custom.py: -------------------------------------------------------------------------------- 1 | import logging 2 | import os 3 | import subprocess 4 | 5 | from yaml import dump, load 6 | 7 | try: 8 | from yaml import CDumper as Dumper 9 | from yaml import CLoader as Loader 10 | except ImportError: 11 | from yaml import Dumper, Loader 12 | 13 | logger = logging.getLogger(__name__) 14 | 15 | 16 | class Custom: 17 | def run(self, edam, work_root): 18 | fin = "custom_filter_input.yml" 19 | fout = "custom_filter_output.yml" 20 | cmd = os.environ.get("FUSESOC_CUSTOM_FILTER") 21 | if not cmd: 22 | logger.error("Environment variable FUSESOC_CUSTOM_FILTER was not set") 23 | return 24 | with open(os.path.join(work_root, fin), "w") as f: 25 | dump(edam, f, Dumper=Dumper) 26 | 27 | subprocess.run([cmd, fin, fout], cwd=work_root) 28 | with open(os.path.join(work_root, fout)) as f: 29 | edam = load(f, Loader=Loader) 30 | 31 | return edam 32 | -------------------------------------------------------------------------------- /fusesoc/filters/dot.py: -------------------------------------------------------------------------------- 1 | import os 2 | 3 | 4 | class Dot: 5 | def run(self, edam, work_root): 6 | nodes = [] 7 | edges = [] 8 | deps = edam.get("dependencies", {}) 9 | for k, v in deps.items(): 10 | nodes.append(k) 11 | for e in v: 12 | edges.append((k, e)) 13 | 14 | s = "digraph G {\n" 15 | s += 'rankdir="LR"\n' 16 | for n in nodes: 17 | s += f'"{n}";\n' 18 | for e in edges: 19 | s += f'"{e[0]}" -> "{e[1]}";\n' 20 | s += "}\n" 21 | print(edam["name"]) 22 | with open(os.path.join(work_root, edam["name"] + ".gv"), "w") as f: 23 | f.write(s) 24 | return edam 25 | -------------------------------------------------------------------------------- /fusesoc/filters/splitlib.py: -------------------------------------------------------------------------------- 1 | import logging 2 | import os 3 | 4 | logger = logging.getLogger(__name__) 5 | 6 | 7 | def flatten_vlnv(vlnv): 8 | return str(vlnv).lstrip(":").replace(":", "_").replace(".", "_") 9 | 10 | 11 | class Splitlib: 12 | def run(self, edam, work_root): 13 | libdeps = {} 14 | for k, v in edam["dependencies"].items(): 15 | libdeps[flatten_vlnv(k)] = [flatten_vlnv(x) for x in v] 16 | 17 | libdeps.update(edam["flow_options"].get("library_dependencies", {})) 18 | 19 | edam["library_dependencies"] = libdeps 20 | for f in edam["files"]: 21 | if not "logical_name" in f: 22 | f["logical_name"] = flatten_vlnv(f["core"]) 23 | return edam 24 | -------------------------------------------------------------------------------- /fusesoc/librarymanager.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import logging 6 | import os 7 | 8 | from fusesoc.provider.provider import get_provider 9 | 10 | logger = logging.getLogger(__name__) 11 | 12 | 13 | class Library: 14 | def __init__( 15 | self, 16 | name, 17 | location, 18 | sync_type=None, 19 | sync_uri=None, 20 | sync_version=None, 21 | auto_sync=True, 22 | ): 23 | if sync_type and not sync_type in ["local", "git"]: 24 | raise ValueError( 25 | "Library {} ({}) Invalid sync-type '{}'".format( 26 | name, location, sync_type 27 | ) 28 | ) 29 | 30 | if sync_type in ["git"]: 31 | if not sync_uri: 32 | raise ValueError( 33 | "Library {} ({}) sync-uri must be set when using sync_type 'git'".format( 34 | name, location 35 | ) 36 | ) 37 | 38 | self.name = name 39 | self.location = location 40 | self.sync_type = sync_type or "local" 41 | self.sync_uri = sync_uri 42 | self.sync_version = sync_version 43 | self.auto_sync = auto_sync 44 | 45 | def update(self, force=False): 46 | def l(s): 47 | return self.name + " : " + s 48 | 49 | if self.sync_type == "local": 50 | logger.info(l("sync-type is local. Ignoring update")) 51 | return 52 | 53 | if not (self.auto_sync or force): 54 | logger.info(l("auto-sync disabled. Ignoring update")) 55 | return 56 | 57 | provider = get_provider(self.sync_type) 58 | 59 | if not os.path.exists(self.location): 60 | logger.info(l(f"{self.location} does not exist. Trying a checkout")) 61 | try: 62 | provider.init_library(self) 63 | except RuntimeError as e: 64 | # Keep old behavior of logging a warning if there is a library 65 | # in `fusesoc.conf`, but the directory does not exist for some 66 | # reason and it could not be initialized. 67 | logger.warning(l(f"{self.location} does not exist. Ignoring update")) 68 | return 69 | 70 | try: 71 | logger.info(l("Updating...")) 72 | provider.update_library(self) 73 | except RuntimeError as e: 74 | logger.error(l("Failed to update library: " + str(e))) 75 | 76 | 77 | class LibraryManager: 78 | def __init__(self, library_root): 79 | self._libraries = [] 80 | self.library_root = library_root 81 | 82 | def add_library(self, library): 83 | self._libraries.append(library) 84 | 85 | def get_library(self, value, key="name"): 86 | for library in self._libraries: 87 | if getattr(library, key) == value: 88 | return library 89 | 90 | def get_libraries(self): 91 | return self._libraries 92 | 93 | def update(self, library_names): 94 | libraries = [] 95 | for name in library_names: 96 | library = self.get_library(name) 97 | if library: 98 | libraries.append(library) 99 | else: 100 | logger.warning(f"Could not find library {name}") 101 | 102 | if library_names: 103 | force = True 104 | else: 105 | libraries = self._libraries 106 | force = False 107 | 108 | for library in libraries: 109 | library.update(force) 110 | -------------------------------------------------------------------------------- /fusesoc/lockfile.py: -------------------------------------------------------------------------------- 1 | import copy 2 | import enum 3 | import json 4 | import logging 5 | import pathlib 6 | 7 | import fastjsonschema 8 | 9 | import fusesoc.utils 10 | from fusesoc.version import version 11 | from fusesoc.vlnv import Vlnv 12 | 13 | logger = logging.getLogger(__name__) 14 | 15 | lockfile_schema = """ 16 | { 17 | "$schema": "https://json-schema.org/draft/2020-12/schema", 18 | "title": "FuseSoC Lockfile", 19 | "description": "FuseSoC Lockfile", 20 | "type": "object", 21 | "properties": { 22 | "cores": { 23 | "description": "Cores used in the build", 24 | "type": "array", 25 | "items": { 26 | "type": "object", 27 | "properties": { 28 | "name": { 29 | "description": "Core VLVN", 30 | "type": "string" 31 | } 32 | } 33 | } 34 | }, 35 | "fusesoc_version": { 36 | "description": "FuseSoC version which generated the lockfile", 37 | "type": "string" 38 | }, 39 | "lockfile_version": { 40 | "description": "Lockfile version", 41 | "type": "integer" 42 | } 43 | } 44 | } 45 | """ 46 | 47 | 48 | class LockFileMode(int, enum.Enum): 49 | """Lock file usage mode""" 50 | 51 | DISABLED = 0 52 | LOAD = 1 53 | STORE = 2 54 | 55 | 56 | def load_lockfile(filepath: pathlib.Path): 57 | try: 58 | lockfile_data = fusesoc.utils.yaml_fread(filepath) 59 | try: 60 | validator = fastjsonschema.compile( 61 | json.loads(lockfile_schema), detailed_exceptions=False 62 | ) 63 | validator(lockfile_data) 64 | except fastjsonschema.JsonSchemaDefinitionException as e: 65 | raise SyntaxError(f"Error parsing JSON Schema: {e}") 66 | except fastjsonschema.JsonSchemaException as e: 67 | raise SyntaxError(f"Error validating {e}") 68 | except FileNotFoundError: 69 | logger.warning(f"Lockfile {filepath} not found") 70 | return {} 71 | 72 | cores = {} 73 | for core in lockfile_data.setdefault("cores", []): 74 | 75 | if "name" in core: 76 | vlnv = Vlnv(core["name"]) 77 | vln = vlnv.vln_str() 78 | if vln in map(Vlnv.vln_str, cores.keys()): 79 | raise SyntaxError(f"Core {vln} defined multiple times in lock file") 80 | core["name"] = vlnv 81 | else: 82 | raise SyntaxError(f"Core definition without a name") 83 | cores[vlnv] = core 84 | lockfile = { 85 | "cores": cores, 86 | } 87 | return lockfile 88 | 89 | 90 | class LockFile: 91 | def __init__(self): 92 | """Create a empty lock file""" 93 | self._data = {} 94 | self._filepath = None 95 | self.mode = LockFileMode.DISABLED 96 | 97 | @classmethod 98 | def load(cls, filepath: pathlib.Path, mode: LockFileMode = LockFileMode.STORE): 99 | """Load lock file from file path""" 100 | lockfile = LockFile() 101 | if mode == LockFileMode.DISABLED: 102 | return lockfile 103 | lockfile._data = load_lockfile(filepath) 104 | lockfile._filepath = filepath 105 | lockfile.mode = mode 106 | return lockfile 107 | 108 | def store(self): 109 | """Store the lock file to disk""" 110 | if self.mode != LockFileMode.STORE: 111 | return 112 | if not self._filepath: 113 | return 114 | cores = copy.deepcopy(self.cores()) 115 | # format VLNVs as strings 116 | for core in cores: 117 | core["name"] = str(core["name"]) 118 | lockfile = { 119 | "lockfile_version": 1, 120 | "fusesoc_version": version, 121 | "cores": cores, 122 | } 123 | fusesoc.utils.yaml_fwrite(self._filepath, lockfile) 124 | 125 | def update(self, cores): 126 | """Update the lock file information""" 127 | if self.mode != LockFileMode.STORE: 128 | return False 129 | changed = False 130 | current = self._cores() 131 | for core in cores: 132 | item = {"name": core.name} 133 | if core.name in current: 134 | if item.items() <= current[core.name].items(): 135 | continue 136 | else: 137 | self._data["cores"][core.name].update(item) 138 | changed = True 139 | else: 140 | self._data["cores"][core.name] = item 141 | changed = True 142 | return changed 143 | 144 | def _cores(self): 145 | """Return a dictionary of all the cores in the lock file""" 146 | return self._data.setdefault("cores", {}) 147 | 148 | def cores(self): 149 | """Return a list of all the cores in the lock file""" 150 | return [item for item in self._cores().values()] 151 | 152 | def cores_vlnv(self): 153 | """Return a list of all the core VLNVs in the lock file""" 154 | return [core["name"] for core in self.cores()] 155 | 156 | def core_vlnv_exists(self, vlvn: Vlnv): 157 | """Check if the core VLNV exists in the lock file""" 158 | return vlvn in self._cores().keys() 159 | 160 | def no_cores(self): 161 | """The lock file does not contain any cores""" 162 | return not bool(self._cores()) 163 | -------------------------------------------------------------------------------- /fusesoc/parser/coreparser.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import fastjsonschema 6 | import yaml 7 | 8 | from fusesoc import utils 9 | 10 | 11 | class CoreParser: 12 | def __init__( 13 | self, 14 | preamble, 15 | schema, 16 | version, 17 | resolve_env_vars=False, 18 | allow_additional_properties=False, 19 | ): 20 | self._preamble = preamble 21 | self._schema = schema 22 | self._version = version 23 | self._resolve_env_vars = resolve_env_vars 24 | self._allow_additional_properties = allow_additional_properties 25 | 26 | self._schema_data = utils.yaml_read(schema) 27 | 28 | if allow_additional_properties: 29 | self._set_additional_properties(self._schema_data, True) 30 | 31 | try: 32 | self._validate = fastjsonschema.compile(self._schema_data) 33 | except fastjsonschema.JsonSchemaDefinitionException as e: 34 | raise SyntaxError(f"\nError parsing JSON Schema: {e}") 35 | 36 | def _set_additional_properties(self, schema, val): 37 | if type(schema) == list: 38 | for i in schema: 39 | self._set_additional_properties(i, val) 40 | 41 | if type(schema) == dict: 42 | for k, v in schema.items(): 43 | if k == "additionalProperties" and type(v) == bool: 44 | schema[k] = val 45 | 46 | if type(v) == dict or type(v) == list: 47 | self._set_additional_properties(v, val) 48 | 49 | def read(self, core_file, validate_core=True): 50 | capi_data = utils.yaml_fread(core_file, self._resolve_env_vars, True) 51 | 52 | if validate_core: 53 | self.validate(capi_data) 54 | 55 | return capi_data 56 | 57 | def write(self, core_file, capi_data, validate_core=True): 58 | if validate_core: 59 | self.validate(capi_data) 60 | 61 | utils.yaml_fwrite(core_file, capi_data, self._preamble) 62 | 63 | def validate(self, capi_data): 64 | try: 65 | self._validate(capi_data) 66 | except fastjsonschema.JsonSchemaException as e: 67 | raise SyntaxError(f"\nError validating {e}") 68 | 69 | def get_version(self): 70 | return self._version 71 | 72 | def get_preamble(self): 73 | return self._preamble 74 | 75 | def get_schema(self): 76 | return self._schema 77 | 78 | def get_allow_additional_properties(self): 79 | return self._allow_additional_properties 80 | -------------------------------------------------------------------------------- /fusesoc/provider/git.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import logging 6 | import os.path 7 | import shutil 8 | import subprocess 9 | 10 | from fusesoc.provider.provider import Provider 11 | from fusesoc.utils import Launcher 12 | 13 | logger = logging.getLogger(__name__) 14 | 15 | 16 | class Git(Provider): 17 | @staticmethod 18 | def _checkout_library_version(library): 19 | git_args = ["-C", library.location, "checkout", "-q", library.sync_version] 20 | 21 | if library.sync_version: 22 | logger.info( 23 | "Checked out {} at version {}".format( 24 | library.name, library.sync_version 25 | ) 26 | ) 27 | Launcher("git", git_args).run() 28 | 29 | @staticmethod 30 | def init_library(library): 31 | logger.info(f"Cloning library into {library.location}") 32 | git_args = ["clone", library.sync_uri, library.location] 33 | try: 34 | Launcher("git", git_args).run() 35 | Git._checkout_library_version(library) 36 | except subprocess.CalledProcessError as e: 37 | raise RuntimeError(str(e)) 38 | 39 | @staticmethod 40 | def update_library(library): 41 | download_option = "pull" if not library.sync_version else "fetch" 42 | git_args = ["-C", library.location, download_option] 43 | try: 44 | Git._checkout_library_version(library) 45 | Launcher("git", git_args).run() 46 | except subprocess.CalledProcessError as e: 47 | raise RuntimeError(str(e)) 48 | 49 | def _checkout(self, local_dir): 50 | version = self.config.get("version", None) 51 | 52 | # TODO : Sanitize URL 53 | repo = self.config.get("repo") 54 | logger.info("Checking out " + repo + " to " + local_dir) 55 | try: 56 | args = [ 57 | "clone", 58 | "-q", 59 | "--depth", 60 | "1", 61 | "--no-single-branch", 62 | repo, 63 | local_dir, 64 | ] 65 | Launcher("git", args).run() 66 | except RuntimeError as e: 67 | try: 68 | args = ["clone", "-q", "--no-single-branch", repo, local_dir] 69 | Launcher("git", args).run() 70 | except: 71 | raise e 72 | if version: 73 | args = ["-C", local_dir, "checkout", "-q", version] 74 | Launcher("git", args).run() 75 | -------------------------------------------------------------------------------- /fusesoc/provider/github.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import logging 6 | import os.path 7 | import sys 8 | import tarfile 9 | 10 | from fusesoc.provider.provider import Provider 11 | 12 | _HAS_TAR_FILTER = hasattr(tarfile, "tar_filter") # Requires Python 3.12 13 | 14 | logger = logging.getLogger(__name__) 15 | 16 | if sys.version_info[0] >= 3: 17 | import urllib.request as urllib 18 | from urllib.error import URLError 19 | else: 20 | import urllib 21 | 22 | from urllib2 import URLError 23 | 24 | URL = "https://github.com/{user}/{repo}/archive/{version}.tar.gz" 25 | 26 | 27 | class Github(Provider): 28 | def _checkout(self, local_dir): 29 | user = self.config.get("user") 30 | repo = self.config.get("repo") 31 | 32 | version = self.config.get("version", "master") 33 | 34 | # TODO : Sanitize URL 35 | url = URL.format(user=user, repo=repo, version=version) 36 | logger.info(f"Downloading {user}/{repo} from github") 37 | try: 38 | (filename, headers) = urllib.urlretrieve(url) 39 | except URLError as e: 40 | raise RuntimeError(f"Failed to download '{url}'. '{e.reason}'") 41 | t = tarfile.open(filename) 42 | (cache_root, core) = os.path.split(local_dir) 43 | 44 | # Ugly hack to get the first part of the directory name of the extracted files 45 | tmp = t.getnames()[0] 46 | 47 | extraction_arguments = {"path": cache_root} 48 | if _HAS_TAR_FILTER: 49 | extraction_arguments["filter"] = "data" 50 | t.extractall(**extraction_arguments) 51 | 52 | os.rename(os.path.join(cache_root, tmp), os.path.join(cache_root, core)) 53 | -------------------------------------------------------------------------------- /fusesoc/provider/local.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import logging 6 | import os.path 7 | 8 | from fusesoc.provider.provider import Provider 9 | 10 | logger = logging.getLogger(__name__) 11 | 12 | 13 | class Local(Provider): 14 | @staticmethod 15 | def init_library(library): 16 | if not os.path.isdir(library.location): 17 | logger.error(f"Local library at location '{library.location}' not found.") 18 | exit(1) 19 | 20 | def _checkout(self, local_dir): 21 | pass 22 | 23 | @staticmethod 24 | def update_library(library): 25 | pass 26 | -------------------------------------------------------------------------------- /fusesoc/provider/opencores.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import logging 6 | import sys 7 | 8 | from fusesoc.provider.provider import Provider 9 | from fusesoc.utils import Launcher, cygpath, is_mingw 10 | 11 | logger = logging.getLogger(__name__) 12 | 13 | REPO_PATH = "http://opencores.org/ocsvn/{}/{}/{}" 14 | 15 | 16 | class Opencores(Provider): 17 | def _checkout(self, local_dir): 18 | repo_name = self.config.get("repo_name") 19 | repo_path = REPO_PATH.format(repo_name, repo_name, self.config.get("repo_root")) 20 | revision_number = self.config.get("revision") 21 | logger.info("Downloading " + repo_name + " from OpenCores") 22 | 23 | if is_mingw(): 24 | logger.debug("Using cygpath translation") 25 | local_dir = cygpath(local_dir) 26 | 27 | Launcher( 28 | "svn", 29 | [ 30 | "co", 31 | "-q", 32 | "--no-auth-cache", 33 | "-r", 34 | revision_number, 35 | "--username", 36 | "orpsoc", 37 | "--password", 38 | "orpsoc", 39 | repo_path, 40 | local_dir, 41 | ], 42 | ).run() 43 | -------------------------------------------------------------------------------- /fusesoc/provider/provider.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import logging 6 | import os 7 | import shutil 8 | import stat 9 | 10 | from fusesoc.utils import Launcher 11 | 12 | logger = logging.getLogger(__name__) 13 | 14 | from importlib import import_module 15 | 16 | 17 | def get_provider(name): 18 | return getattr(import_module(f"fusesoc.provider.{name}"), name.capitalize()) 19 | 20 | 21 | class Provider: 22 | def __init__(self, config, core_root, files_root): 23 | self.config = config 24 | self.core_root = core_root 25 | self.files_root = files_root 26 | self.cachable = not (config.get("cachable", "") == False) 27 | self.patches = config.get("patches", []) 28 | 29 | def clean_cache(self): 30 | def _make_tree_writable(topdir): 31 | # Ensure all files and directories under topdir are writable 32 | # (and readable) by owner. 33 | for d, _, files in os.walk(topdir): 34 | os.chmod(d, os.stat(d).st_mode | stat.S_IWRITE | stat.S_IREAD) 35 | for fname in files: 36 | fpath = os.path.join(d, fname) 37 | if os.path.isfile(fpath): 38 | os.chmod( 39 | fpath, os.stat(fpath).st_mode | stat.S_IWRITE | stat.S_IREAD 40 | ) 41 | 42 | if os.path.exists(self.files_root): 43 | _make_tree_writable(self.files_root) 44 | shutil.rmtree(self.files_root) 45 | 46 | def fetch(self): 47 | status = self.status() 48 | if status == "empty": 49 | self._checkout(self.files_root) 50 | _fetched = True 51 | elif status == "outofdate": 52 | self.clean_cache() 53 | self._checkout(self.files_root) 54 | _fetched = True 55 | elif status == "downloaded": 56 | _fetched = False 57 | else: 58 | raise RuntimeError( 59 | "Provider status is: '" + status + "'. This shouldn't happen" 60 | ) 61 | if _fetched: 62 | self._patch() 63 | 64 | def _patch(self): 65 | for f in self.patches: 66 | patch_file = os.path.abspath(os.path.join(self.core_root, f)) 67 | if os.path.isfile(patch_file): 68 | logger.debug( 69 | " applying patch file: " 70 | + patch_file 71 | + "\n" 72 | + " to: " 73 | + os.path.join(self.files_root) 74 | ) 75 | try: 76 | Launcher("git", ["apply", patch_file], self.files_root).run() 77 | except OSError: 78 | raise RuntimeError("Failed to call 'git' for patching core") 79 | 80 | def status(self): 81 | if not self.cachable: 82 | return "outofdate" 83 | if not os.path.isdir(self.files_root): 84 | return "empty" 85 | else: 86 | return "downloaded" 87 | -------------------------------------------------------------------------------- /fusesoc/provider/svn.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import logging 6 | 7 | from fusesoc.provider.provider import Provider 8 | from fusesoc.utils import Launcher, cygpath, is_mingw 9 | 10 | logger = logging.getLogger(__name__) 11 | 12 | 13 | class Svn(Provider): 14 | def _checkout(self, local_dir): 15 | if is_mingw(): 16 | logger.debug("Using cygpath translation") 17 | local_dir = cygpath(local_dir) 18 | 19 | args = ["co", "-q"] 20 | url = self.config.get("url") 21 | revision_number = self.config.get("revision", None) 22 | if revision_number: 23 | logger.info("Downloading %s revision %s", url, revision_number) 24 | args.extend(["-r", revision_number]) 25 | else: 26 | logger.info("Downloading %s", url) 27 | if self.config.get("ignore_externals", False): 28 | args.append("--ignore-externals") 29 | args.extend([url, local_dir]) 30 | 31 | Launcher("svn", args).run() 32 | -------------------------------------------------------------------------------- /fusesoc/provider/url.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import logging 6 | import os.path 7 | import shutil 8 | import sys 9 | import tarfile 10 | import zipfile 11 | 12 | logger = logging.getLogger(__name__) 13 | 14 | if sys.version_info[0] >= 3: 15 | import urllib.request as urllib 16 | from urllib.error import HTTPError, URLError 17 | else: 18 | import urllib 19 | from urllib2 import URLError 20 | from urllib2 import HTTPError 21 | 22 | from fusesoc.provider.provider import Provider 23 | 24 | _HAS_TAR_FILTER = hasattr(tarfile, "tar_filter") # Requires Python 3.12 25 | 26 | 27 | class Url(Provider): 28 | def _checkout(self, local_dir): 29 | url = self.config.get("url") 30 | logger.info("Downloading...") 31 | user_agent = self.config.get("user-agent") 32 | if not self.config.get("verify_cert", True): 33 | import ssl 34 | 35 | ssl._create_default_https_context = ssl._create_unverified_context 36 | 37 | if user_agent and sys.version_info[0] >= 3: 38 | opener = urllib.build_opener() 39 | opener.addheaders = [("User-agent", user_agent)] 40 | urllib.install_opener(opener) 41 | try: 42 | (filename, headers) = urllib.urlretrieve(url) 43 | except (URLError, HTTPError) as e: 44 | raise RuntimeError(f"Failed to download '{url}'. '{e.reason}'") 45 | 46 | filetype = self.config.get("filetype") 47 | if filetype == "tar": 48 | t = tarfile.open(filename) 49 | extraction_arguments = {"path": local_dir} 50 | if _HAS_TAR_FILTER: 51 | extraction_arguments["filter"] = "data" 52 | t.extractall(**extraction_arguments) 53 | elif filetype == "zip": 54 | with zipfile.ZipFile(filename, "r") as z: 55 | z.extractall(local_dir) 56 | elif filetype == "simple": 57 | _filename = url.rsplit("/", 1)[1] 58 | os.makedirs(local_dir) 59 | shutil.copy2(filename, os.path.join(local_dir, _filename)) 60 | else: 61 | raise RuntimeError( 62 | "Unknown file type '" + filetype + "' in [provider] section" 63 | ) 64 | -------------------------------------------------------------------------------- /pyproject.toml: -------------------------------------------------------------------------------- 1 | [build-system] 2 | requires = ["setuptools>=64", "setuptools_scm>=7.1"] 3 | build-backend = "setuptools.build_meta" 4 | 5 | [project] 6 | name = "fusesoc" 7 | description = "Award-winnning package manager and build abstraction tool for HDL code" 8 | readme = "README.md" 9 | authors = [ 10 | {name = "Olof Kindgren", email = "olof@award-winning.me"}, 11 | ] 12 | maintainers = [ 13 | {name = "Olof Kindgren", email = "olof@award-winning.me"}, 14 | ] 15 | 16 | keywords=["VHDL", "verilog", "hdl", "rtl", "synthesis", "FPGA", "simulation", "ASIC"] 17 | 18 | classifiers = [ 19 | "Development Status :: 5 - Production/Stable", 20 | "Topic :: Utilities", 21 | "Topic :: Software Development :: Build Tools", 22 | "License :: OSI Approved :: BSD License", 23 | ] 24 | 25 | dynamic = ["version"] 26 | 27 | dependencies = [ 28 | "edalize>=0.4.1", 29 | "pyparsing>=2.3.1", 30 | "pyyaml>=6.0", 31 | "simplesat>=0.9.1", 32 | "fastjsonschema", 33 | "jsonschema2md", 34 | "argcomplete", 35 | ] 36 | requires-python = ">=3.6, <4" 37 | 38 | [project.urls] 39 | Homepage = "https://fusesoc.net" 40 | Documentation = "https://fusesoc.readthedocs.io" 41 | Repository = "https://github.com/olofk/fusesoc" 42 | Issues = "https://github.com/olofk/fusesoc/issues" 43 | Changelog = "https://github.com/olofk/fusesoc/blob/main/NEWS" 44 | 45 | [tool.setuptools_scm] 46 | write_to = "fusesoc/version.py" 47 | 48 | [tool.setuptools.packages.find] 49 | include = ["fusesoc", "fusesoc.capi2", "fusesoc.provider", "fusesoc.parser", "fusesoc.filters"] 50 | 51 | [project.scripts] 52 | fusesoc = "fusesoc.main:main" 53 | 54 | [tool.tox] 55 | legacy_tox_ini = """ 56 | [tox] 57 | envlist = py3 58 | 59 | [testenv] 60 | deps = pytest 61 | commands = pytest 62 | """ 63 | -------------------------------------------------------------------------------- /tests/capi2_cores/dependencies/top.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::dependencies-top 7 | 8 | filesets: 9 | fs1: 10 | depend: 11 | - '>::used:1.0' 12 | 13 | targets: 14 | default: 15 | filesets: 16 | - fs1 17 | toplevel: 18 | - top 19 | -------------------------------------------------------------------------------- /tests/capi2_cores/dependencies/used-1.0.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::used:1.0 7 | filesets: 8 | rtl: 9 | files: 10 | - used-1.0.sv 11 | file_type: systemVerilogSource 12 | 13 | 14 | targets: 15 | default: 16 | filesets: 17 | - rtl 18 | toplevel: used_1_0 19 | -------------------------------------------------------------------------------- /tests/capi2_cores/dependencies/used-1.1.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::used:1.1 7 | filesets: 8 | rtl: 9 | files: 10 | - used-1.1.sv 11 | file_type: systemVerilogSource 12 | 13 | 14 | targets: 15 | default: 16 | filesets: 17 | - rtl 18 | toplevel: used_1_1 19 | -------------------------------------------------------------------------------- /tests/capi2_cores/deptree/child1.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::deptree-child1 7 | 8 | filesets: 9 | fs1: 10 | depend: 11 | - ::deptree-child3 12 | files: 13 | - "child1-fs1-f1.sv" 14 | - "child1-fs1-f2.sv" 15 | file_type: systemVerilogSource 16 | 17 | targets: 18 | default: 19 | filesets: 20 | - fs1 21 | -------------------------------------------------------------------------------- /tests/capi2_cores/deptree/child2.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::deptree-child2 7 | 8 | filesets: 9 | fs1: 10 | files: 11 | - "child2-fs1-f1.sv" 12 | - "child2-fs1-f2.sv" 13 | file_type: systemVerilogSource 14 | 15 | targets: 16 | default: 17 | filesets: 18 | - fs1 19 | -------------------------------------------------------------------------------- /tests/capi2_cores/deptree/child3.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::deptree-child3 7 | 8 | filesets: 9 | fs1: 10 | files: 11 | - "child3-fs1-f1.sv" 12 | - "child3-fs1-f2.sv" 13 | file_type: systemVerilogSource 14 | 15 | targets: 16 | default: 17 | filesets: 18 | - fs1 19 | -------------------------------------------------------------------------------- /tests/capi2_cores/deptree/child4.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::deptree-child4 7 | 8 | filesets: 9 | fs1: 10 | files: 11 | - "child4.sv" 12 | file_type: systemVerilogSource 13 | 14 | targets: 15 | default: 16 | filesets: 17 | - fs1 18 | -------------------------------------------------------------------------------- /tests/capi2_cores/deptree/generated_child_a.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::deptree-child-a 7 | 8 | filesets: 9 | fs1: 10 | files: 11 | - "child-a2.sv" 12 | file_type: systemVerilogSource 13 | 14 | depend: 15 | - ::deptree-child4 16 | 17 | generate: 18 | generated-child-a-generate: 19 | generator: generated-child-a-generator 20 | parameters: 21 | filename: generated-child-a.sv 22 | 23 | generated-child-a-generate-position-prepend: 24 | generator: generated-child-a-generator 25 | parameters: 26 | filename: generated-child-a-prepend.sv 27 | position: prepend 28 | 29 | generated-child-a-generate-position-append: 30 | generator: generated-child-a-generator 31 | parameters: 32 | filename: generated-child-a-append.sv 33 | position: append 34 | 35 | generated-child-a-generate-position-last: 36 | generator: generated-child-a-generator 37 | parameters: 38 | filename: generated-child-a-last.sv 39 | position: last 40 | 41 | generated-child-a-generate-position-first: 42 | generator: generated-child-a-generator 43 | parameters: 44 | filename: generated-child-a-first.sv 45 | position: first 46 | 47 | generators: 48 | generated-child-a-generator: 49 | interpreter: python3 50 | command: generated_child_a.py 51 | 52 | targets: 53 | default: 54 | filesets: 55 | - fs1 56 | generate: 57 | - generated-child-a-generate 58 | - generated-child-a-generate-position-prepend 59 | - generated-child-a-generate-position-append 60 | - generated-child-a-generate-position-last 61 | - generated-child-a-generate-position-first 62 | -------------------------------------------------------------------------------- /tests/capi2_cores/deptree/generated_child_a.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | from fusesoc.capi2.generator import Generator 6 | 7 | 8 | class MacroGenerator(Generator): 9 | def run(self): 10 | assert self.config["filename"] 11 | self.add_files([self.config["filename"]], file_type="systemVerilogSource") 12 | 13 | 14 | if __name__ == "__main__": 15 | g = MacroGenerator() 16 | g.run() 17 | g.write() 18 | -------------------------------------------------------------------------------- /tests/capi2_cores/deptree/root.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::deptree-root 7 | 8 | filesets: 9 | fs1: 10 | depend: 11 | # Child 3 is also included from child 1. 12 | # The only effect of that, is that we would expect the child 3 files 13 | # always to be included before the child 1 files. 14 | - ::deptree-child-a 15 | - ::deptree-child3 16 | - ::deptree-child2 17 | - ::deptree-child1 18 | files: 19 | - "root-fs1-f1.sv" 20 | - "root-fs1-f2.sv" 21 | file_type: systemVerilogSource 22 | fs2: 23 | depend: 24 | - ::deptree-child3 25 | files: 26 | - "root-fs2-f1.sv" 27 | - "root-fs2-f2.sv" 28 | file_type: systemVerilogSource 29 | 30 | targets: 31 | default: 32 | filesets: 33 | - fs1 34 | - fs2 35 | toplevel: 36 | - root 37 | -------------------------------------------------------------------------------- /tests/capi2_cores/files_out_of_hierarchy/bad.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/files_out_of_hierarchy/bad.sv -------------------------------------------------------------------------------- /tests/capi2_cores/files_out_of_hierarchy/subdir/files_out_of_hierarchy.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::files_out_of_hierarchy 7 | 8 | filesets: 9 | fs_relative_bad: 10 | files: 11 | - ../bad.sv 12 | file_type : systemVerilogSource 13 | 14 | fs_relative_good: 15 | files: 16 | - good.sv 17 | file_type : systemVerilogSource 18 | 19 | targets: 20 | default: 21 | toplevel: dummy 22 | bad: 23 | filesets: 24 | - fs_relative_bad 25 | toplevel: dummy 26 | good: 27 | filesets: 28 | - fs_relative_good 29 | toplevel: dummy 30 | -------------------------------------------------------------------------------- /tests/capi2_cores/files_out_of_hierarchy/subdir/good.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/files_out_of_hierarchy/subdir/good.sv -------------------------------------------------------------------------------- /tests/capi2_cores/mapping/a.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: test_mapping:l:a:0 7 | virtual: 8 | - test_mapping:v:x:0 9 | -------------------------------------------------------------------------------- /tests/capi2_cores/mapping/b.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: test_mapping:l:b:0 7 | -------------------------------------------------------------------------------- /tests/capi2_cores/mapping/c.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: test_mapping:l:c:0 7 | 8 | mapping: 9 | "test_mapping:l:c": "test_mapping:v:x" 10 | -------------------------------------------------------------------------------- /tests/capi2_cores/mapping/d.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: test_mapping:l:d:0 7 | 8 | mapping: 9 | "test_mapping:l:b": "test_mapping:l:d" 10 | "test_mapping:l:c": "test_mapping:l:e" 11 | -------------------------------------------------------------------------------- /tests/capi2_cores/mapping/e.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: test_mapping:l:e:0 7 | -------------------------------------------------------------------------------- /tests/capi2_cores/mapping/f.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: test_mapping:l:f:0 7 | -------------------------------------------------------------------------------- /tests/capi2_cores/mapping/map_rec.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: "test_mapping:m:map_rec:0" 7 | mapping: 8 | "test_mapping:l:b": "test_mapping:l:c" 9 | "test_mapping:l:c": "test_mapping:l:b" 10 | -------------------------------------------------------------------------------- /tests/capi2_cores/mapping/map_vers.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: test_mapping:m:map_vers:0 7 | mapping: 8 | "test_mapping:l:b:0": "test_mapping:l:c" 9 | -------------------------------------------------------------------------------- /tests/capi2_cores/mapping/top.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: "test_mapping:t:top:0" 7 | filesets: 8 | rtl: 9 | depend: 10 | - "test_mapping:v:x:0" 11 | - "test_mapping:l:b:0" 12 | - "test_mapping:l:c:0" 13 | 14 | mapping: 15 | "test_mapping:v:x": "test_mapping:l:f" 16 | 17 | targets: 18 | default: 19 | filesets: 20 | - rtl 21 | toplevel: top 22 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/append.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::append:0 7 | filesets: 8 | fs1: {files: [file1]} 9 | fs2: {files: [file2]} 10 | fs3: {files: [file3]} 11 | fs4: {files: [file4]} 12 | 13 | targets: 14 | no_fs_no_fsappend: 15 | toplevel : dummy 16 | no_fs_fsappend: 17 | filesets_append : [fs3, fs4] 18 | fs_no_fsappend: 19 | filesets: [fs1, fs2] 20 | fs_fsappend: 21 | filesets : [fs1, fs2] 22 | filesets_append : [fs3, fs4] 23 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/depends.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name : ::dependscore:0 7 | 8 | filesets: 9 | legacy: 10 | depend: 11 | - unversioned 12 | - versioned-1.0 13 | - gt-1.0" 17 | - ">=gte-1.0" 18 | vlnv: 19 | depend: 20 | - ::n 21 | - ::nv:1.0 22 | - :l:nv:1.0 23 | - v:l:nv:1.0 24 | - <::vlnvlt:1.0 25 | - <=::vlnvlte:1.0 26 | - =::vlnveq:1.0 27 | - ">::vlnvgt:1.0" 28 | - ">=::vlnvgte:1.0" 29 | - "^::vlnvmajor:1.0" 30 | - "~::vlnvminor:2.2.3" 31 | 32 | targets: 33 | default: 34 | filesets: [legacy, vlnv] 35 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/dontpickthisfile: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/dontpickthisfile -------------------------------------------------------------------------------- /tests/capi2_cores/misc/dummy.tcl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/dummy.tcl -------------------------------------------------------------------------------- /tests/capi2_cores/misc/empty.core: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/empty.core -------------------------------------------------------------------------------- /tests/capi2_cores/misc/f1: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/f1 -------------------------------------------------------------------------------- /tests/capi2_cores/misc/f2: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/f2 -------------------------------------------------------------------------------- /tests/capi2_cores/misc/f3: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/f3 -------------------------------------------------------------------------------- /tests/capi2_cores/misc/f4: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/f4 -------------------------------------------------------------------------------- /tests/capi2_cores/misc/fileattrs.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | 3 | name : ::fileattrs:0 4 | 5 | filesets: 6 | defines: 7 | files: 8 | - hasdefines : {define : {key1 : value1, key2 : value2}} 9 | - nodefines 10 | 11 | targets: 12 | defines: {filesets : [defines]} 13 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/files.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::copytocore:0 7 | filesets: 8 | logical_name: 9 | files: 10 | - vlogfile : {logical_name : overridden_logical_name} 11 | - vhdlfile 12 | file_type : vhdlSource 13 | logical_name : default_logical_name 14 | 15 | copyfiles: 16 | files: 17 | - subdir/dummy.extra: {copyto : copied.file, file_type : user} 18 | - dummy.tcl: {copyto : subdir/another.file} 19 | file_type : tclSource 20 | unusedfiles: 21 | files: 22 | - idontexist 23 | miscfiles: 24 | files: 25 | - vlogfile: {file_type : verilogSource, is_include_file : true} 26 | - vhdlfile: {is_include_file : false} 27 | file_type : vhdlSource 28 | pickme: 29 | files: 30 | - pickthisfile: {file_type : user} 31 | dontpickme: 32 | files: 33 | - dontpickthisfile: {file_type : user} 34 | script_fileset: 35 | files: 36 | - scriptfile : {file_type : user} 37 | 38 | fileset_in_files_root: 39 | files: [targets.info] 40 | vpi_fileset: 41 | files: 42 | - vpifile : {file_type : CSource} 43 | 44 | scripts: 45 | script_with_fileset: 46 | filesets : [script_fileset] 47 | targets: 48 | default: 49 | filesets: [ 50 | logical_name, 51 | copyfiles, 52 | miscfiles, 53 | "tool_icarus? (pickme)", 54 | "!tool_icarus? (dontpickme)"] 55 | hooks: 56 | pre_build: [script_with_fileset] 57 | vpi : [vpi_with_fileset] 58 | will_fail: 59 | filesets : [unusedfiles] 60 | files_root_test: 61 | filesets: [fileset_in_files_root] 62 | 63 | vpi: 64 | vpi_with_fileset: 65 | filesets : [vpi_fileset] 66 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/filters.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::filters:0 7 | targets: 8 | nofilters: 9 | toplevel : none 10 | emptyfilters: 11 | filters : [] 12 | toplevel : none 13 | filters: 14 | filters : [corefilter1, corefilter2] 15 | toplevel : none 16 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/flags.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::flags:0 7 | targets: 8 | noflags: {} 9 | emptyflags: 10 | flags : {} 11 | allflags: 12 | flags : {flag1 : false, flag2 : true, flag3 : true} 13 | emptyflagstool: 14 | default_tool : mytool 15 | flags : {} 16 | allflagstool: 17 | default_tool : mytool 18 | flags : {flag1 : false, flag2 : true, tool : notmytool} 19 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/flow.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | name : ::flow:0 3 | targets: 4 | nothing: 5 | toplevel: unused 6 | flowonly: 7 | flow : icestorm 8 | toplevel: unused 9 | emptyflowoptions: 10 | flow : lint 11 | flow_options : {} 12 | toplevel: unused 13 | flowoptions: 14 | flow : sim 15 | flow_options: 16 | tool1: 17 | someoption : somevalue 18 | tool2: 19 | otheroption : [detroit, 442] 20 | toplevel: unused 21 | toolonly: 22 | default_tool : icestorm 23 | toplevel: unused 24 | flowandtool: 25 | default_tool : vivado 26 | flow: icestorm 27 | toplevel: unused 28 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/generate/file_cachetest: -------------------------------------------------------------------------------- 1 | cachetest 2 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/generate/generate.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name : ::generate:0 7 | 8 | filesets: 9 | default: 10 | depend: 11 | - generators 12 | 13 | targets: 14 | default: 15 | filesets : 16 | - default 17 | generate : 18 | - testgenerate_without_params 19 | - testgenerate_with_params 20 | - testgenerate_with_override : {the_value : 138} 21 | - testgenerate_with_cache 22 | - testgenerate_with_file_cache 23 | toplevel : na 24 | 25 | nogenerate: {generate : []} 26 | 27 | invalid_generate: 28 | generate : [idontexist] 29 | 30 | generate: 31 | testgenerate_without_params: 32 | generator: generator1 33 | 34 | testgenerate_with_params: 35 | generator: generator1 36 | parameters: 37 | param1 : a param 38 | param2: [list, of, stuff] 39 | 40 | testgenerate_with_override: 41 | generator: generator1 42 | parameters: 43 | the_value : 1234 44 | 45 | testgenerate_with_cache: 46 | generator: generator2 47 | parameters: 48 | some_option: some_value 49 | 50 | testgenerate_with_file_cache: 51 | generator: generator3 52 | parameters: 53 | file_in_param1: file_cachetest 54 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/generate/generators.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::generators:0 7 | 8 | generators: 9 | generator1: 10 | interpreter: python3 11 | command: testgen.py 12 | 13 | generator2: 14 | interpreter: python3 15 | command: testgen.py 16 | cache_type: input 17 | 18 | generator3: 19 | interpreter: python3 20 | command: testgen.py 21 | cache_type: input 22 | file_input_parameters: file_in_param1 23 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/generate/testgen.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import sys 6 | 7 | import yaml 8 | 9 | template = """CAPI=2: 10 | name : {} 11 | targets: 12 | default: 13 | parameters: [p] 14 | parameters: 15 | p: 16 | datatype : str 17 | paramtype : vlogparam 18 | """ 19 | 20 | with open(sys.argv[1]) as fin: 21 | data = yaml.safe_load(fin) 22 | config = data.get("parameters") 23 | files_root = data.get("files_root") 24 | vlnv = data.get("vlnv") 25 | 26 | with open("generated.core", "w") as fout: 27 | fout.write(template.format(vlnv)) 28 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/hooks.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::hookscore:0 7 | scripts: 8 | simple1: 9 | cmd : [simple_cmd1] 10 | simple2: 11 | cmd : [simple_cmd2] 12 | simple3: 13 | cmd : [simple_cmd3] 14 | simple4: 15 | cmd : [simple_cmd4] 16 | with_env: 17 | cmd : [simple5] 18 | env : {TESTENV : testvalue} 19 | multi_cmd: 20 | cmd : ['command','with','args'] 21 | 22 | targets: 23 | default: 24 | hooks: 25 | pre_build: [simple1] 26 | nohooks: {} 27 | nonexistant: 28 | hooks: 29 | post_build: [idontexist] 30 | 31 | allhooks: 32 | hooks: 33 | pre_build : [simple1] 34 | post_build : [simple2] 35 | pre_run : [simple3] 36 | post_run : [simple4] 37 | multihooks: 38 | hooks: 39 | pre_run : [simple1, with_env, multi_cmd] 40 | 41 | use_flags: 42 | hooks: 43 | post_run: 44 | - "tool_icarus? (simple1)" 45 | - "!tool_icarus? (simple2)" 46 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/parameters.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::parametersscore:0 7 | parameters: 8 | param1: 9 | datatype : str 10 | paramtype : vlogparam 11 | 12 | param2: 13 | datatype: str 14 | default: default_value 15 | description: This is a parameter 16 | paramtype: vlogparam 17 | 18 | intparam: 19 | datatype : int 20 | default : 5446 21 | paramtype : vlogparam 22 | 23 | boolfalse: 24 | datatype : bool 25 | default : false 26 | paramtype : vlogparam 27 | 28 | booltrue: 29 | datatype : bool 30 | default : true 31 | paramtype : vlogparam 32 | 33 | int0: 34 | datatype : int 35 | default : 0 36 | paramtype : vlogparam 37 | 38 | realpi: 39 | datatype : real 40 | default : 3.14159 41 | paramtype : vlogparam 42 | 43 | emptystr: 44 | datatype : str 45 | default : "" 46 | paramtype : vlogparam 47 | 48 | condparamtype: 49 | datatype : str 50 | paramtype : "tool_icarus? (plusarg) !tool_icarus? (vlogparam)" 51 | 52 | targets: 53 | default: 54 | parameters: [param1] 55 | noparameters: {} 56 | nonexistant: 57 | parameters: [idontexist] 58 | 59 | multiparameters: 60 | parameters : [param1, param2] 61 | 62 | override: 63 | parameters : [param1=def, param2=new_def, intparam=0xdeadbeef, boolfalse=true, booltrue=false, realpi=3.14] 64 | types: 65 | parameters : [param2, intparam, boolfalse, booltrue, realpi] 66 | 67 | use_flags: 68 | parameters: 69 | - "tool_icarus? (param1)" 70 | - "!tool_icarus? (param2)" 71 | - condparamtype 72 | 73 | empty: 74 | parameters: 75 | [int0, emptystr] 76 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/scriptfile: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/scriptfile -------------------------------------------------------------------------------- /tests/capi2_cores/misc/subdir/dummy.extra: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/subdir/dummy.extra -------------------------------------------------------------------------------- /tests/capi2_cores/misc/syntax_error.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | name : ::syntax_error:0 3 | 4 | targets: 5 | parse_error: 6 | toplevel : [ 7 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/targets.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::targets:0 7 | targets: 8 | default: {} 9 | empty_target: {} 10 | target_with_tool_options: 11 | tools: 12 | icarus: 13 | iverilog_options : ['a','few','options'] 14 | vivado: 15 | part: xc7a35tcsg324-1 16 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/toplevel.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name : ::toplevel:0 7 | 8 | targets: 9 | no_toplevel: {} 10 | str_toplevel: 11 | toplevel : toplevel_as_string 12 | list_toplevel: 13 | toplevel : [toplevel, as, list] 14 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/typecheck.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::typecheck:0 7 | filesets: 8 | correct_fileset: 9 | files: 10 | - vlogfile : {logical_name : overridden_logical_name} 11 | - vhdlfile 12 | file_type : vhdlSource 13 | 14 | correct_fileset_2: 15 | files: 16 | - subdir/dummy.extra: {copyto : copied.file, file_type : user} 17 | - dummy.tcl: {copyto : subdir/another.file} 18 | file_type : tclSource 19 | 20 | incorrect_fileset: 21 | files: 22 | - dummy.tcl: {copyto : subdir/another.file} 23 | file_type : 24 | - tclSource 25 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/uncachable.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::uncachable:0 7 | 8 | targets: 9 | default: {} 10 | 11 | provider: 12 | name : local 13 | cachable : False 14 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/vhdlfile: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/vhdlfile -------------------------------------------------------------------------------- /tests/capi2_cores/misc/vlogfile: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/vlogfile -------------------------------------------------------------------------------- /tests/capi2_cores/misc/vpi.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::vpi:0 7 | filesets: 8 | vpi_fs1: 9 | files: 10 | - f1 11 | - f2 : {is_include_file : true} 12 | file_type : CSource 13 | vpi_fs2: 14 | files: [f3] 15 | file_type : CppSource 16 | 17 | vpi_fs3: 18 | files: [f4] 19 | file_type : CSource 20 | 21 | targets: 22 | default: 23 | toplevel : [not_used] 24 | vpi: [vpi1, vpi2] 25 | 26 | vpi: 27 | vpi1: 28 | filesets: 29 | - vpi_fs1 30 | - vpi_fs2 31 | libs: 32 | - some_lib 33 | vpi2: 34 | filesets: [vpi_fs3] 35 | -------------------------------------------------------------------------------- /tests/capi2_cores/misc/vpifile: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/capi2_cores/misc/vpifile -------------------------------------------------------------------------------- /tests/capi2_cores/override/1/basic.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::basic:0 7 | 8 | targets: 9 | default: {} 10 | -------------------------------------------------------------------------------- /tests/capi2_cores/override/2/basic.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::basic:0 7 | 8 | targets: 9 | default: {} 10 | -------------------------------------------------------------------------------- /tests/capi2_cores/parser/inheritance.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::inheritance:0 7 | filesets: 8 | fileset_a: 9 | files: 10 | - 1.txt 11 | - 2.txt 12 | - 3.txt 13 | fileset_b: 14 | files: 15 | - 4.txt 16 | - 5.txt 17 | - 6.txt 18 | fileset_c: 19 | files: 20 | - 7.txt 21 | - 8.txt 22 | - 9.txt 23 | 24 | targets: 25 | default: &default 26 | filesets: 27 | - fileset_a 28 | child: &child 29 | <<: *default 30 | filesets_append: 31 | - fileset_b 32 | grandchild: &grandchild 33 | <<: *child 34 | filesets_append: 35 | - fileset_c 36 | child2: &child2 37 | <<: *default 38 | filesets: 39 | - fileset_b 40 | filesets_append: 41 | - fileset_c 42 | 43 | subfield: &subfield 44 | tools: 45 | verilator: 46 | mode: cc 47 | verilator_options: 48 | - --timing 49 | subfield_child: 50 | <<: *subfield 51 | tools: 52 | verilator: 53 | mode: lint-only 54 | 55 | merge_test1: {<<: *default} 56 | merge_test2<<: {tools: {2<<: {}}} 57 | <=::adv_debug_sys:0' 15 | - '>=::filetypes:0' 16 | - '>=::libstorage:0' 17 | - '>=::paramtest:0' 18 | file_type: verilogSource 19 | files: 20 | - rtl/verilog/include/or1200_defines.v: 21 | is_include_file: true 22 | - rtl/verilog/include/orpsoc-defines.v: 23 | is_include_file: true 24 | - rtl/verilog/include/timescale.v: 25 | is_include_file: true 26 | - rtl/verilog/include/uart_defines.v: 27 | is_include_file: true 28 | - rtl/verilog/wb_intercon.vh: 29 | is_include_file: true 30 | - rtl/verilog/include/xilinx_ddr2_params.v: 31 | is_include_file: true 32 | - rtl/verilog/orpsoc_top.v 33 | - rtl/verilog/clkgen.v 34 | - rtl/verilog/rom.v 35 | - rtl/verilog/wb_intercon.v 36 | - rtl/verilog/xilinx_ddr2/ddr2_mig.v 37 | - rtl/verilog/xilinx_ddr2/infrastructure.v 38 | - rtl/verilog/xilinx_ddr2/iodrp_controller.v 39 | - rtl/verilog/xilinx_ddr2/iodrp_mcb_controller.v 40 | - rtl/verilog/xilinx_ddr2/mcb_raw_wrapper.v 41 | - rtl/verilog/xilinx_ddr2/mcb_soft_calibration_top.v 42 | - rtl/verilog/xilinx_ddr2/mcb_soft_calibration.v 43 | - rtl/verilog/xilinx_ddr2/mcb_ui_top.v 44 | - rtl/verilog/xilinx_ddr2/memc_wrapper.v 45 | - rtl/verilog/xilinx_ddr2/xilinx_ddr2_if.v 46 | - rtl/verilog/xilinx_ddr2/xilinx_ddr2.v 47 | - rtl/verilog/dvi_gen/convert_30to15_fifo.v 48 | - rtl/verilog/dvi_gen/dcmspi.v 49 | - rtl/verilog/dvi_gen/DRAM16XN.v 50 | - rtl/verilog/dvi_gen/dvi_encoder.v 51 | - rtl/verilog/dvi_gen/dvi_gen_top.v 52 | - rtl/verilog/dvi_gen/encode.v 53 | - rtl/verilog/dvi_gen/serdes_n_to_1.v 54 | - rtl/verilog/dvi_gen/synchro.v 55 | name: ::atlys:0 56 | targets: 57 | default: 58 | filesets: 59 | - verilog_src_files 60 | sim: 61 | filesets: 62 | - verilog_src_files 63 | - verilog_tb_src_files 64 | - verilog_tb_private_src_files 65 | toplevel: orpsoc_tb 66 | synth: 67 | default_tool: ise 68 | filesets: 69 | - verilog_src_files 70 | - backend_files 71 | tools: 72 | ise: 73 | device: xc6slx45 74 | family: spartan6 75 | package: csg324 76 | toplevel: orpsoc_top 77 | -------------------------------------------------------------------------------- /tests/cores/atlys/data/atlys.ucf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/atlys/data/atlys.ucf -------------------------------------------------------------------------------- /tests/cores/atlys/data/dummy_backend_tcl_file.tcl: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | puts "Hi, I'm a backend TCL file" 6 | -------------------------------------------------------------------------------- /tests/cores/elf-loader/check_libelf.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | echo "$@" > check_libelf.sh.cmd 7 | -------------------------------------------------------------------------------- /tests/cores/elf-loader/elf-loader.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/elf-loader/elf-loader.c -------------------------------------------------------------------------------- /tests/cores/elf-loader/elf-loader.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Generic ELF loader 6 | filesets: 7 | pre_build_scripts: 8 | file_type: user 9 | files: 10 | - check_libelf.sh 11 | verilator_src_files: 12 | file_type: cSource 13 | files: 14 | - elf-loader.c 15 | - elf-loader.h: 16 | is_include_file: true 17 | vpi_src_files: 18 | files: 19 | - elf-loader.c 20 | - vpi_wrapper.c 21 | name: ::elf-loader:0 22 | parameters: 23 | elf-load: 24 | datatype: file 25 | description: ELF file to preload to memory 26 | paramtype: plusarg 27 | scope: public 28 | scripts: 29 | pre_build_scripts: 30 | cmd: 31 | - sh 32 | - ../src/elf-loader_0/check_libelf.sh 33 | targets: 34 | default: 35 | filesets: 36 | - verilator_src_files 37 | - pre_build_scripts 38 | hooks: 39 | pre_build: 40 | - pre_build_scripts 41 | parameters: 42 | - elf-load 43 | vpi: 44 | - vpi 45 | sim: 46 | filesets: 47 | - pre_build_scripts 48 | hooks: 49 | pre_build: 50 | - pre_build_scripts 51 | parameters: 52 | - elf-load 53 | toplevel: orpsoc_tb 54 | vpi: 55 | - vpi 56 | synth: 57 | default_tool: verilator 58 | filesets: 59 | - verilator_src_files 60 | - pre_build_scripts 61 | hooks: 62 | pre_build: 63 | - pre_build_scripts 64 | parameters: 65 | - elf-load 66 | tools: 67 | verilator: 68 | cli_parser: passthrough 69 | libs: 70 | - -lelf 71 | mode: cc 72 | toplevel: '' 73 | vpi: 74 | - vpi 75 | vpi: 76 | vpi: 77 | filesets: 78 | - vpi_src_files 79 | libs: 80 | - -lelf 81 | -------------------------------------------------------------------------------- /tests/cores/elf-loader/vpi_wrapper.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/elf-loader/vpi_wrapper.c -------------------------------------------------------------------------------- /tests/cores/gpio/gpio.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | description: Simple 8-bit gpio core 3 | filesets: 4 | verilog_src_files: 5 | file_type: verilogSource 6 | files: 7 | - gpio.v 8 | name: ::gpio:0 9 | targets: 10 | default: 11 | filesets: 12 | - verilog_src_files 13 | sim: 14 | filesets: 15 | - verilog_src_files 16 | - verilog_tb_src_files 17 | - verilog_tb_private_src_files 18 | toplevel: orpsoc_tb 19 | synth: 20 | filesets: 21 | - verilog_src_files 22 | -------------------------------------------------------------------------------- /tests/cores/jtag_tap/jtag_tap-1.13.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | description: JTAG Tap 3 | filesets: 4 | verilog_src_files: 5 | file_type: verilogSource 6 | files: 7 | - tap/rtl/verilog/tap_top.v 8 | name: ::jtag_tap:1.13 9 | provider: 10 | name: github 11 | patches: [] 12 | repo: jtag 13 | user: olofk 14 | version: v1.13 15 | targets: 16 | default: 17 | filesets: 18 | - verilog_src_files 19 | sim: 20 | filesets: 21 | - verilog_src_files 22 | - verilog_tb_src_files 23 | - verilog_tb_private_src_files 24 | toplevel: orpsoc_tb 25 | synth: 26 | filesets: 27 | - verilog_src_files 28 | -------------------------------------------------------------------------------- /tests/cores/libstorage/libstorage-1.0.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | filesets: 3 | src_files: 4 | file_type: vhdlSource-2008 5 | files: 6 | - rtl/vhdl/suv/libstorage_pkg.vhd 7 | - rtl/vhdl/suv/dpram_generic.vhd 8 | - rtl/vhdl/suv/fifo_fwft_adapter.vhd 9 | - rtl/vhdl/suv/fifo_generic.vhd 10 | - rtl/vhdl/suv/fifo_fwft_generic.vhd 11 | name: ::libstorage:1.0 12 | provider: 13 | name: github 14 | patches: [] 15 | repo: libstorage 16 | user: olofk 17 | version: master 18 | targets: 19 | default: 20 | filesets: 21 | - src_files 22 | sim: 23 | filesets: 24 | - src_files 25 | toplevel: orpsoc_tb 26 | synth: 27 | filesets: 28 | - src_files 29 | -------------------------------------------------------------------------------- /tests/cores/misc/c3demo.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | filesets: 3 | backend_files: 4 | file_type: PCF 5 | files: 6 | - c3demo.pcf 7 | rtl_files: 8 | depend: 9 | - '>=::paramtest:0' 10 | file_type: verilogSource 11 | files: 12 | - c3demo.v 13 | - ledpanel.v: 14 | is_include_file: true 15 | - picorv32.v 16 | tb_files: 17 | file_type: verilogSource 18 | files: 19 | - firmware.hex: 20 | is_include_file: true 21 | - $YOSYS_DAT_DIR/ice40/cells_sim.v 22 | - testbench.v 23 | name: ::c3demo:0 24 | parameters: 25 | firmware_file: 26 | datatype: file 27 | description: '"Firmware"' 28 | paramtype: vlogparam 29 | scope: private 30 | scripts: {} 31 | targets: 32 | default: 33 | filesets: 34 | - rtl_files 35 | - tb_files 36 | parameters: 37 | - firmware_file 38 | sim: 39 | default_tool: icarus 40 | filesets: 41 | - rtl_files 42 | - tb_files 43 | parameters: 44 | - firmware_file 45 | toplevel: testbench 46 | synth: 47 | default_tool: icestorm 48 | filesets: 49 | - rtl_files 50 | - backend_files 51 | parameters: 52 | - firmware_file 53 | tools: 54 | icestorm: 55 | arachne_pnr_options: 56 | - -s 57 | - '1' 58 | - -d 59 | - 8k 60 | toplevel: c3demo 61 | -------------------------------------------------------------------------------- /tests/cores/misc/c3demo.pcf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/misc/c3demo.pcf -------------------------------------------------------------------------------- /tests/cores/misc/copytocore/copytocore.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | 7 | name : ::copytocore:0 8 | 9 | filesets: 10 | copyfiles: 11 | files: 12 | - subdir/dummy.extra : {copyto : copied.file, file_type : user} 13 | - dummy.tcl : {copyto : subdir/another.file} 14 | file_type : tclSource 15 | 16 | targets: 17 | default: 18 | filesets : [copyfiles] 19 | toplevel : na 20 | -------------------------------------------------------------------------------- /tests/cores/misc/copytocore/dummy.tcl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/misc/copytocore/dummy.tcl -------------------------------------------------------------------------------- /tests/cores/misc/copytocore/subdir/dummy.extra: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/misc/copytocore/subdir/dummy.extra -------------------------------------------------------------------------------- /tests/cores/misc/dummy.tcl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/misc/dummy.tcl -------------------------------------------------------------------------------- /tests/cores/misc/dummy.xci: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/misc/dummy.xci -------------------------------------------------------------------------------- /tests/cores/misc/filetypes.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | filesets: 6 | file_types: 7 | file_type: vhdlSource 8 | files: 9 | - qip_file.qip: 10 | file_type: QIP 11 | - sv_file.sv: 12 | file_type: systemVerilogSource 13 | - ucf_file.ucf: 14 | file_type: UCF 15 | - user_file: 16 | file_type: user 17 | - tcl_file.tcl: 18 | file_type: tclSource 19 | - vlog_file.v: 20 | file_type: verilogSource 21 | - vhdl_file.vhd 22 | - vhdl_lib_file.vhd 23 | - vhdl2008_file.vhd: 24 | file_type: vhdlSource-2008 25 | - xci_file.xci: 26 | file_type: xci 27 | - xdc_file: 28 | file_type: xdc 29 | name: ::filetypes:0 30 | targets: 31 | default: 32 | filesets: 33 | - file_types 34 | sim: 35 | filesets: 36 | - file_types 37 | toplevel: orpsoc_tb 38 | synth: 39 | filesets: 40 | - file_types 41 | -------------------------------------------------------------------------------- /tests/cores/misc/ghdltest.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | filesets: 6 | post_run_scripts: 7 | file_type: user 8 | files: 9 | - scripts/post_run_script 10 | pre_build_scripts: 11 | file_type: user 12 | files: 13 | - scripts/pre_build_script 14 | pre_run_scripts: 15 | file_type: user 16 | files: 17 | - scripts/pre_run_script 18 | name: ::ghdltest:0 19 | scripts: 20 | post_run_scripts: 21 | cmd: 22 | - sh 23 | - ../src/ghdltest_0/scripts/post_run_script 24 | pre_build_scripts: 25 | cmd: 26 | - sh 27 | - ../src/ghdltest_0/scripts/pre_build_script 28 | pre_run_scripts: 29 | cmd: 30 | - sh 31 | - ../src/ghdltest_0/scripts/pre_run_script 32 | targets: 33 | default: 34 | filesets: 35 | - pre_build_scripts 36 | - pre_run_scripts 37 | - post_run_scripts 38 | hooks: 39 | post_run: 40 | - post_run_scripts 41 | pre_build: 42 | - pre_build_scripts 43 | pre_run: 44 | - pre_run_scripts 45 | sim: 46 | filesets: 47 | - pre_build_scripts 48 | - pre_run_scripts 49 | - post_run_scripts 50 | hooks: 51 | post_run: 52 | - post_run_scripts 53 | pre_build: 54 | - pre_build_scripts 55 | pre_run: 56 | - pre_run_scripts 57 | toplevel: e 58 | synth: 59 | filesets: 60 | - pre_build_scripts 61 | - pre_run_scripts 62 | - post_run_scripts 63 | hooks: 64 | post_run: 65 | - post_run_scripts 66 | pre_build: 67 | - pre_build_scripts 68 | pre_run: 69 | - pre_run_scripts 70 | -------------------------------------------------------------------------------- /tests/cores/misc/gitcore.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Test core for git provider 6 | name: ::gitcore:0 7 | provider: 8 | name: git 9 | patches: [] 10 | repo: https://github.com/fusesoc/wb_common 11 | targets: 12 | default: 13 | filesets: [] 14 | sim: 15 | toplevel: orpsoc_tb 16 | -------------------------------------------------------------------------------- /tests/cores/misc/no_exe_script.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | filesets: 6 | pre_build_scripts: 7 | file_type: user 8 | files: 9 | - scripts/no_exe_script 10 | name: ::no_exe_script:0 11 | scripts: 12 | pre_build_scripts: 13 | cmd: 14 | - sh 15 | - ../src/no_exe_script_0/scripts/no_exe_script 16 | targets: 17 | default: 18 | filesets: 19 | - pre_build_scripts 20 | hooks: 21 | pre_build: 22 | - pre_build_scripts 23 | sim: 24 | filesets: 25 | - pre_build_scripts 26 | hooks: 27 | pre_build: 28 | - pre_build_scripts 29 | toplevel: orpsoc_tb 30 | synth: 31 | filesets: 32 | - pre_build_scripts 33 | hooks: 34 | pre_build: 35 | - pre_build_scripts 36 | -------------------------------------------------------------------------------- /tests/cores/misc/nomain.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | name: ::nomain:0 6 | targets: 7 | default: 8 | filesets: [] 9 | sim: 10 | toplevel: orpsoc_tb 11 | -------------------------------------------------------------------------------- /tests/cores/misc/opencorescore.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Test core for opencores provider 6 | name: ::opencorescore:0 7 | provider: 8 | name: opencores 9 | patches: [] 10 | repo_name: jtag 11 | repo_root: trunk/tap/rtl/verilog 12 | revision: '24' 13 | targets: 14 | default: 15 | filesets: [] 16 | sim: 17 | toplevel: orpsoc_tb 18 | -------------------------------------------------------------------------------- /tests/cores/misc/paramtest.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | name: ::paramtest:0 6 | parameters: 7 | cmdlinearg_bool: 8 | datatype: bool 9 | description: boolean verilog cmdlinearg 10 | paramtype: cmdlinearg 11 | scope: public 12 | cmdlinearg_int: 13 | datatype: int 14 | description: integer verilog cmdlinearg 15 | paramtype: cmdlinearg 16 | scope: public 17 | cmdlinearg_str: 18 | datatype: str 19 | description: string verilog cmdlinearg 20 | paramtype: cmdlinearg 21 | scope: public 22 | plusarg_bool: 23 | datatype: bool 24 | description: boolean verilog plusarg 25 | paramtype: plusarg 26 | scope: public 27 | plusarg_int: 28 | datatype: int 29 | description: integer verilog plusarg 30 | paramtype: plusarg 31 | scope: public 32 | plusarg_str: 33 | datatype: str 34 | description: string verilog plusarg 35 | paramtype: plusarg 36 | scope: public 37 | vlogdefine_bool: 38 | datatype: bool 39 | description: boolean verilog define 40 | paramtype: vlogdefine 41 | scope: public 42 | vlogdefine_int: 43 | datatype: int 44 | description: integer verilog define 45 | paramtype: vlogdefine 46 | scope: public 47 | vlogdefine_str: 48 | datatype: str 49 | description: string verilog define 50 | paramtype: vlogdefine 51 | scope: public 52 | vlogparam_bool: 53 | datatype: bool 54 | description: boolean verilog parameter 55 | paramtype: vlogparam 56 | scope: public 57 | vlogparam_int: 58 | datatype: int 59 | description: integer verilog parameter 60 | paramtype: vlogparam 61 | scope: public 62 | vlogparam_str: 63 | datatype: str 64 | description: string verilog parameter 65 | paramtype: vlogparam 66 | scope: public 67 | targets: 68 | default: 69 | filesets: [] 70 | parameters: 71 | - vlogparam_bool 72 | - vlogparam_int 73 | - vlogparam_str 74 | - vlogdefine_bool 75 | - vlogdefine_int 76 | - vlogdefine_str 77 | - plusarg_bool 78 | - plusarg_int 79 | - plusarg_str 80 | - cmdlinearg_bool 81 | - cmdlinearg_int 82 | - cmdlinearg_str 83 | sim: 84 | parameters: 85 | - vlogparam_bool 86 | - vlogparam_int 87 | - vlogparam_str 88 | - vlogdefine_bool 89 | - vlogdefine_int 90 | - vlogdefine_str 91 | - plusarg_bool 92 | - plusarg_int 93 | - plusarg_str 94 | - cmdlinearg_bool 95 | - cmdlinearg_int 96 | - cmdlinearg_str 97 | toplevel: orpsoc_tb 98 | synth: 99 | parameters: 100 | - vlogparam_bool 101 | - vlogparam_int 102 | - vlogparam_str 103 | - vlogdefine_bool 104 | - vlogdefine_int 105 | - vlogdefine_str 106 | - plusarg_bool 107 | - plusarg_int 108 | - plusarg_str 109 | - cmdlinearg_bool 110 | - cmdlinearg_int 111 | - cmdlinearg_str 112 | -------------------------------------------------------------------------------- /tests/cores/misc/scripts/no_exe_script: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/misc/scripts/no_exe_script -------------------------------------------------------------------------------- /tests/cores/misc/scripts/post_build_script: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | touch post_build_script_executed 7 | exit 0 8 | -------------------------------------------------------------------------------- /tests/cores/misc/scripts/post_run_script: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | touch post_run_script_executed 6 | -------------------------------------------------------------------------------- /tests/cores/misc/scripts/pre_build_script: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | touch pre_build_script_executed 7 | exit 0 8 | -------------------------------------------------------------------------------- /tests/cores/misc/scripts/pre_run_script: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | touch pre_run_script_executed 6 | -------------------------------------------------------------------------------- /tests/cores/misc/scriptscore.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | filesets: 6 | post_run_scripts: 7 | file_type: user 8 | files: 9 | - simpost_run_scripts0 10 | - simpost_run_scripts1 11 | pre_build_scripts: 12 | file_type: user 13 | files: 14 | - simpre_build_scripts0 15 | - simpre_build_scripts1 16 | pre_run_scripts: 17 | file_type: user 18 | files: 19 | - simpre_run_scripts0 20 | - simpre_run_scripts1 21 | name: ::scriptscore:0 22 | scripts: 23 | post_run_scripts: 24 | cmd: 25 | - sh 26 | - ../src/scriptscore_0/simpost_run_scripts0 27 | pre_build_scripts: 28 | cmd: 29 | - sh 30 | - ../src/scriptscore_0/simpre_build_scripts0 31 | pre_run_scripts: 32 | cmd: 33 | - sh 34 | - ../src/scriptscore_0/simpre_run_scripts0 35 | targets: 36 | default: 37 | filesets: 38 | - pre_build_scripts 39 | - pre_run_scripts 40 | - post_run_scripts 41 | hooks: 42 | post_run: 43 | - post_run_scripts 44 | pre_build: 45 | - pre_build_scripts 46 | pre_run: 47 | - pre_run_scripts 48 | sim: 49 | filesets: 50 | - pre_build_scripts 51 | - pre_run_scripts 52 | - post_run_scripts 53 | hooks: 54 | post_run: 55 | - post_run_scripts 56 | pre_build: 57 | - pre_build_scripts 58 | pre_run: 59 | - pre_run_scripts 60 | toplevel: orpsoc_tb 61 | synth: 62 | filesets: 63 | - pre_build_scripts 64 | - pre_run_scripts 65 | - post_run_scripts 66 | hooks: 67 | post_run: 68 | - post_run_scripts 69 | pre_build: 70 | - pre_build_scripts 71 | pre_run: 72 | - pre_run_scripts 73 | -------------------------------------------------------------------------------- /tests/cores/misc/subdir/dummy.extra: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/misc/subdir/dummy.extra -------------------------------------------------------------------------------- /tests/cores/misc/svn.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Test core for svn provider 6 | name: ::svncore:0 7 | provider: 8 | name: svn 9 | patches: [] 10 | url: https://svn.code.sf.net/p/gtkwave/code/gtkwave3/share/applications/ 11 | revision: '1657' 12 | ignore_externals: true 13 | targets: 14 | default: 15 | filesets: [] 16 | -------------------------------------------------------------------------------- /tests/cores/mor1kx-arty/mor1kx-arty.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | filesets: 6 | verilog_src_files: 7 | depend: 8 | - '>=::filetypes:0' 9 | - '>=::mor1kx:0' 10 | - '>=::paramtest:0' 11 | file_type: verilogSource 12 | files: 13 | - rtl/verilog/mor1kx_arty.sv 14 | name: ::mor1kx-arty:0 15 | targets: 16 | default: 17 | filesets: 18 | - verilog_src_files 19 | sim: 20 | filesets: 21 | - verilog_src_files 22 | - verilog_tb_src_files 23 | - verilog_tb_private_src_files 24 | toplevel: orpsoc_tb 25 | synth: 26 | default_tool: vivado 27 | filesets: 28 | - verilog_src_files 29 | tools: 30 | vivado: 31 | part: xc7a35tcsg324-1 32 | toplevel: mor1kx_arty_top 33 | -------------------------------------------------------------------------------- /tests/cores/mor1kx-arty/mor1kx-arty.system: -------------------------------------------------------------------------------- 1 | SAPI=1 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | [main] 6 | name = mor1kx-arty 7 | description = "Xilinx/Digilent Arty board OpenRISC system" 8 | 9 | backend = vivado 10 | 11 | [vivado] 12 | part = "xc7a35tcsg324-1" 13 | hw_device = xc7a35t_0 14 | top_module = mor1kx_arty_top 15 | -------------------------------------------------------------------------------- /tests/cores/mor1kx-generic/mor1kx-generic.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Minimal mor1kx simulation environment 6 | filesets: 7 | file_types: 8 | file_type: vhdlSource 9 | files: 10 | - vhdl_file.vhd 11 | - sv_file.sv: 12 | file_type: systemVerilogSource 13 | - user_file: 14 | file_type: user 15 | - other_file: 16 | file_type: xdc 17 | post_run_scripts: 18 | file_type: user 19 | files: 20 | - scripts/post_run_script 21 | pre_build_scripts: 22 | file_type: user 23 | files: 24 | - scripts/pre_build_script 25 | pre_run_scripts: 26 | file_type: user 27 | files: 28 | - scripts/pre_run_script 29 | verilator_tb_toplevel: 30 | file_type: cSource 31 | files: 32 | - bench/verilator/tb.cpp 33 | verilog_src_files: 34 | depend: 35 | - '>=::adv_debug_sys:0' 36 | - '>=::filetypes:0' 37 | - ::jtag_tap:1.13 38 | - '>=::mor1kx:0' 39 | - '>=::paramtest:0' 40 | - ::wb_intercon:1.0 41 | file_type: verilogSource 42 | files: 43 | - rtl/verilog/wb_intercon.vh: 44 | is_include_file: true 45 | - bench/verilog/include/test-defines.v: 46 | is_include_file: true 47 | - rtl/verilog/orpsoc_top.v 48 | - rtl/verilog/wb_intercon.v 49 | verilog_tb_private_src_files: 50 | depend: 51 | - '>=::elf-loader:0' 52 | file_type: verilogSource 53 | files: 54 | - bench/verilog/orpsoc_tb.v 55 | name: ::mor1kx-generic:0 56 | parameters: 57 | clear_ram: 58 | datatype: bool 59 | description: Preset RAM to a known value (0) 60 | paramtype: plusarg 61 | scope: private 62 | scripts: 63 | post_run_scripts: 64 | cmd: 65 | - sh 66 | - ../src/mor1kx-generic_0/scripts/post_run_script 67 | pre_build_scripts: 68 | cmd: 69 | - sh 70 | - ../src/mor1kx-generic_0/scripts/pre_build_script 71 | pre_run_scripts: 72 | cmd: 73 | - sh 74 | - ../src/mor1kx-generic_0/scripts/pre_run_script 75 | targets: 76 | default: 77 | filesets: 78 | - verilog_src_files 79 | - file_types 80 | - pre_build_scripts 81 | - pre_run_scripts 82 | - post_run_scripts 83 | hooks: 84 | post_run: 85 | - post_run_scripts 86 | pre_build: 87 | - pre_build_scripts 88 | pre_run: 89 | - pre_run_scripts 90 | parameters: 91 | - clear_ram 92 | sim: 93 | default_tool: icarus 94 | filesets: 95 | - verilog_src_files 96 | - verilog_tb_src_files 97 | - verilog_tb_private_src_files 98 | - pre_build_scripts 99 | - pre_run_scripts 100 | - post_run_scripts 101 | hooks: 102 | post_run: 103 | - post_run_scripts 104 | pre_build: 105 | - pre_build_scripts 106 | pre_run: 107 | - pre_run_scripts 108 | parameters: 109 | - clear_ram 110 | tools: 111 | icarus: 112 | iverilog_options: 113 | - -DSIM 114 | toplevel: orpsoc_tb 115 | synth: 116 | default_tool: verilator 117 | filesets: 118 | - verilog_src_files 119 | - verilator_tb_toplevel 120 | - pre_build_scripts 121 | - pre_run_scripts 122 | - post_run_scripts 123 | hooks: 124 | post_run: 125 | - post_run_scripts 126 | pre_build: 127 | - pre_build_scripts 128 | pre_run: 129 | - pre_run_scripts 130 | parameters: 131 | - clear_ram 132 | tools: 133 | verilator: 134 | cli_parser: managed 135 | mode: cc 136 | verilator_options: 137 | - -Wno-fatal 138 | - --trace 139 | toplevel: orpsoc_top 140 | -------------------------------------------------------------------------------- /tests/cores/mor1kx-generic/scripts/post_run_script: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | touch post_run_script_executed 6 | -------------------------------------------------------------------------------- /tests/cores/mor1kx-generic/scripts/pre_build_script: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | touch pre_build_script_executed 6 | -------------------------------------------------------------------------------- /tests/cores/mor1kx-generic/scripts/pre_run_script: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | touch pre_run_script_executed 6 | -------------------------------------------------------------------------------- /tests/cores/mor1kx/mor1kx-3.1.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: mor1kx CPU 6 | filesets: 7 | verilog_src_files: 8 | file_type: verilogSource 9 | files: 10 | - rtl/verilog/mor1kx-defines.v: 11 | is_include_file: true 12 | - rtl/verilog/mor1kx-sprs.v: 13 | is_include_file: true 14 | - rtl/verilog/mor1kx_utils.vh: 15 | is_include_file: true 16 | - rtl/verilog/mor1kx_branch_prediction.v 17 | - rtl/verilog/mor1kx_bus_if_avalon.v 18 | - rtl/verilog/mor1kx_bus_if_wb32.v 19 | - rtl/verilog/mor1kx_cache_lru.v 20 | - rtl/verilog/mor1kx_cfgrs.v 21 | - rtl/verilog/mor1kx_cpu_cappuccino.v 22 | - rtl/verilog/mor1kx_cpu_espresso.v 23 | - rtl/verilog/mor1kx_cpu_prontoespresso.v 24 | - rtl/verilog/mor1kx_cpu.v 25 | - rtl/verilog/mor1kx_ctrl_cappuccino.v 26 | - rtl/verilog/mor1kx_ctrl_espresso.v 27 | - rtl/verilog/mor1kx_ctrl_prontoespresso.v 28 | - rtl/verilog/mor1kx_dcache.v 29 | - rtl/verilog/mor1kx_decode_execute_cappuccino.v 30 | - rtl/verilog/mor1kx_decode.v 31 | - rtl/verilog/mor1kx_dmmu.v 32 | - rtl/verilog/mor1kx_execute_alu.v 33 | - rtl/verilog/mor1kx_execute_ctrl_cappuccino.v 34 | - rtl/verilog/mor1kx_fetch_cappuccino.v 35 | - rtl/verilog/mor1kx_fetch_espresso.v 36 | - rtl/verilog/mor1kx_fetch_prontoespresso.v 37 | - rtl/verilog/mor1kx_fetch_tcm_prontoespresso.v 38 | - rtl/verilog/mor1kx_icache.v 39 | - rtl/verilog/mor1kx_immu.v 40 | - rtl/verilog/mor1kx_lsu_cappuccino.v 41 | - rtl/verilog/mor1kx_lsu_espresso.v 42 | - rtl/verilog/mor1kx_pic.v 43 | - rtl/verilog/mor1kx_rf_cappuccino.v 44 | - rtl/verilog/mor1kx_rf_espresso.v 45 | - rtl/verilog/mor1kx_simple_dpram_sclk.v 46 | - rtl/verilog/mor1kx_store_buffer.v 47 | - rtl/verilog/mor1kx_ticktimer.v 48 | - rtl/verilog/mor1kx_true_dpram_sclk.v 49 | - rtl/verilog/mor1kx.v 50 | - rtl/verilog/mor1kx_wb_mux_cappuccino.v 51 | - rtl/verilog/mor1kx_wb_mux_espresso.v 52 | verilog_tb_src_files: 53 | file_type: verilogSource 54 | files: 55 | - bench/verilog/mor1kx_monitor.v 56 | name: ::mor1kx:3.1 57 | parameters: 58 | trace_enable: 59 | datatype: bool 60 | description: Enable mor1kx instruction trace 61 | paramtype: plusarg 62 | scope: public 63 | trace_to_screen: 64 | datatype: bool 65 | description: Output mor1kx instruction trace to screen 66 | paramtype: plusarg 67 | scope: public 68 | provider: 69 | name: github 70 | patches: [] 71 | repo: mor1kx 72 | user: openrisc 73 | version: v3.1 74 | targets: 75 | default: 76 | filesets: 77 | - verilog_src_files 78 | - verilog_tb_src_files 79 | parameters: 80 | - trace_enable 81 | - trace_to_screen 82 | sim: 83 | filesets: 84 | - verilog_src_files 85 | - verilog_tb_src_files 86 | - verilog_tb_private_src_files 87 | parameters: 88 | - trace_enable 89 | - trace_to_screen 90 | toplevel: orpsoc_tb 91 | synth: 92 | filesets: 93 | - verilog_src_files 94 | parameters: 95 | - trace_enable 96 | - trace_to_screen 97 | -------------------------------------------------------------------------------- /tests/cores/sockit/sockit.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Arrow/Terasic SoCKit board 6 | filesets: 7 | backend_files: 8 | file_type: QSYS 9 | files: 10 | - data/sockit.qsys 11 | - data/sockit.sdc: 12 | file_type: SDC 13 | - data/pinmap.tcl: 14 | file_type: tclSource 15 | qsys: 16 | file_type: QSYS 17 | files: 18 | - data/sockit.qsys 19 | verilog_src_files: 20 | depend: 21 | - '>=::filetypes:0' 22 | - '>=::jtag_tap:0' 23 | - '>=::wb_intercon:0' 24 | - '>=::adv_debug_sys:0' 25 | - '>=::mor1kx:0' 26 | - ::uart16550:1.5 27 | - '>=::gpio:0' 28 | - '>=::paramtest:0' 29 | - '>=::vga_lcd:0' 30 | file_type: verilogSource 31 | files: 32 | - rtl/verilog/include/orpsoc-defines.v: 33 | is_include_file: true 34 | - rtl/verilog/include/timescale.v: 35 | is_include_file: true 36 | - rtl/verilog/include/uart_defines.v: 37 | is_include_file: true 38 | - rtl/verilog/wb_intercon.vh: 39 | is_include_file: true 40 | - rtl/verilog/clkgen.v 41 | - rtl/verilog/orpsoc_top.v 42 | - rtl/verilog/rom.v 43 | - rtl/verilog/wb_intercon.v 44 | name: ::sockit:1.0 45 | targets: 46 | default: 47 | filesets: 48 | - verilog_src_files 49 | - qsys 50 | sim: 51 | default_tool: icarus 52 | filesets: 53 | - verilog_src_files 54 | - verilog_tb_src_files 55 | - verilog_tb_private_src_files 56 | toplevel: orpsoc_tb 57 | synth: 58 | default_tool: quartus 59 | filesets: 60 | - verilog_src_files 61 | - qsys 62 | - backend_files 63 | tools: 64 | quartus: 65 | device: 5CSXFC6D6F31C8ES 66 | family: Cyclone V 67 | quartus_options: --64bit 68 | toplevel: orpsoc_top 69 | -------------------------------------------------------------------------------- /tests/cores/uart16550/uart16550-1.5.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: UART 16550 transceiver 6 | filesets: 7 | verilog_src_files: 8 | file_type: verilogSource 9 | files: 10 | - rtl/verilog/raminfr.v 11 | - rtl/verilog/uart_debug_if.v 12 | - rtl/verilog/uart_receiver.v 13 | - rtl/verilog/uart_regs.v 14 | - rtl/verilog/uart_rfifo.v 15 | - rtl/verilog/uart_sync_flops.v 16 | - rtl/verilog/uart_tfifo.v 17 | - rtl/verilog/uart_top.v 18 | - rtl/verilog/uart_transmitter.v 19 | - rtl/verilog/uart_wb.v 20 | name: ::uart16550:1.5 21 | provider: 22 | name: github 23 | patches: [] 24 | repo: uart16550 25 | user: olofk 26 | version: rel_5 27 | targets: 28 | default: 29 | filesets: 30 | - verilog_src_files 31 | sim: 32 | filesets: 33 | - verilog_src_files 34 | - verilog_tb_src_files 35 | - verilog_tb_private_src_files 36 | toplevel: orpsoc_tb 37 | synth: 38 | filesets: 39 | - verilog_src_files 40 | -------------------------------------------------------------------------------- /tests/cores/verilator_tb_utils/verilator_tb_utils.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Verilator test bench utility class 6 | filesets: 7 | verilator_src_files: 8 | file_type: cppSource 9 | files: 10 | - verilator_tb_utils.cpp 11 | - jtagServer.cpp 12 | - verilator_tb_utils.h: 13 | is_include_file: true 14 | - jtagServer.h: 15 | is_include_file: true 16 | name: ::verilator_tb_utils:0 17 | targets: 18 | default: 19 | filesets: 20 | - verilator_src_files 21 | sim: 22 | toplevel: orpsoc_tb 23 | synth: 24 | default_tool: verilator 25 | filesets: 26 | - verilator_src_files 27 | tools: 28 | verilator: 29 | cli_parser: passthrough 30 | mode: cc 31 | toplevel: '' 32 | -------------------------------------------------------------------------------- /tests/cores/verilog-arbiter/verilog-arbiter-r1.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Verilog arbiter 6 | filesets: 7 | verilog_src_files: 8 | file_type: verilogSource 9 | files: 10 | - src/arbiter.v 11 | verilog_tb_private_src_files: 12 | file_type: verilogSource 13 | files: 14 | - src/arbiter_tb.v 15 | name: ::verilog-arbiter:0-r1 16 | provider: 17 | name: github 18 | patches: [] 19 | repo: verilog-arbiter 20 | user: bmartini 21 | version: b79f89e17f0be3b70a513c1a0b456f734a79273a 22 | targets: 23 | default: 24 | filesets: 25 | - verilog_src_files 26 | sim: 27 | filesets: 28 | - verilog_src_files 29 | - verilog_tb_src_files 30 | - verilog_tb_private_src_files 31 | toplevel: orpsoc_tb 32 | synth: 33 | filesets: 34 | - verilog_src_files 35 | -------------------------------------------------------------------------------- /tests/cores/verilog_utils/verilog_utils.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Verilog utility functions 6 | filesets: 7 | verilog_src_files: 8 | file_type: verilogSource 9 | files: 10 | - verilog_utils.vh: 11 | is_include_file: true 12 | name: ::verilog_utils:0 13 | targets: 14 | default: 15 | filesets: 16 | - verilog_src_files 17 | sim: 18 | filesets: 19 | - verilog_src_files 20 | - verilog_tb_src_files 21 | - verilog_tb_private_src_files 22 | toplevel: orpsoc_tb 23 | synth: 24 | filesets: 25 | - verilog_src_files 26 | -------------------------------------------------------------------------------- /tests/cores/verilog_utils/verilog_utils.vh: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/verilog_utils/verilog_utils.vh -------------------------------------------------------------------------------- /tests/cores/vga_lcd/vga_lcd.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: VGA/LCD Controller core 6 | filesets: 7 | verilog_src_files: 8 | file_type: verilogSource 9 | files: 10 | - rtl/verilog/vga_defines.v: 11 | is_include_file: true 12 | - rtl/verilog/generic_dpram.v 13 | - rtl/verilog/generic_spram.v 14 | - rtl/verilog/timescale.v 15 | - rtl/verilog/vga_clkgen.v 16 | - rtl/verilog/vga_colproc.v 17 | - rtl/verilog/vga_csm_pb.v 18 | - rtl/verilog/vga_cur_cregs.v 19 | - rtl/verilog/vga_curproc.v 20 | - rtl/verilog/vga_enh_top.v 21 | - rtl/verilog/vga_fifo_dc.v 22 | - rtl/verilog/vga_fifo.v 23 | - rtl/verilog/vga_pgen.v 24 | - rtl/verilog/vga_tgen.v 25 | - rtl/verilog/vga_vtim.v 26 | - rtl/verilog/vga_wb_master.v 27 | - rtl/verilog/vga_wb_slave.v 28 | name: ::vga_lcd:0 29 | provider: 30 | name: github 31 | patches: [] 32 | repo: vga_lcd 33 | user: olofk 34 | version: 4c0f93996e5bdba8f20edd6c83f527882a890284 35 | targets: 36 | default: 37 | filesets: 38 | - verilog_src_files 39 | sim: 40 | filesets: 41 | - verilog_src_files 42 | - verilog_tb_src_files 43 | - verilog_tb_private_src_files 44 | toplevel: orpsoc_tb 45 | synth: 46 | filesets: 47 | - verilog_src_files 48 | -------------------------------------------------------------------------------- /tests/cores/vlog_tb_utils/files/0001-testpatch.patch: -------------------------------------------------------------------------------- 1 | From faa1d73b006878c7d2e863b7c2b8bc2478bfd2e0 Mon Sep 17 00:00:00 2001 2 | From: Olof Kindgren 3 | Date: Mon, 17 Jul 2017 23:06:16 +0200 4 | Subject: [PATCH] testpatch.diff 5 | 6 | --- 7 | vlog_functions.v | 1 + 8 | 1 file changed, 1 insertion(+) 9 | 10 | diff --git a/vlog_functions.v b/vlog_functions.v 11 | index 52b5818..55ff587 100644 12 | --- a/vlog_functions.v 13 | +++ b/vlog_functions.v 14 | @@ -16,6 +16,7 @@ 15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 | */ 17 | 18 | +//I have been patched 19 | module vlog_functions; 20 | 21 | task progress_bar; 22 | -- 23 | 2.13.0 24 | 25 | -------------------------------------------------------------------------------- /tests/cores/vlog_tb_utils/vlog_tb_utils-1.1.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Verilog test bench utilities 6 | filesets: 7 | tb_files: 8 | file_type: verilogSource 9 | files: 10 | - vlog_functions.v 11 | - vlog_tap_generator.v 12 | - vlog_tb_utils.v 13 | name: ::vlog_tb_utils:1.1 14 | parameters: 15 | heartbeat: 16 | datatype: int 17 | description: Display a heartbeat message every n*heartbeat time unit 18 | paramtype: plusarg 19 | scope: public 20 | tapfile: 21 | datatype: str 22 | description: Name of TAP file 23 | paramtype: plusarg 24 | scope: public 25 | testcase: 26 | datatype: str 27 | description: Name of testcase (Used for VCD filename) 28 | paramtype: plusarg 29 | scope: public 30 | timeout: 31 | datatype: int 32 | description: Abort test case after n cycles 33 | paramtype: plusarg 34 | scope: public 35 | vcd: 36 | datatype: bool 37 | description: Enable VCD logging 38 | paramtype: plusarg 39 | scope: public 40 | provider: 41 | name: github 42 | patches: 43 | - files/0001-testpatch.patch 44 | repo: vlog_tb_utils 45 | user: fusesoc 46 | version: v1.1 47 | targets: 48 | default: 49 | filesets: 50 | - tb_files 51 | parameters: 52 | - heartbeat 53 | - tapfile 54 | - testcase 55 | - timeout 56 | - vcd 57 | sim: 58 | filesets: 59 | - tb_files 60 | parameters: 61 | - heartbeat 62 | - tapfile 63 | - testcase 64 | - timeout 65 | - vcd 66 | toplevel: orpsoc_tb 67 | synth: 68 | parameters: 69 | - heartbeat 70 | - tapfile 71 | - testcase 72 | - timeout 73 | - vcd 74 | -------------------------------------------------------------------------------- /tests/cores/wb_common/wb_common.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | description: Common utility functions and parameters for the Wishbone bus 6 | filesets: 7 | verilog_src_files: 8 | file_type: verilogSource 9 | files: 10 | - wb_common_params.v: 11 | is_include_file: true 12 | - wb_common.v: 13 | is_include_file: true 14 | name: ::wb_common:0 15 | targets: 16 | default: 17 | filesets: 18 | - verilog_src_files 19 | sim: 20 | filesets: 21 | - verilog_src_files 22 | - verilog_tb_src_files 23 | - verilog_tb_private_src_files 24 | toplevel: orpsoc_tb 25 | synth: 26 | filesets: 27 | - verilog_src_files 28 | -------------------------------------------------------------------------------- /tests/cores/wb_common/wb_common.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/wb_common/wb_common.v -------------------------------------------------------------------------------- /tests/cores/wb_common/wb_common_params.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/wb_common/wb_common_params.v -------------------------------------------------------------------------------- /tests/cores/wb_intercon/dummy_icarus.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/cores/wb_intercon/dummy_icarus.v -------------------------------------------------------------------------------- /tests/cores/wb_intercon/wb_intercon-1.0.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | # Copyright FuseSoC contributors 3 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 4 | # SPDX-License-Identifier: BSD-2-Clause 5 | 6 | name: ::wb_intercon:1.0 7 | description: Wishbone Bus Interconnect utilities 8 | 9 | filesets: 10 | icarus_only: 11 | files: 12 | - dummy_icarus.v 13 | quartus_only: 14 | files: 15 | - dummy.v 16 | verilog_src_files: 17 | depend: 18 | - ::verilog-arbiter:0-r1 19 | - '>=::verilog_utils:0' 20 | - '>=::wb_common:0' 21 | file_type: verilogSource 22 | files: 23 | - rtl/verilog/wb_arbiter.v 24 | - rtl/verilog/wb_data_resize.v 25 | - rtl/verilog/wb_upsizer.v 26 | - rtl/verilog/wb_mux.v 27 | verilog_tb_private_src_files: 28 | depend: 29 | - '>=::vlog_tb_utils:1.0' 30 | file_type: verilogSource 31 | files: 32 | - bench/wb_mux_tb.v 33 | - bench/wb_arbiter_tb.v 34 | - bench/wb_upsizer_tb.v 35 | - bench/wb_intercon_tb.v 36 | 37 | parameters: 38 | transactions: 39 | datatype: int 40 | description: Number of wishbone transactions to run in test bench 41 | paramtype: plusarg 42 | scope: private 43 | 44 | provider: 45 | name: github 46 | patches: [] 47 | repo: wb_intercon 48 | user: olofk 49 | version: v1.0 50 | 51 | targets: 52 | default: 53 | default_tool: icarus 54 | filesets: 55 | - verilog_src_files 56 | - "tool_quartus ? (quartus_only)" 57 | - "tool_icarus ? (icarus_only)" 58 | - verilog_tb_private_src_files 59 | parameters: 60 | - transactions 61 | toplevel: wb_intercon_tb 62 | -------------------------------------------------------------------------------- /tests/lockfiles/dependencies-partial-1.0.lock.yml: -------------------------------------------------------------------------------- 1 | cores: 2 | - name: "::used:1.0" 3 | -------------------------------------------------------------------------------- /tests/lockfiles/dependencies-partial.lock.yml: -------------------------------------------------------------------------------- 1 | cores: 2 | - name: "::used:1.1" 3 | -------------------------------------------------------------------------------- /tests/lockfiles/dependencies.lock.yml: -------------------------------------------------------------------------------- 1 | cores: 2 | - name: "::used:1.1" 3 | - name: "::dependencies-top:0" 4 | -------------------------------------------------------------------------------- /tests/lockfiles/duplicates.lock.yml: -------------------------------------------------------------------------------- 1 | lockfile_version: 1 2 | fusesoc_version: 2.4.2 3 | cores: 4 | - name: ":lib:pin:0.1" 5 | - name: ":lib:pin:0.2" 6 | - name: ":lib:gpio:0.1" 7 | - name: ":common:gpio_ctrl:0.1" 8 | - name: ":product:toppy:0.1" 9 | -------------------------------------------------------------------------------- /tests/lockfiles/works.lock.yml: -------------------------------------------------------------------------------- 1 | lockfile_version: 1 2 | fusesoc_version: 2.4.2 3 | cores: 4 | - name: ":lib:pin:0.1" 5 | - name: ":lib:gpio:0.1" 6 | - name: ":common:gpio_ctrl:0.1" 7 | - name: ":product:toppy:0.1" 8 | -------------------------------------------------------------------------------- /tests/test_capi2/generators.info: -------------------------------------------------------------------------------- 1 | CORE INFO 2 | Name: ::generators:0 3 | Description: 4 | 5 | Targets: 6 | -------------------------------------------------------------------------------- /tests/test_capi2/targets.info: -------------------------------------------------------------------------------- 1 | CORE INFO 2 | Name: ::targets:0 3 | Description: 4 | 5 | Targets: 6 | default : 7 | empty_target : 8 | target_with_tool_options : 9 | -------------------------------------------------------------------------------- /tests/test_common.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import os 6 | 7 | tests_dir = os.path.dirname(__file__) 8 | cache_root = os.path.join(tests_dir, "cache") 9 | cores_root = os.path.join(tests_dir, "cores") 10 | library_root = os.path.join(tests_dir, "libraries") 11 | -------------------------------------------------------------------------------- /tests/test_config.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import os 6 | import os.path 7 | import tempfile 8 | 9 | from test_common import cache_root, cores_root, library_root 10 | 11 | from fusesoc.config import Config 12 | 13 | build_root = "test_build_root" 14 | 15 | EXAMPLE_CONFIG = """ 16 | [main] 17 | build_root = {build_root} 18 | cache_root = {cache_root} 19 | cores_root = {cores_root} 20 | library_root = {library_root} 21 | 22 | [library.test_lib] 23 | location = {library_root}/test_lib 24 | auto-sync = false 25 | sync-uri = https://github.com/fusesoc/fusesoc-cores 26 | """ 27 | 28 | 29 | def test_config(): 30 | tcf = tempfile.NamedTemporaryFile(mode="w+") 31 | tcf.write( 32 | EXAMPLE_CONFIG.format( 33 | build_root=build_root, 34 | cache_root=cache_root, 35 | cores_root=cores_root, 36 | library_root=library_root, 37 | ) 38 | ) 39 | tcf.seek(0) 40 | 41 | conf = Config(tcf.name) 42 | 43 | assert conf.library_root == library_root 44 | 45 | 46 | import pytest 47 | 48 | 49 | @pytest.mark.parametrize("from_cli", [False, True]) 50 | @pytest.mark.parametrize("from_config", [False, True]) 51 | def test_config_filters(from_cli, from_config): 52 | import tempfile 53 | 54 | from fusesoc.config import Config 55 | 56 | if from_config: 57 | tcf = tempfile.NamedTemporaryFile(mode="w+") 58 | tcf.write("[main]\nfilters = configfilter1 configfilter2\n") 59 | tcf.seek(0) 60 | config = Config(tcf.name) 61 | else: 62 | config = Config() 63 | 64 | if from_cli: 65 | config.args_filters = ["clifilter1", "clifilter2"] 66 | 67 | expected = { 68 | (False, False): [], 69 | (False, True): ["configfilter1", "configfilter2"], 70 | (True, False): ["clifilter1", "clifilter2"], 71 | (True, True): ["configfilter1", "configfilter2", "clifilter1", "clifilter2"], 72 | } 73 | assert config.filters == expected[(from_cli, from_config)] 74 | 75 | 76 | def test_config_relative_path(): 77 | with tempfile.TemporaryDirectory() as td: 78 | config_path = os.path.join(td, "fusesoc.conf") 79 | with open(config_path, "w") as tcf: 80 | tcf.write( 81 | EXAMPLE_CONFIG.format( 82 | build_root="build_root", 83 | cache_root="cache_root", 84 | cores_root="cores_root", 85 | library_root="library_root", 86 | ) 87 | ) 88 | 89 | conf = Config(tcf.name) 90 | for name in ["build_root", "cache_root", "library_root"]: 91 | abs_td = os.path.realpath(td) 92 | assert getattr(conf, name) == os.path.join(abs_td, name) 93 | 94 | 95 | def test_config_relative_path_starts_with_dot(): 96 | with tempfile.TemporaryDirectory() as td: 97 | config_path = os.path.join(td, "fusesoc.conf") 98 | with open(config_path, "w") as tcf: 99 | tcf.write( 100 | EXAMPLE_CONFIG.format( 101 | build_root="./build_root", 102 | cache_root="./cache_root", 103 | cores_root="./cores_root", 104 | library_root="./library_root", 105 | ) 106 | ) 107 | 108 | conf = Config(tcf.name) 109 | for name in ["build_root", "cache_root", "library_root"]: 110 | abs_td = os.path.realpath(td) 111 | assert getattr(conf, name) == os.path.join(abs_td, name) 112 | 113 | 114 | def test_config_relative_path_with_local_config(): 115 | prev_dir = os.getcwd() 116 | with tempfile.TemporaryDirectory() as td: 117 | os.chdir(td) 118 | config_path = "fusesoc.conf" 119 | with open(config_path, "w") as tcf: 120 | tcf.write( 121 | EXAMPLE_CONFIG.format( 122 | build_root="build_root", 123 | cache_root="cache_root", 124 | cores_root="cores_root", 125 | library_root="library_root", 126 | ) 127 | ) 128 | 129 | conf = Config(tcf.name) 130 | for name in ["build_root", "cache_root", "library_root"]: 131 | abs_td = os.path.realpath(td) 132 | assert getattr(conf, name) == os.path.join(abs_td, name) 133 | os.chdir(prev_dir) 134 | 135 | 136 | def test_config_libraries(): 137 | tcf = tempfile.NamedTemporaryFile(mode="w+") 138 | tcf.write( 139 | EXAMPLE_CONFIG.format( 140 | build_root=build_root, 141 | cache_root=cache_root, 142 | cores_root=cores_root, 143 | library_root=library_root, 144 | ) 145 | ) 146 | tcf.seek(0) 147 | 148 | conf = Config(tcf.name) 149 | 150 | lib = None 151 | for library in conf.libraries: 152 | if library.name == "test_lib": 153 | lib = library 154 | assert lib 155 | 156 | assert lib.location == os.path.join(library_root, "test_lib") 157 | assert lib.sync_uri == "https://github.com/fusesoc/fusesoc-cores" 158 | assert not lib.auto_sync 159 | 160 | 161 | def test_config_write(): 162 | tcf = tempfile.NamedTemporaryFile(mode="w+", delete=False) 163 | tcf.write( 164 | EXAMPLE_CONFIG.format( 165 | build_root=build_root, 166 | cache_root=cache_root, 167 | cores_root=cores_root, 168 | library_root=library_root, 169 | ) 170 | ) 171 | tcf.flush() 172 | 173 | with Config(tcf.name) as c: 174 | c.build_root = "/tmp" 175 | 176 | conf = Config(tcf.name) 177 | 178 | assert conf.build_root == "/tmp" 179 | os.remove(tcf.name) 180 | -------------------------------------------------------------------------------- /tests/test_exprs.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import pytest 6 | 7 | from fusesoc.capi2.exprs import Exprs 8 | 9 | 10 | def check_parses_to(string, ast): 11 | assert Exprs(string).ast == ast 12 | 13 | 14 | def check_parse_error(string): 15 | with pytest.raises(ValueError) as err: 16 | Exprs(string) 17 | assert "Invalid syntax for string:" in str(err.value) 18 | 19 | 20 | def test_exprs(): 21 | check_parses_to("a", ["a"]) 22 | check_parses_to("a b", ["a b"]) 23 | check_parses_to("a+b", ["a+b"]) 24 | check_parses_to("a ? (b)", [(False, "a", ["b"])]) 25 | check_parses_to("a ? (b c)", [(False, "a", ["b c"])]) 26 | check_parses_to("a ? (b ? (c))", [(False, "a", [(False, "b", ["c"])])]) 27 | check_parses_to("!a ? (b)", [(True, "a", ["b"])]) 28 | check_parses_to("a b ? (c)", ["a", (False, "b", ["c"])]) 29 | check_parses_to('a"b"', ['a"b"']) 30 | 31 | check_parse_error("!a") 32 | check_parse_error("a ? b") 33 | check_parse_error("a !b") 34 | 35 | 36 | def check_expand(string, flags, expansion): 37 | assert Exprs(string).expand(flags) == expansion 38 | 39 | 40 | def test_expand(): 41 | check_expand("a", {}, "a") 42 | check_expand("a ? (b)", {}, "") 43 | check_expand("!a ? (b)", {}, "b") 44 | 45 | check_expand("a ? (b)", {"a": True}, "b") 46 | check_expand("!a ? (b)", {"a": True}, "") 47 | 48 | check_expand("a ? (b)", {"a": False}, "") 49 | check_expand("!a ? (b)", {"a": False}, "b") 50 | 51 | check_expand("mode_foo ? (a)", {"mode": "foo"}, "a") 52 | check_expand("mode_foo ? (a)", {"mode": "bar"}, "") 53 | check_expand("!mode_foo ? (a)", {"mode": "foo"}, "") 54 | check_expand("!mode_foo ? (a)", {"mode": "bar"}, "a") 55 | -------------------------------------------------------------------------------- /tests/test_ignored_dirs.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import os 6 | import tempfile 7 | 8 | from fusesoc.config import Config 9 | from fusesoc.fusesoc import Fusesoc 10 | 11 | build_root = "test_build_root" 12 | 13 | EXAMPLE_CONFIG = """ 14 | [main] 15 | ignored_dirs = B nonexistent_dir 16 | """ 17 | 18 | EXAMPLE_CORE = """\ 19 | CAPI=2: 20 | description: dummy core 21 | name: ::dummy:{version} 22 | """ 23 | 24 | 25 | def test_ignored_dirs(): 26 | """Check that ignored_dirs works in config files.""" 27 | with tempfile.TemporaryDirectory() as td: 28 | for dirname, version in [("A", "1.0"), ("B", "2.0")]: 29 | dir_path = os.path.join(td, dirname) 30 | core_path = os.path.join(dir_path, "foo.core") 31 | 32 | os.mkdir(dir_path) 33 | with open(core_path, "w") as core_file: 34 | core_file.write(EXAMPLE_CORE.format(version=version)) 35 | 36 | conf_path0 = os.path.join(td, "0.conf") 37 | with open(conf_path0, "w") as conf_file0: 38 | conf_file0.write("") 39 | 40 | conf_path1 = os.path.join(td, "1.conf") 41 | with open(conf_path1, "w") as conf_file1: 42 | conf_file1.write(EXAMPLE_CONFIG) 43 | 44 | conf0 = Config(conf_path0) 45 | assert len(conf0.ignored_dirs) == 0 46 | conf0.cores_root = td 47 | conf0.write() 48 | fs0 = Fusesoc(conf0) 49 | assert len(fs0.get_cores()) == 2 50 | 51 | conf1 = Config(conf_path1) 52 | assert len(conf1.ignored_dirs) == 2 53 | conf1.cores_root = td 54 | fs1 = Fusesoc(conf1) 55 | assert len(fs1.get_cores()) == 1 56 | -------------------------------------------------------------------------------- /tests/test_lockfile.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import os 6 | import pathlib 7 | 8 | import pytest 9 | 10 | from fusesoc.lockfile import load_lockfile 11 | 12 | 13 | def test_load_lockfile(): 14 | from fusesoc.vlnv import Vlnv 15 | 16 | lockfile = load_lockfile( 17 | pathlib.Path(__file__).parent / "lockfiles" / "works.lock.yml" 18 | ) 19 | 20 | assert lockfile == { 21 | "cores": { 22 | Vlnv(":lib:pin:0.1"): {"name": Vlnv(":lib:pin:0.1")}, 23 | Vlnv(":lib:gpio:0.1"): {"name": Vlnv(":lib:gpio:0.1")}, 24 | Vlnv(":common:gpio_ctrl:0.1"): {"name": Vlnv(":common:gpio_ctrl:0.1")}, 25 | Vlnv(":product:toppy:0.1"): {"name": Vlnv(":product:toppy:0.1")}, 26 | }, 27 | } 28 | 29 | 30 | def test_load_lockfile_duplicates(): 31 | with pytest.raises(SyntaxError): 32 | _ = load_lockfile( 33 | pathlib.Path(__file__).parent / "lockfiles" / "duplicates.lock.yml" 34 | ) 35 | -------------------------------------------------------------------------------- /tests/test_provider.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import os 6 | import shutil 7 | import tempfile 8 | 9 | import pytest 10 | from test_common import tests_dir 11 | 12 | from fusesoc.capi2.coreparser import Core2Parser 13 | from fusesoc.core import Core 14 | 15 | cores_root = os.path.join(tests_dir, "cores") 16 | 17 | 18 | def test_git_provider(): 19 | cache_root = tempfile.mkdtemp("git_") 20 | core = Core( 21 | Core2Parser(), os.path.join(cores_root, "misc", "gitcore.core"), cache_root 22 | ) 23 | 24 | core.setup() 25 | 26 | for f in [ 27 | "LICENSE", 28 | "README.md", 29 | "wb_common.core", 30 | "wb_common.v", 31 | "wb_common_params.v", 32 | ]: 33 | assert os.path.isfile(os.path.join(core.files_root, f)) 34 | 35 | 36 | def test_github_provider(): 37 | cache_root = tempfile.mkdtemp("github_") 38 | core = Core( 39 | Core2Parser(), 40 | os.path.join(cores_root, "vlog_tb_utils", "vlog_tb_utils-1.1.core"), 41 | cache_root, 42 | ) 43 | 44 | core.setup() 45 | 46 | for f in [ 47 | "LICENSE", 48 | "vlog_functions.v", 49 | "vlog_tap_generator.v", 50 | "vlog_tb_utils.core", 51 | "vlog_tb_utils.v", 52 | ]: 53 | assert os.path.isfile(os.path.join(core.files_root, f)) 54 | ref_dir = os.path.join(os.path.dirname(__file__), __name__) 55 | f = "vlog_functions.v" 56 | with open(os.path.join(ref_dir, f)) as fref, open( 57 | os.path.join(core.files_root, f) 58 | ) as fgen: 59 | assert fref.read() == fgen.read(), f 60 | 61 | 62 | @pytest.mark.skipif(shutil.which("svn") == None, reason="Subversion not installed") 63 | def test_svn_provider(): 64 | cache_root = tempfile.mkdtemp("svn_") 65 | core = Core( 66 | Core2Parser(), 67 | os.path.join(cores_root, "misc", "svn.core"), 68 | cache_root, 69 | ) 70 | 71 | core.setup() 72 | assert os.path.isfile(os.path.join(core.files_root, "gtkwave.desktop")) 73 | 74 | 75 | @pytest.mark.skip(reason="Problems connecting to OpenCores SVN") 76 | def test_opencores_provider(): 77 | cache_root = tempfile.mkdtemp("opencores_") 78 | core = Core( 79 | Core2Parser(), 80 | os.path.join(cores_root, "misc", "opencorescore.core"), 81 | cache_root, 82 | ) 83 | 84 | core.setup() 85 | 86 | assert os.path.isfile(os.path.join(core.files_root, "tap_defines.v")) 87 | assert os.path.isfile(os.path.join(core.files_root, "tap_top.v")) 88 | 89 | 90 | def test_url_provider(): 91 | cores_root = os.path.join(tests_dir, "capi2_cores", "providers") 92 | 93 | for corename in ["url_simple", "url_simple_with_user_agent", "url_tar", "url_zip"]: 94 | cache_root = tempfile.mkdtemp(prefix="url_") 95 | core = Core( 96 | Core2Parser(), os.path.join(cores_root, corename + ".core"), cache_root 97 | ) 98 | core.setup() 99 | assert os.path.isfile(os.path.join(core.files_root, "file.v")) 100 | 101 | 102 | def test_uncachable(): 103 | cores_root = os.path.join(tests_dir, "capi2_cores", "misc") 104 | cache_root = tempfile.mkdtemp("uncachable_") 105 | core = Core(Core2Parser(), os.path.join(cores_root, "uncachable.core"), cache_root) 106 | assert core.cache_status() == "outofdate" 107 | 108 | 109 | @pytest.mark.skip(reason="Problems connecting to OpenCores SVN") 110 | def test_cachable(): 111 | cache_root = tempfile.mkdtemp("opencores_") 112 | core = Core( 113 | Core2Parser(), 114 | os.path.join(cores_root, "misc", "opencorescore.core"), 115 | cache_root, 116 | ) 117 | assert core.cache_status() == "empty" 118 | core.setup() 119 | assert core.cache_status() == "downloaded" 120 | -------------------------------------------------------------------------------- /tests/test_provider/file.tar.gz: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/test_provider/file.tar.gz -------------------------------------------------------------------------------- /tests/test_provider/file.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/test_provider/file.v -------------------------------------------------------------------------------- /tests/test_provider/file.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/olofk/fusesoc/0f9d12899407a02bae22f249efd434cfd1065df5/tests/test_provider/file.zip -------------------------------------------------------------------------------- /tests/test_provider/vlog_functions.v: -------------------------------------------------------------------------------- 1 | /* 2 | * Utility functions for verilog testbenches 3 | * 4 | * Copyright (C) 2016 Olof Kindgren 5 | * 6 | * Permission to use, copy, modify, and/or distribute this software for any 7 | * purpose with or without fee is hereby granted, provided that the above 8 | * copyright notice and this permission notice appear in all copies. 9 | * 10 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 | */ 18 | 19 | //I have been patched 20 | module vlog_functions; 21 | 22 | task progress_bar; 23 | input [8*32:1] msg; 24 | input integer current; 25 | input integer total; 26 | begin 27 | if(!(current%(total/10))) 28 | $display("%0s %0d/%0d", msg, current, total); 29 | end 30 | endtask 31 | 32 | endmodule 33 | 34 | -------------------------------------------------------------------------------- /tests/test_vlnv.py: -------------------------------------------------------------------------------- 1 | # Copyright FuseSoC contributors 2 | # Licensed under the 2-Clause BSD License, see LICENSE for details. 3 | # SPDX-License-Identifier: BSD-2-Clause 4 | 5 | import pytest 6 | 7 | from fusesoc.vlnv import Vlnv, compare_relation 8 | 9 | 10 | def vlnv_tuple(vlnv): 11 | return (vlnv.vendor, vlnv.library, vlnv.name, vlnv.version, vlnv.revision) 12 | 13 | 14 | # VLNV tests without revision 15 | def test_full_vlnv(): 16 | assert vlnv_tuple(Vlnv("librecores.org:peripherals:uart16550:1.5")) == ( 17 | "librecores.org", 18 | "peripherals", 19 | "uart16550", 20 | "1.5", 21 | 0, 22 | ) 23 | 24 | 25 | def test_full_vlnv_no_version(): 26 | assert vlnv_tuple(Vlnv("librecores.org:peripherals:uart16550")) == ( 27 | "librecores.org", 28 | "peripherals", 29 | "uart16550", 30 | "0", 31 | 0, 32 | ) 33 | 34 | 35 | def test_name_only_vlnv(): 36 | assert vlnv_tuple(Vlnv("::uart16550")) == ("", "", "uart16550", "0", 0) 37 | assert vlnv_tuple(Vlnv("::uart16550:")) == ("", "", "uart16550", "0", 0) 38 | 39 | 40 | def test_name_version_vlnv(): 41 | assert vlnv_tuple(Vlnv("::uart16550:1.5")) == ("", "", "uart16550", "1.5", 0) 42 | 43 | 44 | # VLNV tests with revision 45 | def test_full_vlnv_revision(): 46 | assert vlnv_tuple(Vlnv("librecores.org:peripherals:uart16550:1.5-r5")) == ( 47 | "librecores.org", 48 | "peripherals", 49 | "uart16550", 50 | "1.5", 51 | 5, 52 | ) 53 | 54 | 55 | def test_name_only_vlnv_revision(): 56 | assert vlnv_tuple(Vlnv("::uart16550")) == ("", "", "uart16550", "0", 0) 57 | assert vlnv_tuple(Vlnv("::uart16550:")) == ("", "", "uart16550", "0", 0) 58 | 59 | 60 | # Tests for legacy naming scheme 61 | def test_name_version_legacy(): 62 | assert vlnv_tuple(Vlnv("uart16550-1.5")) == ("", "", "uart16550", "1.5", 0) 63 | 64 | 65 | def test_name_with_dash_version_legacy(): 66 | assert vlnv_tuple(Vlnv("wb-axi-1.5")) == ("", "", "wb-axi", "1.5", 0) 67 | 68 | 69 | def test_name_only_legacy(): 70 | assert vlnv_tuple(Vlnv("uart16550")) == ("", "", "uart16550", "0", 0) 71 | 72 | 73 | def test_name_with_dash_only_legacy(): 74 | assert vlnv_tuple(Vlnv("wb-axi")) == ("", "", "wb-axi", "0", 0) 75 | 76 | 77 | def test_name_version_revision_legacy(): 78 | assert vlnv_tuple(Vlnv("uart16550-1.5-r2")) == ("", "", "uart16550", "1.5", 2) 79 | 80 | 81 | def test_name_revision_legacy(): 82 | assert vlnv_tuple(Vlnv("uart16550-r2")) == ("", "", "uart16550", "0", 2) 83 | 84 | 85 | def test_vlvn_compare_relation(): 86 | version_1_3 = Vlnv(":peripherals:uart16550:1.3.1") 87 | version_1_4 = Vlnv(":peripherals:uart16550:1.4.2") 88 | version_1_5 = Vlnv(":peripherals:uart16550:1.5.1") 89 | version_2_0 = Vlnv(":peripherals:uart16550:2.0.1") 90 | 91 | assert compare_relation(version_1_4, "==", version_1_4) 92 | assert not compare_relation( 93 | version_1_4, "==", Vlnv("other:peripherals:uart16550:1.4.2") 94 | ) 95 | assert not compare_relation(version_1_4, "==", Vlnv(":other:uart16550:1.4.2")) 96 | assert not compare_relation(version_1_4, "==", Vlnv(":peripherals:other:1.4.2")) 97 | assert not compare_relation(version_1_4, "==", version_1_3) 98 | assert not compare_relation(version_1_4, "==", version_1_5) 99 | assert not compare_relation(version_1_4, "==", version_2_0) 100 | 101 | assert compare_relation(version_1_4, ">", version_1_3) 102 | assert not compare_relation(version_1_4, ">", version_1_4) 103 | assert not compare_relation(version_1_4, ">", version_1_5) 104 | assert not compare_relation(version_1_4, ">", version_2_0) 105 | 106 | assert compare_relation(version_1_4, ">=", version_1_3) 107 | assert compare_relation(version_1_4, ">=", version_1_4) 108 | assert not compare_relation(version_1_4, ">=", version_1_5) 109 | assert not compare_relation(version_1_4, ">=", version_2_0) 110 | 111 | assert not compare_relation(version_1_4, "<", version_1_3) 112 | assert not compare_relation(version_1_4, "<", version_1_4) 113 | assert compare_relation(version_1_4, "<", version_1_5) 114 | assert compare_relation(version_1_4, "<", version_2_0) 115 | 116 | assert not compare_relation(version_1_4, "<=", version_1_3) 117 | assert compare_relation(version_1_4, "<=", version_1_4) 118 | assert compare_relation(version_1_4, "<=", version_1_5) 119 | assert compare_relation(version_1_4, "<=", version_2_0) 120 | 121 | assert not compare_relation(version_1_4, "^", version_1_3) 122 | assert compare_relation(version_1_4, "^", version_1_4) 123 | assert compare_relation(version_1_4, "^", version_1_5) 124 | assert not compare_relation(version_1_4, "^", version_2_0) 125 | 126 | assert not compare_relation(version_1_4, "~", version_1_3) 127 | assert compare_relation(version_1_4, "~", version_1_4) 128 | assert compare_relation(version_1_4, "~", Vlnv(":peripherals:uart16550:1.4.9")) 129 | assert not compare_relation(version_1_4, "~", version_1_5) 130 | assert not compare_relation(version_1_4, "~", version_2_0) 131 | -------------------------------------------------------------------------------- /tests/userguide/blinky/blinky.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | name: fusesoc:examples:blinky:1.0.0 3 | description: Blinky, a FuseSoC example core 4 | 5 | filesets: 6 | rtl: 7 | files: 8 | - rtl/blinky.sv 9 | - rtl/macros.svh: 10 | is_include_file: true 11 | file_type: systemVerilogSource 12 | 13 | tb: 14 | files: 15 | - tb/blinky_tb.sv 16 | file_type: systemVerilogSource 17 | 18 | nexys_video: 19 | files: 20 | # YAML short form, see rtl/macros.svh above for the longer form. 21 | - data/nexys_video.xdc: {file_type: xdc} 22 | 23 | targets: 24 | # The "default" target is special in FuseSoC and used in dependencies. 25 | # The "&default" is a YAML anchor referenced later. 26 | default: &default 27 | filesets: 28 | - rtl 29 | toplevel: blinky 30 | parameters: 31 | - clk_freq_hz 32 | 33 | # The "sim" target simulates the design. (It could have any name.) 34 | sim: 35 | # Copy all key/value pairs from the "default" target. 36 | <<: *default 37 | description: Simulate the design 38 | default_tool: icarus 39 | filesets_append: 40 | - tb 41 | toplevel: blinky_tb 42 | tools: 43 | icarus: 44 | iverilog_options: 45 | - -g2012 # Use SystemVerilog-2012 46 | modelsim: 47 | vlog_options: 48 | - -timescale=1ns/1ns 49 | parameters: 50 | - pulses=10 51 | 52 | # The "synth" target synthesizes the design. (It could have any name.) 53 | synth: 54 | <<: *default 55 | description: Synthesize the design for a Nexys Video FPGA board 56 | default_tool: vivado 57 | filesets_append: 58 | - nexys_video 59 | tools: 60 | vivado: 61 | part: xc7a200tsbg484-1 62 | parameters: 63 | - clk_freq_hz=100000000 64 | 65 | parameters: 66 | clk_freq_hz: 67 | datatype : int 68 | description : Frequency of the board clock, in Hz 69 | paramtype : vlogparam 70 | pulses: 71 | datatype : int 72 | description : Number of pulses to run in testbench 73 | paramtype : vlogparam 74 | -------------------------------------------------------------------------------- /tests/userguide/blinky/data/nexys_video.xdc: -------------------------------------------------------------------------------- 1 | ## Clock Signal 2 | set_property -dict { PACKAGE_PIN R4 IOSTANDARD LVCMOS33 } [get_ports { clk }]; #IO_L13P_T2_MRCC_34 Sch=sysclk 3 | create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk] 4 | 5 | ## LED 6 | set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS25 } [get_ports { q }]; #IO_L15P_T2_DQS_13 Sch=led[0] 7 | 8 | ## Buttons 9 | set_property -dict { PACKAGE_PIN G4 IOSTANDARD LVCMOS15 } [get_ports { rst_n }]; #IO_L12N_T1_MRCC_35 Sch=cpu_resetn 10 | -------------------------------------------------------------------------------- /tests/userguide/blinky/rtl/blinky.sv: -------------------------------------------------------------------------------- 1 | // This file is public domain, it can be freely copied without restrictions. 2 | // SPDX-License-Identifier: CC0-1.0 3 | 4 | `include "macros.svh" 5 | 6 | /** 7 | * Blink the output |q| with a 1 second pulse. 8 | */ 9 | module blinky 10 | #( 11 | parameter clk_freq_hz = 1_000_000_000 12 | ) ( 13 | input clk, 14 | input rst_n, 15 | output logic q 16 | ); 17 | 18 | logic [`CLOG2(clk_freq_hz)-1:0] count; 19 | 20 | always_ff @(posedge clk) begin 21 | if (~rst_n) begin 22 | count <= 'd0; 23 | q <= 1'b0; 24 | end else begin 25 | if (count == clk_freq_hz - 1) begin 26 | q <= ~q; 27 | count <= 'd0; 28 | end else begin 29 | count <= count + 'd1; 30 | end 31 | end 32 | end 33 | 34 | endmodule 35 | -------------------------------------------------------------------------------- /tests/userguide/blinky/rtl/macros.svh: -------------------------------------------------------------------------------- 1 | // This file is public domain, it can be freely copied without restrictions. 2 | // SPDX-License-Identifier: CC0-1.0 3 | 4 | `define CLOG2(__value) $clog2(__value) 5 | -------------------------------------------------------------------------------- /tests/userguide/blinky/tb/blinky_tb.sv: -------------------------------------------------------------------------------- 1 | // This file is public domain, it can be freely copied without restrictions. 2 | // SPDX-License-Identifier: CC0-1.0 3 | 4 | `timescale 1ns / 1ns 5 | 6 | module blinky_tb; 7 | parameter clk_freq_hz = 50_000; 8 | parameter pulses = 5; 9 | 10 | localparam clk_half_period = 1_000_000_000 / clk_freq_hz / 2; 11 | 12 | logic clk = 1'b1; 13 | logic rst_n = 1'b1; 14 | logic led; 15 | 16 | blinky #( 17 | .clk_freq_hz(clk_freq_hz) 18 | ) u_dut ( 19 | .clk, 20 | .rst_n, 21 | .q (led) 22 | ); 23 | 24 | always #clk_half_period clk <= ~clk; 25 | 26 | time last_edge = 0; 27 | 28 | initial begin 29 | rst_n = 1'b0; 30 | @(posedge clk); 31 | @(posedge clk); 32 | rst_n = 1'b1; 33 | 34 | @(posedge clk); 35 | 36 | for (int i = 0; i < pulses; i = i + 1) begin 37 | @(led); 38 | last_edge = $time; 39 | 40 | @(led); 41 | if (($time - last_edge) != 1_000_000_000) begin 42 | $display("Error! Length of pulse was %0d ns, expected 1 s.", $time - last_edge); 43 | $finish; 44 | end else begin 45 | $display("Pulse %0d/%0d OK!", i + 1, pulses); 46 | end 47 | end 48 | 49 | $display("Testbench finished OK"); 50 | $finish; 51 | end 52 | endmodule 53 | -------------------------------------------------------------------------------- /tests/userguide/dualblinky/data/nexys_video.xdc: -------------------------------------------------------------------------------- 1 | ## Clock Signal 2 | set_property -dict { PACKAGE_PIN R4 IOSTANDARD LVCMOS33 } [get_ports { clk }]; #IO_L13P_T2_MRCC_34 Sch=sysclk 3 | create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk] 4 | 5 | ## LED 6 | set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS25 } [get_ports { q[0] }]; #IO_L15P_T2_DQS_13 Sch=led[0] 7 | set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS25 } [get_ports { q[1] }]; #IO_L15N_T2_DQS_13 Sch=led[1] 8 | 9 | ## Buttons 10 | set_property -dict { PACKAGE_PIN G4 IOSTANDARD LVCMOS15 } [get_ports { rst_n }]; #IO_L12N_T1_MRCC_35 Sch=cpu_resetn 11 | -------------------------------------------------------------------------------- /tests/userguide/dualblinky/dualblinky.core: -------------------------------------------------------------------------------- 1 | CAPI=2: 2 | name: fusesoc:examples:dualblinky:1.0.0 3 | description: DualBlinky, a FuseSoC example with dependencies 4 | 5 | filesets: 6 | rtl: 7 | files: 8 | - rtl/dualblinky.sv 9 | file_type: systemVerilogSource 10 | depend: 11 | - fusesoc:examples:blinky 12 | 13 | nexys_video: 14 | files: 15 | - data/nexys_video.xdc: 16 | file_type: xdc 17 | 18 | targets: 19 | default: &default 20 | filesets: 21 | - rtl 22 | toplevel: dualblinky 23 | 24 | synth: 25 | <<: *default 26 | description: Synthesize the design for a Nexys Video FPGA board 27 | default_tool: vivado 28 | filesets_append: 29 | - nexys_video 30 | tools: 31 | vivado: 32 | part: xc7a200tsbg484-1 33 | parameters: 34 | clk_freq_hz: 100000000 35 | 36 | parameters: 37 | clk_freq_hz: 38 | datatype: int 39 | description: Frequency of the board clock, in Hz 40 | paramtype: vlogparam 41 | -------------------------------------------------------------------------------- /tests/userguide/dualblinky/rtl/dualblinky.sv: -------------------------------------------------------------------------------- 1 | // This file is public domain, it can be freely copied without restrictions. 2 | // SPDX-License-Identifier: CC0-1.0 3 | 4 | `include "macros.svh" 5 | 6 | /** 7 | * Blink two outputs q[0] and q[1]. 8 | * 9 | * q[1] will blink twice as fast q[0]. 10 | */ 11 | module dualblinky 12 | #( 13 | parameter clk_freq_hz = 1_000_000_000 14 | ) ( 15 | input clk, 16 | input rst_n, 17 | output logic [1:0] q 18 | ); 19 | 20 | // Instantiate the blinky module twice. 21 | 22 | blinky #( 23 | .clk_freq_hz(clk_freq_hz) 24 | ) u_blinky0 ( 25 | .clk, 26 | .rst_n, 27 | .q (q[0]) 28 | ); 29 | 30 | blinky #( 31 | .clk_freq_hz(clk_freq_hz / 2) // Blink LED 1 twice as fast as LED 0. 32 | ) u_blinky1 ( 33 | .clk, 34 | .rst_n, 35 | .q (q[1]) 36 | ); 37 | 38 | endmodule 39 | -------------------------------------------------------------------------------- /tox.ini: -------------------------------------------------------------------------------- 1 | [tox] 2 | envlist = py3 3 | 4 | [testenv] 5 | # Dependencies prefixed with "ci: " are only installed when running in CI, 6 | # which calls effectively "tox -e py3-ci" (see the gh-actions section below). 7 | deps = 8 | pytest 9 | ci: pytest-github-actions-annotate-failures 10 | 11 | # Some tests need an initialized FuseSoC library to be present. To make tests 12 | # reproducible tox doesn't use the library installed into the user's home 13 | # directory, but creates an isolated home directory within the tox working 14 | # directory, and clears it out after each test. 15 | commands = 16 | python -c "import os, shutil, pathlib, uuid; path = pathlib.Path(os.environ['XDG_CACHE_HOME']).parent; path.exists() or exit(); new = path.rename(path.parent / str(uuid.uuid4())); shutil.rmtree(str(new), ignore_errors=True)" 17 | 18 | fusesoc --verbose library add --global fusesoc_cores https://github.com/fusesoc/fusesoc-cores 19 | fusesoc list-cores 20 | fusesoc library update 21 | pytest {posargs:-vv} 22 | 23 | setenv = 24 | MODEL_TECH = dummy_value 25 | XDG_CACHE_HOME = {toxworkdir}/.tmp/homedir/.cache 26 | XDG_DATA_HOME= {toxworkdir}/.tmp/homedir/.local/share 27 | XDG_CONFIG_HOME = {toxworkdir}/.tmp/homedir/.config 28 | 29 | passenv = 30 | GITHUB_ACTIONS 31 | 32 | 33 | [testenv:doc] 34 | # Note: this target is *not* used by ReadTheDocs, which runs sphinx-build 35 | # directly. Hence, all special build steps here are only relevant for 36 | # local builds, not for RTD builds. Add all build steps which should be executed 37 | # in RTD builds as Python code into the conf.py file. 38 | description = Build the HTML documentation with Sphinx 39 | deps = -rdoc/requirements.txt 40 | commands = 41 | sphinx-build \ 42 | --color \ 43 | -bhtml \ 44 | -d "{toxworkdir}/docs_doctree" \ 45 | doc/source \ 46 | "{toxworkdir}/docs_out" \ 47 | {posargs} 48 | python -c 'import pathlib; print("The HTML documentation is available at file://\{0\}".format(pathlib.Path(r"{toxworkdir}") / "docs_out" / "index.html"))' 49 | 50 | [testenv:doc-autobuild] 51 | description = Automatically (re-)build the HTML documentation with Sphinx 52 | deps = 53 | -rdoc/requirements.txt 54 | sphinx-autobuild 55 | myst_parser 56 | jsonschema2md 57 | commands = 58 | # capi2.md is generated during the documentation build and would 59 | # immediately re-trigger a build. We ignore the generated file, and instead 60 | # watch the primary source of information for the generated file. 61 | sphinx-autobuild \ 62 | --open-browser \ 63 | -d "{toxworkdir}/docs_doctree" \ 64 | --ignore "*/doc/source/ref/capi2.md" \ 65 | --watch "fusesoc/capi2" \ 66 | doc/source \ 67 | "{toxworkdir}/docs_out" \ 68 | {posargs} 69 | 70 | # XXX: This setting is currently overwritten on the command line for CI builds 71 | # (see the pipeline configuration) due to 72 | # https://github.com/ymyzk/tox-gh-actions/issues/44. 73 | #[gh-actions] 74 | # Mapping between the Python version used in GitHub Actions matrix builds, and 75 | # the used Tox environment. 76 | #python = 77 | # 3.6: py3-ci 78 | # 3.7: py3-ci 79 | # 3.8: py3-ci 80 | # 3.9: py3-ci 81 | --------------------------------------------------------------------------------