├── OSSIADF7012Beacon
├── .ccsproject
├── .cproject
├── .gitignore
├── .project
├── .settings
│ ├── org.eclipse.cdt.codan.core.prefs
│ ├── org.eclipse.cdt.debug.core.prefs
│ └── org.eclipse.core.resources.prefs
├── MSP430F2132.ccxml
├── aclkuart.c
├── aclkuart.h
├── adf7012.c
├── adf7012.h
├── gps.c
├── gps.h
├── i2c.c
├── i2c.h
├── lnk_msp430f2132.cmd
├── main.c
├── morse.c
├── morse.h
├── ossibeacon.h
├── ossitypes.h
├── printf.c
├── printf.h
├── system.c
├── system.h
├── util.c
└── util.h
├── README.md
├── beacon
└── main.c
├── comms
└── main.c
├── lib
├── 24lc256.c
├── 24lc256.h
├── adc.c
├── adc.h
├── adf7020.c
├── adf7020.h
├── adf7021n.c
├── adf7021n.h
├── config.h
├── global.h
├── i2c.c
├── i2c.h
├── morse.c
├── morse.h
├── payload.h
├── pca9548a.c
├── pca9548a.h
├── tmp10x.c
├── tmp10x.h
└── uart.c
├── obc
├── blink.c
├── i2c_payload.c
├── i2c_payload.h
├── main.c
└── watchdog.c
├── payload
└── main.c
├── test
├── LightScheduler.c
├── eeprom_test_ok.c
├── hardware.c
├── send.c
└── tests.c
├── tmp10x.c
└── tmp10x.h
/OSSIADF7012Beacon/.ccsproject:
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/OSSIADF7012Beacon/.cproject:
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/OSSIADF7012Beacon/.gitignore:
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1 | #Ignore Temporary Files#
2 | #################
3 | *.?#?
4 |
5 | Debug/
6 | Release/
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/OSSIADF7012Beacon/.project:
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1 |
2 |
3 | OSSIADF7012Beacon
4 |
5 |
6 |
7 |
8 |
9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder
10 |
11 |
12 | ?name?
13 |
14 |
15 |
16 | org.eclipse.cdt.make.core.append_environment
17 | true
18 |
19 |
20 | org.eclipse.cdt.make.core.autoBuildTarget
21 | all
22 |
23 |
24 | org.eclipse.cdt.make.core.buildArguments
25 | -k
26 |
27 |
28 | org.eclipse.cdt.make.core.buildCommand
29 | ${CCS_UTILS_DIR}/bin/gmake
30 |
31 |
32 | org.eclipse.cdt.make.core.buildLocation
33 | ${BuildDirectory}
34 |
35 |
36 | org.eclipse.cdt.make.core.cleanBuildTarget
37 | clean
38 |
39 |
40 | org.eclipse.cdt.make.core.contents
41 | org.eclipse.cdt.make.core.activeConfigSettings
42 |
43 |
44 | org.eclipse.cdt.make.core.enableAutoBuild
45 | true
46 |
47 |
48 | org.eclipse.cdt.make.core.enableCleanBuild
49 | true
50 |
51 |
52 | org.eclipse.cdt.make.core.enableFullBuild
53 | true
54 |
55 |
56 | org.eclipse.cdt.make.core.fullBuildTarget
57 | all
58 |
59 |
60 | org.eclipse.cdt.make.core.stopOnError
61 | false
62 |
63 |
64 | org.eclipse.cdt.make.core.useDefaultBuildCmd
65 | true
66 |
67 |
68 |
69 |
70 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
71 | full,incremental,
72 |
73 |
74 |
75 |
76 |
77 | com.ti.ccstudio.core.ccsNature
78 | org.eclipse.cdt.core.cnature
79 | org.eclipse.cdt.managedbuilder.core.managedBuildNature
80 | org.eclipse.cdt.core.ccnature
81 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
82 |
83 |
84 |
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/OSSIADF7012Beacon/.settings/org.eclipse.cdt.codan.core.prefs:
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1 | #Sun Dec 16 15:57:07 KST 2012
2 | eclipse.preferences.version=1
3 | inEditor=false
4 | onBuild=false
5 |
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/OSSIADF7012Beacon/.settings/org.eclipse.cdt.debug.core.prefs:
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1 | #Sun Dec 16 15:57:08 KST 2012
2 | eclipse.preferences.version=1
3 | org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker
4 |
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/OSSIADF7012Beacon/.settings/org.eclipse.core.resources.prefs:
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1 | #Fri Dec 21 17:18:54 KST 2012
2 | eclipse.preferences.version=1
3 | encoding//Debug/makefile=UTF-8
4 | encoding//Debug/objects.mk=UTF-8
5 | encoding//Debug/sources.mk=UTF-8
6 | encoding//Debug/subdir_rules.mk=UTF-8
7 | encoding//Debug/subdir_vars.mk=UTF-8
8 | encoding//Release/makefile=UTF-8
9 | encoding//Release/objects.mk=UTF-8
10 | encoding//Release/sources.mk=UTF-8
11 | encoding//Release/subdir_rules.mk=UTF-8
12 | encoding//Release/subdir_vars.mk=UTF-8
13 | encoding/adf7012.c=UTF-8
14 | encoding/main.c=UTF-8
15 |
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/OSSIADF7012Beacon/MSP430F2132.ccxml:
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/OSSIADF7012Beacon/aclkuart.c:
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1 | /*
2 | * aclkuart.c
3 | *
4 | * Created on: 2012. 12. 19.
5 | * Author: OSSI
6 | */
7 |
8 | #include "aclkuart.h"
9 | static volatile uint8_t uart_rx_flag = 0;
10 | static volatile uint8_t rx_byte = '\0';
11 |
12 | // Low-Frequency Baud Rate Mode
13 | // read chapter 15.3.10 of msp430x2xxx user's guide for baud rate generation
14 | void uart_setup_9600(void)
15 | {
16 | P3SEL = 0x30; // P3.4,5 = USCI_A0 TXD/RXD, No need to set IO direction
17 | UCA0CTL1 |= UCSSEL_1; // CLK = ACLK
18 | UCA0BR0 = 0x03; // 3 = INT(3.41), 32.768kHz/9600 = 3.41
19 | UCA0BR1 = 0x00; //
20 | UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 = round(0.41 * 8)
21 | UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
22 | }
23 |
24 | void uart_setup_4800(void)
25 | {
26 | P3SEL = 0x30; // P3.4,5 = USCI_A0 TXD/RXD, No need to set IO direction
27 | UCA0CTL1 |= UCSSEL_1; // CLK = ACLK
28 | UCA0BR0 = 0x06; // 6 = INT(6.83), 32.768kHz/4800 = 6.83
29 | UCA0BR1 = 0x00; //
30 | UCA0MCTL = UCBRS2 + UCBRS1 + UCBRS0; // Modulation UCBRSx = 7 = round(0.83 * 8)
31 | UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
32 | }
33 |
34 | void uart_init(void)
35 | {
36 | IE2 |= UCA0RXIE; // default: Enable USCI_A0 RX interrupt
37 | IE2 &= ~UCA0TXIE; // default: Disable USCI_A0 TX interrupt
38 | }
39 |
40 | void i2c_set_rxFlag(void)
41 | {
42 |
43 | }
44 |
45 | void i2c_clear_rxFlag(void)
46 | {
47 |
48 | }
49 |
50 | uint8_t i2c_rx_ready(void)
51 | {
52 | return 0;
53 | }
54 |
55 | void uart_set_rxFlag(void)
56 | {
57 | uart_rx_flag = 1;
58 | }
59 |
60 | void uart_clear_rxFlag(void)
61 | {
62 | uart_rx_flag = 0;
63 | }
64 |
65 | uint8_t uart_rx_ready(void)
66 | {
67 | if(uart_rx_flag)
68 | {
69 | return 1;
70 | }
71 | else
72 | {
73 | return 0;
74 | }
75 | }
76 |
77 | uint8_t uart_get_byte(void)
78 | {
79 | // return only you have available data from uart, NOT i2c
80 |
81 | return rx_byte;
82 | }
83 |
84 |
85 | /**
86 | * Sends a single byte out through UART
87 | **/
88 | void uart_send_byte(unsigned char byte)
89 | {
90 |
91 | while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? //TODO: change this to avoid infinite loop!!!!!
92 | UCA0TXBUF = byte; // TX -> RXed character
93 |
94 | }
95 |
96 | void puts(char *s) {
97 | char c;
98 |
99 | // Loops through each character in string 's'
100 | while (c = *s++) {
101 | uart_send_byte(c);
102 | }
103 | }
104 | /**
105 | * puts() is used by printf() to display or send a character. This function
106 | * determines where printf prints to. For this case it sends a character
107 | * out over UART.
108 | **/
109 | void putc(unsigned b) {
110 | uart_send_byte(b);
111 | }
112 |
113 |
114 | // USCI A0/B0 Transmit ISR
115 | #pragma vector=USCIAB0TX_VECTOR
116 | __interrupt void USCI0TX_ISR(void)
117 | {
118 | IE2 &= ~UCA0TXIE; // Disable USCI_A0 TX interrupt
119 | }
120 |
121 | // USCI A0/B0 Receive ISR
122 | #pragma vector=USCIAB0RX_VECTOR
123 | __interrupt void USCI0RX_ISR(void)
124 | {
125 | // TODO: I2C and UART handle at the same time
126 | rx_byte = UCA0RXBUF; // Get the received character
127 |
128 | // gps (uart)
129 | uart_set_rxFlag();
130 | __bic_SR_register_on_exit(LPM3_bits);
131 |
132 |
133 | }
134 |
135 |
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/OSSIADF7012Beacon/aclkuart.h:
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1 | /*
2 | * aclkuart.h
3 | *
4 | * Created on: 2012. 12. 19.
5 | * Author: OSSI
6 | */
7 |
8 | #ifndef ACLKUART_H_
9 | #define ACLKUART_H_
10 |
11 | #include "ossibeacon.h"
12 |
13 | void uart_setup_4800(void);
14 | void uart_setup_9600(void);
15 | void uart_init(void);
16 |
17 | void uart_set_rxFlag(void);
18 | void uart_clear_rxFlag(void);
19 | uint8_t uart_rx_ready(void);
20 |
21 | void i2c_set_rxFlag(void);
22 | void i2c_clear_rxFlag(void);
23 | uint8_t i2c_rx_ready(void);
24 |
25 | uint8_t uart_get_byte(void);
26 |
27 | void putc(unsigned);
28 | void puts(char *);
29 |
30 |
31 |
32 |
33 | #endif /* ACLKUART_H_ */
34 |
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/OSSIADF7012Beacon/adf7012.c:
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1 | /*
2 | * adf7012.c
3 | *
4 | * Created on: 2012. 12. 19.
5 | * Author: OSSI
6 | */
7 |
8 | #include "adf7012.h"
9 |
10 | static volatile uint8_t vco_bias;
11 | static volatile uint8_t vco_adj;
12 |
13 | struct {
14 | struct {
15 | uint16_t frequency_error_correction;
16 | uint8_t r_divider;
17 | uint8_t crystal_doubler;
18 | uint8_t crystal_oscillator_disable;
19 | uint8_t clock_out_divider;
20 | uint8_t vco_adjust;
21 | uint8_t output_divider;
22 | } r0;
23 |
24 | struct {
25 | unsigned int fractional_n;
26 | uint8_t integer_n;
27 | uint8_t prescaler;
28 | } r1;
29 |
30 | struct {
31 | uint8_t mod_control;
32 | uint8_t gook;
33 | uint8_t power_amplifier_level;
34 | uint16_t modulation_deviation;
35 | uint8_t gfsk_modulation_control;
36 | uint8_t index_counter;
37 | } r2;
38 |
39 | struct {
40 | uint8_t pll_enable;
41 | uint8_t pa_enable;
42 | uint8_t clkout_enable;
43 | uint8_t data_invert;
44 | uint8_t charge_pump_current;
45 | uint8_t bleed_up;
46 | uint8_t bleed_down;
47 | uint8_t vco_disable;
48 | uint8_t muxout;
49 | uint8_t ld_precision;
50 | uint8_t vco_bias;
51 | uint8_t pa_bias;
52 | uint8_t pll_test_mode;
53 | uint8_t sd_test_mode;
54 | } r3;
55 | } adf_config;
56 |
57 | void ADF7012_setup(void)
58 | {
59 | // port init
60 | IO_DIRECTION(TXDATA, OUTPUT);
61 | //IO_DIRECTION(TXCLK, INPUT); // TODO: for GOOK modulation
62 | IO_DIRECTION(SCLK,OUTPUT);
63 | IO_DIRECTION(SDATA,OUTPUT);
64 | IO_DIRECTION(SLE,OUTPUT);
65 | IO_DIRECTION(CE,OUTPUT);
66 | IO_DIRECTION(PAON,OUTPUT);
67 | IO_DIRECTION(MUXOUT,INPUT);
68 |
69 | // default pin state
70 | IO_SET(PAON, LOW);
71 | IO_SET(TXDATA, LOW);
72 | IO_SET(SCLK, LOW);
73 | IO_SET(SDATA, LOW);
74 | IO_SET(SLE, LOW);
75 | IO_SET(CE, LOW);
76 | }
77 |
78 | void ADF7012_init(void)
79 | {
80 | // default pin state
81 | IO_SET(PAON, LOW);
82 | IO_SET(TXDATA, LOW);
83 | IO_SET(SCLK, LOW);
84 | IO_SET(SDATA, LOW);
85 | IO_SET(SLE, LOW);
86 | IO_SET(CE, LOW);
87 |
88 | // configure timer interrupt
89 | }
90 |
91 | void byte_write(unsigned char _register)
92 | {
93 | volatile int i;
94 |
95 | for(i = 7; i >= 0; i--)
96 | {
97 | IO_SET(SCLK, LOW);
98 | if(_register & (1<> 24-(i*8)) & 0xff;
126 | byte_write(_register);
127 | }
128 | // SLE
129 | __delay_cycles(10);
130 | IO_SET(SLE, HIGH);
131 |
132 | IO_SET(SDATA, LOW); // SDATA low
133 | //IO_SET(SLE, LOW);
134 | __delay_cycles(30);
135 |
136 | }
137 |
138 |
139 | void ADF7012_init_register_zero(void) {
140 | adf_config.r0.frequency_error_correction = 0; // Don't bother for now...
141 | adf_config.r0.r_divider = 5; // Whatever works best for 2m, 1.25m and 70 cm ham bands
142 | adf_config.r0.crystal_doubler = 0; // Who would want that? Lower f_pfd means finer channel steps.
143 | adf_config.r0.crystal_oscillator_disable = 0; // Disable internal crystal oscillator because we have an external VCXO
144 | adf_config.r0.clock_out_divider = 1; // Don't bother for now...
145 | adf_config.r0.vco_adjust = 0; // Don't bother for now... (Will be automatically adjusted until PLL lock is achieved)
146 | adf_config.r0.output_divider = ADF_OUTPUT_DIVIDER_BY_4; // Pre-set div 4 for 2m. Will be changed according tx frequency on the fly
147 | }
148 |
149 | void ADF7012_init_register_one(void) {
150 | adf_config.r1.integer_n = 37; // Pre-set for 144.390 MHz APRS. Will be changed according tx frequency on the fly
151 | adf_config.r1.fractional_n = 4074; // Pre-set for 144.390 MHz APRS. Will be changed according tx frequency on the fly
152 | adf_config.r1.prescaler = 0; // 8/9 requires an integer_n > 91; 4/5 only requires integer_n > 31
153 | }
154 |
155 | void ADF7012_init_register_two(void) {
156 | adf_config.r2.mod_control = ADF_MODULATION_OOK; // For AFSK the modulation is done through the external VCXO we don't want any FM generated by the ADF7012 itself
157 | adf_config.r2.gook = 0; // Whatever... This might give us a nicer swing in phase maybe...
158 | adf_config.r2.power_amplifier_level = 0; // Start PA power from 0. Output −20dBm at 0x0, and 13 dBm at 0x7E at 868 MHz
159 |
160 | adf_config.r2.modulation_deviation = 0; // 16 is about half maximum amplitude @ ASK.
161 | adf_config.r2.gfsk_modulation_control = 0; // Don't bother for now...
162 | adf_config.r2.index_counter = 0; // Don't bother for now...
163 | }
164 |
165 | void ADF7012_init_register_three(void) {
166 | adf_config.r3.pll_enable = 0; // Switch off PLL (will be switched on after Ureg is checked and confirmed ok)
167 | adf_config.r3.pa_enable = 0; // Switch off PA (will be switched on when PLL lock is confirmed)
168 | adf_config.r3.clkout_enable = 0; // No clock output needed at the moment
169 | adf_config.r3.data_invert = 0; // Results in a TX signal when TXDATA input is low
170 | adf_config.r3.charge_pump_current = ADF_CP_CURRENT_1_5; //ADF_CP_CURRENT_0_3; //ADF_CP_CURRENT_2_1; // 2.1 mA. This is the maximum
171 | adf_config.r3.bleed_up = 0; // Don't worry, be happy...
172 | adf_config.r3.bleed_down = 0; // Dito
173 | adf_config.r3.vco_disable = 0; // VCO is on
174 |
175 | adf_config.r3.muxout = ADF_MUXOUT_REG_READY; // Lights up the green LED if the ADF7012 is properly powered (changes to lock detection in a later stage)
176 |
177 | adf_config.r3.ld_precision = ADF_LD_PRECISION_5_CYCLES; // What the heck? It is recommended that LDP be set to 1; 0 is more relaxed
178 | adf_config.r3.vco_bias = 6; // In 0.5 mA steps; Default 6 means 3 mA; Maximum (15) is 8 mA
179 | adf_config.r3.pa_bias = 4; // In 1 mA steps; Default 4 means 8 mA; Minimum (0) is 5 mA; Maximum (7) is 12 mA (Datasheet says uA which is bullshit)
180 | adf_config.r3.pll_test_mode = 0;
181 | adf_config.r3.sd_test_mode = 0;
182 | }
183 |
184 | void ADF7012_init_all_registers(void)
185 | {
186 | ADF7012_init_register_zero();
187 | ADF7012_init_register_one();
188 | ADF7012_init_register_two();
189 | ADF7012_init_register_three();
190 | }
191 |
192 | void adf7012_write_register_zero(void) {
193 |
194 | uint32_t reg =
195 | (0) |
196 | ((uint32_t)(adf_config.r0.frequency_error_correction & 0x7FF) << 2) |
197 | ((uint32_t)(adf_config.r0.r_divider & 0xF ) << 13) |
198 | ((uint32_t)(adf_config.r0.crystal_doubler & 0x1 ) << 17) |
199 | ((uint32_t)(adf_config.r0.crystal_oscillator_disable & 0x1 ) << 18) |
200 | ((uint32_t)(adf_config.r0.clock_out_divider & 0xF ) << 19) |
201 | ((uint32_t)(adf_config.r0.vco_adjust & 0x3 ) << 23) |
202 | ((uint32_t)(adf_config.r0.output_divider & 0x3 ) << 25);
203 |
204 | ADF7012_regWrite(reg);
205 | }
206 |
207 | void adf7012_write_register_one(void) {
208 | uint32_t reg =
209 | (1) |
210 | ((uint32_t)(adf_config.r1.fractional_n & 0xFFF) << 2) |
211 | ((uint32_t)(adf_config.r1.integer_n & 0xFF ) << 14) |
212 | ((uint32_t)(adf_config.r1.prescaler & 0x1 ) << 22);
213 |
214 | ADF7012_regWrite(reg);
215 | }
216 |
217 | void adf7012_write_register_two(void) {
218 | uint32_t reg =
219 | (2) |
220 | ((uint32_t)(adf_config.r2.mod_control & 0x3 ) << 2) |
221 | ((uint32_t)(adf_config.r2.gook & 0x1 ) << 4) |
222 | ((uint32_t)(adf_config.r2.power_amplifier_level & 0x3F ) << 5) |
223 | ((uint32_t)(adf_config.r2.modulation_deviation & 0x1FF) << 11) |
224 | ((uint32_t)(adf_config.r2.gfsk_modulation_control & 0x7 ) << 20) |
225 | ((uint32_t)(adf_config.r2.index_counter & 0x3 ) << 23);
226 |
227 | ADF7012_regWrite(reg);
228 | }
229 |
230 | void adf7012_write_register_three(void) {
231 | uint32_t reg =
232 | (3) |
233 | ((uint32_t)(adf_config.r3.pll_enable & 0x1 ) << 2) |
234 | ((uint32_t)(adf_config.r3.pa_enable & 0x1 ) << 3) |
235 | ((uint32_t)(adf_config.r3.clkout_enable & 0x1 ) << 4) |
236 | ((uint32_t)(adf_config.r3.data_invert & 0x1 ) << 5) |
237 | ((uint32_t)(adf_config.r3.charge_pump_current & 0x3 ) << 6) |
238 | ((uint32_t)(adf_config.r3.bleed_up & 0x1 ) << 8) |
239 | ((uint32_t)(adf_config.r3.bleed_down & 0x1 ) << 9) |
240 | ((uint32_t)(adf_config.r3.vco_disable & 0x1 ) << 10) |
241 | ((uint32_t)(adf_config.r3.muxout & 0xF ) << 11) |
242 | ((uint32_t)(adf_config.r3.ld_precision & 0x1 ) << 15) |
243 | ((uint32_t)(adf_config.r3.vco_bias & 0xF ) << 16) |
244 | ((uint32_t)(adf_config.r3.pa_bias & 0x7 ) << 20) |
245 | ((uint32_t)(adf_config.r3.pll_test_mode & 0x1F ) << 23) |
246 | ((uint32_t)(adf_config.r3.sd_test_mode & 0xF ) << 28);
247 |
248 | ADF7012_regWrite(reg);
249 | }
250 |
251 |
252 | void ADF7012_enable(void)
253 | {
254 | IO_SET(CE, HIGH);
255 | __delay_cycles(10);
256 | }
257 |
258 | void ADF7012_disable(void)
259 | {
260 | IO_SET(CE, LOW);
261 | __delay_cycles(10);
262 | }
263 |
264 | void ADF7012_write_all_registers(void)
265 | {
266 | adf7012_write_register_zero();
267 | adf7012_write_register_one();
268 | adf7012_write_register_two();
269 | adf7012_write_register_three();
270 | }
271 |
272 | uint8_t ADF7012_isLocked(void)
273 | {
274 | if ((P1IN & BIT1) > 0)
275 | {
276 | return 1;
277 | }
278 | else
279 | {
280 | return 0;
281 | }
282 | }
283 |
284 | uint8_t ADF7012_isManyLocked(void)
285 | {
286 | volatile uint16_t cnt;
287 | volatile uint16_t i;
288 | cnt = 0;
289 |
290 | for(i = 0; i < 1000 ; i++) // sample PLL lock muxout for 1000 times
291 | {
292 | delay_ms(1); // total check time is 1000 * 1 ms = 1 sec
293 | if ((P1IN & BIT1) > 0)
294 | {
295 | cnt ++;
296 | }
297 | else
298 | {
299 | if(cnt > 0) // prevent overflow
300 | {
301 | cnt --;
302 | }
303 | }
304 | }
305 |
306 | if (cnt > 500) // if more than 500 times lock -> PLL Locked
307 | {
308 | printf("Lock Count %u\r\n",cnt);
309 | return 1;
310 |
311 | }
312 | else // if less than 500 times lock -> PLL not locked
313 | {
314 | printf("Lock Count %u\r\n",cnt);
315 | return 0;
316 | }
317 | }
318 |
319 | void ADF7012_set_VCO(uint8_t bias, uint8_t adj)
320 | {
321 | adf_config.r3.vco_bias = vco_bias = bias;
322 | adf_config.r0.vco_adjust = vco_adj = adj;
323 |
324 | }
325 |
326 | void ADF7012_set_PLL(uint8_t val)
327 | {
328 | adf_config.r3.pll_enable = val;
329 | }
330 |
331 | void ADF7012_set_PA(uint8_t val)
332 | {
333 | adf_config.r3.pa_enable = val;
334 | }
335 |
336 | void ADF7012_set_PALevel(uint8_t val)
337 | {
338 | min_max(0,63,val);
339 | adf_config.r2.power_amplifier_level = val;
340 |
341 | }
342 |
343 |
344 | void ADF7012_set_muxout(uint8_t val)
345 | {
346 | //ADF_MUXOUT_DIGITAL_LOCK = 4
347 | adf_config.r3.muxout = val;
348 | }
349 |
350 | uint8_t ADF7012_lock(void)
351 | {
352 | // fiddle around with bias and adjust capacity until the vco locks
353 |
354 | uint8_t adj = adf_config.r0.vco_adjust; // use default start values from setup
355 | uint8_t bias = adf_config.r3.vco_bias; // or the updated ones that worked last time
356 | volatile uint16_t i;
357 |
358 | adf_config.r3.pll_enable = 1;
359 | adf_config.r3.muxout = ADF_MUXOUT_DIGITAL_LOCK;
360 | ADF7012_enable();
361 | ADF7012_write_all_registers();
362 | delay_ms(50);
363 | ADF7012_isLocked();
364 |
365 | while(!ADF7012_isLocked()) {
366 |
367 | // Serial.print("VCO not in lock. Trying adj: ");
368 | // Serial.print(adj);
369 | // Serial.print(" and bias: ");
370 | // Serial.println(bias);
371 | adf_config.r0.vco_adjust = adj;
372 | adf_config.r3.vco_bias = bias;
373 | adf_config.r3.muxout = ADF_MUXOUT_DIGITAL_LOCK;
374 | ADF7012_enable();
375 | ADF7012_write_all_registers();
376 | delay_ms(1);
377 | if(++bias == 14) {
378 | bias = 1;
379 | if(++adj == 4) {
380 | //Serial.println("Couldn't achieve PLL lock :( ");
381 | // Using best guess defaults:
382 | adf_config.r0.vco_adjust = 0;
383 | adf_config.r3.vco_bias = 5;
384 |
385 | return 0;
386 | }
387 |
388 | }
389 |
390 | delay_ms(1);
391 | }
392 | printf("PLL locked!\r\n");
393 | printf("VCO Bias: %u\r\n",bias);
394 | printf("VCO adjust: %u\r\n",adj);
395 |
396 | ADF7012_set_VCO(bias,adj);
397 | return 1;
398 | }
399 |
400 | void ADF7012_findLock(void)
401 | {
402 | // fiddle around with bias and adjust capacity until the vco locks
403 |
404 | uint8_t adj = 0;
405 | uint8_t bias = 0;
406 | volatile uint16_t i;
407 |
408 | adf_config.r3.pll_enable = 1;
409 | adf_config.r3.muxout = ADF_MUXOUT_DIGITAL_LOCK;
410 | ADF7012_enable();
411 | ADF7012_write_all_registers();
412 | delay_ms(50);
413 | ADF7012_isLocked();
414 |
415 | for (bias = 0 ; bias <15 ; bias++)
416 | {
417 | for (adj = 0; adj<5;adj++)
418 | {
419 | adf_config.r0.vco_adjust = adj;
420 | adf_config.r3.vco_bias = bias;
421 | adf_config.r3.muxout = ADF_MUXOUT_DIGITAL_LOCK;
422 | adf_config.r3.pa_enable = 0;
423 | ADF7012_enable();
424 | ADF7012_write_all_registers();
425 | delay_ms(300);
426 |
427 | if(ADF7012_isManyLocked())
428 | {
429 | //resetExtWatchdogTimer();
430 | printf("PLL locked!\r\n");
431 | printf("VCO Bias: %u\r\n",bias);
432 | printf("VCO adjust: %u\r\n",adj);
433 | printf("\r\n");
434 | adf_config.r3.pa_enable = 1; //ADF PA On
435 | ADF7012_enable();
436 | ADF7012_write_all_registers();
437 | IO_SET(TXDATA,HIGH);
438 | delay_ms(3000);
439 | IO_SET(TXDATA,LOW);
440 | adf_config.r3.pa_enable = 0;
441 | ADF7012_enable();
442 | ADF7012_write_all_registers();
443 | }
444 | else
445 | {
446 | printf("Not locked!\r\n");
447 | printf("VCO Bias: %u\r\n",bias);
448 | printf("VCO adjust: %u\r\n",adj);
449 | printf("\r\n");
450 | }
451 | }
452 |
453 | }
454 |
455 | }
456 |
457 | void ADF7012_findLockOnce(uint8_t bias,uint8_t adj)
458 | {
459 | volatile uint16_t i;
460 |
461 | adf_config.r3.pll_enable = 1;
462 | adf_config.r3.muxout = ADF_MUXOUT_DIGITAL_LOCK;
463 | ADF7012_enable();
464 | ADF7012_write_all_registers();
465 | delay_ms(50);
466 | ADF7012_isLocked();
467 |
468 | adf_config.r0.vco_adjust = adj;
469 | adf_config.r3.vco_bias = bias;
470 | adf_config.r3.muxout = ADF_MUXOUT_DIGITAL_LOCK;
471 | adf_config.r3.pa_enable = 0;
472 | ADF7012_enable();
473 | ADF7012_write_all_registers();
474 | delay_ms(300);
475 |
476 | if(ADF7012_isManyLocked())
477 | {
478 | //resetExtWatchdogTimer();
479 | printf("PLL locked!\r\n");
480 | printf("VCO Bias: %u\r\n",bias);
481 | printf("VCO adjust: %u\r\n",adj);
482 | printf("\r\n");
483 | adf_config.r3.pa_enable = 1; //ADF PA On
484 | ADF7012_enable();
485 | ADF7012_write_all_registers();
486 | IO_SET(TXDATA,HIGH);
487 | delay_ms(3000);
488 | IO_SET(TXDATA,LOW);
489 | adf_config.r3.pa_enable = 0;
490 | ADF7012_enable();
491 | ADF7012_write_all_registers();
492 | }
493 | else
494 | {
495 | printf("Not locked!\r\n");
496 | printf("VCO Bias: %u\r\n",bias);
497 | printf("VCO adjust: %u\r\n",adj);
498 | printf("\r\n");
499 | }
500 | }
501 |
502 |
503 | void ADF7012_OOK(uint8_t val)
504 | {
505 | volatile uint8_t pa_level;
506 | if(val)
507 | {
508 |
509 | ADF7012_init_all_registers();
510 | ADF7012_set_PLL(1);
511 | ADF7012_set_muxout(ADF_MUXOUT_DIGITAL_LOCK);
512 | ADF7012_set_VCO(vco_bias, vco_adj); // get VCO set values when PLL is locked from ADF7012_lock();
513 | ADF7012_set_PALevel(63);
514 | ADF7012_set_PA(1);
515 | ADF7012_enable();
516 | ADF7012_write_all_registers();
517 | //TODO: increase PA level gradually and write update register value while TXDATA is HIGH from 0 to certain PA level
518 | IO_SET(TXDATA,HIGH);
519 | // for (pa_level = 0; pa_level < 64; pa_level++) // 63 is max PA level
520 | // {
521 | // ADF7012_set_PALevel(pa_level);
522 | // adf7012_write_register_two();
523 | // }
524 |
525 | }
526 | else
527 | {
528 | IO_SET(TXDATA,LOW);
529 | // ADF7012_init_all_registers();
530 | // for (pa_level = 63; pa_level > 0 ; pa_level--) // 63 is max PA level
531 | // {
532 | // ADF7012_set_PALevel(pa_level);
533 | // adf7012_write_register_two();
534 | // }
535 | ADF7012_disable();
536 | }
537 | }
538 |
539 |
--------------------------------------------------------------------------------
/OSSIADF7012Beacon/adf7012.h:
--------------------------------------------------------------------------------
1 | /*
2 | * adf7012.h
3 | *
4 | * Created on: 2012. 12. 19.
5 | * Author: OSSI
6 | */
7 |
8 | #ifndef ADF7012_H_
9 | #define ADF7012_H_
10 |
11 | #include "ossibeacon.h"
12 | #include "printf.h"
13 |
14 | // MSP430F2132 pin mapping
15 | #define TXDATA_PORT 1
16 | #define TXDATA_PIN 3
17 |
18 | #define TXCLK_PORT 1
19 | #define TXCLK_PIN 2
20 |
21 | #define SCLK_PORT 1
22 | #define SCLK_PIN 0
23 |
24 | #define SDATA_PORT 2
25 | #define SDATA_PIN 4
26 |
27 | #define SLE_PORT 2
28 | #define SLE_PIN 3
29 |
30 | #define CE_PORT 3
31 | #define CE_PIN 7
32 |
33 | #define MUXOUT_PORT 1
34 | #define MUXOUT_PIN 1
35 |
36 | #define PAON_PORT 3
37 | #define PAON_PIN 6
38 |
39 | // Register Constants ========================================================
40 |
41 | // Register 0 ----------------------------------------------------------------
42 | #define ADF_OUTPUT_DIVIDER_BY_1 0
43 | #define ADF_OUTPUT_DIVIDER_BY_2 1
44 | #define ADF_OUTPUT_DIVIDER_BY_4 2
45 | #define ADF_OUTPUT_DIVIDER_BY_8 3
46 |
47 |
48 | // Register 1 ----------------------------------------------------------------
49 | #define ADF_PRESCALER_4_5 0
50 | #define ADF_PRESCALER_8_9 1
51 | #define ADF_PRESCALER ADF_PRESCALER_8_9
52 |
53 | // Register 2 ----------------------------------------------------------------
54 | #define ADF_MODULATION_FSK 0
55 | #define ADF_MODULATION_GFSK 1
56 | #define ADF_MODULATION_ASK 2
57 | #define ADF_MODULATION_OOK 3
58 |
59 | // Register 3 ----------------------------------------------------------------
60 | #define ADF_CP_CURRENT_0_3 0
61 | #define ADF_CP_CURRENT_0_9 1
62 | #define ADF_CP_CURRENT_1_5 2
63 | #define ADF_CP_CURRENT_2_1 3
64 | #define ADF_MUXOUT_LOGIC_LOW 0
65 | #define ADF_MUXOUT_LOGIC_HIGH 1
66 | #define ADF_MUXOUT_REG_READY 3
67 | #define ADF_MUXOUT_DIGITAL_LOCK 4
68 | #define ADF_MUXOUT_ANALOGUE_LOCK 5
69 | #define ADF_MUXOUT_R_DIVIDER_2 6
70 | #define ADF_MUXOUT_N_DIVIDER_2 7
71 | #define ADF_MUXOUT_RF_R_DIVIDER 8
72 | #define ADF_MUXOUT_DATA_RATE 9
73 | #define ADF_MUXOUT_BATT_2_35 10
74 | #define ADF_MUXOUT_BATT_2_75 11
75 | #define ADF_MUXOUT_BATT_3 12
76 | #define ADF_MUXOUT_BATT_3_25 13
77 | #define ADF_MUXOUT_TEST_MODE 14
78 | #define ADF_MUXOUT_SD_TEST_MODE 15
79 | #define ADF_LD_PRECISION_3_CYCLES 0
80 | #define ADF_LD_PRECISION_5_CYCLES 1
81 |
82 | void ADF7012_setup(void);
83 | void ADF7012_init(void);
84 | void ADF7012_init_all_registers(void);
85 | void ADF7012_write_all_registers(void);
86 |
87 | uint8_t ADF7012_lock(void);
88 | void ADF7012_findLock(void);
89 |
90 | void ADF7012_enable(void);
91 | void ADF7012_disable(void);
92 |
93 | void ADF7012_OOK(uint8_t val);
94 |
95 |
96 |
97 | #endif /* ADF7012_H_ */
98 |
--------------------------------------------------------------------------------
/OSSIADF7012Beacon/gps.c:
--------------------------------------------------------------------------------
1 | /*
2 | * gps.c
3 | *
4 | * Created on: 2012. 12. 21.
5 | * Author: OSSI
6 | * Inspired by: http://rev0proto.com/wiki/index.php/Senior_Project / Justin Kenny
7 | */
8 |
9 | #include "gps.h"
10 |
11 | static volatile uint8_t gps_ready_flag = 0;
12 |
13 | uint8_t rawgps[82];
14 | uint8_t gpsgga[82];
15 | uint8_t gpsindex = 0;
16 | uint8_t gpsdone = 0;
17 | Gps gpsdata = {"3518.5230", "12039.6090", "123456.789", "00", "000000.0", 'N', 'W', '0'};
18 |
19 | uint8_t gps_array_data[100]={0}; // 59 = sizeof(gpsdata) + spacer character
20 |
21 | void gps_set_readyFlag(void)
22 | {
23 | gps_ready_flag = 1;
24 | }
25 |
26 | void gps_clear_readyFlag(void)
27 | {
28 | gps_ready_flag = 0;
29 | }
30 |
31 | uint8_t gps_is_ready(void)
32 | {
33 | if(gps_ready_flag)
34 | {
35 | return 1;
36 | }
37 | else
38 | {
39 | return 0;
40 | }
41 |
42 | }
43 |
44 | void gps_parse_nmea(void)
45 | {
46 | IE2 &= ~UCA0RXIE; //Disable receive interrupt
47 | uint8_t commas[MAXCOMMAS];
48 | uint8_t i = 0, n;
49 | for(n=0;nMAXGPS;i++); //Find next comma; continue stepping through the array until we find 0x2C (,)
52 | commas[n] = i; //Store the index in commas[] array
53 | i++;
54 | }
55 | if(rawgps[commas[5]+1] != '0') //Make sure we have GPS fix; 0 = invalid
56 | {
57 | for(i=commas[1]+1;i = End of Transmission
212 | {
213 | gpsdone = 1;
214 | if(rawgps[4] == 'G') //Make sure this is a GGA sentence
215 | {
216 | gps_parse_nmea();
217 | return 1;
218 | }
219 | }
220 | if(gpsdone != 1)
221 | {
222 | rawgps[gpsindex] = data;
223 | gpsindex++;
224 | }
225 | if(gpsindex > 81)
226 | {
227 | gpsindex = 0;
228 | }
229 | return 0;
230 | }
231 |
232 | uint8_t* gps_get_stream(void)
233 | {
234 | return gps_array_data;
235 | }
236 |
--------------------------------------------------------------------------------
/OSSIADF7012Beacon/gps.h:
--------------------------------------------------------------------------------
1 | /*
2 | * gps.h
3 | *
4 | * Created on: 2012. 12. 21.
5 | * Author: OSSI
6 | */
7 |
8 | #ifndef GPS_H_
9 | #define GPS_H_
10 |
11 | #include "ossibeacon.h"
12 |
13 | #define MAXCOMMAS 14 //Max commas to store positions of (14 for GGA sentence)
14 | #define MAXGPS 82 //Max NMEA string size
15 | #define MAXLAT 9 //Max latitude size in bytes
16 | #define MAXLONG 10 //Max longitude size in bytes
17 | #define MAXTIME 10 //Max time size in bytes
18 | #define MAXSATS 2 //Max sats size in bytes
19 | #define MAXALTI 8 //Max altitude size in bytes
20 |
21 | typedef struct
22 | {
23 | uint8_t lat[MAXLAT];
24 | uint8_t lng[MAXLONG];
25 | uint8_t time[MAXTIME];
26 | uint8_t sats[MAXSATS];
27 | uint8_t alti[MAXALTI];
28 | uint8_t ns;
29 | uint8_t ew;
30 | uint8_t valid;
31 | } Gps;
32 |
33 | void gps_set_readyFlag(void);
34 | void gps_clear_readyFlag(void);
35 | uint8_t gps_is_ready(void);
36 |
37 | uint8_t gps_update_data(uint8_t data);
38 | void gps_make_packet(void);
39 | uint8_t* gps_get_stream(void);
40 |
41 | #endif /* GPS_H_ */
42 |
--------------------------------------------------------------------------------
/OSSIADF7012Beacon/i2c.c:
--------------------------------------------------------------------------------
1 | /*
2 | * i2c.c
3 | *
4 | * Created on: 2012. 12. 19.
5 | * Author: OSSI
6 | */
7 | #include "i2c.h"
8 |
9 | static volatile uint8_t i2c_rcv_flag;
10 |
11 | volatile uint8_t RXData;
12 |
13 |
14 | //void i2c_slave_init(void)
15 | //{
16 | // // in slave mode, i2c can receive data even in LPM4 with ISR
17 | // i2c_rcv_flag = 0;
18 | // P3SEL |= 0x06; // Assign I2C pins to USCI_B0
19 | // UCB0CTL1 |= UCSWRST; // Enable SW reset
20 | // UCB0CTL0 = UCMODE_3 + UCSYNC; // I2C Slave, synchronous mode
21 | // UCB0I2COA = 0x48; // Own Address is 048h
22 | // UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
23 | // IE2 |= UCB0RXIE; // Enable RX interrupt
24 | //}
25 |
26 | void i2c_set_readyFlag(void)
27 | {
28 | i2c_rcv_flag = 1;
29 | }
30 |
31 | void i2c_clear_readyFlag(void)
32 | {
33 | i2c_rcv_flag = 0;
34 | }
35 |
36 | uint8_t i2c_is_ready(void)
37 | {
38 | if(i2c_rcv_flag)
39 | {
40 | return 1;
41 | }
42 | else
43 | {
44 | return 0;
45 | }
46 | }
47 |
48 | uint8_t i2c_get_data()
49 | {
50 | return RXData;
51 | }
52 |
53 | // USCI_B0 Data ISR
54 | //#pragma vector = USCIAB0TX_VECTOR
55 | //__interrupt void USCIAB0TX_ISR(void)
56 | //{
57 | // // TODO: I2C and UART handle at the same time
58 | // RXData = UCB0RXBUF; // Get RX data
59 | // __bic_SR_register_on_exit(LPM3_bits); // exits LPM3
60 | //}
61 |
--------------------------------------------------------------------------------
/OSSIADF7012Beacon/i2c.h:
--------------------------------------------------------------------------------
1 | /*
2 | * i2c.h
3 | *
4 | * Created on: 2012. 12. 19.
5 | * Author: OSSI
6 | */
7 |
8 | #ifndef I2C_H_
9 | #define I2C_H_
10 |
11 | #include "ossibeacon.h"
12 |
13 | void i2c_set_readyFlag(void);
14 | void i2c_clear_readyFlag(void);
15 | uint8_t i2c_is_ready(void);
16 |
17 | #endif /* I2C_H_ */
18 |
--------------------------------------------------------------------------------
/OSSIADF7012Beacon/lnk_msp430f2132.cmd:
--------------------------------------------------------------------------------
1 | /******************************************************************************/
2 | /* lnk_msp430f2132.cmd - LINKER COMMAND FILE FOR LINKING MSP430F2132 PROGRAMS */
3 | /* */
4 | /* Usage: lnk430 -o -m