├── .gitignore ├── board.jpg ├── .cargo └── config ├── Makefile ├── Cargo.toml ├── msp430.json ├── LICENSE ├── src └── main.rs ├── README.md └── ldscripts ├── msp430g2553_symbols.ld └── msp430g2553.ld /.gitignore: -------------------------------------------------------------------------------- 1 | target/ 2 | Cargo.lock 3 | .DS_Store 4 | -------------------------------------------------------------------------------- /board.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pftbest/rust_on_msp/HEAD/board.jpg -------------------------------------------------------------------------------- /.cargo/config: -------------------------------------------------------------------------------- 1 | [target.msp430] 2 | rustflags = [ 3 | "-C", "link-arg=-Tmsp430g2553.ld", 4 | "-C", "link-arg=-mmcu=msp430g2553", 5 | "-C", "link-arg=-nostartfiles", 6 | ] 7 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | TARGET = target/msp430/release/msp 2 | 3 | all: 4 | xargo build --release --target msp430 5 | msp430-elf-objdump -Cd $(TARGET) > $(TARGET).lst 6 | msp430-elf-size $(TARGET) 7 | 8 | clean: 9 | cargo clean 10 | 11 | prog: 12 | mspdebug rf2500 "prog $(TARGET)" 13 | -------------------------------------------------------------------------------- /Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | build = "build.rs" 3 | name = "msp" 4 | version = "0.1.0" 5 | authors = ["Vadzim Dambrouski "] 6 | 7 | [dependencies] 8 | volatile-register = "0.1.2" 9 | 10 | [profile.dev] 11 | debug = true 12 | 13 | [profile.release] 14 | lto = true 15 | -------------------------------------------------------------------------------- /msp430.json: -------------------------------------------------------------------------------- 1 | { 2 | "arch": "msp430", 3 | "asm-args": ["-mcpu=msp430"], 4 | "data-layout": "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16", 5 | "executables": true, 6 | "linker": "msp430-elf-gcc", 7 | "linker-flavor": "gcc", 8 | "llvm-target": "msp430", 9 | "max-atomic-width": 0, 10 | "no-integrated-as": true, 11 | "os": "none", 12 | "panic-strategy": "abort", 13 | "relocation-model": "static", 14 | "target-endian": "little", 15 | "target-pointer-width": "16", 16 | "vendor": "unknown" 17 | } 18 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Copyright (c) 2016 Vadzim Dambrouski 2 | 3 | Permission is hereby granted, free of charge, to any person obtaining a copy of 4 | this software and associated documentation files (the "Software"), to deal in 5 | the Software without restriction, including without limitation the rights to 6 | use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies 7 | of the Software, and to permit persons to whom the Software is furnished to do 8 | so, subject to the following conditions: 9 | 10 | The above copyright notice and this permission notice shall be included in all 11 | copies or substantial portions of the Software. 12 | 13 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | SOFTWARE. 20 | -------------------------------------------------------------------------------- /src/main.rs: -------------------------------------------------------------------------------- 1 | #![no_std] 2 | #![no_main] 3 | #![feature(asm)] 4 | #![feature(used)] 5 | #![feature(lang_items)] 6 | #![feature(global_asm)] 7 | #![feature(abi_msp430_interrupt)] 8 | 9 | extern crate volatile_register; 10 | use volatile_register::RW; 11 | 12 | global_asm!(r#" 13 | .globl reset_handler 14 | reset_handler: 15 | mov #__stack, r1 16 | br #main 17 | "#); 18 | 19 | #[used] 20 | #[link_section = "__interrupt_vector_reset"] 21 | static RESET_VECTOR: unsafe extern "msp430-interrupt" fn() = reset_handler; 22 | 23 | extern "msp430-interrupt" { 24 | fn reset_handler(); 25 | } 26 | 27 | #[used] 28 | #[link_section = "__interrupt_vector_timer0_a0"] 29 | static TIM0_VECTOR: unsafe extern "msp430-interrupt" fn() = timer0_handler; 30 | 31 | unsafe extern "msp430-interrupt" fn timer0_handler() { 32 | // you can do something here 33 | } 34 | 35 | extern "C" { 36 | static mut WDTCTL: RW; 37 | static mut P1DIR: RW; 38 | static mut P1OUT: RW; 39 | } 40 | 41 | #[no_mangle] 42 | pub unsafe extern "C" fn main() -> ! { 43 | WDTCTL.write(0x5A00 + 0x80); 44 | P1DIR.write(0b0100_0001); 45 | P1OUT.write(0x01); 46 | loop { 47 | P1OUT.modify(|x| !x); 48 | delay(40000); 49 | } 50 | } 51 | 52 | unsafe fn delay(n: u16) { 53 | asm!(r#" 54 | 1: 55 | dec $0 56 | jne 1b 57 | "# :: "{r12}"(n) : "r12" : "volatile"); 58 | } 59 | 60 | #[used] 61 | #[lang = "panic_fmt"] 62 | extern "C" fn panic_fmt() -> ! { 63 | loop {} 64 | } 65 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # `rust_on_msp` [deprecated] 2 | 3 | > Simple blinking LED example that runs on MSP430. 4 | 5 | ## Deprecated 6 | 7 | This project is deprecated in favor of msp430* crates on [crates.io]. 8 | 9 | [msp430] and [msp430-rt] crates are based on cortex-m* crates by @japaric. Device crates are generated using [svd2rust]. SVD files for msp430 microcontrollers can be generated by [msp430_svd] tool. 10 | 11 | You can find code examples in [msp430-quickstart] repository. 12 | 13 | There is also a real firmware that is using this framework: [AT2XT]. 14 | 15 | [AT2XT]: https://github.com/cr1901/AT2XT 16 | [crates.io]: https://crates.io/keywords/msp430 17 | [msp430-quickstart]: https://github.com/japaric/msp430-quickstart 18 | [msp430]: https://docs.rs/msp430/0.1.0/msp430 19 | [msp430-rt]: https://docs.rs/msp430-rt/0.1.0/msp430_rt 20 | [cortex-m]: https://github.com/japaric/cortex-m 21 | [cortex-m-rt]: https://github.com/japaric/cortex-m-rt 22 | [svd2rust]: https://github.com/japaric/svd2rust 23 | [msp430_svd]: https://github.com/pftbest/msp430_svd 24 | 25 | ## Compiling 26 | 27 | This project can be compiled using nightly rust and [xargo](https://github.com/japaric/xargo). 28 | 29 | Tested using version `rustc 1.21.0-nightly (37c7d0ebb 2017-07-31)` 30 | 31 | Steps: 32 | * First, install `msp430-elf-gcc` compiler, and make sure it is in your `$PATH`. 33 | You can get it from [here](http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/latest/index_FDS.html). 34 | * Install nightly rust: `$ rustup default nightly` 35 | * Install xargo: `$ cargo install xargo` 36 | * Build the project: `$ make` 37 | * or you can build it using xargo directly (if you don't like `make`) 38 | 39 | `$ xargo build --release --target msp430` 40 | * Flash the firmware using mspdebug: `$ make prog` 41 | 42 | ## How it works 43 | 44 | This project is does not use default startup code from gcc, so a reset handler should be defined like this: 45 | ```rust 46 | #[used] 47 | #[link_section = "__interrupt_vector_reset"] 48 | static RESET_VECTOR: unsafe extern "msp430-interrupt" fn() = reset_handler; 49 | ``` 50 | RESET_VECTOR is just a function pointer that gets placed inside a special section 51 | called `__interrupt_vector_reset` and is pointing to `reset_handler` function, 52 | so it will be called on reset. 53 | 54 | `reset_handler` function is defined in `global_asm!` block because it needs to 55 | set stack pointer as it's first instruction during startup. Handlers for other 56 | interrupts doesn't need this, so they can be written in rust. For example 57 | handler for timer_a0 interrupt can be defined like this: 58 | ```Rust 59 | #[used] 60 | #[link_section = "__interrupt_vector_timer0_a0"] 61 | static TIM0_VECTOR: unsafe extern "msp430-interrupt" fn() = timer0_handler; 62 | 63 | unsafe extern "msp430-interrupt" fn timer0_handler() { 64 | // you can do something here 65 | } 66 | ``` 67 | 68 | ## Porting to other boards and MCUs 69 | 70 | To run this code on the other boards and MCUs, you need to change it in few places: 71 | * Get a linker script for your MCU from msp430-elf-gcc include directory, and place it 72 | inside `ldscripts` folder. (Don't forget to get `*_symbols.ld` one as well). 73 | * Modify `.cargo/config` file so it would point to your ld script from step 1 and change 74 | linker flags to match your MCU name. 75 | * Modify `build.rs` script so it would copy the right ld script from step 1. 76 | 77 | ## Board 78 | 79 | I am using TI LaunchPad G2 board with `msp430g2553` MCU, but it should be easy to port this code for any other board or MCU. 80 | 81 | ![board](https://github.com/pftbest/rust_on_msp/raw/master/board.jpg "TI LaunchPad G2") 82 | -------------------------------------------------------------------------------- /ldscripts/msp430g2553_symbols.ld: -------------------------------------------------------------------------------- 1 | /* ============================================================================ */ 2 | /* Copyright (c) 2016, Texas Instruments Incorporated */ 3 | /* All rights reserved. */ 4 | /* */ 5 | /* Redistribution and use in source and binary forms, with or without */ 6 | /* modification, are permitted provided that the following conditions */ 7 | /* are met: */ 8 | /* */ 9 | /* * Redistributions of source code must retain the above copyright */ 10 | /* notice, this list of conditions and the following disclaimer. */ 11 | /* */ 12 | /* * Redistributions in binary form must reproduce the above copyright */ 13 | /* notice, this list of conditions and the following disclaimer in the */ 14 | /* documentation and/or other materials provided with the distribution. */ 15 | /* */ 16 | /* * Neither the name of Texas Instruments Incorporated nor the names of */ 17 | /* its contributors may be used to endorse or promote products derived */ 18 | /* from this software without specific prior written permission. */ 19 | /* */ 20 | /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ 21 | /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ 22 | /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ 23 | /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ 24 | /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ 25 | /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ 26 | /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ 27 | /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ 28 | /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ 29 | /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ 30 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ 31 | /* ============================================================================ */ 32 | 33 | /* This file supports MSP430G2553 devices. */ 34 | /* Version: 1.194 */ 35 | 36 | /************************************************************ 37 | * STANDARD BITS 38 | ************************************************************/ 39 | /************************************************************ 40 | * STATUS REGISTER BITS 41 | ************************************************************/ 42 | /************************************************************ 43 | * PERIPHERAL FILE MAP 44 | ************************************************************/ 45 | /************************************************************ 46 | * SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS 47 | ************************************************************/ 48 | PROVIDE(IE1 = 0x0000); 49 | PROVIDE(IFG1 = 0x0002); 50 | PROVIDE(IE2 = 0x0001); 51 | PROVIDE(IFG2 = 0x0003); 52 | /************************************************************ 53 | * ADC10 54 | ************************************************************/ 55 | PROVIDE(ADC10DTC0 = 0x0048); 56 | PROVIDE(ADC10DTC1 = 0x0049); 57 | PROVIDE(ADC10AE0 = 0x004A); 58 | PROVIDE(ADC10CTL0 = 0x01B0); 59 | PROVIDE(ADC10CTL1 = 0x01B2); 60 | PROVIDE(ADC10MEM = 0x01B4); 61 | PROVIDE(ADC10SA = 0x01BC); 62 | /************************************************************ 63 | * Basic Clock Module 64 | ************************************************************/ 65 | PROVIDE(DCOCTL = 0x0056); 66 | PROVIDE(BCSCTL1 = 0x0057); 67 | PROVIDE(BCSCTL2 = 0x0058); 68 | PROVIDE(BCSCTL3 = 0x0053); 69 | /************************************************************ 70 | * Comparator A 71 | ************************************************************/ 72 | PROVIDE(CACTL1 = 0x0059); 73 | PROVIDE(CACTL2 = 0x005A); 74 | PROVIDE(CAPD = 0x005B); 75 | /************************************************************* 76 | * Flash Memory 77 | *************************************************************/ 78 | PROVIDE(FCTL1 = 0x0128); 79 | PROVIDE(FCTL2 = 0x012A); 80 | PROVIDE(FCTL3 = 0x012C); 81 | /************************************************************ 82 | * DIGITAL I/O Port1/2 Pull up / Pull down Resistors 83 | ************************************************************/ 84 | PROVIDE(P1IN = 0x0020); 85 | PROVIDE(P1OUT = 0x0021); 86 | PROVIDE(P1DIR = 0x0022); 87 | PROVIDE(P1IFG = 0x0023); 88 | PROVIDE(P1IES = 0x0024); 89 | PROVIDE(P1IE = 0x0025); 90 | PROVIDE(P1SEL = 0x0026); 91 | PROVIDE(P1SEL2 = 0x0041); 92 | PROVIDE(P1REN = 0x0027); 93 | PROVIDE(P2IN = 0x0028); 94 | PROVIDE(P2OUT = 0x0029); 95 | PROVIDE(P2DIR = 0x002A); 96 | PROVIDE(P2IFG = 0x002B); 97 | PROVIDE(P2IES = 0x002C); 98 | PROVIDE(P2IE = 0x002D); 99 | PROVIDE(P2SEL = 0x002E); 100 | PROVIDE(P2SEL2 = 0x0042); 101 | PROVIDE(P2REN = 0x002F); 102 | /************************************************************ 103 | * DIGITAL I/O Port3 Pull up / Pull down Resistors 104 | ************************************************************/ 105 | PROVIDE(P3IN = 0x0018); 106 | PROVIDE(P3OUT = 0x0019); 107 | PROVIDE(P3DIR = 0x001A); 108 | PROVIDE(P3SEL = 0x001B); 109 | PROVIDE(P3SEL2 = 0x0043); 110 | PROVIDE(P3REN = 0x0010); 111 | /************************************************************ 112 | * Timer0_A3 113 | ************************************************************/ 114 | PROVIDE(TA0IV = 0x012E); 115 | PROVIDE(TA0CTL = 0x0160); 116 | PROVIDE(TA0CCTL0 = 0x0162); 117 | PROVIDE(TA0CCTL1 = 0x0164); 118 | PROVIDE(TA0CCTL2 = 0x0166); 119 | PROVIDE(TA0R = 0x0170); 120 | PROVIDE(TA0CCR0 = 0x0172); 121 | PROVIDE(TA0CCR1 = 0x0174); 122 | PROVIDE(TA0CCR2 = 0x0176); 123 | /************************************************************ 124 | * Timer1_A3 125 | ************************************************************/ 126 | PROVIDE(TA1IV = 0x011E); 127 | PROVIDE(TA1CTL = 0x0180); 128 | PROVIDE(TA1CCTL0 = 0x0182); 129 | PROVIDE(TA1CCTL1 = 0x0184); 130 | PROVIDE(TA1CCTL2 = 0x0186); 131 | PROVIDE(TA1R = 0x0190); 132 | PROVIDE(TA1CCR0 = 0x0192); 133 | PROVIDE(TA1CCR1 = 0x0194); 134 | PROVIDE(TA1CCR2 = 0x0196); 135 | /************************************************************ 136 | * USCI 137 | ************************************************************/ 138 | PROVIDE(UCA0CTL0 = 0x0060); 139 | PROVIDE(UCA0CTL1 = 0x0061); 140 | PROVIDE(UCA0BR0 = 0x0062); 141 | PROVIDE(UCA0BR1 = 0x0063); 142 | PROVIDE(UCA0MCTL = 0x0064); 143 | PROVIDE(UCA0STAT = 0x0065); 144 | PROVIDE(UCA0RXBUF = 0x0066); 145 | PROVIDE(UCA0TXBUF = 0x0067); 146 | PROVIDE(UCA0ABCTL = 0x005D); 147 | PROVIDE(UCA0IRTCTL = 0x005E); 148 | PROVIDE(UCA0IRRCTL = 0x005F); 149 | PROVIDE(UCB0CTL0 = 0x0068); 150 | PROVIDE(UCB0CTL1 = 0x0069); 151 | PROVIDE(UCB0BR0 = 0x006A); 152 | PROVIDE(UCB0BR1 = 0x006B); 153 | PROVIDE(UCB0I2CIE = 0x006C); 154 | PROVIDE(UCB0STAT = 0x006D); 155 | PROVIDE(UCB0RXBUF = 0x006E); 156 | PROVIDE(UCB0TXBUF = 0x006F); 157 | PROVIDE(UCB0I2COA = 0x0118); 158 | PROVIDE(UCB0I2CSA = 0x011A); 159 | /************************************************************ 160 | * WATCHDOG TIMER 161 | ************************************************************/ 162 | PROVIDE(WDTCTL = 0x0120); 163 | /************************************************************ 164 | * Calibration Data in Info Mem 165 | ************************************************************/ 166 | PROVIDE(CALDCO_16MHZ = 0x10F8); 167 | PROVIDE(CALBC1_16MHZ = 0x10F9); 168 | PROVIDE(CALDCO_12MHZ = 0x10FA); 169 | PROVIDE(CALBC1_12MHZ = 0x10FB); 170 | PROVIDE(CALDCO_8MHZ = 0x10FC); 171 | PROVIDE(CALBC1_8MHZ = 0x10FD); 172 | PROVIDE(CALDCO_1MHZ = 0x10FE); 173 | PROVIDE(CALBC1_1MHZ = 0x10FF); 174 | /************************************************************ 175 | * Calibration Data in Info Mem 176 | ************************************************************/ 177 | PROVIDE(TLV_CHECKSUM = 0x10C0); 178 | PROVIDE(TLV_DCO_30_TAG = 0x10F6); 179 | PROVIDE(TLV_DCO_30_LEN = 0x10F7); 180 | PROVIDE(TLV_ADC10_1_TAG = 0x10DA); 181 | PROVIDE(TLV_ADC10_1_LEN = 0x10DB); 182 | /************************************************************ 183 | * Interrupt Vectors (offset from 0xFFE0) 184 | ************************************************************/ 185 | /************************************************************ 186 | * End of Modules 187 | ************************************************************/ 188 | -------------------------------------------------------------------------------- /ldscripts/msp430g2553.ld: -------------------------------------------------------------------------------- 1 | /* ============================================================================ */ 2 | /* Copyright (c) 2016, Texas Instruments Incorporated */ 3 | /* All rights reserved. */ 4 | /* */ 5 | /* Redistribution and use in source and binary forms, with or without */ 6 | /* modification, are permitted provided that the following conditions */ 7 | /* are met: */ 8 | /* */ 9 | /* * Redistributions of source code must retain the above copyright */ 10 | /* notice, this list of conditions and the following disclaimer. */ 11 | /* */ 12 | /* * Redistributions in binary form must reproduce the above copyright */ 13 | /* notice, this list of conditions and the following disclaimer in the */ 14 | /* documentation and/or other materials provided with the distribution. */ 15 | /* */ 16 | /* * Neither the name of Texas Instruments Incorporated nor the names of */ 17 | /* its contributors may be used to endorse or promote products derived */ 18 | /* from this software without specific prior written permission. */ 19 | /* */ 20 | /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ 21 | /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ 22 | /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ 23 | /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ 24 | /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ 25 | /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ 26 | /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ 27 | /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ 28 | /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ 29 | /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ 30 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ 31 | /* ============================================================================ */ 32 | 33 | /* This file supports MSP430G2553 devices. */ 34 | /* Version: 1.194 */ 35 | /* Default linker script, for normal executables */ 36 | 37 | OUTPUT_ARCH(msp430) 38 | ENTRY(_start) 39 | 40 | MEMORY { 41 | SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */ 42 | RAM : ORIGIN = 0x0200, LENGTH = 0x0200 /* END=0x03FF, size 512 */ 43 | INFOMEM : ORIGIN = 0x1000, LENGTH = 0x0100 /* END=0x10FF, size 256 as 4 64-byte segments */ 44 | INFOA : ORIGIN = 0x10C0, LENGTH = 0x0040 /* END=0x10FF, size 64 */ 45 | INFOB : ORIGIN = 0x1080, LENGTH = 0x0040 /* END=0x10BF, size 64 */ 46 | INFOC : ORIGIN = 0x1040, LENGTH = 0x0040 /* END=0x107F, size 64 */ 47 | INFOD : ORIGIN = 0x1000, LENGTH = 0x0040 /* END=0x103F, size 64 */ 48 | ROM (rx) : ORIGIN = 0xC000, LENGTH = 0x3FDE /* END=0xFFDD, size 16350 */ 49 | BSLSIGNATURE : ORIGIN = 0xFFDE, LENGTH = 0x0002 50 | VECT1 : ORIGIN = 0xFFE0, LENGTH = 0x0002 51 | VECT2 : ORIGIN = 0xFFE2, LENGTH = 0x0002 52 | VECT3 : ORIGIN = 0xFFE4, LENGTH = 0x0002 53 | VECT4 : ORIGIN = 0xFFE6, LENGTH = 0x0002 54 | VECT5 : ORIGIN = 0xFFE8, LENGTH = 0x0002 55 | VECT6 : ORIGIN = 0xFFEA, LENGTH = 0x0002 56 | VECT7 : ORIGIN = 0xFFEC, LENGTH = 0x0002 57 | VECT8 : ORIGIN = 0xFFEE, LENGTH = 0x0002 58 | VECT9 : ORIGIN = 0xFFF0, LENGTH = 0x0002 59 | VECT10 : ORIGIN = 0xFFF2, LENGTH = 0x0002 60 | VECT11 : ORIGIN = 0xFFF4, LENGTH = 0x0002 61 | VECT12 : ORIGIN = 0xFFF6, LENGTH = 0x0002 62 | VECT13 : ORIGIN = 0xFFF8, LENGTH = 0x0002 63 | VECT14 : ORIGIN = 0xFFFA, LENGTH = 0x0002 64 | VECT15 : ORIGIN = 0xFFFC, LENGTH = 0x0002 65 | RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002 66 | } 67 | 68 | SECTIONS 69 | { 70 | .bslsignature : {} > BSLSIGNATURE 71 | __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) KEEP (*(__interrupt_vector_trapint)) } > VECT1 72 | __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2 73 | __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_port1)) } > VECT3 74 | __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_port2)) } > VECT4 75 | __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5 76 | __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) KEEP (*(__interrupt_vector_adc10)) } > VECT6 77 | __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) KEEP (*(__interrupt_vector_usciab0tx)) } > VECT7 78 | __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) KEEP (*(__interrupt_vector_usciab0rx)) } > VECT8 79 | __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT9 80 | __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT10 81 | __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_wdt)) } > VECT11 82 | __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) KEEP (*(__interrupt_vector_comparatora)) } > VECT12 83 | __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT13 84 | __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT14 85 | __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_nmi)) } > VECT15 86 | __reset_vector : 87 | { 88 | KEEP (*(__interrupt_vector_16)) 89 | KEEP (*(__interrupt_vector_reset)) 90 | KEEP (*(.resetvec)) 91 | } > RESETVEC 92 | 93 | .rodata : 94 | { 95 | . = ALIGN(2); 96 | *(.plt) 97 | *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*) 98 | *(.rodata1) 99 | KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) 100 | PROVIDE (__preinit_array_start = .); 101 | KEEP (*(.preinit_array)) 102 | PROVIDE (__preinit_array_end = .); 103 | PROVIDE (__init_array_start = .); 104 | KEEP (*(SORT(.init_array.*))) 105 | KEEP (*(.init_array)) 106 | PROVIDE (__init_array_end = .); 107 | PROVIDE (__fini_array_start = .); 108 | KEEP (*(.fini_array)) 109 | KEEP (*(SORT(.fini_array.*))) 110 | PROVIDE (__fini_array_end = .); 111 | } > ROM 112 | 113 | /* Note: This is a separate .rodata section for sections which are 114 | read only but which older linkers treat as read-write. 115 | This prevents older linkers from marking the entire .rodata 116 | section as read-write. */ 117 | .rodata2 : 118 | { 119 | . = ALIGN(2); 120 | *(.eh_frame_hdr) 121 | KEEP (*(.eh_frame)) 122 | 123 | /* gcc uses crtbegin.o to find the start of the constructors, so 124 | we make sure it is first. Because this is a wildcard, it 125 | doesn't matter if the user does not actually link against 126 | crtbegin.o; the linker won't look for a file to match a 127 | wildcard. The wildcard also means that it doesn't matter which 128 | directory crtbegin.o is in. */ 129 | KEEP (*crtbegin*.o(.ctors)) 130 | 131 | /* We don't want to include the .ctor section from from the 132 | crtend.o file until after the sorted ctors. The .ctor section 133 | from the crtend file contains the end of ctors marker and it 134 | must be last */ 135 | KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) 136 | KEEP (*(SORT(.ctors.*))) 137 | KEEP (*(.ctors)) 138 | 139 | KEEP (*crtbegin*.o(.dtors)) 140 | KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) 141 | KEEP (*(SORT(.dtors.*))) 142 | KEEP (*(.dtors)) 143 | } > ROM 144 | 145 | .text : 146 | { 147 | . = ALIGN(2); 148 | PROVIDE (_start = .); 149 | KEEP (*(SORT(.crt_*))) 150 | *(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*) 151 | KEEP (*(.text.*personality*)) 152 | /* .gnu.warning sections are handled specially by elf32.em. */ 153 | *(.gnu.warning) 154 | *(.interp .hash .dynsym .dynstr .gnu.version*) 155 | PROVIDE (__etext = .); 156 | PROVIDE (_etext = .); 157 | PROVIDE (etext = .); 158 | . = ALIGN(2); 159 | KEEP (*(.init)) 160 | KEEP (*(.fini)) 161 | KEEP (*(.tm_clone_table)) 162 | } > ROM 163 | 164 | .data : 165 | { 166 | . = ALIGN(2); 167 | PROVIDE (__datastart = .); 168 | 169 | KEEP (*(.jcr)) 170 | *(.data.rel.ro.local) *(.data.rel.ro*) 171 | *(.dynamic) 172 | 173 | *(.data .data.* .gnu.linkonce.d.*) 174 | KEEP (*(.gnu.linkonce.d.*personality*)) 175 | SORT(CONSTRUCTORS) 176 | *(.data1) 177 | *(.got.plt) *(.got) 178 | 179 | /* We want the small data sections together, so single-instruction offsets 180 | can access them all, and initialized data all before uninitialized, so 181 | we can shorten the on-disk segment size. */ 182 | . = ALIGN(2); 183 | *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1) 184 | 185 | . = ALIGN(2); 186 | _edata = .; 187 | PROVIDE (edata = .); 188 | PROVIDE (__dataend = .); 189 | } > RAM AT>ROM 190 | 191 | /* Note that crt0 assumes this is a multiple of two; all the 192 | start/stop symbols are also assumed word-aligned. */ 193 | PROVIDE(__romdatastart = LOADADDR(.data)); 194 | PROVIDE (__romdatacopysize = SIZEOF(.data)); 195 | 196 | .bss : 197 | { 198 | . = ALIGN(2); 199 | PROVIDE (__bssstart = .); 200 | *(.dynbss) 201 | *(.sbss .sbss.*) 202 | *(.bss .bss.* .gnu.linkonce.b.*) 203 | . = ALIGN(2); 204 | *(COMMON) 205 | PROVIDE (__bssend = .); 206 | } > RAM 207 | PROVIDE (__bsssize = SIZEOF(.bss)); 208 | 209 | /* This section contains data that is not initialised during load 210 | or application reset. */ 211 | .noinit (NOLOAD) : 212 | { 213 | . = ALIGN(2); 214 | PROVIDE (__noinit_start = .); 215 | *(.noinit) 216 | . = ALIGN(2); 217 | PROVIDE (__noinit_end = .); 218 | end = .; 219 | } > RAM 220 | 221 | /* We create this section so that "end" will always be in the 222 | RAM region (matching .stack below), even if the .bss 223 | section is empty. */ 224 | .heap (NOLOAD) : 225 | { 226 | . = ALIGN(2); 227 | __heap_start__ = .; 228 | _end = __heap_start__; 229 | PROVIDE (end = .); 230 | KEEP (*(.heap)) 231 | _end = .; 232 | PROVIDE (end = .); 233 | /* This word is here so that the section is not empty, and thus 234 | not discarded by the linker. The actual value does not matter 235 | and is ignored. */ 236 | LONG(0); 237 | __heap_end__ = .; 238 | __HeapLimit = __heap_end__; 239 | } > RAM 240 | /* WARNING: Do not place anything in RAM here. 241 | The heap section must be the last section in RAM and the stack 242 | section must be placed at the very end of the RAM region. */ 243 | 244 | .stack (ORIGIN (RAM) + LENGTH(RAM)) : 245 | { 246 | PROVIDE (__stack = .); 247 | *(.stack) 248 | } 249 | 250 | .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */ 251 | .infoB : {} > INFOB 252 | .infoC : {} > INFOC 253 | .infoD : {} > INFOD 254 | 255 | .MSP430.attributes 0 : 256 | { 257 | KEEP (*(.MSP430.attributes)) 258 | KEEP (*(.gnu.attributes)) 259 | KEEP (*(__TI_build_attributes)) 260 | } 261 | 262 | /* The rest are all not normally part of the runtime image. */ 263 | 264 | /* Stabs debugging sections. */ 265 | .stab 0 : { *(.stab) } 266 | .stabstr 0 : { *(.stabstr) } 267 | .stab.excl 0 : { *(.stab.excl) } 268 | .stab.exclstr 0 : { *(.stab.exclstr) } 269 | .stab.index 0 : { *(.stab.index) } 270 | .stab.indexstr 0 : { *(.stab.indexstr) } 271 | .comment 0 : { *(.comment) } 272 | /* DWARF debug sections. 273 | Symbols in the DWARF debugging sections are relative to the beginning 274 | of the section so we begin them at 0. */ 275 | /* DWARF 1 */ 276 | .debug 0 : { *(.debug) } 277 | .line 0 : { *(.line) } 278 | /* GNU DWARF 1 extensions */ 279 | .debug_srcinfo 0 : { *(.debug_srcinfo) } 280 | .debug_sfnames 0 : { *(.debug_sfnames) } 281 | /* DWARF 1.1 and DWARF 2 */ 282 | .debug_aranges 0 : { *(.debug_aranges) } 283 | .debug_pubnames 0 : { *(.debug_pubnames) } 284 | /* DWARF 2 */ 285 | .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } 286 | .debug_abbrev 0 : { *(.debug_abbrev) } 287 | .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } 288 | .debug_frame 0 : { *(.debug_frame) } 289 | .debug_str 0 : { *(.debug_str) } 290 | .debug_loc 0 : { *(.debug_loc) } 291 | .debug_macinfo 0 : { *(.debug_macinfo) } 292 | /* SGI/MIPS DWARF 2 extensions */ 293 | .debug_weaknames 0 : { *(.debug_weaknames) } 294 | .debug_funcnames 0 : { *(.debug_funcnames) } 295 | .debug_typenames 0 : { *(.debug_typenames) } 296 | .debug_varnames 0 : { *(.debug_varnames) } 297 | /DISCARD/ : { *(.note.GNU-stack) } 298 | } 299 | 300 | 301 | /****************************************************************************/ 302 | /* Include peripherals memory map */ 303 | /****************************************************************************/ 304 | 305 | INCLUDE msp430g2553_symbols.ld 306 | 307 | --------------------------------------------------------------------------------