├── Silicon
├── Intel
│ ├── Tools
│ │ ├── .gitignore
│ │ └── FitGen
│ │ │ ├── GNUmakefile
│ │ │ └── Makefile
│ ├── Vlv2DeviceRefCodePkg
│ │ ├── AcpiTablesPCAT
│ │ │ └── IoTVirtualDevice.asl
│ │ ├── ValleyView2Soc
│ │ │ └── SouthCluster
│ │ │ │ └── Include
│ │ │ │ ├── Rsci.h
│ │ │ │ └── Guid
│ │ │ │ └── Vlv2Variable.h
│ │ └── Include
│ │ │ └── Guid
│ │ │ └── Vlv2DeviceRefCodePkgTokenSpace.h
│ ├── KabylakeSiliconPkg
│ │ ├── SampleCode
│ │ │ ├── IntelGraphicsPeimVbt
│ │ │ │ └── PeiVbt.bin
│ │ │ └── MdeModulePkg
│ │ │ │ └── Include
│ │ │ │ └── Guid
│ │ │ │ └── ConsoleOutDevice.h
│ │ ├── SiPkgPei.dsc
│ │ ├── Include
│ │ │ ├── Ppi
│ │ │ │ └── SiInitPpi.h
│ │ │ └── Library
│ │ │ │ └── SiliconInitLib.h
│ │ ├── Cpu
│ │ │ ├── Include
│ │ │ │ └── CpuAccess.h
│ │ │ ├── Library
│ │ │ │ └── BaseCpuMailboxLibNull
│ │ │ │ │ └── BaseCpuMailboxLibNull.inf
│ │ │ └── IncludePrivate
│ │ │ │ └── CpuPrivateData.h
│ │ ├── Library
│ │ │ ├── PeiSiliconPolicyInitLibFsp
│ │ │ │ ├── PeiPolicyInit.h
│ │ │ │ ├── PeiSiPolicyInit.h
│ │ │ │ └── PeiPolicyInitLib.h
│ │ │ └── PeiSiliconPolicyInitLib
│ │ │ │ ├── PeiSiPolicyInit.h
│ │ │ │ └── PeiPolicyInit.h
│ │ ├── IncludePrivate
│ │ │ └── SiConfigHob.h
│ │ ├── Pch
│ │ │ ├── Include
│ │ │ │ ├── Library
│ │ │ │ │ ├── SecPchLib.h
│ │ │ │ │ ├── PchSmmControlLib.h
│ │ │ │ │ └── PchResetLib.h
│ │ │ │ └── Ppi
│ │ │ │ │ └── Wdt.h
│ │ │ └── Library
│ │ │ │ └── PeiOcWdtLibNull
│ │ │ │ └── PeiOcWdtLibNull.inf
│ │ ├── SystemAgent
│ │ │ ├── AcpiTables
│ │ │ │ └── SaSsdt
│ │ │ │ │ └── SaSsdt.asl
│ │ │ └── Library
│ │ │ │ ├── DxeSaPolicyLib
│ │ │ │ └── DxeSaPolicyLibrary.h
│ │ │ │ └── PeiDxeSmmSaPlatformLib
│ │ │ │ └── SaPlatformLibrary.h
│ │ ├── Hsti
│ │ │ └── Dxe
│ │ │ │ ├── SignedFirmwareUpdate.c
│ │ │ │ ├── MeasuredBootEnforcement.c
│ │ │ │ └── HardwareRootedBootIntegrity.c
│ │ └── Me
│ │ │ └── Include
│ │ │ └── MePolicyCommon.h
│ ├── TigerlakeSiliconPkg
│ │ ├── Fru
│ │ │ ├── TglCpu
│ │ │ │ ├── Pei.dsc
│ │ │ │ ├── PeiLib.dsc
│ │ │ │ ├── Dxe.dsc
│ │ │ │ ├── Include
│ │ │ │ │ └── TcssInfo.h
│ │ │ │ ├── IncludePrivate
│ │ │ │ │ └── Library
│ │ │ │ │ │ └── VtdInitFruLib.h
│ │ │ │ └── CommonLib.dsc
│ │ │ └── TglPch
│ │ │ │ ├── Pei.dsc
│ │ │ │ ├── Dxe.dsc
│ │ │ │ ├── Include
│ │ │ │ └── PchPcieRpInfo.h
│ │ │ │ └── PeiLib.dsc
│ │ ├── Cpu
│ │ │ └── Include
│ │ │ │ ├── CpuAccess.h
│ │ │ │ ├── Register
│ │ │ │ └── CommonMsr.h
│ │ │ │ └── CpuDataStruct.h
│ │ ├── SiPkgPei.dsc
│ │ ├── IpBlock
│ │ │ ├── CpuPcieRp
│ │ │ │ └── IncludePrivate
│ │ │ │ │ └── Library
│ │ │ │ │ └── DxeCpuPcieRpLib.h
│ │ │ ├── Gpio
│ │ │ │ └── LibraryPrivate
│ │ │ │ │ └── DxeGpioNameBufferLib
│ │ │ │ │ └── GpioNameBufferDxe.c
│ │ │ ├── PcieRp
│ │ │ │ └── Library
│ │ │ │ │ └── PeiDxeSmmPchPcieRpLib
│ │ │ │ │ └── PchPcieRpLibInternal.h
│ │ │ ├── SerialIo
│ │ │ │ └── LibraryPrivate
│ │ │ │ │ └── PeiDxeSmmSerialIoPrivateLib
│ │ │ │ │ └── SerialIoPrivateLibInternal.h
│ │ │ └── Graphics
│ │ │ │ └── AcpiTables
│ │ │ │ └── IgfxSsdt.inf
│ │ ├── Pch
│ │ │ ├── Include
│ │ │ │ └── Register
│ │ │ │ │ └── PchRegs.h
│ │ │ └── IncludePrivate
│ │ │ │ ├── PchHybridStorageHob.h
│ │ │ │ └── Library
│ │ │ │ └── SmmPchPrivateLib.h
│ │ ├── SystemAgent
│ │ │ └── AcpiTables
│ │ │ │ └── SaSsdt
│ │ │ │ ├── SaSsdt.asl
│ │ │ │ └── SaSsdt.inf
│ │ ├── Include
│ │ │ ├── Register
│ │ │ │ └── PchDmi14Regs.h
│ │ │ ├── SiConfigHob.h
│ │ │ └── MePolicyCommon.h
│ │ └── SiPkgPeiLib.dsc
│ ├── SimicsIch10Pkg
│ │ ├── IchPreMemoryInclude.fdf
│ │ ├── IchPostMemoryInclude.fdf
│ │ ├── IchUefiBootInclude.fdf
│ │ └── IchCommonLib.dsc
│ ├── SimicsX58SktPkg
│ │ ├── SktPostMemoryInclude.fdf
│ │ ├── SktPreMemoryInclude.fdf
│ │ ├── SktPkgPei.dsc
│ │ ├── SktUefiBootInclude.fdf
│ │ └── SktSecInclude.fdf
│ ├── QuarkSocPkg
│ │ ├── QuarkNorthCluster
│ │ │ ├── Smm
│ │ │ │ └── DxeSmm
│ │ │ │ │ └── QncSmmDispatcher
│ │ │ │ │ └── QNCSmmRegisters.h
│ │ │ ├── Include
│ │ │ │ ├── IntelQNCDxe.h
│ │ │ │ ├── IntelQNCPeim.h
│ │ │ │ └── IntelQNCBase.h
│ │ │ ├── MemoryInit
│ │ │ │ └── Pei
│ │ │ │ │ └── prememinit.h
│ │ │ └── Library
│ │ │ │ ├── MtrrLib
│ │ │ │ └── MtrrLib.uni
│ │ │ │ └── SmmCpuFeaturesLib
│ │ │ │ └── SmmCpuFeaturesLib.uni
│ │ └── QuarkSouthCluster
│ │ │ └── Include
│ │ │ └── IohAccess.h
│ ├── CoffeelakeSiliconPkg
│ │ ├── SiPkgPei.dsc
│ │ ├── Pch
│ │ │ ├── Include
│ │ │ │ ├── Protocol
│ │ │ │ │ └── SmmSmbus.h
│ │ │ │ ├── Library
│ │ │ │ │ ├── SpiLib.h
│ │ │ │ │ ├── SecPchLib.h
│ │ │ │ │ ├── CnviLib.h
│ │ │ │ │ ├── PchSmmControlLib.h
│ │ │ │ │ └── PchResetLib.h
│ │ │ │ ├── Private
│ │ │ │ │ ├── CnlPchLpHsioDx.h
│ │ │ │ │ └── Library
│ │ │ │ │ │ ├── PeiPchDmiLib.h
│ │ │ │ │ │ └── SmmPchPrivateLib.h
│ │ │ │ └── Ppi
│ │ │ │ │ └── Wdt.h
│ │ │ └── Library
│ │ │ │ ├── PeiDxeSmmPchSerialIoLib
│ │ │ │ └── PchSerialIoLibInternal.h
│ │ │ │ ├── Private
│ │ │ │ └── DxeGpioNameBufferLib
│ │ │ │ │ └── GpioNameBufferDxe.c
│ │ │ │ └── PeiOcWdtLibNull
│ │ │ │ ├── PeiOcWdtLibNull.c
│ │ │ │ └── PeiOcWdtLibNull.inf
│ │ ├── SystemAgent
│ │ │ ├── Include
│ │ │ │ ├── Private
│ │ │ │ │ └── Library
│ │ │ │ │ │ └── GraphicsInitLib.h
│ │ │ │ └── SaPciExpressLib.h
│ │ │ ├── MemoryInit
│ │ │ │ └── Include
│ │ │ │ │ └── MrcInterface.h
│ │ │ ├── SaInit
│ │ │ │ └── Dxe
│ │ │ │ │ ├── SwitchableGraphicsInit.h
│ │ │ │ │ └── PcieComplex.h
│ │ │ └── AcpiTables
│ │ │ │ └── SaSsdt
│ │ │ │ └── SaSsdt.asl
│ │ ├── Library
│ │ │ ├── PeiSiliconInitLib
│ │ │ │ └── SiliconInit.c
│ │ │ └── DxeAslUpdateLibNull
│ │ │ │ └── DxeAslUpdateLibNull.inf
│ │ ├── Cpu
│ │ │ ├── Include
│ │ │ │ └── CpuAccess.h
│ │ │ └── Library
│ │ │ │ └── BaseCpuMailboxLibNull
│ │ │ │ └── BaseCpuMailboxLibNull.inf
│ │ ├── Me
│ │ │ └── Include
│ │ │ │ ├── MkhiMsgs.h
│ │ │ │ └── MePolicyHob.h
│ │ ├── Include
│ │ │ ├── Library
│ │ │ │ ├── SiliconInitLib.h
│ │ │ │ └── StallPpiLib.h
│ │ │ ├── Guid
│ │ │ │ └── TcoWdtHob.h
│ │ │ └── SiConfigHob.h
│ │ └── SampleCode
│ │ │ └── MdeModulePkg
│ │ │ └── Include
│ │ │ └── Guid
│ │ │ └── ConsoleOutDevice.h
│ └── IntelSiliconPkg
│ │ ├── Feature
│ │ ├── VTd
│ │ │ ├── IntelVTdDxe
│ │ │ │ ├── IntelVTdDxeExtra.uni
│ │ │ │ └── IntelVTdDxe.uni
│ │ │ ├── IntelVTdPmrPei
│ │ │ │ ├── IntelVTdPmrPeiExtra.uni
│ │ │ │ └── IntelVTdPmrPei.uni
│ │ │ ├── IntelVTdDmarPei
│ │ │ │ ├── IntelVTdDmarPeiExtra.uni
│ │ │ │ └── IntelVTdDmarPei.uni
│ │ │ ├── PlatformVTdSampleDxe
│ │ │ │ ├── PlatformVTdSampleDxeExtra.uni
│ │ │ │ └── PlatformVTdSampleDxe.uni
│ │ │ └── PlatformVTdInfoSamplePei
│ │ │ │ ├── PlatformVTdInfoSamplePeiExtra.uni
│ │ │ │ └── PlatformVTdInfoSamplePei.uni
│ │ └── Capsule
│ │ │ ├── MicrocodeUpdateDxe
│ │ │ ├── MicrocodeUpdateDxeExtra.uni
│ │ │ └── MicrocodeUpdateDxe.uni
│ │ │ ├── Library
│ │ │ └── MicrocodeFlashAccessLibNull
│ │ │ │ └── MicrocodeFlashAccessLibNull.uni
│ │ │ └── MicrocodeCapsuleTxt
│ │ │ └── Microcode
│ │ │ └── Microcode.inf
│ │ └── Include
│ │ ├── Guid
│ │ └── MicrocodeFmp.h
│ │ └── Library
│ │ └── PeiGetVtdPmrAlignmentLib.h
├── NXP
│ ├── Chassis2
│ │ ├── Chassis2.dsc.inc
│ │ └── Library
│ │ │ └── ChassisLib
│ │ │ └── Erratum.h
│ ├── LS1046A
│ │ └── LS1046A.dec
│ ├── LX2160A
│ │ └── LX2160A.dec
│ ├── Chassis3V2
│ │ └── Chassis3V2.dsc.inc
│ ├── LS1043A
│ │ └── LS1043A.dec
│ ├── Library
│ │ └── PL011UartClockLib
│ │ │ └── PL011UartClockLib.c
│ └── Include
│ │ └── Library
│ │ └── SerDes.h
├── Hisilicon
│ ├── Drivers
│ │ ├── HisiAcpiPlatformDxe
│ │ │ ├── UpdateAcpiTable.h
│ │ │ ├── AcpiPlatformExtra.uni
│ │ │ └── AcpiPlatform.uni
│ │ ├── AcpiPlatformDxe
│ │ │ └── UpdateDsdt.h
│ │ └── Smbios
│ │ │ ├── SmbiosMiscDxe
│ │ │ └── Type09
│ │ │ │ └── MiscSystemSlotDesignation.uni
│ │ │ └── MemorySubClassDxe
│ │ │ └── MemorySubClassStrings.uni
│ ├── Include
│ │ ├── Library
│ │ │ ├── CpldIoLib.h
│ │ │ ├── BmcConfigBootLib.h
│ │ │ └── OemSetVirtualMapDesc.h
│ │ └── Guid
│ │ │ └── MemoryMapData.h
│ ├── Hi1610
│ │ ├── Hi1610.dec
│ │ └── Hi1610AcpiTables
│ │ │ └── Hi1610Platform.h
│ ├── Hi1616
│ │ └── Hi1616.dec
│ ├── Hi1620
│ │ ├── Hi1620.dec
│ │ ├── Hi1620OemConfigUiLib
│ │ │ └── OemConfigUiLib.uni
│ │ └── Hi1620AcpiTables
│ │ │ ├── Hi1620Platform.h
│ │ │ └── Dsdt
│ │ │ └── Hi1620Power.asl
│ └── Library
│ │ └── I2CLib
│ │ └── I2CLibInternal.h
├── Socionext
│ └── SynQuacer
│ │ ├── Drivers
│ │ ├── OpteeRngDxe
│ │ │ ├── OpteeRngDxeExtra.uni
│ │ │ └── OpteeRngDxe.uni
│ │ └── Net
│ │ │ └── NetsecDxe
│ │ │ └── netsec_for_uefi
│ │ │ ├── ogma_config.h
│ │ │ └── netsec_sdk
│ │ │ └── include
│ │ │ └── ogma_version.h
│ │ ├── Stage2Tables
│ │ └── GNUmakefile
│ │ └── Include
│ │ ├── Guid
│ │ └── SynQuacerPlatformFormSet.h
│ │ └── Platform
│ │ └── DramInfo.h
├── AMD
│ └── Styx
│ │ └── Common
│ │ └── SocVersion.h
├── RISC-V
│ └── ProcessorPkg
│ │ ├── RiscVProcessorPkgExtra.uni
│ │ ├── Universal
│ │ ├── CpuDxe
│ │ │ ├── CpuDxeExtra.uni
│ │ │ └── CpuDxe.uni
│ │ └── SmbiosDxe
│ │ │ ├── RiscVSmbiosDxeExtra.uni
│ │ │ └── RiscVSmbiosDxe.uni
│ │ ├── Library
│ │ └── RiscVExceptionLib
│ │ │ └── CpuExceptionHandlerLib.uni
│ │ └── RiscVProcessorPkg.uni
├── Marvell
│ └── Include
│ │ ├── Library
│ │ ├── MppLib.h
│ │ ├── UtmiPhyLib.h
│ │ ├── MvComPhyLib.h
│ │ ├── SampleAtResetLib.h
│ │ └── NonDiscoverableInitLib.h
│ │ └── IndustryStandard
│ │ └── MvSmc.h
├── Atmel
│ └── AtSha204a
│ │ └── AtSha204a.dec
└── TexasInstruments
│ └── Omap35xxPkg
│ └── Include
│ └── Library
│ └── OmapLib.h
├── .gitignore
├── Platform
├── Intel
│ ├── Vlv2TbltDevicePkg
│ │ ├── Feature
│ │ │ └── Capsule
│ │ │ │ └── GenerateCapsule
│ │ │ │ ├── NewRoot.cer.gFmpDevicePkgTokenSpaceGuid.PcdFmpDevicePkcs7CertBufferXdr.inc
│ │ │ │ ├── SAMPLE_DEVELOPMENT.cer.gFmpDevicePkgTokenSpaceGuid.PcdFmpDevicePkcs7CertBufferXdr.inc
│ │ │ │ └── SAMPLE_DEVELOPMENT_SAMPLE_PRODUCTION.cer.gFmpDevicePkgTokenSpaceGuid.PcdFmpDevicePkcs7CertBufferXdr.inc
│ │ ├── Logo
│ │ │ └── Logo.bmp
│ │ ├── Stitch
│ │ │ └── IFWIHeader
│ │ │ │ ├── IFWI_HEADER.bin
│ │ │ │ └── IFWI_HEADER_SPILOCK.bin
│ │ ├── IntelGopDepex
│ │ │ └── IntelGopDriver.depex
│ │ ├── Library
│ │ │ └── MultiPlatformLib
│ │ │ │ └── BoardClkGens
│ │ │ │ └── BoardClkGens.h
│ │ ├── SmBiosMiscDxe
│ │ │ ├── MiscProcessorCache.uni
│ │ │ ├── MiscPhysicalArray.uni
│ │ │ ├── MiscSystemOptionString.uni
│ │ │ ├── MiscSystemLanguageString.uni
│ │ │ └── MiscProcessorCacheData.c
│ │ └── PlatformCpuInfoDxe
│ │ │ └── PlatformCpuInfoDxe.h
│ ├── MinPlatformPkg
│ │ ├── Tools
│ │ │ └── Fsp
│ │ │ │ └── pad.bin
│ │ ├── Include
│ │ │ ├── Fdf
│ │ │ │ ├── CorePostMemoryInclude.fdf
│ │ │ │ ├── CoreSecurityPostMemoryInclude.fdf
│ │ │ │ └── CoreSecurityPreMemoryInclude.fdf
│ │ │ └── Library
│ │ │ │ ├── ReportCpuHobLib.h
│ │ │ │ ├── ReportFvLib.h
│ │ │ │ ├── BoardAcpiTableLib.h
│ │ │ │ ├── BoardAcpiEnableLib.h
│ │ │ │ └── SecBoardInitLib.h
│ │ ├── Docs
│ │ │ └── A_Tour_Beyond_BIOS_Open_Source_IA_Firmware_Platform_Design_Guide_in_EFI_Developer_Kit_II - V2.pdf
│ │ ├── PlatformInit
│ │ │ └── Library
│ │ │ │ └── SecBoardInitLibNull
│ │ │ │ └── SecBoardInitLib.c
│ │ ├── Acpi
│ │ │ ├── Library
│ │ │ │ ├── BoardAcpiTableLibNull
│ │ │ │ │ └── BoardAcpiTableLibNull.c
│ │ │ │ └── BoardAcpiEnableLibNull
│ │ │ │ │ └── BoardAcpiEnableLibNull.c
│ │ │ └── AcpiSmm
│ │ │ │ └── AcpiMm.h
│ │ └── Flash
│ │ │ └── SpiFvbService
│ │ │ └── SpiFvbServiceMm.h
│ ├── SimicsOpenBoardPkg
│ │ ├── Logo
│ │ │ └── Logo.bmp
│ │ ├── BoardX58Ich10
│ │ │ └── Library
│ │ │ │ └── BoardInitLib
│ │ │ │ └── PeiX58Ich10InitLib.h
│ │ ├── Include
│ │ │ └── Guid
│ │ │ │ └── SimicsBoardConfig.h
│ │ └── SimicsVideoDxe
│ │ │ └── DriverSupportedEfiVersion.c
│ ├── KabylakeOpenBoardPkg
│ │ ├── Acpi
│ │ │ └── BoardAcpiDxe
│ │ │ │ └── Dsdt
│ │ │ │ ├── PlatformGnvs.asl
│ │ │ │ ├── AMLUPD.asl
│ │ │ │ └── Video.asl
│ │ └── Features
│ │ │ └── Tbt
│ │ │ └── Library
│ │ │ └── PeiTbtPolicyLib
│ │ │ └── PeiTbtPolicyLibrary.h
│ ├── QuarkPlatformPkg
│ │ ├── Platform
│ │ │ └── Dxe
│ │ │ │ └── SmbiosMiscDxe
│ │ │ │ ├── MiscOemString.uni
│ │ │ │ ├── MiscSystemOptionString.uni
│ │ │ │ ├── MiscBiosVendor.uni
│ │ │ │ ├── MiscOemStringData.c
│ │ │ │ ├── MiscOnboardDevice.uni
│ │ │ │ ├── MiscSystemOptionStringData.c
│ │ │ │ └── MiscChassisManufacturer.uni
│ │ ├── Library
│ │ │ └── PlatformSecLib
│ │ │ │ └── PlatformSecLibModStrs.uni
│ │ ├── Acpi
│ │ │ └── AcpiTables
│ │ │ │ └── Dsdt
│ │ │ │ └── QNCLpc.asi
│ │ └── Include
│ │ │ └── Guid
│ │ │ ├── QuarkVariableLock.h
│ │ │ ├── CapsuleOnDataCD.h
│ │ │ └── MemoryConfigData.h
│ ├── BoardModulePkg
│ │ └── LegacySioDxe
│ │ │ └── Register.h
│ ├── CometlakeOpenBoardPkg
│ │ ├── Policy
│ │ │ └── Library
│ │ │ │ └── PeiPolicyUpdateLib
│ │ │ │ ├── PeiMePolicyUpdate.h
│ │ │ │ └── PeiSiPolicyUpdate.h
│ │ ├── CometlakeURvp
│ │ │ └── Library
│ │ │ │ ├── BoardInitLib
│ │ │ │ ├── BoardFunc.c
│ │ │ │ ├── BoardFunc.h
│ │ │ │ └── BoardInitLib.h
│ │ │ │ └── DxePolicyBoardConfigLib
│ │ │ │ └── DxePolicyBoardConfig.h
│ │ ├── Include
│ │ │ ├── Library
│ │ │ │ ├── PlatformInitLib.h
│ │ │ │ ├── DxeSaPolicyUpdateLib.h
│ │ │ │ └── FspPolicyInitLib.h
│ │ │ └── FirwmareConfigurations.h
│ │ ├── Features
│ │ │ └── Tbt
│ │ │ │ ├── Include
│ │ │ │ └── Library
│ │ │ │ │ └── PeiCheckIommuSupportLib.h
│ │ │ │ └── Library
│ │ │ │ └── PeiTbtPolicyLib
│ │ │ │ └── PeiTbtPolicyLibrary.h
│ │ ├── Acpi
│ │ │ └── BoardAcpiDxe
│ │ │ │ └── Dsdt
│ │ │ │ └── AMLUPD.asl
│ │ └── Library
│ │ │ └── AcpiTimerLib
│ │ │ └── BaseAcpiTimerLib.uni
│ ├── WhiskeylakeOpenBoardPkg
│ │ ├── Policy
│ │ │ └── Library
│ │ │ │ └── PeiPolicyUpdateLib
│ │ │ │ ├── PeiMePolicyUpdate.h
│ │ │ │ └── PeiSiPolicyUpdate.h
│ │ ├── Include
│ │ │ ├── Library
│ │ │ │ ├── PlatformInitLib.h
│ │ │ │ ├── DxeSaPolicyUpdateLib.h
│ │ │ │ └── FspPolicyInitLib.h
│ │ │ └── FirwmareConfigurations.h
│ │ ├── UpXtreme
│ │ │ └── Library
│ │ │ │ ├── DxePolicyBoardConfigLib
│ │ │ │ └── DxePolicyBoardConfig.h
│ │ │ │ └── BoardInitLib
│ │ │ │ ├── BoardInitLib.h
│ │ │ │ └── BoardFuncInitPreMem.c
│ │ ├── WhiskeylakeURvp
│ │ │ └── Library
│ │ │ │ ├── DxePolicyBoardConfigLib
│ │ │ │ └── DxePolicyBoardConfig.h
│ │ │ │ └── BoardInitLib
│ │ │ │ ├── BoardInitLib.h
│ │ │ │ └── BoardFuncInitPreMem.c
│ │ ├── Features
│ │ │ └── Tbt
│ │ │ │ ├── Include
│ │ │ │ └── Library
│ │ │ │ │ └── PeiCheckIommuSupportLib.h
│ │ │ │ └── Library
│ │ │ │ └── PeiTbtPolicyLib
│ │ │ │ └── PeiTbtPolicyLibrary.h
│ │ ├── Acpi
│ │ │ └── BoardAcpiDxe
│ │ │ │ └── Dsdt
│ │ │ │ └── AMLUPD.asl
│ │ └── Library
│ │ │ └── AcpiTimerLib
│ │ │ └── BaseAcpiTimerLib.uni
│ └── TigerlakeOpenBoardPkg
│ │ └── Include
│ │ └── PlatformBoardId.h
├── Socionext
│ └── DeveloperBox
│ │ └── Logo
│ │ ├── Logo.bmp
│ │ └── Logo.idf
├── ARM
│ ├── VExpressPkg
│ │ ├── DeviceTree
│ │ │ ├── fvp-base-gicv2-psci.dtb
│ │ │ ├── fvp-base-gicv3-psci.dtb
│ │ │ ├── fvp-base-gicv2legacy-psci.dtb
│ │ │ ├── fvp-foundation-gicv2-psci.dtb
│ │ │ ├── fvp-foundation-gicv3-psci.dtb
│ │ │ └── fvp-foundation-gicv2legacy-psci.dtb
│ │ ├── ArmVExpress-networking.fdf.inc
│ │ └── Library
│ │ │ └── ArmVExpressPciHostBridgeLib
│ │ │ └── ArmVExpressPciHostBridgeLib.uni
│ ├── SgiPkg
│ │ ├── RdN2
│ │ │ └── RdN2.fdf.inc
│ │ ├── RdV1
│ │ │ └── RdV1.fdf.inc
│ │ ├── RdV1Mc
│ │ │ └── RdV1Mc.fdf.inc
│ │ ├── Sgi575
│ │ │ └── Sgi575.fdf.inc
│ │ ├── RdE1Edge
│ │ │ └── RdE1Edge.fdf.inc
│ │ ├── RdN1Edge
│ │ │ └── RdN1Edge.fdf.inc
│ │ ├── RdN1EdgeX2
│ │ │ └── RdN1EdgeX2.fdf.inc
│ │ └── Include
│ │ │ ├── Ppi
│ │ │ └── SgiPlatformId.h
│ │ │ └── Guid
│ │ │ └── SgiVirtioDevicesFormSet.h
│ ├── Include
│ │ └── Library
│ │ │ └── BdsLib.h
│ └── JunoPkg
│ │ └── ConfigurationManager
│ │ └── ConfigurationManager.dsc.inc
├── BeagleBoard
│ └── BeagleBoardPkg
│ │ ├── ConfigurationHeader.bin
│ │ ├── Debugger_scripts
│ │ ├── rvi_dummy.axf
│ │ ├── rvi_boot_from_ram.inc
│ │ ├── rvi_convert_symbols.sh
│ │ └── rvi_load_symbols.inc
│ │ ├── Tools
│ │ ├── GNUmakefile
│ │ └── makefile
│ │ └── PrePi
│ │ └── Arm
│ │ └── ArchPrePi.c
├── NXP
│ ├── Readme.md
│ ├── LX2160aRdbPkg
│ │ └── AcpiTablesInclude
│ │ │ ├── Dsdt
│ │ │ └── Dsdt.asl
│ │ │ └── PlatformAcpiLib.h
│ └── ConfigurationManagerPkg
│ │ └── Include
│ │ └── PlatformAcpiTableGenerator.h
├── SoftIron
│ └── Overdrive1000Board
│ │ └── FdtBlob
│ │ └── styx-overdrive1000.dtb
├── RISC-V
│ └── PlatformPkg
│ │ ├── RiscVPlatformPkgExtra.uni
│ │ ├── RiscVPlatformPkg.uni
│ │ └── Include
│ │ └── Library
│ │ └── RiscVPlatformTempMemoryInitLib.h
├── SiFive
│ └── U5SeriesPkg
│ │ ├── Universal
│ │ └── Dxe
│ │ │ ├── TimerDxe
│ │ │ ├── TimerExtra.uni
│ │ │ └── Timer.uni
│ │ │ └── RamFvbServicesRuntimeDxe
│ │ │ └── RamFlashDxe.c
│ │ ├── FreedomU500VC707Board
│ │ ├── U500PkgExtra.uni
│ │ └── U500.uni
│ │ ├── U5SeriesPkgExtra.uni
│ │ ├── FreedomU540HiFiveUnleashedBoard
│ │ ├── U540PkgExtra.uni
│ │ └── U540.uni
│ │ ├── Include
│ │ ├── SifiveU5Uart.h
│ │ └── U5Clint.h
│ │ ├── U5SeriesPkg.uni
│ │ └── Library
│ │ └── SerialIoLib
│ │ └── U5SerialPortLib.uni
├── Comcast
│ └── Application
│ │ ├── Dri
│ │ └── Dri.c
│ │ ├── SecureBoot
│ │ └── SecureBoot.c
│ │ └── DriSecureBoot
│ │ └── DriSecureBoot.c
├── SolidRun
│ └── Armada80x0McBin
│ │ ├── NonDiscoverableInitLib
│ │ └── NonDiscoverableInitLib.h
│ │ └── Armada80x0McBin.fdf.inc
├── RaspberryPi
│ └── Drivers
│ │ └── ConfigDxe
│ │ ├── ConfigDxe.h
│ │ └── ConfigDxeFormSetGuid.h
├── 96Boards
│ └── Include
│ │ └── Guid
│ │ └── FormSet.h
├── Hisilicon
│ ├── D03
│ │ └── Include
│ │ │ └── Library
│ │ │ └── CpldD03.h
│ ├── D06
│ │ ├── D06.dec
│ │ └── Drivers
│ │ │ └── OemNicConfig2PHi1620
│ │ │ └── OemNicConfig.h
│ └── HiKey
│ │ ├── HiKeyDxe
│ │ └── HiKeyDxe.h
│ │ └── Include
│ │ └── ArmPlatform.h
├── Marvell
│ ├── Armada70x0Db
│ │ ├── NonDiscoverableInitLib
│ │ │ └── NonDiscoverableInitLib.h
│ │ └── Armada70x0Db.fdf.inc
│ └── Armada80x0Db
│ │ └── Armada80x0Db.fdf.inc
└── AMD
│ └── OverdriveBoard
│ └── DeviceTree
│ └── OverdriveBoard.inf
├── Features
└── Intel
│ ├── UserInterface
│ ├── LogoFeaturePkg
│ │ ├── LogoDxe
│ │ │ ├── Logo.bmp
│ │ │ ├── Logo.jpg
│ │ │ ├── Logo.idf
│ │ │ └── JpegLogo.idf
│ │ └── Include
│ │ │ ├── PreMemory.fdf
│ │ │ └── PostMemory.fdf
│ ├── VirtualKeyboardFeaturePkg
│ │ ├── VirtualKeyboardDxe
│ │ │ ├── FullIcon.bmp
│ │ │ ├── SimpleIcon.bmp
│ │ │ ├── DigitKeyboard.bmp
│ │ │ ├── SimpleKeyboard.bmp
│ │ │ ├── CapitalLetterKeyboard.bmp
│ │ │ └── KeyboardLayout.idf
│ │ └── Include
│ │ │ ├── PreMemory.fdf
│ │ │ └── PostMemory.fdf
│ └── UserAuthFeaturePkg
│ │ └── Include
│ │ ├── PreMemory.fdf
│ │ └── PostMemory.fdf
│ ├── SystemInformation
│ ├── SmbiosFeaturePkg
│ │ └── Include
│ │ │ ├── PreMemory.fdf
│ │ │ └── PostMemory.fdf
│ └── Readme.md
│ ├── TemplateFeaturePkg
│ └── Include
│ │ ├── PostMemory.fdf
│ │ └── PreMemory.fdf
│ ├── Debugging
│ ├── Usb3DebugFeaturePkg
│ │ └── Include
│ │ │ ├── PostMemory.fdf
│ │ │ └── PreMemory.fdf
│ ├── AcpiDebugFeaturePkg
│ │ └── Include
│ │ │ ├── PreMemory.fdf
│ │ │ └── PostMemory.fdf
│ └── Readme.md
│ ├── Network
│ ├── NetworkFeaturePkg
│ │ └── Include
│ │ │ ├── PreMemory.fdf
│ │ │ └── PostMemory.fdf
│ └── Readme.md
│ ├── PowerManagement
│ └── S3FeaturePkg
│ │ └── Include
│ │ ├── PostMemory.fdf
│ │ └── PreMemory.fdf
│ └── OutOfBandManagement
│ ├── IpmiFeaturePkg
│ └── Include
│ │ ├── PreMemory.fdf
│ │ └── Library
│ │ └── IpmiPlatformHookLib.h
│ └── Readme.md
├── .gitmodules
└── Drivers
└── OptionRomPkg
├── Bus
└── Usb
│ └── FtdiUsbSerialDxe
│ └── CompatibleDevices.txt
├── AtapiPassThruDxe
└── DriverSupportedEfiVersion.c
└── CirrusLogic5430Dxe
└── DriverSupportedEfiVersion.c
/Silicon/Intel/Tools/.gitignore:
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1 | *.d
2 | *.o
3 | *.obj
4 | *.pdb
5 |
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/.gitignore:
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1 | .DS_Store
2 | *_extdep/
3 | *.pyc
4 | __pycache__/
5 | tags/
6 | .vscode/
7 |
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/Platform/Intel/Vlv2TbltDevicePkg/Feature/Capsule/GenerateCapsule/NewRoot.cer.gFmpDevicePkgTokenSpaceGuid.PcdFmpDevicePkcs7CertBufferXdr.inc:
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2 |
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2 |
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/Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.bmp:
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/Platform/Intel/Vlv2TbltDevicePkg/Feature/Capsule/GenerateCapsule/SAMPLE_DEVELOPMENT_SAMPLE_PRODUCTION.cer.gFmpDevicePkgTokenSpaceGuid.PcdFmpDevicePkcs7CertBufferXdr.inc:
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1 |
2 |
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/Platform/NXP/Readme.md:
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1 | Support for all NXP boards is available in this directory.
2 |
3 | # How to build
4 |
5 | Please follow top-level Readme.md for build instructions..
6 |
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/Platform/ARM/VExpressPkg/DeviceTree/fvp-base-gicv2legacy-psci.dtb:
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/Platform/Intel/Vlv2TbltDevicePkg/IntelGopDepex/IntelGopDriver.depex:
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/Silicon/Intel/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/IoTVirtualDevice.asl:
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1 | [submodule "Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi"]
2 | path = Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
3 | url = https://github.com/riscv/opensbi
4 |
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/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PlatformGnvs.asl:
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1 | /** @file
2 | ACPI DSDT table
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 |
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/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf:
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1 | ## @file
2 | # FDF file of Platform.
3 | #
4 | # Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPostMemoryInclude.fdf:
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1 | ## @file
2 | # FDF file of Platform.
3 | #
4 | # Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Features/Intel/UserInterface/LogoFeaturePkg/Include/PreMemory.fdf:
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1 | ## @file
2 | # FDF file for pre-memory Logo modules.
3 | #
4 | # Copyright (c) 2020, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Silicon/NXP/Chassis2/Chassis2.dsc.inc:
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1 | # @file
2 | #
3 | # Copyright 2020 NXP
4 | #
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | #
8 |
9 | [LibraryClasses.common]
10 | ChassisLib|Silicon/NXP/Chassis2/Library/ChassisLib/ChassisLib.inf
11 |
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/Features/Intel/SystemInformation/SmbiosFeaturePkg/Include/PreMemory.fdf:
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1 | ## @file
2 | # FDF file for pre-memory SMBIOS modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Silicon/NXP/LS1046A/LS1046A.dec:
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1 | # LS1046A.dec
2 | #
3 | # Copyright 2017, 2020 NXP
4 | #
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | #
8 |
9 | [Defines]
10 | DEC_SPECIFICATION = 0x0001001A
11 |
12 | [Includes]
13 | Include
14 |
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/Silicon/NXP/LX2160A/LX2160A.dec:
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1 | # LX2160A.dec
2 | #
3 | # Copyright 2018, 2020 NXP
4 | #
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | #
8 |
9 | [Defines]
10 | DEC_SPECIFICATION = 0x0001001A
11 |
12 | [Includes]
13 | Include
14 |
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/Features/Intel/TemplateFeaturePkg/Include/PostMemory.fdf:
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1 | ## @file
2 | # FDF file for post-memory advanced feature modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
--------------------------------------------------------------------------------
/Features/Intel/TemplateFeaturePkg/Include/PreMemory.fdf:
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1 | ## @file
2 | # FDF file for pre-memory advanced feature modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Platform/Socionext/DeveloperBox/Logo/Logo.idf:
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1 | // @file
2 | // Platform Logo image definition file.
3 | //
4 | // Copyright (c) 2018, Linaro, Ltd. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 |
9 | #image IMG_LOGO Logo.bmp
10 |
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/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Pei.dsc:
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1 | ## @file
2 | # Component description file for the Tigerlake CPU PEI FRU drivers.
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 |
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/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/PeiLib.dsc:
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1 | ## @file
2 | # Component description file for the Tigerlake CPU PEI FRU ibraries.
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
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/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Pei.dsc:
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1 | ## @file
2 | # Component description file for the Tigerlake PCH PEI FRU drivers.
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 |
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/Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc:
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1 | # @file
2 | #
3 | # Copyright 2018-2020 NXP
4 | #
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | #
8 |
9 | [LibraryClasses.common]
10 | ChassisLib|Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf
11 |
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/Features/Intel/Debugging/Usb3DebugFeaturePkg/Include/PostMemory.fdf:
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1 | ## @file
2 | # FDF file for post-memory modules that enable USB3 Debug
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Features/Intel/Debugging/Usb3DebugFeaturePkg/Include/PreMemory.fdf:
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1 | ## @file
2 | # FDF file for pre-memory modules that enable USB3 Debug.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Features/Intel/Network/NetworkFeaturePkg/Include/PreMemory.fdf:
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1 | ## @file
2 | # FDF file for pre-memory Network advanced feature modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf:
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1 | ## @file
2 | # FDF file for post-memory S3 advanced feature modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Features/Intel/Debugging/AcpiDebugFeaturePkg/Include/PreMemory.fdf:
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1 | ## @file
2 | # FDF file for pre-memory ACPI Debug advanced feature modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
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/Features/Intel/Network/Readme.md:
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1 | # **EDK II Minimum Platform Firmware Network Features**
2 |
3 | This feature domain directory contains network related advanced features.
4 |
5 | Features may be added to this domain whose primary role and responsibility is related to network technologies.
6 |
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/Silicon/Intel/SimicsIch10Pkg/IchPreMemoryInclude.fdf:
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1 | ## @file
2 | # Component description file for the Ich10 SiPkg PEI drivers.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 |
--------------------------------------------------------------------------------
/Features/Intel/UserInterface/UserAuthFeaturePkg/Include/PreMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for pre-memory modules that enable User Authentication.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
--------------------------------------------------------------------------------
/Features/Intel/UserInterface/VirtualKeyboardFeaturePkg/Include/PreMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for pre-memory modules that enable Virtual Keyboard.
3 | #
4 | # Copyright (c) 2020, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
--------------------------------------------------------------------------------
/Silicon/Intel/SimicsIch10Pkg/IchPostMemoryInclude.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the Simics Ich10 SiPkg DXE drivers.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 |
--------------------------------------------------------------------------------
/Silicon/Intel/SimicsX58SktPkg/SktPostMemoryInclude.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the Simics X58 SiPkg DXE drivers.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Dxe.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the Tigerlake CPU DXE FRU drivers.
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 |
10 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Docs/A_Tour_Beyond_BIOS_Open_Source_IA_Firmware_Platform_Design_Guide_in_EFI_Developer_Kit_II - V2.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/pftf/edk2-platforms/HEAD/Platform/Intel/MinPlatformPkg/Docs/A_Tour_Beyond_BIOS_Open_Source_IA_Firmware_Platform_Design_Guide_in_EFI_Developer_Kit_II - V2.pdf
--------------------------------------------------------------------------------
/Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.idf:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Platform Logo image definition file.
3 | //
4 | // Copyright (c) 2020, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #image IMG_LOGO Logo.bmp
11 |
--------------------------------------------------------------------------------
/Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/JpegLogo.idf:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Platform Logo image definition file.
3 | //
4 | // Copyright (c) 2020, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #image IMG_LOGO Logo.jpg
11 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Copyright (c) 2016, Hisilicon Limited. All rights reserved.
3 | SPDX-License-Identifier: BSD-2-Clause-Patent
4 | **/
5 |
6 | EFI_STATUS
7 | UpdateAcpiTable (
8 | IN OUT EFI_ACPI_DESCRIPTION_HEADER *TableHeader
9 | );
10 |
11 |
--------------------------------------------------------------------------------
/Silicon/Intel/SimicsX58SktPkg/SktPreMemoryInclude.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the X58 SiPkg PEI drivers.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | INF UefiCpuPkg/CpuMpPei/CpuMpPei.inf
11 |
--------------------------------------------------------------------------------
/Features/Intel/Network/NetworkFeaturePkg/Include/PostMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for post-memory Network advanced feature modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | !include NetworkPkg/Network.fdf.inc
11 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Dxe.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the Tigerlake PCH DXE FRU drivers.
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 | $(PLATFORM_SI_PACKAGE)/IpBlock/Spi/Smm/SpiSmm.inf
10 |
--------------------------------------------------------------------------------
/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for pre-memory S3 advanced feature modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | INF PowerManagement/S3FeaturePkg/S3Pei/S3Pei.inf
11 |
--------------------------------------------------------------------------------
/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmRegisters.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2013-2015 Intel Corporation.
4 |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef QNC_SMM_REGISTERS_H
10 | #define QNC_SMM_REGISTERS_H
11 | #include "CommonHeader.h"
12 |
13 | #endif
14 |
--------------------------------------------------------------------------------
/Platform/ARM/SgiPkg/RdN2/RdN2.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2020, ARM Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-platform additional content of the DXE phase firmware volume
8 |
9 | # ACPI support
10 | INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
11 |
--------------------------------------------------------------------------------
/Platform/ARM/SgiPkg/RdV1/RdV1.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2020, ARM Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-platform additional content of the DXE phase firmware volume
8 |
9 | # ACPI support
10 | INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf
11 |
--------------------------------------------------------------------------------
/Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2020, ARM Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-platform additional content of the DXE phase firmware volume
8 |
9 | # ACPI support
10 | INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
11 |
--------------------------------------------------------------------------------
/Platform/ARM/SgiPkg/Sgi575/Sgi575.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2020, ARM Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-platform additional content of the DXE phase firmware volume
8 |
9 | # ACPI support
10 | INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
11 |
--------------------------------------------------------------------------------
/Drivers/OptionRomPkg/Bus/Usb/FtdiUsbSerialDxe/CompatibleDevices.txt:
--------------------------------------------------------------------------------
1 | The following devices have been confirmed to work with the USB Serial Driver:
2 |
3 | Brand Model Name Product Name Vendor ID Device ID
4 | Gearmo USA_FTDI-36 USB to RS-232 0x0403 0x6001
5 | Sabrent CB-FTDI 0x0403 0x6001
--------------------------------------------------------------------------------
/Features/Intel/SystemInformation/SmbiosFeaturePkg/Include/PostMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for post-memory SMBIOS modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | INF SystemInformation/SmbiosFeaturePkg/SmbiosBasicDxe/SmbiosBasicDxe.inf
11 |
--------------------------------------------------------------------------------
/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2020, ARM Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-platform additional content of the DXE phase firmware volume
8 |
9 | # ACPI support
10 | INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
11 |
--------------------------------------------------------------------------------
/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2020, ARM Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-platform additional content of the DXE phase firmware volume
8 |
9 | # ACPI support
10 | INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
11 |
--------------------------------------------------------------------------------
/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2020, ARM Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-platform additional content of the DXE phase firmware volume
8 |
9 | # ACPI support
10 | INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
11 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Include/TcssInfo.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Register names for TCSS USB devices
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 | #ifndef _TCSS_INFO_H_
8 | #define _TCSS_INFO_H_
9 |
10 | #define MAX_ITBT_PCIE_PORT 4
11 |
12 | #endif
13 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscOemString.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Unicode string used for SMBIOS type 11 record (OEM string)
3 | //
4 | // Copyright (c) 2013-2015 Intel Corporation.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | /=#
11 |
12 | #string STR_MISC_OEM_EN_US #language en-US "Intel SSG"
13 |
--------------------------------------------------------------------------------
/Silicon/Socionext/SynQuacer/Drivers/OpteeRngDxe/OpteeRngDxeExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // OpteeRngDxe Localized Strings and Content
3 | //
4 | // Copyright (c) 2018, Linaro, Ltd. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "OP-TEE RNG DXE Driver"
13 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Cpu/Include/CpuAccess.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Macros to simplify and abstract the interface to CPU configuration.
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 | #ifndef _CPUACCESS_H_
8 | #define _CPUACCESS_H_
9 |
10 | #include "CpuDataStruct.h"
11 |
12 | #endif
13 |
--------------------------------------------------------------------------------
/Silicon/AMD/Styx/Common/SocVersion.h:
--------------------------------------------------------------------------------
1 | #/** @file
2 | # SoC specific defines
3 | #
4 | # Copyright (c) 2018 Linaro, Ltd. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | #**/
9 |
10 | #define STYX_SOC_VERSION_MASK 0xFFF
11 | #define STYX_SOC_VERSION_A0 0x000
12 | #define STYX_SOC_VERSION_B0 0x010
13 | #define STYX_SOC_VERSION_B1 0x011
14 |
--------------------------------------------------------------------------------
/Platform/Intel/BoardModulePkg/LegacySioDxe/Register.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Super I/O register definitions
3 |
4 | Copyright (c) 2010 - 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _REGISTER_H_
10 | #define _REGISTER_H_
11 |
12 | #define EC_COMMAND_PORT 0x66
13 | #define EC_DATA_PORT 0x62
14 |
15 | #endif
16 |
--------------------------------------------------------------------------------
/Platform/RISC-V/PlatformPkg/RiscVPlatformPkgExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // RISC-V Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_PACKAGE_NAME
11 | #language en-US
12 | "RISC-V platform package"
13 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Timer Localized Strings and Content
3 | //
4 | // Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "RISC-V Timer DXE Driver"
13 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/SiPkgPei.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the SkyLake SiPkg PEI drivers.
3 | #
4 | # Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 |
11 | #
12 | # Common
13 | #
14 |
15 | #
16 | # SystemAgent
17 | #
18 |
19 | #
20 | # Cpu
21 | #
22 |
23 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/SiPkgPei.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the TigerLake silicon package PEI drivers.
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 | #
10 | # Common
11 | #
12 |
13 | #
14 | # SystemAgent
15 | #
16 |
17 | #
18 | # Cpu
19 | #
20 |
21 |
--------------------------------------------------------------------------------
/Features/Intel/UserInterface/VirtualKeyboardFeaturePkg/Include/PostMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for post-memory modules that enable Virtual Keyboard.
3 | #
4 | # Copyright (c) 2020, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | INF UserInterface/VirtualKeyboardFeaturePkg/VirtualKeyboardDxe/VirtualKeyboardDxe.inf
11 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/SiPkgPei.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for theCoffee Lake silicon package PEI drivers.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | #
11 | # Common
12 | #
13 |
14 | #
15 | # SystemAgent
16 | #
17 |
18 | #
19 | # Cpu
20 | #
21 |
22 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxeExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // IntelVTdDxe Localized Strings and Content
3 | //
4 | // Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "Intel VTd DXE Driver"
13 |
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/SimicsX58SktPkg/SktPkgPei.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the X58 SiPkg PEI drivers.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | #
11 | # SEC Phase modules
12 | #
13 | UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
14 | UefiCpuPkg/CpuMpPei/CpuMpPei.inf
15 |
--------------------------------------------------------------------------------
/Platform/BeagleBoard/BeagleBoardPkg/Tools/GNUmakefile:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | CC = gcc
8 | CFLAGS = -g
9 |
10 | generate_image: generate_image.c
11 | $(CC) $(CCFLAGS) $(LDFLAGS) -o generate_image generate_image.c
12 |
13 | clean:
14 | rm -f generate_image generate_image.exe
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/IntelQNCDxe.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Public include file for the QNC Dxe
3 |
4 | Copyright (c) 2013-2015 Intel Corporation.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #ifndef __INTEL_QNC_DXE_H__
11 | #define __INTEL_QNC_DXE_H__
12 |
13 | #include
14 | #include
15 |
16 | #endif
17 |
18 |
--------------------------------------------------------------------------------
/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/IntelQNCPeim.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Public include file for the QNC Pei
3 |
4 | Copyright (c) 2013-2015 Intel Corporation.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #ifndef __INTEL_QNC_PEIM_H__
11 | #define __INTEL_QNC_PEIM_H__
12 |
13 | #include
14 | #include
15 |
16 | #endif
17 |
18 |
--------------------------------------------------------------------------------
/Silicon/NXP/LS1043A/LS1043A.dec:
--------------------------------------------------------------------------------
1 | # LS1043A.dec
2 | #
3 | # Copyright 2017-2019 NXP
4 | #
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | #
8 |
9 | [Defines]
10 | DEC_SPECIFICATION = 0x0001001A
11 |
12 | [Guids.common]
13 | gNxpLs1043ATokenSpaceGuid = {0x6834fe45, 0x4aee, 0x4fc6, {0xbc, 0xb5, 0xff, 0x45, 0xb7, 0xa8, 0x71, 0xf2}}
14 |
15 | [Includes]
16 | Include
17 |
--------------------------------------------------------------------------------
/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkgExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // RISC-V Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_PACKAGE_NAME
11 | #language en-US
12 | "RISC-V processor package"
13 |
14 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiMePolicyUpdate.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2020, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 | **/
6 |
7 | #ifndef _PEI_ME_POLICY_UPDATE_H_
8 | #define _PEI_ME_POLICY_UPDATE_H_
9 |
10 | #include
11 | #include
12 |
13 | #endif
14 |
15 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiMePolicyUpdate.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2019, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 | **/
6 |
7 | #ifndef _PEI_ME_POLICY_UPDATE_H_
8 | #define _PEI_ME_POLICY_UPDATE_H_
9 |
10 | #include
11 | #include
12 |
13 | #endif
14 |
15 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500PkgExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // SiFive U500 Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_PACKAGE_NAME
11 | #language en-US
12 | "SiFive U500 package"
13 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/U5SeriesPkgExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // SiFive U5 Series Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_PACKAGE_NAME
11 | #language en-US
12 | "SiFive U5 series platform package"
13 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // AcpiPlatform Localized Strings and Content
3 | //
4 | // Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "ACPI Platform Sample DXE Driver"
13 |
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPeiExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // IntelVTdPmrPei Localized Strings and Content
3 | //
4 | // Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "Intel VTd PMR PEI Driver"
13 |
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/IntelQNCBase.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Public include file for the QNC Base
3 |
4 | Copyright (c) 2013-2015 Intel Corporation.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #ifndef __INTEL_QNC_BASE_H__
11 | #define __INTEL_QNC_BASE_H__
12 |
13 | #include
14 | #include
15 |
16 | #endif
17 |
18 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmarPeiExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // IntelVTdDmarPei Localized Strings and Content
3 | //
4 | // Copyright (c) 2020, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "Intel VTd DMAR PEI Driver"
13 |
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/SmmSmbus.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | SmmSmbus Protocol
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef __EFI_SMM_SMBUS_PROTOCOL_H__
10 | #define __EFI_SMM_SMBUS_PROTOCOL_H__
11 |
12 | extern EFI_GUID gEfiSmmSmbusProtocolGuid;
13 |
14 | #endif
15 |
16 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/Include/Private/Library/GraphicsInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Graphics header file
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _GRAPHICS_INIT_H_
10 | #define _GRAPHICS_INIT_H_
11 |
12 | #include
13 | #include
14 |
15 | #endif
16 |
--------------------------------------------------------------------------------
/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // CpuDxe Localized Strings and Content
3 | //
4 | // Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "RISC-V Architectural DXE Driver"
13 |
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/Tools/FitGen/GNUmakefile:
--------------------------------------------------------------------------------
1 | # @file
2 | # GNUmakefile for building the FitGen utility.
3 | #
4 | # Copyright (c) 2010-2019, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | MAKEROOT ?= $(EDK_TOOLS_PATH)/Source/C
8 |
9 | APPNAME = FitGen
10 |
11 | OBJECTS = FitGen.o
12 |
13 | include $(MAKEROOT)/Makefiles/app.makefile
14 |
15 | LIBS = -lCommon
16 |
17 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxeExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // MicrocodeUpdateDxe Localized Strings and Content
3 | //
4 | // Copyright (c) 2016, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "MicrocodeUpdate DXE Driver"
13 |
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/QuarkSocPkg/QuarkSouthCluster/Include/IohAccess.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Macros to simplify and abstract the interface to PCI configuration.
3 |
4 | Copyright (c) 2013-2015 Intel Corporation.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 |
9 | **/
10 |
11 | #ifndef _IOH_ACCESS_H_
12 | #define _IOH_ACCESS_H_
13 |
14 | #include "Ioh.h"
15 | #include "IohCommonDefinitions.h"
16 |
17 | #endif
18 |
19 |
--------------------------------------------------------------------------------
/Platform/ARM/SgiPkg/Include/Ppi/SgiPlatformId.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2018, ARM Limited. All rights reserved.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #ifndef SGI_PLATFORMID_PPI_
10 | #define SGI_PLATFORMID_PPI_
11 |
12 | // NT_FW_CONFIG DT structure
13 | typedef struct {
14 | UINT64 NtFwConfigDtAddr;
15 | } SGI_NT_FW_CONFIG_INFO_PPI;
16 |
17 | #endif
18 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Library/BoardInitLib/BoardFunc.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | Board's PCD function hook.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #include
10 |
11 | EFI_STATUS
12 | PeiBoardSpecificInitPostMemNull (
13 | VOID
14 | )
15 | {
16 | return EFI_SUCCESS;
17 | }
18 |
19 |
20 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscSystemOptionString.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Miscellaneous System Option Strings
3 | //
4 | // Copyright (c) 2013-2015 Intel Corporation.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | //
9 | // **/
10 |
11 |
12 | /=#
13 |
14 | #string STR_MISC_SYSTEM_OPTION_STRING #language en-US "J1D4:1-2,5-6,9-10Default;2-3CMOS clr,6-7Pswd clr,10-11Recovery"
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdSampleDxe/PlatformVTdSampleDxeExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // PlatformVTdSampleDxe Localized Strings and Content
3 | //
4 | // Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "Platform VTd Sample DXE Driver"
13 |
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Include/Ppi/SiInitPpi.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Silicon Initializtion PPI is used to export End of Silicon
3 | init
4 |
5 | Copyright (c) 2017, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #ifndef _SI_INIT_PPI_H_
11 | #define _SI_INIT_PPI_H_
12 |
13 | extern EFI_GUID gEndOfSiInitPpiGuid;
14 |
15 | #endif // _SI_INIT_PPI_H_
16 |
17 |
--------------------------------------------------------------------------------
/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/Dsdt/Dsdt.asl:
--------------------------------------------------------------------------------
1 | /** @file
2 | Differentiated System Description Table Fields (DSDT)
3 |
4 | Copyright 2020 NXP
5 | Copyright 2020 Puresoftware Ltd.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 |
9 | **/
10 |
11 | #include "Platform.h"
12 |
13 | DefinitionBlock("DsdtTable.aml", "DSDT", 2, "NXP ", "LX2160 ", EFI_ACPI_ARM_OEM_REVISION) {
14 | include ("Clk.asl")
15 | }
16 |
--------------------------------------------------------------------------------
/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxeExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // RISC-V SMBIOS Builder Localized Strings and Content
3 | //
4 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "RISC-V SMBIOS Record Builder DXE Driver"
13 |
14 |
--------------------------------------------------------------------------------
/Features/Intel/Debugging/AcpiDebugFeaturePkg/Include/PostMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for post-memory ACPI Debug advanced feature modules.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | INF Debugging/AcpiDebugFeaturePkg/AcpiDebugDxeSmm/AcpiDebugDxe.inf
11 | INF Debugging/AcpiDebugFeaturePkg/AcpiDebugDxeSmm/AcpiDebugSmm.inf
12 |
--------------------------------------------------------------------------------
/Features/Intel/UserInterface/LogoFeaturePkg/Include/PostMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for post-memory Logo modules.
3 | #
4 | # Copyright (c) 2020, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 | !if gLogoFeaturePkgTokenSpaceGuid.PcdJpgEnable == TRUE
10 | INF LogoFeaturePkg/LogoDxe/JpegLogoDxe.inf
11 | !else
12 | INF LogoFeaturePkg/LogoDxe/LogoDxe.inf
13 | !endif
14 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file of Platform.
3 | #
4 | # Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | !if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
11 | INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
12 | INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
13 | !endif
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Cpu/Include/CpuAccess.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Macros to simplify and abstract the interface to CPU configuration.
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 | #ifndef _CPUACCESS_H_
9 | #define _CPUACCESS_H_
10 |
11 | #include "CpuRegs.h"
12 | #include "CpuDataStruct.h"
13 | #include "CpuPowerMgmt.h"
14 |
15 | #endif
16 |
--------------------------------------------------------------------------------
/Silicon/Marvell/Include/Library/MppLib.h:
--------------------------------------------------------------------------------
1 | /********************************************************************************
2 | Copyright (C) 2016 Marvell International Ltd.
3 |
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | *******************************************************************************/
7 |
8 | #ifndef __MPPLIB_H__
9 | #define __MPPLIB_H__
10 |
11 | EFI_STATUS
12 | MppInitialize (
13 | );
14 |
15 | #endif
16 |
--------------------------------------------------------------------------------
/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/PreMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for pre-memory modules that enable Intelligent Platform Management Interface.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | INF OutOfBandManagement/IpmiFeaturePkg/Frb/FrbPei.inf
11 | INF OutOfBandManagement/IpmiFeaturePkg/IpmiInit/PeiIpmiInit.inf
12 |
--------------------------------------------------------------------------------
/Platform/BeagleBoard/BeagleBoardPkg/Debugger_scripts/rvi_boot_from_ram.inc:
--------------------------------------------------------------------------------
1 | //
2 | // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
3 | //
4 | // SPDX-License-Identifier: BSD-2-Clause-Patent
5 | //
6 | error = continue
7 | unload
8 | error = abort
9 |
10 | setreg @CP15_CONTROL = 0x0005107E
11 | setreg @pc=0x80008208
12 | setreg @cpsr=0x000000D3
13 | dis/D
14 | readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000
15 |
16 |
--------------------------------------------------------------------------------
/Platform/Comcast/Application/Dri/Dri.c:
--------------------------------------------------------------------------------
1 | /*
2 | # Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 | */
7 | #include
8 |
9 | EFI_STATUS
10 | EFIAPI
11 | DriEntryPoint (
12 | IN EFI_HANDLE ImageHandle,
13 | IN EFI_SYSTEM_TABLE *SystemTable
14 | )
15 | {
16 | EFI_STATUS Status;
17 |
18 | Status = RdkHttpBoot ();
19 | return Status;
20 | }
21 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540PkgExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // SiFive U540 Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_PACKAGE_NAME
11 | #language en-US
12 | "SiFive Freedom U540 HiFive Unleashed board package"
13 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiliconInitLib/SiliconInit.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | Silicon Init APIs for MinPlatform BoardInitLib implementations.
3 |
4 | Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #include
10 |
11 | /**
12 | Late Silicon Initialization
13 | **/
14 | VOID
15 | LateSiliconInit (
16 | VOID
17 | )
18 | {
19 | }
20 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Include/CpuAccess.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Macros to simplify and abstract the interface to CPU configuration.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _CPUACCESS_H_
10 | #define _CPUACCESS_H_
11 |
12 | #include "CpuRegs.h"
13 | #include "CpuDataStruct.h"
14 | #include "CpuPowerMgmt.h"
15 |
16 | #endif
17 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePeiExtra.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // PlatformVTdInfoSamplePei Localized Strings and Content
3 | //
4 | // Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PROPERTIES_MODULE_NAME
11 | #language en-US
12 | "Platform VTd Info Sample PEI Driver"
13 |
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Me/Include/MkhiMsgs.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | MKHI Messages
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _MKHI_MSGS_H
10 | #define _MKHI_MSGS_H
11 |
12 | ///
13 | /// End of Post
14 | ///
15 | #define EOP_DISABLED 0
16 | #define EOP_SEND_IN_PEI 1
17 | #define EOP_SEND_IN_DXE 2
18 |
19 | #endif // _MKHI_MSGS_H
20 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Cpu/Include/Register/CommonMsr.h:
--------------------------------------------------------------------------------
1 |
2 | /** @file
3 | CommonMsr.h
4 |
5 | Copyright (c) 2021, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _COMMONMSR_h
10 | #define _COMMONMSR_h
11 | #include
12 |
13 | /**
14 | Special Chipset Usage MSR
15 | **/
16 | #define MSR_SPCL_CHIPSET_USAGE 0x000001FE
17 |
18 | #endif /* _COMMONMSR_h */
19 |
--------------------------------------------------------------------------------
/Platform/ARM/VExpressPkg/ArmVExpress-networking.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2012-2014, ARM Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | #
8 | # Networking stack
9 | #
10 | !include NetworkPkg/Network.fdf.inc
11 |
12 | !if $(INCLUDE_TFTP_COMMAND) == TRUE
13 | #
14 | # TFTP Shell command
15 | #
16 | INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
17 | !endif
18 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLib.c:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2017, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | **/
7 |
8 | #include
9 | #include
10 | #include
11 |
12 | EFI_STATUS
13 | EFIAPI
14 | BoardAfterTempRamInit (
15 | VOID
16 | )
17 | {
18 | return EFI_SUCCESS;
19 | }
20 |
--------------------------------------------------------------------------------
/Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.h:
--------------------------------------------------------------------------------
1 | /**
2 | *
3 | * Copyright (c) 2017, Linaro Ltd. All rights reserved.
4 | * Copyright (c) 2018, Marvell International Ltd. All rights reserved.
5 | *
6 | * SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 | #ifndef __NON_DISCOVERABLE_INIT_LIB_H__
10 | #define __NON_DISCOVERABLE_INIT_LIB_H__
11 |
12 | #define ARMADA_80x0_MCBIN_VBUS0_PIN 15
13 |
14 | #endif
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/MemoryInit/Include/MrcInterface.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file includes all the data structures that the MRC considers "global data".
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _UNIFIED_MrcInterface_h_
10 | #define _UNIFIED_MrcInterface_h_
11 |
12 | #include "Coffeelake/MrcInterface.h"
13 |
14 | #endif
15 |
16 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Include/PchPcieRpInfo.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Pcie Root Port info header
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 |
8 | #ifndef _PCH_PCIERP_INFO_H_
9 | #define _PCH_PCIERP_INFO_H_
10 |
11 | //
12 | // Number of PCIe ports per PCIe controller
13 | //
14 | #define PCH_PCIE_CONTROLLER_PORTS 4u
15 |
16 | #endif
17 |
--------------------------------------------------------------------------------
/Silicon/Intel/Tools/FitGen/Makefile:
--------------------------------------------------------------------------------
1 | # @file
2 | # makefile for building the FitGen utility.
3 | #
4 | # Copyright (c) 2010-2019, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 |
8 | !INCLUDE $(EDK_TOOLS_PATH)\Source\C\Makefiles\ms.common
9 |
10 | APPNAME = FitGen
11 |
12 | LIBS = $(LIB_PATH)\Common.lib
13 |
14 | OBJECTS = FitGen.obj
15 |
16 | !INCLUDE $(EDK_TOOLS_PATH)\Source\C\Makefiles\ms.app
17 |
18 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Include/Library/CpldIoLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2015, Hisilicon Limited. All rights reserved.
4 | * Copyright (c) 2015, Linaro Limited. All rights reserved.
5 | *
6 | * SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 |
10 | #ifndef _CPLD_IO_LIB_H_
11 | #define _CPLD_IO_LIB_H_
12 |
13 | VOID WriteCpldReg(UINTN ulRegAddr, UINT8 ulValue);
14 | UINT8 ReadCpldReg(UINTN ulRegAddr);
15 |
16 | #endif /* _CPLD_IO_LIB_H_ */
17 |
--------------------------------------------------------------------------------
/Silicon/Intel/SimicsIch10Pkg/IchUefiBootInclude.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the Simics Ich10 SiPkg DXE drivers.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
11 | INF $(PCH_PKG)/SmmControl/RuntimeDxe/SmmControl2Dxe.inf
12 | INF $(PCH_PKG)/Spi/Smm/PchSpiSmm.inf
13 | !endif
14 |
--------------------------------------------------------------------------------
/Silicon/Intel/SimicsIch10Pkg/IchCommonLib.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the Simics Ich10 SiPkg DXE libraries.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | [LibraryClasses.common]
11 | ResetSystemLib|$(PCH_PKG)/Library/ResetSystemLib/ResetSystemLib.inf
12 | PchSpiCommonLib|$(PCH_PKG)/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
13 |
--------------------------------------------------------------------------------
/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright 2018, 2020 NXP
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #include
10 | #include
11 |
12 | /**
13 | Return clock in for PL011 Uart IP
14 | **/
15 | UINT32
16 | EFIAPI
17 | PL011UartClockGetFreq (
18 | VOID
19 | )
20 | {
21 | return gPlatformGetClockPpi.PlatformGetClock (NXP_UART_CLOCK, 0);
22 | }
23 |
--------------------------------------------------------------------------------
/Silicon/Socionext/SynQuacer/Stage2Tables/GNUmakefile:
--------------------------------------------------------------------------------
1 | ## @file
2 | #
3 | # Copyright (c) 2018, Linaro, Ltd. All rights reserved.
4 | #
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 | .PHONY: all
10 | all: $(OUTPUT_DIR)/Stage2Tables.bin
11 |
12 | $(OUTPUT_DIR)/Stage2Tables.bin: $(OUTPUT_DIR)/Stage2Tables.elf
13 | $(OBJCOPY) $(OBJCOPY_FLAGS) $(^) $(@)
14 |
15 | $(OUTPUT_DIR)/Stage2Tables.elf: $(MODULE_DIR)/Stage2Tables.S
16 | $(ASM) $(ASM_FLAGS) -o $(@) $(^)
17 |
--------------------------------------------------------------------------------
/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | //
3 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
4 | //
5 | // SPDX-License-Identifier: BSD-2-Clause-Patent
6 | //
7 | // **/
8 |
9 | #string STR_MODULE_ABSTRACT #language en-US "RISC-V Processor SMBIOS Builder"
10 |
11 | #string STR_MODULE_DESCRIPTION #language en-US "Build RISC-V Processor SMBIOS Type 4, 7, 44 records."
12 |
13 |
--------------------------------------------------------------------------------
/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2020, Andrei Warkentin
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #ifndef _CONFIG_DXE_H_
10 | #define _CONFIG_DXE_H_
11 |
12 | #include
13 | #include
14 |
15 | VOID RegisterXhciQuirkHandler (
16 | IN RASPBERRY_PI_FIRMWARE_PROTOCOL *FwProtocol
17 | );
18 |
19 | #endif /* _CONFIG_DXE_H_ */
20 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Drivers/AcpiPlatformDxe/UpdateDsdt.h:
--------------------------------------------------------------------------------
1 | /*
2 | *
3 | * Copyright (c) 2014, Applied Micro Circuits Corporation
4 | * Copyright (c) 2020, Hisilicon Limited. All rights reserved.
5 | * Copyright (c) 2015, Linaro Limited. All rights reserved.
6 | * Author: Loc Ho
7 | *
8 | * SPDX-License-Identifier: BSD-2-Clause-Patent
9 | */
10 | #ifndef UPDATE_DSDT_H_
11 | #define UPDATE_DSDT_H_
12 |
13 | EFI_STATUS UpdateAcpiDsdtTable (VOID);
14 |
15 | #endif
16 |
17 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Me/Include/MePolicyHob.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains definitions of ME Policy HOB.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _ME_POLICY_HOB_H_
10 | #define _ME_POLICY_HOB_H_
11 |
12 | #include
13 |
14 | extern EFI_GUID gMePolicyHobGuid;
15 | extern EFI_GUID gMePreMemPolicyHobGuid;
16 |
17 | #endif // _ME_POLICY_HOB_H_
18 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmPchSerialIoLib/PchSerialIoLibInternal.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for PchSerialIoLibInternal.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PCH_SERIAL_IO_LIB_INTERNAL_H_
10 | #define _PCH_SERIAL_IO_LIB_INTERNAL_H_
11 |
12 | typedef struct {
13 | UINT8 DevNum;
14 | UINT8 FuncNum;
15 | } SERIAL_IO_BDF_NUMBERS;
16 | #endif
17 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Include/Guid/MicrocodeFmp.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2016, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | **/
7 |
8 | #ifndef __MICROCODE_FMP_GUID_H__
9 | #define __MICROCODE_FMP_GUID_H__
10 |
11 | #define MICROCODE_FMP_IMAGE_TYPE_ID_GUID { 0x96d4fdcd, 0x1502, 0x424d, { 0x9d, 0x4c, 0x9b, 0x12, 0xd2, 0xdc, 0xae, 0x5c } }
12 |
13 | extern EFI_GUID gMicrocodeFmpImageTypeIdGuid;
14 |
15 | #endif
16 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/CpuPcieRp/IncludePrivate/Library/DxeCpuPcieRpLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for private DxeCpuPcieRpLib.
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 | #ifndef _DXE_PCIE_RP_INIT_LIB_H_
8 | #define _DXE_PCIE_RP_INIT_LIB_H_
9 |
10 | /**
11 | Update CPU PCIE RP NVS AREA tables
12 |
13 | **/
14 | VOID
15 | UpdateCpuPcieNVS (
16 | VOID
17 | );
18 | #endif
19 |
--------------------------------------------------------------------------------
/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | //
3 | // Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
4 | //
5 | // SPDX-License-Identifier: BSD-2-Clause-Patent
6 | //
7 | // **/
8 |
9 |
10 | #string STR_MODULE_ABSTRACT #language en-US "Installs RISC-V CPU Architecture Protocol"
11 |
12 | #string STR_MODULE_DESCRIPTION #language en-US "RISC-V CPU driver installs CPU Architecture Protocol."
13 |
14 |
--------------------------------------------------------------------------------
/Platform/96Boards/Include/Guid/FormSet.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2018, Linaro Limited. All rights reserved.
4 |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef __96BOARDS_FORMSET_H__
10 | #define __96BOARDS_FORMSET_H__
11 |
12 | #define NINETY_SIX_BOARDS_FORMSET_GUID \
13 | { 0x7500c9d2, 0x9203, 0x4a37, { 0x84, 0xbb, 0x92, 0xa9, 0xce, 0x34, 0x38, 0xbd } }
14 |
15 | extern EFI_GUID g96BoardsFormsetGuid;
16 |
17 | #endif // __96BOARDS_FORMSET_H__
18 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Library/BoardInitLib/BoardFunc.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for Board Hook function intance.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _BOARD_FUNC_H_
10 | #define _BOARD_FUNC_H_
11 |
12 | #include
13 |
14 | EFI_STATUS
15 | PeiBoardSpecificInitPostMemNull (
16 | VOID
17 | );
18 |
19 | #endif // _BOARD_FUNC_H_
20 |
21 |
--------------------------------------------------------------------------------
/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | //
3 | // Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
4 | //
5 | // SPDX-License-Identifier: BSD-2-Clause-Patent
6 | //
7 | // **/
8 |
9 |
10 | #string STR_MODULE_ABSTRACT #language en-US "RISC-V CPU Exception Handler Librarys."
11 |
12 | #string STR_MODULE_DESCRIPTION #language en-US "RISC-V CPU Exception Handler Librarys."
13 |
14 |
--------------------------------------------------------------------------------
/Platform/ARM/Include/Library/BdsLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2013-2015, ARM Limited. All rights reserved.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #ifndef __BDS_ENTRY_H__
10 | #define __BDS_ENTRY_H__
11 |
12 | EFI_STATUS
13 | BdsLoadImage (
14 | IN EFI_DEVICE_PATH *DevicePath,
15 | IN EFI_ALLOCATE_TYPE Type,
16 | IN OUT EFI_PHYSICAL_ADDRESS* Image,
17 | OUT UINTN *FileSize
18 | );
19 |
20 | #endif
21 |
--------------------------------------------------------------------------------
/Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ArchPrePi.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #include "PrePi.h"
10 |
11 | VOID
12 | ArchInitialize (
13 | VOID
14 | )
15 | {
16 | // Enable program flow prediction, if supported.
17 | ArmEnableBranchPrediction ();
18 |
19 | if (FixedPcdGet32 (PcdVFPEnabled)) {
20 | ArmEnableVFP ();
21 | }
22 | }
23 |
24 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Acpi/Library/BoardAcpiTableLibNull/BoardAcpiTableLibNull.c:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2017, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | **/
7 |
8 | #include
9 |
10 | EFI_STATUS
11 | EFIAPI
12 | BoardUpdateAcpiTable (
13 | IN OUT EFI_ACPI_COMMON_HEADER *Table,
14 | IN OUT EFI_ACPI_TABLE_VERSION *Version
15 | )
16 | {
17 | return EFI_SUCCESS;
18 | }
19 |
20 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Pch/Include/Register/PchRegs.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Generic register definitions for PCH.
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 | #ifndef _PCH_REGS_H_
8 | #define _PCH_REGS_H_
9 |
10 | ///
11 | /// The default PCH PCI segment and bus number
12 | ///
13 | #define DEFAULT_PCI_SEGMENT_NUMBER_PCH 0
14 | #define DEFAULT_PCI_BUS_NUMBER_PCH 0
15 |
16 | #endif //_PCH_REGS_H_
17 |
--------------------------------------------------------------------------------
/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCache.uni:
--------------------------------------------------------------------------------
1 | // *++
2 | //
3 | // Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.
4 | // SPDX-License-Identifier: BSD-2-Clause-Patent
5 | //
6 | //
7 | // Module Name:
8 | //
9 | // MiscProcessorCache.uni
10 | //
11 | // Abstract:
12 | //
13 | //
14 | // Revision History:
15 | //
16 | // --*/
17 |
18 |
19 | /=#
20 | #langdef en-US "English"
21 |
22 | #string STR_SOCKET_DESIGNATION #language en-US "0x01"
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/Include/SifiveU5Uart.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | SiFive U5 series UART header file. This is the wrapper file
3 | of sifive-uart.h under opensib include/sbi_utils/serial.
4 |
5 | Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 |
9 | **/
10 | #ifndef SIFIVE_U5_SERIES_UART_H_
11 | #define SIFIVE_U5_SERIES_UART_H_
12 |
13 | #include
14 |
15 | #endif
16 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SaInit/Dxe/SwitchableGraphicsInit.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the SwitchableGraphics Dxe driver.
3 | This driver loads SwitchableGraphics ACPI tables.
4 |
5 | Copyright (c) 2019 Intel Corporation. All rights reserved.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 | **/
9 |
10 | #ifndef _SWITCHABLE_GRAPHICS_DXE_H_
11 | #define _SWITCHABLE_GRAPHICS_DXE_H_
12 |
13 |
14 | #include
15 |
16 |
17 | #endif
18 |
--------------------------------------------------------------------------------
/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # dsc include file for Configuration Manager
3 | #
4 | # Copyright (c) 2017 - 2020, Arm Limited. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | ##
8 |
9 | [Defines]
10 |
11 | [BuildOptions]
12 |
13 | [LibraryClasses.common]
14 |
15 | [Components.common]
16 | # Configuration Manager
17 | Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
18 |
--------------------------------------------------------------------------------
/Platform/BeagleBoard/BeagleBoardPkg/Tools/makefile:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | all: GenerateImage replace
8 |
9 | GenerateImage: generate_image.c
10 | $(CC) $(CCFLAGS) $(LDFLAGS) -o GenerateImage.exe generate_image.c
11 |
12 | replace: replace.c
13 | $(CC) $(CCFLAGS) $(LDFLAGS) -o replace.exe replace.c
14 |
15 | clean:
16 | del GenerateImage.exe generate_image.obj replace.exe replace.obj
17 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Include/Library/PlatformInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Function prototype of PlatformInitLib.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PLATFORM_INIT_LIB_H_
10 | #define _PLATFORM_INIT_LIB_H_
11 |
12 | VOID
13 | PlatformLateInit (
14 | VOID
15 | );
16 |
17 | VOID
18 | InitSerialPort (
19 | VOID
20 | );
21 |
22 | #endif // _PLATFORM_INIT_LIB_H_
23 |
24 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/Library/PlatformInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Function prototype of PlatformInitLib.
3 |
4 |
5 | Copyright (c) 2019, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PLATFORM_INIT_LIB_H_
10 | #define _PLATFORM_INIT_LIB_H_
11 |
12 | VOID
13 | PlatformLateInit (
14 | VOID
15 | );
16 |
17 | VOID
18 | InitSerialPort (
19 | VOID
20 | );
21 |
22 | #endif // _PLATFORM_INIT_LIB_H_
23 |
24 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/RamFlashDxe.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | Ram flash device for EFI variable
3 |
4 | Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #include
11 |
12 | #include "RamFlash.h"
13 |
14 | VOID
15 | RamFlashConvertPointers (
16 | VOID
17 | )
18 | {
19 | EfiConvertPointer (0x0, (VOID **) &mFlashBase);
20 | }
21 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Include/Library/SiliconInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2019, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | **/
7 |
8 | #ifndef _SILICON_INIT_LIB_H_
9 | #define _SILICON_INIT_LIB_H_
10 |
11 | #include
12 |
13 | VOID
14 | EarlySiliconInit (
15 | VOID
16 | );
17 |
18 | VOID
19 | SiliconInit (
20 | VOID
21 | );
22 |
23 | VOID
24 | LateSiliconInit (
25 | VOID
26 | );
27 |
28 | #endif
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiPolicyInit.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PolicyInitPei PEIM.
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef _PEI_POLICY_INIT_H_
10 | #define _PEI_POLICY_INIT_H_
11 |
12 | #include
13 | #include
14 | #include
15 |
16 | #include "PeiSiPolicyInit.h"
17 |
18 | #endif
19 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/PeiLib.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the Tigerlake PCH PEI FRU libraries.
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 | GpioHelpersLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/PeiGpioHelpersLib/PeiGpioHelpersLib.inf
10 | GpioNameBufferLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/PeiGpioNameBufferLib/PeiGpioNameBufferLib.inf
11 |
--------------------------------------------------------------------------------
/Silicon/Intel/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Rsci.h:
--------------------------------------------------------------------------------
1 | /*++
2 | Copyright (c) 1996 - 2014, Intel Corporation.
3 |
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 |
7 |
8 | Module Name:
9 |
10 |
11 |
12 | Abstract:
13 |
14 |
15 |
16 | --*/
17 |
18 | #ifndef _RSCI_H
19 | #define _RSCI_H
20 |
21 | typedef enum {
22 | NOT_APPLICABLE_RESET = 0,
23 | WARM_RESET = 1,
24 | COLD_RESET = 2,
25 | GLOBAL_RESET = 7,
26 | }ANDROID_RESET_TYPE;
27 |
28 | #endif
29 |
--------------------------------------------------------------------------------
/Silicon/Marvell/Include/Library/UtmiPhyLib.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | Copyright (C) 2016 Marvell International Ltd.
3 |
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | *******************************************************************************/
7 |
8 | #ifndef __UTMIPHYLIB_H__
9 | #define __UTMIPHYLIB_H__
10 |
11 | #include
12 |
13 | EFI_STATUS
14 | UtmiPhyInit (
15 | VOID
16 | );
17 |
18 | #endif
19 |
--------------------------------------------------------------------------------
/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/Library/BoardInitLib/PeiX58Ich10InitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Copyright (c) 2019 Intel Corporation. All rights reserved.
3 |
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 | **/
6 |
7 | #ifndef _PEI_X58Ich10_BOARD_INIT_LIB_H_
8 | #define _PEI_X58Ich10_BOARD_INIT_LIB_H_
9 |
10 | #include
11 | #include
12 | #include
13 | #include
14 | #include
15 |
16 | #endif
17 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatform.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Sample ACPI Platform Driver
3 | //
4 | // Sample ACPI Platform Driver
5 | //
6 | // Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
7 | //
8 | // SPDX-License-Identifier: BSD-2-Clause-Patent
9 | //
10 | // **/
11 |
12 |
13 | #string STR_MODULE_ABSTRACT #language en-US "Sample ACPI Platform Driver"
14 |
15 | #string STR_MODULE_DESCRIPTION #language en-US "Sample ACPI Platform Driver"
16 |
17 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Include/Library/ReportCpuHobLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Report CPU HOB library
4 |
5 | This library report the CPU HOB with Physical Address bits.
6 |
7 | Copyright (c) 2020, Intel Corporation. All rights reserved.
8 | SPDX-License-Identifier: BSD-2-Clause-Patent
9 |
10 | **/
11 |
12 | #ifndef _REPORT_CPU_HOB_LIB_H_
13 | #define _REPORT_CPU_HOB_LIB_H_
14 |
15 | #include
16 | #include
17 |
18 | VOID
19 | ReportCpuHob (
20 | VOID
21 | );
22 |
23 | #endif
24 |
--------------------------------------------------------------------------------
/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Defines Platform BoardIds
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 |
8 | #ifndef _PLATFORM_BOARD_ID_H_
9 | #define _PLATFORM_BOARD_ID_H_
10 |
11 | // TigerLake Sku IDs
12 | #define SkuIdTglU 0x1
13 |
14 | // TigerLake Board Id 0x01
15 | #define BoardIdTglUDdr4 0x01
16 |
17 | #endif // _PLATFORM_BOARD_ID_H_
18 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2017, Hisilicon Limited. All rights reserved.
4 | * Copyright (c) 2017, Linaro Limited. All rights reserved.
5 | *
6 | * SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 |
10 | #ifndef _BMC_CONFIG_BOOT_LIB_H_
11 | #define _BMC_CONFIG_BOOT_LIB_H_
12 |
13 | VOID
14 | EFIAPI
15 | RestoreBootOrder (
16 | VOID
17 | );
18 |
19 | VOID
20 | EFIAPI
21 | HandleBmcBootType (
22 | VOID
23 | );
24 |
25 | #endif
26 |
--------------------------------------------------------------------------------
/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/prememinit.h:
--------------------------------------------------------------------------------
1 | /************************************************************************
2 | *
3 | * Copyright (c) 2013-2015 Intel Corporation.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | ************************************************************************/
8 | #ifndef __PREMEMINIT_H_
9 | #define __PREMEMINIT_H_
10 |
11 | // Function prototypes
12 | void PreMemInit(MRCParams_t *mrc_params);
13 |
14 |
15 | #endif // _PREMEMINIT_H_
16 |
--------------------------------------------------------------------------------
/Platform/Hisilicon/D03/Include/Library/CpldD03.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2015, Hisilicon Limited. All rights reserved.
4 | * Copyright (c) 2015, Linaro Limited. All rights reserved.
5 | *
6 | * SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 |
10 | #ifndef __CPLD_D03_H__
11 | #define __CPLD_D03_H__
12 |
13 | #define CPLD_BIOSINDICATE_FLAG 0x09
14 | #define CPLD_I2C_SWITCH_FLAG 0x17
15 | #define CPU_GET_I2C_CONTROL BIT2
16 | #define BMC_I2C_STATUS BIT3
17 |
18 |
19 | #endif
20 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Definitions common to MM implementation in this driver.
3 |
4 | Copyright (c) Microsoft Corporation.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef _SPI_FVB_SERVICE_MM_H_
10 | #define _SPI_FVB_SERVICE_MM_H_
11 |
12 | /**
13 | The function does the necessary initialization work for
14 | Firmware Volume Block Driver.
15 |
16 | **/
17 | VOID
18 | FvbInitialize (
19 | VOID
20 | );
21 |
22 | #endif
23 |
--------------------------------------------------------------------------------
/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscPhysicalArray.uni:
--------------------------------------------------------------------------------
1 | // *++
2 | //
3 | // Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.
4 | // SPDX-License-Identifier: BSD-2-Clause-Patent
5 | //
6 | //
7 | // Module Name:
8 | //
9 | // MiscPhysicalArray.uni
10 | //
11 | // Abstract:
12 | //
13 | // BIOS Physical Memory
14 | // SMBIOS type 16.
15 | //
16 | // Revision History:
17 | //
18 | // --*/
19 |
20 |
21 | /=#
22 | #langdef en-US "English"
23 |
24 |
25 |
26 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Include/Library/SiliconInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2017, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | **/
7 |
8 | #ifndef _SILICON_INIT_LIB_H_
9 | #define _SILICON_INIT_LIB_H_
10 |
11 | ///@todo it should be moved to Si Pkg.
12 |
13 | VOID
14 | EarlySiliconInit (
15 | VOID
16 | );
17 |
18 | VOID
19 | SiliconInit (
20 | VOID
21 | );
22 |
23 | VOID
24 | LateSiliconInit (
25 | VOID
26 | );
27 |
28 | #endif
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/IncludePrivate/SiConfigHob.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Silicon Config HOB is used for gathering platform
3 | related Intel silicon information and config setting.
4 |
5 | Copyright (c) 2017, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #ifndef _SI_CONFIG_HOB_H_
11 | #define _SI_CONFIG_HOB_H_
12 |
13 | #include
14 |
15 | extern EFI_GUID gSiConfigHobGuid;
16 |
17 | typedef CONST SI_CONFIG SI_CONFIG_HOB;
18 | #endif
19 |
--------------------------------------------------------------------------------
/Silicon/Socionext/SynQuacer/Include/Guid/SynQuacerPlatformFormSet.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2017, Linaro Limited. All rights reserved.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #ifndef __SYNQUACER_PLATFORM_FORMSET_H__
10 | #define __SYNQUACER_PLATFORM_FORMSET_H__
11 |
12 | #define SYNQUACER_PLATFORM_FORMSET_GUID \
13 | { 0xe9cd576a, 0xaf9a, 0x4d41, { 0xbf, 0x1a, 0x29, 0xe1, 0xbc, 0x99, 0x99, 0x54 } }
14 |
15 | extern EFI_GUID gSynQuacerPlatformFormSetGuid;
16 |
17 | #endif
18 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Include/FirwmareConfigurations.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This header file provides definitions of firmware configuration.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _FIRMWARE_CONFIGURATION_H_
10 | #define _FIRMWARE_CONFIGURATION_H_
11 |
12 | typedef enum {
13 | FwConfigDefault = 0,
14 | FwConfigProduction,
15 | FwConfigTest,
16 | FwConfigMax
17 | } FW_CONFIG;
18 |
19 | #endif
20 |
21 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiSiPolicyUpdate.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for PEI SiPolicyUpdate.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_SI_POLICY_UPDATE_H_
10 | #define _PEI_SI_POLICY_UPDATE_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 |
17 | #endif
18 |
19 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/FirwmareConfigurations.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This header file provides definitions of firmware configuration.
3 |
4 |
5 | Copyright (c) 2019, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _FIRMWARE_CONFIGURATION_H_
10 | #define _FIRMWARE_CONFIGURATION_H_
11 |
12 | typedef enum {
13 | FwConfigDefault = 0,
14 | FwConfigProduction,
15 | FwConfigTest,
16 | FwConfigMax
17 | } FW_CONFIG;
18 |
19 | #endif
20 |
21 |
--------------------------------------------------------------------------------
/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeFormSetGuid.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2018 Andrei Warkentin
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #ifndef CONFIGDXE_FORM_SET_GUID_H
10 | #define CONFIGDXE_FORM_SET_GUID_H
11 |
12 | #define CONFIGDXE_FORM_SET_GUID \
13 | {0xCD7CC258, 0x31DB, 0x22E6, {0x9F, 0x22, 0x63, 0xB0, 0xB8, 0xEE, 0xD6, 0xB5}}
14 |
15 | extern EFI_GUID gConfigDxeFormSetGuid;
16 |
17 | #endif /* CONFIGDXE_FORM_SET_GUID_H */
18 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Hi1610/Hi1610.dec:
--------------------------------------------------------------------------------
1 | #/** @file
2 | #
3 | # Copyright (c) 2018, Hisilicon Limited. All rights reserved.
4 | # Copyright (c) 2018, Linaro Limited. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | #**/
9 |
10 | [Defines]
11 | DEC_SPECIFICATION = 0x0001001A
12 | PACKAGE_NAME = Hi1610Pkg
13 | PACKAGE_GUID = 0063d37d-adab-47b4-9926-af83539ea167
14 | PACKAGE_VERSION = 0.1
15 |
16 | [Includes]
17 | Include
18 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Hi1616/Hi1616.dec:
--------------------------------------------------------------------------------
1 | #/** @file
2 | #
3 | # Copyright (c) 2018, Hisilicon Limited. All rights reserved.
4 | # Copyright (c) 2018, Linaro Limited. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | #**/
9 |
10 | [Defines]
11 | DEC_SPECIFICATION = 0x0001001A
12 | PACKAGE_NAME = Hi1616Pkg
13 | PACKAGE_GUID = 8a64c436-bcd6-4850-9de3-f9c922bb815a
14 | PACKAGE_VERSION = 0.1
15 |
16 | [Includes]
17 | Include
18 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Hi1620/Hi1620.dec:
--------------------------------------------------------------------------------
1 | #/** @file
2 | #
3 | # Copyright (c) 2018, Hisilicon Limited. All rights reserved.
4 | # Copyright (c) 2018, Linaro Limited. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | #**/
9 |
10 | [Defines]
11 | DEC_SPECIFICATION = 0x0001001A
12 | PACKAGE_NAME = Hi1620Pkg
13 | PACKAGE_GUID = 2553756f-07ca-45a2-b30b-a2fae452e7f6
14 | PACKAGE_VERSION = 0.1
15 |
16 | [Includes]
17 | Include
18 |
--------------------------------------------------------------------------------
/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the Simics X58 SiPkg DXE drivers.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
11 | INF $(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf
12 | INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
13 | !endif
14 | INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for Spi Library.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _SPI_LIB_H_
10 | #define _SPI_LIB_H_
11 |
12 | /**
13 | This function Initial SPI services
14 |
15 | @retval EFI_STATUS Results of the installation of the SPI services
16 | **/
17 | EFI_STATUS
18 | EFIAPI
19 | SpiServiceInit (
20 | VOID
21 | );
22 |
23 | #endif
24 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaSsdt.asl:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains the SystemAgent SSDT Table ASL code.
3 | It defines a Global NVS table which exchanges datas between OS
4 | and BIOS.
5 |
6 | Copyright (c) 2021, Intel Corporation. All rights reserved.
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 | **/
9 |
10 | DefinitionBlock (
11 | "SaSsdt.aml",
12 | "SSDT",
13 | 0x02,
14 | "SaSsdt",
15 | "SaSsdt ",
16 | 0x3000
17 | )
18 | {
19 | Include ("Sa.asl")
20 | }
21 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiSiPolicyUpdate.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for PEI SiPolicyUpdate.
3 |
4 |
5 | Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_SI_POLICY_UPDATE_H_
10 | #define _PEI_SI_POLICY_UPDATE_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 |
17 | #endif
18 |
19 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | //
3 | // RISC-V Timer Arch protocol strings.
4 | //
5 | // Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.
6 | //
7 | // SPDX-License-Identifier: BSD-2-Clause-Patent
8 | //
9 | // **/
10 |
11 |
12 | #string STR_MODULE_ABSTRACT #language en-US "RISC-V timer driver that provides Timer Arch protocol"
13 |
14 | #string STR_MODULE_DESCRIPTION #language en-US "RISC-V timer driver that provides Timer Arch protocol."
15 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignation.uni:
--------------------------------------------------------------------------------
1 | // *++
2 | //
3 | // Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
4 | // Copyright (c) 2016, Hisilicon Limited. All rights reserved.
5 | // Copyright (c) 2016, Linaro Limited. All rights reserved.
6 | //
7 | // SPDX-License-Identifier: BSD-2-Clause-Patent
8 | //
9 | // --*/
10 |
11 | /=#
12 |
13 | #langdef en-US "English"
14 |
15 | #string STR_MISC_SYSTEM_SLOT_DESIGNATION #language en-US "System Slot Designation"
16 |
17 |
18 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/DxeGpioNameBufferLib/GpioNameBufferDxe.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains implementation of the GpioMemLib for DXE phase
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 |
8 | #include
9 |
10 | STATIC CHAR8 mGpioNameBuffer[GPIO_NAME_LENGTH_MAX];
11 |
12 | CHAR8*
13 | GpioGetStaticNameBuffer (
14 | VOID
15 | )
16 | {
17 | return mGpioNameBuffer;
18 | }
19 |
20 |
--------------------------------------------------------------------------------
/Features/Intel/Debugging/Readme.md:
--------------------------------------------------------------------------------
1 | # **EDK II Minimum Platform Firmware Debug Advanced Features**
2 |
3 | This feature domain directory contains debug related advanced features. Note that the domain directory is named
4 | "Debugging" as opposed to "Debug" to help indicate that the directory is related to features used for debugging and it
5 | is not an output directory for a Debug build target.
6 |
7 | Features may be added to this domain whose primary role and responsibility is related to debug. The type of debug
8 | technology may include hardware or software debug.
9 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SecPchLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for SEC PCH Lib.
3 | All function in this library is available for SEC
4 |
5 | Copyright (c) 2017, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 | #ifndef _SEC_PCH_LIB_H_
10 | #define _SEC_PCH_LIB_H_
11 |
12 | /**
13 | This function do the PCH cycle decoding initialization.
14 | **/
15 | VOID
16 | EFIAPI
17 | EarlyCycleDecoding (
18 | VOID
19 | );
20 |
21 | #endif // _SEC_PCH_LIB_H_
22 |
--------------------------------------------------------------------------------
/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/MtrrLib/MtrrLib.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // MtrrLib Module Localized Abstract and Description Content
3 | //
4 | // Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_MODULE_ABSTRACT
12 | #language en-US
13 | "MTRR library provides APIs for MTRR operation"
14 |
15 | #string STR_MODULE_DESCRIPTION
16 | #language en-US
17 | "MTRR library provides APIs for MTRR operation."
18 |
19 |
--------------------------------------------------------------------------------
/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the X58 SiPkg PEI drivers.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | #
11 | # SEC Phase modules
12 | #
13 | # The code in this FV handles the initial firmware startup, and
14 | # decompresses the PEI and DXE FVs which handles the rest of the boot sequence.
15 | #
16 | INF RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
17 |
--------------------------------------------------------------------------------
/Platform/Comcast/Application/SecureBoot/SecureBoot.c:
--------------------------------------------------------------------------------
1 | /*
2 | # Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 | */
7 | #include
8 |
9 | EFI_STATUS
10 | EFIAPI
11 | SecureBootEntryPoint (
12 | IN EFI_HANDLE ImageHandle,
13 | IN EFI_SYSTEM_TABLE *SystemTable
14 | )
15 | {
16 | EFI_STATUS Status;
17 |
18 | Status = RdkSecureBoot (
19 | ImageHandle,
20 | SystemTable->BootServices
21 | );
22 |
23 | return Status;
24 | }
25 |
--------------------------------------------------------------------------------
/Silicon/Atmel/AtSha204a/AtSha204a.dec:
--------------------------------------------------------------------------------
1 | ## @file
2 | #
3 | # Copyright (c) 2018, Linaro Ltd. All rights reserved.
4 | #
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 | [Defines]
10 | DEC_SPECIFICATION = 0x0001001A
11 | PACKAGE_NAME = AtSha204a
12 | PACKAGE_GUID = 86085a5b-355b-4e72-92ab-fc3e1d71c9ad
13 | PACKAGE_VERSION = 0.1
14 |
15 | [Guids]
16 | gAtSha204aI2cDeviceGuid = { 0x52e9b64b, 0x4ec1, 0x4bd6, { 0x9e, 0x1c, 0x6d, 0xac, 0xef, 0x35, 0x18, 0x21 } }
17 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Include/Guid/MemoryMapData.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2015, Hisilicon Limited. All rights reserved.
4 | * Copyright (c) 2015, Linaro Limited. All rights reserved.
5 | *
6 | * SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 |
10 |
11 |
12 | #ifndef _MEMORY_MAP_GUID_H_
13 | #define _MEMORY_MAP_GUID_H_
14 |
15 | #define EFI_MEMORY_MAP_GUID \
16 | { \
17 | 0xf8870015,0x6994,0x4b98,0x95,0xa2,0xbd,0x56,0xda,0x91,0xc0,0x7f \
18 | }
19 |
20 | extern EFI_GUID gHisiEfiMemoryMapGuid;
21 |
22 | #endif
23 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Include/Library/OemSetVirtualMapDesc.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2015, Hisilicon Limited. All rights reserved.
4 | * Copyright (c) 2015, Linaro Limited. All rights reserved.
5 | *
6 | * SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 |
10 | #ifndef _OEM_SET_VIRTUAL_MAP_DESC_H_
11 | #define _OEM_SET_VIRTUAL_MAP_DESC_H_
12 |
13 |
14 | UINTN OemSetVirtualMapDesc (
15 | ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable,
16 | ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes
17 | );
18 |
19 | #endif
20 |
21 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/DxeGpioNameBufferLib/GpioNameBufferDxe.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains implementation of the GpioMemLib for DXE phase
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #include
10 |
11 | STATIC CHAR8 mGpioNameBuffer[GPIO_NAME_LENGTH_MAX];
12 |
13 | CHAR8*
14 | GpioGetStaticNameBuffer (
15 | VOID
16 | )
17 | {
18 | return mGpioNameBuffer;
19 | }
20 |
21 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Microcode FMP update driver.
3 | //
4 | // Produce FMP instance to update Microcode.
5 | //
6 | // Copyright (c) 2016, Intel Corporation. All rights reserved.
7 | //
8 | // SPDX-License-Identifier: BSD-2-Clause-Patent
9 | //
10 | // **/
11 |
12 |
13 | #string STR_MODULE_ABSTRACT #language en-US "Microcode FMP update driver."
14 |
15 | #string STR_MODULE_DESCRIPTION #language en-US "Produce FMP instance to update Microcode."
16 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Acpi/AcpiSmm/AcpiMm.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Internal header file for the ACPI MM driver.
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | Copyright (c) Microsoft Corporation.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #ifndef _ACPI_MM_H_
11 | #define _ACPI_MM_H_
12 |
13 | /**
14 | ACPI initialization logic shared between the Traditional MM and
15 | Standalone MM driver instances.
16 |
17 | **/
18 | VOID
19 | InitializeAcpiMm (
20 | VOID
21 | );
22 |
23 | #endif
24 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Acpi/Library/BoardAcpiEnableLibNull/BoardAcpiEnableLibNull.c:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2017, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | **/
7 |
8 | #include
9 |
10 | EFI_STATUS
11 | EFIAPI
12 | BoardEnableAcpi (
13 | IN BOOLEAN EnableSci
14 | )
15 | {
16 | return EFI_SUCCESS;
17 | }
18 |
19 | EFI_STATUS
20 | EFIAPI
21 | BoardDisableAcpi (
22 | IN BOOLEAN DisableSci
23 | )
24 | {
25 | return EFI_SUCCESS;
26 | }
27 |
--------------------------------------------------------------------------------
/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSystemOptionString.uni:
--------------------------------------------------------------------------------
1 | // *++
2 | //
3 | // Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
4 | // SPDX-License-Identifier: BSD-2-Clause-Patent
5 | //
6 | //
7 | // Module Name:
8 | //
9 | // MiscSystemOptionString.uni
10 | //
11 | // Abstract:
12 | //
13 | // System option language
14 | //
15 | // Revision History:
16 | //
17 | // --*/
18 |
19 |
20 | /=#
21 |
22 | #langdef en-US "English"
23 |
24 | #string STR_MISC_SYSTEM_OPTION_EN_US #language en-US "English (US)"
25 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Library/PlatformSecLib/PlatformSecLibModStrs.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // PlatformSecLib Localized Abstract and Description Content
3 | //
4 | // Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_MODULE_ABSTRACT
11 | #language en-US
12 | "SEC Platform Library "
13 |
14 | #string STR_MODULE_DESCRIPTION
15 | #language en-US
16 | "Provides a platform-specific function to be used during the SEC stage of POST. "
17 |
18 |
19 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscBiosVendor.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // BIOS vendor information.
3 | // Misc. subclass type 2.
4 | // SMBIOS type 0.
5 | //
6 | // Copyright (c) 2013-2015 Intel Corporation.
7 | //
8 | // SPDX-License-Identifier: BSD-2-Clause-Patent
9 | //
10 | //
11 | // **/
12 |
13 |
14 | /=#
15 |
16 | #string STR_MISC_BIOS_VENDOR #language en-US "Intel Corp."
17 | #string STR_MISC_BIOS_VERSION #language en-US "BIOS Version"
18 | #string STR_MISC_BIOS_RELEASE_DATE #language en-US "11/03/2015"
19 |
--------------------------------------------------------------------------------
/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSystemLanguageString.uni:
--------------------------------------------------------------------------------
1 | // *++
2 | //
3 | // Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
4 | // SPDX-License-Identifier: BSD-2-Clause-Patent
5 | //
6 | //
7 | // Module Name:
8 | //
9 | // MiscSystemLanguageString.uni
10 | //
11 | // Abstract:
12 | //
13 | // System language information
14 | //
15 | // Revision History:
16 | //
17 | // --*/
18 |
19 |
20 | /=#
21 |
22 | #langdef en-US "English"
23 |
24 | #string STR_MISC_SYSTEM_LANGUAGE_EN_US #language en-US "enUS"
25 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // SiFive U500 Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_PACKAGE_ABSTRACT #language en-US "Provides SiFIve RISC-V U500 platform modules and libraries"
12 |
13 | #string STR_PACKAGE_DESCRIPTION #language en-US "This Package SiFIve RISC-V U500 platform modules and libraries."
14 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/U5SeriesPkg.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // SiFive U5 Series Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_PACKAGE_ABSTRACT #language en-US "Provides SiFIve RISC-V U5 series platform modules and libraries"
12 |
13 | #string STR_PACKAGE_DESCRIPTION #language en-US "This Package SiFIve RISC-V U5 series platform modules and libraries."
14 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.uni:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * OEM Config Library used by UiApp
4 | *
5 | * Copyright (c) 2017 - 2018, Hisilicon Limited. All rights reserved.
6 | * Copyright (c) 2017 - 2018, Linaro Limited. All rights reserved.
7 | *
8 | * SPDX-License-Identifier: BSD-2-Clause-Patent
9 | *
10 | **/
11 |
12 | #string STR_MODULE_ABSTRACT
13 | #language en-US "OEM Config Library used by BDS"
14 |
15 | #string STR_MODULE_DESCRIPTION
16 | #language en-US "OEM Config Library used by BDS"
17 |
18 |
19 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SecPchLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for SEC PCH Lib.
3 | All function in this library is available for SEC
4 |
5 | Copyright (c) 2019 Intel Corporation. All rights reserved.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 | **/
9 |
10 | #ifndef _SEC_PCH_LIB_H_
11 | #define _SEC_PCH_LIB_H_
12 |
13 | /**
14 | This function do the PCH cycle decoding initialization.
15 | **/
16 | VOID
17 | EFIAPI
18 | EarlyCycleDecoding (
19 | VOID
20 | );
21 |
22 | #endif // _SEC_PCH_LIB_H_
23 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiOcWdtLibNull/PeiOcWdtLibNull.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | The Null PEI Library Implements OcWdt Support.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #include
10 |
11 | /**
12 | This function install WDT PPI
13 |
14 | @retval EFI_STATUS Results of the installation of the WDT PPI
15 | **/
16 | EFI_STATUS
17 | EFIAPI
18 | OcWdtInit (
19 | VOID
20 | )
21 | {
22 | return EFI_SUCCESS;
23 | }
24 |
--------------------------------------------------------------------------------
/Platform/ARM/VExpressPkg/Library/ArmVExpressPciHostBridgeLib/ArmVExpressPciHostBridgeLib.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Instance of PCI Host Bridge Library for FVP Platform.
3 | //
4 | // Copyright (c) 2021, Arm Ltd. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #langdef en-US "English"
11 |
12 | #string STR_MODULE_ABSTRACT #language en-US "Instance of PCI Host Bridge Library for FVP Platform."
13 |
14 | #string STR_MODULE_DESCRIPTION #language en-US "Instance of PCI Host Bridge Library for FVP Platform."
15 |
--------------------------------------------------------------------------------
/Platform/BeagleBoard/BeagleBoardPkg/Debugger_scripts/rvi_convert_symbols.sh:
--------------------------------------------------------------------------------
1 | #!/bin/sh
2 | #
3 | # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
4 | #
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 |
8 |
9 | IN=`/usr/bin/cygpath -u $1`
10 | OUT=`/usr/bin/cygpath -u $2`
11 |
12 | /usr/bin/sed -e "s/\/cygdrive\/\(.\)/load\/a\/ni\/np \"\1:/g" \
13 | -e 's:\\:/:g' \
14 | -e "s/^/load\/a\/ni\/np \"/g" \
15 | -e "s/dll /dll\" \&/g" \
16 | $IN | /usr/bin/sort.exe --key=3 --output=$OUT
17 |
18 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/DxePolicyBoardConfigLib/DxePolicyBoardConfig.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for DxePolicyBoardConfig library instance.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _DXE_POLICY_BOARD_CONFIG_H_
10 | #define _DXE_POLICY_BOARD_CONFIG_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 |
17 |
18 | #endif
19 |
20 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Include/Library/StallPpiLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for a library to install StallPpi.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _STALL_PPI_LIB_H_
10 | #define _STALL_PPI_LIB_H_
11 |
12 | /**
13 | This function is to install StallPpi
14 |
15 | @retval EFI_SUCCESS if Ppi is installed successfully.
16 | **/
17 | EFI_STATUS
18 | EFIAPI
19 | InstallStallPpi(
20 | VOID
21 | );
22 | #endif //_STALL_PPI_LIB_H_
23 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/CnviLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for CnviLib.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _CNVI_LIB_H_
10 | #define _CNVI_LIB_H_
11 |
12 | /**
13 | Check if CNVi is present.
14 |
15 | @retval TRUE CNVi is enabled
16 | @retval FALSE CNVi is disabled
17 |
18 | **/
19 | BOOLEAN
20 | CnviIsPresent (
21 | VOID
22 | );
23 |
24 | #endif // _CNVI_LIB_H_
25 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/CnlPchLpHsioDx.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | CnlPchLp Dx HSIO Header File
3 | Copyright (c) 2019 Intel Corporation. All rights reserved.
4 |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 |
8 | #ifndef _CNL_PCH_LP_HSIO_DX_H_
9 | #define _CNL_PCH_LP_HSIO_DX_H_
10 |
11 | #define CNL_PCH_LP_HSIO_VER_DX 0x7
12 |
13 |
14 | extern UINT8 CnlPchLpChipsetInitTable_Dx[5072];
15 | extern UINT8 CnlPchLpChipsetInitTable_eDBC_Dx[4612];
16 | #endif //_CNL_PCH_LP_HSIO_DX_H_
17 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaSsdt.asl:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains the SystemAgent SSDT Table ASL code.
3 | It defines a Global NVS table which exchanges datas between OS
4 | and BIOS.
5 |
6 | Copyright (c) 2017, Intel Corporation. All rights reserved.
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 |
9 | **/
10 |
11 | DefinitionBlock (
12 | "SaSsdt.aml",
13 | "SSDT",
14 | 0x02,
15 | "SaSsdt",
16 | "SaSsdt ",
17 | 0x3000
18 | )
19 | {
20 | include ("SaNvs.asl")
21 | include ("Sa.asl")
22 | }
23 |
--------------------------------------------------------------------------------
/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // The CPU specific programming for PiSmmCpuDxeSmm module.
3 | //
4 | // Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_MODULE_ABSTRACT #language en-US "The CPU specific programming for PiSmmCpuDxeSmm module."
11 |
12 | #string STR_MODULE_DESCRIPTION #language en-US "The CPU specific programming for PiSmmCpuDxeSmm module."
13 |
--------------------------------------------------------------------------------
/Silicon/Marvell/Include/Library/MvComPhyLib.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | Copyright (C) 2016 Marvell International Ltd.
3 |
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | *******************************************************************************/
7 |
8 | #ifndef __MVCOMPHYLIB_H__
9 | #define __MVCOMPHYLIB_H__
10 |
11 | typedef enum {
12 | MvComPhyTypeCp110,
13 | MvComPhyTypeMax,
14 | } MV_COMPHY_CHIP_TYPE;
15 |
16 | EFI_STATUS
17 | MvComPhyInit (
18 | VOID
19 | );
20 |
21 | #endif
22 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Library/DxePolicyBoardConfigLib/DxePolicyBoardConfig.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for DxePolicyBoardConfig library instance.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _DXE_POLICY_BOARD_CONFIG_H_
10 | #define _DXE_POLICY_BOARD_CONFIG_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 |
17 |
18 | #endif
19 |
20 |
--------------------------------------------------------------------------------
/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (C) 2018 Marvell International Ltd. and its affiliates
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-board additional content of the DXE phase firmware volume
8 |
9 | INF Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf
10 |
11 | # DTB
12 | INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0McBin.inf
13 |
14 | !if $(ARCH) == AARCH64
15 | INF RuleOverride = ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf
16 | !endif
17 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Library/I2CLib/I2CLibInternal.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2015, Hisilicon Limited. All rights reserved.
4 | * Copyright (c) 2015, Linaro Limited. All rights reserved.
5 | *
6 | * SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 |
10 | #ifndef _I2C_LIB_INTERNAL_H_
11 | #define _I2C_LIB_INTERNAL_H_
12 |
13 | #include
14 | #include
15 |
16 | UINTN GetI2cBase (UINT32 Socket, UINT8 Port);
17 |
18 | EFI_STATUS
19 | I2cLibRuntimeSetup (UINT32 Socket, UINT8 Port);
20 |
21 |
22 | #endif
23 |
24 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaSsdt.asl:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains the SystemAgent SSDT Table ASL code.
3 | It defines a Global NVS table which exchanges datas between OS
4 | and BIOS.
5 |
6 | Copyright (c) 2019 Intel Corporation. All rights reserved.
7 |
8 | SPDX-License-Identifier: BSD-2-Clause-Patent
9 | **/
10 |
11 | DefinitionBlock (
12 | "SaSsdt.aml",
13 | "SSDT",
14 | 0x02,
15 | "SaSsdt",
16 | "SaSsdt ",
17 | 0x3000
18 | )
19 | {
20 | include ("SaNvs.asl")
21 | include ("Sa.asl")
22 | }
23 |
--------------------------------------------------------------------------------
/Features/Intel/UserInterface/UserAuthFeaturePkg/Include/PostMemory.fdf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # FDF file for post-memory modules that enable User Authentication.
3 | #
4 | # Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | INF UserInterface/UserAuthFeaturePkg/UserAuthenticationDxeSmm/UserAuthenticationDxe.inf
11 | INF UserInterface/UserAuthFeaturePkg/UserAuthenticationDxeSmm/UserAuthentication2Dxe.inf
12 | INF UserInterface/UserAuthFeaturePkg/UserAuthenticationDxeSmm/UserAuthenticationSmm.inf
13 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscOemStringData.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | This driver parses the mMiscSubclassDataTable structure and reports
3 | any generated data to smbios.
4 |
5 | Copyright (c) 2013-2015 Intel Corporation.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 |
9 | **/
10 |
11 |
12 | #include "CommonHeader.h"
13 |
14 | #include "SmbiosMisc.h"
15 |
16 | //
17 | // Static (possibly build generated) OEM String data.
18 | //
19 | MISC_SMBIOS_TABLE_DATA(EFI_MISC_OEM_STRING, MiscOemString)
20 | = { {STRING_TOKEN(STR_MISC_OEM_EN_US) }};
21 |
--------------------------------------------------------------------------------
/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // RISC-V Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_PACKAGE_ABSTRACT #language en-US "Provides UEFI compatible RISC-V platform modules and libraries"
12 |
13 | #string STR_PACKAGE_DESCRIPTION #language en-US "This Package provides UEFI compatible RISC-V platform modules and libraries."
14 |
15 |
16 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // IntelVTdDxe Module Localized Abstract and Description Content
3 | //
4 | // Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_MODULE_ABSTRACT #language en-US "Intel VTd DXE Driver."
12 |
13 | #string STR_MODULE_DESCRIPTION #language en-US "This driver initializes VTd engine based upon DMAR ACPI tables and provide DMA protection to PCI or ACPI device."
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdSampleDxe/PlatformVTdSampleDxe.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // PlatformVTdSampleDxe Module Localized Abstract and Description Content
3 | //
4 | // Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_MODULE_ABSTRACT #language en-US "Platform VTd Sample DXE Driver."
12 |
13 | #string STR_MODULE_DESCRIPTION #language en-US "This driver provides sample on how to produce Platform VTd policy protocol."
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Pch/IncludePrivate/PchHybridStorageHob.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Definitions required to create HybridStorageHob
4 |
5 | Copyright (c) 2021, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PCH_HYBRIDSTORAGE_HOB_
10 | #define _PCH_HYBRIDSTORAGE_HOB_
11 |
12 | extern EFI_GUID gHybridStorageHobGuid;
13 |
14 | //
15 | // Passes to DXE Hybrid Storage location
16 | //
17 | typedef struct {
18 | UINT32 HybridStorageLocation;
19 | } PCH_HYBRIDSTORAGE_HOB;
20 |
21 | #endif
22 |
--------------------------------------------------------------------------------
/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // RISC-V Processor Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 | #string STR_PACKAGE_ABSTRACT #language en-US "Provides UEFI compatible RISC-V processor modules and libraries"
11 |
12 | #string STR_PACKAGE_DESCRIPTION #language en-US "This Package provides UEFI compatible RISC-V processor modules and libraries."
13 |
14 |
--------------------------------------------------------------------------------
/Platform/ARM/SgiPkg/Include/Guid/SgiVirtioDevicesFormSet.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2018, ARM Limited. All rights reserved.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #ifndef __SGI_VIRTIO_DEVICES_FORMSET_H__
10 | #define __SGI_VIRTIO_DEVICES_FORMSET_H__
11 |
12 | #define SGI_VIRTIO_BLOCK_GUID \
13 | { 0x5a96cdcd, 0x6116, 0x4929, { 0xb7, 0x01, 0x3a, 0xc2, 0xfb, 0x1c, 0xe2, 0x28 } }
14 |
15 | #define SGI_VIRTIO_NET_GUID \
16 | { 0xf5a453e8, 0x5f5f, 0x4e7b, { 0x89, 0x4f, 0x3a, 0x23, 0x74, 0xc7, 0x28, 0xb1 } }
17 |
18 | #endif
19 |
--------------------------------------------------------------------------------
/Platform/Hisilicon/D06/D06.dec:
--------------------------------------------------------------------------------
1 | #/** @file
2 | #
3 | # Copyright (c) 2018, Hisilicon Limited. All rights reserved.
4 | # Copyright (c) 2018, Linaro Limited. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | #**/
9 |
10 | #
11 | # D06 Package
12 | #
13 | #
14 | #
15 |
16 | [Defines]
17 | DEC_SPECIFICATION = 0x0001001A
18 | PACKAGE_NAME = D06Pkg
19 | PACKAGE_GUID = B46F75D7-3864-450D-86D9-A0346A882232
20 | PACKAGE_VERSION = 0.1
21 |
22 | [Includes]
23 | Include
24 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Acpi/AcpiTables/Dsdt/QNCLpc.asi:
--------------------------------------------------------------------------------
1 | /** @file
2 | Lpc devices and control methods
3 |
4 | Copyright (c) 2013-2015 Intel Corporation.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 |
11 | #ifndef QNC_LPC_ASI
12 | #define QNC_LPC_ASI
13 |
14 | Device(LPC)
15 | {
16 | Name(_ADR,0x001f0000) // Device (HI WORD)=31, Func (LO WORD)=0
17 |
18 | Include ("PciIrq.asi") // PCI routing control methods
19 | Include ("LpcDev.asi") // Static Lpc device resource declaration
20 | }
21 |
22 |
23 | #endif
24 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/DxePolicyBoardConfigLib/DxePolicyBoardConfig.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for DxePolicyBoardConfig library instance.
3 |
4 |
5 | Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _DXE_POLICY_BOARD_CONFIG_H_
10 | #define _DXE_POLICY_BOARD_CONFIG_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 |
17 |
18 | #endif
19 |
20 |
--------------------------------------------------------------------------------
/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.h:
--------------------------------------------------------------------------------
1 | /**
2 | *
3 | * Copyright (c) 2018, Marvell International Ltd. All rights reserved.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 | #ifndef __NON_DISCOVERABLE_INIT_LIB_H__
9 | #define __NON_DISCOVERABLE_INIT_LIB_H__
10 |
11 | #define ARMADA_70x0_DB_IO_EXPANDER0 0
12 | #define ARMADA_70x0_DB_VBUS0_PIN 0
13 | #define ARMADA_70x0_DB_VBUS0_LIMIT_PIN 4
14 | #define ARMADA_70x0_DB_VBUS1_PIN 1
15 | #define ARMADA_70x0_DB_VBUS1_LIMIT_PIN 5
16 |
17 | #endif
18 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/U5SerialPortLib.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Library instance for SerialIo library class
3 | //
4 | // Library instance for SerialIO library class.
5 | //
6 | // Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
7 | //
8 | // SPDX-License-Identifier: BSD-2-Clause-Patent
9 | //
10 | // **/
11 |
12 |
13 | #string STR_MODULE_ABSTRACT #language en-US "Library instance for SerialIO library class"
14 |
15 | #string STR_MODULE_DESCRIPTION #language en-US "Library instance for SerialIO library class."
16 |
17 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Include/Guid/TcoWdtHob.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2019, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 | **/
6 |
7 | #ifndef __TCO_WDT_HOB_H__
8 | #define __TCO_WDT_HOB_H__
9 |
10 | #include
11 |
12 | #define TCO_WDT_HOB_GUID \
13 | { \
14 | 0x3e405418, 0xd8c, 0x4f1a, { 0xb0, 0x55, 0xbe, 0xf9, 0x8, 0x41, 0x46, 0x8d } \
15 | }
16 |
17 | typedef struct {
18 | EFI_HOB_GUID_TYPE Header;
19 | UINT8 TcoRebootHappened;
20 | } TCO_WDT_HOB;
21 |
22 | #endif
23 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PeiPchDmiLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains PEI DMI methods
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_PCH_DMI_LIB_H_
10 | #define _PEI_PCH_DMI_LIB_H_
11 |
12 | #include
13 |
14 | //
15 | // Data structure definitions
16 | //
17 | typedef enum {
18 | DmiVcTypeVc0,
19 | DmiVcTypeVc1,
20 | DmiVcTypeVcm,
21 | DmiVcTypeMax
22 | } PCH_DMI_VC_TYPE;
23 |
24 |
25 | #endif
26 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // PlatformVTdInfoSamplePei Module Localized Abstract and Description Content
3 | //
4 | // Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_MODULE_ABSTRACT #language en-US "Platform VTd Info PEI Driver."
12 |
13 | #string STR_MODULE_DESCRIPTION #language en-US "This driver provides sample on how to produce Platform VTd Info PPI."
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLib/PeiSiPolicyInit.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PeiSiPolicyInit
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef _SI_POLICY_INIT_PEI_H_
10 | #define _SI_POLICY_INIT_PEI_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 |
18 | #endif // _SI_POLICY_INIT_PEI_H_
19 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiPolicyInit.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PeiSiPolicyInit
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef _SI_POLICY_INIT_PEI_H_
10 | #define _SI_POLICY_INIT_PEI_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 |
18 | #endif // _SI_POLICY_INIT_PEI_H_
19 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/PchSmmControlLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for SMM Control PEI Library.
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 | #ifndef _PCH_SMM_CONTROL_LIB_H_
9 | #define _PCH_SMM_CONTROL_LIB_H_
10 |
11 | /**
12 | This function install PEI SMM Control PPI
13 |
14 | @retval EFI_STATUS Results of the installation of the SMM Control PPI
15 | **/
16 | EFI_STATUS
17 | EFIAPI
18 | PchSmmControlInit (
19 | VOID
20 | );
21 |
22 | #endif
23 |
--------------------------------------------------------------------------------
/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/ogma_config.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2016 - 2017, Socionext Inc. All rights reserved.
4 | Copyright (c) 2017, Linaro, Ltd. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #ifndef OGMA_CONFIG_H
11 | #define OGMA_CONFIG_H
12 |
13 | #define OGMA_CONFIG_CLK_HZ 250000000UL
14 | #define OGMA_CONFIG_GMAC_CLK_HZ 250000000UL
15 | #define OGMA_CONFIG_CHECK_CLK_SUPPLY
16 |
17 | #define OGMA_CONFIG_USE_READ_GMAC_STAT
18 |
19 | #endif /* OGMA_CONFIG_H */
20 |
--------------------------------------------------------------------------------
/Drivers/OptionRomPkg/AtapiPassThruDxe/DriverSupportedEfiVersion.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | Copyright (c) 2007, Intel Corporation. All rights reserved.
3 | SPDX-License-Identifier: BSD-2-Clause-Patent
4 |
5 | Module Name: DriverSupportEfiVersion.c
6 |
7 | **/
8 | #include "AtapiPassThru.h"
9 |
10 | EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL gAtapiScsiPassThruDriverSupportedEfiVersion = {
11 | sizeof (EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL), // Size of Protocol structure.
12 | 0 // Version number to be filled at start up.
13 | };
14 |
15 |
--------------------------------------------------------------------------------
/Drivers/OptionRomPkg/CirrusLogic5430Dxe/DriverSupportedEfiVersion.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | Copyright (c) 2007, Intel Corporation. All rights reserved.
3 | SPDX-License-Identifier: BSD-2-Clause-Patent
4 |
5 | Module Name: DriverSupportEfiVersion.c
6 |
7 | **/
8 | #include "CirrusLogic5430.h"
9 |
10 | EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL gCirrusLogic5430DriverSupportedEfiVersion = {
11 | sizeof (EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL), // Size of Protocol structure.
12 | 0 // Version number to be filled at start up.
13 | };
14 |
15 |
--------------------------------------------------------------------------------
/Features/Intel/SystemInformation/Readme.md:
--------------------------------------------------------------------------------
1 | # **EDK II Minimum Platform Firmware System Information Advanced Features**
2 |
3 | This feature domain directory contains advanced features that produce system information.
4 |
5 | Features may be added to this domain whose primary role and responsibility is related to producing structures for
6 | system information. The system information structures supported should be standardized in a public document such as
7 | an industry standard specification or white paper. The feature documentation must be referenced in the `Readme.md`
8 | file in the feature package.
9 |
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/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2018, Linaro Ltd. All rights reserved.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #ifndef __HIKEYDXE_H__
10 | #define __HIKEYDXE_H__
11 |
12 | #define DETECT_J15_FASTBOOT 24 // GPIO3_0
13 |
14 | #define ADB_REBOOT_ADDRESS 0x05F01000
15 | #define ADB_REBOOT_BOOTLOADER 0x77665500
16 | #define ADB_REBOOT_NONE 0x77665501
17 |
18 | #define HIKEY_BOOT_OPTION_NUM 4
19 |
20 | #endif /* __HIKEYDXE_H__ */
21 |
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/Platform/Intel/MinPlatformPkg/Include/Library/ReportFvLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Report Firmware Volume (FV) library
4 |
5 | This library installs pre-memory and post-memory firmware volumes.
6 |
7 | Copyright (c) 2018, Intel Corporation. All rights reserved.
8 | SPDX-License-Identifier: BSD-2-Clause-Patent
9 |
10 | **/
11 |
12 | #ifndef _REPORT_FV_LIB_H_
13 | #define _REPORT_FV_LIB_H_
14 |
15 | #include
16 | #include
17 |
18 | VOID
19 | ReportPreMemFv (
20 | VOID
21 | );
22 |
23 | VOID
24 | ReportPostMemFv (
25 | VOID
26 | );
27 |
28 | #endif
--------------------------------------------------------------------------------
/Platform/NXP/ConfigurationManagerPkg/Include/PlatformAcpiTableGenerator.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Acpi Table generator headers
3 |
4 | Copyright 2020 NXP
5 | Copyright 2020 Puresoftware Ltd
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 |
9 | **/
10 |
11 | #ifndef PLATFORM_ACPI_TABLE_GENERATOR_H
12 | #define PLATFORM_ACPI_TABLE_GENERATOR_H
13 |
14 | typedef enum PlatAcpiTableId {
15 | PlatAcpiTableIdReserved = 0x0000, ///< Reserved
16 | PlatAcpiTableIdDsdt,
17 | PlatAcpiTableIdMax
18 | } PLAT_ACPI_TABLE_ID;
19 |
20 | #endif // PLATFORM_ACPI_TABLE_GENERATOR_H
21 |
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/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // IntelVTdPmrPei Module Localized Abstract and Description Content
3 | //
4 | // Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_MODULE_ABSTRACT #language en-US "Intel VTd PMR PEI Driver."
12 |
13 | #string STR_MODULE_DESCRIPTION #language en-US "This driver initializes VTd engine based upon EDKII_VTD_INFO_PPI and provide DMA protection to device in PEI."
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SignedFirmwareUpdate.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains the tests for the SignedFirmwareUpdate bit
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #include "HstiSiliconDxe.h"
10 |
11 | /**
12 | Run tests for SignedFirmwareUpdate bit
13 | **/
14 | VOID
15 | CheckSignedFirmwareUpdate (
16 | VOID
17 | )
18 | {
19 | if ((mFeatureImplemented[0] & HSTI_BYTE0_SIGNED_FIRMWARE_UPDATE) == 0) {
20 | return;
21 | }
22 |
23 | return ;
24 | }
25 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/IncludePrivate/Library/VtdInitFruLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Vtd Initialization Fru Library header file
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 | #ifndef _VTD_INIT_FRU_LIB_H_
8 | #define _VTD_INIT_FRU_LIB_H_
9 |
10 | ///
11 | /// TCSS DMA controller RMRR buffer 4MB for each DMA controller
12 | ///
13 | #define RMRR_TCSS_DMA_SIZE 0x400000
14 |
15 | extern UINT16 mDevEnMap[][2];
16 | extern UINTN mDevEnMapSize;
17 |
18 | #endif // _VTD_INIT_FRU_LIB_H_
19 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Include/Register/PchDmi14Regs.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Register names for PCH DMI SIP14
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 | #ifndef _PCH_DMI14_REGS_H_
8 | #define _PCH_DMI14_REGS_H_
9 |
10 | //
11 | // DMI Control
12 | //
13 | #define R_PCH_DMI14_PCR_DMIC 0x2234 ///< DMI Control
14 | #define B_PCH_DMI14_PCR_DMIC_SRL BIT31 ///< Secured register lock
15 |
16 | #endif
17 |
--------------------------------------------------------------------------------
/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (C) 2018 Marvell International Ltd. and its affiliates
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-board additional content of the DXE phase firmware volume
8 |
9 | INF Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.inf
10 |
11 | # DTB
12 | INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
13 |
14 | !if $(ARCH) == AARCH64
15 | # ACPI support
16 | INF RuleOverride = ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db.inf
17 | !endif
18 |
--------------------------------------------------------------------------------
/Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc:
--------------------------------------------------------------------------------
1 | #
2 | # Copyright (C) 2018 Marvell International Ltd. and its affiliates
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 |
7 | # Per-board additional content of the DXE phase firmware volume
8 |
9 | INF Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.inf
10 |
11 | # DTB
12 | INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf
13 |
14 | !if $(ARCH) == AARCH64
15 | # ACPI support
16 | INF RuleOverride = ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db.inf
17 | !endif
18 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmarPei.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // IntelVTdDmarPei Module Localized Abstract and Description Content
3 | //
4 | // Copyright (c) 2020, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_MODULE_ABSTRACT #language en-US "Intel VTd DMAR PEI Driver."
12 |
13 | #string STR_MODULE_DESCRIPTION #language en-US "This driver initializes VTd engine based upon EDKII_VTD_INFO_PPI and provide DMA protection to device in PEI."
14 |
15 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Pch/IncludePrivate/Library/SmmPchPrivateLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for private PCH SMM Lib.
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 | #ifndef _SMM_PCH_PRIVATE_LIB_H_
8 | #define _SMM_PCH_PRIVATE_LIB_H_
9 |
10 | /**
11 | Set InSmm.Sts bit
12 | **/
13 | VOID
14 | PchSetInSmmSts (
15 | VOID
16 | );
17 |
18 | /**
19 | Clear InSmm.Sts bit
20 | **/
21 | VOID
22 | PchClearInSmmSts (
23 | VOID
24 | );
25 |
26 | #endif // _SMM_PCH_PRIVATE_LIB_H_
27 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/SiPkgPeiLib.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the TigerLake silicon package PEI libraries.
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 | #
10 | # Silicon Init Pei Library
11 | #
12 |
13 | #
14 | # FRUs
15 | #
16 | !include $(PLATFORM_SI_PACKAGE)/Fru/TglCpu/PeiLib.dsc
17 |
18 | !include $(PLATFORM_SI_PACKAGE)/Fru/TglPch/PeiLib.dsc
19 |
20 | SiConfigBlockLib|$(PLATFORM_SI_PACKAGE)/Library/BaseSiConfigBlockLib/BaseSiConfigBlockLib.inf
21 |
--------------------------------------------------------------------------------
/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_version.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2016 - 2017, Socionext Inc. All rights reserved.
4 | Copyright (c) 2017, Linaro, Ltd. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #ifndef OGMA_VERSION_H
11 | #define OGMA_VERSION_H
12 |
13 | #define OGMA_VER_NETSEC (0x00050050UL)
14 |
15 | #define OGMA_INVALID_VER 0x0
16 | #define OGMA_VER_MAJOR_NUM(x) ((x) & 0xffff0000UL)
17 |
18 | #endif /* OGMA_VERSION_H */
19 |
--------------------------------------------------------------------------------
/Platform/Hisilicon/HiKey/Include/ArmPlatform.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #ifndef __PLATFORM_H__
10 | #define __PLATFORM_H__
11 |
12 | //
13 | // We don't care about this value, but the PL031 driver depends on the macro
14 | // to exist: it will pass it on to our ArmPlatformSysConfigLib:ConfigGet()
15 | // function, which just returns EFI_UNSUPPORTED.
16 | //
17 | //
18 | #define SYS_CFG_RTC 0
19 |
20 | #endif /* __PLATFORM_H__ */
21 |
--------------------------------------------------------------------------------
/Platform/RISC-V/PlatformPkg/Include/Library/RiscVPlatformTempMemoryInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | RISC-V package definitions.
3 |
4 | Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef RISCV_PLATFORM_TEMP_MEM_LIB_H_
10 | #define RISCV_PLATFORM_TEMP_MEM_LIB_H_
11 |
12 | #include "RiscVImpl.h"
13 |
14 | VOID EFIAPI RiscVPlatformTemporaryMemInit (VOID);
15 | UINT32 EFIAPI RiscVPlatformTemporaryMemSize (VOID);
16 | UINT32 EFIAPI RiscVPlatformTemporaryMemBase (VOID);
17 | #endif
18 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2011-2015, ARM Limited. All rights reserved.
4 | * Copyright (c) 2018, Hisilicon Limited. All rights reserved.
5 | * Copyright (c) 2015-2018, Linaro Limited. All rights reserved.
6 | *
7 | * SPDX-License-Identifier: BSD-2-Clause-Patent
8 | *
9 | * Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
10 | *
11 | **/
12 |
13 |
14 | #ifndef _HI1620_PLATFORM_H_
15 | #define _HI1620_PLATFORM_H_
16 |
17 | #include
18 |
19 | #define HI1620_WATCHDOG_COUNT 1
20 |
21 | #endif
22 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/PchSmmControlLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for SMM Control PEI Library.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PCH_SMM_CONTROL_LIB_H_
10 | #define _PCH_SMM_CONTROL_LIB_H_
11 |
12 | /**
13 | This function install PEI SMM Control PPI
14 |
15 | @retval EFI_STATUS Results of the installation of the SMM Control PPI
16 | **/
17 | EFI_STATUS
18 | EFIAPI
19 | PchSmmControlInit (
20 | VOID
21 | );
22 |
23 | #endif
24 |
--------------------------------------------------------------------------------
/Platform/BeagleBoard/BeagleBoardPkg/Debugger_scripts/rvi_load_symbols.inc:
--------------------------------------------------------------------------------
1 | //
2 | // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
3 | //
4 | // SPDX-License-Identifier: BSD-2-Clause-Patent
5 | //
6 |
7 | include 'ZZZZZZ/rvi_symbols_macros.inc'
8 |
9 | macro write_symbols_file("ZZZZZZ/rvi_symbols.tmp", 0x00000000, 0x10000000)
10 |
11 | host "bash -o igncr ZZZZZZ/rvi_convert_symbols.sh ZZZZZZ/rvi_symbols.tmp ZZZZZZ/rvi_symbols.inc"
12 | include 'ZZZZZZ/rvi_symbols.inc'
13 | load /NI /NP 'ZZZZZZ/rvi_dummy.axf' ;.constdata
14 | unload rvi_dummy.axf
15 | delfile rvi_dummy.axf
16 |
17 |
18 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Include/Library/BoardAcpiTableLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2017, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | **/
7 |
8 | #ifndef _BOARD_ACPI_TABLE_LIB_H_
9 | #define _BOARD_ACPI_TABLE_LIB_H_
10 |
11 | #include
12 | #include
13 | #include
14 |
15 | EFI_STATUS
16 | EFIAPI
17 | BoardUpdateAcpiTable (
18 | IN OUT EFI_ACPI_COMMON_HEADER *Table,
19 | IN OUT EFI_ACPI_TABLE_VERSION *Version
20 | );
21 |
22 | #endif
23 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Hi1610/Hi1610AcpiTables/Hi1610Platform.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2011-2015, ARM Limited. All rights reserved.
4 | * Copyright (c) 2015-2018, Hisilicon Limited. All rights reserved.
5 | * Copyright (c) 2015-2018, Linaro Limited. All rights reserved.
6 | *
7 | * SPDX-License-Identifier: BSD-2-Clause-Patent
8 | *
9 | * Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
10 | *
11 | **/
12 |
13 |
14 | #ifndef _HI1610_PLATFORM_H_
15 | #define _HI1610_PLATFORM_H_
16 |
17 | #include
18 |
19 | #define HI1610_WATCHDOG_COUNT 2
20 |
21 | #endif
22 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiOcWdtLibNull/PeiOcWdtLibNull.inf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component Description File for OcWdt Support.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | [Defines]
11 | INF_VERSION = 0x00010017
12 | BASE_NAME = PeiOcWdtLib
13 | FILE_GUID = DB65B36B-E276-4A2b-AB20-61764889E483
14 | VERSION_STRING = 1.0
15 | MODULE_TYPE = PEIM
16 | LIBRARY_CLASS = OcWdtLib
17 |
18 |
19 | [Packages]
20 | MdePkg/MdePkg.dec
21 |
22 |
23 | [Sources]
24 | PeiOcWdtLibNull.c
25 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/MeasuredBootEnforcement.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains the tests for the MeasuredBootEnforcement BIT
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #include "HstiSiliconDxe.h"
10 |
11 | /**
12 | Run tests for MeasuredBootEnforcement bit
13 | **/
14 | VOID
15 | CheckMeasuredBootEnforcement (
16 | VOID
17 | )
18 | {
19 | if ((mFeatureImplemented[0] & HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT) == 0) {
20 | return;
21 | }
22 |
23 | return;
24 | }
25 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/PchResetLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for PCH RESET Driver.
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 | #ifndef _PCH_RESET_LIB_H_
9 | #define _PCH_RESET_LIB_H_
10 |
11 |
12 | /**
13 | Initialize PCH Reset APIs
14 |
15 | @retval EFI_SUCCESS APIs are installed successfully
16 | @retval EFI_OUT_OF_RESOURCES Can't allocate pool
17 | **/
18 | EFI_STATUS
19 | EFIAPI
20 | PchInitializeReset (
21 | VOID
22 | );
23 |
24 | #endif
25 |
--------------------------------------------------------------------------------
/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Library/IpmiPlatformHookLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This library abstract the platform specific hook for IPMI.
3 |
4 | Copyright (c) 2018, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef _IPMI_PLATFORM_UPDATE_LIB_H_
10 | #define _IPMI_PLATFORM_UPDATE_LIB_H_
11 |
12 | #include
13 | #include
14 | #include
15 |
16 | EFI_STATUS
17 | EFIAPI
18 | PlatformIpmiIoRangeSet(
19 | UINT16 IpmiIoBase
20 | );
21 |
22 | #endif
23 |
24 |
--------------------------------------------------------------------------------
/Platform/Comcast/Application/DriSecureBoot/DriSecureBoot.c:
--------------------------------------------------------------------------------
1 | /*
2 | # Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
3 | #
4 | # SPDX-License-Identifier: BSD-2-Clause-Patent
5 | #
6 | */
7 | #include
8 |
9 | EFI_STATUS
10 | EFIAPI
11 | DriSecureBootEntryPoint (
12 | IN EFI_HANDLE ImageHandle,
13 | IN EFI_SYSTEM_TABLE *SystemTable
14 | )
15 | {
16 | EFI_STATUS Status;
17 |
18 | Status = RdkHttpBoot ();
19 |
20 | Status = RdkSecureBoot (
21 | ImageHandle,
22 | SystemTable->BootServices
23 | );
24 |
25 | return Status;
26 | }
27 |
--------------------------------------------------------------------------------
/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | *
3 | * Copyright (c) 2016-2018, Hisilicon Limited. All rights reserved.
4 | * Copyright (c) 2016-2018, Linaro Limited. All rights reserved.
5 | *
6 | * SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 |
10 | #ifndef __OEM_NIC_CONFIG_H__
11 | #define __OEM_NIC_CONFIG_H__
12 |
13 | #include
14 | #include
15 | #include
16 | #include
17 | #include
18 | #include
19 | #endif
20 |
--------------------------------------------------------------------------------
/Platform/Intel/SimicsOpenBoardPkg/Include/Guid/SimicsBoardConfig.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | GUID for UEFI variables that are specific to Simics Board configuration.
3 |
4 | Copyright (C) 2014, Red Hat, Inc.
5 | Copyright (c) 2019 Intel Corporation. All rights reserved.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 | **/
9 |
10 | #ifndef __SIMICS_BOARD_CONFIG_H__
11 | #define __SIMICS_BOARD_CONFIG_H__
12 |
13 | #define SIMICS_BOARD_CONFIG_GUID \
14 | {0x8a318e00, 0xfaf5, 0x499f, { 0x91,0x75, 0xce, 0x4d, 0x8d, 0xa6, 0x70, 0xae}}
15 |
16 | extern EFI_GUID gSimicsBoardConfigGuid;
17 |
18 | #endif
19 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/PchResetLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for PCH RESET Driver.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PCH_RESET_LIB_H_
10 | #define _PCH_RESET_LIB_H_
11 |
12 | /**
13 | Initialize PCH Reset APIs
14 |
15 | @retval EFI_SUCCESS APIs are installed successfully
16 | @retval EFI_OUT_OF_RESOURCES Can't allocate pool
17 | **/
18 | EFI_STATUS
19 | EFIAPI
20 | PchInitializeReset (
21 | VOID
22 | );
23 |
24 | #endif
25 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/SmmPchPrivateLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for private PCH SMM Lib.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _SMM_PCH_PRIVATE_LIB_H_
10 | #define _SMM_PCH_PRIVATE_LIB_H_
11 |
12 | /**
13 | Set InSmm.Sts bit
14 | **/
15 | VOID
16 | PchSetInSmmSts (
17 | VOID
18 | );
19 |
20 | /**
21 | Clear InSmm.Sts bit
22 | **/
23 | VOID
24 | PchClearInSmmSts (
25 | VOID
26 | );
27 |
28 | #endif // _SMM_PCH_PRIVATE_LIB_H_
29 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLib/PeiPolicyInit.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PolicyInitPei PEIM.
3 |
4 | Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef _PEI_POLICY_INIT_H_
10 | #define _PEI_POLICY_INIT_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 |
18 | #include "PeiSiPolicyInit.h"
19 |
20 | #endif
21 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Include/SiConfigHob.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Silicon Config HOB is used for gathering platform
3 | related Intel silicon information and config setting.
4 |
5 | Copyright (c) 2021, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 | #ifndef _SI_CONFIG_HOB_H_
9 | #define _SI_CONFIG_HOB_H_
10 |
11 | #include
12 |
13 | extern EFI_GUID gSiConfigHobGuid;
14 |
15 | // Rename SI_CONFIG_HOB into SI_CONFIG_HOB_DATA for it does not follow HOB structure.
16 | typedef CONST SI_CONFIG SI_CONFIG_HOB_DATA;
17 | #endif
18 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscOnboardDevice.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Miscellaneous Onboard Device
3 | //
4 | // Copyright (c) 2013-2015 Intel Corporation.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | //
9 | // MiscOnboardDevice.Vfr
10 | //
11 | // **/
12 |
13 |
14 | /=#
15 |
16 | #string STR_MISC_ONBOARD_DEVICE_VIDEO #language en-US "Intel(R) Extreme Graphics 3 Controller"
17 | #string STR_MISC_ONBOARD_DEVICE_NETWORK #language en-US "Gigabit Ethernet"
18 | #string STR_MISC_ONBOARD_DEVICE_AUDIO #language en-US "Intel(R) High Definition Audio Device"
19 |
--------------------------------------------------------------------------------
/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/DriverSupportedEfiVersion.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | Driver supported version protocol for the QEMU video driver.
3 |
4 | Copyright (c) 2007 - 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #include "Simics.h"
10 |
11 | EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL gQemuVideoDriverSupportedEfiVersion = {
12 | sizeof (EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL), // Size of Protocol structure.
13 | 0 // Version number to be filled at start up.
14 | };
15 |
16 |
--------------------------------------------------------------------------------
/Platform/AMD/OverdriveBoard/DeviceTree/OverdriveBoard.inf:
--------------------------------------------------------------------------------
1 | ## @file
2 | #
3 | # Device tree description of the AMD Overdrive platform
4 | #
5 | # Copyright (c) 2018, Linaro Ltd. All rights reserved.
6 | #
7 | # SPDX-License-Identifier: BSD-2-Clause-Patent
8 | #
9 | ##
10 |
11 | [Defines]
12 | INF_VERSION = 0x0001001A
13 | BASE_NAME = OverdriveBoardDeviceTree
14 | FILE_GUID = 25462CDA-221F-47DF-AC1D-259CFAA4E326 # gDtPlatformDefaultDtbFileGuid
15 | MODULE_TYPE = USER_DEFINED
16 | VERSION_STRING = 1.0
17 |
18 | [Sources]
19 | OverdriveBoard.dts
20 |
21 | [Packages]
22 | MdePkg/MdePkg.dec
23 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/Include/Library/PeiCheckIommuSupportLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PeiCheckIommuSupport library.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_CHECK_IOMMU_SUPPORT_LIBRARY_H_
10 | #define _PEI_CHECK_IOMMU_SUPPORT_LIBRARY_H_
11 |
12 | /**
13 | Check Iommu Ability base on SKU type, CSME FW type, Vtd and setup options.
14 | **/
15 | VOID
16 | PeiCheckIommuSupport (
17 | VOID
18 | );
19 |
20 | #endif // _PEI_CHECK_IOMMU_SUPPORT_LIBRARY_H_
21 |
22 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Include/SiConfigHob.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Silicon Config HOB is used for gathering platform
3 | related Intel silicon information and config setting.
4 |
5 | Copyright (c) 2019 Intel Corporation. All rights reserved.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 | **/
9 |
10 | #ifndef _SI_CONFIG_HOB_H_
11 | #define _SI_CONFIG_HOB_H_
12 |
13 | #include
14 |
15 | extern EFI_GUID gSiConfigHobGuid;
16 |
17 | // Rename SI_CONFIG_HOB into SI_CONFIG_HOB_DATA for it does not follow HOB structure.
18 | typedef CONST SI_CONFIG SI_CONFIG_HOB_DATA;
19 | #endif
20 |
--------------------------------------------------------------------------------
/Features/Intel/UserInterface/VirtualKeyboardFeaturePkg/VirtualKeyboardDxe/KeyboardLayout.idf:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Virtual Keyboard Layout
3 | //
4 | // Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | #image IMG_VK_CAPITALLETTERKEYBOARD TRANSPARENT CapitalLetterKeyboard.bmp
9 | #image IMG_VK_DIGITKEYBOARD TRANSPARENT DigitKeyboard.bmp
10 | #image IMG_VK_FULLICON TRANSPARENT FullIcon.bmp
11 | #image IMG_VK_SIMPLEICON TRANSPARENT SimpleIcon.bmp
12 | #image IMG_VK_SIMPLEKEYBOARD TRANSPARENT SimpleKeyboard.bmp
13 |
--------------------------------------------------------------------------------
/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PeiTBTPolicy library.
3 |
4 | Copyright (c) 2018, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 | #ifndef _PEI_TBT_POLICY_LIBRARY_H_
9 | #define _PEI_TBT_POLICY_LIBRARY_H_
10 |
11 | #include
12 | #include
13 | #include
14 | #include
15 | #include
16 |
17 | #endif // _PEI_TBT_POLICY_LIBRARY_H_
18 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Include/Library/BoardAcpiEnableLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2017, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | **/
7 |
8 | #ifndef _BOARD_ACPI_ENABLE_LIB_H_
9 | #define _BOARD_ACPI_ENABLE_LIB_H_
10 |
11 | #include
12 | #include
13 | #include
14 |
15 | EFI_STATUS
16 | EFIAPI
17 | BoardEnableAcpi (
18 | IN BOOLEAN EnableSci
19 | );
20 |
21 | EFI_STATUS
22 | EFIAPI
23 | BoardDisableAcpi (
24 | IN BOOLEAN DisableSci
25 | );
26 |
27 | #endif
28 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Features/Tbt/Include/Library/PeiCheckIommuSupportLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PeiCheckIommuSupport library.
3 |
4 |
5 | Copyright (c) 2019, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_CHECK_IOMMU_SUPPORT_LIBRARY_H_
10 | #define _PEI_CHECK_IOMMU_SUPPORT_LIBRARY_H_
11 |
12 | /**
13 | Check Iommu Ability base on SKU type, CSME FW type, Vtd and setup options.
14 | **/
15 | VOID
16 | PeiCheckIommuSupport (
17 | VOID
18 | );
19 |
20 | #endif // _PEI_CHECK_IOMMU_SUPPORT_LIBRARY_H_
21 |
22 |
--------------------------------------------------------------------------------
/Platform/NXP/LX2160aRdbPkg/AcpiTablesInclude/PlatformAcpiLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | * Acpi lib headers
3 | *
4 | * Copyright 2020 NXP
5 | * Copyright 2020 Puresoftware Ltd
6 | *
7 | * SPDX-License-Identifier: BSD-2-Clause-Patent
8 | *
9 | **/
10 |
11 |
12 | #ifndef LX2160ARDB_PLATFORM_ACPI_LIB_H
13 | #define LX2160ARDB_PLATFORM_ACPI_LIB_H
14 |
15 | #include
16 |
17 | /** C array containing the compiled AML template.
18 | These symbols are defined in the auto generated C file
19 | containing the AML bytecode array.
20 | */
21 | extern CHAR8 dsdt_aml_code[];
22 |
23 | #endif
24 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // SiFive U540 HiFive Unleashed Package Localized Strings and Content.
3 | //
4 | // Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_PACKAGE_ABSTRACT #language en-US "Provides SiFIve Freedom U540 HiFive Unleashed platform modules and libraries"
12 |
13 | #string STR_PACKAGE_DESCRIPTION #language en-US "This Package SiFIve Freedom U540 HiFive Unleashed platform modules and libraries."
14 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/Include/SaPciExpressLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PCI Express library.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _SA_PCI_EXPRESS_LIB_H_
10 | #define _SA_PCI_EXPRESS_LIB_H_
11 |
12 |
13 | /**
14 | Gets the base address of PCI Express.
15 |
16 | This internal functions retrieves PCI Express Base Address.
17 |
18 | @return The base address of PCI Express.
19 | **/
20 | VOID*
21 | GetPciExpressBaseAddress (
22 | VOID
23 | );
24 |
25 | #endif
26 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HardwareRootedBootIntegrity.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file contains the tests for the HardwareRootedBootIntegrity bit
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #include "HstiSiliconDxe.h"
10 |
11 | /**
12 | Run tests for HardwareRootedBootIntegrity bit
13 | **/
14 | VOID
15 | CheckHardwareRootedBootIntegrity (
16 | VOID
17 | )
18 | {
19 | if ((mFeatureImplemented[0] & HSTI_BYTE0_HARDWARE_ROOTED_BOOT_INTEGRITY) == 0) {
20 | return;
21 | }
22 |
23 | return ;
24 | }
25 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the TigerLake CPU Common FRU libraries.
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 | VtdInfoLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Vtd/Library/PeiDxeSmmVtdInfoLib/PeiDxeSmmVtdInfoLib.inf
10 | CpuPcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/CpuPcieRp/Library/PeiDxeSmmCpuPcieRpLib/PeiDxeSmmCpuPcieRpLib.inf
11 | CpuPcieInfoFruLib|$(PLATFORM_SI_PACKAGE)/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf
12 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Include/MePolicyCommon.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Definition for ME common policy
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 | #ifndef _ME_POLICY_COMMON_H_
8 | #define _ME_POLICY_COMMON_H_
9 |
10 | #include
11 |
12 | #include
13 |
14 | #ifndef PLATFORM_POR
15 | #define PLATFORM_POR 0
16 | #endif
17 | #ifndef FORCE_ENABLE
18 | #define FORCE_ENABLE 1
19 | #endif
20 | #ifndef FORCE_DISABLE
21 | #define FORCE_DISABLE 2
22 | #endif
23 |
24 | #endif // _ME_POLICY_COMMON_H_
25 |
--------------------------------------------------------------------------------
/Silicon/Socionext/SynQuacer/Drivers/OpteeRngDxe/OpteeRngDxe.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Installs OP-TEE based UEFI Random Number Generator protocol.
3 | //
4 | // Copyright (c) 2018, Linaro, Ltd. All rights reserved.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | // **/
9 |
10 |
11 | #string STR_MODULE_ABSTRACT #language en-US "Installs OP-TEE based UEFI Random Number Generator protocol"
12 |
13 | #string STR_MODULE_DESCRIPTION #language en-US "This driver installs UEFI Random Number Generator protocol based on OP-TEE library to interface with RNG service running in OP-TEE environment."
14 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/AMLUPD.asl:
--------------------------------------------------------------------------------
1 | /** @file
2 | ACPI DSDT table
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | ///////////////////////////////////////////////////////////////////////////////////
10 | //Values are set like this to have ASL compiler reserve enough space for objects
11 | ///////////////////////////////////////////////////////////////////////////////////
12 | //
13 | // Available Sleep states
14 | //
15 | Name(SS1,0)
16 | Name(SS2,0)
17 | Name(SS3,1)
18 | Name(SS4,1)
19 |
20 |
21 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.uni:
--------------------------------------------------------------------------------
1 | /** @file
2 | Base ACPI Timer Library
3 | Provides basic timer support using the ACPI timer hardware. The performance
4 | counter features are provided by the processors time stamp counter.
5 |
6 |
7 | Copyright (c) 2020, Intel Corporation. All rights reserved.
8 | SPDX-License-Identifier: BSD-2-Clause-Patent
9 | **/
10 |
11 | #string STR_MODULE_ABSTRACT #language en-US "ACPI Timer Library"
12 |
13 | #string STR_MODULE_DESCRIPTION #language en-US "Provides basic timer support using the ACPI timer hardware."
14 |
15 |
16 |
--------------------------------------------------------------------------------
/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/AMLUPD.asl:
--------------------------------------------------------------------------------
1 | /** @file
2 | ACPI DSDT table
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 |
10 |
11 | ///////////////////////////////////////////////////////////////////////////////////
12 | //Values are set like this to have ASL compiler reserve enough space for objects
13 | ///////////////////////////////////////////////////////////////////////////////////
14 | //
15 | // Available Sleep states
16 | //
17 | Name(SS1,0)
18 | Name(SS2,0)
19 | Name(SS3,1)
20 | Name(SS4,1)
21 |
22 |
--------------------------------------------------------------------------------
/Platform/Intel/Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInfoDxe.h:
--------------------------------------------------------------------------------
1 | /*++
2 |
3 | Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.
4 |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | Module Name:
8 | PlatformCpuInfoDxe.h
9 |
10 | Abstract:
11 | Platform Cpu Info Driver.
12 |
13 | --*/
14 |
15 | #ifndef _PLATFORM_CPU_INFO_DRIVER_H_
16 | #define _PLATFORM_CPU_INFO_DRIVER_H_
17 |
18 | #include
19 | #include
20 | #include
21 | #include
22 | #include
23 |
24 | #endif
25 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/AMLUPD.asl:
--------------------------------------------------------------------------------
1 | /** @file
2 | ACPI DSDT table
3 |
4 |
5 | Copyright (c) 2019, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | ///////////////////////////////////////////////////////////////////////////////////
10 | //Values are set like this to have ASL compiler reserve enough space for objects
11 | ///////////////////////////////////////////////////////////////////////////////////
12 | //
13 | // Available Sleep states
14 | //
15 | Name(SS1,0)
16 | Name(SS2,0)
17 | Name(SS3,1)
18 | Name(SS4,1)
19 |
20 |
21 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/BoardInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for board Init function for Post Memory Init phase.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_BOARD_INIT_LIB_H_
10 | #define _PEI_BOARD_INIT_LIB_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 | #include
18 |
19 | #endif // _PEI_BOARD_INIT_LIB_H_
20 |
21 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassStrings.uni:
--------------------------------------------------------------------------------
1 | // *++
2 | //
3 | // Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
4 | // Copyright (c) 2015, Hisilicon Limited. All rights reserved.
5 | // Copyright (c) 2015, Linaro Limited. All rights reserved.
6 | //
7 | // SPDX-License-Identifier: BSD-2-Clause-Patent
8 | //
9 | // --*/
10 |
11 | /=#
12 |
13 | #langdef en-US "English"
14 |
15 | //
16 | // Begin English Language Strings
17 | //
18 |
19 | #string STR_MEMORY_SUBCLASS_UNKNOWN #language en-US "Unknown"
20 |
21 | //
22 | // End English Language Strings
23 | //
24 |
25 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/BaseCpuMailboxLibNull/BaseCpuMailboxLibNull.inf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for Cpu Mailbox Null Lib
3 | #
4 | # Copyright (c) 2017 - 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | [Defines]
11 | INF_VERSION = 0x00010017
12 | BASE_NAME = BaseCpuMailboxLibNull
13 | FILE_GUID = 74F470BC-1769-4732-B9C0-EE9AB0B12411
14 | VERSION_STRING = 1.0
15 | MODULE_TYPE = BASE
16 | LIBRARY_CLASS = CpuMailboxLib
17 |
18 | [Packages]
19 | MdePkg/MdePkg.dec
20 |
21 | [Sources]
22 | BaseCpuMailboxLibNull.c
23 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/SampleCode/MdeModulePkg/Include/Guid/ConsoleOutDevice.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This GUID can be installed to the device handle to specify that the device is the console-out device.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef __CONSOLE_OUT_DEVICE_H__
10 | #define __CONSOLE_OUT_DEVICE_H__
11 |
12 | #define EFI_CONSOLE_OUT_DEVICE_GUID \
13 | { 0xd3b36f2c, 0xd551, 0x11d4, {0x9a, 0x46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } }
14 |
15 | extern EFI_GUID gEfiConsoleOutDeviceGuid;
16 |
17 | #endif
18 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Microcode flash device access library.
3 | //
4 | // Microcode flash device access library NULL instance.
5 | //
6 | // Copyright (c) 2016, Intel Corporation. All rights reserved.
7 | //
8 | // SPDX-License-Identifier: BSD-2-Clause-Patent
9 | //
10 | // **/
11 |
12 |
13 | #string STR_MODULE_ABSTRACT #language en-US "Microcode flash device access library."
14 |
15 | #string STR_MODULE_DESCRIPTION #language en-US "Microcode flash device access library NULL instance."
16 |
17 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/BaseCpuMailboxLibNull/BaseCpuMailboxLibNull.inf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for Cpu Mailbox Null Lib
3 | #
4 | # Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 |
11 | [Defines]
12 | INF_VERSION = 0x00010017
13 | BASE_NAME = BaseCpuMailboxLibNull
14 | FILE_GUID = 74F470BC-1769-4732-B9C0-EE9AB0B12411
15 | VERSION_STRING = 1.0
16 | MODULE_TYPE = BASE
17 | LIBRARY_CLASS = CpuMailboxLib
18 |
19 | [Packages]
20 | MdePkg/MdePkg.dec
21 |
22 | [Sources]
23 | BaseCpuMailboxLibNull.c
24 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/SampleCode/MdeModulePkg/Include/Guid/ConsoleOutDevice.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This GUID can be installed to the device handle to specify that the device is the console-out device.
3 |
4 | Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef __CONSOLE_OUT_DEVICE_H__
10 | #define __CONSOLE_OUT_DEVICE_H__
11 |
12 | #define EFI_CONSOLE_OUT_DEVICE_GUID \
13 | { 0xd3b36f2c, 0xd551, 0x11d4, {0x9a, 0x46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } }
14 |
15 | extern EFI_GUID gEfiConsoleOutDeviceGuid;
16 |
17 | #endif
18 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/PcieRp/Library/PeiDxeSmmPchPcieRpLib/PchPcieRpLibInternal.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | PCIE root port library.
3 | All function in this library is available for PEI, DXE, and SMM,
4 | But do not support UEFI RUNTIME environment call.
5 |
6 | Copyright (c) 2021, Intel Corporation. All rights reserved.
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 | **/
9 |
10 | #ifndef _PCH_PCIE_RP_LIB_INTERNAL_H_
11 | #define _PCH_PCIE_RP_LIB_INTERNAL_H_
12 |
13 | typedef struct {
14 | UINT8 DevNum;
15 | UINT8 Pid;
16 | UINT8 RpNumBase;
17 | } PCH_PCIE_CONTROLLER_INFO;
18 |
19 | #endif
20 |
21 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/SerialIo/LibraryPrivate/PeiDxeSmmSerialIoPrivateLib/SerialIoPrivateLibInternal.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for SerialIoPrivateLibInternal.
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 | #ifndef _SERIAL_IO_PRIVATE_LIB_INTERNAL_H_
8 | #define _SERIAL_IO_PRIVATE_LIB_INTERNAL_H_
9 |
10 | typedef struct {
11 | UINT32 Bar0;
12 | UINT32 Bar1;
13 | } SERIAL_IO_CONTROLLER_DESCRIPTOR;
14 |
15 | typedef struct {
16 | UINT8 DevNum;
17 | UINT8 FuncNum;
18 | } SERIAL_IO_BDF_NUMBERS;
19 |
20 | #endif
21 |
--------------------------------------------------------------------------------
/Silicon/Marvell/Include/Library/SampleAtResetLib.h:
--------------------------------------------------------------------------------
1 | /********************************************************************************
2 | Copyright (C) 2018 Marvell International Ltd.
3 |
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | *******************************************************************************/
7 |
8 | #ifndef __SAMPLE_AT_RESET_LIB_H__
9 | #define __SAMPLE_AT_RESET_LIB_H__
10 |
11 | UINT32
12 | EFIAPI
13 | SampleAtResetGetCpuFrequency (
14 | VOID
15 | );
16 |
17 | UINT32
18 | EFIAPI
19 | SampleAtResetGetDramFrequency (
20 | VOID
21 | );
22 |
23 | #endif /* __SAMPLE_AT_RESET_LIB_H__ */
24 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Library/BoardInitLib/BoardInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for board Init function for Post Memory Init phase.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_BOARD_INIT_LIB_H_
10 | #define _PEI_BOARD_INIT_LIB_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 | #include
18 |
19 | #endif // _PEI_BOARD_INIT_LIB_H_
20 |
21 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscSystemOptionStringData.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | This driver parses the mSmbiosMiscDataTable structure and reports
3 | any generated data to smbios.
4 |
5 | Copyright (c) 2013-2015 Intel Corporation.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 |
9 |
10 | **/
11 |
12 |
13 | #include "CommonHeader.h"
14 |
15 | #include "SmbiosMisc.h"
16 |
17 |
18 | //
19 | // Static (possibly build generated) Bios Vendor data.
20 | //
21 | MISC_SMBIOS_TABLE_DATA(EFI_MISC_SYSTEM_OPTION_STRING, SystemOptionString) = {
22 | {STRING_TOKEN (STR_MISC_SYSTEM_OPTION_STRING)}
23 | };
24 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.uni:
--------------------------------------------------------------------------------
1 | /** @file
2 | Base ACPI Timer Library
3 | Provides basic timer support using the ACPI timer hardware. The performance
4 | counter features are provided by the processors time stamp counter.
5 |
6 |
7 | Copyright (c) 2019, Intel Corporation. All rights reserved.
8 | SPDX-License-Identifier: BSD-2-Clause-Patent
9 | **/
10 |
11 | #string STR_MODULE_ABSTRACT #language en-US "ACPI Timer Library"
12 |
13 | #string STR_MODULE_DESCRIPTION #language en-US "Provides basic timer support using the ACPI timer hardware."
14 |
15 |
16 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Cpu/IncludePrivate/CpuPrivateData.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Struct definition for CpuPrivateData.
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 | #ifndef _CPU_PRIVATE_DATA_H_
9 | #define _CPU_PRIVATE_DATA_H_
10 |
11 | #include
12 |
13 | ///
14 | /// CPU Private Data saved and restored for S3.
15 | ///
16 | typedef struct {
17 | UINT64 ProcessorTraceAddress[MAX_PROCESSOR_THREADS];
18 | UINT32 S3BspMtrrTablePointer;
19 | } CPU_PRIVATE_DATA;
20 |
21 | #endif
22 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaSsdt.inf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the ACPI tables
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 | [Defines]
10 | INF_VERSION = 0x00010005
11 | BASE_NAME = SaSsdt
12 | FILE_GUID = ca89914d-2317-452e-b245-36c6fb77a9c6
13 | MODULE_TYPE = USER_DEFINED
14 | VERSION_STRING = 1.0
15 |
16 | [Sources]
17 | SaSsdt.asl
18 |
19 |
20 | [Packages]
21 | MdePkg/MdePkg.dec
22 | TigerlakeSiliconPkg/SiPkg.dec
23 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscChassisManufacturer.uni:
--------------------------------------------------------------------------------
1 | // /** @file
2 | // Miscellaneous chassis manufacturer information
3 | //
4 | // Copyright (c) 2013-2015 Intel Corporation.
5 | //
6 | // SPDX-License-Identifier: BSD-2-Clause-Patent
7 | //
8 | //
9 | // **/
10 |
11 |
12 | /=#
13 |
14 | #string STR_MISC_CHASSIS_MANUFACTURER #language en-US "Chassis Manufacturer"
15 | #string STR_MISC_CHASSIS_VERSION #language en-US "Chassis Version"
16 | #string STR_MISC_CHASSIS_SERIAL_NUMBER #language en-US "Chassis Serial Number"
17 | #string STR_MISC_CHASSIS_ASSET_TAG #language en-US "Chassis Asset Tag"
18 |
--------------------------------------------------------------------------------
/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheData.c:
--------------------------------------------------------------------------------
1 | /*++
2 |
3 | Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.
4 |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | Module Name:
8 |
9 | MiscBiosProcessorCache.c
10 |
11 | Abstract:
12 |
13 | Processor cache static data.
14 | Misc. subclass type 7.
15 | SMBIOS type 7.
16 |
17 | --*/
18 |
19 |
20 | #include "CommonHeader.h"
21 |
22 | #include "MiscSubclassDriver.h"
23 |
24 |
25 | //
26 | // Static (possibly build generated) Processor cache data.
27 | //
28 | MISC_SMBIOS_TABLE_DATA(UINTN, MiscProcessorCache) = 0;
29 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for board Init function for Post Memory Init phase.
3 |
4 |
5 | Copyright (c) 2019, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_BOARD_INIT_LIB_H_
10 | #define _PEI_BOARD_INIT_LIB_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 | #include
18 |
19 | #endif // _PEI_BOARD_INIT_LIB_H_
20 |
21 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Me/Include/MePolicyCommon.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Definition for ME common policy
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 | #ifndef _ME_POLICY_COMMON_H_
9 | #define _ME_POLICY_COMMON_H_
10 |
11 | #include
12 |
13 | #include "ConfigBlock/MePeiConfig.h"
14 |
15 | #ifndef PLATFORM_POR
16 | #define PLATFORM_POR 0
17 | #endif
18 | #ifndef FORCE_ENABLE
19 | #define FORCE_ENABLE 1
20 | #endif
21 | #ifndef FORCE_DISABLE
22 | #define FORCE_DISABLE 2
23 | #endif
24 |
25 | #endif // _ME_POLICY_COMMON_H_
26 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiOcWdtLibNull/PeiOcWdtLibNull.inf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component Description File for OcWdt Support.
3 | #
4 | # Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 |
11 | [Defines]
12 | INF_VERSION = 0x00010017
13 | BASE_NAME = PeiOcWdtLib
14 | FILE_GUID = DB65B36B-E276-4A2b-AB20-61764889E483
15 | VERSION_STRING = 1.0
16 | MODULE_TYPE = PEIM
17 | LIBRARY_CLASS = OcWdtLib
18 |
19 |
20 | [Packages]
21 | MdePkg/MdePkg.dec
22 | KabylakeSiliconPkg/SiPkg.dec
23 |
24 |
25 | [Sources]
26 | PeiOcWdtLibNull.c
27 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PeiTBTPolicy library.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_TBT_POLICY_LIBRARY_H_
10 | #define _PEI_TBT_POLICY_LIBRARY_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 |
18 | #endif // _PEI_TBT_POLICY_LIBRARY_H_
19 |
20 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PeiTBTPolicy library.
3 |
4 |
5 | Copyright (c) 2019, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_TBT_POLICY_LIBRARY_H_
10 | #define _PEI_TBT_POLICY_LIBRARY_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 |
18 | #endif // _PEI_TBT_POLICY_LIBRARY_H_
19 |
20 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SaInit/Dxe/PcieComplex.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This is header file for SA PCIE Root Complex initialization.
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | EFI_STATUS
10 | PegInitBeforeEndOfDxe (
11 | VOID
12 | );
13 |
14 | /**
15 | This function performs SA registers Saving/Restoring in EndOfDxe callback
16 |
17 | @retval EFI_SUCCESS - Save/restore has done
18 | @retval EFI_UNSUPPORTED - Save/restore not done successfully
19 | **/
20 | EFI_STATUS
21 | SaSaveRestore (
22 | VOID
23 | );
24 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Wdt.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Watchdog Timer PPI
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 | #ifndef _PEI_WDT_H_
9 | #define _PEI_WDT_H_
10 |
11 | #include
12 | //
13 | // MRC takes a lot of time to execute in debug mode
14 | //
15 | #define WDT_TIMEOUT_BETWEEN_PEI_DXE 60
16 |
17 | //
18 | // Extern the GUID for PPI users.
19 | //
20 | extern EFI_GUID gWdtPpiGuid;
21 |
22 | ///
23 | /// Reuse WDT_PROTOCOL definition
24 | ///
25 | typedef WDT_PROTOCOL WDT_PPI;
26 |
27 | #endif
28 |
--------------------------------------------------------------------------------
/Silicon/NXP/Include/Library/SerDes.h:
--------------------------------------------------------------------------------
1 | /** SerDes.h
2 | Header file for SoC specific SerDes routines
3 |
4 | Copyright 2017-2020 NXP
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef SERDES_H
10 | #define SERDES_H
11 |
12 | VOID
13 | GetSerDesProtocolMap (
14 | OUT UINT64 *SerDesProtocolMap
15 | );
16 |
17 | typedef VOID
18 | (*SERDES_PROBE_LANES_CALLBACK) (
19 | IN UINT32 LaneProtocol,
20 | IN VOID *Arg
21 | );
22 |
23 | VOID
24 | SerDesProbeLanes (
25 | IN SERDES_PROBE_LANES_CALLBACK SerDesLaneProbeCallback,
26 | IN VOID *Arg
27 | );
28 | #endif
29 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Include/Guid/QuarkVariableLock.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Guid and variable name used to trigger quark lock of specific UEFI variables.
4 |
5 | Copyright (c) 2013 Intel Corporation.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 |
9 | **/
10 |
11 | #ifndef _QUARK_VARIABLE_LOCK_GUID_H_
12 | #define _QUARK_VARIABLE_LOCK_GUID_H_
13 |
14 | #define QUARK_VARIABLE_LOCK_GUID \
15 | { \
16 | 0xeef749c2, 0xc047, 0x4d6e, { 0xb1, 0xbc, 0xd3, 0x6e, 0xb3, 0xa5, 0x55, 0x9c } \
17 | }
18 |
19 | #define QUARK_VARIABLE_LOCK_NAME L"QuarkVariableLock"
20 |
21 | extern EFI_GUID gQuarkVariableLockGuid;
22 |
23 | #endif
24 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Include/Library/PeiGetVtdPmrAlignmentLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Get the global VTd PMR alignment information library.
3 |
4 | Copyright (c) 2019, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 | #ifndef __GET_VTD_PMR_ALIGN_LIB_H__
9 | #define __GET_VTD_PMR_ALIGN_LIB_H__
10 | #include
11 |
12 | /**
13 | Get the global VT-d protected memory alignment.
14 | @return The maximum protected memory alignment. Ex: 0x100000
15 | **/
16 | UINTN
17 | EFIAPI
18 | GetGlobalVtdPmrAlignment (
19 | );
20 |
21 | #endif // __GET_VTD_PMR_ALIGN_LIB_H__
22 |
--------------------------------------------------------------------------------
/Silicon/Marvell/Include/Library/NonDiscoverableInitLib.h:
--------------------------------------------------------------------------------
1 | /**
2 | *
3 | * Copyright (c) 2017, Linaro Ltd. All rights reserved.
4 | * Copyright (c) 2018, Marvell International Ltd. All rights reserved.
5 | *
6 | * SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 |
10 | #ifndef __NON_DISCOVERABLE_INIT_LIB_H__
11 | #define __NON_DISCOVERABLE_INIT_LIB_H__
12 |
13 | #include
14 |
15 | NON_DISCOVERABLE_DEVICE_INIT
16 | EFIAPI
17 | NonDiscoverableDeviceInitializerGet (
18 | IN NON_DISCOVERABLE_DEVICE_TYPE Type,
19 | IN UINTN Index
20 | );
21 |
22 | #endif
23 |
--------------------------------------------------------------------------------
/Silicon/NXP/Chassis2/Library/ChassisLib/Erratum.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | * Header defining the Base addresses, sizes, flags etc for Erratas
3 | *
4 | * Copyright 2020 NXP
5 | *
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | *
8 | **/
9 |
10 | #ifndef ERRATUM_H__
11 | #define ERRATUM_H__
12 |
13 | #define USB_TXVREFTUNE 0x9
14 | #define USB_SQRXTUNE 0xFC7FFFFF
15 | #define USB_PCSTXSWINGFULL 0x47
16 | #define USB_PHY_RX_EQ_VAL_1 0x0000
17 | #define USB_PHY_RX_EQ_VAL_2 0x8000
18 | #define USB_PHY_RX_EQ_VAL_3 0x8003
19 | #define USB_PHY_RX_EQ_VAL_4 0x800b
20 |
21 | #define USB_PHY_RX_OVRD_IN_HI 0x200c
22 |
23 | #endif
24 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Wdt.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Watchdog Timer PPI
3 |
4 | Copyright (c) 2019 Intel Corporation. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _PEI_WDT_H_
10 | #define _PEI_WDT_H_
11 |
12 | #include
13 | //
14 | // MRC takes a lot of time to execute in debug mode
15 | //
16 | #define WDT_TIMEOUT_BETWEEN_PEI_DXE 60
17 |
18 | //
19 | // Extern the GUID for PPI users.
20 | //
21 | extern EFI_GUID gWdtPpiGuid;
22 |
23 | ///
24 | /// Reuse WDT_PROTOCOL definition
25 | ///
26 | typedef WDT_PROTOCOL WDT_PPI;
27 |
28 | #endif
29 |
--------------------------------------------------------------------------------
/Silicon/Socionext/SynQuacer/Include/Platform/DramInfo.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Data structure for passing DRAM information from lower level firmware
3 |
4 | Copyright (c) 2017, Linaro Ltd. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 |
10 | #ifndef _SYNQUACER_PLATFORM_DRAM_INFO_H_
11 | #define _SYNQUACER_PLATFORM_DRAM_INFO_H_
12 |
13 | typedef struct {
14 | UINT64 Base;
15 | UINT64 Size;
16 | } DRAM_INFO_ENTRY;
17 |
18 | typedef struct {
19 | UINT32 NumRegions;
20 | UINT32 Reserved;
21 | DRAM_INFO_ENTRY Entry[3];
22 | } DRAM_INFO;
23 |
24 | #endif
25 |
--------------------------------------------------------------------------------
/Platform/Intel/MinPlatformPkg/Include/Library/SecBoardInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2017, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 |
6 | **/
7 |
8 | #ifndef _SEC_BOARD_INIT_LIB_H_
9 | #define _SEC_BOARD_INIT_LIB_H_
10 |
11 | #include
12 | #include
13 |
14 | /**
15 | This is stackless function in 32bit.
16 |
17 | return address - ESP.
18 | All other registers can be used.
19 | **/
20 | VOID
21 | EFIAPI
22 | BoardBeforeTempRamInit (
23 | VOID
24 | );
25 |
26 | EFI_STATUS
27 | EFIAPI
28 | BoardAfterTempRamInit (
29 | VOID
30 | );
31 |
32 | #endif
33 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/BoardFuncInitPreMem.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | Source code for the board configuration init function in Post Memory init phase.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #include
10 |
11 | //
12 | // Null function for nothing GOP VBT update.
13 | //
14 | VOID
15 | GopVbtSpecificUpdateNull (
16 | IN CHILD_STRUCT **ChildStructPtr
17 | );
18 |
19 | //
20 | // for CFL U DDR4
21 | //
22 | VOID
23 | UpXtremeSpecificUpdate (
24 | IN CHILD_STRUCT **ChildStructPtr
25 | );
26 |
--------------------------------------------------------------------------------
/Silicon/Intel/IntelSiliconPkg/Feature/Capsule/MicrocodeCapsuleTxt/Microcode/Microcode.inf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Microcode text file to binary
3 | #
4 | # Convert text format microcode to binary format.
5 | #
6 | # Copyright (c) 2016, Intel Corporation. All rights reserved.
7 | # SPDX-License-Identifier: BSD-2-Clause-Patent
8 | #
9 | ##
10 |
11 | [Defines]
12 | BASE_NAME = Microcode
13 | FILE_GUID = ABC36AAC-2031-4422-896E-0A3B899AD0B4
14 | COMPONENT_TYPE = Microcode
15 | FFS_EXT = .ffs
16 |
17 | [Sources]
18 | #
19 | # Uncomment the following line and update with name of Microcode TXT file
20 | #
21 | #Microcode.txt
22 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiPolicyInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the PolicyInitPei Library.
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef _POLICY_INIT_PEI_LIB_H_
10 | #define _POLICY_INIT_PEI_LIB_H_
11 |
12 | /**
13 | Initialize Intel PEI Platform Policy
14 |
15 | **/
16 | VOID
17 | EFIAPI
18 | PeiPolicyInitPreMem (
19 | VOID
20 | );
21 |
22 | /**
23 | Initialize Intel PEI Platform Policy
24 |
25 | **/
26 | VOID
27 | EFIAPI
28 | PeiPolicyInit (
29 | VOID
30 | );
31 | #endif
32 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Graphics/AcpiTables/IgfxSsdt.inf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Component description file for the Igfx ACPI tables
3 | #
4 | # Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
6 | #
7 | ##
8 |
9 | [Defines]
10 | INF_VERSION = 0x00010005
11 | BASE_NAME = IgfxSsdt
12 | FILE_GUID = CE9CAA0E-8248-442C-9E57-50F212E2BAED
13 | MODULE_TYPE = USER_DEFINED
14 | VERSION_STRING = 1.0
15 |
16 | [Sources]
17 | IgfxSsdt.asl
18 |
19 | [Packages]
20 | MdePkg/MdePkg.dec
21 | TigerlakeSiliconPkg/SiPkg.dec
22 |
23 | [FixedPcd]
24 |
--------------------------------------------------------------------------------
/Silicon/TexasInstruments/Omap35xxPkg/Include/Library/OmapLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
4 |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef __OMAPLIB_H__
10 | #define __OMAPLIB_H__
11 |
12 | UINT32
13 | EFIAPI
14 | GpioBase (
15 | IN UINTN Port
16 | );
17 |
18 | UINT32
19 | EFIAPI
20 | TimerBase (
21 | IN UINTN Timer
22 | );
23 |
24 | UINTN
25 | EFIAPI
26 | InterruptVectorForTimer (
27 | IN UINTN TImer
28 | );
29 |
30 | UINT32
31 | EFIAPI
32 | UartBase (
33 | IN UINTN Uart
34 | );
35 |
36 |
37 | #endif // __OMAPLIB_H__
38 |
39 |
--------------------------------------------------------------------------------
/Silicon/Intel/TigerlakeSiliconPkg/Cpu/Include/CpuDataStruct.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | This file declares various data structures used in CPU reference code.
3 |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 | **/
7 |
8 | #ifndef _CPU_DATA_STRUCT_H
9 | #define _CPU_DATA_STRUCT_H
10 |
11 | ///
12 | /// Structure to hold the return value of AsmCpuid instruction
13 | ///
14 | typedef struct {
15 | UINT32 RegEax; ///< Value of EAX.
16 | UINT32 RegEbx; ///< Value of EBX.
17 | UINT32 RegEcx; ///< Value of ECX.
18 | UINT32 RegEdx; ///< Value of EDX.
19 | } EFI_CPUID_REGISTER;
20 |
21 | #endif
22 |
--------------------------------------------------------------------------------
/Platform/Intel/QuarkPlatformPkg/Include/Guid/CapsuleOnDataCD.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Capsule on Data CD GUID.
3 |
4 | Copyright (c) 2013-2015 Intel Corporation.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | This is the contract between the recovery module and device recovery module
9 | in order to convey the name of a given recovery module type
10 |
11 | **/
12 |
13 | #ifndef _CAPSULE_ON_DATA_CD_H
14 | #define _CAPSULE_ON_DATA_CD_H
15 |
16 | #define PEI_CAPSULE_ON_DATA_CD_GUID \
17 | { \
18 | 0x5cac0099, 0x0dc9, 0x48e5, {0x80, 0x68, 0xbb, 0x95, 0xf5, 0x40, 0x0a, 0x9f } \
19 | };
20 |
21 | extern EFI_GUID gPeiCapsuleOnDataCDGuid;
22 |
23 | #endif
24 |
--------------------------------------------------------------------------------
/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Power.asl:
--------------------------------------------------------------------------------
1 | /** @file
2 | Differentiated System Description Table Fields (DSDT)
3 |
4 | Copyright (c) 2014, ARM Ltd. All rights reserved.
5 | Copyright (c) 2018, Hisilicon Limited. All rights reserved.
6 | Copyright (c) 2016, Linaro Limited. All rights reserved.
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 |
9 | Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
10 |
11 | **/
12 |
13 | Scope(_SB)
14 | {
15 | Device(PWRB) {
16 | Name(_HID, "PNP0C0C")
17 | Name(_UID, Zero)
18 | Method(_STA, 0x0, NotSerialized) {
19 | Return(0xF)
20 | }
21 | }
22 | }
23 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLibrary.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for the DxeSaPolicy library.
3 |
4 | Copyright (c) 2017 - 2020 Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 | #ifndef _DXE_SA_POLICY_LIBRARY_H_
9 | #define _DXE_SA_POLICY_LIBRARY_H_
10 |
11 | #include
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 |
18 | #include
19 | #endif // _DXE_SA_POLICY_LIBRARY_H_
20 |
--------------------------------------------------------------------------------
/Silicon/Intel/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Guid/Vlv2Variable.h:
--------------------------------------------------------------------------------
1 | /*++
2 |
3 | Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
4 |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 |
8 |
9 | Module Name:
10 |
11 | Vlv2Variable.h
12 |
13 | Abstract:
14 |
15 | GUID used to define ValleyView2 variable.
16 |
17 | --*/
18 |
19 | #ifndef _VLV2_VARIABLE_GUID_H_
20 | #define _VLV2_VARIABLE_GUID_H_
21 |
22 | #define EFI_VLV2_VARIABLE \
23 | { \
24 | 0x10ba6bbe, 0xa97e, 0x41c3, {0x9a, 0x07, 0x60, 0x7a, 0xd9, 0xbd, 0x60, 0xe5 } \
25 | }
26 | extern EFI_GUID gEfiVlv2VariableGuid;
27 |
28 | #endif
29 |
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/Features/Intel/OutOfBandManagement/Readme.md:
--------------------------------------------------------------------------------
1 | # **EDK II Minimum Platform Firmware Out-of-Band Management Advanced Features**
2 |
3 | This feature domain directory contains out-of-band management related advanced features.
4 |
5 | Features may be added to this domain whose primary role and responsibility is related to out-of-band management. These
6 | are features that typically interface with an external controller to enable system maintenance operations such as
7 | monitoring, logging, and recovery control functions independent of the main processors, host CPU firmware (BIOS), and
8 | host operating system. An out-of-band controller is usually available when the system is in a powered down state.
9 |
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/Platform/Intel/QuarkPlatformPkg/Include/Guid/MemoryConfigData.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Define a GUID name for GUID HOB which is used to pass Memory
3 | Configuration Data information to different modules.
4 |
5 | Copyright (c) 2013-2015 Intel Corporation.
6 |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent
8 |
9 | **/
10 |
11 | #ifndef _MEMORY_CONFIG_DATA_H_
12 | #define _MEMORY_CONFIG_DATA_H_
13 |
14 | #define EFI_MEMORY_CONFIG_DATA_GUID \
15 | { \
16 | 0x80dbd530, 0xb74c, 0x4f11, {0x8c, 0x03, 0x41, 0x86, 0x65, 0x53, 0x28, 0x31 } \
17 | }
18 |
19 | #define EFI_MEMORY_CONFIG_DATA_NAME L"MemoryConfig"
20 |
21 | extern EFI_GUID gEfiMemoryConfigDataGuid;
22 |
23 | #endif
24 |
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/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c:
--------------------------------------------------------------------------------
1 | /** @file
2 | Source code for the board configuration init function in Post Memory init phase.
3 |
4 |
5 | Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #include
10 |
11 | //
12 | // Null function for nothing GOP VBT update.
13 | //
14 | VOID
15 | GopVbtSpecificUpdateNull (
16 | IN CHILD_STRUCT **ChildStructPtr
17 | );
18 |
19 | //
20 | // for CFL U DDR4
21 | //
22 | VOID
23 | CflUDdr4GopVbtSpecificUpdate (
24 | IN CHILD_STRUCT **ChildStructPtr
25 | );
26 |
--------------------------------------------------------------------------------
/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiDxeSmmSaPlatformLib/SaPlatformLibrary.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Header file for SA Platform Lib implementation.
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 | #ifndef _SA_PLATFORM_LIBRARY_IMPLEMENTATION_H_
10 | #define _SA_PLATFORM_LIBRARY_IMPLEMENTATION_H_
11 |
12 | #include
13 | #include
14 | #include
15 | #include
16 | #include
17 | #include
18 | #include
19 | #include
20 |
21 | #endif
22 |
--------------------------------------------------------------------------------
/Silicon/Intel/Vlv2DeviceRefCodePkg/Include/Guid/Vlv2DeviceRefCodePkgTokenSpace.h:
--------------------------------------------------------------------------------
1 | /*++
2 |
3 | Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved
4 |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 |
8 | Module Name:
9 |
10 | Vlv2DeviceRefCodeTokenSpace.h
11 |
12 | Abstract:
13 |
14 | Interface definition details for GUID.
15 |
16 | --*/
17 | #ifndef __VLV2_REF_CODE__PKG_TOKEN_SPACE_GUID_H__
18 | #define __VLV2_REF_CODE__PKG_TOKEN_SPACE_GUID_H__
19 |
20 | #define EFI_VLV_TOKEN_SPACE_GUID \
21 | { 0xca452c68, 0xdf0c, 0x45c9, {0x82, 0xfb, 0xea, 0xe4, 0x2b, 0x31, 0x29, 0x46}}
22 | extern EFI_GUID gEfiVLVTokenSpaceGuid;
23 |
24 | #endif
25 |
--------------------------------------------------------------------------------
/Silicon/Marvell/Include/IndustryStandard/MvSmc.h:
--------------------------------------------------------------------------------
1 | /**
2 | *
3 | * Copyright (C) 2019, Marvell International Ltd. and its affiliates.
4 | *
5 | * SPDX-License-Identifier: BSD-2-Clause-Patent
6 | *
7 | **/
8 |
9 | #ifndef __MV_SMC_H__
10 | #define __MV_SMC_H__
11 |
12 | /* Marvell SiP services SMC ID's */
13 | #define MV_SMC_ID_COMPHY_POWER_ON 0x82000001
14 | #define MV_SMC_ID_COMPHY_POWER_OFF 0x82000002
15 | #define MV_SMC_ID_COMPHY_PLL_LOCK 0x82000003
16 | #define MV_SMC_ID_DRAM_SIZE 0x82000010
17 | #define MV_SMC_ID_PMU_IRQ_ENABLE 0x82000012
18 | #define MV_SMC_ID_PMU_IRQ_DISABLE 0x82000013
19 |
20 | #endif //__MV_SMC_H__
21 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Include/Library/DxeSaPolicyUpdateLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2020, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 | **/
6 |
7 | #ifndef _DXE_SA_POLICY_UPDATE_LIB_H_
8 | #define _DXE_SA_POLICY_UPDATE_LIB_H_
9 |
10 | /**
11 | Get data for platform policy from setup options.
12 |
13 | @param[in] SaPolicy The pointer to get SA Policy protocol instance
14 |
15 | @retval EFI_SUCCESS Operation success.
16 |
17 | **/
18 | EFI_STATUS
19 | EFIAPI
20 | UpdateDxeSaPolicy (
21 | IN OUT SA_POLICY_PROTOCOL *SaPolicy
22 | );
23 |
24 | #endif
25 |
26 |
--------------------------------------------------------------------------------
/Platform/Intel/CometlakeOpenBoardPkg/Include/Library/FspPolicyInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Function prototype of FspPolicyInitLib.
3 |
4 |
5 | Copyright (c) 2020, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _FSP_POLICY_INIT_LIB_H_
10 | #define _FSP_POLICY_INIT_LIB_H_
11 |
12 | #include
13 | #include
14 | #include
15 |
16 | VOID
17 | EFIAPI
18 | FspPolicyInitPreMem (
19 | IN FSPM_UPD *FspmUpdDataPtr
20 | );
21 |
22 | VOID
23 | EFIAPI
24 | FspPolicyInit (
25 | IN OUT FSPS_UPD *FspsUpd
26 | );
27 |
28 | #endif // _FSP_POLICY_INIT_LIB_H_
29 |
30 |
--------------------------------------------------------------------------------
/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Video.asl:
--------------------------------------------------------------------------------
1 | /** @file
2 | ACPI DSDT table
3 |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.
5 | SPDX-License-Identifier: BSD-2-Clause-Patent
6 |
7 | **/
8 |
9 |
10 |
11 | External(DIDX)
12 |
13 | // Brightness Notification:
14 | // Generate a brightness related notification
15 | // to the LFP if its populated.
16 | //
17 | // Arguments:
18 | // Arg0: Notification value.
19 | //
20 | // Return Value:
21 | // None
22 |
23 | Method(BRTN,1,Serialized)
24 | {
25 | If(LEqual(And(DIDX,0x0F00),0x400))
26 | {
27 | Notify(\_SB.PCI0.GFX0.DD1F,Arg0)
28 | }
29 | }
30 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/Library/DxeSaPolicyUpdateLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 |
3 | Copyright (c) 2019, Intel Corporation. All rights reserved.
4 | SPDX-License-Identifier: BSD-2-Clause-Patent
5 | **/
6 |
7 | #ifndef _DXE_SA_POLICY_UPDATE_LIB_H_
8 | #define _DXE_SA_POLICY_UPDATE_LIB_H_
9 |
10 | /**
11 | Get data for platform policy from setup options.
12 |
13 | @param[in] SaPolicy The pointer to get SA Policy protocol instance
14 |
15 | @retval EFI_SUCCESS Operation success.
16 |
17 | **/
18 | EFI_STATUS
19 | EFIAPI
20 | UpdateDxeSaPolicy (
21 | IN OUT SA_POLICY_PROTOCOL *SaPolicy
22 | );
23 |
24 | #endif
25 |
26 |
--------------------------------------------------------------------------------
/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/Library/FspPolicyInitLib.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | Function prototype of FspPolicyInitLib.
3 |
4 |
5 | Copyright (c) 2019, Intel Corporation. All rights reserved.
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 | **/
8 |
9 | #ifndef _FSP_POLICY_INIT_LIB_H_
10 | #define _FSP_POLICY_INIT_LIB_H_
11 |
12 | #include
13 | #include
14 | #include
15 |
16 | VOID
17 | EFIAPI
18 | FspPolicyInitPreMem (
19 | IN FSPM_UPD *FspmUpdDataPtr
20 | );
21 |
22 | VOID
23 | EFIAPI
24 | FspPolicyInit (
25 | IN OUT FSPS_UPD *FspsUpd
26 | );
27 |
28 | #endif // _FSP_POLICY_INIT_LIB_H_
29 |
30 |
--------------------------------------------------------------------------------
/Platform/SiFive/U5SeriesPkg/Include/U5Clint.h:
--------------------------------------------------------------------------------
1 | /** @file
2 | RISC-V Timer Architectural definition for U500 platform.
3 |
4 | Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
5 |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent
7 |
8 | **/
9 | #ifndef U5_CLINT_H_
10 | #define U5_CLINT_H_
11 |
12 | #define CLINT_REG_BASE_ADDR 0x02000000
13 | #define CLINT_REG_MTIME 0x0200BFF8
14 | #define CLINT_REG_MTIMECMP0 0x02004000
15 | #define CLINT_REG_MTIMECMP1 0x02004008
16 | #define CLINT_REG_MTIMECMP2 0x02004010
17 | #define CLINT_REG_MTIMECMP3 0x02004018
18 | #define CLINT_REG_MTIMECMP4 0x02004020
19 |
20 | #endif
21 |
--------------------------------------------------------------------------------
/Silicon/Intel/CoffeelakeSiliconPkg/Library/DxeAslUpdateLibNull/DxeAslUpdateLibNull.inf:
--------------------------------------------------------------------------------
1 | ## @file
2 | # Provides services to update ASL tables.
3 | #
4 | # Copyright (c) 2019 Intel Corporation. All rights reserved.
5 | #
6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
7 | #
8 | ##
9 |
10 | [Defines]
11 | INF_VERSION = 0x00010017
12 | BASE_NAME = DxeAslUpdateLibNull
13 | FILE_GUID = C7A3725F-6146-4FAB-B2EF-B4CED222DA52
14 | VERSION_STRING = 1.0
15 | MODULE_TYPE = BASE
16 | LIBRARY_CLASS = AslUpdateLib
17 |
18 |
19 |
20 |
21 | [Packages]
22 | MdePkg/MdePkg.dec
23 | CoffeelakeSiliconPkg/SiPkg.dec
24 |
25 |
26 | [Sources]
27 | DxeAslUpdateLibNull.c
28 |
29 |
30 |
31 |
--------------------------------------------------------------------------------