├── .github └── workflows │ └── examples.yml ├── .gitignore ├── LICENSE ├── README.md ├── boards ├── icestick.json └── icezum.json ├── builder └── main.py ├── examples ├── counter │ ├── .gitignore │ ├── README.md │ ├── include │ │ └── README │ ├── lib │ │ └── README │ ├── platformio.ini │ ├── src │ │ ├── counter.pcf │ │ ├── counter.v │ │ ├── counter_tb.gtkw │ │ └── counter_tb.v │ └── test │ │ └── README └── leds │ ├── .gitignore │ ├── README.md │ ├── include │ └── README │ ├── lib │ └── README │ ├── platformio.ini │ ├── src │ ├── leds_on.pcf │ ├── leds_on.v │ ├── leds_on_tb.gtkw │ └── leds_on_tb.v │ └── test │ └── README ├── platform.json └── platform.py /.github/workflows/examples.yml: -------------------------------------------------------------------------------- 1 | name: Examples 2 | 3 | on: [push, pull_request] 4 | 5 | jobs: 6 | build: 7 | strategy: 8 | fail-fast: false 9 | matrix: 10 | os: [ubuntu-latest, windows-latest, macos-latest] 11 | example: 12 | - "examples/counter" 13 | - "examples/leds" 14 | runs-on: ${{ matrix.os }} 15 | steps: 16 | - uses: actions/checkout@v3 17 | with: 18 | submodules: "recursive" 19 | - name: Set up Python 20 | uses: actions/setup-python@v3 21 | with: 22 | python-version: "3.9" 23 | - name: Install dependencies 24 | run: | 25 | pip install -U https://github.com/platformio/platformio/archive/develop.zip 26 | pio pkg install --global --platform symlink://. 27 | - name: Build examples 28 | run: | 29 | pio run -d ${{ matrix.example }} 30 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | *.pyc 2 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Apache License 2 | Version 2.0, January 2004 3 | http://www.apache.org/licenses/ 4 | 5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 6 | 7 | 1. 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In no event and under no legal theory, 154 | whether in tort (including negligence), contract, or otherwise, 155 | unless required by applicable law (such as deliberate and grossly 156 | negligent acts) or agreed to in writing, shall any Contributor be 157 | liable to You for damages, including any direct, indirect, special, 158 | incidental, or consequential damages of any character arising as a 159 | result of this License or out of the use or inability to use the 160 | Work (including but not limited to damages for loss of goodwill, 161 | work stoppage, computer failure or malfunction, or any and all 162 | other commercial damages or losses), even if such Contributor 163 | has been advised of the possibility of such damages. 164 | 165 | 9. Accepting Warranty or Additional Liability. While redistributing 166 | the Work or Derivative Works thereof, You may choose to offer, 167 | and charge a fee for, acceptance of support, warranty, indemnity, 168 | or other liability obligations and/or rights consistent with this 169 | License. However, in accepting such obligations, You may act only 170 | on Your own behalf and on Your sole responsibility, not on behalf 171 | of any other Contributor, and only if You agree to indemnify, 172 | defend, and hold each Contributor harmless for any liability 173 | incurred by, or claims asserted against, such Contributor by reason 174 | of your accepting any such warranty or additional liability. 175 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Lattice iCE40: development platform for [PlatformIO](https://platformio.org) 2 | 3 | [![Build Status](https://github.com/platformio/platform-lattice_ice40/workflows/Examples/badge.svg)](https://github.com/platformio/platform-lattice_ice40/actions) 4 | 5 | 6 | Lattice iCE40 are the first FPGAs fully usable by open source tools. 7 | 8 | * [Home](https://registry.platformio.org/platforms/platformio/lattice_ice40) (home page in the PlatformIO Registry) 9 | * [Documentation](https://docs.platformio.org/page/platforms/lattice_ice40.html) (advanced usage, packages, boards, frameworks, etc.) 10 | 11 | # Usage 12 | 13 | 1. [Install PlatformIO](https://platformio.org) 14 | 2. Create PlatformIO project and configure a platform option in [platformio.ini](https://docs.platformio.org/page/projectconf.html) file: 15 | 16 | ## Stable version 17 | 18 | ```ini 19 | [env:stable] 20 | platform = lattice_ice40 21 | board = ... 22 | ... 23 | ``` 24 | 25 | ## Development version 26 | 27 | ```ini 28 | [env:development] 29 | platform = https://github.com/platformio/platform-lattice_ice40.git 30 | board = ... 31 | ... 32 | ``` 33 | 34 | # Configuration 35 | 36 | Please navigate to [documentation](https://docs.platformio.org/page/platforms/lattice_ice40.html). 37 | 38 | 39 | # Credits 40 | 41 | * [Apio](https://github.com/FPGAwars/apio) 42 | * [Icestorm](http://www.clifford.at/icestorm/) 43 | * [Icarus Verilog](http://iverilog.icarus.com/) 44 | -------------------------------------------------------------------------------- /boards/icestick.json: -------------------------------------------------------------------------------- 1 | { 2 | "build": { 3 | "core": "icestick", 4 | "cpu": "fpga", 5 | "f_cpu": "12000000L", 6 | "hwids": [ 7 | [ 8 | "0x0403", 9 | "0x6010" 10 | ] 11 | ], 12 | "mcu": "iCE40-HX1K-TQ144", 13 | "pack": "tq144", 14 | "size": "1k", 15 | "type": "hx" 16 | }, 17 | "frameworks": [], 18 | "name": "Lattice iCEstick FPGA Evaluation Kit", 19 | "upload": { 20 | "maximum_ram_size": 32768, 21 | "maximum_size": 32768 22 | }, 23 | "url": "http://www.latticesemi.com/icestick", 24 | "vendor": "Lattice" 25 | } 26 | -------------------------------------------------------------------------------- /boards/icezum.json: -------------------------------------------------------------------------------- 1 | { 2 | "build": { 3 | "core": "icezum", 4 | "cpu": "fpga", 5 | "f_cpu": "12000000L", 6 | "hwids": [ 7 | [ 8 | "0x0403", 9 | "0x6010" 10 | ] 11 | ], 12 | "mcu": "iCE40-HX1K-TQ144", 13 | "pack": "tq144", 14 | "size": "1k", 15 | "type": "hx" 16 | }, 17 | "frameworks": [], 18 | "name": "IceZUM Alhambra FPGA", 19 | "upload": { 20 | "maximum_ram_size": 32768, 21 | "maximum_size": 32768 22 | }, 23 | "url": "https://github.com/FPGAwars/icezum/wiki", 24 | "vendor": "FPGAwars" 25 | } 26 | -------------------------------------------------------------------------------- /builder/main.py: -------------------------------------------------------------------------------- 1 | # -*- coding: utf-8 -*- 2 | # Copyright 2014-present PlatformIO 3 | # Copyright 2016-present Juan González 4 | # Jesús Arroyo Torrens 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the "License"); 7 | # you may not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # http://www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an "AS IS" BASIS, 14 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | 18 | """ 19 | Build script for Lattice iCE40 FPGAs 20 | """ 21 | 22 | import os 23 | from os.path import join 24 | from platform import system 25 | 26 | from SCons.Script import (COMMAND_LINE_TARGETS, AlwaysBuild, Builder, Default, 27 | DefaultEnvironment, Exit, GetOption, 28 | Glob) 29 | 30 | env = DefaultEnvironment() 31 | pioPlatform = env.PioPlatform() 32 | 33 | env.Replace( 34 | PROGNAME='hardware', 35 | UPLOADER='iceprog', 36 | UPLOADERFLAGS=[], 37 | UPLOADBINCMD='$UPLOADER $UPLOADERFLAGS $SOURCES') 38 | env.Append(SIMULNAME='simulation') 39 | 40 | if "Darwin" == system(): 41 | env.PrependENVPath( 42 | "DYLD_LIBRARY_PATH", 43 | join(pioPlatform.get_package_dir('toolchain-icestorm'), "lib") 44 | ) 45 | 46 | # -- Target name for synthesis 47 | TARGET = join(env['BUILD_DIR'], env['PROGNAME']) 48 | 49 | # -- Resources paths 50 | IVL_PATH = join( 51 | pioPlatform.get_package_dir('toolchain-iverilog'), 'lib', 'ivl') 52 | VLIB_PATH = join( 53 | pioPlatform.get_package_dir('toolchain-iverilog'), 'vlib') 54 | VLIB_FILES = ' '.join([ 55 | '"{}"'.format(f) for f in Glob(join(VLIB_PATH, '*.v')) 56 | ]) if VLIB_PATH else '' 57 | 58 | CHIPDB_PATH = join( 59 | pioPlatform.get_package_dir('toolchain-icestorm'), 'share', 'icebox', 60 | 'chipdb-{0}.txt'.format(env.BoardConfig().get('build.size', '1k'))) 61 | 62 | isWindows = 'Windows' == system() 63 | VVP_PATH = '' if isWindows else '-M "{0}"'.format(IVL_PATH) 64 | IVER_PATH = '' if isWindows else '-B "{0}"'.format(IVL_PATH) 65 | 66 | # -- Get a list of all the verilog files in the src folfer, in ASCII, with 67 | # -- the full path. All these files are used for the simulation 68 | v_nodes = Glob(join(env.subst('$PROJECT_SRC_DIR'), '*.v')) 69 | src_sim = [str(f) for f in v_nodes] 70 | 71 | # --- Get the Testbench file (there should be only 1) 72 | # -- Create a list with all the files finished in _tb.v. It should contain 73 | # -- the test bench 74 | list_tb = [f for f in src_sim if f[-5:].upper() == '_TB.V'] 75 | 76 | if len(list_tb) > 1: 77 | print('---> WARNING: More than one testbenches used') 78 | 79 | # -- Error checking 80 | try: 81 | testbench = list_tb[0] 82 | 83 | # -- there is no testbench 84 | except IndexError: 85 | testbench = None 86 | 87 | SIMULNAME = '' 88 | TARGET_SIM = '' 89 | 90 | # clean 91 | if len(COMMAND_LINE_TARGETS) == 0: 92 | if testbench is not None: 93 | # -- Simulation name 94 | testbench_file = os.path.split(testbench)[-1] 95 | SIMULNAME, ext = os.path.splitext(testbench_file) 96 | # sim 97 | elif 'sim' in COMMAND_LINE_TARGETS: 98 | if testbench is None: 99 | print('---> ERROR: NO testbench found for simulation') 100 | Exit(1) 101 | 102 | # -- Simulation name 103 | testbench_file = os.path.split(testbench)[-1] 104 | SIMULNAME, ext = os.path.splitext(testbench_file) 105 | 106 | # -- Target sim name 107 | if SIMULNAME: 108 | TARGET_SIM = join(env.subst('$BUILD_DIR'), SIMULNAME).replace('\\', '\\\\') 109 | 110 | # --- Get the synthesis files. They are ALL the files except the testbench 111 | src_synth = [f for f in src_sim if f not in list_tb] 112 | 113 | # -- Get the PCF file 114 | src_dir = env.subst('$PROJECT_SRC_DIR') 115 | PCFs = join(src_dir, '*.pcf') 116 | PCF_list = Glob(PCFs) 117 | PCF = '' 118 | 119 | try: 120 | PCF = PCF_list[0] 121 | except IndexError: 122 | print('---> WARNING: no .pcf file found') 123 | 124 | # 125 | # Builder: Yosys (.v --> .blif) 126 | # 127 | synth = Builder( 128 | action='yosys -p \"synth_ice40 -blif $TARGET\" -q $SOURCES', 129 | suffix='.blif', 130 | src_suffix='.v') 131 | 132 | # 133 | # Builder: Arachne-pnr (.blif --> .asc) 134 | # 135 | pnr = Builder( 136 | action='arachne-pnr -d {0} -P {1} -p "{2}" -o $TARGET $SOURCE'.format( 137 | env.BoardConfig().get('build.size', '1k'), 138 | env.BoardConfig().get('build.pack', 'tq144'), 139 | PCF 140 | ), 141 | suffix='.asc', 142 | src_suffix='.blif') 143 | 144 | # 145 | # Builder: Icepack (.asc --> .bin) 146 | # 147 | bitstream = Builder( 148 | action='icepack $SOURCE $TARGET', 149 | suffix='.bin', 150 | src_suffix='.asc') 151 | 152 | # 153 | # Builder: Icetime (.asc --> .rpt) 154 | # 155 | time_rpt = Builder( 156 | action='icetime -d {0}{1} -P {2} -C "{3}" -mtr $TARGET $SOURCE'.format( 157 | env.BoardConfig().get('build.type', 'hx'), 158 | env.BoardConfig().get('build.size', '1k'), 159 | env.BoardConfig().get('build.pack', 'tq144'), 160 | CHIPDB_PATH 161 | ), 162 | suffix='.rpt', 163 | src_suffix='.asc') 164 | 165 | env.Append(BUILDERS={ 166 | 'Synth': synth, 'PnR': pnr, 'Bin': bitstream, 'Time': time_rpt}) 167 | 168 | blif = env.Synth(TARGET, [src_synth]) 169 | asc = env.PnR(TARGET, [blif, PCF]) 170 | binf = env.Bin(TARGET, asc) 171 | 172 | # 173 | # Target: Time analysis (.rpt) 174 | # 175 | rpt = env.Time(asc) 176 | 177 | target_time = env.Alias('time', rpt) 178 | AlwaysBuild(target_time) 179 | 180 | # 181 | # Target: Upload bitstream 182 | # 183 | target_upload = env.Alias('upload', binf, '$UPLOADBINCMD') 184 | AlwaysBuild(target_upload) 185 | 186 | # 187 | # Builders: Icarus Verilog 188 | # 189 | iverilog = Builder( 190 | action='iverilog {0} -o $TARGET -D VCD_OUTPUT={1} {2} $SOURCES'.format( 191 | IVER_PATH, TARGET_SIM, VLIB_FILES), 192 | suffix='.out', 193 | src_suffix='.v') 194 | vcd = Builder( 195 | action='vvp {0} $SOURCE'.format( 196 | VVP_PATH), 197 | suffix='.vcd', 198 | src_suffix='.out') 199 | # NOTE: output file name is defined in the 200 | # iverilog call using VCD_OUTPUT macro 201 | 202 | env.Append(BUILDERS={'IVerilog': iverilog, 'VCD': vcd}) 203 | 204 | # 205 | # Target: Verify verilog code 206 | # 207 | vout = env.IVerilog(TARGET, src_synth) 208 | 209 | target_verify = env.Alias('verify', vout) 210 | AlwaysBuild(target_verify) 211 | 212 | # 213 | # Target: Simulate testbench 214 | # 215 | sout = env.IVerilog(TARGET_SIM, src_sim) 216 | vcd_file = env.VCD(sout) 217 | 218 | target_sim = env.Alias('sim', vcd_file, 'gtkwave {0} {1}.gtkw'.format( 219 | vcd_file[0], join(env.subst('$PROJECT_SRC_DIR'), SIMULNAME))) 220 | AlwaysBuild(target_sim) 221 | 222 | # 223 | # Setup default targets 224 | # 225 | Default([binf]) 226 | 227 | # 228 | # Target: Clean generated files 229 | # 230 | if GetOption('clean'): 231 | env.Default([t, vout, sout, vcd_file]) 232 | -------------------------------------------------------------------------------- /examples/counter/.gitignore: -------------------------------------------------------------------------------- 1 | .pio 2 | -------------------------------------------------------------------------------- /examples/counter/README.md: -------------------------------------------------------------------------------- 1 | How to build PlatformIO based project 2 | ===================================== 3 | 4 | 1. [Install PlatformIO Core](https://docs.platformio.org/page/core.html) 5 | 2. Download [development platform with examples](https://github.com/platformio/platform-lattice_ice40/archive/develop.zip) 6 | 3. Extract ZIP archive 7 | 4. Run these commands: 8 | 9 | ```shell 10 | # Change directory to example 11 | $ cd platform-lattice_ice40/examples/counter 12 | 13 | # Build project 14 | $ pio run 15 | 16 | # Verify project 17 | $ pio run --target verify 18 | 19 | # Launch simulation 20 | $ pio run --target sim 21 | 22 | # Launch time analysis 23 | $ pio run --target time 24 | 25 | # Upload bitstream into the FPGA 26 | $ pio run --target upload 27 | 28 | # Clean build files 29 | $ pio run --target clean 30 | ``` 31 | 32 | NOTE: [GTKwave](http://gtkwave.sourceforge.net) is required for simulation 33 | -------------------------------------------------------------------------------- /examples/counter/include/README: -------------------------------------------------------------------------------- 1 | 2 | This directory is intended for project header files. 3 | 4 | A header file is a file containing C declarations and macro definitions 5 | to be shared between several project source files. You request the use of a 6 | header file in your project source file (C, C++, etc) located in `src` folder 7 | by including it, with the C preprocessing directive `#include'. 8 | 9 | ```src/main.c 10 | 11 | #include "header.h" 12 | 13 | int main (void) 14 | { 15 | ... 16 | } 17 | ``` 18 | 19 | Including a header file produces the same results as copying the header file 20 | into each source file that needs it. Such copying would be time-consuming 21 | and error-prone. With a header file, the related declarations appear 22 | in only one place. If they need to be changed, they can be changed in one 23 | place, and programs that include the header file will automatically use the 24 | new version when next recompiled. The header file eliminates the labor of 25 | finding and changing all the copies as well as the risk that a failure to 26 | find one copy will result in inconsistencies within a program. 27 | 28 | In C, the usual convention is to give header files names that end with `.h'. 29 | It is most portable to use only letters, digits, dashes, and underscores in 30 | header file names, and at most one dot. 31 | 32 | Read more about using header files in official GCC documentation: 33 | 34 | * Include Syntax 35 | * Include Operation 36 | * Once-Only Headers 37 | * Computed Includes 38 | 39 | https://gcc.gnu.org/onlinedocs/cpp/Header-Files.html 40 | -------------------------------------------------------------------------------- /examples/counter/lib/README: -------------------------------------------------------------------------------- 1 | 2 | This directory is intended for project specific (private) libraries. 3 | PlatformIO will compile them to static libraries and link into executable file. 4 | 5 | The source code of each library should be placed in a an own separate directory 6 | ("lib/your_library_name/[here are source files]"). 7 | 8 | For example, see a structure of the following two libraries `Foo` and `Bar`: 9 | 10 | |--lib 11 | | | 12 | | |--Bar 13 | | | |--docs 14 | | | |--examples 15 | | | |--src 16 | | | |- Bar.c 17 | | | |- Bar.h 18 | | | |- library.json (optional, custom build options, etc) https://docs.platformio.org/page/librarymanager/config.html 19 | | | 20 | | |--Foo 21 | | | |- Foo.c 22 | | | |- Foo.h 23 | | | 24 | | |- README --> THIS FILE 25 | | 26 | |- platformio.ini 27 | |--src 28 | |- main.c 29 | 30 | and a contents of `src/main.c`: 31 | ``` 32 | #include 33 | #include 34 | 35 | int main (void) 36 | { 37 | ... 38 | } 39 | 40 | ``` 41 | 42 | PlatformIO Library Dependency Finder will find automatically dependent 43 | libraries scanning project source files. 44 | 45 | More information about PlatformIO Library Dependency Finder 46 | - https://docs.platformio.org/page/librarymanager/ldf.html 47 | -------------------------------------------------------------------------------- /examples/counter/platformio.ini: -------------------------------------------------------------------------------- 1 | ; PlatformIO Project Configuration File 2 | ; 3 | ; Build options: build flags, source filter, extra scripting 4 | ; Upload options: custom port, speed and extra flags 5 | ; Library options: dependencies, extra library storages 6 | ; 7 | ; Please visit documentation for the other options and examples 8 | ; https://docs.platformio.org/page/projectconf.html 9 | 10 | [env:icestick] 11 | platform = lattice_ice40 12 | board = icestick 13 | -------------------------------------------------------------------------------- /examples/counter/src/counter.pcf: -------------------------------------------------------------------------------- 1 | # -- iCEstick leds 2 | 3 | set_io leds[0] 99 4 | set_io leds[1] 98 5 | set_io leds[2] 97 6 | set_io leds[3] 96 7 | set_io leds[4] 95 8 | set_io clk 21 9 | -------------------------------------------------------------------------------- /examples/counter/src/counter.v: -------------------------------------------------------------------------------- 1 | //-------------------------------------------------------------------- 2 | //-- iCEstick test 3 | //-- Counter example 4 | //-------------------------------------------------------------------- 5 | //-- March 2016. Written by Juan Gonzalez (obijuan) 6 | //-------------------------------------------------------------------- 7 | //-- Releases under the GPL v2+ license 8 | //-------------------------------------------------------------------- 9 | 10 | module counter #( 11 | parameter N = 29 //-- Counter bits lentgh 12 | )( 13 | input wire clk, 14 | output wire [4:0] leds 15 | ); 16 | 17 | reg [N-1:0] cont; 18 | reg rstn = 0; 19 | 20 | //-- Initialization 21 | always @(posedge clk) 22 | rstn <= 1; 23 | 24 | //-- counter, with synchronous reset 25 | always @(posedge clk) 26 | if (!rstn) 27 | cont <= 0; 28 | else 29 | cont <= cont + 1; 30 | 31 | //-- Connect the 5 most significant bits to the leds 32 | assign leds = cont[N-1: N-6]; 33 | 34 | endmodule 35 | -------------------------------------------------------------------------------- /examples/counter/src/counter_tb.gtkw: -------------------------------------------------------------------------------- 1 | [*] 2 | [*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI 3 | [*] Sun Jan 31 16:34:34 2016 4 | [*] 5 | [dumpfile] "/home/obijuan/develop/Platformio-FPGA/examples/lattice_ice40/lattice_ice40_counter/simulation.vcd" 6 | [dumpfile_mtime] "Sun Jan 31 16:33:04 2016" 7 | [dumpfile_size] 9956 8 | [savefile] "/home/obijuan/develop/Platformio-FPGA/examples/lattice_ice40/lattice_ice40_counter/src/simulation.gtkw" 9 | [timestart] 0 10 | [size] 1000 600 11 | [pos] 918 413 12 | *-8.616491 110 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 | [treeopen] counter_tb. 14 | [sst_width] 223 15 | [signals_width] 176 16 | [sst_expanded] 1 17 | [sst_vpaned_height] 160 18 | @28 19 | counter_tb.clk 20 | counter_tb.CONT0.rstn 21 | @22 22 | counter_tb.leds[4:0] 23 | [pattern_trace] 1 24 | [pattern_trace] 0 25 | -------------------------------------------------------------------------------- /examples/counter/src/counter_tb.v: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------- 2 | //-- counter_tb.v 3 | //-- Testbench 4 | //------------------------------------------------------------------- 5 | //-- March 2016. Written by Juan Gonzalez (Obijuan) and Jesus Arroyo 6 | //------------------------------------------------------------------- 7 | 8 | `default_nettype none 9 | `timescale 100 ns / 10 ns 10 | `define DUMPSTR(x) `"x.vcd`" 11 | 12 | 13 | module counter_tb(); 14 | 15 | //-- Simulation time: 1us (10 * 100ns) 16 | parameter DURATION = 10; 17 | 18 | //-- Clock signal. It is not used in this simulation 19 | reg clk = 0; 20 | always #0.5 clk = ~clk; 21 | 22 | //-- Leds port 23 | wire [4:0] leds; 24 | 25 | //-- Counter bits length 26 | localparam N = 6; 27 | 28 | counter #( 29 | .N(N) 30 | ) CONT0 ( 31 | .clk(clk), 32 | .leds(leds) 33 | ); 34 | 35 | initial begin 36 | //-- File where to store the simulation 37 | $dumpfile(`DUMPSTR(`VCD_OUTPUT)); 38 | $dumpvars(0, counter_tb); 39 | 40 | #(DURATION) $display("END of the simulation"); 41 | $finish; 42 | end 43 | 44 | endmodule 45 | -------------------------------------------------------------------------------- /examples/counter/test/README: -------------------------------------------------------------------------------- 1 | 2 | This directory is intended for PIO Unit Testing and project tests. 3 | 4 | Unit Testing is a software testing method by which individual units of 5 | source code, sets of one or more MCU program modules together with associated 6 | control data, usage procedures, and operating procedures, are tested to 7 | determine whether they are fit for use. Unit testing finds problems early 8 | in the development cycle. 9 | 10 | More information about PIO Unit Testing: 11 | - https://docs.platformio.org/page/plus/unit-testing.html 12 | -------------------------------------------------------------------------------- /examples/leds/.gitignore: -------------------------------------------------------------------------------- 1 | .pio 2 | -------------------------------------------------------------------------------- /examples/leds/README.md: -------------------------------------------------------------------------------- 1 | How to build PlatformIO based project 2 | ===================================== 3 | 4 | 1. [Install PlatformIO Core](https://docs.platformio.org/page/core.html) 5 | 2. Download [development platform with examples](https://github.com/platformio/platform-lattice_ice40/archive/develop.zip) 6 | 3. Extract ZIP archive 7 | 4. Run these commands: 8 | 9 | ```shell 10 | # Change directory to example 11 | $ cd platform-lattice_ice40/examples/leds 12 | 13 | # Build project 14 | $ pio run 15 | 16 | # Verify project 17 | $ pio run --target verify 18 | 19 | # Launch simulation 20 | $ pio run --target sim 21 | 22 | # Launch time analysis 23 | $ pio run --target time 24 | 25 | # Upload bitstream into the FPGA 26 | $ pio run --target upload 27 | 28 | # Clean build files 29 | $ pio run --target clean 30 | ``` 31 | 32 | NOTE: [GTKwave](http://gtkwave.sourceforge.net) is required for simulation 33 | -------------------------------------------------------------------------------- /examples/leds/include/README: -------------------------------------------------------------------------------- 1 | 2 | This directory is intended for project header files. 3 | 4 | A header file is a file containing C declarations and macro definitions 5 | to be shared between several project source files. You request the use of a 6 | header file in your project source file (C, C++, etc) located in `src` folder 7 | by including it, with the C preprocessing directive `#include'. 8 | 9 | ```src/main.c 10 | 11 | #include "header.h" 12 | 13 | int main (void) 14 | { 15 | ... 16 | } 17 | ``` 18 | 19 | Including a header file produces the same results as copying the header file 20 | into each source file that needs it. Such copying would be time-consuming 21 | and error-prone. With a header file, the related declarations appear 22 | in only one place. If they need to be changed, they can be changed in one 23 | place, and programs that include the header file will automatically use the 24 | new version when next recompiled. The header file eliminates the labor of 25 | finding and changing all the copies as well as the risk that a failure to 26 | find one copy will result in inconsistencies within a program. 27 | 28 | In C, the usual convention is to give header files names that end with `.h'. 29 | It is most portable to use only letters, digits, dashes, and underscores in 30 | header file names, and at most one dot. 31 | 32 | Read more about using header files in official GCC documentation: 33 | 34 | * Include Syntax 35 | * Include Operation 36 | * Once-Only Headers 37 | * Computed Includes 38 | 39 | https://gcc.gnu.org/onlinedocs/cpp/Header-Files.html 40 | -------------------------------------------------------------------------------- /examples/leds/lib/README: -------------------------------------------------------------------------------- 1 | 2 | This directory is intended for project specific (private) libraries. 3 | PlatformIO will compile them to static libraries and link into executable file. 4 | 5 | The source code of each library should be placed in a an own separate directory 6 | ("lib/your_library_name/[here are source files]"). 7 | 8 | For example, see a structure of the following two libraries `Foo` and `Bar`: 9 | 10 | |--lib 11 | | | 12 | | |--Bar 13 | | | |--docs 14 | | | |--examples 15 | | | |--src 16 | | | |- Bar.c 17 | | | |- Bar.h 18 | | | |- library.json (optional, custom build options, etc) https://docs.platformio.org/page/librarymanager/config.html 19 | | | 20 | | |--Foo 21 | | | |- Foo.c 22 | | | |- Foo.h 23 | | | 24 | | |- README --> THIS FILE 25 | | 26 | |- platformio.ini 27 | |--src 28 | |- main.c 29 | 30 | and a contents of `src/main.c`: 31 | ``` 32 | #include 33 | #include 34 | 35 | int main (void) 36 | { 37 | ... 38 | } 39 | 40 | ``` 41 | 42 | PlatformIO Library Dependency Finder will find automatically dependent 43 | libraries scanning project source files. 44 | 45 | More information about PlatformIO Library Dependency Finder 46 | - https://docs.platformio.org/page/librarymanager/ldf.html 47 | -------------------------------------------------------------------------------- /examples/leds/platformio.ini: -------------------------------------------------------------------------------- 1 | ; PlatformIO Project Configuration File 2 | ; 3 | ; Build options: build flags, source filter, extra scripting 4 | ; Upload options: custom port, speed and extra flags 5 | ; Library options: dependencies, extra library storages 6 | ; 7 | ; Please visit documentation for the other options and examples 8 | ; https://docs.platformio.org/page/projectconf.html 9 | 10 | [env:icezum] 11 | platform = lattice_ice40 12 | board = icezum 13 | -------------------------------------------------------------------------------- /examples/leds/src/leds_on.pcf: -------------------------------------------------------------------------------- 1 | # -- IceZUM Alhambra leds 2 | 3 | set_io LPORT[0] 95 4 | set_io LPORT[1] 96 5 | set_io LPORT[2] 97 6 | set_io LPORT[3] 98 7 | set_io LPORT[4] 99 8 | set_io LPORT[5] 101 9 | set_io LPORT[6] 102 10 | set_io LPORT[7] 104 11 | -------------------------------------------------------------------------------- /examples/leds/src/leds_on.v: -------------------------------------------------------------------------------- 1 | //-------------------------------------------------------------------- 2 | //-- IceZUM Alhambra test 3 | //-- Hello world example 4 | //-- Turn on all the yellow leds 5 | //-------------------------------------------------------------------- 6 | //-- March 2016. Written by Juan Gonzalez (obijuan) 7 | //-------------------------------------------------------------------- 8 | //-- Releases under the GPL v2+ license 9 | //-------------------------------------------------------------------- 10 | 11 | module leds_on(output wire [7:0] LPORT); 12 | 13 | //-- Turn on all the leds 14 | assign LPORT = 8'hFF; 15 | 16 | endmodule 17 | -------------------------------------------------------------------------------- /examples/leds/src/leds_on_tb.gtkw: -------------------------------------------------------------------------------- 1 | [*] 2 | [*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI 3 | [*] Tue Mar 15 08:22:44 2016 4 | [*] 5 | [dumpfile] "/home/obijuan/development/icezum/examples/leds/leds_on/src/leds_on_tb.vcd" 6 | [dumpfile_mtime] "Tue Mar 15 08:22:30 2016" 7 | [dumpfile_size] 460 8 | [savefile] "/home/obijuan/development/icezum/examples/leds/leds_on/src/leds_on_tb.gtkw" 9 | [timestart] 0 10 | [size] 1000 600 11 | [pos] -1 -1 12 | *-8.314166 964 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 | [treeopen] leds_on_tb. 14 | [sst_width] 223 15 | [signals_width] 134 16 | [sst_expanded] 1 17 | [sst_vpaned_height] 160 18 | @29 19 | leds_on_tb.clk 20 | @22 21 | leds_on_tb.UUT.LPORT[7:0] 22 | [pattern_trace] 1 23 | [pattern_trace] 0 24 | -------------------------------------------------------------------------------- /examples/leds/src/leds_on_tb.v: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------- 2 | //-- leds_on_tb.v 3 | //-- Testbench 4 | //------------------------------------------------------------------- 5 | //-- March 2016. Written by Juan Gonzalez (Obijuan) and Jesus Arroyo 6 | //------------------------------------------------------------------- 7 | `default_nettype none 8 | `timescale 100 ns / 10 ns 9 | `define DUMPSTR(x) `"x.vcd`" 10 | 11 | 12 | module leds_on_tb(); 13 | 14 | //-- Simulation time: 1us (10 * 100ns) 15 | parameter DURATION = 10; 16 | 17 | //-- Clock signal. It is not used in this simulation 18 | reg clk = 0; 19 | always #0.5 clk = ~clk; 20 | 21 | //-- Leds port 22 | wire [7:0] lport; 23 | 24 | //-- Instantiate the unit to test 25 | leds_on UUT (.LPORT(lport)); 26 | 27 | initial begin 28 | //-- File were to store the simulation results 29 | $dumpfile(`DUMPSTR(`VCD_OUTPUT)); 30 | $dumpvars(0, leds_on_tb); 31 | 32 | #(DURATION) $display("End of simulation"); 33 | $finish; 34 | end 35 | 36 | endmodule 37 | -------------------------------------------------------------------------------- /examples/leds/test/README: -------------------------------------------------------------------------------- 1 | 2 | This directory is intended for PIO Unit Testing and project tests. 3 | 4 | Unit Testing is a software testing method by which individual units of 5 | source code, sets of one or more MCU program modules together with associated 6 | control data, usage procedures, and operating procedures, are tested to 7 | determine whether they are fit for use. Unit testing finds problems early 8 | in the development cycle. 9 | 10 | More information about PIO Unit Testing: 11 | - https://docs.platformio.org/page/plus/unit-testing.html 12 | -------------------------------------------------------------------------------- /platform.json: -------------------------------------------------------------------------------- 1 | { 2 | "name": "lattice_ice40", 3 | "title": "Lattice iCE40", 4 | "description": "The iCE40 family of ultra-low power, non-volatile FPGAs has five devices with densities ranging from 384 to 7680 Look-Up Tables (LUTs). In addition to LUT-based,low-cost programmable logic, these devices feature Embedded Block RAM (EBR), Non-volatile Configuration Memory (NVCM) and Phase Locked Loops (PLLs). These features allow the devices to be used in low-cost, high-volume consumer and system applications.", 5 | "homepage": "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40.aspx", 6 | "license": "Apache-2.0", 7 | "keywords": [ 8 | "dev-platform", 9 | "Lattice", 10 | "iCE40", 11 | "FPGA" 12 | ], 13 | "engines": { 14 | "platformio": "^6" 15 | }, 16 | "repository": { 17 | "type": "git", 18 | "url": "https://github.com/platformio/platform-lattice_ice40.git" 19 | }, 20 | "version": "1.3.0", 21 | "packages": { 22 | "toolchain-icestorm": { 23 | "type": "toolchain", 24 | "owner": "platformio", 25 | "version": "~1.10.0" 26 | }, 27 | "toolchain-iverilog": { 28 | "type": "toolchain", 29 | "owner": "platformio", 30 | "version": "~1.1.0" 31 | } 32 | } 33 | } 34 | -------------------------------------------------------------------------------- /platform.py: -------------------------------------------------------------------------------- 1 | # Copyright 2014-present PlatformIO 2 | # 3 | # Licensed under the Apache License, Version 2.0 (the "License"); 4 | # you may not use this file except in compliance with the License. 5 | # You may obtain a copy of the License at 6 | # 7 | # http://www.apache.org/licenses/LICENSE-2.0 8 | # 9 | # Unless required by applicable law or agreed to in writing, software 10 | # distributed under the License is distributed on an "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | # See the License for the specific language governing permissions and 13 | # limitations under the License. 14 | 15 | from platformio.public import PlatformBase 16 | 17 | 18 | class Lattice_ice40Platform(PlatformBase): 19 | 20 | def is_embedded(self): 21 | return True 22 | --------------------------------------------------------------------------------