├── .gitattributes ├── App ├── asm │ └── BIOS.S ├── inc │ ├── BIOS.h │ ├── cortexm3_macro.h │ ├── stm32f10x_conf.h │ ├── stm32f10x_dma.h │ ├── stm32f10x_flash.h │ ├── stm32f10x_fsmc.h │ ├── stm32f10x_gpio.h │ ├── stm32f10x_lib.h │ ├── stm32f10x_map.h │ ├── stm32f10x_nvic.h │ ├── stm32f10x_rcc.h │ ├── stm32f10x_sdio.h │ ├── stm32f10x_spi.h │ └── stm32f10x_type.h ├── lds │ ├── app1.lds │ ├── app2.lds │ ├── app3.lds │ ├── app4.lds │ └── main.lds └── src │ ├── Calibrat.c │ ├── Calibrat.h │ ├── Draw.c │ ├── Draw.h │ ├── File.h │ ├── Files.c │ ├── Function.c │ ├── Function.h │ ├── Interrupt.c │ ├── Interrupt.h │ ├── Main.c │ ├── Menu.c │ ├── Menu.h │ ├── Process.c │ ├── Process.h │ └── startup.c ├── Bin └── APP_G251.hex ├── FWLib ├── asm │ └── cortexm3_macro.s └── src │ └── stm32f10x_nvic.c ├── README.txt └── makefile.bat /.gitattributes: -------------------------------------------------------------------------------- 1 | *.hex binary 2 | *.bin binary 3 | *.elf binary 4 | *.o binary 5 | *.d binary 6 | 7 | *.c eol=crlf 8 | *.h eol=crlf 9 | *.bat eol=crlf 10 | *.txt eol=crlf 11 | *.S eol=crlf 12 | *.s eol=crlf 13 | -------------------------------------------------------------------------------- /App/asm/BIOS.S: -------------------------------------------------------------------------------- 1 | .syntax unified 2 | .thumb 3 | .thumb_func 4 | .code 16 5 | //.text 6 | 7 | //********************* (C) COPYRIGHT 2009 e-Design Co.,Ltd. ********************* 8 | // File Name : ASM.c 9 | // Version : DS203_APP Ver 2.5x Author : bure 10 | //******************************************************************************// 11 | 12 | BIOS: 13 | //=============================================================================== 14 | // System function entrance 15 | //=============================================================================== 16 | // void CTR_HP(void) USB_HP_Interrupt 17 | //------------------------------------------------------------------------------- 18 | .globl __CTR_HP 19 | .thumb_func 20 | . = BIOS + 0x01 21 | __CTR_HP: 22 | //=============================================================================== 23 | // void USB_Istr(void) USB_LP_Interrupt 24 | //------------------------------------------------------------------------------- 25 | .globl __USB_Istr 26 | .thumb_func 27 | . = BIOS + 0x05 28 | __USB_Istr: 29 | //=============================================================================== 30 | // void __LCD_Initial(void) 31 | //------------------------------------------------------------------------------- 32 | .globl __LCD_Initial 33 | .thumb_func 34 | . = BIOS + 0x09 35 | __LCD_Initial : 36 | //=============================================================================== 37 | // void __Point_SCR(u16 x0, u16 y0) 38 | //------------------------------------------------------------------------------- 39 | .globl __Point_SCR 40 | .thumb_func 41 | . = BIOS + 0x0D 42 | __Point_SCR : 43 | //=============================================================================== 44 | // void __LCD_SetPixl(u16 Color) 45 | //------------------------------------------------------------------------------- 46 | .globl __LCD_SetPixl 47 | .thumb_func 48 | . = BIOS + 0x11 49 | __LCD_SetPixl : 50 | //=============================================================================== 51 | // void __Clear_Screen(u16 Color) 52 | //------------------------------------------------------------------------------- 53 | .globl __Clear_Screen 54 | .thumb_func 55 | . = BIOS + 0x15 56 | __Clear_Screen : 57 | //=============================================================================== 58 | // u16 __Get_TAB_8x14(u8 Code, u16 Row) 59 | //------------------------------------------------------------------------------- 60 | .globl __Get_TAB_8x14 61 | .thumb_func 62 | . = BIOS + 0x19 63 | __Get_TAB_8x14 : 64 | //=============================================================================== 65 | // void __LCD_Set_Block(u16 x1, u16 x2, u16 y1, u16 y2) 66 | //------------------------------------------------------------------------------- 67 | .globl __LCD_Set_Block 68 | .thumb_func 69 | . = BIOS + 0x1D 70 | __LCD_Set_Block : 71 | //=============================================================================== 72 | // void __LCD_DMA_Ready(void) Wait LCD data DMA ready 73 | //------------------------------------------------------------------------------- 74 | .globl __LCD_DMA_Ready 75 | .thumb_func 76 | . = BIOS + 0x21 77 | __LCD_DMA_Ready : 78 | //=============================================================================== 79 | // void __LCD_Copy(uc16 *pBuffer, u16 NumPixel) Send a row data to LCD 80 | //------------------------------------------------------------------------------- 81 | .globl __LCD_Copy 82 | .thumb_func 83 | . = BIOS + 0x25 84 | __LCD_Copy: 85 | //=============================================================================== 86 | // void __LCD_Fill(u16 *pBuffer, u16 NumPixel) Fill number of pixel by DMA 87 | //------------------------------------------------------------------------------- 88 | .globl __LCD_Fill 89 | .thumb_func 90 | . = BIOS + 0x29 91 | __LCD_Fill: 92 | //=============================================================================== 93 | // void __Row_DMA_Ready(void) Wait row base data DMA ready 94 | //------------------------------------------------------------------------------- 95 | .globl __Row_DMA_Ready 96 | .thumb_func 97 | . = BIOS + 0x2D 98 | __Row_DMA_Ready : 99 | //=============================================================================== 100 | // void __Row_Copy(uc16 *S_Buffer,u16 *T_Buffer) Copy one row base data to buffer 101 | //------------------------------------------------------------------------------- 102 | .globl __Row_Copy 103 | .thumb_func 104 | . = BIOS + 0x31 105 | __Row_Copy: 106 | //=============================================================================== 107 | // u32 __Read_FIFO(void) 108 | //------------------------------------------------------------------------------- 109 | .globl __Read_FIFO 110 | .thumb_func 111 | . = BIOS + 0x35 112 | __Read_FIFO: 113 | //=============================================================================== 114 | // u32 __Input_Lic(u16 x0, u8 y0, u16 Color)// Return: 32Bits Licence 115 | //------------------------------------------------------------------------------- 116 | .globl __Input_Lic 117 | .thumb_func 118 | . = BIOS + 0x39 119 | __Input_Lic: 120 | //=============================================================================== 121 | // u32 GetDev_SN(void)// Get 32bits Device Serial Number 122 | //------------------------------------------------------------------------------- 123 | .globl __GetDev_SN 124 | .thumb_func 125 | . = BIOS + 0x3D 126 | __GetDev_SN: 127 | //=============================================================================== 128 | // u8 __Chk_SYS(u32 Licence) Check SYS licence RET: 1 = licence ok 129 | //------------------------------------------------------------------------------- 130 | .globl __Chk_SYS 131 | .thumb_func 132 | . = BIOS + 0x41 133 | __Chk_SYS: 134 | //=============================================================================== 135 | // u8 __Ident(u32 Dev_ID, u32 Proj_ID, u32 Lic_No) RET: 1 = licence ok 136 | //------------------------------------------------------------------------------- 137 | .globl __Ident 138 | .thumb_func 139 | . = BIOS + 0x45 140 | __Ident: 141 | //=============================================================================== 142 | // void __Display_Str(u16 x0, u16 y0, u16 Color, u8 Mode, u8 *s) 143 | //------------------------------------------------------------------------------- 144 | .globl __Display_Str 145 | .thumb_func 146 | . = BIOS + 0x49 147 | __Display_Str: 148 | //=============================================================================== 149 | // void __Set(u8 Device, u32 Value) Hardware control device Settings 150 | //------------------------------------------------------------------------------- 151 | .globl __Set 152 | .thumb_func 153 | . = BIOS + 0x4D 154 | __Set: 155 | //=============================================================================== 156 | // void Set_Param(u8 RegAddr, u8 Parameter) Trigger control parameter set 157 | //------------------------------------------------------------------------------- 158 | .globl __Set_Param 159 | .thumb_func 160 | . = BIOS + 0x51 161 | __Set_Param: 162 | //=============================================================================== 163 | // u32 __Get(u8 Kind) Get hardware attribute & status 164 | //------------------------------------------------------------------------------- 165 | .globl __Get 166 | .thumb_func 167 | . = BIOS + 0x55 168 | __Get: 169 | //=============================================================================== 170 | // void __ExtFlash_PageWR(u8* pBuffer, u32 WriteAddr)// 171 | //------------------------------------------------------------------------------- 172 | .globl __ExtFlash_PageWR 173 | .thumb_func 174 | . = BIOS + 0x59 175 | __ExtFlash_PageWR: 176 | //=============================================================================== 177 | // void __Disk_Buff_RD(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead)// 178 | //------------------------------------------------------------------------------- 179 | .globl __ExtFlash_PageRD 180 | .thumb_func 181 | . = BIOS + 0x5D 182 | __ExtFlash_PageRD: 183 | //=============================================================================== 184 | // u8 ReadDiskData(u8* pBuffer, u32 ReadAddr, u16 Lenght) 185 | //------------------------------------------------------------------------------- 186 | .globl __ReadDiskData 187 | .thumb_func 188 | . = BIOS + 0x61 189 | __ReadDiskData: 190 | //=============================================================================== 191 | // u8 ProgDiskPage(u8* pBuffer, u32 ProgAddr) 192 | //------------------------------------------------------------------------------- 193 | .globl __ProgDiskPage 194 | .thumb_func 195 | . = BIOS + 0x65 196 | __ProgDiskPage: 197 | //=============================================================================== 198 | // u16 __LCD_GetPixl(void) 199 | //------------------------------------------------------------------------------- 200 | .globl __LCD_GetPixl 201 | .thumb_func 202 | . = BIOS + 0x69 203 | __LCD_GetPixl : 204 | //=============================================================================== 205 | // void __USB_Init(void) 206 | //------------------------------------------------------------------------------- 207 | .globl __USB_Init 208 | .thumb_func 209 | . = BIOS + 0x6D 210 | __USB_Init: 211 | //=============================================================================== 212 | // u8 __FLASH_Erase(u32 Address) RET: 1 = ok 213 | //------------------------------------------------------------------------------- 214 | .globl __FLASH_Erase 215 | .thumb_func 216 | . = BIOS + 0x71 217 | __FLASH_Erase: 218 | //=============================================================================== 219 | // u8 __FLASH_Prog(u32 Address, u16 Data) RET: 1 = ok 220 | //------------------------------------------------------------------------------- 221 | .globl __FLASH_Prog 222 | .thumb_func 223 | . = BIOS + 0x75 224 | __FLASH_Prog: 225 | //=============================================================================== 226 | // void __FLASH_Unlock(void) 227 | //------------------------------------------------------------------------------- 228 | .globl __FLASH_Unlock 229 | .thumb_func 230 | . = BIOS + 0x79 231 | __FLASH_Unlock: 232 | //=============================================================================== 233 | // void __FLASH_Lock(void) 234 | //------------------------------------------------------------------------------- 235 | .globl __FLASH_Lock 236 | .thumb_func 237 | . = BIOS + 0x7D 238 | __FLASH_Lock: 239 | //=============================================================================== 240 | // u8* __Chk_DFU(void) 241 | //------------------------------------------------------------------------------- 242 | .globl __Chk_DFU 243 | .thumb_func 244 | . = BIOS + 0x81 245 | __Chk_DFU: 246 | //=============================================================================== 247 | // u8* __Chk_HDW(void) 248 | //------------------------------------------------------------------------------- 249 | .globl __Chk_HDW 250 | .thumb_func 251 | . = BIOS + 0x85 252 | __Chk_HDW: 253 | //=============================================================================== 254 | // u8 __OpenFileWr(u8* Buffer, u8* FileName, u16* Cluster, u32* pDirAddr)// 255 | //------------------------------------------------------------------------------- 256 | .globl __OpenFileWr 257 | .thumb_func 258 | . = BIOS + 0x89 259 | __OpenFileWr: 260 | //=============================================================================== 261 | // u8 __OpenFileRd(u8* Buffer, u8* FileName, u16* Cluster, u32* pDirAddr)// 262 | //------------------------------------------------------------------------------- 263 | .globl __OpenFileRd 264 | .thumb_func 265 | . = BIOS + 0x8D 266 | __OpenFileRd: 267 | //=============================================================================== 268 | // u8 __ReadFileSec(u8* Buffer, u16* Cluster)// 269 | //------------------------------------------------------------------------------- 270 | .globl __ReadFileSec 271 | .thumb_func 272 | . = BIOS + 0x91 273 | __ReadFileSec: 274 | //=============================================================================== 275 | // u8 __ProgFileSec(u8* Buffer, u16* Cluster)// 276 | //------------------------------------------------------------------------------- 277 | .globl __ProgFileSec 278 | .thumb_func 279 | . = BIOS + 0x95 280 | __ProgFileSec: 281 | //=============================================================================== 282 | // u8 __CloseFile(u8* Buffer, u32 Lenght, u16* Cluster, u32* pDirAddr)// 283 | //------------------------------------------------------------------------------- 284 | .globl __CloseFile 285 | .thumb_func 286 | . = BIOS + 0x99 287 | __CloseFile: 288 | //=============================================================================== 289 | // void __Row_Fill(uc16 *S_Buffer,u16 *T_Buffer) Fill one row base data to buffer 290 | //------------------------------------------------------------------------------- 291 | .globl __Row_Fill 292 | .thumb_func 293 | . = BIOS + 0x9D 294 | __Row_Fill: 295 | //=============================================================================== 296 | 297 | //******************************* END OF FILE *********************************** 298 | -------------------------------------------------------------------------------- /App/inc/BIOS.h: -------------------------------------------------------------------------------- 1 | /********************* (C) COPYRIGHT 2010 e-Design Co.,Ltd. ******************** 2 | File Name : BIOS.h 3 | Version : DS203_APP Ver 2.5x Author : bure 4 | *******************************************************************************/ 5 | #ifndef __BIOS_H 6 | #define __BIOS_H 7 | 8 | #include "stm32f10x_lib.h" 9 | 10 | 11 | //============================= Flash space allocation ================================= 12 | 13 | #define BIN_BASE ((u32)(0x0802C000)) // Size < 68KB 14 | #define PRM_BASE BIN_BASE + 68*1024 // Size = 2KB 15 | #define INF_BASE BIN_BASE + 70*1024 // Size < 10KB 16 | #define APP4_BASE ((u32)(0x08024000)) // Size = 32KB 17 | #define APP3_BASE ((u32)(0x0801C000)) // Size = 32KB 18 | #define APP2_BASE ((u32)(0x08014000)) // Size = 32KB 19 | #define APP1_BASE ((u32)(0x0800C000)) // Size = 32KB 20 | #define SYS_BASE ((u32)(0x08004000)) // Size = 32KB 21 | #define DFU_BASE ((u32)(0x08000000)) // Size = 16KB 22 | 23 | //====================== Function Set Object and Value defined ====================== 24 | 25 | #define CH_A_OFFSET 0 // A channel vertical displacement Value = 0~200 26 | #define CH_B_OFFSET 1 // B channel vertical displacement Value = 0~200 27 | #define BACKLIGHT 2 // backlight brightness Value = 0~100 28 | #define BEEP_VOLUME 3 // buzzer volume Value = 0~100 29 | #define BETTERY_DT 4 // battery voltage detector Value = 1: start 30 | #define ADC_MODE 5 // ADC operating mode Value = 1/0 31 | #define FIFO_CLR 6 // FIFO pointer reset Value = 1/0: W_PTR/R_PTR 32 | #define R_PTR 0 // FIFO read address pointer reset 33 | #define W_PTR 1 // FIFO write address pointer is reset 34 | #define T_BASE_PSC 7 // prescaler value Value = 0~65535 35 | #define T_BASE_ARR 8 // frequency Value = 0~65535 36 | #define CH_A_COUPLE 9 // A channel coupling method Value = 1/0: AC/DC 37 | #define DC 0 38 | #define AC 1 39 | #define CH_A_RANGE 10 // A channel input range Value = 0~5 40 | #define CH_B_COUPLE 11 // B channel coupling method Value = 1/0: AC/DC 41 | #define CH_B_RANGE 12 // B channel input range Value = 0~5 42 | #define ANALOG_ARR 13 // analog output divider value Value = 0~65535 43 | #define ANALOG_PTR 14 // analog output pointer Value = 0~65535 44 | #define ANALOG_CNT 15 // synthetic points of a week Value = 0~65535 45 | #define DIGTAL_PSC 16 // pulse output prescaler value Value = 0~65535 46 | #define DIGTAL_ARR 17 // pulse output divider value Value = 0~65535 47 | #define DIGTAL_CCR 18 // pulse output duty cycle value Value = 0~65535 48 | #define KEY_IF_RST 19 // timer interrupt flag reset Value = 0 49 | #define STANDBY 20 // to enter the power-down waiting Value = 0 50 | #define ANALOG_PSC 21 // only implemented in Marcosin's sys version 51 | #define FPGA_RST 31 // FPGA Reset Value = 0 52 | 53 | #define TRIGG_MODE 32+0 // trigger mode Value = Mode 54 | #define V_THRESHOLD 32+1 // voltage trigger threshold Value = 0~200 55 | #define T_THRESHOLD 32+2 // pulse width trigger gate limit Value = 0~65535 56 | #define ADC_CTRL 32+4 // ADC status Value = 1/0 EN/DN 57 | #define A_POSITION 32+5 // the zero position of CH_A Value = 0~200 58 | #define B_POSITION 32+6 // the zero position of CH_B Value = 0~200 59 | #define REG_ADDR 32+7 // the address determines which set of registers in the FPGA, the data read into the MCU 60 | 61 | //==================== Function Set TRIGG_MODE of Value defined ===================== 62 | /* 63 | CH_A Trigger source & kind select => 64 | 0x00: by Negedge; 0x01: by Posedge; 0x02: by low level; 0x03: by high level 65 | 0x04: TL < Delta_T; 0x05: TL > Delta_T; 0x06: TH < Delta_T; 0x07: TH > Delta_T; 66 | 67 | CH_B Trigger source & kind select => 68 | 0x08: by Negedge; 0x09: by Posedge; 0x0A: by low level; 0x0B: by high level 69 | 0x0C: TL < Delta_T; 0x0D: TL > Delta_T; 0x0E: TH < Delta_T; 0x0F: TH > Delta_T; 70 | 71 | CH_C Trigger source & kind select => 72 | 0x10: by Negedge; 0x11: by Posedge; 0x12: by low level; 0x13: by high level 73 | 0x04: TL < Delta_T; 0x05: TL > Delta_T; 0x06: TH < Delta_T; 0x07: TH > Delta_T; 74 | 75 | CH_D Trigger source & kind select => 76 | 0x18: by Negedge; 0x19: by Posedge; 0x1A: by low level; 0x1B: by high level 77 | 0x1C: TL < Delta_T; 0x1D: TL > Delta_T; 0x1E: TH < Delta_T; 0x1F: TH > Delta_T; 78 | 79 | 0x20~0xFF => Unconditional trigger 80 | */ 81 | 82 | #define UNCONDITION 0x20 // unconditional trigger sampling 83 | 84 | //================ Function Set in ADC_CTRL the STANDBY Value defined ================ 85 | 86 | #define DN 0 87 | #define EN 1 88 | 89 | //===================== Function Set ADC_MODE of Value defined ===================== 90 | 91 | #define SEPARATE 0 // ADC sampling mode independently 92 | #define INTERLACE 1 // ADC Alternate Sampling mode 93 | 94 | //========================= Function Get Kind defined ============================ 95 | 96 | #define FIFO_DIGIT 0 // 16bits FIFO digital data 97 | #define FIFO_EMPTY 1 // FIFO empty flag: 1 = empty 98 | #define FIFO_START 2 // FIFO start flag: 1 = start 99 | #define FIFO_FULL 3 // FIFO full flag: 1 = Full 100 | #define KEY_STATUS 4 // Current keys status 101 | #define K_ITEM_D_STATUS 0x0008 // 0 = Key push on 102 | #define K_ITEM_S_STATUS 0x0040 // 0 = Key push on 103 | #define KEY3_STATUS 0x0100 // 0 = Key push on 104 | #define KEY4_STATUS 0x0200 // 0 = Key push on 105 | #define K_INDEX_D_STATUS 0x0400 // 0 = Key push on 106 | #define K_INDEX_I_STATUS 0x0800 // 0 = Key push on 107 | #define K_INDEX_S_STATUS 0x1000 // 0 = Key push on 108 | #define KEY2_STATUS 0x2000 // 0 = Key push on 109 | #define KEY1_STATUS 0x4000 // 0 = Key push on 110 | #define K_ITEM_I_STATUS 0x8000 // 0 = Key push on 111 | #define USB_POWER 5 // USB power status: 1 = Power ON 112 | #define V_BATTERY 6 // Battery voltage (mV) 113 | #define VERTICAL 7 // vertical channel attribute pointer 114 | #define HORIZONTAL 8 // horizontal channel attribute pointer 115 | #define GLOBAL 9 // pointer to the whole property 116 | #define TRIGGER 10 // trigger channel attribute pointer 117 | #define FPGA_OK 11 // FPGA configuration was successful 1 = the FPGA config the ok 118 | #define CHARGE 12 // battery charge status 119 | #define HDWVER 13 // device hardware version number 120 | #define DFUVER 14 // the DFU program module version number 121 | #define SYSVER 15 // the SYS program module version number 122 | #define FPGAVER 16 // version number of the FPGA configuration program 123 | 124 | #define ADC_DATA 32+0 // 0~7:ADC_CH_A 8~15:ADC_CH_B 16~17:CH_C&CH_D 125 | #define PRE_SAMPLING 32+1 // 0~15:Pre-sampling depth 126 | #define ALL_SAMPLING 32+2 // 0~15:Total sampling depth 127 | #define CH_A_MIN_MAX 32+3 // 0~7:VMIN 8~15:VMAX 128 | #define CH_A_V_SUM 32+4 // 0~15:CH_A voltage sum 129 | #define CH_A_V_SSQ 32+5 // 0~15:CH_A voltage sum of squares 130 | #define CH_A_NEDGE 32+6 // 0~15:CH_A number of edge 131 | #define CH_A_FREQ 32+7 // 0~15:CH_A frequence 132 | #define CH_A_PHW_MAX 32+8 // 0~15:CH_A pulse high width MAX 133 | #define CH_A_PHW_MIN 32+9 // 0~15:CH_A pulse high width MIN 134 | #define CH_A_PLW_MAX 32+10 // 0~15:CH_A pulse low width MAX 135 | #define CH_A_PLW_MIN 32+11 // 0~15:CH_A pulse low width MIN 136 | 137 | // ============================================================================= 138 | 139 | typedef struct // hardware properties 140 | { 141 | u16 LCD_X; // horizontal screen display points 142 | u16 LCD_Y; // vertical screen display points 143 | u16 Yp_Max; // maximum vertical gear 144 | u16 Xp_Max; // maximum level stalls 145 | u16 Tg_Num; // trigger the stalls in the maximum 146 | u16 Yv_Max; // maximum vertical displacement 147 | u16 Xt_Max; // maximum horizontal displacement 148 | u16 Co_Max; // maximum coupling mode 149 | u8 Ya_Num; // the number of analog channels 150 | u8 Yd_Num; // the number of digital channels 151 | u8 INSERT; // start using the interpolated stalls 152 | u16 KpA1; // A channel shift compensation factor 153 | u16 KpA2; // A channel displacement compensation coefficient 154 | u16 KpB1; // B-channel displacement compensation coefficient 155 | u16 KpB2; // B channel displacement compensation coefficient 156 | } G_attr ; 157 | 158 | typedef struct // vertical channel properties 159 | { 160 | char STR[8]; // stall identification string 161 | s16 KA1; // A channel displacement error correction factor 1 162 | u16 KA2; // A channel slope error correction factor 163 | s16 KB1; // B-channel displacement error correction factor 1 164 | u16 KB2; // B channel slope error correction factor 165 | u32 SCALE; // vertical channel scale factor 166 | } Y_attr ; 167 | 168 | typedef struct // horizontal channel properties 169 | { 170 | char STR[8]; // stall identification string 171 | s16 PSC; // prescaler coefficient 172 | u16 ARR; // frequency coefficient 173 | u16 CCR; // duty cycle coefficient 174 | u16 KP; // interpolation coefficients 175 | u32 SCALE; // horizontal channel scale factor 176 | } X_attr ; 177 | 178 | typedef struct // chanel trigger properties 179 | { 180 | char STR[8]; // trigger identification string 181 | u8 CHx; // trigger channel number 182 | u8 CMD; // trigger control word 183 | } T_attr ; 184 | 185 | extern Y_attr *Y_Attr; 186 | extern X_attr *X_Attr; 187 | extern G_attr *G_Attr; 188 | extern T_attr *T_Attr; 189 | 190 | //============================================================================== 191 | // System function entrance 192 | //============================================================================== 193 | void __CTR_HP(void); //USB_HP_Interrupt 194 | void __USB_Istr(void); //USB_LP_Interrupt 195 | void __USB_Init(void); 196 | 197 | void __LCD_Initial(void); 198 | void __Clear_Screen(u16 Color); 199 | void __Point_SCR(u16 x0, u16 y0); 200 | void __LCD_SetPixl(u16 Color); 201 | u16 __LCD_GetPixl(void); 202 | u16 __Get_TAB_8x14(u8 Code, u16 Row); 203 | void __LCD_Set_Block(u16 x1, u16 x2, u16 y1, u16 y2); 204 | 205 | void __LCD_Copy(uc16 *pBuffer, u16 NumPixel); // Send a row data to LCD 206 | void __LCD_Fill(u16 *pBuffer,u16 NumPixel); // Fill number of pixel by DMA 207 | void __LCD_DMA_Ready(void); // Wait LCD data DMA ready 208 | 209 | void __Row_Copy(uc16 *S_Buffer,u16 *T_Buffer); // Copy one row base data to buffer 210 | void __Row_DMA_Ready(void); // Wait row base data DMA ready 211 | 212 | u32 __Read_FIFO(void); // Read data from FIFO & Ptr+1 213 | void __Display_Str(u16 x0, u16 y0, u16 Color, u8 Mode, char *s); 214 | 215 | u32 __Input_Lic(u16 x0, u8 y0); //Return: 32Bits Licence 216 | u32 __GetDev_SN(void); // Get 32bits Device Serial Number 217 | 218 | u8 __Ident(u32 Dev_ID, u32 Proj_ID, u32 Lic_No); 219 | 220 | void __Set(u8 Object, u32 Value); 221 | u32 __Get(u8 Object); 222 | 223 | void __ExtFlash_PageRD(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead); 224 | void __ExtFlash_PageWR(u8* pBuffer, u32 WriteAddr); 225 | u8 __ReadDiskData(u8* pBuffer, u32 ReadAddr, u16 Lenght); 226 | u8 __ProgDiskPage(u8* pBuffer, u32 ProgAddr); 227 | 228 | u8 __FLASH_Erase(u32 Address); 229 | u8 __FLASH_Prog(u32 Address, u16 Data); 230 | void __FLASH_Unlock(void); 231 | void __FLASH_Lock(void); 232 | 233 | u8 __Chk_SYS(u32 Licence); 234 | u8* __Chk_DFU(void); 235 | u8* __Chk_HDW(void); 236 | 237 | u8 __OpenFileWr(u8* Buffer, char* FileName, u16* Cluster, u32* pDirAddr); 238 | u8 __OpenFileRd(u8* Buffer, char* FileName, u16* Cluster, u32* pDirAddr); 239 | u8 __ReadFileSec(u8* Buffer, u16* Cluster); 240 | u8 __ProgFileSec(u8* Buffer, u16* Cluster); 241 | u8 __CloseFile(u8* Buffer, u32 Lenght, u16* Cluster, u32* pDirAddr); 242 | /**/ 243 | 244 | #endif 245 | /******************************* END OF FILE ********************************/ 246 | -------------------------------------------------------------------------------- /App/inc/cortexm3_macro.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 2 | * File Name : cortexm3_macro.h 3 | * Author : MCD Application Team 4 | * Version : V2.0.3 5 | * Date : 09/22/2008 6 | * Description : Header file for cortexm3_macro.s. 7 | ******************************************************************************** 8 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 9 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 10 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 11 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 12 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 13 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 14 | *******************************************************************************/ 15 | 16 | /* Define to prevent recursive inclusion -------------------------------------*/ 17 | #ifndef __CORTEXM3_MACRO_H 18 | #define __CORTEXM3_MACRO_H 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32f10x_type.h" 22 | 23 | /* Exported types ------------------------------------------------------------*/ 24 | /* Exported constants --------------------------------------------------------*/ 25 | /* Exported macro ------------------------------------------------------------*/ 26 | /* Exported functions ------------------------------------------------------- */ 27 | void __WFI(void); 28 | void __WFE(void); 29 | void __SEV(void); 30 | void __ISB(void); 31 | void __DSB(void); 32 | void __DMB(void); 33 | void __SVC(void); 34 | u32 __MRS_CONTROL(void); 35 | void __MSR_CONTROL(u32 Control); 36 | u32 __MRS_PSP(void); 37 | void __MSR_PSP(u32 TopOfProcessStack); 38 | u32 __MRS_MSP(void); 39 | void __MSR_MSP(u32 TopOfMainStack); 40 | void __RESETPRIMASK(void); 41 | void __SETPRIMASK(void); 42 | u32 __READ_PRIMASK(void); 43 | void __RESETFAULTMASK(void); 44 | void __SETFAULTMASK(void); 45 | u32 __READ_FAULTMASK(void); 46 | void __BASEPRICONFIG(u32 NewPriority); 47 | u32 __GetBASEPRI(void); 48 | u16 __REV_HalfWord(u16 Data); 49 | u32 __REV_Word(u32 Data); 50 | 51 | #endif /* __CORTEXM3_MACRO_H */ 52 | 53 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ 54 | -------------------------------------------------------------------------------- /App/inc/stm32f10x_conf.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 2 | * File Name : stm32f10x_conf.h 3 | * Author : MCD Application Team 4 | * Version : V2.2.1 5 | * Date : 09/22/2008 6 | * Description : Library configuration file. 7 | ******************************************************************************** 8 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 9 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 10 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 11 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 12 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 13 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 14 | *******************************************************************************/ 15 | 16 | /* Define to prevent recursive inclusion -------------------------------------*/ 17 | #ifndef __STM32F10x_CONF_H 18 | #define __STM32F10x_CONF_H 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32f10x_type.h" 22 | 23 | /* Exported types ------------------------------------------------------------*/ 24 | /* Exported constants --------------------------------------------------------*/ 25 | /* Uncomment the line below to compile the library in DEBUG mode, this will expanse 26 | the "assert_param" macro in the firmware library code (see "Exported macro" 27 | section below) */ 28 | /* #define DEBUG 1*/ 29 | 30 | /* Comment the line below to disable the specific peripheral inclusion */ 31 | /************************************* ADC ************************************/ 32 | //#define _ADC 33 | //#define _ADC1 34 | //#define _ADC2 35 | //#define _ADC3 36 | 37 | /************************************* BKP ************************************/ 38 | //#define _BKP 39 | 40 | /************************************* CAN ************************************/ 41 | //#define _CAN 42 | 43 | /************************************* CRC ************************************/ 44 | //#define _CRC 45 | 46 | /************************************* DAC ************************************/ 47 | //#define _DAC 48 | 49 | /************************************* DBGMCU *********************************/ 50 | //#define _DBGMCU 51 | 52 | /************************************* DMA ************************************/ 53 | #define _DMA 54 | //#define _DMA1_Channel1 55 | //#define _DMA1_Channel2 56 | //#define _DMA1_Channel3 57 | //#define _DMA1_Channel4 58 | //#define _DMA1_Channel5 59 | //#define _DMA1_Channel6 60 | //#define _DMA1_Channel7 61 | //#define _DMA2_Channel1 62 | //#define _DMA2_Channel2 63 | //#define _DMA2_Channel3 64 | #define _DMA2_Channel4 65 | //#define _DMA2_Channel5 66 | 67 | /************************************* EXTI ***********************************/ 68 | //#define _EXTI 69 | 70 | /************************************* FLASH and Option Bytes *****************/ 71 | #define _FLASH 72 | /* Uncomment the line below to enable FLASH program/erase/protections functions, 73 | otherwise only FLASH configuration (latency, prefetch, half cycle) functions 74 | are enabled */ 75 | #define _FLASH_PROG 76 | 77 | /************************************* FSMC ***********************************/ 78 | #define _FSMC 79 | 80 | /************************************* GPIO ***********************************/ 81 | #define _GPIO 82 | #define _GPIOA 83 | #define _GPIOB 84 | #define _GPIOC 85 | #define _GPIOD 86 | #define _GPIOE 87 | #define _GPIOF 88 | #define _GPIOG 89 | #define _AFIO 90 | 91 | /************************************* I2C ************************************/ 92 | //#define _I2C 93 | //#define _I2C1 94 | //#define _I2C2 95 | 96 | /************************************* IWDG ***********************************/ 97 | //#define _IWDG 98 | 99 | /************************************* NVIC ***********************************/ 100 | #define _NVIC 101 | 102 | /************************************* PWR ************************************/ 103 | //#define _PWR 104 | 105 | /************************************* RCC ************************************/ 106 | #define _RCC 107 | 108 | /************************************* RTC ************************************/ 109 | //#define _RTC 110 | 111 | /************************************* SDIO ***********************************/ 112 | #define _SDIO 113 | 114 | /************************************* SPI ************************************/ 115 | #define _SPI 116 | #define _SPI1 117 | #define _SPI2 118 | #define _SPI3 119 | 120 | /************************************* SysTick ********************************/ 121 | //#define _SysTick 122 | 123 | /************************************* TIM ************************************/ 124 | //#define _TIM 125 | //#define _TIM1 126 | //#define _TIM2 127 | //#define _TIM3 128 | //#define _TIM4 129 | //#define _TIM5 130 | //#define _TIM6 131 | //#define _TIM7 132 | //#define _TIM8 133 | 134 | /************************************* USART **********************************/ 135 | //#define _USART 136 | //#define _USART1 137 | //#define _USART2 138 | //#define _USART3 139 | //#define _UART4 140 | //#define _UART5 141 | 142 | /************************************* WWDG ***********************************/ 143 | //#define _WWDG 144 | 145 | /* In the following line adjust the value of External High Speed oscillator (HSE) 146 | used in your application */ 147 | #define HSE_Value ((u32)8000000) /* Value of the External oscillator in Hz*/ 148 | 149 | /* In the following line adjust the External High Speed oscillator (HSE) Startup 150 | Timeout value */ 151 | #define HSEStartUp_TimeOut ((u16)0x0500) /* Time out for HSE start up */ 152 | 153 | /* Exported macro ------------------------------------------------------------*/ 154 | #ifdef DEBUG 155 | /******************************************************************************* 156 | * Macro Name : assert_param 157 | * Description : The assert_param macro is used for function's parameters check. 158 | * It is used only if the library is compiled in DEBUG mode. 159 | * Input : - expr: If expr is false, it calls assert_failed function 160 | * which reports the name of the source file and the source 161 | * line number of the call that failed. 162 | * If expr is true, it returns no value. 163 | * Return : None 164 | *******************************************************************************/ 165 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((u8 *)__FILE__, __LINE__)) 166 | /* Exported functions ------------------------------------------------------- */ 167 | void assert_failed(u8* file, u32 line); 168 | #else 169 | #define assert_param(expr) ((void)0) 170 | #endif /* DEBUG */ 171 | 172 | #endif /* __STM32F10x_CONF_H */ 173 | 174 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ 175 | -------------------------------------------------------------------------------- /App/inc/stm32f10x_dma.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 2 | * File Name : stm32f10x_dma.h 3 | * Author : MCD Application Team 4 | * Version : V2.0.3 5 | * Date : 09/22/2008 6 | * Description : This file contains all the functions prototypes for the 7 | * DMA firmware library. 8 | ******************************************************************************** 9 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 10 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 11 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 12 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 13 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 14 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 15 | *******************************************************************************/ 16 | 17 | /* Define to prevent recursive inclusion -------------------------------------*/ 18 | #ifndef __STM32F10x_DMA_H 19 | #define __STM32F10x_DMA_H 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f10x_map.h" 23 | 24 | /* Exported types ------------------------------------------------------------*/ 25 | /* DMA Init structure definition */ 26 | typedef struct 27 | { 28 | u32 DMA_PeripheralBaseAddr; 29 | u32 DMA_MemoryBaseAddr; 30 | u32 DMA_DIR; 31 | u32 DMA_BufferSize; 32 | u32 DMA_PeripheralInc; 33 | u32 DMA_MemoryInc; 34 | u32 DMA_PeripheralDataSize; 35 | u32 DMA_MemoryDataSize; 36 | u32 DMA_Mode; 37 | u32 DMA_Priority; 38 | u32 DMA_M2M; 39 | }DMA_InitTypeDef; 40 | 41 | /* Exported constants --------------------------------------------------------*/ 42 | #define IS_DMA_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == DMA1_Channel1_BASE) || \ 43 | ((*(u32*)&(PERIPH)) == DMA1_Channel2_BASE) || \ 44 | ((*(u32*)&(PERIPH)) == DMA1_Channel3_BASE) || \ 45 | ((*(u32*)&(PERIPH)) == DMA1_Channel4_BASE) || \ 46 | ((*(u32*)&(PERIPH)) == DMA1_Channel5_BASE) || \ 47 | ((*(u32*)&(PERIPH)) == DMA1_Channel6_BASE) || \ 48 | ((*(u32*)&(PERIPH)) == DMA1_Channel7_BASE) || \ 49 | ((*(u32*)&(PERIPH)) == DMA2_Channel1_BASE) || \ 50 | ((*(u32*)&(PERIPH)) == DMA2_Channel2_BASE) || \ 51 | ((*(u32*)&(PERIPH)) == DMA2_Channel3_BASE) || \ 52 | ((*(u32*)&(PERIPH)) == DMA2_Channel4_BASE) || \ 53 | ((*(u32*)&(PERIPH)) == DMA2_Channel5_BASE)) 54 | 55 | /* DMA data transfer direction -----------------------------------------------*/ 56 | #define DMA_DIR_PeripheralDST ((u32)0x00000010) 57 | #define DMA_DIR_PeripheralSRC ((u32)0x00000000) 58 | 59 | #define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \ 60 | ((DIR) == DMA_DIR_PeripheralSRC)) 61 | 62 | /* DMA peripheral incremented mode -------------------------------------------*/ 63 | #define DMA_PeripheralInc_Enable ((u32)0x00000040) 64 | #define DMA_PeripheralInc_Disable ((u32)0x00000000) 65 | 66 | #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \ 67 | ((STATE) == DMA_PeripheralInc_Disable)) 68 | 69 | /* DMA memory incremented mode -----------------------------------------------*/ 70 | #define DMA_MemoryInc_Enable ((u32)0x00000080) 71 | #define DMA_MemoryInc_Disable ((u32)0x00000000) 72 | 73 | #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \ 74 | ((STATE) == DMA_MemoryInc_Disable)) 75 | 76 | /* DMA peripheral data size --------------------------------------------------*/ 77 | #define DMA_PeripheralDataSize_Byte ((u32)0x00000000) 78 | #define DMA_PeripheralDataSize_HalfWord ((u32)0x00000100) 79 | #define DMA_PeripheralDataSize_Word ((u32)0x00000200) 80 | 81 | #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \ 82 | ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \ 83 | ((SIZE) == DMA_PeripheralDataSize_Word)) 84 | 85 | /* DMA memory data size ------------------------------------------------------*/ 86 | #define DMA_MemoryDataSize_Byte ((u32)0x00000000) 87 | #define DMA_MemoryDataSize_HalfWord ((u32)0x00000400) 88 | #define DMA_MemoryDataSize_Word ((u32)0x00000800) 89 | 90 | #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \ 91 | ((SIZE) == DMA_MemoryDataSize_HalfWord) || \ 92 | ((SIZE) == DMA_MemoryDataSize_Word)) 93 | 94 | /* DMA circular/normal mode --------------------------------------------------*/ 95 | #define DMA_Mode_Circular ((u32)0x00000020) 96 | #define DMA_Mode_Normal ((u32)0x00000000) 97 | 98 | #define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal)) 99 | 100 | /* DMA priority level --------------------------------------------------------*/ 101 | #define DMA_Priority_VeryHigh ((u32)0x00003000) 102 | #define DMA_Priority_High ((u32)0x00002000) 103 | #define DMA_Priority_Medium ((u32)0x00001000) 104 | #define DMA_Priority_Low ((u32)0x00000000) 105 | 106 | #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \ 107 | ((PRIORITY) == DMA_Priority_High) || \ 108 | ((PRIORITY) == DMA_Priority_Medium) || \ 109 | ((PRIORITY) == DMA_Priority_Low)) 110 | 111 | /* DMA memory to memory ------------------------------------------------------*/ 112 | #define DMA_M2M_Enable ((u32)0x00004000) 113 | #define DMA_M2M_Disable ((u32)0x00000000) 114 | 115 | #define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable)) 116 | 117 | /* DMA interrupts definition -------------------------------------------------*/ 118 | #define DMA_IT_TC ((u32)0x00000002) 119 | #define DMA_IT_HT ((u32)0x00000004) 120 | #define DMA_IT_TE ((u32)0x00000008) 121 | 122 | #define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00)) 123 | 124 | /* For DMA1 */ 125 | #define DMA1_IT_GL1 ((u32)0x00000001) 126 | #define DMA1_IT_TC1 ((u32)0x00000002) 127 | #define DMA1_IT_HT1 ((u32)0x00000004) 128 | #define DMA1_IT_TE1 ((u32)0x00000008) 129 | #define DMA1_IT_GL2 ((u32)0x00000010) 130 | #define DMA1_IT_TC2 ((u32)0x00000020) 131 | #define DMA1_IT_HT2 ((u32)0x00000040) 132 | #define DMA1_IT_TE2 ((u32)0x00000080) 133 | #define DMA1_IT_GL3 ((u32)0x00000100) 134 | #define DMA1_IT_TC3 ((u32)0x00000200) 135 | #define DMA1_IT_HT3 ((u32)0x00000400) 136 | #define DMA1_IT_TE3 ((u32)0x00000800) 137 | #define DMA1_IT_GL4 ((u32)0x00001000) 138 | #define DMA1_IT_TC4 ((u32)0x00002000) 139 | #define DMA1_IT_HT4 ((u32)0x00004000) 140 | #define DMA1_IT_TE4 ((u32)0x00008000) 141 | #define DMA1_IT_GL5 ((u32)0x00010000) 142 | #define DMA1_IT_TC5 ((u32)0x00020000) 143 | #define DMA1_IT_HT5 ((u32)0x00040000) 144 | #define DMA1_IT_TE5 ((u32)0x00080000) 145 | #define DMA1_IT_GL6 ((u32)0x00100000) 146 | #define DMA1_IT_TC6 ((u32)0x00200000) 147 | #define DMA1_IT_HT6 ((u32)0x00400000) 148 | #define DMA1_IT_TE6 ((u32)0x00800000) 149 | #define DMA1_IT_GL7 ((u32)0x01000000) 150 | #define DMA1_IT_TC7 ((u32)0x02000000) 151 | #define DMA1_IT_HT7 ((u32)0x04000000) 152 | #define DMA1_IT_TE7 ((u32)0x08000000) 153 | /* For DMA2 */ 154 | #define DMA2_IT_GL1 ((u32)0x10000001) 155 | #define DMA2_IT_TC1 ((u32)0x10000002) 156 | #define DMA2_IT_HT1 ((u32)0x10000004) 157 | #define DMA2_IT_TE1 ((u32)0x10000008) 158 | #define DMA2_IT_GL2 ((u32)0x10000010) 159 | #define DMA2_IT_TC2 ((u32)0x10000020) 160 | #define DMA2_IT_HT2 ((u32)0x10000040) 161 | #define DMA2_IT_TE2 ((u32)0x10000080) 162 | #define DMA2_IT_GL3 ((u32)0x10000100) 163 | #define DMA2_IT_TC3 ((u32)0x10000200) 164 | #define DMA2_IT_HT3 ((u32)0x10000400) 165 | #define DMA2_IT_TE3 ((u32)0x10000800) 166 | #define DMA2_IT_GL4 ((u32)0x10001000) 167 | #define DMA2_IT_TC4 ((u32)0x10002000) 168 | #define DMA2_IT_HT4 ((u32)0x10004000) 169 | #define DMA2_IT_TE4 ((u32)0x10008000) 170 | #define DMA2_IT_GL5 ((u32)0x10010000) 171 | #define DMA2_IT_TC5 ((u32)0x10020000) 172 | #define DMA2_IT_HT5 ((u32)0x10040000) 173 | #define DMA2_IT_TE5 ((u32)0x10080000) 174 | 175 | #define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00)) 176 | #define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \ 177 | ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \ 178 | ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \ 179 | ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \ 180 | ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \ 181 | ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \ 182 | ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \ 183 | ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \ 184 | ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \ 185 | ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \ 186 | ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \ 187 | ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \ 188 | ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \ 189 | ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \ 190 | ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \ 191 | ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \ 192 | ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \ 193 | ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \ 194 | ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \ 195 | ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \ 196 | ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \ 197 | ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \ 198 | ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \ 199 | ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5)) 200 | 201 | /* DMA flags definition ------------------------------------------------------*/ 202 | /* For DMA1 */ 203 | #define DMA1_FLAG_GL1 ((u32)0x00000001) 204 | #define DMA1_FLAG_TC1 ((u32)0x00000002) 205 | #define DMA1_FLAG_HT1 ((u32)0x00000004) 206 | #define DMA1_FLAG_TE1 ((u32)0x00000008) 207 | #define DMA1_FLAG_GL2 ((u32)0x00000010) 208 | #define DMA1_FLAG_TC2 ((u32)0x00000020) 209 | #define DMA1_FLAG_HT2 ((u32)0x00000040) 210 | #define DMA1_FLAG_TE2 ((u32)0x00000080) 211 | #define DMA1_FLAG_GL3 ((u32)0x00000100) 212 | #define DMA1_FLAG_TC3 ((u32)0x00000200) 213 | #define DMA1_FLAG_HT3 ((u32)0x00000400) 214 | #define DMA1_FLAG_TE3 ((u32)0x00000800) 215 | #define DMA1_FLAG_GL4 ((u32)0x00001000) 216 | #define DMA1_FLAG_TC4 ((u32)0x00002000) 217 | #define DMA1_FLAG_HT4 ((u32)0x00004000) 218 | #define DMA1_FLAG_TE4 ((u32)0x00008000) 219 | #define DMA1_FLAG_GL5 ((u32)0x00010000) 220 | #define DMA1_FLAG_TC5 ((u32)0x00020000) 221 | #define DMA1_FLAG_HT5 ((u32)0x00040000) 222 | #define DMA1_FLAG_TE5 ((u32)0x00080000) 223 | #define DMA1_FLAG_GL6 ((u32)0x00100000) 224 | #define DMA1_FLAG_TC6 ((u32)0x00200000) 225 | #define DMA1_FLAG_HT6 ((u32)0x00400000) 226 | #define DMA1_FLAG_TE6 ((u32)0x00800000) 227 | #define DMA1_FLAG_GL7 ((u32)0x01000000) 228 | #define DMA1_FLAG_TC7 ((u32)0x02000000) 229 | #define DMA1_FLAG_HT7 ((u32)0x04000000) 230 | #define DMA1_FLAG_TE7 ((u32)0x08000000) 231 | /* For DMA2 */ 232 | #define DMA2_FLAG_GL1 ((u32)0x10000001) 233 | #define DMA2_FLAG_TC1 ((u32)0x10000002) 234 | #define DMA2_FLAG_HT1 ((u32)0x10000004) 235 | #define DMA2_FLAG_TE1 ((u32)0x10000008) 236 | #define DMA2_FLAG_GL2 ((u32)0x10000010) 237 | #define DMA2_FLAG_TC2 ((u32)0x10000020) 238 | #define DMA2_FLAG_HT2 ((u32)0x10000040) 239 | #define DMA2_FLAG_TE2 ((u32)0x10000080) 240 | #define DMA2_FLAG_GL3 ((u32)0x10000100) 241 | #define DMA2_FLAG_TC3 ((u32)0x10000200) 242 | #define DMA2_FLAG_HT3 ((u32)0x10000400) 243 | #define DMA2_FLAG_TE3 ((u32)0x10000800) 244 | #define DMA2_FLAG_GL4 ((u32)0x10001000) 245 | #define DMA2_FLAG_TC4 ((u32)0x10002000) 246 | #define DMA2_FLAG_HT4 ((u32)0x10004000) 247 | #define DMA2_FLAG_TE4 ((u32)0x10008000) 248 | #define DMA2_FLAG_GL5 ((u32)0x10010000) 249 | #define DMA2_FLAG_TC5 ((u32)0x10020000) 250 | #define DMA2_FLAG_HT5 ((u32)0x10040000) 251 | #define DMA2_FLAG_TE5 ((u32)0x10080000) 252 | 253 | #define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00)) 254 | #define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \ 255 | ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \ 256 | ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \ 257 | ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \ 258 | ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \ 259 | ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \ 260 | ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \ 261 | ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \ 262 | ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \ 263 | ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \ 264 | ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \ 265 | ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \ 266 | ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \ 267 | ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \ 268 | ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \ 269 | ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \ 270 | ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \ 271 | ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \ 272 | ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \ 273 | ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \ 274 | ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \ 275 | ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \ 276 | ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \ 277 | ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5)) 278 | 279 | /* DMA Buffer Size -----------------------------------------------------------*/ 280 | #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) 281 | 282 | /* Exported macro ------------------------------------------------------------*/ 283 | /* Exported functions ------------------------------------------------------- */ 284 | void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx); 285 | void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct); 286 | void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct); 287 | void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState); 288 | void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, u32 DMA_IT, FunctionalState NewState); 289 | u16 DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx); 290 | FlagStatus DMA_GetFlagStatus(u32 DMA_FLAG); 291 | void DMA_ClearFlag(u32 DMA_FLAG); 292 | ITStatus DMA_GetITStatus(u32 DMA_IT); 293 | void DMA_ClearITPendingBit(u32 DMA_IT); 294 | 295 | #endif /*__STM32F10x_DMA_H */ 296 | 297 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ 298 | -------------------------------------------------------------------------------- /App/inc/stm32f10x_flash.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 2 | * File Name : stm32f10x_flash.h 3 | * Author : MCD Application Team 4 | * Version : V2.0.3 5 | * Date : 09/22/2008 6 | * Description : This file contains all the functions prototypes for the 7 | * FLASH firmware library. 8 | ******************************************************************************** 9 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 10 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 11 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 12 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 13 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 14 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 15 | *******************************************************************************/ 16 | 17 | /* Define to prevent recursive inclusion -------------------------------------*/ 18 | #ifndef __STM32F10x_FLASH_H 19 | #define __STM32F10x_FLASH_H 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f10x_map.h" 23 | 24 | /* Exported types ------------------------------------------------------------*/ 25 | #ifdef _FLASH_PROG 26 | /* FLASH Status */ 27 | typedef enum 28 | { 29 | FLASH_BUSY = 1, 30 | FLASH_ERROR_PG, 31 | FLASH_ERROR_WRP, 32 | FLASH_COMPLETE, 33 | FLASH_TIMEOUT 34 | }FLASH_Status; 35 | #endif 36 | 37 | /* Flash Latency -------------------------------------------------------------*/ 38 | #define FLASH_Latency_0 ((u32)0x00000000) /* FLASH Zero Latency cycle */ 39 | #define FLASH_Latency_1 ((u32)0x00000001) /* FLASH One Latency cycle */ 40 | #define FLASH_Latency_2 ((u32)0x00000002) /* FLASH Two Latency cycles */ 41 | 42 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \ 43 | ((LATENCY) == FLASH_Latency_1) || \ 44 | ((LATENCY) == FLASH_Latency_2)) 45 | 46 | /* Half Cycle Enable/Disable -------------------------------------------------*/ 47 | #define FLASH_HalfCycleAccess_Enable ((u32)0x00000008) /* FLASH Half Cycle Enable */ 48 | #define FLASH_HalfCycleAccess_Disable ((u32)0x00000000) /* FLASH Half Cycle Disable */ 49 | 50 | #define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \ 51 | ((STATE) == FLASH_HalfCycleAccess_Disable)) 52 | 53 | 54 | /* Prefetch Buffer Enable/Disable --------------------------------------------*/ 55 | #define FLASH_PrefetchBuffer_Enable ((u32)0x00000010) /* FLASH Prefetch Buffer Enable */ 56 | #define FLASH_PrefetchBuffer_Disable ((u32)0x00000000) /* FLASH Prefetch Buffer Disable */ 57 | 58 | #define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \ 59 | ((STATE) == FLASH_PrefetchBuffer_Disable)) 60 | 61 | #ifdef _FLASH_PROG 62 | /* Option Bytes Write Protection ---------------------------------------------*/ 63 | /* Values to be used with STM32F10Xxx Medium-density devices: FLASH memory density 64 | ranges between 32 and 128 Kbytes with page size equal to 1 Kbytes */ 65 | #define FLASH_WRProt_Pages0to3 ((u32)0x00000001) /* Write protection of page 0 to 3 */ 66 | #define FLASH_WRProt_Pages4to7 ((u32)0x00000002) /* Write protection of page 4 to 7 */ 67 | #define FLASH_WRProt_Pages8to11 ((u32)0x00000004) /* Write protection of page 8 to 11 */ 68 | #define FLASH_WRProt_Pages12to15 ((u32)0x00000008) /* Write protection of page 12 to 15 */ 69 | #define FLASH_WRProt_Pages16to19 ((u32)0x00000010) /* Write protection of page 16 to 19 */ 70 | #define FLASH_WRProt_Pages20to23 ((u32)0x00000020) /* Write protection of page 20 to 23 */ 71 | #define FLASH_WRProt_Pages24to27 ((u32)0x00000040) /* Write protection of page 24 to 27 */ 72 | #define FLASH_WRProt_Pages28to31 ((u32)0x00000080) /* Write protection of page 28 to 31 */ 73 | #define FLASH_WRProt_Pages32to35 ((u32)0x00000100) /* Write protection of page 32 to 35 */ 74 | #define FLASH_WRProt_Pages36to39 ((u32)0x00000200) /* Write protection of page 36 to 39 */ 75 | #define FLASH_WRProt_Pages40to43 ((u32)0x00000400) /* Write protection of page 40 to 43 */ 76 | #define FLASH_WRProt_Pages44to47 ((u32)0x00000800) /* Write protection of page 44 to 47 */ 77 | #define FLASH_WRProt_Pages48to51 ((u32)0x00001000) /* Write protection of page 48 to 51 */ 78 | #define FLASH_WRProt_Pages52to55 ((u32)0x00002000) /* Write protection of page 52 to 55 */ 79 | #define FLASH_WRProt_Pages56to59 ((u32)0x00004000) /* Write protection of page 56 to 59 */ 80 | #define FLASH_WRProt_Pages60to63 ((u32)0x00008000) /* Write protection of page 60 to 63 */ 81 | #define FLASH_WRProt_Pages64to67 ((u32)0x00010000) /* Write protection of page 64 to 67 */ 82 | #define FLASH_WRProt_Pages68to71 ((u32)0x00020000) /* Write protection of page 68 to 71 */ 83 | #define FLASH_WRProt_Pages72to75 ((u32)0x00040000) /* Write protection of page 72 to 75 */ 84 | #define FLASH_WRProt_Pages76to79 ((u32)0x00080000) /* Write protection of page 76 to 79 */ 85 | #define FLASH_WRProt_Pages80to83 ((u32)0x00100000) /* Write protection of page 80 to 83 */ 86 | #define FLASH_WRProt_Pages84to87 ((u32)0x00200000) /* Write protection of page 84 to 87 */ 87 | #define FLASH_WRProt_Pages88to91 ((u32)0x00400000) /* Write protection of page 88 to 91 */ 88 | #define FLASH_WRProt_Pages92to95 ((u32)0x00800000) /* Write protection of page 92 to 95 */ 89 | #define FLASH_WRProt_Pages96to99 ((u32)0x01000000) /* Write protection of page 96 to 99 */ 90 | #define FLASH_WRProt_Pages100to103 ((u32)0x02000000) /* Write protection of page 100 to 103 */ 91 | #define FLASH_WRProt_Pages104to107 ((u32)0x04000000) /* Write protection of page 104 to 107 */ 92 | #define FLASH_WRProt_Pages108to111 ((u32)0x08000000) /* Write protection of page 108 to 111 */ 93 | #define FLASH_WRProt_Pages112to115 ((u32)0x10000000) /* Write protection of page 112 to 115 */ 94 | #define FLASH_WRProt_Pages116to119 ((u32)0x20000000) /* Write protection of page 115 to 119 */ 95 | #define FLASH_WRProt_Pages120to123 ((u32)0x40000000) /* Write protection of page 120 to 123 */ 96 | #define FLASH_WRProt_Pages124to127 ((u32)0x80000000) /* Write protection of page 124 to 127 */ 97 | /* Values to be used with STM32F10Xxx High-density devices: FLASH memory density 98 | ranges between 256 and 512 Kbytes with page size equal to 2 Kbytes */ 99 | #define FLASH_WRProt_Pages0to1 ((u32)0x00000001) /* Write protection of page 0 to 1 */ 100 | #define FLASH_WRProt_Pages2to3 ((u32)0x00000002) /* Write protection of page 2 to 3 */ 101 | #define FLASH_WRProt_Pages4to5 ((u32)0x00000004) /* Write protection of page 4 to 5 */ 102 | #define FLASH_WRProt_Pages6to7 ((u32)0x00000008) /* Write protection of page 6 to 7 */ 103 | #define FLASH_WRProt_Pages8to9 ((u32)0x00000010) /* Write protection of page 8 to 9 */ 104 | #define FLASH_WRProt_Pages10to11 ((u32)0x00000020) /* Write protection of page 10 to 11 */ 105 | #define FLASH_WRProt_Pages12to13 ((u32)0x00000040) /* Write protection of page 12 to 13 */ 106 | #define FLASH_WRProt_Pages14to15 ((u32)0x00000080) /* Write protection of page 14 to 15 */ 107 | #define FLASH_WRProt_Pages16to17 ((u32)0x00000100) /* Write protection of page 16 to 17 */ 108 | #define FLASH_WRProt_Pages18to19 ((u32)0x00000200) /* Write protection of page 18 to 19 */ 109 | #define FLASH_WRProt_Pages20to21 ((u32)0x00000400) /* Write protection of page 20 to 21 */ 110 | #define FLASH_WRProt_Pages22to23 ((u32)0x00000800) /* Write protection of page 22 to 23 */ 111 | #define FLASH_WRProt_Pages24to25 ((u32)0x00001000) /* Write protection of page 24 to 25 */ 112 | #define FLASH_WRProt_Pages26to27 ((u32)0x00002000) /* Write protection of page 26 to 27 */ 113 | #define FLASH_WRProt_Pages28to29 ((u32)0x00004000) /* Write protection of page 28 to 29 */ 114 | #define FLASH_WRProt_Pages30to31 ((u32)0x00008000) /* Write protection of page 30 to 31 */ 115 | #define FLASH_WRProt_Pages32to33 ((u32)0x00010000) /* Write protection of page 32 to 33 */ 116 | #define FLASH_WRProt_Pages34to35 ((u32)0x00020000) /* Write protection of page 34 to 35 */ 117 | #define FLASH_WRProt_Pages36to37 ((u32)0x00040000) /* Write protection of page 36 to 37 */ 118 | #define FLASH_WRProt_Pages38to39 ((u32)0x00080000) /* Write protection of page 38 to 39 */ 119 | #define FLASH_WRProt_Pages40to41 ((u32)0x00100000) /* Write protection of page 40 to 41 */ 120 | #define FLASH_WRProt_Pages42to43 ((u32)0x00200000) /* Write protection of page 42 to 43 */ 121 | #define FLASH_WRProt_Pages44to45 ((u32)0x00400000) /* Write protection of page 44 to 45 */ 122 | #define FLASH_WRProt_Pages46to47 ((u32)0x00800000) /* Write protection of page 46 to 47 */ 123 | #define FLASH_WRProt_Pages48to49 ((u32)0x01000000) /* Write protection of page 48 to 49 */ 124 | #define FLASH_WRProt_Pages50to51 ((u32)0x02000000) /* Write protection of page 50 to 51 */ 125 | #define FLASH_WRProt_Pages52to53 ((u32)0x04000000) /* Write protection of page 52 to 53 */ 126 | #define FLASH_WRProt_Pages54to55 ((u32)0x08000000) /* Write protection of page 54 to 55 */ 127 | #define FLASH_WRProt_Pages56to57 ((u32)0x10000000) /* Write protection of page 56 to 57 */ 128 | #define FLASH_WRProt_Pages58to59 ((u32)0x20000000) /* Write protection of page 58 to 59 */ 129 | #define FLASH_WRProt_Pages60to61 ((u32)0x40000000) /* Write protection of page 60 to 61 */ 130 | #define FLASH_WRProt_Pages62to255 ((u32)0x80000000) /* Write protection of page 62 to 255 */ 131 | #define FLASH_WRProt_AllPages ((u32)0xFFFFFFFF) /* Write protection of all Pages */ 132 | 133 | #define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000)) 134 | 135 | #define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0807FFFF)) 136 | #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806)) 137 | 138 | /* Option Bytes IWatchdog ----------------------------------------------------*/ 139 | #define OB_IWDG_SW ((u16)0x0001) /* Software IWDG selected */ 140 | #define OB_IWDG_HW ((u16)0x0000) /* Hardware IWDG selected */ 141 | 142 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 143 | 144 | /* Option Bytes nRST_STOP ----------------------------------------------------*/ 145 | #define OB_STOP_NoRST ((u16)0x0002) /* No reset generated when entering in STOP */ 146 | #define OB_STOP_RST ((u16)0x0000) /* Reset generated when entering in STOP */ 147 | 148 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) 149 | 150 | /* Option Bytes nRST_STDBY ---------------------------------------------------*/ 151 | #define OB_STDBY_NoRST ((u16)0x0004) /* No reset generated when entering in STANDBY */ 152 | #define OB_STDBY_RST ((u16)0x0000) /* Reset generated when entering in STANDBY */ 153 | 154 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) 155 | 156 | /* FLASH Interrupts ----------------------------------------------------------*/ 157 | #define FLASH_IT_ERROR ((u32)0x00000400) /* FPEC error interrupt source */ 158 | #define FLASH_IT_EOP ((u32)0x00001000) /* End of FLASH Operation Interrupt source */ 159 | 160 | #define IS_FLASH_IT(IT) ((((IT) & (u32)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000))) 161 | 162 | /* FLASH Flags ---------------------------------------------------------------*/ 163 | #define FLASH_FLAG_BSY ((u32)0x00000001) /* FLASH Busy flag */ 164 | #define FLASH_FLAG_EOP ((u32)0x00000020) /* FLASH End of Operation flag */ 165 | #define FLASH_FLAG_PGERR ((u32)0x00000004) /* FLASH Program error flag */ 166 | #define FLASH_FLAG_WRPRTERR ((u32)0x00000010) /* FLASH Write protected error flag */ 167 | #define FLASH_FLAG_OPTERR ((u32)0x00000001) /* FLASH Option Byte error flag */ 168 | 169 | #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (u32)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000)) 170 | 171 | #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \ 172 | ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \ 173 | ((FLAG) == FLASH_FLAG_OPTERR)) 174 | #endif 175 | 176 | /* Exported constants --------------------------------------------------------*/ 177 | /* Exported macro ------------------------------------------------------------*/ 178 | /* Exported functions ------------------------------------------------------- */ 179 | void FLASH_SetLatency(u32 FLASH_Latency); 180 | void FLASH_HalfCycleAccessCmd(u32 FLASH_HalfCycleAccess); 181 | void FLASH_PrefetchBufferCmd(u32 FLASH_PrefetchBuffer); 182 | 183 | #ifdef _FLASH_PROG 184 | void FLASH_Unlock(void); 185 | void FLASH_Lock(void); 186 | FLASH_Status FLASH_ErasePage(u32 Page_Address); 187 | FLASH_Status FLASH_EraseAllPages(void); 188 | FLASH_Status FLASH_EraseOptionBytes(void); 189 | FLASH_Status FLASH_ProgramWord(u32 Address, u32 Data); 190 | FLASH_Status FLASH_ProgramHalfWord(u32 Address, u16 Data); 191 | FLASH_Status FLASH_ProgramOptionByteData(u32 Address, u8 Data); 192 | FLASH_Status FLASH_EnableWriteProtection(u32 FLASH_Pages); 193 | FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState); 194 | FLASH_Status FLASH_UserOptionByteConfig(u16 OB_IWDG, u16 OB_STOP, u16 OB_STDBY); 195 | u32 FLASH_GetUserOptionByte(void); 196 | u32 FLASH_GetWriteProtectionOptionByte(void); 197 | FlagStatus FLASH_GetReadOutProtectionStatus(void); 198 | FlagStatus FLASH_GetPrefetchBufferStatus(void); 199 | void FLASH_ITConfig(u16 FLASH_IT, FunctionalState NewState); 200 | FlagStatus FLASH_GetFlagStatus(u16 FLASH_FLAG); 201 | void FLASH_ClearFlag(u16 FLASH_FLAG); 202 | FLASH_Status FLASH_GetStatus(void); 203 | FLASH_Status FLASH_WaitForLastOperation(u32 Timeout); 204 | #endif 205 | 206 | #endif /* __STM32F10x_FLASH_H */ 207 | 208 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ 209 | -------------------------------------------------------------------------------- /App/inc/stm32f10x_gpio.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 2 | * File Name : stm32f10x_gpio.h 3 | * Author : MCD Application Team 4 | * Version : V2.0.3 5 | * Date : 09/22/2008 6 | * Description : This file contains all the functions prototypes for the 7 | * GPIO firmware library. 8 | ******************************************************************************** 9 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 10 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 11 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 12 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 13 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 14 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 15 | *******************************************************************************/ 16 | 17 | /* Define to prevent recursive inclusion -------------------------------------*/ 18 | #ifndef __STM32F10x_GPIO_H 19 | #define __STM32F10x_GPIO_H 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f10x_map.h" 23 | 24 | /* Exported types ------------------------------------------------------------*/ 25 | #define IS_GPIO_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == GPIOA_BASE) || \ 26 | ((*(u32*)&(PERIPH)) == GPIOB_BASE) || \ 27 | ((*(u32*)&(PERIPH)) == GPIOC_BASE) || \ 28 | ((*(u32*)&(PERIPH)) == GPIOD_BASE) || \ 29 | ((*(u32*)&(PERIPH)) == GPIOE_BASE) || \ 30 | ((*(u32*)&(PERIPH)) == GPIOF_BASE) || \ 31 | ((*(u32*)&(PERIPH)) == GPIOG_BASE)) 32 | 33 | /* Output Maximum frequency selection ----------------------------------------*/ 34 | typedef enum 35 | { 36 | GPIO_Speed_10MHz = 1, 37 | GPIO_Speed_2MHz, 38 | GPIO_Speed_50MHz 39 | }GPIOSpeed_TypeDef; 40 | 41 | #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \ 42 | ((SPEED) == GPIO_Speed_50MHz)) 43 | 44 | /* Configuration Mode enumeration --------------------------------------------*/ 45 | typedef enum 46 | { GPIO_Mode_AIN = 0x0, 47 | GPIO_Mode_IN_FLOATING = 0x04, 48 | GPIO_Mode_IPD = 0x28, 49 | GPIO_Mode_IPU = 0x48, 50 | GPIO_Mode_Out_OD = 0x14, 51 | GPIO_Mode_Out_PP = 0x10, 52 | GPIO_Mode_AF_OD = 0x1C, 53 | GPIO_Mode_AF_PP = 0x18 54 | }GPIOMode_TypeDef; 55 | 56 | #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \ 57 | ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \ 58 | ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \ 59 | ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP)) 60 | 61 | /* GPIO Init structure definition */ 62 | typedef struct 63 | { 64 | u16 GPIO_Pin; 65 | GPIOSpeed_TypeDef GPIO_Speed; 66 | GPIOMode_TypeDef GPIO_Mode; 67 | }GPIO_InitTypeDef; 68 | 69 | /* Bit_SET and Bit_RESET enumeration -----------------------------------------*/ 70 | typedef enum 71 | { Bit_RESET = 0, 72 | Bit_SET 73 | }BitAction; 74 | #define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET)) 75 | 76 | /* Exported constants --------------------------------------------------------*/ 77 | /* GPIO pins define ----------------------------------------------------------*/ 78 | #define GPIO_Pin_0 ((u16)0x0001) /* Pin 0 selected */ 79 | #define GPIO_Pin_1 ((u16)0x0002) /* Pin 1 selected */ 80 | #define GPIO_Pin_2 ((u16)0x0004) /* Pin 2 selected */ 81 | #define GPIO_Pin_3 ((u16)0x0008) /* Pin 3 selected */ 82 | #define GPIO_Pin_4 ((u16)0x0010) /* Pin 4 selected */ 83 | #define GPIO_Pin_5 ((u16)0x0020) /* Pin 5 selected */ 84 | #define GPIO_Pin_6 ((u16)0x0040) /* Pin 6 selected */ 85 | #define GPIO_Pin_7 ((u16)0x0080) /* Pin 7 selected */ 86 | #define GPIO_Pin_8 ((u16)0x0100) /* Pin 8 selected */ 87 | #define GPIO_Pin_9 ((u16)0x0200) /* Pin 9 selected */ 88 | #define GPIO_Pin_10 ((u16)0x0400) /* Pin 10 selected */ 89 | #define GPIO_Pin_11 ((u16)0x0800) /* Pin 11 selected */ 90 | #define GPIO_Pin_12 ((u16)0x1000) /* Pin 12 selected */ 91 | #define GPIO_Pin_13 ((u16)0x2000) /* Pin 13 selected */ 92 | #define GPIO_Pin_14 ((u16)0x4000) /* Pin 14 selected */ 93 | #define GPIO_Pin_15 ((u16)0x8000) /* Pin 15 selected */ 94 | #define GPIO_Pin_All ((u16)0xFFFF) /* All pins selected */ 95 | 96 | #define IS_GPIO_PIN(PIN) ((((PIN) & (u16)0x00) == 0x00) && ((PIN) != (u16)0x00)) 97 | 98 | #define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \ 99 | ((PIN) == GPIO_Pin_1) || \ 100 | ((PIN) == GPIO_Pin_2) || \ 101 | ((PIN) == GPIO_Pin_3) || \ 102 | ((PIN) == GPIO_Pin_4) || \ 103 | ((PIN) == GPIO_Pin_5) || \ 104 | ((PIN) == GPIO_Pin_6) || \ 105 | ((PIN) == GPIO_Pin_7) || \ 106 | ((PIN) == GPIO_Pin_8) || \ 107 | ((PIN) == GPIO_Pin_9) || \ 108 | ((PIN) == GPIO_Pin_10) || \ 109 | ((PIN) == GPIO_Pin_11) || \ 110 | ((PIN) == GPIO_Pin_12) || \ 111 | ((PIN) == GPIO_Pin_13) || \ 112 | ((PIN) == GPIO_Pin_14) || \ 113 | ((PIN) == GPIO_Pin_15)) 114 | 115 | /* GPIO Remap define ---------------------------------------------------------*/ 116 | #define GPIO_Remap_SPI1 ((u32)0x00000001) /* SPI1 Alternate Function mapping */ 117 | #define GPIO_Remap_I2C1 ((u32)0x00000002) /* I2C1 Alternate Function mapping */ 118 | #define GPIO_Remap_USART1 ((u32)0x00000004) /* USART1 Alternate Function mapping */ 119 | #define GPIO_Remap_USART2 ((u32)0x00000008) /* USART2 Alternate Function mapping */ 120 | #define GPIO_PartialRemap_USART3 ((u32)0x00140010) /* USART3 Partial Alternate Function mapping */ 121 | #define GPIO_FullRemap_USART3 ((u32)0x00140030) /* USART3 Full Alternate Function mapping */ 122 | #define GPIO_PartialRemap_TIM1 ((u32)0x00160040) /* TIM1 Partial Alternate Function mapping */ 123 | #define GPIO_FullRemap_TIM1 ((u32)0x001600C0) /* TIM1 Full Alternate Function mapping */ 124 | #define GPIO_PartialRemap1_TIM2 ((u32)0x00180100) /* TIM2 Partial1 Alternate Function mapping */ 125 | #define GPIO_PartialRemap2_TIM2 ((u32)0x00180200) /* TIM2 Partial2 Alternate Function mapping */ 126 | #define GPIO_FullRemap_TIM2 ((u32)0x00180300) /* TIM2 Full Alternate Function mapping */ 127 | #define GPIO_PartialRemap_TIM3 ((u32)0x001A0800) /* TIM3 Partial Alternate Function mapping */ 128 | #define GPIO_FullRemap_TIM3 ((u32)0x001A0C00) /* TIM3 Full Alternate Function mapping */ 129 | #define GPIO_Remap_TIM4 ((u32)0x00001000) /* TIM4 Alternate Function mapping */ 130 | #define GPIO_Remap1_CAN ((u32)0x001D4000) /* CAN Alternate Function mapping */ 131 | #define GPIO_Remap2_CAN ((u32)0x001D6000) /* CAN Alternate Function mapping */ 132 | #define GPIO_Remap_PD01 ((u32)0x00008000) /* PD01 Alternate Function mapping */ 133 | #define GPIO_Remap_TIM5CH4_LSI ((u32)0x00200001) /* LSI connected to TIM5 Channel4 input capture for calibration */ 134 | #define GPIO_Remap_ADC1_ETRGINJ ((u32)0x00200002) /* ADC1 External Trigger Injected Conversion remapping */ 135 | #define GPIO_Remap_ADC1_ETRGREG ((u32)0x00200004) /* ADC1 External Trigger Regular Conversion remapping */ 136 | #define GPIO_Remap_ADC2_ETRGINJ ((u32)0x00200008) /* ADC2 External Trigger Injected Conversion remapping */ 137 | #define GPIO_Remap_ADC2_ETRGREG ((u32)0x00200010) /* ADC2 External Trigger Regular Conversion remapping */ 138 | #define GPIO_Remap_SWJ_NoJTRST ((u32)0x00300100) /* Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */ 139 | #define GPIO_Remap_SWJ_JTAGDisable ((u32)0x00300200) /* JTAG-DP Disabled and SW-DP Enabled */ 140 | #define GPIO_Remap_SWJ_Disable ((u32)0x00300400) /* Full SWJ Disabled (JTAG-DP + SW-DP) */ 141 | 142 | 143 | #define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \ 144 | ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \ 145 | ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \ 146 | ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \ 147 | ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \ 148 | ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \ 149 | ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \ 150 | ((REMAP) == GPIO_Remap1_CAN) || ((REMAP) == GPIO_Remap2_CAN) || \ 151 | ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \ 152 | ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \ 153 | ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \ 154 | ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable)|| \ 155 | ((REMAP) == GPIO_Remap_SWJ_Disable)) 156 | 157 | /* GPIO Port Sources ---------------------------------------------------------*/ 158 | #define GPIO_PortSourceGPIOA ((u8)0x00) 159 | #define GPIO_PortSourceGPIOB ((u8)0x01) 160 | #define GPIO_PortSourceGPIOC ((u8)0x02) 161 | #define GPIO_PortSourceGPIOD ((u8)0x03) 162 | #define GPIO_PortSourceGPIOE ((u8)0x04) 163 | #define GPIO_PortSourceGPIOF ((u8)0x05) 164 | #define GPIO_PortSourceGPIOG ((u8)0x06) 165 | 166 | #define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ 167 | ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ 168 | ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ 169 | ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ 170 | ((PORTSOURCE) == GPIO_PortSourceGPIOE)) 171 | 172 | #define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ 173 | ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ 174 | ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ 175 | ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ 176 | ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \ 177 | ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \ 178 | ((PORTSOURCE) == GPIO_PortSourceGPIOG)) 179 | 180 | /* GPIO Pin sources ----------------------------------------------------------*/ 181 | #define GPIO_PinSource0 ((u8)0x00) 182 | #define GPIO_PinSource1 ((u8)0x01) 183 | #define GPIO_PinSource2 ((u8)0x02) 184 | #define GPIO_PinSource3 ((u8)0x03) 185 | #define GPIO_PinSource4 ((u8)0x04) 186 | #define GPIO_PinSource5 ((u8)0x05) 187 | #define GPIO_PinSource6 ((u8)0x06) 188 | #define GPIO_PinSource7 ((u8)0x07) 189 | #define GPIO_PinSource8 ((u8)0x08) 190 | #define GPIO_PinSource9 ((u8)0x09) 191 | #define GPIO_PinSource10 ((u8)0x0A) 192 | #define GPIO_PinSource11 ((u8)0x0B) 193 | #define GPIO_PinSource12 ((u8)0x0C) 194 | #define GPIO_PinSource13 ((u8)0x0D) 195 | #define GPIO_PinSource14 ((u8)0x0E) 196 | #define GPIO_PinSource15 ((u8)0x0F) 197 | 198 | #define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \ 199 | ((PINSOURCE) == GPIO_PinSource1) || \ 200 | ((PINSOURCE) == GPIO_PinSource2) || \ 201 | ((PINSOURCE) == GPIO_PinSource3) || \ 202 | ((PINSOURCE) == GPIO_PinSource4) || \ 203 | ((PINSOURCE) == GPIO_PinSource5) || \ 204 | ((PINSOURCE) == GPIO_PinSource6) || \ 205 | ((PINSOURCE) == GPIO_PinSource7) || \ 206 | ((PINSOURCE) == GPIO_PinSource8) || \ 207 | ((PINSOURCE) == GPIO_PinSource9) || \ 208 | ((PINSOURCE) == GPIO_PinSource10) || \ 209 | ((PINSOURCE) == GPIO_PinSource11) || \ 210 | ((PINSOURCE) == GPIO_PinSource12) || \ 211 | ((PINSOURCE) == GPIO_PinSource13) || \ 212 | ((PINSOURCE) == GPIO_PinSource14) || \ 213 | ((PINSOURCE) == GPIO_PinSource15)) 214 | 215 | /* Exported macro ------------------------------------------------------------*/ 216 | /* Exported functions ------------------------------------------------------- */ 217 | void GPIO_DeInit(GPIO_TypeDef* GPIOx); 218 | void GPIO_AFIODeInit(void); 219 | void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); 220 | void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); 221 | u8 GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin); 222 | u16 GPIO_ReadInputData(GPIO_TypeDef* GPIOx); 223 | u8 GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin); 224 | u16 GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); 225 | void GPIO_SetBits(GPIO_TypeDef* GPIOx, u16 GPIO_Pin); 226 | void GPIO_ResetBits(GPIO_TypeDef* GPIOx, u16 GPIO_Pin); 227 | void GPIO_WriteBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin, BitAction BitVal); 228 | void GPIO_Write(GPIO_TypeDef* GPIOx, u16 PortVal); 229 | void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, u16 GPIO_Pin); 230 | void GPIO_EventOutputConfig(u8 GPIO_PortSource, u8 GPIO_PinSource); 231 | void GPIO_EventOutputCmd(FunctionalState NewState); 232 | void GPIO_PinRemapConfig(u32 GPIO_Remap, FunctionalState NewState); 233 | void GPIO_EXTILineConfig(u8 GPIO_PortSource, u8 GPIO_PinSource); 234 | 235 | #endif /* __STM32F10x_GPIO_H */ 236 | 237 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ 238 | -------------------------------------------------------------------------------- /App/inc/stm32f10x_lib.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 2 | * File Name : stm32f10x_lib.h 3 | * Author : MCD Application Team 4 | * Version : V2.0.3 5 | * Date : 09/22/2008 6 | * Description : This file includes the peripherals header files in the 7 | * user application. 8 | ******************************************************************************** 9 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 10 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 11 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 12 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 13 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 14 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 15 | *******************************************************************************/ 16 | 17 | /* Define to prevent recursive inclusion -------------------------------------*/ 18 | #ifndef __STM32F10x_LIB_H 19 | #define __STM32F10x_LIB_H 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f10x_map.h" 23 | 24 | #ifdef _ADC 25 | #include "stm32f10x_adc.h" 26 | #endif /*_ADC */ 27 | 28 | #ifdef _BKP 29 | #include "stm32f10x_bkp.h" 30 | #endif /*_BKP */ 31 | 32 | #ifdef _CAN 33 | #include "stm32f10x_can.h" 34 | #endif /*_CAN */ 35 | 36 | #ifdef _CRC 37 | #include "stm32f10x_crc.h" 38 | #endif /*_CRC */ 39 | 40 | #ifdef _DAC 41 | #include "stm32f10x_dac.h" 42 | #endif /*_DAC */ 43 | 44 | #ifdef _DBGMCU 45 | #include "stm32f10x_dbgmcu.h" 46 | #endif /*_DBGMCU */ 47 | 48 | #ifdef _DMA 49 | #include "stm32f10x_dma.h" 50 | #endif /*_DMA */ 51 | 52 | #ifdef _EXTI 53 | #include "stm32f10x_exti.h" 54 | #endif /*_EXTI */ 55 | 56 | #ifdef _FLASH 57 | #include "stm32f10x_flash.h" 58 | #endif /*_FLASH */ 59 | 60 | #ifdef _FSMC 61 | #include "stm32f10x_fsmc.h" 62 | #endif /*_FSMC */ 63 | 64 | #ifdef _GPIO 65 | #include "stm32f10x_gpio.h" 66 | #endif /*_GPIO */ 67 | 68 | #ifdef _I2C 69 | #include "stm32f10x_i2c.h" 70 | #endif /*_I2C */ 71 | 72 | #ifdef _IWDG 73 | #include "stm32f10x_iwdg.h" 74 | #endif /*_IWDG */ 75 | 76 | #ifdef _NVIC 77 | #include "stm32f10x_nvic.h" 78 | #endif /*_NVIC */ 79 | 80 | #ifdef _PWR 81 | #include "stm32f10x_pwr.h" 82 | #endif /*_PWR */ 83 | 84 | #ifdef _RCC 85 | #include "stm32f10x_rcc.h" 86 | #endif /*_RCC */ 87 | 88 | #ifdef _RTC 89 | #include "stm32f10x_rtc.h" 90 | #endif /*_RTC */ 91 | 92 | #ifdef _SDIO 93 | #include "stm32f10x_sdio.h" 94 | #endif /*_SDIO */ 95 | 96 | #ifdef _SPI 97 | #include "stm32f10x_spi.h" 98 | #endif /*_SPI */ 99 | 100 | #ifdef _SysTick 101 | #include "stm32f10x_systick.h" 102 | #endif /*_SysTick */ 103 | 104 | #ifdef _TIM 105 | #include "stm32f10x_tim.h" 106 | #endif /*_TIM */ 107 | 108 | #ifdef _USART 109 | #include "stm32f10x_usart.h" 110 | #endif /*_USART */ 111 | 112 | #ifdef _WWDG 113 | #include "stm32f10x_wwdg.h" 114 | #endif /*_WWDG */ 115 | 116 | /* Exported types ------------------------------------------------------------*/ 117 | /* Exported constants --------------------------------------------------------*/ 118 | /* Exported macro ------------------------------------------------------------*/ 119 | /* Exported functions ------------------------------------------------------- */ 120 | void debug(void); 121 | 122 | #endif /* __STM32F10x_LIB_H */ 123 | 124 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ 125 | -------------------------------------------------------------------------------- /App/inc/stm32f10x_rcc.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 2 | * File Name : stm32f10x_rcc.h 3 | * Author : MCD Application Team 4 | * Version : V2.0.3 5 | * Date : 09/22/2008 6 | * Description : This file contains all the functions prototypes for the 7 | * RCC firmware library. 8 | ******************************************************************************** 9 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 10 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 11 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 12 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 13 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 14 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 15 | *******************************************************************************/ 16 | 17 | /* Define to prevent recursive inclusion -------------------------------------*/ 18 | #ifndef __STM32F10x_RCC_H 19 | #define __STM32F10x_RCC_H 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f10x_map.h" 23 | 24 | /* Exported types ------------------------------------------------------------*/ 25 | typedef struct 26 | { 27 | u32 SYSCLK_Frequency; 28 | u32 HCLK_Frequency; 29 | u32 PCLK1_Frequency; 30 | u32 PCLK2_Frequency; 31 | u32 ADCCLK_Frequency; 32 | }RCC_ClocksTypeDef; 33 | 34 | /* Exported constants --------------------------------------------------------*/ 35 | /* HSE configuration */ 36 | #define RCC_HSE_OFF ((u32)0x00000000) 37 | #define RCC_HSE_ON ((u32)0x00010000) 38 | #define RCC_HSE_Bypass ((u32)0x00040000) 39 | 40 | #define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \ 41 | ((HSE) == RCC_HSE_Bypass)) 42 | 43 | /* PLL entry clock source */ 44 | #define RCC_PLLSource_HSI_Div2 ((u32)0x00000000) 45 | #define RCC_PLLSource_HSE_Div1 ((u32)0x00010000) 46 | #define RCC_PLLSource_HSE_Div2 ((u32)0x00030000) 47 | 48 | #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ 49 | ((SOURCE) == RCC_PLLSource_HSE_Div1) || \ 50 | ((SOURCE) == RCC_PLLSource_HSE_Div2)) 51 | 52 | /* PLL multiplication factor */ 53 | #define RCC_PLLMul_2 ((u32)0x00000000) 54 | #define RCC_PLLMul_3 ((u32)0x00040000) 55 | #define RCC_PLLMul_4 ((u32)0x00080000) 56 | #define RCC_PLLMul_5 ((u32)0x000C0000) 57 | #define RCC_PLLMul_6 ((u32)0x00100000) 58 | #define RCC_PLLMul_7 ((u32)0x00140000) 59 | #define RCC_PLLMul_8 ((u32)0x00180000) 60 | #define RCC_PLLMul_9 ((u32)0x001C0000) 61 | #define RCC_PLLMul_10 ((u32)0x00200000) 62 | #define RCC_PLLMul_11 ((u32)0x00240000) 63 | #define RCC_PLLMul_12 ((u32)0x00280000) 64 | #define RCC_PLLMul_13 ((u32)0x002C0000) 65 | #define RCC_PLLMul_14 ((u32)0x00300000) 66 | #define RCC_PLLMul_15 ((u32)0x00340000) 67 | #define RCC_PLLMul_16 ((u32)0x00380000) 68 | 69 | #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \ 70 | ((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \ 71 | ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \ 72 | ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \ 73 | ((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \ 74 | ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \ 75 | ((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \ 76 | ((MUL) == RCC_PLLMul_16)) 77 | 78 | /* System clock source */ 79 | #define RCC_SYSCLKSource_HSI ((u32)0x00000000) 80 | #define RCC_SYSCLKSource_HSE ((u32)0x00000001) 81 | #define RCC_SYSCLKSource_PLLCLK ((u32)0x00000002) 82 | 83 | #define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \ 84 | ((SOURCE) == RCC_SYSCLKSource_HSE) || \ 85 | ((SOURCE) == RCC_SYSCLKSource_PLLCLK)) 86 | 87 | /* AHB clock source */ 88 | #define RCC_SYSCLK_Div1 ((u32)0x00000000) 89 | #define RCC_SYSCLK_Div2 ((u32)0x00000080) 90 | #define RCC_SYSCLK_Div4 ((u32)0x00000090) 91 | #define RCC_SYSCLK_Div8 ((u32)0x000000A0) 92 | #define RCC_SYSCLK_Div16 ((u32)0x000000B0) 93 | #define RCC_SYSCLK_Div64 ((u32)0x000000C0) 94 | #define RCC_SYSCLK_Div128 ((u32)0x000000D0) 95 | #define RCC_SYSCLK_Div256 ((u32)0x000000E0) 96 | #define RCC_SYSCLK_Div512 ((u32)0x000000F0) 97 | 98 | #define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \ 99 | ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \ 100 | ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \ 101 | ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \ 102 | ((HCLK) == RCC_SYSCLK_Div512)) 103 | 104 | /* APB1/APB2 clock source */ 105 | #define RCC_HCLK_Div1 ((u32)0x00000000) 106 | #define RCC_HCLK_Div2 ((u32)0x00000400) 107 | #define RCC_HCLK_Div4 ((u32)0x00000500) 108 | #define RCC_HCLK_Div8 ((u32)0x00000600) 109 | #define RCC_HCLK_Div16 ((u32)0x00000700) 110 | 111 | #define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \ 112 | ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \ 113 | ((PCLK) == RCC_HCLK_Div16)) 114 | 115 | /* RCC Interrupt source */ 116 | #define RCC_IT_LSIRDY ((u8)0x01) 117 | #define RCC_IT_LSERDY ((u8)0x02) 118 | #define RCC_IT_HSIRDY ((u8)0x04) 119 | #define RCC_IT_HSERDY ((u8)0x08) 120 | #define RCC_IT_PLLRDY ((u8)0x10) 121 | #define RCC_IT_CSS ((u8)0x80) 122 | 123 | #define IS_RCC_IT(IT) ((((IT) & (u8)0xE0) == 0x00) && ((IT) != 0x00)) 124 | #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ 125 | ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ 126 | ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS)) 127 | #define IS_RCC_CLEAR_IT(IT) ((((IT) & (u8)0x60) == 0x00) && ((IT) != 0x00)) 128 | 129 | /* USB clock source */ 130 | #define RCC_USBCLKSource_PLLCLK_1Div5 ((u8)0x00) 131 | #define RCC_USBCLKSource_PLLCLK_Div1 ((u8)0x01) 132 | 133 | #define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \ 134 | ((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1)) 135 | 136 | /* ADC clock source */ 137 | #define RCC_PCLK2_Div2 ((u32)0x00000000) 138 | #define RCC_PCLK2_Div4 ((u32)0x00004000) 139 | #define RCC_PCLK2_Div6 ((u32)0x00008000) 140 | #define RCC_PCLK2_Div8 ((u32)0x0000C000) 141 | 142 | #define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \ 143 | ((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8)) 144 | 145 | /* LSE configuration */ 146 | #define RCC_LSE_OFF ((u8)0x00) 147 | #define RCC_LSE_ON ((u8)0x01) 148 | #define RCC_LSE_Bypass ((u8)0x04) 149 | 150 | #define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \ 151 | ((LSE) == RCC_LSE_Bypass)) 152 | 153 | /* RTC clock source */ 154 | #define RCC_RTCCLKSource_LSE ((u32)0x00000100) 155 | #define RCC_RTCCLKSource_LSI ((u32)0x00000200) 156 | #define RCC_RTCCLKSource_HSE_Div128 ((u32)0x00000300) 157 | 158 | #define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \ 159 | ((SOURCE) == RCC_RTCCLKSource_LSI) || \ 160 | ((SOURCE) == RCC_RTCCLKSource_HSE_Div128)) 161 | 162 | /* AHB peripheral */ 163 | #define RCC_AHBPeriph_DMA1 ((u32)0x00000001) 164 | #define RCC_AHBPeriph_DMA2 ((u32)0x00000002) 165 | #define RCC_AHBPeriph_SRAM ((u32)0x00000004) 166 | #define RCC_AHBPeriph_FLITF ((u32)0x00000010) 167 | #define RCC_AHBPeriph_CRC ((u32)0x00000040) 168 | #define RCC_AHBPeriph_FSMC ((u32)0x00000100) 169 | #define RCC_AHBPeriph_SDIO ((u32)0x00000400) 170 | 171 | #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00)) 172 | 173 | /* APB2 peripheral */ 174 | #define RCC_APB2Periph_AFIO ((u32)0x00000001) 175 | #define RCC_APB2Periph_GPIOA ((u32)0x00000004) 176 | #define RCC_APB2Periph_GPIOB ((u32)0x00000008) 177 | #define RCC_APB2Periph_GPIOC ((u32)0x00000010) 178 | #define RCC_APB2Periph_GPIOD ((u32)0x00000020) 179 | #define RCC_APB2Periph_GPIOE ((u32)0x00000040) 180 | #define RCC_APB2Periph_GPIOF ((u32)0x00000080) 181 | #define RCC_APB2Periph_GPIOG ((u32)0x00000100) 182 | #define RCC_APB2Periph_ADC1 ((u32)0x00000200) 183 | #define RCC_APB2Periph_ADC2 ((u32)0x00000400) 184 | #define RCC_APB2Periph_TIM1 ((u32)0x00000800) 185 | #define RCC_APB2Periph_SPI1 ((u32)0x00001000) 186 | #define RCC_APB2Periph_TIM8 ((u32)0x00002000) 187 | #define RCC_APB2Periph_USART1 ((u32)0x00004000) 188 | #define RCC_APB2Periph_ADC3 ((u32)0x00008000) 189 | #define RCC_APB2Periph_ALL ((u32)0x0000FFFD) 190 | 191 | #define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFFF0002) == 0x00) && ((PERIPH) != 0x00)) 192 | 193 | /* APB1 peripheral */ 194 | #define RCC_APB1Periph_TIM2 ((u32)0x00000001) 195 | #define RCC_APB1Periph_TIM3 ((u32)0x00000002) 196 | #define RCC_APB1Periph_TIM4 ((u32)0x00000004) 197 | #define RCC_APB1Periph_TIM5 ((u32)0x00000008) 198 | #define RCC_APB1Periph_TIM6 ((u32)0x00000010) 199 | #define RCC_APB1Periph_TIM7 ((u32)0x00000020) 200 | #define RCC_APB1Periph_WWDG ((u32)0x00000800) 201 | #define RCC_APB1Periph_SPI2 ((u32)0x00004000) 202 | #define RCC_APB1Periph_SPI3 ((u32)0x00008000) 203 | #define RCC_APB1Periph_USART2 ((u32)0x00020000) 204 | #define RCC_APB1Periph_USART3 ((u32)0x00040000) 205 | #define RCC_APB1Periph_UART4 ((u32)0x00080000) 206 | #define RCC_APB1Periph_UART5 ((u32)0x00100000) 207 | #define RCC_APB1Periph_I2C1 ((u32)0x00200000) 208 | #define RCC_APB1Periph_I2C2 ((u32)0x00400000) 209 | #define RCC_APB1Periph_USB ((u32)0x00800000) 210 | #define RCC_APB1Periph_CAN ((u32)0x02000000) 211 | #define RCC_APB1Periph_BKP ((u32)0x08000000) 212 | #define RCC_APB1Periph_PWR ((u32)0x10000000) 213 | #define RCC_APB1Periph_DAC ((u32)0x20000000) 214 | #define RCC_APB1Periph_ALL ((u32)0x3AFEC83F) 215 | 216 | #define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0xC50137C0) == 0x00) && ((PERIPH) != 0x00)) 217 | 218 | /* Clock source to output on MCO pin */ 219 | #define RCC_MCO_NoClock ((u8)0x00) 220 | #define RCC_MCO_SYSCLK ((u8)0x04) 221 | #define RCC_MCO_HSI ((u8)0x05) 222 | #define RCC_MCO_HSE ((u8)0x06) 223 | #define RCC_MCO_PLLCLK_Div2 ((u8)0x07) 224 | 225 | #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \ 226 | ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \ 227 | ((MCO) == RCC_MCO_PLLCLK_Div2)) 228 | 229 | /* RCC Flag */ 230 | #define RCC_FLAG_HSIRDY ((u8)0x21) 231 | #define RCC_FLAG_HSERDY ((u8)0x31) 232 | #define RCC_FLAG_PLLRDY ((u8)0x39) 233 | #define RCC_FLAG_LSERDY ((u8)0x41) 234 | #define RCC_FLAG_LSIRDY ((u8)0x61) 235 | #define RCC_FLAG_PINRST ((u8)0x7A) 236 | #define RCC_FLAG_PORRST ((u8)0x7B) 237 | #define RCC_FLAG_SFTRST ((u8)0x7C) 238 | #define RCC_FLAG_IWDGRST ((u8)0x7D) 239 | #define RCC_FLAG_WWDGRST ((u8)0x7E) 240 | #define RCC_FLAG_LPWRRST ((u8)0x7F) 241 | 242 | #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ 243 | ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \ 244 | ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \ 245 | ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \ 246 | ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \ 247 | ((FLAG) == RCC_FLAG_LPWRRST)) 248 | 249 | #define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F) 250 | 251 | /* Exported macro ------------------------------------------------------------*/ 252 | /* Exported functions ------------------------------------------------------- */ 253 | void RCC_DeInit(void); 254 | void RCC_HSEConfig(u32 RCC_HSE); 255 | ErrorStatus RCC_WaitForHSEStartUp(void); 256 | void RCC_AdjustHSICalibrationValue(u8 HSICalibrationValue); 257 | void RCC_HSICmd(FunctionalState NewState); 258 | void RCC_PLLConfig(u32 RCC_PLLSource, u32 RCC_PLLMul); 259 | void RCC_PLLCmd(FunctionalState NewState); 260 | void RCC_SYSCLKConfig(u32 RCC_SYSCLKSource); 261 | u8 RCC_GetSYSCLKSource(void); 262 | void RCC_HCLKConfig(u32 RCC_SYSCLK); 263 | void RCC_PCLK1Config(u32 RCC_HCLK); 264 | void RCC_PCLK2Config(u32 RCC_HCLK); 265 | void RCC_ITConfig(u8 RCC_IT, FunctionalState NewState); 266 | void RCC_USBCLKConfig(u32 RCC_USBCLKSource); 267 | void RCC_ADCCLKConfig(u32 RCC_PCLK2); 268 | void RCC_LSEConfig(u8 RCC_LSE); 269 | void RCC_LSICmd(FunctionalState NewState); 270 | void RCC_RTCCLKConfig(u32 RCC_RTCCLKSource); 271 | void RCC_RTCCLKCmd(FunctionalState NewState); 272 | void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks); 273 | void RCC_AHBPeriphClockCmd(u32 RCC_AHBPeriph, FunctionalState NewState); 274 | void RCC_APB2PeriphClockCmd(u32 RCC_APB2Periph, FunctionalState NewState); 275 | void RCC_APB1PeriphClockCmd(u32 RCC_APB1Periph, FunctionalState NewState); 276 | void RCC_APB2PeriphResetCmd(u32 RCC_APB2Periph, FunctionalState NewState); 277 | void RCC_APB1PeriphResetCmd(u32 RCC_APB1Periph, FunctionalState NewState); 278 | void RCC_BackupResetCmd(FunctionalState NewState); 279 | void RCC_ClockSecuritySystemCmd(FunctionalState NewState); 280 | void RCC_MCOConfig(u8 RCC_MCO); 281 | FlagStatus RCC_GetFlagStatus(u8 RCC_FLAG); 282 | void RCC_ClearFlag(void); 283 | ITStatus RCC_GetITStatus(u8 RCC_IT); 284 | void RCC_ClearITPendingBit(u8 RCC_IT); 285 | 286 | #endif /* __STM32F10x_RCC_H */ 287 | 288 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ 289 | -------------------------------------------------------------------------------- /App/inc/stm32f10x_sdio.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 2 | * File Name : stm32f10x_sdio.h 3 | * Author : MCD Application Team 4 | * Version : V2.0.3 5 | * Date : 09/22/2008 6 | * Description : This file contains all the functions prototypes for the 7 | * SDIO firmware library. 8 | ******************************************************************************** 9 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 10 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 11 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 12 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 13 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 14 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 15 | *******************************************************************************/ 16 | 17 | /* Define to prevent recursive inclusion -------------------------------------*/ 18 | #ifndef __STM32F10x_SDIO_H 19 | #define __STM32F10x_SDIO_H 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f10x_map.h" 23 | 24 | /* Exported types ------------------------------------------------------------*/ 25 | typedef struct 26 | { 27 | u8 SDIO_ClockDiv; 28 | u32 SDIO_ClockEdge; 29 | u32 SDIO_ClockBypass; 30 | u32 SDIO_ClockPowerSave; 31 | u32 SDIO_BusWide; 32 | u32 SDIO_HardwareFlowControl; 33 | } SDIO_InitTypeDef; 34 | 35 | typedef struct 36 | { 37 | u32 SDIO_Argument; 38 | u32 SDIO_CmdIndex; 39 | u32 SDIO_Response; 40 | u32 SDIO_Wait; 41 | u32 SDIO_CPSM; 42 | } SDIO_CmdInitTypeDef; 43 | 44 | typedef struct 45 | { 46 | u32 SDIO_DataTimeOut; 47 | u32 SDIO_DataLength; 48 | u32 SDIO_DataBlockSize; 49 | u32 SDIO_TransferDir; 50 | u32 SDIO_TransferMode; 51 | u32 SDIO_DPSM; 52 | } SDIO_DataInitTypeDef; 53 | 54 | /* Exported constants --------------------------------------------------------*/ 55 | /* SDIO Clock Edge -----------------------------------------------------------*/ 56 | #define SDIO_ClockEdge_Rising ((u32)0x00000000) 57 | #define SDIO_ClockEdge_Falling ((u32)0x00002000) 58 | 59 | #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \ 60 | ((EDGE) == SDIO_ClockEdge_Falling)) 61 | /* SDIO Clock Bypass ----------------------------------------------------------*/ 62 | #define SDIO_ClockBypass_Disable ((u32)0x00000000) 63 | #define SDIO_ClockBypass_Enable ((u32)0x00000400) 64 | 65 | #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \ 66 | ((BYPASS) == SDIO_ClockBypass_Enable)) 67 | 68 | /* SDIO Clock Power Save ----------------------------------------------------*/ 69 | #define SDIO_ClockPowerSave_Disable ((u32)0x00000000) 70 | #define SDIO_ClockPowerSave_Enable ((u32)0x00000200) 71 | 72 | #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \ 73 | ((SAVE) == SDIO_ClockPowerSave_Enable)) 74 | 75 | /* SDIO Bus Wide -------------------------------------------------------------*/ 76 | #define SDIO_BusWide_1b ((u32)0x00000000) 77 | #define SDIO_BusWide_4b ((u32)0x00000800) 78 | #define SDIO_BusWide_8b ((u32)0x00001000) 79 | 80 | #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \ 81 | ((WIDE) == SDIO_BusWide_8b)) 82 | 83 | /* SDIO Hardware Flow Control -----------------------------------------------*/ 84 | #define SDIO_HardwareFlowControl_Disable ((u32)0x00000000) 85 | #define SDIO_HardwareFlowControl_Enable ((u32)0x00004000) 86 | 87 | #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \ 88 | ((CONTROL) == SDIO_HardwareFlowControl_Enable)) 89 | 90 | /* SDIO Power State ----------------------------------------------------------*/ 91 | #define SDIO_PowerState_OFF ((u32)0x00000000) 92 | #define SDIO_PowerState_ON ((u32)0x00000003) 93 | 94 | #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) 95 | 96 | /* SDIO Interrupt soucres ----------------------------------------------------*/ 97 | #define SDIO_IT_CCRCFAIL ((u32)0x00000001) 98 | #define SDIO_IT_DCRCFAIL ((u32)0x00000002) 99 | #define SDIO_IT_CTIMEOUT ((u32)0x00000004) 100 | #define SDIO_IT_DTIMEOUT ((u32)0x00000008) 101 | #define SDIO_IT_TXUNDERR ((u32)0x00000010) 102 | #define SDIO_IT_RXOVERR ((u32)0x00000020) 103 | #define SDIO_IT_CMDREND ((u32)0x00000040) 104 | #define SDIO_IT_CMDSENT ((u32)0x00000080) 105 | #define SDIO_IT_DATAEND ((u32)0x00000100) 106 | #define SDIO_IT_STBITERR ((u32)0x00000200) 107 | #define SDIO_IT_DBCKEND ((u32)0x00000400) 108 | #define SDIO_IT_CMDACT ((u32)0x00000800) 109 | #define SDIO_IT_TXACT ((u32)0x00001000) 110 | #define SDIO_IT_RXACT ((u32)0x00002000) 111 | #define SDIO_IT_TXFIFOHE ((u32)0x00004000) 112 | #define SDIO_IT_RXFIFOHF ((u32)0x00008000) 113 | #define SDIO_IT_TXFIFOF ((u32)0x00010000) 114 | #define SDIO_IT_RXFIFOF ((u32)0x00020000) 115 | #define SDIO_IT_TXFIFOE ((u32)0x00040000) 116 | #define SDIO_IT_RXFIFOE ((u32)0x00080000) 117 | #define SDIO_IT_TXDAVL ((u32)0x00100000) 118 | #define SDIO_IT_RXDAVL ((u32)0x00200000) 119 | #define SDIO_IT_SDIOIT ((u32)0x00400000) 120 | #define SDIO_IT_CEATAEND ((u32)0x00800000) 121 | 122 | #define IS_SDIO_IT(IT) ((((IT) & (u32)0xFF000000) == 0x00) && ((IT) != (u32)0x00)) 123 | 124 | /* SDIO Command Index -------------------------------------------------------*/ 125 | #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) 126 | 127 | /* SDIO Response Type --------------------------------------------------------*/ 128 | #define SDIO_Response_No ((u32)0x00000000) 129 | #define SDIO_Response_Short ((u32)0x00000040) 130 | #define SDIO_Response_Long ((u32)0x000000C0) 131 | 132 | #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \ 133 | ((RESPONSE) == SDIO_Response_Short) || \ 134 | ((RESPONSE) == SDIO_Response_Long)) 135 | 136 | /* SDIO Wait Interrupt State -------------------------------------------------*/ 137 | #define SDIO_Wait_No ((u32)0x00000000) /* SDIO No Wait, TimeOut is enabled */ 138 | #define SDIO_Wait_IT ((u32)0x00000100) /* SDIO Wait Interrupt Request */ 139 | #define SDIO_Wait_Pend ((u32)0x00000200) /* SDIO Wait End of transfer */ 140 | 141 | #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \ 142 | ((WAIT) == SDIO_Wait_Pend)) 143 | 144 | /* SDIO CPSM State -----------------------------------------------------------*/ 145 | #define SDIO_CPSM_Disable ((u32)0x00000000) 146 | #define SDIO_CPSM_Enable ((u32)0x00000400) 147 | 148 | #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable)) 149 | 150 | /* SDIO Response Registers ---------------------------------------------------*/ 151 | #define SDIO_RESP1 ((u32)0x00000000) 152 | #define SDIO_RESP2 ((u32)0x00000004) 153 | #define SDIO_RESP3 ((u32)0x00000008) 154 | #define SDIO_RESP4 ((u32)0x0000000C) 155 | 156 | #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \ 157 | ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) 158 | 159 | /* SDIO Data Length ----------------------------------------------------------*/ 160 | #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) 161 | 162 | /* SDIO Data Block Size ------------------------------------------------------*/ 163 | #define SDIO_DataBlockSize_1b ((u32)0x00000000) 164 | #define SDIO_DataBlockSize_2b ((u32)0x00000010) 165 | #define SDIO_DataBlockSize_4b ((u32)0x00000020) 166 | #define SDIO_DataBlockSize_8b ((u32)0x00000030) 167 | #define SDIO_DataBlockSize_16b ((u32)0x00000040) 168 | #define SDIO_DataBlockSize_32b ((u32)0x00000050) 169 | #define SDIO_DataBlockSize_64b ((u32)0x00000060) 170 | #define SDIO_DataBlockSize_128b ((u32)0x00000070) 171 | #define SDIO_DataBlockSize_256b ((u32)0x00000080) 172 | #define SDIO_DataBlockSize_512b ((u32)0x00000090) 173 | #define SDIO_DataBlockSize_1024b ((u32)0x000000A0) 174 | #define SDIO_DataBlockSize_2048b ((u32)0x000000B0) 175 | #define SDIO_DataBlockSize_4096b ((u32)0x000000C0) 176 | #define SDIO_DataBlockSize_8192b ((u32)0x000000D0) 177 | #define SDIO_DataBlockSize_16384b ((u32)0x000000E0) 178 | 179 | #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \ 180 | ((SIZE) == SDIO_DataBlockSize_2b) || \ 181 | ((SIZE) == SDIO_DataBlockSize_4b) || \ 182 | ((SIZE) == SDIO_DataBlockSize_8b) || \ 183 | ((SIZE) == SDIO_DataBlockSize_16b) || \ 184 | ((SIZE) == SDIO_DataBlockSize_32b) || \ 185 | ((SIZE) == SDIO_DataBlockSize_64b) || \ 186 | ((SIZE) == SDIO_DataBlockSize_128b) || \ 187 | ((SIZE) == SDIO_DataBlockSize_256b) || \ 188 | ((SIZE) == SDIO_DataBlockSize_512b) || \ 189 | ((SIZE) == SDIO_DataBlockSize_1024b) || \ 190 | ((SIZE) == SDIO_DataBlockSize_2048b) || \ 191 | ((SIZE) == SDIO_DataBlockSize_4096b) || \ 192 | ((SIZE) == SDIO_DataBlockSize_8192b) || \ 193 | ((SIZE) == SDIO_DataBlockSize_16384b)) 194 | 195 | /* SDIO Transfer Direction ---------------------------------------------------*/ 196 | #define SDIO_TransferDir_ToCard ((u32)0x00000000) 197 | #define SDIO_TransferDir_ToSDIO ((u32)0x00000002) 198 | 199 | #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \ 200 | ((DIR) == SDIO_TransferDir_ToSDIO)) 201 | 202 | /* SDIO Transfer Type --------------------------------------------------------*/ 203 | #define SDIO_TransferMode_Block ((u32)0x00000000) 204 | #define SDIO_TransferMode_Stream ((u32)0x00000004) 205 | 206 | #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \ 207 | ((MODE) == SDIO_TransferMode_Block)) 208 | 209 | /* SDIO DPSM State -----------------------------------------------------------*/ 210 | #define SDIO_DPSM_Disable ((u32)0x00000000) 211 | #define SDIO_DPSM_Enable ((u32)0x00000001) 212 | 213 | #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable)) 214 | 215 | /* SDIO Flags ----------------------------------------------------------------*/ 216 | #define SDIO_FLAG_CCRCFAIL ((u32)0x00000001) 217 | #define SDIO_FLAG_DCRCFAIL ((u32)0x00000002) 218 | #define SDIO_FLAG_CTIMEOUT ((u32)0x00000004) 219 | #define SDIO_FLAG_DTIMEOUT ((u32)0x00000008) 220 | #define SDIO_FLAG_TXUNDERR ((u32)0x00000010) 221 | #define SDIO_FLAG_RXOVERR ((u32)0x00000020) 222 | #define SDIO_FLAG_CMDREND ((u32)0x00000040) 223 | #define SDIO_FLAG_CMDSENT ((u32)0x00000080) 224 | #define SDIO_FLAG_DATAEND ((u32)0x00000100) 225 | #define SDIO_FLAG_STBITERR ((u32)0x00000200) 226 | #define SDIO_FLAG_DBCKEND ((u32)0x00000400) 227 | #define SDIO_FLAG_CMDACT ((u32)0x00000800) 228 | #define SDIO_FLAG_TXACT ((u32)0x00001000) 229 | #define SDIO_FLAG_RXACT ((u32)0x00002000) 230 | #define SDIO_FLAG_TXFIFOHE ((u32)0x00004000) 231 | #define SDIO_FLAG_RXFIFOHF ((u32)0x00008000) 232 | #define SDIO_FLAG_TXFIFOF ((u32)0x00010000) 233 | #define SDIO_FLAG_RXFIFOF ((u32)0x00020000) 234 | #define SDIO_FLAG_TXFIFOE ((u32)0x00040000) 235 | #define SDIO_FLAG_RXFIFOE ((u32)0x00080000) 236 | #define SDIO_FLAG_TXDAVL ((u32)0x00100000) 237 | #define SDIO_FLAG_RXDAVL ((u32)0x00200000) 238 | #define SDIO_FLAG_SDIOIT ((u32)0x00400000) 239 | #define SDIO_FLAG_CEATAEND ((u32)0x00800000) 240 | 241 | #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \ 242 | ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ 243 | ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ 244 | ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ 245 | ((FLAG) == SDIO_FLAG_TXUNDERR) || \ 246 | ((FLAG) == SDIO_FLAG_RXOVERR) || \ 247 | ((FLAG) == SDIO_FLAG_CMDREND) || \ 248 | ((FLAG) == SDIO_FLAG_CMDSENT) || \ 249 | ((FLAG) == SDIO_FLAG_DATAEND) || \ 250 | ((FLAG) == SDIO_FLAG_STBITERR) || \ 251 | ((FLAG) == SDIO_FLAG_DBCKEND) || \ 252 | ((FLAG) == SDIO_FLAG_CMDACT) || \ 253 | ((FLAG) == SDIO_FLAG_TXACT) || \ 254 | ((FLAG) == SDIO_FLAG_RXACT) || \ 255 | ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ 256 | ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ 257 | ((FLAG) == SDIO_FLAG_TXFIFOF) || \ 258 | ((FLAG) == SDIO_FLAG_RXFIFOF) || \ 259 | ((FLAG) == SDIO_FLAG_TXFIFOE) || \ 260 | ((FLAG) == SDIO_FLAG_RXFIFOE) || \ 261 | ((FLAG) == SDIO_FLAG_TXDAVL) || \ 262 | ((FLAG) == SDIO_FLAG_RXDAVL) || \ 263 | ((FLAG) == SDIO_FLAG_SDIOIT) || \ 264 | ((FLAG) == SDIO_FLAG_CEATAEND)) 265 | 266 | #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (u32)0xFF3FF800) == 0x00) && ((FLAG) != (u32)0x00)) 267 | 268 | #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \ 269 | ((IT) == SDIO_IT_DCRCFAIL) || \ 270 | ((IT) == SDIO_IT_CTIMEOUT) || \ 271 | ((IT) == SDIO_IT_DTIMEOUT) || \ 272 | ((IT) == SDIO_IT_TXUNDERR) || \ 273 | ((IT) == SDIO_IT_RXOVERR) || \ 274 | ((IT) == SDIO_IT_CMDREND) || \ 275 | ((IT) == SDIO_IT_CMDSENT) || \ 276 | ((IT) == SDIO_IT_DATAEND) || \ 277 | ((IT) == SDIO_IT_STBITERR) || \ 278 | ((IT) == SDIO_IT_DBCKEND) || \ 279 | ((IT) == SDIO_IT_CMDACT) || \ 280 | ((IT) == SDIO_IT_TXACT) || \ 281 | ((IT) == SDIO_IT_RXACT) || \ 282 | ((IT) == SDIO_IT_TXFIFOHE) || \ 283 | ((IT) == SDIO_IT_RXFIFOHF) || \ 284 | ((IT) == SDIO_IT_TXFIFOF) || \ 285 | ((IT) == SDIO_IT_RXFIFOF) || \ 286 | ((IT) == SDIO_IT_TXFIFOE) || \ 287 | ((IT) == SDIO_IT_RXFIFOE) || \ 288 | ((IT) == SDIO_IT_TXDAVL) || \ 289 | ((IT) == SDIO_IT_RXDAVL) || \ 290 | ((IT) == SDIO_IT_SDIOIT) || \ 291 | ((IT) == SDIO_IT_CEATAEND)) 292 | 293 | #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (u32)0xFF3FF800) == 0x00) && ((IT) != (u32)0x00)) 294 | 295 | /* SDIO Read Wait Mode -------------------------------------------------------*/ 296 | #define SDIO_ReadWaitMode_CLK ((u32)0x00000000) 297 | #define SDIO_ReadWaitMode_DATA2 ((u32)0x00000001) 298 | 299 | #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \ 300 | ((MODE) == SDIO_ReadWaitMode_DATA2)) 301 | 302 | /* Exported macro ------------------------------------------------------------*/ 303 | /* Exported functions ------------------------------------------------------- */ 304 | void SDIO_DeInit(void); 305 | void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct); 306 | void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct); 307 | void SDIO_ClockCmd(FunctionalState NewState); 308 | void SDIO_SetPowerState(u32 SDIO_PowerState); 309 | u32 SDIO_GetPowerState(void); 310 | void SDIO_ITConfig(u32 SDIO_IT, FunctionalState NewState); 311 | void SDIO_DMACmd(FunctionalState NewState); 312 | void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct); 313 | void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct); 314 | u8 SDIO_GetCommandResponse(void); 315 | u32 SDIO_GetResponse(u32 SDIO_RESP); 316 | void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct); 317 | void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct); 318 | u32 SDIO_GetDataCounter(void); 319 | u32 SDIO_ReadData(void); 320 | void SDIO_WriteData(u32 Data); 321 | u32 SDIO_GetFIFOCount(void); 322 | void SDIO_StartSDIOReadWait(FunctionalState NewState); 323 | void SDIO_StopSDIOReadWait(FunctionalState NewState); 324 | void SDIO_SetSDIOReadWaitMode(u32 SDIO_ReadWaitMode); 325 | void SDIO_SetSDIOOperation(FunctionalState NewState); 326 | void SDIO_SendSDIOSuspendCmd(FunctionalState NewState); 327 | void SDIO_CommandCompletionCmd(FunctionalState NewState); 328 | void SDIO_CEATAITCmd(FunctionalState NewState); 329 | void SDIO_SendCEATACmd(FunctionalState NewState); 330 | FlagStatus SDIO_GetFlagStatus(u32 SDIO_FLAG); 331 | void SDIO_ClearFlag(u32 SDIO_FLAG); 332 | ITStatus SDIO_GetITStatus(u32 SDIO_IT); 333 | void SDIO_ClearITPendingBit(u32 SDIO_IT); 334 | 335 | #endif /* __STM32F10x_SDIO_H */ 336 | 337 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ 338 | -------------------------------------------------------------------------------- /App/inc/stm32f10x_spi.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2007 STMicroelectronics ******************** 2 | * File Name : stm32f10x_spi.h 3 | * Author : MCD Application Team 4 | * Version : V1.0 5 | * Date : 10/08/2007 6 | * Description : This file contains all the functions prototypes for the 7 | * SPI firmware library. 8 | ******************************************************************************** 9 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 10 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 11 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 12 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 13 | * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 14 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 15 | *******************************************************************************/ 16 | 17 | /* Define to prevent recursive inclusion -------------------------------------*/ 18 | #ifndef __STM32F10x_SPI_H 19 | #define __STM32F10x_SPI_H 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f10x_map.h" 23 | 24 | /* Exported types ------------------------------------------------------------*/ 25 | /* SPI Init structure definition */ 26 | typedef struct 27 | { 28 | u16 SPI_Direction; 29 | u16 SPI_Mode; 30 | u16 SPI_DataSize; 31 | u16 SPI_CPOL; 32 | u16 SPI_CPHA; 33 | u16 SPI_NSS; 34 | u16 SPI_BaudRatePrescaler; 35 | u16 SPI_FirstBit; 36 | u16 SPI_CRCPolynomial; 37 | }SPI_InitTypeDef; 38 | 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* SPI data direction mode */ 41 | #define SPI_Direction_2Lines_FullDuplex ((u16)0x0000) 42 | #define SPI_Direction_2Lines_RxOnly ((u16)0x0400) 43 | #define SPI_Direction_1Line_Rx ((u16)0x8000) 44 | #define SPI_Direction_1Line_Tx ((u16)0xC000) 45 | 46 | #define IS_SPI_DIRECTION_MODE(MODE) ((MODE == SPI_Direction_2Lines_FullDuplex) || \ 47 | (MODE == SPI_Direction_2Lines_RxOnly) || \ 48 | (MODE == SPI_Direction_1Line_Rx) || \ 49 | (MODE == SPI_Direction_1Line_Tx)) 50 | 51 | /* SPI master/slave mode */ 52 | #define SPI_Mode_Master ((u16)0x0104) 53 | #define SPI_Mode_Slave ((u16)0x0000) 54 | 55 | #define IS_SPI_MODE(MODE) ((MODE == SPI_Mode_Master) || \ 56 | (MODE == SPI_Mode_Slave)) 57 | 58 | /* SPI data size */ 59 | #define SPI_DataSize_16b ((u16)0x0800) 60 | #define SPI_DataSize_8b ((u16)0x0000) 61 | 62 | #define IS_SPI_DATASIZE(DATASIZE) ((DATASIZE == SPI_DataSize_16b) || \ 63 | (DATASIZE == SPI_DataSize_8b)) 64 | 65 | /* SPI Clock Polarity */ 66 | #define SPI_CPOL_Low ((u16)0x0000) 67 | #define SPI_CPOL_High ((u16)0x0002) 68 | 69 | #define IS_SPI_CPOL(CPOL) ((CPOL == SPI_CPOL_Low) || \ 70 | (CPOL == SPI_CPOL_High)) 71 | 72 | /* SPI Clock Phase */ 73 | #define SPI_CPHA_1Edge ((u16)0x0000) 74 | #define SPI_CPHA_2Edge ((u16)0x0001) 75 | 76 | #define IS_SPI_CPHA(CPHA) ((CPHA == SPI_CPHA_1Edge) || \ 77 | (CPHA == SPI_CPHA_2Edge)) 78 | 79 | /* SPI Slave Select management */ 80 | #define SPI_NSS_Soft ((u16)0x0200) 81 | #define SPI_NSS_Hard ((u16)0x0000) 82 | 83 | #define IS_SPI_NSS(NSS) ((NSS == SPI_NSS_Soft) || \ 84 | (NSS == SPI_NSS_Hard)) 85 | 86 | /* SPI BaudRate Prescaler */ 87 | #define SPI_BaudRatePrescaler_2 ((u16)0x0000) 88 | #define SPI_BaudRatePrescaler_4 ((u16)0x0008) 89 | #define SPI_BaudRatePrescaler_8 ((u16)0x0010) 90 | #define SPI_BaudRatePrescaler_16 ((u16)0x0018) 91 | #define SPI_BaudRatePrescaler_32 ((u16)0x0020) 92 | #define SPI_BaudRatePrescaler_64 ((u16)0x0028) 93 | #define SPI_BaudRatePrescaler_128 ((u16)0x0030) 94 | #define SPI_BaudRatePrescaler_256 ((u16)0x0038) 95 | 96 | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) ((PRESCALER == SPI_BaudRatePrescaler_2) || \ 97 | (PRESCALER == SPI_BaudRatePrescaler_4) || \ 98 | (PRESCALER == SPI_BaudRatePrescaler_8) || \ 99 | (PRESCALER == SPI_BaudRatePrescaler_16) || \ 100 | (PRESCALER == SPI_BaudRatePrescaler_32) || \ 101 | (PRESCALER == SPI_BaudRatePrescaler_64) || \ 102 | (PRESCALER == SPI_BaudRatePrescaler_128) || \ 103 | (PRESCALER == SPI_BaudRatePrescaler_256)) 104 | 105 | /* SPI MSB/LSB transmission */ 106 | #define SPI_FirstBit_MSB ((u16)0x0000) 107 | #define SPI_FirstBit_LSB ((u16)0x0080) 108 | 109 | #define IS_SPI_FIRST_BIT(BIT) ((BIT == SPI_FirstBit_MSB) || \ 110 | (BIT == SPI_FirstBit_LSB)) 111 | 112 | /* SPI DMA transfer requests */ 113 | #define SPI_DMAReq_Tx ((u16)0x0002) 114 | #define SPI_DMAReq_Rx ((u16)0x0001) 115 | 116 | #define IS_SPI_DMA_REQ(REQ) (((REQ & (u16)0xFFFC) == 0x00) && (REQ != 0x00)) 117 | 118 | /* SPI NSS internal software mangement */ 119 | #define SPI_NSSInternalSoft_Set ((u16)0x0100) 120 | #define SPI_NSSInternalSoft_Reset ((u16)0xFEFF) 121 | 122 | #define IS_SPI_NSS_INTERNAL(INTERNAL) ((INTERNAL == SPI_NSSInternalSoft_Set) || \ 123 | (INTERNAL == SPI_NSSInternalSoft_Reset)) 124 | 125 | /* SPI CRC Transmit/Receive */ 126 | #define SPI_CRC_Tx ((u8)0x00) 127 | #define SPI_CRC_Rx ((u8)0x01) 128 | 129 | #define IS_SPI_CRC(CRC) ((CRC == SPI_CRC_Tx) || (CRC == SPI_CRC_Rx)) 130 | 131 | /* SPI direction transmit/receive */ 132 | #define SPI_Direction_Rx ((u16)0xBFFF) 133 | #define SPI_Direction_Tx ((u16)0x4000) 134 | 135 | #define IS_SPI_DIRECTION(DIRECTION) ((DIRECTION == SPI_Direction_Rx) || \ 136 | (DIRECTION == SPI_Direction_Tx)) 137 | 138 | /* SPI interrupts definition */ 139 | #define SPI_IT_TXE ((u8)0x71) 140 | #define SPI_IT_RXNE ((u8)0x60) 141 | #define SPI_IT_ERR ((u8)0x50) 142 | 143 | #define IS_SPI_CONFIG_IT(IT) ((IT == SPI_IT_TXE) || (IT == SPI_IT_RXNE) || \ 144 | (IT == SPI_IT_ERR)) 145 | 146 | #define SPI_IT_OVR ((u8)0x56) 147 | #define SPI_IT_MODF ((u8)0x55) 148 | #define SPI_IT_CRCERR ((u8)0x54) 149 | 150 | #define IS_SPI_CLEAR_IT(IT) ((IT == SPI_IT_OVR) || (IT == SPI_IT_MODF) || \ 151 | (IT == SPI_IT_CRCERR)) 152 | 153 | #define IS_SPI_GET_IT(IT) ((IT == SPI_IT_TXE) || (IT == SPI_IT_RXNE) || \ 154 | (IT == SPI_IT_OVR) || (IT == SPI_IT_MODF) || \ 155 | (IT == SPI_IT_CRCERR)) 156 | 157 | /* SPI flags definition */ 158 | #define SPI_FLAG_RXNE ((u16)0x0001) 159 | #define SPI_FLAG_TXE ((u16)0x0002) 160 | #define SPI_FLAG_CRCERR ((u16)0x0010) 161 | #define SPI_FLAG_MODF ((u16)0x0020) 162 | #define SPI_FLAG_OVR ((u16)0x0040) 163 | #define SPI_FLAG_BSY ((u16)0x0080) 164 | 165 | #define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG & (u16)0xFF8F) == 0x00) && (FLAG != 0x00)) 166 | #define IS_SPI_GET_FLAG(FLAG) ((FLAG == SPI_FLAG_BSY) || (FLAG == SPI_FLAG_OVR) || \ 167 | (FLAG == SPI_FLAG_MODF) || (FLAG == SPI_FLAG_CRCERR) || \ 168 | (FLAG == SPI_FLAG_TXE) || (FLAG == SPI_FLAG_RXNE)) 169 | 170 | /* SPI CRC polynomial --------------------------------------------------------*/ 171 | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (POLYNOMIAL >= 0x1) 172 | 173 | /* Exported macro ------------------------------------------------------------*/ 174 | /* Exported functions ------------------------------------------------------- */ 175 | void SPI_DeInit(SPI_TypeDef* SPIx); 176 | void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct); 177 | void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct); 178 | void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); 179 | void SPI_ITConfig(SPI_TypeDef* SPIx, u8 SPI_IT, FunctionalState NewState); 180 | void SPI_DMACmd(SPI_TypeDef* SPIx, u16 SPI_DMAReq, FunctionalState NewState); 181 | void SPI_SendData(SPI_TypeDef* SPIx, u16 Data); 182 | u16 SPI_ReceiveData(SPI_TypeDef* SPIx); 183 | void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, u16 SPI_NSSInternalSoft); 184 | void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState); 185 | void SPI_DataSizeConfig(SPI_TypeDef* SPIx, u16 SPI_DataSize); 186 | void SPI_TransmitCRC(SPI_TypeDef* SPIx); 187 | void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState); 188 | u16 SPI_GetCRC(SPI_TypeDef* SPIx, u8 SPI_CRC); 189 | u16 SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); 190 | void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, u16 SPI_Direction); 191 | FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, u16 SPI_FLAG); 192 | void SPI_ClearFlag(SPI_TypeDef* SPIx, u16 SPI_FLAG); 193 | ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, u8 SPI_IT); 194 | void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, u8 SPI_IT); 195 | 196 | #endif /*__STM32F10x_SPI_H */ 197 | 198 | /******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/ 199 | -------------------------------------------------------------------------------- /App/inc/stm32f10x_type.h: -------------------------------------------------------------------------------- 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 2 | * File Name : stm32f10x_type.h 3 | * Author : MCD Application Team 4 | * Version : V2.0.3 5 | * Date : 09/22/2008 6 | * Description : This file contains all the common data types used for the 7 | * STM32F10x firmware library. 8 | ******************************************************************************** 9 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 10 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 11 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 12 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 13 | * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 14 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 15 | *******************************************************************************/ 16 | 17 | /* Define to prevent recursive inclusion -------------------------------------*/ 18 | #ifndef __STM32F10x_TYPE_H 19 | #define __STM32F10x_TYPE_H 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | /* Exported types ------------------------------------------------------------*/ 23 | typedef signed long s32; 24 | typedef signed short s16; 25 | typedef signed char s8; 26 | 27 | typedef signed long const sc32; /* Read Only */ 28 | typedef signed short const sc16; /* Read Only */ 29 | typedef signed char const sc8; /* Read Only */ 30 | 31 | typedef volatile signed long vs32; 32 | typedef volatile signed short vs16; 33 | typedef volatile signed char vs8; 34 | 35 | typedef volatile signed long const vsc32; /* Read Only */ 36 | typedef volatile signed short const vsc16; /* Read Only */ 37 | typedef volatile signed char const vsc8; /* Read Only */ 38 | 39 | typedef unsigned long u32; 40 | typedef unsigned short u16; 41 | typedef unsigned char u8; 42 | 43 | typedef unsigned long const uc32; /* Read Only */ 44 | typedef unsigned short const uc16; /* Read Only */ 45 | typedef unsigned char const uc8; /* Read Only */ 46 | 47 | typedef volatile unsigned long vu32; 48 | typedef volatile unsigned short vu16; 49 | typedef volatile unsigned char vu8; 50 | 51 | typedef volatile unsigned long const vuc32; /* Read Only */ 52 | typedef volatile unsigned short const vuc16; /* Read Only */ 53 | typedef volatile unsigned char const vuc8; /* Read Only */ 54 | 55 | typedef enum {FALSE = 0, TRUE = !FALSE} bool; 56 | 57 | typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; 58 | 59 | typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; 60 | #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) 61 | 62 | typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; 63 | 64 | #define U8_MAX ((u8)255) 65 | #define S8_MAX ((s8)127) 66 | #define S8_MIN ((s8)-128) 67 | #define U16_MAX ((u16)65535u) 68 | #define S16_MAX ((s16)32767) 69 | #define S16_MIN ((s16)-32768) 70 | #define U32_MAX ((u32)4294967295uL) 71 | #define S32_MAX ((s32)2147483647) 72 | #define S32_MIN ((s32)-2147483648) 73 | 74 | /* Exported constants --------------------------------------------------------*/ 75 | /* Exported macro ------------------------------------------------------------*/ 76 | /* Exported functions ------------------------------------------------------- */ 77 | 78 | #endif /* __STM32F10x_TYPE_H */ 79 | 80 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ 81 | -------------------------------------------------------------------------------- /App/lds/app1.lds: -------------------------------------------------------------------------------- 1 | /* Define memory regions. */ 2 | MEMORY 3 | { 4 | rom (rx) : ORIGIN = 0x0800C000, LENGTH = 128K 5 | ram (rwx) : ORIGIN = 0x20003000, LENGTH = 36K 6 | } 7 | 8 | INCLUDE ../app/lds/main.lds 9 | -------------------------------------------------------------------------------- /App/lds/app2.lds: -------------------------------------------------------------------------------- 1 | /* Define memory regions. */ 2 | MEMORY 3 | { 4 | rom (rx) : ORIGIN = 0x08014000, LENGTH = 96K 5 | ram (rwx) : ORIGIN = 0x20003000, LENGTH = 36K 6 | } 7 | 8 | INCLUDE ../app/lds/main.lds 9 | -------------------------------------------------------------------------------- /App/lds/app3.lds: -------------------------------------------------------------------------------- 1 | /* Define memory regions. */ 2 | MEMORY 3 | { 4 | rom (rx) : ORIGIN = 0x0801C000, LENGTH = 64K 5 | ram (rwx) : ORIGIN = 0x20003000, LENGTH = 36K 6 | } 7 | 8 | INCLUDE ../app/lds/main.lds 9 | -------------------------------------------------------------------------------- /App/lds/app4.lds: -------------------------------------------------------------------------------- 1 | /* Define memory regions. */ 2 | MEMORY 3 | { 4 | rom (rx) : ORIGIN = 0x08024000, LENGTH = 32K 5 | ram (rwx) : ORIGIN = 0x20003000, LENGTH = 36K 6 | } 7 | 8 | INCLUDE ../app/lds/main.lds 9 | -------------------------------------------------------------------------------- /App/lds/main.lds: -------------------------------------------------------------------------------- 1 | _estack = ORIGIN(ram)+LENGTH(ram)-0x2000; 2 | 3 | /* Linker script for Olimex STM32-H103 eval board. 4 | * 5 | * Version: 0.1 6 | * 7 | * Copyright 2007 CodeSourcery. 8 | * 9 | * The authors hereby grant permission to use, copy, modify, distribute, 10 | * and license this software and its documentation for any purpose, provided 11 | * that existing copyright notices are retained in all copies and that this 12 | * notice is included verbatim in any distributions. No written agreement, 13 | * license, or royalty fee is required for any of the authorized uses. 14 | * Modifications to this software may be copyrighted by their authors 15 | * and need not follow the licensing terms described here, provided that 16 | * the new terms are clearly indicated on the first page of each file where 17 | * they apply. 18 | * 19 | * Modified by Olimex 20 | * 2009-04-07: Modified by Piotr Esden-Tempski 21 | */ 22 | 23 | SECTIONS 24 | { 25 | . = 0x0; /* From 0x00000000 */ 26 | 27 | .bios 0x08004200 (NOLOAD) : { 28 | BIOS.o 29 | } 30 | 31 | .isr_vector : { 32 | _vectors = .; 33 | *(.isr_vectors) /* Vector table */ 34 | } >rom 35 | 36 | .text : { 37 | *(.text*) /* Program code */ 38 | *(.rodata*) /* Read only data */ 39 | . = ALIGN(4); 40 | _etext = .; 41 | _sidata = _etext; 42 | } >rom 43 | 44 | .data : AT ( _sidata ) { 45 | _sdata = . ; 46 | *(.data*) /* Data memory */ 47 | . = ALIGN(4); 48 | _edata = .; 49 | } >ram 50 | 51 | .bss (NOLOAD) : { 52 | _sbss = .; 53 | *(.bss) /* Zero-filled run time allocate data memory */ 54 | . = ALIGN(4); 55 | _ebss = .; 56 | } >ram AT > rom 57 | } 58 | /*========== end of file ==========*/ 59 | -------------------------------------------------------------------------------- /App/src/Calibrat.c: -------------------------------------------------------------------------------- 1 | /********************* (C) COPYRIGHT 2010 e-Design Co.,Ltd. ******************** 2 | File Name : Calibrat.c 3 | Version : DS203_APP Ver 2.3x Author : bure 4 | *******************************************************************************/ 5 | #include "Interrupt.h" 6 | #include "Function.h" 7 | #include "Calibrat.h" 8 | #include "Process.h" 9 | #include "File.h" 10 | #include "BIOS.h" 11 | #include "Menu.h" 12 | 13 | char VS_STR[9][12] ={ "250-300mV", "!0.5-0.6V!","!1.0-1.2V!","!2.5-3.0V!", 14 | "!5.0-6.0V!"," !10-12V! "," !25-30V! "," !50-60V! "}; 15 | 16 | void Balance(void) 17 | { 18 | u16 i; 19 | u32 swap; 20 | 21 | __Set(STANDBY, DN); // exit the power saving state 22 | __Set(ADC_CTRL, EN ); 23 | __Set(T_BASE_PSC, X_Attr[_2uS].PSC); // T_BASE = 2uS 24 | __Set(T_BASE_ARR, X_Attr[_2uS].ARR); 25 | __Set(CH_A_COUPLE, AC); 26 | __Set(CH_B_COUPLE, AC); 27 | __Set(CH_A_OFFSET, (100+ADCoffset)); 28 | __Set(CH_B_OFFSET, (100+ADCoffset)); 29 | __Set(CH_A_RANGE, G_Attr[0].Yp_Max); // 10V/Div 30 | __Set(CH_B_RANGE, G_Attr[0].Yp_Max+1); // B channel incorporated into the A channel 31 | __Set(ADC_MODE, INTERLACE); // Set Interlace mode 32 | Update_Trig(); 33 | __Set(TRIGG_MODE, UNCONDITION); // set any trigger 34 | Delayms(2000); 35 | 36 | __Set(FIFO_CLR, W_PTR); 37 | Delayms(20); 38 | a_Avg = 2048; // centers half way up 0-1 step, makes equaly sensitive to + step added than - step added 39 | b_Avg = 2048; 40 | for(i=0; i <4096; i++){ 41 | DataBuf[i] = __Read_FIFO(); // read into the 32-bit FIFO data reading pointer +1 42 | swap=0x300; 43 | swap &= DataBuf[i]; 44 | if ((swap==0x100)||(swap==0x200)) DataBuf[i]^=0x300; //swap 2 least significant digits of chB, fixes error in FPGA programming 45 | a_Avg += (DataBuf[i] & 0xFF ); // cumulative DC average 46 | if (a_Avg < ADCoffset) a_Avg = ADCoffset; // clip at new 0 level 47 | a_Avg-=ADCoffset; 48 | b_Avg += ((DataBuf[i]>>8) & 0xFF ); 49 | if (b_Avg < ADCoffset) b_Avg = ADCoffset; // clip at new 0 level 50 | b_Avg-=ADCoffset; 51 | 52 | } 53 | Kab = (a_Avg - b_Avg)/4096; 54 | } 55 | /******************************************************************************* 56 | Calibrat : Calibrat routine 57 | *******************************************************************************/ 58 | void Calibrat(u8 Channel) 59 | { 60 | u8 Ma1[10], Mb1[10], Ma3[10], Mb3[10]; 61 | u16 Ma2[10], Mb2[10], i, j; 62 | s16 TmpA, TmpB; 63 | u8 Range, k = 0, m, Step; 64 | char n[10]; 65 | u32 swap; 66 | 67 | Key_Buffer = 0; 68 | __Set(STANDBY, DN); // exit the power saving state 69 | __Set(BACKLIGHT, 10*(Title[BK_LIGHT][CLASS].Value+1)); 70 | __Clear_Screen(BLACK); // clear the screen 71 | 72 | __Set(ADC_MODE, SEPARATE); // Set Separate mode 73 | __Set(ADC_CTRL, EN); 74 | __Set(TRIGG_MODE, UNCONDITION); // set any trigger 75 | _Status = RUN; 76 | __Set(BEEP_VOLUME, 5*(Title[VOLUME][CLASS].Value-1)); // Reload volume 77 | Beep_mS = 500; // buzzer ring 500mS 78 | Range = 0; 79 | Step = 0; 80 | m = 0; 81 | 82 | __Set(T_BASE_PSC, X_Attr[_100uS].PSC); // T_BASE = 100uS 83 | __Set(T_BASE_ARR, X_Attr[_100uS].ARR); 84 | 85 | __Set(CH_A_COUPLE, DC); 86 | __Set(CH_B_COUPLE, DC); 87 | 88 | for(j=0; j<220; j+=20){ // draw table 89 | for(i=0; i<399; i++){ 90 | __Point_SCR(i, j); 91 | __LCD_SetPixl(WHT); 92 | } 93 | } 94 | for(i=0; i<399; i++){ 95 | __Point_SCR(i, 239); 96 | __LCD_SetPixl(WHT); 97 | } 98 | __Point_SCR( 0, 0); 99 | for(j= 0; j<239; j++) __LCD_SetPixl(WHT); 100 | __Point_SCR( 44, 20); 101 | for(j=20; j<201; j++) __LCD_SetPixl(WHT); 102 | __Point_SCR( 88, 20); 103 | for(j=20; j<201; j++) __LCD_SetPixl(WHT); 104 | __Point_SCR(132, 20); 105 | for(j=20; j<201; j++) __LCD_SetPixl(WHT); 106 | __Point_SCR(200, 20); 107 | for(j=20; j<201; j++) __LCD_SetPixl(WHT); 108 | __Point_SCR(244, 20); 109 | for(j=20; j<201; j++) __LCD_SetPixl(WHT); 110 | __Point_SCR(288, 20); 111 | for(j=20; j<201; j++) __LCD_SetPixl(WHT); 112 | __Point_SCR(332, 20); 113 | for(j=20; j<201; j++) __LCD_SetPixl(WHT); 114 | __Point_SCR(398, 0); 115 | for(j= 0; j<239; j++) __LCD_SetPixl(WHT); 116 | 117 | Print_Str( 6, 185, 0x0005, PRN, "CH_A"); // display the form title bar 118 | Print_Str( 49, 185, 0x0005, PRN, "ZERO"); 119 | Print_Str( 93, 185, 0x0005, PRN, "DIFF"); 120 | Print_Str(137, 185, 0x0005, PRN, "VOLTAGE"); 121 | Print_Str(206, 185, 0x0105, PRN, "CH_B"); 122 | Print_Str(249, 185, 0x0105, PRN, "ZERO"); 123 | Print_Str(293, 185, 0x0105, PRN, "DIFF"); 124 | Print_Str(338, 185, 0x0105, PRN, "VOLTAGE"); 125 | 126 | for(i=0; i<=G_Attr[0].Yp_Max; i++){ 127 | Print_Str( 6, 166-(i*20), 0x0005, PRN, Y_Attr[i].STR); // display range 128 | Print_Str(206, 166-(i*20), 0x0105, PRN, Y_Attr[i].STR); 129 | Ma1[i] = Ka1[i]; Ma2[i] = Ka2[i]; Ma3[i] = Ka3[i]; // backup parameters before calibration 130 | Mb1[i] = Kb1[i]; Mb2[i] = Kb2[i]; Mb3[i] = Kb3[i]; 131 | } 132 | 133 | while (1){ 134 | if (__Get(USB_POWER)>0) PD_Cnt = 600; 135 | if(PD_Cnt == 0){ 136 | __Set(BACKLIGHT, 0); // turn off the backlight 137 | __Set(STANDBY, EN); // enter low power state 138 | return; 139 | } 140 | __Set(CH_A_RANGE, Range); __Set(CH_B_RANGE, Range); 141 | Delayms(20); 142 | __Set(FIFO_CLR, W_PTR); 143 | Delayms(20); 144 | a_Avg = 2048; b_Avg = 2048; 145 | for(i=0; i <4096; i++){ 146 | DataBuf[i] = __Read_FIFO(); // read into the 32-bit FIFO data 147 | swap=0x300; 148 | swap &= DataBuf[i]; 149 | if ((swap==0x100)||(swap==0x200))DataBuf[i]^=0x300; //swap 2 least significant digits of chB, fixes error in FPGA programming 150 | a_Avg += (DataBuf[i] & 0xFF ); // cumulative DC average 151 | a_Avg-=ADCoffset; 152 | b_Avg += ((DataBuf[i]>>8) & 0xFF ); 153 | b_Avg-=ADCoffset; 154 | 155 | } 156 | TmpA = Ka1[Range] +(Ka2[Range]*(a_Avg/4096)+ 512)/1024; 157 | TmpB = Kb1[Range] +(Kb2[Range]*(b_Avg/4096)+ 512)/1024; 158 | 159 | if(Blink){ 160 | Blink = 0; 161 | switch (Step){ 162 | case 0: 163 | Range = 0; 164 | __Set(CH_A_OFFSET, (((1024+Ka3[Range])*40 + 512)/1024)+ADCoffset); 165 | __Set(CH_B_OFFSET, (((1024+Kb3[Range])*40 + 512)/1024)+ADCoffset); 166 | Print_Str( 8, 216, 0x0305, PRN, " PLEASE CONNECT"); 167 | Print_Str(29*8, 216, 0x0305, PRN, "INPUT TO "); 168 | Print_Str(38*8, 216, 0x0405, PRN, "GND "); 169 | Print_Str( 8, 6, 0x0305, PRN, " PRESS KEY TO CONFIRM THE INPUT VOLTAGE "); 170 | Print_Str(10*8, 6, 0x0405, Twink, " "); 171 | if(Channel == TRACK1){ 172 | Print_Str( 23*8, 216, 0x0005, PRN, " CH_A "); 173 | for(i=0; i<=G_Attr[0].Yp_Max; i++){ 174 | Ka1[i] = 0; Ka2[i] = 1024; Ka3[i] = 0; // set calibration parameters to initial values 175 | } 176 | } 177 | if(Channel == TRACK2){ 178 | Print_Str( 23*8, 216, 0x0105, PRN, " CH_B "); 179 | for(i=0; i<=G_Attr[0].Yp_Max; i++){ 180 | Kb1[i] = 0; Kb2[i] = 1024; Kb3[i] = 0; // set calibration parameters of initial values 181 | } 182 | } 183 | break; 184 | case 1: 185 | Print_Str( 8, 6, 0x0305, PRN, " AUTOMATIC CALIBRATION IN PROGRESS... "); 186 | if(Channel == TRACK1){ 187 | s8ToPercen(n, TmpA - 40); 188 | Print_Str( 45, 166-(Range*20), 0x0005, INV, n); 189 | Ka1[Range] -= TmpA - 40; 190 | } 191 | if(Channel == TRACK2){ 192 | s8ToPercen(n, TmpB - 40); 193 | Print_Str(245, 166-(Range*20), 0x0105, INV, n); 194 | Kb1[Range] -= TmpB - 40; 195 | } 196 | Range++; 197 | if(Range > G_Attr[0].Yp_Max){ 198 | Range = 0; Step++; 199 | } 200 | __Set(CH_A_OFFSET, (((1024+Ka3[Range])*40 + 512)/1024)+ADCoffset); 201 | __Set(CH_B_OFFSET, (((1024+Kb3[Range])*40 + 512)/1024)+ADCoffset); 202 | k = 0; 203 | break; 204 | case 2: 205 | k++; 206 | if(k >= 8) k = 0; 207 | if(Channel == TRACK1){ 208 | s8ToPercen(n, TmpA - 40); 209 | Print_Str( 45, 166-(Range*20), 0x0005, PRN, n); 210 | if(TmpA - 40 != 0) Ka1[Range] -= TmpA - 40; 211 | else k = 0; 212 | } 213 | if(Channel == TRACK2){ 214 | s8ToPercen(n, TmpB - 40); 215 | Print_Str(245, 166-(Range*20), 0x0105, PRN, n); 216 | if(TmpB - 40 != 0) Kb1[Range] -= TmpB - 40; 217 | else k = 0; 218 | } 219 | if(k == 0) Range++; 220 | if(Range > G_Attr[0].Yp_Max){ 221 | Range = 0; Step++; 222 | } 223 | __Set(CH_A_OFFSET, (((1024+Ka3[Range])*40 + 512)/1024)+ADCoffset); 224 | __Set(CH_B_OFFSET, (((1024+Kb3[Range])*40 + 512)/1024)+ADCoffset); 225 | break; 226 | case 3: 227 | k++; 228 | __Set(CH_A_OFFSET, (((1024+Ka3[Range])*160 + 512)/1024)+ADCoffset); 229 | __Set(CH_B_OFFSET, (((1024+Kb3[Range])*160 + 512)/1024)+ADCoffset); 230 | if((Channel == TRACK1)&&(TmpA > 140)) Step++; 231 | if((Channel == TRACK2)&&(TmpB > 140)) Step++; 232 | if(k > 20) Step++; 233 | break; 234 | case 4: 235 | k = 0; 236 | if(Channel == TRACK1){ 237 | s8ToPercen(n, TmpA - 160); 238 | Print_Str( 89, 166-(Range*20), 0x0005, INV, n); 239 | Ka3[Range] -= (1024*(TmpA-160)+80)/160; 240 | } 241 | if(Channel == TRACK2){ 242 | s8ToPercen(n, TmpB - 160); 243 | Print_Str(289, 166-(Range*20), 0x0105, INV, n); 244 | Kb3[Range] -= (1024*(TmpB-160)+80)/160; 245 | } 246 | Range++; 247 | if(Range > G_Attr[0].Yp_Max){ 248 | Range = 0; Step++; 249 | } 250 | __Set(CH_A_OFFSET, (((1024+Ka3[Range])* 160 + 512)/1024)+ADCoffset); 251 | __Set(CH_B_OFFSET, (((1024+Kb3[Range])* 160 + 512)/1024)+ADCoffset); 252 | break; 253 | case 5: 254 | k++; 255 | if(k >= 8) k = 0; 256 | if(Channel == TRACK1){ 257 | s8ToPercen(n, TmpA - 160); 258 | Print_Str( 89, 166-(Range*20), 0x0005, PRN, n); 259 | if(TmpA - 160 != 0) Ka3[Range] -= (1024*(TmpA-160)+80)/160; 260 | else k = 0; 261 | } 262 | if(Channel == TRACK2){ 263 | s8ToPercen(n, TmpB - 160); 264 | Print_Str(289, 166-(Range*20), 0x0105, PRN, n); 265 | if(TmpB - 160 != 0) Kb3[Range] -= (1024*(TmpB-160)+80)/160; 266 | else k = 0; 267 | } 268 | if(k == 0) Range++; 269 | if(Range > G_Attr[0].Yp_Max){ 270 | Range = 0; Step++; 271 | } 272 | __Set(CH_A_OFFSET, (((1024+Ka3[Range])* 160 + 512)/1024)+ADCoffset); 273 | __Set(CH_B_OFFSET, (((1024+Kb3[Range])* 160 + 512)/1024)+ADCoffset); 274 | break; 275 | case 6: 276 | k++; 277 | if(k > 20) Step++; 278 | Range = 0; 279 | if(m < 2){ 280 | __Set(CH_A_OFFSET, (((1024+Ka3[Range])*40 + 512)/1024)+ADCoffset); 281 | __Set(CH_B_OFFSET, (((1024+Kb3[Range])*40 + 512)/1024)+ADCoffset); 282 | if((Channel == TRACK1)&&(TmpA < 50)){ 283 | Step = 1; 284 | m++; 285 | } 286 | if((Channel == TRACK2)&&(TmpB < 50)){ 287 | Step = 1; 288 | m++; 289 | } 290 | } else { 291 | __Set(CH_A_OFFSET, (((1024+Ka3[Range])* 25 + 512)/1024)+ADCoffset); 292 | __Set(CH_B_OFFSET, (((1024+Kb3[Range])* 25 + 512)/1024)+ADCoffset); 293 | if((Channel == TRACK1)&&(TmpA < 55)) Step++; 294 | if((Channel == TRACK2)&&(TmpB < 55)) Step++; 295 | } 296 | break; 297 | case 7: 298 | Print_Str( 4*8, 216, 0x0305, PRN, " INPUT "); 299 | Print_Str(11*8, 216, 0x0405, Twink, (char*)VS_STR[Range]); 300 | Print_Str(20*8, 216, 0x0305, PRN, " STANDARD VOLTAGE TO "); 301 | Print_Str( 8, 6, 0x0305, PRN, "MODIFY VOLTAGE: ... "); 302 | Print_Str(18*8, 6, 0x0405, Twink, "-"); 303 | Print_Str(22*8, 6, 0x0405, Twink, "+"); 304 | Print_Str(27*8, 6, 0x0305, PRN, "SELECT RANGE: --- "); 305 | Print_Str(42*8, 6, 0x0405, Twink, "<"); 306 | Print_Str(46*8, 6, 0x0405, Twink, ">"); 307 | if(Channel == TRACK1){ 308 | if(TmpA > 35){ 309 | Int2Str(n, (TmpA - 25)* Y_Attr[Range].SCALE, V_UNIT, 3, SIGN); 310 | } else { 311 | Int2Str(n, 0, V_UNIT, 3, SIGN); 312 | } 313 | Print_Str( 134, 166-(Range*20), 0x0005, Twink, n); 314 | Print_Str(41*8, 216, 0x0005, PRN, "CH_A "); 315 | } 316 | if(Channel == TRACK2){ 317 | if(TmpB > 35){ 318 | Int2Str(n, (TmpB - 25)* Y_Attr[Range].SCALE, V_UNIT, 3, SIGN); 319 | } else { 320 | Int2Str(n, 0, V_UNIT, 3, SIGN); 321 | } 322 | Print_Str( 334, 166-(Range*20), 0x0105, Twink, n); 323 | Print_Str(41*8, 216, 0x0105, PRN, "CH_B "); 324 | } 325 | break; 326 | case 8: //" PRESS --- TO SELECT THE NEXT OPERATION" 327 | m = 0; 328 | Print_Str( 8, 6, 0x0305, PRN, " PRESS --- "); 329 | Print_Str(12*8, 6, 0x0405, Twink, "<"); 330 | Print_Str(16*8, 6, 0x0405, Twink, ">"); 331 | Print_Str(17*8, 6, 0x0305, PRN, " TO SELECT THE NEXT OPERATION "); 332 | Print_Str( 8, 216, 0x0305, PRN, " PRESS TO "); 333 | Print_Str(14*8, 216, 0x0405, PRN, "CONFIRM THE RE-CALIBRATION "); 334 | Print_Str( 9*8, 216, 0x0405, Twink, " "); 335 | if(Channel == TRACK1) Print_Str(41*8, 216, 0x0005, PRN, "CH_A "); 336 | if(Channel == TRACK2) Print_Str(41*8, 216, 0x0105, PRN, "CH_B "); 337 | break; //" PRESS TO CONFIRM THE RE-CALIBRATION CH_A " 338 | case 9: // "SELECT THE CALIBRATION CH_A " 339 | Print_Str( 9*8, 216, 0x0405, Twink, " "); 340 | Print_Str(14*8, 216, 0x0405, PRN, "SELECT THE CALIBRATION "); 341 | if(Channel == TRACK1) Print_Str(37*8, 216, 0x0105, PRN, "CH_B "); 342 | if(Channel == TRACK2) Print_Str(37*8, 216, 0x0005, PRN, "CH_A "); 343 | break; 344 | case 10: // "Exit WITHOUT SAVING RESULTS " 345 | Print_Str( 9*8, 216, 0x0405, Twink, " "); 346 | Print_Str(14*8, 216, 0x0405, PRN, "Exit WITHOUT SAVE RESULTS "); 347 | break; 348 | case 11: // "Exit AND SAVE CALIBRATION RESULTS" 349 | Print_Str( 9*8, 216, 0x0405, Twink, " "); 350 | Print_Str(14*8, 216, 0x0405, PRN, "Exit AND SAVE CALIBRATION RESULTS"); 351 | break; 352 | case 12: // "Exit AND RESTORE SYSTEM DEFAULTS " 353 | Print_Str( 9*8, 216, 0x0405, Twink, " "); 354 | Print_Str(14*8, 216, 0x0405, PRN, "Exit AND RESTORE SYSTEM DEFAULTS "); 355 | break; 356 | } 357 | } 358 | if(Key_Buffer){ 359 | PD_Cnt = 600; // reset the waiting timer to 600 seconds 360 | if((Range <= G_Attr[0].Yp_Max)&&(Step == 7)){ 361 | if(Channel == TRACK1){ 362 | Print_Str(134, 166-(Range*20), 0x0005, PRN, n); 363 | } 364 | if(Channel == TRACK2){ 365 | Print_Str(334, 166-(Range*20), 0x0105, PRN, n); 366 | } 367 | } 368 | switch (Key_Buffer){ 369 | case KEY2: 370 | if(Step == 0) Step++; 371 | if((Step == 8)||(Step == 9)){ 372 | if(Step == 9) Channel = 1 - Channel; 373 | for(i=0; i<=G_Attr[0].Yp_Max; i++){ 374 | if(Channel == TRACK1){ 375 | Print_Str( 45, 166-(i*20), 0x0005, PRN, " "); 376 | Print_Str( 89, 166-(i*20), 0x0005, PRN, " "); 377 | Print_Str(134, 166-(i*20), 0x0005, PRN, " "); 378 | } 379 | if(Channel == TRACK2){ 380 | Print_Str(245, 166-(i*20), 0x0105, PRN, " "); 381 | Print_Str(289, 166-(i*20), 0x0105, PRN, " "); 382 | Print_Str(334, 166-(i*20), 0x0105, PRN, " "); 383 | } 384 | } 385 | Step = 0;; 386 | } 387 | if(Step >= 10){ 388 | if(Step == 10){ 389 | for(i=0; i<=G_Attr[0].Yp_Max; i++){ 390 | Ka1[i] = Ma1[i]; Ka2[i] = Ma2[i]; Ka3[i] = Ma3[i]; 391 | Kb1[i] = Mb1[i]; Kb2[i] = Mb2[i]; Kb3[i] = Mb3[i]; 392 | } 393 | Save_Param(); // do not save the calibration parameters 394 | Print_Str( 8, 216, 0x0405, PRN, " "); 395 | } 396 | if(Step == 11){ 397 | Save_Param(); // save parameters after correction 398 | Print_Str( 8, 216, 0x0405, PRN, " SAVING THE CALIBRATION DATA "); 399 | } 400 | if(Step == 12){ 401 | for(i=0; i<=G_Attr[0].Yp_Max; i++){ 402 | Ka1[i] = 0; Ka2[i] = 1024; Ka3[i] = 0; // set the calibration parameters to their initial values 403 | Kb1[i] = 0; Kb2[i] = 1024; Kb3[i] = 0; 404 | } 405 | Save_Param(); // clear the calibration parameters, save the default values 406 | Print_Str( 8, 216, 0x0405, PRN, " RESTORE DEFAULT CALIBRATION DATA "); 407 | } 408 | Delayms(1000); 409 | App_init(); 410 | return; 411 | } 412 | break; 413 | case KEY3: 414 | break; 415 | case K_ITEM_DEC: 416 | if((Step == 7)&&(Range > 0)) Range--; 417 | if( Step >= 9) Step--; 418 | if( Step == 8) Step = 12; 419 | break; 420 | case K_ITEM_INC: 421 | if(Step >= 8) Step++; 422 | if(Step > 12) Step = 8; 423 | if(Step == 7) Range++; 424 | if(Range > G_Attr[0].Yp_Max){ 425 | Range = 0; 426 | Step++; 427 | } 428 | break; 429 | case K_INDEX_DEC: 430 | if(Step == 7){ 431 | if((Channel == TRACK1)&&(TmpA > 35)) Ka2[Range] -= 2; 432 | if((Channel == TRACK2)&&(TmpB > 35)) Kb2[Range] -= 2; 433 | } 434 | break; 435 | case K_INDEX_INC: 436 | if(Step == 7){ 437 | if((Channel == TRACK1)&&(TmpA > 35)) Ka2[Range] += 2; 438 | if((Channel == TRACK2)&&(TmpB > 35)) Kb2[Range] += 2; 439 | } 440 | break; 441 | } 442 | Key_Buffer = 0; 443 | } 444 | } 445 | } 446 | /********************************* END OF FILE ******************************/ 447 | -------------------------------------------------------------------------------- /App/src/Calibrat.h: -------------------------------------------------------------------------------- 1 | /********************* (C) COPYRIGHT 2010 e-Design Co.,Ltd. ******************** 2 | File Name : Calibrat.h 3 | Version : DS203_APP Ver 2.3x Author : bure 4 | *******************************************************************************/ 5 | #ifndef __CALIBRAT_H 6 | #define __CALIBRAT_H 7 | 8 | #include "stm32f10x_lib.h" 9 | 10 | #define _100uS 12 // T_BASE = 100uS/Div 11 | #define _2uS 17 // T_BASE = 2uS/Div 12 | 13 | void Balance(void); 14 | void Calibrat(u8 Channel); 15 | 16 | 17 | 18 | #endif 19 | 20 | /******************************* END OF FILE ********************************/ 21 | -------------------------------------------------------------------------------- /App/src/Draw.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pmos69/dso203_gcc/c78c0dc5c1abf9648c31c2e145fbec6ade8c5f03/App/src/Draw.h -------------------------------------------------------------------------------- /App/src/File.h: -------------------------------------------------------------------------------- 1 | /********************* (C) COPYRIGHT 2010 e-Design Co.,Ltd. ******************** 2 | File Name : file.h 3 | Version : DS203_APP Ver 2.5x Author : bure 4 | *******************************************************************************/ 5 | #ifndef __FILE_H 6 | #define __FILE_H 7 | 8 | #include "stm32f10x_lib.h" 9 | 10 | // #define FLASH_WAIT_TIMEOUT 100000 11 | // #define PAGE_0 0 12 | // #define PAGE_1 1 13 | // #define PAGE_2 2 14 | // #define PAGE_3 3 15 | 16 | #define OK 0 // operation is completed 17 | // #define SEC_ERR 1 // sectors read and write errors 18 | // #define FAT_ERR 2 // FAT table to read and write errors 19 | #define OVER 3 // operations overflow 20 | #define NEW 4 // new directory entry 21 | #define EMPT 4 // file does not exist 22 | #define VER_ERR 5 // wrong version 23 | #define SUM_ERR 6 // checksum error 24 | #define RD_ERR 8 // sectors read error 25 | #define WR_ERR 9 // sector write error 26 | #define DISK_ERR 10 // disk error 27 | 28 | extern u8 FileBuff[1600]; 29 | 30 | u8 Save_Bmp(u8 FileNum); 31 | u8 Color_Num(u16 Color); 32 | u8 Load_Param(void); 33 | u8 Save_Param(void); 34 | u8 Save_Dat(u8 FileNum); 35 | u8 Load_Dat(u8 FileNum); 36 | u8 Save_Buf(u8 FileNum); 37 | u8 Load_Buf(u8 FileNum); 38 | u8 Save_Csv(u8 FileNum); 39 | u8 Make_Filename(u8 FileNum,char* FileName); 40 | void reset_parameter(void); 41 | #endif 42 | /********************************* END OF FILE ********************************/ 43 | -------------------------------------------------------------------------------- /App/src/Files.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pmos69/dso203_gcc/c78c0dc5c1abf9648c31c2e145fbec6ade8c5f03/App/src/Files.c -------------------------------------------------------------------------------- /App/src/Function.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pmos69/dso203_gcc/c78c0dc5c1abf9648c31c2e145fbec6ade8c5f03/App/src/Function.c -------------------------------------------------------------------------------- /App/src/Function.h: -------------------------------------------------------------------------------- 1 | /********************* (C) COPYRIGHT 2010 e-Design Co.,Ltd. ******************** 2 | File Name : Function.h 3 | Version : DS203_APP Ver 2.3x Author : bure 4 | *******************************************************************************/ 5 | #ifndef __Function_H__ 6 | #define __Function_H__ 7 | 8 | #include "stm32f10x_lib.h" 9 | 10 | #define NO_KEY 0 11 | #define KEY1 1 12 | #define KEY2 2 13 | #define KEY3 3 14 | #define KEY4 4 15 | #define K_INDEX_DEC 5 16 | #define K_INDEX_INC 6 17 | #define K_INDEX_S 7 18 | #define K_ITEM_INC 8 19 | #define K_ITEM_DEC 9 20 | #define K_ITEM_S 10 21 | 22 | #define SIGN 0 23 | #define UNSIGN 1 24 | #define STD 2 25 | 26 | #define PI 3.14159265358979 27 | 28 | // extern u32 TestCnt; 29 | 30 | u32 Power(u8 x, u8 y); 31 | void Delayms(u16 mS); 32 | void Int2Str(char *p, long n, char *pUnit, u8 e, u8 Mode); 33 | u8 Str2Byte(char x,char y); 34 | void u16ToDec5(char *p, u16 n); 35 | void u8ToDec3(char *p, u8 n); 36 | void u8ToDec2(char *p, u8 n); 37 | void Char2Hex(char *p, u8 n); 38 | void Shor2Hex(char *p, u16 n); 39 | void Word2Hex(char *p, u32 n); 40 | u32 Int_sqrt(u32 n); 41 | u8 Read_Keys(void); 42 | void s8ToPercen(char *p, s8 n); 43 | char * long2str(long val); 44 | double cosine(double radians); 45 | 46 | #define N_WAVE 512 // full length of Sinewave[] 47 | #define LOG2_N_WAVE 9 // log2(N_WAVE) 48 | 49 | #define FFTSize 512 50 | #define FFTBins 256 51 | #define LOG2_FFTSize 9 52 | 53 | extern void fix_fft(short fr[], short fi[], short m); 54 | 55 | #endif 56 | /********************************* END OF FILE ********************************/ 57 | -------------------------------------------------------------------------------- /App/src/Interrupt.c: -------------------------------------------------------------------------------- 1 | /********************* (C) COPYRIGHT 2010 e-Design Co.,Ltd. ******************** 2 | File Name : Interrupt.c 3 | Version : DS203_APP Ver 2.3x Author : bure 4 | *******************************************************************************/ 5 | #include "Interrupt.h" 6 | #include "Function.h" 7 | #include "Menu.h" 8 | #include "BIOS.h" 9 | 10 | vu8 Cursor_Cnt, Key_Wait_Cnt, Key_Repeat_Cnt, Key_Buffer, Cnt_mS, Cnt_20mS; 11 | vu8 Twink, Blink; 12 | // u8 Volume=20, Light; 13 | vu16 Delay_Cnt, Beep_mS, Key_Status_Last, Sec_Cnt, PD_Cnt, TimedDeltaView ; 14 | vu32 Wait_Cnt; 15 | 16 | void NMIException(void) 17 | {} 18 | 19 | void HardFaultException(void) 20 | { 21 | while (1) {} 22 | } 23 | 24 | void MemManageException(void) 25 | { 26 | while (1) {} 27 | } 28 | 29 | void BusFaultException(void) 30 | { 31 | while (1) {} 32 | } 33 | void UsageFaultException(void) 34 | { 35 | while (1) {} 36 | } 37 | 38 | void DebugMonitor(void) 39 | {} 40 | 41 | void SVCHandler(void) 42 | {} 43 | 44 | void PendSVC(void) 45 | {} 46 | 47 | void SysTickHandler(void) 48 | {} 49 | 50 | void WWDG_IRQHandler(void) 51 | {} 52 | 53 | void PVD_IRQHandler(void) 54 | {} 55 | 56 | void TAMPER_IRQHandler(void) 57 | {} 58 | 59 | void RTC_IRQHandler(void) 60 | {} 61 | 62 | void FLASH_IRQHandler(void) 63 | {} 64 | 65 | void RCC_IRQHandler(void) 66 | {} 67 | 68 | void EXTI0_IRQHandler(void) 69 | {} 70 | 71 | void EXTI1_IRQHandler(void) 72 | {} 73 | 74 | void EXTI2_IRQHandler(void) 75 | {} 76 | 77 | void EXTI3_IRQHandler(void) 78 | {} 79 | 80 | void EXTI4_IRQHandler(void) 81 | {} 82 | 83 | void DMA1_Channel1_IRQHandler(void) 84 | {} 85 | 86 | void DMA1_Channel2_IRQHandler(void) 87 | {} 88 | 89 | void DMA1_Channel3_IRQHandler(void) 90 | {} 91 | 92 | void DMA1_Channel4_IRQHandler(void) 93 | {} 94 | 95 | void DMA1_Channel5_IRQHandler(void) 96 | {} 97 | 98 | void DMA1_Channel6_IRQHandler(void) 99 | {} 100 | 101 | void DMA1_Channel7_IRQHandler(void) 102 | {} 103 | 104 | void ADC1_2_IRQHandler(void) 105 | {} 106 | 107 | void USB_HP_CAN_TX_IRQHandler(void) 108 | { 109 | __CTR_HP(); 110 | } 111 | 112 | void USB_LP_CAN_RX0_IRQHandler(void) 113 | { 114 | __USB_Istr(); 115 | } 116 | 117 | void CAN_RX1_IRQHandler(void) 118 | {} 119 | 120 | void CAN_SCE_IRQHandler(void) 121 | {} 122 | 123 | void EXTI9_5_IRQHandler(void) 124 | {} 125 | 126 | void TIM1_BRK_IRQHandler(void) 127 | {} 128 | 129 | void TIM1_UP_IRQHandler(void) 130 | {} 131 | 132 | void TIM1_TRG_COM_IRQHandler(void) 133 | {} 134 | 135 | void TIM1_CC_IRQHandler(void) 136 | {} 137 | 138 | void TIM2_IRQHandler(void) 139 | {} 140 | 141 | void TIM3_IRQHandler(void) 142 | { 143 | u8 KeyCode; 144 | __Set(KEY_IF_RST, 0); //Clear TIM3 interrupt flag 145 | if(Cnt_mS > 0) Cnt_mS--; 146 | else { //Read keys per 20mS 147 | Cnt_mS =20; 148 | if(Wait_Cnt >0) Wait_Cnt--; 149 | if(Delay_Cnt >20) Delay_Cnt -= 20; 150 | else Delay_Cnt = 0; 151 | if(Beep_mS >=20) Beep_mS -= 20; 152 | else __Set(BEEP_VOLUME, 0); // Beep off 153 | if(Cnt_20mS < 50) Cnt_20mS++; 154 | else { // Do it pre sec. 155 | Cnt_20mS = 0; 156 | __Set(BETTERY_DT, 1); //Battery Detect 157 | Sec_Cnt++; 158 | if(PD_Cnt > 0) PD_Cnt--; 159 | } 160 | Cursor_Cnt++; 161 | if(Cursor_Cnt >= 15) { //12*20mS=240mS 162 | Cursor_Cnt=0; 163 | Twink=!Twink; 164 | Blink = BLINK; 165 | } 166 | 167 | if(TimedDeltaView > 0) TimedDeltaView--; 168 | 169 | if(Key_Wait_Cnt) Key_Wait_Cnt--; 170 | if(Key_Repeat_Cnt) Key_Repeat_Cnt--; 171 | KeyCode=Read_Keys(); 172 | if(KeyCode !=0) { 173 | Key_Buffer = KeyCode; 174 | __Set(BEEP_VOLUME, 5*(Title[VOLUME][CLASS].Value-1));// Volume 175 | Beep_mS = 60; 176 | } 177 | } 178 | } 179 | 180 | void TIM4_IRQHandler(void) 181 | {} 182 | 183 | void I2C1_EV_IRQHandler(void) 184 | {} 185 | 186 | void I2C1_ER_IRQHandler(void) 187 | {} 188 | 189 | void I2C2_EV_IRQHandler(void) 190 | {} 191 | 192 | void I2C2_ER_IRQHandler(void) 193 | {} 194 | 195 | void SPI1_IRQHandler(void) 196 | {} 197 | 198 | void SPI2_IRQHandler(void) 199 | {} 200 | 201 | void USART1_IRQHandler(void) 202 | {} 203 | 204 | void USART2_IRQHandler(void) 205 | {} 206 | 207 | void USART3_IRQHandler(void) 208 | {} 209 | 210 | void EXTI15_10_IRQHandler(void) 211 | {} 212 | 213 | void RTCAlarm_IRQHandler(void) 214 | {} 215 | 216 | void USBWakeUp_IRQHandler(void) 217 | {} 218 | /******************************************************************************* 219 | * Function Name : TIM8_BRK_IRQHandler 220 | * Description : This function handles TIM8 Break interrupt request. 221 | * Input : None 222 | * Output : None 223 | * Return : None 224 | *******************************************************************************/ 225 | void TIM8_BRK_IRQHandler(void) 226 | {} 227 | 228 | /******************************************************************************* 229 | * Function Name : TIM8_UP_IRQHandler 230 | * Description : This function handles TIM8 overflow and update interrupt 231 | * request. 232 | * Input : None 233 | * Output : None 234 | * Return : None 235 | *******************************************************************************/ 236 | void TIM8_UP_IRQHandler(void) 237 | {} 238 | 239 | /******************************************************************************* 240 | * Function Name : TIM8_TRG_COM_IRQHandler 241 | * Description : This function handles TIM8 Trigger and commutation interrupts 242 | * requests. 243 | * Input : None 244 | * Output : None 245 | * Return : None 246 | *******************************************************************************/ 247 | void TIM8_TRG_COM_IRQHandler(void) 248 | {} 249 | 250 | /******************************************************************************* 251 | * Function Name : TIM8_CC_IRQHandler 252 | * Description : This function handles TIM8 capture compare interrupt request. 253 | * Input : None 254 | * Output : None 255 | * Return : None 256 | *******************************************************************************/ 257 | void TIM8_CC_IRQHandler(void) 258 | {} 259 | 260 | /******************************************************************************* 261 | * Function Name : ADC3_IRQHandler 262 | * Description : This function handles ADC3 global interrupt request. 263 | * Input : None 264 | * Output : None 265 | * Return : None 266 | *******************************************************************************/ 267 | void ADC3_IRQHandler(void) 268 | {} 269 | 270 | /******************************************************************************* 271 | * Function Name : FSMC_IRQHandler 272 | * Description : This function handles FSMC global interrupt request. 273 | * Input : None 274 | * Output : None 275 | * Return : None 276 | *******************************************************************************/ 277 | void FSMC_IRQHandler(void) 278 | {} 279 | 280 | /******************************************************************************* 281 | * Function Name : SDIO_IRQHandler 282 | * Description : This function handles SDIO global interrupt request. 283 | * Input : None 284 | * Output : None 285 | * Return : None 286 | *******************************************************************************/ 287 | void SDIO_IRQHandler(void) 288 | { 289 | /* Process All SDIO Interrupt Sources */ 290 | // SD_ProcessIRQSrc(); 291 | 292 | } 293 | 294 | /******************************************************************************* 295 | * Function Name : TIM5_IRQHandler 296 | * Description : This function handles TIM5 global interrupt request. 297 | * Input : None 298 | * Output : None 299 | * Return : None 300 | *******************************************************************************/ 301 | void TIM5_IRQHandler(void) 302 | {} 303 | 304 | /******************************************************************************* 305 | * Function Name : SPI3_IRQHandler 306 | * Description : This function handles SPI3 global interrupt request. 307 | * Input : None 308 | * Output : None 309 | * Return : None 310 | *******************************************************************************/ 311 | void SPI3_IRQHandler(void) 312 | {} 313 | 314 | /******************************************************************************* 315 | * Function Name : UART4_IRQHandler 316 | * Description : This function handles UART4 global interrupt request. 317 | * Input : None 318 | * Output : None 319 | * Return : None 320 | *******************************************************************************/ 321 | void UART4_IRQHandler(void) 322 | {} 323 | 324 | /******************************************************************************* 325 | * Function Name : UART5_IRQHandler 326 | * Description : This function handles UART5 global interrupt request. 327 | * Input : None 328 | * Output : None 329 | * Return : None 330 | *******************************************************************************/ 331 | void UART5_IRQHandler(void) 332 | {} 333 | 334 | /******************************************************************************* 335 | * Function Name : TIM6_IRQHandler 336 | * Description : This function handles TIM6 global interrupt request. 337 | * Input : None 338 | * Output : None 339 | * Return : None 340 | *******************************************************************************/ 341 | void TIM6_IRQHandler(void) 342 | {} 343 | 344 | /******************************************************************************* 345 | * Function Name : TIM7_IRQHandler 346 | * Description : This function handles TIM7 global interrupt request. 347 | * Input : None 348 | * Output : None 349 | * Return : None 350 | *******************************************************************************/ 351 | void TIM7_IRQHandler(void) 352 | {} 353 | 354 | /******************************************************************************* 355 | * Function Name : DMA2_Channel1_IRQHandler 356 | * Description : This function handles DMA2 Channel 1 interrupt request. 357 | * Input : None 358 | * Output : None 359 | * Return : None 360 | *******************************************************************************/ 361 | void DMA2_Channel1_IRQHandler(void) 362 | {} 363 | 364 | /******************************************************************************* 365 | * Function Name : DMA2_Channel2_IRQHandler 366 | * Description : This function handles DMA2 Channel 2 interrupt request. 367 | * Input : None 368 | * Output : None 369 | * Return : None 370 | *******************************************************************************/ 371 | void DMA2_Channel2_IRQHandler(void) 372 | {} 373 | 374 | /******************************************************************************* 375 | * Function Name : DMA2_Channel3_IRQHandler 376 | * Description : This function handles DMA2 Channel 3 interrupt request. 377 | * Input : None 378 | * Output : None 379 | * Return : None 380 | *******************************************************************************/ 381 | void DMA2_Channel3_IRQHandler(void) 382 | {} 383 | 384 | /******************************************************************************* 385 | * Function Name : DMA2_Channel4_5_IRQHandler 386 | * Description : This function handles DMA2 Channel 4 and DMA2 Channel 5 387 | * interrupt request. 388 | * Input : None 389 | * Output : None 390 | * Return : None 391 | *******************************************************************************/ 392 | void DMA2_Channel4_5_IRQHandler(void) 393 | {} 394 | 395 | /********************************* END OF FILE ********************************/ 396 | -------------------------------------------------------------------------------- /App/src/Interrupt.h: -------------------------------------------------------------------------------- 1 | /********************* (C) COPYRIGHT 2010 e-Design Co.,Ltd. ******************** 2 | File Name : Interrupt.h 3 | Version : DS203_APP Ver 2.3x Author : bure 4 | *******************************************************************************/ 5 | 6 | #ifndef __Interrupt_H 7 | #define __Interrupt_H 8 | 9 | #include "stm32f10x_lib.h" 10 | 11 | extern vu8 Cursor_Cnt, Key_Wait_Cnt, Key_Repeat_Cnt, Key_Buffer, Cnt_mS, Cnt_20mS; 12 | extern vu8 Twink, Blink; 13 | // extern u8 Volume, Light; 14 | extern vu16 Delay_Cnt, Beep_mS, Key_Status_Last, Sec_Cnt, PD_Cnt, TimedDeltaView ; 15 | extern vu32 Wait_Cnt; 16 | void NMIException(void); 17 | void HardFaultException(void); 18 | void MemManageException(void); 19 | void BusFaultException(void); 20 | void UsageFaultException(void); 21 | void DebugMonitor(void); 22 | void SVCHandler(void); 23 | void PendSVC(void); 24 | void SysTickHandler(void); 25 | void WWDG_IRQHandler(void); 26 | void PVD_IRQHandler(void); 27 | void TAMPER_IRQHandler(void); 28 | void RTC_IRQHandler(void); 29 | void FLASH_IRQHandler(void); 30 | void RCC_IRQHandler(void); 31 | void EXTI0_IRQHandler(void); 32 | void EXTI1_IRQHandler(void); 33 | void EXTI2_IRQHandler(void); 34 | void EXTI3_IRQHandler(void); 35 | void EXTI4_IRQHandler(void); 36 | void DMA1_Channel1_IRQHandler(void); 37 | void DMA1_Channel2_IRQHandler(void); 38 | void DMA1_Channel3_IRQHandler(void); 39 | void DMA1_Channel4_IRQHandler(void); 40 | void DMA1_Channel5_IRQHandler(void); 41 | void DMA1_Channel6_IRQHandler(void); 42 | void DMA1_Channel7_IRQHandler(void); 43 | void ADC1_2_IRQHandler(void); 44 | void USB_HP_CAN_TX_IRQHandler(void); 45 | void USB_LP_CAN_RX0_IRQHandler(void); 46 | void CAN_RX1_IRQHandler(void); 47 | void CAN_SCE_IRQHandler(void); 48 | void EXTI9_5_IRQHandler(void); 49 | void TIM1_BRK_IRQHandler(void); 50 | void TIM1_UP_IRQHandler(void); 51 | void TIM1_TRG_COM_IRQHandler(void); 52 | void TIM1_CC_IRQHandler(void); 53 | void TIM2_IRQHandler(void); 54 | void TIM3_IRQHandler(void); 55 | void TIM4_IRQHandler(void); 56 | void I2C1_EV_IRQHandler(void); 57 | void I2C1_ER_IRQHandler(void); 58 | void I2C2_EV_IRQHandler(void); 59 | void I2C2_ER_IRQHandler(void); 60 | void SPI1_IRQHandler(void); 61 | void SPI2_IRQHandler(void); 62 | void USART1_IRQHandler(void); 63 | void USART2_IRQHandler(void); 64 | void USART3_IRQHandler(void); 65 | void EXTI15_10_IRQHandler(void); 66 | void RTCAlarm_IRQHandler(void); 67 | void USBWakeUp_IRQHandler(void); 68 | void TIM8_BRK_IRQHandler(void); 69 | void TIM8_UP_IRQHandler(void); 70 | void TIM8_TRG_COM_IRQHandler(void); 71 | void TIM8_CC_IRQHandler(void); 72 | void ADC3_IRQHandler(void); 73 | void FSMC_IRQHandler(void); 74 | void SDIO_IRQHandler(void); 75 | void TIM5_IRQHandler(void); 76 | void SPI3_IRQHandler(void); 77 | void UART4_IRQHandler(void); 78 | void UART5_IRQHandler(void); 79 | void TIM6_IRQHandler(void); 80 | void TIM7_IRQHandler(void); 81 | void DMA2_Channel1_IRQHandler(void); 82 | void DMA2_Channel2_IRQHandler(void); 83 | void DMA2_Channel3_IRQHandler(void); 84 | void DMA2_Channel4_5_IRQHandler(void); 85 | 86 | 87 | #endif /* __Interrupt_H */ 88 | 89 | /********************************* END OF FILE ********************************/ 90 | -------------------------------------------------------------------------------- /App/src/Main.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pmos69/dso203_gcc/c78c0dc5c1abf9648c31c2e145fbec6ade8c5f03/App/src/Main.c -------------------------------------------------------------------------------- /App/src/Menu.h: -------------------------------------------------------------------------------- 1 | /********************* (C) COPYRIGHT 2010 e-Design Co.,Ltd. ******************** 2 | File Name : Menu.h 3 | Version : DS203_APP Ver 2.4x Author : bure 4 | *******************************************************************************/ 5 | #ifndef __MENU_H 6 | #define __MENU_H 7 | 8 | #include "stm32f10x_lib.h" 9 | 10 | //----------- The Detail menu constants MARK defined ----------- 11 | #define NUM2 0x01 // display the Value of two values in the specified location 12 | #define NUM3 0x02 // in the specified location to display the floating point value of the Value of 3 13 | #define CIRC 0x10 // the Detail Value in the regulation of head circulation 14 | #define FIX 0x20 // the Detail Value change the identity of the corresponding string unchanged 15 | #define NOT 0x80 // skip the Detail item choice 16 | 17 | //----------- Flag of the definition of variables in the Detail menu ----------- 18 | #define HID 0x04 // display the Detail 19 | #define UPDAT 0x02 // refresh the display of the Detail entry 20 | #define BLINK 0x01 // the Detail display flashes 21 | 22 | #define BATTERY 4 23 | 24 | //=============== MENU Main Menu item is number defined =============== 25 | #define TRACK1 0 26 | #define TRACK2 1 27 | #define TRACK3 2 28 | #define TRACK4 3 29 | 30 | #define RUNNING 4 31 | #define OUTPUT 5 32 | 33 | #define T_BASE 6 34 | #define TRIGG 7 35 | #define V_VERNIE 8 36 | #define FILE 9 37 | #define T_VERNIE 10 38 | #define BK_LIGHT 11 39 | #define VOLUME 12 40 | 41 | //------------- TRACKn submenu item number defined -------------- Dettagli TRACK 42 | #define SOURCE 0 43 | #define COUPLE 1 44 | #define RANGE 2 45 | #define POSI 3 46 | 47 | //............ TRACKn SOURCE item number defined ........... 48 | #define HIDE 0 49 | #define CH_A 1 50 | #define CH_B 1 51 | #define CH_X10 2 52 | #define CH_C 1 53 | #define CH_D 1 54 | #define A_add_B 2 55 | #define A_sub_B 3 56 | #define C_and_D 4 57 | #define C_or_D 5 58 | #define REC_1 6 //FILE1,2..4 59 | #define REC_2 7 60 | #define REC_3 8 61 | #define REC_4 9 62 | 63 | #define BIG_M 10 64 | 65 | #define FFT_A 11 66 | #define FFT_B 12 67 | 68 | #define SPEC_A 13 69 | #define SPEC_B 14 70 | 71 | //------------- RUNNING sub-menu item number defined ------------- 72 | #define STATE 0 73 | #define STATUS 1 74 | 75 | //.............. STATE sub-menu item number defined .............. 76 | #define RUN 0 77 | #define HOLD 1 78 | 79 | //-------------- T_BASE sub-menu item number defined ------------- 80 | #define MODE 0 81 | #define BASE 1 82 | #define XPOSI 2 83 | #define VIEW 3 84 | 85 | //............. T_BASE Mode number defined ............ 86 | #define SCAN 0 87 | #define AUTO 1 88 | #define NORH 2 89 | #define NORC 3 90 | #define SGL 4 91 | #define X_Y 5 92 | 93 | //-------------- OUTPUT sub-menu item number defined ------------- 94 | #define KIND 0 95 | #define FRQN 1 96 | #define DUTYPWM 2 97 | #define OUTATT 3 98 | 99 | //--------------- TRIGG sub-menu item number defined ------------- 100 | #define SOURCE 0 101 | #define TR_KIND 1 102 | #define THRESHOLD 2 103 | 104 | //------------- T_VERNIE sub-menu item number defined ------------ 105 | #define T1 0 106 | #define T2 1 107 | 108 | //------------- V_VERNIE sub-menu item number defined ------------ 109 | #define V1 0 110 | #define V2 1 111 | 112 | //--------------- FILE sub-menu item number defined -------------- 113 | #define SAVE 0 114 | #define LOAD 1 115 | #define BMP 0 116 | #define DAT 1 117 | #define BUF 2 118 | #define CSV 3 119 | 120 | //--------- BK_LIGHT & VOLUME sub menu item number defined -------- 121 | #define CLASS 1 122 | 123 | //============== METER main menu items defined number ============== 124 | #define METER_0 13 125 | #define METER_1 14 126 | #define METER_2 15 127 | #define METER_3 16 128 | #define METER_4 17 129 | #define METER_5 18 130 | #define METER_6 19 131 | #define METER_7 20 132 | #define METER_8 21 133 | 134 | //------------- METER in Item number defined ------------- 135 | #define VBT 0 136 | #define FPS 1 137 | #define VPP 2 138 | #define VDC 3 139 | #define RMS 4 140 | #define MAX 5 141 | #define MIN 6 142 | #define FRQ 7 143 | #define CIR 8 144 | #define DUT 9 145 | #define TH 10 146 | #define TL 11 147 | 148 | #define _Meas_V_Track (Title[V_VERNIE][2].Value) //Sorgente Delta V 149 | #define _Meas_V_Range (Title[_Meas_V_Track][RANGE].Value) 150 | #define _Meas_V_Scale (Y_Attr[_Meas_V_Range].SCALE) 151 | #define _V1_Vernie (Title[V_VERNIE][0].Value) 152 | #define _V2_Vernie (Title[V_VERNIE][1].Value) 153 | #define _D_V_Source Title[V_VERNIE][2] 154 | #define _Delta_V Title[V_VERNIE][3] 155 | #define _Delta_T Title[T_VERNIE][3] 156 | #define _T_Range (Title[T_BASE][1].Value) 157 | #define _T_Scale (X_Attr[_T_Range].SCALE) 158 | #define _T_KP (X_Attr[_T_Range].KP) 159 | 160 | typedef struct 161 | { 162 | char *Str; 163 | u8 Track; 164 | u8 Item; 165 | uc16 XPOS1; 166 | uc16 XPOS2; 167 | uc8 YPOS; 168 | u8 Flag; // HID=0x04, UPD=0x02, BLINK=0x01, 169 | } meter; 170 | 171 | typedef struct 172 | { 173 | char *Str; 174 | u16 *Color; 175 | s16 Limit; // Max Value 176 | uc8 MARK; // NUM=0x04, FIX=0x02, CIR=0x01, 177 | uc16 XPOS; 178 | uc8 YPOS; 179 | s16 Value; 180 | u8 Flag; // HID=0x04, UPD=0x02, BLINK=0x01, 181 | } menu; 182 | 183 | extern menu Title[13][4]; 184 | extern meter Meter[9]; 185 | extern u8 Current, Update; 186 | extern u8 Detail[14]; 187 | extern char NumStr[12]; 188 | extern u16 Result_FPS; 189 | extern char T_UNIT[12], S_UNIT[12], P_UNIT[12], V_UNIT[12], F_UNIT[12], FM_UNIT[12]; 190 | 191 | extern uc16 Y_COLOR[5]; // Track Color 2 192 | 193 | void EnableMeter(void); 194 | void DisableMeter(void); 195 | void Display_Value(u8 i); 196 | void Display_Title(void); 197 | void Display_Meter(void); 198 | void Load_Attr(void); 199 | void Update_Battery(void); 200 | 201 | extern u8 BigMeter; 202 | 203 | #endif 204 | 205 | /********************************* END OF FILE ********************************/ 206 | -------------------------------------------------------------------------------- /App/src/Process.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pmos69/dso203_gcc/c78c0dc5c1abf9648c31c2e145fbec6ade8c5f03/App/src/Process.h -------------------------------------------------------------------------------- /App/src/startup.c: -------------------------------------------------------------------------------- 1 | #include "stm32f10x_lib.h" 2 | #include "Interrupt.h" 3 | 4 | typedef void( *const intfunc )( void ); 5 | 6 | #define WEAK __attribute__ ((weak)) 7 | 8 | extern unsigned long _etext; 9 | extern unsigned long _sidata; 10 | extern unsigned long _sdata; 11 | extern unsigned long _edata; 12 | extern unsigned long _sbss; 13 | extern unsigned long _ebss; 14 | extern unsigned long _estack; 15 | 16 | void Reset_Handler(void) __attribute__((__interrupt__)); 17 | void __Init_Data(void); 18 | void Default_Handler(void); 19 | 20 | extern int main(void); 21 | extern void __libc_init_array(void); 22 | 23 | void WEAK NMI_Handler(void); 24 | void WEAK HardFault_Handler(void); 25 | void WEAK MemManage_Handler(void); 26 | void WEAK BusFault_Handler(void); 27 | void WEAK UsageFault_Handler(void); 28 | void WEAK MemManage_Handler(void); 29 | void WEAK SVC_Handler(void); 30 | void WEAK DebugMon_Handler(void); 31 | void WEAK PendSV_Handler(void); 32 | void WEAK SysTick_Handler(void); 33 | 34 | void WEAK WWDG_IRQHandler(void); 35 | void WEAK PVD_IRQHandler(void); 36 | void WEAK TAMPER_IRQHandler(void); 37 | void WEAK RTC_IRQHandler(void); 38 | void WEAK FLASH_IRQHandler(void); 39 | void WEAK RCC_IRQHandler(void); 40 | void WEAK EXTI0_IRQHandler(void); 41 | void WEAK EXTI1_IRQHandler(void); 42 | void WEAK EXTI2_IRQHandler(void); 43 | void WEAK EXTI3_IRQHandler(void); 44 | void WEAK EXTI4_IRQHandler(void); 45 | void WEAK DMA1_Channel1_IRQHandler(void); 46 | void WEAK DMA1_Channel2_IRQHandler(void); 47 | void WEAK DMA1_Channel3_IRQHandler(void); 48 | void WEAK DMA1_Channel4_IRQHandler(void); 49 | void WEAK DMA1_Channel5_IRQHandler(void); 50 | void WEAK DMA1_Channel6_IRQHandler(void); 51 | void WEAK DMA1_Channel7_IRQHandler(void); 52 | void WEAK ADC1_2_IRQHandler(void); 53 | void WEAK USB_HP_CAN1_TX_IRQHandler(void); 54 | void WEAK USB_LP_CAN1_RX0_IRQHandler(void); 55 | void WEAK CAN1_RX1_IRQHandler(void); 56 | void WEAK CAN1_SCE_IRQHandler(void); 57 | void WEAK EXTI9_5_IRQHandler(void); 58 | void WEAK TIM1_BRK_IRQHandler(void); 59 | void WEAK TIM1_UP_IRQHandler(void); 60 | void WEAK TIM1_TRG_COM_IRQHandler(void); 61 | void WEAK TIM1_CC_IRQHandler(void); 62 | void WEAK TIM2_IRQHandler(void); 63 | void WEAK TIM3_IRQHandler(void); 64 | void WEAK TIM4_IRQHandler(void); 65 | void WEAK I2C1_EV_IRQHandler(void); 66 | void WEAK I2C1_ER_IRQHandler(void); 67 | void WEAK I2C2_EV_IRQHandler(void); 68 | void WEAK I2C2_ER_IRQHandler(void); 69 | void WEAK SPI1_IRQHandler(void); 70 | void WEAK SPI2_IRQHandler(void); 71 | void WEAK USART1_IRQHandler(void); 72 | void WEAK USART2_IRQHandler(void); 73 | void WEAK USART3_IRQHandler(void); 74 | void WEAK EXTI15_10_IRQHandler(void); 75 | void WEAK RTCAlarm_IRQHandler(void); 76 | void WEAK USBWakeUp_IRQHandler(void); 77 | void WEAK TIM8_BRK_IRQHandler(void); 78 | void WEAK TIM8_UP_IRQHandler(void); 79 | void WEAK TIM8_TRG_COM_IRQHandler(void); 80 | void WEAK TIM8_CC_IRQHandler(void); 81 | void WEAK ADC3_IRQHandler(void); 82 | void WEAK FSMC_IRQHandler(void); 83 | void WEAK SDIO_IRQHandler(void); 84 | void WEAK TIM5_IRQHandler(void); 85 | void WEAK SPI3_IRQHandler(void); 86 | void WEAK UART4_IRQHandler(void); 87 | void WEAK UART5_IRQHandler(void); 88 | void WEAK TIM6_IRQHandler(void); 89 | void WEAK TIM7_IRQHandler(void); 90 | void WEAK DMA2_Channel1_IRQHandler(void); 91 | void WEAK DMA2_Channel2_IRQHandler(void); 92 | void WEAK DMA2_Channel3_IRQHandler(void); 93 | void WEAK DMA2_Channel4_5_IRQHandler(void); 94 | 95 | __attribute__ ((section(".isr_vectors"))) 96 | void (* const g_pfnVectors[])(void) = { 97 | (intfunc)((unsigned long)&_estack), /* The stack pointer after relocation */ 98 | #if 0 99 | Reset_Handler, /* Reset Handler */ 100 | NMI_Handler, /* NMI Handler */ 101 | HardFault_Handler, /* Hard Fault Handler */ 102 | MemManage_Handler, /* MPU Fault Handler */ 103 | BusFault_Handler, /* Bus Fault Handler */ 104 | UsageFault_Handler, /* Usage Fault Handler */ 105 | 0, /* Reserved */ 106 | 0, /* Reserved */ 107 | 0, /* Reserved */ 108 | 0, /* Reserved */ 109 | SVC_Handler, /* SVCall Handler */ 110 | DebugMon_Handler, /* Debug Monitor Handler */ 111 | 0, /* Reserved */ 112 | PendSV_Handler, /* PendSV Handler */ 113 | SysTick_Handler, /* SysTick Handler */ 114 | 115 | /* External Interrupts */ 116 | WWDG_IRQHandler, /* Window Watchdog */ 117 | PVD_IRQHandler, /* PVD through EXTI Line detect */ 118 | TAMPER_IRQHandler, /* Tamper */ 119 | RTC_IRQHandler, /* RTC */ 120 | FLASH_IRQHandler, /* Flash */ 121 | RCC_IRQHandler, /* RCC */ 122 | EXTI0_IRQHandler, /* EXTI Line 0 */ 123 | EXTI1_IRQHandler, /* EXTI Line 1 */ 124 | EXTI2_IRQHandler, /* EXTI Line 2 */ 125 | EXTI3_IRQHandler, /* EXTI Line 3 */ 126 | EXTI4_IRQHandler, /* EXTI Line 4 */ 127 | DMA1_Channel1_IRQHandler, /* DMA1 Channel 1 */ 128 | DMA1_Channel2_IRQHandler, /* DMA1 Channel 2 */ 129 | DMA1_Channel3_IRQHandler, /* DMA1 Channel 3 */ 130 | DMA1_Channel4_IRQHandler, /* DMA1 Channel 4 */ 131 | DMA1_Channel5_IRQHandler, /* DMA1 Channel 5 */ 132 | DMA1_Channel6_IRQHandler, /* DMA1 Channel 6 */ 133 | DMA1_Channel7_IRQHandler, /* DMA1 Channel 7 */ 134 | ADC1_2_IRQHandler, /* ADC1 & ADC2 */ 135 | USB_HP_CAN1_TX_IRQHandler, /* USB High Priority or CAN1 TX */ 136 | USB_LP_CAN1_RX0_IRQHandler, /* USB Low Priority or CAN1 RX0 */ 137 | CAN1_RX1_IRQHandler, /* CAN1 RX1 */ 138 | CAN1_SCE_IRQHandler, /* CAN1 SCE */ 139 | EXTI9_5_IRQHandler, /* EXTI Line 9..5 */ 140 | TIM1_BRK_IRQHandler, /* TIM1 Break */ 141 | TIM1_UP_IRQHandler, /* TIM1 Update */ 142 | TIM1_TRG_COM_IRQHandler, /* TIM1 Trigger and Commutation */ 143 | TIM1_CC_IRQHandler, /* TIM1 Capture Compare */ 144 | TIM2_IRQHandler, /* TIM2 */ 145 | TIM3_IRQHandler, /* TIM3 */ 146 | TIM4_IRQHandler, /* TIM4 */ 147 | I2C1_EV_IRQHandler, /* I2C1 Event */ 148 | I2C1_ER_IRQHandler, /* I2C1 Error */ 149 | I2C2_EV_IRQHandler, /* I2C2 Event */ 150 | I2C2_ER_IRQHandler, /* I2C2 Error */ 151 | SPI1_IRQHandler, /* SPI1 */ 152 | SPI2_IRQHandler, /* SPI2 */ 153 | USART1_IRQHandler, /* USART1 */ 154 | USART2_IRQHandler, /* USART2 */ 155 | USART3_IRQHandler, /* USART3 */ 156 | EXTI15_10_IRQHandler, /* EXTI Line 15..10 */ 157 | RTCAlarm_IRQHandler, /* RTC Alarm through EXTI Line */ 158 | USBWakeUp_IRQHandler, /* USB Wakeup from suspend */ 159 | TIM8_BRK_IRQHandler, 160 | TIM8_UP_IRQHandler, 161 | TIM8_TRG_COM_IRQHandler, 162 | TIM8_CC_IRQHandler, 163 | ADC3_IRQHandler, 164 | FSMC_IRQHandler, 165 | SDIO_IRQHandler, 166 | TIM5_IRQHandler, 167 | SPI3_IRQHandler, 168 | UART4_IRQHandler, 169 | UART5_IRQHandler, 170 | TIM6_IRQHandler, 171 | TIM7_IRQHandler, 172 | DMA2_Channel1_IRQHandler, 173 | DMA2_Channel2_IRQHandler, 174 | DMA2_Channel3_IRQHandler, 175 | DMA2_Channel4_5_IRQHandler, 176 | 0, 0, 0, 0, 0, 177 | 0, 0, 0, 0, 0, 178 | 0, 0, 0, 0, 0, 179 | 0, 0, 0, 0, 0, 180 | 0, 0, 0, 0, 0, 181 | 0, 0, 0, 0, 0, 182 | 0, 0, 0, 0, 0, 183 | 0, 0, 0, 0, 0, 184 | 0, 0, 0, 185 | (intfunc)0xF1E0F85F /* @0x1E0. This is for boot in RAM mode for STM32F10x High Density devices. */ 186 | #endif 187 | Reset_Handler, NMIException, HardFaultException, 188 | MemManageException, BusFaultException, UsageFaultException, 0, 0, 189 | 0, 0, SVCHandler, DebugMonitor, 0, PendSVC, SysTickHandler, 190 | WWDG_IRQHandler, PVD_IRQHandler, TAMPER_IRQHandler, RTC_IRQHandler, 191 | FLASH_IRQHandler, RCC_IRQHandler, EXTI0_IRQHandler, 192 | EXTI1_IRQHandler, EXTI2_IRQHandler, EXTI3_IRQHandler, 193 | EXTI4_IRQHandler, DMA1_Channel1_IRQHandler, 194 | DMA1_Channel2_IRQHandler, DMA1_Channel3_IRQHandler, 195 | DMA1_Channel4_IRQHandler, DMA1_Channel5_IRQHandler, 196 | DMA1_Channel6_IRQHandler, DMA1_Channel7_IRQHandler, 197 | ADC1_2_IRQHandler, USB_HP_CAN_TX_IRQHandler, 198 | USB_LP_CAN_RX0_IRQHandler, CAN_RX1_IRQHandler, CAN_SCE_IRQHandler, 199 | EXTI9_5_IRQHandler, TIM1_BRK_IRQHandler, TIM1_UP_IRQHandler, 200 | TIM1_TRG_COM_IRQHandler, TIM1_CC_IRQHandler, TIM2_IRQHandler, 201 | TIM3_IRQHandler, TIM4_IRQHandler, I2C1_EV_IRQHandler, 202 | I2C1_ER_IRQHandler, I2C2_EV_IRQHandler, I2C2_ER_IRQHandler, 203 | SPI1_IRQHandler, SPI2_IRQHandler, USART1_IRQHandler, 204 | USART2_IRQHandler, USART3_IRQHandler, EXTI15_10_IRQHandler, 205 | RTCAlarm_IRQHandler, USBWakeUp_IRQHandler, TIM8_BRK_IRQHandler, 206 | TIM8_UP_IRQHandler, TIM8_TRG_COM_IRQHandler, TIM8_CC_IRQHandler, 207 | ADC3_IRQHandler, FSMC_IRQHandler, SDIO_IRQHandler, TIM5_IRQHandler, 208 | SPI3_IRQHandler, UART4_IRQHandler, UART5_IRQHandler, 209 | TIM6_IRQHandler, TIM7_IRQHandler, DMA2_Channel1_IRQHandler, 210 | DMA2_Channel2_IRQHandler, DMA2_Channel3_IRQHandler, 211 | DMA2_Channel4_5_IRQHandler 212 | }; 213 | 214 | void __Init_Data(void) { 215 | unsigned long *src, *dst; 216 | /* copy the data segment into ram */ 217 | src = &_sidata; 218 | dst = &_sdata; 219 | if (src != dst) 220 | while(dst < &_edata) 221 | *(dst++) = *(src++); 222 | 223 | /* zero the bss segment */ 224 | dst = &_sbss; 225 | while(dst < &_ebss) 226 | *(dst++) = 0; 227 | } 228 | 229 | void Reset_Handler(void) { 230 | /* Initialize data and bss */ 231 | __Init_Data(); 232 | main(); 233 | while(1) {} 234 | } 235 | 236 | #pragma weak MMI_Handler = Default_Handler 237 | #pragma weak MemManage_Handler = Default_Handler 238 | #pragma weak BusFault_Handler = Default_Handler 239 | #pragma weak UsageFault_Handler = Default_Handler 240 | #pragma weak SVC_Handler = Default_Handler 241 | #pragma weak DebugMon_Handler = Default_Handler 242 | #pragma weak PendSV_Handler = Default_Handler 243 | #pragma weak SysTick_Handler = Default_Handler 244 | #pragma weak WWDG_IRQHandler = Default_Handler 245 | #pragma weak PVD_IRQHandler = Default_Handler 246 | #pragma weak TAMPER_IRQHandler = Default_Handler 247 | #pragma weak RTC_IRQHandler = Default_Handler 248 | #pragma weak FLASH_IRQHandler = Default_Handler 249 | #pragma weak RCC_IRQHandler = Default_Handler 250 | #pragma weak EXTI0_IRQHandler = Default_Handler 251 | #pragma weak EXTI1_IRQHandler = Default_Handler 252 | #pragma weak EXTI2_IRQHandler = Default_Handler 253 | #pragma weak EXTI3_IRQHandler = Default_Handler 254 | #pragma weak EXTI4_IRQHandler = Default_Handler 255 | #pragma weak DMA1_Channel1_IRQHandler = Default_Handler 256 | #pragma weak DMA1_Channel2_IRQHandler = Default_Handler 257 | #pragma weak DMA1_Channel3_IRQHandler = Default_Handler 258 | #pragma weak DMA1_Channel4_IRQHandler = Default_Handler 259 | #pragma weak DMA1_Channel5_IRQHandler = Default_Handler 260 | #pragma weak DMA1_Channel6_IRQHandler = Default_Handler 261 | #pragma weak DMA1_Channel7_IRQHandler = Default_Handler 262 | #pragma weak ADC1_2_IRQHandler = Default_Handler 263 | #pragma weak USB_HP_CAN1_TX_IRQHandler = Default_Handler 264 | #pragma weak USB_LP_CAN1_RX0_IRQHandler = Default_Handler 265 | #pragma weak CAN1_RX1_IRQHandler = Default_Handler 266 | #pragma weak CAN1_SCE_IRQHandler = Default_Handler 267 | #pragma weak EXTI9_5_IRQHandler = Default_Handler 268 | #pragma weak TIM1_BRK_IRQHandler = Default_Handler 269 | #pragma weak TIM1_UP_IRQHandler = Default_Handler 270 | #pragma weak TIM1_TRG_COM_IRQHandler = Default_Handler 271 | #pragma weak TIM1_CC_IRQHandler = Default_Handler 272 | #pragma weak TIM2_IRQHandler = Default_Handler 273 | #pragma weak TIM3_IRQHandler = Default_Handler 274 | #pragma weak TIM4_IRQHandler = Default_Handler 275 | #pragma weak I2C1_EV_IRQHandler = Default_Handler 276 | #pragma weak I2C1_ER_IRQHandler = Default_Handler 277 | #pragma weak I2C2_EV_IRQHandler = Default_Handler 278 | #pragma weak I2C2_ER_IRQHandler = Default_Handler 279 | #pragma weak SPI1_IRQHandler = Default_Handler 280 | #pragma weak SPI2_IRQHandler = Default_Handler 281 | #pragma weak USART1_IRQHandler = Default_Handler 282 | #pragma weak USART2_IRQHandler = Default_Handler 283 | #pragma weak USART3_IRQHandler = Default_Handler 284 | #pragma weak EXTI15_10_IRQHandler = Default_Handler 285 | #pragma weak RTCAlarm_IRQHandler = Default_Handler 286 | #pragma weak USBWakeUp_IRQHandler = Default_Handler 287 | #pragma weak TIM8_BRK_IRQHandler = Default_Handler 288 | #pragma weak TIM8_UP_IRQHandler = Default_Handler 289 | #pragma weak TIM8_TRG_COM_IRQHandler = Default_Handler 290 | #pragma weak TIM8_CC_IRQHandler = Default_Handler 291 | #pragma weak ADC3_IRQHandler = Default_Handler 292 | #pragma weak FSMC_IRQHandler = Default_Handler 293 | #pragma weak SDIO_IRQHandler = Default_Handler 294 | #pragma weak TIM5_IRQHandler = Default_Handler 295 | #pragma weak SPI3_IRQHandler = Default_Handler 296 | #pragma weak UART4_IRQHandler = Default_Handler 297 | #pragma weak UART5_IRQHandler = Default_Handler 298 | #pragma weak TIM6_IRQHandler = Default_Handler 299 | #pragma weak TIM7_IRQHandler = Default_Handler 300 | #pragma weak DMA2_Channel1_IRQHandler = Default_Handler 301 | #pragma weak DMA2_Channel2_IRQHandler = Default_Handler 302 | #pragma weak DMA2_Channel3_IRQHandler = Default_Handler 303 | #pragma weak DMA2_Channel4_5_IRQHandler = Default_Handler 304 | 305 | void Default_Handler(void) { 306 | while (1) {} 307 | } 308 | 309 | void _init(void) 310 | { 311 | } 312 | -------------------------------------------------------------------------------- /FWLib/asm/cortexm3_macro.s: -------------------------------------------------------------------------------- 1 | /* ******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** */ 2 | /* * File Name : cortexm3_macro.s */ 3 | /* * Author : MCD Application Team */ 4 | /* * Version : V2.2.1 */ 5 | /* * Date : 09/22/2008 */ 6 | /* * Description : Instruction wrappers for special Cortex-M3 instructions. */ 7 | /* * to be used with EWARM4.x toolchain. */ 8 | /* ******************************************************************************* */ 9 | /* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS */ 10 | /* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. */ 11 | /* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, */ 12 | /* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE */ 13 | /* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING */ 14 | /* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. */ 15 | /* ******************************************************************************* */ 16 | 17 | .syntax unified 18 | .thumb 19 | .text 20 | 21 | /* Exported functions */ 22 | .globl __WFI 23 | .globl __WFE 24 | .globl __SEV 25 | .globl __ISB 26 | .globl __DSB 27 | .globl __DMB 28 | .globl __SVC 29 | .globl __MRS_CONTROL 30 | .globl __MSR_CONTROL 31 | .globl __MRS_PSP 32 | .globl __MSR_PSP 33 | .globl __MRS_MSP 34 | .globl __MSR_MSP 35 | .globl __RESETPRIMASK 36 | .globl __SETPRIMASK 37 | .globl __READ_PRIMASK 38 | .globl __RESETFAULTMASK 39 | .globl __SETFAULTMASK 40 | .globl __READ_FAULTMASK 41 | .globl __BASEPRICONFIG 42 | .globl __GetBASEPRI 43 | .globl __REV_HalfWord 44 | .globl __REV_Word 45 | 46 | /* ******************************************************************************* */ 47 | /* Function Name : __WFI */ 48 | /* Description : Assembler function for the WFI instruction. */ 49 | /* Input : None */ 50 | /* Return : None */ 51 | /* ******************************************************************************* */ 52 | __WFI: 53 | 54 | WFI 55 | BX r14 56 | 57 | /* ******************************************************************************* */ 58 | /* Function Name : __WFE */ 59 | /* Description : Assembler function for the WFE instruction. */ 60 | /* Input : None */ 61 | /* Return : None */ 62 | /* ******************************************************************************* */ 63 | __WFE: 64 | 65 | WFE 66 | BX r14 67 | 68 | /* ******************************************************************************* */ 69 | /* Function Name : __SEV */ 70 | /* Description : Assembler function for the SEV instruction. */ 71 | /* Input : None */ 72 | /* Return : None */ 73 | /* ******************************************************************************* */ 74 | __SEV: 75 | 76 | SEV 77 | BX r14 78 | 79 | /* ******************************************************************************* */ 80 | /* Function Name : __ISB */ 81 | /* Description : Assembler function for the ISB instruction. */ 82 | /* Input : None */ 83 | /* Return : None */ 84 | /* ******************************************************************************* */ 85 | __ISB: 86 | 87 | ISB 88 | BX r14 89 | 90 | /* ******************************************************************************* */ 91 | /* Function Name : __DSB */ 92 | /* Description : Assembler function for the DSB instruction. */ 93 | /* Input : None */ 94 | /* Return : None */ 95 | /* ******************************************************************************* */ 96 | __DSB: 97 | 98 | DSB 99 | BX r14 100 | 101 | /* ******************************************************************************* */ 102 | /* Function Name : __DMB */ 103 | /* Description : Assembler function for the DMB instruction. */ 104 | /* Input : None */ 105 | /* Return : None */ 106 | /* ******************************************************************************* */ 107 | __DMB: 108 | 109 | DMB 110 | BX r14 111 | 112 | /* ******************************************************************************* */ 113 | /* Function Name : __SVC */ 114 | /* Description : Assembler function for the SVC instruction. */ 115 | /* Input : None */ 116 | /* Return : None */ 117 | /* ******************************************************************************* */ 118 | __SVC: 119 | 120 | SVC 0x01 121 | BX r14 122 | 123 | /* ******************************************************************************* */ 124 | /* Function Name : __MRS_CONTROL */ 125 | /* Description : Assembler function for the MRS instruction. */ 126 | /* Input : None */ 127 | /* Return : - r0 : Cortex-M3 CONTROL register value. */ 128 | /* ******************************************************************************* */ 129 | __MRS_CONTROL: 130 | 131 | MRS r0, CONTROL 132 | BX r14 133 | 134 | /* ******************************************************************************* */ 135 | /* Function Name : __MSR_CONTROL */ 136 | /* Description : Assembler function for the MSR instruction. */ 137 | /* Input : - r0 : Cortex-M3 CONTROL register new value. */ 138 | /* Return : None */ 139 | /* ******************************************************************************* */ 140 | __MSR_CONTROL: 141 | 142 | MSR CONTROL, r0 143 | ISB 144 | BX r14 145 | 146 | /* ******************************************************************************* */ 147 | /* Function Name : __MRS_PSP */ 148 | /* Description : Assembler function for the MRS instruction. */ 149 | /* Input : None */ 150 | /* Return : - r0 : Process Stack value. */ 151 | /* ******************************************************************************* */ 152 | __MRS_PSP: 153 | 154 | MRS r0, PSP 155 | BX r14 156 | 157 | /* ******************************************************************************* */ 158 | /* Function Name : __MSR_PSP */ 159 | /* Description : Assembler function for the MSR instruction. */ 160 | /* Input : - r0 : Process Stack new value. */ 161 | /* Return : None */ 162 | /* ******************************************************************************* */ 163 | __MSR_PSP: 164 | 165 | MSR PSP, r0 /* set Process Stack value */ 166 | BX r14 167 | 168 | /* ******************************************************************************* */ 169 | /* Function Name : __MRS_MSP */ 170 | /* Description : Assembler function for the MRS instruction. */ 171 | /* Input : None */ 172 | /* Return : - r0 : Main Stack value. */ 173 | /* ******************************************************************************* */ 174 | __MRS_MSP: 175 | 176 | MRS r0, MSP 177 | BX r14 178 | 179 | /* ******************************************************************************* */ 180 | /* Function Name : __MSR_MSP */ 181 | /* Description : Assembler function for the MSR instruction. */ 182 | /* Input : - r0 : Main Stack new value. */ 183 | /* Return : None */ 184 | /* ******************************************************************************* */ 185 | __MSR_MSP: 186 | 187 | MSR MSP, r0 /* set Main Stack value */ 188 | BX r14 189 | 190 | /* ******************************************************************************* */ 191 | /* Function Name : __RESETPRIMASK */ 192 | /* Description : Assembler function to reset the PRIMASK. */ 193 | /* Input : None */ 194 | /* Return : None */ 195 | /* ******************************************************************************* */ 196 | __RESETPRIMASK: 197 | 198 | CPSIE i 199 | BX r14 200 | 201 | /* ******************************************************************************* */ 202 | /* Function Name : __SETPRIMASK */ 203 | /* Description : Assembler function to set the PRIMASK. */ 204 | /* Input : None */ 205 | /* Return : None */ 206 | /* ******************************************************************************* */ 207 | __SETPRIMASK: 208 | 209 | CPSID i 210 | BX r14 211 | 212 | /* ******************************************************************************* */ 213 | /* Function Name : __READ_PRIMASK */ 214 | /* Description : Assembler function to get the PRIMASK value. */ 215 | /* Input : None */ 216 | /* Return : - r0 : PRIMASK register value */ 217 | /* ******************************************************************************* */ 218 | __READ_PRIMASK: 219 | 220 | MRS r0, PRIMASK 221 | BX r14 222 | 223 | /* ******************************************************************************* */ 224 | /* Function Name : __RESETFAULTMASK */ 225 | /* Description : Assembler function to reset the FAULTMASK. */ 226 | /* Input : None */ 227 | /* Return : None */ 228 | /* ******************************************************************************* */ 229 | __RESETFAULTMASK: 230 | 231 | CPSIE f 232 | BX r14 233 | 234 | /* ******************************************************************************* */ 235 | /* Function Name : __SETFAULTMASK */ 236 | /* Description : Assembler function to set the FAULTMASK. */ 237 | /* Input : None */ 238 | /* Return : None */ 239 | /* ******************************************************************************* */ 240 | __SETFAULTMASK: 241 | 242 | CPSID f 243 | BX r14 244 | 245 | /* ******************************************************************************* */ 246 | /* Function Name : __READ_FAULTMASK */ 247 | /* Description : Assembler function to get the FAULTMASK value. */ 248 | /* Input : None */ 249 | /* Return : - r0 : FAULTMASK register value */ 250 | /* ******************************************************************************* */ 251 | __READ_FAULTMASK: 252 | 253 | MRS r0, FAULTMASK 254 | BX r14 255 | 256 | /* ******************************************************************************* */ 257 | /* Function Name : __BASEPRICONFIG */ 258 | /* Description : Assembler function to set the Base Priority. */ 259 | /* Input : - r0 : Base Priority new value */ 260 | /* Return : None */ 261 | /* ******************************************************************************* */ 262 | __BASEPRICONFIG: 263 | 264 | MSR BASEPRI, r0 265 | BX r14 266 | 267 | /* ******************************************************************************* */ 268 | /* Function Name : __GetBASEPRI */ 269 | /* Description : Assembler function to get the Base Priority value. */ 270 | /* Input : None */ 271 | /* Return : - r0 : Base Priority value */ 272 | /* ******************************************************************************* */ 273 | __GetBASEPRI: 274 | 275 | MRS r0, BASEPRI_MAX 276 | BX r14 277 | 278 | /* ******************************************************************************* */ 279 | /* Function Name : __REV_HalfWord */ 280 | /* Description : Reverses the byte order in HalfWord(16-bit) input variable. */ 281 | /* Input : - r0 : specifies the input variable */ 282 | /* Return : - r0 : holds tve variable value after byte reversing. */ 283 | /* ******************************************************************************* */ 284 | __REV_HalfWord: 285 | 286 | REV16 r0, r0 287 | BX r14 288 | 289 | /* ******************************************************************************* */ 290 | /* Function Name : __REV_Word */ 291 | /* Description : Reverses the byte order in Word(32-bit) input variable. */ 292 | /* Input : - r0 : specifies the input variable */ 293 | /* Return : - r0 : holds tve variable value after byte reversing. */ 294 | /* ******************************************************************************* */ 295 | __REV_Word: 296 | 297 | REV r0, r0 298 | BX r14 299 | 300 | .end 301 | 302 | /* ******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE***** */ 303 | -------------------------------------------------------------------------------- /FWLib/src/stm32f10x_nvic.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pmos69/dso203_gcc/c78c0dc5c1abf9648c31c2e145fbec6ade8c5f03/FWLib/src/stm32f10x_nvic.c -------------------------------------------------------------------------------- /README.txt: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pmos69/dso203_gcc/c78c0dc5c1abf9648c31c2e145fbec6ade8c5f03/README.txt -------------------------------------------------------------------------------- /makefile.bat: -------------------------------------------------------------------------------- 1 | @echo off 2 | setlocal ENABLEDELAYEDEXPANSION 3 | 4 | rem DS203 Win32 GCC support by valky.eu 5 | rem USER DEFINED VALUES 6 | rem =================================================== 7 | set CBASE=C:\arm_toolchain\arm-2011.03\bin\ 8 | set TARGET=E:\ 9 | set TFILE=APP_G251 10 | set APP=1 11 | rem =================================================== 12 | 13 | Echo DS203 Build tool by valky.eu 14 | Echo Target slot: !APP! 15 | Echo DFU Drive: !TARGET! 16 | 17 | call :CheckSpaces "%CD%" %CD% 18 | 19 | set CROSS=!CBASE!arm-none-eabi- 20 | set CC=!CROSS!gcc 21 | set OBJCOPY=!CROSS!objcopy 22 | set LD=!CROSS!ld 23 | set AS=!CROSS!as 24 | set STRIP=!CROSS!strip 25 | 26 | if not exist !CC!.* ( 27 | echo Compiler not found ! 28 | goto :eof 29 | ) 30 | 31 | set INTERMEDIATE=Bin 32 | 33 | set STM_INC=..\FWLib\inc 34 | set STM_SRC=..\FWLib\src 35 | set STM_ASM=..\FWLib\asm 36 | 37 | set SRC_SRC=..\App\src 38 | set SRC_INC=..\App\inc 39 | set SRC_LDS=..\App\lds 40 | set SRC_ASM=..\App\asm 41 | 42 | set CFLAGS=-Wunreachable-code -Wall -Os -Werror -fno-common -mcpu=cortex-m3 -mthumb -msoft-float -fomit-frame-pointer -MD -I !STM_INC! -I !SRC_INC! -I !SRC_SRC! 43 | set AFLAGS=-mcpu=cortex-m3 -mthumb 44 | set LDFLAGS=-nostartfiles -mcpu=cortex-m3 -mthumb -march=armv7 -mfix-cortex-m3-ldrd -msoft-float 45 | 46 | set OBJS=Calibrat.o Draw.o Files.o Function.o ^ 47 | Interrupt.o Main.o Menu.o Process.o startup.o ^ 48 | stm32f10x_nvic.o cortexm3_macro.o 49 | 50 | set SRCS= !SRC_SRC!\Calibrat.c !SRC_SRC!\Draw.c !SRC_SRC!\Files.c !SRC_SRC!\Function.c !SRC_SRC!\Interrupt.c ^ 51 | !SRC_SRC!\Main.c !SRC_SRC!\Menu.c !SRC_SRC!\Process.c !SRC_SRC!\startup.c ^ 52 | !STM_SRC!\stm32f10x_nvic.c 53 | 54 | if exist *.elf del *.elf 55 | if exist *.hex del *.hex 56 | if exist *.bin del *.bin 57 | 58 | echo Compiling... 59 | if not exist !INTERMEDIATE! mkdir !INTERMEDIATE! 60 | cd !INTERMEDIATE! 61 | !CC! !AFLAGS! -c !STM_ASM!\cortexm3_macro.s -o cortexm3_macro.o 62 | !CC! !AFLAGS! -c !SRC_ASM!\bios.S -o bios.o 63 | !CC! !CFLAGS! -c !SRCS! 64 | 65 | echo Linking... 66 | !CC! -o !TFILE!_!APP!.elf !LDFLAGS! -T !SRC_LDS!\app!APP!.lds !OBJS! 67 | !OBJCOPY! -O binary !TFILE!_!APP!.elf !TFILE!.bin 68 | !OBJCOPY! -O ihex !TFILE!_!APP!.elf !TFILE!.hex 69 | 70 | rem del *.d *.o 71 | 72 | if not exist !TFILE!.hex ( 73 | echo Build failed 74 | goto :eof 75 | ) else ( 76 | echo Build succeed ! 77 | ) 78 | 79 | if not exist !TARGET! ( 80 | echo Target device not ready 81 | goto :eof 82 | ) 83 | 84 | if exist !TARGET!\*.WPT ( 85 | echo Please start the device in DFU mode 86 | echo ^(Hold the first button while powering on^) 87 | goto :eof 88 | ) 89 | 90 | Echo Downloading... 91 | copy !TFILE!.hex !TARGET!!TFILE!.hex 92 | 93 | rem del *.elf *.hex *.bin 94 | Echo Waiting for the device... 95 | :loop 96 | if exist !TARGET!!TFILE!.not ( 97 | echo Failed to download 98 | goto :eof 99 | ) 100 | if exist !TARGET!!TFILE!.rdy ( 101 | echo Download ok 102 | goto :eof 103 | ) 104 | goto loop 105 | 106 | :CheckSpaces 107 | if not %1=="%2" ( 108 | echo. 109 | echo Your current path contains spaces, it can cause some problems... 110 | pause 111 | ) 112 | --------------------------------------------------------------------------------