├── util ├── connect.jlink ├── flash.jlink ├── mass-erase.jlink ├── jlink_flashloader │ ├── Holtek │ │ ├── FlashLoader_HT32F1654.elf │ │ └── FlashLoader_HT32F1655.elf │ ├── FlashLoader_HT32 │ │ ├── MemoryMap.xml │ │ ├── Placement_release.xml │ │ ├── Placement_debug.xml │ │ ├── Src │ │ │ ├── FlashDev_HT32F1654.c │ │ │ ├── FlashDev_HT32F1655.c │ │ │ ├── FlashOS.h │ │ │ ├── Cortex_M_Startup.s │ │ │ ├── main.c │ │ │ ├── thumb_crt0.s │ │ │ └── FlashPrg.c │ │ └── FlashLoader_HT32.emProject │ ├── README.md │ └── JLinkDevices.xml ├── version-erase1654.jlink ├── version-erase1655.jlink ├── Makefile.tmk_pok3r_rgb ├── Makefile.tmk_pok3r ├── Makefile.tmk_vortex_core ├── Makefile.app_pok3r └── Makefile.app_vortex_core ├── led_pok3r.c ├── led_vortex_core.c ├── boards ├── CYKB175_V03 │ ├── board.mk │ ├── board.c │ └── board.h ├── CYKB167_D_V03 │ ├── board.mk │ ├── board.c │ └── board.h └── VORTEX_DUAL_60 │ ├── board.mk │ ├── board.h │ └── board.c ├── .gitignore ├── README.md ├── .gitmodules ├── apps ├── pok3r_app.sym ├── vortex_core_app.sym ├── gd25q_flash.h ├── vortex_core_main.c └── pok3r_main.c ├── matrix_pok3r.c ├── matrix_vortex_core.c ├── Makefile ├── config.h ├── mcuconf.h ├── keymap_pok3r.c ├── keymap_vortex_core.c ├── keymap_common.h ├── CMakeLists.txt ├── halconf.h └── chconf.h /util/connect.jlink: -------------------------------------------------------------------------------- 1 | 2 | si SWD 3 | speed 4000 4 | connect 5 | rsettype 2 6 | 7 | mem32 0 4 8 | 9 | -------------------------------------------------------------------------------- /led_pok3r.c: -------------------------------------------------------------------------------- 1 | #include "hal.h" 2 | #include "led.h" 3 | 4 | void led_set(uint8_t usb_led){ 5 | 6 | } 7 | -------------------------------------------------------------------------------- /led_vortex_core.c: -------------------------------------------------------------------------------- 1 | #include "hal.h" 2 | #include "led.h" 3 | 4 | void led_set(uint8_t usb_led){ 5 | 6 | } 7 | -------------------------------------------------------------------------------- /util/flash.jlink: -------------------------------------------------------------------------------- 1 | 2 | si SWD 3 | speed 4000 4 | connect 5 | rsettype 2 6 | 7 | loadbin .tmp.bin 0x0 8 | rx 100 9 | 10 | q 11 | 12 | -------------------------------------------------------------------------------- /util/mass-erase.jlink: -------------------------------------------------------------------------------- 1 | 2 | si SWD 3 | speed 4000 4 | connect 5 | rsettype 2 6 | 7 | w4 0x4008000C 0xA 8 | w4 0x40080010 0x14 9 | rx 100 10 | 11 | q 12 | -------------------------------------------------------------------------------- /util/jlink_flashloader/Holtek/FlashLoader_HT32F1654.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pok3r-custom/tmk_pok3r/HEAD/util/jlink_flashloader/Holtek/FlashLoader_HT32F1654.elf -------------------------------------------------------------------------------- /util/jlink_flashloader/Holtek/FlashLoader_HT32F1655.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pok3r-custom/tmk_pok3r/HEAD/util/jlink_flashloader/Holtek/FlashLoader_HT32F1655.elf -------------------------------------------------------------------------------- /util/version-erase1654.jlink: -------------------------------------------------------------------------------- 1 | 2 | si SWD 3 | speed 4000 4 | connect 5 | rsettype 2 6 | 7 | w4 0x40080000 0x3000 8 | w4 0x4008000C 0x8 9 | w4 0x40080010 0x14 10 | rx 100 11 | 12 | q 13 | -------------------------------------------------------------------------------- /util/version-erase1655.jlink: -------------------------------------------------------------------------------- 1 | 2 | si SWD 3 | speed 4000 4 | connect 5 | rsettype 2 6 | 7 | w4 0x40080000 0x2800 8 | w4 0x4008000C 0x8 9 | w4 0x40080010 0x14 10 | rx 100 11 | 12 | q 13 | -------------------------------------------------------------------------------- /boards/CYKB175_V03/board.mk: -------------------------------------------------------------------------------- 1 | # List of all the board related files. 2 | BOARDSRC = $(CHIBIOS_CONTRIB)/../boards/CYKB175_V03/board.c 3 | 4 | # Required include directories 5 | BOARDINC = $(CHIBIOS_CONTRIB)/../boards/CYKB175_V03 6 | -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/MemoryMap.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | -------------------------------------------------------------------------------- /boards/CYKB167_D_V03/board.mk: -------------------------------------------------------------------------------- 1 | # List of all the board related files. 2 | BOARDSRC = $(CHIBIOS_CONTRIB)/../boards/CYKB167_D_V03/board.c 3 | 4 | # Required include directories 5 | BOARDINC = $(CHIBIOS_CONTRIB)/../boards/CYKB167_D_V03 6 | -------------------------------------------------------------------------------- /boards/VORTEX_DUAL_60/board.mk: -------------------------------------------------------------------------------- 1 | # List of all the board related files. 2 | BOARDSRC = $(CHIBIOS_CONTRIB)/../boards/VORTEX_DUAL_60/board.c 3 | 4 | # Required include directories 5 | BOARDINC = $(CHIBIOS_CONTRIB)/../boards/VORTEX_DUAL_60 6 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Build Files 2 | .dep 3 | build 4 | util/jlink_flashloader/FlashLoader_HT32/Output 5 | .tmp.bin 6 | 7 | # Editor Files 8 | *.swp 9 | *.kate-swp 10 | 11 | # IDE Files 12 | *.user 13 | *.user.* 14 | util/jlink_flashloader/FlashLoader_HT32/*.emSession 15 | util/jlink_flashloader/FlashLoader_HT32/*.jlink 16 | *.jdebug 17 | 18 | -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/Placement_release.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Vortex Keyboard Custom Firmware 2 | 3 | *Disclaimer: This project comes with no warranty, and may be used for free at your own risk. I do 4 | this in my free time for fun, as such there are no guarantees of progress or success.* 5 | 6 | For the reverse engineering effort on the original Vortex firmware and a tool to communicate 7 | with Vortex keyboards, see [pok3r_re_firmware](https://github.com/ChaoticConundrum/pok3r_re_firmware). 8 | 9 | # **WIP** 10 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "tmk_core"] 2 | path = tmk_core 3 | #url = https://github.com/tmk/tmk_core.git 4 | #url = ssh://veralez/git/tmk_core.git 5 | url = https://github.com/ChaoticConundrum/tmk_core.git 6 | 7 | [submodule "ChibiOS"] 8 | path = ChibiOS 9 | url = https://github.com/ChibiOS/ChibiOS.git 10 | 11 | [submodule "ChibiOS-Contrib"] 12 | path = ChibiOS-Contrib 13 | #url = https://github.com/ChibiOS/ChibiOS-Contrib.git 14 | #url = ssh://veralez/git/ChibiOS-Contrib.git 15 | url = https://github.com/ChaoticConundrum/ChibiOS-Contrib.git 16 | 17 | -------------------------------------------------------------------------------- /boards/CYKB167_D_V03/board.c: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #include "hal.h" 18 | 19 | /** 20 | * @brief Board-specific initialization code. 21 | * @todo Add your board-specific code, if any. 22 | */ 23 | void boardInit(void) { 24 | } 25 | -------------------------------------------------------------------------------- /boards/CYKB175_V03/board.c: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #include "hal.h" 18 | 19 | /** 20 | * @brief Board-specific initialization code. 21 | * @todo Add your board-specific code, if any. 22 | */ 23 | void boardInit(void) { 24 | } 25 | -------------------------------------------------------------------------------- /util/jlink_flashloader/README.md: -------------------------------------------------------------------------------- 1 | # JLink Holtek HT32 Flash Loader 2 | 3 | In this directory are the source files and binaries for an "Open Flashloader" flash loader for use with the SEGGER JLink software. 4 | This flash loader allows JLink software to write the internal flash of the HT32F1654 and HT32F1655 devices, and all or most other HT32Fxxxx devices with minor modifications to flash and RAM sizes. 5 | 6 | ## Usage 7 | 8 | Add the `` items in `JLinkDevices.xml` to your system `JLinkDevices.xml`, e.g. `/opt/SEGGER/JLink/JLinkDevices.xml`. 9 | 10 | Add the `Holtek` directory to the the `Devices` directory in your JLink install, e.g. `/opt/SEGGER/JLink/Devices`. 11 | 12 | ## Building 13 | 14 | Open the FlashLoader_HT32 solution (`FlashLoader_HT32.emProject`) with SEGGER Embedded Studio. Select the desired project, and build the Release configuration. The flash loader binares will be in `Output/Release/Exe`. 15 | -------------------------------------------------------------------------------- /util/jlink_flashloader/JLinkDevices.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | -------------------------------------------------------------------------------- /apps/pok3r_app.sym: -------------------------------------------------------------------------------- 1 | 2 | [code] 3 | 4 | * 2c04: reset 5 | * 2c08: nmi 6 | * 2c0c: hard_fault 7 | * 2c10: mcu_fault 8 | * 2c14: bus_fault 9 | * 2c18: usage_fault 10 | 11 | * 2c2c: svccall_intr 12 | * 2c30: debug_intr 13 | 14 | * 2c38: pendsv_intr 15 | * 2c3c: systick_intr 16 | * 2c40 17 | * 2c44 18 | * 2c48 19 | * 2c4c 20 | * 2c50 21 | * 2c54 22 | * 2c58 23 | * 2c5c 24 | * 2c60 25 | * 2c64 26 | * 2c68 27 | * 2c6c 28 | * 2c70 29 | * 2c74 30 | * 2c78 31 | * 2c7c 32 | * 2c80 33 | * 2c84 34 | * 2c88 35 | * 2c8c 36 | * 2c90 37 | * 2c94 38 | * 2c98 39 | * 2c9c 40 | * 2ca0 41 | * 2ca4 42 | 43 | * 2cac 44 | * 2cb0 45 | * 2cb4 46 | * 2cb8 47 | * 2cbc 48 | * 2cc0 49 | * 2cc4 50 | * 2cc8 51 | * 2ccc 52 | * 2cd0 53 | 54 | * 2ce4 55 | * 2ce8 56 | * 2cec 57 | * 2cf0 58 | * 2cf4 59 | * 2cf8 60 | * 2cfc 61 | * 2d00 62 | * 2d04 63 | * 2d08 64 | * 2d0c 65 | * 2d10 66 | * 2d14: usb_intr 67 | 68 | * 2d1c 69 | * 2d20 70 | * 2d24 71 | * 2d28 72 | * 2d2c 73 | * 2d30 74 | * 2d34 75 | * 2d38 76 | 77 | * 2d50 78 | 79 | [data] 80 | -------------------------------------------------------------------------------- /apps/vortex_core_app.sym: -------------------------------------------------------------------------------- 1 | 2 | [code] 3 | 4 | * 2c04: reset 5 | * 2c08: nmi 6 | * 2c0c: hard_fault 7 | * 2c10: mcu_fault 8 | * 2c14: bus_fault 9 | * 2c18: usage_fault 10 | 11 | * 2c2c: svccall_intr 12 | * 2c30: debug_intr 13 | 14 | * 2c38: pendsv_intr 15 | * 2c3c: systick_intr 16 | * 2c40 17 | * 2c44 18 | * 2c48 19 | * 2c4c 20 | * 2c50 21 | * 2c54 22 | * 2c58 23 | * 2c5c 24 | * 2c60 25 | * 2c64 26 | * 2c68 27 | * 2c6c 28 | * 2c70 29 | * 2c74 30 | * 2c78 31 | * 2c7c 32 | * 2c80 33 | * 2c84 34 | * 2c88 35 | * 2c8c 36 | * 2c90 37 | * 2c94 38 | * 2c98 39 | * 2c9c 40 | * 2ca0 41 | * 2ca4 42 | 43 | * 2cac 44 | * 2cb0 45 | * 2cb4 46 | * 2cb8 47 | * 2cbc 48 | * 2cc0 49 | * 2cc4 50 | * 2cc8 51 | * 2ccc 52 | * 2cd0 53 | 54 | * 2ce4 55 | * 2ce8 56 | * 2cec 57 | * 2cf0 58 | * 2cf4 59 | * 2cf8 60 | * 2cfc 61 | * 2d00 62 | * 2d04 63 | * 2d08 64 | * 2d0c 65 | * 2d10 66 | * 2d14: usb_intr 67 | 68 | * 2d1c 69 | * 2d20 70 | * 2d24 71 | * 2d28 72 | * 2d2c 73 | * 2d30 74 | * 2d34 75 | * 2d38 76 | 77 | * 2d50 78 | 79 | [data] 80 | -------------------------------------------------------------------------------- /matrix_pok3r.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include "hal.h" 5 | #include "timer.h" 6 | #include "wait.h" 7 | #include "print.h" 8 | #include "matrix.h" 9 | 10 | static matrix_row_t matrix[MATRIX_ROWS]; 11 | 12 | void matrix_init(void){ 13 | memset(matrix, 0, MATRIX_ROWS); 14 | } 15 | 16 | uint8_t matrix_scan(void){ 17 | 18 | return 1; 19 | } 20 | 21 | bool matrix_is_on(uint8_t row, uint8_t col){ 22 | return (matrix[row] & (1< 2 | #include 3 | #include 4 | #include "hal.h" 5 | #include "timer.h" 6 | #include "wait.h" 7 | #include "print.h" 8 | #include "matrix.h" 9 | 10 | static matrix_row_t matrix[MATRIX_ROWS]; 11 | 12 | void matrix_init(void){ 13 | memset(matrix, 0, MATRIX_ROWS); 14 | } 15 | 16 | uint8_t matrix_scan(void){ 17 | 18 | return 1; 19 | } 20 | 21 | bool matrix_is_on(uint8_t row, uint8_t col){ 22 | return (matrix[row] & (1< 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | -------------------------------------------------------------------------------- /config.h: -------------------------------------------------------------------------------- 1 | #ifndef CONFIG_H 2 | #define CONFIG_H 3 | 4 | /* USB Device descriptor parameter */ 5 | #define VENDOR_ID 0xFEED 6 | #define PRODUCT_ID 0x0141 7 | #define DEVICE_VER 0x0001 8 | 9 | #define MANUFACTURER "TMK" 10 | #define USBSTR_MANUFACTURER 'T','\x00', 'M','\x00', 'K','\x00', ' ','\x00' 11 | #define PRODUCT "POK3R/TMK" 12 | #define USBSTR_PRODUCT 'P','\x00', 'O','\x00', 'K','\x00', '3','\x00', 'R','\x00', ' ','\x00' 13 | #define DESCRIPTION "Vortex POK3R with TMK" 14 | 15 | /* key matrix size */ 16 | #define MATRIX_ROWS 9 17 | #define MATRIX_COLS 7 18 | 19 | /* define if matrix has ghost */ 20 | //#define MATRIX_HAS_GHOST 21 | 22 | // features 23 | //#define NKRO_ENABLE 24 | //#define MOUSE_ENABLE 25 | 26 | /* Set 0 if debouncing isn't needed */ 27 | #define DEBOUNCE 5 28 | 29 | /* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */ 30 | //#define LOCKING_SUPPORT_ENABLE 31 | /* Locking resynchronize hack */ 32 | //#define LOCKING_RESYNC_ENABLE 33 | 34 | /* key combination for command */ 35 | #define IS_COMMAND() ( \ 36 | keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \ 37 | ) 38 | 39 | /* 40 | * Feature disable options 41 | * These options are also useful to firmware size reduction. 42 | */ 43 | 44 | /* disable debug print */ 45 | //#define NO_DEBUG 46 | 47 | /* disable print */ 48 | //#define NO_PRINT 49 | 50 | /* disable action features */ 51 | //#define NO_ACTION_LAYER 52 | //#define NO_ACTION_TAPPING 53 | //#define NO_ACTION_ONESHOT 54 | //#define NO_ACTION_MACRO 55 | //#define NO_ACTION_FUNCTION 56 | 57 | #endif 58 | -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/Src/FlashDev_HT32F1654.c: -------------------------------------------------------------------------------- 1 | /********************************************************************* 2 | * (c) SEGGER Microcontroller GmbH & Co. KG * 3 | * The Embedded Experts * 4 | * www.segger.com * 5 | ********************************************************************** 6 | ---------------------------------------------------------------------- 7 | File : FlashDev.c 8 | Purpose : Flash device description Template 9 | -------- END-OF-HEADER --------------------------------------------- 10 | */ 11 | 12 | #include "FlashOS.h" 13 | 14 | struct FlashDevice const FlashDevice __attribute__ ((section ("DevDscr"))) = { 15 | ALGO_VERSION, // Algo version 16 | "Internal flash", // Flash device name 17 | ONCHIP, // Flash device type 18 | 0x00000000, // Flash base address 19 | 0x0000FC00, // Total flash device size in Bytes (128 KB) 20 | 4, // Page Size (number of bytes that will be passed to ProgramPage(). May be multiple of min alignment in order to reduce overhead for calling ProgramPage multiple times 21 | 0, // Reserved, should be 0 22 | 0xFF, // Flash erased value 23 | 100, // Program page timeout in ms 24 | 100, // Erase sector timeout in ms 25 | // 26 | // Flash sector layout definition 27 | // 28 | 0x00000400, 0x00000000, // 128 * 1 KB = 128 KB 29 | 0xFFFFFFFF, 0xFFFFFFFF // Indicates the end of the flash sector layout. Must be present. 30 | }; -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/Src/FlashDev_HT32F1655.c: -------------------------------------------------------------------------------- 1 | /********************************************************************* 2 | * (c) SEGGER Microcontroller GmbH & Co. KG * 3 | * The Embedded Experts * 4 | * www.segger.com * 5 | ********************************************************************** 6 | ---------------------------------------------------------------------- 7 | File : FlashDev.c 8 | Purpose : Flash device description Template 9 | -------- END-OF-HEADER --------------------------------------------- 10 | */ 11 | 12 | #include "FlashOS.h" 13 | 14 | struct FlashDevice const FlashDevice __attribute__ ((section ("DevDscr"))) = { 15 | ALGO_VERSION, // Algo version 16 | "Internal flash", // Flash device name 17 | ONCHIP, // Flash device type 18 | 0x00000000, // Flash base address 19 | 0x00020000, // Total flash device size in Bytes (128 KB) 20 | 4, // Page Size (number of bytes that will be passed to ProgramPage(). May be multiple of min alignment in order to reduce overhead for calling ProgramPage multiple times 21 | 0, // Reserved, should be 0 22 | 0xFF, // Flash erased value 23 | 100, // Program page timeout in ms 24 | 100, // Erase sector timeout in ms 25 | // 26 | // Flash sector layout definition 27 | // 28 | 0x00000400, 0x00000000, // 128 * 1 KB = 128 KB 29 | 0xFFFFFFFF, 0xFFFFFFFF // Indicates the end of the flash sector layout. Must be present. 30 | }; -------------------------------------------------------------------------------- /mcuconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #ifndef _MCUCONF_H_ 18 | #define _MCUCONF_H_ 19 | 20 | #include "nvic.h" 21 | 22 | #define HT32_MCUCONF 23 | 24 | /* 25 | * HAL driver system settings. 26 | */ 27 | 28 | // External 8MHz crystal with internal PLL for 72MHz system clock 29 | #define HT32_HSE_FREQUENCY 8000000UL // 8 MHz 30 | #define HT32_PLL_FBDIV 18 31 | #define HT32_CK_SYS_FREQUENCY HT32_HSE_FREQUENCY * HT32_PLL_FBDIV // 144 MHz 32 | #define HT32_AHB_PRESCALER 2 33 | #define HT32_CK_AHB_FREQUENCY HT32_CK_SYS_FREQUENCY / HT32_AHB_PRESCALER // 72 MHz 34 | #define HT32_USB_PRESCALER 3 35 | 36 | #if defined(HT32F1656) 37 | #define HT32_STCLK_FREQUENCY HT32_CK_AHB_FREQUENCY / 1 // 72 MHz 38 | #else 39 | #define HT32_STCLK_FREQUENCY HT32_CK_AHB_FREQUENCY / 1 // 9 MHz 40 | #endif 41 | 42 | /* 43 | * USB driver settings 44 | */ 45 | 46 | #define HT32_USB_USE_USB0 TRUE 47 | #define HT32_USB_USB0_IRQ_PRIORITY 5 48 | 49 | #endif /* _MCUCONF_H_ */ 50 | -------------------------------------------------------------------------------- /util/Makefile.tmk_pok3r_rgb: -------------------------------------------------------------------------------- 1 | # Target file name (without extension). 2 | PROJECT = tmk_pok3r_rgb 3 | 4 | # Directory common source files exist 5 | TMK_DIR = tmk_core 6 | 7 | # ChibiOS directory 8 | CHIBIOS = ChibiOS 9 | 10 | # ChibiOS-Contrib directory 11 | CHIBIOS_CONTRIB = ChibiOS-Contrib 12 | 13 | # Directory keyboard dependent files exist 14 | TARGET_DIR = . 15 | 16 | # project specific files 17 | SRC = matrix_pok3r_rgb.c \ 18 | led_pok3r_rgb.c \ 19 | keymap_pok3r_rgb.c 20 | 21 | CONFIG_H = config.h 22 | 23 | ## chip/board settings 24 | # - the next two should match the directories in 25 | # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) 26 | MCU_FAMILY = HT32 27 | MCU_SERIES = HT32F165x 28 | 29 | # Linker script to use 30 | # - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ 31 | # or /ld/ 32 | MCU_LDSCRIPT = HT32F1654 33 | 34 | # Startup code to use 35 | # - it should exist in /os/common/ports/ARMCMx/compilers/GCC/mk/ 36 | MCU_STARTUP = ht32f165x 37 | 38 | # Board: it should exist either in /os/hal/boards/ 39 | # or /boards 40 | BOARD = CYKB167_D_V03 41 | 42 | # Cortex version 43 | MCU = cortex-m3 44 | 45 | # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 46 | ARMV = 7 47 | 48 | # Vector table for application 49 | # 0x00000000-0x00001000 area is occupied by bootlaoder.*/ 50 | # The CORTEX_VTOR... is needed only for MCHCK/Infinity KB 51 | #OPT_DEFS = -DCORTEX_VTOR_INIT=0x00001000 52 | 53 | # Build Options 54 | # comment out to disable the options. 55 | # 56 | BOOTMAGIC_ENABLE = yes # Virtual DIP switch configuration 57 | ## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.) 58 | MOUSEKEY_ENABLE = yes # Mouse keys 59 | EXTRAKEY_ENABLE = yes # Audio control and System control 60 | CONSOLE_ENABLE = yes # Console for debug 61 | COMMAND_ENABLE = yes # Commands for debug and configuration 62 | SLEEP_LED_ENABLE = yes # Breathing sleep LED during USB suspend 63 | NKRO_ENABLE = yes # USB Nkey Rollover 64 | 65 | include $(TMK_DIR)/tool/chibios/common.mk 66 | include $(TMK_DIR)/tool/chibios/chibios.mk 67 | 68 | program: $(BUILDDIR)/$(PROJECT).bin 69 | dfu-util -D $(BUILDDIR)/$(PROJECT).bin 70 | 71 | -------------------------------------------------------------------------------- /util/Makefile.tmk_pok3r: -------------------------------------------------------------------------------- 1 | # Target file name (without extension). 2 | PROJECT = tmk_pok3r 3 | 4 | # Directory common source files exist 5 | TMK_DIR = tmk_core 6 | 7 | # ChibiOS directory 8 | CHIBIOS = ChibiOS 9 | 10 | # ChibiOS-Contrib directory 11 | CHIBIOS_CONTRIB = ChibiOS-Contrib 12 | 13 | # Directory keyboard dependent files exist 14 | TARGET_DIR = . 15 | 16 | # project specific files 17 | SRC = matrix_pok3r.c \ 18 | led_pok3r.c \ 19 | keymap_pok3r.c 20 | 21 | CONFIG_H = config.h 22 | 23 | ## chip/board settings 24 | # - the next two should match the directories in 25 | # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) 26 | MCU_FAMILY = HT32 27 | MCU_SERIES = HT32F165x 28 | 29 | # Linker script to use 30 | # - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ 31 | # or /ld/ 32 | MCU_LDSCRIPT = HT32F1655 33 | 34 | # Startup code to use 35 | # - it should exist in /os/common/ports/ARMCMx/compilers/GCC/mk/ 36 | MCU_STARTUP = ht32f165x 37 | 38 | # Board: it should exist either in /os/hal/boards/ 39 | # or /boards 40 | BOARD = VORTEX_DUAL_60 41 | 42 | # Cortex version 43 | MCU = cortex-m3 44 | 45 | # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 46 | ARMV = 7 47 | 48 | # Vector table for application 49 | # 0x00000000-0x00001000 area is occupied by bootlaoder.*/ 50 | # The CORTEX_VTOR... is needed only for MCHCK/Infinity KB 51 | #OPT_DEFS = -DCORTEX_VTOR_INIT=0x00001000 52 | OPT_DEFS = 53 | 54 | # Build Options 55 | # comment out to disable the options. 56 | # 57 | BOOTMAGIC_ENABLE = yes # Virtual DIP switch configuration 58 | ## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.) 59 | MOUSEKEY_ENABLE = yes # Mouse keys 60 | EXTRAKEY_ENABLE = yes # Audio control and System control 61 | #CONSOLE_ENABLE = yes # Console for debug 62 | COMMAND_ENABLE = yes # Commands for debug and configuration 63 | #SLEEP_LED_ENABLE = yes # Breathing sleep LED during USB suspend 64 | NKRO_ENABLE = yes # USB Nkey Rollover 65 | 66 | include $(TMK_DIR)/tool/chibios/common.mk 67 | include $(TMK_DIR)/tool/chibios/chibios.mk 68 | 69 | program: $(BUILDDIR)/$(PROJECT).bin 70 | dfu-util -D $(BUILDDIR)/$(PROJECT).bin 71 | 72 | -------------------------------------------------------------------------------- /util/Makefile.tmk_vortex_core: -------------------------------------------------------------------------------- 1 | # Target file name (without extension). 2 | PROJECT = tmk_vortex_core 3 | 4 | # Directory common source files exist 5 | TMK_DIR = tmk_core 6 | 7 | # ChibiOS directory 8 | CHIBIOS = ChibiOS 9 | 10 | # ChibiOS-Contrib directory 11 | CHIBIOS_CONTRIB = ChibiOS-Contrib 12 | 13 | # Directory keyboard dependent files exist 14 | TARGET_DIR = . 15 | 16 | # project specific files 17 | SRC = matrix_vortex_core.c \ 18 | led_vortex_core.c \ 19 | keymap_vortex_core.c 20 | 21 | CONFIG_H = config.h 22 | 23 | ## chip/board settings 24 | # - the next two should match the directories in 25 | # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) 26 | MCU_FAMILY = HT32 27 | MCU_SERIES = HT32F165x 28 | 29 | # Linker script to use 30 | # - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ 31 | # or /ld/ 32 | MCU_LDSCRIPT = HT32F1654 33 | 34 | # Startup code to use 35 | # - it should exist in /os/common/ports/ARMCMx/compilers/GCC/mk/ 36 | MCU_STARTUP = ht32f165x 37 | 38 | # Board: it should exist either in /os/hal/boards/ 39 | # or /boards 40 | BOARD = CYKB175_V03 41 | 42 | # Cortex version 43 | MCU = cortex-m3 44 | 45 | # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 46 | ARMV = 7 47 | 48 | # Vector table for application 49 | # 0x00000000-0x00001000 area is occupied by bootlaoder.*/ 50 | # The CORTEX_VTOR... is needed only for MCHCK/Infinity KB 51 | #OPT_DEFS = -DCORTEX_VTOR_INIT=0x00001000 52 | OPT_DEFS = 53 | 54 | # Build Options 55 | # comment out to disable the options. 56 | # 57 | BOOTMAGIC_ENABLE = yes # Virtual DIP switch configuration 58 | ## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.) 59 | MOUSEKEY_ENABLE = yes # Mouse keys 60 | EXTRAKEY_ENABLE = yes # Audio control and System control 61 | #CONSOLE_ENABLE = yes # Console for debug 62 | COMMAND_ENABLE = yes # Commands for debug and configuration 63 | #SLEEP_LED_ENABLE = yes # Breathing sleep LED during USB suspend 64 | NKRO_ENABLE = yes # USB Nkey Rollover 65 | 66 | include $(TMK_DIR)/tool/chibios/common.mk 67 | include $(TMK_DIR)/tool/chibios/chibios.mk 68 | 69 | program: $(BUILDDIR)/$(PROJECT).bin 70 | dfu-util -D $(BUILDDIR)/$(PROJECT).bin 71 | 72 | -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/Src/FlashOS.h: -------------------------------------------------------------------------------- 1 | /********************************************************************* 2 | * (c) SEGGER Microcontroller GmbH & Co. KG * 3 | * The Embedded Experts * 4 | * www.segger.com * 5 | ********************************************************************** 6 | */ 7 | 8 | #define U8 unsigned char 9 | #define U16 unsigned short 10 | #define U32 unsigned long 11 | 12 | #define I8 signed char 13 | #define I16 signed short 14 | #define I32 signed long 15 | 16 | #define ONCHIP (1) // On-chip Flash Memory 17 | 18 | #define MAX_NUM_SECTORS (512) // Max. number of sectors, must not be modified. 19 | #define ALGO_VERSION (0x0101) // Algo version, must not be modified. 20 | 21 | struct SECTOR_INFO { 22 | U32 SectorSize; // Sector Size in bytes 23 | U32 SectorStartAddr; // Start address of the sector area (relative to the "BaseAddr" of the flash) 24 | }; 25 | 26 | struct FlashDevice { 27 | U16 AlgoVer; // Algo version number 28 | U8 Name[128]; // Flash device name 29 | U16 Type; // Flash device type 30 | U32 BaseAddr; // Flash base address 31 | U32 TotalSize; // Total flash device size in Bytes (256 KB) 32 | U32 PageSize; // Page Size (number of bytes that will be passed to ProgramPage(). MinAlig is 8 byte 33 | U32 Reserved; // Reserved, should be 0 34 | U8 ErasedVal; // Flash erased value 35 | U32 TimeoutProg; // Program page timeout in ms 36 | U32 TimeoutErase; // Erase sector timeout in ms 37 | struct SECTOR_INFO SectorInfo[MAX_NUM_SECTORS]; // Flash sector layout definition 38 | }; 39 | 40 | // 41 | // Flash module functions 42 | // 43 | extern int Init (U32 Addr, U32 Freq, U32 Func); 44 | extern int UnInit (U32 Func); 45 | extern int BlankCheck (U32 Addr, U32 NumBytes, U8 BlankData); 46 | extern int EraseChip (void); 47 | extern int EraseSector (U32 Addr); 48 | extern int ProgramPage (U32 Addr, U32 NumBytes, U8 *pSrcBuff); 49 | extern U32 Verify (U32 Addr, U32 NumBytes, U8 *pSrcBuff); 50 | 51 | // 52 | // SEGGER defined functions 53 | // 54 | extern int SEGGER_OPEN_Read (U32 Addr, U32 NumBytes, U8 *pDestBuff); -------------------------------------------------------------------------------- /keymap_pok3r.c: -------------------------------------------------------------------------------- 1 | #include "keymap_common.h" 2 | 3 | const uint8_t keymaps[][MATRIX_ROWS][MATRIX_COLS] = { 4 | /* Layer 0: Default Layer 5 | * ,-----------------------------------------------------------. 6 | * |Esc| 1| 2| 3| 4| 5| 6| 7| 8| 9| 0| -| =| `|BSp| 7 | * |-----------------------------------------------------------| 8 | * |Tab | Q| W| E| R| T| Y| U| I| O| P| [| ]| \| 9 | * |-----------------------------------------------------------| 10 | * |Contro| A| S| D| F| G| H| J| K| L| ;| '|Enter | 11 | * |-----------------------------------------------------------| 12 | * |Shift | Z| X| C| V| B| N| M| ,| .| /|Shift |Fn0| 13 | * |-----------------------------------------------------------' 14 | * | |Gui|Alt | Space |Alt |Gui| | | 15 | * `-----------------------------------------------------------' 16 | */ 17 | [0] = 18 | KEYMAP(ESC, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, MINS,EQL, BSLS, GRV, \ 19 | TAB, Q, W, E, R, T, Y, U, I, O, P, LBRC,RBRC,BSPC, \ 20 | LCTL,A, S, D, F, G, H, J, K, L, SCLN,QUOT,ENT, \ 21 | LSFT,Z, X, C, V, B, N, M, COMM,DOT, SLSH,RSFT,FN0, \ 22 | NO, LGUI,LALT, SPC, RALT,RGUI,NO, NO), 23 | 24 | /* Layer 1: HHKB mode (HHKB Fn) 25 | * ,-----------------------------------------------------------. 26 | * |Pwr| F1| F2| F3| F4| F5| F6| F7| F8| F9|F10|F11|F12|Ins|Del| 27 | * |-----------------------------------------------------------| 28 | * |Caps | | | | | | | |Psc|Slk|Pus|Up | |Backs| 29 | * |-----------------------------------------------------------| 30 | * | |VoD|VoU|Mut| | | *| /|Hom|PgU|Lef|Rig|Enter | 31 | * |-----------------------------------------------------------| 32 | * | | | | | | | +| -|End|PgD|Dow| | | 33 | * `-----------------------------------------------------------' 34 | * | |Gui|Alt | Space |Alt |Gui| | | 35 | * `-----------------------------------------------------------' 36 | */ 37 | [1] = 38 | KEYMAP(PWR, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, INS, DEL, \ 39 | CAPS,TRNS,TRNS,TRNS,TRNS,TRNS,TRNS,TRNS,PSCR,SLCK,PAUS, UP, TRNS, BSPC, \ 40 | TRNS,VOLD,VOLU,MUTE,TRNS,TRNS,PAST,PSLS,HOME,PGUP,LEFT,RGHT,PENT, \ 41 | TRNS,TRNS,TRNS,TRNS,TRNS,TRNS,PPLS,PMNS,END, PGDN,DOWN,TRNS,TRNS, \ 42 | TRNS,TRNS,TRNS, TRNS, TRNS,TRNS,TRNS,TRNS), 43 | }; 44 | 45 | const action_t fn_actions[] = { 46 | [0] = ACTION_LAYER_MOMENTARY(1), 47 | }; 48 | 49 | -------------------------------------------------------------------------------- /keymap_vortex_core.c: -------------------------------------------------------------------------------- 1 | #include "keymap_common.h" 2 | 3 | const uint8_t keymaps[][MATRIX_ROWS][MATRIX_COLS] = { 4 | /* Layer 0: Default Layer 5 | * ,-----------------------------------------------------------. 6 | * |Esc| 1| 2| 3| 4| 5| 6| 7| 8| 9| 0| -| =| `|BSp| 7 | * |-----------------------------------------------------------| 8 | * |Tab | Q| W| E| R| T| Y| U| I| O| P| [| ]| \| 9 | * |-----------------------------------------------------------| 10 | * |Contro| A| S| D| F| G| H| J| K| L| ;| '|Enter | 11 | * |-----------------------------------------------------------| 12 | * |Shift | Z| X| C| V| B| N| M| ,| .| /|Shift |Fn0| 13 | * |-----------------------------------------------------------' 14 | * | |Gui|Alt | Space |Alt |Gui| | | 15 | * `-----------------------------------------------------------' 16 | */ 17 | [0] = 18 | KEYMAP(ESC, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, MINS,EQL, BSLS, GRV, \ 19 | TAB, Q, W, E, R, T, Y, U, I, O, P, LBRC,RBRC,BSPC, \ 20 | LCTL,A, S, D, F, G, H, J, K, L, SCLN,QUOT,ENT, \ 21 | LSFT,Z, X, C, V, B, N, M, COMM,DOT, SLSH,RSFT,FN0, \ 22 | NO, LGUI,LALT, SPC, RALT,RGUI,NO, NO), 23 | 24 | /* Layer 1: HHKB mode (HHKB Fn) 25 | * ,-----------------------------------------------------------. 26 | * |Pwr| F1| F2| F3| F4| F5| F6| F7| F8| F9|F10|F11|F12|Ins|Del| 27 | * |-----------------------------------------------------------| 28 | * |Caps | | | | | | | |Psc|Slk|Pus|Up | |Backs| 29 | * |-----------------------------------------------------------| 30 | * | |VoD|VoU|Mut| | | *| /|Hom|PgU|Lef|Rig|Enter | 31 | * |-----------------------------------------------------------| 32 | * | | | | | | | +| -|End|PgD|Dow| | | 33 | * `-----------------------------------------------------------' 34 | * | |Gui|Alt | Space |Alt |Gui| | | 35 | * `-----------------------------------------------------------' 36 | */ 37 | [1] = 38 | KEYMAP(PWR, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, INS, DEL, \ 39 | CAPS,TRNS,TRNS,TRNS,TRNS,TRNS,TRNS,TRNS,PSCR,SLCK,PAUS, UP, TRNS, BSPC, \ 40 | TRNS,VOLD,VOLU,MUTE,TRNS,TRNS,PAST,PSLS,HOME,PGUP,LEFT,RGHT,PENT, \ 41 | TRNS,TRNS,TRNS,TRNS,TRNS,TRNS,PPLS,PMNS,END, PGDN,DOWN,TRNS,TRNS, \ 42 | TRNS,TRNS,TRNS, TRNS, TRNS,TRNS,TRNS,TRNS), 43 | }; 44 | 45 | const action_t fn_actions[] = { 46 | [0] = ACTION_LAYER_MOMENTARY(1), 47 | }; 48 | 49 | -------------------------------------------------------------------------------- /boards/VORTEX_DUAL_60/board.c: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #include "ch.h" 18 | #include "hal.h" 19 | 20 | #if HAL_USE_PAL || defined(__DOXYGEN__) 21 | /** 22 | * @brief PAL setup. 23 | * @details Digital I/O ports static configuration as defined in @p board.h. 24 | * This variable is used by the HAL when initializing the PAL driver. 25 | */ 26 | const PALConfig pal_default_config = { 27 | 28 | }; 29 | 30 | #endif 31 | 32 | #define FIRMWARE_ADDR 0x2c00 33 | 34 | void nvic_set_vtor(uint32_t addr){ 35 | addr &= 0x1fffff80; 36 | SCB->VTOR = addr; 37 | } 38 | 39 | /** 40 | * @brief Board-specific initialization code. 41 | * @todo Add your board-specific code, if any. 42 | */ 43 | void boardInit(void) { 44 | // NVIC 45 | nvic_set_vtor(FIRMWARE_ADDR); 46 | 47 | // CKCU 48 | CKCU->LPCR = CKCU_LPCR_BKISO; // Backup domain 49 | CKCU->APBCCR1 = CKCU_APBCCR1_BKPREN; // Backup domain register access 50 | 51 | CKCU->AHBCFGR = 1; // Set AHB prescaler (CK_AHB = CK_SYS / 2) 52 | 53 | // PLL 54 | CKCU->GCCR |= CKCU_GCCR_HSEEN; // HSE enable 55 | CKCU->GCFGR &= ~CKCU_GCFGR_PLLSRC; // PLL source HSE 56 | //CKCU->GCFGR |= CKCU_GCFGR_PLLSRC; // PLL source HSI 57 | CKCU->PLLCFGR |= 18 << 23; // PLL feedback divider = 18 58 | CKCU->PLLCFGR &= CKCU_PLLCFGR_POTD_MASK; // PLL output divider = 1 59 | 60 | CKCU->GCCR |= CKCU_GCCR_PLLEN; // PLL enable 61 | 62 | while(CKCU->GCSR & CKCU_GCSR_PLLRDY == 0); // wait for PLL 63 | 64 | // system clock 65 | CKCU->GCCR &= ~CKCU_GCCR_SW_MASK; // set clock source to PLL 66 | while(CKCU->CKST & CKCU_CKST_CKSWST_MASK != 0); // wait for clock switch 67 | 68 | // while((REG_CKCU->CKST.HSEST & 2) == 0); // check HSE in use 69 | // while((REG_CKCU->CKST.PLLST & 1) == 0); // check PLL in use 70 | 71 | // while(REG_CKCU->CKST.HSIST != 0); // check HSI not in use 72 | // REG_CKCU->GCCR.HSIEN = 0; // HSI disable 73 | 74 | // REG_CKCU->AHBCCR.FMCEN = 1; 75 | FMC->CFCR = (FMC->CFCR & ~FMC_CFCR_WAIT_MASK) | FMC_CFCR_WAIT_2; // Flash wait status 2 (48MHz <= HCLK <= 72MHz) 76 | } 77 | -------------------------------------------------------------------------------- /keymap_common.h: -------------------------------------------------------------------------------- 1 | /* 2 | Copyright 2014 Jun Wako 3 | 4 | This program is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 2 of the License, or 7 | (at your option) any later version. 8 | 9 | This program is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | 14 | You should have received a copy of the GNU General Public License 15 | along with this program. If not, see . 16 | */ 17 | #ifndef KEYMAP_COMMON_H 18 | #define KEYMAP_COMMON_H 19 | 20 | #include 21 | #include 22 | #include "keycode.h" 23 | #include "action.h" 24 | #include "action_macro.h" 25 | #include "action_util.h" 26 | #include "report.h" 27 | #include "host.h" 28 | #include "print.h" 29 | #include "debug.h" 30 | #include "keymap.h" 31 | 32 | 33 | #ifdef INFINITY_PROTOTYPE 34 | 35 | /* Infinity prototype */ 36 | #define KEYMAP( \ 37 | K00, K10, K20, K30, K40, K50, K60, K70, K80, K01, K11, K21, K31, K41, K86, \ 38 | K51, K61, K71, K81, K02, K12, K22, K32, K42, K52, K62, K72, K82, K03, \ 39 | K13, K23, K33, K43, K53, K63, K73, K83, K04, K14, K24, K34, K44, \ 40 | K54, K64, K74, K84, K05, K15, K25, K35, K45, K55, K65, K75, K85, \ 41 | K06, K16, K26, K36, K46, K56, K66, K76 \ 42 | ) { \ 43 | { KC_##K00, KC_##K01, KC_##K02, KC_##K03, KC_##K04, KC_##K05, KC_##K06 }, \ 44 | { KC_##K10, KC_##K11, KC_##K12, KC_##K13, KC_##K14, KC_##K15, KC_##K16 }, \ 45 | { KC_##K20, KC_##K21, KC_##K22, KC_##K23, KC_##K24, KC_##K25, KC_##K26 }, \ 46 | { KC_##K30, KC_##K31, KC_##K32, KC_##K33, KC_##K34, KC_##K35, KC_##K36 }, \ 47 | { KC_##K40, KC_##K41, KC_##K42, KC_##K43, KC_##K44, KC_##K45, KC_##K46 }, \ 48 | { KC_##K50, KC_##K51, KC_##K52, KC_##K53, KC_##K54, KC_##K55, KC_##K56 }, \ 49 | { KC_##K60, KC_##K61, KC_##K62, KC_##K63, KC_##K64, KC_##K65, KC_##K66 }, \ 50 | { KC_##K70, KC_##K71, KC_##K72, KC_##K73, KC_##K74, KC_##K75, KC_##K76 }, \ 51 | { KC_##K80, KC_##K81, KC_##K82, KC_##K83, KC_##K84, KC_##K85, KC_##K86 } \ 52 | } 53 | 54 | #else 55 | 56 | /* Infinity production */ 57 | #define KEYMAP( \ 58 | K00, K10, K20, K30, K40, K50, K60, K70, K80, K01, K11, K21, K31, K41, K51, \ 59 | K61, K71, K81, K02, K12, K22, K32, K42, K52, K62, K72, K82, K03, K13, \ 60 | K23, K33, K43, K53, K63, K73, K83, K04, K14, K24, K34, K44, K54, \ 61 | K64, K74, K84, K05, K15, K25, K35, K45, K55, K65, K75, K85, K06, \ 62 | K16, K26, K36, K46, K56, K66, K76, K86 \ 63 | ) { \ 64 | { KC_##K00, KC_##K01, KC_##K02, KC_##K03, KC_##K04, KC_##K05, KC_##K06 }, \ 65 | { KC_##K10, KC_##K11, KC_##K12, KC_##K13, KC_##K14, KC_##K15, KC_##K16 }, \ 66 | { KC_##K20, KC_##K21, KC_##K22, KC_##K23, KC_##K24, KC_##K25, KC_##K26 }, \ 67 | { KC_##K30, KC_##K31, KC_##K32, KC_##K33, KC_##K34, KC_##K35, KC_##K36 }, \ 68 | { KC_##K40, KC_##K41, KC_##K42, KC_##K43, KC_##K44, KC_##K45, KC_##K46 }, \ 69 | { KC_##K50, KC_##K51, KC_##K52, KC_##K53, KC_##K54, KC_##K55, KC_##K56 }, \ 70 | { KC_##K60, KC_##K61, KC_##K62, KC_##K63, KC_##K64, KC_##K65, KC_##K66 }, \ 71 | { KC_##K70, KC_##K71, KC_##K72, KC_##K73, KC_##K74, KC_##K75, KC_##K76 }, \ 72 | { KC_##K80, KC_##K81, KC_##K82, KC_##K83, KC_##K84, KC_##K85, KC_##K86 } \ 73 | } 74 | 75 | #endif 76 | 77 | #endif 78 | -------------------------------------------------------------------------------- /CMakeLists.txt: -------------------------------------------------------------------------------- 1 | ## TMK-Pok3r CMakeLists.txt 2 | CMAKE_MINIMUM_REQUIRED(VERSION 2.8) 3 | 4 | PROJECT(TMK_POK3R NONE) 5 | 6 | ### =================== SOURCES =================== ### 7 | 8 | SET(FILES 9 | README.md 10 | 11 | Makefile 12 | util/Makefile.app_pok3r 13 | util/Makefile.app_vortex_core 14 | util/Makefile.tmk_pok3r 15 | util/Makefile.tmk_pok3r_rgb 16 | util/Makefile.tmk_vortex_core 17 | 18 | chconf.h 19 | config.h 20 | halconf.h 21 | mcuconf.h 22 | 23 | keymap_common.h 24 | keymap_pok3r.c 25 | keymap_vortex_core.c 26 | 27 | led_pok3r.c 28 | led_vortex_core.c 29 | 30 | matrix_pok3r.c 31 | matrix_vortex_core.c 32 | 33 | apps/gd25q_flash.h 34 | apps/pok3r_main.c 35 | apps/pok3r_app.sym 36 | apps/vortex_core_main.c 37 | apps/vortex_core_app.sym 38 | 39 | boards/VORTEX_DUAL_60/board.mk 40 | boards/VORTEX_DUAL_60/board.h 41 | boards/VORTEX_DUAL_60/board.c 42 | 43 | boards/CYKB167_D_V03/board.mk 44 | boards/CYKB167_D_V03/board.h 45 | boards/CYKB167_D_V03/board.c 46 | 47 | boards/CYKB175_V03/board.mk 48 | boards/CYKB175_V03/board.h 49 | boards/CYKB175_V03/board.c 50 | 51 | ChibiOS-Contrib/os/common/ext/CMSIS/HT32F165x/ht32f165x.h 52 | ChibiOS-Contrib/os/common/ext/CMSIS/HT32F165x/ht32f165x_reg.h 53 | 54 | ChibiOS-Contrib/os/common/startup/ARMCMx/compilers/GCC/ld/HT32F1653.ld 55 | ChibiOS-Contrib/os/common/startup/ARMCMx/compilers/GCC/ld/HT32F1654.ld 56 | ChibiOS-Contrib/os/common/startup/ARMCMx/compilers/GCC/ld/HT32F1655.ld 57 | ChibiOS-Contrib/os/common/startup/ARMCMx/compilers/GCC/ld/HT32F1656.ld 58 | ChibiOS-Contrib/os/common/startup/ARMCMx/compilers/GCC/mk/startup_ht32f165x.mk 59 | ChibiOS-Contrib/os/common/startup/ARMCMx/devices/HT32F165x/cmparams.h 60 | 61 | ChibiOS-Contrib/os/hal/ports/HT32/HT32F165x/platform.mk 62 | ChibiOS-Contrib/os/hal/ports/HT32/HT32F165x/ht32_registry.h 63 | 64 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_lld.h 65 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_lld.c 66 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_gpt_lld.h 67 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_gpt_lld.c 68 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_pal_lld.h 69 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_pal_lld.c 70 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_spi_lld.h 71 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_spi_lld.c 72 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_st_lld.h 73 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_st_lld.c 74 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_uart_lld.h 75 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_uart_lld.c 76 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_usb_lld.h 77 | ChibiOS-Contrib/os/hal/ports/HT32/LLD/hal_usb_lld.c 78 | 79 | tmk_core/tool/chibios/common.mk 80 | tmk_core/tool/chibios/chibios.mk 81 | 82 | tmk_core/common/command.c 83 | tmk_core/common/eeconfig.h 84 | tmk_core/common/chibios/eeconfig.c 85 | tmk_core/protocol/chibios/usb_main.c 86 | ) 87 | 88 | INCLUDE_DIRECTORIES( 89 | . 90 | boards/VORTEX_DUAL_60 91 | #boards/CYKB175_V03 92 | ChibiOS/os/common/ports/ARMCMx 93 | ChibiOS/os/hal/include 94 | ChibiOS/os/hal/osal/rt 95 | ChibiOS/os/rt/include 96 | ChibiOS-Contrib/os/common/ext/CMSIS/HT32F165x 97 | ChibiOS-Contrib/os/common/ports/ARMCMx 98 | ChibiOS-Contrib/os/common/startup/ARMCMx/devices/HT32F165x 99 | ChibiOS-Contrib/os/hal/include 100 | ChibiOS-Contrib/os/hal/osal/rt 101 | ChibiOS-Contrib/os/hal/ports/HT32/HT32F165x 102 | ChibiOS-Contrib/os/hal/ports/HT32/LLD 103 | ChibiOS-Contrib/os/rt/include 104 | ) 105 | 106 | 107 | ### =================== BUILD =================== ### 108 | 109 | ADD_CUSTOM_TARGET(tmk-pok3r-dummy SOURCES ${FILES}) 110 | 111 | ADD_CUSTOM_TARGET(firmware ALL 112 | WORKING_DIRECTORY ${CMAKE_SOURCE_DIR} 113 | COMMAND make pok3r 114 | #COMMAND make vortex_core 115 | ) 116 | -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/FlashLoader_HT32.emProject: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 15 | 28 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 101 | -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/Src/Cortex_M_Startup.s: -------------------------------------------------------------------------------- 1 | /***************************************************************************** 2 | * Copyright (c) 2014 Rowley Associates Limited. * 3 | * * 4 | * This file may be distributed under the terms of the License Agreement * 5 | * provided with this software. * 6 | * * 7 | * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * 8 | * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * 9 | *****************************************************************************/ 10 | 11 | .macro ISR_HANDLER name= 12 | .section .vectors, "ax" 13 | .word \name 14 | .section .init, "ax" 15 | .thumb_func 16 | .weak \name 17 | \name: 18 | 1: b 1b /* endless loop */ 19 | .endm 20 | 21 | .macro ISR_RESERVED 22 | .section .vectors, "ax" 23 | .word 0 24 | .endm 25 | 26 | .syntax unified 27 | .global reset_handler 28 | 29 | .section .vectors, "ax" 30 | .code 16 31 | .global _vectors 32 | 33 | .macro DEFAULT_ISR_HANDLER name= 34 | .thumb_func 35 | .weak \name 36 | \name: 37 | 1: b 1b /* endless loop */ 38 | .endm 39 | 40 | _vectors: 41 | .word __stack_end__ 42 | .word reset_handler 43 | ISR_HANDLER NMI_Handler 44 | ISR_HANDLER HardFault_Handler 45 | ISR_RESERVED // Populate if using MemManage (MPU) 46 | ISR_RESERVED // Populate if using Bus fault 47 | ISR_RESERVED // Populate if using Usage fault 48 | ISR_RESERVED 49 | ISR_RESERVED 50 | ISR_RESERVED 51 | ISR_RESERVED 52 | ISR_HANDLER SVC_Handler 53 | ISR_RESERVED // Populate if using a debug monitor 54 | ISR_RESERVED 55 | ISR_HANDLER PendSV_Handler 56 | ISR_HANDLER SysTick_Handler 57 | // External interrupts start her 58 | ISR_HANDLER ExternalISR0 59 | ISR_HANDLER ExternalISR1 60 | ISR_HANDLER ExternalISR2 61 | ISR_HANDLER ExternalISR3 62 | ISR_HANDLER ExternalISR4 63 | ISR_HANDLER ExternalISR5 64 | ISR_HANDLER ExternalISR6 65 | ISR_HANDLER ExternalISR7 66 | ISR_HANDLER ExternalISR8 67 | ISR_HANDLER ExternalISR9 68 | ISR_HANDLER ExternalISR10 69 | ISR_HANDLER ExternalISR11 70 | ISR_HANDLER ExternalISR12 71 | ISR_HANDLER ExternalISR13 72 | ISR_HANDLER ExternalISR14 73 | ISR_HANDLER ExternalISR15 74 | ISR_HANDLER ExternalISR16 75 | ISR_HANDLER ExternalISR17 76 | ISR_HANDLER ExternalISR18 77 | ISR_HANDLER ExternalISR19 78 | ISR_HANDLER ExternalISR20 79 | ISR_HANDLER ExternalISR21 80 | ISR_HANDLER ExternalISR22 81 | ISR_HANDLER ExternalISR23 82 | ISR_HANDLER ExternalISR24 83 | ISR_HANDLER ExternalISR25 84 | ISR_HANDLER ExternalISR26 85 | ISR_HANDLER ExternalISR27 86 | ISR_HANDLER ExternalISR28 87 | ISR_HANDLER ExternalISR29 88 | ISR_HANDLER ExternalISR30 89 | ISR_HANDLER ExternalISR31 90 | ISR_RESERVED 91 | ISR_RESERVED 92 | ISR_RESERVED 93 | ISR_RESERVED 94 | ISR_RESERVED 95 | ISR_RESERVED 96 | ISR_RESERVED 97 | ISR_RESERVED 98 | ISR_RESERVED 99 | ISR_RESERVED 100 | ISR_RESERVED 101 | ISR_RESERVED 102 | ISR_RESERVED 103 | ISR_RESERVED 104 | ISR_RESERVED 105 | ISR_RESERVED 106 | ISR_RESERVED 107 | ISR_RESERVED 108 | ISR_RESERVED 109 | ISR_RESERVED 110 | ISR_RESERVED 111 | ISR_RESERVED 112 | ISR_RESERVED 113 | ISR_RESERVED 114 | ISR_RESERVED 115 | ISR_RESERVED 116 | ISR_RESERVED 117 | ISR_RESERVED 118 | ISR_RESERVED 119 | ISR_RESERVED 120 | ISR_RESERVED 121 | ISR_RESERVED 122 | ISR_RESERVED 123 | ISR_RESERVED 124 | ISR_RESERVED 125 | ISR_RESERVED 126 | ISR_RESERVED 127 | ISR_RESERVED 128 | ISR_RESERVED 129 | ISR_RESERVED 130 | ISR_RESERVED 131 | ISR_RESERVED 132 | ISR_RESERVED 133 | ISR_RESERVED 134 | ISR_RESERVED 135 | ISR_RESERVED 136 | ISR_RESERVED 137 | ISR_RESERVED 138 | ISR_RESERVED 139 | ISR_RESERVED 140 | ISR_RESERVED 141 | ISR_RESERVED 142 | .section .vectors, "ax" 143 | _vectors_end: 144 | 145 | .section .init, "ax" 146 | .thumb_func 147 | 148 | reset_handler: 149 | 150 | #ifndef __NO_SYSTEM_INIT 151 | ldr r0, =__RAM_segment_end__ 152 | mov sp, r0 153 | bl SystemInit 154 | #endif 155 | 156 | b _start 157 | 158 | #ifndef __NO_SYSTEM_INIT 159 | .thumb_func 160 | .weak SystemInit 161 | SystemInit: 162 | bx lr 163 | #endif 164 | -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/Src/main.c: -------------------------------------------------------------------------------- 1 | /********************************************************************* 2 | * (c) SEGGER Microcontroller GmbH & Co. KG * 3 | * The Embedded Experts * 4 | * www.segger.com * 5 | ********************************************************************** 6 | ---------------------------------------------------------------------- 7 | File : Main.c 8 | Purpose : Contains functions for RAMCode debugging. 9 | -------- END-OF-HEADER --------------------------------------------- 10 | */ 11 | #include 12 | #include 13 | #include "FlashOS.h" 14 | 15 | static U8 _acTestData[512] = { 16 | 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 17 | 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 18 | 0x08, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 19 | 0x0C, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 20 | 0x10, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 21 | 0x14, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 22 | 0x18, 0x00, 0x00, 0x00, 0x19, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x00, 0x00, 23 | 0x1C, 0x00, 0x00, 0x00, 0x1D, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 24 | 0x20, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 25 | 0x24, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, 0x27, 0x00, 0x00, 0x00, 26 | 0x28, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x00, 27 | 0x2C, 0x00, 0x00, 0x00, 0x2D, 0x00, 0x00, 0x00, 0x2E, 0x00, 0x00, 0x00, 0x2F, 0x00, 0x00, 0x00, 28 | 0x30, 0x00, 0x00, 0x00, 0x31, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x00, 29 | 0x34, 0x00, 0x00, 0x00, 0x35, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x00, 30 | 0x38, 0x00, 0x00, 0x00, 0x39, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x00, 0x00, 0x3B, 0x00, 0x00, 0x00, 31 | 0x3C, 0x00, 0x00, 0x00, 0x3D, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 32 | 0x40, 0x00, 0x00, 0x00, 0x41, 0x00, 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x43, 0x00, 0x00, 0x00, 33 | 0x44, 0x00, 0x00, 0x00, 0x45, 0x00, 0x00, 0x00, 0x46, 0x00, 0x00, 0x00, 0x47, 0x00, 0x00, 0x00, 34 | 0x48, 0x00, 0x00, 0x00, 0x49, 0x00, 0x00, 0x00, 0x4A, 0x00, 0x00, 0x00, 0x4B, 0x00, 0x00, 0x00, 35 | 0x4C, 0x00, 0x00, 0x00, 0x4D, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x00, 0x4F, 0x00, 0x00, 0x00, 36 | 0x50, 0x00, 0x00, 0x00, 0x51, 0x00, 0x00, 0x00, 0x52, 0x00, 0x00, 0x00, 0x53, 0x00, 0x00, 0x00, 37 | 0x54, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x00, 0x57, 0x00, 0x00, 0x00, 38 | 0x58, 0x00, 0x00, 0x00, 0x59, 0x00, 0x00, 0x00, 0x5A, 0x00, 0x00, 0x00, 0x5B, 0x00, 0x00, 0x00, 39 | 0x5C, 0x00, 0x00, 0x00, 0x5D, 0x00, 0x00, 0x00, 0x5E, 0x00, 0x00, 0x00, 0x5F, 0x00, 0x00, 0x00, 40 | 0x60, 0x00, 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x62, 0x00, 0x00, 0x00, 0x63, 0x00, 0x00, 0x00, 41 | 0x64, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x00, 42 | 0x68, 0x00, 0x00, 0x00, 0x69, 0x00, 0x00, 0x00, 0x6A, 0x00, 0x00, 0x00, 0x6B, 0x00, 0x00, 0x00, 43 | 0x6C, 0x00, 0x00, 0x00, 0x6D, 0x00, 0x00, 0x00, 0x6E, 0x00, 0x00, 0x00, 0x6F, 0x00, 0x00, 0x00, 44 | 0x70, 0x00, 0x00, 0x00, 0x71, 0x00, 0x00, 0x00, 0x72, 0x00, 0x00, 0x00, 0x73, 0x00, 0x00, 0x00, 45 | 0x74, 0x00, 0x00, 0x00, 0x75, 0x00, 0x00, 0x00, 0x76, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 46 | 0x78, 0x00, 0x00, 0x00, 0x79, 0x00, 0x00, 0x00, 0x7A, 0x00, 0x00, 0x00, 0x7B, 0x00, 0x00, 0x00, 47 | 0x7C, 0x00, 0x00, 0x00, 0x7D, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00 48 | }; 49 | 50 | #define _FLASH_BASE_ADDR (0x00000000) 51 | 52 | /********************************************************************* 53 | * 54 | * Public code 55 | * 56 | ********************************************************************** 57 | */ 58 | 59 | /********************************************************************* 60 | * 61 | * main 62 | * 63 | * Function description 64 | * Main function. Performs some sample operations with 65 | * the RAMCode for verification. 66 | */ 67 | int main(void) { 68 | int r; 69 | // 70 | // Blank Check 71 | // 72 | #if SUPPORT_BLANK_CHECK 73 | Init(0, 0, 0); 74 | r = BlankCheck(_FLASH_BASE_ADDR, 0x20000, 0xFF); 75 | UnInit(0); 76 | #endif 77 | // 78 | // Erase sector 79 | // 80 | Init(0, 0, 0); 81 | r = EraseSector(_FLASH_BASE_ADDR); 82 | if (r != 0) { // Error? 83 | while (1); 84 | } 85 | UnInit(0); 86 | // 87 | // Program page 88 | // 89 | Init(0, 0, 0); 90 | r = ProgramPage(_FLASH_BASE_ADDR, sizeof(_acTestData), (U8 *)_acTestData); 91 | if (r != 0) { // Error? 92 | while (1); 93 | } 94 | UnInit(0); 95 | return r; 96 | } 97 | 98 | /**************************** End of file ***************************/ 99 | -------------------------------------------------------------------------------- /util/Makefile.app_pok3r: -------------------------------------------------------------------------------- 1 | ############################################################################## 2 | # Build global options 3 | # NOTE: Can be overridden externally. 4 | # 5 | 6 | # Compiler options here. 7 | ifeq ($(USE_OPT),) 8 | #USE_OPT = -O2 9 | USE_OPT += -ggdb -fomit-frame-pointer -falign-functions=16 10 | endif 11 | 12 | # C specific options here (added to USE_OPT). 13 | ifeq ($(USE_COPT),) 14 | USE_COPT = --std=c11 15 | endif 16 | 17 | # C++ specific options here (added to USE_OPT). 18 | ifeq ($(USE_CPPOPT),) 19 | USE_CPPOPT = -fno-rtti 20 | endif 21 | 22 | # Enable this if you want the linker to remove unused code and data 23 | ifeq ($(USE_LINK_GC),) 24 | USE_LINK_GC = yes 25 | endif 26 | 27 | # Linker extra options here. 28 | ifeq ($(USE_LDOPT),) 29 | USE_LDOPT = 30 | endif 31 | 32 | # Enable this if you want link time optimizations (LTO) 33 | ifeq ($(USE_LTO),) 34 | USE_LTO = yes 35 | endif 36 | 37 | # If enabled, this option allows to compile the application in THUMB mode. 38 | ifeq ($(USE_THUMB),) 39 | USE_THUMB = yes 40 | endif 41 | 42 | # Enable this if you want to see the full log while compiling. 43 | ifeq ($(USE_VERBOSE_COMPILE),) 44 | USE_VERBOSE_COMPILE = no 45 | endif 46 | 47 | # If enabled, this option makes the build process faster by not compiling 48 | # modules not used in the current configuration. 49 | ifeq ($(USE_SMART_BUILD),) 50 | USE_SMART_BUILD = yes 51 | endif 52 | 53 | # 54 | # Build global options 55 | ############################################################################## 56 | 57 | ############################################################################## 58 | # Architecture or project specific options 59 | # 60 | 61 | # Stack size to be allocated to the Cortex-M process stack. This stack is 62 | # the stack used by the main() thread. 63 | ifeq ($(USE_PROCESS_STACKSIZE),) 64 | USE_PROCESS_STACKSIZE = 0x200 65 | endif 66 | 67 | # Stack size to the allocated to the Cortex-M main/exceptions stack. This 68 | # stack is used for processing interrupts and exceptions. 69 | ifeq ($(USE_EXCEPTIONS_STACKSIZE),) 70 | USE_EXCEPTIONS_STACKSIZE = 0x400 71 | endif 72 | 73 | # Enables the use of FPU (no, softfp, hard). 74 | ifeq ($(USE_FPU),) 75 | USE_FPU = no 76 | endif 77 | 78 | # 79 | # Architecture or project specific options 80 | ############################################################################## 81 | 82 | ############################################################################## 83 | # Project, sources and paths 84 | # 85 | 86 | # Define project name here 87 | PROJECT = app_pok3r 88 | 89 | # Imported source files and paths 90 | CHIBIOS = ChibiOS 91 | CHIBIOS_CONTRIB = ChibiOS-Contrib 92 | 93 | # Startup files. 94 | include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_ht32f165x.mk 95 | # HAL-OSAL files (optional). 96 | include $(CHIBIOS)/os/hal/hal.mk 97 | include $(CHIBIOS_CONTRIB)/os/hal/ports/HT32/HT32F165x/platform.mk 98 | include boards/VORTEX_DUAL_60/board.mk 99 | include $(CHIBIOS)/os/hal/osal/rt/osal.mk 100 | # RTOS files (optional). 101 | include $(CHIBIOS)/os/rt/rt.mk 102 | include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk 103 | # Other files (optional). 104 | #include $(CHIBIOS)/test/rt/test.mk 105 | 106 | # Define linker script file here 107 | LDSCRIPT= $(STARTUPLD)/HT32F1655.ld 108 | 109 | # C sources that can be compiled in ARM or THUMB mode depending on the global 110 | # setting. 111 | CSRC = $(STARTUPSRC) \ 112 | $(KERNSRC) \ 113 | $(PORTSRC) \ 114 | $(OSALSRC) \ 115 | $(HALSRC) \ 116 | $(PLATFORMSRC) \ 117 | $(BOARDSRC) \ 118 | $(TESTSRC) \ 119 | apps/pok3r_main.c 120 | 121 | # C++ sources that can be compiled in ARM or THUMB mode depending on the global 122 | # setting. 123 | CPPSRC = 124 | 125 | # C sources to be compiled in ARM mode regardless of the global setting. 126 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 127 | # option that results in lower performance and larger code size. 128 | ACSRC = 129 | 130 | # C++ sources to be compiled in ARM mode regardless of the global setting. 131 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 132 | # option that results in lower performance and larger code size. 133 | ACPPSRC = 134 | 135 | # C sources to be compiled in THUMB mode regardless of the global setting. 136 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 137 | # option that results in lower performance and larger code size. 138 | TCSRC = 139 | 140 | # C sources to be compiled in THUMB mode regardless of the global setting. 141 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 142 | # option that results in lower performance and larger code size. 143 | TCPPSRC = 144 | 145 | # List ASM source files here 146 | ASMSRC = 147 | ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) 148 | 149 | INCDIR = $(CHIBIOS)/os/license \ 150 | $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ 151 | $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ 152 | $(CHIBIOS)/os/various \ 153 | $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include 154 | 155 | # 156 | # Project, sources and paths 157 | ############################################################################## 158 | 159 | ############################################################################## 160 | # Compiler settings 161 | # 162 | 163 | MCU = cortex-m3 164 | 165 | TRGT = arm-none-eabi- 166 | CC = $(TRGT)gcc 167 | CPPC = $(TRGT)g++ 168 | # Enable loading with g++ only if you need C++ runtime support. 169 | # NOTE: You can use C++ even without C++ support if you are careful. C++ 170 | # runtime support makes code size explode. 171 | LD = $(TRGT)gcc 172 | #LD = $(TRGT)g++ 173 | CP = $(TRGT)objcopy 174 | AS = $(TRGT)gcc -x assembler-with-cpp 175 | AR = $(TRGT)ar 176 | OD = $(TRGT)objdump 177 | SZ = $(TRGT)size 178 | HEX = $(CP) -O ihex 179 | BIN = $(CP) -O binary 180 | 181 | # ARM-specific options here 182 | AOPT = 183 | 184 | # THUMB-specific options here 185 | TOPT = -mthumb -DTHUMB 186 | 187 | # Define C warning options here 188 | CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes 189 | 190 | # Define C++ warning options here 191 | CPPWARN = -Wall -Wextra -Wundef 192 | 193 | # 194 | # Compiler settings 195 | ############################################################################## 196 | 197 | ############################################################################## 198 | # Start of user section 199 | # 200 | 201 | # List all user C define here, like -D_DEBUG=1 202 | UDEFS = 203 | 204 | # Define ASM defines here 205 | UADEFS = 206 | 207 | # List all user directories here 208 | UINCDIR = 209 | 210 | # List the user directory to look for the libraries here 211 | ULIBDIR = 212 | 213 | # List all user libraries here 214 | ULIBS = 215 | 216 | # 217 | # End of user defines 218 | ############################################################################## 219 | 220 | RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC 221 | include $(RULESPATH)/rules.mk 222 | -------------------------------------------------------------------------------- /util/Makefile.app_vortex_core: -------------------------------------------------------------------------------- 1 | ############################################################################## 2 | # Build global options 3 | # NOTE: Can be overridden externally. 4 | # 5 | 6 | # Compiler options here. 7 | ifeq ($(USE_OPT),) 8 | #USE_OPT = -O2 9 | USE_OPT += -ggdb -fomit-frame-pointer -falign-functions=16 10 | endif 11 | 12 | # C specific options here (added to USE_OPT). 13 | ifeq ($(USE_COPT),) 14 | USE_COPT = --std=c11 15 | endif 16 | 17 | # C++ specific options here (added to USE_OPT). 18 | ifeq ($(USE_CPPOPT),) 19 | USE_CPPOPT = -fno-rtti 20 | endif 21 | 22 | # Enable this if you want the linker to remove unused code and data 23 | ifeq ($(USE_LINK_GC),) 24 | USE_LINK_GC = yes 25 | endif 26 | 27 | # Linker extra options here. 28 | ifeq ($(USE_LDOPT),) 29 | USE_LDOPT = 30 | endif 31 | 32 | # Enable this if you want link time optimizations (LTO) 33 | ifeq ($(USE_LTO),) 34 | USE_LTO = yes 35 | endif 36 | 37 | # If enabled, this option allows to compile the application in THUMB mode. 38 | ifeq ($(USE_THUMB),) 39 | USE_THUMB = yes 40 | endif 41 | 42 | # Enable this if you want to see the full log while compiling. 43 | ifeq ($(USE_VERBOSE_COMPILE),) 44 | USE_VERBOSE_COMPILE = no 45 | endif 46 | 47 | # If enabled, this option makes the build process faster by not compiling 48 | # modules not used in the current configuration. 49 | ifeq ($(USE_SMART_BUILD),) 50 | USE_SMART_BUILD = yes 51 | endif 52 | 53 | # 54 | # Build global options 55 | ############################################################################## 56 | 57 | ############################################################################## 58 | # Architecture or project specific options 59 | # 60 | 61 | # Stack size to be allocated to the Cortex-M process stack. This stack is 62 | # the stack used by the main() thread. 63 | ifeq ($(USE_PROCESS_STACKSIZE),) 64 | USE_PROCESS_STACKSIZE = 0x200 65 | endif 66 | 67 | # Stack size to the allocated to the Cortex-M main/exceptions stack. This 68 | # stack is used for processing interrupts and exceptions. 69 | ifeq ($(USE_EXCEPTIONS_STACKSIZE),) 70 | USE_EXCEPTIONS_STACKSIZE = 0x400 71 | endif 72 | 73 | # Enables the use of FPU (no, softfp, hard). 74 | ifeq ($(USE_FPU),) 75 | USE_FPU = no 76 | endif 77 | 78 | # 79 | # Architecture or project specific options 80 | ############################################################################## 81 | 82 | ############################################################################## 83 | # Project, sources and paths 84 | # 85 | 86 | # Define project name here 87 | PROJECT = app_vortex_core 88 | 89 | # Imported source files and paths 90 | CHIBIOS = ChibiOS 91 | CHIBIOS_CONTRIB = ChibiOS-Contrib 92 | 93 | # Startup files. 94 | include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_ht32f165x.mk 95 | # HAL-OSAL files (optional). 96 | include $(CHIBIOS)/os/hal/hal.mk 97 | include $(CHIBIOS_CONTRIB)/os/hal/ports/HT32/HT32F165x/platform.mk 98 | include boards/CYKB175_V03/board.mk 99 | include $(CHIBIOS)/os/hal/osal/rt/osal.mk 100 | # RTOS files (optional). 101 | include $(CHIBIOS)/os/rt/rt.mk 102 | include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk 103 | # Other files (optional). 104 | #include $(CHIBIOS)/test/rt/test.mk 105 | 106 | # Define linker script file here 107 | LDSCRIPT= $(STARTUPLD)/HT32F1654.ld 108 | 109 | # C sources that can be compiled in ARM or THUMB mode depending on the global 110 | # setting. 111 | CSRC = $(STARTUPSRC) \ 112 | $(KERNSRC) \ 113 | $(PORTSRC) \ 114 | $(OSALSRC) \ 115 | $(HALSRC) \ 116 | $(PLATFORMSRC) \ 117 | $(BOARDSRC) \ 118 | $(TESTSRC) \ 119 | apps/vortex_core_main.c 120 | 121 | # C++ sources that can be compiled in ARM or THUMB mode depending on the global 122 | # setting. 123 | CPPSRC = 124 | 125 | # C sources to be compiled in ARM mode regardless of the global setting. 126 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 127 | # option that results in lower performance and larger code size. 128 | ACSRC = 129 | 130 | # C++ sources to be compiled in ARM mode regardless of the global setting. 131 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 132 | # option that results in lower performance and larger code size. 133 | ACPPSRC = 134 | 135 | # C sources to be compiled in THUMB mode regardless of the global setting. 136 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 137 | # option that results in lower performance and larger code size. 138 | TCSRC = 139 | 140 | # C sources to be compiled in THUMB mode regardless of the global setting. 141 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 142 | # option that results in lower performance and larger code size. 143 | TCPPSRC = 144 | 145 | # List ASM source files here 146 | ASMSRC = 147 | ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) 148 | 149 | INCDIR = $(CHIBIOS)/os/license \ 150 | $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ 151 | $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ 152 | $(CHIBIOS)/os/various \ 153 | $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include 154 | 155 | # 156 | # Project, sources and paths 157 | ############################################################################## 158 | 159 | ############################################################################## 160 | # Compiler settings 161 | # 162 | 163 | MCU = cortex-m3 164 | 165 | TRGT = arm-none-eabi- 166 | CC = $(TRGT)gcc 167 | CPPC = $(TRGT)g++ 168 | # Enable loading with g++ only if you need C++ runtime support. 169 | # NOTE: You can use C++ even without C++ support if you are careful. C++ 170 | # runtime support makes code size explode. 171 | LD = $(TRGT)gcc 172 | #LD = $(TRGT)g++ 173 | CP = $(TRGT)objcopy 174 | AS = $(TRGT)gcc -x assembler-with-cpp 175 | AR = $(TRGT)ar 176 | OD = $(TRGT)objdump 177 | SZ = $(TRGT)size 178 | HEX = $(CP) -O ihex 179 | BIN = $(CP) -O binary 180 | 181 | # ARM-specific options here 182 | AOPT = 183 | 184 | # THUMB-specific options here 185 | TOPT = -mthumb -DTHUMB 186 | 187 | # Define C warning options here 188 | CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes 189 | 190 | # Define C++ warning options here 191 | CPPWARN = -Wall -Wextra -Wundef 192 | 193 | # 194 | # Compiler settings 195 | ############################################################################## 196 | 197 | ############################################################################## 198 | # Start of user section 199 | # 200 | 201 | # List all user C define here, like -D_DEBUG=1 202 | UDEFS = 203 | 204 | # Define ASM defines here 205 | UADEFS = 206 | 207 | # List all user directories here 208 | UINCDIR = 209 | 210 | # List the user directory to look for the libraries here 211 | ULIBDIR = 212 | 213 | # List all user libraries here 214 | ULIBS = 215 | 216 | # 217 | # End of user defines 218 | ############################################################################## 219 | 220 | RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC 221 | include $(RULESPATH)/rules.mk 222 | -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/Src/thumb_crt0.s: -------------------------------------------------------------------------------- 1 | // SEGGER Embedded Studio, runtime support. 2 | // 3 | // Copyright (c) 2014-2016 SEGGER Microcontroller GmbH & Co KG 4 | // Copyright (c) 2001-2016 Rowley Associates Limited. 5 | // 6 | // This file may be distributed under the terms of the License Agreement 7 | // provided with this software. 8 | // 9 | // THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE 10 | // WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. 11 | // 12 | // 13 | // Preprocessor Definitions 14 | // ------------------------ 15 | // APP_ENTRY_POINT 16 | // 17 | // Defines the application entry point function, if undefined this setting 18 | // defaults to "main". 19 | // 20 | // INITIALIZE_STACK 21 | // 22 | // If defined, the contents of the stack will be initialized to a the 23 | // value 0xCC. 24 | // 25 | // INITIALIZE_SECONDARY_SECTIONS 26 | // 27 | // If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized. 28 | // 29 | // INITIALIZE_TCM_SECTIONS 30 | // 31 | // If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections 32 | // will be initialized. 33 | // 34 | // FULL_LIBRARY 35 | // 36 | // If defined then 37 | // - argc, argv are setup by the debug_getargs. 38 | // - the exit symbol is defined and executes on return from main. 39 | // - the exit symbol calls destructors, atexit functions and then debug_exit. 40 | // 41 | // If not defined then 42 | // - argc and argv are zero. 43 | // - the exit symbol is defined, executes on return from main and loops 44 | // 45 | 46 | #ifndef APP_ENTRY_POINT 47 | #define APP_ENTRY_POINT main 48 | #endif 49 | 50 | #ifndef ARGSSPACE 51 | #define ARGSSPACE 128 52 | #endif 53 | .syntax unified 54 | 55 | .global _start 56 | .extern APP_ENTRY_POINT 57 | .global exit 58 | .weak exit 59 | 60 | .section .init, "ax" 61 | .code 16 62 | .align 2 63 | .thumb_func 64 | 65 | _start: 66 | /* Set up main stack if size > 0 */ 67 | ldr r1, =__stack_end__ 68 | ldr r0, =__stack_start__ 69 | subs r2, r1, r0 70 | beq 1f 71 | #ifdef __ARM_EABI__ 72 | movs r2, #0x7 73 | bics r1, r2 74 | #endif 75 | mov sp, r1 76 | #ifdef INITIALIZE_STACK 77 | movs r2, #0xCC 78 | ldr r0, =__stack_start__ 79 | bl memory_set 80 | #endif 81 | 1: 82 | 83 | /* Set up process stack if size > 0 */ 84 | ldr r1, =__stack_process_end__ 85 | ldr r0, =__stack_process_start__ 86 | subs r2, r1, r0 87 | beq 1f 88 | #ifdef __ARM_EABI__ 89 | movs r2, #0x7 90 | bics r1, r2 91 | #endif 92 | msr psp, r1 93 | movs r2, #2 94 | msr control, r2 95 | #ifdef INITIALIZE_STACK 96 | movs r2, #0xCC 97 | bl memory_set 98 | #endif 99 | 1: 100 | 101 | /* Copy initialised memory sections into RAM (if necessary). */ 102 | ldr r0, =__data_load_start__ 103 | ldr r1, =__data_start__ 104 | ldr r2, =__data_end__ 105 | bl memory_copy 106 | ldr r0, =__text_load_start__ 107 | ldr r1, =__text_start__ 108 | ldr r2, =__text_end__ 109 | bl memory_copy 110 | ldr r0, =__fast_load_start__ 111 | ldr r1, =__fast_start__ 112 | ldr r2, =__fast_end__ 113 | bl memory_copy 114 | ldr r0, =__ctors_load_start__ 115 | ldr r1, =__ctors_start__ 116 | ldr r2, =__ctors_end__ 117 | bl memory_copy 118 | ldr r0, =__dtors_load_start__ 119 | ldr r1, =__dtors_start__ 120 | ldr r2, =__dtors_end__ 121 | bl memory_copy 122 | ldr r0, =__rodata_load_start__ 123 | ldr r1, =__rodata_start__ 124 | ldr r2, =__rodata_end__ 125 | bl memory_copy 126 | ldr r0, =__tdata_load_start__ 127 | ldr r1, =__tdata_start__ 128 | ldr r2, =__tdata_end__ 129 | bl memory_copy 130 | #ifdef INITIALIZE_SECONDARY_SECTIONS 131 | ldr r0, =__data2_load_start__ 132 | ldr r1, =__data2_start__ 133 | ldr r2, =__data2_end__ 134 | bl memory_copy 135 | ldr r0, =__text2_load_start__ 136 | ldr r1, =__text2_start__ 137 | ldr r2, =__text2_end__ 138 | bl memory_copy 139 | ldr r0, =__rodata2_load_start__ 140 | ldr r1, =__rodata2_start__ 141 | ldr r2, =__rodata2_end__ 142 | bl memory_copy 143 | #endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ 144 | #ifdef INITIALIZE_TCM_SECTIONS 145 | ldr r0, =__data_tcm_load_start__ 146 | ldr r1, =__data_tcm_start__ 147 | ldr r2, =__data_tcm_end__ 148 | bl memory_copy 149 | ldr r0, =__text_tcm_load_start__ 150 | ldr r1, =__text_tcm_start__ 151 | ldr r2, =__text_tcm_end__ 152 | bl memory_copy 153 | ldr r0, =__rodata_tcm_load_start__ 154 | ldr r1, =__rodata_tcm_start__ 155 | ldr r2, =__rodata_tcm_end__ 156 | bl memory_copy 157 | #endif /* #ifdef INITIALIZE_TCM_SECTIONS */ 158 | 159 | /* Zero the bss. */ 160 | ldr r0, =__bss_start__ 161 | ldr r1, =__bss_end__ 162 | movs r2, #0 163 | bl memory_set 164 | ldr r0, =__tbss_start__ 165 | ldr r1, =__tbss_end__ 166 | movs r2, #0 167 | bl memory_set 168 | #ifdef INITIALIZE_SECONDARY_SECTIONS 169 | ldr r0, =__bss2_start__ 170 | ldr r1, =__bss2_end__ 171 | mov r2, #0 172 | bl memory_set 173 | #endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ 174 | #ifdef INITIALIZE_TCM_SECTIONS 175 | ldr r0, =__bss_tcm_start__ 176 | ldr r1, =__bss_tcm_end__ 177 | mov r2, #0 178 | bl memory_set 179 | #endif /* #ifdef INITIALIZE_TCM_SECTIONS */ 180 | 181 | /* Initialise the heap */ 182 | ldr r0, = __heap_start__ 183 | ldr r1, = __heap_end__ 184 | subs r1, r1, r0 185 | cmp r1, #8 186 | blt 1f 187 | movs r2, #0 188 | str r2, [r0] 189 | adds r0, r0, #4 190 | str r1, [r0] 191 | 1: 192 | 193 | /* Call constructors */ 194 | ldr r0, =__ctors_start__ 195 | ldr r1, =__ctors_end__ 196 | ctor_loop: 197 | cmp r0, r1 198 | beq ctor_end 199 | ldr r2, [r0] 200 | adds r0, #4 201 | push {r0-r1} 202 | blx r2 203 | pop {r0-r1} 204 | b ctor_loop 205 | ctor_end: 206 | 207 | /* Setup initial call frame */ 208 | movs r0, #0 209 | mov lr, r0 210 | mov r12, sp 211 | 212 | .type start, function 213 | start: 214 | /* Jump to application entry point */ 215 | #ifdef FULL_LIBRARY 216 | movs r0, #ARGSSPACE 217 | ldr r1, =args 218 | ldr r2, =debug_getargs 219 | blx r2 220 | ldr r1, =args 221 | #else 222 | movs r0, #0 223 | movs r1, #0 224 | #endif 225 | ldr r2, =APP_ENTRY_POINT 226 | blx r2 227 | 228 | .thumb_func 229 | exit: 230 | #ifdef FULL_LIBRARY 231 | mov r5, r0 // save the exit parameter/return result 232 | 233 | /* Call destructors */ 234 | ldr r0, =__dtors_start__ 235 | ldr r1, =__dtors_end__ 236 | dtor_loop: 237 | cmp r0, r1 238 | beq dtor_end 239 | ldr r2, [r0] 240 | add r0, #4 241 | push {r0-r1} 242 | blx r2 243 | pop {r0-r1} 244 | b dtor_loop 245 | dtor_end: 246 | 247 | /* Call atexit functions */ 248 | ldr r2, =_execute_at_exit_fns 249 | blx r2 250 | 251 | /* Call debug_exit with return result/exit parameter */ 252 | mov r0, r5 253 | ldr r2, =debug_exit 254 | blx r2 255 | #endif 256 | 257 | /* Returned from application entry point, loop forever. */ 258 | exit_loop: 259 | b exit_loop 260 | 261 | .thumb_func 262 | memory_copy: 263 | cmp r0, r1 264 | beq 2f 265 | subs r2, r2, r1 266 | beq 2f 267 | 1: 268 | ldrb r3, [r0] 269 | adds r0, r0, #1 270 | strb r3, [r1] 271 | adds r1, r1, #1 272 | subs r2, r2, #1 273 | bne 1b 274 | 2: 275 | bx lr 276 | 277 | .thumb_func 278 | memory_set: 279 | cmp r0, r1 280 | beq 1f 281 | strb r2, [r0] 282 | adds r0, r0, #1 283 | b memory_set 284 | 1: 285 | bx lr 286 | 287 | // default C/C++ library helpers 288 | 289 | .macro HELPER helper_name 290 | .section .text.\helper_name, "ax", %progbits 291 | .global \helper_name 292 | .weak \helper_name 293 | \helper_name: 294 | .thumb_func 295 | .endm 296 | 297 | HELPER __aeabi_read_tp 298 | ldr r0, =__tbss_start__-8 299 | bx lr 300 | HELPER __heap_lock 301 | bx lr 302 | HELPER __heap_unlock 303 | bx lr 304 | HELPER __printf_lock 305 | bx lr 306 | HELPER __printf_unlock 307 | bx lr 308 | HELPER __scanf_lock 309 | bx lr 310 | HELPER __scanf_unlock 311 | bx lr 312 | HELPER __debug_io_lock 313 | bx lr 314 | HELPER __debug_io_unlock 315 | bx lr 316 | HELPER abort 317 | b . 318 | HELPER __assert 319 | b . 320 | HELPER __aeabi_assert 321 | b . 322 | HELPER __cxa_pure_virtual 323 | b . 324 | HELPER __cxa_guard_acquire 325 | ldr r3, [r0] 326 | #if defined(__thumb__) && !defined(__thumb2__) 327 | movs r0, #1 328 | tst r3, r0 329 | #else 330 | tst r3, #1 331 | #endif 332 | beq 1f 333 | movs r0, #0 334 | bx lr 335 | 1: 336 | movs r0, #1 337 | bx lr 338 | HELPER __cxa_guard_release 339 | movs r3, #1 340 | str r3, [r0] 341 | bx lr 342 | HELPER __cxa_guard_abort 343 | bx lr 344 | HELPER __getchar 345 | b debug_getchar 346 | HELPER __putchar 347 | b debug_putchar 348 | HELPER __open 349 | b debug_fopen 350 | HELPER __close 351 | b debug_fclose 352 | HELPER __write 353 | mov r3, r0 354 | mov r0, r1 355 | movs r1, #1 356 | b debug_fwrite 357 | HELPER __read 358 | mov r3, r0 359 | mov r0, r1 360 | movs r1, #1 361 | b debug_fread 362 | HELPER __seek 363 | push {r4, lr} 364 | mov r4, r0 365 | bl debug_fseek 366 | cmp r0, #0 367 | bne 1f 368 | mov r0, r4 369 | bl debug_ftell 370 | pop {r4, pc} 371 | 1: 372 | ldr r0, =-1 373 | pop {r4, pc} 374 | // char __user_locale_name_buffer[]; 375 | .section .bss.__user_locale_name_buffer, "aw", %nobits 376 | .global __user_locale_name_buffer 377 | .weak __user_locale_name_buffer 378 | __user_locale_name_buffer: 379 | .word 0x0 380 | 381 | #ifdef FULL_LIBRARY 382 | .bss 383 | args: 384 | .space ARGSSPACE 385 | #endif 386 | 387 | /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ 388 | .section .stack, "wa", %nobits 389 | .section .stack_process, "wa", %nobits 390 | .section .heap, "wa", %nobits 391 | 392 | -------------------------------------------------------------------------------- /util/jlink_flashloader/FlashLoader_HT32/Src/FlashPrg.c: -------------------------------------------------------------------------------- 1 | /********************************************************************* 2 | * (c) SEGGER Microcontroller GmbH & Co. KG * 3 | * The Embedded Experts * 4 | * www.segger.com * 5 | ********************************************************************** 6 | ---------------------------------------------------------------------- 7 | File : FlashPrg.c 8 | Purpose : Implementation of RAMCode template 9 | -------- END-OF-HEADER --------------------------------------------- 10 | */ 11 | #include "FlashOS.h" 12 | 13 | /********************************************************************* 14 | * 15 | * Defines (configurable) 16 | * 17 | ********************************************************************** 18 | */ 19 | #define PAGE_SIZE_SHIFT (2) // The smallest program unit (one page) is 4 byte in size 20 | // 21 | // Some flash types require a native verify function as the memory is not memory mapped available (e.g. eMMC flashes). 22 | // If the verify function is implemented in the algorithm, it will be used by the J-Link DLL during compare / verify 23 | // independent of what verify type is configured in the J-Link DLL. 24 | // Please note, that SEGGER does not recommend to use this function if the flash can be memory mapped read 25 | // as this may can slow-down the compare / verify step. 26 | // 27 | #define SUPPORT_NATIVE_VERIFY (0) 28 | #define SUPPORT_NATIVE_READ_BACK (0) 29 | #define SUPPORT_BLANK_CHECK (0) 30 | 31 | 32 | #define FMC_BASE 0x40080000UL 33 | static const U32 FMC_TADR_A = FMC_BASE + 0x00; 34 | static const U32 FMC_WRDR_A = FMC_BASE + 0x04; 35 | static const U32 FMC_OCMR_A = FMC_BASE + 0x0C; 36 | static const U32 FMC_OPCR_A = FMC_BASE + 0x10; 37 | 38 | #define FMC_TADR *((volatile U32 *)FMC_TADR_A) 39 | #define FMC_WRDR *((volatile U32 *)FMC_WRDR_A) 40 | #define FMC_OCMR *((volatile U32 *)FMC_OCMR_A) 41 | #define FMC_OPCR *((volatile U32 *)FMC_OPCR_A) 42 | 43 | static const U32 FMC_OCMR_CMD_IL = 0x0; 44 | static const U32 FMC_OCMR_CMD_WP = 0x4; 45 | static const U32 FMC_OCMR_CMD_PE = 0x8; 46 | static const U32 FMC_OCMR_CMD_ME = 0xA; 47 | 48 | #define FMC_OPCR_OPM_MASK (0xF << 1) 49 | static const U32 FMC_OPCR_OPM_IL = (0x6 << 1); 50 | static const U32 FMC_OPCR_OPM_CM = (0xA << 1); 51 | static const U32 FMC_OPCR_OPM_FN = (0xE << 1); 52 | 53 | #define CKCU_MCUDBGCR *((volatile U32 *)0x40088304UL) 54 | 55 | #define WDT_CR *((volatile U32 *)0x40068000UL) 56 | static const U32 WDT_RELOAD = 0x5fa00001UL; 57 | 58 | /********************************************************************* 59 | * 60 | * Types 61 | * 62 | ********************************************************************** 63 | */ 64 | 65 | /********************************************************************* 66 | * 67 | * Static data 68 | * 69 | ********************************************************************** 70 | */ 71 | // 72 | // We use this dummy variable to make sure that the PrgData 73 | // section is present in the output elf-file as this section 74 | // is mandatory in current versions of the J-Link DLL 75 | // 76 | static volatile int _Dummy; 77 | 78 | /********************************************************************* 79 | * 80 | * Static code 81 | * 82 | ********************************************************************** 83 | */ 84 | 85 | /********************************************************************* 86 | * 87 | * _FeedWatchdog 88 | * 89 | * Function description 90 | * Feeds the watchdog. Needs to be called during RAMCode execution 91 | * in case of an watchdog is active. 92 | */ 93 | static void _FeedWatchdog(void) { 94 | //WDT_CR = WDT_RELOAD; 95 | } 96 | 97 | /********************************************************************* 98 | * 99 | * Public code 100 | * 101 | ********************************************************************** 102 | */ 103 | 104 | /********************************************************************* 105 | * 106 | * Init 107 | * 108 | * Function description 109 | * Handles the initialization of the flash module. 110 | * 111 | * Parameters 112 | * Addr: Flash base address 113 | * Freq: Clock frequency in Hz 114 | * Func: Caller type (e.g.: 1 - Erase, 2 - Program, 3 - Verify) 115 | * 116 | * Return value 117 | * 0 O.K. 118 | * 1 Error 119 | */ 120 | int Init(U32 Addr, U32 Freq, U32 Func) { 121 | (void)Addr; 122 | (void)Freq; 123 | (void)Func; 124 | // 125 | // Init code 126 | // 127 | //CKCU_MCUDBGCR |= (1 << 3); 128 | _FeedWatchdog(); 129 | return 0; 130 | } 131 | 132 | /********************************************************************* 133 | * 134 | * UnInit 135 | * 136 | * Function description 137 | * Handles the de-initialization of the flash module. 138 | * 139 | * Parameters 140 | * Func: Caller type (e.g.: 1 - Erase, 2 - Program, 3 - Verify) 141 | * 142 | * Return value 143 | * 0 O.K. 144 | * 1 Error 145 | */ 146 | int UnInit(U32 Func) { 147 | (void)Func; 148 | // 149 | // Uninit code 150 | // 151 | //*(volatile U32*)(0x1234) = Func; // Dummy 152 | return 0; 153 | } 154 | 155 | /********************************************************************* 156 | * 157 | * EraseSector 158 | * 159 | * Function description 160 | * Erases one flash sector. 161 | * 162 | * Parameters 163 | * Addr: Address of the sector to be erased 164 | * 165 | * Return value 166 | * 0 O.K. 167 | * 1 Error 168 | */ 169 | int EraseSector(U32 SectorAddr) { 170 | // 171 | // Erase sector code 172 | // 173 | 174 | FMC_TADR = SectorAddr; 175 | FMC_OCMR = FMC_OCMR_CMD_PE; 176 | FMC_OPCR = FMC_OPCR_OPM_CM; 177 | 178 | while((FMC_OPCR & FMC_OPCR_OPM_MASK) != FMC_OPCR_OPM_FN){ 179 | _FeedWatchdog(); 180 | } 181 | 182 | return 0; 183 | } 184 | 185 | /********************************************************************* 186 | * 187 | * ProgramPage 188 | * 189 | * Function description 190 | * Programs one flash page. 191 | * 192 | * Parameters 193 | * DestAddr: Destination address 194 | * NumBytes: Number of bytes to be programmed (always a multiple of program page size, defined in FlashDev.c) 195 | * pSrcBuff: Point to the source buffer 196 | * 197 | * Return value 198 | * 0 O.K. 199 | * 1 Error 200 | */ 201 | int ProgramPage(U32 DestAddr, U32 NumBytes, U8 *pSrcBuff) { 202 | volatile U8 * pSrc; 203 | volatile U8 * pDest; 204 | U8 AccessWidth; 205 | U32 Status; 206 | U32 NumPages; 207 | U32 NumBytesAtOnce; 208 | int r; 209 | 210 | r = -1; 211 | pSrc = (volatile U8*)pSrcBuff; 212 | pDest = (volatile U8*)DestAddr; 213 | // 214 | // RAMCode is able to program multiple pages 215 | // 216 | NumPages = NumBytes >> PAGE_SIZE_SHIFT; 217 | // 218 | // Program page-wise 219 | // 220 | if (NumPages) { 221 | r = 0; 222 | do { 223 | NumBytesAtOnce = (1 << PAGE_SIZE_SHIFT); 224 | _FeedWatchdog(); 225 | // 226 | // Program one page 227 | // 228 | FMC_TADR = (U32)pDest; 229 | FMC_WRDR = (U32)(*(volatile U32 *)pSrc); 230 | FMC_OCMR = FMC_OCMR_CMD_WP; 231 | FMC_OPCR = FMC_OPCR_OPM_CM; 232 | 233 | while((FMC_OPCR & FMC_OPCR_OPM_MASK) != FMC_OPCR_OPM_FN){ 234 | _FeedWatchdog(); 235 | } 236 | 237 | pSrc = pSrc + 4; 238 | pDest = pDest + 4; 239 | } while (--NumPages); 240 | } 241 | 242 | return r; 243 | } 244 | 245 | /********************************************************************* 246 | * 247 | * Verify 248 | * 249 | * Function description 250 | * Compares a specified number of bytes of a provided data 251 | * buffer with the content of the device 252 | * 253 | * Parameters 254 | * Addr: Start address in memory which should be compared 255 | * NumBytes: Number of bytes to be compared 256 | * pBuff: Pointer to the data to be compared 257 | * 258 | * Return value 259 | * == (Addr + NumBytes): O.K. 260 | * != (Addr + NumBytes): *not* O.K. 261 | * 262 | */ 263 | #if SUPPORT_NATIVE_VERIFY 264 | U32 Verify(U32 Addr, U32 NumBytes, U8 *pBuff) { 265 | unsigned char *pFlash; 266 | unsigned long r; 267 | 268 | pFlash = (unsigned char *)Addr; 269 | r = Addr + NumBytes; 270 | do { 271 | if (*pFlash != *pBuff) { 272 | r = (unsigned long)pFlash; 273 | break; 274 | } 275 | pFlash++; 276 | pBuff++; 277 | } while (--NumBytes); 278 | return r; 279 | } 280 | #endif 281 | 282 | /********************************************************************* 283 | * 284 | * BlankCheck 285 | * 286 | * Function description 287 | * Checks if a memory region is blank 288 | * 289 | * Parameters 290 | * Addr: Blank check start address 291 | * NumBytes: Number of bytes to be checked 292 | * BlankData: Pointer to the destination data 293 | * 294 | * Return value 295 | * 0 O.K., blank 296 | * 1 O.K., *not* blank 297 | * < 0 Error 298 | * 299 | */ 300 | #if SUPPORT_BLANK_CHECK 301 | int BlankCheck(U32 Addr, U32 NumBytes, U8 BlankData) { 302 | U8* pData; 303 | 304 | pData = (U8 *)Addr; 305 | do { 306 | if (*pData++ != BlankData) { 307 | return 1; 308 | } 309 | } while (--NumBytes); 310 | return 0; 311 | } 312 | #endif 313 | 314 | /********************************************************************* 315 | * 316 | * SEGGER_OPEN_Read 317 | * 318 | * Function description 319 | * Reads a specified number of bytes into the provided buffer 320 | * 321 | * Parameters 322 | * Addr: Start read address 323 | * NumBytes: Number of bytes to be read 324 | * pBuff: Pointer to the destination data 325 | * 326 | * Return value 327 | * >= 0 O.K., NumBytes read 328 | * < 0 Error 329 | * 330 | */ 331 | #if SUPPORT_NATIVE_READ_BACK 332 | int SEGGER_OPEN_Read(U32 Addr, U32 NumBytes, U8 *pDestBuff) { 333 | // 334 | // Read function 335 | // Add your code here... 336 | // 337 | return NumBytes; 338 | } 339 | #endif 340 | -------------------------------------------------------------------------------- /apps/vortex_core_main.c: -------------------------------------------------------------------------------- 1 | 2 | #include "ch.h" 3 | #include "hal.h" 4 | 5 | #include "gd25q_flash.h" 6 | 7 | // CKCU Clocks 8 | // ///////////////////////////////////////////////////////////////////////////// 9 | #define TYPE_AHB (1 << 28) 10 | #define TYPE_APB0 (2 << 28) 11 | #define TYPE_APB1 (3 << 28) 12 | 13 | #define CLOCK_FMC TYPE_AHB | (1 << 0) 14 | #define CLOCK_SRAM TYPE_AHB | (1 << 2) 15 | #define CLOCK_PDMAEN TYPE_AHB | (1 << 4) 16 | #define CLOCK_BMEN TYPE_AHB | (1 << 5) 17 | #define CLOCK_APB0EN TYPE_AHB | (1 << 6) 18 | #define CLOCK_APB1EN TYPE_AHB | (1 << 7) 19 | #define CLOCK_USBEN TYPE_AHB | (1 << 10) 20 | #define CLOCK_CKREF TYPE_AHB | (1 << 11) 21 | #define CLOCK_EBI TYPE_AHB | (1 << 12) 22 | #define CLOCK_CRC TYPE_AHB | (1 << 13) 23 | 24 | #define CLOCK_I2C0 TYPE_APB0 | (1 << 0) 25 | #define CLOCK_I2C1 TYPE_APB0 | (1 << 1) 26 | #define CLOCK_SPI0 TYPE_APB0 | (1 << 4) 27 | #define CLOCK_SPI1 TYPE_APB0 | (1 << 5) 28 | #define CLOCK_USR0 TYPE_APB0 | (1 << 8) 29 | #define CLOCK_USR1 TYPE_APB0 | (1 << 9) 30 | #define CLOCK_UR0 TYPE_APB0 | (1 << 10) 31 | #define CLOCK_UR1 TYPE_APB0 | (1 << 11) 32 | #define CLOCK_AFIO TYPE_APB0 | (1 << 14) 33 | #define CLOCK_EXTI TYPE_APB0 | (1 << 15) 34 | #define CLOCK_SCI TYPE_APB0 | (1 << 24) 35 | #define CLOCK_I2S TYPE_APB0 | (1 << 25) 36 | 37 | #define CLOCK_MCTM0 TYPE_APB1 | (1 << 0) 38 | #define CLOCK_MCTM1 TYPE_APB1 | (1 << 1) 39 | #define CLOCK_WDT TYPE_APB1 | (1 << 4) 40 | #define CLOCK_BKP TYPE_APB1 | (1 << 6) 41 | #define CLOCK_GPTM0 TYPE_APB1 | (1 << 8) 42 | #define CLOCK_GPTM1 TYPE_APB1 | (1 << 9) 43 | #define CLOCK_BFTM0 TYPE_APB1 | (1 << 16) 44 | #define CLOCK_BFTM1 TYPE_APB1 | (1 << 17) 45 | #define CLOCK_OPA0 TYPE_APB1 | (1 << 22) 46 | #define CLOCK_OPA1 TYPE_APB1 | (1 << 23) 47 | #define CLOCK_ADC TYPE_APB1 | (1 << 24) 48 | 49 | // Peripherals 50 | // //////////////////////////////////////////////////////////////////////////////////////////////// 51 | #define GPIO_A_ID 0 52 | #define GPIO_B_ID 1 53 | #define GPIO_C_ID 2 54 | #define GPIO_D_ID 3 55 | 56 | #define CLOCK_PA TYPE_AHB | (1 << 16) 57 | #define CLOCK_PB TYPE_AHB | (1 << 17) 58 | #define CLOCK_PC TYPE_AHB | (1 << 18) 59 | #define CLOCK_PD TYPE_AHB | (1 << 19) 60 | 61 | typedef uint32_t u32; 62 | typedef uint8_t u8; 63 | 64 | u32 strlen(const char *str){ 65 | u32 i = 0; 66 | while(*str++) 67 | ++i; 68 | return i; 69 | } 70 | 71 | u8 utox(u32 num, char *str){ 72 | char tmp[8]; 73 | int i = 0; 74 | while(num){ 75 | tmp[i++] = "0123456789abcdef"[num & 0xf]; 76 | num >>= 4; 77 | } 78 | for(int j = i-1; j >= 0; --j){ 79 | *(str++) = tmp[j]; 80 | } 81 | *str = 0; 82 | return i; 83 | } 84 | 85 | typedef enum { 86 | PIN_INPUT = 0, 87 | PIN_OUTPUT, 88 | } PinDir; 89 | 90 | typedef enum { 91 | DRIVE_4mA = 0, 92 | DRIVE_8mA, 93 | } DriveMode; 94 | 95 | typedef enum { 96 | PULL_DISABLE = 0, 97 | PULL_UP, 98 | PULL_DOWN, 99 | } PullMode; 100 | 101 | void nvic_enable_intr(u8 num){ 102 | u8 off = num >> 5; 103 | u32 mask = 1 << (num & 0x1f); 104 | NVIC->ISER[off] = mask; 105 | } 106 | 107 | void nvic_disable_intr(u8 num){ 108 | u8 off = num >> 5; 109 | u32 mask = 1 << (num & 0x1f); 110 | NVIC->ICER[off] = mask; 111 | } 112 | 113 | void ckcu_clock_enable(u32 clock, int en){ 114 | volatile u32 *reg; 115 | switch(clock >> 28){ 116 | case 1: 117 | reg = &(CKCU->AHBCCR); 118 | break; 119 | case 2: 120 | reg = &(CKCU->APBCCR0); 121 | break; 122 | case 3: 123 | reg = &(CKCU->APBCCR1); 124 | break; 125 | default: 126 | return; 127 | } 128 | 129 | u32 mask = clock & 0x0FFFFFFFU; 130 | u32 bits = *reg; 131 | if(en) 132 | bits |= mask; 133 | else 134 | bits &= ~mask; 135 | *reg = bits; 136 | } 137 | 138 | void ckcu_clocks_enable(int ahb_mask, int apb0_mask, int apb1_mask, int en){ 139 | u32 ahb = CKCU->AHBCCR; 140 | u32 apb0 = CKCU->APBCCR0; 141 | u32 apb1 = CKCU->APBCCR1; 142 | 143 | ahb &= ~ahb_mask; 144 | apb0 &= ~apb0_mask; 145 | apb1 &= ~apb1_mask; 146 | 147 | if(en){ 148 | ahb |= ahb_mask; 149 | apb0 |= apb0_mask; 150 | apb1 |= apb1_mask; 151 | } 152 | 153 | CKCU->AHBCCR = ahb; 154 | CKCU->APBCCR0 = apb0; 155 | CKCU->APBCCR1 = apb1; 156 | } 157 | 158 | void afio_pin_config(int port, int pin, int function){ 159 | const u8 shift = (pin & 0x7) << 2; 160 | if(pin >= 8){ 161 | AFIO->GPxCFGR[port][1] &= ~(0xf << shift); 162 | AFIO->GPxCFGR[port][1] |= (function << shift); 163 | } else { 164 | AFIO->GPxCFGR[port][0] &= ~(0xf << shift); 165 | AFIO->GPxCFGR[port][0] |= (function << shift); 166 | } 167 | } 168 | 169 | void afio_init(void){ 170 | // enable AFIO clock 171 | ckcu_clock_enable(CLOCK_AFIO, 1); 172 | // enable GPIO A clock 173 | ckcu_clock_enable(CLOCK_PA, 1); 174 | ckcu_clock_enable(CLOCK_PB, 1); 175 | ckcu_clock_enable(CLOCK_PC, 1); 176 | 177 | // gpio_pin_input_enable(GPIO_A, 14, 0); 178 | // gpio_pin_pull(GPIO_A, 14, PULL_DISABLE); 179 | // gpio_pin_input_enable(GPIO_A, 15, 0); 180 | // gpio_pin_pull(GPIO_A, 15, PULL_DISABLE); 181 | 182 | // gpio_pin_input_enable(GPIO_A, 11, 0); 183 | // gpio_pin_pull(GPIO_A, 11, PULL_DISABLE); 184 | 185 | afio_pin_config(GPIO_A_ID, 11, AFIO_GPIO); 186 | afio_pin_config(GPIO_C_ID, 13, AFIO_GPIO); 187 | 188 | afio_pin_config(GPIO_C_ID, 14, AFIO_GPIO); 189 | afio_pin_config(GPIO_C_ID, 15, AFIO_GPIO); 190 | 191 | // check HSEEN 192 | if(CKCU->GCCR.HSEEN == 0){ 193 | afio_pin_config(GPIO_B_ID, 14, AFIO_GPIO); 194 | afio_pin_config(GPIO_B_ID, 15, AFIO_GPIO); 195 | } 196 | 197 | // disable GPIO A clock 198 | // ckcu_clock_enable(CLOCK_PA, 0); 199 | 200 | // CKOUT on PA8 201 | // afio_pin_config(GPIO_A, 8, AFIO_OTHER); 202 | // REG_CKCU->GCFGR.CKOUTSRC = 1; // CKOUTSR = CCK_AHB / 16 203 | // REG_CKCU->GCFGR.CKOUTSRC = 2; // CKOUTSR = CCK_SYS / 16 204 | 205 | // USART on PA8 206 | afio_pin_config(GPIO_A_ID, 8, AFIO_USART); 207 | } 208 | 209 | void pinmux_spi(void){ 210 | gpio_pin_direction(GPIO_B_ID, 10, PIN_OUTPUT); 211 | gpio_pin_pull(GPIO_B_ID, 10, PULL_DISABLE); 212 | // Select AF5 (SPI) for GPIO B pins 7,8,9 (LQFP-64 pins 58,59,60) 213 | afio_pin_config(GPIO_B_ID, 7, 5); 214 | afio_pin_config(GPIO_B_ID, 8, 5); 215 | afio_pin_config(GPIO_B_ID, 9, 5); 216 | } 217 | 218 | void spi_init(void){ 219 | ckcu_clock_enable(CLOCK_PB, 1); 220 | ckcu_clock_enable(CLOCK_AFIO, 1); 221 | // enable SPI1 clock 222 | ckcu_clock_enable(CLOCK_SPI1, 1); 223 | 224 | // chip select high 225 | gpio_pin_set_reset(GPIO_B_ID, 10, 1); 226 | gpio_pin_direction(GPIO_B_ID, 10, PIN_OUTPUT); 227 | 228 | // gpio_pin_pull(GPIO_B, 10, PULL_DISABLE); 229 | // gpio_pin_pull(GPIO_B, 10, PULL_UP); 230 | // gpio_pin_drive(GPIO_B, 10, DRIVE_8mA); 231 | 232 | // gpio_pin_drive(GPIO_B, 7, DRIVE_8mA); 233 | // gpio_pin_drive(GPIO_B, 8, DRIVE_8mA); 234 | // gpio_pin_drive(GPIO_B, 9, DRIVE_8mA); 235 | 236 | // pinmux spi pins 237 | afio_pin_config(GPIO_B_ID, 7, 5); 238 | afio_pin_config(GPIO_B_ID, 8, 5); 239 | afio_pin_config(GPIO_B_ID, 9, 5); 240 | 241 | SPI1->SPICR1.SELM = 0; // software chip select 242 | SPI1->SPICR1.SELAP = 0; // active low 243 | 244 | SPI1->SPICR1.DFL = 8; // 8 bits 245 | SPI1->SPICR1.FORMAT = 1; // clock low, first edge 246 | SPI1->SPICR1.FIRSTBIT = 0; // msb first 247 | SPI1->SPICR1.MODE = 1; // master mode 248 | 249 | SPI1->SPICPR.CP = 1; // prescaler 250 | 251 | SPI1->SPIFCR.FIFOEN = 1; // fifo enable 252 | SPI1->SPIFCR.RXFTLS = 4; 253 | SPI1->SPIFCR.TXFTLS = 4; 254 | 255 | SPI1->SPICR0.SELOEN = 1; // chip select output 256 | SPI1->SPICR0.SPIEN = 1; // enable 257 | } 258 | 259 | u8 spi_txrx(u8 byte){ 260 | // wait for tx empty 261 | while(SPI1->SPISR.TXBE == 0); 262 | // send byte 263 | SPI1->SPIDR.DR = byte; 264 | // wait for rx data 265 | while(SPI1->SPISR.RXBNE == 0); 266 | // recv byte 267 | u32 data = SPI1->SPIDR.DR; 268 | return data & 0xFF; 269 | } 270 | 271 | void spi_flash_command(const u8 *cmd, int writelen, u8 *out, int readlen){ 272 | // chip select low 273 | gpio_pin_set_reset(GPIO_B_ID, 10, 0); 274 | 275 | // // Send command bytes 276 | // for(int i = 0; i < writelen; ++i){ 277 | // spi_txrx(cmd[i]); 278 | // } 279 | 280 | // // Recv bytes 281 | // for(int i = 0; i < readlen; ++i){ 282 | // out[i] = spi_txrx(0); 283 | // } 284 | 285 | int wlen = 0; 286 | while(wlen < writelen){ 287 | int len = MIN(writelen - wlen, 8); 288 | // Send command bytes 289 | for(int i = 0; i < len; ++i){ 290 | SPI1->SPIDR.word = cmd[wlen++]; 291 | } 292 | // Read dummy data 293 | for(int i = 0; i < len; ++i){ 294 | // wait for recv data 295 | while(SPI1->SPIFSR.RXFS == 0); 296 | // read/discard data 297 | SPI1->SPIDR.word; // this only works in C 298 | } 299 | } 300 | 301 | int rlen = 0; 302 | while(rlen < readlen){ 303 | int len = MIN(readlen - rlen, 8); 304 | // Send dummy bytes 305 | for(int i = 0; i < len; ++i){ 306 | SPI1->SPIDR.word = 0; 307 | } 308 | // Read data 309 | for(int i = 0; i < len; ++i){ 310 | // wait for recv data 311 | while(SPI1->SPIFSR.RXFS == 0); 312 | // read data 313 | u32 data = SPI1->SPIDR.word; 314 | out[rlen++] = data & 0xFF; 315 | } 316 | } 317 | 318 | // chip select high 319 | gpio_pin_set_reset(GPIO_B_ID, 10, 1); 320 | } 321 | 322 | u8 flash_id[16]; 323 | u8 flash_mid[16]; 324 | u8 flash_data[0x400]; 325 | 326 | void spi_read(void){ 327 | // pinmux_spi(); 328 | 329 | u8 cmd[4]; 330 | 331 | cmd[0] = GD25Q_RDID; 332 | spi_flash_command(cmd, 1, flash_id, 3); 333 | 334 | cmd[0] = GD25Q_REMS; 335 | cmd[1] = 0; 336 | cmd[2] = 0; 337 | cmd[3] = 0; 338 | spi_flash_command(cmd, 4, flash_mid, 2); 339 | 340 | u32 addr = 0; 341 | // u32 addr = 0xff0; 342 | cmd[0] = GD25Q_READ; 343 | cmd[1] = (addr >> 16) & 0xFF; 344 | cmd[2] = (addr >> 8) & 0xFF; 345 | cmd[3] = addr & 0xFF; 346 | spi_flash_command(cmd, 4, flash_data, 0x400); 347 | } 348 | 349 | #define VERSION_ADDR 0x2800 350 | 351 | void flash_version_clear(void){ 352 | FMC->TADR.TADB = VERSION_ADDR; 353 | FMC->OCMR.CMD = OCMR_PAGE_ERASE; 354 | FMC->OPCR.OPM = OPCR_COMMIT; 355 | 356 | while(FMC->OPCR.OPM != OPCR_FINISHED); 357 | } 358 | 359 | void usart_init(void){ 360 | // USART0 clock 361 | ckcu_clock_enable(CLOCK_USR0, 1); 362 | 363 | USART0->MDR.MODE = 0; // normal operation 364 | USART0->DLR.BRD = 625; // 115200 baud 365 | USART0->LCR.WLS = 1; // 8 bits 366 | USART0->LCR.PBE = 0; // no parity 367 | USART0->LCR.NSB = 0; // 1 stop bit 368 | USART0->FCR.URRXEN = 0; // RX disable 369 | USART0->FCR.URTXEN = 1; // TX enable 370 | } 371 | 372 | void usart_write(const u8 *data, u32 size){ 373 | while(size > 0){ 374 | USART0->TBR.TD = *data; // write fifo 375 | while(!(USART0->LSR.TXEMPT)); // wait while tx not empty 376 | data++; 377 | size--; 378 | } 379 | } 380 | 381 | void usart_log(const char *str){ 382 | usart_write((const u8 *)str, strlen(str)); 383 | usart_write((const u8 *)"\r\n", 2); 384 | } 385 | 386 | int main(void){ 387 | // HAL Init 388 | halInit(); 389 | 390 | // Clear the version so the board resets to the bootloader 391 | flash_version_clear(); 392 | 393 | // I/O init 394 | afio_init(); 395 | 396 | // spi_init(); 397 | // spi_read(); 398 | 399 | usart_init(); 400 | 401 | usart_log("Vortex CORE Boot"); 402 | 403 | usart_log("TEST"); 404 | 405 | // USB 406 | // usb_init(); 407 | // usb_init_descriptors(); 408 | // usb_callback_suspend(on_suspend); 409 | // usb_callback_configuration(on_configuration); 410 | 411 | // Enable D+ pull-up 412 | // usb_pull_up(1); 413 | 414 | u32 count = 0; 415 | while(1){ 416 | count = count + 1; 417 | // wdt_reload(); 418 | } 419 | 420 | return 0; 421 | } 422 | -------------------------------------------------------------------------------- /halconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /** 18 | * @file templates/halconf.h 19 | * @brief HAL configuration header. 20 | * @details HAL configuration file, this file allows to enable or disable the 21 | * various device drivers from your application. You may also use 22 | * this file in order to override the device drivers default settings. 23 | * 24 | * @addtogroup HAL_CONF 25 | * @{ 26 | */ 27 | 28 | #ifndef _HALCONF_H_ 29 | #define _HALCONF_H_ 30 | 31 | #include "mcuconf.h" 32 | 33 | /** 34 | * @brief Enables the PAL subsystem. 35 | */ 36 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) 37 | #define HAL_USE_PAL TRUE 38 | #endif 39 | 40 | /** 41 | * @brief Enables the ADC subsystem. 42 | */ 43 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) 44 | #define HAL_USE_ADC FALSE 45 | #endif 46 | 47 | /** 48 | * @brief Enables the CAN subsystem. 49 | */ 50 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) 51 | #define HAL_USE_CAN FALSE 52 | #endif 53 | 54 | /** 55 | * @brief Enables the DAC subsystem. 56 | */ 57 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) 58 | #define HAL_USE_DAC FALSE 59 | #endif 60 | 61 | /** 62 | * @brief Enables the EXT subsystem. 63 | */ 64 | #if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) 65 | #define HAL_USE_EXT FALSE 66 | #endif 67 | 68 | /** 69 | * @brief Enables the GPT subsystem. 70 | */ 71 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) 72 | #define HAL_USE_GPT FALSE 73 | #endif 74 | 75 | /** 76 | * @brief Enables the I2C subsystem. 77 | */ 78 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) 79 | #define HAL_USE_I2C FALSE 80 | #endif 81 | 82 | /** 83 | * @brief Enables the I2S subsystem. 84 | */ 85 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) 86 | #define HAL_USE_I2S FALSE 87 | #endif 88 | 89 | /** 90 | * @brief Enables the ICU subsystem. 91 | */ 92 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) 93 | #define HAL_USE_ICU FALSE 94 | #endif 95 | 96 | /** 97 | * @brief Enables the MAC subsystem. 98 | */ 99 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) 100 | #define HAL_USE_MAC FALSE 101 | #endif 102 | 103 | /** 104 | * @brief Enables the MMC_SPI subsystem. 105 | */ 106 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) 107 | #define HAL_USE_MMC_SPI FALSE 108 | #endif 109 | 110 | /** 111 | * @brief Enables the PWM subsystem. 112 | */ 113 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) 114 | #define HAL_USE_PWM FALSE 115 | #endif 116 | 117 | /** 118 | * @brief Enables the RTC subsystem. 119 | */ 120 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) 121 | #define HAL_USE_RTC FALSE 122 | #endif 123 | 124 | /** 125 | * @brief Enables the SDC subsystem. 126 | */ 127 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) 128 | #define HAL_USE_SDC FALSE 129 | #endif 130 | 131 | /** 132 | * @brief Enables the SERIAL subsystem. 133 | */ 134 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) 135 | #define HAL_USE_SERIAL FALSE 136 | #endif 137 | 138 | /** 139 | * @brief Enables the SERIAL over USB subsystem. 140 | */ 141 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) 142 | #define HAL_USE_SERIAL_USB FALSE 143 | #endif 144 | 145 | /** 146 | * @brief Enables the SPI subsystem. 147 | */ 148 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) 149 | #define HAL_USE_SPI TRUE 150 | #endif 151 | 152 | /** 153 | * @brief Enables the UART subsystem. 154 | */ 155 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) 156 | #define HAL_USE_UART TRUE 157 | #endif 158 | 159 | /** 160 | * @brief Enables the USB subsystem. 161 | */ 162 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) 163 | #define HAL_USE_USB TRUE 164 | #endif 165 | 166 | /** 167 | * @brief Enables the WDG subsystem. 168 | */ 169 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) 170 | #define HAL_USE_WDG FALSE 171 | #endif 172 | 173 | /*===========================================================================*/ 174 | /* ADC driver related settings. */ 175 | /*===========================================================================*/ 176 | 177 | /** 178 | * @brief Enables synchronous APIs. 179 | * @note Disabling this option saves both code and data space. 180 | */ 181 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) 182 | #define ADC_USE_WAIT TRUE 183 | #endif 184 | 185 | /** 186 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. 187 | * @note Disabling this option saves both code and data space. 188 | */ 189 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 190 | #define ADC_USE_MUTUAL_EXCLUSION TRUE 191 | #endif 192 | 193 | /*===========================================================================*/ 194 | /* CAN driver related settings. */ 195 | /*===========================================================================*/ 196 | 197 | /** 198 | * @brief Sleep mode related APIs inclusion switch. 199 | */ 200 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) 201 | #define CAN_USE_SLEEP_MODE TRUE 202 | #endif 203 | 204 | /*===========================================================================*/ 205 | /* I2C driver related settings. */ 206 | /*===========================================================================*/ 207 | 208 | /** 209 | * @brief Enables the mutual exclusion APIs on the I2C bus. 210 | */ 211 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 212 | #define I2C_USE_MUTUAL_EXCLUSION TRUE 213 | #endif 214 | 215 | /*===========================================================================*/ 216 | /* MAC driver related settings. */ 217 | /*===========================================================================*/ 218 | 219 | /** 220 | * @brief Enables an event sources for incoming packets. 221 | */ 222 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) 223 | #define MAC_USE_ZERO_COPY FALSE 224 | #endif 225 | 226 | /** 227 | * @brief Enables an event sources for incoming packets. 228 | */ 229 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) 230 | #define MAC_USE_EVENTS TRUE 231 | #endif 232 | 233 | /*===========================================================================*/ 234 | /* MMC_SPI driver related settings. */ 235 | /*===========================================================================*/ 236 | 237 | /** 238 | * @brief Delays insertions. 239 | * @details If enabled this options inserts delays into the MMC waiting 240 | * routines releasing some extra CPU time for the threads with 241 | * lower priority, this may slow down the driver a bit however. 242 | * This option is recommended also if the SPI driver does not 243 | * use a DMA channel and heavily loads the CPU. 244 | */ 245 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) 246 | #define MMC_NICE_WAITING TRUE 247 | #endif 248 | 249 | /*===========================================================================*/ 250 | /* SDC driver related settings. */ 251 | /*===========================================================================*/ 252 | 253 | /** 254 | * @brief Number of initialization attempts before rejecting the card. 255 | * @note Attempts are performed at 10mS intervals. 256 | */ 257 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) 258 | #define SDC_INIT_RETRY 100 259 | #endif 260 | 261 | /** 262 | * @brief Include support for MMC cards. 263 | * @note MMC support is not yet implemented so this option must be kept 264 | * at @p FALSE. 265 | */ 266 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) 267 | #define SDC_MMC_SUPPORT FALSE 268 | #endif 269 | 270 | /** 271 | * @brief Delays insertions. 272 | * @details If enabled this options inserts delays into the MMC waiting 273 | * routines releasing some extra CPU time for the threads with 274 | * lower priority, this may slow down the driver a bit however. 275 | */ 276 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) 277 | #define SDC_NICE_WAITING TRUE 278 | #endif 279 | 280 | /*===========================================================================*/ 281 | /* SERIAL driver related settings. */ 282 | /*===========================================================================*/ 283 | 284 | /** 285 | * @brief Default bit rate. 286 | * @details Configuration parameter, this is the baud rate selected for the 287 | * default configuration. 288 | */ 289 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) 290 | #define SERIAL_DEFAULT_BITRATE 38400 291 | #endif 292 | 293 | /** 294 | * @brief Serial buffers size. 295 | * @details Configuration parameter, you can change the depth of the queue 296 | * buffers depending on the requirements of your application. 297 | * @note The default is 64 bytes for both the transmission and receive 298 | * buffers. 299 | */ 300 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) 301 | #define SERIAL_BUFFERS_SIZE 16 302 | #endif 303 | 304 | /*===========================================================================*/ 305 | /* SERIAL_USB driver related setting. */ 306 | /*===========================================================================*/ 307 | 308 | /** 309 | * @brief Serial over USB buffers size. 310 | * @details Configuration parameter, the buffer size must be a multiple of 311 | * the USB data endpoint maximum packet size. 312 | * @note The default is 64 bytes for both the transmission and receive 313 | * buffers. 314 | */ 315 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) 316 | #define SERIAL_USB_BUFFERS_SIZE 256 317 | #endif 318 | 319 | /*===========================================================================*/ 320 | /* SPI driver related settings. */ 321 | /*===========================================================================*/ 322 | 323 | /** 324 | * @brief Enables synchronous APIs. 325 | * @note Disabling this option saves both code and data space. 326 | */ 327 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) 328 | #define SPI_USE_WAIT TRUE 329 | #endif 330 | 331 | /** 332 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. 333 | * @note Disabling this option saves both code and data space. 334 | */ 335 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 336 | #define SPI_USE_MUTUAL_EXCLUSION TRUE 337 | #endif 338 | 339 | /*===========================================================================*/ 340 | /* USB driver related settings. */ 341 | /*===========================================================================*/ 342 | 343 | /** 344 | * @brief Enables synchronous APIs. 345 | * @note Disabling this option saves both code and data space. 346 | */ 347 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) 348 | #define USB_USE_WAIT TRUE 349 | #endif 350 | 351 | #endif /* _HALCONF_H_ */ 352 | 353 | /** @} */ 354 | -------------------------------------------------------------------------------- /apps/pok3r_main.c: -------------------------------------------------------------------------------- 1 | 2 | #include "ch.h" 3 | #include "hal.h" 4 | 5 | #include "gd25q_flash.h" 6 | 7 | #define MIN(A, B) (A < B ? A : B) 8 | #define MAX(A, B) (A > B ? A : B) 9 | 10 | // CKCU Clocks 11 | // ///////////////////////////////////////////////////////////////////////////// 12 | #define TYPE_AHB (1 << 28) 13 | #define TYPE_APB0 (2 << 28) 14 | #define TYPE_APB1 (3 << 28) 15 | 16 | #define CLOCK_FMC TYPE_AHB | (1 << 0) 17 | #define CLOCK_SRAM TYPE_AHB | (1 << 2) 18 | #define CLOCK_PDMAEN TYPE_AHB | (1 << 4) 19 | #define CLOCK_BMEN TYPE_AHB | (1 << 5) 20 | #define CLOCK_APB0EN TYPE_AHB | (1 << 6) 21 | #define CLOCK_APB1EN TYPE_AHB | (1 << 7) 22 | #define CLOCK_USBEN TYPE_AHB | (1 << 10) 23 | #define CLOCK_CKREF TYPE_AHB | (1 << 11) 24 | #define CLOCK_EBI TYPE_AHB | (1 << 12) 25 | #define CLOCK_CRC TYPE_AHB | (1 << 13) 26 | 27 | #define CLOCK_I2C0 TYPE_APB0 | (1 << 0) 28 | #define CLOCK_I2C1 TYPE_APB0 | (1 << 1) 29 | #define CLOCK_SPI0 TYPE_APB0 | (1 << 4) 30 | #define CLOCK_SPI1 TYPE_APB0 | (1 << 5) 31 | #define CLOCK_USR0 TYPE_APB0 | (1 << 8) 32 | #define CLOCK_USR1 TYPE_APB0 | (1 << 9) 33 | #define CLOCK_UR0 TYPE_APB0 | (1 << 10) 34 | #define CLOCK_UR1 TYPE_APB0 | (1 << 11) 35 | #define CLOCK_AFIO TYPE_APB0 | (1 << 14) 36 | #define CLOCK_EXTI TYPE_APB0 | (1 << 15) 37 | #define CLOCK_SCI TYPE_APB0 | (1 << 24) 38 | #define CLOCK_I2S TYPE_APB0 | (1 << 25) 39 | 40 | #define CLOCK_MCTM0 TYPE_APB1 | (1 << 0) 41 | #define CLOCK_MCTM1 TYPE_APB1 | (1 << 1) 42 | #define CLOCK_WDT TYPE_APB1 | (1 << 4) 43 | #define CLOCK_BKP TYPE_APB1 | (1 << 6) 44 | #define CLOCK_GPTM0 TYPE_APB1 | (1 << 8) 45 | #define CLOCK_GPTM1 TYPE_APB1 | (1 << 9) 46 | #define CLOCK_BFTM0 TYPE_APB1 | (1 << 16) 47 | #define CLOCK_BFTM1 TYPE_APB1 | (1 << 17) 48 | #define CLOCK_OPA0 TYPE_APB1 | (1 << 22) 49 | #define CLOCK_OPA1 TYPE_APB1 | (1 << 23) 50 | #define CLOCK_ADC TYPE_APB1 | (1 << 24) 51 | 52 | // Peripherals 53 | // //////////////////////////////////////////////////////////////////////////////////////////////// 54 | #define GPIO_A_ID 0 55 | #define GPIO_B_ID 1 56 | #define GPIO_C_ID 2 57 | #define GPIO_D_ID 3 58 | #define GPIO_E_ID 4 59 | 60 | #define CLOCK_PA TYPE_AHB | (1 << 16) 61 | #define CLOCK_PB TYPE_AHB | (1 << 17) 62 | #define CLOCK_PC TYPE_AHB | (1 << 18) 63 | #define CLOCK_PD TYPE_AHB | (1 << 19) 64 | #define CLOCK_PE TYPE_AHB | (1 << 20) 65 | 66 | typedef uint32_t u32; 67 | typedef uint8_t u8; 68 | 69 | u32 strlen(const char *str){ 70 | u32 i = 0; 71 | while(*str++) 72 | ++i; 73 | return i; 74 | } 75 | 76 | u8 utox(u32 num, char *str){ 77 | char tmp[8]; 78 | int i = 0; 79 | while(num){ 80 | tmp[i++] = "0123456789abcdef"[num & 0xf]; 81 | num >>= 4; 82 | } 83 | for(int j = i-1; j >= 0; --j){ 84 | *(str++) = tmp[j]; 85 | } 86 | *str = 0; 87 | return i; 88 | } 89 | 90 | typedef enum { 91 | PIN_INPUT = 0, 92 | PIN_OUTPUT, 93 | } PinDir; 94 | 95 | typedef enum { 96 | DRIVE_4mA = 0, 97 | DRIVE_8mA, 98 | } DriveMode; 99 | 100 | typedef enum { 101 | PULL_DISABLE = 0, 102 | PULL_UP, 103 | PULL_DOWN, 104 | } PullMode; 105 | 106 | void nvic_enable_intr(u8 num){ 107 | u8 off = num >> 5; 108 | u32 mask = 1 << (num & 0x1f); 109 | NVIC->ISER[off] = mask; 110 | } 111 | 112 | void nvic_disable_intr(u8 num){ 113 | u8 off = num >> 5; 114 | u32 mask = 1 << (num & 0x1f); 115 | NVIC->ICER[off] = mask; 116 | } 117 | 118 | void ckcu_clock_enable(u32 clock, int en){ 119 | volatile u32 *reg; 120 | switch(clock >> 28){ 121 | case 1: 122 | reg = &(CKCU->AHBCCR); 123 | break; 124 | case 2: 125 | reg = &(CKCU->APBCCR0); 126 | break; 127 | case 3: 128 | reg = &(CKCU->APBCCR1); 129 | break; 130 | default: 131 | return; 132 | } 133 | 134 | u32 mask = clock & 0x0FFFFFFFU; 135 | u32 bits = *reg; 136 | if(en) 137 | bits |= mask; 138 | else 139 | bits &= ~mask; 140 | *reg = bits; 141 | } 142 | 143 | void ckcu_clocks_enable(int ahb_mask, int apb0_mask, int apb1_mask, int en){ 144 | u32 ahb = CKCU->AHBCCR; 145 | u32 apb0 = CKCU->APBCCR0; 146 | u32 apb1 = CKCU->APBCCR1; 147 | 148 | ahb &= ~ahb_mask; 149 | apb0 &= ~apb0_mask; 150 | apb1 &= ~apb1_mask; 151 | 152 | if(en){ 153 | ahb |= ahb_mask; 154 | apb0 |= apb0_mask; 155 | apb1 |= apb1_mask; 156 | } 157 | 158 | CKCU->AHBCCR = ahb; 159 | CKCU->APBCCR0 = apb0; 160 | CKCU->APBCCR1 = apb1; 161 | } 162 | 163 | void afio_pin_config(int port, int pin, int function){ 164 | const u8 shift = (pin & 0x7) << 2; 165 | if(pin >= 8){ 166 | AFIO->GPxCFGR[port][1] &= ~(0xf << shift); 167 | AFIO->GPxCFGR[port][1] |= (function << shift); 168 | } else { 169 | AFIO->GPxCFGR[port][0] &= ~(0xf << shift); 170 | AFIO->GPxCFGR[port][0] |= (function << shift); 171 | } 172 | } 173 | 174 | void afio_init(void){ 175 | // enable AFIO clock 176 | ckcu_clock_enable(CLOCK_AFIO, 1); 177 | // enable GPIO A clock 178 | ckcu_clock_enable(CLOCK_PA, 1); 179 | ckcu_clock_enable(CLOCK_PB, 1); 180 | ckcu_clock_enable(CLOCK_PC, 1); 181 | 182 | // gpio_pin_input_enable(GPIO_A, 14, 0); 183 | // gpio_pin_pull(GPIO_A, 14, PULL_DISABLE); 184 | // gpio_pin_input_enable(GPIO_A, 15, 0); 185 | // gpio_pin_pull(GPIO_A, 15, PULL_DISABLE); 186 | 187 | // gpio_pin_input_enable(GPIO_A, 11, 0); 188 | // gpio_pin_pull(GPIO_A, 11, PULL_DISABLE); 189 | 190 | afio_pin_config(GPIO_A_ID, 11, AFIO_GPIO); 191 | afio_pin_config(GPIO_C_ID, 13, AFIO_GPIO); 192 | 193 | afio_pin_config(GPIO_C_ID, 14, AFIO_GPIO); 194 | afio_pin_config(GPIO_C_ID, 15, AFIO_GPIO); 195 | 196 | // check HSEEN 197 | if(CKCU->GCCR & CKCU_GCCR_HSEEN == 0){ 198 | afio_pin_config(GPIO_B_ID, 14, AFIO_GPIO); 199 | afio_pin_config(GPIO_B_ID, 15, AFIO_GPIO); 200 | } 201 | 202 | // disable GPIO A clock 203 | // ckcu_clock_enable(CLOCK_PA, 0); 204 | 205 | // CKOUT on PA8 206 | // afio_pin_config(GPIO_A, 8, AFIO_OTHER); 207 | // REG_CKCU->GCFGR.CKOUTSRC = 1; // CKOUTSR = CCK_AHB / 16 208 | // REG_CKCU->GCFGR.CKOUTSRC = 2; // CKOUTSR = CCK_SYS / 16 209 | 210 | // USART on PA8 211 | afio_pin_config(GPIO_A_ID, 8, AFIO_USART); 212 | } 213 | 214 | void pinmux_spi(void){ 215 | gpio_pin_direction(GPIO_B_ID, 10, PIN_OUTPUT); 216 | gpio_pin_pull(GPIO_B_ID, 10, PULL_DISABLE); 217 | // Select AF5 (SPI) for GPIO B pins 7,8,9 (LQFP-64 pins 58,59,60) 218 | afio_pin_config(GPIO_B_ID, 7, 5); 219 | afio_pin_config(GPIO_B_ID, 8, 5); 220 | afio_pin_config(GPIO_B_ID, 9, 5); 221 | } 222 | 223 | void spi_init(void){ 224 | ckcu_clock_enable(CLOCK_PB, 1); 225 | ckcu_clock_enable(CLOCK_AFIO, 1); 226 | // enable SPI1 clock 227 | ckcu_clock_enable(CLOCK_SPI1, 1); 228 | 229 | // chip select high 230 | gpio_pin_set_reset(GPIO_B_ID, 10, 1); 231 | gpio_pin_direction(GPIO_B_ID, 10, PIN_OUTPUT); 232 | 233 | // gpio_pin_pull(GPIO_B, 10, PULL_DISABLE); 234 | // gpio_pin_pull(GPIO_B, 10, PULL_UP); 235 | // gpio_pin_drive(GPIO_B, 10, DRIVE_8mA); 236 | 237 | // gpio_pin_drive(GPIO_B, 7, DRIVE_8mA); 238 | // gpio_pin_drive(GPIO_B, 8, DRIVE_8mA); 239 | // gpio_pin_drive(GPIO_B, 9, DRIVE_8mA); 240 | 241 | // pinmux spi pins 242 | afio_pin_config(GPIO_B_ID, 7, 5); 243 | afio_pin_config(GPIO_B_ID, 8, 5); 244 | afio_pin_config(GPIO_B_ID, 9, 5); 245 | 246 | //SPI1->CR1.SELM = 0; // software chip select 247 | //SPI1->CR1.SELAP = 0; // active low 248 | 249 | SPI1->CR1 = 250 | 8 | // 8 bits 251 | SPI_CR1_FORMAT_MODE0 | // clock low, first edge 252 | SPI_CR1_MODE; // master mode 253 | 254 | SPI1->CPR = 1; // prescaler 255 | 256 | SPI1->FCR = 257 | SPI_FCR_FIFOEN | // fifo enable 258 | 4 << 4 | // rx fifo trigger level 259 | 4 << 0; // tx fifo trigger level 260 | 261 | SPI1->CR0 = 262 | SPI_CR0_SELOEN | // chip select output 263 | SPI_CR0_SPIEN; // enable 264 | } 265 | 266 | u8 spi_txrx(u8 byte){ 267 | // wait for tx empty 268 | while((SPI1->SR & SPI_SR_TXBE) == 0); 269 | // send byte 270 | SPI1->DR = byte; 271 | // wait for rx data 272 | while((SPI1->SR & SPI_SR_RXBNE) == 0); 273 | // recv byte 274 | u32 data = SPI1->DR; 275 | return data & 0xFF; 276 | } 277 | 278 | void spi_flash_command(const u8 *cmd, int writelen, u8 *out, int readlen){ 279 | // chip select low 280 | gpio_pin_set_reset(GPIO_B_ID, 10, 0); 281 | 282 | // // Send command bytes 283 | // for(int i = 0; i < writelen; ++i){ 284 | // spi_txrx(cmd[i]); 285 | // } 286 | 287 | // // Recv bytes 288 | // for(int i = 0; i < readlen; ++i){ 289 | // out[i] = spi_txrx(0); 290 | // } 291 | 292 | int wlen = 0; 293 | while(wlen < writelen){ 294 | int len = MIN(writelen - wlen, 8); 295 | // Send command bytes 296 | for(int i = 0; i < len; ++i){ 297 | SPI1->DR = cmd[wlen++]; 298 | } 299 | // Read dummy data 300 | for(int i = 0; i < len; ++i){ 301 | // wait for recv data 302 | while((SPI1->FSR & SPI_FSR_RXFS_MASK) == 0); 303 | // read/discard data 304 | SPI1->DR; // this only works in C 305 | } 306 | } 307 | 308 | int rlen = 0; 309 | while(rlen < readlen){ 310 | int len = MIN(readlen - rlen, 8); 311 | // Send dummy bytes 312 | for(int i = 0; i < len; ++i){ 313 | SPI1->DR = 0; 314 | } 315 | // Read data 316 | for(int i = 0; i < len; ++i){ 317 | // wait for recv data 318 | while((SPI1->FSR & SPI_FSR_RXFS_MASK) == 0); 319 | // read data 320 | u32 data = SPI1->DR; 321 | out[rlen++] = data & 0xFF; 322 | } 323 | } 324 | 325 | // chip select high 326 | gpio_pin_set_reset(GPIO_B_ID, 10, 1); 327 | } 328 | 329 | u8 flash_id[16]; 330 | u8 flash_mid[16]; 331 | u8 flash_data[0x400]; 332 | 333 | void spi_read(void){ 334 | // pinmux_spi(); 335 | 336 | u8 cmd[4]; 337 | 338 | cmd[0] = GD25Q_RDID; 339 | spi_flash_command(cmd, 1, flash_id, 3); 340 | 341 | cmd[0] = GD25Q_REMS; 342 | cmd[1] = 0; 343 | cmd[2] = 0; 344 | cmd[3] = 0; 345 | spi_flash_command(cmd, 4, flash_mid, 2); 346 | 347 | u32 addr = 0; 348 | // u32 addr = 0xff0; 349 | cmd[0] = GD25Q_READ; 350 | cmd[1] = (addr >> 16) & 0xFF; 351 | cmd[2] = (addr >> 8) & 0xFF; 352 | cmd[3] = addr & 0xFF; 353 | spi_flash_command(cmd, 4, flash_data, 0x400); 354 | } 355 | 356 | #define VERSION_ADDR 0x2800 357 | 358 | void flash_version_clear(void){ 359 | FMC->TADR = VERSION_ADDR; 360 | FMC->OCMR = FMC_OCMR_CMD_PAGE_ERASE; 361 | FMC->OPCR = FMC_OPCR_OPM_COMMIT; 362 | 363 | while(FMC->OPCR != FMC_OPCR_OPM_FINISHED); 364 | } 365 | 366 | void usart_init(void){ 367 | // USART0 clock 368 | ckcu_clock_enable(CLOCK_USR0, 1); 369 | 370 | USART0->MDR = USART_MDR_MODE_NORMAL; // normal operation 371 | USART0->DLR = 625; // 115200 baud 372 | USART0->LCR = USART_LCR_WLS_8BIT; // 8 bits 373 | //USART0->LCR.PBE = 0; // no parity 374 | //USART0->LCR.NSB = 0; // 1 stop bit 375 | USART0->FCR &= ~USART_FCR_URRXEN; // RX disable 376 | USART0->FCR |= USART_FCR_URTXEN; // TX enable 377 | } 378 | 379 | void usart_write(const u8 *data, u32 size){ 380 | while(size > 0){ 381 | USART0->TBR = *data; // write fifo 382 | while(!(USART0->LSR & USART_LSR_TXEMPT)); // wait while tx not empty 383 | data++; 384 | size--; 385 | } 386 | } 387 | 388 | void usart_log(const char *str){ 389 | usart_write((const u8 *)str, strlen(str)); 390 | usart_write((const u8 *)"\r\n", 2); 391 | } 392 | 393 | int main(void){ 394 | // HAL Init 395 | halInit(); 396 | 397 | // Clear the version so the board resets to the bootloader 398 | flash_version_clear(); 399 | 400 | // I/O init 401 | afio_init(); 402 | 403 | // spi_init(); 404 | // spi_read(); 405 | 406 | usart_init(); 407 | 408 | usart_log("POK3R Boot"); 409 | 410 | usart_log("TEST"); 411 | 412 | // USB 413 | // usb_init(); 414 | // usb_init_descriptors(); 415 | // usb_callback_suspend(on_suspend); 416 | // usb_callback_configuration(on_configuration); 417 | 418 | // Enable D+ pull-up 419 | // usb_pull_up(1); 420 | 421 | u32 count = 0; 422 | while(1){ 423 | count = count + 1; 424 | // wdt_reload(); 425 | } 426 | 427 | return 0; 428 | } 429 | -------------------------------------------------------------------------------- /chconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /** 18 | * @file templates/chconf.h 19 | * @brief Configuration file template. 20 | * @details A copy of this file must be placed in each project directory, it 21 | * contains the application specific kernel settings. 22 | * 23 | * @addtogroup config 24 | * @details Kernel related settings and hooks. 25 | * @{ 26 | */ 27 | 28 | #ifndef CHCONF_H 29 | #define CHCONF_H 30 | 31 | #define _CHIBIOS_RT_CONF_ 32 | 33 | /*===========================================================================*/ 34 | /** 35 | * @name System timers settings 36 | * @{ 37 | */ 38 | /*===========================================================================*/ 39 | 40 | /** 41 | * @brief System time counter resolution. 42 | * @note Allowed values are 16 or 32 bits. 43 | */ 44 | #define CH_CFG_ST_RESOLUTION 32 45 | 46 | /** 47 | * @brief System tick frequency. 48 | * @details Frequency of the system timer that drives the system ticks. This 49 | * setting also defines the system tick time unit. 50 | */ 51 | #define CH_CFG_ST_FREQUENCY 1000 52 | 53 | /** 54 | * @brief Time delta constant for the tick-less mode. 55 | * @note If this value is zero then the system uses the classic 56 | * periodic tick. This value represents the minimum number 57 | * of ticks that is safe to specify in a timeout directive. 58 | * The value one is not valid, timeouts are rounded up to 59 | * this value. 60 | */ 61 | #define CH_CFG_ST_TIMEDELTA 0 62 | 63 | /** @} */ 64 | 65 | /*===========================================================================*/ 66 | /** 67 | * @name Kernel parameters and options 68 | * @{ 69 | */ 70 | /*===========================================================================*/ 71 | 72 | /** 73 | * @brief Round robin interval. 74 | * @details This constant is the number of system ticks allowed for the 75 | * threads before preemption occurs. Setting this value to zero 76 | * disables the preemption for threads with equal priority and the 77 | * round robin becomes cooperative. Note that higher priority 78 | * threads can still preempt, the kernel is always preemptive. 79 | * @note Disabling the round robin preemption makes the kernel more compact 80 | * and generally faster. 81 | * @note The round robin preemption is not supported in tickless mode and 82 | * must be set to zero in that case. 83 | */ 84 | #define CH_CFG_TIME_QUANTUM 20 85 | 86 | /** 87 | * @brief Managed RAM size. 88 | * @details Size of the RAM area to be managed by the OS. If set to zero 89 | * then the whole available RAM is used. The core memory is made 90 | * available to the heap allocator and/or can be used directly through 91 | * the simplified core memory allocator. 92 | * 93 | * @note In order to let the OS manage the whole RAM the linker script must 94 | * provide the @p __heap_base__ and @p __heap_end__ symbols. 95 | * @note Requires @p CH_CFG_USE_MEMCORE. 96 | */ 97 | #define CH_CFG_MEMCORE_SIZE 0 98 | 99 | /** 100 | * @brief Idle thread automatic spawn suppression. 101 | * @details When this option is activated the function @p chSysInit() 102 | * does not spawn the idle thread. The application @p main() 103 | * function becomes the idle thread and must implement an 104 | * infinite loop. 105 | */ 106 | #define CH_CFG_NO_IDLE_THREAD FALSE 107 | 108 | /* Use __WFI in the idle thread for waiting. Does lower the power 109 | * consumption. */ 110 | #define CORTEX_ENABLE_WFI_IDLE TRUE 111 | 112 | /** @} */ 113 | 114 | /*===========================================================================*/ 115 | /** 116 | * @name Performance options 117 | * @{ 118 | */ 119 | /*===========================================================================*/ 120 | 121 | /** 122 | * @brief OS optimization. 123 | * @details If enabled then time efficient rather than space efficient code 124 | * is used when two possible implementations exist. 125 | * 126 | * @note This is not related to the compiler optimization options. 127 | * @note The default is @p TRUE. 128 | */ 129 | #define CH_CFG_OPTIMIZE_SPEED TRUE 130 | 131 | /** @} */ 132 | 133 | /*===========================================================================*/ 134 | /** 135 | * @name Subsystem options 136 | * @{ 137 | */ 138 | /*===========================================================================*/ 139 | 140 | /** 141 | * @brief Time Measurement APIs. 142 | * @details If enabled then the time measurement APIs are included in 143 | * the kernel. 144 | * 145 | * @note The default is @p TRUE. 146 | */ 147 | #define CH_CFG_USE_TM FALSE 148 | 149 | /** 150 | * @brief Threads registry APIs. 151 | * @details If enabled then the registry APIs are included in the kernel. 152 | * 153 | * @note The default is @p TRUE. 154 | */ 155 | #define CH_CFG_USE_REGISTRY TRUE 156 | 157 | /** 158 | * @brief Threads synchronization APIs. 159 | * @details If enabled then the @p chThdWait() function is included in 160 | * the kernel. 161 | * 162 | * @note The default is @p TRUE. 163 | */ 164 | #define CH_CFG_USE_WAITEXIT TRUE 165 | 166 | /** 167 | * @brief Semaphores APIs. 168 | * @details If enabled then the Semaphores APIs are included in the kernel. 169 | * 170 | * @note The default is @p TRUE. 171 | */ 172 | #define CH_CFG_USE_SEMAPHORES TRUE 173 | 174 | /** 175 | * @brief Semaphores queuing mode. 176 | * @details If enabled then the threads are enqueued on semaphores by 177 | * priority rather than in FIFO order. 178 | * 179 | * @note The default is @p FALSE. Enable this if you have special 180 | * requirements. 181 | * @note Requires @p CH_CFG_USE_SEMAPHORES. 182 | */ 183 | #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE 184 | 185 | /** 186 | * @brief Mutexes APIs. 187 | * @details If enabled then the mutexes APIs are included in the kernel. 188 | * 189 | * @note The default is @p TRUE. 190 | */ 191 | #define CH_CFG_USE_MUTEXES TRUE 192 | 193 | /** 194 | * @brief Enables recursive behavior on mutexes. 195 | * @note Recursive mutexes are heavier and have an increased 196 | * memory footprint. 197 | * 198 | * @note The default is @p FALSE. 199 | * @note Requires @p CH_CFG_USE_MUTEXES. 200 | */ 201 | #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE 202 | 203 | /** 204 | * @brief Conditional Variables APIs. 205 | * @details If enabled then the conditional variables APIs are included 206 | * in the kernel. 207 | * 208 | * @note The default is @p TRUE. 209 | * @note Requires @p CH_CFG_USE_MUTEXES. 210 | */ 211 | #define CH_CFG_USE_CONDVARS TRUE 212 | 213 | /** 214 | * @brief Conditional Variables APIs with timeout. 215 | * @details If enabled then the conditional variables APIs with timeout 216 | * specification are included in the kernel. 217 | * 218 | * @note The default is @p TRUE. 219 | * @note Requires @p CH_CFG_USE_CONDVARS. 220 | */ 221 | #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE 222 | 223 | /** 224 | * @brief Events Flags APIs. 225 | * @details If enabled then the event flags APIs are included in the kernel. 226 | * 227 | * @note The default is @p TRUE. 228 | */ 229 | #define CH_CFG_USE_EVENTS TRUE 230 | 231 | /** 232 | * @brief Events Flags APIs with timeout. 233 | * @details If enabled then the events APIs with timeout specification 234 | * are included in the kernel. 235 | * 236 | * @note The default is @p TRUE. 237 | * @note Requires @p CH_CFG_USE_EVENTS. 238 | */ 239 | #define CH_CFG_USE_EVENTS_TIMEOUT TRUE 240 | 241 | /** 242 | * @brief Synchronous Messages APIs. 243 | * @details If enabled then the synchronous messages APIs are included 244 | * in the kernel. 245 | * 246 | * @note The default is @p TRUE. 247 | */ 248 | #define CH_CFG_USE_MESSAGES TRUE 249 | 250 | /** 251 | * @brief Synchronous Messages queuing mode. 252 | * @details If enabled then messages are served by priority rather than in 253 | * FIFO order. 254 | * 255 | * @note The default is @p FALSE. Enable this if you have special 256 | * requirements. 257 | * @note Requires @p CH_CFG_USE_MESSAGES. 258 | */ 259 | #define CH_CFG_USE_MESSAGES_PRIORITY FALSE 260 | 261 | /** 262 | * @brief Mailboxes APIs. 263 | * @details If enabled then the asynchronous messages (mailboxes) APIs are 264 | * included in the kernel. 265 | * 266 | * @note The default is @p TRUE. 267 | * @note Requires @p CH_CFG_USE_SEMAPHORES. 268 | */ 269 | #define CH_CFG_USE_MAILBOXES TRUE 270 | 271 | /** 272 | * @brief Core Memory Manager APIs. 273 | * @details If enabled then the core memory manager APIs are included 274 | * in the kernel. 275 | * 276 | * @note The default is @p TRUE. 277 | */ 278 | #define CH_CFG_USE_MEMCORE TRUE 279 | 280 | /** 281 | * @brief Heap Allocator APIs. 282 | * @details If enabled then the memory heap allocator APIs are included 283 | * in the kernel. 284 | * 285 | * @note The default is @p TRUE. 286 | * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or 287 | * @p CH_CFG_USE_SEMAPHORES. 288 | * @note Mutexes are recommended. 289 | */ 290 | #define CH_CFG_USE_HEAP TRUE 291 | 292 | /** 293 | * @brief Memory Pools Allocator APIs. 294 | * @details If enabled then the memory pools allocator APIs are included 295 | * in the kernel. 296 | * 297 | * @note The default is @p TRUE. 298 | */ 299 | #define CH_CFG_USE_MEMPOOLS TRUE 300 | 301 | /** 302 | * @brief Dynamic Threads APIs. 303 | * @details If enabled then the dynamic threads creation APIs are included 304 | * in the kernel. 305 | * 306 | * @note The default is @p TRUE. 307 | * @note Requires @p CH_CFG_USE_WAITEXIT. 308 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. 309 | */ 310 | #define CH_CFG_USE_DYNAMIC TRUE 311 | 312 | /** @} */ 313 | 314 | /*===========================================================================*/ 315 | /** 316 | * @name Debug options 317 | * @{ 318 | */ 319 | /*===========================================================================*/ 320 | 321 | /** 322 | * @brief Debug option, kernel statistics. 323 | * 324 | * @note The default is @p FALSE. 325 | */ 326 | #define CH_DBG_STATISTICS FALSE 327 | 328 | /** 329 | * @brief Debug option, system state check. 330 | * @details If enabled the correct call protocol for system APIs is checked 331 | * at runtime. 332 | * 333 | * @note The default is @p FALSE. 334 | */ 335 | #define CH_DBG_SYSTEM_STATE_CHECK FALSE 336 | 337 | /** 338 | * @brief Debug option, parameters checks. 339 | * @details If enabled then the checks on the API functions input 340 | * parameters are activated. 341 | * 342 | * @note The default is @p FALSE. 343 | */ 344 | #define CH_DBG_ENABLE_CHECKS FALSE 345 | 346 | /** 347 | * @brief Debug option, consistency checks. 348 | * @details If enabled then all the assertions in the kernel code are 349 | * activated. This includes consistency checks inside the kernel, 350 | * runtime anomalies and port-defined checks. 351 | * 352 | * @note The default is @p FALSE. 353 | */ 354 | #define CH_DBG_ENABLE_ASSERTS FALSE 355 | 356 | /** 357 | * @brief Debug option, trace buffer. 358 | * @details If enabled then the trace buffer is activated. 359 | * 360 | * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. 361 | */ 362 | #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED 363 | 364 | /** 365 | * @brief Trace buffer entries. 366 | * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is 367 | * different from @p CH_DBG_TRACE_MASK_DISABLED. 368 | */ 369 | #define CH_DBG_TRACE_BUFFER_SIZE 128 370 | 371 | /** 372 | * @brief Debug option, stack checks. 373 | * @details If enabled then a runtime stack check is performed. 374 | * 375 | * @note The default is @p FALSE. 376 | * @note The stack check is performed in a architecture/port dependent way. 377 | * It may not be implemented or some ports. 378 | * @note The default failure mode is to halt the system with the global 379 | * @p panic_msg variable set to @p NULL. 380 | */ 381 | #define CH_DBG_ENABLE_STACK_CHECK FALSE 382 | 383 | /** 384 | * @brief Debug option, stacks initialization. 385 | * @details If enabled then the threads working area is filled with a byte 386 | * value when a thread is created. This can be useful for the 387 | * runtime measurement of the used stack. 388 | * 389 | * @note The default is @p FALSE. 390 | */ 391 | #define CH_DBG_FILL_THREADS FALSE 392 | 393 | /** 394 | * @brief Debug option, threads profiling. 395 | * @details If enabled then a field is added to the @p thread_t structure that 396 | * counts the system ticks occurred while executing the thread. 397 | * 398 | * @note The default is @p FALSE. 399 | * @note This debug option is not currently compatible with the 400 | * tickless mode. 401 | */ 402 | #define CH_DBG_THREADS_PROFILING FALSE 403 | 404 | /** @} */ 405 | 406 | /*===========================================================================*/ 407 | /** 408 | * @name Kernel hooks 409 | * @{ 410 | */ 411 | /*===========================================================================*/ 412 | 413 | /** 414 | * @brief Threads descriptor structure extension. 415 | * @details User fields added to the end of the @p thread_t structure. 416 | */ 417 | #define CH_CFG_THREAD_EXTRA_FIELDS \ 418 | /* Add threads custom fields here.*/ 419 | 420 | /** 421 | * @brief Threads initialization hook. 422 | * @details User initialization code added to the @p chThdInit() API. 423 | * 424 | * @note It is invoked from within @p chThdInit() and implicitly from all 425 | * the threads creation APIs. 426 | */ 427 | #define CH_CFG_THREAD_INIT_HOOK(tp) { \ 428 | /* Add threads initialization code here.*/ \ 429 | } 430 | 431 | /** 432 | * @brief Threads finalization hook. 433 | * @details User finalization code added to the @p chThdExit() API. 434 | */ 435 | #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ 436 | /* Add threads finalization code here.*/ \ 437 | } 438 | 439 | /** 440 | * @brief Context switch hook. 441 | * @details This hook is invoked just before switching between threads. 442 | */ 443 | #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ 444 | /* Context switch code here.*/ \ 445 | } 446 | 447 | /** 448 | * @brief ISR enter hook. 449 | */ 450 | #define CH_CFG_IRQ_PROLOGUE_HOOK() { \ 451 | /* IRQ prologue code here.*/ \ 452 | } 453 | 454 | /** 455 | * @brief ISR exit hook. 456 | */ 457 | #define CH_CFG_IRQ_EPILOGUE_HOOK() { \ 458 | /* IRQ epilogue code here.*/ \ 459 | } 460 | 461 | /** 462 | * @brief Idle thread enter hook. 463 | * @note This hook is invoked within a critical zone, no OS functions 464 | * should be invoked from here. 465 | * @note This macro can be used to activate a power saving mode. 466 | */ 467 | #define CH_CFG_IDLE_ENTER_HOOK() { \ 468 | /* Idle-enter code here.*/ \ 469 | } 470 | 471 | /** 472 | * @brief Idle thread leave hook. 473 | * @note This hook is invoked within a critical zone, no OS functions 474 | * should be invoked from here. 475 | * @note This macro can be used to deactivate a power saving mode. 476 | */ 477 | #define CH_CFG_IDLE_LEAVE_HOOK() { \ 478 | /* Idle-leave code here.*/ \ 479 | } 480 | 481 | /** 482 | * @brief Idle Loop hook. 483 | * @details This hook is continuously invoked by the idle thread loop. 484 | */ 485 | #define CH_CFG_IDLE_LOOP_HOOK() { \ 486 | /* Idle loop code here.*/ \ 487 | } 488 | 489 | /** 490 | * @brief System tick event hook. 491 | * @details This hook is invoked in the system tick handler immediately 492 | * after processing the virtual timers queue. 493 | */ 494 | #define CH_CFG_SYSTEM_TICK_HOOK() { \ 495 | /* System tick event code here.*/ \ 496 | } 497 | 498 | /** 499 | * @brief System halt hook. 500 | * @details This hook is invoked in case to a system halting error before 501 | * the system is halted. 502 | */ 503 | #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ 504 | /* System halt code here.*/ \ 505 | } 506 | 507 | /** 508 | * @brief Trace hook. 509 | * @details This hook is invoked each time a new record is written in the 510 | * trace buffer. 511 | */ 512 | #define CH_CFG_TRACE_HOOK(tep) { \ 513 | /* Trace code here.*/ \ 514 | } 515 | 516 | /** @} */ 517 | 518 | /*===========================================================================*/ 519 | /* Port-specific settings (override port settings defaulted in chcore.h). */ 520 | /*===========================================================================*/ 521 | 522 | #endif /* CHCONF_H */ 523 | 524 | /** @} */ 525 | --------------------------------------------------------------------------------