├── .cproject
├── .gitignore
├── .project
├── Makefile
├── README.md
├── gdb
└── stm32f4.script
├── libraries
├── CMSIS
│ ├── Include
│ │ ├── arm_common_tables.h
│ │ ├── arm_math.h
│ │ ├── core_cm0.h
│ │ ├── core_cm3.h
│ │ ├── core_cm4.h
│ │ ├── core_cm4_simd.h
│ │ ├── core_cmFunc.h
│ │ └── core_cmInstr.h
│ └── ST
│ │ └── STM32F4xx
│ │ ├── Include
│ │ ├── stm32f4xx.h
│ │ └── system_stm32f4xx.h
│ │ └── Source
│ │ └── Templates
│ │ ├── TASKING
│ │ └── cstart_thumb2.asm
│ │ ├── TrueSTUDIO
│ │ └── startup_stm32f4xx.s
│ │ ├── arm
│ │ └── startup_stm32f4xx.s
│ │ ├── gcc_ride7
│ │ └── startup_stm32f4xx.s
│ │ ├── iar
│ │ └── startup_stm32f4xx.s
│ │ └── system_stm32f4xx.c
└── STM32F4xx_StdPeriph_Driver
│ ├── inc
│ ├── misc.h
│ ├── stm32f4xx_adc.h
│ ├── stm32f4xx_can.h
│ ├── stm32f4xx_crc.h
│ ├── stm32f4xx_cryp.h
│ ├── stm32f4xx_dac.h
│ ├── stm32f4xx_dbgmcu.h
│ ├── stm32f4xx_dcmi.h
│ ├── stm32f4xx_dma.h
│ ├── stm32f4xx_exti.h
│ ├── stm32f4xx_flash.h
│ ├── stm32f4xx_fsmc.h
│ ├── stm32f4xx_gpio.h
│ ├── stm32f4xx_hash.h
│ ├── stm32f4xx_i2c.h
│ ├── stm32f4xx_iwdg.h
│ ├── stm32f4xx_pwr.h
│ ├── stm32f4xx_rcc.h
│ ├── stm32f4xx_rng.h
│ ├── stm32f4xx_rtc.h
│ ├── stm32f4xx_sdio.h
│ ├── stm32f4xx_spi.h
│ ├── stm32f4xx_syscfg.h
│ ├── stm32f4xx_tim.h
│ ├── stm32f4xx_usart.h
│ └── stm32f4xx_wwdg.h
│ └── src
│ ├── misc.c
│ ├── stm32f4xx_adc.c
│ ├── stm32f4xx_can.c
│ ├── stm32f4xx_crc.c
│ ├── stm32f4xx_cryp.c
│ ├── stm32f4xx_cryp_aes.c
│ ├── stm32f4xx_cryp_des.c
│ ├── stm32f4xx_cryp_tdes.c
│ ├── stm32f4xx_dac.c
│ ├── stm32f4xx_dbgmcu.c
│ ├── stm32f4xx_dcmi.c
│ ├── stm32f4xx_dma.c
│ ├── stm32f4xx_exti.c
│ ├── stm32f4xx_flash.c
│ ├── stm32f4xx_fsmc.c
│ ├── stm32f4xx_gpio.c
│ ├── stm32f4xx_hash.c
│ ├── stm32f4xx_hash_md5.c
│ ├── stm32f4xx_hash_sha1.c
│ ├── stm32f4xx_i2c.c
│ ├── stm32f4xx_iwdg.c
│ ├── stm32f4xx_pwr.c
│ ├── stm32f4xx_rcc.c
│ ├── stm32f4xx_rng.c
│ ├── stm32f4xx_rtc.c
│ ├── stm32f4xx_sdio.c
│ ├── stm32f4xx_spi.c
│ ├── stm32f4xx_syscfg.c
│ ├── stm32f4xx_tim.c
│ ├── stm32f4xx_usart.c
│ └── stm32f4xx_wwdg.c
├── program.cfg
├── src
├── main.c
├── startup_stm32f4xx.s
├── stm32f4xx_conf.h
└── system_stm32f4xx.c
└── stm32f4_flash.ld
/.gitignore:
--------------------------------------------------------------------------------
1 | .*.swp
2 | *.*~*
3 | *.bak
4 | build
5 |
--------------------------------------------------------------------------------
/.project:
--------------------------------------------------------------------------------
1 |
2 |
3 | stm32f4-gcc-template
4 |
5 |
6 |
7 |
8 |
9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder
10 | clean,full,incremental,
11 |
12 |
13 | ?name?
14 |
15 |
16 |
17 | org.eclipse.cdt.make.core.append_environment
18 | true
19 |
20 |
21 | org.eclipse.cdt.make.core.autoBuildTarget
22 | all
23 |
24 |
25 | org.eclipse.cdt.make.core.buildArguments
26 |
27 |
28 |
29 | org.eclipse.cdt.make.core.buildCommand
30 | make
31 |
32 |
33 | org.eclipse.cdt.make.core.buildLocation
34 | ${workspace_loc:/stm32f4-gcc-template/Debug}
35 |
36 |
37 | org.eclipse.cdt.make.core.cleanBuildTarget
38 | clean
39 |
40 |
41 | org.eclipse.cdt.make.core.contents
42 | org.eclipse.cdt.make.core.activeConfigSettings
43 |
44 |
45 | org.eclipse.cdt.make.core.enableAutoBuild
46 | false
47 |
48 |
49 | org.eclipse.cdt.make.core.enableCleanBuild
50 | true
51 |
52 |
53 | org.eclipse.cdt.make.core.enableFullBuild
54 | true
55 |
56 |
57 | org.eclipse.cdt.make.core.fullBuildTarget
58 | all
59 |
60 |
61 | org.eclipse.cdt.make.core.stopOnError
62 | true
63 |
64 |
65 | org.eclipse.cdt.make.core.useDefaultBuildCmd
66 | true
67 |
68 |
69 |
70 |
71 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
72 | full,incremental,
73 |
74 |
75 |
76 |
77 |
78 | org.eclipse.cdt.core.cnature
79 | org.eclipse.cdt.managedbuilder.core.managedBuildNature
80 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
81 |
82 |
83 |
--------------------------------------------------------------------------------
/Makefile:
--------------------------------------------------------------------------------
1 | PROJ_NAME=main
2 |
3 | SRCS = src/main.c \
4 | src/system_stm32f4xx.c \
5 | src/startup_stm32f4xx.s
6 |
7 |
8 | CC=arm-none-eabi-gcc
9 | OBJCOPY=arm-none-eabi-objcopy
10 |
11 | OBJDIR = build
12 |
13 | CFLAGS = -g -Wall -Wno-missing-braces -std=c99
14 | CFLAGS += -mthumb -mcpu=cortex-m4
15 | #CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m4 -mthumb-interwork
16 | #CFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
17 | CFLAGS += -mfloat-abi=soft
18 | # TODO: hard float was causing an exception; see what's up.
19 | LDFLAGS = -Wl,-Map,$(OBJDIR)/$(PROJ_NAME).map -g -Tstm32f4_flash.ld
20 |
21 | CFLAGS += -Isrc -I. -Ilibraries/STM32F4xx_StdPeriph_Driver/inc -Ilibraries/CMSIS/ST/STM32F4xx/Include -Ilibraries/CMSIS/Include
22 |
23 | OBJS := $(SRCS:.c=.o)
24 | OBJS := $(OBJS:.s=.o)
25 | OBJS := $(addprefix $(OBJDIR)/,$(OBJS))
26 |
27 |
28 | all: $(OBJDIR)/$(PROJ_NAME).elf $(OBJDIR)/$(PROJ_NAME).hex $(OBJDIR)/$(PROJ_NAME).bin
29 |
30 | $(OBJDIR)/%.elf: $(OBJS)
31 | $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)
32 |
33 | %.hex: %.elf
34 | $(OBJCOPY) -O ihex $^ $@
35 |
36 | %.bin: %.elf
37 | $(OBJCOPY) -O binary $^ $@
38 |
39 | $(OBJDIR)/%.o: %.c
40 | mkdir -p $(dir $@)
41 | $(CC) -c $(CFLAGS) -o $@ $^
42 |
43 | $(OBJDIR)/%.o: %.s
44 | $(CC) -c $(CFLAGS) -o $@ $^
45 |
46 | $(OBJDIR):
47 | mkdir -p $@
48 |
49 | clean:
50 | rm -f $(OBJDIR)/$(PROJ_NAME).elf
51 | rm -f $(OBJDIR)/$(PROJ_NAME).hex
52 | rm -f $(OBJDIR)/$(PROJ_NAME).bin
53 | rm -f $(OBJDIR)/$(PROJ_NAME).map
54 | find $(OBJDIR) -type f -name '*.o' -print0 | xargs -0 -r rm
55 |
56 |
57 | program: $(OBJDIR)/$(PROJ_NAME).elf
58 | openocd-0.6.1 -f program.cfg
59 |
60 |
61 | # Dependdencies
62 | $(OBJDIR)/$(PROJ_NAME).elf: $(OBJS) | $(OBJDIR)
63 |
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | This project provides a template for getting up and running with GCC and the STM32F4Discovery kit.
2 |
3 |
4 | It is also compatible with Eclipse. Set up Eclipse as explained here:
5 | http://embeddedprogrammer.blogspot.com/2012/09/stm32f4discovery-development-with-gcc.html
6 |
7 | Just disable Makefile generation in the Eclipse project (since we already have a Makefile).
8 |
9 |
10 | To compile the project:
11 | make
12 | or for parallel compilation:
13 | make -j4
14 |
15 |
16 | To load the program into the STM32F4:
17 | make program
18 |
19 |
20 | Debugging is accomplished with openocd, which supports the stm32f4discovery natively.
21 | Run this to start openocd:
22 | openocd-0.6.1.exe -f board/stm32f4discovery.cfg
23 |
24 | And then start GDB:
25 | arm-none-eabi-gdb build/main.elf
26 |
27 | And in GDB:
28 | target remote :3333
29 | monitor halt
30 | load
31 | monitor reset init
32 |
33 | Set some breakpoints, etc, and then run the program:
34 | continue
35 |
36 |
37 |
38 |
39 | NOTE: On Windows, do not install libusb drivers for the ST-Link. Use ST's native drivers. Openocd works just fine with the native drivers.
40 | NOTE: On Windows, run arm-none-eabi-gdb from a normal Command Prompt (not within cygwin), otherwise Ctrl+C won't work (it'll close gdb instead of sending SIGINT to the program being debugged).
41 |
--------------------------------------------------------------------------------
/gdb/stm32f4.script:
--------------------------------------------------------------------------------
1 | target remote localhost:3333
2 | monitor halt
3 | monitor poll
4 |
5 | monitor flash probe 0
6 | monitor reset halt
7 | monitor flash write_image erase build/main.elf 0x00000000 elf
8 | monitor reset init
9 |
--------------------------------------------------------------------------------
/libraries/CMSIS/Include/arm_common_tables.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 11. November 2010
5 | * $Revision: V1.0.2
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_common_tables.h
9 | *
10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3
13 | *
14 | * Version 1.0.2 2010/11/11
15 | * Documentation updated.
16 | *
17 | * Version 1.0.1 2010/10/05
18 | * Production release and review comments incorporated.
19 | *
20 | * Version 1.0.0 2010/09/20
21 | * Production release and review comments incorporated.
22 | * -------------------------------------------------------------------- */
23 |
24 | #ifndef _ARM_COMMON_TABLES_H
25 | #define _ARM_COMMON_TABLES_H
26 |
27 | #include "arm_math.h"
28 |
29 | extern uint16_t armBitRevTable[256];
30 | extern q15_t armRecipTableQ15[64];
31 | extern q31_t armRecipTableQ31[64];
32 | extern const q31_t realCoefAQ31[1024];
33 | extern const q31_t realCoefBQ31[1024];
34 |
35 | #endif /* ARM_COMMON_TABLES_H */
36 |
--------------------------------------------------------------------------------
/libraries/CMSIS/ST/STM32F4xx/Include/stm32f4xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/progranism/stm32f4-gcc-template/a8b72d25699a1c921dede88e066b390bd61e92bb/libraries/CMSIS/ST/STM32F4xx/Include/stm32f4xx.h
--------------------------------------------------------------------------------
/libraries/CMSIS/ST/STM32F4xx/Include/system_stm32f4xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f4xx.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /** @addtogroup CMSIS
23 | * @{
24 | */
25 |
26 | /** @addtogroup stm32f4xx_system
27 | * @{
28 | */
29 |
30 | /**
31 | * @brief Define to prevent recursive inclusion
32 | */
33 | #ifndef __SYSTEM_STM32F4XX_H
34 | #define __SYSTEM_STM32F4XX_H
35 |
36 | #ifdef __cplusplus
37 | extern "C" {
38 | #endif
39 |
40 | /** @addtogroup STM32F4xx_System_Includes
41 | * @{
42 | */
43 |
44 | /**
45 | * @}
46 | */
47 |
48 |
49 | /** @addtogroup STM32F4xx_System_Exported_types
50 | * @{
51 | */
52 |
53 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
54 |
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /** @addtogroup STM32F4xx_System_Exported_Constants
61 | * @{
62 | */
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /** @addtogroup STM32F4xx_System_Exported_Macros
69 | * @{
70 | */
71 |
72 | /**
73 | * @}
74 | */
75 |
76 | /** @addtogroup STM32F4xx_System_Exported_Functions
77 | * @{
78 | */
79 |
80 | extern void SystemInit(void);
81 | extern void SystemCoreClockUpdate(void);
82 | /**
83 | * @}
84 | */
85 |
86 | #ifdef __cplusplus
87 | }
88 | #endif
89 |
90 | #endif /*__SYSTEM_STM32F4XX_H */
91 |
92 | /**
93 | * @}
94 | */
95 |
96 | /**
97 | * @}
98 | */
99 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
100 |
--------------------------------------------------------------------------------
/libraries/CMSIS/ST/STM32F4xx/Source/Templates/TASKING/cstart_thumb2.asm:
--------------------------------------------------------------------------------
1 |
2 |
3 | ;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M,
4 | ;; we will only use 16-bit Thumb intructions.
5 |
6 | .extern _lc_ub_stack ; usr/sys mode stack pointer
7 | .extern _lc_ue_stack ; symbol required by debugger
8 | .extern _lc_ub_table ; ROM to RAM copy table
9 | .extern main
10 | .extern _Exit
11 | .extern exit
12 | .weak exit
13 | .global __get_argcv
14 | .weak __get_argcv
15 | .extern __argcvbuf
16 | .weak __argcvbuf
17 | ;;.extern __init_hardware
18 |
19 | .extern SystemInit
20 |
21 | .if @defined('__PROF_ENABLE__')
22 | .extern __prof_init
23 | .endif
24 | .if @defined('__POSIX__')
25 | .extern posix_main
26 | .extern _posix_boot_stack_top
27 | .endif
28 |
29 | .global _START
30 |
31 | .section .text.cstart
32 |
33 | .thumb
34 | _START:
35 | ;; anticipate possible ROM/RAM remapping
36 | ;; by loading the 'real' program address
37 | ldr r1,=_Next
38 | bx r1
39 | _Next:
40 | ;; initialize the stack pointer
41 | ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table
42 | mov sp,r1
43 |
44 | ; Call the clock system intitialization function.
45 | bl SystemInit
46 |
47 | ;; copy initialized sections from ROM to RAM
48 | ;; and clear uninitialized data sections in RAM
49 |
50 | ldr r3,=_lc_ub_table
51 | movs r0,#0
52 | cploop:
53 | ldr r4,[r3,#0] ; load type
54 | ldr r5,[r3,#4] ; dst address
55 | ldr r6,[r3,#8] ; src address
56 | ldr r7,[r3,#12] ; size
57 |
58 | cmp r4,#1
59 | beq copy
60 | cmp r4,#2
61 | beq clear
62 | b done
63 |
64 | copy:
65 | subs r7,r7,#1
66 | ldrb r1,[r6,r7]
67 | strb r1,[r5,r7]
68 | bne copy
69 |
70 | adds r3,r3,#16
71 | b cploop
72 |
73 | clear:
74 | subs r7,r7,#1
75 | strb r0,[r5,r7]
76 | bne clear
77 |
78 | adds r3,r3,#16
79 | b cploop
80 |
81 | done:
82 |
83 |
84 | .if @defined('__POSIX__')
85 |
86 | ;; posix stack buffer for system upbringing
87 | ldr r0,=_posix_boot_stack_top
88 | ldr r0, [r0]
89 | mov sp,r0
90 |
91 | .else
92 |
93 | ;; load r10 with end of USR/SYS stack, which is
94 | ;; needed in case stack overflow checking is on
95 | ;; NOTE: use 16-bit instructions only, for ARMv6M
96 | ldr r0,=_lc_ue_stack
97 | mov r10,r0
98 |
99 | .endif
100 |
101 | .if @defined('__PROF_ENABLE__')
102 | bl __prof_init
103 | .endif
104 |
105 | .if @defined('__POSIX__')
106 | ;; call posix_main with no arguments
107 | bl posix_main
108 | .else
109 | ;; retrieve argc and argv (default argv[0]==NULL & argc==0)
110 | bl __get_argcv
111 | ldr r1,=__argcvbuf
112 | ;; call main
113 | bl main
114 | .endif
115 |
116 | ;; call exit using the return value from main()
117 | ;; Note. Calling exit will also run all functions
118 | ;; that were supplied through atexit().
119 | bl exit
120 |
121 | __get_argcv: ; weak definition
122 | movs r0,#0
123 | bx lr
124 |
125 | .ltorg
126 | .endsec
127 |
128 | .calls '_START', ' '
129 | .calls '_START','__init_vector_table'
130 | .if @defined('__PROF_ENABLE__')
131 | .calls '_START','__prof_init'
132 | .endif
133 | .if @defined('__POSIX__')
134 | .calls '_START','posix_main'
135 | .else
136 | .calls '_START','__get_argcv'
137 | .calls '_START','main'
138 | .endif
139 | .calls '_START','exit'
140 | .calls '_START','',0
141 |
142 | .end
143 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/misc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file misc.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the miscellaneous
8 | * firmware library functions (add-on to CMSIS functions).
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __MISC_H
25 | #define __MISC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup MISC
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 |
44 | /**
45 | * @brief NVIC Init Structure definition
46 | */
47 |
48 | typedef struct
49 | {
50 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
51 | This parameter can be an enumerator of @ref IRQn_Type
52 | enumeration (For the complete STM32 Devices IRQ Channels
53 | list, please refer to stm32f4xx.h file) */
54 |
55 | uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
56 | specified in NVIC_IRQChannel. This parameter can be a value
57 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
58 | A lower priority value indicates a higher priority */
59 |
60 | uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
61 | in NVIC_IRQChannel. This parameter can be a value
62 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
63 | A lower priority value indicates a higher priority */
64 |
65 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
66 | will be enabled or disabled.
67 | This parameter can be set either to ENABLE or DISABLE */
68 | } NVIC_InitTypeDef;
69 |
70 | /* Exported constants --------------------------------------------------------*/
71 |
72 | /** @defgroup MISC_Exported_Constants
73 | * @{
74 | */
75 |
76 | /** @defgroup MISC_Vector_Table_Base
77 | * @{
78 | */
79 |
80 | #define NVIC_VectTab_RAM ((uint32_t)0x20000000)
81 | #define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
82 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
83 | ((VECTTAB) == NVIC_VectTab_FLASH))
84 | /**
85 | * @}
86 | */
87 |
88 | /** @defgroup MISC_System_Low_Power
89 | * @{
90 | */
91 |
92 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10)
93 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
94 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
95 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
96 | ((LP) == NVIC_LP_SLEEPDEEP) || \
97 | ((LP) == NVIC_LP_SLEEPONEXIT))
98 | /**
99 | * @}
100 | */
101 |
102 | /** @defgroup MISC_Preemption_Priority_Group
103 | * @{
104 | */
105 |
106 | #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
107 | 4 bits for subpriority */
108 | #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
109 | 3 bits for subpriority */
110 | #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
111 | 2 bits for subpriority */
112 | #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
113 | 1 bits for subpriority */
114 | #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
115 | 0 bits for subpriority */
116 |
117 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
118 | ((GROUP) == NVIC_PriorityGroup_1) || \
119 | ((GROUP) == NVIC_PriorityGroup_2) || \
120 | ((GROUP) == NVIC_PriorityGroup_3) || \
121 | ((GROUP) == NVIC_PriorityGroup_4))
122 |
123 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
124 |
125 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
126 |
127 | #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
128 |
129 | /**
130 | * @}
131 | */
132 |
133 | /** @defgroup MISC_SysTick_clock_source
134 | * @{
135 | */
136 |
137 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
138 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
139 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
140 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
141 | /**
142 | * @}
143 | */
144 |
145 | /**
146 | * @}
147 | */
148 |
149 | /* Exported macro ------------------------------------------------------------*/
150 | /* Exported functions --------------------------------------------------------*/
151 |
152 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
153 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
154 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
155 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
156 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
157 |
158 | #ifdef __cplusplus
159 | }
160 | #endif
161 |
162 | #endif /* __MISC_H */
163 |
164 | /**
165 | * @}
166 | */
167 |
168 | /**
169 | * @}
170 | */
171 |
172 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
173 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_CRC_H
25 | #define __STM32F4xx_CRC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup CRC
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 | /* Exported constants --------------------------------------------------------*/
44 |
45 | /** @defgroup CRC_Exported_Constants
46 | * @{
47 | */
48 |
49 | /**
50 | * @}
51 | */
52 |
53 | /* Exported macro ------------------------------------------------------------*/
54 | /* Exported functions --------------------------------------------------------*/
55 |
56 | void CRC_ResetDR(void);
57 | uint32_t CRC_CalcCRC(uint32_t Data);
58 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
59 | uint32_t CRC_GetCRC(void);
60 | void CRC_SetIDRegister(uint8_t IDValue);
61 | uint8_t CRC_GetIDRegister(void);
62 |
63 | #ifdef __cplusplus
64 | }
65 | #endif
66 |
67 | #endif /* __STM32F4xx_CRC_H */
68 |
69 | /**
70 | * @}
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
78 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_cryp.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_cryp.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the Cryptographic
8 | * processor(CRYP) firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_CRYP_H
25 | #define __STM32F4xx_CRYP_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup CRYP
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 |
44 | /**
45 | * @brief CRYP Init structure definition
46 | */
47 | typedef struct
48 | {
49 | uint16_t CRYP_AlgoDir; /*!< Encrypt or Decrypt. This parameter can be a
50 | value of @ref CRYP_Algorithm_Direction */
51 | uint16_t CRYP_AlgoMode; /*!< TDES-ECB, TDES-CBC, DES-ECB, DES-CBC, AES-ECB,
52 | AES-CBC, AES-CTR, AES-Key. This parameter can be
53 | a value of @ref CRYP_Algorithm_Mode */
54 | uint16_t CRYP_DataType; /*!< 32-bit data, 16-bit data, bit data or bit-string.
55 | This parameter can be a value of @ref CRYP_Data_Type */
56 | uint16_t CRYP_KeySize; /*!< Used only in AES mode only : 128, 192 or 256 bit
57 | key length. This parameter can be a value of
58 | @ref CRYP_Key_Size_for_AES_only */
59 | }CRYP_InitTypeDef;
60 |
61 | /**
62 | * @brief CRYP Key(s) structure definition
63 | */
64 | typedef struct
65 | {
66 | uint32_t CRYP_Key0Left; /*!< Key 0 Left */
67 | uint32_t CRYP_Key0Right; /*!< Key 0 Right */
68 | uint32_t CRYP_Key1Left; /*!< Key 1 left */
69 | uint32_t CRYP_Key1Right; /*!< Key 1 Right */
70 | uint32_t CRYP_Key2Left; /*!< Key 2 left */
71 | uint32_t CRYP_Key2Right; /*!< Key 2 Right */
72 | uint32_t CRYP_Key3Left; /*!< Key 3 left */
73 | uint32_t CRYP_Key3Right; /*!< Key 3 Right */
74 | }CRYP_KeyInitTypeDef;
75 | /**
76 | * @brief CRYP Initialization Vectors (IV) structure definition
77 | */
78 | typedef struct
79 | {
80 | uint32_t CRYP_IV0Left; /*!< Init Vector 0 Left */
81 | uint32_t CRYP_IV0Right; /*!< Init Vector 0 Right */
82 | uint32_t CRYP_IV1Left; /*!< Init Vector 1 left */
83 | uint32_t CRYP_IV1Right; /*!< Init Vector 1 Right */
84 | }CRYP_IVInitTypeDef;
85 |
86 | /**
87 | * @brief CRYP context swapping structure definition
88 | */
89 | typedef struct
90 | {
91 | /*!< Configuration */
92 | uint32_t CR_bits9to2;
93 | /*!< KEY */
94 | uint32_t CRYP_IV0LR;
95 | uint32_t CRYP_IV0RR;
96 | uint32_t CRYP_IV1LR;
97 | uint32_t CRYP_IV1RR;
98 | /*!< IV */
99 | uint32_t CRYP_K0LR;
100 | uint32_t CRYP_K0RR;
101 | uint32_t CRYP_K1LR;
102 | uint32_t CRYP_K1RR;
103 | uint32_t CRYP_K2LR;
104 | uint32_t CRYP_K2RR;
105 | uint32_t CRYP_K3LR;
106 | uint32_t CRYP_K3RR;
107 | }CRYP_Context;
108 |
109 |
110 | /* Exported constants --------------------------------------------------------*/
111 |
112 | /** @defgroup CRYP_Exported_Constants
113 | * @{
114 | */
115 |
116 | /** @defgroup CRYP_Algorithm_Direction
117 | * @{
118 | */
119 | #define CRYP_AlgoDir_Encrypt ((uint16_t)0x0000)
120 | #define CRYP_AlgoDir_Decrypt ((uint16_t)0x0004)
121 | #define IS_CRYP_ALGODIR(ALGODIR) (((ALGODIR) == CRYP_AlgoDir_Encrypt) || \
122 | ((ALGODIR) == CRYP_AlgoDir_Decrypt))
123 |
124 | /**
125 | * @}
126 | */
127 |
128 | /** @defgroup CRYP_Algorithm_Mode
129 | * @{
130 | */
131 |
132 | /*!< TDES Modes */
133 | #define CRYP_AlgoMode_TDES_ECB ((uint16_t)0x0000)
134 | #define CRYP_AlgoMode_TDES_CBC ((uint16_t)0x0008)
135 |
136 | /*!< DES Modes */
137 | #define CRYP_AlgoMode_DES_ECB ((uint16_t)0x0010)
138 | #define CRYP_AlgoMode_DES_CBC ((uint16_t)0x0018)
139 |
140 | /*!< AES Modes */
141 | #define CRYP_AlgoMode_AES_ECB ((uint16_t)0x0020)
142 | #define CRYP_AlgoMode_AES_CBC ((uint16_t)0x0028)
143 | #define CRYP_AlgoMode_AES_CTR ((uint16_t)0x0030)
144 | #define CRYP_AlgoMode_AES_Key ((uint16_t)0x0038)
145 |
146 | #define IS_CRYP_ALGOMODE(ALGOMODE) (((ALGOMODE) == CRYP_AlgoMode_TDES_ECB) || \
147 | ((ALGOMODE) == CRYP_AlgoMode_TDES_CBC)|| \
148 | ((ALGOMODE) == CRYP_AlgoMode_DES_ECB)|| \
149 | ((ALGOMODE) == CRYP_AlgoMode_DES_CBC) || \
150 | ((ALGOMODE) == CRYP_AlgoMode_AES_ECB) || \
151 | ((ALGOMODE) == CRYP_AlgoMode_AES_CBC) || \
152 | ((ALGOMODE) == CRYP_AlgoMode_AES_CTR) || \
153 | ((ALGOMODE) == CRYP_AlgoMode_AES_Key))
154 | /**
155 | * @}
156 | */
157 |
158 | /** @defgroup CRYP_Data_Type
159 | * @{
160 | */
161 | #define CRYP_DataType_32b ((uint16_t)0x0000)
162 | #define CRYP_DataType_16b ((uint16_t)0x0040)
163 | #define CRYP_DataType_8b ((uint16_t)0x0080)
164 | #define CRYP_DataType_1b ((uint16_t)0x00C0)
165 | #define IS_CRYP_DATATYPE(DATATYPE) (((DATATYPE) == CRYP_DataType_32b) || \
166 | ((DATATYPE) == CRYP_DataType_16b)|| \
167 | ((DATATYPE) == CRYP_DataType_8b)|| \
168 | ((DATATYPE) == CRYP_DataType_1b))
169 | /**
170 | * @}
171 | */
172 |
173 | /** @defgroup CRYP_Key_Size_for_AES_only
174 | * @{
175 | */
176 | #define CRYP_KeySize_128b ((uint16_t)0x0000)
177 | #define CRYP_KeySize_192b ((uint16_t)0x0100)
178 | #define CRYP_KeySize_256b ((uint16_t)0x0200)
179 | #define IS_CRYP_KEYSIZE(KEYSIZE) (((KEYSIZE) == CRYP_KeySize_128b)|| \
180 | ((KEYSIZE) == CRYP_KeySize_192b)|| \
181 | ((KEYSIZE) == CRYP_KeySize_256b))
182 | /**
183 | * @}
184 | */
185 |
186 | /** @defgroup CRYP_flags_definition
187 | * @{
188 | */
189 | #define CRYP_FLAG_BUSY ((uint8_t)0x10) /*!< The CRYP core is currently
190 | processing a block of data
191 | or a key preparation (for
192 | AES decryption). */
193 | #define CRYP_FLAG_IFEM ((uint8_t)0x01) /*!< Input Fifo Empty */
194 | #define CRYP_FLAG_IFNF ((uint8_t)0x02) /*!< Input Fifo is Not Full */
195 | #define CRYP_FLAG_INRIS ((uint8_t)0x22) /*!< Raw interrupt pending */
196 | #define CRYP_FLAG_OFNE ((uint8_t)0x04) /*!< Input Fifo service raw
197 | interrupt status */
198 | #define CRYP_FLAG_OFFU ((uint8_t)0x08) /*!< Output Fifo is Full */
199 | #define CRYP_FLAG_OUTRIS ((uint8_t)0x21) /*!< Output Fifo service raw
200 | interrupt status */
201 |
202 | #define IS_CRYP_GET_FLAG(FLAG) (((FLAG) == CRYP_FLAG_IFEM) || \
203 | ((FLAG) == CRYP_FLAG_IFNF) || \
204 | ((FLAG) == CRYP_FLAG_OFNE) || \
205 | ((FLAG) == CRYP_FLAG_OFFU) || \
206 | ((FLAG) == CRYP_FLAG_BUSY) || \
207 | ((FLAG) == CRYP_FLAG_OUTRIS)|| \
208 | ((FLAG) == CRYP_FLAG_INRIS))
209 | /**
210 | * @}
211 | */
212 |
213 | /** @defgroup CRYP_interrupts_definition
214 | * @{
215 | */
216 | #define CRYP_IT_INI ((uint8_t)0x01) /*!< IN Fifo Interrupt */
217 | #define CRYP_IT_OUTI ((uint8_t)0x02) /*!< OUT Fifo Interrupt */
218 | #define IS_CRYP_CONFIG_IT(IT) ((((IT) & (uint8_t)0xFC) == 0x00) && ((IT) != 0x00))
219 | #define IS_CRYP_GET_IT(IT) (((IT) == CRYP_IT_INI) || ((IT) == CRYP_IT_OUTI))
220 |
221 | /**
222 | * @}
223 | */
224 |
225 | /** @defgroup CRYP_Encryption_Decryption_modes_definition
226 | * @{
227 | */
228 | #define MODE_ENCRYPT ((uint8_t)0x01)
229 | #define MODE_DECRYPT ((uint8_t)0x00)
230 |
231 | /**
232 | * @}
233 | */
234 |
235 | /** @defgroup CRYP_DMA_transfer_requests
236 | * @{
237 | */
238 | #define CRYP_DMAReq_DataIN ((uint8_t)0x01)
239 | #define CRYP_DMAReq_DataOUT ((uint8_t)0x02)
240 | #define IS_CRYP_DMAREQ(DMAREQ) ((((DMAREQ) & (uint8_t)0xFC) == 0x00) && ((DMAREQ) != 0x00))
241 | /**
242 | * @}
243 | */
244 |
245 | /**
246 | * @}
247 | */
248 |
249 | /* Exported macro ------------------------------------------------------------*/
250 | /* Exported functions --------------------------------------------------------*/
251 |
252 | /* Function used to set the CRYP configuration to the default reset state ****/
253 | void CRYP_DeInit(void);
254 |
255 | /* CRYP Initialization and Configuration functions ****************************/
256 | void CRYP_Init(CRYP_InitTypeDef* CRYP_InitStruct);
257 | void CRYP_StructInit(CRYP_InitTypeDef* CRYP_InitStruct);
258 | void CRYP_KeyInit(CRYP_KeyInitTypeDef* CRYP_KeyInitStruct);
259 | void CRYP_KeyStructInit(CRYP_KeyInitTypeDef* CRYP_KeyInitStruct);
260 | void CRYP_IVInit(CRYP_IVInitTypeDef* CRYP_IVInitStruct);
261 | void CRYP_IVStructInit(CRYP_IVInitTypeDef* CRYP_IVInitStruct);
262 | void CRYP_Cmd(FunctionalState NewState);
263 |
264 | /* CRYP Data processing functions *********************************************/
265 | void CRYP_DataIn(uint32_t Data);
266 | uint32_t CRYP_DataOut(void);
267 | void CRYP_FIFOFlush(void);
268 |
269 | /* CRYP Context swapping functions ********************************************/
270 | ErrorStatus CRYP_SaveContext(CRYP_Context* CRYP_ContextSave,
271 | CRYP_KeyInitTypeDef* CRYP_KeyInitStruct);
272 | void CRYP_RestoreContext(CRYP_Context* CRYP_ContextRestore);
273 |
274 | /* CRYP's DMA interface function **********************************************/
275 | void CRYP_DMACmd(uint8_t CRYP_DMAReq, FunctionalState NewState);
276 |
277 | /* Interrupts and flags management functions **********************************/
278 | void CRYP_ITConfig(uint8_t CRYP_IT, FunctionalState NewState);
279 | ITStatus CRYP_GetITStatus(uint8_t CRYP_IT);
280 | FlagStatus CRYP_GetFlagStatus(uint8_t CRYP_FLAG);
281 |
282 | /* High Level AES functions **************************************************/
283 | ErrorStatus CRYP_AES_ECB(uint8_t Mode,
284 | uint8_t *Key, uint16_t Keysize,
285 | uint8_t *Input, uint32_t Ilength,
286 | uint8_t *Output);
287 |
288 | ErrorStatus CRYP_AES_CBC(uint8_t Mode,
289 | uint8_t InitVectors[16],
290 | uint8_t *Key, uint16_t Keysize,
291 | uint8_t *Input, uint32_t Ilength,
292 | uint8_t *Output);
293 |
294 | ErrorStatus CRYP_AES_CTR(uint8_t Mode,
295 | uint8_t InitVectors[16],
296 | uint8_t *Key, uint16_t Keysize,
297 | uint8_t *Input, uint32_t Ilength,
298 | uint8_t *Output);
299 |
300 | /* High Level TDES functions **************************************************/
301 | ErrorStatus CRYP_TDES_ECB(uint8_t Mode,
302 | uint8_t Key[24],
303 | uint8_t *Input, uint32_t Ilength,
304 | uint8_t *Output);
305 |
306 | ErrorStatus CRYP_TDES_CBC(uint8_t Mode,
307 | uint8_t Key[24],
308 | uint8_t InitVectors[8],
309 | uint8_t *Input, uint32_t Ilength,
310 | uint8_t *Output);
311 |
312 | /* High Level DES functions **************************************************/
313 | ErrorStatus CRYP_DES_ECB(uint8_t Mode,
314 | uint8_t Key[8],
315 | uint8_t *Input, uint32_t Ilength,
316 | uint8_t *Output);
317 |
318 | ErrorStatus CRYP_DES_CBC(uint8_t Mode,
319 | uint8_t Key[8],
320 | uint8_t InitVectors[8],
321 | uint8_t *Input,uint32_t Ilength,
322 | uint8_t *Output);
323 |
324 | #ifdef __cplusplus
325 | }
326 | #endif
327 |
328 | #endif /*__STM32F4xx_CRYP_H */
329 |
330 | /**
331 | * @}
332 | */
333 |
334 | /**
335 | * @}
336 | */
337 |
338 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
339 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dbgmcu.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_dbgmcu.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the DBGMCU firmware library.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F4xx_DBGMCU_H
24 | #define __STM32F4xx_DBGMCU_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f4xx.h"
32 |
33 | /** @addtogroup STM32F4xx_StdPeriph_Driver
34 | * @{
35 | */
36 |
37 | /** @addtogroup DBGMCU
38 | * @{
39 | */
40 |
41 | /* Exported types ------------------------------------------------------------*/
42 | /* Exported constants --------------------------------------------------------*/
43 |
44 | /** @defgroup DBGMCU_Exported_Constants
45 | * @{
46 | */
47 | #define DBGMCU_SLEEP ((uint32_t)0x00000001)
48 | #define DBGMCU_STOP ((uint32_t)0x00000002)
49 | #define DBGMCU_STANDBY ((uint32_t)0x00000004)
50 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00))
51 |
52 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000001)
53 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00000002)
54 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00000004)
55 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00000008)
56 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00000010)
57 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00000020)
58 | #define DBGMCU_TIM12_STOP ((uint32_t)0x00000040)
59 | #define DBGMCU_TIM13_STOP ((uint32_t)0x00000080)
60 | #define DBGMCU_TIM14_STOP ((uint32_t)0x00000100)
61 | #define DBGMCU_RTC_STOP ((uint32_t)0x00000400)
62 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000800)
63 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00001000)
64 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000)
65 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000)
66 | #define DBGMCU_I2C3_SMBUS_TIMEOUT ((uint32_t)0x00800000)
67 | #define DBGMCU_CAN1_STOP ((uint32_t)0x02000000)
68 | #define DBGMCU_CAN2_STOP ((uint32_t)0x04000000)
69 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00))
70 |
71 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000001)
72 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00000002)
73 | #define DBGMCU_TIM9_STOP ((uint32_t)0x00010000)
74 | #define DBGMCU_TIM10_STOP ((uint32_t)0x00020000)
75 | #define DBGMCU_TIM11_STOP ((uint32_t)0x00040000)
76 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00))
77 | /**
78 | * @}
79 | */
80 |
81 | /* Exported macro ------------------------------------------------------------*/
82 | /* Exported functions --------------------------------------------------------*/
83 | uint32_t DBGMCU_GetREVID(void);
84 | uint32_t DBGMCU_GetDEVID(void);
85 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
86 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
87 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
88 |
89 | #ifdef __cplusplus
90 | }
91 | #endif
92 |
93 | #endif /* __STM32F4xx_DBGMCU_H */
94 |
95 | /**
96 | * @}
97 | */
98 |
99 | /**
100 | * @}
101 | */
102 |
103 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
104 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dcmi.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_dcmi.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the DCMI firmware library.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F4xx_DCMI_H
24 | #define __STM32F4xx_DCMI_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f4xx.h"
32 |
33 | /** @addtogroup STM32F4xx_StdPeriph_Driver
34 | * @{
35 | */
36 |
37 | /** @addtogroup DCMI
38 | * @{
39 | */
40 |
41 | /* Exported types ------------------------------------------------------------*/
42 | /**
43 | * @brief DCMI Init structure definition
44 | */
45 | typedef struct
46 | {
47 | uint16_t DCMI_CaptureMode; /*!< Specifies the Capture Mode: Continuous or Snapshot.
48 | This parameter can be a value of @ref DCMI_Capture_Mode */
49 |
50 | uint16_t DCMI_SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
51 | This parameter can be a value of @ref DCMI_Synchronization_Mode */
52 |
53 | uint16_t DCMI_PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
54 | This parameter can be a value of @ref DCMI_PIXCK_Polarity */
55 |
56 | uint16_t DCMI_VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
57 | This parameter can be a value of @ref DCMI_VSYNC_Polarity */
58 |
59 | uint16_t DCMI_HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
60 | This parameter can be a value of @ref DCMI_HSYNC_Polarity */
61 |
62 | uint16_t DCMI_CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
63 | This parameter can be a value of @ref DCMI_Capture_Rate */
64 |
65 | uint16_t DCMI_ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
66 | This parameter can be a value of @ref DCMI_Extended_Data_Mode */
67 | } DCMI_InitTypeDef;
68 |
69 | /**
70 | * @brief DCMI CROP Init structure definition
71 | */
72 | typedef struct
73 | {
74 | uint16_t DCMI_VerticalStartLine; /*!< Specifies the Vertical start line count from which the image capture
75 | will start. This parameter can be a value between 0x00 and 0x1FFF */
76 |
77 | uint16_t DCMI_HorizontalOffsetCount; /*!< Specifies the number of pixel clocks to count before starting a capture.
78 | This parameter can be a value between 0x00 and 0x3FFF */
79 |
80 | uint16_t DCMI_VerticalLineCount; /*!< Specifies the number of lines to be captured from the starting point.
81 | This parameter can be a value between 0x00 and 0x3FFF */
82 |
83 | uint16_t DCMI_CaptureCount; /*!< Specifies the number of pixel clocks to be captured from the starting
84 | point on the same line.
85 | This parameter can be a value between 0x00 and 0x3FFF */
86 | } DCMI_CROPInitTypeDef;
87 |
88 | /**
89 | * @brief DCMI Embedded Synchronisation CODE Init structure definition
90 | */
91 | typedef struct
92 | {
93 | uint8_t DCMI_FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
94 | uint8_t DCMI_LineStartCode; /*!< Specifies the code of the line start delimiter. */
95 | uint8_t DCMI_LineEndCode; /*!< Specifies the code of the line end delimiter. */
96 | uint8_t DCMI_FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
97 | } DCMI_CodesInitTypeDef;
98 |
99 | /* Exported constants --------------------------------------------------------*/
100 |
101 | /** @defgroup DCMI_Exported_Constants
102 | * @{
103 | */
104 |
105 | /** @defgroup DCMI_Capture_Mode
106 | * @{
107 | */
108 | #define DCMI_CaptureMode_Continuous ((uint16_t)0x0000) /*!< The received data are transferred continuously
109 | into the destination memory through the DMA */
110 | #define DCMI_CaptureMode_SnapShot ((uint16_t)0x0002) /*!< Once activated, the interface waits for the start of
111 | frame and then transfers a single frame through the DMA */
112 | #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_CaptureMode_Continuous) || \
113 | ((MODE) == DCMI_CaptureMode_SnapShot))
114 | /**
115 | * @}
116 | */
117 |
118 |
119 | /** @defgroup DCMI_Synchronization_Mode
120 | * @{
121 | */
122 | #define DCMI_SynchroMode_Hardware ((uint16_t)0x0000) /*!< Hardware synchronization data capture (frame/line start/stop)
123 | is synchronized with the HSYNC/VSYNC signals */
124 | #define DCMI_SynchroMode_Embedded ((uint16_t)0x0010) /*!< Embedded synchronization data capture is synchronized with
125 | synchronization codes embedded in the data flow */
126 | #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SynchroMode_Hardware) || \
127 | ((MODE) == DCMI_SynchroMode_Embedded))
128 | /**
129 | * @}
130 | */
131 |
132 |
133 | /** @defgroup DCMI_PIXCK_Polarity
134 | * @{
135 | */
136 | #define DCMI_PCKPolarity_Falling ((uint16_t)0x0000) /*!< Pixel clock active on Falling edge */
137 | #define DCMI_PCKPolarity_Rising ((uint16_t)0x0020) /*!< Pixel clock active on Rising edge */
138 | #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPolarity_Falling) || \
139 | ((POLARITY) == DCMI_PCKPolarity_Rising))
140 | /**
141 | * @}
142 | */
143 |
144 |
145 | /** @defgroup DCMI_VSYNC_Polarity
146 | * @{
147 | */
148 | #define DCMI_VSPolarity_Low ((uint16_t)0x0000) /*!< Vertical synchronization active Low */
149 | #define DCMI_VSPolarity_High ((uint16_t)0x0080) /*!< Vertical synchronization active High */
150 | #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPolarity_Low) || \
151 | ((POLARITY) == DCMI_VSPolarity_High))
152 | /**
153 | * @}
154 | */
155 |
156 |
157 | /** @defgroup DCMI_HSYNC_Polarity
158 | * @{
159 | */
160 | #define DCMI_HSPolarity_Low ((uint16_t)0x0000) /*!< Horizontal synchronization active Low */
161 | #define DCMI_HSPolarity_High ((uint16_t)0x0040) /*!< Horizontal synchronization active High */
162 | #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPolarity_Low) || \
163 | ((POLARITY) == DCMI_HSPolarity_High))
164 | /**
165 | * @}
166 | */
167 |
168 |
169 | /** @defgroup DCMI_Capture_Rate
170 | * @{
171 | */
172 | #define DCMI_CaptureRate_All_Frame ((uint16_t)0x0000) /*!< All frames are captured */
173 | #define DCMI_CaptureRate_1of2_Frame ((uint16_t)0x0100) /*!< Every alternate frame captured */
174 | #define DCMI_CaptureRate_1of4_Frame ((uint16_t)0x0200) /*!< One frame in 4 frames captured */
175 | #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CaptureRate_All_Frame) || \
176 | ((RATE) == DCMI_CaptureRate_1of2_Frame) ||\
177 | ((RATE) == DCMI_CaptureRate_1of4_Frame))
178 | /**
179 | * @}
180 | */
181 |
182 |
183 | /** @defgroup DCMI_Extended_Data_Mode
184 | * @{
185 | */
186 | #define DCMI_ExtendedDataMode_8b ((uint16_t)0x0000) /*!< Interface captures 8-bit data on every pixel clock */
187 | #define DCMI_ExtendedDataMode_10b ((uint16_t)0x0400) /*!< Interface captures 10-bit data on every pixel clock */
188 | #define DCMI_ExtendedDataMode_12b ((uint16_t)0x0800) /*!< Interface captures 12-bit data on every pixel clock */
189 | #define DCMI_ExtendedDataMode_14b ((uint16_t)0x0C00) /*!< Interface captures 14-bit data on every pixel clock */
190 | #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_ExtendedDataMode_8b) || \
191 | ((DATA) == DCMI_ExtendedDataMode_10b) ||\
192 | ((DATA) == DCMI_ExtendedDataMode_12b) ||\
193 | ((DATA) == DCMI_ExtendedDataMode_14b))
194 | /**
195 | * @}
196 | */
197 |
198 |
199 | /** @defgroup DCMI_interrupt_sources
200 | * @{
201 | */
202 | #define DCMI_IT_FRAME ((uint16_t)0x0001)
203 | #define DCMI_IT_OVF ((uint16_t)0x0002)
204 | #define DCMI_IT_ERR ((uint16_t)0x0004)
205 | #define DCMI_IT_VSYNC ((uint16_t)0x0008)
206 | #define DCMI_IT_LINE ((uint16_t)0x0010)
207 | #define IS_DCMI_CONFIG_IT(IT) ((((IT) & (uint16_t)0xFFE0) == 0x0000) && ((IT) != 0x0000))
208 | #define IS_DCMI_GET_IT(IT) (((IT) == DCMI_IT_FRAME) || \
209 | ((IT) == DCMI_IT_OVF) || \
210 | ((IT) == DCMI_IT_ERR) || \
211 | ((IT) == DCMI_IT_VSYNC) || \
212 | ((IT) == DCMI_IT_LINE))
213 | /**
214 | * @}
215 | */
216 |
217 |
218 | /** @defgroup DCMI_Flags
219 | * @{
220 | */
221 | /**
222 | * @brief DCMI SR register
223 | */
224 | #define DCMI_FLAG_HSYNC ((uint16_t)0x2001)
225 | #define DCMI_FLAG_VSYNC ((uint16_t)0x2002)
226 | #define DCMI_FLAG_FNE ((uint16_t)0x2004)
227 | /**
228 | * @brief DCMI RISR register
229 | */
230 | #define DCMI_FLAG_FRAMERI ((uint16_t)0x0001)
231 | #define DCMI_FLAG_OVFRI ((uint16_t)0x0002)
232 | #define DCMI_FLAG_ERRRI ((uint16_t)0x0004)
233 | #define DCMI_FLAG_VSYNCRI ((uint16_t)0x0008)
234 | #define DCMI_FLAG_LINERI ((uint16_t)0x0010)
235 | /**
236 | * @brief DCMI MISR register
237 | */
238 | #define DCMI_FLAG_FRAMEMI ((uint16_t)0x1001)
239 | #define DCMI_FLAG_OVFMI ((uint16_t)0x1002)
240 | #define DCMI_FLAG_ERRMI ((uint16_t)0x1004)
241 | #define DCMI_FLAG_VSYNCMI ((uint16_t)0x1008)
242 | #define DCMI_FLAG_LINEMI ((uint16_t)0x1010)
243 | #define IS_DCMI_GET_FLAG(FLAG) (((FLAG) == DCMI_FLAG_HSYNC) || \
244 | ((FLAG) == DCMI_FLAG_VSYNC) || \
245 | ((FLAG) == DCMI_FLAG_FNE) || \
246 | ((FLAG) == DCMI_FLAG_FRAMERI) || \
247 | ((FLAG) == DCMI_FLAG_OVFRI) || \
248 | ((FLAG) == DCMI_FLAG_ERRRI) || \
249 | ((FLAG) == DCMI_FLAG_VSYNCRI) || \
250 | ((FLAG) == DCMI_FLAG_LINERI) || \
251 | ((FLAG) == DCMI_FLAG_FRAMEMI) || \
252 | ((FLAG) == DCMI_FLAG_OVFMI) || \
253 | ((FLAG) == DCMI_FLAG_ERRMI) || \
254 | ((FLAG) == DCMI_FLAG_VSYNCMI) || \
255 | ((FLAG) == DCMI_FLAG_LINEMI))
256 |
257 | #define IS_DCMI_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFE0) == 0x0000) && ((FLAG) != 0x0000))
258 | /**
259 | * @}
260 | */
261 |
262 | /**
263 | * @}
264 | */
265 |
266 | /* Exported macro ------------------------------------------------------------*/
267 | /* Exported functions --------------------------------------------------------*/
268 |
269 | /* Function used to set the DCMI configuration to the default reset state ****/
270 | void DCMI_DeInit(void);
271 |
272 | /* Initialization and Configuration functions *********************************/
273 | void DCMI_Init(DCMI_InitTypeDef* DCMI_InitStruct);
274 | void DCMI_StructInit(DCMI_InitTypeDef* DCMI_InitStruct);
275 | void DCMI_CROPConfig(DCMI_CROPInitTypeDef* DCMI_CROPInitStruct);
276 | void DCMI_CROPCmd(FunctionalState NewState);
277 | void DCMI_SetEmbeddedSynchroCodes(DCMI_CodesInitTypeDef* DCMI_CodesInitStruct);
278 | void DCMI_JPEGCmd(FunctionalState NewState);
279 |
280 | /* Image capture functions ****************************************************/
281 | void DCMI_Cmd(FunctionalState NewState);
282 | void DCMI_CaptureCmd(FunctionalState NewState);
283 | uint32_t DCMI_ReadData(void);
284 |
285 | /* Interrupts and flags management functions **********************************/
286 | void DCMI_ITConfig(uint16_t DCMI_IT, FunctionalState NewState);
287 | FlagStatus DCMI_GetFlagStatus(uint16_t DCMI_FLAG);
288 | void DCMI_ClearFlag(uint16_t DCMI_FLAG);
289 | ITStatus DCMI_GetITStatus(uint16_t DCMI_IT);
290 | void DCMI_ClearITPendingBit(uint16_t DCMI_IT);
291 |
292 | #ifdef __cplusplus
293 | }
294 | #endif
295 |
296 | #endif /*__STM32F4xx_DCMI_H */
297 |
298 | /**
299 | * @}
300 | */
301 |
302 | /**
303 | * @}
304 | */
305 |
306 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
307 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_exti.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_exti.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the EXTI firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_EXTI_H
25 | #define __STM32F4xx_EXTI_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup EXTI
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 |
44 | /**
45 | * @brief EXTI mode enumeration
46 | */
47 |
48 | typedef enum
49 | {
50 | EXTI_Mode_Interrupt = 0x00,
51 | EXTI_Mode_Event = 0x04
52 | }EXTIMode_TypeDef;
53 |
54 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
55 |
56 | /**
57 | * @brief EXTI Trigger enumeration
58 | */
59 |
60 | typedef enum
61 | {
62 | EXTI_Trigger_Rising = 0x08,
63 | EXTI_Trigger_Falling = 0x0C,
64 | EXTI_Trigger_Rising_Falling = 0x10
65 | }EXTITrigger_TypeDef;
66 |
67 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
68 | ((TRIGGER) == EXTI_Trigger_Falling) || \
69 | ((TRIGGER) == EXTI_Trigger_Rising_Falling))
70 | /**
71 | * @brief EXTI Init Structure definition
72 | */
73 |
74 | typedef struct
75 | {
76 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
77 | This parameter can be any combination value of @ref EXTI_Lines */
78 |
79 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
80 | This parameter can be a value of @ref EXTIMode_TypeDef */
81 |
82 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
83 | This parameter can be a value of @ref EXTITrigger_TypeDef */
84 |
85 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
86 | This parameter can be set either to ENABLE or DISABLE */
87 | }EXTI_InitTypeDef;
88 |
89 | /* Exported constants --------------------------------------------------------*/
90 |
91 | /** @defgroup EXTI_Exported_Constants
92 | * @{
93 | */
94 |
95 | /** @defgroup EXTI_Lines
96 | * @{
97 | */
98 |
99 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */
100 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */
101 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */
102 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */
103 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */
104 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */
105 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */
106 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */
107 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */
108 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */
109 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */
110 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */
111 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */
112 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */
113 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */
114 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */
115 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */
116 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */
117 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */
118 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
119 | #define EXTI_Line20 ((uint32_t)0x00100000) /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */
120 | #define EXTI_Line21 ((uint32_t)0x00200000) /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */
121 | #define EXTI_Line22 ((uint32_t)0x00400000) /*!< External interrupt line 22 Connected to the RTC Wakeup event */
122 |
123 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFF800000) == 0x00) && ((LINE) != (uint16_t)0x00))
124 |
125 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
126 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
127 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
128 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
129 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
130 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
131 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
132 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
133 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
134 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \
135 | ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) ||\
136 | ((LINE) == EXTI_Line22))
137 |
138 | /**
139 | * @}
140 | */
141 |
142 | /**
143 | * @}
144 | */
145 |
146 | /* Exported macro ------------------------------------------------------------*/
147 | /* Exported functions --------------------------------------------------------*/
148 |
149 | /* Function used to set the EXTI configuration to the default reset state *****/
150 | void EXTI_DeInit(void);
151 |
152 | /* Initialization and Configuration functions *********************************/
153 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
154 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
155 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
156 |
157 | /* Interrupts and flags management functions **********************************/
158 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
159 | void EXTI_ClearFlag(uint32_t EXTI_Line);
160 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
161 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
162 |
163 | #ifdef __cplusplus
164 | }
165 | #endif
166 |
167 | #endif /* __STM32F4xx_EXTI_H */
168 |
169 | /**
170 | * @}
171 | */
172 |
173 | /**
174 | * @}
175 | */
176 |
177 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
178 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_hash.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hash.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the HASH
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_HASH_H
25 | #define __STM32F4xx_HASH_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup HASH
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 |
44 | /**
45 | * @brief HASH Init structure definition
46 | */
47 | typedef struct
48 | {
49 | uint32_t HASH_AlgoSelection; /*!< SHA-1 or MD5. This parameter can be a value
50 | of @ref HASH_Algo_Selection */
51 | uint32_t HASH_AlgoMode; /*!< HASH or HMAC. This parameter can be a value
52 | of @ref HASH_processor_Algorithm_Mode */
53 | uint32_t HASH_DataType; /*!< 32-bit data, 16-bit data, 8-bit data or
54 | bit-string. This parameter can be a value of
55 | @ref HASH_Data_Type */
56 | uint32_t HASH_HMACKeyType; /*!< HMAC Short key or HMAC Long Key. This parameter
57 | can be a value of @ref HASH_HMAC_Long_key_only_for_HMAC_mode */
58 | }HASH_InitTypeDef;
59 |
60 | /**
61 | * @brief HASH message digest result structure definition
62 | */
63 | typedef struct
64 | {
65 | uint32_t Data[5]; /*!< Message digest result : 5x 32bit words for SHA1 or
66 | 4x 32bit words for MD5 */
67 | } HASH_MsgDigest;
68 |
69 | /**
70 | * @brief HASH context swapping structure definition
71 | */
72 | typedef struct
73 | {
74 | uint32_t HASH_IMR;
75 | uint32_t HASH_STR;
76 | uint32_t HASH_CR;
77 | uint32_t HASH_CSR[51];
78 | }HASH_Context;
79 |
80 | /* Exported constants --------------------------------------------------------*/
81 |
82 | /** @defgroup HASH_Exported_Constants
83 | * @{
84 | */
85 |
86 | /** @defgroup HASH_Algo_Selection
87 | * @{
88 | */
89 | #define HASH_AlgoSelection_SHA1 ((uint16_t)0x0000) /*!< HASH function is SHA1 */
90 | #define HASH_AlgoSelection_MD5 ((uint16_t)0x0080) /*!< HASH function is MD5 */
91 |
92 | #define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \
93 | ((ALGOSELECTION) == HASH_AlgoSelection_MD5))
94 | /**
95 | * @}
96 | */
97 |
98 | /** @defgroup HASH_processor_Algorithm_Mode
99 | * @{
100 | */
101 | #define HASH_AlgoMode_HASH ((uint16_t)0x0000) /*!< Algorithm is HASH */
102 | #define HASH_AlgoMode_HMAC ((uint16_t)0x0040) /*!< Algorithm is HMAC */
103 |
104 | #define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \
105 | ((ALGOMODE) == HASH_AlgoMode_HMAC))
106 | /**
107 | * @}
108 | */
109 |
110 | /** @defgroup HASH_Data_Type
111 | * @{
112 | */
113 | #define HASH_DataType_32b ((uint16_t)0x0000)
114 | #define HASH_DataType_16b ((uint16_t)0x0010)
115 | #define HASH_DataType_8b ((uint16_t)0x0020)
116 | #define HASH_DataType_1b ((uint16_t)0x0030)
117 |
118 | #define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DataType_32b)|| \
119 | ((DATATYPE) == HASH_DataType_16b)|| \
120 | ((DATATYPE) == HASH_DataType_8b)|| \
121 | ((DATATYPE) == HASH_DataType_1b))
122 | /**
123 | * @}
124 | */
125 |
126 | /** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode
127 | * @{
128 | */
129 | #define HASH_HMACKeyType_ShortKey ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */
130 | #define HASH_HMACKeyType_LongKey ((uint32_t)0x00010000) /*!< HMAC Key is > 64 bytes */
131 |
132 | #define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \
133 | ((KEYTYPE) == HASH_HMACKeyType_LongKey))
134 | /**
135 | * @}
136 | */
137 |
138 | /** @defgroup Number_of_valid_bits_in_last_word_of_the_message
139 | * @{
140 | */
141 | #define IS_HASH_VALIDBITSNUMBER(VALIDBITS) ((VALIDBITS) <= 0x1F)
142 |
143 | /**
144 | * @}
145 | */
146 |
147 | /** @defgroup HASH_interrupts_definition
148 | * @{
149 | */
150 | #define HASH_IT_DINI ((uint8_t)0x01) /*!< A new block can be entered into the input buffer (DIN)*/
151 | #define HASH_IT_DCI ((uint8_t)0x02) /*!< Digest calculation complete */
152 |
153 | #define IS_HASH_IT(IT) ((((IT) & (uint8_t)0xFC) == 0x00) && ((IT) != 0x00))
154 | #define IS_HASH_GET_IT(IT) (((IT) == HASH_IT_DINI) || ((IT) == HASH_IT_DCI))
155 |
156 | /**
157 | * @}
158 | */
159 |
160 | /** @defgroup HASH_flags_definition
161 | * @{
162 | */
163 | #define HASH_FLAG_DINIS ((uint16_t)0x0001) /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer.*/
164 | #define HASH_FLAG_DCIS ((uint16_t)0x0002) /*!< Digest calculation complete */
165 | #define HASH_FLAG_DMAS ((uint16_t)0x0004) /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
166 | #define HASH_FLAG_BUSY ((uint16_t)0x0008) /*!< The hash core is Busy : processing a block of data */
167 | #define HASH_FLAG_DINNE ((uint16_t)0x1000) /*!< DIN not empty : The input buffer contains at least one word of data */
168 |
169 | #define IS_HASH_GET_FLAG(FLAG) (((FLAG) == HASH_FLAG_DINIS) || \
170 | ((FLAG) == HASH_FLAG_DCIS) || \
171 | ((FLAG) == HASH_FLAG_DMAS) || \
172 | ((FLAG) == HASH_FLAG_BUSY) || \
173 | ((FLAG) == HASH_FLAG_DINNE))
174 |
175 | #define IS_HASH_CLEAR_FLAG(FLAG)(((FLAG) == HASH_FLAG_DINIS) || \
176 | ((FLAG) == HASH_FLAG_DCIS))
177 |
178 | /**
179 | * @}
180 | */
181 |
182 | /**
183 | * @}
184 | */
185 |
186 | /* Exported macro ------------------------------------------------------------*/
187 | /* Exported functions --------------------------------------------------------*/
188 |
189 | /* Function used to set the HASH configuration to the default reset state ****/
190 | void HASH_DeInit(void);
191 |
192 | /* HASH Configuration function ************************************************/
193 | void HASH_Init(HASH_InitTypeDef* HASH_InitStruct);
194 | void HASH_StructInit(HASH_InitTypeDef* HASH_InitStruct);
195 | void HASH_Reset(void);
196 |
197 | /* HASH Message Digest generation functions ***********************************/
198 | void HASH_DataIn(uint32_t Data);
199 | uint8_t HASH_GetInFIFOWordsNbr(void);
200 | void HASH_SetLastWordValidBitsNbr(uint16_t ValidNumber);
201 | void HASH_StartDigest(void);
202 | void HASH_GetDigest(HASH_MsgDigest* HASH_MessageDigest);
203 |
204 | /* HASH Context swapping functions ********************************************/
205 | void HASH_SaveContext(HASH_Context* HASH_ContextSave);
206 | void HASH_RestoreContext(HASH_Context* HASH_ContextRestore);
207 |
208 | /* HASH's DMA interface function **********************************************/
209 | void HASH_DMACmd(FunctionalState NewState);
210 |
211 | /* HASH Interrupts and flags management functions *****************************/
212 | void HASH_ITConfig(uint8_t HASH_IT, FunctionalState NewState);
213 | FlagStatus HASH_GetFlagStatus(uint16_t HASH_FLAG);
214 | void HASH_ClearFlag(uint16_t HASH_FLAG);
215 | ITStatus HASH_GetITStatus(uint8_t HASH_IT);
216 | void HASH_ClearITPendingBit(uint8_t HASH_IT);
217 |
218 | /* High Level SHA1 functions **************************************************/
219 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20]);
220 | ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen,
221 | uint8_t *Input, uint32_t Ilen,
222 | uint8_t Output[20]);
223 |
224 | /* High Level MD5 functions ***************************************************/
225 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16]);
226 | ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen,
227 | uint8_t *Input, uint32_t Ilen,
228 | uint8_t Output[16]);
229 |
230 | #ifdef __cplusplus
231 | }
232 | #endif
233 |
234 | #endif /*__STM32F4xx_HASH_H */
235 |
236 | /**
237 | * @}
238 | */
239 |
240 | /**
241 | * @}
242 | */
243 |
244 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
245 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_iwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_iwdg.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the IWDG
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_IWDG_H
25 | #define __STM32F4xx_IWDG_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup IWDG
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 | /* Exported constants --------------------------------------------------------*/
44 |
45 | /** @defgroup IWDG_Exported_Constants
46 | * @{
47 | */
48 |
49 | /** @defgroup IWDG_WriteAccess
50 | * @{
51 | */
52 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
53 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
54 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
55 | ((ACCESS) == IWDG_WriteAccess_Disable))
56 | /**
57 | * @}
58 | */
59 |
60 | /** @defgroup IWDG_prescaler
61 | * @{
62 | */
63 | #define IWDG_Prescaler_4 ((uint8_t)0x00)
64 | #define IWDG_Prescaler_8 ((uint8_t)0x01)
65 | #define IWDG_Prescaler_16 ((uint8_t)0x02)
66 | #define IWDG_Prescaler_32 ((uint8_t)0x03)
67 | #define IWDG_Prescaler_64 ((uint8_t)0x04)
68 | #define IWDG_Prescaler_128 ((uint8_t)0x05)
69 | #define IWDG_Prescaler_256 ((uint8_t)0x06)
70 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
71 | ((PRESCALER) == IWDG_Prescaler_8) || \
72 | ((PRESCALER) == IWDG_Prescaler_16) || \
73 | ((PRESCALER) == IWDG_Prescaler_32) || \
74 | ((PRESCALER) == IWDG_Prescaler_64) || \
75 | ((PRESCALER) == IWDG_Prescaler_128)|| \
76 | ((PRESCALER) == IWDG_Prescaler_256))
77 | /**
78 | * @}
79 | */
80 |
81 | /** @defgroup IWDG_Flag
82 | * @{
83 | */
84 | #define IWDG_FLAG_PVU ((uint16_t)0x0001)
85 | #define IWDG_FLAG_RVU ((uint16_t)0x0002)
86 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
87 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
88 | /**
89 | * @}
90 | */
91 |
92 | /**
93 | * @}
94 | */
95 |
96 | /* Exported macro ------------------------------------------------------------*/
97 | /* Exported functions --------------------------------------------------------*/
98 |
99 | /* Prescaler and Counter configuration functions ******************************/
100 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
101 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
102 | void IWDG_SetReload(uint16_t Reload);
103 | void IWDG_ReloadCounter(void);
104 |
105 | /* IWDG activation function ***************************************************/
106 | void IWDG_Enable(void);
107 |
108 | /* Flag management function ***************************************************/
109 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
110 |
111 | #ifdef __cplusplus
112 | }
113 | #endif
114 |
115 | #endif /* __STM32F4xx_IWDG_H */
116 |
117 | /**
118 | * @}
119 | */
120 |
121 | /**
122 | * @}
123 | */
124 |
125 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
126 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_pwr.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the PWR firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_PWR_H
25 | #define __STM32F4xx_PWR_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup PWR
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 | /* Exported constants --------------------------------------------------------*/
44 |
45 | /** @defgroup PWR_Exported_Constants
46 | * @{
47 | */
48 |
49 | /** @defgroup PWR_PVD_detection_level
50 | * @{
51 | */
52 |
53 | #define PWR_PVDLevel_0 PWR_CR_PLS_LEV0
54 | #define PWR_PVDLevel_1 PWR_CR_PLS_LEV1
55 | #define PWR_PVDLevel_2 PWR_CR_PLS_LEV2
56 | #define PWR_PVDLevel_3 PWR_CR_PLS_LEV3
57 | #define PWR_PVDLevel_4 PWR_CR_PLS_LEV4
58 | #define PWR_PVDLevel_5 PWR_CR_PLS_LEV5
59 | #define PWR_PVDLevel_6 PWR_CR_PLS_LEV6
60 | #define PWR_PVDLevel_7 PWR_CR_PLS_LEV7
61 |
62 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \
63 | ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
64 | ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
65 | ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
66 | /**
67 | * @}
68 | */
69 |
70 |
71 | /** @defgroup PWR_Regulator_state_in_STOP_mode
72 | * @{
73 | */
74 |
75 | #define PWR_Regulator_ON ((uint32_t)0x00000000)
76 | #define PWR_Regulator_LowPower PWR_CR_LPDS
77 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
78 | ((REGULATOR) == PWR_Regulator_LowPower))
79 | /**
80 | * @}
81 | */
82 |
83 | /** @defgroup PWR_STOP_mode_entry
84 | * @{
85 | */
86 |
87 | #define PWR_STOPEntry_WFI ((uint8_t)0x01)
88 | #define PWR_STOPEntry_WFE ((uint8_t)0x02)
89 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
90 |
91 | /** @defgroup PWR_Regulator_Voltage_Scale
92 | * @{
93 | */
94 |
95 | #define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x00004000)
96 | #define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00000000)
97 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || ((VOLTAGE) == PWR_Regulator_Voltage_Scale2))
98 |
99 | /**
100 | * @}
101 | */
102 |
103 | /** @defgroup PWR_Flag
104 | * @{
105 | */
106 |
107 | #define PWR_FLAG_WU PWR_CSR_WUF
108 | #define PWR_FLAG_SB PWR_CSR_SBF
109 | #define PWR_FLAG_PVDO PWR_CSR_PVDO
110 | #define PWR_FLAG_BRR PWR_CSR_BRR
111 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
112 |
113 | /** @defgroup PWR_Flag_Legacy
114 | * @{
115 | */
116 | #define PWR_FLAG_REGRDY PWR_FLAG_VOSRDY
117 | /**
118 | * @}
119 | */
120 |
121 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
122 | ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \
123 | ((FLAG) == PWR_FLAG_VOSRDY))
124 |
125 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
126 | /**
127 | * @}
128 | */
129 |
130 | /**
131 | * @}
132 | */
133 |
134 | /* Exported macro ------------------------------------------------------------*/
135 | /* Exported functions --------------------------------------------------------*/
136 |
137 | /* Function used to set the PWR configuration to the default reset state ******/
138 | void PWR_DeInit(void);
139 |
140 | /* Backup Domain Access function **********************************************/
141 | void PWR_BackupAccessCmd(FunctionalState NewState);
142 |
143 | /* PVD configuration functions ************************************************/
144 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
145 | void PWR_PVDCmd(FunctionalState NewState);
146 |
147 | /* WakeUp pins configuration functions ****************************************/
148 | void PWR_WakeUpPinCmd(FunctionalState NewState);
149 |
150 | /* Main and Backup Regulators configuration functions *************************/
151 | void PWR_BackupRegulatorCmd(FunctionalState NewState);
152 | void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage);
153 |
154 | /* FLASH Power Down configuration functions ***********************************/
155 | void PWR_FlashPowerDownCmd(FunctionalState NewState);
156 |
157 | /* Low Power modes configuration functions ************************************/
158 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
159 | void PWR_EnterSTANDBYMode(void);
160 |
161 | /* Flags management functions *************************************************/
162 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
163 | void PWR_ClearFlag(uint32_t PWR_FLAG);
164 |
165 | #ifdef __cplusplus
166 | }
167 | #endif
168 |
169 | #endif /* __STM32F4xx_PWR_H */
170 |
171 | /**
172 | * @}
173 | */
174 |
175 | /**
176 | * @}
177 | */
178 |
179 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
180 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rng.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_rng.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the Random
8 | * Number Generator(RNG) firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_RNG_H
25 | #define __STM32F4xx_RNG_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup RNG
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 | /* Exported constants --------------------------------------------------------*/
44 |
45 | /** @defgroup RNG_Exported_Constants
46 | * @{
47 | */
48 |
49 | /** @defgroup RNG_flags_definition
50 | * @{
51 | */
52 | #define RNG_FLAG_DRDY ((uint8_t)0x0001) /*!< Data ready */
53 | #define RNG_FLAG_CECS ((uint8_t)0x0002) /*!< Clock error current status */
54 | #define RNG_FLAG_SECS ((uint8_t)0x0004) /*!< Seed error current status */
55 |
56 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \
57 | ((RNG_FLAG) == RNG_FLAG_CECS) || \
58 | ((RNG_FLAG) == RNG_FLAG_SECS))
59 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \
60 | ((RNG_FLAG) == RNG_FLAG_SECS))
61 | /**
62 | * @}
63 | */
64 |
65 | /** @defgroup RNG_interrupts_definition
66 | * @{
67 | */
68 | #define RNG_IT_CEI ((uint8_t)0x20) /*!< Clock error interrupt */
69 | #define RNG_IT_SEI ((uint8_t)0x40) /*!< Seed error interrupt */
70 |
71 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00))
72 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI))
73 | /**
74 | * @}
75 | */
76 |
77 | /**
78 | * @}
79 | */
80 |
81 | /* Exported macro ------------------------------------------------------------*/
82 | /* Exported functions --------------------------------------------------------*/
83 |
84 | /* Function used to set the RNG configuration to the default reset state *****/
85 | void RNG_DeInit(void);
86 |
87 | /* Configuration function *****************************************************/
88 | void RNG_Cmd(FunctionalState NewState);
89 |
90 | /* Get 32 bit Random number function ******************************************/
91 | uint32_t RNG_GetRandomNumber(void);
92 |
93 | /* Interrupts and flags management functions **********************************/
94 | void RNG_ITConfig(FunctionalState NewState);
95 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG);
96 | void RNG_ClearFlag(uint8_t RNG_FLAG);
97 | ITStatus RNG_GetITStatus(uint8_t RNG_IT);
98 | void RNG_ClearITPendingBit(uint8_t RNG_IT);
99 |
100 | #ifdef __cplusplus
101 | }
102 | #endif
103 |
104 | #endif /*__STM32F4xx_RNG_H */
105 |
106 | /**
107 | * @}
108 | */
109 |
110 | /**
111 | * @}
112 | */
113 |
114 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
115 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_syscfg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_syscfg.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the SYSCFG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_SYSCFG_H
25 | #define __STM32F4xx_SYSCFG_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup SYSCFG
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 | /* Exported constants --------------------------------------------------------*/
44 |
45 | /** @defgroup SYSCFG_Exported_Constants
46 | * @{
47 | */
48 |
49 | /** @defgroup SYSCFG_EXTI_Port_Sources
50 | * @{
51 | */
52 | #define EXTI_PortSourceGPIOA ((uint8_t)0x00)
53 | #define EXTI_PortSourceGPIOB ((uint8_t)0x01)
54 | #define EXTI_PortSourceGPIOC ((uint8_t)0x02)
55 | #define EXTI_PortSourceGPIOD ((uint8_t)0x03)
56 | #define EXTI_PortSourceGPIOE ((uint8_t)0x04)
57 | #define EXTI_PortSourceGPIOF ((uint8_t)0x05)
58 | #define EXTI_PortSourceGPIOG ((uint8_t)0x06)
59 | #define EXTI_PortSourceGPIOH ((uint8_t)0x07)
60 | #define EXTI_PortSourceGPIOI ((uint8_t)0x08)
61 |
62 | #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
63 | ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
64 | ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
65 | ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
66 | ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
67 | ((PORTSOURCE) == EXTI_PortSourceGPIOF) || \
68 | ((PORTSOURCE) == EXTI_PortSourceGPIOG) || \
69 | ((PORTSOURCE) == EXTI_PortSourceGPIOH) || \
70 | ((PORTSOURCE) == EXTI_PortSourceGPIOI))
71 | /**
72 | * @}
73 | */
74 |
75 |
76 | /** @defgroup SYSCFG_EXTI_Pin_Sources
77 | * @{
78 | */
79 | #define EXTI_PinSource0 ((uint8_t)0x00)
80 | #define EXTI_PinSource1 ((uint8_t)0x01)
81 | #define EXTI_PinSource2 ((uint8_t)0x02)
82 | #define EXTI_PinSource3 ((uint8_t)0x03)
83 | #define EXTI_PinSource4 ((uint8_t)0x04)
84 | #define EXTI_PinSource5 ((uint8_t)0x05)
85 | #define EXTI_PinSource6 ((uint8_t)0x06)
86 | #define EXTI_PinSource7 ((uint8_t)0x07)
87 | #define EXTI_PinSource8 ((uint8_t)0x08)
88 | #define EXTI_PinSource9 ((uint8_t)0x09)
89 | #define EXTI_PinSource10 ((uint8_t)0x0A)
90 | #define EXTI_PinSource11 ((uint8_t)0x0B)
91 | #define EXTI_PinSource12 ((uint8_t)0x0C)
92 | #define EXTI_PinSource13 ((uint8_t)0x0D)
93 | #define EXTI_PinSource14 ((uint8_t)0x0E)
94 | #define EXTI_PinSource15 ((uint8_t)0x0F)
95 | #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
96 | ((PINSOURCE) == EXTI_PinSource1) || \
97 | ((PINSOURCE) == EXTI_PinSource2) || \
98 | ((PINSOURCE) == EXTI_PinSource3) || \
99 | ((PINSOURCE) == EXTI_PinSource4) || \
100 | ((PINSOURCE) == EXTI_PinSource5) || \
101 | ((PINSOURCE) == EXTI_PinSource6) || \
102 | ((PINSOURCE) == EXTI_PinSource7) || \
103 | ((PINSOURCE) == EXTI_PinSource8) || \
104 | ((PINSOURCE) == EXTI_PinSource9) || \
105 | ((PINSOURCE) == EXTI_PinSource10) || \
106 | ((PINSOURCE) == EXTI_PinSource11) || \
107 | ((PINSOURCE) == EXTI_PinSource12) || \
108 | ((PINSOURCE) == EXTI_PinSource13) || \
109 | ((PINSOURCE) == EXTI_PinSource14) || \
110 | ((PINSOURCE) == EXTI_PinSource15))
111 | /**
112 | * @}
113 | */
114 |
115 |
116 | /** @defgroup SYSCFG_Memory_Remap_Config
117 | * @{
118 | */
119 | #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
120 | #define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01)
121 | #define SYSCFG_MemoryRemap_FSMC ((uint8_t)0x02)
122 | #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
123 |
124 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
125 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
126 | ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \
127 | ((REMAP) == SYSCFG_MemoryRemap_FSMC))
128 | /**
129 | * @}
130 | */
131 |
132 |
133 | /** @defgroup SYSCFG_ETHERNET_Media_Interface
134 | * @{
135 | */
136 | #define SYSCFG_ETH_MediaInterface_MII ((uint32_t)0x00000000)
137 | #define SYSCFG_ETH_MediaInterface_RMII ((uint32_t)0x00000001)
138 |
139 | #define IS_SYSCFG_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == SYSCFG_ETH_MediaInterface_MII) || \
140 | ((INTERFACE) == SYSCFG_ETH_MediaInterface_RMII))
141 | /**
142 | * @}
143 | */
144 |
145 | /**
146 | * @}
147 | */
148 |
149 | /* Exported macro ------------------------------------------------------------*/
150 | /* Exported functions --------------------------------------------------------*/
151 |
152 | void SYSCFG_DeInit(void);
153 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
154 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
155 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface);
156 | void SYSCFG_CompensationCellCmd(FunctionalState NewState);
157 | FlagStatus SYSCFG_GetCompensationCellStatus(void);
158 |
159 | #ifdef __cplusplus
160 | }
161 | #endif
162 |
163 | #endif /*__STM32F4xx_SYSCFG_H */
164 |
165 | /**
166 | * @}
167 | */
168 |
169 | /**
170 | * @}
171 | */
172 |
173 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
174 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_wwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_wwdg.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file contains all the functions prototypes for the WWDG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_WWDG_H
25 | #define __STM32F4xx_WWDG_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 |
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup WWDG
39 | * @{
40 | */
41 |
42 | /* Exported types ------------------------------------------------------------*/
43 | /* Exported constants --------------------------------------------------------*/
44 |
45 | /** @defgroup WWDG_Exported_Constants
46 | * @{
47 | */
48 |
49 | /** @defgroup WWDG_Prescaler
50 | * @{
51 | */
52 |
53 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000)
54 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080)
55 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100)
56 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180)
57 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
58 | ((PRESCALER) == WWDG_Prescaler_2) || \
59 | ((PRESCALER) == WWDG_Prescaler_4) || \
60 | ((PRESCALER) == WWDG_Prescaler_8))
61 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
62 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /**
69 | * @}
70 | */
71 |
72 | /* Exported macro ------------------------------------------------------------*/
73 | /* Exported functions --------------------------------------------------------*/
74 |
75 | /* Function used to set the WWDG configuration to the default reset state ****/
76 | void WWDG_DeInit(void);
77 |
78 | /* Prescaler, Refresh window and Counter configuration functions **************/
79 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
80 | void WWDG_SetWindowValue(uint8_t WindowValue);
81 | void WWDG_EnableIT(void);
82 | void WWDG_SetCounter(uint8_t Counter);
83 |
84 | /* WWDG activation function ***************************************************/
85 | void WWDG_Enable(uint8_t Counter);
86 |
87 | /* Interrupts and flags management functions **********************************/
88 | FlagStatus WWDG_GetFlagStatus(void);
89 | void WWDG_ClearFlag(void);
90 |
91 | #ifdef __cplusplus
92 | }
93 | #endif
94 |
95 | #endif /* __STM32F4xx_WWDG_H */
96 |
97 | /**
98 | * @}
99 | */
100 |
101 | /**
102 | * @}
103 | */
104 |
105 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
106 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/src/misc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file misc.c
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file provides all the miscellaneous firmware functions (add-on
8 | * to CMSIS functions).
9 | *
10 | * @verbatim
11 | *
12 | * ===================================================================
13 | * How to configure Interrupts using driver
14 | * ===================================================================
15 | *
16 | * This section provide functions allowing to configure the NVIC interrupts (IRQ).
17 | * The Cortex-M4 exceptions are managed by CMSIS functions.
18 | *
19 | * 1. Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig()
20 | * function according to the following table.
21 |
22 | * The table below gives the allowed values of the pre-emption priority and subpriority according
23 | * to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
24 | * ==========================================================================================================================
25 | * NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
26 | * ==========================================================================================================================
27 | * NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
28 | * | | | 4 bits for subpriority
29 | * --------------------------------------------------------------------------------------------------------------------------
30 | * NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
31 | * | | | 3 bits for subpriority
32 | * --------------------------------------------------------------------------------------------------------------------------
33 | * NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
34 | * | | | 2 bits for subpriority
35 | * --------------------------------------------------------------------------------------------------------------------------
36 | * NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
37 | * | | | 1 bits for subpriority
38 | * --------------------------------------------------------------------------------------------------------------------------
39 | * NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
40 | * | | | 0 bits for subpriority
41 | * ==========================================================================================================================
42 | *
43 | * 2. Enable and Configure the priority of the selected IRQ Channels using NVIC_Init()
44 | *
45 | * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
46 | * The pending IRQ priority will be managed only by the subpriority.
47 | *
48 | * @note IRQ priority order (sorted by highest to lowest priority):
49 | * - Lowest pre-emption priority
50 | * - Lowest subpriority
51 | * - Lowest hardware priority (IRQ number)
52 | *
53 | * @endverbatim
54 | *
55 | ******************************************************************************
56 | * @attention
57 | *
58 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
59 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
60 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
61 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
62 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
63 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
64 | *
65 | * © COPYRIGHT 2011 STMicroelectronics
66 | ******************************************************************************
67 | */
68 |
69 | /* Includes ------------------------------------------------------------------*/
70 | #include "misc.h"
71 |
72 | /** @addtogroup STM32F4xx_StdPeriph_Driver
73 | * @{
74 | */
75 |
76 | /** @defgroup MISC
77 | * @brief MISC driver modules
78 | * @{
79 | */
80 |
81 | /* Private typedef -----------------------------------------------------------*/
82 | /* Private define ------------------------------------------------------------*/
83 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
84 |
85 | /* Private macro -------------------------------------------------------------*/
86 | /* Private variables ---------------------------------------------------------*/
87 | /* Private function prototypes -----------------------------------------------*/
88 | /* Private functions ---------------------------------------------------------*/
89 |
90 | /** @defgroup MISC_Private_Functions
91 | * @{
92 | */
93 |
94 | /**
95 | * @brief Configures the priority grouping: pre-emption priority and subpriority.
96 | * @param NVIC_PriorityGroup: specifies the priority grouping bits length.
97 | * This parameter can be one of the following values:
98 | * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
99 | * 4 bits for subpriority
100 | * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
101 | * 3 bits for subpriority
102 | * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
103 | * 2 bits for subpriority
104 | * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
105 | * 1 bits for subpriority
106 | * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
107 | * 0 bits for subpriority
108 | * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
109 | * The pending IRQ priority will be managed only by the subpriority.
110 | * @retval None
111 | */
112 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
113 | {
114 | /* Check the parameters */
115 | assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
116 |
117 | /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
118 | SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
119 | }
120 |
121 | /**
122 | * @brief Initializes the NVIC peripheral according to the specified
123 | * parameters in the NVIC_InitStruct.
124 | * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
125 | * function should be called before.
126 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
127 | * the configuration information for the specified NVIC peripheral.
128 | * @retval None
129 | */
130 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
131 | {
132 | uint8_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
133 |
134 | /* Check the parameters */
135 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
136 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
137 | assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
138 |
139 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
140 | {
141 | /* Compute the Corresponding IRQ Priority --------------------------------*/
142 | tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
143 | tmppre = (0x4 - tmppriority);
144 | tmpsub = tmpsub >> tmppriority;
145 |
146 | tmppriority = NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
147 | tmppriority |= (uint8_t)(NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub);
148 |
149 | tmppriority = tmppriority << 0x04;
150 |
151 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
152 |
153 | /* Enable the Selected IRQ Channels --------------------------------------*/
154 | NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
155 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
156 | }
157 | else
158 | {
159 | /* Disable the Selected IRQ Channels -------------------------------------*/
160 | NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
161 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
162 | }
163 | }
164 |
165 | /**
166 | * @brief Sets the vector table location and Offset.
167 | * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
168 | * This parameter can be one of the following values:
169 | * @arg NVIC_VectTab_RAM: Vector Table in internal SRAM.
170 | * @arg NVIC_VectTab_FLASH: Vector Table in internal FLASH.
171 | * @param Offset: Vector Table base offset field. This value must be a multiple of 0x200.
172 | * @retval None
173 | */
174 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
175 | {
176 | /* Check the parameters */
177 | assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
178 | assert_param(IS_NVIC_OFFSET(Offset));
179 |
180 | SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
181 | }
182 |
183 | /**
184 | * @brief Selects the condition for the system to enter low power mode.
185 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
186 | * This parameter can be one of the following values:
187 | * @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
188 | * @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
189 | * @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
190 | * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
191 | * @retval None
192 | */
193 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
194 | {
195 | /* Check the parameters */
196 | assert_param(IS_NVIC_LP(LowPowerMode));
197 | assert_param(IS_FUNCTIONAL_STATE(NewState));
198 |
199 | if (NewState != DISABLE)
200 | {
201 | SCB->SCR |= LowPowerMode;
202 | }
203 | else
204 | {
205 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
206 | }
207 | }
208 |
209 | /**
210 | * @brief Configures the SysTick clock source.
211 | * @param SysTick_CLKSource: specifies the SysTick clock source.
212 | * This parameter can be one of the following values:
213 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
214 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
215 | * @retval None
216 | */
217 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
218 | {
219 | /* Check the parameters */
220 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
221 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
222 | {
223 | SysTick->CTRL |= SysTick_CLKSource_HCLK;
224 | }
225 | else
226 | {
227 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
228 | }
229 | }
230 |
231 | /**
232 | * @}
233 | */
234 |
235 | /**
236 | * @}
237 | */
238 |
239 | /**
240 | * @}
241 | */
242 |
243 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
244 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.c
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file provides all the CRC firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f4xx_crc.h"
24 |
25 | /** @addtogroup STM32F4xx_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup CRC
30 | * @brief CRC driver modules
31 | * @{
32 | */
33 |
34 | /* Private typedef -----------------------------------------------------------*/
35 | /* Private define ------------------------------------------------------------*/
36 | /* Private macro -------------------------------------------------------------*/
37 | /* Private variables ---------------------------------------------------------*/
38 | /* Private function prototypes -----------------------------------------------*/
39 | /* Private functions ---------------------------------------------------------*/
40 |
41 | /** @defgroup CRC_Private_Functions
42 | * @{
43 | */
44 |
45 | /**
46 | * @brief Resets the CRC Data register (DR).
47 | * @param None
48 | * @retval None
49 | */
50 | void CRC_ResetDR(void)
51 | {
52 | /* Reset CRC generator */
53 | CRC->CR = CRC_CR_RESET;
54 | }
55 |
56 | /**
57 | * @brief Computes the 32-bit CRC of a given data word(32-bit).
58 | * @param Data: data word(32-bit) to compute its CRC
59 | * @retval 32-bit CRC
60 | */
61 | uint32_t CRC_CalcCRC(uint32_t Data)
62 | {
63 | CRC->DR = Data;
64 |
65 | return (CRC->DR);
66 | }
67 |
68 | /**
69 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit).
70 | * @param pBuffer: pointer to the buffer containing the data to be computed
71 | * @param BufferLength: length of the buffer to be computed
72 | * @retval 32-bit CRC
73 | */
74 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
75 | {
76 | uint32_t index = 0;
77 |
78 | for(index = 0; index < BufferLength; index++)
79 | {
80 | CRC->DR = pBuffer[index];
81 | }
82 | return (CRC->DR);
83 | }
84 |
85 | /**
86 | * @brief Returns the current CRC value.
87 | * @param None
88 | * @retval 32-bit CRC
89 | */
90 | uint32_t CRC_GetCRC(void)
91 | {
92 | return (CRC->DR);
93 | }
94 |
95 | /**
96 | * @brief Stores a 8-bit data in the Independent Data(ID) register.
97 | * @param IDValue: 8-bit value to be stored in the ID register
98 | * @retval None
99 | */
100 | void CRC_SetIDRegister(uint8_t IDValue)
101 | {
102 | CRC->IDR = IDValue;
103 | }
104 |
105 | /**
106 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register
107 | * @param None
108 | * @retval 8-bit value of the ID register
109 | */
110 | uint8_t CRC_GetIDRegister(void)
111 | {
112 | return (CRC->IDR);
113 | }
114 |
115 | /**
116 | * @}
117 | */
118 |
119 | /**
120 | * @}
121 | */
122 |
123 | /**
124 | * @}
125 | */
126 |
127 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
128 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_des.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_cryp_des.c
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file provides high level functions to encrypt and decrypt an
8 | * input message using DES in ECB/CBC modes.
9 | * It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP
10 | * peripheral.
11 | *
12 | * @verbatim
13 | *
14 | * ===================================================================
15 | * How to use this driver
16 | * ===================================================================
17 | * 1. Enable The CRYP controller clock using
18 | * RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
19 | *
20 | * 2. Encrypt and decrypt using DES in ECB Mode using CRYP_DES_ECB()
21 | * function.
22 | *
23 | * 3. Encrypt and decrypt using DES in CBC Mode using CRYP_DES_CBC()
24 | * function.
25 | *
26 | * @endverbatim
27 | *
28 | ******************************************************************************
29 | * @attention
30 | *
31 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
32 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
33 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
34 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
35 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
36 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
37 | *
38 | * © COPYRIGHT 2011 STMicroelectronics
39 | ******************************************************************************
40 | */
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | #include "stm32f4xx_cryp.h"
44 |
45 |
46 | /** @addtogroup STM32F4xx_StdPeriph_Driver
47 | * @{
48 | */
49 |
50 | /** @defgroup CRYP
51 | * @brief CRYP driver modules
52 | * @{
53 | */
54 |
55 | /* Private typedef -----------------------------------------------------------*/
56 | /* Private define ------------------------------------------------------------*/
57 | #define DESBUSY_TIMEOUT ((uint32_t) 0x00010000)
58 |
59 | /* Private macro -------------------------------------------------------------*/
60 | /* Private variables ---------------------------------------------------------*/
61 | /* Private function prototypes -----------------------------------------------*/
62 | /* Private functions ---------------------------------------------------------*/
63 |
64 |
65 | /** @defgroup CRYP_Private_Functions
66 | * @{
67 | */
68 |
69 | /** @defgroup CRYP_Group8 High Level DES functions
70 | * @brief High Level DES functions
71 | *
72 | @verbatim
73 | ===============================================================================
74 | High Level DES functions
75 | ===============================================================================
76 | @endverbatim
77 | * @{
78 | */
79 |
80 | /**
81 | * @brief Encrypt and decrypt using DES in ECB Mode
82 | * @param Mode: encryption or decryption Mode.
83 | * This parameter can be one of the following values:
84 | * @arg MODE_ENCRYPT: Encryption
85 | * @arg MODE_DECRYPT: Decryption
86 | * @param Key: Key used for DES algorithm.
87 | * @param Ilength: length of the Input buffer, must be a multiple of 8.
88 | * @param Input: pointer to the Input buffer.
89 | * @param Output: pointer to the returned buffer.
90 | * @retval An ErrorStatus enumeration value:
91 | * - SUCCESS: Operation done
92 | * - ERROR: Operation failed
93 | */
94 | ErrorStatus CRYP_DES_ECB(uint8_t Mode, uint8_t Key[8], uint8_t *Input,
95 | uint32_t Ilength, uint8_t *Output)
96 | {
97 | CRYP_InitTypeDef DES_CRYP_InitStructure;
98 | CRYP_KeyInitTypeDef DES_CRYP_KeyInitStructure;
99 | __IO uint32_t counter = 0;
100 | uint32_t busystatus = 0;
101 | ErrorStatus status = SUCCESS;
102 | uint32_t keyaddr = (uint32_t)Key;
103 | uint32_t inputaddr = (uint32_t)Input;
104 | uint32_t outputaddr = (uint32_t)Output;
105 | uint32_t i = 0;
106 |
107 | /* Crypto structures initialisation*/
108 | CRYP_KeyStructInit(&DES_CRYP_KeyInitStructure);
109 |
110 | /* Crypto Init for Encryption process */
111 | if( Mode == MODE_ENCRYPT ) /* DES encryption */
112 | {
113 | DES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
114 | }
115 | else/* if( Mode == MODE_DECRYPT )*/ /* DES decryption */
116 | {
117 | DES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
118 | }
119 |
120 | DES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_DES_ECB;
121 | DES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
122 | CRYP_Init(&DES_CRYP_InitStructure);
123 |
124 | /* Key Initialisation */
125 | DES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
126 | keyaddr+=4;
127 | DES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
128 | CRYP_KeyInit(& DES_CRYP_KeyInitStructure);
129 |
130 | /* Flush IN/OUT FIFO */
131 | CRYP_FIFOFlush();
132 |
133 | /* Enable Crypto processor */
134 | CRYP_Cmd(ENABLE);
135 |
136 | for(i=0; ((i© COPYRIGHT 2011 STMicroelectronics
39 | ******************************************************************************
40 | */
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | #include "stm32f4xx_cryp.h"
44 |
45 |
46 | /** @addtogroup STM32F4xx_StdPeriph_Driver
47 | * @{
48 | */
49 |
50 | /** @defgroup CRYP
51 | * @brief CRYP driver modules
52 | * @{
53 | */
54 |
55 | /* Private typedef -----------------------------------------------------------*/
56 | /* Private define ------------------------------------------------------------*/
57 | #define TDESBUSY_TIMEOUT ((uint32_t) 0x00010000)
58 |
59 | /* Private macro -------------------------------------------------------------*/
60 | /* Private variables ---------------------------------------------------------*/
61 | /* Private function prototypes -----------------------------------------------*/
62 | /* Private functions ---------------------------------------------------------*/
63 |
64 |
65 | /** @defgroup CRYP_Private_Functions
66 | * @{
67 | */
68 |
69 | /** @defgroup CRYP_Group7 High Level TDES functions
70 | * @brief High Level TDES functions
71 | *
72 | @verbatim
73 | ===============================================================================
74 | High Level TDES functions
75 | ===============================================================================
76 |
77 |
78 | @endverbatim
79 | * @{
80 | */
81 |
82 | /**
83 | * @brief Encrypt and decrypt using TDES in ECB Mode
84 | * @param Mode: encryption or decryption Mode.
85 | * This parameter can be one of the following values:
86 | * @arg MODE_ENCRYPT: Encryption
87 | * @arg MODE_DECRYPT: Decryption
88 | * @param Key: Key used for TDES algorithm.
89 | * @param Ilength: length of the Input buffer, must be a multiple of 8.
90 | * @param Input: pointer to the Input buffer.
91 | * @param Output: pointer to the returned buffer.
92 | * @retval An ErrorStatus enumeration value:
93 | * - SUCCESS: Operation done
94 | * - ERROR: Operation failed
95 | */
96 | ErrorStatus CRYP_TDES_ECB(uint8_t Mode, uint8_t Key[24], uint8_t *Input,
97 | uint32_t Ilength, uint8_t *Output)
98 | {
99 | CRYP_InitTypeDef TDES_CRYP_InitStructure;
100 | CRYP_KeyInitTypeDef TDES_CRYP_KeyInitStructure;
101 | __IO uint32_t counter = 0;
102 | uint32_t busystatus = 0;
103 | ErrorStatus status = SUCCESS;
104 | uint32_t keyaddr = (uint32_t)Key;
105 | uint32_t inputaddr = (uint32_t)Input;
106 | uint32_t outputaddr = (uint32_t)Output;
107 | uint32_t i = 0;
108 |
109 | /* Crypto structures initialisation*/
110 | CRYP_KeyStructInit(&TDES_CRYP_KeyInitStructure);
111 |
112 | /* Crypto Init for Encryption process */
113 | if(Mode == MODE_ENCRYPT) /* TDES encryption */
114 | {
115 | TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
116 | }
117 | else /*if(Mode == MODE_DECRYPT)*/ /* TDES decryption */
118 | {
119 | TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
120 | }
121 |
122 | TDES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_TDES_ECB;
123 | TDES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
124 | CRYP_Init(&TDES_CRYP_InitStructure);
125 |
126 | /* Key Initialisation */
127 | TDES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
128 | keyaddr+=4;
129 | TDES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
130 | keyaddr+=4;
131 | TDES_CRYP_KeyInitStructure.CRYP_Key2Left = __REV(*(uint32_t*)(keyaddr));
132 | keyaddr+=4;
133 | TDES_CRYP_KeyInitStructure.CRYP_Key2Right= __REV(*(uint32_t*)(keyaddr));
134 | keyaddr+=4;
135 | TDES_CRYP_KeyInitStructure.CRYP_Key3Left = __REV(*(uint32_t*)(keyaddr));
136 | keyaddr+=4;
137 | TDES_CRYP_KeyInitStructure.CRYP_Key3Right= __REV(*(uint32_t*)(keyaddr));
138 | CRYP_KeyInit(& TDES_CRYP_KeyInitStructure);
139 |
140 | /* Flush IN/OUT FIFO */
141 | CRYP_FIFOFlush();
142 |
143 | /* Enable Crypto processor */
144 | CRYP_Cmd(ENABLE);
145 |
146 | for(i=0; ((i© COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f4xx_dbgmcu.h"
24 |
25 | /** @addtogroup STM32F4xx_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup DBGMCU
30 | * @brief DBGMCU driver modules
31 | * @{
32 | */
33 |
34 | /* Private typedef -----------------------------------------------------------*/
35 | /* Private define ------------------------------------------------------------*/
36 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* Private variables ---------------------------------------------------------*/
40 | /* Private function prototypes -----------------------------------------------*/
41 | /* Private functions ---------------------------------------------------------*/
42 |
43 | /** @defgroup DBGMCU_Private_Functions
44 | * @{
45 | */
46 |
47 | /**
48 | * @brief Returns the device revision identifier.
49 | * @param None
50 | * @retval Device revision identifier
51 | */
52 | uint32_t DBGMCU_GetREVID(void)
53 | {
54 | return(DBGMCU->IDCODE >> 16);
55 | }
56 |
57 | /**
58 | * @brief Returns the device identifier.
59 | * @param None
60 | * @retval Device identifier
61 | */
62 | uint32_t DBGMCU_GetDEVID(void)
63 | {
64 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
65 | }
66 |
67 | /**
68 | * @brief Configures low power mode behavior when the MCU is in Debug mode.
69 | * @param DBGMCU_Periph: specifies the low power mode.
70 | * This parameter can be any combination of the following values:
71 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
72 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode
73 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
74 | * @param NewState: new state of the specified low power mode in Debug mode.
75 | * This parameter can be: ENABLE or DISABLE.
76 | * @retval None
77 | */
78 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
79 | {
80 | /* Check the parameters */
81 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
82 | assert_param(IS_FUNCTIONAL_STATE(NewState));
83 | if (NewState != DISABLE)
84 | {
85 | DBGMCU->CR |= DBGMCU_Periph;
86 | }
87 | else
88 | {
89 | DBGMCU->CR &= ~DBGMCU_Periph;
90 | }
91 | }
92 |
93 | /**
94 | * @brief Configures APB1 peripheral behavior when the MCU is in Debug mode.
95 | * @param DBGMCU_Periph: specifies the APB1 peripheral.
96 | * This parameter can be any combination of the following values:
97 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
98 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
99 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted
100 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted
101 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
102 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
103 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted
104 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted
105 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
106 | * @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped when Core is halted.
107 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
108 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
109 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted
110 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted
111 | * @arg DBGMCU_I2C3_SMBUS_TIMEOUT: I2C3 SMBUS timeout mode stopped when Core is halted
112 | * @arg DBGMCU_CAN2_STOP: Debug CAN1 stopped when Core is halted
113 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted
114 | * This parameter can be: ENABLE or DISABLE.
115 | * @retval None
116 | */
117 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
118 | {
119 | /* Check the parameters */
120 | assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph));
121 | assert_param(IS_FUNCTIONAL_STATE(NewState));
122 |
123 | if (NewState != DISABLE)
124 | {
125 | DBGMCU->APB1FZ |= DBGMCU_Periph;
126 | }
127 | else
128 | {
129 | DBGMCU->APB1FZ &= ~DBGMCU_Periph;
130 | }
131 | }
132 |
133 | /**
134 | * @brief Configures APB2 peripheral behavior when the MCU is in Debug mode.
135 | * @param DBGMCU_Periph: specifies the APB2 peripheral.
136 | * This parameter can be any combination of the following values:
137 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
138 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
139 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted
140 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted
141 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted
142 | * @param NewState: new state of the specified peripheral in Debug mode.
143 | * This parameter can be: ENABLE or DISABLE.
144 | * @retval None
145 | */
146 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
147 | {
148 | /* Check the parameters */
149 | assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph));
150 | assert_param(IS_FUNCTIONAL_STATE(NewState));
151 |
152 | if (NewState != DISABLE)
153 | {
154 | DBGMCU->APB2FZ |= DBGMCU_Periph;
155 | }
156 | else
157 | {
158 | DBGMCU->APB2FZ &= ~DBGMCU_Periph;
159 | }
160 | }
161 |
162 | /**
163 | * @}
164 | */
165 |
166 | /**
167 | * @}
168 | */
169 |
170 | /**
171 | * @}
172 | */
173 |
174 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
175 |
--------------------------------------------------------------------------------
/libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_exti.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_exti.c
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the EXTI peripheral:
9 | * - Initialization and Configuration
10 | * - Interrupts and flags management
11 | *
12 | * @verbatim
13 | *
14 | * ===================================================================
15 | * EXTI features
16 | * ===================================================================
17 | *
18 | * External interrupt/event lines are mapped as following:
19 | * 1- All available GPIO pins are connected to the 16 external
20 | * interrupt/event lines from EXTI0 to EXTI15.
21 | * 2- EXTI line 16 is connected to the PVD Output
22 | * 3- EXTI line 17 is connected to the RTC Alarm event
23 | * 4- EXTI line 18 is connected to the USB OTG FS Wakeup from suspend event
24 | * 5- EXTI line 19 is connected to the Ethernet Wakeup event
25 | * 6- EXTI line 20 is connected to the USB OTG HS (configured in FS) Wakeup event
26 | * 7- EXTI line 21 is connected to the RTC Tamper and Time Stamp events
27 | * 8- EXTI line 22 is connected to the RTC Wakeup event
28 | *
29 | * ===================================================================
30 | * How to use this driver
31 | * ===================================================================
32 | *
33 | * In order to use an I/O pin as an external interrupt source, follow
34 | * steps below:
35 | * 1- Configure the I/O in input mode using GPIO_Init()
36 | * 2- Select the input source pin for the EXTI line using SYSCFG_EXTILineConfig()
37 | * 3- Select the mode(interrupt, event) and configure the trigger
38 | * selection (Rising, falling or both) using EXTI_Init()
39 | * 4- Configure NVIC IRQ channel mapped to the EXTI line using NVIC_Init()
40 | *
41 | * @note SYSCFG APB clock must be enabled to get write access to SYSCFG_EXTICRx
42 | * registers using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
43 | *
44 | * @endverbatim
45 | *
46 | ******************************************************************************
47 | * @attention
48 | *
49 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
50 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
51 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
52 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
53 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
54 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
55 | *
56 | * © COPYRIGHT 2011 STMicroelectronics
57 | ******************************************************************************
58 | */
59 |
60 | /* Includes ------------------------------------------------------------------*/
61 | #include "stm32f4xx_exti.h"
62 |
63 | /** @addtogroup STM32F4xx_StdPeriph_Driver
64 | * @{
65 | */
66 |
67 | /** @defgroup EXTI
68 | * @brief EXTI driver modules
69 | * @{
70 | */
71 |
72 | /* Private typedef -----------------------------------------------------------*/
73 | /* Private define ------------------------------------------------------------*/
74 |
75 | #define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */
76 |
77 | /* Private macro -------------------------------------------------------------*/
78 | /* Private variables ---------------------------------------------------------*/
79 | /* Private function prototypes -----------------------------------------------*/
80 | /* Private functions ---------------------------------------------------------*/
81 |
82 | /** @defgroup EXTI_Private_Functions
83 | * @{
84 | */
85 |
86 | /** @defgroup EXTI_Group1 Initialization and Configuration functions
87 | * @brief Initialization and Configuration functions
88 | *
89 | @verbatim
90 | ===============================================================================
91 | Initialization and Configuration functions
92 | ===============================================================================
93 |
94 | @endverbatim
95 | * @{
96 | */
97 |
98 | /**
99 | * @brief Deinitializes the EXTI peripheral registers to their default reset values.
100 | * @param None
101 | * @retval None
102 | */
103 | void EXTI_DeInit(void)
104 | {
105 | EXTI->IMR = 0x00000000;
106 | EXTI->EMR = 0x00000000;
107 | EXTI->RTSR = 0x00000000;
108 | EXTI->FTSR = 0x00000000;
109 | EXTI->PR = 0x007FFFFF;
110 | }
111 |
112 | /**
113 | * @brief Initializes the EXTI peripheral according to the specified
114 | * parameters in the EXTI_InitStruct.
115 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
116 | * that contains the configuration information for the EXTI peripheral.
117 | * @retval None
118 | */
119 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
120 | {
121 | uint32_t tmp = 0;
122 |
123 | /* Check the parameters */
124 | assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
125 | assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
126 | assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));
127 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
128 |
129 | tmp = (uint32_t)EXTI_BASE;
130 |
131 | if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
132 | {
133 | /* Clear EXTI line configuration */
134 | EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
135 | EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
136 |
137 | tmp += EXTI_InitStruct->EXTI_Mode;
138 |
139 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
140 |
141 | /* Clear Rising Falling edge configuration */
142 | EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
143 | EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
144 |
145 | /* Select the trigger for the selected external interrupts */
146 | if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
147 | {
148 | /* Rising Falling edge */
149 | EXTI->RTSR |= EXTI_InitStruct->EXTI_Line;
150 | EXTI->FTSR |= EXTI_InitStruct->EXTI_Line;
151 | }
152 | else
153 | {
154 | tmp = (uint32_t)EXTI_BASE;
155 | tmp += EXTI_InitStruct->EXTI_Trigger;
156 |
157 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
158 | }
159 | }
160 | else
161 | {
162 | tmp += EXTI_InitStruct->EXTI_Mode;
163 |
164 | /* Disable the selected external lines */
165 | *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line;
166 | }
167 | }
168 |
169 | /**
170 | * @brief Fills each EXTI_InitStruct member with its reset value.
171 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will
172 | * be initialized.
173 | * @retval None
174 | */
175 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
176 | {
177 | EXTI_InitStruct->EXTI_Line = EXTI_LINENONE;
178 | EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
179 | EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
180 | EXTI_InitStruct->EXTI_LineCmd = DISABLE;
181 | }
182 |
183 | /**
184 | * @brief Generates a Software interrupt on selected EXTI line.
185 | * @param EXTI_Line: specifies the EXTI line on which the software interrupt
186 | * will be generated.
187 | * This parameter can be any combination of EXTI_Linex where x can be (0..22)
188 | * @retval None
189 | */
190 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
191 | {
192 | /* Check the parameters */
193 | assert_param(IS_EXTI_LINE(EXTI_Line));
194 |
195 | EXTI->SWIER |= EXTI_Line;
196 | }
197 |
198 | /**
199 | * @}
200 | */
201 |
202 | /** @defgroup EXTI_Group2 Interrupts and flags management functions
203 | * @brief Interrupts and flags management functions
204 | *
205 | @verbatim
206 | ===============================================================================
207 | Interrupts and flags management functions
208 | ===============================================================================
209 |
210 | @endverbatim
211 | * @{
212 | */
213 |
214 | /**
215 | * @brief Checks whether the specified EXTI line flag is set or not.
216 | * @param EXTI_Line: specifies the EXTI line flag to check.
217 | * This parameter can be EXTI_Linex where x can be(0..22)
218 | * @retval The new state of EXTI_Line (SET or RESET).
219 | */
220 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
221 | {
222 | FlagStatus bitstatus = RESET;
223 | /* Check the parameters */
224 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
225 |
226 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
227 | {
228 | bitstatus = SET;
229 | }
230 | else
231 | {
232 | bitstatus = RESET;
233 | }
234 | return bitstatus;
235 | }
236 |
237 | /**
238 | * @brief Clears the EXTI's line pending flags.
239 | * @param EXTI_Line: specifies the EXTI lines flags to clear.
240 | * This parameter can be any combination of EXTI_Linex where x can be (0..22)
241 | * @retval None
242 | */
243 | void EXTI_ClearFlag(uint32_t EXTI_Line)
244 | {
245 | /* Check the parameters */
246 | assert_param(IS_EXTI_LINE(EXTI_Line));
247 |
248 | EXTI->PR = EXTI_Line;
249 | }
250 |
251 | /**
252 | * @brief Checks whether the specified EXTI line is asserted or not.
253 | * @param EXTI_Line: specifies the EXTI line to check.
254 | * This parameter can be EXTI_Linex where x can be(0..22)
255 | * @retval The new state of EXTI_Line (SET or RESET).
256 | */
257 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
258 | {
259 | ITStatus bitstatus = RESET;
260 | uint32_t enablestatus = 0;
261 | /* Check the parameters */
262 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
263 |
264 | enablestatus = EXTI->IMR & EXTI_Line;
265 | if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
266 | {
267 | bitstatus = SET;
268 | }
269 | else
270 | {
271 | bitstatus = RESET;
272 | }
273 | return bitstatus;
274 | }
275 |
276 | /**
277 | * @brief Clears the EXTI's line pending bits.
278 | * @param EXTI_Line: specifies the EXTI lines to clear.
279 | * This parameter can be any combination of EXTI_Linex where x can be (0..22)
280 | * @retval None
281 | */
282 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
283 | {
284 | /* Check the parameters */
285 | assert_param(IS_EXTI_LINE(EXTI_Line));
286 |
287 | EXTI->PR = EXTI_Line;
288 | }
289 |
290 | /**
291 | * @}
292 | */
293 |
294 | /**
295 | * @}
296 | */
297 |
298 | /**
299 | * @}
300 | */
301 |
302 | /**
303 | * @}
304 | */
305 |
306 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
307 |
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/libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash.c:
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/libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_md5.c:
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1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hash_md5.c
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file provides high level functions to compute the HASH MD5 and
8 | * HMAC MD5 Digest of an input message.
9 | * It uses the stm32f4xx_hash.c/.h drivers to access the STM32F4xx HASH
10 | * peripheral.
11 | *
12 | * @verbatim
13 | *
14 | * ===================================================================
15 | * How to use this driver
16 | * ===================================================================
17 | * 1. Enable The HASH controller clock using
18 | * RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE); function.
19 | *
20 | * 2. Calculate the HASH MD5 Digest using HASH_MD5() function.
21 | *
22 | * 3. Calculate the HMAC MD5 Digest using HMAC_MD5() function.
23 | *
24 | * @endverbatim
25 | *
26 | ******************************************************************************
27 | * @attention
28 | *
29 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
30 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
31 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
32 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
33 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
34 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
35 | *
36 | * © COPYRIGHT 2011 STMicroelectronics
37 | ******************************************************************************
38 | */
39 |
40 | /* Includes ------------------------------------------------------------------*/
41 | #include "stm32f4xx_hash.h"
42 |
43 | /** @addtogroup STM32F4xx_StdPeriph_Driver
44 | * @{
45 | */
46 |
47 | /** @defgroup HASH
48 | * @brief HASH driver modules
49 | * @{
50 | */
51 |
52 | /* Private typedef -----------------------------------------------------------*/
53 | /* Private define ------------------------------------------------------------*/
54 | #define MD5BUSY_TIMEOUT ((uint32_t) 0x00010000)
55 |
56 | /* Private macro -------------------------------------------------------------*/
57 | /* Private variables ---------------------------------------------------------*/
58 | /* Private function prototypes -----------------------------------------------*/
59 | /* Private functions ---------------------------------------------------------*/
60 |
61 | /** @defgroup HASH_Private_Functions
62 | * @{
63 | */
64 |
65 | /** @defgroup HASH_Group7 High Level MD5 functions
66 | * @brief High Level MD5 Hash and HMAC functions
67 | *
68 | @verbatim
69 | ===============================================================================
70 | High Level MD5 Hash and HMAC functions
71 | ===============================================================================
72 |
73 |
74 | @endverbatim
75 | * @{
76 | */
77 |
78 | /**
79 | * @brief Compute the HASH MD5 digest.
80 | * @param Input: pointer to the Input buffer to be treated.
81 | * @param Ilen: length of the Input buffer.
82 | * @param Output: the returned digest
83 | * @retval An ErrorStatus enumeration value:
84 | * - SUCCESS: digest computation done
85 | * - ERROR: digest computation failed
86 | */
87 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16])
88 | {
89 | HASH_InitTypeDef MD5_HASH_InitStructure;
90 | HASH_MsgDigest MD5_MessageDigest;
91 | __IO uint16_t nbvalidbitsdata = 0;
92 | uint32_t i = 0;
93 | __IO uint32_t counter = 0;
94 | uint32_t busystatus = 0;
95 | ErrorStatus status = SUCCESS;
96 | uint32_t inputaddr = (uint32_t)Input;
97 | uint32_t outputaddr = (uint32_t)Output;
98 |
99 |
100 | /* Number of valid bits in last word of the Input data */
101 | nbvalidbitsdata = 8 * (Ilen % 4);
102 |
103 | /* HASH peripheral initialization */
104 | HASH_DeInit();
105 |
106 | /* HASH Configuration */
107 | MD5_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_MD5;
108 | MD5_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH;
109 | MD5_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
110 | HASH_Init(&MD5_HASH_InitStructure);
111 |
112 | /* Configure the number of valid bits in last word of the data */
113 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
114 |
115 | /* Write the Input block in the IN FIFO */
116 | for(i=0; i 64)
191 | {
192 | /* HMAC long Key */
193 | MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey;
194 | }
195 | else
196 | {
197 | /* HMAC short Key */
198 | MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
199 | }
200 | HASH_Init(&MD5_HASH_InitStructure);
201 |
202 | /* Configure the number of valid bits in last word of the Key */
203 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
204 |
205 | /* Write the Key */
206 | for(i=0; i© COPYRIGHT 2011 STMicroelectronics
37 | ******************************************************************************
38 | */
39 |
40 | /* Includes ------------------------------------------------------------------*/
41 | #include "stm32f4xx_hash.h"
42 |
43 | /** @addtogroup STM32F4xx_StdPeriph_Driver
44 | * @{
45 | */
46 |
47 | /** @defgroup HASH
48 | * @brief HASH driver modules
49 | * @{
50 | */
51 |
52 | /* Private typedef -----------------------------------------------------------*/
53 | /* Private define ------------------------------------------------------------*/
54 | #define SHA1BUSY_TIMEOUT ((uint32_t) 0x00010000)
55 |
56 | /* Private macro -------------------------------------------------------------*/
57 | /* Private variables ---------------------------------------------------------*/
58 | /* Private function prototypes -----------------------------------------------*/
59 | /* Private functions ---------------------------------------------------------*/
60 |
61 | /** @defgroup HASH_Private_Functions
62 | * @{
63 | */
64 |
65 | /** @defgroup HASH_Group6 High Level SHA1 functions
66 | * @brief High Level SHA1 Hash and HMAC functions
67 | *
68 | @verbatim
69 | ===============================================================================
70 | High Level SHA1 Hash and HMAC functions
71 | ===============================================================================
72 |
73 |
74 | @endverbatim
75 | * @{
76 | */
77 |
78 | /**
79 | * @brief Compute the HASH SHA1 digest.
80 | * @param Input: pointer to the Input buffer to be treated.
81 | * @param Ilen: length of the Input buffer.
82 | * @param Output: the returned digest
83 | * @retval An ErrorStatus enumeration value:
84 | * - SUCCESS: digest computation done
85 | * - ERROR: digest computation failed
86 | */
87 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20])
88 | {
89 | HASH_InitTypeDef SHA1_HASH_InitStructure;
90 | HASH_MsgDigest SHA1_MessageDigest;
91 | __IO uint16_t nbvalidbitsdata = 0;
92 | uint32_t i = 0;
93 | __IO uint32_t counter = 0;
94 | uint32_t busystatus = 0;
95 | ErrorStatus status = SUCCESS;
96 | uint32_t inputaddr = (uint32_t)Input;
97 | uint32_t outputaddr = (uint32_t)Output;
98 |
99 | /* Number of valid bits in last word of the Input data */
100 | nbvalidbitsdata = 8 * (Ilen % 4);
101 |
102 | /* HASH peripheral initialization */
103 | HASH_DeInit();
104 |
105 | /* HASH Configuration */
106 | SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
107 | SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH;
108 | SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
109 | HASH_Init(&SHA1_HASH_InitStructure);
110 |
111 | /* Configure the number of valid bits in last word of the data */
112 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
113 |
114 | /* Write the Input block in the IN FIFO */
115 | for(i=0; i 64)
192 | {
193 | /* HMAC long Key */
194 | SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey;
195 | }
196 | else
197 | {
198 | /* HMAC short Key */
199 | SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
200 | }
201 | HASH_Init(&SHA1_HASH_InitStructure);
202 |
203 | /* Configure the number of valid bits in last word of the Key */
204 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
205 |
206 | /* Write the Key */
207 | for(i=0; i© COPYRIGHT 2011 STMicroelectronics
78 | ******************************************************************************
79 | */
80 |
81 | /* Includes ------------------------------------------------------------------*/
82 | #include "stm32f4xx_iwdg.h"
83 |
84 | /** @addtogroup STM32F4xx_StdPeriph_Driver
85 | * @{
86 | */
87 |
88 | /** @defgroup IWDG
89 | * @brief IWDG driver modules
90 | * @{
91 | */
92 |
93 | /* Private typedef -----------------------------------------------------------*/
94 | /* Private define ------------------------------------------------------------*/
95 |
96 | /* KR register bit mask */
97 | #define KR_KEY_RELOAD ((uint16_t)0xAAAA)
98 | #define KR_KEY_ENABLE ((uint16_t)0xCCCC)
99 |
100 | /* Private macro -------------------------------------------------------------*/
101 | /* Private variables ---------------------------------------------------------*/
102 | /* Private function prototypes -----------------------------------------------*/
103 | /* Private functions ---------------------------------------------------------*/
104 |
105 | /** @defgroup IWDG_Private_Functions
106 | * @{
107 | */
108 |
109 | /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
110 | * @brief Prescaler and Counter configuration functions
111 | *
112 | @verbatim
113 | ===============================================================================
114 | Prescaler and Counter configuration functions
115 | ===============================================================================
116 |
117 | @endverbatim
118 | * @{
119 | */
120 |
121 | /**
122 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
123 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
124 | * This parameter can be one of the following values:
125 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
126 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
127 | * @retval None
128 | */
129 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
130 | {
131 | /* Check the parameters */
132 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
133 | IWDG->KR = IWDG_WriteAccess;
134 | }
135 |
136 | /**
137 | * @brief Sets IWDG Prescaler value.
138 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
139 | * This parameter can be one of the following values:
140 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
141 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
142 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
143 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
144 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
145 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
146 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
147 | * @retval None
148 | */
149 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
150 | {
151 | /* Check the parameters */
152 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
153 | IWDG->PR = IWDG_Prescaler;
154 | }
155 |
156 | /**
157 | * @brief Sets IWDG Reload value.
158 | * @param Reload: specifies the IWDG Reload value.
159 | * This parameter must be a number between 0 and 0x0FFF.
160 | * @retval None
161 | */
162 | void IWDG_SetReload(uint16_t Reload)
163 | {
164 | /* Check the parameters */
165 | assert_param(IS_IWDG_RELOAD(Reload));
166 | IWDG->RLR = Reload;
167 | }
168 |
169 | /**
170 | * @brief Reloads IWDG counter with value defined in the reload register
171 | * (write access to IWDG_PR and IWDG_RLR registers disabled).
172 | * @param None
173 | * @retval None
174 | */
175 | void IWDG_ReloadCounter(void)
176 | {
177 | IWDG->KR = KR_KEY_RELOAD;
178 | }
179 |
180 | /**
181 | * @}
182 | */
183 |
184 | /** @defgroup IWDG_Group2 IWDG activation function
185 | * @brief IWDG activation function
186 | *
187 | @verbatim
188 | ===============================================================================
189 | IWDG activation function
190 | ===============================================================================
191 |
192 | @endverbatim
193 | * @{
194 | */
195 |
196 | /**
197 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
198 | * @param None
199 | * @retval None
200 | */
201 | void IWDG_Enable(void)
202 | {
203 | IWDG->KR = KR_KEY_ENABLE;
204 | }
205 |
206 | /**
207 | * @}
208 | */
209 |
210 | /** @defgroup IWDG_Group3 Flag management function
211 | * @brief Flag management function
212 | *
213 | @verbatim
214 | ===============================================================================
215 | Flag management function
216 | ===============================================================================
217 |
218 | @endverbatim
219 | * @{
220 | */
221 |
222 | /**
223 | * @brief Checks whether the specified IWDG flag is set or not.
224 | * @param IWDG_FLAG: specifies the flag to check.
225 | * This parameter can be one of the following values:
226 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
227 | * @arg IWDG_FLAG_RVU: Reload Value Update on going
228 | * @retval The new state of IWDG_FLAG (SET or RESET).
229 | */
230 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
231 | {
232 | FlagStatus bitstatus = RESET;
233 | /* Check the parameters */
234 | assert_param(IS_IWDG_FLAG(IWDG_FLAG));
235 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
236 | {
237 | bitstatus = SET;
238 | }
239 | else
240 | {
241 | bitstatus = RESET;
242 | }
243 | /* Return the flag status */
244 | return bitstatus;
245 | }
246 |
247 | /**
248 | * @}
249 | */
250 |
251 | /**
252 | * @}
253 | */
254 |
255 | /**
256 | * @}
257 | */
258 |
259 | /**
260 | * @}
261 | */
262 |
263 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
264 |
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/libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rcc.c:
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/libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_syscfg.c:
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1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_syscfg.c
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file provides firmware functions to manage the SYSCFG peripheral.
8 | *
9 | * @verbatim
10 | *
11 | * ===================================================================
12 | * How to use this driver
13 | * ===================================================================
14 | *
15 | * This driver provides functions for:
16 | *
17 | * 1. Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig()
18 | *
19 | * 2. Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig()
20 | *
21 | * 3. Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig()
22 | *
23 | * @note SYSCFG APB clock must be enabled to get write access to SYSCFG registers,
24 | * using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
25 | *
26 | * @endverbatim
27 | *
28 | ******************************************************************************
29 | * @attention
30 | *
31 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
32 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
33 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
34 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
35 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
36 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
37 | *
38 | * © COPYRIGHT 2011 STMicroelectronics
39 | ******************************************************************************
40 | */
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | #include "stm32f4xx_syscfg.h"
44 | #include "stm32f4xx_rcc.h"
45 |
46 | /** @addtogroup STM32F4xx_StdPeriph_Driver
47 | * @{
48 | */
49 |
50 | /** @defgroup SYSCFG
51 | * @brief SYSCFG driver modules
52 | * @{
53 | */
54 |
55 | /* Private typedef -----------------------------------------------------------*/
56 | /* Private define ------------------------------------------------------------*/
57 | /* ------------ RCC registers bit address in the alias region ----------- */
58 | #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
59 | /* --- PMC Register ---*/
60 | /* Alias word address of MII_RMII_SEL bit */
61 | #define PMC_OFFSET (SYSCFG_OFFSET + 0x04)
62 | #define MII_RMII_SEL_BitNumber ((uint8_t)0x17)
63 | #define PMC_MII_RMII_SEL_BB (PERIPH_BB_BASE + (PMC_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
64 |
65 | /* --- CMPCR Register ---*/
66 | /* Alias word address of CMP_PD bit */
67 | #define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20)
68 | #define CMP_PD_BitNumber ((uint8_t)0x00)
69 | #define CMPCR_CMP_PD_BB (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BitNumber * 4))
70 |
71 | /* Private macro -------------------------------------------------------------*/
72 | /* Private variables ---------------------------------------------------------*/
73 | /* Private function prototypes -----------------------------------------------*/
74 | /* Private functions ---------------------------------------------------------*/
75 |
76 | /** @defgroup SYSCFG_Private_Functions
77 | * @{
78 | */
79 |
80 | /**
81 | * @brief Deinitializes the Alternate Functions (remap and EXTI configuration)
82 | * registers to their default reset values.
83 | * @param None
84 | * @retval None
85 | */
86 | void SYSCFG_DeInit(void)
87 | {
88 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
89 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
90 | }
91 |
92 | /**
93 | * @brief Changes the mapping of the specified pin.
94 | * @param SYSCFG_Memory: selects the memory remapping.
95 | * This parameter can be one of the following values:
96 | * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
97 | * @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
98 | * @arg SYSCFG_MemoryRemap_FSMC: FSMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
99 | * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM (112kB) mapped at 0x00000000
100 | * @retval None
101 | */
102 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
103 | {
104 | /* Check the parameters */
105 | assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
106 |
107 | SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
108 | }
109 |
110 | /**
111 | * @brief Selects the GPIO pin used as EXTI Line.
112 | * @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
113 | * EXTI lines where x can be (A..I).
114 | * @param EXTI_PinSourcex: specifies the EXTI line to be configured.
115 | * This parameter can be EXTI_PinSourcex where x can be (0..15, except
116 | * for EXTI_PortSourceGPIOI x can be (0..11).
117 | * @retval None
118 | */
119 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
120 | {
121 | uint32_t tmp = 0x00;
122 |
123 | /* Check the parameters */
124 | assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
125 | assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
126 |
127 | tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
128 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
129 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
130 | }
131 |
132 | /**
133 | * @brief Selects the ETHERNET media interface
134 | * @param SYSCFG_ETH_MediaInterface: specifies the Media Interface mode.
135 | * This parameter can be one of the following values:
136 | * @arg SYSCFG_ETH_MediaInterface_MII: MII mode selected
137 | * @arg SYSCFG_ETH_MediaInterface_RMII: RMII mode selected
138 | * @retval None
139 | */
140 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface)
141 | {
142 | assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE(SYSCFG_ETH_MediaInterface));
143 | /* Configure MII_RMII selection bit */
144 | *(__IO uint32_t *) PMC_MII_RMII_SEL_BB = SYSCFG_ETH_MediaInterface;
145 | }
146 |
147 | /**
148 | * @brief Enables or disables the I/O Compensation Cell.
149 | * @note The I/O compensation cell can be used only when the device supply
150 | * voltage ranges from 2.4 to 3.6 V.
151 | * @param NewState: new state of the I/O Compensation Cell.
152 | * This parameter can be one of the following values:
153 | * @arg ENABLE: I/O compensation cell enabled
154 | * @arg DISABLE: I/O compensation cell power-down mode
155 | * @retval None
156 | */
157 | void SYSCFG_CompensationCellCmd(FunctionalState NewState)
158 | {
159 | /* Check the parameters */
160 | assert_param(IS_FUNCTIONAL_STATE(NewState));
161 |
162 | *(__IO uint32_t *) CMPCR_CMP_PD_BB = (uint32_t)NewState;
163 | }
164 |
165 | /**
166 | * @brief Checks whether the I/O Compensation Cell ready flag is set or not.
167 | * @param None
168 | * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET)
169 | */
170 | FlagStatus SYSCFG_GetCompensationCellStatus(void)
171 | {
172 | FlagStatus bitstatus = RESET;
173 |
174 | if ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET)
175 | {
176 | bitstatus = SET;
177 | }
178 | else
179 | {
180 | bitstatus = RESET;
181 | }
182 | return bitstatus;
183 | }
184 |
185 | /**
186 | * @}
187 | */
188 |
189 | /**
190 | * @}
191 | */
192 |
193 | /**
194 | * @}
195 | */
196 |
197 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
198 |
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/libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_wwdg.c:
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1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_wwdg.c
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the Window watchdog (WWDG) peripheral:
9 | * - Prescaler, Refresh window and Counter configuration
10 | * - WWDG activation
11 | * - Interrupts and flags management
12 | *
13 | * @verbatim
14 | *
15 | * ===================================================================
16 | * WWDG features
17 | * ===================================================================
18 | *
19 | * Once enabled the WWDG generates a system reset on expiry of a programmed
20 | * time period, unless the program refreshes the counter (downcounter)
21 | * before to reach 0x3F value (i.e. a reset is generated when the counter
22 | * value rolls over from 0x40 to 0x3F).
23 | * An MCU reset is also generated if the counter value is refreshed
24 | * before the counter has reached the refresh window value. This
25 | * implies that the counter must be refreshed in a limited window.
26 | *
27 | * Once enabled the WWDG cannot be disabled except by a system reset.
28 | *
29 | * WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
30 | * reset occurs.
31 | *
32 | * The WWDG counter input clock is derived from the APB clock divided
33 | * by a programmable prescaler.
34 | *
35 | * WWDG counter clock = PCLK1 / Prescaler
36 | * WWDG timeout = (WWDG counter clock) * (counter value)
37 | *
38 | * Min-max timeout value @42 MHz(PCLK1): ~97.5 us / ~49.9 ms
39 | *
40 | * ===================================================================
41 | * How to use this driver
42 | * ===================================================================
43 | * 1. Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
44 | *
45 | * 2. Configure the WWDG prescaler using WWDG_SetPrescaler() function
46 | *
47 | * 3. Configure the WWDG refresh window using WWDG_SetWindowValue() function
48 | *
49 | * 4. Set the WWDG counter value and start it using WWDG_Enable() function.
50 | * When the WWDG is enabled the counter value should be configured to
51 | * a value greater than 0x40 to prevent generating an immediate reset.
52 | *
53 | * 5. Optionally you can enable the Early wakeup interrupt which is
54 | * generated when the counter reach 0x40.
55 | * Once enabled this interrupt cannot be disabled except by a system reset.
56 | *
57 | * 6. Then the application program must refresh the WWDG counter at regular
58 | * intervals during normal operation to prevent an MCU reset, using
59 | * WWDG_SetCounter() function. This operation must occur only when
60 | * the counter value is lower than the refresh window value,
61 | * programmed using WWDG_SetWindowValue().
62 | *
63 | * @endverbatim
64 | *
65 | ******************************************************************************
66 | * @attention
67 | *
68 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
69 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
70 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
71 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
72 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
73 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
74 | *
75 | * © COPYRIGHT 2011 STMicroelectronics
76 | ******************************************************************************
77 | */
78 |
79 | /* Includes ------------------------------------------------------------------*/
80 | #include "stm32f4xx_wwdg.h"
81 | #include "stm32f4xx_rcc.h"
82 |
83 | /** @addtogroup STM32F4xx_StdPeriph_Driver
84 | * @{
85 | */
86 |
87 | /** @defgroup WWDG
88 | * @brief WWDG driver modules
89 | * @{
90 | */
91 |
92 | /* Private typedef -----------------------------------------------------------*/
93 | /* Private define ------------------------------------------------------------*/
94 |
95 | /* ----------- WWDG registers bit address in the alias region ----------- */
96 | #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
97 | /* Alias word address of EWI bit */
98 | #define CFR_OFFSET (WWDG_OFFSET + 0x04)
99 | #define EWI_BitNumber 0x09
100 | #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
101 |
102 | /* --------------------- WWDG registers bit mask ------------------------ */
103 | /* CFR register bit mask */
104 | #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F)
105 | #define CFR_W_MASK ((uint32_t)0xFFFFFF80)
106 | #define BIT_MASK ((uint8_t)0x7F)
107 |
108 | /* Private macro -------------------------------------------------------------*/
109 | /* Private variables ---------------------------------------------------------*/
110 | /* Private function prototypes -----------------------------------------------*/
111 | /* Private functions ---------------------------------------------------------*/
112 |
113 | /** @defgroup WWDG_Private_Functions
114 | * @{
115 | */
116 |
117 | /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
118 | * @brief Prescaler, Refresh window and Counter configuration functions
119 | *
120 | @verbatim
121 | ===============================================================================
122 | Prescaler, Refresh window and Counter configuration functions
123 | ===============================================================================
124 |
125 | @endverbatim
126 | * @{
127 | */
128 |
129 | /**
130 | * @brief Deinitializes the WWDG peripheral registers to their default reset values.
131 | * @param None
132 | * @retval None
133 | */
134 | void WWDG_DeInit(void)
135 | {
136 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
137 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
138 | }
139 |
140 | /**
141 | * @brief Sets the WWDG Prescaler.
142 | * @param WWDG_Prescaler: specifies the WWDG Prescaler.
143 | * This parameter can be one of the following values:
144 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
145 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
146 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
147 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
148 | * @retval None
149 | */
150 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
151 | {
152 | uint32_t tmpreg = 0;
153 | /* Check the parameters */
154 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
155 | /* Clear WDGTB[1:0] bits */
156 | tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
157 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
158 | tmpreg |= WWDG_Prescaler;
159 | /* Store the new value */
160 | WWDG->CFR = tmpreg;
161 | }
162 |
163 | /**
164 | * @brief Sets the WWDG window value.
165 | * @param WindowValue: specifies the window value to be compared to the downcounter.
166 | * This parameter value must be lower than 0x80.
167 | * @retval None
168 | */
169 | void WWDG_SetWindowValue(uint8_t WindowValue)
170 | {
171 | __IO uint32_t tmpreg = 0;
172 |
173 | /* Check the parameters */
174 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
175 | /* Clear W[6:0] bits */
176 |
177 | tmpreg = WWDG->CFR & CFR_W_MASK;
178 |
179 | /* Set W[6:0] bits according to WindowValue value */
180 | tmpreg |= WindowValue & (uint32_t) BIT_MASK;
181 |
182 | /* Store the new value */
183 | WWDG->CFR = tmpreg;
184 | }
185 |
186 | /**
187 | * @brief Enables the WWDG Early Wakeup interrupt(EWI).
188 | * @note Once enabled this interrupt cannot be disabled except by a system reset.
189 | * @param None
190 | * @retval None
191 | */
192 | void WWDG_EnableIT(void)
193 | {
194 | *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
195 | }
196 |
197 | /**
198 | * @brief Sets the WWDG counter value.
199 | * @param Counter: specifies the watchdog counter value.
200 | * This parameter must be a number between 0x40 and 0x7F (to prevent generating
201 | * an immediate reset)
202 | * @retval None
203 | */
204 | void WWDG_SetCounter(uint8_t Counter)
205 | {
206 | /* Check the parameters */
207 | assert_param(IS_WWDG_COUNTER(Counter));
208 | /* Write to T[6:0] bits to configure the counter value, no need to do
209 | a read-modify-write; writing a 0 to WDGA bit does nothing */
210 | WWDG->CR = Counter & BIT_MASK;
211 | }
212 | /**
213 | * @}
214 | */
215 |
216 | /** @defgroup WWDG_Group2 WWDG activation functions
217 | * @brief WWDG activation functions
218 | *
219 | @verbatim
220 | ===============================================================================
221 | WWDG activation function
222 | ===============================================================================
223 |
224 | @endverbatim
225 | * @{
226 | */
227 |
228 | /**
229 | * @brief Enables WWDG and load the counter value.
230 | * @param Counter: specifies the watchdog counter value.
231 | * This parameter must be a number between 0x40 and 0x7F (to prevent generating
232 | * an immediate reset)
233 | * @retval None
234 | */
235 | void WWDG_Enable(uint8_t Counter)
236 | {
237 | /* Check the parameters */
238 | assert_param(IS_WWDG_COUNTER(Counter));
239 | WWDG->CR = WWDG_CR_WDGA | Counter;
240 | }
241 | /**
242 | * @}
243 | */
244 |
245 | /** @defgroup WWDG_Group3 Interrupts and flags management functions
246 | * @brief Interrupts and flags management functions
247 | *
248 | @verbatim
249 | ===============================================================================
250 | Interrupts and flags management functions
251 | ===============================================================================
252 |
253 | @endverbatim
254 | * @{
255 | */
256 |
257 | /**
258 | * @brief Checks whether the Early Wakeup interrupt flag is set or not.
259 | * @param None
260 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
261 | */
262 | FlagStatus WWDG_GetFlagStatus(void)
263 | {
264 | FlagStatus bitstatus = RESET;
265 |
266 | if ((WWDG->SR) != (uint32_t)RESET)
267 | {
268 | bitstatus = SET;
269 | }
270 | else
271 | {
272 | bitstatus = RESET;
273 | }
274 | return bitstatus;
275 | }
276 |
277 | /**
278 | * @brief Clears Early Wakeup interrupt flag.
279 | * @param None
280 | * @retval None
281 | */
282 | void WWDG_ClearFlag(void)
283 | {
284 | WWDG->SR = (uint32_t)RESET;
285 | }
286 |
287 | /**
288 | * @}
289 | */
290 |
291 | /**
292 | * @}
293 | */
294 |
295 | /**
296 | * @}
297 | */
298 |
299 | /**
300 | * @}
301 | */
302 |
303 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
304 |
--------------------------------------------------------------------------------
/program.cfg:
--------------------------------------------------------------------------------
1 | source [find board/stm32f4discovery.cfg]
2 |
3 |
4 | # default ports
5 | telnet_port 4444
6 | gdb_port 3333
7 | tcl_port 6666
8 |
9 | init
10 | #jtag_khz 1125
11 | #reset init
12 |
13 | halt
14 | poll
15 | #stm32f2x mass_erase 0
16 | flash probe 0
17 | flash write_image erase build/main.elf 0x0000000 elf
18 | reset run
19 | shutdown
20 |
--------------------------------------------------------------------------------
/src/main.c:
--------------------------------------------------------------------------------
1 | #include
2 |
3 |
4 | int main (void)
5 | {
6 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN;
7 |
8 | GPIOD->MODER = (1 << 26);
9 |
10 | while (1)
11 | {
12 | GPIOD->ODR ^= (1 << 13);
13 | }
14 | }
15 |
--------------------------------------------------------------------------------
/src/stm32f4xx_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_conf.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 19-September-2011
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F4xx_CONF_H
24 | #define __STM32F4xx_CONF_H
25 |
26 | #if defined (HSE_VALUE)
27 | /* Redefine the HSE value; it's equal to 8 MHz on the STM32F4-DISCOVERY Kit */
28 | #undef HSE_VALUE
29 | #define HSE_VALUE ((uint32_t)8000000)
30 | #endif /* HSE_VALUE */
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | /* Uncomment the line below to enable peripheral header file inclusion */
34 | #include "stm32f4xx_adc.h"
35 | #include "stm32f4xx_can.h"
36 | #include "stm32f4xx_crc.h"
37 | #include "stm32f4xx_cryp.h"
38 | #include "stm32f4xx_dac.h"
39 | #include "stm32f4xx_dbgmcu.h"
40 | #include "stm32f4xx_dcmi.h"
41 | #include "stm32f4xx_dma.h"
42 | #include "stm32f4xx_exti.h"
43 | #include "stm32f4xx_flash.h"
44 | #include "stm32f4xx_fsmc.h"
45 | #include "stm32f4xx_hash.h"
46 | #include "stm32f4xx_gpio.h"
47 | #include "stm32f4xx_i2c.h"
48 | #include "stm32f4xx_iwdg.h"
49 | #include "stm32f4xx_pwr.h"
50 | #include "stm32f4xx_rcc.h"
51 | #include "stm32f4xx_rng.h"
52 | #include "stm32f4xx_rtc.h"
53 | #include "stm32f4xx_sdio.h"
54 | #include "stm32f4xx_spi.h"
55 | #include "stm32f4xx_syscfg.h"
56 | #include "stm32f4xx_tim.h"
57 | #include "stm32f4xx_usart.h"
58 | #include "stm32f4xx_wwdg.h"
59 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
60 |
61 | /* Exported types ------------------------------------------------------------*/
62 | /* Exported constants --------------------------------------------------------*/
63 |
64 | /* If an external clock source is used, then the value of the following define
65 | should be set to the value of the external clock source, else, if no external
66 | clock is used, keep this define commented */
67 | /*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */
68 |
69 |
70 | /* Uncomment the line below to expanse the "assert_param" macro in the
71 | Standard Peripheral Library drivers code */
72 | /* #define USE_FULL_ASSERT 1 */
73 |
74 | /* Exported macro ------------------------------------------------------------*/
75 | #ifdef USE_FULL_ASSERT
76 |
77 | /**
78 | * @brief The assert_param macro is used for function's parameters check.
79 | * @param expr: If expr is false, it calls assert_failed function
80 | * which reports the name of the source file and the source
81 | * line number of the call that failed.
82 | * If expr is true, it returns no value.
83 | * @retval None
84 | */
85 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
86 | /* Exported functions ------------------------------------------------------- */
87 | void assert_failed(uint8_t* file, uint32_t line);
88 | #else
89 | #define assert_param(expr) ((void)0)
90 | #endif /* USE_FULL_ASSERT */
91 |
92 | #endif /* __STM32F4xx_CONF_H */
93 |
94 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
--------------------------------------------------------------------------------
/stm32f4_flash.ld:
--------------------------------------------------------------------------------
1 | ENTRY(Reset_Handler)
2 |
3 | /* Stack is placed in the 64KB CCM memory */
4 | /* NB. CCM memory cannot be accessed by peripherals or DMA! */
5 | /* Always use static/global variables with peripherals/DMA. */
6 | _estack = 0x10000000 + 64K;
7 |
8 | MEMORY
9 | {
10 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
11 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
12 | }
13 |
14 | SECTIONS
15 | {
16 | /* Reset Vector */
17 | .isr_vector :
18 | {
19 | . = ALIGN(4);
20 | KEEP(*(.isr_vector))
21 | . = ALIGN(4);
22 | } >FLASH
23 |
24 | .text :
25 | {
26 | . = ALIGN(4);
27 | *(.text)
28 | *(.text*)
29 | *(.rodata)
30 | *(.rodata*)
31 | *(.glue_7) /* glue arm to thumb code */
32 | *(.glue_7t) /* glue thumb to arm code */
33 | *(.eh_frame)
34 |
35 | KEEP (*(.init))
36 | KEEP (*(.fini))
37 |
38 | . = ALIGN(4);
39 | _etext = .;
40 | _exit = .;
41 | } >FLASH
42 |
43 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
44 | .ARM : {
45 | __exidx_start = .;
46 | *(.ARM.exidx*)
47 | __exidx_end = .;
48 | } >FLASH
49 |
50 | .preinit_array :
51 | {
52 | PROVIDE_HIDDEN (__preinit_array_start = .);
53 | KEEP (*(.preinit_array*))
54 | PROVIDE_HIDDEN (__preinit_array_end = .);
55 | } >FLASH
56 |
57 | .init_array :
58 | {
59 | PROVIDE_HIDDEN (__init_array_start = .);
60 | KEEP (*(SORT(.init_array.*)))
61 | KEEP (*(.init_array*))
62 | PROVIDE_HIDDEN (__init_array_end = .);
63 | } >FLASH
64 |
65 | .fini_array :
66 | {
67 | PROVIDE_HIDDEN (__fini_array_start = .);
68 | KEEP (*(.fini_array*))
69 | KEEP (*(SORT(.fini_array.*)))
70 | PROVIDE_HIDDEN (__fini_array_end = .);
71 | } >FLASH
72 |
73 | _sidata = .;
74 |
75 | .data : AT ( _sidata )
76 | {
77 | . = ALIGN(4);
78 | _sdata = .;
79 | *(.data)
80 | *(.data*)
81 | . = ALIGN(4);
82 | _edata = .;
83 | } >RAM
84 |
85 | . = ALIGN(4);
86 | .bss :
87 | {
88 | _sbss = .;
89 | __bss_start__ = _sbss;
90 | *(.bss)
91 | *(.bss*)
92 | *(COMMON)
93 | . = ALIGN(4);
94 | _ebss = .;
95 | __bss_end__ = _ebss;
96 | } >RAM
97 |
98 | /* Remove information from the standard libraries */
99 | /DISCARD/ :
100 | {
101 | libc.a ( * )
102 | libm.a ( * )
103 | libgcc.a ( * )
104 | }
105 |
106 | .ARM.attributes 0 : { *(.ARM.attributes) }
107 | }
108 |
--------------------------------------------------------------------------------