├── .clang-format ├── .clang-format-ignore ├── .dockerignore ├── .github ├── CODEOWNERS └── workflows │ ├── ci.yml │ ├── gitlab-ci.yaml │ └── lint.yml ├── .gitignore ├── .gitlab-ci.yml ├── .gitmodules ├── Bender.lock ├── Bender.yml ├── LICENSE ├── Makefile ├── README.md ├── docs ├── Doxyfile ├── index.md ├── publications.md ├── rm │ ├── hw │ │ ├── custom_instructions.md │ │ ├── peripherals.md │ │ ├── reqrsp_interface.md │ │ ├── snitch.md │ │ └── snitch_cluster.md │ ├── snRuntime.md │ └── sw │ │ ├── bench │ │ ├── join.md │ │ ├── roi.md │ │ └── visualize.md │ │ ├── sim │ │ ├── Elf.md │ │ ├── Simulation.md │ │ ├── Simulator.md │ │ ├── data_utils.md │ │ ├── sim_utils.md │ │ └── verif_utils.md │ │ ├── snitch_target_utils │ │ ├── build.md │ │ └── run.md │ │ └── trace │ │ ├── annotate.md │ │ ├── events.md │ │ └── gen_trace.md └── ug │ ├── code_optimization.md │ ├── directory_structure.md │ ├── documentation.md │ ├── getting_started.md │ ├── trace_analysis.md │ └── tutorial.md ├── hw ├── LICENSE ├── README.md ├── mem_interface │ ├── .gitignore │ ├── README.md │ ├── include │ │ └── mem_interface │ │ │ ├── assign.svh │ │ │ └── typedef.svh │ ├── src │ │ ├── mem_interface.sv │ │ ├── mem_test.sv │ │ └── mem_wide_narrow_mux.sv │ ├── test │ │ └── mem_wide_narrow_mux_tb.sv │ └── util │ │ ├── compile.sh │ │ └── run_vsim.sh ├── reqrsp_interface │ ├── .gitignore │ ├── README.md │ ├── include │ │ └── reqrsp_interface │ │ │ ├── assign.svh │ │ │ └── typedef.svh │ ├── src │ │ ├── axi_to_reqrsp.sv │ │ ├── reqrsp_cut.sv │ │ ├── reqrsp_demux.sv │ │ ├── reqrsp_intf.sv │ │ ├── reqrsp_iso.sv │ │ ├── reqrsp_mux.sv │ │ ├── reqrsp_pkg.sv │ │ ├── reqrsp_test.sv │ │ └── reqrsp_to_axi.sv │ ├── test │ │ ├── axi_to_reqrsp_tb.sv │ │ ├── reqrsp_demux_tb.sv │ │ ├── reqrsp_idempotent_tb.sv │ │ ├── reqrsp_mux_tb.sv │ │ └── reqrsp_to_axi_tb.sv │ └── util │ │ ├── compile.sh │ │ └── run_vsim.sh ├── snitch │ ├── include │ │ └── snitch_vm │ │ │ └── typedef.svh │ ├── src │ │ ├── riscv_instr.sv │ │ ├── snitch.sv │ │ ├── snitch_l0_tlb.sv │ │ ├── snitch_lsu.sv │ │ ├── snitch_pkg.sv │ │ ├── snitch_pma_pkg.sv │ │ ├── snitch_regfile_ff.sv │ │ ├── snitch_regfile_fpga.sv │ │ └── snitch_regfile_latch.sv │ └── test │ │ └── snitch_l0_tlb_tb.sv ├── snitch_cluster │ ├── .gitignore │ ├── src │ │ ├── snitch_amo_shim.sv │ │ ├── snitch_barrier.sv │ │ ├── snitch_cc.sv │ │ ├── snitch_clkdiv2.sv │ │ ├── snitch_cluster.sv │ │ ├── snitch_cluster_peripheral │ │ │ ├── snitch_cluster_peripheral.sv │ │ │ ├── snitch_cluster_peripheral_reg.hjson │ │ │ ├── snitch_cluster_peripheral_reg_pkg.sv │ │ │ └── snitch_cluster_peripheral_reg_top.sv │ │ ├── snitch_cluster_pkg.sv.tpl │ │ ├── snitch_cluster_wrapper.sv.tpl │ │ ├── snitch_fp_ss.sv │ │ ├── snitch_fpu.sv │ │ ├── snitch_hive.sv │ │ ├── snitch_sequencer.sv │ │ ├── snitch_shared_muldiv.sv │ │ ├── snitch_tcdm_interconnect.sv │ │ └── tcdm_shim.sv │ ├── test │ │ ├── bootdata.cc.tpl │ │ ├── link.ld.tpl │ │ └── snitch_tcdm_interconnect_tb.sv │ └── util │ │ ├── compile.sh │ │ └── run_vsim.sh ├── snitch_ipu │ └── src │ │ ├── snitch_int_ss.sv │ │ ├── snitch_ipu_alu.sv │ │ └── snitch_ipu_pkg.sv ├── snitch_ssr │ ├── .gitignore │ ├── include │ │ └── snitch_ssr │ │ │ └── typedef.svh │ ├── src │ │ ├── snitch_ssr.sv │ │ ├── snitch_ssr_addr_gen.sv │ │ ├── snitch_ssr_credit_counter.sv │ │ ├── snitch_ssr_indirector.sv │ │ ├── snitch_ssr_intersector.sv │ │ ├── snitch_ssr_pkg.sv │ │ ├── snitch_ssr_streamer.sv │ │ └── snitch_ssr_switch.sv │ ├── test │ │ ├── fixture_ssr.sv │ │ ├── fixture_ssr_streamer.sv │ │ ├── tb_simple_ssr.hex │ │ ├── tb_simple_ssr.sv │ │ ├── tb_simple_ssr_streamer.hex │ │ └── tb_simple_ssr_streamer.sv │ └── util │ │ ├── compile.sh │ │ └── run_vsim.sh ├── snitch_vm │ ├── doc │ │ └── index.md │ └── src │ │ └── snitch_ptw.sv └── tcdm_interface │ ├── .gitignore │ ├── README.md │ ├── include │ └── tcdm_interface │ │ ├── assign.svh │ │ └── typedef.svh │ ├── src │ ├── axi_to_tcdm.sv │ ├── reqrsp_to_tcdm.sv │ ├── tcdm_interface.sv │ ├── tcdm_mux.sv │ └── tcdm_test.sv │ ├── test │ ├── reqrsp_to_tcdm_tb.sv │ └── tcdm_mux_tb.sv │ └── util │ ├── compile.sh │ └── run_vsim.sh ├── iis-setup.sh ├── mkdocs.yml ├── nonfree └── util │ └── .gitignore ├── pyproject.toml ├── sw ├── .gitignore ├── Doxyfile ├── README.md ├── apps │ ├── atax │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── args.h │ │ │ ├── atax.h │ │ │ └── main.c │ ├── box3d1r │ │ ├── Makefile │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── box3d1r.h │ │ │ ├── box3d1r_baseline1.h │ │ │ ├── box3d1r_baseline2.h │ │ │ ├── box3d1r_baseline3.h │ │ │ ├── box3d1r_baseline4.h │ │ │ ├── box3d1r_naive.h │ │ │ ├── box3d1r_opt1.h │ │ │ ├── box3d1r_opt2.h │ │ │ └── main.c │ ├── common.mk │ ├── correlation │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── args.h │ │ │ ├── correlation.h │ │ │ └── main.c │ ├── covariance │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── args.h │ │ │ ├── covariance.h │ │ │ └── main.c │ ├── doitgen │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── args.h │ │ │ ├── doitgen.h │ │ │ └── main.c │ ├── exp │ │ ├── exp.c │ │ ├── main.c │ │ ├── vexpf.h │ │ ├── vexpf_baseline.h │ │ ├── vexpf_naive.h │ │ ├── vexpf_optimized.h │ │ └── vexpf_optimized_asm.h │ ├── j3d27pt │ │ ├── Makefile │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── j3d27pt.h │ │ │ ├── j3d27pt_baseline1.h │ │ │ ├── j3d27pt_baseline2.h │ │ │ ├── j3d27pt_baseline3.h │ │ │ ├── j3d27pt_baseline4.h │ │ │ ├── j3d27pt_naive.h │ │ │ ├── j3d27pt_opt1.h │ │ │ ├── j3d27pt_opt2.h │ │ │ └── main.c │ ├── kbpcpa │ │ ├── Makefile │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── kbpcpa.h │ │ │ └── main.c │ ├── kmeans │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── args.h │ │ │ ├── kmeans.h │ │ │ └── main.c │ ├── log │ │ ├── main.c │ │ ├── vlogf.h │ │ ├── vlogf_baseline.h │ │ ├── vlogf_glibc.h │ │ ├── vlogf_naive.h │ │ ├── vlogf_optimized.h │ │ └── vlogf_optimized_asm.h │ ├── mnist │ │ ├── nnlinear_baseline.c │ │ └── nnlinear_baseline.h │ ├── montecarlo │ │ └── pi_estimation │ │ │ ├── main.c │ │ │ └── pi_estimation.h │ └── prng │ │ ├── lcg.h │ │ ├── prng.h │ │ ├── splitmix64.h │ │ └── xoshiro128p.h ├── blas │ ├── __init__.py │ ├── axpy │ │ ├── data │ │ │ └── params.json │ │ ├── roi.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── args.h │ │ │ ├── axpy.h │ │ │ └── main.c │ ├── blas.h │ ├── dot │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── dot.h │ │ │ └── main.c │ ├── gemm │ │ ├── __init__.py │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── gemm.h │ │ │ ├── gemm_fp16.h │ │ │ ├── gemm_fp32.h │ │ │ ├── gemm_fp64.h │ │ │ ├── gemm_fp8.h │ │ │ └── main.c │ ├── gemv │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── gemv.h │ │ │ └── main.c │ └── syrk │ │ ├── data │ │ └── params.json │ │ ├── scripts │ │ ├── datagen.py │ │ └── verify.py │ │ └── src │ │ ├── args.h │ │ ├── main.c │ │ └── syrk.h ├── dnn │ ├── README.md │ ├── batchnorm │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ └── datagen.py │ │ └── src │ │ │ ├── batchnorm.h │ │ │ └── main.c │ ├── common.mk │ ├── concat │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── concat.h │ │ │ └── main.c │ ├── conv2d │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── conv2d.h │ │ │ └── main.c │ ├── flashattention_2 │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── flashattention_2.h │ │ │ ├── flashattention_2_fp16.h │ │ │ ├── flashattention_2_fp32.h │ │ │ ├── flashattention_2_fp8.h │ │ │ └── main.c │ ├── fused_concat_linear │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── fused_concat_linear.h │ │ │ └── main.c │ ├── fusedconv │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ └── main.c │ ├── gelu │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── gelu.h │ │ │ └── main.c │ ├── layernorm │ │ ├── data │ │ │ └── params.json │ │ ├── layout.csv │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── layernorm.h │ │ │ ├── layernorm_fp16.h │ │ │ ├── layernorm_fp32.h │ │ │ ├── layernorm_fp8.h │ │ │ └── main.c │ ├── maxpool │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ └── datagen.py │ │ └── src │ │ │ ├── main.c │ │ │ └── maxpool.h │ ├── softmax │ │ ├── data │ │ │ └── params.json │ │ ├── scripts │ │ │ ├── datagen.py │ │ │ └── verify.py │ │ └── src │ │ │ ├── main.c │ │ │ └── softmax.h │ ├── src │ │ └── dnn.h │ └── transpose │ │ ├── data │ │ └── params.json │ │ ├── scripts │ │ ├── datagen.py │ │ └── verify.py │ │ └── src │ │ ├── main.c │ │ └── transpose.h ├── saris │ ├── .gitignore │ ├── Makefile │ ├── README.md │ ├── eval.json │ ├── runtime │ │ ├── crt0.S │ │ ├── dma.h │ │ ├── link.ld │ │ ├── runtime.h │ │ ├── runtime.hpp │ │ └── sssr.h │ ├── stencils │ │ ├── istc.common.hpp │ │ ├── istc.issr.hpp │ │ └── istc.par.hpp │ └── util │ │ ├── eval.cpp.tpl │ │ └── evalgen.py ├── snRuntime │ ├── api │ │ ├── alloc_decls.h │ │ ├── cls_decls.h │ │ ├── cluster_interrupt_decls.h │ │ ├── global_interrupt_decls.h │ │ ├── memory_decls.h │ │ ├── omp │ │ │ └── eu_decls.h │ │ ├── riscv_decls.h │ │ ├── start_decls.h │ │ ├── sync_decls.h │ │ └── team_decls.h │ ├── base.ld │ └── src │ │ ├── alloc.c │ │ ├── alloc.h │ │ ├── alloc_v2.c │ │ ├── alloc_v2.h │ │ ├── cls.c │ │ ├── cls.h │ │ ├── cluster_interrupts.c │ │ ├── cluster_interrupts.h │ │ ├── copift.h │ │ ├── dm.c │ │ ├── dm.h │ │ ├── dma.c │ │ ├── dma.h │ │ ├── dump.h │ │ ├── global_interrupts.c │ │ ├── global_interrupts.h │ │ ├── omp │ │ ├── eu.c │ │ ├── eu.h │ │ ├── interface.h │ │ ├── kmp.c │ │ ├── kmp.h │ │ ├── omp.c │ │ └── omp.h │ │ ├── openocd.h │ │ ├── perf_cnt.c │ │ ├── perf_cnt.h │ │ ├── printf.c │ │ ├── printf.h │ │ ├── riscv.c │ │ ├── riscv.h │ │ ├── ssr.h │ │ ├── start.S │ │ ├── start.c │ │ ├── start.h │ │ ├── sync.c │ │ ├── sync.h │ │ ├── team.c │ │ ├── team.h │ │ └── types.h └── tests │ ├── alias.c │ ├── atomics.c │ ├── barrier.c │ ├── caq.c │ ├── caq_frep.c │ ├── data.h │ ├── data_mover.c │ ├── dma_empty_transfer.c │ ├── dma_mchan.c │ ├── dma_simple.c │ ├── event_unit.c │ ├── fcvt_d_w_copift.c │ ├── fcvt_d_wu_copift.c │ ├── fence_i.c │ ├── flt_d_copift.c │ ├── fp16_comparison_scalar.c │ ├── fp16_comparison_vector.c │ ├── fp16_computation_scalar.c │ ├── fp16_computation_vector.c │ ├── fp16alt_comparison_scalar.c │ ├── fp16alt_comparison_vector.c │ ├── fp16alt_computation_scalar.c │ ├── fp16alt_computation_vector.c │ ├── fp32_comparison_scalar.c │ ├── fp32_comparison_vector.c │ ├── fp32_computation_scalar.c │ ├── fp32_computation_vector.c │ ├── fp32_conversions_scalar.c │ ├── fp64_conversions_scalar.c │ ├── fp8_comparison_scalar.c │ ├── fp8_comparison_vector.c │ ├── fp8_computation_scalar.c │ ├── fp8_computation_vector.c │ ├── fp8alt_comparison_scalar.c │ ├── fp8alt_comparison_vector.c │ ├── fp8alt_computation_scalar.c │ ├── fp8alt_computation_vector.c │ ├── interrupt_local.c │ ├── issr.c │ ├── multi_cluster.c │ ├── non_null_exitcode.c │ ├── openmp_double_buffering.c │ ├── openmp_for_static_schedule.c │ ├── openmp_parallel.c │ ├── perf_cnt.c │ ├── printf_fmtint.c │ ├── printf_simple.c │ ├── simple.c │ ├── tls.c │ ├── varargs_1.c │ ├── varargs_2.c │ └── zero_mem.c ├── target ├── README.md ├── common │ ├── README.md │ ├── common.mk │ ├── gvsoc.mk │ ├── rtl.mk │ ├── test │ │ ├── common_lib.cc │ │ ├── ipc.cc │ │ ├── ipc.hh │ │ ├── rtl_lib.cc │ │ ├── sim.hh │ │ ├── tb_bin.cc │ │ ├── tb_bin.sv │ │ ├── tb_lib.hh │ │ ├── tb_memory_axi.sv │ │ ├── tb_memory_regbus.sv │ │ └── verilator_lib.cc │ ├── vcs.mk │ ├── verilator.mk │ └── vsim.mk └── snitch_cluster │ ├── .gitignore │ ├── Makefile │ ├── README.md │ ├── cfg │ ├── default.json │ ├── dma_mchan.json │ ├── frep_xl.json │ ├── github-ci.json │ └── omega.json │ ├── cores.vsim.tcl │ ├── experiments │ ├── chaining │ │ ├── .gitignore │ │ ├── README.md │ │ ├── experiments.py │ │ └── experiments.yaml │ └── copift │ │ ├── .gitignore │ │ ├── README.md │ │ ├── cfg.json │ │ ├── experiments.py │ │ ├── experiments.yaml │ │ └── matrix.py │ ├── patches │ └── context.h.diff │ ├── sw.mk │ ├── sw │ ├── .gitignore │ ├── apps │ │ ├── .gitignore │ │ ├── atax │ │ │ └── app.mk │ │ ├── blas │ │ │ ├── axpy │ │ │ │ └── app.mk │ │ │ ├── dot │ │ │ │ └── app.mk │ │ │ ├── gemm │ │ │ │ ├── app.mk │ │ │ │ └── test │ │ │ │ │ ├── .gitignore │ │ │ │ │ ├── cfg │ │ │ │ │ ├── fp16-naive.json │ │ │ │ │ ├── fp16-opt.json │ │ │ │ │ ├── fp32-naive.json │ │ │ │ │ ├── fp32-opt.json │ │ │ │ │ ├── fp64-base-tb.json │ │ │ │ │ ├── fp64-base-tiled.json │ │ │ │ │ ├── fp64-naive.json │ │ │ │ │ ├── fp64-opt-tb.json │ │ │ │ │ ├── fp64-opt-tiled.json │ │ │ │ │ ├── fp64-opt.json │ │ │ │ │ └── fp8-base.json │ │ │ │ │ └── test.sh │ │ │ ├── gemv │ │ │ │ └── app.mk │ │ │ └── syrk │ │ │ │ └── app.mk │ │ ├── box3d1r │ │ │ └── app.mk │ │ ├── common.mk │ │ ├── correlation │ │ │ └── app.mk │ │ ├── covariance │ │ │ └── app.mk │ │ ├── dnn │ │ │ ├── batchnorm │ │ │ │ └── app.mk │ │ │ ├── concat │ │ │ │ └── app.mk │ │ │ ├── conv2d │ │ │ │ └── app.mk │ │ │ ├── flashattention_2 │ │ │ │ ├── app.mk │ │ │ │ └── test │ │ │ │ │ ├── cfg │ │ │ │ │ ├── fp16-base.json │ │ │ │ │ ├── fp16-opt.json │ │ │ │ │ ├── fp32-base.json │ │ │ │ │ └── fp32-opt.json │ │ │ │ │ └── test.sh │ │ │ ├── fused_concat_linear │ │ │ │ └── app.mk │ │ │ ├── fusedconv │ │ │ │ └── app.mk │ │ │ ├── gelu │ │ │ │ └── app.mk │ │ │ ├── layernorm │ │ │ │ ├── app.mk │ │ │ │ └── test │ │ │ │ │ ├── cfg │ │ │ │ │ ├── fp32-naive.json │ │ │ │ │ └── fp32-opt.json │ │ │ │ │ └── run.py │ │ │ ├── maxpool │ │ │ │ └── app.mk │ │ │ ├── softmax │ │ │ │ └── app.mk │ │ │ └── transpose │ │ │ │ ├── app.mk │ │ │ │ └── test │ │ │ │ ├── cfg │ │ │ │ ├── fp16.json │ │ │ │ ├── fp32.json │ │ │ │ ├── fp64-base.json │ │ │ │ ├── fp64-opt.json │ │ │ │ └── fp8.json │ │ │ │ └── test.sh │ │ ├── doitgen │ │ │ └── app.mk │ │ ├── exp │ │ │ └── app.mk │ │ ├── j3d27pt │ │ │ └── app.mk │ │ ├── kbpcpa │ │ │ └── app.mk │ │ ├── kmeans │ │ │ └── app.mk │ │ ├── log │ │ │ └── app.mk │ │ ├── mnist │ │ │ ├── Makefile │ │ │ ├── nnlinear_baseline_params.hjson │ │ │ └── src │ │ │ │ └── net_nnlinear_baseline.c │ │ ├── montecarlo │ │ │ └── pi_estimation │ │ │ │ └── app.mk │ │ └── nop │ │ │ ├── app.mk │ │ │ └── src │ │ │ └── main.c │ ├── dma_mchan.yaml │ ├── frep_xl.yaml │ ├── riscv-tests │ │ └── riscv-tests.mk │ ├── riscv_tests_isa.yaml │ ├── run.yaml │ ├── runtime │ │ ├── common │ │ │ ├── .gitignore │ │ │ ├── snitch_cluster_addrmap.h.tpl │ │ │ ├── snitch_cluster_cfg.h.tpl │ │ │ ├── snitch_cluster_defs.h │ │ │ ├── snitch_cluster_global_interrupts.h │ │ │ ├── snitch_cluster_memory.c │ │ │ └── snitch_cluster_memory.h │ │ ├── memory.ld │ │ ├── rtl │ │ │ └── src │ │ │ │ ├── putchar.c │ │ │ │ ├── snitch_cluster_start.c │ │ │ │ ├── snitch_cluster_start.h │ │ │ │ ├── snrt.S │ │ │ │ ├── snrt.c │ │ │ │ └── snrt.h │ │ └── runtime.mk │ ├── tests │ │ └── tests.mk │ └── toolchain.mk │ ├── synopsys_sim.setup │ ├── test │ ├── .gitignore │ ├── bootrom.S │ ├── bootrom.ld │ ├── snitch_bootrom.sv │ ├── testharness.sv │ └── vip_snitch_cluster.sv │ ├── util │ ├── SimResults.py │ ├── build.py │ ├── common.py │ ├── experiment_utils.py │ └── run.py │ └── wave │ └── all_cores.tcl └── util ├── bench ├── __init__.py ├── join.py ├── roi.py ├── tests │ ├── __init__.py │ ├── test_data │ │ ├── data.json │ │ ├── roi.json │ │ └── spec.json │ └── test_roi.py └── visualize.py ├── clustergen.py ├── clustergen ├── __init__.py ├── cluster.py └── schema │ └── snitch_cluster.schema.json ├── container ├── Dockerfile └── README.md ├── gen_bootrom.py ├── generate-opcodes.sh ├── lint ├── .yamllint.yml └── waiver.verible ├── sim ├── Elf.py ├── Simulation.py ├── Simulator.py ├── SnitchSim.py ├── __init__.py ├── data_utils.py ├── gvsoc_control.py ├── list_apps.py ├── sim_utils.py └── verif_utils.py └── trace ├── a2l.py ├── annotate.py ├── events.py ├── gen_trace.py ├── opcodes-flt-occamy_CUSTOM.csv ├── stack.py └── tracevis.py /.clang-format: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | # The CI runs on `clang-format` version 10 6 | BasedOnStyle: Google 7 | IndentWidth: 4 8 | IncludeBlocks: Preserve 9 | -------------------------------------------------------------------------------- /.clang-format-ignore: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | ./sw/saris 6 | -------------------------------------------------------------------------------- /.dockerignore: -------------------------------------------------------------------------------- 1 | * 2 | !sw/**/*.py 3 | !util/**/*.py 4 | !nonfree/util/* 5 | !target/snitch_cluster/util/*.py 6 | !pyproject.toml 7 | -------------------------------------------------------------------------------- /.github/CODEOWNERS: -------------------------------------------------------------------------------- 1 | # These owners will be the default owners for everything in the repo. 2 | # Unless a later match takes precedence, global owners below will be 3 | # requested for review when someone opens a pull request. 4 | 5 | * @paulsc96 @colluca @fischeti 6 | 7 | sw @colluca @fischeti @viv-eth 8 | -------------------------------------------------------------------------------- /.github/workflows/gitlab-ci.yaml: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | # Some CI tests run on our GitLab servers due to licenses and tools 6 | name: gitlab-ci 7 | # Skip on pull requests as forks don't have required secrets, 8 | # and pull requests from own repo already trigger a push event. 9 | on: [push, workflow_dispatch] 10 | jobs: 11 | gitlab-ci: 12 | name: Internal Gitlab CI 13 | runs-on: ubuntu-22.04 14 | # Skip on forks due to missing secrets. 15 | if: > 16 | github.repository == 'pulp-platform/snitch_cluster' 17 | steps: 18 | - name: Check Gitlab CI 19 | uses: pulp-platform/pulp-actions/gitlab-ci@v2.1.0 20 | with: 21 | domain: iis-git.ee.ethz.ch 22 | repo: github-mirror/snitch_cluster 23 | token: ${{ secrets.GITLAB_TOKEN }} 24 | poll-period: 20 25 | poll-count: 1000 26 | retry-count: 100 27 | retry-period: 50 28 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Nonfree repository 2 | /nonfree/** 3 | !/nonfree/util 4 | !/nonfree/util/.gitignore 5 | 6 | # Dependency files 7 | /.bender/ 8 | 9 | # Modelsim Files 10 | *.wlf 11 | modelsim.ini 12 | *stacktrace* 13 | transcript 14 | 15 | # Miscellaneous 16 | .vscode/ 17 | __pycache__ 18 | gmon.out 19 | 20 | # Docs 21 | /site/ 22 | /docs/generated/ 23 | /docs/doxygen/ 24 | 25 | # Installation directories 26 | /.venv/ 27 | /tools/ 28 | /build/ 29 | /snitch.egg-info/ 30 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "sw/deps/riscv-opcodes"] 2 | path = sw/deps/riscv-opcodes 3 | url = git@github.com:pulp-platform/riscv-opcodes.git 4 | [submodule "sw/deps/printf"] 5 | path = sw/deps/printf 6 | url = https://github.com/mpaland/printf.git 7 | [submodule "sw/deps/riscv-tests"] 8 | path = sw/deps/riscv-tests 9 | url = git@github.com:riscv-software-src/riscv-tests.git 10 | -------------------------------------------------------------------------------- /docs/Doxyfile: -------------------------------------------------------------------------------- 1 | PROJECT_NAME = "Snitch Runtime" 2 | INPUT = docs/rm/snRuntime.md sw/snRuntime 3 | RECURSIVE = YES 4 | FILE_PATTERNS = *.h *.c 5 | OUTPUT_DIRECTORY = docs/doxygen/ 6 | USE_MDFILE_AS_MAINPAGE = docs/rm/snRuntime.md 7 | GENERATE_LATEX = NO 8 | ENABLE_PREPROCESSING = YES 9 | MACRO_EXPANSION = YES 10 | EXPAND_ONLY_PREDEF = YES 11 | PREDEFINED = __attribute__(x)= -------------------------------------------------------------------------------- /docs/publications.md: -------------------------------------------------------------------------------- 1 | # Publications 2 | 3 | {% 4 | include-markdown '../README.md' 5 | start="" 6 | end="" 7 | comments=false 8 | %} 9 | -------------------------------------------------------------------------------- /docs/rm/hw/peripherals.md: -------------------------------------------------------------------------------- 1 | # Snitch Cluster peripherals 2 | 3 | This section documents the registers exposed by the Snitch cluster to interface with various cluster-level peripherals, including the performance counters. 4 | 5 | {% 6 | include-markdown '../../generated/peripherals.md' 7 | rewrite-relative-urls=false 8 | %} 9 | -------------------------------------------------------------------------------- /docs/rm/snRuntime.md: -------------------------------------------------------------------------------- 1 | These pages host the documentation for the Snitch runtime, a set of runtime and library functions to make writing parallel and efficient C code for Snitch easier. -------------------------------------------------------------------------------- /docs/rm/sw/bench/join.md: -------------------------------------------------------------------------------- 1 | ::: join -------------------------------------------------------------------------------- /docs/rm/sw/bench/roi.md: -------------------------------------------------------------------------------- 1 | ::: roi -------------------------------------------------------------------------------- /docs/rm/sw/bench/visualize.md: -------------------------------------------------------------------------------- 1 | ::: visualize -------------------------------------------------------------------------------- /docs/rm/sw/sim/Elf.md: -------------------------------------------------------------------------------- 1 | ::: Elf 2 | -------------------------------------------------------------------------------- /docs/rm/sw/sim/Simulation.md: -------------------------------------------------------------------------------- 1 | ::: Simulation 2 | -------------------------------------------------------------------------------- /docs/rm/sw/sim/Simulator.md: -------------------------------------------------------------------------------- 1 | ::: Simulator 2 | -------------------------------------------------------------------------------- /docs/rm/sw/sim/data_utils.md: -------------------------------------------------------------------------------- 1 | ::: data_utils -------------------------------------------------------------------------------- /docs/rm/sw/sim/sim_utils.md: -------------------------------------------------------------------------------- 1 | ::: sim_utils -------------------------------------------------------------------------------- /docs/rm/sw/sim/verif_utils.md: -------------------------------------------------------------------------------- 1 | ::: verif_utils -------------------------------------------------------------------------------- /docs/rm/sw/snitch_target_utils/build.md: -------------------------------------------------------------------------------- 1 | ::: build 2 | -------------------------------------------------------------------------------- /docs/rm/sw/snitch_target_utils/run.md: -------------------------------------------------------------------------------- 1 | ::: run 2 | -------------------------------------------------------------------------------- /docs/rm/sw/trace/annotate.md: -------------------------------------------------------------------------------- 1 | ::: annotate -------------------------------------------------------------------------------- /docs/rm/sw/trace/events.md: -------------------------------------------------------------------------------- 1 | ::: events -------------------------------------------------------------------------------- /docs/rm/sw/trace/gen_trace.md: -------------------------------------------------------------------------------- 1 | <<<<<<< HEAD 2 | ::: gen_trace 3 | ======= 4 | ::: gen_trace 5 | >>>>>>> c744477... trace: Refactor and prepare for DMA trace generation 6 | -------------------------------------------------------------------------------- /docs/ug/directory_structure.md: -------------------------------------------------------------------------------- 1 | # Directory Structure 2 | 3 | The project is organized as a monolithic repository. Both hardware and software 4 | are co-located. The top-level ist structured as follows: 5 | 6 | * `docs`: [Documentation](documentation.md) of the generator and software. 7 | Contains additional user guides. 8 | * `hw`: All hardware IP components. 9 | * `sw`: Hardware independent software, libraries, runtimes etc. 10 | * `target`: Contains the testbench setup, cluster configuration specific hardware and software, libraries, runtimes etc. 11 | * `util`: Utility and helper scripts. 12 | 13 | ## Hardware `hw` Directory 14 | 17 | {% 18 | include-markdown '../../hw/README.md' 19 | start="# Snitch Hardware" 20 | comments=false 21 | %} 22 | 23 | ## Software `sw` Directory 24 | 25 | This subdirectory contains the various bits and pieces of software for the Snitch ecosystem. 26 | 27 | 30 | {% 31 | include-markdown '../../sw/README.md' 32 | start="## Contents" 33 | comments=false 34 | %} 35 | 36 | 37 | ## Target `target` Directory 38 | 41 | {% 42 | include-markdown '../../target/README.md' 43 | start="# HW Targets" 44 | comments=false 45 | %} 46 | -------------------------------------------------------------------------------- /docs/ug/documentation.md: -------------------------------------------------------------------------------- 1 | # Documentation 2 | 3 | Documentation pages for the Snitch cluster are hosted under `docs`. Static 4 | `html` documentation is built and deployed from the latest `main` branch by the 5 | CI. We use [mkdocs](https://www.mkdocs.org/) together with the [material 6 | theme](https://squidfunk.github.io/mkdocs-material/). 7 | 8 | You can build a static copy of the `html` documentation by 9 | executing (in the root of this repository): 10 | 11 | ```shell 12 | make docs 13 | ``` 14 | 15 | Documentation for the Python sources in this repository is generated from the 16 | docstrings contained within the sources themselves, using 17 | [mkdocstrings](https://mkdocstrings.github.io/). 18 | Documentation for the C sources in this repository is generated from the 19 | Doxygen-style comments within the sources themselves, using Doxygen. 20 | 21 | ## Organization 22 | 23 | The `docs` folder is organized as follows: 24 | 25 | * `rm`: Reference manuals, listings and detailed design decisions. 26 | * `ug`: User guides, more tutorial style texts to get contributors and user 27 | up-to-speed. 28 | -------------------------------------------------------------------------------- /hw/README.md: -------------------------------------------------------------------------------- 1 | # Snitch Hardware 2 | 3 | The `hw` directory contains various HW IPs which are instantiated in the Snitch Cluster design e.g., they are not stand-alone. 4 | Some of the IPs have stand-alone test benches. All IPs inside the `hw` directory are structured as follows: 5 | 6 | - ``: each directory contains one IP that is instantiated in the cluster design, e.g., they are not stand-alone. 7 | - `doc`: documentation if existing 8 | - `src`: RTL sources 9 | - `test`: Standalone testbenches if existing 10 | - `util`: Helper scripts to run standalone test benches if existing 11 | -------------------------------------------------------------------------------- /hw/mem_interface/.gitignore: -------------------------------------------------------------------------------- 1 | compile.tcl 2 | transcript 3 | *.log 4 | *.lock 5 | work 6 | Bender.lock 7 | *wlf* 8 | -------------------------------------------------------------------------------- /hw/mem_interface/README.md: -------------------------------------------------------------------------------- 1 | # Fixed Response Latency Memory Interface 2 | 3 | A simplistic two channel memory interface with fixed latency (`N`) responses. 4 | 5 | The addresses are word addresses (w/o byte offset). Bus accesses must always be 6 | aligned. 7 | 8 | !!! note 9 | There is no error mechanism provisioned. 10 | 11 | ## Channels 12 | 13 | The interface contains two channels. The `q` channel is fully hand-shaked, while 14 | the response channel `p` does not contain any back-pressure mechanism. Every 15 | response comes with a given fixed-latency (`N`) answer on the `p` channel. Every 16 | transaction on the `q` channel triggers a response on the `p` channel. 17 | 18 | When connecting two interfaces of such kind the response latency must be 19 | identical. Modules which increase the response latency must taken into account 20 | when attaching down-stream circuitry. 21 | 22 | # Memory Interface 23 | 24 | Very similar to the TCDM but the back path provides no arbitration. The response 25 | always comes with a fixed latency. Additionally, the address is used for 26 | word-address (no sub-word addresses are possible). 27 | 28 | * Request `q`: 29 | * `valid`: Transaction is valid. 30 | * `ready`: Slave accepted the transaction. 31 | * `write`: Transaction is a write. 32 | * `amo`: Atomic memory operations. Defined in the `reqrsp` interface. 33 | * `data`: Data to be written to memory. 34 | * `strb`: Byte-enable mask (one byte are 8 bit). 35 | * `user`: User signals, routed as additional payload. 36 | * Response `p`: 37 | * `data`: Read-data. 38 | -------------------------------------------------------------------------------- /hw/mem_interface/include/mem_interface/typedef.svh: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | // Author: Florian Zaruba 6 | // Author: Fabian Schuiki 7 | 8 | `ifndef MEM_INTERFACE_TYPEDEF_SVH_ 9 | `define MEM_INTERFACE_TYPEDEF_SVH_ 10 | 11 | `define MEM_TYPEDEF_REQ_CHAN_T(__req_chan_t, __addr_t, __data_t, __strb_t, __user_t) \ 12 | typedef struct packed { \ 13 | __addr_t addr; \ 14 | logic write; \ 15 | reqrsp_pkg::amo_op_e amo; \ 16 | __data_t data; \ 17 | __strb_t strb; \ 18 | __user_t user; \ 19 | } __req_chan_t; 20 | 21 | `define MEM_TYPEDEF_RSP_CHAN_T(__rsp_chan_t, __data_t) \ 22 | typedef struct packed { \ 23 | __data_t data; \ 24 | } __rsp_chan_t; 25 | 26 | `define MEM_TYPEDEF_REQ_T(__req_t, __req_chan_t) \ 27 | typedef struct packed { \ 28 | __req_chan_t q; \ 29 | logic q_valid; \ 30 | } __req_t; 31 | 32 | `define MEM_TYPEDEF_RSP_T(__rsp_t, __rsp_chan_t) \ 33 | typedef struct packed { \ 34 | __rsp_chan_t p; \ 35 | logic q_ready; \ 36 | } __rsp_t; 37 | 38 | `define MEM_TYPEDEF_ALL(__name, __addr_t, __data_t, __strb_t, __user_t) \ 39 | `MEM_TYPEDEF_REQ_CHAN_T(__name``_req_chan_t, __addr_t, __data_t, __strb_t, __user_t) \ 40 | `MEM_TYPEDEF_RSP_CHAN_T(__name``_rsp_chan_t, __data_t) \ 41 | `MEM_TYPEDEF_REQ_T(__name``_req_t, __name``_req_chan_t) \ 42 | `MEM_TYPEDEF_RSP_T(__name``_rsp_t, __name``_rsp_chan_t) 43 | 44 | `endif 45 | -------------------------------------------------------------------------------- /hw/mem_interface/util/compile.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | 9 | set -e 10 | 11 | [ ! -z "$VSIM" ] || VSIM=vsim 12 | 13 | $BENDER script vsim -t test \ 14 | --vlog-arg="-svinputport=compat" \ 15 | --vlog-arg="-override_timescale 1ns/1ps" \ 16 | --vlog-arg="-suppress 2583" \ 17 | --vlog-arg="+cover=sbecft" \ 18 | > compile.tcl 19 | echo 'return 0' >> compile.tcl 20 | $QUESTA_SEPP $VSIM -c -do 'exit -code [source compile.tcl]' 21 | -------------------------------------------------------------------------------- /hw/mem_interface/util/run_vsim.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | 9 | set -e 10 | ROOT=$(cd "$(dirname "${BASH_SOURCE[0]}")/.." && pwd) 11 | 12 | [ ! -z "$VSIM" ] || VSIM=vsim 13 | 14 | call_vsim() { 15 | echo "log -r /*; run -all" | $QUESTA_SEPP $VSIM -c -coverage -voptargs='+acc +cover=sbecft' "$@" | tee vsim.log 2>&1 16 | grep "Errors: 0," vsim.log 17 | } 18 | 19 | call_vsim mem_wide_narrow_mux_tb -------------------------------------------------------------------------------- /hw/reqrsp_interface/.gitignore: -------------------------------------------------------------------------------- 1 | compile.tcl 2 | transcript 3 | *.log 4 | *.lock 5 | work 6 | Bender.lock 7 | -------------------------------------------------------------------------------- /hw/reqrsp_interface/README.md: -------------------------------------------------------------------------------- 1 | # Reqrsp Interface 2 | 3 | A simple interface with a single request channel and a single response channel, 4 | for both read and write data. A more thorough documentation can be found in the 5 | [docs](doc/index.md) folder. 6 | 7 | ## List of Modules 8 | 9 | | Name | Description | Status | 10 | | ---------------- | ---------------------------------------------------------------------------- | ---------- | 11 | | `axi_to_reqrsp` | Protocol translator between `reqrsp` and AXI4+ATOP | active | 12 | | `reqrsp_cut` | Insert registers (i.e., a pipeline stage) into request and/or response path. | active | 13 | | `reqrsp_demux` | Demultiplex, based on a select signal. | active | 14 | | `reqrsp_intf` | Systemverilog interface definition of `reqrsp` interface. | active | 15 | | `reqrsp_iso` | Isochronous clockdomain crossing. | active | 16 | | `reqrsp_mux` | Arbitrate multiple ports based on round-robin arbitration. | active | 17 | | `reqrsp_test` | Common test infrastructure for the `reqrsp` protocol. | active | 18 | | `reqrsp_to_axi` | Protocol translator between AXI4+ATOP and `reqrsp`. | active | 19 | | `reqrsp_to_tcdm` | Protocol translator between `reqrsp` and `tcdm` protocol. | _untested_ | 20 | 21 | 22 | -------------------------------------------------------------------------------- /hw/reqrsp_interface/util/compile.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | 9 | set -e 10 | 11 | [ ! -z "$VSIM" ] || VSIM=vsim 12 | 13 | $BENDER script vsim -t test \ 14 | --vlog-arg="-svinputport=compat" \ 15 | --vlog-arg="-override_timescale 1ns/1ps" \ 16 | --vlog-arg="-suppress 2583" \ 17 | --vlog-arg="+cover=sbecft" \ 18 | > compile.tcl 19 | echo 'return 0' >> compile.tcl 20 | $QUESTA_SEPP $VSIM -c -do 'exit -code [source compile.tcl]' 21 | -------------------------------------------------------------------------------- /hw/reqrsp_interface/util/run_vsim.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | 9 | set -e 10 | ROOT=$(cd "$(dirname "${BASH_SOURCE[0]}")/.." && pwd) 11 | 12 | [ ! -z "$VSIM" ] || VSIM=vsim 13 | 14 | call_vsim() { 15 | echo "log -r /*; run -all" | $QUESTA_SEPP $VSIM -c -coverage -voptargs='+acc +cover=sbecft' "$@" | tee vsim.log 2>&1 16 | grep "Errors: 0," vsim.log 17 | } 18 | 19 | call_vsim axi_to_reqrsp_tb 20 | call_vsim reqrsp_to_axi_tb 21 | call_vsim reqrsp_mux_tb 22 | call_vsim reqrsp_demux_tb 23 | # Test `reqrsp_cut` 24 | call_vsim reqrsp_idempotent_tb -gCut=1 -gIso=0 25 | # Test `reqrsp_iso` 26 | call_vsim reqrsp_idempotent_tb -gCut=0 -gIso=1 27 | -------------------------------------------------------------------------------- /hw/snitch_cluster/.gitignore: -------------------------------------------------------------------------------- 1 | compile.tcl 2 | transcript 3 | *.log 4 | *.lock 5 | work 6 | Bender.lock 7 | *wlf* 8 | -------------------------------------------------------------------------------- /hw/snitch_cluster/src/snitch_barrier.sv: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | // 5 | // Author: Luca Colagrande 6 | 7 | `include "common_cells/registers.svh" 8 | 9 | /// Hardware barrier to synchronize all cores in a cluster. 10 | module snitch_barrier #( 11 | parameter int NrCores = 0 12 | ) ( 13 | input logic clk_i, 14 | input logic rst_ni, 15 | input logic [NrCores-1:0] barrier_i, 16 | output logic barrier_o 17 | ); 18 | 19 | logic [NrCores-1:0] arrival_d, arrival_q; 20 | 21 | generate 22 | for (genvar i = 0; i < NrCores; i++) begin : gen_arrival_bit 23 | 24 | `FF(arrival_q[i], arrival_d[i], 1'b0, clk_i, rst_ni) 25 | 26 | always_comb begin 27 | if (barrier_o) arrival_d[i] = 1'b0; 28 | else if (barrier_i[i]) arrival_d[i] = 1'b1; 29 | else arrival_d[i] = arrival_q[i]; 30 | end 31 | 32 | end 33 | endgenerate 34 | 35 | assign barrier_o = &arrival_q; 36 | 37 | endmodule 38 | -------------------------------------------------------------------------------- /hw/snitch_cluster/test/bootdata.cc.tpl: -------------------------------------------------------------------------------- 1 | // Copyright 2021 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | #include 6 | 7 | namespace sim { 8 | 9 | const BootData BOOTDATA = {.boot_addr = ${hex(cfg['cluster']['boot_addr'])}, 10 | .core_count = ${cfg['cluster']['nr_cores']}, 11 | .hartid_base = ${cfg['cluster']['cluster_base_hartid']}, 12 | .tcdm_start = ${hex(cfg['cluster']['cluster_base_addr'])}, 13 | .tcdm_size = ${hex(cfg['cluster']['tcdm']['size'] * 1024)}, 14 | .tcdm_offset = ${hex(cfg['cluster']['cluster_base_offset'])}, 15 | .global_mem_start = ${hex(next(reg['address'] for reg in cfg['external_addr_regions'] if reg['name'] == 'dram'))}, 16 | .global_mem_end = ${hex(next(reg['address'] + reg['length'] for reg in cfg['external_addr_regions'] if reg['name'] == 'dram'))}, 17 | .cluster_count = ${cfg['nr_clusters']}, 18 | .clint_base = ${hex(next(reg['address'] + reg['length'] for reg in cfg['external_addr_regions'] if reg['name'] == 'clint'))}}; 19 | 20 | } // namespace sim 21 | -------------------------------------------------------------------------------- /hw/snitch_cluster/test/link.ld.tpl: -------------------------------------------------------------------------------- 1 | /* Copyright 2020 ETH Zurich and University of Bologna. */ 2 | /* Solderpad Hardware License, Version 0.51, see LICENSE for details. */ 3 | /* SPDX-License-Identifier: SHL-0.51 */ 4 | 5 | OUTPUT_ARCH( "riscv" ) 6 | ENTRY(_start) 7 | <% dram_address = next(reg['address'] for reg in cfg['external_addr_regions'] if reg['name'] == 'dram'); %> 8 | <% dram_length = next(reg['length'] for reg in cfg['external_addr_regions'] if reg['name'] == 'dram'); %> 9 | 10 | MEMORY 11 | { 12 | DRAM (rwxai) : ORIGIN = ${dram_address}, LENGTH = ${dram_length} 13 | L1 (rw) : ORIGIN = ${l1_region[0]}, LENGTH = ${l1_region[1]}K 14 | } 15 | 16 | SECTIONS 17 | { 18 | . = ${dram_address}; 19 | .text.init : { *(.text.init) } 20 | . = ALIGN(0x1000); 21 | .tohost : { *(.tohost) } 22 | . = ALIGN(0x1000); 23 | .text : { *(.text) } 24 | . = ALIGN(0x1000); 25 | .data : { *(.data) } 26 | .bss : { *(.bss) } 27 | _end = .; 28 | } 29 | -------------------------------------------------------------------------------- /hw/snitch_cluster/util/compile.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | 9 | set -e 10 | 11 | [ ! -z "$VSIM" ] || VSIM=vsim 12 | 13 | $BENDER script vsim -t test \ 14 | --vlog-arg="-svinputport=compat" \ 15 | --vlog-arg="-override_timescale 1ns/1ps" \ 16 | --vlog-arg="-suppress 2583" \ 17 | --vlog-arg="+cover=sbecft" \ 18 | > compile.tcl 19 | echo 'return 0' >> compile.tcl 20 | $QUESTA_SEPP $VSIM -c -do 'exit -code [source compile.tcl]' 21 | -------------------------------------------------------------------------------- /hw/snitch_cluster/util/run_vsim.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | 9 | set -e 10 | ROOT=$(cd "$(dirname "${BASH_SOURCE[0]}")/.." && pwd) 11 | 12 | [ ! -z "$VSIM" ] || VSIM=vsim 13 | 14 | call_vsim() { 15 | echo "log -r /*; run -all" | $QUESTA_SEPP $VSIM -c -coverage -voptargs='+acc +cover=sbecft' "$@" | tee vsim.log 2>&1 16 | grep "Errors: 0," vsim.log 17 | } 18 | 19 | call_vsim snitch_tcdm_interconnect_tb -------------------------------------------------------------------------------- /hw/snitch_ssr/.gitignore: -------------------------------------------------------------------------------- 1 | compile.tcl 2 | transcript 3 | *.log 4 | *.lock 5 | work 6 | Bender.lock 7 | *wlf* 8 | -------------------------------------------------------------------------------- /hw/snitch_ssr/include/snitch_ssr/typedef.svh: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | // Author: Paul Scheffler 6 | 7 | `ifndef SSR_TYPEDEF_SVH_ 8 | `define SSR_TYPEDEF_SVH_ 9 | 10 | `define SSR_ISECT_TYPEDEF_MST_REQ_T(__req_t, __index_t) \ 11 | typedef struct packed { \ 12 | logic merge; \ 13 | logic slv_ena; \ 14 | __index_t idx; \ 15 | logic done; \ 16 | logic valid; \ 17 | } __req_t; 18 | 19 | `define SSR_ISECT_TYPEDEF_MST_RSP_T(__rsp_t) \ 20 | typedef struct packed { \ 21 | logic zero; \ 22 | logic skip; \ 23 | logic done; \ 24 | logic ready; \ 25 | } __rsp_t; 26 | 27 | `define SSR_ISECT_TYPEDEF_SLV_REQ_T(__req_t) \ 28 | typedef struct packed { \ 29 | logic ena; \ 30 | logic ready; \ 31 | } __req_t; 32 | 33 | 34 | `define SSR_ISECT_TYPEDEF_SLV_RSP_T(__rsp_t, __index_t) \ 35 | typedef struct packed { \ 36 | __index_t idx; \ 37 | logic done; \ 38 | logic valid; \ 39 | } __rsp_t; 40 | 41 | `define SSR_ISECT_TYPEDEF_ALL(__name, __index_t) \ 42 | `SSR_ISECT_TYPEDEF_MST_REQ_T(__name``_mst_req_t, __index_t) \ 43 | `SSR_ISECT_TYPEDEF_MST_RSP_T(__name``_mst_rsp_t) \ 44 | `SSR_ISECT_TYPEDEF_SLV_REQ_T(__name``_slv_req_t) \ 45 | `SSR_ISECT_TYPEDEF_SLV_RSP_T(__name``_slv_rsp_t, __index_t) 46 | 47 | `endif 48 | -------------------------------------------------------------------------------- /hw/snitch_ssr/util/compile.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | 9 | set -e 10 | 11 | [ ! -z "$VSIM" ] || VSIM=vsim 12 | 13 | $BENDER script vsim -t test \ 14 | --vlog-arg="-svinputport=compat" \ 15 | --vlog-arg="-override_timescale 1ns/1ps" \ 16 | --vlog-arg="-suppress 2583" \ 17 | --vlog-arg="+cover=sbecft" \ 18 | > compile.tcl 19 | echo 'return 0' >> compile.tcl 20 | $QUESTA_SEPP $VSIM -c -do 'exit -code [source compile.tcl]' 21 | -------------------------------------------------------------------------------- /hw/snitch_ssr/util/run_vsim.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | # Paul Scheffler 9 | 10 | set -e 11 | ROOT=$(cd "$(dirname "${BASH_SOURCE[0]}")/.." && pwd) 12 | 13 | [ ! -z "$VSIM" ] || VSIM=vsim 14 | 15 | call_vsim() { 16 | # We treat accessing unwritten associative array (memory) locations as fatal 17 | echo "log -r /*; run -all" | $QUESTA_SEPP $VSIM -c -coverage -voptargs='+acc +cover=sbecft' "$@" -fatal vsim-3829 | tee vsim.log 2>&1 18 | (grep "SUCCESS" transcript) 19 | (! grep -n "Fatal:" transcript) 20 | (! grep -n "Error:" transcript) 21 | } 22 | 23 | call_vsim tb_simple_ssr 24 | call_vsim tb_simple_ssr_streamer 25 | -------------------------------------------------------------------------------- /hw/snitch_vm/doc/index.md: -------------------------------------------------------------------------------- 1 | # Virtual Memory 2 | 3 | This IP contains common components for virtual memory and memory protection in 4 | Snitch-based systems. Currently the only shared component is the page table walker. 5 | 6 | ## Testbenches 7 | 8 | This folder provides tests for: 9 | 10 | - The page table walker (PTW): Random (and mostly legal) multi-level page table 11 | entries are generated. Resulting virtual addresses are driven on the request 12 | side and the response is compared to the golden model (generated during the 13 | randomization step). All ports are randomly delayed. 14 | -------------------------------------------------------------------------------- /hw/tcdm_interface/.gitignore: -------------------------------------------------------------------------------- 1 | compile.tcl 2 | transcript 3 | *.log 4 | *.lock 5 | work 6 | Bender.lock 7 | -------------------------------------------------------------------------------- /hw/tcdm_interface/util/compile.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | 9 | set -e 10 | 11 | [ ! -z "$VSIM" ] || VSIM=vsim 12 | 13 | $BENDER script vsim -t test \ 14 | --vlog-arg="-svinputport=compat" \ 15 | --vlog-arg="-override_timescale 1ns/1ps" \ 16 | --vlog-arg="-suppress 2583" \ 17 | --vlog-arg="+cover=sbecft" \ 18 | > compile.tcl 19 | echo 'return 0' >> compile.tcl 20 | $QUESTA_SEPP $VSIM -c -do 'exit -code [source compile.tcl]' 21 | -------------------------------------------------------------------------------- /hw/tcdm_interface/util/run_vsim.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | # 6 | # Fabian Schuiki 7 | # Andreas Kurth 8 | 9 | set -e 10 | ROOT=$(cd "$(dirname "${BASH_SOURCE[0]}")/.." && pwd) 11 | 12 | [ ! -z "$VSIM" ] || VSIM=vsim 13 | 14 | call_vsim() { 15 | echo "log -r /*; run -all" | $QUESTA_SEPP $VSIM -c -coverage -voptargs='+acc +cover=sbecft' "$@" | tee vsim.log 2>&1 16 | grep "Errors: 0," vsim.log 17 | } 18 | 19 | call_vsim tcdm_mux_tb 20 | call_vsim reqrsp_to_tcdm_tb -------------------------------------------------------------------------------- /iis-setup.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | 6 | # Define environment variables 7 | export BENDER=bender-0.28.1 8 | export CC=gcc-9.2.0 9 | export CXX=g++-9.2.0 10 | export VCS_SEPP=vcs-2024.09 11 | export VERILATOR_SEPP=oseda 12 | export QUESTA_SEPP=questa-2023.4 13 | export LLVM_BINROOT=/usr/scratch2/vulcano/colluca/tools/riscv32-snitch-llvm-almalinux8-15.0.0-snitch-0.1.0/bin 14 | 15 | # Create Python virtual environment with required packages 16 | /usr/local/anaconda3-2023.07/bin/python -m venv .venv 17 | source .venv/bin/activate 18 | # Install local packages in editable mode and unpack packages in a 19 | # local temporary directory which can be safely cleaned after installation. 20 | # Also protects against "No space left on device" errors 21 | # occurring when the /tmp folder is filled by other processes. 22 | mkdir tmp 23 | TMPDIR=tmp pip install -e . 24 | rm -rf tmp 25 | -------------------------------------------------------------------------------- /nonfree/util/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pulp-platform/snitch_cluster/48aebb1ae1dbadc75baaac4d3bcb1158ba90b84b/nonfree/util/.gitignore -------------------------------------------------------------------------------- /pyproject.toml: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | # SPDX-License-Identifier: SHL-0.51 4 | 5 | [build-system] 6 | requires = ["setuptools>=64"] 7 | build-backend = "setuptools.build_meta" 8 | 9 | [project] 10 | name = "snitch" 11 | authors = [ 12 | {name = "Luca Colagrande", email = "colluca@iis.ee.ethz.ch"} 13 | ] 14 | dynamic = ["version"] 15 | dependencies = [ 16 | # Keep sorted. 17 | "bin2coe", 18 | "dataclasses", 19 | "flake8", 20 | "gitpython", 21 | "humanize", 22 | "json5", 23 | "jsonref", 24 | "jsonschema", 25 | "mako", 26 | "matplotlib", 27 | "mkdocs", 28 | "mkdocs-exclude", 29 | "mkdocs-material", 30 | "mkdocs-include-markdown-plugin", 31 | "mkdocs-macros-plugin", 32 | "mkdocstrings", 33 | "mkdocstrings-python", 34 | "numpy", 35 | "pandas", 36 | "prettytable", 37 | "progressbar2", 38 | "psutil", 39 | "pyelftools", 40 | "pyflexfloat", 41 | "pytablewriter", 42 | "pytest", 43 | "pyyaml", 44 | "scikit-learn", 45 | "tabulate", 46 | "termcolor", 47 | "torch", 48 | "yamllint" 49 | ] 50 | 51 | [tool.setuptools.package-dir] 52 | "snitch.dnn" = "sw/dnn" 53 | "snitch.blas" = "sw/blas" 54 | "snitch.util" = "util" 55 | "snitch.target" = "target/snitch_cluster/util" 56 | "snitch.nonfree" = "nonfree/util" 57 | -------------------------------------------------------------------------------- /sw/.gitignore: -------------------------------------------------------------------------------- 1 | doxygen 2 | -------------------------------------------------------------------------------- /sw/Doxyfile: -------------------------------------------------------------------------------- 1 | # Copyright 2021 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | DOXYFILE_ENCODING = UTF-8 6 | PROJECT_NAME = "Snitch Runtime" 7 | OUTPUT_DIRECTORY = doxygen 8 | GENERATE_LATEX = NO 9 | 10 | # Necessary for doxybook2 11 | GENERATE_XML = YES 12 | XML_OUTPUT = xml 13 | 14 | # Source 15 | INPUT = benchmark snBLAS snRuntime applications 16 | RECURSIVE = YES 17 | FILE_PATTERNS = *.h *.hpp *.md 18 | EXAMPLE_PATH = examples snRuntime/test 19 | EXAMPLE_PATTERNS = *.c 20 | 21 | # Html related stuff, optional 22 | SHOW_NAMESPACES = YES 23 | EXTRACT_ALL = YES 24 | GENERATE_HTML = YES 25 | 26 | # This is here just so we don't have to mess 27 | # with dot executable on continous integration. 28 | CALL_GRAPH = NO 29 | HAVE_DOT = NO 30 | 31 | IMAGE_PATH = images 32 | -------------------------------------------------------------------------------- /sw/README.md: -------------------------------------------------------------------------------- 1 | # Snitch Software 2 | 3 | This subdirectory contains the various bits and pieces of software for the Snitch ecosystem. 4 | 5 | ## Contents 6 | 7 | ### Libraries 8 | 9 | - `applications`: Contains applications and kernels, mostly NN-related with SW testbenches for performance profiling. 10 | - `cmake`: Bits and pieces for integration with the CMake build system. 11 | - `snRuntime`: The fundamental, bare-metal runtime for Snitch systems. Exposes a minimal API to manage execution of code across the available cores and clusters, query information about a thread's context, and to coordinate and exchange data with other threads. Hardware configuration dependent implementations of the `snRuntime` can be found, e.g., under `target/snitch_cluster/sw/snRuntime`. 12 | - `snBLAS`: A minimal reference implementation of the basic linear algebra subprograms that demonstrates the use of Snitch and its extensions. 13 | 14 | ### Tests 15 | 16 | - `benchmark`: Benchmarking executables that evaluate the performance characteristics of a system. 17 | - `test`: Unit tests for various aspects of a system, including the instruction set extensions. These complement the library-specific unit tests that live within the library directories proper. 18 | 19 | ### Third-Party 20 | 21 | The `deps` directory contains third-party tools that we inline into this repository for ease of use. 22 | 23 | - `deps/riscv-opcodes`: Utilities to manage instruction encodings and generate functions and data structurse for parsing and representation in various languages. 24 | - `deps/printf`: A printf / sprintf implementation for embedded systems. 25 | -------------------------------------------------------------------------------- /sw/apps/atax/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | M: 16, 7 | N: 8 8 | } 9 | -------------------------------------------------------------------------------- /sw/apps/atax/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import numpy as np 9 | import sys 10 | from datagen import AtaxDataGen 11 | 12 | from snitch.util.sim.verif_utils import Verifier 13 | 14 | 15 | class AtaxVerifier(Verifier): 16 | 17 | OUTPUT_UIDS = ['y'] 18 | 19 | def get_actual_results(self): 20 | return self.get_output_from_symbol('y', 'double') 21 | 22 | def get_expected_results(self): 23 | A = self.get_input_from_symbol('A', 'double') 24 | x = self.get_input_from_symbol('x', 'double') 25 | M = self.get_input_from_symbol('M', 'uint32_t')[0] 26 | N = self.get_input_from_symbol('N', 'uint32_t')[0] 27 | A = np.reshape(A, (M, N)) 28 | return AtaxDataGen().golden_model(A, x).flatten() 29 | 30 | def check_results(self, *args): 31 | return super().check_results(*args, rtol=1e-10) 32 | 33 | 34 | if __name__ == "__main__": 35 | sys.exit(AtaxVerifier().main()) 36 | -------------------------------------------------------------------------------- /sw/apps/atax/src/args.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #pragma once 8 | #include 9 | 10 | typedef struct { 11 | uint32_t M; 12 | uint32_t N; 13 | uint64_t A_addr; 14 | uint64_t x_addr; 15 | uint64_t y_addr; 16 | } atax_args_t; 17 | -------------------------------------------------------------------------------- /sw/apps/atax/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Jose Pedro Castro Fonseca 6 | // Luca Colagrande 7 | 8 | #include "atax.h" 9 | #include "data.h" 10 | 11 | #define MAX_ERROR 1e-10 12 | 13 | int main() { 14 | uint32_t nerr = 0; 15 | 16 | atax_args_t args = {M, N, (uint64_t)A, (uint64_t)x, (uint64_t)y}; 17 | atax_job(&args); 18 | 19 | // Check computation is correct 20 | #ifdef BIST 21 | if (snrt_cluster_core_idx() == 0) { 22 | // Check y 23 | for (int i = 0; i < N; i++) { 24 | double diff = fabs(golden[i] - y[i]); 25 | if (diff > MAX_ERROR) { 26 | nerr++; 27 | } 28 | } 29 | } 30 | #endif 31 | 32 | return nerr; 33 | } 34 | -------------------------------------------------------------------------------- /sw/apps/box3d1r/Makefile: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | # Usage of absolute paths is required to externally include this Makefile 8 | MK_DIR := $(dir $(realpath $(lastword $(MAKEFILE_LIST)))) 9 | DATA_DIR := $(realpath $(MK_DIR)/data) 10 | SRC_DIR := $(realpath $(MK_DIR)/src) 11 | 12 | DATA_CFG ?= $(DATA_DIR)/params.json 13 | SECTION ?= 14 | 15 | APP ?= box3d1r 16 | SRCS ?= $(realpath $(SRC_DIR)/main.c) 17 | INCDIRS ?= $(dir $(DATA_H)) $(SRC_DIR) 18 | 19 | DATAGEN_PY = $(MK_DIR)/scripts/datagen.py 20 | DATA_H ?= $(DATA_DIR)/data.h 21 | 22 | $(dir $(DATA_H)): 23 | mkdir -p $@ 24 | 25 | $(DATA_H): $(DATAGEN_PY) $(DATA_CFG) | $(dir $(DATA_H)) 26 | $< -c $(DATA_CFG) --section="$(SECTION)" > $@ 27 | 28 | .PHONY: clean-data clean 29 | 30 | clean-data: 31 | rm -f $(DATA_H) 32 | 33 | clean: clean-data 34 | -------------------------------------------------------------------------------- /sw/apps/box3d1r/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | R: 1, 7 | NX: 16, 8 | NY: 16, 9 | NZ: 16 10 | } -------------------------------------------------------------------------------- /sw/apps/box3d1r/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2023 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import sys 9 | from datagen import Box3D1RDataGen 10 | 11 | from snitch.util.sim.verif_utils import Verifier 12 | 13 | 14 | class Box3D1RVerifier(Verifier): 15 | 16 | OUTPUT_UIDS = ['A_'] 17 | 18 | def get_actual_results(self): 19 | return self.get_output_from_symbol('A_', 'double') 20 | 21 | def get_expected_results(self): 22 | R = self.get_input_from_symbol('r', 'uint32_t') 23 | NX = self.get_input_from_symbol('nx', 'uint32_t') 24 | NY = self.get_input_from_symbol('ny', 'uint32_t') 25 | NZ = self.get_input_from_symbol('nz', 'uint32_t') 26 | C = self.get_input_from_symbol('c', 'double') 27 | A = self.get_input_from_symbol('A', 'double') 28 | return Box3D1RDataGen().golden_model(R, NX, NY, NZ, C, A) 29 | 30 | def check_results(self, *args): 31 | return super().check_results(*args, rtol=1e-10) 32 | 33 | 34 | if __name__ == "__main__": 35 | sys.exit(Box3D1RVerifier().main()) 36 | -------------------------------------------------------------------------------- /sw/apps/box3d1r/src/box3d1r.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Jayanth Jonnalagadda 6 | // Luca Colagrande 7 | 8 | #include "math.h" 9 | #include "snrt.h" 10 | #include "stdbool.h" 11 | #include "stdint.h" 12 | 13 | #include "box3d1r_baseline1.h" 14 | #include "box3d1r_baseline2.h" 15 | #include "box3d1r_baseline3.h" 16 | #include "box3d1r_baseline4.h" 17 | #include "box3d1r_naive.h" 18 | #include "box3d1r_opt1.h" 19 | #include "box3d1r_opt2.h" 20 | 21 | #define IMPL_NAIVE 0 22 | #define IMPL_BASELINE_1 1 23 | #define IMPL_BASELINE_2 2 24 | #define IMPL_BASELINE_3 3 25 | #define IMPL_BASELINE_4 4 26 | #define IMPL_OPTIMIZED_1 5 27 | #define IMPL_OPTIMIZED_2 6 28 | 29 | #ifndef IMPL 30 | #define IMPL IMPL_OPTIMIZED_2 31 | #endif 32 | 33 | #if IMPL == IMPL_NAIVE 34 | #define FUNC_PTR box3d1r_naive 35 | #elif IMPL == IMPL_BASELINE_1 36 | #define FUNC_PTR box3d1r_baseline1 37 | #elif IMPL == IMPL_BASELINE_2 38 | #define FUNC_PTR box3d1r_baseline2 39 | #elif IMPL == IMPL_BASELINE_3 40 | #define FUNC_PTR box3d1r_baseline3 41 | #elif IMPL == IMPL_BASELINE_4 42 | #define FUNC_PTR box3d1r_baseline4 43 | #elif IMPL == IMPL_OPTIMIZED_1 44 | #define FUNC_PTR box3d1r_opt1 45 | #elif IMPL == IMPL_OPTIMIZED_2 46 | #define FUNC_PTR box3d1r_opt2 47 | #endif 48 | 49 | // The Kernel 50 | static inline void box3d1r(int r, int nx, int ny, int nz, double* c, double* A, 51 | double* A_) { 52 | FUNC_PTR(r, nx, ny, nz, c, A, A_); 53 | } 54 | -------------------------------------------------------------------------------- /sw/apps/box3d1r/src/box3d1r_naive.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Jayanth Jonnalagadda 6 | // Luca Colagrande 7 | 8 | // Pure C implementation no ISA extensions 9 | 10 | static inline void box3d1r_naive(int r, int nx, int ny, int nz, double* c, 11 | double* A, double* A_) { 12 | snrt_mcycle(); 13 | for (int z = r; z < nz - r; z++) { 14 | for (int y = r; y < ny - r; y++) { 15 | for (int x = r; x < nx - r; x++) { 16 | double acc = 0.0; 17 | for (int dz = -r; dz <= r; dz++) { 18 | for (int dy = -r; dy <= r; dy++) { 19 | for (int dx = -r; dx <= r; dx++) { 20 | acc += (c[((dz + r) * (2 * r + 1) * (2 * r + 1)) + 21 | ((dy + r) * (2 * r + 1)) + (dx + r)] * 22 | A[((z + dz) * ny * nx) + ((y + dy) * nx) + 23 | (x + dx)]); 24 | } 25 | } 26 | } 27 | A_[(z * ny * nx) + (y * nx) + x] = acc; 28 | } 29 | } 30 | } 31 | snrt_fpu_fence(); 32 | snrt_mcycle(); 33 | } 34 | -------------------------------------------------------------------------------- /sw/apps/common.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | DATA_DIR := $(realpath $(SRC_DIR)/../data) 8 | SCRIPTS_DIR := $(realpath $(SRC_DIR)/../scripts) 9 | 10 | $(APP)_DATA_CFG ?= $(DATA_DIR)/params.json 11 | SECTION ?= 12 | DATA_H := $($(APP)_BUILD_DIR)/data.h 13 | DATAGEN_PY = $(SCRIPTS_DIR)/datagen.py 14 | 15 | $(APP)_HEADERS := $(DATA_H) 16 | $(APP)_INCDIRS += $(dir $(DATA_H)) $(SRC_DIR) 17 | $(APP)_DATAGEN_ARGS += -c $($(APP)_DATA_CFG) 18 | $(APP)_DATAGEN_ARGS += --section="$(SECTION)" 19 | 20 | $(dir $(DATA_H)): 21 | mkdir -p $@ 22 | 23 | $(DATA_H): DATAGEN_ARGS := $($(APP)_DATAGEN_ARGS) 24 | $(DATA_H): $(DATAGEN_PY) $($(APP)_DATA_CFG) | $(dir $(DATA_H)) 25 | $< $(DATAGEN_ARGS) $@ 26 | -------------------------------------------------------------------------------- /sw/apps/correlation/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | M: 16, 7 | N: 8 8 | } 9 | -------------------------------------------------------------------------------- /sw/apps/correlation/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import numpy as np 9 | import sys 10 | from datagen import CorrelationDataGen 11 | 12 | from snitch.util.sim.verif_utils import Verifier 13 | 14 | 15 | class CorrelationVerifier(Verifier): 16 | 17 | OUTPUT_UIDS = ['corr'] 18 | 19 | def get_actual_results(self): 20 | return self.get_output_from_symbol('corr', 'double') 21 | 22 | def get_expected_results(self): 23 | M = self.get_input_from_symbol('M', 'uint32_t')[0] 24 | N = self.get_input_from_symbol('N', 'uint32_t')[0] 25 | data = self.get_input_from_symbol('data', 'double') 26 | data = np.reshape(data, (N, M)) 27 | return CorrelationDataGen().golden_model(data).flatten() 28 | 29 | def check_results(self, *args): 30 | return super().check_results(*args, rtol=1e-10) 31 | 32 | 33 | if __name__ == "__main__": 34 | sys.exit(CorrelationVerifier().main()) 35 | -------------------------------------------------------------------------------- /sw/apps/correlation/src/args.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #pragma once 8 | #include 9 | 10 | typedef struct { 11 | uint32_t N; 12 | uint32_t M; 13 | uint64_t data_addr; 14 | uint64_t corr_addr; 15 | } correlation_args_t; 16 | -------------------------------------------------------------------------------- /sw/apps/correlation/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Jose Pedro Castro Fonseca 6 | // Luca Colagrande 7 | 8 | #include "correlation.h" 9 | #include "data.h" 10 | 11 | #define MAX_ERROR 1e-10 12 | 13 | int main() { 14 | uint32_t nerr = 0; 15 | 16 | correlation_args_t args = {N, M, (uint64_t)data, (uint64_t)corr}; 17 | correlation_job(&args); 18 | 19 | #ifdef BIST 20 | // Check computation is correct 21 | if (snrt_cluster_core_idx() == 0) { 22 | for (int i = 0; i < M; i++) { 23 | for (int j = 0; j < M; j++) { 24 | double diff = fabs(golden[i * M + j] - corr[i * M + j]); 25 | if (diff > MAX_ERROR) { 26 | nerr++; 27 | } 28 | } 29 | } 30 | } 31 | #endif 32 | 33 | return nerr; 34 | } 35 | -------------------------------------------------------------------------------- /sw/apps/covariance/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | "m": 32, 7 | "n": 2, 8 | "m_tiles": 2, 9 | "funcptr": "covariance_opt" 10 | } 11 | -------------------------------------------------------------------------------- /sw/apps/covariance/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import numpy as np 9 | import sys 10 | from datagen import CovarianceDataGen 11 | 12 | from snitch.util.sim.verif_utils import Verifier 13 | 14 | 15 | class CovarianceVerifier(Verifier): 16 | 17 | OUTPUT_UIDS = ['cov'] 18 | 19 | def __init__(self): 20 | super().__init__() 21 | self.func_args = { 22 | 'm': 'I', 23 | 'n': 'I', 24 | 'inv_n': 'd', 25 | 'inv_n_m1': 'd', 26 | 'data': 'I', 27 | 'cov': 'I', 28 | 'm_tiles': 'I', 29 | 'funcptr': 'I' 30 | } 31 | self.func_args = self.get_input_from_symbol('args', self.func_args) 32 | 33 | def get_actual_results(self): 34 | return self.get_output_from_symbol(self.OUTPUT_UIDS[0], 'double') 35 | 36 | def get_expected_results(self): 37 | data = self.get_input_from_symbol('data', 'double') 38 | data = np.reshape(data, (self.func_args['m'], self.func_args['n'])).transpose() 39 | return CovarianceDataGen().golden_model(data).flatten() 40 | 41 | def check_results(self, *args): 42 | return super().check_results(*args, rtol=1e-10) 43 | 44 | 45 | if __name__ == "__main__": 46 | sys.exit(CovarianceVerifier().main()) 47 | -------------------------------------------------------------------------------- /sw/apps/covariance/src/args.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #pragma once 8 | #include 9 | 10 | typedef void (*covariance_fp_t)(uint32_t m, uint32_t n, double inv_n, 11 | double inv_n_m1, double *data, double *datat, 12 | double *cov); 13 | 14 | typedef struct { 15 | uint32_t m; 16 | uint32_t n; 17 | double inv_n; 18 | double inv_n_m1; 19 | double *data; 20 | double *cov; 21 | uint32_t m_tiles; 22 | covariance_fp_t funcptr; 23 | } covariance_args_t; 24 | -------------------------------------------------------------------------------- /sw/apps/covariance/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #include "snrt.h" 8 | 9 | #include "covariance.h" 10 | #include "data.h" 11 | 12 | int main() { 13 | covariance_job(&args); 14 | 15 | return 0; 16 | } 17 | -------------------------------------------------------------------------------- /sw/apps/doitgen/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | "r": 16, 7 | "q": 16, 8 | "s": 32, 9 | "r_tiles": 2, 10 | "q_tiles": 2, 11 | "funcptr": "doitgen_opt" 12 | } 13 | -------------------------------------------------------------------------------- /sw/apps/doitgen/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import numpy as np 9 | import sys 10 | from datagen import DoitgenDataGen 11 | 12 | from snitch.util.sim.verif_utils import Verifier 13 | 14 | 15 | class DoitgenVerifier(Verifier): 16 | 17 | OUTPUT_UIDS = ['A'] 18 | 19 | def __init__(self): 20 | super().__init__() 21 | self.func_args = { 22 | 'r': 'I', 23 | 'q': 'I', 24 | 's': 'I', 25 | 'A': 'I', 26 | 'x': 'I', 27 | 'r_tiles': 'I', 28 | 'q_tiles': 'I', 29 | 'funcptr': 'I' 30 | } 31 | self.func_args = self.get_input_from_symbol('args', self.func_args) 32 | 33 | def get_actual_results(self): 34 | return self.get_output_from_symbol(self.OUTPUT_UIDS[0], 'double') 35 | 36 | def get_expected_results(self): 37 | A = self.get_input_from_symbol('A', 'double') 38 | A = np.reshape(A, (self.func_args['r'], self.func_args['q'], self.func_args['s'])) 39 | x = self.get_input_from_symbol('x', 'double') 40 | x = np.reshape(x, (self.func_args['s'], self.func_args['s'])) 41 | return DoitgenDataGen().golden_model(A, x).flatten() 42 | 43 | def check_results(self, *args): 44 | return super().check_results(*args, rtol=1e-10) 45 | 46 | 47 | if __name__ == "__main__": 48 | sys.exit(DoitgenVerifier().main()) 49 | -------------------------------------------------------------------------------- /sw/apps/doitgen/src/args.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #pragma once 8 | #include 9 | 10 | typedef void (*doitgen_fp_t)(uint32_t r, uint32_t q, uint32_t s, double *A, 11 | double *x, double *Aout); 12 | 13 | typedef struct { 14 | uint32_t r; 15 | uint32_t q; 16 | uint32_t s; 17 | double *A; 18 | double *x; 19 | uint32_t r_tiles; 20 | uint32_t q_tiles; 21 | doitgen_fp_t funcptr; 22 | } doitgen_args_t; 23 | -------------------------------------------------------------------------------- /sw/apps/doitgen/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #include "snrt.h" 8 | 9 | #include "doitgen.h" 10 | 11 | #include "data.h" 12 | 13 | int main() { 14 | doitgen_job(&args); 15 | 16 | return 0; 17 | } 18 | -------------------------------------------------------------------------------- /sw/apps/exp/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | 7 | #include "math.h" 8 | #include "snrt.h" 9 | 10 | #include "vexpf.h" 11 | 12 | double a[LEN], b_golden[LEN], b_actual[LEN]; 13 | 14 | int main() { 15 | uint32_t tstart, tend; 16 | 17 | // Initialize input array 18 | if (snrt_cluster_core_idx() == 0) 19 | for (int i = 0; i < LEN; i++) a[i] = (float)i / LEN; 20 | 21 | // Calculate exponential of input array using reference implementation 22 | if (snrt_cluster_core_idx() == 0) { 23 | for (int i = 0; i < LEN; i++) { 24 | b_golden[i] = (double)expf((float)a[i]); 25 | } 26 | } 27 | 28 | // Synchronize cores 29 | snrt_cluster_hw_barrier(); 30 | 31 | // Calculate exponential of input array using vectorized implementation 32 | vexpf_kernel(a, b_actual); 33 | 34 | // Check if the results are correct 35 | if (snrt_cluster_core_idx() == 0) { 36 | uint32_t n_err = LEN; 37 | for (int i = 0; i < LEN; i++) { 38 | if ((float)b_golden[i] != (float)b_actual[i]) 39 | printf("Error: b_golden[%d] = %f, b_actual[%d] = %f\n", i, 40 | (float)b_golden[i], i, (float)b_actual[i]); 41 | else 42 | n_err--; 43 | } 44 | return n_err; 45 | } else 46 | return 0; 47 | } 48 | -------------------------------------------------------------------------------- /sw/apps/j3d27pt/Makefile: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | # Usage of absolute paths is required to externally include this Makefile 8 | MK_DIR := $(dir $(realpath $(lastword $(MAKEFILE_LIST)))) 9 | DATA_DIR := $(realpath $(MK_DIR)/data) 10 | SRC_DIR := $(realpath $(MK_DIR)/src) 11 | 12 | DATA_CFG ?= $(DATA_DIR)/params.json 13 | SECTION ?= 14 | 15 | APP ?= j3d27pt 16 | SRCS ?= $(realpath $(SRC_DIR)/main.c) 17 | INCDIRS ?= $(dir $(DATA_H)) $(SRC_DIR) 18 | 19 | DATAGEN_PY = $(MK_DIR)/scripts/datagen.py 20 | DATA_H ?= $(DATA_DIR)/data.h 21 | 22 | $(dir $(DATA_H)): 23 | mkdir -p $@ 24 | 25 | $(DATA_H): $(DATAGEN_PY) $(DATA_CFG) | $(dir $(DATA_H)) 26 | $< -c $(DATA_CFG) --section="$(SECTION)" > $@ 27 | 28 | .PHONY: clean-data clean 29 | 30 | clean-data: 31 | rm -f $(DATA_H) 32 | 33 | clean: clean-data 34 | -------------------------------------------------------------------------------- /sw/apps/j3d27pt/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | FAC: 3, 7 | NX: 16, 8 | NY: 16, 9 | NZ: 16 10 | } -------------------------------------------------------------------------------- /sw/apps/j3d27pt/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2023 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import sys 9 | from datagen import J3D27PTDataGen 10 | 11 | from snitch.util.sim.verif_utils import Verifier 12 | 13 | 14 | class J3D27PTVerifier(Verifier): 15 | 16 | OUTPUT_UIDS = ['A_'] 17 | 18 | def get_actual_results(self): 19 | return self.get_output_from_symbol('A_', 'double') 20 | 21 | def get_expected_results(self): 22 | FAC = self.get_input_from_symbol('fac', 'uint32_t') 23 | NX = self.get_input_from_symbol('nx', 'uint32_t') 24 | NY = self.get_input_from_symbol('ny', 'uint32_t') 25 | NZ = self.get_input_from_symbol('nz', 'uint32_t') 26 | C = self.get_input_from_symbol('c', 'double') 27 | A = self.get_input_from_symbol('A', 'double') 28 | return J3D27PTDataGen().golden_model(FAC, NX, NY, NZ, C, A) 29 | 30 | def check_results(self, *args): 31 | return super().check_results(*args, rtol=1e-10) 32 | 33 | 34 | if __name__ == "__main__": 35 | sys.exit(J3D27PTVerifier().main()) 36 | -------------------------------------------------------------------------------- /sw/apps/j3d27pt/src/j3d27pt.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Jayanth Jonnalagadda 6 | // Luca Colagrande 7 | 8 | #include "math.h" 9 | #include "snrt.h" 10 | #include "stdbool.h" 11 | #include "stdint.h" 12 | 13 | #include "j3d27pt_baseline1.h" 14 | #include "j3d27pt_baseline2.h" 15 | #include "j3d27pt_baseline3.h" 16 | #include "j3d27pt_baseline4.h" 17 | #include "j3d27pt_naive.h" 18 | #include "j3d27pt_opt1.h" 19 | #include "j3d27pt_opt2.h" 20 | 21 | #define IMPL_NAIVE 0 22 | #define IMPL_BASELINE_1 1 23 | #define IMPL_BASELINE_2 2 24 | #define IMPL_BASELINE_3 3 25 | #define IMPL_BASELINE_4 4 26 | #define IMPL_OPTIMIZED_1 5 27 | #define IMPL_OPTIMIZED_2 6 28 | 29 | #ifndef IMPL 30 | #define IMPL IMPL_OPTIMIZED_2 31 | #endif 32 | 33 | #if IMPL == IMPL_NAIVE 34 | #define FUNC_PTR j3d27pt_naive 35 | #elif IMPL == IMPL_BASELINE_1 36 | #define FUNC_PTR j3d27pt_baseline1 37 | #elif IMPL == IMPL_BASELINE_2 38 | #define FUNC_PTR j3d27pt_baseline2 39 | #elif IMPL == IMPL_BASELINE_3 40 | #define FUNC_PTR j3d27pt_baseline3 41 | #elif IMPL == IMPL_BASELINE_4 42 | #define FUNC_PTR j3d27pt_baseline4 43 | #elif IMPL == IMPL_OPTIMIZED_1 44 | #define FUNC_PTR j3d27pt_opt1 45 | #elif IMPL == IMPL_OPTIMIZED_2 46 | #define FUNC_PTR j3d27pt_opt2 47 | #endif 48 | 49 | // The Kernel 50 | static inline void j3d27pt(int fac, int nx, int ny, int nz, double* c, 51 | double* A, double* A_) { 52 | FUNC_PTR(fac, nx, ny, nz, c, A, A_); 53 | } -------------------------------------------------------------------------------- /sw/apps/j3d27pt/src/j3d27pt_naive.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Jayanth Jonnalagadda 6 | // Luca Colagrande 7 | 8 | // Pure C implementation no ISA extensions 9 | 10 | // The Kernel 11 | static inline void j3d27pt_naive(int fac, int nx, int ny, int nz, double* c, 12 | double* A, double* A_) { 13 | snrt_mcycle(); 14 | double fact = 1.0 / fac; 15 | for (int z = 1; z < nz - 1; z++) { 16 | for (int y = 1; y < ny - 1; y++) { 17 | for (int x = 1; x < nx - 1; x++) { 18 | double acc = 0.0; 19 | for (int dz = -1; dz <= 1; dz++) { 20 | for (int dy = -1; dy <= 1; dy++) { 21 | for (int dx = -1; dx <= 1; dx++) { 22 | acc += (c[((dz + 1) * 3 * 3) + ((dy + 1) * 3) + 23 | (dx + 1)] * 24 | A[((z + dz) * ny * nx) + ((y + dy) * nx) + 25 | (x + dx)]); 26 | } 27 | } 28 | } 29 | A_[(z * ny * nx) + (y * nx) + x] = fact * acc; 30 | } 31 | } 32 | } 33 | snrt_fpu_fence(); 34 | snrt_mcycle(); 35 | } -------------------------------------------------------------------------------- /sw/apps/j3d27pt/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Jayanth Jonnalagadda 6 | // Luca Colagrande 7 | 8 | #include "snrt.h" 9 | 10 | #include "data.h" 11 | #include "j3d27pt.h" 12 | 13 | int main() { 14 | double *local_A, *local_A_, *local_c; 15 | double *remote_A, *remote_A_, *remote_c; 16 | 17 | remote_A = A; 18 | remote_A_ = A_; 19 | remote_c = c; 20 | 21 | // Allocate space in TCDM 22 | local_A = (double *)snrt_l1_next(); 23 | local_c = local_A + nx * ny * nz; 24 | local_A_ = local_c + 27; 25 | 26 | // Copy data in TCDM 27 | if (snrt_is_dm_core()) { 28 | size_t size_A = nx * ny * nz * sizeof(double); 29 | size_t size_c = 27 * sizeof(double); 30 | snrt_dma_start_1d(local_A, remote_A, size_A); 31 | snrt_dma_start_1d(local_c, remote_c, size_c); 32 | snrt_dma_wait_all(); 33 | } 34 | snrt_cluster_hw_barrier(); 35 | 36 | // Compute 37 | if (snrt_cluster_core_idx() == 0) { 38 | j3d27pt(fac, nx, ny, nz, local_c, local_A, local_A_); 39 | } 40 | snrt_cluster_hw_barrier(); 41 | 42 | // Copy data out of TCDM 43 | if (snrt_is_dm_core()) { 44 | size_t size_A_ = nx * ny * nz * sizeof(double); 45 | snrt_dma_start_1d(remote_A_, local_A_, size_A_); 46 | snrt_dma_wait_all(); 47 | } 48 | snrt_cluster_hw_barrier(); 49 | 50 | return 0; 51 | } -------------------------------------------------------------------------------- /sw/apps/kbpcpa/Makefile: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | # Usage of absolute paths is required to externally include this Makefile 8 | MK_DIR := $(dir $(realpath $(lastword $(MAKEFILE_LIST)))) 9 | DATA_DIR := $(realpath $(MK_DIR)/data) 10 | SRC_DIR := $(realpath $(MK_DIR)/src) 11 | 12 | DATA_CFG ?= $(DATA_DIR)/params.json 13 | SECTION ?= 14 | 15 | APP ?= kbpcpa 16 | SRCS ?= $(realpath $(SRC_DIR)/main.c) 17 | INCDIRS ?= $(dir $(DATA_H)) $(SRC_DIR) 18 | 19 | DATAGEN_PY = $(MK_DIR)/scripts/datagen.py 20 | DATA_H ?= $(DATA_DIR)/data.h 21 | 22 | $(dir $(DATA_H)): 23 | mkdir -p $@ 24 | 25 | $(DATA_H): $(DATAGEN_PY) $(DATA_CFG) | $(dir $(DATA_H)) 26 | $< -c $(DATA_CFG) --section="$(SECTION)" > $@ 27 | 28 | .PHONY: clean-data clean 29 | 30 | clean-data: 31 | rm -f $(DATA_H) 32 | 33 | clean: clean-data 34 | -------------------------------------------------------------------------------- /sw/apps/kbpcpa/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | L: 1024 7 | } 8 | -------------------------------------------------------------------------------- /sw/apps/kbpcpa/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2023 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import sys 9 | from pathlib import Path 10 | from datagen import KbpcpaDataGen 11 | 12 | sys.path.append(str(Path(__file__).parent / '../../../../util/sim/')) 13 | from verif_utils import Verifier # noqa: E402 14 | 15 | 16 | class KbpcpaVerifier(Verifier): 17 | 18 | OUTPUT_UIDS = ['a'] 19 | 20 | def get_actual_results(self): 21 | return self.get_output_from_symbol('a', 'double') 22 | 23 | def get_expected_results(self): 24 | k = self.get_input_from_symbol('k', 'double') 25 | b = self.get_input_from_symbol('b', 'double') 26 | c = self.get_input_from_symbol('c', 'double') 27 | return KbpcpaDataGen().golden_model(k, b, c) 28 | 29 | def check_results(self, *args): 30 | return super().check_results(*args, rtol=1e-10) 31 | 32 | 33 | if __name__ == "__main__": 34 | sys.exit(KbpcpaVerifier().main()) 35 | -------------------------------------------------------------------------------- /sw/apps/kbpcpa/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Jayanth Jonnalagadda 6 | // Luca Colagrande 7 | 8 | #include "snrt.h" 9 | 10 | #include "data.h" 11 | #include "kbpcpa.h" 12 | 13 | int main() { 14 | double *local_a, *local_b, *local_c; 15 | double *remote_a, *remote_b, *remote_c; 16 | 17 | remote_b = b; 18 | remote_c = c; 19 | remote_a = a; 20 | 21 | // Allocate space in TCDM 22 | local_b = (double *)snrt_l1_next(); 23 | local_c = local_b + L; 24 | local_a = local_c + L; 25 | 26 | // Copy data in TCDM 27 | if (snrt_is_dm_core()) { 28 | size_t size = L * sizeof(double); 29 | snrt_dma_start_1d(local_b, remote_b, size); 30 | snrt_dma_start_1d(local_c, remote_c, size); 31 | snrt_dma_wait_all(); 32 | } 33 | snrt_cluster_hw_barrier(); 34 | 35 | // Compute 36 | if (snrt_cluster_core_idx() == 0) { 37 | kbpcpa(L, k, local_a, local_b, local_c); 38 | } 39 | snrt_cluster_hw_barrier(); 40 | 41 | // Copy data out of TCDM 42 | if (snrt_is_dm_core()) { 43 | size_t size = L * sizeof(double); 44 | snrt_dma_start_1d(remote_a, local_a, size); 45 | snrt_dma_wait_all(); 46 | } 47 | snrt_cluster_hw_barrier(); 48 | 49 | return 0; 50 | } -------------------------------------------------------------------------------- /sw/apps/kmeans/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | n_clusters: 3, 7 | n_features: 2, 8 | n_samples: 128, 9 | max_iter: 3, 10 | seed: 42 11 | } 12 | -------------------------------------------------------------------------------- /sw/apps/kmeans/src/args.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #pragma once 8 | #include 9 | 10 | typedef struct { 11 | uint32_t n_samples; 12 | uint32_t n_features; 13 | uint32_t n_clusters; 14 | uint32_t n_iter; 15 | uint64_t samples_addr; 16 | uint64_t centroids_addr; 17 | } kmeans_args_t; 18 | -------------------------------------------------------------------------------- /sw/apps/kmeans/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #include 8 | 9 | #include "data.h" 10 | #include "kmeans.h" 11 | 12 | int main() { 13 | kmeans_args_t args = {n_samples, n_features, n_clusters, 14 | n_iter, (uint64_t)samples, (uint64_t)centroids}; 15 | kmeans_job(&args); 16 | return 0; 17 | } 18 | -------------------------------------------------------------------------------- /sw/apps/log/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | 7 | #include "math.h" 8 | #include "snrt.h" 9 | 10 | #include "vlogf.h" 11 | 12 | float a[LEN]; 13 | double b_golden[LEN], b_actual[LEN]; 14 | 15 | int main() { 16 | uint32_t tstart, tend; 17 | 18 | // Initialize input array 19 | if (snrt_cluster_core_idx() == 0) 20 | for (int i = 0; i < LEN; i++) a[i] = (float)(i + 1) / LEN; 21 | 22 | // Calculate logarithm of input array using reference implementation 23 | if (snrt_cluster_core_idx() == 0) { 24 | for (int i = 0; i < LEN; i++) { 25 | b_golden[i] = (double)logf(a[i]); 26 | } 27 | } 28 | 29 | // Synchronize cores 30 | snrt_cluster_hw_barrier(); 31 | 32 | // Calculate logarithm of input array using vectorized implementation 33 | vlogf_kernel(a, b_actual); 34 | 35 | // Check if the results are correct 36 | if (snrt_cluster_core_idx() == 0) { 37 | uint32_t n_err = LEN; 38 | for (int i = 0; i < LEN; i++) { 39 | if ((float)b_golden[i] != (float)b_actual[i]) 40 | printf("Error: b_golden[%d] = %f, b_actual[%d] = %f\n", i, 41 | (float)b_golden[i], i, (float)b_actual[i]); 42 | else 43 | n_err--; 44 | } 45 | return n_err; 46 | } else 47 | return 0; 48 | } 49 | -------------------------------------------------------------------------------- /sw/apps/prng/prng.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | 7 | #include 8 | 9 | #define MAX_UINT_PLUS1 4294967296.0 10 | 11 | __thread double max_uint_plus_1_inverse = (double)1.0 / (double)MAX_UINT_PLUS1; 12 | 13 | // Normalize integer PRN to [0, 1) range 14 | double rand_int_to_unit_double(uint32_t x) { 15 | return (double)x * max_uint_plus_1_inverse; 16 | } 17 | 18 | #include "lcg.h" 19 | #include "splitmix64.h" 20 | #include "xoshiro128p.h" 21 | -------------------------------------------------------------------------------- /sw/apps/prng/splitmix64.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Lannan Jiang 6 | // Luca Colagrande 7 | 8 | typedef struct { 9 | uint64_t state; 10 | } splitmix64_t; 11 | 12 | splitmix64_t splitmix64_init(uint64_t seed) { 13 | splitmix64_t sp64 = {.state = seed}; 14 | return sp64; 15 | } 16 | 17 | uint64_t splitmix64_next(splitmix64_t* sp64) { 18 | uint64_t z = (sp64->state += 0x9e3779b97f4a7c15); 19 | z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9; 20 | z = (z ^ (z >> 27)) * 0x94d049bb133111eb; 21 | return z ^ (z >> 31); 22 | } 23 | -------------------------------------------------------------------------------- /sw/blas/__init__.py: -------------------------------------------------------------------------------- 1 | # Copyright 2024 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | from . import gemm 8 | 9 | __all__ = ['gemm'] 10 | -------------------------------------------------------------------------------- /sw/blas/axpy/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | "n_tiles": 5, 7 | "n": 2560, 8 | "funcptr": "axpy_opt" 9 | } 10 | -------------------------------------------------------------------------------- /sw/blas/axpy/roi.json: -------------------------------------------------------------------------------- 1 | [ 2 | <% n_tiles = 5 %> 3 | 4 | // Compute cores 5 | % for j in range(0, 8): 6 | { 7 | "thread": "${f'hart_{j}'}", 8 | "roi": [ 9 | % for i in range(0, n_tiles): 10 | {"idx": ${2 * i + 1}, "label": "${f'tile_{i}'}"}, 11 | % endfor 12 | ] 13 | }, 14 | % endfor 15 | 16 | // DMA core 17 | { 18 | "thread": "hart_8", 19 | "roi": [ 20 | {"idx": 1, "label": "tile_0_in"}, 21 | % for i in range(1, n_tiles): 22 | {"idx": ${4 * (i - 1) + 3}, "label": "${f'tile_{i}_in'}"}, 23 | {"idx": ${4 * (i - 1) + 5}, "label": "${f'tile_{i-1}_out'}"}, 24 | % endfor 25 | {"idx": ${4 * (i - 1) + 7}, "label": "${f'tile_{n_tiles-1}_out'}"}, 26 | ] 27 | } 28 | ] -------------------------------------------------------------------------------- /sw/blas/axpy/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2023 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import sys 9 | from datagen import AxpyDataGen 10 | 11 | from snitch.util.sim.verif_utils import Verifier 12 | 13 | 14 | class AxpyVerifier(Verifier): 15 | 16 | OUTPUT_UIDS = ['z'] 17 | 18 | def get_actual_results(self): 19 | return self.get_output_from_symbol('z', 'double') 20 | 21 | def get_expected_results(self): 22 | a = self.get_input_from_symbol('a', 'double') 23 | x = self.get_input_from_symbol('x', 'double') 24 | y = self.get_input_from_symbol('y', 'double') 25 | return AxpyDataGen().golden_model(a, x, y) 26 | 27 | def check_results(self, *args): 28 | return super().check_results(*args, rtol=1e-10) 29 | 30 | 31 | if __name__ == "__main__": 32 | sys.exit(AxpyVerifier().main()) 33 | -------------------------------------------------------------------------------- /sw/blas/axpy/src/args.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | #include 7 | 8 | typedef void (*axpy_fp_t)(uint32_t n, double a, double* x, double* y, 9 | double* z); 10 | 11 | typedef struct { 12 | uint32_t n; 13 | double a; 14 | double* x; 15 | double* y; 16 | double* z; 17 | uint32_t n_tiles; 18 | axpy_fp_t funcptr; 19 | } axpy_args_t; 20 | -------------------------------------------------------------------------------- /sw/blas/axpy/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "snrt.h" 6 | 7 | #include "axpy.h" 8 | #include "data.h" 9 | 10 | int main() { 11 | axpy_job(&args); 12 | 13 | // TODO: currently only works for single cluster otherwise need to 14 | // synchronize all cores here 15 | #ifdef BIST 16 | uint32_t n = args.n; 17 | double* z = args.z; 18 | uint32_t nerr = n; 19 | 20 | // Check computation is correct 21 | if (snrt_global_core_idx() == 0) { 22 | for (int i = 0; i < n; i++) { 23 | if (z[i] == g[i]) nerr--; 24 | printf("%d %d\n", z[i], g[i]); 25 | } 26 | } 27 | 28 | return nerr; 29 | #endif 30 | 31 | return 0; 32 | } 33 | -------------------------------------------------------------------------------- /sw/blas/blas.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | // Floating-point multiplications by zero cannot be optimized as in some 8 | // edge cases they do not yield zero: 9 | // - 0f * NaN = NaN 10 | // - 0f * INFINITY == NaN 11 | // Thus in order to optimize it, we need to test for zero. You can use this 12 | // function for free when `multiplier` is a constant. 13 | static inline double multiply_opt(double multiplicand, double multiplier) { 14 | if (multiplier) 15 | return multiplicand * multiplier; 16 | else 17 | return 0; 18 | } 19 | 20 | #include "axpy/src/axpy.h" 21 | #include "dot/src/dot.h" 22 | #include "gemm/src/gemm.h" 23 | #include "gemv/src/gemv.h" 24 | #include "syrk/src/syrk.h" 25 | -------------------------------------------------------------------------------- /sw/blas/dot/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | n: 4096 7 | } 8 | -------------------------------------------------------------------------------- /sw/blas/dot/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | 6 | import sys 7 | from datagen import DotDataGen 8 | 9 | from snitch.util.sim.verif_utils import Verifier 10 | 11 | 12 | class DotVerifier(Verifier): 13 | 14 | OUTPUT_UIDS = ['result'] 15 | 16 | def get_actual_results(self): 17 | return self.get_output_from_symbol('result', 'double') 18 | 19 | def get_expected_results(self): 20 | x = self.get_input_from_symbol('x', 'double') 21 | y = self.get_input_from_symbol('y', 'double') 22 | return DotDataGen().golden_model(x, y) 23 | 24 | def check_results(self, *args): 25 | return super().check_results(*args, rtol=1e-10) 26 | 27 | 28 | if __name__ == "__main__": 29 | sys.exit(DotVerifier().main()) 30 | -------------------------------------------------------------------------------- /sw/blas/dot/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "snrt.h" 6 | 7 | #include "data.h" 8 | #include "dot.h" 9 | 10 | int main() { 11 | dot(n, x, y, &result); 12 | 13 | // TODO: currently only works for single cluster otherwise need to 14 | // synchronize all cores here 15 | #ifdef BIST 16 | uint32_t nerr = 1; 17 | 18 | // Check computation is correct 19 | if (snrt_global_core_idx() == 0) { 20 | if (result == g) nerr--; 21 | return nerr; 22 | } 23 | 24 | #endif 25 | 26 | return 0; 27 | } 28 | -------------------------------------------------------------------------------- /sw/blas/gemm/__init__.py: -------------------------------------------------------------------------------- 1 | # Copyright 2024 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | from .scripts.datagen import GemmDataGen 8 | 9 | __all__ = ['GemmDataGen'] 10 | -------------------------------------------------------------------------------- /sw/blas/gemm/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: true, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp32_opt" 23 | } 24 | -------------------------------------------------------------------------------- /sw/blas/gemv/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | alpha: 2, 7 | trans: false, 8 | m: 13, 9 | n: 16 10 | } 11 | -------------------------------------------------------------------------------- /sw/blas/gemv/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #include "gemv.h" 8 | 9 | #include "data.h" 10 | #include "snrt.h" 11 | 12 | int main() { 13 | uint32_t trans = args.trans; 14 | uint32_t m = args.m; 15 | uint32_t n = args.n; 16 | double alpha = args.alpha; 17 | double *a = args.a; 18 | double *x = args.x; 19 | double *y = args.y; 20 | 21 | uint32_t size_a = m * n * sizeof(double); 22 | uint32_t size_x = n * sizeof(double); 23 | uint32_t size_y = m * sizeof(double); 24 | 25 | double *local_a = snrt_l1_alloc_cluster_local(size_a, sizeof(double)); 26 | double *local_x = snrt_l1_alloc_cluster_local(size_x, sizeof(double)); 27 | double *local_y = snrt_l1_alloc_cluster_local(size_y, sizeof(double)); 28 | 29 | if (snrt_is_dm_core()) { 30 | snrt_dma_start_1d(local_a, a, size_a); 31 | snrt_dma_start_1d(local_x, x, size_x); 32 | } 33 | 34 | snrt_cluster_hw_barrier(); 35 | 36 | if (snrt_is_compute_core()) { 37 | gemv(trans, m, n, alpha, local_a, local_x, 1, local_y); 38 | } 39 | 40 | snrt_cluster_hw_barrier(); 41 | 42 | if (snrt_is_dm_core()) { 43 | snrt_dma_start_1d(y, local_y, size_y); 44 | } 45 | 46 | return 0; 47 | } 48 | -------------------------------------------------------------------------------- /sw/blas/syrk/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | "m": 8, 7 | "n": 2, 8 | "alpha": 1.5, 9 | "beta": 3.2, 10 | "m_tiles": 1, 11 | "funcptr": "syrk_opt" 12 | } 13 | -------------------------------------------------------------------------------- /sw/blas/syrk/src/args.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #pragma once 8 | #include 9 | 10 | typedef void (*syrk_fp_t)(uint32_t m, uint32_t n, double alpha, double *a, 11 | double *at, double beta, double *b); 12 | 13 | typedef struct { 14 | uint32_t m; 15 | uint32_t n; 16 | double alpha; 17 | double beta; 18 | double *a; 19 | double *c; 20 | uint32_t m_tiles; 21 | syrk_fp_t funcptr; 22 | } syrk_args_t; 23 | -------------------------------------------------------------------------------- /sw/blas/syrk/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Author: Luca Colagrande 6 | 7 | #include "snrt.h" 8 | 9 | #include "blas.h" 10 | #include "data.h" 11 | 12 | int main() { 13 | syrk_job(&args); 14 | 15 | return 0; 16 | } 17 | -------------------------------------------------------------------------------- /sw/dnn/batchnorm/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | input_dim: { 7 | channels: 32, 8 | height: 8, 9 | width: 8 10 | }, 11 | tile_ci: 32, 12 | prec: "FP64" 13 | } 14 | -------------------------------------------------------------------------------- /sw/dnn/batchnorm/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "dnn.h" 6 | 7 | #include "data.h" 8 | 9 | int main() { 10 | batchnorm_layer(&layer); 11 | 12 | snrt_global_barrier(); 13 | 14 | return 0; 15 | } 16 | -------------------------------------------------------------------------------- /sw/dnn/common.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | include $(SN_ROOT)/sw/apps/common.mk 8 | $(APP)_INCDIRS += $(SN_ROOT)/sw/dnn/src 9 | $(APP)_INCDIRS += $(SN_ROOT)/sw/blas 10 | -------------------------------------------------------------------------------- /sw/dnn/concat/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | num_inputs: 1, 7 | input_shape: [32, 4], 8 | dtype: "FP64" 9 | } -------------------------------------------------------------------------------- /sw/dnn/concat/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | 7 | #include "dnn.h" 8 | 9 | #include "data.h" 10 | 11 | int main() { 12 | uint32_t nerr = concat_layer(layer); 13 | return nerr; 14 | } 15 | -------------------------------------------------------------------------------- /sw/dnn/conv2d/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | // Parameters for a single Conv2d layer 6 | 7 | { 8 | channels: { 9 | out: 8, 10 | in: 32 11 | }, 12 | input_dim: { 13 | mini_batch: 1, 14 | height: 4, 15 | width: 8 16 | }, 17 | filter: { 18 | height: 3, 19 | width: 3, 20 | padding: 1, // width//2 21 | stride: 1 22 | }, 23 | prec: "FP64" 24 | } 25 | -------------------------------------------------------------------------------- /sw/dnn/conv2d/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | // SW testbench for profiling Conv2d Layer 6 | // Automatically checks the correctness of the results 7 | 8 | #include "conv2d.h" 9 | #include "dnn.h" 10 | #include "snrt.h" 11 | 12 | #include "data.h" 13 | 14 | int main() { 15 | layer.ifmap = (double*)conv2d_ifmap_dram; 16 | layer.weights = (double*)conv2d_weights_dram; 17 | layer.ofmap = (double*)conv2d_ofmap_dram; 18 | layer.TILE_CI = min(32, layer.CI); 19 | layer.pad = (layer.FH - 1) / 2; 20 | layer.cluster2cluster = 0; 21 | 22 | const conv_layer l1_conv2d_l = layer; 23 | 24 | conv2d_layer(&l1_conv2d_l); 25 | 26 | snrt_global_barrier(); 27 | 28 | return 0; 29 | } 30 | -------------------------------------------------------------------------------- /sw/dnn/flashattention_2/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | L: 16, 7 | S: 16, 8 | d: 16, 9 | B_r: 16, 10 | B_c: 16, 11 | dtype: "FP16", 12 | baseline: true 13 | } -------------------------------------------------------------------------------- /sw/dnn/flashattention_2/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | 7 | #include "blas.h" 8 | #include "dnn.h" 9 | 10 | #include "data.h" 11 | 12 | int main() { 13 | flashattention_2_layer(layer); 14 | return 0; 15 | } 16 | -------------------------------------------------------------------------------- /sw/dnn/fused_concat_linear/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | num_inputs: 1, 7 | input_shape: [32, 4], 8 | output_shape: [32, 16], 9 | dtype: "FP64", 10 | gemm_implementation: "gemm_fp64_naive" 11 | } -------------------------------------------------------------------------------- /sw/dnn/fused_concat_linear/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | 7 | #include "dnn.h" 8 | 9 | #include "data.h" 10 | 11 | int main() { 12 | uint32_t nerr = fused_concat_linear_layer(layer); 13 | return nerr; 14 | } 15 | -------------------------------------------------------------------------------- /sw/dnn/fusedconv/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | // Parameters for a fused Conv layer 6 | 7 | { 8 | ch_in: 16, 9 | ch_out: 16, 10 | dim_in_x: 5, 11 | dim_in_y: 5, 12 | dim_kernel_x: 3, 13 | dim_kernel_y: 3, 14 | padding: { 15 | padding_x_left: 0, 16 | padding_x_right: 0, 17 | padding_y_top: 0, 18 | padding_y_bottom: 0 19 | }, 20 | stride: { 21 | stride_x: 1, 22 | stride_y: 1, 23 | }, 24 | flags: { 25 | flag_y_accumulate_start: 0, 26 | flag_y_accumulate_end: 1, 27 | flag_relu: 1, 28 | flag_batch_norm: 1 29 | }, 30 | depthwise: 0, 31 | chw_layer: 0, 32 | prec: "FP32" 33 | } -------------------------------------------------------------------------------- /sw/dnn/gelu/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | size: 64, 7 | prec: "FP64" 8 | } -------------------------------------------------------------------------------- /sw/dnn/gelu/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2023 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import sys 9 | import torch 10 | from datagen import golden_model 11 | 12 | from snitch.util.sim.verif_utils import Verifier 13 | from snitch.util.sim.data_utils import ctype_from_precision_t 14 | 15 | 16 | class GeluVerifier(Verifier): 17 | 18 | OUTPUT_UIDS = ['ofmap'] 19 | 20 | def __init__(self): 21 | super().__init__() 22 | self.layer_struct = { 23 | 'size': 'I', 24 | 'ifmap': 'I', 25 | 'ofmap': 'I', 26 | 'dtype': 'I' 27 | } 28 | self.layer = self.get_input_from_symbol('layer', self.layer_struct) 29 | self.prec = self.layer['dtype'] 30 | 31 | def get_actual_results(self): 32 | return self.get_output_from_symbol('ofmap', ctype_from_precision_t(self.prec)) 33 | 34 | def get_expected_results(self): 35 | ifmap = self.get_input_from_symbol('ifmap', ctype_from_precision_t(self.prec)) 36 | ifmap = torch.from_numpy(ifmap) 37 | return golden_model(ifmap).detach().numpy().flatten() 38 | 39 | def check_results(self, *args): 40 | return super().check_results(*args, rtol=1E-10) 41 | 42 | 43 | if __name__ == "__main__": 44 | sys.exit(GeluVerifier().main()) 45 | -------------------------------------------------------------------------------- /sw/dnn/gelu/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "dnn.h" 6 | 7 | #include "data.h" 8 | 9 | int main() { gelu_layer(layer); } -------------------------------------------------------------------------------- /sw/dnn/layernorm/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | input_dim: { 7 | batch_size: 2, 8 | seq_len: 64, 9 | embeddings: 32 10 | }, 11 | eps: 1e-5, 12 | prec: "FP32", 13 | n_tiles: 2, 14 | implementation: "OPT" 15 | } -------------------------------------------------------------------------------- /sw/dnn/layernorm/layout.csv: -------------------------------------------------------------------------------- 1 | , setup, dma in, compute tile, dma out, dma in, compute tile, dma out 2 | "[i*9+j+cfg['cluster']['cluster_base_hartid'] for i in range(cfg['s1_quadrant']['nr_clusters']) for j in range(8)]", 1, , 3, , , 5, 3 | "[i*9+8+cfg['cluster']['cluster_base_hartid'] for i in range(cfg['s1_quadrant']['nr_clusters'])]" , 1, 2, , 4, 5, , 7 4 | -------------------------------------------------------------------------------- /sw/dnn/layernorm/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | 7 | #include "dnn.h" 8 | 9 | #include "data.h" 10 | 11 | int main() { 12 | layernorm_layer(layer); 13 | return 0; 14 | } 15 | -------------------------------------------------------------------------------- /sw/dnn/maxpool/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | channels: { 7 | out: 32, 8 | in: 32 9 | }, 10 | input_dim: { 11 | height: 8, 12 | width: 8 13 | }, 14 | kernel_size: 2, 15 | tile_ci: 32, 16 | prec: "FP64" 17 | } 18 | -------------------------------------------------------------------------------- /sw/dnn/maxpool/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | // SW testbench for profiling MaxPool Layer 6 | // Automatically checks the correctness of the results 7 | 8 | #include "dnn.h" 9 | 10 | #include "data.h" 11 | 12 | int main() { 13 | maxpool_layer(&layer); 14 | 15 | snrt_global_barrier(); 16 | return 0; 17 | } 18 | -------------------------------------------------------------------------------- /sw/dnn/softmax/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | input_dim: { 7 | batch_size: 3, 8 | seq_len: 16, 9 | input_samples: 4 10 | }, 11 | reduce_dim: -1, 12 | prec: "FP32" 13 | } -------------------------------------------------------------------------------- /sw/dnn/softmax/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | 7 | #include "dnn.h" 8 | 9 | #include "data.h" 10 | 11 | int main() { 12 | softmax_layer(layer); 13 | return 0; 14 | } 15 | -------------------------------------------------------------------------------- /sw/dnn/transpose/data/params.json: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | M: 64, 7 | N: 32, 8 | prec: "FP64", 9 | baseline: false 10 | } 11 | -------------------------------------------------------------------------------- /sw/dnn/transpose/scripts/verify.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import sys 9 | from datagen import TransposeDataGen 10 | 11 | from snitch.util.sim.verif_utils import Verifier 12 | from snitch.util.sim.data_utils import ctype_from_precision_t 13 | 14 | 15 | class TransposeVerifier(Verifier): 16 | 17 | OUTPUT_UIDS = ['output'] 18 | 19 | def __init__(self): 20 | super().__init__() 21 | self.layer_struct = { 22 | 'M': 'I', 23 | 'N': 'I', 24 | 'input_ptr': 'I', 25 | 'output_ptr': 'I', 26 | 'dtype': 'I', 27 | 'baseline': 'I' 28 | } 29 | self.layer = self.get_input_from_symbol('layer', self.layer_struct) 30 | self.M = self.layer['M'] 31 | self.N = self.layer['N'] 32 | self.prec = self.layer['dtype'] 33 | 34 | def get_actual_results(self): 35 | return self.get_output_from_symbol('output', ctype_from_precision_t(self.prec)) 36 | 37 | def get_expected_results(self): 38 | inp = self.get_input_from_symbol('input', ctype_from_precision_t(self.prec)) 39 | inp = inp.reshape(self.M, self.N) 40 | return TransposeDataGen().golden_model(inp) 41 | 42 | def check_results(self, *args): 43 | return super().check_results(*args, atol=0) 44 | 45 | 46 | if __name__ == "__main__": 47 | sys.exit(TransposeVerifier().main()) 48 | -------------------------------------------------------------------------------- /sw/dnn/transpose/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | 7 | #include "dnn.h" 8 | 9 | #include "data.h" 10 | 11 | int main() { 12 | transpose_layer(layer); 13 | return 0; 14 | } 15 | -------------------------------------------------------------------------------- /sw/saris/.gitignore: -------------------------------------------------------------------------------- 1 | bin 2 | dump 3 | gen 4 | -------------------------------------------------------------------------------- /sw/saris/runtime/runtime.hpp: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | // C linkage macros 8 | #ifdef __cplusplus 9 | #define EXTERN_C extern "C" 10 | #define EXTERN_C_BEGIN extern "C" { 11 | #define EXTERN_C_END } 12 | #else 13 | #define EXTERN_C 14 | #define EXTERN_C_BEGIN 15 | #define EXTERN_C_END 16 | #endif 17 | 18 | // Include C runtime, ignoring benign CXX-only warnings 19 | EXTERN_C_BEGIN 20 | #pragma GCC diagnostic push 21 | #pragma GCC diagnostic ignored "-Wdeprecated-register" 22 | #include "runtime.h" 23 | #pragma GCC diagnostic pop 24 | EXTERN_C_END 25 | -------------------------------------------------------------------------------- /sw/saris/util/eval.cpp.tpl: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "runtime.hpp" 6 | #include "istc.par.hpp" 7 | #include "istc.issr.hpp" 8 | 9 | ${datadecls} 10 | ${bundledecls} 11 | 12 | ${ctgrids} 13 | 14 | ${ciparams} 15 | 16 | TCDMDECL volatile uint32_t err_sema = 0; 17 | 18 | EXTERN_C int smain(uint32_t core_id, uint32_t core_num, void* tcdm_start, void* tcdm_end) { 19 | 20 | // Kick DMCC 21 | if (core_id == core_num-1) { 22 | __rt_barrier(); 23 | 24 | % for i in range(nbarriers): 25 | // Kernel ${i} 26 | ${indent(dma_transfers, " "*8)} 27 | __rt_barrier(); 28 | % endfor 29 | goto past_knl; 30 | } 31 | 32 | __rt_barrier(); 33 | __rt_get_timer(); 34 | % for k in kernels: 35 | ${k[1]}; 36 | __rt_get_timer(); 37 | % endfor 38 | 39 | past_knl: 40 | % for name, touch in touches.items(): 41 | if (core_id == 0) printf("touching `${name}`\n"); 42 | __istc_touch_grid( 43 | core_id, core_num, ${touch['stride']}, 44 | ${touch['ptr']}, ${touch['len']}, &err_sema 45 | ); 46 | % endfor 47 | % for i, check in enumerate(checks): 48 | if (core_id == 0) printf("Performing check ${i}\n"); 49 | __istc_cmp_grids( 50 | core_id, core_num, ${check['stride']}, 51 | ${check['a']}, ${check['b']}, ${check['len']}, ${check['eps']}, 52 | &err_sema 53 | ); 54 | % endfor 55 | 56 | return err_sema; 57 | } 58 | 59 | ${datainits} 60 | -------------------------------------------------------------------------------- /sw/snRuntime/api/alloc_decls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #include 8 | #include 9 | 10 | typedef struct { 11 | // Base address from where allocation starts 12 | uint32_t base; 13 | // End address up to which allocation is allowed 14 | uint32_t end; 15 | // Address of the next allocated block 16 | uint32_t next; 17 | } snrt_allocator_t; 18 | 19 | inline void *snrt_l1_next(); 20 | 21 | inline void *snrt_l3_next(); 22 | 23 | inline void *snrt_l1_alloc(size_t size); 24 | 25 | inline void snrt_l1_update_next(void *next); 26 | 27 | inline void *snrt_l3_alloc(size_t size); 28 | 29 | inline void snrt_alloc_init(); 30 | -------------------------------------------------------------------------------- /sw/snRuntime/api/cls_decls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #include 8 | 9 | #include "alloc_decls.h" 10 | 11 | typedef struct { 12 | uint32_t hw_barrier; 13 | uint32_t reduction; 14 | snrt_allocator_t l1_allocator; 15 | } cls_t; 16 | 17 | inline cls_t* cls(); 18 | -------------------------------------------------------------------------------- /sw/snRuntime/api/cluster_interrupt_decls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #include 8 | 9 | inline void snrt_int_cluster_set(uint32_t mask); 10 | 11 | inline void snrt_int_cluster_clr(uint32_t mask); 12 | 13 | inline void snrt_int_clr_mcip_unsafe(); 14 | 15 | inline void snrt_int_clr_mcip(); 16 | 17 | inline void snrt_int_set_mcip(); 18 | -------------------------------------------------------------------------------- /sw/snRuntime/api/global_interrupt_decls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #include 8 | 9 | inline void snrt_int_sw_clear(uint32_t hartid); 10 | 11 | inline void snrt_int_sw_set(uint32_t hartid); 12 | 13 | inline uint32_t snrt_int_sw_get(uint32_t hartid); 14 | -------------------------------------------------------------------------------- /sw/snRuntime/api/memory_decls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #include 8 | 9 | inline uint32_t __attribute__((const)) snrt_l1_start_addr(); 10 | 11 | inline uint32_t __attribute__((const)) snrt_l1_end_addr(); 12 | 13 | inline volatile uint32_t* __attribute__((const)) snrt_clint_mutex_ptr(); 14 | 15 | inline volatile uint32_t* __attribute__((const)) snrt_clint_msip_ptr(); 16 | 17 | inline volatile uint32_t* __attribute__((const)) snrt_cluster_clint_set_ptr(); 18 | 19 | inline volatile uint32_t* __attribute__((const)) snrt_cluster_clint_clr_ptr(); 20 | -------------------------------------------------------------------------------- /sw/snRuntime/api/riscv_decls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #include 8 | 9 | #define R_TYPE_ENCODE(funct7, rs2, rs1, funct3, rd, opcode) \ 10 | ((funct7 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) | \ 11 | (opcode)) 12 | 13 | #define OP_CUSTOM1 0b0101011 14 | 15 | inline void snrt_wfi(); 16 | 17 | inline uint32_t snrt_mcycle(); 18 | 19 | inline void snrt_interrupt_enable(uint32_t irq); 20 | 21 | inline void snrt_interrupt_disable(uint32_t irq); 22 | 23 | inline void snrt_interrupt_global_enable(void); 24 | 25 | inline void snrt_interrupt_global_disable(void); 26 | -------------------------------------------------------------------------------- /sw/snRuntime/api/start_decls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | inline void snrt_exit(int exit_code); 8 | 9 | inline uint32_t snrt_cls_base_addr(); 10 | -------------------------------------------------------------------------------- /sw/snRuntime/api/sync_decls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #include 8 | 9 | typedef struct { 10 | uint32_t volatile cnt; 11 | uint32_t volatile iteration; 12 | } snrt_barrier_t; 13 | 14 | extern volatile uint32_t _snrt_mutex; 15 | extern volatile snrt_barrier_t _snrt_barrier; 16 | extern volatile uint32_t _reduction_result; 17 | 18 | inline volatile uint32_t *snrt_mutex(); 19 | 20 | inline void snrt_mutex_acquire(volatile uint32_t *pmtx); 21 | 22 | inline void snrt_mutex_ttas_acquire(volatile uint32_t *pmtx); 23 | 24 | inline void snrt_mutex_release(volatile uint32_t *pmtx); 25 | 26 | inline void snrt_cluster_hw_barrier(); 27 | 28 | inline void snrt_global_barrier(); 29 | 30 | inline uint32_t snrt_global_all_to_all_reduction(uint32_t value); 31 | 32 | inline void snrt_wait_writeback(uint32_t val); 33 | -------------------------------------------------------------------------------- /sw/snRuntime/api/team_decls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #include 8 | 9 | inline uint32_t __attribute__((const)) snrt_hartid(); 10 | inline uint32_t __attribute__((const)) snrt_cluster_num(); 11 | inline uint32_t __attribute__((const)) snrt_cluster_core_num(); 12 | inline uint32_t __attribute__((const)) snrt_global_core_base_hartid(); 13 | inline uint32_t __attribute__((const)) snrt_global_core_num(); 14 | inline uint32_t __attribute__((const)) snrt_global_core_idx(); 15 | inline uint32_t __attribute__((const)) snrt_cluster_idx(); 16 | inline uint32_t __attribute__((const)) snrt_cluster_core_idx(); 17 | inline uint32_t __attribute__((const)) snrt_cluster_dm_core_num(); 18 | inline uint32_t __attribute__((const)) snrt_cluster_compute_core_num(); 19 | inline int __attribute__((const)) snrt_is_compute_core(); 20 | inline int __attribute__((const)) snrt_is_dm_core(); 21 | -------------------------------------------------------------------------------- /sw/snRuntime/src/alloc.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | snrt_allocator_t l3_allocator; 6 | 7 | extern volatile uint32_t *snrt_zero_memory_ptr(); 8 | 9 | extern void *snrt_l1_next(); 10 | extern void *snrt_l3_next(); 11 | 12 | extern uint32_t snrt_l1_start_addr(); 13 | extern uint32_t snrt_l1_end_addr(); 14 | 15 | extern void *snrt_l1_alloc(size_t size); 16 | extern void *snrt_l3_alloc(size_t size); 17 | 18 | extern snrt_allocator_t *snrt_l1_allocator(); 19 | extern snrt_allocator_t *snrt_l3_allocator(); 20 | 21 | extern void snrt_l1_update_next(void *next); 22 | 23 | extern void snrt_alloc_init(); 24 | -------------------------------------------------------------------------------- /sw/snRuntime/src/alloc_v2.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | __thread snrt_allocator_t l1_allocator_v2; 6 | 7 | extern void *snrt_l1_next_v2(); 8 | 9 | extern void *snrt_l1_alloc_cluster_local(size_t size, size_t alignment); 10 | extern void *snrt_l1_alloc_compute_core_local(size_t size, size_t alignment); 11 | 12 | extern void *snrt_remote_l1_ptr(void *ptr, uint32_t src_cluster_idx, 13 | uint32_t dst_cluster_idx); 14 | 15 | extern void snrt_alloc_init_v2(); 16 | -------------------------------------------------------------------------------- /sw/snRuntime/src/cls.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | __thread cls_t* _cls_ptr; 6 | 7 | cls_t __attribute__((section(".cbss"))) _cls; 8 | 9 | extern cls_t* cls(); 10 | -------------------------------------------------------------------------------- /sw/snRuntime/src/cls.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | extern __thread cls_t* _cls_ptr; 8 | 9 | inline cls_t* cls() { return _cls_ptr; } 10 | -------------------------------------------------------------------------------- /sw/snRuntime/src/cluster_interrupts.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | extern void snrt_int_cluster_set(uint32_t mask); 6 | 7 | extern void snrt_int_cluster_clr(uint32_t mask); 8 | 9 | extern void snrt_int_clr_mcip(); 10 | 11 | extern void snrt_int_set_mcip(); 12 | -------------------------------------------------------------------------------- /sw/snRuntime/src/dm.c: -------------------------------------------------------------------------------- 1 | // Copyright 2021 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | __thread volatile dm_t *dm_p; 6 | volatile dm_t *volatile dm_p_global; 7 | 8 | extern void dm_init(void); 9 | 10 | extern void dm_main(void); 11 | 12 | extern void dm_memcpy_async(void *dest, const void *src, size_t n); 13 | 14 | extern void dm_memcpy2d_async(uint64_t src, uint64_t dst, uint32_t size, 15 | uint32_t sstrd, uint32_t dstrd, uint32_t nreps, 16 | uint32_t cfg); 17 | 18 | extern void dm_start(void); 19 | 20 | extern void dm_wait(void); 21 | 22 | extern void dm_exit(void); 23 | 24 | extern void dm_wait_ready(void); -------------------------------------------------------------------------------- /sw/snRuntime/src/dma.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | extern snrt_dma_txid_t snrt_dma_start_1d_wideptr(uint64_t dst, uint64_t src, 6 | size_t size); 7 | 8 | extern snrt_dma_txid_t snrt_dma_start_1d(void *dst, const void *src, 9 | size_t size); 10 | 11 | extern snrt_dma_txid_t snrt_dma_start_2d_wideptr(uint64_t dst, uint64_t src, 12 | size_t size, size_t dst_stride, 13 | size_t src_stride, 14 | size_t repeat); 15 | 16 | extern snrt_dma_txid_t snrt_dma_start_2d(void *dst, const void *src, 17 | size_t size, size_t dst_stride, 18 | size_t src_stride, size_t repeat); 19 | 20 | extern void snrt_dma_wait(snrt_dma_txid_t tid); 21 | 22 | extern void snrt_dma_wait_all(); 23 | -------------------------------------------------------------------------------- /sw/snRuntime/src/dump.h: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Authors: Samuel Riedel, ETH Zurich 6 | // Viviane Potocnik, ETH Zurich 7 | // Luca Colagrande, ETH Zurich 8 | 9 | // Dump a value via CSR 10 | // !!! Careful: This is only supported in simulation and an experimental 11 | // feature. All writes to unimplemented CSR registers will be dumped by Snitch. 12 | // This can be exploited to quickly print measurement values from all cores 13 | // simultaneously without the hassle of printf. To specify multiple metrics, 14 | // different CSRs can be used. The macro will define a function that will then 15 | // always print via the same CSR. E.g., `dump(uint32_t, errors, 8)` will define 16 | // a function with the following signature: `dump_errors(uint32_t val)`, which 17 | // will print the given value via the 8th register. Alternatively, the 18 | // `write_csr(reg, val)` macro can be used directly. 19 | 20 | #pragma once 21 | 22 | #define NAMED_DUMP(type, name, reg) \ 23 | static __attribute__((always_inline)) inline void dump_##name(type val) { \ 24 | asm volatile("csrw " #reg ", %0" ::"rK"(val)); \ 25 | } 26 | 27 | #define DUMP(val) ({ asm volatile("csrw 0x7C3, %0" ::"rK"(val)); }) 28 | -------------------------------------------------------------------------------- /sw/snRuntime/src/global_interrupts.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | extern void snrt_int_sw_clear(uint32_t hartid); 6 | 7 | extern void snrt_int_sw_set(uint32_t hartid); 8 | 9 | extern uint32_t snrt_int_sw_get(uint32_t hartid); 10 | -------------------------------------------------------------------------------- /sw/snRuntime/src/global_interrupts.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | /** 8 | * @brief Clear SW interrupt in CLINT 9 | * @details 10 | * 11 | * @param hartid Target interrupt to clear 12 | */ 13 | inline void snrt_int_sw_clear(uint32_t hartid) { 14 | snrt_mutex_acquire(snrt_clint_mutex_ptr()); 15 | *(snrt_clint_msip_ptr(hartid)) &= ~(1 << (hartid & 0x1f)); 16 | snrt_mutex_release(snrt_clint_mutex_ptr()); 17 | } 18 | 19 | /** 20 | * @brief Set SW interrupt in CLINT 21 | * @details 22 | * 23 | * @param hartid Target interrupt to set 24 | */ 25 | inline void snrt_int_sw_set(uint32_t hartid) { 26 | snrt_mutex_acquire(snrt_clint_mutex_ptr()); 27 | *(snrt_clint_msip_ptr(hartid)) |= (1 << (hartid & 0x1f)); 28 | snrt_mutex_release(snrt_clint_mutex_ptr()); 29 | } 30 | 31 | /** 32 | * @brief Read SW interrupt for hartid in CLINT 33 | * 34 | * @param hartid hartid to poll for interrupt flag 35 | * @return uint32_t 0 if no SW interrupt is pending, 1 otherwise 36 | */ 37 | inline uint32_t snrt_int_sw_get(uint32_t hartid) { 38 | snrt_mutex_acquire(snrt_clint_mutex_ptr()); 39 | uint32_t ret = *(snrt_clint_msip_ptr(hartid)) >> (hartid & 0x1f); 40 | snrt_mutex_release(snrt_clint_mutex_ptr()); 41 | return ret; 42 | } 43 | -------------------------------------------------------------------------------- /sw/snRuntime/src/omp/eu.c: -------------------------------------------------------------------------------- 1 | // Copyright 2021 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | __thread volatile eu_t *eu_p; 6 | volatile eu_t *volatile eu_p_global; 7 | 8 | extern void eu_init(void); 9 | extern void eu_exit(uint32_t core_idx); 10 | extern uint32_t eu_get_workers_in_loop(); 11 | extern uint32_t eu_get_workers_in_wfi(); 12 | extern void eu_print_status(); 13 | extern void eu_event_loop(uint32_t cluster_core_idx); 14 | extern int eu_dispatch_push(void (*fn)(void *, uint32_t), uint32_t argc, 15 | void *data, uint32_t nthreads); 16 | extern void eu_run_empty(uint32_t core_idx); 17 | extern void eu_mutex_lock(); 18 | extern void eu_mutex_release(); 19 | -------------------------------------------------------------------------------- /sw/snRuntime/src/openocd.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | 6 | #include 7 | 8 | #pragma once 9 | 10 | #define SEMIHOST_EXIT_SUCCESS 0x20026 11 | #define SEMIHOST_EXIT_ERROR 0x20023 12 | 13 | /* riscv semihosting standard: 14 | * IN: a0 holds syscall number 15 | * IN: a1 holds pointer to arg struct 16 | * OUT: a0 holds return value (if exists) 17 | */ 18 | static inline long __ocd_semihost(long n, long _a1) { 19 | register long a0 asm("a0") = n; 20 | register long a1 asm("a1") = _a1; 21 | 22 | // riscv magic values for semihosting 23 | asm volatile( 24 | ".option norvc;\t\n" 25 | "slli zero,zero,0x1f\t\n" 26 | "ebreak\t\n" 27 | "srai zero,zero,0x7\t\n" 28 | ".option rvc;\t\n" 29 | : "+r"(a0) 30 | : "r"(a1)); 31 | 32 | return a0; 33 | } 34 | 35 | static inline int __ocd_semihost_write(int fd, uint8_t *buffer, int len) { 36 | uint32_t args[3] = {(long)fd, (long)buffer, (long)len}; 37 | __asm__ __volatile__("" : : : "memory"); 38 | return __ocd_semihost(0x05, (long)args); 39 | } 40 | 41 | static inline void __ocd_semihost_exit(int status) { 42 | __ocd_semihost(0x18, 43 | status == 0 ? SEMIHOST_EXIT_SUCCESS : SEMIHOST_EXIT_ERROR); 44 | } -------------------------------------------------------------------------------- /sw/snRuntime/src/perf_cnt.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | extern void perf_regs_t* snrt_perf_counters(); 6 | 7 | extern void snrt_cfg_perf_counter(uint32_t perf_cnt, uint16_t metric, 8 | uint16_t hart); 9 | 10 | extern void snrt_start_perf_counter(uint32_t perf_cnt); 11 | 12 | extern void snrt_stop_perf_counter(uint32_t perf_cnt); 13 | 14 | extern void snrt_reset_perf_counter(uint32_t perf_cnt); 15 | 16 | extern uint32_t snrt_get_perf_counter(uint32_t perf_cnt); 17 | -------------------------------------------------------------------------------- /sw/snRuntime/src/printf.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | extern void snrt_putchar(char character); 6 | 7 | /// vendor printf settings 8 | #if defined(__TOOLCHAIN_GCC__) 9 | // the gcc toolchain doesn't support this 10 | #define PRINTF_DISABLE_SUPPORT_FLOAT 11 | #endif 12 | 13 | // Include the vendorized tiny printf implementation. 14 | #include "../../deps/printf/printf.c" 15 | -------------------------------------------------------------------------------- /sw/snRuntime/src/printf.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | // Use snrt_putchar for printf 8 | #define _putchar snrt_putchar 9 | 10 | #ifdef __cplusplus 11 | extern "C" { 12 | #endif 13 | 14 | extern void snrt_putchar(char character); 15 | 16 | #ifdef __cplusplus 17 | } // extern "C" 18 | #endif 19 | 20 | #include "../../deps/printf/printf.h" 21 | -------------------------------------------------------------------------------- /sw/snRuntime/src/riscv.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "riscv_decls.h" 6 | 7 | #include "riscv.h" 8 | 9 | extern void snrt_wfi(); 10 | 11 | extern void snrt_nop(); 12 | 13 | extern uint32_t snrt_mcycle(); 14 | 15 | extern void snrt_interrupt_enable(uint32_t irq); 16 | 17 | extern void snrt_interrupt_disable(uint32_t irq); 18 | 19 | extern void snrt_interrupt_global_enable(void); 20 | 21 | extern void snrt_interrupt_global_disable(void); 22 | -------------------------------------------------------------------------------- /sw/snRuntime/src/start.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #ifdef OPENOCD_SEMIHOSTING 6 | #include "openocd.h" 7 | #endif 8 | 9 | #ifdef SNRT_CRT0_EXIT 10 | inline void snrt_exit_default(int exit_code) { 11 | exit_code = snrt_global_all_to_all_reduction(exit_code); 12 | #ifdef OPENOCD_SEMIHOSTING 13 | if (snrt_global_core_idx() == 0) __ocd_semihost_exit(exit_code); 14 | #else 15 | if (snrt_global_core_idx() == 0) 16 | *(snrt_exit_code_destination()) = (exit_code << 1) | 1; 17 | #endif 18 | } 19 | #ifndef SNRT_CRT0_ALTERNATE_EXIT 20 | inline void snrt_exit(int exit_code) { snrt_exit_default(exit_code); } 21 | #endif 22 | #endif 23 | 24 | #ifdef SNRT_INIT_CLS 25 | inline uint32_t snrt_cls_base_addr() { 26 | extern volatile uint32_t __cdata_start, __cdata_end; 27 | extern volatile uint32_t __cbss_start, __cbss_end; 28 | uint32_t cdata_size = ((uint32_t)&__cdata_end) - ((uint32_t)&__cdata_start); 29 | uint32_t cbss_size = ((uint32_t)&__cbss_end) - ((uint32_t)&__cbss_start); 30 | uint32_t l1_end_addr = SNRT_TCDM_START_ADDR + 31 | snrt_cluster_idx() * SNRT_CLUSTER_OFFSET + 32 | SNRT_TCDM_SIZE; 33 | return l1_end_addr - cdata_size - cbss_size; 34 | } 35 | #endif 36 | -------------------------------------------------------------------------------- /sw/snRuntime/src/sync.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | //================================================================================ 6 | // Data 7 | //================================================================================ 8 | 9 | volatile uint32_t _snrt_mutex; 10 | volatile snrt_barrier_t _snrt_barrier; 11 | volatile uint32_t _reduction_result; 12 | 13 | //================================================================================ 14 | // Functions 15 | //================================================================================ 16 | 17 | extern volatile uint32_t *snrt_mutex(); 18 | 19 | extern void snrt_mutex_acquire(volatile uint32_t *pmtx); 20 | 21 | extern void snrt_mutex_ttas_acquire(volatile uint32_t *pmtx); 22 | 23 | extern void snrt_mutex_release(volatile uint32_t *pmtx); 24 | 25 | extern void snrt_cluster_hw_barrier(); 26 | 27 | extern void snrt_global_barrier(); 28 | 29 | extern void snrt_partial_barrier(snrt_barrier_t *barr, uint32_t n); 30 | 31 | extern void snrt_global_reduction_dma(double *dst_buffer, double *src_buffer, 32 | size_t len); 33 | 34 | extern uint32_t snrt_global_all_to_all_reduction(uint32_t value); 35 | 36 | extern void snrt_wait_writeback(uint32_t val); 37 | -------------------------------------------------------------------------------- /sw/snRuntime/src/team.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | extern uint32_t snrt_hartid(); 6 | 7 | extern uint32_t snrt_global_core_base_hartid(); 8 | 9 | extern uint32_t snrt_global_core_idx(); 10 | 11 | extern uint32_t snrt_global_core_num(); 12 | 13 | extern uint32_t snrt_global_compute_core_num(); 14 | 15 | extern uint32_t snrt_global_compute_core_idx(); 16 | 17 | extern uint32_t snrt_cluster_idx(); 18 | 19 | extern uint32_t snrt_cluster_num(); 20 | 21 | extern uint32_t snrt_cluster_core_idx(); 22 | 23 | extern uint32_t snrt_cluster_core_num(); 24 | 25 | extern uint32_t snrt_cluster_compute_core_num(); 26 | 27 | extern int snrt_is_compute_core(); 28 | 29 | extern int snrt_cluster_is_last_compute_core(); 30 | 31 | extern int snrt_is_dm_core(); 32 | 33 | extern uint32_t snrt_cluster_dm_core_num(); 34 | -------------------------------------------------------------------------------- /sw/snRuntime/src/types.h: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | typedef enum { FP64 = 8, FP32 = 4, FP16 = 2, FP8 = 1 } precision_t; 6 | 7 | typedef float v2f32 __attribute__((vector_size(8))); 8 | typedef __fp16 v4f16 __attribute__((vector_size(8))); 9 | typedef char v8f8 __attribute__((vector_size(8))); 10 | -------------------------------------------------------------------------------- /sw/tests/alias.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "snrt.h" 6 | 7 | uint32_t cluster_global_to_local_address(uint32_t global_addr) { 8 | return global_addr - snrt_l1_start_addr() + ALIAS_TCDM_BASE_ADDR; 9 | } 10 | 11 | const uint32_t n_inputs = 16; 12 | volatile int errors = 2 * n_inputs; 13 | 14 | int main() { 15 | // Get global and local memory aliases 16 | volatile uint32_t *buffer_global = snrt_l1_next(); 17 | volatile uint32_t *buffer_local = 18 | (uint32_t *)cluster_global_to_local_address((uint32_t)buffer_global); 19 | 20 | // Test narrow cluster XBAR 21 | if (snrt_cluster_core_idx() == 0) { 22 | // Write to global buffer 23 | for (uint32_t i = 0; i < n_inputs; i++) buffer_global[i] = i; 24 | // Read from local buffer 25 | for (uint32_t i = 0; i < n_inputs; i++) 26 | if (buffer_local[i] == i) errors--; 27 | } 28 | 29 | snrt_cluster_hw_barrier(); 30 | 31 | // Test wide DMA XBAR 32 | if (snrt_is_dm_core()) { 33 | // Read from local buffer using DMA 34 | buffer_global += n_inputs; 35 | snrt_dma_start_1d((void *)buffer_global, (void *)buffer_local, 36 | n_inputs * sizeof(uint32_t)); 37 | snrt_dma_wait_all(); 38 | // Check results 39 | for (uint32_t i = 0; i < n_inputs; i++) 40 | if (buffer_global[i] == i) errors--; 41 | } 42 | 43 | snrt_cluster_hw_barrier(); 44 | 45 | return errors; 46 | } 47 | -------------------------------------------------------------------------------- /sw/tests/barrier.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | #include 5 | 6 | static volatile uint32_t *sink = (void *)0xF1230000; 7 | 8 | int main() { 9 | uint32_t core_id = snrt_cluster_core_idx(); 10 | uint32_t core_num = snrt_cluster_core_num(); 11 | volatile uint32_t *x = snrt_l1_next(); 12 | 13 | if (core_id == 0) { 14 | *x = 0; 15 | } 16 | for (uint32_t i = 0; i < core_num; i++) { 17 | snrt_cluster_hw_barrier(); 18 | if (i == core_id) { 19 | *sink = core_id; 20 | *x += 1; 21 | } 22 | } 23 | snrt_cluster_hw_barrier(); 24 | return core_id == 0 ? core_num -= *x : 0; 25 | } 26 | -------------------------------------------------------------------------------- /sw/tests/dma_empty_transfer.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include 6 | 7 | // Allocate a buffer in the main memory which we will use to copy data around 8 | // with the DMA. 9 | uint32_t buffer[32]; 10 | 11 | int main() { 12 | if (snrt_global_core_idx() != 8) return 0; // only DMA core 13 | 14 | // Populate source buffer. 15 | uint32_t buffer_src[32]; 16 | for (uint32_t i = 0; i < 32; i++) { 17 | buffer_src[i] = i + 1; 18 | } 19 | 20 | // Start a DMA transfer of zero size. 21 | snrt_dma_txid_t id = snrt_dma_start_1d(buffer, buffer_src, 0); 22 | snrt_dma_wait(id); 23 | 24 | // Test is successful if the previous transfer doesn't block. 25 | } 26 | -------------------------------------------------------------------------------- /sw/tests/dma_simple.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include 6 | 7 | // Allocate a buffer in the main memory which we will use to copy data around 8 | // with the DMA. 9 | uint32_t buffer[32]; 10 | 11 | int main() { 12 | if (snrt_global_core_idx() != 8) return 0; // only DMA core 13 | uint32_t errors = 0; 14 | 15 | // Populate buffers. 16 | uint32_t buffer_src[32], buffer_dst[32]; 17 | for (uint32_t i = 0; i < 32; i++) { 18 | buffer[i] = 0xAAAAAAAA; 19 | buffer_dst[i] = 0x55555555; 20 | buffer_src[i] = i + 1; 21 | } 22 | 23 | // Copy data to main memory. 24 | snrt_dma_txid_t id = snrt_dma_start_1d(buffer, buffer_src, sizeof(buffer)); 25 | snrt_dma_wait(id); 26 | 27 | // Check that the main memory buffer contains the correct data. 28 | for (uint32_t i = 0; i < 32; i++) { 29 | errors += (buffer[i] != buffer_src[i]); 30 | } 31 | 32 | // Copy data to L1. 33 | snrt_dma_start_1d(buffer_dst, buffer, sizeof(buffer)); 34 | snrt_dma_wait_all(); 35 | 36 | // Check that the L1 buffer contains the correct data. 37 | for (uint32_t i = 0; i < 32; i++) { 38 | errors += (buffer_dst[i] != buffer_src[i]); 39 | } 40 | 41 | return errors; 42 | } 43 | -------------------------------------------------------------------------------- /sw/tests/fence_i.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | #include 5 | 6 | int main() { 7 | uint32_t core_id = snrt_cluster_core_idx(); 8 | uint32_t core_num = snrt_cluster_core_num(); 9 | 10 | // One core at a time flushes its cache 11 | for (uint32_t i = 0; i < core_num; i++) { 12 | snrt_cluster_hw_barrier(); 13 | if (i == core_id) { 14 | asm volatile("fence.i"); 15 | } 16 | } 17 | // All cores flush their caches simultaneously 18 | for (uint32_t i = 0; i < core_num; i++) { 19 | snrt_cluster_hw_barrier(); 20 | asm volatile("fence.i"); 21 | } 22 | // Let us see if all cores arrive here 23 | snrt_cluster_hw_barrier(); 24 | return 0; 25 | } 26 | -------------------------------------------------------------------------------- /sw/tests/multi_cluster.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "snrt.h" 6 | 7 | int main() { 8 | uint32_t global_core_id = snrt_global_core_idx(); 9 | uint32_t global_core_num = snrt_global_core_num(); 10 | uint32_t cluster_core_id = snrt_cluster_core_idx(); 11 | uint32_t cluster_core_num = snrt_cluster_core_num(); 12 | uint32_t cluster_id = snrt_cluster_idx(); 13 | uint32_t cluster_num = snrt_cluster_num(); 14 | 15 | uint32_t *cluster_sum = (uint32_t *)snrt_l3_next(); 16 | uint32_t *core_cluster_sum = (uint32_t *)snrt_l3_next() + 4; 17 | 18 | for (uint32_t i = 0; i < global_core_num; i++) { 19 | snrt_global_barrier(); 20 | if (i == global_core_id) { 21 | *cluster_sum += (cluster_core_id == 0); 22 | core_cluster_sum[cluster_id] += 1; 23 | } 24 | } 25 | 26 | snrt_global_barrier(); 27 | 28 | if (global_core_id == 0) { 29 | volatile uint32_t errors = 0; 30 | errors += (*cluster_sum != cluster_num); 31 | for (uint32_t i = 0; i < cluster_num; i++) { 32 | errors += (core_cluster_sum[i] != cluster_core_num); 33 | } 34 | return errors; 35 | } else { 36 | return 0; 37 | } 38 | } 39 | -------------------------------------------------------------------------------- /sw/tests/non_null_exitcode.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | // 5 | // Luca Colagrande 6 | // 7 | // Simply returns an exit code different from 0. 8 | // Should be used as a test to check that the simulator or whoever 9 | // is running the program actually captures an error when it occurs. 10 | 11 | #include "snrt.h" 12 | 13 | // Minimum number of cores the hardware must have for this test to pass 14 | #define MIN_CORES 4 15 | 16 | int main() { 17 | if (snrt_cluster_core_idx() < MIN_CORES) return 14; 18 | } 19 | -------------------------------------------------------------------------------- /sw/tests/openmp_parallel.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "snrt.h" 6 | 7 | volatile static uint32_t sum = 0; 8 | 9 | unsigned __attribute__((noinline)) parallel_section(void) { 10 | unsigned tx = read_csr(minstret); 11 | static volatile uint32_t sum = 0; 12 | 13 | // the following code is executed by all harts 14 | #pragma omp parallel 15 | { 16 | tx = read_csr(minstret) - tx; 17 | __atomic_add_fetch(&sum, 10, __ATOMIC_RELAXED); 18 | } 19 | return sum != snrt_cluster_compute_core_num() * 10; 20 | } 21 | 22 | int main() { 23 | unsigned core_idx = snrt_cluster_core_idx(); 24 | unsigned core_num = snrt_cluster_core_num(); 25 | unsigned err = 0; 26 | 27 | // Only core 0 executes the statements below this function 28 | __snrt_omp_bootstrap(core_idx); 29 | 30 | printf("Launch overhead test\n"); 31 | err = parallel_section(); 32 | omp_print_prof(); 33 | 34 | // exit 35 | __snrt_omp_destroy(core_idx); 36 | return err; 37 | } 38 | -------------------------------------------------------------------------------- /sw/tests/printf_fmtint.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | #include 5 | 6 | #include "printf.h" 7 | 8 | int main() { 9 | uint32_t core_global_id = snrt_global_core_idx(); 10 | uint32_t core_global_num = snrt_global_core_num(); 11 | uint32_t core_id = snrt_cluster_core_idx(); 12 | uint32_t core_num = snrt_cluster_core_num(); 13 | 14 | for (uint32_t i = 0; i < core_global_num; i++) { 15 | snrt_cluster_hw_barrier(); 16 | if (i == core_global_id) { 17 | printf("Hello from core %i/%i\n", core_id, core_num); 18 | } 19 | } 20 | return 0; 21 | } 22 | -------------------------------------------------------------------------------- /sw/tests/printf_simple.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | #include 5 | 6 | #include "printf.h" 7 | 8 | int main() { 9 | for (uint32_t i = 0; i < snrt_global_core_num(); i++) { 10 | snrt_cluster_hw_barrier(); 11 | if (i == snrt_global_core_idx()) { 12 | printf("Hello, World!\n"); 13 | } 14 | } 15 | return 0; 16 | } 17 | -------------------------------------------------------------------------------- /sw/tests/simple.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | int main() { return 0; } 6 | -------------------------------------------------------------------------------- /sw/tests/tls.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | __thread int a = 42; 6 | __thread int b = 0; 7 | __thread int c = 99; 8 | 9 | volatile int sdata __attribute__((section(".sdata"), used)) = 0x55; 10 | volatile int data __attribute__((section(".data"), used)) = 0x66; 11 | 12 | int main() { 13 | return (a != 42) + (b != 0) + (c != 99) + (sdata != 0x55) + (data != 0x66); 14 | } 15 | -------------------------------------------------------------------------------- /sw/tests/varargs_1.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | #include 5 | 6 | // Use `-O0` for this function and don't inline. 7 | int __attribute__((noinline)) __attribute__((optnone)) sum(int N, ...) { 8 | int sum = 0; 9 | va_list va; 10 | va_start(va, N); 11 | for (int i = 0; i < N; i++) { 12 | sum += va_arg(va, int); 13 | } 14 | va_end(va); 15 | return sum; 16 | } 17 | 18 | int main() { 19 | int e = 0; 20 | e += sum(1, 1) != 1; 21 | e += sum(2, 1, 2) != 1 + 2; 22 | e += sum(3, 4, 5, 6) != 4 + 5 + 6; 23 | e += sum(4, 2, 6, 8, 1) != 2 + 6 + 8 + 1; 24 | return e; 25 | } 26 | -------------------------------------------------------------------------------- /sw/tests/varargs_2.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | #include 5 | 6 | // Use `-O0` for this function and don't inline. 7 | int __attribute__((noinline)) __attribute__((optnone)) 8 | sum(int dummy0, int dummy1, int dummy2, int dummy3, int dummy4, int dummy5, 9 | int dummy6, int N, ...) { 10 | (void)dummy0; 11 | (void)dummy1; 12 | (void)dummy2; 13 | (void)dummy3; 14 | (void)dummy4; 15 | (void)dummy5; 16 | (void)dummy6; 17 | 18 | int sum = 0; 19 | va_list va; 20 | va_start(va, N); 21 | for (int i = 0; i < N; i++) { 22 | sum += va_arg(va, int); 23 | } 24 | va_end(va); 25 | return sum; 26 | } 27 | 28 | int main() { 29 | int e = 0; 30 | e += sum(0, 0, 0, 0, 0, 0, 0, 1, 1) != 1; 31 | e += sum(0, 0, 0, 0, 0, 0, 0, 2, 1, 2) != 1 + 2; 32 | e += sum(0, 0, 0, 0, 0, 0, 0, 3, 4, 5, 6) != 4 + 5 + 6; 33 | e += sum(0, 0, 0, 0, 0, 0, 0, 4, 2, 6, 8, 1) != 2 + 6 + 8 + 1; 34 | return e; 35 | } 36 | -------------------------------------------------------------------------------- /target/README.md: -------------------------------------------------------------------------------- 1 | # HW Targets 2 | 3 | This subdirectory contains the supported systems and their simulation environment including testbenches and bootrom. 4 | 5 | - `shared`: contains the shared fesvr related testbench components. 6 | - `snitch_cluster` 7 | - `cfg`: containing the configuration files `*.hsjon`. 8 | - `generated`: contains the generated `bootdata.cc` and RTL wrapper for the snitch cluster `snitch_cluster_wrapper.sv`. 9 | - `sw`: contains all shared 10 | - `apps`: contains applications for the snitch cluster. 11 | - `runtime`: contains the HW specific runtime implementation for the snitch cluster. 12 | - `rtl`: RTL-related startup implmentations. 13 | - `tests`: lists of tests that can run on the snitch cluster. 14 | - `test`: contains testharness and bootrom of the snitch cluster -------------------------------------------------------------------------------- /target/common/README.md: -------------------------------------------------------------------------------- 1 | # Shared target components 2 | 3 | This directory contains shared target components. 4 | 5 | ## `test` 6 | 7 | Contains an abstract testbench for Snitch-based targets with multiple memory 8 | interfaces (e.g. AXI) accessing an infinite simulation memory. 9 | 10 | Furthermore, it allows linking to a system-specific `bootrom`. 11 | 12 | The testbench mimics the behavior of an infinite memory. The `tb_memory_*` 13 | module turns read and write transactions into DPI calls into the simulation 14 | memory (`GlobalMemory` in `tb_lib.hh`). 15 | 16 | The testbench can interface directly with the global memory or the RISC-V 17 | front-end server (`fesvr`) can interact with the DUT through memory map 18 | operations. This allows the software on the DUT to make proxied system calls. 19 | 20 | The `SnitchSim` Python class provides an IPC-based interface to control and 21 | access the memory of `tb_lib` testbenches. 22 | -------------------------------------------------------------------------------- /target/common/gvsoc.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2024 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | GVSOC_BUILDDIR ?= work-gvsoc 6 | 7 | $(BIN_DIR)/$(TARGET).gvsoc: 8 | @echo "#!/bin/bash" > $@ 9 | @echo 'binary=$$(realpath $$1)' >> $@ 10 | @echo 'echo $$binary > .rtlbinary' >> $@ 11 | @echo 'path="$$(dirname "$$(dirname "$$(readlink -f "$${BASH_SOURCE[0]}")")")"' >> $@ 12 | @echo 'if [ -z "$$GVSOC_TARGET" ]; then' >> $@ 13 | @echo ' GVSOC_TARGET=snitch' >> $@ 14 | @echo 'fi' >> $@ 15 | @echo 'gvsoc --target=$${GVSOC_TARGET} --binary $$binary \ 16 | --control-script=$${path}/../../util/sim/gvsoc_control.py $$2 run' >> $@ 17 | @chmod +x $@ 18 | 19 | .PHONY: clean-gvsoc 20 | clean-gvsoc: 21 | rm -rf $(BIN_DIR)/$(TARGET).gvsoc $(GVSOC_BUILDDIR) 22 | 23 | clean: clean-gvsoc 24 | -------------------------------------------------------------------------------- /target/common/test/common_lib.cc: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | #include 6 | 7 | #include "sim.hh" 8 | #include "tb_lib.hh" 9 | 10 | namespace sim { 11 | 12 | // Bootloader 13 | extern "C" { 14 | extern const uint8_t tb_bootrom_start; 15 | extern const uint8_t tb_bootrom_end; 16 | } 17 | 18 | // The global memory all memory ports write into. 19 | GlobalMemory MEM; 20 | 21 | // Override HTIF to populate bootloader with system specification and entry 22 | // symbol. 23 | void Sim::start() { htif_t::start(); } 24 | 25 | void Sim::read_chunk(addr_t taddr, size_t len, void *dst) { 26 | MEM.read(taddr, len, reinterpret_cast(dst)); 27 | } 28 | 29 | void Sim::write_chunk(addr_t taddr, size_t len, const void *src) { 30 | uint8_t strb[8] = {1, 1, 1, 1, 1, 1, 1, 1}; 31 | MEM.write(taddr, len, reinterpret_cast(src), strb); 32 | } 33 | 34 | } // namespace sim 35 | -------------------------------------------------------------------------------- /target/common/test/ipc.hh: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | // 5 | // Paul Scheffler 6 | 7 | #pragma once 8 | 9 | #include 10 | #include 11 | #include 12 | #include 13 | #include 14 | #include 15 | 16 | #include 17 | 18 | class IpcIface { 19 | private: 20 | static const int IPC_BUF_SIZE = 4096; 21 | static const int IPC_BUF_SIZE_STRB = IPC_BUF_SIZE / 8 + 1; 22 | static const int IPC_ERR_DOUBLE_ARG = 30; 23 | static const long IPC_POLL_PERIOD_NS = 100000L; 24 | 25 | // Possible IPC operations 26 | enum ipc_opcode_e { 27 | Read = 0, 28 | Write = 1, 29 | Poll = 2, 30 | }; 31 | 32 | // Operations are 3 doubles, followed by data streams in either direction 33 | typedef struct { 34 | uint64_t opcode; 35 | uint64_t addr; 36 | uint64_t len; 37 | } ipc_op_t; 38 | 39 | // Args passed to IPC thread 40 | typedef struct { 41 | char* tx; 42 | char* rx; 43 | } ipc_targs_t; 44 | 45 | // Thread to asynchronously handle FIFOs 46 | ipc_targs_t targs; 47 | pthread_t thread; 48 | bool active; 49 | 50 | static void* ipc_thread_handle(void* in); 51 | 52 | public: 53 | IpcIface(int argc, char** argv); 54 | ~IpcIface(); 55 | }; 56 | -------------------------------------------------------------------------------- /target/common/test/sim.hh: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | #pragma once 6 | #include 7 | #include 8 | 9 | #include 10 | #include 11 | #include 12 | #include 13 | #include 14 | #include 15 | #include 16 | 17 | #include "ipc.hh" 18 | 19 | namespace sim { 20 | using namespace std::chrono_literals; 21 | 22 | // Simulation object with `fesvr` support. 23 | struct Sim : htif_t { 24 | Sim(int argc, char **argv); 25 | 26 | virtual void start(); 27 | 28 | int run(); 29 | void main(); 30 | 31 | // HTIF overrides. Calls into the global memory. 32 | void read_chunk(addr_t taddr, size_t len, void *dst); 33 | void write_chunk(addr_t taddr, size_t len, const void *src); 34 | bool is_address_preloaded(addr_t taddr, size_t len) override { 35 | return disable_preloading; 36 | } 37 | uint32_t get_bin_entry() { return get_entry_point(); } 38 | 39 | void idle(); 40 | 41 | // Force alignment to 8 byte. 42 | size_t chunk_align() { return 8; } 43 | // Force chunk size to 8 byte. 44 | size_t chunk_max_size() { return 8; } 45 | 46 | void reset() {} 47 | 48 | private: 49 | context_t *host; 50 | context_t target; 51 | bool vlt_vcd = false; 52 | bool disable_preloading = false; 53 | IpcIface ipc; 54 | }; 55 | 56 | void sim_thread_main(void *arg); 57 | 58 | } // namespace sim 59 | -------------------------------------------------------------------------------- /target/common/test/tb_bin.cc: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | #include 6 | 7 | #include "sim.hh" 8 | 9 | extern std::unique_ptr s; 10 | 11 | int main(int argc, char **argv, char **env) { 12 | // Write binary path to .rtlbinary for the `make annotate` target 13 | FILE *fd; 14 | fd = fopen(".rtlbinary", "w"); 15 | if (fd != NULL && argc >= 2) { 16 | fprintf(fd, "%s\n", argv[1]); 17 | fclose(fd); 18 | } else { 19 | fprintf(stderr, "Warning: Failed to write binary name to .rtlbinary\n"); 20 | } 21 | 22 | s = std::make_unique(argc, argv); 23 | return s->run(); 24 | } 25 | -------------------------------------------------------------------------------- /target/common/test/tb_bin.sv: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | /// RTL Top-level for `fesvr` simulation. 6 | module tb_bin; 7 | import "DPI-C" function int fesvr_tick(); 8 | import "DPI-C" function void fesvr_cleanup(); 9 | 10 | testharness fix(); 11 | 12 | // Start `fesvr` 13 | initial begin 14 | automatic int exit_code; 15 | // Poll fesvr for exit code 16 | while ((exit_code = fesvr_tick()) == 0) #200ns; 17 | // Cleanup C++ simulation objects before $finish is called 18 | fesvr_cleanup(); 19 | exit_code >>= 1; 20 | if (exit_code > 0) begin 21 | $error("[FAILURE] Finished with exit code %2d", exit_code); 22 | end else begin 23 | $info("[SUCCESS] Program finished successfully"); 24 | end 25 | $finish; 26 | end 27 | 28 | endmodule 29 | -------------------------------------------------------------------------------- /target/snitch_cluster/.gitignore: -------------------------------------------------------------------------------- 1 | /logs/ 2 | /.generated/ 3 | /bin/ 4 | /cfg/lru.json 5 | /work/ 6 | /work-vsim/ 7 | /work-vlt/ 8 | /work-vcs/ 9 | /*.log 10 | /runs/ 11 | .rtlbinary 12 | -------------------------------------------------------------------------------- /target/snitch_cluster/README.md: -------------------------------------------------------------------------------- 1 | # Snitch cluster target 2 | 3 | The Snitch cluster target (`target/snitch_cluster`) is a simple RTL testbench 4 | around a Snitch cluster. 5 | 6 | The cluster testbench simulates an infinite memory. The RISC-V ELF file to be simulated is 7 | preloaded using RISC-V's Front-End Server (`fesvr`). 8 | 9 | You can find information on how to build and simulate the Snitch cluster in the dedicated [tutorial](https://pulp-platform.github.io/snitch_cluster/ug/tutorial.html). 10 | -------------------------------------------------------------------------------- /target/snitch_cluster/experiments/chaining/.gitignore: -------------------------------------------------------------------------------- 1 | /build 2 | /power 3 | /results 4 | /runs 5 | /pls.yaml 6 | /pls -------------------------------------------------------------------------------- /target/snitch_cluster/experiments/chaining/README.md: -------------------------------------------------------------------------------- 1 | Build the hardware (in `target/snitch_cluster`): 2 | ``` 3 | make CFG_OVERRIDE=experiments/copift/cfg.json bin/snitch_cluster.vsim -j 4 | ``` 5 | 6 | Run RTL experiments: 7 | ``` 8 | ./experiments.py experiments.yaml sw run perf --dump-pls-testlist -j 9 | ``` 10 | 11 | Run PLS experiments: 12 | ``` 13 | make clean-vsim 14 | make PL_SIM=1 DEBUG=ON VCD_DUMP=1 bin/snitch_cluster.vsim 15 | ./experiments.py pls.yaml run power -j --run-dir pls 16 | ``` 17 | 18 | Make plots: 19 | ``` 20 | ./experiments.py experiments.yaml --plot -j 21 | ``` 22 | -------------------------------------------------------------------------------- /target/snitch_cluster/experiments/copift/.gitignore: -------------------------------------------------------------------------------- 1 | /build 2 | /power 3 | /results 4 | /runs 5 | /pls.yaml 6 | /pls -------------------------------------------------------------------------------- /target/snitch_cluster/experiments/copift/README.md: -------------------------------------------------------------------------------- 1 | Build the hardware (in `target/snitch_cluster`): 2 | ``` 3 | make CFG_OVERRIDE=experiments/copift/cfg.json bin/snitch_cluster.vsim -j 4 | ``` 5 | 6 | Run RTL experiments: 7 | ``` 8 | ./experiments.py experiments.yaml sw run perf --dump-pls-testlist -j 9 | ``` 10 | 11 | Run PLS experiments: 12 | ``` 13 | make clean-vsim 14 | make PL_SIM=1 DEBUG=ON VCD_DUMP=1 bin/snitch_cluster.vsim 15 | ./experiments.py pls.yaml run power -j --run-dir pls 16 | ``` 17 | 18 | Run MATRIX experiments: 19 | ``` 20 | ./matrix.py none.yaml sw run -j 21 | ``` 22 | -------------------------------------------------------------------------------- /target/snitch_cluster/patches/context.h.diff: -------------------------------------------------------------------------------- 1 | @@ -7,8 +7,6 @@ 2 | 3 | #if defined(__GLIBC__) 4 | # undef USE_UCONTEXT 5 | -# define USE_UCONTEXT 6 | -# include 7 | # include 8 | #include 9 | 10 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/.gitignore: -------------------------------------------------------------------------------- 1 | build/ -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/.gitignore: -------------------------------------------------------------------------------- 1 | build/ 2 | include/ 3 | runs/ 4 | run.yaml -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/atax/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := atax 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/apps/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | $(APP)_INCDIRS := $(SN_ROOT)/sw/blas 12 | 13 | include $(SN_ROOT)/sw/apps/common.mk 14 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 15 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/axpy/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := axpy 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/blas/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/blas/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/apps/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/dot/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := dot 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/blas/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/blas/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/apps/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := gemm 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/blas/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/blas/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | $(APP)_INCDIRS := $(SN_ROOT)/sw/blas 12 | 13 | include $(SN_ROOT)/sw/apps/common.mk 14 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 15 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/.gitignore: -------------------------------------------------------------------------------- 1 | /include/ 2 | /runs/ 3 | /runs.yaml -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp16-naive.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: true, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp16_naive" 23 | } 24 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp16-opt.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: true, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp16_opt" 23 | } 24 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp32-naive.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: true, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp32_naive" 23 | } 24 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp32-opt.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: true, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp32_opt" 23 | } 24 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp64-base-tb.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: true, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp64_naive" 23 | } 24 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp64-base-tiled.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 2, // number of tiles in N dimension 11 | k_tiles: 2, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: false, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 8, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp64_naive" 23 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp64-naive.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: true, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp64_naive" 23 | } 24 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp64-opt-tb.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: true, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp64_opt" 23 | } 24 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp64-opt-tiled.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 2, // number of tiles in N dimension 11 | k_tiles: 2, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: false, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 8, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp64_opt" 23 | } 24 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp64-opt.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: false, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp64_opt" 23 | } 24 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/cfg/fp8-base.json: -------------------------------------------------------------------------------- 1 | // Copyright 2024 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | setup_ssr: 1, 7 | parallelize_m: 0, 8 | parallelize_k: 0, 9 | m_tiles: 2, // number of tiles in M dimension 10 | n_tiles: 1, // number of tiles in N dimension 11 | k_tiles: 1, // number of tiles in K dimension 12 | load_a: 1, 13 | load_b: 1, 14 | load_c: 1, 15 | transa: false, 16 | transb: true, // must be true for SIMD 17 | M: 16, 18 | N: 16, 19 | K: 16, 20 | alpha: 1, 21 | beta: 0, 22 | gemm_fp: "gemm_fp8_naive" 23 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemm/test/test.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | # Viviane Potocnik 8 | 9 | ROOT=$(git rev-parse --show-toplevel) 10 | BUILD_PY=$ROOT/target/snitch_cluster/util/build.py 11 | RUN_PY=$ROOT/target/snitch_cluster/util/run.py 12 | TEST_LIST=$(pwd)/run.yaml 13 | CFG_FILES=$(pwd)/cfg/"*" 14 | CMD="$ROOT/sw/blas/gemm/scripts/verify.py \${sim_bin} \${elf} --dump-results" 15 | 16 | $BUILD_PY gemm --cfg $CFG_FILES --testlist $TEST_LIST --testlist-cmd "$CMD" 17 | $RUN_PY $TEST_LIST --simulator vsim -j 18 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/gemv/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := gemv 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/blas/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/blas/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/apps/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/blas/syrk/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := syrk 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/blas/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/blas/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | $(APP)_INCDIRS := $(SN_ROOT)/sw/blas 12 | 13 | include $(SN_ROOT)/sw/apps/common.mk 14 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 15 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/box3d1r/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := box3d1r 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/apps/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/apps/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/correlation/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := correlation 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/apps/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/apps/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/covariance/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := covariance 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/apps/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | $(APP)_INCDIRS := $(SN_ROOT)/sw/blas/ 12 | 13 | include $(SN_ROOT)/sw/apps/common.mk 14 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 15 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/batchnorm/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := batchnorm 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/concat/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := concat 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/conv2d/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := conv2d 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/flashattention_2/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := flashattention_2 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/flashattention_2/test/cfg/fp16-base.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | L: 16, 7 | S: 32, 8 | d: 16, 9 | B_r: 16, 10 | B_c: 16, 11 | dtype: "FP16", 12 | baseline: true 13 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/flashattention_2/test/cfg/fp16-opt.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | L: 16, 7 | S: 32, 8 | d: 16, 9 | B_r: 16, 10 | B_c: 16, 11 | dtype: "FP16", 12 | baseline: false 13 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/flashattention_2/test/cfg/fp32-base.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | L: 16, 7 | S: 32, 8 | d: 16, 9 | B_r: 16, 10 | B_c: 16, 11 | dtype: "FP32", 12 | baseline: true 13 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/flashattention_2/test/cfg/fp32-opt.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | L: 16, 7 | S: 32, 8 | d: 16, 9 | B_r: 16, 10 | B_c: 16, 11 | dtype: "FP32", 12 | baseline: false 13 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/flashattention_2/test/test.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | ROOT=$(git rev-parse --show-toplevel) 9 | BUILD_PY=$ROOT/target/snitch_cluster/util/build.py 10 | RUN_PY=$ROOT/target/snitch_cluster/util/run.py 11 | TEST_LIST=$(pwd)/run.yaml 12 | CFG_FILES=$(pwd)/cfg/"*" 13 | CMD="$ROOT/sw/dnn/flashattention_2/scripts/verify.py \${sim_bin} \${elf} --dump-results" 14 | 15 | $BUILD_PY flashattention_2 --cfg $CFG_FILES --testlist $TEST_LIST --testlist-cmd "$CMD" 16 | $RUN_PY $TEST_LIST --simulator vsim -j 17 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/fused_concat_linear/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := fused_concat_linear 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/fusedconv/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := fusedconv 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/gelu/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := gelu 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/layernorm/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := layernorm 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/layernorm/test/cfg/fp32-naive.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | input_dim: { 7 | batch_size: 2, 8 | seq_len: 64, 9 | embeddings: 32 10 | }, 11 | eps: 1e-5, 12 | prec: "FP32", 13 | n_tiles: 2, 14 | implementation: "NAIVE" 15 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/layernorm/test/cfg/fp32-opt.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | { 6 | input_dim: { 7 | batch_size: 2, 8 | seq_len: 64, 9 | embeddings: 32 10 | }, 11 | eps: 1e-5, 12 | prec: "FP32", 13 | n_tiles: 2, 14 | implementation: "OPT" 15 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/maxpool/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := maxpool 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/softmax/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := softmax 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/transpose/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := transpose 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/dnn/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/dnn/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/dnn/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/transpose/test/cfg/fp16.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | M: 64, 7 | N: 32, 8 | prec: "FP16", 9 | baseline: true 10 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/transpose/test/cfg/fp32.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | M: 64, 7 | N: 32, 8 | prec: "FP32", 9 | baseline: true 10 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/transpose/test/cfg/fp64-base.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | M: 64, 7 | N: 32, 8 | prec: "FP64", 9 | baseline: true 10 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/transpose/test/cfg/fp64-opt.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | M: 64, 7 | N: 32, 8 | prec: "FP64", 9 | baseline: false 10 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/transpose/test/cfg/fp8.json: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | { 6 | M: 64, 7 | N: 32, 8 | prec: "FP8", 9 | baseline: true 10 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/dnn/transpose/test/test.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # Copyright 2024 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | ROOT=$(git rev-parse --show-toplevel) 9 | BUILD_PY=$ROOT/target/snitch_cluster/util/build.py 10 | RUN_PY=$ROOT/target/snitch_cluster/util/run.py 11 | TEST_LIST=$(pwd)/run.yaml 12 | CFG_FILES=$(pwd)/cfg/"*" 13 | CMD="$ROOT/sw/dnn/transpose/scripts/verify.py \${sim_bin} \${elf} --dump-results" 14 | 15 | $BUILD_PY transpose --cfg $CFG_FILES --testlist $TEST_LIST --testlist-cmd "$CMD" 16 | $RUN_PY $TEST_LIST --simulator vsim -j 17 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/doitgen/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := doitgen 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/apps/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | $(APP)_INCDIRS := $(SN_ROOT)/sw/blas/ 12 | 13 | include $(SN_ROOT)/sw/apps/common.mk 14 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 15 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/exp/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := exp 8 | SRCS := $(SN_ROOT)/sw/apps/$(APP)/main.c 9 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 10 | 11 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 12 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/j3d27pt/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := j3d27pt 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/apps/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/apps/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/kbpcpa/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := kbpcpa 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/apps/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | 12 | include $(SN_ROOT)/sw/apps/common.mk 13 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/kmeans/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := kmeans 8 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 9 | SRC_DIR := $(SN_ROOT)/sw/apps/$(APP)/src 10 | SRCS := $(SRC_DIR)/main.c 11 | $(APP)_DATAGEN_ARGS = --no-gui 12 | 13 | include $(SN_ROOT)/sw/apps/common.mk 14 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 15 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/log/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := log 8 | SRCS := $(SN_ROOT)/sw/apps/$(APP)/main.c 9 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 10 | 11 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 12 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/mnist/Makefile: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Gianna Paulin 6 | 7 | # DNN_DIR = $(abspath ../../../../../../../sw/snDNN) 8 | DNN_DIR = $(abspath ..) 9 | # SNDNN_DIR = $(abspath ..) 10 | APPS_DIR = $(abspath ../..) 11 | 12 | APP_NAME = nnlinear_baseline 13 | USE_SNDNN_LIBRARY = true 14 | 15 | include $(DNN_DIR)/Makefile 16 | include $(APPS_DIR)/common.mk 17 | 18 | $(DEP): $(DATA_DIR)/data_$(APP_NAME).h 19 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/mnist/nnlinear_baseline_params.hjson: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | // SPDX-License-Identifier: SHL-0.51 4 | 5 | // Parameters for a NN with a linear and a softmax layer 6 | // Currently not really used, but could be used to configure the NN 7 | 8 | { 9 | kernel: "MNIST" 10 | prec: 32 11 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/mnist/src/net_nnlinear_baseline.c: -------------------------------------------------------------------------------- 1 | // Copyright 2020 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | // SW testbench for profiling linear kernels in different 6 | // floating point precisions (fp64, fp32, fp16), as well as 7 | // different memory layouts for matrices (transposed/not-transposed) 8 | // Correctness of results are checked automatically 9 | 10 | #include "data_fp32_nnlinear.h" 11 | #include "math.h" 12 | #include "network.h" 13 | #include "nnlinear_backend_baseline.h" 14 | // #include "perf_cnt.h" 15 | // #include "printf.h" 16 | #include "snrt.h" 17 | #include "utils.h" 18 | 19 | int main() { 20 | nn_linear_baseline_t.W = (void *)nn_linear_baseline_weights_dram; 21 | nn_linear_baseline_t.b = (void *)nn_linear_baseline_biases_dram; 22 | 23 | // Run the baseline neural network 24 | nnlinear_backend_baseline(&nn_linear_baseline_t); 25 | snrt_global_barrier(); 26 | 27 | return 0; 28 | } -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/montecarlo/pi_estimation/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | PI_ESTIMATION_DIR := $(SN_ROOT)/sw/apps/montecarlo/pi_estimation 8 | PRNG_DIR := $(SN_ROOT)/sw/apps/prng 9 | 10 | APP := pi_estimation 11 | SRCS := $(PI_ESTIMATION_DIR)/main.c 12 | $(APP)_INCDIRS := $(PI_ESTIMATION_DIR) $(PRNG_DIR) 13 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/montecarlo/pi_estimation/build 14 | 15 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 16 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/nop/app.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | APP := nop 8 | SRCS := $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/src/main.c 9 | $(APP)_BUILD_DIR ?= $(SN_ROOT)/target/snitch_cluster/sw/apps/$(APP)/build 10 | 11 | include $(SN_ROOT)/target/snitch_cluster/sw/apps/common.mk 12 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/apps/nop/src/main.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "snrt.h" 6 | 7 | int main() { 8 | #pragma GCC unroll 1024 9 | for (int i = 0; i < 1024; i++) { 10 | asm volatile("nop"); 11 | } 12 | 13 | return 0; 14 | } 15 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/dma_mchan.yaml: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | runs: 6 | - elf: ./tests/build/dma_mchan.elf 7 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/frep_xl.yaml: -------------------------------------------------------------------------------- 1 | # Copyright 2025 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | runs: 6 | # Needs a larger FREP sequencer than default, in some configurations 7 | - elf: ./apps/montecarlo/pi_estimation/build/pi_estimation.elf 8 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/common/.gitignore: -------------------------------------------------------------------------------- 1 | snitch_cluster_cfg.h 2 | snitch_cluster_addrmap.h 3 | snitch_cluster_peripheral.h 4 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/common/snitch_cluster_addrmap.h.tpl: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #define CLUSTER_TCDM_BASE_ADDR ${hex(cfg['cluster']['cluster_base_addr'])} 6 | #define CLUSTER_BOOTROM_BASE_ADDR (CLUSTER_TCDM_BASE_ADDR + ${hex(cfg['cluster']['tcdm']['size'] * 1024)}) 7 | #define CLUSTER_PERIPH_BASE_ADDR (CLUSTER_BOOTROM_BASE_ADDR + 4 * 1024) 8 | #define CLUSTER_ZERO_MEM_START_ADDR (CLUSTER_PERIPH_BASE_ADDR + ${hex(cfg['cluster']['cluster_periph_size'] * 1024)}) 9 | #define CLUSTER_ZERO_MEM_END_ADDR (CLUSTER_ZERO_MEM_START_ADDR + ${hex(cfg['cluster']['zero_mem_size'] * 1024)}) 10 | #define CLINT_BASE_ADDR ${hex(next(reg['address'] for reg in cfg['external_addr_regions'] if reg['name'] == 'clint'))} 11 | #define ALIAS_TCDM_BASE_ADDR ${hex(cfg['cluster']['alias_region_base'])} 12 | #define ALIAS_BOOTROM_BASE_ADDR (ALIAS_TCDM_BASE_ADDR + ${hex(cfg['cluster']['tcdm']['size'] * 1024)}) 13 | #define ALIAS_PERIPH_BASE_ADDR (ALIAS_BOOTROM_BASE_ADDR + 4 * 1024) 14 | #define ALIAS_ZERO_MEM_START_ADDR (ALIAS_PERIPH_BASE_ADDR + ${hex(cfg['cluster']['cluster_periph_size'] * 1024)}) 15 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/common/snitch_cluster_cfg.h.tpl: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #define CFG_CLUSTER_NR_CORES ${cfg['cluster']['nr_cores']} 6 | #define CFG_CLUSTER_BASE_HARTID ${cfg['cluster']['cluster_base_hartid']} 7 | #define SNRT_BASE_HARTID CFG_CLUSTER_BASE_HARTID 8 | #define SNRT_CLUSTER_CORE_NUM CFG_CLUSTER_NR_CORES 9 | #define SNRT_CLUSTER_NUM ${cfg['nr_clusters']} 10 | #define SNRT_CLUSTER_DM_CORE_NUM 1 11 | #define SNRT_TCDM_START_ADDR CLUSTER_TCDM_BASE_ADDR 12 | #define SNRT_TCDM_SIZE (CLUSTER_BOOTROM_BASE_ADDR - CLUSTER_TCDM_BASE_ADDR) 13 | #define SNRT_CLUSTER_OFFSET ${cfg['cluster']['cluster_base_offset']} 14 | 15 | // Software configuration 16 | #define SNRT_LOG2_STACK_SIZE 10 17 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/common/snitch_cluster_defs.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "snitch_cluster_addrmap.h" 6 | #include "snitch_cluster_cfg.h" 7 | #include "snitch_cluster_peripheral.h" 8 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/common/snitch_cluster_global_interrupts.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | // Use cluster interrupts behind the scenes, since we only have one cluster 6 | inline void snrt_int_sw_clear(uint32_t hartid) { 7 | snrt_int_cluster_clr(1 << hartid); 8 | } 9 | 10 | inline void snrt_int_sw_set(uint32_t hartid) { 11 | snrt_int_cluster_set(1 << hartid); 12 | } 13 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/common/snitch_cluster_memory.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | extern uint32_t snrt_l1_start_addr(); 6 | 7 | extern uint32_t snrt_l1_end_addr(); 8 | 9 | extern volatile uint32_t* snrt_cluster_clint_set_ptr(); 10 | 11 | extern volatile uint32_t* snrt_cluster_clint_clr_ptr(); 12 | 13 | extern volatile uint32_t* snrt_zero_memory_ptr(); 14 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/memory.ld: -------------------------------------------------------------------------------- 1 | /* Copyright 2020 ETH Zurich and University of Bologna. */ 2 | /* Solderpad Hardware License, Version 0.51, see LICENSE for details. */ 3 | /* SPDX-License-Identifier: SHL-0.51 */ 4 | 5 | MEMORY 6 | { 7 | L3 (rwxa) : ORIGIN = 0x80000000, LENGTH = 0x80000000 8 | } 9 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/rtl/src/snitch_cluster_start.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "snitch_cluster_start.h" 6 | #include "start.c" 7 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/rtl/src/snitch_cluster_start.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #define SNRT_INIT_TLS 8 | #define SNRT_INIT_BSS 9 | #define SNRT_INIT_CLS 10 | #define SNRT_INIT_LIBS 11 | #define SNRT_CRT0_PRE_BARRIER 12 | #define SNRT_INVOKE_MAIN 13 | #define SNRT_CRT0_POST_BARRIER 14 | #define SNRT_CRT0_EXIT 15 | 16 | extern volatile uint32_t tohost; 17 | 18 | #ifndef OPENOCD_SEMIHOSTING 19 | static inline volatile uint32_t* snrt_exit_code_destination() { 20 | return (volatile uint32_t*)&tohost; 21 | } 22 | #endif 23 | 24 | #include "start.h" 25 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/rtl/src/snrt.S: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | #define SNRT_INIT_INT_REGS 6 | #define SNRT_INIT_FP_REGS 7 | #define SNRT_INIT_GP 8 | #define SNRT_INIT_CORE_INFO 9 | #define SNRT_INIT_CLS 10 | #define SNRT_INIT_STACK 11 | #define SNRT_INIT_TLS 12 | #define SNRT_CRT0_PARK 13 | 14 | #include "snitch_cluster_defs.h" 15 | #include "start.S" 16 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/rtl/src/snrt.c: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #include "snrt.h" 6 | 7 | #include "alloc.c" 8 | #include "alloc_v2.c" 9 | #include "cls.c" 10 | #include "cluster_interrupts.c" 11 | #include "dm.c" 12 | #include "dma.c" 13 | #include "eu.c" 14 | #include "kmp.c" 15 | #include "omp.c" 16 | #include "printf.c" 17 | #include "putchar.c" 18 | #include "riscv.c" 19 | #include "snitch_cluster_start.c" 20 | #include "sync.c" 21 | #include "team.c" 22 | -------------------------------------------------------------------------------- /target/snitch_cluster/sw/runtime/rtl/src/snrt.h: -------------------------------------------------------------------------------- 1 | // Copyright 2023 ETH Zurich and University of Bologna. 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | // SPDX-License-Identifier: Apache-2.0 4 | 5 | #pragma once 6 | 7 | #include 8 | #include 9 | 10 | // Forward declarations 11 | #include "alloc_decls.h" 12 | #include "cls_decls.h" 13 | #include "riscv_decls.h" 14 | #include "start_decls.h" 15 | #include "sync_decls.h" 16 | #include "team_decls.h" 17 | 18 | // Snitch cluster specific 19 | #include "snitch_cluster_defs.h" 20 | #include "snitch_cluster_memory.h" 21 | 22 | // Implementation 23 | #include "alloc.h" 24 | #include "alloc_v2.h" 25 | #include "cls.h" 26 | #include "cluster_interrupts.h" 27 | #include "copift.h" 28 | #include "dm.h" 29 | #include "dma.h" 30 | #include "dump.h" 31 | #include "eu.h" 32 | #include "kmp.h" 33 | #include "omp.h" 34 | #include "perf_cnt.h" 35 | #include "printf.h" 36 | #include "riscv.h" 37 | #include "snitch_cluster_global_interrupts.h" 38 | #include "snitch_cluster_start.h" 39 | #include "ssr.h" 40 | #include "sync.h" 41 | #include "team.h" 42 | #include "types.h" 43 | -------------------------------------------------------------------------------- /target/snitch_cluster/synopsys_sim.setup: -------------------------------------------------------------------------------- 1 | WORK > DEFAULT 2 | DEFAULT : ./work-vcs -------------------------------------------------------------------------------- /target/snitch_cluster/test/.gitignore: -------------------------------------------------------------------------------- 1 | bootrom.bin 2 | bootrom.dump 3 | bootrom.elf 4 | -------------------------------------------------------------------------------- /target/snitch_cluster/test/bootrom.S: -------------------------------------------------------------------------------- 1 | # Copyright 2024 ETH Zurich and University of Bologna. 2 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | # SPDX-License-Identifier: SHL-0.51 4 | 5 | #define MSTATUS_MIE 8 6 | 7 | .global _snitch_park 8 | _snitch_park: 9 | # Set trap vector 10 | la t0, _snitch_resume 11 | csrw mtvec, t0 12 | # Enable software and cluster interrupts 13 | csrsi mstatus, MSTATUS_MIE # CSR set (uimm) 14 | lui t0, 0x80 # (1 << 19) cluster clint interrupt 15 | addi t0, t0, 8 # (1 << 3) software interrupts (msip) 16 | csrw mie, t0 17 | wfi 18 | 19 | _snitch_resume: 20 | auipc t0, 0 21 | # We need to know the address of the scratch1 register in 22 | # the peripherals, which is a constant offset of our current PC, 23 | # independent of the cluster configuration. 24 | # This offset can be calculated as follows: 25 | # - 0x20 (start of this bootrom) 26 | # + 0x1000 (bootrom size 4kB) 27 | # + 0x188 (offset of the scratch1 register) 28 | li t1, 0x1168 29 | add t0, t0, t1 30 | lw t0, 0(t0) 31 | jalr ra, 0(t0) 32 | j _snitch_park 33 | -------------------------------------------------------------------------------- /target/snitch_cluster/test/bootrom.ld: -------------------------------------------------------------------------------- 1 | /* Copyright 2020 ETH Zurich and University of Bologna. */ 2 | /* Solderpad Hardware License, Version 0.51, see LICENSE for details. */ 3 | /* SPDX-License-Identifier: SHL-0.51 */ 4 | 5 | ENTRY(_snitch_park) 6 | 7 | SECTIONS 8 | { 9 | .text : { *(.text) } 10 | } 11 | -------------------------------------------------------------------------------- /target/snitch_cluster/util/common.py: -------------------------------------------------------------------------------- 1 | # Copyright 2024 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | from pathlib import Path 8 | import os 9 | import subprocess 10 | 11 | MK_DIR = Path(__file__).resolve().parent.parent 12 | 13 | 14 | def extend_environment(vars, env=None): 15 | if env is None: 16 | env = os.environ.copy() 17 | env.update(vars) 18 | return env 19 | 20 | 21 | def run(cmd, env=None, dry_run=False, sync=True): 22 | cmd = [str(arg) for arg in cmd] 23 | if dry_run: 24 | print(' '.join(cmd)) 25 | return None 26 | else: 27 | if sync: 28 | return subprocess.run(cmd, env=env) 29 | else: 30 | return subprocess.Popen(cmd, env=env) 31 | 32 | 33 | def make(target, vars={}, flags=[], dir=MK_DIR, env=None, dry_run=False, sync=True): 34 | var_assignments = [f'{key}={value}' for key, value in vars.items()] 35 | cmd = ['make', *var_assignments, target] 36 | if dir is not None: 37 | cmd.extend(['-C', dir]) 38 | cmd.extend(flags) 39 | return run(cmd, env=env, dry_run=dry_run, sync=sync) 40 | -------------------------------------------------------------------------------- /util/bench/__init__.py: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pulp-platform/snitch_cluster/48aebb1ae1dbadc75baaac4d3bcb1158ba90b84b/util/bench/__init__.py -------------------------------------------------------------------------------- /util/bench/tests/__init__.py: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/pulp-platform/snitch_cluster/48aebb1ae1dbadc75baaac4d3bcb1158ba90b84b/util/bench/tests/__init__.py -------------------------------------------------------------------------------- /util/bench/tests/test_data/data.json: -------------------------------------------------------------------------------- 1 | { 2 | "hart_0": [ 3 | { 4 | "tstart": 1759.0, 5 | "tend": 6802.0, 6 | "fpss_fpu_occupancy": 0.006345429307951616, 7 | "total_ipc": 0.04501288915328178 8 | }, 9 | { 10 | "tstart": 6802.0, 11 | "tend": 12647.0, 12 | "fpss_fpu_occupancy": 0.013860369609856264, 13 | "total_ipc": 0.20756331279945245 14 | } 15 | ], 16 | "dma_9": { 17 | "aggregate_bw": 11.829313543599257, 18 | "transfers": [ 19 | { 20 | "tstart": 3512, 21 | "tend": 3526, 22 | "bw": 1.1428571428571428 23 | }, 24 | { 25 | "tstart": 3564, 26 | "tend": 3578, 27 | "bw": 1.1428571428571428 28 | } 29 | ] 30 | }, 31 | "dma_18": { 32 | "aggregate_bw": 16.633245382585752, 33 | "transfers": [ 34 | { 35 | "tstart": 3608, 36 | "tend": 3622, 37 | "bw": 1.1428571428571428 38 | }, 39 | { 40 | "tstart": 3660, 41 | "tend": 3674, 42 | "bw": 1.1428571428571428 43 | } 44 | ] 45 | } 46 | } 47 | -------------------------------------------------------------------------------- /util/bench/tests/test_data/roi.json: -------------------------------------------------------------------------------- 1 | { 2 | "hart_0": [ 3 | { 4 | "label": "compute", 5 | "tstart": 6802.0, 6 | "tend": 12647.0, 7 | "attrs": { 8 | "fpss_fpu_occupancy": 0.013860369609856264, 9 | "total_ipc": 0.20756331279945245 10 | } 11 | } 12 | ], 13 | "dma_9": [ 14 | { 15 | "label": "dma_in", 16 | "tstart": 3512, 17 | "tend": 3526, 18 | "attrs": { 19 | "bw": 1.1428571428571428 20 | } 21 | } 22 | ], 23 | "dma_18": [ 24 | { 25 | "label": "dma_in", 26 | "tstart": 3608, 27 | "tend": 3622, 28 | "attrs": { 29 | "bw": 1.1428571428571428 30 | } 31 | } 32 | ] 33 | } 34 | -------------------------------------------------------------------------------- /util/bench/tests/test_data/spec.json: -------------------------------------------------------------------------------- 1 | [ 2 | { 3 | "thread": "hart_0", 4 | "roi": [ 5 | {"idx": 1, "label": "compute"} 6 | ] 7 | }, 8 | % for i in range(0, num_clusters): 9 | { 10 | "thread": "${f'dma_{9*(i+1)}'}", 11 | "roi": [ 12 | {"idx": 0, "label": "dma_in"} 13 | ] 14 | }, 15 | % endfor 16 | ] 17 | -------------------------------------------------------------------------------- /util/clustergen/__init__.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | -------------------------------------------------------------------------------- /util/generate-opcodes.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # Copyright 2020 ETH Zurich and University of Bologna. 3 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 4 | # SPDX-License-Identifier: SHL-0.51 5 | 6 | # Generate the opcodes for the Snitch system. 7 | set -e 8 | ROOT=$(cd "$(dirname "${BASH_SOURCE[0]}")/.." && pwd) 9 | 10 | RISCV_OPCODES=$ROOT/sw/deps/riscv-opcodes 11 | OPCODES=(opcodes-pseudo opcodes-rv32i opcodes-rv64i opcodes-rv32m opcodes-rv64m opcodes-rv32a opcodes-rv64a opcodes-rv32h opcodes-rv64h opcodes-rv32f opcodes-rv64f opcodes-rv32d opcodes-rv64d opcodes-rv32q opcodes-rv64q opcodes-system opcodes-custom opcodes-rv32b_CUSTOM opcodes-dma_CUSTOM opcodes-frep_CUSTOM opcodes-ssr_CUSTOM opcodes-copift_CUSTOM opcodes-flt-occamy_CUSTOM opcodes-rvv-pseudo) 12 | 13 | ####### 14 | # RTL # 15 | ####### 16 | OPCODES+=(opcodes-ipu_CUSTOM) 17 | INSTR_SV=$ROOT/hw/snitch/src/riscv_instr.sv 18 | 19 | cat > $INSTR_SV <<- EOM 20 | // Copyright 2023 ETH Zurich and University of Bologna. 21 | // Solderpad Hardware License, Version 0.51, see LICENSE for details. 22 | // SPDX-License-Identifier: SHL-0.51 23 | 24 | EOM 25 | echo -e "// verilog_lint: waive-start parameter-name-style" >> $INSTR_SV 26 | cd $RISCV_OPCODES && cat ${OPCODES[@]} | ./parse_opcodes -sverilog >> $INSTR_SV 27 | echo -e "// verilog_lint: waive-stop parameter-name-style" >> $INSTR_SV 28 | -------------------------------------------------------------------------------- /util/lint/.yamllint.yml: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | extends: default 6 | 7 | rules: 8 | document-start: disable 9 | comments: 10 | min-spaces-from-content: 1 11 | line-length: 12 | max: 100 13 | allow-non-breakable-words: true 14 | allow-non-breakable-inline-mappings: true 15 | ignore: | 16 | Bender.yml 17 | workflows/lint.yml 18 | colons: 19 | ignore: | 20 | Bender.yml 21 | braces: 22 | ignore: | 23 | Bender.yml 24 | commas: 25 | ignore: | 26 | Bender.yml 27 | -------------------------------------------------------------------------------- /util/lint/waiver.verible: -------------------------------------------------------------------------------- 1 | # Copyright 2023 ETH Zurich and University of Bologna. 2 | # Solderpad Hardware License, Version 0.51, see LICENSE for details. 3 | # SPDX-License-Identifier: SHL-0.51 4 | 5 | # Auto-generated configuration registers are waived 6 | waive --rule=typedef-structs-unions --location="hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_pkg.sv" 7 | waive --rule=line-length --location="hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_pkg.sv" 8 | waive --rule=parameter-name-style --location="hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv" 9 | waive --rule=no-trailing-spaces --location="hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv" 10 | -------------------------------------------------------------------------------- /util/sim/__init__.py: -------------------------------------------------------------------------------- 1 | # Copyright 2024 ETH Zurich and University of Bologna. 2 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 3 | # SPDX-License-Identifier: Apache-2.0 4 | # 5 | # Luca Colagrande 6 | 7 | from .SnitchSim import SnitchSim 8 | 9 | __all__ = ['SnitchSim'] 10 | -------------------------------------------------------------------------------- /util/sim/list_apps.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | # Copyright 2023 ETH Zurich and University of Bologna. 3 | # Licensed under the Apache License, Version 2.0, see LICENSE for details. 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Luca Colagrande 7 | 8 | import argparse 9 | import yaml 10 | from pathlib import Path 11 | 12 | 13 | def main(): 14 | # Argument parsing 15 | parser = argparse.ArgumentParser() 16 | parser.add_argument( 17 | '--in-dir', 18 | type=Path, 19 | help='Only apps below this directory (at any level) will be listed') 20 | parser.add_argument( 21 | 'input', 22 | help='The YAML file containing run information') 23 | args = parser.parse_args() 24 | 25 | with open(args.input, 'r') as file: 26 | tests = yaml.safe_load(file)['runs'] 27 | 28 | for test in tests: 29 | elf = Path(test['elf']) 30 | match_parts = args.in_dir.parts 31 | if elf.parts[:len(match_parts)] == match_parts: 32 | print(elf.stem) 33 | 34 | 35 | if __name__ == '__main__': 36 | main() 37 | --------------------------------------------------------------------------------