├── .gitignore
├── LICENSE
├── README.md
├── TCP_IP_Stack
    ├── datatype.h
    ├── internet_layer
    │   ├── ARP.c
    │   ├── ARP.h
    │   ├── ICMP.c
    │   ├── ICMP.h
    │   ├── IP.c
    │   └── IP.h
    ├── mIPConfig.h
    ├── myTCPIP.c
    ├── myTCPIP.h
    ├── network_layer
    │   ├── TCP_virtualWindow.c
    │   ├── TCP_virtualWindow.h
    │   ├── driver.c
    │   ├── driver.h
    │   ├── enc28j60.c
    │   ├── enc28j60.h
    │   ├── eth.c
    │   ├── eth.h
    │   ├── spi_enc28j60.c
    │   └── spi_enc28j60.h
    ├── share.c
    ├── share.h
    └── transport_layer
    │   ├── TCP.c
    │   ├── TCP.h
    │   ├── UDP.c
    │   └── UDP.h
├── Third
    └── fatfs
    │   ├── diskio.c
    │   ├── diskio.h
    │   ├── ff.c
    │   ├── ff.h
    │   ├── ffconf.h
    │   ├── integer.h
    │   ├── option
    │       ├── cc932.c
    │       ├── cc936.c
    │       ├── cc949.c
    │       ├── cc950.c
    │       ├── ccsbcs.c
    │       ├── syscall.c
    │       └── unicode.c
    │   └── readme.txt
├── lib
    ├── inc
    │   ├── misc.h
    │   ├── stm32f4xx_adc.h
    │   ├── stm32f4xx_can.h
    │   ├── stm32f4xx_crc.h
    │   ├── stm32f4xx_cryp.h
    │   ├── stm32f4xx_dac.h
    │   ├── stm32f4xx_dbgmcu.h
    │   ├── stm32f4xx_dcmi.h
    │   ├── stm32f4xx_dma.h
    │   ├── stm32f4xx_exti.h
    │   ├── stm32f4xx_flash.h
    │   ├── stm32f4xx_fsmc.h
    │   ├── stm32f4xx_gpio.h
    │   ├── stm32f4xx_hash.h
    │   ├── stm32f4xx_i2c.h
    │   ├── stm32f4xx_iwdg.h
    │   ├── stm32f4xx_pwr.h
    │   ├── stm32f4xx_rcc.h
    │   ├── stm32f4xx_rng.h
    │   ├── stm32f4xx_rtc.h
    │   ├── stm32f4xx_sdio.h
    │   ├── stm32f4xx_spi.h
    │   ├── stm32f4xx_syscfg.h
    │   ├── stm32f4xx_tim.h
    │   ├── stm32f4xx_usart.h
    │   └── stm32f4xx_wwdg.h
    └── src
    │   ├── misc.c
    │   ├── stm32f4xx_adc.c
    │   ├── stm32f4xx_can.c
    │   ├── stm32f4xx_crc.c
    │   ├── stm32f4xx_cryp.c
    │   ├── stm32f4xx_cryp_aes.c
    │   ├── stm32f4xx_cryp_des.c
    │   ├── stm32f4xx_cryp_tdes.c
    │   ├── stm32f4xx_dac.c
    │   ├── stm32f4xx_dbgmcu.c
    │   ├── stm32f4xx_dcmi.c
    │   ├── stm32f4xx_dma.c
    │   ├── stm32f4xx_exti.c
    │   ├── stm32f4xx_flash.c
    │   ├── stm32f4xx_fsmc.c
    │   ├── stm32f4xx_gpio.c
    │   ├── stm32f4xx_hash.c
    │   ├── stm32f4xx_hash_md5.c
    │   ├── stm32f4xx_hash_sha1.c
    │   ├── stm32f4xx_i2c.c
    │   ├── stm32f4xx_iwdg.c
    │   ├── stm32f4xx_pwr.c
    │   ├── stm32f4xx_rcc.c
    │   ├── stm32f4xx_rng.c
    │   ├── stm32f4xx_rtc.c
    │   ├── stm32f4xx_sdio.c
    │   ├── stm32f4xx_spi.c
    │   ├── stm32f4xx_syscfg.c
    │   ├── stm32f4xx_tim.c
    │   ├── stm32f4xx_usart.c
    │   └── stm32f4xx_wwdg.c
├── other
    ├── sdio_sd.c
    ├── sdio_sd.h
    ├── spi.c
    ├── spi.h
    ├── usart.c
    └── usart.h
├── proj
    ├── JLinkLog.txt
    ├── JLinkSettings.ini
    ├── output
    │   ├── ExtDll.iex
    │   ├── test.axf
    │   ├── test.build_log.htm
    │   ├── test.htm
    │   ├── test.lnp
    │   └── test.sct
    ├── startup_stm32f4xx.s
    ├── test.uvgui.wqj
    ├── test.uvgui_wqj.bak
    ├── test.uvopt
    ├── test.uvproj
    ├── test_Target 1.dep
    ├── test_uvopt.bak
    └── test_uvproj.bak
├── user
    ├── main.c
    ├── main.h
    ├── stm32f4xx_conf.h
    ├── stm32f4xx_it.c
    ├── stm32f4xx_it.h
    └── system_stm32f4xx.c
└── webserver
    ├── ftp.c
    ├── ftp.h
    ├── ftp_ack.h
    ├── http.c
    ├── http.h
    ├── http_ack.h
    ├── tcp_ip
        ├── enc28j60.c
        ├── enc28j60.h
        ├── ip_arp_udp_tcp.c
        ├── ip_arp_udp_tcp.h
        ├── net.h
        ├── spi_enc28j60.c
        ├── spi_enc28j60.h
        ├── web_server.c
        └── web_server.h
    ├── webserver.c
    └── webserver.h


/.gitignore:
--------------------------------------------------------------------------------
 1 | # Object files
 2 | *.o
 3 | *.ko
 4 | *.obj
 5 | *.elf
 6 | 
 7 | # Precompiled Headers
 8 | *.gch
 9 | *.pch
10 | 
11 | # Libraries
12 | *.lib
13 | *.a
14 | *.la
15 | *.lo
16 | 
17 | # Shared objects (inc. Windows DLLs)
18 | *.dll
19 | *.so
20 | *.so.*
21 | *.dylib
22 | 
23 | # Executables
24 | *.exe
25 | *.out
26 | *.app
27 | *.i*86
28 | *.x86_64
29 | *.hex
30 | 
31 | # Debug files
32 | *.dSYM/
33 | 
34 | # keil
35 | *.crf
36 | *.d
37 | *.map
38 | *.lst
39 | 


--------------------------------------------------------------------------------
/LICENSE:
--------------------------------------------------------------------------------
 1 | The MIT License (MIT)
 2 | 
 3 | Copyright (c) 2015 qpalzmqaz123
 4 | 
 5 | Permission is hereby granted, free of charge, to any person obtaining a copy
 6 | of this software and associated documentation files (the "Software"), to deal
 7 | in the Software without restriction, including without limitation the rights
 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 9 | copies of the Software, and to permit persons to whom the Software is
10 | furnished to do so, subject to the following conditions:
11 | 
12 | The above copyright notice and this permission notice shall be included in all
13 | copies or substantial portions of the Software.
14 | 
15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 | SOFTWARE.
22 | 
23 | 


--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | # tiny-tcp-ip-stack
2 | 小型的tcp/ip协议栈，主控芯片为stm32f401RET6
3 | 


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/TCP_IP_Stack/datatype.h:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/TCP_IP_Stack/datatype.h


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/TCP_IP_Stack/internet_layer/ARP.c:
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/TCP_IP_Stack/internet_layer/ICMP.c:
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/TCP_IP_Stack/internet_layer/IP.c:
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/TCP_IP_Stack/mIPConfig.h:
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/TCP_IP_Stack/myTCPIP.c:
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/TCP_IP_Stack/network_layer/TCP_virtualWindow.c:
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/TCP_IP_Stack/network_layer/TCP_virtualWindow.h:
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 1 | #ifndef __TCP_VIRTUALWINDOW_H
 2 | #define __TCP_VIRTUALWINDOW_H
 3 | 
 4 | #include "datatype.h"
 5 | 
 6 | mIPErr TCP_vndOpen(UINT8 *size, UINT32 *length, VND_METHOD method);
 7 | mIPErr TCP_vndWriteReady(UINT8 *dstName, VND_METHOD method);
 8 | mIPErr TCP_vndWrite(UINT8 *data, UINT32 dataLen, VND_METHOD method);
 9 | mIPErr TCP_vndGet(UINT8 *data, UINT32 dataLen, VND_METHOD method);
10 | mIPErr TCP_vndMvPtr(UINT32 offset, VND_METHOD method);
11 | mIPErr TCP_vndClose(VND_METHOD method);
12 | 
13 | #endif
14 | 
15 | 


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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/TCP_IP_Stack/network_layer/driver.c


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/TCP_IP_Stack/network_layer/driver.h:
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 1 | #ifndef __DRIVER_H
 2 | #define __DRIVER_H
 3 | 
 4 | #include "datatype.h"
 5 | 
 6 | mIPErr myTCPIP_driverInit(UINT8 *mac);
 7 | UINT32 myTCPIP_getPacket(UINT8 *buf, UINT32 maxLength);
 8 | mIPErr  myTCPIP_sendPacket(UINT8 *buf, UINT32 length);
 9 | UINT32 myTCPIP_getTime(void);
10 | 
11 | #endif
12 | 
13 | 


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/TCP_IP_Stack/network_layer/enc28j60.c:
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/TCP_IP_Stack/network_layer/spi_enc28j60.c:
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 1 | #include "spi_enc28j60.h"
 2 | #include "spi.h"
 3 | 																				  
 4 | void SPI_Enc28j60_Init(void)
 5 | {
 6 | 	spiInit();
 7 | }
 8 | 
 9 | unsigned char	SPI1_ReadWrite(unsigned char writedat)
10 | {
11 | 	return spiSR(writedat);
12 | }
13 | 
14 | 


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/TCP_IP_Stack/network_layer/spi_enc28j60.h:
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 1 | #ifndef __SPI_ENC28J60_H
 2 | #define __SPI_ENC28J60_H
 3 | 
 4 | 
 5 | 
 6 | void SPI_Enc28j60_Init(void);
 7 | unsigned char	SPI1_ReadWrite(unsigned char writedat);
 8 | 
 9 | #endif /* __SPI_ENC28J60_H */
10 | 


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/TCP_IP_Stack/share.h:
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 1 | #ifndef __SHARE_H
 2 | #define __SHARE_H
 3 | 
 4 | #include "datatype.h"
 5 | 
 6 | #define MKUINT16BIG(ptr) (UINT16)( ((UINT16)*(ptr) << 8) | (UINT16)*((ptr) + 1) )
 7 | #define MKUINT16LIT(ptr) (UINT16)( (UINT16)*(ptr) | ((UINT16)*((ptr) + 1) << 8) )
 8 | 
 9 | #define MKUINT32BIG(ptr) (UINT32)( ((UINT32)*(ptr) << 24) | ((UINT32)*((ptr) +  1) << 16) | ((UINT32)*((ptr) + 2) << 8) | (UINT32)*((ptr) + 3) )
10 | #define MKUINT32LIT(ptr) (UINT32)(  (UINT32)*(ptr) | ((UINT32)*((ptr) + 1) << 8) | ((UINT32)*((ptr) + 2) << 16) | ((UINT32)*((ptr) + 3) << 24) )
11 | 
12 | #define UINT16TOPTRBIG(ptr, dat) { *(ptr) = (UINT8)((dat) >> 8); *((ptr) + 1) = (UINT8)(dat); } 
13 | #define UINT16TOPTRLIT(ptr, dat) { *(ptr) = (UINT8)(dat); *((ptr) + 1) = (UINT8)((dat) >> 8); }
14 | 
15 | #define UINT32TOPTRBIG(ptr, dat) { *(ptr) = (UINT8)((dat) >> 24); *((ptr) + 1) = (UINT8)((dat) >> 16); *((ptr) + 2) = (UINT8)((dat) >> 8); *((ptr) + 3) = (UINT8)(dat); } 
16 | #define UINT32TOPTRLIT(ptr, dat) { *(ptr) = (UINT8)(dat); *((ptr) + 1) = (UINT8)((dat) >> 8); *((ptr) + 2) = (UINT8)((dat) >> 16); *((ptr) + 3) = (UINT8)((dat) >> 24); }
17 | 
18 | void bufCopy(UINT8 *dst, UINT8 *src, UINT32 len);
19 | UINT8 bufMatch(UINT8 *buf1, UINT8 *buf2, UINT32 len);
20 | UINT16 calcuCheckSum(UINT8 *ptr, UINT32 len);
21 | UINT16 calcuCheckSum2Buf(UINT8 *buf1, UINT32 len1, UINT8 *buf2, UINT32 len2);
22 | UINT32 strPos(UINT8 *buf, UINT32 len1, UINT8 *str, UINT32 len2);
23 | 
24 | #endif
25 | 


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/Third/fatfs/diskio.c:
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  1 | /*-----------------------------------------------------------------------*/
  2 | /* Low level disk I/O module skeleton for FatFs     (C)ChaN, 2013        */
  3 | /*-----------------------------------------------------------------------*/
  4 | /* If a working storage control module is available, it should be        */
  5 | /* attached to the FatFs via a glue function rather than modifying it.   */
  6 | /* This is an example of glue functions to attach various exsisting      */
  7 | /* storage control module to the FatFs module with a defined API.        */
  8 | /*-----------------------------------------------------------------------*/
  9 | 
 10 | #include "diskio.h"		/* FatFs lower layer API */
 11 | #include "sdio_sd.h"
 12 | 
 13 | /* Definitions of physical drive number for each media */
 14 | #define MMC		0
 15 | #define ATA		1
 16 | #define USB		2
 17 | 
 18 | 
 19 | /*-----------------------------------------------------------------------*/
 20 | /* Inidialize a Drive                                                    */
 21 | /*-----------------------------------------------------------------------*/
 22 | 
 23 | DSTATUS disk_initialize (
 24 | 	BYTE pdrv				/* Physical drive nmuber (0..) */
 25 | )
 26 | {
 27 | 	switch (pdrv) {
 28 | 	case MMC :
 29 | 		return (SD_Init() == SD_OK) ? (RES_OK) : (STA_NOINIT);
 30 | 	}
 31 | 	return STA_NOINIT;
 32 | }
 33 | 
 34 | 
 35 | 
 36 | /*-----------------------------------------------------------------------*/
 37 | /* Get Disk Status                                                       */
 38 | /*-----------------------------------------------------------------------*/
 39 | 
 40 | DSTATUS disk_status (
 41 | 	BYTE pdrv		/* Physical drive nmuber (0..) */
 42 | )
 43 | {
 44 | 	switch (pdrv) {
 45 | 	case MMC :
 46 | 		return RES_OK;
 47 | 	}
 48 | 	return STA_NOINIT;
 49 | }
 50 | 
 51 | 
 52 | 
 53 | /*-----------------------------------------------------------------------*/
 54 | /* Read Sector(s)                                                        */
 55 | /*-----------------------------------------------------------------------*/
 56 | 
 57 | DRESULT disk_read (
 58 | 	BYTE pdrv,		/* Physical drive nmuber (0..) */
 59 | 	BYTE *buff,		/* Data buffer to store read data */
 60 | 	DWORD sector,	/* Sector address (LBA) */
 61 | 	UINT count		/* Number of sectors to read (1..128) */
 62 | )
 63 | {
 64 | 	SD_Error RE = SD_OK;
 65 | 	unsigned long i;
 66 | 	
 67 | 	if(!count) {  /* count must >= 1 */
 68 | 		return RES_PARERR;
 69 | 	}
 70 | 
 71 | 	switch (pdrv) {
 72 | 	case MMC :
 73 | 		if(count == 1) {  /* read one block */
 74 | 			RE = SD_ReadBlock(buff, sector << 9, 512);
 75 | 			SD_WaitReadOperation();
 76 | 			while(SD_GetStatus() != SD_TRANSFER_OK);
 77 | 		}
 78 | 		else {  /* read multi block */
 79 | //			RE = SD_ReadMultiBlocks(buff, sector << 9, 512, count);
 80 | 			for(i = 0; i < count; i++) {
 81 | 				RE = SD_ReadBlock(buff + (i << 9), (sector + i) << 9, 512);
 82 | 				SD_WaitReadOperation();
 83 | 				while(SD_GetStatus() != SD_TRANSFER_OK);
 84 | 			}
 85 | 		}
 86 | 		return (RE == SD_OK) ? (RES_OK) : (RES_PARERR);
 87 | 	}
 88 | 	return RES_PARERR;
 89 | }
 90 | 
 91 | 
 92 | /*-----------------------------------------------------------------------*/
 93 | /* Write Sector(s)                                                       */
 94 | /*-----------------------------------------------------------------------*/
 95 | 
 96 | #if _USE_WRITE
 97 | DRESULT disk_write (
 98 | 	BYTE pdrv,			/* Physical drive nmuber (0..) */
 99 | 	const BYTE *buff,	/* Data to be written */
100 | 	DWORD sector,		/* Sector address (LBA) */
101 | 	UINT count			/* Number of sectors to write (1..128) */
102 | )
103 | {
104 | 	SD_Error RE = SD_OK;
105 | 	unsigned long i;	
106 | 	
107 | 	if(!count) {  /* count must >= 1 */
108 | 		return RES_PARERR;
109 | 	}
110 | 
111 | 	switch (pdrv) {
112 | 	case MMC :
113 | 		if(count == 1) {  /* read one block */
114 | 			RE = SD_WriteBlock((uint8_t *)buff, sector << 9, 512);
115 | 			SD_WaitReadOperation();
116 | 			while(SD_GetStatus() != SD_TRANSFER_OK);
117 | 		}
118 | 		else {  /* read multi block */
119 |  //			RE = SD_WriteMultiBlocks((uint8_t *)buff, sector << 9, 512, count);
120 | 			for(i = 0; i < count; i++) {
121 | 				RE = SD_WriteBlock((uint8_t *)(buff + (i << 9)), (sector + i) << 9, 512);
122 | 				SD_WaitReadOperation();
123 | 				while(SD_GetStatus() != SD_TRANSFER_OK);
124 | 			}
125 | 			
126 |  		}
127 | 		
128 | 		return (RE == SD_OK) ? (RES_OK) : (RES_PARERR);
129 | 	}
130 | 	return RES_PARERR;
131 | }
132 | #endif
133 | 
134 | 
135 | /*-----------------------------------------------------------------------*/
136 | /* Miscellaneous Functions                                               */
137 | /*-----------------------------------------------------------------------*/
138 | 
139 | #if _USE_IOCTL
140 | DRESULT disk_ioctl (
141 | 	BYTE pdrv,		/* Physical drive nmuber (0..) */
142 | 	BYTE cmd,		/* Control code */
143 | 	void *buff		/* Buffer to send/receive control data */
144 | )
145 | {
146 | 	SD_Error RE = SD_OK;
147 | 	SD_CardInfo CardInfo;
148 | 
149 | 	switch (pdrv) {
150 | 	case MMC :
151 | 		RE = SD_GetCardInfo(&CardInfo);
152 | 		if(RE == SD_OK) {
153 | 			switch(cmd) {
154 | 				case GET_SECTOR_COUNT :
155 | 					*(DWORD *)buff = CardInfo.CardCapacity/CardInfo.CardBlockSize;
156 | 					break;
157 | 				case GET_BLOCK_SIZE :
158 | 					*(WORD *)buff = CardInfo.CardBlockSize;
159 | 					break;
160 | 				default :
161 | 					break;
162 | 			}
163 | 			return RES_OK;
164 | 		}
165 | 		else 
166 | 			return RES_PARERR;
167 | 	}
168 | 	return RES_PARERR;
169 | }
170 | #endif
171 | 
172 | DWORD get_fattime (void) {
173 | 	return 0;
174 | }
175 | 


--------------------------------------------------------------------------------
/Third/fatfs/diskio.h:
--------------------------------------------------------------------------------
 1 | /*-----------------------------------------------------------------------/
 2 | /  Low level disk interface modlue include file   (C)ChaN, 2013          /
 3 | /-----------------------------------------------------------------------*/
 4 | 
 5 | #ifndef _DISKIO_DEFINED
 6 | #define _DISKIO_DEFINED
 7 | 
 8 | #ifdef __cplusplus
 9 | extern "C" {
10 | #endif
11 | 
12 | #define _USE_WRITE	1	/* 1: Enable disk_write function */
13 | #define _USE_IOCTL	1	/* 1: Enable disk_ioctl fucntion */
14 | 
15 | #include "integer.h"
16 | 
17 | 
18 | /* Status of Disk Functions */
19 | typedef BYTE	DSTATUS;
20 | 
21 | /* Results of Disk Functions */
22 | typedef enum {
23 | 	RES_OK = 0,		/* 0: Successful */
24 | 	RES_ERROR,		/* 1: R/W Error */
25 | 	RES_WRPRT,		/* 2: Write Protected */
26 | 	RES_NOTRDY,		/* 3: Not Ready */
27 | 	RES_PARERR		/* 4: Invalid Parameter */
28 | } DRESULT;
29 | 
30 | 
31 | /*---------------------------------------*/
32 | /* Prototypes for disk control functions */
33 | 
34 | 
35 | DSTATUS disk_initialize (BYTE pdrv);
36 | DSTATUS disk_status (BYTE pdrv);
37 | DRESULT disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
38 | DRESULT disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count);
39 | DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff);
40 | 
41 | 
42 | /* Disk Status Bits (DSTATUS) */
43 | 
44 | #define STA_NOINIT		0x01	/* Drive not initialized */
45 | #define STA_NODISK		0x02	/* No medium in the drive */
46 | #define STA_PROTECT		0x04	/* Write protected */
47 | 
48 | 
49 | /* Command code for disk_ioctrl fucntion */
50 | 
51 | /* Generic command (used by FatFs) */
52 | #define CTRL_SYNC			0	/* Flush disk cache (for write functions) */
53 | #define GET_SECTOR_COUNT	1	/* Get media size (for only f_mkfs()) */
54 | #define GET_SECTOR_SIZE		2	/* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
55 | #define GET_BLOCK_SIZE		3	/* Get erase block size (for only f_mkfs()) */
56 | #define CTRL_ERASE_SECTOR	4	/* Force erased a block of sectors (for only _USE_ERASE) */
57 | 
58 | /* Generic command (not used by FatFs) */
59 | #define CTRL_POWER			5	/* Get/Set power status */
60 | #define CTRL_LOCK			6	/* Lock/Unlock media removal */
61 | #define CTRL_EJECT			7	/* Eject media */
62 | #define CTRL_FORMAT			8	/* Create physical format on the media */
63 | 
64 | /* MMC/SDC specific ioctl command */
65 | #define MMC_GET_TYPE		10	/* Get card type */
66 | #define MMC_GET_CSD			11	/* Get CSD */
67 | #define MMC_GET_CID			12	/* Get CID */
68 | #define MMC_GET_OCR			13	/* Get OCR */
69 | #define MMC_GET_SDSTAT		14	/* Get SD status */
70 | 
71 | /* ATA/CF specific ioctl command */
72 | #define ATA_GET_REV			20	/* Get F/W revision */
73 | #define ATA_GET_MODEL		21	/* Get model name */
74 | #define ATA_GET_SN			22	/* Get serial number */
75 | 
76 | #ifdef __cplusplus
77 | }
78 | #endif
79 | 
80 | #endif
81 | 


--------------------------------------------------------------------------------
/Third/fatfs/ffconf.h:
--------------------------------------------------------------------------------
  1 | /*---------------------------------------------------------------------------/
  2 | /  FatFs - FAT file system module configuration file  R0.10b (C)ChaN, 2014
  3 | /---------------------------------------------------------------------------*/
  4 | 
  5 | #ifndef _FFCONF
  6 | #define _FFCONF 8051	/* Revision ID */
  7 | 
  8 | 
  9 | /*---------------------------------------------------------------------------/
 10 | / Functions and Buffer Configurations
 11 | /---------------------------------------------------------------------------*/
 12 | 
 13 | #define	_FS_TINY		0	/* 0:Normal or 1:Tiny */
 14 | /* When _FS_TINY is set to 1, it reduces memory consumption _MAX_SS bytes each
 15 | /  file object. For file data transfer, FatFs uses the common sector buffer in
 16 | /  the file system object (FATFS) instead of private sector buffer eliminated
 17 | /  from the file object (FIL). */
 18 | 
 19 | 
 20 | #define _FS_READONLY	0	/* 0:Read/Write or 1:Read only */
 21 | /* Setting _FS_READONLY to 1 defines read only configuration. This removes
 22 | /  writing functions, f_write(), f_sync(), f_unlink(), f_mkdir(), f_chmod(),
 23 | /  f_rename(), f_truncate() and useless f_getfree(). */
 24 | 
 25 | 
 26 | #define _FS_MINIMIZE	0	/* 0 to 3 */
 27 | /* The _FS_MINIMIZE option defines minimization level to remove API functions.
 28 | /
 29 | /   0: All basic functions are enabled.
 30 | /   1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_chmod(), f_utime(),
 31 | /      f_truncate() and f_rename() function are removed.
 32 | /   2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.
 33 | /   3: f_lseek() function is removed in addition to 2. */
 34 | 
 35 | 
 36 | #define	_USE_STRFUNC	0	/* 0:Disable or 1-2:Enable */
 37 | /* To enable string functions, set _USE_STRFUNC to 1 or 2. */
 38 | 
 39 | 
 40 | #define	_USE_MKFS		0	/* 0:Disable or 1:Enable */
 41 | /* To enable f_mkfs() function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
 42 | 
 43 | 
 44 | #define	_USE_FASTSEEK	1	/* 0:Disable or 1:Enable */
 45 | /* To enable fast seek feature, set _USE_FASTSEEK to 1. */
 46 | 
 47 | 
 48 | #define _USE_LABEL		0	/* 0:Disable or 1:Enable */
 49 | /* To enable volume label functions, set _USE_LAVEL to 1 */
 50 | 
 51 | 
 52 | #define	_USE_FORWARD	0	/* 0:Disable or 1:Enable */
 53 | /* To enable f_forward() function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
 54 | 
 55 | 
 56 | /*---------------------------------------------------------------------------/
 57 | / Locale and Namespace Configurations
 58 | /---------------------------------------------------------------------------*/
 59 | 
 60 | #define _CODE_PAGE	437
 61 | /* The _CODE_PAGE specifies the OEM code page to be used on the target system.
 62 | /  Incorrect setting of the code page can cause a file open failure.
 63 | /
 64 | /   932  - Japanese Shift_JIS (DBCS, OEM, Windows)
 65 | /   936  - Simplified Chinese GBK (DBCS, OEM, Windows)
 66 | /   949  - Korean (DBCS, OEM, Windows)
 67 | /   950  - Traditional Chinese Big5 (DBCS, OEM, Windows)
 68 | /   1250 - Central Europe (Windows)
 69 | /   1251 - Cyrillic (Windows)
 70 | /   1252 - Latin 1 (Windows)
 71 | /   1253 - Greek (Windows)
 72 | /   1254 - Turkish (Windows)
 73 | /   1255 - Hebrew (Windows)
 74 | /   1256 - Arabic (Windows)
 75 | /   1257 - Baltic (Windows)
 76 | /   1258 - Vietnam (OEM, Windows)
 77 | /   437  - U.S. (OEM)
 78 | /   720  - Arabic (OEM)
 79 | /   737  - Greek (OEM)
 80 | /   775  - Baltic (OEM)
 81 | /   850  - Multilingual Latin 1 (OEM)
 82 | /   858  - Multilingual Latin 1 + Euro (OEM)
 83 | /   852  - Latin 2 (OEM)
 84 | /   855  - Cyrillic (OEM)
 85 | /   866  - Russian (OEM)
 86 | /   857  - Turkish (OEM)
 87 | /   862  - Hebrew (OEM)
 88 | /   874  - Thai (OEM, Windows)
 89 | /   1    - ASCII (Valid for only non-LFN configuration) */
 90 | 
 91 | 
 92 | #define	_USE_LFN	1		/* 0 to 3 */
 93 | #define	_MAX_LFN	255		/* Maximum LFN length to handle (12 to 255) */
 94 | /* The _USE_LFN option switches the LFN feature.
 95 | /
 96 | /   0: Disable LFN feature. _MAX_LFN has no effect.
 97 | /   1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe.
 98 | /   2: Enable LFN with dynamic working buffer on the STACK.
 99 | /   3: Enable LFN with dynamic working buffer on the HEAP.
100 | /
101 | /  When enable LFN feature, Unicode handling functions ff_convert() and ff_wtoupper()
102 | /  function must be added to the project.
103 | /  The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. When use stack for the
104 | /  working buffer, take care on stack overflow. When use heap memory for the working
105 | /  buffer, memory management functions, ff_memalloc() and ff_memfree(), must be added
106 | /  to the project. */
107 | 
108 | 
109 | #define	_LFN_UNICODE	0	/* 0:ANSI/OEM or 1:Unicode */
110 | /* To switch the character encoding on the FatFs API (TCHAR) to Unicode, enable LFN
111 | /  feature and set _LFN_UNICODE to 1. This option affects behavior of string I/O
112 | /  functions. This option must be 0 when LFN feature is not enabled. */
113 | 
114 | 
115 | #define _STRF_ENCODE	3	/* 0:ANSI/OEM, 1:UTF-16LE, 2:UTF-16BE, 3:UTF-8 */
116 | /* When Unicode API is enabled by _LFN_UNICODE option, this option selects the character
117 | /  encoding on the file to be read/written via string I/O functions, f_gets(), f_putc(),
118 | /  f_puts and f_printf(). This option has no effect when _LFN_UNICODE == 0. Note that
119 | /  FatFs supports only BMP. */
120 | 
121 | 
122 | #define _FS_RPATH		0	/* 0 to 2 */
123 | /* The _FS_RPATH option configures relative path feature.
124 | /
125 | /   0: Disable relative path feature and remove related functions.
126 | /   1: Enable relative path. f_chdrive() and f_chdir() function are available.
127 | /   2: f_getcwd() function is available in addition to 1.
128 | /
129 | /  Note that output of the f_readdir() fnction is affected by this option. */
130 | 
131 | 
132 | /*---------------------------------------------------------------------------/
133 | / Drive/Volume Configurations
134 | /---------------------------------------------------------------------------*/
135 | 
136 | #define _VOLUMES	1
137 | /* Number of volumes (logical drives) to be used. */
138 | 
139 | 
140 | #define _STR_VOLUME_ID	0	/* 0:Use only 0-9 for drive ID, 1:Use strings for drive ID */
141 | #define _VOLUME_STRS	"RAM","NAND","CF","SD1","SD2","USB1","USB2","USB3"
142 | /* When _STR_VOLUME_ID is set to 1, also pre-defined strings can be used as drive
143 | /  number in the path name. _VOLUME_STRS defines the drive ID strings for each logical
144 | /  drives. Number of items must be equal to _VOLUMES. Valid characters for the drive ID
145 | /  strings are: 0-9 and A-Z. */
146 | 
147 | 
148 | #define	_MULTI_PARTITION	0	/* 0:Single partition, 1:Enable multiple partition */
149 | /* By default(0), each logical drive number is bound to the same physical drive number
150 | /  and only a FAT volume found on the physical drive is mounted. When it is set to 1,
151 | /  each logical drive number is bound to arbitrary drive/partition listed in VolToPart[].
152 | */
153 | 
154 | 
155 | #define	_MIN_SS		512
156 | #define	_MAX_SS		512
157 | /* These options configure the range of sector size to be supported. (512, 1024, 2048 or
158 | /  4096) Always set both 512 for most systems, all memory card and harddisk. But a larger
159 | /  value may be required for on-board flash memory and some type of optical media.
160 | /  When _MAX_SS is larger than _MIN_SS, FatFs is configured to variable sector size and
161 | /  GET_SECTOR_SIZE command must be implemented to the disk_ioctl() function. */
162 | 
163 | 
164 | #define	_USE_ERASE	0	/* 0:Disable or 1:Enable */
165 | /* To enable sector erase feature, set _USE_ERASE to 1. Also CTRL_ERASE_SECTOR command
166 | /  should be added to the disk_ioctl() function. */
167 | 
168 | 
169 | #define _FS_NOFSINFO	0	/* 0 to 3 */
170 | /* If you need to know correct free space on the FAT32 volume, set bit 0 of this option
171 | /  and f_getfree() function at first time after volume mount will force a full FAT scan.
172 | /  Bit 1 controls the last allocated cluster number as bit 0.
173 | /
174 | /  bit0=0: Use free cluster count in the FSINFO if available.
175 | /  bit0=1: Do not trust free cluster count in the FSINFO.
176 | /  bit1=0: Use last allocated cluster number in the FSINFO if available.
177 | /  bit1=1: Do not trust last allocated cluster number in the FSINFO.
178 | */
179 | 
180 | 
181 | 
182 | /*---------------------------------------------------------------------------/
183 | / System Configurations
184 | /---------------------------------------------------------------------------*/
185 | 
186 | #define	_FS_LOCK	0	/* 0:Disable or >=1:Enable */
187 | /* To enable file lock control feature, set _FS_LOCK to non-zero value.
188 | /  The value defines how many files/sub-directories can be opened simultaneously
189 | /  with file lock control. This feature uses bss _FS_LOCK * 12 bytes. */
190 | 
191 | 
192 | #define _FS_REENTRANT	0		/* 0:Disable or 1:Enable */
193 | #define _FS_TIMEOUT		1000	/* Timeout period in unit of time tick */
194 | #define	_SYNC_t			HANDLE	/* O/S dependent sync object type. e.g. HANDLE, OS_EVENT*, ID, SemaphoreHandle_t and etc.. */
195 | /* The _FS_REENTRANT option switches the re-entrancy (thread safe) of the FatFs module.
196 | /
197 | /   0: Disable re-entrancy. _FS_TIMEOUT and _SYNC_t have no effect.
198 | /   1: Enable re-entrancy. Also user provided synchronization handlers,
199 | /      ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj()
200 | /      function must be added to the project.
201 | */
202 | 
203 | 
204 | #define _WORD_ACCESS	0	/* 0 or 1 */
205 | /* The _WORD_ACCESS option is an only platform dependent option. It defines
206 | /  which access method is used to the word data on the FAT volume.
207 | /
208 | /   0: Byte-by-byte access. Always compatible with all platforms.
209 | /   1: Word access. Do not choose this unless under both the following conditions.
210 | /
211 | /  * Address misaligned memory access is always allowed for ALL instructions.
212 | /  * Byte order on the memory is little-endian.
213 | /
214 | /  If it is the case, _WORD_ACCESS can also be set to 1 to improve performance and
215 | /  reduce code size. Following table shows an example of some processor types.
216 | /
217 | /   ARM7TDMI    0           ColdFire    0           V850E       0
218 | /   Cortex-M3   0           Z80         0/1         V850ES      0/1
219 | /   Cortex-M0   0           RX600(LE)   0/1         TLCS-870    0/1
220 | /   AVR         0/1         RX600(BE)   0           TLCS-900    0/1
221 | /   AVR32       0           RL78        0           R32C        0
222 | /   PIC18       0/1         SH-2        0           M16C        0/1
223 | /   PIC24       0           H8S         0           MSP430      0
224 | /   PIC32       0           H8/300H     0           x86         0/1
225 | */
226 | 
227 | 
228 | #endif /* _FFCONF */
229 | 


--------------------------------------------------------------------------------
/Third/fatfs/integer.h:
--------------------------------------------------------------------------------
 1 | /*-------------------------------------------*/
 2 | /* Integer type definitions for FatFs module */
 3 | /*-------------------------------------------*/
 4 | 
 5 | #ifndef _FF_INTEGER
 6 | #define _FF_INTEGER
 7 | 
 8 | #ifdef _WIN32	/* FatFs development platform */
 9 | 
10 | #include <windows.h>
11 | #include <tchar.h>
12 | 
13 | #else			/* Embedded platform */
14 | 
15 | /* This type MUST be 8 bit */
16 | typedef unsigned char	BYTE;
17 | 
18 | /* These types MUST be 16 bit */
19 | typedef short			SHORT;
20 | typedef unsigned short	WORD;
21 | typedef unsigned short	WCHAR;
22 | 
23 | /* These types MUST be 16 bit or 32 bit */
24 | typedef int				INT;
25 | typedef unsigned int	UINT;
26 | 
27 | /* These types MUST be 32 bit */
28 | typedef long			LONG;
29 | typedef unsigned long	DWORD;
30 | 
31 | #endif
32 | 
33 | #endif
34 | 


--------------------------------------------------------------------------------
/Third/fatfs/option/syscall.c:
--------------------------------------------------------------------------------
  1 | /*------------------------------------------------------------------------*/
  2 | /* Sample code of OS dependent controls for FatFs                         */
  3 | /* (C)ChaN, 2012                                                          */
  4 | /*------------------------------------------------------------------------*/
  5 | 
  6 | #include <stdlib.h>		/* ANSI memory controls */
  7 | #include <malloc.h>		/* ANSI memory controls */
  8 | 
  9 | #include "../ff.h"
 10 | 
 11 | 
 12 | #if _FS_REENTRANT
 13 | /*------------------------------------------------------------------------*/
 14 | /* Create a Synchronization Object
 15 | /*------------------------------------------------------------------------*/
 16 | /* This function is called by f_mount() function to create a new
 17 | /  synchronization object, such as semaphore and mutex. When a 0 is
 18 | /  returned, the f_mount() function fails with FR_INT_ERR.
 19 | */
 20 | 
 21 | int ff_cre_syncobj (	/* 1:Function succeeded, 0:Could not create due to any error */
 22 | 	BYTE vol,			/* Corresponding logical drive being processed */
 23 | 	_SYNC_t* sobj		/* Pointer to return the created sync object */
 24 | )
 25 | {
 26 | 	int ret;
 27 | 
 28 | 
 29 | 	*sobj = CreateMutex(NULL, FALSE, NULL);		/* Win32 */
 30 | 	ret = (int)(*sobj != INVALID_HANDLE_VALUE);
 31 | 
 32 | //	*sobj = SyncObjects[vol];		/* uITRON (give a static created semaphore) */
 33 | //	ret = 1;
 34 | 
 35 | //	*sobj = OSMutexCreate(0, &err);	/* uC/OS-II */
 36 | //	ret = (int)(err == OS_NO_ERR);
 37 | 
 38 | //  *sobj = xSemaphoreCreateMutex();	/* FreeRTOS */
 39 | //	ret = (int)(*sobj != NULL);
 40 | 
 41 | 	return ret;
 42 | }
 43 | 
 44 | 
 45 | 
 46 | /*------------------------------------------------------------------------*/
 47 | /* Delete a Synchronization Object                                        */
 48 | /*------------------------------------------------------------------------*/
 49 | /* This function is called in f_mount() function to delete a synchronization
 50 | /  object that created with ff_cre_syncobj() function. When a 0 is
 51 | /  returned, the f_mount() function fails with FR_INT_ERR.
 52 | */
 53 | 
 54 | int ff_del_syncobj (	/* 1:Function succeeded, 0:Could not delete due to any error */
 55 | 	_SYNC_t sobj		/* Sync object tied to the logical drive to be deleted */
 56 | )
 57 | {
 58 | 	int ret;
 59 | 
 60 | 
 61 | 	ret = CloseHandle(sobj);	/* Win32 */
 62 | 
 63 | //	ret = 1;					/* uITRON (nothing to do) */
 64 | 
 65 | //	OSMutexDel(sobj, OS_DEL_ALWAYS, &err);	/* uC/OS-II */
 66 | //	ret = (int)(err == OS_NO_ERR);
 67 | 
 68 | //  xSemaphoreDelete(sobj);		/* FreeRTOS */
 69 | //	ret = 1;
 70 | 
 71 | 	return ret;
 72 | }
 73 | 
 74 | 
 75 | 
 76 | /*------------------------------------------------------------------------*/
 77 | /* Request Grant to Access the Volume                                     */
 78 | /*------------------------------------------------------------------------*/
 79 | /* This function is called on entering file functions to lock the volume.
 80 | /  When a FALSE is returned, the file function fails with FR_TIMEOUT.
 81 | */
 82 | 
 83 | int ff_req_grant (	/* TRUE:Got a grant to access the volume, FALSE:Could not get a grant */
 84 | 	_SYNC_t sobj	/* Sync object to wait */
 85 | )
 86 | {
 87 | 	int ret;
 88 | 
 89 | 	ret = (int)(WaitForSingleObject(sobj, _FS_TIMEOUT) == WAIT_OBJECT_0);	/* Win32 */
 90 | 
 91 | //	ret = (int)(wai_sem(sobj) == E_OK);			/* uITRON */
 92 | 
 93 | //	OSMutexPend(sobj, _FS_TIMEOUT, &err));		/* uC/OS-II */
 94 | //	ret = (int)(err == OS_NO_ERR);
 95 | 
 96 | //	ret = (int)(xSemaphoreTake(sobj, _FS_TIMEOUT) == pdTRUE);	/* FreeRTOS */
 97 | 
 98 | 	return ret;
 99 | }
100 | 
101 | 
102 | 
103 | /*------------------------------------------------------------------------*/
104 | /* Release Grant to Access the Volume                                     */
105 | /*------------------------------------------------------------------------*/
106 | /* This function is called on leaving file functions to unlock the volume.
107 | */
108 | 
109 | void ff_rel_grant (
110 | 	_SYNC_t sobj	/* Sync object to be signaled */
111 | )
112 | {
113 | 	ReleaseMutex(sobj);		/* Win32 */
114 | 
115 | //	sig_sem(sobj);			/* uITRON */
116 | 
117 | //	OSMutexPost(sobj);		/* uC/OS-II */
118 | 
119 | //	xSemaphoreGive(sobj);	/* FreeRTOS */
120 | }
121 | 
122 | #endif
123 | 
124 | 
125 | 
126 | 
127 | #if _USE_LFN == 3	/* LFN with a working buffer on the heap */
128 | /*------------------------------------------------------------------------*/
129 | /* Allocate a memory block                                                */
130 | /*------------------------------------------------------------------------*/
131 | /* If a NULL is returned, the file function fails with FR_NOT_ENOUGH_CORE.
132 | */
133 | 
134 | void* ff_memalloc (	/* Returns pointer to the allocated memory block */
135 | 	UINT msize		/* Number of bytes to allocate */
136 | )
137 | {
138 | 	return malloc(msize);
139 | }
140 | 
141 | 
142 | /*------------------------------------------------------------------------*/
143 | /* Free a memory block                                                    */
144 | /*------------------------------------------------------------------------*/
145 | 
146 | void ff_memfree (
147 | 	void* mblock	/* Pointer to the memory block to free */
148 | )
149 | {
150 | 	free(mblock);
151 | }
152 | 
153 | #endif
154 | 


--------------------------------------------------------------------------------
/Third/fatfs/option/unicode.c:
--------------------------------------------------------------------------------
 1 | #include "../ff.h"
 2 | 
 3 | #if _USE_LFN != 0
 4 | 
 5 | #if   _CODE_PAGE == 932	/* Japanese Shift_JIS */
 6 | #include "cc932.c"
 7 | #elif _CODE_PAGE == 936	/* Simplified Chinese GBK */
 8 | #include "cc936.c"
 9 | #elif _CODE_PAGE == 949	/* Korean */
10 | #include "cc949.c"
11 | #elif _CODE_PAGE == 950	/* Traditional Chinese Big5 */
12 | #include "cc950.c"
13 | #else					/* Small character-set */
14 | #include "ccsbcs.c"
15 | #endif
16 | 
17 | #endif
18 | 


--------------------------------------------------------------------------------
/Third/fatfs/readme.txt:
--------------------------------------------------------------------------------
  1 | FatFs Module Source Files R0.07e                        (C)ChaN, 2009
  2 | 
  3 | 
  4 | FILES
  5 | 
  6 |   ffconf.h   Configuration file for FatFs module.
  7 |   ff.h       Common include file for FatFs and application module.
  8 |   ff.c       FatFs module.
  9 |   diskio.h   Common include file for FatFs and disk I/O module.
 10 |   diskio.c   Skeleton of low level disk I/O module.
 11 |   integer.h  Alternative type definitions for integer variables.
 12 |   option     Optional external functions.
 13 | 
 14 |   Low level disk I/O module is not included in this archive because the FatFs
 15 |   module is only a generic file system layer and not depend on any specific
 16 |   storage device. You have to provide a low level disk I/O module that written
 17 |   to control your storage device.
 18 | 
 19 | 
 20 | 
 21 | AGREEMENTS
 22 | 
 23 |  FatFs module is an open source software to implement FAT file system to
 24 |  small embedded systems. This is a free software and is opened for education,
 25 |  research and commercial developments under license policy of following trems.
 26 | 
 27 |   Copyright (C) 2009, ChaN, all right reserved.
 28 | 
 29 |  * The FatFs module is a free software and there is NO WARRANTY.
 30 |  * No restriction on use. You can use, modify and redistribute it for
 31 |    personal, non-profit or commercial product UNDER YOUR RESPONSIBILITY.
 32 |  * Redistributions of source code must retain the above copyright notice.
 33 | 
 34 | 
 35 | 
 36 | REVISION HISTORY
 37 | 
 38 |   Feb 26, 2006  R0.00  Prototype
 39 | 
 40 |   Apr 29, 2006  R0.01  First release.
 41 | 
 42 |   Jun 01, 2006  R0.02  Added FAT12.
 43 |                        Removed unbuffered mode.
 44 |                        Fixed a problem on small (<32M) patition.
 45 | 
 46 |   Jun 10, 2006  R0.02a Added a configuration option _FS_MINIMUM.
 47 | 
 48 |   Sep 22, 2006  R0.03  Added f_rename.
 49 |                        Changed option _FS_MINIMUM to _FS_MINIMIZE.
 50 | 
 51 |   Dec 11, 2006  R0.03a Improved cluster scan algolithm to write files fast.
 52 |                        Fixed f_mkdir creates incorrect directory on FAT32.
 53 | 
 54 |   Feb 04, 2007  R0.04  Supported multiple drive system. (FatFs)
 55 |                        Changed some APIs for multiple drive system.
 56 |                        Added f_mkfs. (FatFs)
 57 |                        Added _USE_FAT32 option. (Tiny-FatFs)
 58 | 
 59 |   Apr 01, 2007  R0.04a Supported multiple partitions on a plysical drive. (FatFs)
 60 |                        Fixed an endian sensitive code in f_mkfs. (FatFs)
 61 |                        Added a capability of extending the file size to f_lseek.
 62 |                        Added minimization level 3.
 63 |                        Fixed a problem that can collapse a sector when recreate an
 64 |                        existing file in any sub-directory at non FAT32 cfg. (Tiny-FatFs)
 65 | 
 66 |   May 05, 2007  R0.04b Added _USE_NTFLAG option.
 67 |                        Added FSInfo support.
 68 |                        Fixed some problems corresponds to FAT32. (Tiny-FatFs)
 69 |                        Fixed DBCS name can result FR_INVALID_NAME.
 70 |                        Fixed short seek (0 < ofs <= csize) collapses the file object.
 71 | 
 72 |   Aug 25, 2007  R0.05  Changed arguments of f_read, f_write.
 73 |                        Changed arguments of f_mkfs. (FatFs)
 74 |                        Fixed f_mkfs on FAT32 creates incorrect FSInfo. (FatFs)
 75 |                        Fixed f_mkdir on FAT32 creates incorrect directory. (FatFs)
 76 | 
 77 |   Feb 03, 2008  R0.05a Added f_truncate().
 78 |                        Added f_utime().
 79 |                        Fixed off by one error at FAT sub-type determination.
 80 |                        Fixed btr in f_read() can be mistruncated.
 81 |                        Fixed cached sector is not flushed when create and close without write.
 82 | 
 83 |   Apr 01, 2008  R0.06  Added f_forward(). (Tiny-FatFs)
 84 |                        Added string functions: fputc(), fputs(), fprintf() and fgets().
 85 |                        Improved performance of f_lseek() on move to the same or following cluster.
 86 | 
 87 |   Apr 01, 2009, R0.07  Merged Tiny-FatFs as a buffer configuration option.
 88 |                        Added long file name support.
 89 |                        Added multiple code page support.
 90 |                        Added re-entrancy for multitask operation.
 91 |                        Added auto cluster size selection to f_mkfs().
 92 |                        Added rewind option to f_readdir().
 93 |                        Changed result code of critical errors.
 94 |                        Renamed string functions to avoid name collision.
 95 | 
 96 |   Apr 14, 2009, R0.07a Separated out OS dependent code on reentrant cfg.
 97 |                        Added multiple sector size support.
 98 | 
 99 |   Jun 21, 2009, R0.07c Fixed f_unlink() may return FR_OK on error.
100 |                        Fixed wrong cache control in f_lseek().
101 |                        Added relative path feature.
102 |                        Added f_chdir().
103 |                        Added f_chdrive().
104 |                        Added proper case conversion for extended characters.
105 | 
106 |   Nov 03,'2009 R0.07e  Separated out configuration options from ff.h to ffconf.h.
107 |                        Added a configuration option, _LFN_UNICODE.
108 |                        Fixed f_unlink() fails to remove a sub-dir on _FS_RPATH.
109 |                        Fixed name matching error on the 13 char boundary.
110 |                        Changed f_readdir() to return the SFN with always upper case on non-LFN cfg.
111 | 


--------------------------------------------------------------------------------
/lib/inc/misc.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    misc.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file contains all the functions prototypes for the miscellaneous
  8 |   *          firmware library functions (add-on to CMSIS functions).
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 20 |   ******************************************************************************
 21 |   */
 22 | 
 23 | /* Define to prevent recursive inclusion -------------------------------------*/
 24 | #ifndef __MISC_H
 25 | #define __MISC_H
 26 | 
 27 | #ifdef __cplusplus
 28 |  extern "C" {
 29 | #endif
 30 | 
 31 | /* Includes ------------------------------------------------------------------*/
 32 | #include "stm32f4xx.h"
 33 | 
 34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 35 |   * @{
 36 |   */
 37 | 
 38 | /** @addtogroup MISC
 39 |   * @{
 40 |   */
 41 | 
 42 | /* Exported types ------------------------------------------------------------*/
 43 | 
 44 | /** 
 45 |   * @brief  NVIC Init Structure definition  
 46 |   */
 47 | 
 48 | typedef struct
 49 | {
 50 |   uint8_t NVIC_IRQChannel;                    /*!< Specifies the IRQ channel to be enabled or disabled.
 51 |                                                    This parameter can be an enumerator of @ref IRQn_Type 
 52 |                                                    enumeration (For the complete STM32 Devices IRQ Channels
 53 |                                                    list, please refer to stm32f4xx.h file) */
 54 | 
 55 |   uint8_t NVIC_IRQChannelPreemptionPriority;  /*!< Specifies the pre-emption priority for the IRQ channel
 56 |                                                    specified in NVIC_IRQChannel. This parameter can be a value
 57 |                                                    between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
 58 |                                                    A lower priority value indicates a higher priority */
 59 | 
 60 |   uint8_t NVIC_IRQChannelSubPriority;         /*!< Specifies the subpriority level for the IRQ channel specified
 61 |                                                    in NVIC_IRQChannel. This parameter can be a value
 62 |                                                    between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
 63 |                                                    A lower priority value indicates a higher priority */
 64 | 
 65 |   FunctionalState NVIC_IRQChannelCmd;         /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
 66 |                                                    will be enabled or disabled. 
 67 |                                                    This parameter can be set either to ENABLE or DISABLE */   
 68 | } NVIC_InitTypeDef;
 69 |  
 70 | /* Exported constants --------------------------------------------------------*/
 71 | 
 72 | /** @defgroup MISC_Exported_Constants
 73 |   * @{
 74 |   */
 75 | 
 76 | /** @defgroup MISC_Vector_Table_Base 
 77 |   * @{
 78 |   */
 79 | 
 80 | #define NVIC_VectTab_RAM             ((uint32_t)0x20000000)
 81 | #define NVIC_VectTab_FLASH           ((uint32_t)0x08000000)
 82 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
 83 |                                   ((VECTTAB) == NVIC_VectTab_FLASH))
 84 | /**
 85 |   * @}
 86 |   */
 87 | 
 88 | /** @defgroup MISC_System_Low_Power 
 89 |   * @{
 90 |   */
 91 | 
 92 | #define NVIC_LP_SEVONPEND            ((uint8_t)0x10)
 93 | #define NVIC_LP_SLEEPDEEP            ((uint8_t)0x04)
 94 | #define NVIC_LP_SLEEPONEXIT          ((uint8_t)0x02)
 95 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
 96 |                         ((LP) == NVIC_LP_SLEEPDEEP) || \
 97 |                         ((LP) == NVIC_LP_SLEEPONEXIT))
 98 | /**
 99 |   * @}
100 |   */
101 | 
102 | /** @defgroup MISC_Preemption_Priority_Group 
103 |   * @{
104 |   */
105 | 
106 | #define NVIC_PriorityGroup_0         ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
107 |                                                             4 bits for subpriority */
108 | #define NVIC_PriorityGroup_1         ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
109 |                                                             3 bits for subpriority */
110 | #define NVIC_PriorityGroup_2         ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
111 |                                                             2 bits for subpriority */
112 | #define NVIC_PriorityGroup_3         ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
113 |                                                             1 bits for subpriority */
114 | #define NVIC_PriorityGroup_4         ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
115 |                                                             0 bits for subpriority */
116 | 
117 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
118 |                                        ((GROUP) == NVIC_PriorityGroup_1) || \
119 |                                        ((GROUP) == NVIC_PriorityGroup_2) || \
120 |                                        ((GROUP) == NVIC_PriorityGroup_3) || \
121 |                                        ((GROUP) == NVIC_PriorityGroup_4))
122 | 
123 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10)
124 | 
125 | #define IS_NVIC_SUB_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10)
126 | 
127 | #define IS_NVIC_OFFSET(OFFSET)  ((OFFSET) < 0x000FFFFF)
128 | 
129 | /**
130 |   * @}
131 |   */
132 | 
133 | /** @defgroup MISC_SysTick_clock_source 
134 |   * @{
135 |   */
136 | 
137 | #define SysTick_CLKSource_HCLK_Div8    ((uint32_t)0xFFFFFFFB)
138 | #define SysTick_CLKSource_HCLK         ((uint32_t)0x00000004)
139 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
140 |                                        ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
141 | /**
142 |   * @}
143 |   */
144 | 
145 | /**
146 |   * @}
147 |   */
148 | 
149 | /* Exported macro ------------------------------------------------------------*/
150 | /* Exported functions --------------------------------------------------------*/
151 | 
152 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
153 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
154 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
155 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
156 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
157 | 
158 | #ifdef __cplusplus
159 | }
160 | #endif
161 | 
162 | #endif /* __MISC_H */
163 | 
164 | /**
165 |   * @}
166 |   */
167 | 
168 | /**
169 |   * @}
170 |   */
171 | 
172 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
173 | 


--------------------------------------------------------------------------------
/lib/inc/stm32f4xx_crc.h:
--------------------------------------------------------------------------------
 1 | /**
 2 |   ******************************************************************************
 3 |   * @file    stm32f4xx_crc.h
 4 |   * @author  MCD Application Team
 5 |   * @version V1.0.0
 6 |   * @date    30-September-2011
 7 |   * @brief   This file contains all the functions prototypes for the CRC firmware 
 8 |   *          library.
 9 |   ******************************************************************************
10 |   * @attention
11 |   *
12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 |   *
19 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
20 |   ******************************************************************************
21 |   */
22 | 
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F4xx_CRC_H
25 | #define __STM32F4xx_CRC_H
26 | 
27 | #ifdef __cplusplus
28 |  extern "C" {
29 | #endif
30 | 
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f4xx.h"
33 | 
34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
35 |   * @{
36 |   */
37 | 
38 | /** @addtogroup CRC
39 |   * @{
40 |   */
41 | 
42 | /* Exported types ------------------------------------------------------------*/
43 | /* Exported constants --------------------------------------------------------*/
44 | 
45 | /** @defgroup CRC_Exported_Constants
46 |   * @{
47 |   */
48 | 
49 | /**
50 |   * @}
51 |   */
52 | 
53 | /* Exported macro ------------------------------------------------------------*/
54 | /* Exported functions --------------------------------------------------------*/  
55 | 
56 | void CRC_ResetDR(void);
57 | uint32_t CRC_CalcCRC(uint32_t Data);
58 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
59 | uint32_t CRC_GetCRC(void);
60 | void CRC_SetIDRegister(uint8_t IDValue);
61 | uint8_t CRC_GetIDRegister(void);
62 | 
63 | #ifdef __cplusplus
64 | }
65 | #endif
66 | 
67 | #endif /* __STM32F4xx_CRC_H */
68 | 
69 | /**
70 |   * @}
71 |   */
72 | 
73 | /**
74 |   * @}
75 |   */
76 | 
77 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
78 | 


--------------------------------------------------------------------------------
/lib/inc/stm32f4xx_dbgmcu.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_dbgmcu.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file contains all the functions prototypes for the DBGMCU firmware library.
  8 |   ******************************************************************************
  9 |   * @attention
 10 |   *
 11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 17 |   *
 18 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 19 |   ******************************************************************************
 20 |   */
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __STM32F4xx_DBGMCU_H
 24 | #define __STM32F4xx_DBGMCU_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f4xx.h"
 32 | 
 33 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup DBGMCU
 38 |   * @{
 39 |   */ 
 40 | 
 41 | /* Exported types ------------------------------------------------------------*/
 42 | /* Exported constants --------------------------------------------------------*/
 43 | 
 44 | /** @defgroup DBGMCU_Exported_Constants
 45 |   * @{
 46 |   */ 
 47 | #define DBGMCU_SLEEP                 ((uint32_t)0x00000001)
 48 | #define DBGMCU_STOP                  ((uint32_t)0x00000002)
 49 | #define DBGMCU_STANDBY               ((uint32_t)0x00000004)
 50 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00))
 51 | 
 52 | #define DBGMCU_TIM2_STOP             ((uint32_t)0x00000001)
 53 | #define DBGMCU_TIM3_STOP             ((uint32_t)0x00000002)
 54 | #define DBGMCU_TIM4_STOP             ((uint32_t)0x00000004)
 55 | #define DBGMCU_TIM5_STOP             ((uint32_t)0x00000008)
 56 | #define DBGMCU_TIM6_STOP             ((uint32_t)0x00000010)
 57 | #define DBGMCU_TIM7_STOP             ((uint32_t)0x00000020)
 58 | #define DBGMCU_TIM12_STOP            ((uint32_t)0x00000040)
 59 | #define DBGMCU_TIM13_STOP            ((uint32_t)0x00000080)
 60 | #define DBGMCU_TIM14_STOP            ((uint32_t)0x00000100)
 61 | #define DBGMCU_RTC_STOP              ((uint32_t)0x00000400)
 62 | #define DBGMCU_WWDG_STOP             ((uint32_t)0x00000800)
 63 | #define DBGMCU_IWDG_STOP             ((uint32_t)0x00001000)
 64 | #define DBGMCU_I2C1_SMBUS_TIMEOUT    ((uint32_t)0x00200000)
 65 | #define DBGMCU_I2C2_SMBUS_TIMEOUT    ((uint32_t)0x00400000)
 66 | #define DBGMCU_I2C3_SMBUS_TIMEOUT    ((uint32_t)0x00800000)
 67 | #define DBGMCU_CAN1_STOP             ((uint32_t)0x02000000)
 68 | #define DBGMCU_CAN2_STOP             ((uint32_t)0x04000000)
 69 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00))
 70 | 
 71 | #define DBGMCU_TIM1_STOP             ((uint32_t)0x00000001)
 72 | #define DBGMCU_TIM8_STOP             ((uint32_t)0x00000002)
 73 | #define DBGMCU_TIM9_STOP             ((uint32_t)0x00010000)
 74 | #define DBGMCU_TIM10_STOP            ((uint32_t)0x00020000)
 75 | #define DBGMCU_TIM11_STOP            ((uint32_t)0x00040000)
 76 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00))
 77 | /**
 78 |   * @}
 79 |   */ 
 80 | 
 81 | /* Exported macro ------------------------------------------------------------*/
 82 | /* Exported functions --------------------------------------------------------*/ 
 83 | uint32_t DBGMCU_GetREVID(void);
 84 | uint32_t DBGMCU_GetDEVID(void);
 85 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
 86 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
 87 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
 88 | 
 89 | #ifdef __cplusplus
 90 | }
 91 | #endif
 92 | 
 93 | #endif /* __STM32F4xx_DBGMCU_H */
 94 | 
 95 | /**
 96 |   * @}
 97 |   */ 
 98 | 
 99 | /**
100 |   * @}
101 |   */ 
102 | 
103 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
104 | 


--------------------------------------------------------------------------------
/lib/inc/stm32f4xx_exti.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_exti.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file contains all the functions prototypes for the EXTI firmware
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 20 |   ******************************************************************************
 21 |   */
 22 | 
 23 | /* Define to prevent recursive inclusion -------------------------------------*/
 24 | #ifndef __STM32F4xx_EXTI_H
 25 | #define __STM32F4xx_EXTI_H
 26 | 
 27 | #ifdef __cplusplus
 28 |  extern "C" {
 29 | #endif
 30 | 
 31 | /* Includes ------------------------------------------------------------------*/
 32 | #include "stm32f4xx.h"
 33 | 
 34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 35 |   * @{
 36 |   */
 37 | 
 38 | /** @addtogroup EXTI
 39 |   * @{
 40 |   */
 41 | 
 42 | /* Exported types ------------------------------------------------------------*/
 43 | 
 44 | /** 
 45 |   * @brief  EXTI mode enumeration  
 46 |   */
 47 | 
 48 | typedef enum
 49 | {
 50 |   EXTI_Mode_Interrupt = 0x00,
 51 |   EXTI_Mode_Event = 0x04
 52 | }EXTIMode_TypeDef;
 53 | 
 54 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
 55 | 
 56 | /** 
 57 |   * @brief  EXTI Trigger enumeration  
 58 |   */
 59 | 
 60 | typedef enum
 61 | {
 62 |   EXTI_Trigger_Rising = 0x08,
 63 |   EXTI_Trigger_Falling = 0x0C,  
 64 |   EXTI_Trigger_Rising_Falling = 0x10
 65 | }EXTITrigger_TypeDef;
 66 | 
 67 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
 68 |                                   ((TRIGGER) == EXTI_Trigger_Falling) || \
 69 |                                   ((TRIGGER) == EXTI_Trigger_Rising_Falling))
 70 | /** 
 71 |   * @brief  EXTI Init Structure definition  
 72 |   */
 73 | 
 74 | typedef struct
 75 | {
 76 |   uint32_t EXTI_Line;               /*!< Specifies the EXTI lines to be enabled or disabled.
 77 |                                          This parameter can be any combination value of @ref EXTI_Lines */
 78 |    
 79 |   EXTIMode_TypeDef EXTI_Mode;       /*!< Specifies the mode for the EXTI lines.
 80 |                                          This parameter can be a value of @ref EXTIMode_TypeDef */
 81 | 
 82 |   EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
 83 |                                          This parameter can be a value of @ref EXTITrigger_TypeDef */
 84 | 
 85 |   FunctionalState EXTI_LineCmd;     /*!< Specifies the new state of the selected EXTI lines.
 86 |                                          This parameter can be set either to ENABLE or DISABLE */ 
 87 | }EXTI_InitTypeDef;
 88 | 
 89 | /* Exported constants --------------------------------------------------------*/
 90 | 
 91 | /** @defgroup EXTI_Exported_Constants
 92 |   * @{
 93 |   */
 94 | 
 95 | /** @defgroup EXTI_Lines 
 96 |   * @{
 97 |   */
 98 | 
 99 | #define EXTI_Line0       ((uint32_t)0x00001)     /*!< External interrupt line 0 */
100 | #define EXTI_Line1       ((uint32_t)0x00002)     /*!< External interrupt line 1 */
101 | #define EXTI_Line2       ((uint32_t)0x00004)     /*!< External interrupt line 2 */
102 | #define EXTI_Line3       ((uint32_t)0x00008)     /*!< External interrupt line 3 */
103 | #define EXTI_Line4       ((uint32_t)0x00010)     /*!< External interrupt line 4 */
104 | #define EXTI_Line5       ((uint32_t)0x00020)     /*!< External interrupt line 5 */
105 | #define EXTI_Line6       ((uint32_t)0x00040)     /*!< External interrupt line 6 */
106 | #define EXTI_Line7       ((uint32_t)0x00080)     /*!< External interrupt line 7 */
107 | #define EXTI_Line8       ((uint32_t)0x00100)     /*!< External interrupt line 8 */
108 | #define EXTI_Line9       ((uint32_t)0x00200)     /*!< External interrupt line 9 */
109 | #define EXTI_Line10      ((uint32_t)0x00400)     /*!< External interrupt line 10 */
110 | #define EXTI_Line11      ((uint32_t)0x00800)     /*!< External interrupt line 11 */
111 | #define EXTI_Line12      ((uint32_t)0x01000)     /*!< External interrupt line 12 */
112 | #define EXTI_Line13      ((uint32_t)0x02000)     /*!< External interrupt line 13 */
113 | #define EXTI_Line14      ((uint32_t)0x04000)     /*!< External interrupt line 14 */
114 | #define EXTI_Line15      ((uint32_t)0x08000)     /*!< External interrupt line 15 */
115 | #define EXTI_Line16      ((uint32_t)0x10000)     /*!< External interrupt line 16 Connected to the PVD Output */
116 | #define EXTI_Line17      ((uint32_t)0x20000)     /*!< External interrupt line 17 Connected to the RTC Alarm event */
117 | #define EXTI_Line18      ((uint32_t)0x40000)     /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */                                    
118 | #define EXTI_Line19      ((uint32_t)0x80000)     /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
119 | #define EXTI_Line20      ((uint32_t)0x00100000)  /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event  */
120 | #define EXTI_Line21      ((uint32_t)0x00200000)  /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */                                               
121 | #define EXTI_Line22      ((uint32_t)0x00400000)  /*!< External interrupt line 22 Connected to the RTC Wakeup event */                                               
122 |                                           
123 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFF800000) == 0x00) && ((LINE) != (uint16_t)0x00))
124 | 
125 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
126 |                                 ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
127 |                                 ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
128 |                                 ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
129 |                                 ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
130 |                                 ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
131 |                                 ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
132 |                                 ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
133 |                                 ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
134 |                                 ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \
135 |                                 ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) ||\
136 |                                 ((LINE) == EXTI_Line22))
137 |                     
138 | /**
139 |   * @}
140 |   */
141 | 
142 | /**
143 |   * @}
144 |   */
145 | 
146 | /* Exported macro ------------------------------------------------------------*/
147 | /* Exported functions --------------------------------------------------------*/
148 | 
149 | /*  Function used to set the EXTI configuration to the default reset state *****/
150 | void EXTI_DeInit(void);
151 | 
152 | /* Initialization and Configuration functions *********************************/
153 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
154 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
155 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
156 | 
157 | /* Interrupts and flags management functions **********************************/
158 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
159 | void EXTI_ClearFlag(uint32_t EXTI_Line);
160 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
161 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
162 | 
163 | #ifdef __cplusplus
164 | }
165 | #endif
166 | 
167 | #endif /* __STM32F4xx_EXTI_H */
168 | 
169 | /**
170 |   * @}
171 |   */
172 | 
173 | /**
174 |   * @}
175 |   */
176 | 
177 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
178 | 


--------------------------------------------------------------------------------
/lib/inc/stm32f4xx_hash.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_hash.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file contains all the functions prototypes for the HASH 
  8 |   *          firmware library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 20 |   ******************************************************************************
 21 |   */
 22 | 
 23 | /* Define to prevent recursive inclusion -------------------------------------*/
 24 | #ifndef __STM32F4xx_HASH_H
 25 | #define __STM32F4xx_HASH_H
 26 | 
 27 | #ifdef __cplusplus
 28 |  extern "C" {
 29 | #endif
 30 | 
 31 | /* Includes ------------------------------------------------------------------*/
 32 | #include "stm32f4xx.h"
 33 | 
 34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 35 |   * @{
 36 |   */
 37 | 
 38 | /** @addtogroup HASH
 39 |   * @{
 40 |   */ 
 41 | 
 42 | /* Exported types ------------------------------------------------------------*/
 43 | 
 44 | /** 
 45 |   * @brief   HASH Init structure definition
 46 |   */ 
 47 | typedef struct
 48 | {
 49 |   uint32_t HASH_AlgoSelection; /*!< SHA-1 or MD5. This parameter can be a value 
 50 |                                     of @ref HASH_Algo_Selection */
 51 |   uint32_t HASH_AlgoMode;      /*!< HASH or HMAC. This parameter can be a value 
 52 |                                     of @ref HASH_processor_Algorithm_Mode */
 53 |   uint32_t HASH_DataType;      /*!< 32-bit data, 16-bit data, 8-bit data or 
 54 |                                     bit-string. This parameter can be a value of
 55 |                                     @ref HASH_Data_Type */
 56 |   uint32_t HASH_HMACKeyType;   /*!< HMAC Short key or HMAC Long Key. This parameter
 57 |                                     can be a value of @ref HASH_HMAC_Long_key_only_for_HMAC_mode */
 58 | }HASH_InitTypeDef;
 59 | 
 60 | /** 
 61 |   * @brief  HASH message digest result structure definition  
 62 |   */ 
 63 | typedef struct
 64 | {
 65 |   uint32_t Data[5];      /*!< Message digest result : 5x 32bit words for SHA1 or 
 66 |                                                       4x 32bit words for MD5  */
 67 | } HASH_MsgDigest; 
 68 | 
 69 | /** 
 70 |   * @brief  HASH context swapping structure definition  
 71 |   */ 
 72 | typedef struct
 73 | {
 74 |   uint32_t HASH_IMR; 
 75 |   uint32_t HASH_STR;      
 76 |   uint32_t HASH_CR;     
 77 |   uint32_t HASH_CSR[51];       
 78 | }HASH_Context;
 79 | 
 80 | /* Exported constants --------------------------------------------------------*/
 81 | 
 82 | /** @defgroup HASH_Exported_Constants
 83 |   * @{
 84 |   */ 
 85 | 
 86 | /** @defgroup HASH_Algo_Selection 
 87 |   * @{
 88 |   */ 
 89 | #define HASH_AlgoSelection_SHA1    ((uint16_t)0x0000) /*!< HASH function is SHA1 */
 90 | #define HASH_AlgoSelection_MD5     ((uint16_t)0x0080) /*!< HASH function is MD5 */
 91 | 
 92 | #define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \
 93 |                                               ((ALGOSELECTION) == HASH_AlgoSelection_MD5))
 94 | /**
 95 |   * @}
 96 |   */
 97 | 
 98 | /** @defgroup HASH_processor_Algorithm_Mode 
 99 |   * @{
100 |   */ 
101 | #define HASH_AlgoMode_HASH         ((uint16_t)0x0000) /*!< Algorithm is HASH */ 
102 | #define HASH_AlgoMode_HMAC         ((uint16_t)0x0040) /*!< Algorithm is HMAC */
103 | 
104 | #define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \
105 |                                     ((ALGOMODE) == HASH_AlgoMode_HMAC))
106 | /**
107 |   * @}
108 |   */
109 | 
110 | /** @defgroup HASH_Data_Type  
111 |   * @{
112 |   */  
113 | #define HASH_DataType_32b          ((uint16_t)0x0000)
114 | #define HASH_DataType_16b          ((uint16_t)0x0010)
115 | #define HASH_DataType_8b           ((uint16_t)0x0020)
116 | #define HASH_DataType_1b           ((uint16_t)0x0030)
117 | 
118 | #define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DataType_32b)|| \
119 |                                     ((DATATYPE) == HASH_DataType_16b)|| \
120 |                                     ((DATATYPE) == HASH_DataType_8b)|| \
121 |                                     ((DATATYPE) == HASH_DataType_1b))
122 | /**
123 |   * @}
124 |   */
125 | 
126 | /** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode  
127 |   * @{
128 |   */ 
129 | #define HASH_HMACKeyType_ShortKey      ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */
130 | #define HASH_HMACKeyType_LongKey       ((uint32_t)0x00010000) /*!< HMAC Key is > 64 bytes */
131 | 
132 | #define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \
133 |                                   ((KEYTYPE) == HASH_HMACKeyType_LongKey))
134 | /**
135 |   * @}
136 |   */
137 | 
138 | /** @defgroup Number_of_valid_bits_in_last_word_of_the_message   
139 |   * @{
140 |   */  
141 | #define IS_HASH_VALIDBITSNUMBER(VALIDBITS) ((VALIDBITS) <= 0x1F)
142 | 
143 | /**
144 |   * @}
145 |   */
146 | 
147 | /** @defgroup HASH_interrupts_definition   
148 |   * @{
149 |   */  
150 | #define HASH_IT_DINI               ((uint8_t)0x01)  /*!< A new block can be entered into the input buffer (DIN)*/
151 | #define HASH_IT_DCI                ((uint8_t)0x02)  /*!< Digest calculation complete */
152 | 
153 | #define IS_HASH_IT(IT) ((((IT) & (uint8_t)0xFC) == 0x00) && ((IT) != 0x00))
154 | #define IS_HASH_GET_IT(IT) (((IT) == HASH_IT_DINI) || ((IT) == HASH_IT_DCI))
155 | 				   
156 | /**
157 |   * @}
158 |   */
159 | 
160 | /** @defgroup HASH_flags_definition   
161 |   * @{
162 |   */  
163 | #define HASH_FLAG_DINIS            ((uint16_t)0x0001)  /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer.*/
164 | #define HASH_FLAG_DCIS             ((uint16_t)0x0002)  /*!< Digest calculation complete */
165 | #define HASH_FLAG_DMAS             ((uint16_t)0x0004)  /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
166 | #define HASH_FLAG_BUSY             ((uint16_t)0x0008)  /*!< The hash core is Busy : processing a block of data */
167 | #define HASH_FLAG_DINNE            ((uint16_t)0x1000)  /*!< DIN not empty : The input buffer contains at least one word of data */
168 | 
169 | #define IS_HASH_GET_FLAG(FLAG) (((FLAG) == HASH_FLAG_DINIS) || \
170 |                                 ((FLAG) == HASH_FLAG_DCIS)  || \
171 |                                 ((FLAG) == HASH_FLAG_DMAS)  || \
172 |                                 ((FLAG) == HASH_FLAG_BUSY)  || \
173 |                                 ((FLAG) == HASH_FLAG_DINNE)) 
174 | 
175 | #define IS_HASH_CLEAR_FLAG(FLAG)(((FLAG) == HASH_FLAG_DINIS) || \
176 |                                  ((FLAG) == HASH_FLAG_DCIS))                                 
177 | 
178 | /**
179 |   * @}
180 |   */ 
181 | 
182 | /**
183 |   * @}
184 |   */ 
185 | 
186 | /* Exported macro ------------------------------------------------------------*/
187 | /* Exported functions --------------------------------------------------------*/ 
188 |   
189 | /*  Function used to set the HASH configuration to the default reset state ****/
190 | void HASH_DeInit(void);
191 | 
192 | /* HASH Configuration function ************************************************/
193 | void HASH_Init(HASH_InitTypeDef* HASH_InitStruct);
194 | void HASH_StructInit(HASH_InitTypeDef* HASH_InitStruct);
195 | void HASH_Reset(void);
196 | 
197 | /* HASH Message Digest generation functions ***********************************/
198 | void HASH_DataIn(uint32_t Data);
199 | uint8_t HASH_GetInFIFOWordsNbr(void);
200 | void HASH_SetLastWordValidBitsNbr(uint16_t ValidNumber);
201 | void HASH_StartDigest(void);
202 | void HASH_GetDigest(HASH_MsgDigest* HASH_MessageDigest);
203 | 
204 | /* HASH Context swapping functions ********************************************/
205 | void HASH_SaveContext(HASH_Context* HASH_ContextSave);
206 | void HASH_RestoreContext(HASH_Context* HASH_ContextRestore);
207 | 
208 | /* HASH's DMA interface function **********************************************/
209 | void HASH_DMACmd(FunctionalState NewState);
210 | 
211 | /* HASH Interrupts and flags management functions *****************************/
212 | void HASH_ITConfig(uint8_t HASH_IT, FunctionalState NewState);
213 | FlagStatus HASH_GetFlagStatus(uint16_t HASH_FLAG);
214 | void HASH_ClearFlag(uint16_t HASH_FLAG);
215 | ITStatus HASH_GetITStatus(uint8_t HASH_IT);
216 | void HASH_ClearITPendingBit(uint8_t HASH_IT);
217 | 
218 | /* High Level SHA1 functions **************************************************/
219 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20]);
220 | ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen,
221 |                       uint8_t *Input, uint32_t Ilen,
222 |                       uint8_t Output[20]);
223 | 
224 | /* High Level MD5 functions ***************************************************/
225 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16]);
226 | ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen,
227 |                      uint8_t *Input, uint32_t Ilen,
228 |                      uint8_t Output[16]);
229 | 
230 | #ifdef __cplusplus
231 | }
232 | #endif
233 | 
234 | #endif /*__STM32F4xx_HASH_H */
235 | 
236 | /**
237 |   * @}
238 |   */ 
239 | 
240 | /**
241 |   * @}
242 |   */ 
243 | 
244 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
245 | 


--------------------------------------------------------------------------------
/lib/inc/stm32f4xx_iwdg.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_iwdg.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file contains all the functions prototypes for the IWDG 
  8 |   *          firmware library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 20 |   ******************************************************************************
 21 |   */
 22 | 
 23 | /* Define to prevent recursive inclusion -------------------------------------*/
 24 | #ifndef __STM32F4xx_IWDG_H
 25 | #define __STM32F4xx_IWDG_H
 26 | 
 27 | #ifdef __cplusplus
 28 |  extern "C" {
 29 | #endif
 30 | 
 31 | /* Includes ------------------------------------------------------------------*/
 32 | #include "stm32f4xx.h"
 33 | 
 34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 35 |   * @{
 36 |   */
 37 | 
 38 | /** @addtogroup IWDG
 39 |   * @{
 40 |   */
 41 | 
 42 | /* Exported types ------------------------------------------------------------*/
 43 | /* Exported constants --------------------------------------------------------*/
 44 | 
 45 | /** @defgroup IWDG_Exported_Constants
 46 |   * @{
 47 |   */
 48 |   
 49 | /** @defgroup IWDG_WriteAccess
 50 |   * @{
 51 |   */
 52 | #define IWDG_WriteAccess_Enable     ((uint16_t)0x5555)
 53 | #define IWDG_WriteAccess_Disable    ((uint16_t)0x0000)
 54 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
 55 |                                       ((ACCESS) == IWDG_WriteAccess_Disable))
 56 | /**
 57 |   * @}
 58 |   */
 59 | 
 60 | /** @defgroup IWDG_prescaler 
 61 |   * @{
 62 |   */
 63 | #define IWDG_Prescaler_4            ((uint8_t)0x00)
 64 | #define IWDG_Prescaler_8            ((uint8_t)0x01)
 65 | #define IWDG_Prescaler_16           ((uint8_t)0x02)
 66 | #define IWDG_Prescaler_32           ((uint8_t)0x03)
 67 | #define IWDG_Prescaler_64           ((uint8_t)0x04)
 68 | #define IWDG_Prescaler_128          ((uint8_t)0x05)
 69 | #define IWDG_Prescaler_256          ((uint8_t)0x06)
 70 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4)  || \
 71 |                                       ((PRESCALER) == IWDG_Prescaler_8)  || \
 72 |                                       ((PRESCALER) == IWDG_Prescaler_16) || \
 73 |                                       ((PRESCALER) == IWDG_Prescaler_32) || \
 74 |                                       ((PRESCALER) == IWDG_Prescaler_64) || \
 75 |                                       ((PRESCALER) == IWDG_Prescaler_128)|| \
 76 |                                       ((PRESCALER) == IWDG_Prescaler_256))
 77 | /**
 78 |   * @}
 79 |   */
 80 | 
 81 | /** @defgroup IWDG_Flag 
 82 |   * @{
 83 |   */
 84 | #define IWDG_FLAG_PVU               ((uint16_t)0x0001)
 85 | #define IWDG_FLAG_RVU               ((uint16_t)0x0002)
 86 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
 87 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
 88 | /**
 89 |   * @}
 90 |   */
 91 | 
 92 | /**
 93 |   * @}
 94 |   */
 95 | 
 96 | /* Exported macro ------------------------------------------------------------*/
 97 | /* Exported functions --------------------------------------------------------*/
 98 | 
 99 | /* Prescaler and Counter configuration functions ******************************/
100 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
101 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
102 | void IWDG_SetReload(uint16_t Reload);
103 | void IWDG_ReloadCounter(void);
104 | 
105 | /* IWDG activation function ***************************************************/
106 | void IWDG_Enable(void);
107 | 
108 | /* Flag management function ***************************************************/
109 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
110 | 
111 | #ifdef __cplusplus
112 | }
113 | #endif
114 | 
115 | #endif /* __STM32F4xx_IWDG_H */
116 | 
117 | /**
118 |   * @}
119 |   */
120 | 
121 | /**
122 |   * @}
123 |   */
124 | 
125 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
126 | 


--------------------------------------------------------------------------------
/lib/inc/stm32f4xx_pwr.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_pwr.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file contains all the functions prototypes for the PWR firmware 
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 20 |   ******************************************************************************
 21 |   */ 
 22 | 
 23 | /* Define to prevent recursive inclusion -------------------------------------*/
 24 | #ifndef __STM32F4xx_PWR_H
 25 | #define __STM32F4xx_PWR_H
 26 | 
 27 | #ifdef __cplusplus
 28 |  extern "C" {
 29 | #endif
 30 | 
 31 | /* Includes ------------------------------------------------------------------*/
 32 | #include "stm32f4xx.h"
 33 | 
 34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 35 |   * @{
 36 |   */
 37 | 
 38 | /** @addtogroup PWR
 39 |   * @{
 40 |   */ 
 41 | 
 42 | /* Exported types ------------------------------------------------------------*/
 43 | /* Exported constants --------------------------------------------------------*/
 44 | 
 45 | /** @defgroup PWR_Exported_Constants
 46 |   * @{
 47 |   */ 
 48 | 
 49 | /** @defgroup PWR_PVD_detection_level 
 50 |   * @{
 51 |   */ 
 52 | 
 53 | #define PWR_PVDLevel_0                  PWR_CR_PLS_LEV0
 54 | #define PWR_PVDLevel_1                  PWR_CR_PLS_LEV1
 55 | #define PWR_PVDLevel_2                  PWR_CR_PLS_LEV2
 56 | #define PWR_PVDLevel_3                  PWR_CR_PLS_LEV3
 57 | #define PWR_PVDLevel_4                  PWR_CR_PLS_LEV4
 58 | #define PWR_PVDLevel_5                  PWR_CR_PLS_LEV5
 59 | #define PWR_PVDLevel_6                  PWR_CR_PLS_LEV6
 60 | #define PWR_PVDLevel_7                  PWR_CR_PLS_LEV7
 61 | 
 62 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \
 63 |                                  ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
 64 |                                  ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
 65 |                                  ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
 66 | /**
 67 |   * @}
 68 |   */
 69 | 
 70 |   
 71 | /** @defgroup PWR_Regulator_state_in_STOP_mode 
 72 |   * @{
 73 |   */
 74 | 
 75 | #define PWR_Regulator_ON                ((uint32_t)0x00000000)
 76 | #define PWR_Regulator_LowPower          PWR_CR_LPDS
 77 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
 78 |                                      ((REGULATOR) == PWR_Regulator_LowPower))
 79 | /**
 80 |   * @}
 81 |   */
 82 | 
 83 | /** @defgroup PWR_STOP_mode_entry 
 84 |   * @{
 85 |   */
 86 | 
 87 | #define PWR_STOPEntry_WFI               ((uint8_t)0x01)
 88 | #define PWR_STOPEntry_WFE               ((uint8_t)0x02)
 89 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
 90 | 
 91 | /** @defgroup PWR_Regulator_Voltage_Scale 
 92 |   * @{
 93 |   */
 94 | 
 95 | #define PWR_Regulator_Voltage_Scale1    ((uint32_t)0x00004000)
 96 | #define PWR_Regulator_Voltage_Scale2    ((uint32_t)0x00000000)
 97 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || ((VOLTAGE) == PWR_Regulator_Voltage_Scale2))
 98 |  
 99 | /**
100 |   * @}
101 |   */
102 | 
103 | /** @defgroup PWR_Flag 
104 |   * @{
105 |   */
106 | 
107 | #define PWR_FLAG_WU                     PWR_CSR_WUF
108 | #define PWR_FLAG_SB                     PWR_CSR_SBF
109 | #define PWR_FLAG_PVDO                   PWR_CSR_PVDO
110 | #define PWR_FLAG_BRR                    PWR_CSR_BRR
111 | #define PWR_FLAG_VOSRDY                 PWR_CSR_VOSRDY
112 | 
113 | /** @defgroup PWR_Flag_Legacy 
114 |   * @{
115 |   */
116 | #define PWR_FLAG_REGRDY                  PWR_FLAG_VOSRDY               
117 | /**
118 |   * @}
119 |   */
120 | 
121 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
122 |                                ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \
123 |                                ((FLAG) == PWR_FLAG_VOSRDY))
124 | 
125 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
126 | /**
127 |   * @}
128 |   */
129 | 
130 | /**
131 |   * @}
132 |   */
133 | 
134 | /* Exported macro ------------------------------------------------------------*/
135 | /* Exported functions --------------------------------------------------------*/ 
136 | 
137 | /* Function used to set the PWR configuration to the default reset state ******/ 
138 | void PWR_DeInit(void);
139 | 
140 | /* Backup Domain Access function **********************************************/ 
141 | void PWR_BackupAccessCmd(FunctionalState NewState);
142 | 
143 | /* PVD configuration functions ************************************************/ 
144 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
145 | void PWR_PVDCmd(FunctionalState NewState);
146 | 
147 | /* WakeUp pins configuration functions ****************************************/ 
148 | void PWR_WakeUpPinCmd(FunctionalState NewState);
149 | 
150 | /* Main and Backup Regulators configuration functions *************************/ 
151 | void PWR_BackupRegulatorCmd(FunctionalState NewState);
152 | void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage);
153 | 
154 | /* FLASH Power Down configuration functions ***********************************/ 
155 | void PWR_FlashPowerDownCmd(FunctionalState NewState);
156 | 
157 | /* Low Power modes configuration functions ************************************/ 
158 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
159 | void PWR_EnterSTANDBYMode(void);
160 | 
161 | /* Flags management functions *************************************************/ 
162 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
163 | void PWR_ClearFlag(uint32_t PWR_FLAG);
164 | 
165 | #ifdef __cplusplus
166 | }
167 | #endif
168 | 
169 | #endif /* __STM32F4xx_PWR_H */
170 | 
171 | /**
172 |   * @}
173 |   */
174 | 
175 | /**
176 |   * @}
177 |   */
178 | 
179 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
180 | 


--------------------------------------------------------------------------------
/lib/inc/stm32f4xx_rng.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_rng.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file contains all the functions prototypes for the Random 
  8 |   *          Number Generator(RNG) firmware library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 20 |   ******************************************************************************
 21 |   */
 22 | 
 23 | /* Define to prevent recursive inclusion -------------------------------------*/
 24 | #ifndef __STM32F4xx_RNG_H
 25 | #define __STM32F4xx_RNG_H
 26 | 
 27 | #ifdef __cplusplus
 28 |  extern "C" {
 29 | #endif
 30 | 
 31 | /* Includes ------------------------------------------------------------------*/
 32 | #include "stm32f4xx.h"
 33 | 
 34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 35 |   * @{
 36 |   */
 37 | 
 38 | /** @addtogroup RNG
 39 |   * @{
 40 |   */ 
 41 | 
 42 | /* Exported types ------------------------------------------------------------*/
 43 | /* Exported constants --------------------------------------------------------*/ 
 44 | 
 45 | /** @defgroup RNG_Exported_Constants
 46 |   * @{
 47 |   */
 48 |   
 49 | /** @defgroup RNG_flags_definition  
 50 |   * @{
 51 |   */ 
 52 | #define RNG_FLAG_DRDY               ((uint8_t)0x0001) /*!< Data ready */
 53 | #define RNG_FLAG_CECS               ((uint8_t)0x0002) /*!< Clock error current status */
 54 | #define RNG_FLAG_SECS               ((uint8_t)0x0004) /*!< Seed error current status */
 55 | 
 56 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \
 57 |                                    ((RNG_FLAG) == RNG_FLAG_CECS) || \
 58 |                                    ((RNG_FLAG) == RNG_FLAG_SECS))
 59 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \
 60 |                                     ((RNG_FLAG) == RNG_FLAG_SECS))
 61 | /**
 62 |   * @}
 63 |   */ 
 64 | 
 65 | /** @defgroup RNG_interrupts_definition   
 66 |   * @{
 67 |   */  
 68 | #define RNG_IT_CEI                  ((uint8_t)0x20) /*!< Clock error interrupt */
 69 | #define RNG_IT_SEI                  ((uint8_t)0x40) /*!< Seed error interrupt */
 70 | 
 71 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00))
 72 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI))
 73 | /**
 74 |   * @}
 75 |   */ 
 76 | 
 77 | /**
 78 |   * @}
 79 |   */ 
 80 | 
 81 | /* Exported macro ------------------------------------------------------------*/
 82 | /* Exported functions --------------------------------------------------------*/ 
 83 | 
 84 | /*  Function used to set the RNG configuration to the default reset state *****/ 
 85 | void RNG_DeInit(void);
 86 | 
 87 | /* Configuration function *****************************************************/
 88 | void RNG_Cmd(FunctionalState NewState);
 89 | 
 90 | /* Get 32 bit Random number function ******************************************/
 91 | uint32_t RNG_GetRandomNumber(void);
 92 | 
 93 | /* Interrupts and flags management functions **********************************/
 94 | void RNG_ITConfig(FunctionalState NewState);
 95 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG);
 96 | void RNG_ClearFlag(uint8_t RNG_FLAG);
 97 | ITStatus RNG_GetITStatus(uint8_t RNG_IT);
 98 | void RNG_ClearITPendingBit(uint8_t RNG_IT);
 99 | 
100 | #ifdef __cplusplus
101 | }
102 | #endif
103 | 
104 | #endif /*__STM32F4xx_RNG_H */
105 | 
106 | /**
107 |   * @}
108 |   */ 
109 | 
110 | /**
111 |   * @}
112 |   */ 
113 | 
114 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
115 | 


--------------------------------------------------------------------------------
/lib/inc/stm32f4xx_syscfg.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_syscfg.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file contains all the functions prototypes for the SYSCFG firmware
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 20 |   ******************************************************************************
 21 |   */
 22 | 
 23 | /* Define to prevent recursive inclusion -------------------------------------*/
 24 | #ifndef __STM32F4xx_SYSCFG_H
 25 | #define __STM32F4xx_SYSCFG_H
 26 | 
 27 | #ifdef __cplusplus
 28 |  extern "C" {
 29 | #endif
 30 | 
 31 | /* Includes ------------------------------------------------------------------*/
 32 | #include "stm32f4xx.h"
 33 | 
 34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 35 |   * @{
 36 |   */
 37 | 
 38 | /** @addtogroup SYSCFG
 39 |   * @{
 40 |   */ 
 41 | 
 42 | /* Exported types ------------------------------------------------------------*/
 43 | /* Exported constants --------------------------------------------------------*/
 44 |   
 45 | /** @defgroup SYSCFG_Exported_Constants 
 46 |   * @{
 47 |   */ 
 48 | 
 49 | /** @defgroup SYSCFG_EXTI_Port_Sources 
 50 |   * @{
 51 |   */ 
 52 | #define EXTI_PortSourceGPIOA       ((uint8_t)0x00)
 53 | #define EXTI_PortSourceGPIOB       ((uint8_t)0x01)
 54 | #define EXTI_PortSourceGPIOC       ((uint8_t)0x02)
 55 | #define EXTI_PortSourceGPIOD       ((uint8_t)0x03)
 56 | #define EXTI_PortSourceGPIOE       ((uint8_t)0x04)
 57 | #define EXTI_PortSourceGPIOF       ((uint8_t)0x05)
 58 | #define EXTI_PortSourceGPIOG       ((uint8_t)0x06)
 59 | #define EXTI_PortSourceGPIOH       ((uint8_t)0x07)
 60 | #define EXTI_PortSourceGPIOI       ((uint8_t)0x08)
 61 |                                       
 62 | #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
 63 |                                         ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
 64 |                                         ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
 65 |                                         ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
 66 |                                         ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
 67 |                                         ((PORTSOURCE) == EXTI_PortSourceGPIOF) || \
 68 |                                         ((PORTSOURCE) == EXTI_PortSourceGPIOG) || \
 69 |                                         ((PORTSOURCE) == EXTI_PortSourceGPIOH) || \
 70 |                                         ((PORTSOURCE) == EXTI_PortSourceGPIOI)) 
 71 | /**
 72 |   * @}
 73 |   */ 
 74 | 
 75 | 
 76 | /** @defgroup SYSCFG_EXTI_Pin_Sources 
 77 |   * @{
 78 |   */ 
 79 | #define EXTI_PinSource0            ((uint8_t)0x00)
 80 | #define EXTI_PinSource1            ((uint8_t)0x01)
 81 | #define EXTI_PinSource2            ((uint8_t)0x02)
 82 | #define EXTI_PinSource3            ((uint8_t)0x03)
 83 | #define EXTI_PinSource4            ((uint8_t)0x04)
 84 | #define EXTI_PinSource5            ((uint8_t)0x05)
 85 | #define EXTI_PinSource6            ((uint8_t)0x06)
 86 | #define EXTI_PinSource7            ((uint8_t)0x07)
 87 | #define EXTI_PinSource8            ((uint8_t)0x08)
 88 | #define EXTI_PinSource9            ((uint8_t)0x09)
 89 | #define EXTI_PinSource10           ((uint8_t)0x0A)
 90 | #define EXTI_PinSource11           ((uint8_t)0x0B)
 91 | #define EXTI_PinSource12           ((uint8_t)0x0C)
 92 | #define EXTI_PinSource13           ((uint8_t)0x0D)
 93 | #define EXTI_PinSource14           ((uint8_t)0x0E)
 94 | #define EXTI_PinSource15           ((uint8_t)0x0F)
 95 | #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
 96 |                                        ((PINSOURCE) == EXTI_PinSource1) || \
 97 |                                        ((PINSOURCE) == EXTI_PinSource2) || \
 98 |                                        ((PINSOURCE) == EXTI_PinSource3) || \
 99 |                                        ((PINSOURCE) == EXTI_PinSource4) || \
100 |                                        ((PINSOURCE) == EXTI_PinSource5) || \
101 |                                        ((PINSOURCE) == EXTI_PinSource6) || \
102 |                                        ((PINSOURCE) == EXTI_PinSource7) || \
103 |                                        ((PINSOURCE) == EXTI_PinSource8) || \
104 |                                        ((PINSOURCE) == EXTI_PinSource9) || \
105 |                                        ((PINSOURCE) == EXTI_PinSource10) || \
106 |                                        ((PINSOURCE) == EXTI_PinSource11) || \
107 |                                        ((PINSOURCE) == EXTI_PinSource12) || \
108 |                                        ((PINSOURCE) == EXTI_PinSource13) || \
109 |                                        ((PINSOURCE) == EXTI_PinSource14) || \
110 |                                        ((PINSOURCE) == EXTI_PinSource15))
111 | /**
112 |   * @}
113 |   */ 
114 | 
115 | 
116 | /** @defgroup SYSCFG_Memory_Remap_Config 
117 |   * @{
118 |   */ 
119 | #define SYSCFG_MemoryRemap_Flash       ((uint8_t)0x00)
120 | #define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01)
121 | #define SYSCFG_MemoryRemap_FSMC        ((uint8_t)0x02)
122 | #define SYSCFG_MemoryRemap_SRAM        ((uint8_t)0x03)
123 |    
124 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
125 |                                                      ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
126 |                                                      ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \
127 |                                                      ((REMAP) == SYSCFG_MemoryRemap_FSMC))
128 | /**
129 |   * @}
130 |   */ 
131 | 
132 | 
133 | /** @defgroup SYSCFG_ETHERNET_Media_Interface 
134 |   * @{
135 |   */ 
136 | #define SYSCFG_ETH_MediaInterface_MII    ((uint32_t)0x00000000) 
137 | #define SYSCFG_ETH_MediaInterface_RMII   ((uint32_t)0x00000001)                                       
138 | 
139 | #define IS_SYSCFG_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == SYSCFG_ETH_MediaInterface_MII) || \
140 |                                                 ((INTERFACE) == SYSCFG_ETH_MediaInterface_RMII))
141 | /**
142 |   * @}
143 |   */ 
144 | 
145 | /**
146 |   * @}
147 |   */ 
148 | 
149 | /* Exported macro ------------------------------------------------------------*/
150 | /* Exported functions --------------------------------------------------------*/ 
151 |  
152 | void SYSCFG_DeInit(void);
153 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
154 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
155 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface); 
156 | void SYSCFG_CompensationCellCmd(FunctionalState NewState); 
157 | FlagStatus SYSCFG_GetCompensationCellStatus(void);
158 | 
159 | #ifdef __cplusplus
160 | }
161 | #endif
162 | 
163 | #endif /*__STM32F4xx_SYSCFG_H */
164 | 
165 | /**
166 |   * @}
167 |   */ 
168 | 
169 | /**
170 |   * @}
171 |   */ 
172 | 
173 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
174 | 


--------------------------------------------------------------------------------
/lib/inc/stm32f4xx_wwdg.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_wwdg.h
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file contains all the functions prototypes for the WWDG firmware
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @attention
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 20 |   ******************************************************************************
 21 |   */
 22 | 
 23 | /* Define to prevent recursive inclusion -------------------------------------*/
 24 | #ifndef __STM32F4xx_WWDG_H
 25 | #define __STM32F4xx_WWDG_H
 26 | 
 27 | #ifdef __cplusplus
 28 |  extern "C" {
 29 | #endif
 30 | 
 31 | /* Includes ------------------------------------------------------------------*/
 32 | #include "stm32f4xx.h"
 33 | 
 34 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 35 |   * @{
 36 |   */
 37 | 
 38 | /** @addtogroup WWDG
 39 |   * @{
 40 |   */ 
 41 | 
 42 | /* Exported types ------------------------------------------------------------*/
 43 | /* Exported constants --------------------------------------------------------*/
 44 | 
 45 | /** @defgroup WWDG_Exported_Constants
 46 |   * @{
 47 |   */ 
 48 |   
 49 | /** @defgroup WWDG_Prescaler 
 50 |   * @{
 51 |   */
 52 |   
 53 | #define WWDG_Prescaler_1    ((uint32_t)0x00000000)
 54 | #define WWDG_Prescaler_2    ((uint32_t)0x00000080)
 55 | #define WWDG_Prescaler_4    ((uint32_t)0x00000100)
 56 | #define WWDG_Prescaler_8    ((uint32_t)0x00000180)
 57 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
 58 |                                       ((PRESCALER) == WWDG_Prescaler_2) || \
 59 |                                       ((PRESCALER) == WWDG_Prescaler_4) || \
 60 |                                       ((PRESCALER) == WWDG_Prescaler_8))
 61 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
 62 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
 63 | 
 64 | /**
 65 |   * @}
 66 |   */ 
 67 | 
 68 | /**
 69 |   * @}
 70 |   */ 
 71 | 
 72 | /* Exported macro ------------------------------------------------------------*/
 73 | /* Exported functions --------------------------------------------------------*/
 74 |   
 75 | /*  Function used to set the WWDG configuration to the default reset state ****/  
 76 | void WWDG_DeInit(void);
 77 | 
 78 | /* Prescaler, Refresh window and Counter configuration functions **************/
 79 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
 80 | void WWDG_SetWindowValue(uint8_t WindowValue);
 81 | void WWDG_EnableIT(void);
 82 | void WWDG_SetCounter(uint8_t Counter);
 83 | 
 84 | /* WWDG activation function ***************************************************/
 85 | void WWDG_Enable(uint8_t Counter);
 86 | 
 87 | /* Interrupts and flags management functions **********************************/
 88 | FlagStatus WWDG_GetFlagStatus(void);
 89 | void WWDG_ClearFlag(void);
 90 | 
 91 | #ifdef __cplusplus
 92 | }
 93 | #endif
 94 | 
 95 | #endif /* __STM32F4xx_WWDG_H */
 96 | 
 97 | /**
 98 |   * @}
 99 |   */ 
100 | 
101 | /**
102 |   * @}
103 |   */ 
104 | 
105 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
106 | 


--------------------------------------------------------------------------------
/lib/src/stm32f4xx_crc.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_crc.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides all the CRC firmware functions.
  8 |   ******************************************************************************
  9 |   * @attention
 10 |   *
 11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 17 |   *
 18 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 19 |   ******************************************************************************
 20 |   */
 21 | 
 22 | /* Includes ------------------------------------------------------------------*/
 23 | #include "stm32f4xx_crc.h"
 24 | 
 25 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 26 |   * @{
 27 |   */
 28 | 
 29 | /** @defgroup CRC 
 30 |   * @brief CRC driver modules
 31 |   * @{
 32 |   */
 33 | 
 34 | /* Private typedef -----------------------------------------------------------*/
 35 | /* Private define ------------------------------------------------------------*/
 36 | /* Private macro -------------------------------------------------------------*/
 37 | /* Private variables ---------------------------------------------------------*/
 38 | /* Private function prototypes -----------------------------------------------*/
 39 | /* Private functions ---------------------------------------------------------*/
 40 | 
 41 | /** @defgroup CRC_Private_Functions
 42 |   * @{
 43 |   */
 44 | 
 45 | /**
 46 |   * @brief  Resets the CRC Data register (DR).
 47 |   * @param  None
 48 |   * @retval None
 49 |   */
 50 | void CRC_ResetDR(void)
 51 | {
 52 |   /* Reset CRC generator */
 53 |   CRC->CR = CRC_CR_RESET;
 54 | }
 55 | 
 56 | /**
 57 |   * @brief  Computes the 32-bit CRC of a given data word(32-bit).
 58 |   * @param  Data: data word(32-bit) to compute its CRC
 59 |   * @retval 32-bit CRC
 60 |   */
 61 | uint32_t CRC_CalcCRC(uint32_t Data)
 62 | {
 63 |   CRC->DR = Data;
 64 |   
 65 |   return (CRC->DR);
 66 | }
 67 | 
 68 | /**
 69 |   * @brief  Computes the 32-bit CRC of a given buffer of data word(32-bit).
 70 |   * @param  pBuffer: pointer to the buffer containing the data to be computed
 71 |   * @param  BufferLength: length of the buffer to be computed					
 72 |   * @retval 32-bit CRC
 73 |   */
 74 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
 75 | {
 76 |   uint32_t index = 0;
 77 |   
 78 |   for(index = 0; index < BufferLength; index++)
 79 |   {
 80 |     CRC->DR = pBuffer[index];
 81 |   }
 82 |   return (CRC->DR);
 83 | }
 84 | 
 85 | /**
 86 |   * @brief  Returns the current CRC value.
 87 |   * @param  None
 88 |   * @retval 32-bit CRC
 89 |   */
 90 | uint32_t CRC_GetCRC(void)
 91 | {
 92 |   return (CRC->DR);
 93 | }
 94 | 
 95 | /**
 96 |   * @brief  Stores a 8-bit data in the Independent Data(ID) register.
 97 |   * @param  IDValue: 8-bit value to be stored in the ID register 					
 98 |   * @retval None
 99 |   */
100 | void CRC_SetIDRegister(uint8_t IDValue)
101 | {
102 |   CRC->IDR = IDValue;
103 | }
104 | 
105 | /**
106 |   * @brief  Returns the 8-bit data stored in the Independent Data(ID) register
107 |   * @param  None
108 |   * @retval 8-bit value of the ID register 
109 |   */
110 | uint8_t CRC_GetIDRegister(void)
111 | {
112 |   return (CRC->IDR);
113 | }
114 | 
115 | /**
116 |   * @}
117 |   */
118 | 
119 | /**
120 |   * @}
121 |   */
122 | 
123 | /**
124 |   * @}
125 |   */
126 | 
127 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
128 | 


--------------------------------------------------------------------------------
/lib/src/stm32f4xx_cryp_des.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_cryp_des.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides high level functions to encrypt and decrypt an 
  8 |   *          input message using DES in ECB/CBC modes.
  9 |   *          It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP
 10 |   *          peripheral.
 11 |   *
 12 |   *  @verbatim
 13 |   *
 14 |   *          ===================================================================
 15 |   *                                   How to use this driver
 16 |   *          ===================================================================
 17 |   *          1. Enable The CRYP controller clock using 
 18 |   *            RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
 19 |   *
 20 |   *          2. Encrypt and decrypt using DES in ECB Mode using CRYP_DES_ECB()
 21 |   *             function.
 22 |   *
 23 |   *          3. Encrypt and decrypt using DES in CBC Mode using CRYP_DES_CBC()
 24 |   *             function.
 25 |   *
 26 |   *  @endverbatim
 27 |   *
 28 |   ******************************************************************************
 29 |   * @attention
 30 |   *
 31 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 32 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 33 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 34 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 35 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 36 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 37 |   *
 38 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 39 |   ******************************************************************************
 40 |   */
 41 | 
 42 | /* Includes ------------------------------------------------------------------*/
 43 | #include "stm32f4xx_cryp.h"
 44 | 
 45 | 
 46 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 47 |   * @{
 48 |   */
 49 | 
 50 | /** @defgroup CRYP 
 51 |   * @brief CRYP driver modules
 52 |   * @{
 53 |   */
 54 | 
 55 | /* Private typedef -----------------------------------------------------------*/
 56 | /* Private define ------------------------------------------------------------*/
 57 | #define DESBUSY_TIMEOUT    ((uint32_t) 0x00010000)
 58 | 
 59 | /* Private macro -------------------------------------------------------------*/
 60 | /* Private variables ---------------------------------------------------------*/
 61 | /* Private function prototypes -----------------------------------------------*/
 62 | /* Private functions ---------------------------------------------------------*/
 63 | 
 64 | 
 65 | /** @defgroup CRYP_Private_Functions
 66 |   * @{
 67 |   */ 
 68 | 
 69 | /** @defgroup CRYP_Group8 High Level DES functions
 70 |  *  @brief   High Level DES functions 
 71 |  *
 72 | @verbatim   
 73 |  ===============================================================================
 74 |                           High Level DES functions
 75 |  ===============================================================================
 76 | @endverbatim
 77 |   * @{
 78 |   */
 79 | 
 80 | /**
 81 |   * @brief  Encrypt and decrypt using DES in ECB Mode
 82 |   * @param  Mode: encryption or decryption Mode.
 83 |   *           This parameter can be one of the following values:
 84 |   *            @arg MODE_ENCRYPT: Encryption
 85 |   *            @arg MODE_DECRYPT: Decryption
 86 |   * @param  Key: Key used for DES algorithm.
 87 |   * @param  Ilength: length of the Input buffer, must be a multiple of 8.
 88 |   * @param  Input: pointer to the Input buffer.
 89 |   * @param  Output: pointer to the returned buffer.
 90 |   * @retval An ErrorStatus enumeration value:
 91 |   *          - SUCCESS: Operation done
 92 |   *          - ERROR: Operation failed
 93 |   */
 94 | ErrorStatus CRYP_DES_ECB(uint8_t Mode, uint8_t Key[8], uint8_t *Input, 
 95 |                          uint32_t Ilength, uint8_t *Output)
 96 | {
 97 |   CRYP_InitTypeDef DES_CRYP_InitStructure;
 98 |   CRYP_KeyInitTypeDef DES_CRYP_KeyInitStructure;
 99 |   __IO uint32_t counter = 0;
100 |   uint32_t busystatus = 0;
101 |   ErrorStatus status = SUCCESS;
102 |   uint32_t keyaddr    = (uint32_t)Key;
103 |   uint32_t inputaddr  = (uint32_t)Input;
104 |   uint32_t outputaddr = (uint32_t)Output;
105 |   uint32_t i = 0;
106 | 
107 |   /* Crypto structures initialisation*/
108 |   CRYP_KeyStructInit(&DES_CRYP_KeyInitStructure);
109 | 
110 |   /* Crypto Init for Encryption process */
111 |   if( Mode == MODE_ENCRYPT ) /* DES encryption */
112 |   {
113 |      DES_CRYP_InitStructure.CRYP_AlgoDir  = CRYP_AlgoDir_Encrypt;
114 |   }
115 |   else/* if( Mode == MODE_DECRYPT )*/ /* DES decryption */
116 |   {      
117 |      DES_CRYP_InitStructure.CRYP_AlgoDir  = CRYP_AlgoDir_Decrypt;
118 |   }
119 | 
120 |   DES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_DES_ECB;
121 |   DES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
122 |   CRYP_Init(&DES_CRYP_InitStructure);
123 | 
124 |   /* Key Initialisation */
125 |   DES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
126 |   keyaddr+=4;
127 |   DES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
128 |   CRYP_KeyInit(& DES_CRYP_KeyInitStructure);
129 | 
130 |   /* Flush IN/OUT FIFO */
131 |   CRYP_FIFOFlush();
132 | 
133 |   /* Enable Crypto processor */
134 |   CRYP_Cmd(ENABLE);
135 | 
136 |   for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
137 |   {
138 | 
139 |     /* Write the Input block in the Input FIFO */
140 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
141 |     inputaddr+=4;
142 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
143 |     inputaddr+=4;
144 | 
145 | /* Wait until the complete message has been processed */
146 |     counter = 0;
147 |     do
148 |     {
149 |       busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
150 |       counter++;
151 |     }while ((counter != DESBUSY_TIMEOUT) && (busystatus != RESET));
152 | 
153 |     if (busystatus != RESET)
154 |    {
155 |        status = ERROR;
156 |     }
157 |     else
158 |     {
159 | 
160 |       /* Read the Output block from the Output FIFO */
161 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
162 |       outputaddr+=4;
163 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
164 |       outputaddr+=4;
165 |     }
166 |   }
167 | 
168 |   /* Disable Crypto */
169 |   CRYP_Cmd(DISABLE);
170 | 
171 |   return status; 
172 | }
173 | 
174 | /**
175 |   * @brief  Encrypt and decrypt using DES in CBC Mode
176 |   * @param  Mode: encryption or decryption Mode.
177 |   *          This parameter can be one of the following values:
178 |   *            @arg MODE_ENCRYPT: Encryption
179 |   *            @arg MODE_DECRYPT: Decryption
180 |   * @param  Key: Key used for DES algorithm.
181 |   * @param  InitVectors: Initialisation Vectors used for DES algorithm.
182 |   * @param  Ilength: length of the Input buffer, must be a multiple of 8.
183 |   * @param  Input: pointer to the Input buffer.
184 |   * @param  Output: pointer to the returned buffer.
185 |   * @retval An ErrorStatus enumeration value:
186 |   *          - SUCCESS: Operation done
187 |   *          - ERROR: Operation failed
188 |   */
189 | ErrorStatus CRYP_DES_CBC(uint8_t Mode, uint8_t Key[8], uint8_t InitVectors[8],
190 |                          uint8_t *Input, uint32_t Ilength, uint8_t *Output)
191 | {
192 |   CRYP_InitTypeDef DES_CRYP_InitStructure;
193 |   CRYP_KeyInitTypeDef DES_CRYP_KeyInitStructure;
194 |   CRYP_IVInitTypeDef DES_CRYP_IVInitStructure;
195 |   __IO uint32_t counter = 0;
196 |   uint32_t busystatus = 0;
197 |   ErrorStatus status = SUCCESS;
198 |   uint32_t keyaddr    = (uint32_t)Key;
199 |   uint32_t inputaddr  = (uint32_t)Input;
200 |   uint32_t outputaddr = (uint32_t)Output;
201 |   uint32_t ivaddr     = (uint32_t)InitVectors;
202 |   uint32_t i = 0;
203 | 
204 |   /* Crypto structures initialisation*/
205 |   CRYP_KeyStructInit(&DES_CRYP_KeyInitStructure);
206 | 
207 |   /* Crypto Init for Encryption process */
208 |   if(Mode == MODE_ENCRYPT) /* DES encryption */
209 |   {
210 |      DES_CRYP_InitStructure.CRYP_AlgoDir  = CRYP_AlgoDir_Encrypt;
211 |   }
212 |   else /*if(Mode == MODE_DECRYPT)*/ /* DES decryption */
213 |   {
214 |      DES_CRYP_InitStructure.CRYP_AlgoDir  = CRYP_AlgoDir_Decrypt;
215 |   }
216 | 
217 |   DES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_DES_CBC;
218 |   DES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
219 |   CRYP_Init(&DES_CRYP_InitStructure);
220 | 
221 |   /* Key Initialisation */
222 |   DES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
223 |   keyaddr+=4;
224 |   DES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
225 |   CRYP_KeyInit(& DES_CRYP_KeyInitStructure);
226 | 
227 |   /* Initialization Vectors */
228 |   DES_CRYP_IVInitStructure.CRYP_IV0Left = __REV(*(uint32_t*)(ivaddr));
229 |   ivaddr+=4;
230 |   DES_CRYP_IVInitStructure.CRYP_IV0Right= __REV(*(uint32_t*)(ivaddr));
231 |   CRYP_IVInit(&DES_CRYP_IVInitStructure);
232 | 
233 |   /* Flush IN/OUT FIFO */
234 |   CRYP_FIFOFlush();
235 |   
236 |   /* Enable Crypto processor */
237 |   CRYP_Cmd(ENABLE);
238 | 
239 |   for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
240 |   {
241 |     /* Write the Input block in the Input FIFO */
242 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
243 |     inputaddr+=4;
244 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
245 |     inputaddr+=4;
246 | 
247 |     /* Wait until the complete message has been processed */
248 |     counter = 0;
249 |     do
250 |     {
251 |       busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
252 |       counter++;
253 |     }while ((counter != DESBUSY_TIMEOUT) && (busystatus != RESET));
254 | 
255 |     if (busystatus != RESET)
256 |    {
257 |        status = ERROR;
258 |     }
259 |     else
260 |     {
261 |       /* Read the Output block from the Output FIFO */
262 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
263 |       outputaddr+=4;
264 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
265 |       outputaddr+=4;
266 |     }
267 |   }
268 | 
269 |   /* Disable Crypto */
270 |   CRYP_Cmd(DISABLE);
271 | 
272 |   return status; 
273 | }
274 | 
275 | /**
276 |   * @}
277 |   */ 
278 | 
279 | /**
280 |   * @}
281 |   */ 
282 | 
283 | /**
284 |   * @}
285 |   */ 
286 | 
287 | /**
288 |   * @}
289 |   */ 
290 | 
291 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
292 | 


--------------------------------------------------------------------------------
/lib/src/stm32f4xx_cryp_tdes.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_cryp_tdes.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides high level functions to encrypt and decrypt an 
  8 |   *          input message using TDES in ECB/CBC modes .
  9 |   *          It uses the stm32f4xx_cryp.c/.h drivers to access the STM32F4xx CRYP
 10 |   *          peripheral.
 11 |   *
 12 |   *  @verbatim
 13 |   *
 14 |   *          ===================================================================
 15 |   *                                   How to use this driver
 16 |   *          ===================================================================
 17 |   *          1. Enable The CRYP controller clock using 
 18 |   *            RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
 19 |   *
 20 |   *          2. Encrypt and decrypt using TDES in ECB Mode using CRYP_TDES_ECB()
 21 |   *             function.
 22 |   *
 23 |   *          3. Encrypt and decrypt using TDES in CBC Mode using CRYP_TDES_CBC()
 24 |   *             function.
 25 |   *
 26 |   *  @endverbatim
 27 |   *
 28 |   ******************************************************************************
 29 |   * @attention
 30 |   *
 31 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 32 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 33 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 34 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 35 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 36 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 37 |   *
 38 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 39 |   ******************************************************************************
 40 |   */ 
 41 | 
 42 | /* Includes ------------------------------------------------------------------*/
 43 | #include "stm32f4xx_cryp.h"
 44 | 
 45 | 
 46 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 47 |   * @{
 48 |   */
 49 | 
 50 | /** @defgroup CRYP 
 51 |   * @brief CRYP driver modules
 52 |   * @{
 53 |   */
 54 | 
 55 | /* Private typedef -----------------------------------------------------------*/
 56 | /* Private define ------------------------------------------------------------*/
 57 | #define TDESBUSY_TIMEOUT    ((uint32_t) 0x00010000)
 58 | 
 59 | /* Private macro -------------------------------------------------------------*/
 60 | /* Private variables ---------------------------------------------------------*/
 61 | /* Private function prototypes -----------------------------------------------*/
 62 | /* Private functions ---------------------------------------------------------*/
 63 | 
 64 | 
 65 | /** @defgroup CRYP_Private_Functions
 66 |   * @{
 67 |   */ 
 68 | 
 69 | /** @defgroup CRYP_Group7 High Level TDES functions
 70 |  *  @brief   High Level TDES functions 
 71 |  *
 72 | @verbatim   
 73 |  ===============================================================================
 74 |                           High Level TDES functions
 75 |  ===============================================================================
 76 | 
 77 | 
 78 | @endverbatim
 79 |   * @{
 80 |   */
 81 | 
 82 | /**
 83 |   * @brief  Encrypt and decrypt using TDES in ECB Mode
 84 |   * @param  Mode: encryption or decryption Mode.
 85 |   *           This parameter can be one of the following values:
 86 |   *            @arg MODE_ENCRYPT: Encryption
 87 |   *            @arg MODE_DECRYPT: Decryption
 88 |   * @param  Key: Key used for TDES algorithm.
 89 |   * @param  Ilength: length of the Input buffer, must be a multiple of 8.
 90 |   * @param  Input: pointer to the Input buffer.
 91 |   * @param  Output: pointer to the returned buffer.
 92 |   * @retval An ErrorStatus enumeration value:
 93 |   *          - SUCCESS: Operation done
 94 |   *          - ERROR: Operation failed
 95 |   */
 96 | ErrorStatus CRYP_TDES_ECB(uint8_t Mode, uint8_t Key[24], uint8_t *Input, 
 97 |                           uint32_t Ilength, uint8_t *Output)
 98 | {
 99 |   CRYP_InitTypeDef TDES_CRYP_InitStructure;
100 |   CRYP_KeyInitTypeDef TDES_CRYP_KeyInitStructure;
101 |   __IO uint32_t counter = 0;
102 |   uint32_t busystatus = 0;
103 |   ErrorStatus status = SUCCESS;
104 |   uint32_t keyaddr    = (uint32_t)Key;
105 |   uint32_t inputaddr  = (uint32_t)Input;
106 |   uint32_t outputaddr = (uint32_t)Output;
107 |   uint32_t i = 0;
108 | 
109 |   /* Crypto structures initialisation*/
110 |   CRYP_KeyStructInit(&TDES_CRYP_KeyInitStructure);
111 | 
112 |   /* Crypto Init for Encryption process */
113 |   if(Mode == MODE_ENCRYPT) /* TDES encryption */
114 |   {
115 |      TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
116 |   }
117 |   else /*if(Mode == MODE_DECRYPT)*/ /* TDES decryption */
118 |   {
119 |      TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
120 |   }
121 | 
122 |   TDES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_TDES_ECB;
123 |   TDES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
124 |   CRYP_Init(&TDES_CRYP_InitStructure);
125 | 
126 |   /* Key Initialisation */
127 |   TDES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
128 |   keyaddr+=4;
129 |   TDES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
130 |   keyaddr+=4;
131 |   TDES_CRYP_KeyInitStructure.CRYP_Key2Left = __REV(*(uint32_t*)(keyaddr));
132 |   keyaddr+=4;
133 |   TDES_CRYP_KeyInitStructure.CRYP_Key2Right= __REV(*(uint32_t*)(keyaddr));
134 |   keyaddr+=4;
135 |   TDES_CRYP_KeyInitStructure.CRYP_Key3Left = __REV(*(uint32_t*)(keyaddr));
136 |   keyaddr+=4;
137 |   TDES_CRYP_KeyInitStructure.CRYP_Key3Right= __REV(*(uint32_t*)(keyaddr));
138 |   CRYP_KeyInit(& TDES_CRYP_KeyInitStructure);
139 | 
140 |   /* Flush IN/OUT FIFO */
141 |   CRYP_FIFOFlush();
142 | 
143 |   /* Enable Crypto processor */
144 |   CRYP_Cmd(ENABLE);
145 | 
146 |   for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
147 |   {
148 |     /* Write the Input block in the Input FIFO */
149 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
150 |     inputaddr+=4;
151 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
152 |     inputaddr+=4;
153 | 
154 |     /* Wait until the complete message has been processed */
155 |     counter = 0;
156 |     do
157 |     {
158 |       busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
159 |       counter++;
160 |     }while ((counter != TDESBUSY_TIMEOUT) && (busystatus != RESET));
161 | 
162 |     if (busystatus != RESET)
163 |     {
164 |        status = ERROR;
165 |     }
166 |     else
167 |     {
168 | 
169 |       /* Read the Output block from the Output FIFO */
170 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
171 |       outputaddr+=4;
172 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
173 |       outputaddr+=4;
174 |     }
175 |   }
176 | 
177 |   /* Disable Crypto */
178 |   CRYP_Cmd(DISABLE);
179 | 
180 |   return status; 
181 | }
182 | 
183 | /**
184 |   * @brief  Encrypt and decrypt using TDES in CBC Mode
185 |   * @param  Mode: encryption or decryption Mode.
186 |   *           This parameter can be one of the following values:
187 |   *            @arg MODE_ENCRYPT: Encryption
188 |   *            @arg MODE_DECRYPT: Decryption
189 |   * @param  Key: Key used for TDES algorithm.
190 |   * @param  InitVectors: Initialisation Vectors used for TDES algorithm.
191 |   * @param  Input: pointer to the Input buffer.
192 |   * @param  Ilength: length of the Input buffer, must be a multiple of 8.
193 |   * @param  Output: pointer to the returned buffer.
194 |   * @retval An ErrorStatus enumeration value:
195 |   *          - SUCCESS: Operation done
196 |   *          - ERROR: Operation failed
197 |   */
198 | ErrorStatus CRYP_TDES_CBC(uint8_t Mode, uint8_t Key[24], uint8_t InitVectors[8],
199 |                           uint8_t *Input, uint32_t Ilength, uint8_t *Output)
200 | {
201 |   CRYP_InitTypeDef TDES_CRYP_InitStructure;
202 |   CRYP_KeyInitTypeDef TDES_CRYP_KeyInitStructure;
203 |   CRYP_IVInitTypeDef TDES_CRYP_IVInitStructure;
204 |   __IO uint32_t counter = 0;
205 |   uint32_t busystatus = 0;
206 |   ErrorStatus status = SUCCESS;
207 |   uint32_t keyaddr    = (uint32_t)Key;
208 |   uint32_t inputaddr  = (uint32_t)Input;
209 |   uint32_t outputaddr = (uint32_t)Output;
210 |   uint32_t ivaddr     = (uint32_t)InitVectors;
211 |   uint32_t i = 0;
212 | 
213 |   /* Crypto structures initialisation*/
214 |   CRYP_KeyStructInit(&TDES_CRYP_KeyInitStructure);
215 | 
216 |   /* Crypto Init for Encryption process */
217 |   if(Mode == MODE_ENCRYPT) /* TDES encryption */
218 |   {
219 |     TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
220 |   }
221 |   else
222 |   {
223 |     TDES_CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt;
224 |   }
225 |   TDES_CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_TDES_CBC;
226 |   TDES_CRYP_InitStructure.CRYP_DataType = CRYP_DataType_8b;
227 | 
228 |   CRYP_Init(&TDES_CRYP_InitStructure);
229 | 
230 |   /* Key Initialisation */
231 |   TDES_CRYP_KeyInitStructure.CRYP_Key1Left = __REV(*(uint32_t*)(keyaddr));
232 |   keyaddr+=4;
233 |   TDES_CRYP_KeyInitStructure.CRYP_Key1Right= __REV(*(uint32_t*)(keyaddr));
234 |   keyaddr+=4;
235 |   TDES_CRYP_KeyInitStructure.CRYP_Key2Left = __REV(*(uint32_t*)(keyaddr));
236 |   keyaddr+=4;
237 |   TDES_CRYP_KeyInitStructure.CRYP_Key2Right= __REV(*(uint32_t*)(keyaddr));
238 |   keyaddr+=4;
239 |   TDES_CRYP_KeyInitStructure.CRYP_Key3Left = __REV(*(uint32_t*)(keyaddr));
240 |   keyaddr+=4;
241 |   TDES_CRYP_KeyInitStructure.CRYP_Key3Right= __REV(*(uint32_t*)(keyaddr));
242 |   CRYP_KeyInit(& TDES_CRYP_KeyInitStructure);
243 | 
244 |   /* Initialization Vectors */
245 |   TDES_CRYP_IVInitStructure.CRYP_IV0Left = __REV(*(uint32_t*)(ivaddr));
246 |   ivaddr+=4;
247 |   TDES_CRYP_IVInitStructure.CRYP_IV0Right= __REV(*(uint32_t*)(ivaddr));
248 |   CRYP_IVInit(&TDES_CRYP_IVInitStructure);
249 | 
250 |   /* Flush IN/OUT FIFO */
251 |   CRYP_FIFOFlush();
252 | 
253 |   /* Enable Crypto processor */
254 |   CRYP_Cmd(ENABLE);
255 | 
256 |   for(i=0; ((i<Ilength) && (status != ERROR)); i+=8)
257 |   {
258 |     /* Write the Input block in the Input FIFO */
259 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
260 |     inputaddr+=4;
261 |     CRYP_DataIn(*(uint32_t*)(inputaddr));
262 |     inputaddr+=4;
263 | 
264 |     /* Wait until the complete message has been processed */
265 |     counter = 0;
266 |     do
267 |     {
268 |       busystatus = CRYP_GetFlagStatus(CRYP_FLAG_BUSY);
269 |       counter++;
270 |     }while ((counter != TDESBUSY_TIMEOUT) && (busystatus != RESET));
271 | 
272 |     if (busystatus != RESET)
273 |    {
274 |        status = ERROR;
275 |     }
276 |     else
277 |     {
278 | 
279 |       /* Read the Output block from the Output FIFO */
280 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
281 |       outputaddr+=4;
282 |       *(uint32_t*)(outputaddr) = CRYP_DataOut();
283 |       outputaddr+=4;
284 |     }
285 |   }
286 | 
287 |   /* Disable Crypto */
288 |   CRYP_Cmd(DISABLE);
289 | 
290 |   return status; 
291 | }
292 | /**
293 |   * @}
294 |   */ 
295 | 
296 | /**
297 |   * @}
298 |   */ 
299 | 
300 | /**
301 |   * @}
302 |   */ 
303 | 
304 | /**
305 |   * @}
306 |   */ 
307 | 
308 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
309 | 


--------------------------------------------------------------------------------
/lib/src/stm32f4xx_dbgmcu.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_dbgmcu.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides all the DBGMCU firmware functions.
  8 |   ******************************************************************************
  9 |   * @attention
 10 |   *
 11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 17 |   *
 18 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 19 |   ******************************************************************************
 20 |   */
 21 | 
 22 | /* Includes ------------------------------------------------------------------*/
 23 | #include "stm32f4xx_dbgmcu.h"
 24 | 
 25 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 26 |   * @{
 27 |   */
 28 | 
 29 | /** @defgroup DBGMCU 
 30 |   * @brief DBGMCU driver modules
 31 |   * @{
 32 |   */ 
 33 | 
 34 | /* Private typedef -----------------------------------------------------------*/
 35 | /* Private define ------------------------------------------------------------*/
 36 | #define IDCODE_DEVID_MASK    ((uint32_t)0x00000FFF)
 37 | 
 38 | /* Private macro -------------------------------------------------------------*/
 39 | /* Private variables ---------------------------------------------------------*/
 40 | /* Private function prototypes -----------------------------------------------*/
 41 | /* Private functions ---------------------------------------------------------*/
 42 | 
 43 | /** @defgroup DBGMCU_Private_Functions
 44 |   * @{
 45 |   */ 
 46 | 
 47 | /**
 48 |   * @brief  Returns the device revision identifier.
 49 |   * @param  None
 50 |   * @retval Device revision identifier
 51 |   */
 52 | uint32_t DBGMCU_GetREVID(void)
 53 | {
 54 |    return(DBGMCU->IDCODE >> 16);
 55 | }
 56 | 
 57 | /**
 58 |   * @brief  Returns the device identifier.
 59 |   * @param  None
 60 |   * @retval Device identifier
 61 |   */
 62 | uint32_t DBGMCU_GetDEVID(void)
 63 | {
 64 |    return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
 65 | }
 66 | 
 67 | /**
 68 |   * @brief  Configures low power mode behavior when the MCU is in Debug mode.
 69 |   * @param  DBGMCU_Periph: specifies the low power mode.
 70 |   *   This parameter can be any combination of the following values:
 71 |   *     @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode              
 72 |   *     @arg DBGMCU_STOP: Keep debugger connection during STOP mode               
 73 |   *     @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode        
 74 |   * @param  NewState: new state of the specified low power mode in Debug mode.
 75 |   *   This parameter can be: ENABLE or DISABLE.
 76 |   * @retval None
 77 |   */
 78 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
 79 | {
 80 |   /* Check the parameters */
 81 |   assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
 82 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
 83 |   if (NewState != DISABLE)
 84 |   {
 85 |     DBGMCU->CR |= DBGMCU_Periph;
 86 |   }
 87 |   else
 88 |   {
 89 |     DBGMCU->CR &= ~DBGMCU_Periph;
 90 |   }
 91 | }
 92 | 
 93 | /**
 94 |   * @brief  Configures APB1 peripheral behavior when the MCU is in Debug mode.
 95 |   * @param  DBGMCU_Periph: specifies the APB1 peripheral.
 96 |   *   This parameter can be any combination of the following values:        
 97 |   *     @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted          
 98 |   *     @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted          
 99 |   *     @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted
100 |   *     @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted          
101 |   *     @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted          
102 |   *     @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
103 |   *     @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted  
104 |   *     @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted  
105 |   *     @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 
106 |   *     @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped when Core is halted.                                                                                
107 |   *     @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
108 |   *     @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted        
109 |   *     @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted
110 |   *     @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted
111 |   *     @arg DBGMCU_I2C3_SMBUS_TIMEOUT: I2C3 SMBUS timeout mode stopped when Core is halted
112 |   *     @arg DBGMCU_CAN2_STOP: Debug CAN1 stopped when Core is halted           
113 |   *     @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted        
114 |   *   This parameter can be: ENABLE or DISABLE.
115 |   * @retval None
116 |   */
117 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
118 | {
119 |   /* Check the parameters */
120 |   assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph));
121 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
122 | 
123 |   if (NewState != DISABLE)
124 |   {
125 |     DBGMCU->APB1FZ |= DBGMCU_Periph;
126 |   }
127 |   else
128 |   {
129 |     DBGMCU->APB1FZ &= ~DBGMCU_Periph;
130 |   }
131 | }
132 | 
133 | /**
134 |   * @brief  Configures APB2 peripheral behavior when the MCU is in Debug mode.
135 |   * @param  DBGMCU_Periph: specifies the APB2 peripheral.
136 |   *   This parameter can be any combination of the following values:       
137 |   *     @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted                
138 |   *     @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
139 |   *     @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted   
140 |   *     @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted   
141 |   *     @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted                                                                                  
142 |   * @param  NewState: new state of the specified peripheral in Debug mode.
143 |   *   This parameter can be: ENABLE or DISABLE.
144 |   * @retval None
145 |   */
146 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
147 | {
148 |   /* Check the parameters */
149 |   assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph));
150 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
151 | 
152 |   if (NewState != DISABLE)
153 |   {
154 |     DBGMCU->APB2FZ |= DBGMCU_Periph;
155 |   }
156 |   else
157 |   {
158 |     DBGMCU->APB2FZ &= ~DBGMCU_Periph;
159 |   }
160 | }
161 | 
162 | /**
163 |   * @}
164 |   */ 
165 | 
166 | /**
167 |   * @}
168 |   */ 
169 | 
170 | /**
171 |   * @}
172 |   */ 
173 | 
174 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
175 | 


--------------------------------------------------------------------------------
/lib/src/stm32f4xx_exti.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_exti.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides firmware functions to manage the following 
  8 |   *          functionalities of the EXTI peripheral:           
  9 |   *           - Initialization and Configuration
 10 |   *           - Interrupts and flags management
 11 |   *
 12 |   *  @verbatim  
 13 |   *  
 14 |   *          ===================================================================
 15 |   *                                     EXTI features
 16 |   *          ===================================================================
 17 |   *    
 18 |   *          External interrupt/event lines are mapped as following:
 19 |   *            1- All available GPIO pins are connected to the 16 external 
 20 |   *               interrupt/event lines from EXTI0 to EXTI15.
 21 |   *            2- EXTI line 16 is connected to the PVD Output
 22 |   *            3- EXTI line 17 is connected to the RTC Alarm event
 23 |   *            4- EXTI line 18 is connected to the USB OTG FS Wakeup from suspend event                                    
 24 |   *            5- EXTI line 19 is connected to the Ethernet Wakeup event
 25 |   *            6- EXTI line 20 is connected to the USB OTG HS (configured in FS) Wakeup event 
 26 |   *            7- EXTI line 21 is connected to the RTC Tamper and Time Stamp events                                               
 27 |   *            8- EXTI line 22 is connected to the RTC Wakeup event
 28 |   *        
 29 |   *          ===================================================================
 30 |   *                                 How to use this driver
 31 |   *          ===================================================================  
 32 |   *              
 33 |   *          In order to use an I/O pin as an external interrupt source, follow
 34 |   *          steps below:
 35 |   *            1- Configure the I/O in input mode using GPIO_Init()
 36 |   *            2- Select the input source pin for the EXTI line using SYSCFG_EXTILineConfig()
 37 |   *            3- Select the mode(interrupt, event) and configure the trigger 
 38 |   *               selection (Rising, falling or both) using EXTI_Init()
 39 |   *            4- Configure NVIC IRQ channel mapped to the EXTI line using NVIC_Init()
 40 |   *   
 41 |   *  @note  SYSCFG APB clock must be enabled to get write access to SYSCFG_EXTICRx
 42 |   *         registers using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
 43 |   *          
 44 |   *  @endverbatim                  
 45 |   *
 46 |   ******************************************************************************
 47 |   * @attention
 48 |   *
 49 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 50 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 51 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 52 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 53 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 54 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 55 |   *
 56 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 57 |   ******************************************************************************
 58 |   */
 59 | 
 60 | /* Includes ------------------------------------------------------------------*/
 61 | #include "stm32f4xx_exti.h"
 62 | 
 63 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 64 |   * @{
 65 |   */
 66 | 
 67 | /** @defgroup EXTI 
 68 |   * @brief EXTI driver modules
 69 |   * @{
 70 |   */
 71 | 
 72 | /* Private typedef -----------------------------------------------------------*/
 73 | /* Private define ------------------------------------------------------------*/
 74 | 
 75 | #define EXTI_LINENONE    ((uint32_t)0x00000)  /* No interrupt selected */
 76 | 
 77 | /* Private macro -------------------------------------------------------------*/
 78 | /* Private variables ---------------------------------------------------------*/
 79 | /* Private function prototypes -----------------------------------------------*/
 80 | /* Private functions ---------------------------------------------------------*/
 81 | 
 82 | /** @defgroup EXTI_Private_Functions
 83 |   * @{
 84 |   */
 85 | 
 86 | /** @defgroup EXTI_Group1 Initialization and Configuration functions
 87 |  *  @brief   Initialization and Configuration functions 
 88 |  *
 89 | @verbatim   
 90 |  ===============================================================================
 91 |                   Initialization and Configuration functions
 92 |  ===============================================================================  
 93 | 
 94 | @endverbatim
 95 |   * @{
 96 |   */
 97 | 
 98 | /**
 99 |   * @brief  Deinitializes the EXTI peripheral registers to their default reset values.
100 |   * @param  None
101 |   * @retval None
102 |   */
103 | void EXTI_DeInit(void)
104 | {
105 |   EXTI->IMR = 0x00000000;
106 |   EXTI->EMR = 0x00000000;
107 |   EXTI->RTSR = 0x00000000;
108 |   EXTI->FTSR = 0x00000000;
109 |   EXTI->PR = 0x007FFFFF;
110 | }
111 | 
112 | /**
113 |   * @brief  Initializes the EXTI peripheral according to the specified
114 |   *         parameters in the EXTI_InitStruct.
115 |   * @param  EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
116 |   *         that contains the configuration information for the EXTI peripheral.
117 |   * @retval None
118 |   */
119 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
120 | {
121 |   uint32_t tmp = 0;
122 | 
123 |   /* Check the parameters */
124 |   assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
125 |   assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
126 |   assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));  
127 |   assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
128 | 
129 |   tmp = (uint32_t)EXTI_BASE;
130 |      
131 |   if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
132 |   {
133 |     /* Clear EXTI line configuration */
134 |     EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
135 |     EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
136 |     
137 |     tmp += EXTI_InitStruct->EXTI_Mode;
138 | 
139 |     *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
140 | 
141 |     /* Clear Rising Falling edge configuration */
142 |     EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
143 |     EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
144 |     
145 |     /* Select the trigger for the selected external interrupts */
146 |     if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
147 |     {
148 |       /* Rising Falling edge */
149 |       EXTI->RTSR |= EXTI_InitStruct->EXTI_Line;
150 |       EXTI->FTSR |= EXTI_InitStruct->EXTI_Line;
151 |     }
152 |     else
153 |     {
154 |       tmp = (uint32_t)EXTI_BASE;
155 |       tmp += EXTI_InitStruct->EXTI_Trigger;
156 | 
157 |       *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
158 |     }
159 |   }
160 |   else
161 |   {
162 |     tmp += EXTI_InitStruct->EXTI_Mode;
163 | 
164 |     /* Disable the selected external lines */
165 |     *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line;
166 |   }
167 | }
168 | 
169 | /**
170 |   * @brief  Fills each EXTI_InitStruct member with its reset value.
171 |   * @param  EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will
172 |   *         be initialized.
173 |   * @retval None
174 |   */
175 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
176 | {
177 |   EXTI_InitStruct->EXTI_Line = EXTI_LINENONE;
178 |   EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
179 |   EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
180 |   EXTI_InitStruct->EXTI_LineCmd = DISABLE;
181 | }
182 | 
183 | /**
184 |   * @brief  Generates a Software interrupt on selected EXTI line.
185 |   * @param  EXTI_Line: specifies the EXTI line on which the software interrupt
186 |   *         will be generated.
187 |   *         This parameter can be any combination of EXTI_Linex where x can be (0..22)
188 |   * @retval None
189 |   */
190 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
191 | {
192 |   /* Check the parameters */
193 |   assert_param(IS_EXTI_LINE(EXTI_Line));
194 |   
195 |   EXTI->SWIER |= EXTI_Line;
196 | }
197 | 
198 | /**
199 |   * @}
200 |   */
201 | 
202 | /** @defgroup EXTI_Group2 Interrupts and flags management functions
203 |  *  @brief   Interrupts and flags management functions 
204 |  *
205 | @verbatim   
206 |  ===============================================================================
207 |                   Interrupts and flags management functions
208 |  ===============================================================================  
209 | 
210 | @endverbatim
211 |   * @{
212 |   */
213 | 
214 | /**
215 |   * @brief  Checks whether the specified EXTI line flag is set or not.
216 |   * @param  EXTI_Line: specifies the EXTI line flag to check.
217 |   *          This parameter can be EXTI_Linex where x can be(0..22)
218 |   * @retval The new state of EXTI_Line (SET or RESET).
219 |   */
220 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
221 | {
222 |   FlagStatus bitstatus = RESET;
223 |   /* Check the parameters */
224 |   assert_param(IS_GET_EXTI_LINE(EXTI_Line));
225 |   
226 |   if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
227 |   {
228 |     bitstatus = SET;
229 |   }
230 |   else
231 |   {
232 |     bitstatus = RESET;
233 |   }
234 |   return bitstatus;
235 | }
236 | 
237 | /**
238 |   * @brief  Clears the EXTI's line pending flags.
239 |   * @param  EXTI_Line: specifies the EXTI lines flags to clear.
240 |   *          This parameter can be any combination of EXTI_Linex where x can be (0..22)
241 |   * @retval None
242 |   */
243 | void EXTI_ClearFlag(uint32_t EXTI_Line)
244 | {
245 |   /* Check the parameters */
246 |   assert_param(IS_EXTI_LINE(EXTI_Line));
247 |   
248 |   EXTI->PR = EXTI_Line;
249 | }
250 | 
251 | /**
252 |   * @brief  Checks whether the specified EXTI line is asserted or not.
253 |   * @param  EXTI_Line: specifies the EXTI line to check.
254 |   *          This parameter can be EXTI_Linex where x can be(0..22)
255 |   * @retval The new state of EXTI_Line (SET or RESET).
256 |   */
257 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
258 | {
259 |   ITStatus bitstatus = RESET;
260 |   uint32_t enablestatus = 0;
261 |   /* Check the parameters */
262 |   assert_param(IS_GET_EXTI_LINE(EXTI_Line));
263 |   
264 |   enablestatus =  EXTI->IMR & EXTI_Line;
265 |   if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
266 |   {
267 |     bitstatus = SET;
268 |   }
269 |   else
270 |   {
271 |     bitstatus = RESET;
272 |   }
273 |   return bitstatus;
274 | }
275 | 
276 | /**
277 |   * @brief  Clears the EXTI's line pending bits.
278 |   * @param  EXTI_Line: specifies the EXTI lines to clear.
279 |   *          This parameter can be any combination of EXTI_Linex where x can be (0..22)
280 |   * @retval None
281 |   */
282 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
283 | {
284 |   /* Check the parameters */
285 |   assert_param(IS_EXTI_LINE(EXTI_Line));
286 |   
287 |   EXTI->PR = EXTI_Line;
288 | }
289 | 
290 | /**
291 |   * @}
292 |   */
293 | 
294 | /**
295 |   * @}
296 |   */
297 | 
298 | /**
299 |   * @}
300 |   */
301 | 
302 | /**
303 |   * @}
304 |   */
305 | 
306 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
307 | 


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/lib/src/stm32f4xx_flash.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/lib/src/stm32f4xx_flash.c


--------------------------------------------------------------------------------
/lib/src/stm32f4xx_hash_md5.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_hash_md5.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides high level functions to compute the HASH MD5 and
  8 |   *          HMAC MD5 Digest of an input message.
  9 |   *          It uses the stm32f4xx_hash.c/.h drivers to access the STM32F4xx HASH
 10 |   *          peripheral.
 11 |   *
 12 |   *  @verbatim
 13 |   *    
 14 |   *          ===================================================================
 15 |   *                                   How to use this driver
 16 |   *          ===================================================================
 17 |   *          1. Enable The HASH controller clock using 
 18 |   *            RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE); function.
 19 |   *
 20 |   *          2. Calculate the HASH MD5 Digest using HASH_MD5() function.
 21 |   *
 22 |   *          3. Calculate the HMAC MD5 Digest using HMAC_MD5() function.
 23 |   *
 24 |   *  @endverbatim
 25 |   *
 26 |   ******************************************************************************
 27 |   * @attention
 28 |   *
 29 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 30 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 31 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 32 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 33 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 34 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 35 |   *
 36 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 37 |   ******************************************************************************
 38 |   */
 39 | 
 40 | /* Includes ------------------------------------------------------------------*/
 41 | #include "stm32f4xx_hash.h"
 42 | 
 43 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 44 |   * @{
 45 |   */
 46 | 
 47 | /** @defgroup HASH 
 48 |   * @brief HASH driver modules
 49 |   * @{
 50 |   */
 51 | 
 52 | /* Private typedef -----------------------------------------------------------*/
 53 | /* Private define ------------------------------------------------------------*/
 54 | #define MD5BUSY_TIMEOUT    ((uint32_t) 0x00010000)
 55 | 
 56 | /* Private macro -------------------------------------------------------------*/
 57 | /* Private variables ---------------------------------------------------------*/
 58 | /* Private function prototypes -----------------------------------------------*/
 59 | /* Private functions ---------------------------------------------------------*/
 60 | 
 61 | /** @defgroup HASH_Private_Functions
 62 |   * @{
 63 |   */ 
 64 | 
 65 | /** @defgroup HASH_Group7 High Level MD5 functions
 66 |  *  @brief   High Level MD5 Hash and HMAC functions 
 67 |  *
 68 | @verbatim   
 69 |  ===============================================================================
 70 |                           High Level MD5 Hash and HMAC functions
 71 |  ===============================================================================
 72 | 
 73 | 
 74 | @endverbatim
 75 |   * @{
 76 |   */
 77 | 
 78 | /**
 79 |   * @brief  Compute the HASH MD5 digest.
 80 |   * @param  Input: pointer to the Input buffer to be treated.
 81 |   * @param  Ilen: length of the Input buffer.
 82 |   * @param  Output: the returned digest
 83 |   * @retval An ErrorStatus enumeration value:
 84 |   *          - SUCCESS: digest computation done
 85 |   *          - ERROR: digest computation failed
 86 |   */
 87 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16])
 88 | {
 89 |   HASH_InitTypeDef MD5_HASH_InitStructure;
 90 |   HASH_MsgDigest MD5_MessageDigest;
 91 |   __IO uint16_t nbvalidbitsdata = 0;
 92 |   uint32_t i = 0;
 93 |   __IO uint32_t counter = 0;
 94 |   uint32_t busystatus = 0;
 95 |   ErrorStatus status = SUCCESS;
 96 |   uint32_t inputaddr  = (uint32_t)Input;
 97 |   uint32_t outputaddr = (uint32_t)Output;
 98 | 
 99 | 
100 |   /* Number of valid bits in last word of the Input data */
101 |   nbvalidbitsdata = 8 * (Ilen % 4);
102 | 
103 |   /* HASH peripheral initialization */
104 |   HASH_DeInit();
105 | 
106 |   /* HASH Configuration */
107 |   MD5_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_MD5;
108 |   MD5_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH;
109 |   MD5_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
110 |   HASH_Init(&MD5_HASH_InitStructure);
111 | 
112 |   /* Configure the number of valid bits in last word of the data */
113 |   HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
114 | 
115 |   /* Write the Input block in the IN FIFO */
116 |   for(i=0; i<Ilen; i+=4)
117 |   {
118 |     HASH_DataIn(*(uint32_t*)inputaddr);
119 |     inputaddr+=4;
120 |   }
121 | 
122 |   /* Start the HASH processor */
123 |   HASH_StartDigest();
124 | 
125 |   /* wait until the Busy flag is RESET */
126 |   do
127 |   {
128 |     busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
129 |     counter++;
130 |   }while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
131 | 
132 |   if (busystatus != RESET)
133 |   {
134 |      status = ERROR;
135 |   }
136 |   else
137 |   {
138 |     /* Read the message digest */
139 |     HASH_GetDigest(&MD5_MessageDigest);
140 |     *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[0]);
141 |     outputaddr+=4;
142 |     *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[1]);
143 |     outputaddr+=4;
144 |     *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[2]);
145 |     outputaddr+=4;
146 |     *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[3]);
147 |   }
148 |   return status; 
149 | }
150 | 
151 | /**
152 |   * @brief  Compute the HMAC MD5 digest.
153 |   * @param  Key: pointer to the Key used for HMAC.
154 |   * @param  Keylen: length of the Key used for HMAC.
155 |   * @param  Input: pointer to the Input buffer to be treated.
156 |   * @param  Ilen: length of the Input buffer.
157 |   * @param  Output: the returned digest  
158 |   * @retval An ErrorStatus enumeration value:
159 |   *          - SUCCESS: digest computation done
160 |   *          - ERROR: digest computation failed
161 |   */
162 | ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen, uint8_t *Input, 
163 |                      uint32_t Ilen, uint8_t Output[16])
164 | {
165 |   HASH_InitTypeDef MD5_HASH_InitStructure;
166 |   HASH_MsgDigest MD5_MessageDigest;
167 |   __IO uint16_t nbvalidbitsdata = 0;
168 |   __IO uint16_t nbvalidbitskey = 0;
169 |   uint32_t i = 0;
170 |   __IO uint32_t counter = 0;
171 |   uint32_t busystatus = 0;
172 |   ErrorStatus status = SUCCESS;
173 |   uint32_t keyaddr    = (uint32_t)Key;
174 |   uint32_t inputaddr  = (uint32_t)Input;
175 |   uint32_t outputaddr = (uint32_t)Output;
176 | 
177 |   /* Number of valid bits in last word of the Input data */
178 |   nbvalidbitsdata = 8 * (Ilen % 4);
179 | 
180 |   /* Number of valid bits in last word of the Key */
181 |   nbvalidbitskey = 8 * (Keylen % 4);
182 |    
183 |   /* HASH peripheral initialization */
184 |   HASH_DeInit();
185 | 
186 |   /* HASH Configuration */
187 |   MD5_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_MD5;
188 |   MD5_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HMAC;
189 |   MD5_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
190 |   if(Keylen > 64)
191 |   {
192 |     /* HMAC long Key */
193 |     MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey;
194 |   }
195 |   else
196 |   {
197 |     /* HMAC short Key */
198 |     MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
199 |   }
200 |   HASH_Init(&MD5_HASH_InitStructure);
201 | 
202 |   /* Configure the number of valid bits in last word of the Key */
203 |   HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
204 | 
205 |   /* Write the Key */
206 |   for(i=0; i<Keylen; i+=4)
207 |   {
208 |     HASH_DataIn(*(uint32_t*)keyaddr);
209 |     keyaddr+=4;
210 |   }
211 |   
212 |   /* Start the HASH processor */
213 |   HASH_StartDigest();
214 | 
215 |   /* wait until the Busy flag is RESET */
216 |   do
217 |   {
218 |     busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
219 |     counter++;
220 |   }while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
221 | 
222 |   if (busystatus != RESET)
223 |   {
224 |      status = ERROR;
225 |   }
226 |   else
227 |   {
228 |     /* Configure the number of valid bits in last word of the Input data */
229 |     HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
230 | 
231 |     /* Write the Input block in the IN FIFO */
232 |     for(i=0; i<Ilen; i+=4)
233 |     {
234 |       HASH_DataIn(*(uint32_t*)inputaddr);
235 |       inputaddr+=4;
236 |     }
237 | 
238 |     /* Start the HASH processor */
239 |     HASH_StartDigest();
240 | 
241 |     /* wait until the Busy flag is RESET */
242 |     counter =0;
243 |     do
244 |     {
245 |        busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
246 |        counter++;
247 |     }while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
248 | 
249 |     if (busystatus != RESET)
250 |     {
251 |       status = ERROR;
252 |     }
253 |     else
254 |     {  
255 |       /* Configure the number of valid bits in last word of the Key */
256 |       HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
257 | 
258 |       /* Write the Key */
259 |       keyaddr = (uint32_t)Key;
260 |       for(i=0; i<Keylen; i+=4)
261 |       {
262 |         HASH_DataIn(*(uint32_t*)keyaddr);
263 |         keyaddr+=4;
264 |       }
265 |   
266 |        /* Start the HASH processor */
267 |        HASH_StartDigest();
268 | 
269 |        /* wait until the Busy flag is RESET */
270 |        counter =0;
271 |        do
272 |        {
273 |           busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
274 |           counter++;
275 |       }while ((counter != MD5BUSY_TIMEOUT) && (busystatus != RESET));
276 | 
277 |       if (busystatus != RESET)
278 |       {
279 |          status = ERROR;
280 |       }
281 |       else
282 |       {
283 |          /* Read the message digest */
284 |          HASH_GetDigest(&MD5_MessageDigest);
285 |          *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[0]);
286 |          outputaddr+=4;
287 |          *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[1]);
288 |          outputaddr+=4;
289 |          *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[2]);
290 |          outputaddr+=4;
291 |          *(uint32_t*)(outputaddr)  = __REV(MD5_MessageDigest.Data[3]);
292 |       }
293 |     }
294 |   }
295 |   return status;  
296 | }
297 | /**
298 |   * @}
299 |   */ 
300 | 
301 | /**
302 |   * @}
303 |   */ 
304 | 
305 | /**
306 |   * @}
307 |   */ 
308 | 
309 | /**
310 |   * @}
311 |   */ 
312 | 
313 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
314 | 
315 | 


--------------------------------------------------------------------------------
/lib/src/stm32f4xx_hash_sha1.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_hash_sha1.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides high level functions to compute the HASH SHA1 and
  8 |   *          HMAC SHA1 Digest of an input message.
  9 |   *          It uses the stm32f4xx_hash.c/.h drivers to access the STM32F4xx HASH
 10 |   *          peripheral.
 11 |   *
 12 |   *  @verbatim
 13 |   * 
 14 |   *          ===================================================================
 15 |   *                                   How to use this driver
 16 |   *          ===================================================================
 17 |   *          1. Enable The HASH controller clock using 
 18 |   *            RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE); function.
 19 |   *
 20 |   *          2. Calculate the HASH SHA1 Digest using HASH_SHA1() function.
 21 |   *
 22 |   *          3. Calculate the HMAC SHA1 Digest using HMAC_SHA1() function.
 23 |   *
 24 |   *  @endverbatim
 25 |   *
 26 |   ******************************************************************************
 27 |   * @attention
 28 |   *
 29 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 30 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 31 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 32 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 33 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 34 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 35 |   *
 36 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 37 |   ******************************************************************************
 38 |   */
 39 | 
 40 | /* Includes ------------------------------------------------------------------*/
 41 | #include "stm32f4xx_hash.h"
 42 | 
 43 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 44 |   * @{
 45 |   */
 46 | 
 47 | /** @defgroup HASH 
 48 |   * @brief HASH driver modules
 49 |   * @{
 50 |   */
 51 | 
 52 | /* Private typedef -----------------------------------------------------------*/
 53 | /* Private define ------------------------------------------------------------*/
 54 | #define SHA1BUSY_TIMEOUT    ((uint32_t) 0x00010000)
 55 | 
 56 | /* Private macro -------------------------------------------------------------*/
 57 | /* Private variables ---------------------------------------------------------*/
 58 | /* Private function prototypes -----------------------------------------------*/
 59 | /* Private functions ---------------------------------------------------------*/
 60 | 
 61 | /** @defgroup HASH_Private_Functions
 62 |   * @{
 63 |   */ 
 64 | 
 65 | /** @defgroup HASH_Group6 High Level SHA1 functions
 66 |  *  @brief   High Level SHA1 Hash and HMAC functions 
 67 |  *
 68 | @verbatim   
 69 |  ===============================================================================
 70 |                           High Level SHA1 Hash and HMAC functions
 71 |  ===============================================================================
 72 | 
 73 | 
 74 | @endverbatim
 75 |   * @{
 76 |   */
 77 | 
 78 | /**
 79 |   * @brief  Compute the HASH SHA1 digest.
 80 |   * @param  Input: pointer to the Input buffer to be treated.
 81 |   * @param  Ilen: length of the Input buffer.
 82 |   * @param  Output: the returned digest
 83 |   * @retval An ErrorStatus enumeration value:
 84 |   *          - SUCCESS: digest computation done
 85 |   *          - ERROR: digest computation failed
 86 |   */
 87 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20])
 88 | {
 89 |   HASH_InitTypeDef SHA1_HASH_InitStructure;
 90 |   HASH_MsgDigest SHA1_MessageDigest;
 91 |   __IO uint16_t nbvalidbitsdata = 0;
 92 |   uint32_t i = 0;
 93 |   __IO uint32_t counter = 0;
 94 |   uint32_t busystatus = 0;
 95 |   ErrorStatus status = SUCCESS;
 96 |   uint32_t inputaddr  = (uint32_t)Input;
 97 |   uint32_t outputaddr = (uint32_t)Output;
 98 | 
 99 |   /* Number of valid bits in last word of the Input data */
100 |   nbvalidbitsdata = 8 * (Ilen % 4);
101 | 
102 |   /* HASH peripheral initialization */
103 |   HASH_DeInit();
104 | 
105 |   /* HASH Configuration */
106 |   SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
107 |   SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH;
108 |   SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
109 |   HASH_Init(&SHA1_HASH_InitStructure);
110 | 
111 |   /* Configure the number of valid bits in last word of the data */
112 |   HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
113 | 
114 |   /* Write the Input block in the IN FIFO */
115 |   for(i=0; i<Ilen; i+=4)
116 |   {
117 |     HASH_DataIn(*(uint32_t*)inputaddr);
118 |     inputaddr+=4;
119 |   }
120 | 
121 |   /* Start the HASH processor */
122 |   HASH_StartDigest();
123 | 
124 |   /* wait until the Busy flag is RESET */
125 |   do
126 |   {
127 |     busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
128 |     counter++;
129 |   }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
130 | 
131 |   if (busystatus != RESET)
132 |   {
133 |      status = ERROR;
134 |   }
135 |   else
136 |   {
137 |     /* Read the message digest */
138 |     HASH_GetDigest(&SHA1_MessageDigest);
139 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[0]);
140 |     outputaddr+=4;
141 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[1]);
142 |     outputaddr+=4;
143 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[2]);
144 |     outputaddr+=4;
145 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[3]);
146 |     outputaddr+=4;
147 |     *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[4]);
148 |   }
149 |   return status;
150 | }
151 | 
152 | /**
153 |   * @brief  Compute the HMAC SHA1 digest.
154 |   * @param  Key: pointer to the Key used for HMAC.
155 |   * @param  Keylen: length of the Key used for HMAC.  
156 |   * @param  Input: pointer to the Input buffer to be treated.
157 |   * @param  Ilen: length of the Input buffer.
158 |   * @param  Output: the returned digest
159 |   * @retval An ErrorStatus enumeration value:
160 |   *          - SUCCESS: digest computation done
161 |   *          - ERROR: digest computation failed
162 |   */
163 | ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen, uint8_t *Input,
164 |                       uint32_t Ilen, uint8_t Output[20])
165 | {
166 |   HASH_InitTypeDef SHA1_HASH_InitStructure;
167 |   HASH_MsgDigest SHA1_MessageDigest;
168 |   __IO uint16_t nbvalidbitsdata = 0;
169 |   __IO uint16_t nbvalidbitskey = 0;
170 |   uint32_t i = 0;
171 |   __IO uint32_t counter = 0;
172 |   uint32_t busystatus = 0;
173 |   ErrorStatus status = SUCCESS;
174 |   uint32_t keyaddr    = (uint32_t)Key;
175 |   uint32_t inputaddr  = (uint32_t)Input;
176 |   uint32_t outputaddr = (uint32_t)Output;
177 | 
178 |   /* Number of valid bits in last word of the Input data */
179 |   nbvalidbitsdata = 8 * (Ilen % 4);
180 | 
181 |   /* Number of valid bits in last word of the Key */
182 |   nbvalidbitskey = 8 * (Keylen % 4);
183 | 
184 |   /* HASH peripheral initialization */
185 |   HASH_DeInit();
186 | 
187 |   /* HASH Configuration */
188 |   SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
189 |   SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HMAC;
190 |   SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
191 |   if(Keylen > 64)
192 |   {
193 |     /* HMAC long Key */
194 |     SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey;
195 |   }
196 |   else
197 |   {
198 |     /* HMAC short Key */
199 |     SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
200 |   }
201 |   HASH_Init(&SHA1_HASH_InitStructure);
202 | 
203 |   /* Configure the number of valid bits in last word of the Key */
204 |   HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
205 | 
206 |   /* Write the Key */
207 |   for(i=0; i<Keylen; i+=4)
208 |   {
209 |     HASH_DataIn(*(uint32_t*)keyaddr);
210 |     keyaddr+=4;
211 |   }
212 | 
213 |   /* Start the HASH processor */
214 |   HASH_StartDigest();
215 | 
216 |   /* wait until the Busy flag is RESET */
217 |   do
218 |   {
219 |     busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
220 |     counter++;
221 |   }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
222 | 
223 |   if (busystatus != RESET)
224 |   {
225 |      status = ERROR;
226 |   }
227 |   else
228 |   {
229 |     /* Configure the number of valid bits in last word of the Input data */
230 |     HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
231 | 
232 |     /* Write the Input block in the IN FIFO */
233 |     for(i=0; i<Ilen; i+=4)
234 |     {
235 |       HASH_DataIn(*(uint32_t*)inputaddr);
236 |       inputaddr+=4;
237 |     }
238 | 
239 |     /* Start the HASH processor */
240 |     HASH_StartDigest();
241 | 
242 | 
243 |     /* wait until the Busy flag is RESET */
244 |     counter =0;
245 |     do
246 |     {
247 |       busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
248 |       counter++;
249 |     }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
250 | 
251 |     if (busystatus != RESET)
252 |     {
253 |       status = ERROR;
254 |     }
255 |     else
256 |     {  
257 |       /* Configure the number of valid bits in last word of the Key */
258 |       HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
259 | 
260 |       /* Write the Key */
261 |       keyaddr = (uint32_t)Key;
262 |       for(i=0; i<Keylen; i+=4)
263 |       {
264 |         HASH_DataIn(*(uint32_t*)keyaddr);
265 |         keyaddr+=4;
266 |       }
267 | 
268 |       /* Start the HASH processor */
269 |       HASH_StartDigest();
270 | 
271 |       /* wait until the Busy flag is RESET */
272 |       counter =0;
273 |       do
274 |       {
275 |         busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
276 |         counter++;
277 |       }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
278 | 
279 |       if (busystatus != RESET)
280 |       {
281 |         status = ERROR;
282 |       }
283 |       else
284 |       {
285 |         /* Read the message digest */
286 |         HASH_GetDigest(&SHA1_MessageDigest);
287 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[0]);
288 |         outputaddr+=4;
289 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[1]);
290 |         outputaddr+=4;
291 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[2]);
292 |         outputaddr+=4;
293 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[3]);
294 |         outputaddr+=4;
295 |         *(uint32_t*)(outputaddr)  = __REV(SHA1_MessageDigest.Data[4]);
296 |       }
297 |     }  
298 |   }
299 |   return status;  
300 | }
301 | /**
302 |   * @}
303 |   */ 
304 | 
305 | /**
306 |   * @}
307 |   */ 
308 | 
309 | /**
310 |   * @}
311 |   */ 
312 | 
313 | /**
314 |   * @}
315 |   */ 
316 | 
317 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
318 | 


--------------------------------------------------------------------------------
/lib/src/stm32f4xx_iwdg.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_iwdg.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides firmware functions to manage the following 
  8 |   *          functionalities of the Independent watchdog (IWDG) peripheral:           
  9 |   *           - Prescaler and Counter configuration
 10 |   *           - IWDG activation
 11 |   *           - Flag management
 12 |   *
 13 |   *  @verbatim  
 14 |   *  
 15 |   *          ===================================================================
 16 |   *                                     IWDG features
 17 |   *          ===================================================================
 18 |   *    
 19 |   *          The IWDG can be started by either software or hardware (configurable
 20 |   *          through option byte).
 21 |   *            
 22 |   *          The IWDG is clocked by its own dedicated low-speed clock (LSI) and
 23 |   *          thus stays active even if the main clock fails.
 24 |   *          Once the IWDG is started, the LSI is forced ON and cannot be disabled
 25 |   *          (LSI cannot be disabled too), and the counter starts counting down from 
 26 |   *          the reset value of 0xFFF. When it reaches the end of count value (0x000)
 27 |   *          a system reset is generated.
 28 |   *          The IWDG counter should be reloaded at regular intervals to prevent
 29 |   *          an MCU reset.
 30 |   *                           
 31 |   *          The IWDG is implemented in the VDD voltage domain that is still functional
 32 |   *          in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).          
 33 |   *            
 34 |   *          IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
 35 |   *          reset occurs.
 36 |   *            
 37 |   *          Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
 38 |   *          The IWDG timeout may vary due to LSI frequency dispersion. STM32F4xx
 39 |   *          devices provide the capability to measure the LSI frequency (LSI clock
 40 |   *          connected internally to TIM5 CH4 input capture). The measured value
 41 |   *          can be used to have an IWDG timeout with an acceptable accuracy. 
 42 |   *          For more information, please refer to the STM32F4xx Reference manual
 43 |   *          
 44 |   *                            
 45 |   *          ===================================================================
 46 |   *                                 How to use this driver
 47 |   *          ===================================================================
 48 |   *          1. Enable write access to IWDG_PR and IWDG_RLR registers using
 49 |   *             IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function
 50 |   *               
 51 |   *          2. Configure the IWDG prescaler using IWDG_SetPrescaler() function
 52 |   *            
 53 |   *          3. Configure the IWDG counter value using IWDG_SetReload() function.
 54 |   *             This value will be loaded in the IWDG counter each time the counter
 55 |   *             is reloaded, then the IWDG will start counting down from this value.
 56 |   *            
 57 |   *          4. Start the IWDG using IWDG_Enable() function, when the IWDG is used
 58 |   *             in software mode (no need to enable the LSI, it will be enabled
 59 |   *             by hardware)
 60 |   *             
 61 |   *          5. Then the application program must reload the IWDG counter at regular
 62 |   *             intervals during normal operation to prevent an MCU reset, using
 63 |   *             IWDG_ReloadCounter() function.      
 64 |   *          
 65 |   *  @endverbatim
 66 |   *    
 67 |   ******************************************************************************
 68 |   * @attention
 69 |   *
 70 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 71 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 72 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 73 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 74 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 75 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 76 |   *
 77 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 78 |   ******************************************************************************
 79 |   */
 80 | 
 81 | /* Includes ------------------------------------------------------------------*/
 82 | #include "stm32f4xx_iwdg.h"
 83 | 
 84 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 85 |   * @{
 86 |   */
 87 | 
 88 | /** @defgroup IWDG 
 89 |   * @brief IWDG driver modules
 90 |   * @{
 91 |   */ 
 92 | 
 93 | /* Private typedef -----------------------------------------------------------*/
 94 | /* Private define ------------------------------------------------------------*/
 95 | 
 96 | /* KR register bit mask */
 97 | #define KR_KEY_RELOAD    ((uint16_t)0xAAAA)
 98 | #define KR_KEY_ENABLE    ((uint16_t)0xCCCC)
 99 | 
100 | /* Private macro -------------------------------------------------------------*/
101 | /* Private variables ---------------------------------------------------------*/
102 | /* Private function prototypes -----------------------------------------------*/
103 | /* Private functions ---------------------------------------------------------*/
104 | 
105 | /** @defgroup IWDG_Private_Functions
106 |   * @{
107 |   */
108 | 
109 | /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
110 |  *  @brief   Prescaler and Counter configuration functions
111 |  *
112 | @verbatim   
113 |  ===============================================================================
114 |                   Prescaler and Counter configuration functions
115 |  ===============================================================================  
116 | 
117 | @endverbatim
118 |   * @{
119 |   */
120 | 
121 | /**
122 |   * @brief  Enables or disables write access to IWDG_PR and IWDG_RLR registers.
123 |   * @param  IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
124 |   *          This parameter can be one of the following values:
125 |   *            @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
126 |   *            @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
127 |   * @retval None
128 |   */
129 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
130 | {
131 |   /* Check the parameters */
132 |   assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
133 |   IWDG->KR = IWDG_WriteAccess;
134 | }
135 | 
136 | /**
137 |   * @brief  Sets IWDG Prescaler value.
138 |   * @param  IWDG_Prescaler: specifies the IWDG Prescaler value.
139 |   *          This parameter can be one of the following values:
140 |   *            @arg IWDG_Prescaler_4: IWDG prescaler set to 4
141 |   *            @arg IWDG_Prescaler_8: IWDG prescaler set to 8
142 |   *            @arg IWDG_Prescaler_16: IWDG prescaler set to 16
143 |   *            @arg IWDG_Prescaler_32: IWDG prescaler set to 32
144 |   *            @arg IWDG_Prescaler_64: IWDG prescaler set to 64
145 |   *            @arg IWDG_Prescaler_128: IWDG prescaler set to 128
146 |   *            @arg IWDG_Prescaler_256: IWDG prescaler set to 256
147 |   * @retval None
148 |   */
149 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
150 | {
151 |   /* Check the parameters */
152 |   assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
153 |   IWDG->PR = IWDG_Prescaler;
154 | }
155 | 
156 | /**
157 |   * @brief  Sets IWDG Reload value.
158 |   * @param  Reload: specifies the IWDG Reload value.
159 |   *          This parameter must be a number between 0 and 0x0FFF.
160 |   * @retval None
161 |   */
162 | void IWDG_SetReload(uint16_t Reload)
163 | {
164 |   /* Check the parameters */
165 |   assert_param(IS_IWDG_RELOAD(Reload));
166 |   IWDG->RLR = Reload;
167 | }
168 | 
169 | /**
170 |   * @brief  Reloads IWDG counter with value defined in the reload register
171 |   *         (write access to IWDG_PR and IWDG_RLR registers disabled).
172 |   * @param  None
173 |   * @retval None
174 |   */
175 | void IWDG_ReloadCounter(void)
176 | {
177 |   IWDG->KR = KR_KEY_RELOAD;
178 | }
179 | 
180 | /**
181 |   * @}
182 |   */
183 | 
184 | /** @defgroup IWDG_Group2 IWDG activation function
185 |  *  @brief   IWDG activation function 
186 |  *
187 | @verbatim   
188 |  ===============================================================================
189 |                           IWDG activation function
190 |  ===============================================================================  
191 | 
192 | @endverbatim
193 |   * @{
194 |   */
195 | 
196 | /**
197 |   * @brief  Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
198 |   * @param  None
199 |   * @retval None
200 |   */
201 | void IWDG_Enable(void)
202 | {
203 |   IWDG->KR = KR_KEY_ENABLE;
204 | }
205 | 
206 | /**
207 |   * @}
208 |   */
209 | 
210 | /** @defgroup IWDG_Group3 Flag management function 
211 |  *  @brief  Flag management function  
212 |  *
213 | @verbatim   
214 |  ===============================================================================
215 |                             Flag management function 
216 |  ===============================================================================  
217 | 
218 | @endverbatim
219 |   * @{
220 |   */
221 | 
222 | /**
223 |   * @brief  Checks whether the specified IWDG flag is set or not.
224 |   * @param  IWDG_FLAG: specifies the flag to check.
225 |   *          This parameter can be one of the following values:
226 |   *            @arg IWDG_FLAG_PVU: Prescaler Value Update on going
227 |   *            @arg IWDG_FLAG_RVU: Reload Value Update on going
228 |   * @retval The new state of IWDG_FLAG (SET or RESET).
229 |   */
230 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
231 | {
232 |   FlagStatus bitstatus = RESET;
233 |   /* Check the parameters */
234 |   assert_param(IS_IWDG_FLAG(IWDG_FLAG));
235 |   if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
236 |   {
237 |     bitstatus = SET;
238 |   }
239 |   else
240 |   {
241 |     bitstatus = RESET;
242 |   }
243 |   /* Return the flag status */
244 |   return bitstatus;
245 | }
246 | 
247 | /**
248 |   * @}
249 |   */
250 | 
251 | /**
252 |   * @}
253 |   */
254 | 
255 | /**
256 |   * @}
257 |   */
258 | 
259 | /**
260 |   * @}
261 |   */
262 | 
263 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
264 | 


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/lib/src/stm32f4xx_rcc.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/lib/src/stm32f4xx_rcc.c


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/lib/src/stm32f4xx_syscfg.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_syscfg.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides firmware functions to manage the SYSCFG peripheral.
  8 |   *
  9 |   *  @verbatim
 10 |   *  
 11 |   *          ===================================================================
 12 |   *                                 How to use this driver
 13 |   *          ===================================================================
 14 |   *                  
 15 |   *          This driver provides functions for:
 16 |   *          
 17 |   *          1. Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig()
 18 |   *              
 19 |   *          2. Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig()
 20 |   *            
 21 |   *          3. Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig()
 22 |   *
 23 |   *  @note  SYSCFG APB clock must be enabled to get write access to SYSCFG registers,
 24 |   *         using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
 25 |   *                 
 26 |   *  @endverbatim
 27 |   *      
 28 |   ******************************************************************************
 29 |   * @attention
 30 |   *
 31 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 32 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 33 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 34 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 35 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 36 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 37 |   *
 38 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 39 |   ******************************************************************************
 40 |   */
 41 | 
 42 | /* Includes ------------------------------------------------------------------*/
 43 | #include "stm32f4xx_syscfg.h"
 44 | #include "stm32f4xx_rcc.h"
 45 | 
 46 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 47 |   * @{
 48 |   */
 49 | 
 50 | /** @defgroup SYSCFG 
 51 |   * @brief SYSCFG driver modules
 52 |   * @{
 53 |   */ 
 54 | 
 55 | /* Private typedef -----------------------------------------------------------*/
 56 | /* Private define ------------------------------------------------------------*/
 57 | /* ------------ RCC registers bit address in the alias region ----------- */
 58 | #define SYSCFG_OFFSET             (SYSCFG_BASE - PERIPH_BASE)
 59 | /* ---  PMC Register ---*/ 
 60 | /* Alias word address of MII_RMII_SEL bit */ 
 61 | #define PMC_OFFSET                (SYSCFG_OFFSET + 0x04) 
 62 | #define MII_RMII_SEL_BitNumber    ((uint8_t)0x17) 
 63 | #define PMC_MII_RMII_SEL_BB       (PERIPH_BB_BASE + (PMC_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4)) 
 64 | 
 65 | /* ---  CMPCR Register ---*/ 
 66 | /* Alias word address of CMP_PD bit */ 
 67 | #define CMPCR_OFFSET              (SYSCFG_OFFSET + 0x20) 
 68 | #define CMP_PD_BitNumber          ((uint8_t)0x00) 
 69 | #define CMPCR_CMP_PD_BB           (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BitNumber * 4)) 
 70 | 
 71 | /* Private macro -------------------------------------------------------------*/
 72 | /* Private variables ---------------------------------------------------------*/
 73 | /* Private function prototypes -----------------------------------------------*/
 74 | /* Private functions ---------------------------------------------------------*/
 75 | 
 76 | /** @defgroup SYSCFG_Private_Functions
 77 |   * @{
 78 |   */ 
 79 | 
 80 | /**
 81 |   * @brief  Deinitializes the Alternate Functions (remap and EXTI configuration)
 82 |   *   registers to their default reset values.
 83 |   * @param  None
 84 |   * @retval None
 85 |   */
 86 | void SYSCFG_DeInit(void)
 87 | {
 88 |    RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
 89 |    RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
 90 | }
 91 | 
 92 | /**
 93 |   * @brief  Changes the mapping of the specified pin.
 94 |   * @param  SYSCFG_Memory: selects the memory remapping.
 95 |   *         This parameter can be one of the following values:
 96 |   *            @arg SYSCFG_MemoryRemap_Flash:       Main Flash memory mapped at 0x00000000  
 97 |   *            @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
 98 |   *            @arg SYSCFG_MemoryRemap_FSMC:        FSMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
 99 |   *            @arg SYSCFG_MemoryRemap_SRAM:        Embedded SRAM (112kB) mapped at 0x00000000
100 |   * @retval None
101 |   */
102 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
103 | {
104 |   /* Check the parameters */
105 |   assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
106 | 
107 |   SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
108 | }
109 | 
110 | /**
111 |   * @brief  Selects the GPIO pin used as EXTI Line.
112 |   * @param  EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
113 |   *          EXTI lines where x can be (A..I).
114 |   * @param  EXTI_PinSourcex: specifies the EXTI line to be configured.
115 |   *           This parameter can be EXTI_PinSourcex where x can be (0..15, except
116 |   *           for EXTI_PortSourceGPIOI x can be (0..11).
117 |   * @retval None
118 |   */
119 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
120 | {
121 |   uint32_t tmp = 0x00;
122 | 
123 |   /* Check the parameters */
124 |   assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
125 |   assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
126 | 
127 |   tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
128 |   SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
129 |   SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
130 | }
131 | 
132 | /**
133 |   * @brief  Selects the ETHERNET media interface 
134 |   * @param  SYSCFG_ETH_MediaInterface: specifies the Media Interface mode. 
135 |   *          This parameter can be one of the following values: 
136 |   *            @arg SYSCFG_ETH_MediaInterface_MII: MII mode selected
137 |   *            @arg SYSCFG_ETH_MediaInterface_RMII: RMII mode selected 
138 |   * @retval None 
139 |   */
140 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface) 
141 | { 
142 |   assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE(SYSCFG_ETH_MediaInterface)); 
143 |   /* Configure MII_RMII selection bit */ 
144 |   *(__IO uint32_t *) PMC_MII_RMII_SEL_BB = SYSCFG_ETH_MediaInterface; 
145 | }
146 | 
147 | /**
148 |   * @brief  Enables or disables the I/O Compensation Cell.
149 |   * @note   The I/O compensation cell can be used only when the device supply
150 |   *         voltage ranges from 2.4 to 3.6 V.  
151 |   * @param  NewState: new state of the I/O Compensation Cell.
152 |   *          This parameter can be one of the following values:
153 |   *            @arg ENABLE: I/O compensation cell enabled  
154 |   *            @arg DISABLE: I/O compensation cell power-down mode  
155 |   * @retval None
156 |   */
157 | void SYSCFG_CompensationCellCmd(FunctionalState NewState)
158 | {
159 |   /* Check the parameters */
160 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
161 | 
162 |   *(__IO uint32_t *) CMPCR_CMP_PD_BB = (uint32_t)NewState;
163 | }
164 | 
165 | /**
166 |   * @brief  Checks whether the I/O Compensation Cell ready flag is set or not.
167 |   * @param  None
168 |   * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET)
169 |   */
170 | FlagStatus SYSCFG_GetCompensationCellStatus(void)
171 | {
172 |   FlagStatus bitstatus = RESET;
173 |     
174 |   if ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET)
175 |   {
176 |     bitstatus = SET;
177 |   }
178 |   else
179 |   {
180 |     bitstatus = RESET;
181 |   }
182 |   return bitstatus;
183 | }
184 | 
185 | /**
186 |   * @}
187 |   */
188 | 
189 | /**
190 |   * @}
191 |   */
192 | 
193 | /**
194 |   * @}
195 |   */
196 | 
197 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/   
198 | 


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/lib/src/stm32f4xx_wwdg.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f4xx_wwdg.c
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    30-September-2011
  7 |   * @brief   This file provides firmware functions to manage the following 
  8 |   *          functionalities of the Window watchdog (WWDG) peripheral:           
  9 |   *           - Prescaler, Refresh window and Counter configuration
 10 |   *           - WWDG activation
 11 |   *           - Interrupts and flags management
 12 |   *             
 13 |   *  @verbatim
 14 |   *    
 15 |   *          ===================================================================
 16 |   *                                     WWDG features
 17 |   *          ===================================================================
 18 |   *                                        
 19 |   *          Once enabled the WWDG generates a system reset on expiry of a programmed
 20 |   *          time period, unless the program refreshes the counter (downcounter) 
 21 |   *          before to reach 0x3F value (i.e. a reset is generated when the counter
 22 |   *          value rolls over from 0x40 to 0x3F). 
 23 |   *          An MCU reset is also generated if the counter value is refreshed
 24 |   *          before the counter has reached the refresh window value. This 
 25 |   *          implies that the counter must be refreshed in a limited window.
 26 |   *            
 27 |   *          Once enabled the WWDG cannot be disabled except by a system reset.                          
 28 |   *          
 29 |   *          WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
 30 |   *          reset occurs.
 31 |   *            
 32 |   *          The WWDG counter input clock is derived from the APB clock divided 
 33 |   *          by a programmable prescaler.
 34 |   *              
 35 |   *          WWDG counter clock = PCLK1 / Prescaler
 36 |   *          WWDG timeout = (WWDG counter clock) * (counter value)
 37 |   *                      
 38 |   *          Min-max timeout value @42 MHz(PCLK1): ~97.5 us / ~49.9 ms
 39 |   *                            
 40 |   *          ===================================================================
 41 |   *                                 How to use this driver
 42 |   *          =================================================================== 
 43 |   *          1. Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
 44 |   *            
 45 |   *          2. Configure the WWDG prescaler using WWDG_SetPrescaler() function
 46 |   *                           
 47 |   *          3. Configure the WWDG refresh window using WWDG_SetWindowValue() function
 48 |   *            
 49 |   *          4. Set the WWDG counter value and start it using WWDG_Enable() function.
 50 |   *             When the WWDG is enabled the counter value should be configured to 
 51 |   *             a value greater than 0x40 to prevent generating an immediate reset.     
 52 |   *            
 53 |   *          5. Optionally you can enable the Early wakeup interrupt which is 
 54 |   *             generated when the counter reach 0x40.
 55 |   *             Once enabled this interrupt cannot be disabled except by a system reset.
 56 |   *                 
 57 |   *          6. Then the application program must refresh the WWDG counter at regular
 58 |   *             intervals during normal operation to prevent an MCU reset, using
 59 |   *             WWDG_SetCounter() function. This operation must occur only when
 60 |   *             the counter value is lower than the refresh window value, 
 61 |   *             programmed using WWDG_SetWindowValue().         
 62 |   *
 63 |   *  @endverbatim  
 64 |   *                             
 65 |   ******************************************************************************
 66 |   * @attention
 67 |   *
 68 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 69 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 70 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 71 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 72 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 73 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 74 |   *
 75 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 76 |   ******************************************************************************
 77 |   */
 78 | 
 79 | /* Includes ------------------------------------------------------------------*/
 80 | #include "stm32f4xx_wwdg.h"
 81 | #include "stm32f4xx_rcc.h"
 82 | 
 83 | /** @addtogroup STM32F4xx_StdPeriph_Driver
 84 |   * @{
 85 |   */
 86 | 
 87 | /** @defgroup WWDG 
 88 |   * @brief WWDG driver modules
 89 |   * @{
 90 |   */
 91 | 
 92 | /* Private typedef -----------------------------------------------------------*/
 93 | /* Private define ------------------------------------------------------------*/
 94 | 
 95 | /* ----------- WWDG registers bit address in the alias region ----------- */
 96 | #define WWDG_OFFSET       (WWDG_BASE - PERIPH_BASE)
 97 | /* Alias word address of EWI bit */
 98 | #define CFR_OFFSET        (WWDG_OFFSET + 0x04)
 99 | #define EWI_BitNumber     0x09
100 | #define CFR_EWI_BB        (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
101 | 
102 | /* --------------------- WWDG registers bit mask ------------------------ */
103 | /* CFR register bit mask */
104 | #define CFR_WDGTB_MASK    ((uint32_t)0xFFFFFE7F)
105 | #define CFR_W_MASK        ((uint32_t)0xFFFFFF80)
106 | #define BIT_MASK          ((uint8_t)0x7F)
107 | 
108 | /* Private macro -------------------------------------------------------------*/
109 | /* Private variables ---------------------------------------------------------*/
110 | /* Private function prototypes -----------------------------------------------*/
111 | /* Private functions ---------------------------------------------------------*/
112 | 
113 | /** @defgroup WWDG_Private_Functions
114 |   * @{
115 |   */
116 | 
117 | /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
118 |  *  @brief   Prescaler, Refresh window and Counter configuration functions 
119 |  *
120 | @verbatim   
121 |  ===============================================================================
122 |           Prescaler, Refresh window and Counter configuration functions
123 |  ===============================================================================  
124 | 
125 | @endverbatim
126 |   * @{
127 |   */
128 | 
129 | /**
130 |   * @brief  Deinitializes the WWDG peripheral registers to their default reset values.
131 |   * @param  None
132 |   * @retval None
133 |   */
134 | void WWDG_DeInit(void)
135 | {
136 |   RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
137 |   RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
138 | }
139 | 
140 | /**
141 |   * @brief  Sets the WWDG Prescaler.
142 |   * @param  WWDG_Prescaler: specifies the WWDG Prescaler.
143 |   *   This parameter can be one of the following values:
144 |   *     @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
145 |   *     @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
146 |   *     @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
147 |   *     @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
148 |   * @retval None
149 |   */
150 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
151 | {
152 |   uint32_t tmpreg = 0;
153 |   /* Check the parameters */
154 |   assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
155 |   /* Clear WDGTB[1:0] bits */
156 |   tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
157 |   /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
158 |   tmpreg |= WWDG_Prescaler;
159 |   /* Store the new value */
160 |   WWDG->CFR = tmpreg;
161 | }
162 | 
163 | /**
164 |   * @brief  Sets the WWDG window value.
165 |   * @param  WindowValue: specifies the window value to be compared to the downcounter.
166 |   *   This parameter value must be lower than 0x80.
167 |   * @retval None
168 |   */
169 | void WWDG_SetWindowValue(uint8_t WindowValue)
170 | {
171 |   __IO uint32_t tmpreg = 0;
172 | 
173 |   /* Check the parameters */
174 |   assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
175 |   /* Clear W[6:0] bits */
176 | 
177 |   tmpreg = WWDG->CFR & CFR_W_MASK;
178 | 
179 |   /* Set W[6:0] bits according to WindowValue value */
180 |   tmpreg |= WindowValue & (uint32_t) BIT_MASK;
181 | 
182 |   /* Store the new value */
183 |   WWDG->CFR = tmpreg;
184 | }
185 | 
186 | /**
187 |   * @brief  Enables the WWDG Early Wakeup interrupt(EWI).
188 |   * @note   Once enabled this interrupt cannot be disabled except by a system reset.
189 |   * @param  None
190 |   * @retval None
191 |   */
192 | void WWDG_EnableIT(void)
193 | {
194 |   *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
195 | }
196 | 
197 | /**
198 |   * @brief  Sets the WWDG counter value.
199 |   * @param  Counter: specifies the watchdog counter value.
200 |   *   This parameter must be a number between 0x40 and 0x7F (to prevent generating
201 |   *   an immediate reset) 
202 |   * @retval None
203 |   */
204 | void WWDG_SetCounter(uint8_t Counter)
205 | {
206 |   /* Check the parameters */
207 |   assert_param(IS_WWDG_COUNTER(Counter));
208 |   /* Write to T[6:0] bits to configure the counter value, no need to do
209 |      a read-modify-write; writing a 0 to WDGA bit does nothing */
210 |   WWDG->CR = Counter & BIT_MASK;
211 | }
212 | /**
213 |   * @}
214 |   */
215 | 
216 | /** @defgroup WWDG_Group2 WWDG activation functions
217 |  *  @brief   WWDG activation functions 
218 |  *
219 | @verbatim   
220 |  ===============================================================================
221 |                        WWDG activation function
222 |  ===============================================================================  
223 | 
224 | @endverbatim
225 |   * @{
226 |   */
227 | 
228 | /**
229 |   * @brief  Enables WWDG and load the counter value.                  
230 |   * @param  Counter: specifies the watchdog counter value.
231 |   *   This parameter must be a number between 0x40 and 0x7F (to prevent generating
232 |   *   an immediate reset)
233 |   * @retval None
234 |   */
235 | void WWDG_Enable(uint8_t Counter)
236 | {
237 |   /* Check the parameters */
238 |   assert_param(IS_WWDG_COUNTER(Counter));
239 |   WWDG->CR = WWDG_CR_WDGA | Counter;
240 | }
241 | /**
242 |   * @}
243 |   */
244 | 
245 | /** @defgroup WWDG_Group3 Interrupts and flags management functions
246 |  *  @brief   Interrupts and flags management functions 
247 |  *
248 | @verbatim   
249 |  ===============================================================================
250 |                  Interrupts and flags management functions
251 |  ===============================================================================  
252 | 
253 | @endverbatim
254 |   * @{
255 |   */
256 | 
257 | /**
258 |   * @brief  Checks whether the Early Wakeup interrupt flag is set or not.
259 |   * @param  None
260 |   * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
261 |   */
262 | FlagStatus WWDG_GetFlagStatus(void)
263 | {
264 |   FlagStatus bitstatus = RESET;
265 |     
266 |   if ((WWDG->SR) != (uint32_t)RESET)
267 |   {
268 |     bitstatus = SET;
269 |   }
270 |   else
271 |   {
272 |     bitstatus = RESET;
273 |   }
274 |   return bitstatus;
275 | }
276 | 
277 | /**
278 |   * @brief  Clears Early Wakeup interrupt flag.
279 |   * @param  None
280 |   * @retval None
281 |   */
282 | void WWDG_ClearFlag(void)
283 | {
284 |   WWDG->SR = (uint32_t)RESET;
285 | }
286 | 
287 | /**
288 |   * @}
289 |   */
290 | 
291 | /**
292 |   * @}
293 |   */
294 | 
295 | /**
296 |   * @}
297 |   */
298 | 
299 | /**
300 |   * @}
301 |   */
302 | 
303 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
304 | 


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/other/spi.c:
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/other/spi.h:
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 1 | #ifndef __SPI_H
 2 | #define __SPI_H
 3 | 
 4 | #define SPI_CS_L GPIOA->BSRRH = (1 << 4)
 5 | #define SPI_CS_H GPIOA->BSRRL = (1 << 4) 
 6 | 
 7 | #define SPI_CLK_L GPIOA->BSRRH = (1 << 5)
 8 | #define SPI_CLK_H GPIOA->BSRRL = (1 << 5)
 9 |  
10 | #define SPI_MISO_IN (GPIOA->IDR & (1 << 6))
11 | 
12 | #define SPI_MOSI_L GPIOA->BSRRH = (1 << 7)
13 | #define SPI_MOSI_H GPIOA->BSRRL = (1 << 7) 
14 | 
15 | void spiInit(void);
16 | unsigned char spiSR(unsigned char data);
17 | void spiSend(unsigned char data);
18 | unsigned char spiReceive(void);
19 | 
20 | #endif
21 | 


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/other/usart.c:
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/other/usart.h:
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1 | #ifndef __USART_H
2 | #define __USART_H
3 | 
4 | void usartInit(void);
5 |          
6 | #endif
7 | 


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/proj/JLinkSettings.ini:
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 1 | [BREAKPOINTS]
 2 | ShowInfoWin = 1
 3 | EnableFlashBP = 2
 4 | BPDuringExecution = 0
 5 | [CFI]
 6 | CFISize = 0x00
 7 | CFIAddr = 0x00
 8 | [CPU]
 9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 1
21 | Device="Unspecified"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 | 


--------------------------------------------------------------------------------
/proj/output/ExtDll.iex:
--------------------------------------------------------------------------------
1 | [EXTDLL]
2 | Count=0
3 | 


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/proj/output/test.axf:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/proj/output/test.axf


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/proj/output/test.build_log.htm:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/proj/output/test.build_log.htm


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/proj/output/test.lnp:
--------------------------------------------------------------------------------
 1 | --cpu Cortex-M4.fp
 2 | ".\output\startup_stm32f4xx.o"
 3 | ".\output\main.o"
 4 | ".\output\stm32f4xx_it.o"
 5 | ".\output\system_stm32f4xx.o"
 6 | ".\output\diskio.o"
 7 | ".\output\ff.o"
 8 | ".\output\ccsbcs.o"
 9 | ".\output\sdio_sd.o"
10 | ".\output\spi.o"
11 | ".\output\usart.o"
12 | ".\output\misc.o"
13 | ".\output\stm32f4xx_dma.o"
14 | ".\output\stm32f4xx_gpio.o"
15 | ".\output\stm32f4xx_rcc.o"
16 | ".\output\stm32f4xx_sdio.o"
17 | ".\output\stm32f4xx_usart.o"
18 | ".\output\stm32f4xx_spi.o"
19 | ".\output\http.o"
20 | ".\output\webserver.o"
21 | ".\output\ftp.o"
22 | ".\output\ip.o"
23 | ".\output\enc28j60.o"
24 | ".\output\spi_enc28j60.o"
25 | ".\output\tcp.o"
26 | ".\output\udp.o"
27 | ".\output\share.o"
28 | ".\output\eth.o"
29 | ".\output\mytcpip.o"
30 | ".\output\arp.o"
31 | ".\output\icmp.o"
32 | ".\output\driver.o"
33 | ".\output\tcp_virtualwindow.o"
34 | --library_type=microlib --strict --scatter ".\output\test.sct"
35 | --summary_stderr --info summarysizes --map --xref --callgraph --symbols
36 | --info sizes --info totals --info unused --info veneers
37 | --list ".\output\test.map" -o .\output\test.axf


--------------------------------------------------------------------------------
/proj/output/test.sct:
--------------------------------------------------------------------------------
 1 | ; *************************************************************
 2 | ; *** Scatter-Loading Description File generated by uVision ***
 3 | ; *************************************************************
 4 | 
 5 | LR_IROM1 0x08000000 0x00060000  {    ; load region size_region
 6 |   ER_IROM1 0x08000000 0x00060000  {  ; load address = execution address
 7 |    *.o (RESET, +First)
 8 |    *(InRoot$$Sections)
 9 |    .ANY (+RO)
10 |   }
11 |   RW_IRAM1 0x20000000 0x00018000  {  ; RW data
12 |    .ANY (+RW +ZI)
13 |   }
14 | }
15 | 
16 | 


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/user/main.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/user/main.c


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/user/main.h:
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 1 | #ifndef __MAIN_H
 2 | #define __MAIN_H
 3 | 
 4 | #include <stm32f4xx.h>
 5 | #include <stdio.h>
 6 | #include "usart.h"
 7 | #include "sdio_sd.h"
 8 | #include "ff.h"
 9 | #include "spi.h"
10 | 
11 | #endif
12 | 
13 | 
14 | 


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/user/stm32f4xx_conf.h:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/user/stm32f4xx_conf.h


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/user/stm32f4xx_it.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    ADC_Interleaved_DMAmode2/stm32f4xx_it.c 
  4 |   * @author  MCD Application Team
  5 |   * @version V1.0.0
  6 |   * @date    19-September-2011
  7 |   * @brief   Main Interrupt Service Routines.
  8 |   *          This file provides template for all exceptions handler and 
  9 |   *          peripherals interrupt service routine.
 10 |   ******************************************************************************
 11 |   * @attention
 12 |   *
 13 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 14 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 15 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 16 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 17 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 18 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 19 |   *
 20 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
 21 |   ******************************************************************************
 22 |   */ 
 23 | 
 24 | /* Includes ------------------------------------------------------------------*/
 25 | #include "stm32f4xx_it.h"
 26 | #include "sdio_sd.h"
 27 | 
 28 | /** @addtogroup STM32F4_Discovery_Peripheral_Examples
 29 |   * @{
 30 |   */
 31 | 
 32 | /** @addtogroup ADC_Interleaved_DMAmode2
 33 |   * @{
 34 |   */ 
 35 |   
 36 | /* Private typedef -----------------------------------------------------------*/
 37 | /* Private define ------------------------------------------------------------*/
 38 | /* Private macro -------------------------------------------------------------*/
 39 | /* Private variables ---------------------------------------------------------*/
 40 | /* Private function prototypes -----------------------------------------------*/
 41 | /* Private functions ---------------------------------------------------------*/
 42 | 
 43 | /******************************************************************************/
 44 | /*            Cortex-M4 Processor Exceptions Handlers                         */
 45 | /******************************************************************************/
 46 | 
 47 | /**
 48 |   * @brief   This function handles NMI exception.
 49 |   * @param  None
 50 |   * @retval None
 51 |   */
 52 | void NMI_Handler(void)
 53 | {
 54 | }
 55 | 
 56 | /**
 57 |   * @brief  This function handles Hard Fault exception.
 58 |   * @param  None
 59 |   * @retval None
 60 |   */
 61 | void HardFault_Handler(void)
 62 | {
 63 |   /* Go to infinite loop when Hard Fault exception occurs */
 64 |   while (1)
 65 |   {
 66 |   }
 67 | }
 68 | 
 69 | /**
 70 |   * @brief  This function handles Memory Manage exception.
 71 |   * @param  None
 72 |   * @retval None
 73 |   */
 74 | void MemManage_Handler(void)
 75 | {
 76 |   /* Go to infinite loop when Memory Manage exception occurs */
 77 |   while (1)
 78 |   {
 79 |   }
 80 | }
 81 | 
 82 | /**
 83 |   * @brief  This function handles Bus Fault exception.
 84 |   * @param  None
 85 |   * @retval None
 86 |   */
 87 | void BusFault_Handler(void)
 88 | {
 89 |   /* Go to infinite loop when Bus Fault exception occurs */
 90 |   while (1)
 91 |   {
 92 |   }
 93 | }
 94 | 
 95 | /**
 96 |   * @brief  This function handles Usage Fault exception.
 97 |   * @param  None
 98 |   * @retval None
 99 |   */
100 | void UsageFault_Handler(void)
101 | {
102 |   /* Go to infinite loop when Usage Fault exception occurs */
103 |   while (1)
104 |   {
105 |   }
106 | }
107 | 
108 | /**
109 |   * @brief  This function handles SVCall exception.
110 |   * @param  None
111 |   * @retval None
112 |   */
113 | void SVC_Handler(void)
114 | {
115 | }
116 | 
117 | /**
118 |   * @brief  This function handles Debug Monitor exception.
119 |   * @param  None
120 |   * @retval None
121 |   */
122 | void DebugMon_Handler(void)
123 | {
124 | }
125 | 
126 | /**
127 |   * @brief  This function handles PendSVC exception.
128 |   * @param  None
129 |   * @retval None
130 |   */
131 | void PendSV_Handler(void)
132 | {
133 | }
134 | 
135 | /**
136 |   * @brief  This function handles SysTick Handler.
137 |   * @param  None
138 |   * @retval None
139 |   */   
140 | unsigned long sysTime = 0;
141 | void SysTick_Handler(void)
142 | {
143 | 	sysTime++;
144 | }
145 | 
146 | void SDIO_IRQHandler(void)
147 | {
148 | 	SD_ProcessIRQSrc();  
149 | }   
150 | void SD_SDIO_DMA_IRQHANDLER(void)
151 | {
152 | 	SD_ProcessDMAIRQ();  
153 | }   
154 | 
155 | /******************************************************************************/
156 | /*                 STM32F4xx Peripherals Interrupt Handlers                   */
157 | /*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
158 | /*  available peripheral interrupt handler's name please refer to the startup */
159 | /*  file (startup_stm32f4xx.s).                                               */
160 | /******************************************************************************/
161 | 
162 | /**
163 |   * @brief  This function handles PPP interrupt request.
164 |   * @param  None
165 |   * @retval None
166 |   */
167 | /*void PPP_IRQHandler(void)
168 | {
169 | }*/
170 | 
171 | /**
172 |   * @}
173 |   */ 
174 | 
175 | /**
176 |   * @}
177 |   */ 
178 | 
179 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
180 | 


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/user/stm32f4xx_it.h:
--------------------------------------------------------------------------------
 1 | //V1.0.0
 2 | #ifndef __STM32F4xx_IT_H
 3 | #define __STM32F4xx_IT_H
 4 | 
 5 | #ifdef __cplusplus
 6 |  extern "C" {
 7 | #endif 
 8 | 
 9 | #include "stm32f4xx.h"
10 | 
11 | void NMI_Handler(void);
12 | void HardFault_Handler(void);
13 | void MemManage_Handler(void);
14 | void BusFault_Handler(void);
15 | void UsageFault_Handler(void);
16 | void SVC_Handler(void);
17 | void DebugMon_Handler(void);
18 | void PendSV_Handler(void);
19 | void SysTick_Handler(void);
20 | 
21 | #ifdef __cplusplus
22 | }
23 | #endif
24 | 
25 | #endif 
26 | 
27 | 


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/webserver/ftp.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/ftp.c


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/webserver/ftp.h:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/ftp.h


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/webserver/ftp_ack.h:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/ftp_ack.h


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/webserver/http.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/http.c


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/webserver/http.h:
--------------------------------------------------------------------------------
 1 | #ifndef __HTTP_H
 2 | #define __HTTP_H
 3 | 
 4 | #include "tcp.h"
 5 | 
 6 | 
 7 | void httpProcess(TCPInfoStruct *info);
 8 | 
 9 | 
10 | #endif
11 | 


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/webserver/http_ack.h:
--------------------------------------------------------------------------------
 1 | #ifndef __HTTP_ACK_H
 2 | #define __HTTP_ACK_H
 3 | 
 4 | const char HTTP_ACK_404[] = "\
 5 | <!DOCTYPE html PUBLIC '-//IETF//DTD HTML 2.0//EN'>\
 6 | <html><head>\
 7 | <meta http-equiv='content-type' content='text/html; charset=windows-1252'>\
 8 | <title>404 Not Found</title>\
 9 | </head><body>\
10 | <h1>Not Found</h1>\
11 | <p>The requested URL was not found on this server.</p>\
12 | </body></html>\
13 | ";
14 | 
15 | 
16 | #endif
17 | 


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/webserver/tcp_ip/enc28j60.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/tcp_ip/enc28j60.c


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/webserver/tcp_ip/enc28j60.h:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/tcp_ip/enc28j60.h


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/webserver/tcp_ip/ip_arp_udp_tcp.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/tcp_ip/ip_arp_udp_tcp.c


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/webserver/tcp_ip/ip_arp_udp_tcp.h:
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 1 | /*********************************************
 2 |  * vim:sw=8:ts=8:si:et
 3 |  * To use the above modeline in vim you must have "set modeline" in your .vimrc
 4 |  * Author: Guido Socher 
 5 |  * Copyright: GPL V2
 6 |  *
 7 |  * IP/ARP/UDP/TCP functions
 8 |  *
 9 |  * Chip type           : ATMEGA88 with ENC28J60
10 |  *********************************************/
11 | 
12 | 
13 | /*********************************************
14 |  * modified: 2007-08-08
15 |  * Author  : awake
16 |  * Copyright: GPL V2
17 |  * http://www.icdev.com.cn/?2213/
18 |  * Host chip: ADUC7026
19 | **********************************************/
20 | 
21 | 
22 | 
23 | //@{
24 | #ifndef IP_ARP_UDP_TCP_H
25 | #define IP_ARP_UDP_TCP_H
26 | 
27 | // you must call this function once before you use any of the other functions:
28 | extern void init_ip_arp_udp_tcp(unsigned char *mymac,unsigned char *myip,unsigned char wwwp);
29 | //
30 | extern unsigned char eth_type_is_arp_and_my_ip(unsigned char *buf,unsigned int len);
31 | extern unsigned char eth_type_is_ip_and_my_ip(unsigned char *buf,unsigned int len);
32 | extern void make_arp_answer_from_request(unsigned char *buf);
33 | extern void make_echo_reply_from_request(unsigned char *buf,unsigned int len);
34 | extern void make_udp_reply_from_request(unsigned char *buf,char *data,unsigned int datalen,unsigned int port);
35 | 
36 | 
37 | extern void make_tcp_synack_from_syn(unsigned char *buf);
38 | extern void init_len_info(unsigned char *buf);
39 | extern unsigned int get_tcp_data_pointer(void);
40 | extern unsigned int fill_tcp_data_p(unsigned char *buf,unsigned int pos, const unsigned char *progmem_s);
41 | extern unsigned int fill_tcp_data(unsigned char *buf,unsigned int pos, const char *s);
42 | extern void make_tcp_ack_from_any(unsigned char *buf);
43 | extern void make_tcp_ack_with_data(unsigned char *buf,unsigned int dlen);
44 | 
45 | 
46 | 
47 | 
48 | #endif /* IP_ARP_UDP_TCP_H */
49 | //@}
50 | 


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/webserver/tcp_ip/net.h:
--------------------------------------------------------------------------------
  1 | /*********************************************
  2 |  * vim:sw=8:ts=8:si:et
  3 |  * To use the above modeline in vim you must have "set modeline" in your .vimrc
  4 |  * Author: Guido Socher 
  5 |  * Copyright: GPL V2
  6 |  *
  7 |  * Based on the net.h file from the AVRlib library by Pascal Stang.
  8 |  * For AVRlib See http://www.procyonengineering.com/
  9 |  * Used with explicit permission of Pascal Stang.
 10 |  *
 11 |  * Chip type           : ATMEGA88 with ENC28J60
 12 |  *********************************************/
 13 | 
 14 | 
 15 | 
 16 | /*********************************************
 17 |  * modified: 2007-08-08
 18 |  * Author  : awake
 19 |  * Copyright: GPL V2
 20 |  * http://www.icdev.com.cn/?2213/
 21 |  * Host chip: ADUC7026
 22 | **********************************************/
 23 | 
 24 | 
 25 | 
 26 | 
 27 | 
 28 | // notation: _P = position of a field
 29 | //           _V = value of a field
 30 | 
 31 | //@{
 32 | 
 33 | #ifndef NET_H
 34 | #define NET_H
 35 | 
 36 | // ******* ETH *******
 37 | #define ETH_HEADER_LEN	14
 38 | // values of certain bytes:
 39 | #define ETHTYPE_ARP_H_V 0x08
 40 | #define ETHTYPE_ARP_L_V 0x06
 41 | #define ETHTYPE_IP_H_V  0x08
 42 | #define ETHTYPE_IP_L_V  0x00
 43 | // byte positions in the ethernet frame:
 44 | //
 45 | // Ethernet type field (2bytes):
 46 | #define ETH_TYPE_H_P 12
 47 | #define ETH_TYPE_L_P 13
 48 | //
 49 | #define ETH_DST_MAC 0
 50 | #define ETH_SRC_MAC 6
 51 | 
 52 | 
 53 | // ******* ARP *******
 54 | #define ETH_ARP_OPCODE_REPLY_H_V 0x0
 55 | #define ETH_ARP_OPCODE_REPLY_L_V 0x02
 56 | //
 57 | #define ETHTYPE_ARP_L_V 0x06
 58 | // arp.dst.ip
 59 | #define ETH_ARP_DST_IP_P 0x26
 60 | // arp.opcode
 61 | #define ETH_ARP_OPCODE_H_P 0x14
 62 | #define ETH_ARP_OPCODE_L_P 0x15
 63 | // arp.src.mac
 64 | #define ETH_ARP_SRC_MAC_P 0x16
 65 | #define ETH_ARP_SRC_IP_P 0x1c
 66 | #define ETH_ARP_DST_MAC_P 0x20
 67 | #define ETH_ARP_DST_IP_P 0x26
 68 | 
 69 | // ******* IP *******
 70 | #define IP_HEADER_LEN	20
 71 | // ip.src
 72 | #define IP_SRC_P 0x1a
 73 | #define IP_DST_P 0x1e
 74 | #define IP_HEADER_LEN_VER_P 0xe
 75 | #define IP_CHECKSUM_P 0x18
 76 | #define IP_TTL_P 0x16
 77 | #define IP_FLAGS_P 0x14
 78 | #define IP_P 0xe
 79 | #define IP_TOTLEN_H_P 0x10
 80 | #define IP_TOTLEN_L_P 0x11
 81 | 
 82 | #define IP_PROTO_P 0x17  
 83 | 
 84 | #define IP_PROTO_ICMP_V 1
 85 | #define IP_PROTO_TCP_V 6
 86 | // 17=0x11
 87 | #define IP_PROTO_UDP_V 17
 88 | // ******* ICMP *******
 89 | #define ICMP_TYPE_ECHOREPLY_V 0
 90 | #define ICMP_TYPE_ECHOREQUEST_V 8
 91 | //
 92 | #define ICMP_TYPE_P 0x22
 93 | #define ICMP_CHECKSUM_P 0x24
 94 | 
 95 | // ******* UDP *******
 96 | #define UDP_HEADER_LEN	8
 97 | //
 98 | #define UDP_SRC_PORT_H_P 0x22
 99 | #define UDP_SRC_PORT_L_P 0x23
100 | #define UDP_DST_PORT_H_P 0x24
101 | #define UDP_DST_PORT_L_P 0x25
102 | //
103 | #define UDP_LEN_H_P 0x26
104 | #define UDP_LEN_L_P 0x27
105 | #define UDP_CHECKSUM_H_P 0x28
106 | #define UDP_CHECKSUM_L_P 0x29
107 | #define UDP_DATA_P 0x2a
108 | 
109 | // ******* TCP *******
110 | #define TCP_SRC_PORT_H_P 0x22
111 | #define TCP_SRC_PORT_L_P 0x23
112 | #define TCP_DST_PORT_H_P 0x24
113 | #define TCP_DST_PORT_L_P 0x25
114 | // the tcp seq number is 4 bytes 0x26-0x29
115 | #define TCP_SEQ_H_P 0x26
116 | #define TCP_SEQACK_H_P 0x2a
117 | // flags: SYN=2
118 | #define TCP_FLAGS_P 0x2f
119 | #define TCP_FLAGS_SYN_V 2
120 | #define TCP_FLAGS_FIN_V 1
121 | #define TCP_FLAGS_PUSH_V 8
122 | #define TCP_FLAGS_SYNACK_V 0x12
123 | #define TCP_FLAGS_ACK_V 0x10
124 | #define TCP_FLAGS_PSHACK_V 0x18
125 | //  plain len without the options:
126 | #define TCP_HEADER_LEN_PLAIN 20
127 | #define TCP_HEADER_LEN_P 0x2e
128 | #define TCP_CHECKSUM_H_P 0x32
129 | #define TCP_CHECKSUM_L_P 0x33
130 | #define TCP_OPTIONS_P 0x36
131 | //
132 | #endif
133 | //@}
134 | 
135 | 


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/webserver/tcp_ip/spi_enc28j60.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/tcp_ip/spi_enc28j60.c


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/webserver/tcp_ip/spi_enc28j60.h:
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 1 | #ifndef __SPI_ENC28J60_H
 2 | #define __SPI_ENC28J60_H
 3 | 
 4 | 
 5 | 
 6 | void SPI_Enc28j60_Init(void);
 7 | unsigned char	SPI1_ReadWrite(unsigned char writedat);
 8 | 
 9 | #endif /* __SPI_ENC28J60_H */
10 | 


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/webserver/tcp_ip/web_server.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/tcp_ip/web_server.c


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/webserver/tcp_ip/web_server.h:
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1 | #ifndef _TCPIP_H
2 | #define _TCPIP_H
3 | 
4 | int Web_Server(void);
5 | 
6 | #endif
7 | 
8 | 
9 | 


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/webserver/webserver.c:
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https://raw.githubusercontent.com/qpalzmqaz123/tiny-tcp-ip-stack/6b1a9a6b220e6cc95049b2b516439e411d8049ab/webserver/webserver.c


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/webserver/webserver.h:
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1 | #ifndef __WEBSERVER_H
2 | #define __WEBSERVER_H
3 | 
4 | void webserver(void);
5 | 
6 | #endif
7 | 


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