├── .gdbinit ├── .gitignore ├── .gitmodules ├── .vscode ├── c_cpp_properties.json └── settings.json ├── Font5x7.c ├── Makefile ├── NANOVNA_STM32_F072 ├── STM32F072xB.icf ├── STM32F072xB.ld ├── board.c ├── board.h ├── board.mk └── flash_config.c ├── README.md ├── adc.c ├── chconf.h ├── doc ├── NanoVNA-H_V3.0_Jul-11-19.pdf ├── NanoVNA-H_V3.1_pcb_back.jpg ├── NanoVNA-H_V3.1_pcb_front.jpg ├── nanovna-blockdiagram.png ├── nanovna-pcb-photo.jpg ├── nanovna-sch.pdf └── nanovna.jpg ├── dsp.c ├── ffconf.h ├── fft.h ├── flash.c ├── halconf.h ├── iar ├── NanoVNA.ewp ├── NanoVNA.eww └── githash_get.bat ├── ili9341.c ├── main.c ├── mcuconf.h ├── nanovna.h ├── numfont20x22.c ├── plot.c ├── prog.sh ├── si5351.c ├── si5351.h ├── tlv320aic3204.c ├── ui.c ├── usbcfg.c └── usbcfg.h /.gdbinit: -------------------------------------------------------------------------------- 1 | target extended-remote :4242 2 | b hard_fault_handler_c 3 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | *~ 2 | .DS_Store 3 | .dep 4 | build* 5 | test 6 | CMSIS 7 | python 8 | *.py 9 | *.ipynb 10 | TAGS 11 | .emacs-dirvars 12 | iar/Debug 13 | iar/Release 14 | iar/settings 15 | iar/githash.h 16 | *.dep 17 | *.ewd 18 | *.ewt -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "ChibiOS"] 2 | path = ChibiOS 3 | url = https://github.com/edy555/ChibiOS.git 4 | branch = I2SFULLDUPLEX 5 | -------------------------------------------------------------------------------- /.vscode/c_cpp_properties.json: -------------------------------------------------------------------------------- 1 | { 2 | "configurations": [ 3 | { 4 | "name": "Mac", 5 | "includePath": [ 6 | "${workspaceFolder}/ChibiOS/os/hal/ports/STM32/**", 7 | "${workspaceFolder}/ChibiOS/os/common/ext/CMSIS/ST/STM32F0xx/**", 8 | "${workspaceFolder}/ChibiOS/os/common/startup/ARMCMx/**", 9 | "${workspaceFolder}/ChibiOS/os/hal/ports/common/ARMCMx/**", 10 | "${workspaceFolder}/**" 11 | ], 12 | "defines": ["STM32F072xB"], 13 | "macFrameworkPath": [], 14 | "compilerPath": "/usr/local/bin/arm-none-eabi-gcc", 15 | "cStandard": "c11", 16 | "cppStandard": "c++17" 17 | } 18 | ], 19 | "version": 4 20 | } -------------------------------------------------------------------------------- /.vscode/settings.json: -------------------------------------------------------------------------------- 1 | { 2 | "C_Cpp.errorSquiggles": "Disabled" 3 | } -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | ############################################################################## 2 | # Build global options 3 | # NOTE: Can be overridden externally. 4 | # 5 | 6 | # Compiler options here. 7 | ifeq ($(USE_OPT),) 8 | USE_OPT = -std=c99 -O2 -fno-inline-small-functions -ggdb -fomit-frame-pointer -falign-functions=16 --specs=nano.specs -fstack-usage -Wno-unused-parameter 9 | endif 10 | 11 | # C specific options here (added to USE_OPT). 12 | ifeq ($(USE_COPT),) 13 | USE_COPT = 14 | endif 15 | 16 | # C++ specific options here (added to USE_OPT). 17 | ifeq ($(USE_CPPOPT),) 18 | USE_CPPOPT = -fno-rtti 19 | endif 20 | 21 | # Enable this if you want the linker to remove unused code and data 22 | ifeq ($(USE_LINK_GC),) 23 | USE_LINK_GC = yes 24 | endif 25 | 26 | # Linker extra options here. 27 | ifeq ($(USE_LDOPT),) 28 | USE_LDOPT = 29 | endif 30 | 31 | # Enable this if you want link time optimizations (LTO) 32 | ifeq ($(USE_LTO),) 33 | USE_LTO = no 34 | endif 35 | 36 | # If enabled, this option allows to compile the application in THUMB mode. 37 | ifeq ($(USE_THUMB),) 38 | USE_THUMB = yes 39 | endif 40 | 41 | # Enable this if you want to see the full log while compiling. 42 | ifeq ($(USE_VERBOSE_COMPILE),) 43 | USE_VERBOSE_COMPILE = no 44 | endif 45 | 46 | # If enabled, this option makes the build process faster by not compiling 47 | # modules not used in the current configuration. 48 | ifeq ($(USE_SMART_BUILD),) 49 | USE_SMART_BUILD = yes 50 | endif 51 | 52 | # 53 | # Build global options 54 | ############################################################################## 55 | 56 | ifeq ($(VERSION),) 57 | VERSION="$(shell git describe --tags)" 58 | endif 59 | 60 | ############################################################################## 61 | # Architecture or project specific options 62 | # 63 | 64 | # Stack size to be allocated to the Cortex-M process stack. This stack is 65 | # the stack used by the main() thread. 66 | ifeq ($(USE_PROCESS_STACKSIZE),) 67 | USE_PROCESS_STACKSIZE = 0x400 68 | endif 69 | 70 | # Stack size to the allocated to the Cortex-M main/exceptions stack. This 71 | # stack is used for processing interrupts and exceptions. 72 | ifeq ($(USE_EXCEPTIONS_STACKSIZE),) 73 | USE_EXCEPTIONS_STACKSIZE = 0x400 74 | endif 75 | 76 | # 77 | # Architecture or project specific options 78 | ############################################################################## 79 | 80 | ############################################################################## 81 | # Project, sources and paths 82 | # 83 | 84 | # Define project name here 85 | PROJECT = ch 86 | 87 | # Imported source files and paths 88 | #CHIBIOS = ../ChibiOS-RT 89 | CHIBIOS = ChibiOS 90 | PROJ = . 91 | # Startup files. 92 | include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk 93 | # HAL-OSAL files (optional). 94 | include $(CHIBIOS)/os/hal/hal.mk 95 | include $(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/platform.mk 96 | #include $(CHIBIOS)/os/hal/boards/ST_STM32F072B_DISCOVERY/board.mk 97 | include NANOVNA_STM32_F072/board.mk 98 | include $(CHIBIOS)/os/hal/osal/rt/osal.mk 99 | # RTOS files (optional). 100 | include $(CHIBIOS)/os/rt/rt.mk 101 | include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk 102 | # Other files (optional). 103 | include $(CHIBIOS)/test/rt/test.mk 104 | include $(CHIBIOS)/os/hal/lib/streams/streams.mk 105 | include $(CHIBIOS)/os/various/shell/shell.mk 106 | 107 | # Define linker script file here 108 | #LDSCRIPT= $(STARTUPLD)/STM32F072xB.ld 109 | LDSCRIPT= NANOVNA_STM32_F072/STM32F072xB.ld 110 | 111 | # C sources that can be compiled in ARM or THUMB mode depending on the global 112 | # setting. 113 | CSRC = $(STARTUPSRC) \ 114 | $(KERNSRC) \ 115 | $(PORTSRC) \ 116 | $(OSALSRC) \ 117 | $(HALSRC) \ 118 | $(PLATFORMSRC) \ 119 | $(BOARDSRC) \ 120 | $(STREAMSSRC) \ 121 | $(SHELLSRC) \ 122 | usbcfg.c \ 123 | main.c si5351.c tlv320aic3204.c dsp.c plot.c ui.c ili9341.c numfont20x22.c Font5x7.c flash.c adc.c 124 | 125 | # $(TESTSRC) \ 126 | 127 | # C++ sources that can be compiled in ARM or THUMB mode depending on the global 128 | # setting. 129 | CPPSRC = 130 | 131 | # C sources to be compiled in ARM mode regardless of the global setting. 132 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 133 | # option that results in lower performance and larger code size. 134 | ACSRC = 135 | 136 | # C++ sources to be compiled in ARM mode regardless of the global setting. 137 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 138 | # option that results in lower performance and larger code size. 139 | ACPPSRC = 140 | 141 | # C sources to be compiled in THUMB mode regardless of the global setting. 142 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 143 | # option that results in lower performance and larger code size. 144 | TCSRC = 145 | 146 | # C sources to be compiled in THUMB mode regardless of the global setting. 147 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 148 | # option that results in lower performance and larger code size. 149 | TCPPSRC = 150 | 151 | # List ASM source files here 152 | ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) 153 | 154 | INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ 155 | $(HALINC) $(PLATFORMINC) $(BOARDINC) \ 156 | $(STREAMSINC) $(SHELLINC) 157 | # $(TESTINC) 158 | 159 | # 160 | # Project, sources and paths 161 | ############################################################################## 162 | 163 | ############################################################################## 164 | # Compiler settings 165 | # 166 | 167 | MCU = cortex-m0 168 | 169 | #TRGT = arm-elf- 170 | TRGT = arm-none-eabi- 171 | CC = $(TRGT)gcc 172 | CPPC = $(TRGT)g++ 173 | # Enable loading with g++ only if you need C++ runtime support. 174 | # NOTE: You can use C++ even without C++ support if you are careful. C++ 175 | # runtime support makes code size explode. 176 | LD = $(TRGT)gcc 177 | #LD = $(TRGT)g++ 178 | CP = $(TRGT)objcopy 179 | AS = $(TRGT)gcc -x assembler-with-cpp 180 | AR = $(TRGT)ar 181 | OD = $(TRGT)objdump 182 | SZ = $(TRGT)size 183 | HEX = $(CP) -O ihex 184 | BIN = $(CP) -O binary 185 | 186 | # ARM-specific options here 187 | AOPT = 188 | 189 | # THUMB-specific options here 190 | TOPT = -mthumb -DTHUMB 191 | 192 | # Define C warning options here 193 | CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes 194 | 195 | # Define C++ warning options here 196 | CPPWARN = -Wall -Wextra -Wundef 197 | 198 | # 199 | # Compiler settings 200 | ############################################################################## 201 | 202 | ############################################################################## 203 | # Start of user section 204 | # 205 | 206 | # List all user C define here, like -D_DEBUG=1 207 | UDEFS = -DSHELL_CMD_TEST_ENABLED=FALSE -DSHELL_CMD_MEM_ENABLED=FALSE -DARM_MATH_CM0 -DM_PI=3.1415926535897932384626433832795 -DVERSION=\"$(VERSION)\" 208 | 209 | # Define ASM defines here 210 | UADEFS = 211 | 212 | # List all user directories here 213 | UINCDIR = 214 | 215 | # List the user directory to look for the libraries here 216 | ULIBDIR = 217 | 218 | # List all user libraries here 219 | ULIBS = -lm 220 | 221 | # 222 | # End of user defines 223 | ############################################################################## 224 | 225 | RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC 226 | include $(RULESPATH)/rules.mk 227 | 228 | flash: build/ch.bin 229 | dfu-util -d 0483:df11 -a 0 -s 0x08000000:leave -D build/ch.bin 230 | 231 | dfu: 232 | -@printf "reset dfu\r" >/dev/cu.usbmodem401 233 | 234 | TAGS: Makefile 235 | @etags *.[ch] NANOVNA_STM32_F072/*.[ch] $(shell find ChibiOS/os/hal/ports/STM32/STM32F0xx ChibiOS/os -name \*.\[ch\] -print) 236 | @ls -l TAGS 237 | 238 | -------------------------------------------------------------------------------- /NANOVNA_STM32_F072/STM32F072xB.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x400; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | /* Size of the IRQ Stack (Main Stack).*/ 17 | define symbol __ICFEDIT_size_irqstack__ = 0x400; 18 | 19 | define symbol __ICFEDIT_flash_page_size__ = 0x800; 20 | 21 | define memory mem with size = 4G; 22 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 23 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 24 | 25 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ {section CSTACK}; 26 | define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ {}; 27 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 28 | define block SYSHEAP with alignment = 8 {section SYSHEAP}; 29 | define block DATABSS with alignment = 8 {readwrite, zeroinit}; 30 | 31 | 32 | define block FLASH_CONFIG_MAIN with alignment = __ICFEDIT_flash_page_size__, size = 0x0800 { readonly section FLASH_CONFIG_MAIN }; 33 | define block FLASH_CONFIG_SAVE0 with alignment = __ICFEDIT_flash_page_size__, size = 0x1800 { readonly section FLASH_CONFIG_SAVE0 }; 34 | define block FLASH_CONFIG_SAVE1 with alignment = __ICFEDIT_flash_page_size__, size = 0x1800 { readonly section FLASH_CONFIG_SAVE1 }; 35 | define block FLASH_CONFIG_SAVE2 with alignment = __ICFEDIT_flash_page_size__, size = 0x1800 { readonly section FLASH_CONFIG_SAVE2 }; 36 | define block FLASH_CONFIG_SAVE3 with alignment = __ICFEDIT_flash_page_size__, size = 0x1800 { readonly section FLASH_CONFIG_SAVE3 }; 37 | define block FLASH_CONFIG_SAVE4 with alignment = __ICFEDIT_flash_page_size__, size = 0x1800 { readonly section FLASH_CONFIG_SAVE4 }; 38 | define block FLASH_CONFIG with fixed order, alignment = __ICFEDIT_flash_page_size__ 39 | { 40 | block FLASH_CONFIG_MAIN, 41 | block FLASH_CONFIG_SAVE0, 42 | block FLASH_CONFIG_SAVE1, 43 | block FLASH_CONFIG_SAVE2, 44 | block FLASH_CONFIG_SAVE3, 45 | block FLASH_CONFIG_SAVE4, 46 | }; 47 | 48 | initialize by copy { readwrite }; 49 | do not initialize { section .noinit }; 50 | 51 | keep { section .intvec }; 52 | 53 | place at address mem:__ICFEDIT_intvec_start__ {section .intvec}; 54 | place in ROM_region {readonly}; 55 | place at start of RAM_region {block IRQSTACK}; 56 | place in RAM_region {block DATABSS, block HEAP}; 57 | place in RAM_region {block SYSHEAP}; 58 | place at end of RAM_region {block CSTACK}; 59 | place at end of ROM_region {block FLASH_CONFIG}; 60 | 61 | export symbol __ICFEDIT_region_RAM_start__; 62 | export symbol __ICFEDIT_region_RAM_end__; -------------------------------------------------------------------------------- /NANOVNA_STM32_F072/STM32F072xB.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /* 18 | * STM32F072xB memory setup. 19 | */ 20 | MEMORY 21 | { 22 | flash0 : org = 0x08000000, len = 96k 23 | flash1 : org = 0x00000000, len = 0 24 | flash2 : org = 0x00000000, len = 0 25 | flash3 : org = 0x00000000, len = 0 26 | flash4 : org = 0x00000000, len = 0 27 | flash5 : org = 0x00000000, len = 0 28 | flash6 : org = 0x00000000, len = 0 29 | flash7 : org = 0x08018000, len = 32k 30 | ram0 : org = 0x20000000, len = 16k 31 | ram1 : org = 0x00000000, len = 0 32 | ram2 : org = 0x00000000, len = 0 33 | ram3 : org = 0x00000000, len = 0 34 | ram4 : org = 0x00000000, len = 0 35 | ram5 : org = 0x00000000, len = 0 36 | ram6 : org = 0x00000000, len = 0 37 | ram7 : org = 0x00000000, len = 0 38 | } 39 | 40 | /* For each data/text section two region are defined, a virtual region 41 | and a load region (_LMA suffix).*/ 42 | 43 | /* Flash region to be used for exception vectors.*/ 44 | REGION_ALIAS("VECTORS_FLASH", flash0); 45 | REGION_ALIAS("VECTORS_FLASH_LMA", flash0); 46 | 47 | /* Flash region to be used for constructors and destructors.*/ 48 | REGION_ALIAS("XTORS_FLASH", flash0); 49 | REGION_ALIAS("XTORS_FLASH_LMA", flash0); 50 | 51 | /* Flash region to be used for code text.*/ 52 | REGION_ALIAS("TEXT_FLASH", flash0); 53 | REGION_ALIAS("TEXT_FLASH_LMA", flash0); 54 | 55 | /* Flash region to be used for read only data.*/ 56 | REGION_ALIAS("RODATA_FLASH", flash0); 57 | REGION_ALIAS("RODATA_FLASH_LMA", flash0); 58 | 59 | /* Flash region to be used for various.*/ 60 | REGION_ALIAS("VARIOUS_FLASH", flash0); 61 | REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); 62 | 63 | /* Flash region to be used for RAM(n) initialization data.*/ 64 | REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); 65 | 66 | /* Flash region to be saved calibration data */ 67 | REGION_ALIAS("CALDATA_FLASH", flash7); 68 | 69 | /* RAM region to be used for Main stack. This stack accommodates the processing 70 | of all exceptions and interrupts.*/ 71 | REGION_ALIAS("MAIN_STACK_RAM", ram0); 72 | 73 | /* RAM region to be used for the process stack. This is the stack used by 74 | the main() function.*/ 75 | REGION_ALIAS("PROCESS_STACK_RAM", ram0); 76 | 77 | /* RAM region to be used for data segment.*/ 78 | REGION_ALIAS("DATA_RAM", ram0); 79 | REGION_ALIAS("DATA_RAM_LMA", flash0); 80 | 81 | /* RAM region to be used for BSS segment.*/ 82 | REGION_ALIAS("BSS_RAM", ram0); 83 | 84 | /* RAM region to be used for the default heap.*/ 85 | REGION_ALIAS("HEAP_RAM", ram0); 86 | 87 | /* Generic rules inclusion.*/ 88 | INCLUDE rules.ld 89 | 90 | SECTIONS 91 | { 92 | .calsave (NOLOAD) : ALIGN(4) 93 | { 94 | *(.calsave) 95 | } > CALDATA_FLASH 96 | } 97 | -------------------------------------------------------------------------------- /NANOVNA_STM32_F072/board.c: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #include "hal.h" 18 | 19 | #if HAL_USE_PAL || defined(__DOXYGEN__) 20 | /** 21 | * @brief PAL setup. 22 | * @details Digital I/O ports static configuration as defined in @p board.h. 23 | * This variable is used by the HAL when initializing the PAL driver. 24 | */ 25 | const PALConfig pal_default_config = { 26 | #if STM32_HAS_GPIOA 27 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, 28 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, 29 | #endif 30 | #if STM32_HAS_GPIOB 31 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, 32 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, 33 | #endif 34 | #if STM32_HAS_GPIOC 35 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, 36 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, 37 | #endif 38 | #if STM32_HAS_GPIOD 39 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, 40 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, 41 | #endif 42 | #if STM32_HAS_GPIOE 43 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, 44 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, 45 | #endif 46 | #if STM32_HAS_GPIOF 47 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, 48 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, 49 | #endif 50 | #if STM32_HAS_GPIOG 51 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, 52 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, 53 | #endif 54 | #if STM32_HAS_GPIOH 55 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, 56 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, 57 | #endif 58 | #if STM32_HAS_GPIOI 59 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, 60 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} 61 | #endif 62 | }; 63 | #endif 64 | 65 | 66 | #if defined(__ICCARM__) 67 | volatile __no_init uint32_t dfu_reset_to_bootloader_magic; 68 | #else 69 | volatile uint32_t dfu_reset_to_bootloader_magic __attribute__((section (".noinit"))); 70 | #endif 71 | 72 | /* 73 | * Early initialization code. 74 | * This initialization must be performed just after stack setup and before 75 | * any other initialization. 76 | */ 77 | void __early_init(void) { 78 | if (dfu_reset_to_bootloader_magic == BOOTLOADER_MAGIC_KEYWORD) { 79 | dfu_reset_to_bootloader_magic = 0; 80 | void (*bootloader)(void) = (void (*)(void)) (*((uint32_t *) SYSMEM_RESET_VECTOR)); 81 | //__set_MSP(*(uint32_t*)0); 82 | __asm volatile ( 83 | "MOVS R1,#0\n\t" 84 | "LDR R1,[R1]\n\t" 85 | "MSR MSP,R1"); 86 | __enable_irq(); 87 | // remap memory. unneeded for F072? 88 | // RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; 89 | // SYSCFG->CFGR1 = 0x01; 90 | bootloader(); 91 | while (1); 92 | } 93 | 94 | //si5351_setup(); 95 | stm32_clock_init(); 96 | } 97 | 98 | /* 99 | * Board-specific initialization code. 100 | */ 101 | void boardInit(void) { 102 | } 103 | -------------------------------------------------------------------------------- /NANOVNA_STM32_F072/board.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #ifndef _BOARD_H_ 18 | #define _BOARD_H_ 19 | 20 | #include 21 | 22 | /* 23 | * Setup for the Strawberry Linux STbee 24 | */ 25 | 26 | /* 27 | * Board identifier. 28 | */ 29 | #define BOARD_NANOVNA_STM32_F072 30 | #define BOARD_NAME "NanoVNA-Q" 31 | 32 | /* 33 | * Board frequencies. 34 | */ 35 | #define STM32_LSECLK 32768 36 | #define STM32_HSECLK 8000000 37 | 38 | #define STM32_HSE_BYPASS 39 | 40 | /* 41 | * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. 42 | */ 43 | #define STM32F072xB 44 | 45 | /* 46 | * DFU mode constants 47 | */ 48 | #define SYSMEM_RESET_VECTOR 0x1fffc804 49 | #define BOOTLOADER_MAGIC_KEYWORD 0xDEADBEEF 50 | 51 | extern volatile uint32_t dfu_reset_to_bootloader_magic; 52 | 53 | 54 | /* 55 | * IO pins assignments 56 | */ 57 | 58 | /* on-board */ 59 | 60 | #define GPIOA_BUTTON 0 61 | #define GPIOA_LEVER1 1 62 | #define GPIOA_LEVER2 2 63 | #define GPIOA_PUSH 3 64 | #define GPIOA_DAC2 5 65 | #define GPIOA_XP 6 66 | #define GPIOA_YP 7 67 | #define GPIOA_MCO 8 68 | #define GPIOA_USB_DISC 10 69 | #define GPIOA_USB_DM 11 70 | #define GPIOA_USB_DP 12 71 | #define GPIOA_JTMS 13 72 | #define GPIOA_JTCK 14 73 | #define GPIOA_LCD_RESET 15 74 | 75 | #define GPIOB_XN 0 76 | #define GPIOB_YN 1 77 | #define GPIOB_SD_GP1 2 78 | #define GPIOB_SPI_SCLK 3 79 | #define GPIOB_SPI_MISO 4 80 | #define GPIOB_SPI_MOSI 5 81 | #define GPIOB_LCD_CS 6 82 | #define GPIOB_LCD_CD 7 83 | #define GPIOB_I2C1_SCL 8 84 | #define GPIOB_I2C1_SDA 9 85 | #define GPIOB_SD_GP2 10 86 | #define GPIOB_SD_CS 11 87 | #define GPIOB_I2S2_WCLK 12 88 | #define GPIOB_I2S2_BCLK 13 89 | #define GPIOB_I2S2_MOSI 15 90 | 91 | #define GPIOC_LED 13 92 | 93 | #define GPIOF_OSC_IN 0 94 | #define GPIOF_OSC_OUT 1 95 | 96 | 97 | /* 98 | * I/O ports initial setup, this configuration is established soon after reset 99 | * in the initialization code. 100 | * Please refer to the STM32 Reference Manual for details. 101 | */ 102 | #define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) 103 | #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) 104 | #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) 105 | #define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) 106 | #define PIN_ODR_LOW(n) (0U << (n)) 107 | #define PIN_ODR_HIGH(n) (1U << (n)) 108 | #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) 109 | #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) 110 | #define PIN_OSPEED_2M(n) (0U << ((n) * 2U)) 111 | #define PIN_OSPEED_25M(n) (1U << ((n) * 2U)) 112 | #define PIN_OSPEED_50M(n) (2U << ((n) * 2U)) 113 | #define PIN_OSPEED_100M(n) (3U << ((n) * 2U)) 114 | #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) 115 | #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) 116 | #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) 117 | #define PIN_AFIO_AF(n, v) ((v##U) << (((n) % 8U) * 4U)) 118 | 119 | /* 120 | * GPIOA setup: 121 | * 122 | * PA8 - MCO (alternate 0). 123 | * PA11 - USB_DM (alternate 14). 124 | * PA12 - USB_DP (alternate 14). 125 | * PA13 - SWDIO (alternate 0). 126 | * PA14 - SWCLK (alternate 0). 127 | */ 128 | #define VAL_GPIOA_MODER (PIN_MODE_INPUT(0U) | \ 129 | PIN_MODE_INPUT(1U) | \ 130 | PIN_MODE_INPUT(2U) | \ 131 | PIN_MODE_INPUT(3U) | \ 132 | PIN_MODE_INPUT(4U) | \ 133 | PIN_MODE_ANALOG(GPIOA_DAC2) | \ 134 | PIN_MODE_ANALOG(GPIOA_XP) | \ 135 | PIN_MODE_ANALOG(GPIOA_YP) | \ 136 | PIN_MODE_ALTERNATE(GPIOA_MCO) | \ 137 | PIN_MODE_INPUT(9U) | \ 138 | PIN_MODE_OUTPUT(GPIOA_USB_DISC) | \ 139 | PIN_MODE_INPUT(GPIOA_USB_DM) | \ 140 | PIN_MODE_INPUT(GPIOA_USB_DP) | \ 141 | PIN_MODE_ALTERNATE(GPIOA_JTMS) | \ 142 | PIN_MODE_ALTERNATE(GPIOA_JTCK) | \ 143 | PIN_MODE_OUTPUT(GPIOA_LCD_RESET)) 144 | #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(0U) | \ 145 | PIN_OTYPE_PUSHPULL(1U) | \ 146 | PIN_OTYPE_PUSHPULL(2U) | \ 147 | PIN_OTYPE_PUSHPULL(3U) | \ 148 | PIN_OTYPE_PUSHPULL(4U) | \ 149 | PIN_OTYPE_PUSHPULL(5U) | \ 150 | PIN_OTYPE_PUSHPULL(6U) | \ 151 | PIN_OTYPE_PUSHPULL(7U) | \ 152 | PIN_OTYPE_PUSHPULL(GPIOA_MCO) | \ 153 | PIN_OTYPE_PUSHPULL(9U) | \ 154 | PIN_OTYPE_PUSHPULL(GPIOA_USB_DISC) | \ 155 | PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \ 156 | PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \ 157 | PIN_OTYPE_PUSHPULL(GPIOA_JTMS) | \ 158 | PIN_OTYPE_PUSHPULL(GPIOA_JTCK) | \ 159 | PIN_OTYPE_PUSHPULL(GPIOA_LCD_RESET)) 160 | #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_2M(0) | \ 161 | PIN_OSPEED_2M(1) | \ 162 | PIN_OSPEED_2M(2) | \ 163 | PIN_OSPEED_2M(3) | \ 164 | PIN_OSPEED_2M(4) | \ 165 | PIN_OSPEED_2M(5) | \ 166 | PIN_OSPEED_2M(6) | \ 167 | PIN_OSPEED_2M(7) | \ 168 | PIN_OSPEED_100M(GPIOA_MCO) | \ 169 | PIN_OSPEED_100M(9) | \ 170 | PIN_OSPEED_100M(10) | \ 171 | PIN_OSPEED_100M(GPIOA_USB_DM) | \ 172 | PIN_OSPEED_100M(GPIOA_USB_DP) | \ 173 | PIN_OSPEED_100M(GPIOA_JTMS) | \ 174 | PIN_OSPEED_100M(GPIOA_JTCK) | \ 175 | PIN_OSPEED_100M(GPIOA_LCD_RESET)) 176 | #define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLDOWN(0) | \ 177 | PIN_PUPDR_PULLDOWN(1) | \ 178 | PIN_PUPDR_PULLDOWN(2) | \ 179 | PIN_PUPDR_PULLDOWN(3) | \ 180 | PIN_PUPDR_PULLUP(4) | \ 181 | PIN_PUPDR_FLOATING(5) | \ 182 | PIN_PUPDR_FLOATING(6) | \ 183 | PIN_PUPDR_FLOATING(7) | \ 184 | PIN_PUPDR_PULLUP(GPIOA_MCO) | \ 185 | PIN_PUPDR_PULLUP(9) | \ 186 | PIN_PUPDR_PULLUP(GPIOA_USB_DISC) | \ 187 | PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \ 188 | PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \ 189 | PIN_PUPDR_PULLDOWN(GPIOA_JTMS) | \ 190 | PIN_PUPDR_PULLDOWN(GPIOA_JTCK) | \ 191 | PIN_PUPDR_PULLDOWN(GPIOA_LCD_RESET)) 192 | #define VAL_GPIOA_ODR (PIN_ODR_HIGH(0) | \ 193 | PIN_ODR_HIGH(1) | \ 194 | PIN_ODR_HIGH(2) | \ 195 | PIN_ODR_HIGH(3) | \ 196 | PIN_ODR_HIGH(4) | \ 197 | PIN_ODR_LOW(5) | \ 198 | PIN_ODR_HIGH(6) | \ 199 | PIN_ODR_HIGH(7) | \ 200 | PIN_ODR_HIGH(GPIOA_MCO) | \ 201 | PIN_ODR_HIGH(9) | \ 202 | PIN_ODR_HIGH(GPIOA_USB_DISC) | \ 203 | PIN_ODR_HIGH(GPIOA_USB_DM) | \ 204 | PIN_ODR_HIGH(GPIOA_USB_DP) | \ 205 | PIN_ODR_HIGH(GPIOA_JTMS) | \ 206 | PIN_ODR_HIGH(GPIOA_JTCK) | \ 207 | PIN_ODR_HIGH(GPIOA_LCD_RESET)) 208 | #define VAL_GPIOA_AFRL (PIN_AFIO_AF(0, 0) | \ 209 | PIN_AFIO_AF(1, 0) | \ 210 | PIN_AFIO_AF(2, 0) | \ 211 | PIN_AFIO_AF(3, 0) | \ 212 | PIN_AFIO_AF(4, 0) | \ 213 | PIN_AFIO_AF(5, 0) | \ 214 | PIN_AFIO_AF(6, 0) | \ 215 | PIN_AFIO_AF(7, 0)) 216 | #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_MCO, 0) | \ 217 | PIN_AFIO_AF(9, 0) | \ 218 | PIN_AFIO_AF(GPIOA_USB_DISC, 0) | \ 219 | PIN_AFIO_AF(GPIOA_USB_DM, 0) | \ 220 | PIN_AFIO_AF(GPIOA_USB_DP, 0) | \ 221 | PIN_AFIO_AF(GPIOA_JTMS, 0) | \ 222 | PIN_AFIO_AF(GPIOA_JTCK, 0) | \ 223 | PIN_AFIO_AF(GPIOA_LCD_RESET, 0)) 224 | 225 | /* 226 | * GPIOB setup: 227 | * 228 | * PB0 - XN analog 229 | * PB1 - YN analog 230 | * PB3 - SPI1_SCLK (alternate 0). 231 | * PB4 - SPI1_MISO (alternate 0). 232 | * PB5 - SPI1_MOSI (alternate 0). 233 | * PB8 - I2C1_SCL (alternate 1). 234 | * PB9 - I2C1_SDA (alternate 1). 235 | * PB12 - I2S2_WCLK (alternate 0). 236 | * PB13 - I2S2_BCLK (alternate 0). 237 | * PB15 - I2S2_MOSI (alternate 0). 238 | */ 239 | #define VAL_GPIOB_MODER (PIN_MODE_ANALOG(GPIOB_XN) | \ 240 | PIN_MODE_ANALOG(GPIOB_YN) | \ 241 | PIN_MODE_OUTPUT(2) | \ 242 | PIN_MODE_ALTERNATE(GPIOB_SPI_SCLK) | \ 243 | PIN_MODE_ALTERNATE(GPIOB_SPI_MISO) | \ 244 | PIN_MODE_ALTERNATE(GPIOB_SPI_MOSI) | \ 245 | PIN_MODE_OUTPUT(6) | \ 246 | PIN_MODE_OUTPUT(7) | \ 247 | PIN_MODE_ALTERNATE(GPIOB_I2C1_SCL) | \ 248 | PIN_MODE_ALTERNATE(GPIOB_I2C1_SDA) | \ 249 | PIN_MODE_OUTPUT(10) | \ 250 | PIN_MODE_OUTPUT(11) | \ 251 | PIN_MODE_ALTERNATE(GPIOB_I2S2_WCLK) | \ 252 | PIN_MODE_ALTERNATE(GPIOB_I2S2_BCLK) | \ 253 | PIN_MODE_ALTERNATE(14) | \ 254 | PIN_MODE_ALTERNATE(GPIOB_I2S2_MOSI)) 255 | #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(0) | \ 256 | PIN_OTYPE_PUSHPULL(1) | \ 257 | PIN_OTYPE_PUSHPULL(2) | \ 258 | PIN_OTYPE_PUSHPULL(3) | \ 259 | PIN_OTYPE_PUSHPULL(4) | \ 260 | PIN_OTYPE_PUSHPULL(5) | \ 261 | PIN_OTYPE_PUSHPULL(6) | \ 262 | PIN_OTYPE_PUSHPULL(7) | \ 263 | PIN_OTYPE_PUSHPULL(GPIOB_I2C1_SCL) | \ 264 | PIN_OTYPE_PUSHPULL(GPIOB_I2C1_SDA) | \ 265 | PIN_OTYPE_PUSHPULL(10) | \ 266 | PIN_OTYPE_PUSHPULL(11) | \ 267 | PIN_OTYPE_PUSHPULL(GPIOB_I2S2_WCLK) | \ 268 | PIN_OTYPE_PUSHPULL(GPIOB_I2S2_BCLK) | \ 269 | PIN_OTYPE_PUSHPULL(14) | \ 270 | PIN_OTYPE_PUSHPULL(GPIOB_I2S2_MOSI)) 271 | #define VAL_GPIOB_OSPEEDR (PIN_PUPDR_FLOATING(GPIOB_XN) | \ 272 | PIN_PUPDR_FLOATING(GPIOB_YN) | \ 273 | PIN_OSPEED_100M(2) | \ 274 | PIN_OSPEED_100M(3) | \ 275 | PIN_OSPEED_100M(4) | \ 276 | PIN_OSPEED_100M(5) | \ 277 | PIN_OSPEED_100M(6) | \ 278 | PIN_OSPEED_100M(7) | \ 279 | PIN_OSPEED_100M(GPIOB_I2C1_SCL) | \ 280 | PIN_OSPEED_100M(GPIOB_I2C1_SDA) | \ 281 | PIN_OSPEED_100M(10) | \ 282 | PIN_OSPEED_100M(11) | \ 283 | PIN_OSPEED_100M(GPIOB_I2S2_WCLK) | \ 284 | PIN_OSPEED_100M(GPIOB_I2S2_BCLK) | \ 285 | PIN_OSPEED_100M(14) | \ 286 | PIN_OSPEED_100M(GPIOB_I2S2_MOSI)) 287 | #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(0) | \ 288 | PIN_PUPDR_PULLUP(1) | \ 289 | PIN_PUPDR_PULLUP(2) | \ 290 | PIN_PUPDR_PULLUP(3) | \ 291 | PIN_PUPDR_PULLUP(4) | \ 292 | PIN_PUPDR_PULLUP(5) | \ 293 | PIN_PUPDR_PULLUP(6) | \ 294 | PIN_PUPDR_PULLUP(7) | \ 295 | PIN_PUPDR_PULLUP(GPIOB_I2C1_SCL) | \ 296 | PIN_PUPDR_PULLUP(GPIOB_I2C1_SDA) | \ 297 | PIN_PUPDR_PULLUP(10) | \ 298 | PIN_PUPDR_PULLUP(11) | \ 299 | PIN_PUPDR_PULLUP(GPIOB_I2S2_WCLK) | \ 300 | PIN_PUPDR_PULLUP(GPIOB_I2S2_BCLK) | \ 301 | PIN_PUPDR_PULLUP(14) | \ 302 | PIN_PUPDR_PULLUP(GPIOB_I2S2_MOSI)) 303 | #define VAL_GPIOB_ODR (PIN_ODR_HIGH(0) | \ 304 | PIN_ODR_HIGH(1) | \ 305 | PIN_ODR_HIGH(2) | \ 306 | PIN_ODR_HIGH(3) | \ 307 | PIN_ODR_HIGH(4) | \ 308 | PIN_ODR_HIGH(5) | \ 309 | PIN_ODR_HIGH(6) | \ 310 | PIN_ODR_HIGH(7) | \ 311 | PIN_ODR_HIGH(GPIOB_I2C1_SCL) | \ 312 | PIN_ODR_HIGH(GPIOB_I2C1_SDA) | \ 313 | PIN_ODR_HIGH(10) | \ 314 | PIN_ODR_HIGH(11) | \ 315 | PIN_ODR_HIGH(GPIOB_I2S2_WCLK) | \ 316 | PIN_ODR_HIGH(GPIOB_I2S2_BCLK) | \ 317 | PIN_ODR_HIGH(14) | \ 318 | PIN_ODR_HIGH(GPIOB_I2S2_MOSI)) 319 | #define VAL_GPIOB_AFRL (PIN_AFIO_AF(0, 0) | \ 320 | PIN_AFIO_AF(1, 0) | \ 321 | PIN_AFIO_AF(2, 0) | \ 322 | PIN_AFIO_AF(GPIOB_SPI_SCLK, 0) | \ 323 | PIN_AFIO_AF(GPIOB_SPI_MOSI, 0) | \ 324 | PIN_AFIO_AF(GPIOB_SPI_MISO, 0) | \ 325 | PIN_AFIO_AF(6, 0) | \ 326 | PIN_AFIO_AF(7, 0)) 327 | #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_I2C1_SCL, 1) | \ 328 | PIN_AFIO_AF(GPIOB_I2C1_SDA, 1) | \ 329 | PIN_AFIO_AF(10, 0) | \ 330 | PIN_AFIO_AF(11, 0) | \ 331 | PIN_AFIO_AF(GPIOB_I2S2_WCLK, 0) | \ 332 | PIN_AFIO_AF(GPIOB_I2S2_BCLK, 0) | \ 333 | PIN_AFIO_AF(14, 0) | \ 334 | PIN_AFIO_AF(GPIOB_I2S2_MOSI, 0)) 335 | /* 336 | * GPIOC setup: 337 | * 338 | * PC13 - LED (output pushpull maximum). 339 | * PC14 - USB DISC (output pushpull maximum). 340 | */ 341 | #define VAL_GPIOC_MODER (PIN_MODE_INPUT(0) | \ 342 | PIN_MODE_INPUT(1) | \ 343 | PIN_MODE_INPUT(2) | \ 344 | PIN_MODE_INPUT(3) | \ 345 | PIN_MODE_INPUT(4) | \ 346 | PIN_MODE_INPUT(5) | \ 347 | PIN_MODE_INPUT(6) | \ 348 | PIN_MODE_INPUT(7) | \ 349 | PIN_MODE_INPUT(8) | \ 350 | PIN_MODE_INPUT(9) | \ 351 | PIN_MODE_INPUT(10) | \ 352 | PIN_MODE_INPUT(11) | \ 353 | PIN_MODE_INPUT(12) | \ 354 | PIN_MODE_OUTPUT(GPIOC_LED) | \ 355 | PIN_MODE_INPUT(14) | \ 356 | PIN_MODE_INPUT(15)) 357 | #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(0) | \ 358 | PIN_OTYPE_PUSHPULL(1) | \ 359 | PIN_OTYPE_PUSHPULL(2) | \ 360 | PIN_OTYPE_PUSHPULL(3) | \ 361 | PIN_OTYPE_PUSHPULL(4) | \ 362 | PIN_OTYPE_PUSHPULL(5) | \ 363 | PIN_OTYPE_PUSHPULL(6) | \ 364 | PIN_OTYPE_PUSHPULL(7) | \ 365 | PIN_OTYPE_PUSHPULL(8) | \ 366 | PIN_OTYPE_PUSHPULL(9) | \ 367 | PIN_OTYPE_PUSHPULL(10) | \ 368 | PIN_OTYPE_PUSHPULL(11) | \ 369 | PIN_OTYPE_PUSHPULL(12) | \ 370 | PIN_OTYPE_PUSHPULL(GPIOC_LED) | \ 371 | PIN_OTYPE_PUSHPULL(14) | \ 372 | PIN_OTYPE_PUSHPULL(15)) 373 | #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(0) | \ 374 | PIN_OSPEED_100M(1) | \ 375 | PIN_OSPEED_100M(2) | \ 376 | PIN_OSPEED_100M(3) | \ 377 | PIN_OSPEED_100M(4) | \ 378 | PIN_OSPEED_100M(5) | \ 379 | PIN_OSPEED_100M(6) | \ 380 | PIN_OSPEED_100M(7) | \ 381 | PIN_OSPEED_100M(8) | \ 382 | PIN_OSPEED_100M(9) | \ 383 | PIN_OSPEED_100M(10) | \ 384 | PIN_OSPEED_100M(11) | \ 385 | PIN_OSPEED_100M(12) | \ 386 | PIN_OSPEED_100M(GPIOC_LED) | \ 387 | PIN_OSPEED_100M(14) | \ 388 | PIN_OSPEED_100M(15)) 389 | #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(0) | \ 390 | PIN_PUPDR_PULLUP(1) | \ 391 | PIN_PUPDR_PULLUP(2) | \ 392 | PIN_PUPDR_PULLUP(3) | \ 393 | PIN_PUPDR_PULLUP(4) | \ 394 | PIN_PUPDR_PULLUP(5) | \ 395 | PIN_PUPDR_PULLUP(6) | \ 396 | PIN_PUPDR_PULLUP(7) | \ 397 | PIN_PUPDR_PULLUP(8) | \ 398 | PIN_PUPDR_PULLUP(9) | \ 399 | PIN_PUPDR_PULLUP(10) | \ 400 | PIN_PUPDR_PULLUP(11) | \ 401 | PIN_PUPDR_PULLUP(12) | \ 402 | PIN_PUPDR_FLOATING(GPIOC_LED) | \ 403 | PIN_PUPDR_FLOATING(14) | \ 404 | PIN_PUPDR_PULLUP(15)) 405 | #define VAL_GPIOC_ODR (PIN_ODR_HIGH(0) | \ 406 | PIN_ODR_HIGH(1) | \ 407 | PIN_ODR_HIGH(2) | \ 408 | PIN_ODR_HIGH(3) | \ 409 | PIN_ODR_HIGH(4) | \ 410 | PIN_ODR_HIGH(5) | \ 411 | PIN_ODR_HIGH(6) | \ 412 | PIN_ODR_HIGH(7) | \ 413 | PIN_ODR_HIGH(8) | \ 414 | PIN_ODR_HIGH(9) | \ 415 | PIN_ODR_HIGH(10) | \ 416 | PIN_ODR_HIGH(11) | \ 417 | PIN_ODR_HIGH(12) | \ 418 | PIN_ODR_HIGH(GPIOC_LED) | \ 419 | PIN_ODR_HIGH(14) | \ 420 | PIN_ODR_HIGH(15)) 421 | #define VAL_GPIOC_AFRL (PIN_AFIO_AF(0, 0) | \ 422 | PIN_AFIO_AF(1, 0) | \ 423 | PIN_AFIO_AF(2, 0) | \ 424 | PIN_AFIO_AF(3, 0) | \ 425 | PIN_AFIO_AF(4, 0) | \ 426 | PIN_AFIO_AF(5, 0) | \ 427 | PIN_AFIO_AF(6, 0) | \ 428 | PIN_AFIO_AF(7, 0)) 429 | #define VAL_GPIOC_AFRH (PIN_AFIO_AF(8, 0) | \ 430 | PIN_AFIO_AF(9, 0) | \ 431 | PIN_AFIO_AF(10, 0) | \ 432 | PIN_AFIO_AF(11, 0) | \ 433 | PIN_AFIO_AF(12, 0) | \ 434 | PIN_AFIO_AF(GPIOC_LED, 0) | \ 435 | PIN_AFIO_AF(14, 0) | \ 436 | PIN_AFIO_AF(15, 0)) 437 | 438 | /* 439 | * GPIOD setup: 440 | */ 441 | #define VAL_GPIOD_MODER (PIN_MODE_INPUT(0) | \ 442 | PIN_MODE_INPUT(1) | \ 443 | PIN_MODE_INPUT(2) | \ 444 | PIN_MODE_INPUT(3) | \ 445 | PIN_MODE_INPUT(4) | \ 446 | PIN_MODE_INPUT(5) | \ 447 | PIN_MODE_INPUT(6) | \ 448 | PIN_MODE_INPUT(7) | \ 449 | PIN_MODE_INPUT(8) | \ 450 | PIN_MODE_INPUT(9) | \ 451 | PIN_MODE_INPUT(10) | \ 452 | PIN_MODE_INPUT(11) | \ 453 | PIN_MODE_INPUT(12) | \ 454 | PIN_MODE_INPUT(13) | \ 455 | PIN_MODE_INPUT(14) | \ 456 | PIN_MODE_INPUT(15)) 457 | #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(0) | \ 458 | PIN_OTYPE_PUSHPULL(1) | \ 459 | PIN_OTYPE_PUSHPULL(2) | \ 460 | PIN_OTYPE_PUSHPULL(3) | \ 461 | PIN_OTYPE_PUSHPULL(4) | \ 462 | PIN_OTYPE_PUSHPULL(5) | \ 463 | PIN_OTYPE_PUSHPULL(6) | \ 464 | PIN_OTYPE_PUSHPULL(7) | \ 465 | PIN_OTYPE_PUSHPULL(8) | \ 466 | PIN_OTYPE_PUSHPULL(9) | \ 467 | PIN_OTYPE_PUSHPULL(10) | \ 468 | PIN_OTYPE_PUSHPULL(11) | \ 469 | PIN_OTYPE_PUSHPULL(12) | \ 470 | PIN_OTYPE_PUSHPULL(13) | \ 471 | PIN_OTYPE_PUSHPULL(14) | \ 472 | PIN_OTYPE_PUSHPULL(15)) 473 | #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(0) | \ 474 | PIN_OSPEED_100M(1) | \ 475 | PIN_OSPEED_100M(2) | \ 476 | PIN_OSPEED_100M(3) | \ 477 | PIN_OSPEED_100M(4) | \ 478 | PIN_OSPEED_100M(5) | \ 479 | PIN_OSPEED_100M(6) | \ 480 | PIN_OSPEED_100M(7) | \ 481 | PIN_OSPEED_100M(8) | \ 482 | PIN_OSPEED_100M(9) | \ 483 | PIN_OSPEED_100M(10) | \ 484 | PIN_OSPEED_100M(11) | \ 485 | PIN_OSPEED_100M(12) | \ 486 | PIN_OSPEED_100M(13) | \ 487 | PIN_OSPEED_100M(14) | \ 488 | PIN_OSPEED_100M(15)) 489 | #define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(0) | \ 490 | PIN_PUPDR_PULLUP(1) | \ 491 | PIN_PUPDR_PULLUP(2) | \ 492 | PIN_PUPDR_PULLUP(3) | \ 493 | PIN_PUPDR_PULLUP(4) | \ 494 | PIN_PUPDR_PULLUP(5) | \ 495 | PIN_PUPDR_PULLUP(6) | \ 496 | PIN_PUPDR_PULLUP(7) | \ 497 | PIN_PUPDR_PULLUP(8) | \ 498 | PIN_PUPDR_PULLUP(9) | \ 499 | PIN_PUPDR_PULLUP(10) | \ 500 | PIN_PUPDR_PULLUP(11) | \ 501 | PIN_PUPDR_PULLUP(12) | \ 502 | PIN_PUPDR_PULLUP(13) | \ 503 | PIN_PUPDR_PULLUP(14) | \ 504 | PIN_PUPDR_PULLUP(15)) 505 | #define VAL_GPIOD_ODR (PIN_ODR_HIGH(0) | \ 506 | PIN_ODR_HIGH(1) | \ 507 | PIN_ODR_HIGH(2) | \ 508 | PIN_ODR_HIGH(3) | \ 509 | PIN_ODR_HIGH(4) | \ 510 | PIN_ODR_HIGH(5) | \ 511 | PIN_ODR_HIGH(6) | \ 512 | PIN_ODR_HIGH(7) | \ 513 | PIN_ODR_HIGH(8) | \ 514 | PIN_ODR_HIGH(9) | \ 515 | PIN_ODR_HIGH(10) | \ 516 | PIN_ODR_HIGH(11) | \ 517 | PIN_ODR_HIGH(12) | \ 518 | PIN_ODR_HIGH(13) | \ 519 | PIN_ODR_HIGH(14) | \ 520 | PIN_ODR_HIGH(15)) 521 | #define VAL_GPIOD_AFRL (PIN_AFIO_AF(0, 0) | \ 522 | PIN_AFIO_AF(1, 0) | \ 523 | PIN_AFIO_AF(2, 0) | \ 524 | PIN_AFIO_AF(3, 0) | \ 525 | PIN_AFIO_AF(4, 0) | \ 526 | PIN_AFIO_AF(5, 0) | \ 527 | PIN_AFIO_AF(6, 0) | \ 528 | PIN_AFIO_AF(7, 0)) 529 | #define VAL_GPIOD_AFRH (PIN_AFIO_AF(8, 0) | \ 530 | PIN_AFIO_AF(9, 0) | \ 531 | PIN_AFIO_AF(10, 0) | \ 532 | PIN_AFIO_AF(11, 0) | \ 533 | PIN_AFIO_AF(12, 0) | \ 534 | PIN_AFIO_AF(13, 0) | \ 535 | PIN_AFIO_AF(14, 0) | \ 536 | PIN_AFIO_AF(15, 0)) 537 | 538 | /* 539 | * GPIOE setup: 540 | * 541 | * PE0 - PIN0 (input pullup). 542 | * PE1 - PIN1 (input pullup). 543 | * PE2 - PIN2 (input floating). 544 | * PE3 - PIN3 (input pullup). 545 | * PE4 - PIN4 (input floating). 546 | * PE5 - PIN5 (input floating). 547 | * PE6 - PIN6 (input floating). 548 | * PE7 - PIN7 (input floating). 549 | * PE8 - PIN8 (input floating). 550 | * PE9 - PIN9 (input floating). 551 | * PE10 - PIN10 (input floating). 552 | * PE11 - PIN11 (input floating). 553 | * PE12 - PIN12 (input floating). 554 | * PE13 - PIN13 (input floating). 555 | * PE14 - PIN14 (input floating). 556 | * PE15 - PIN15 (input floating). 557 | */ 558 | #define VAL_GPIOE_MODER (PIN_MODE_INPUT(0) | \ 559 | PIN_MODE_INPUT(1) | \ 560 | PIN_MODE_INPUT(2) | \ 561 | PIN_MODE_INPUT(3) | \ 562 | PIN_MODE_INPUT(4) | \ 563 | PIN_MODE_INPUT(5) | \ 564 | PIN_MODE_INPUT(6) | \ 565 | PIN_MODE_INPUT(7) | \ 566 | PIN_MODE_INPUT(8) | \ 567 | PIN_MODE_INPUT(9) | \ 568 | PIN_MODE_INPUT(10) | \ 569 | PIN_MODE_INPUT(11) | \ 570 | PIN_MODE_INPUT(12) | \ 571 | PIN_MODE_INPUT(13) | \ 572 | PIN_MODE_INPUT(14) | \ 573 | PIN_MODE_INPUT(15)) 574 | #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(0) | \ 575 | PIN_OTYPE_PUSHPULL(1) | \ 576 | PIN_OTYPE_PUSHPULL(2) | \ 577 | PIN_OTYPE_PUSHPULL(3) | \ 578 | PIN_OTYPE_PUSHPULL(4) | \ 579 | PIN_OTYPE_PUSHPULL(5) | \ 580 | PIN_OTYPE_PUSHPULL(6) | \ 581 | PIN_OTYPE_PUSHPULL(7) | \ 582 | PIN_OTYPE_PUSHPULL(8) | \ 583 | PIN_OTYPE_PUSHPULL(9) | \ 584 | PIN_OTYPE_PUSHPULL(10) | \ 585 | PIN_OTYPE_PUSHPULL(11) | \ 586 | PIN_OTYPE_PUSHPULL(12) | \ 587 | PIN_OTYPE_PUSHPULL(13) | \ 588 | PIN_OTYPE_PUSHPULL(14) | \ 589 | PIN_OTYPE_PUSHPULL(15)) 590 | #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(0) | \ 591 | PIN_OSPEED_100M(1) | \ 592 | PIN_OSPEED_100M(2) | \ 593 | PIN_OSPEED_100M(3) | \ 594 | PIN_OSPEED_100M(4) | \ 595 | PIN_OSPEED_100M(5) | \ 596 | PIN_OSPEED_100M(6) | \ 597 | PIN_OSPEED_100M(7) | \ 598 | PIN_OSPEED_100M(8) | \ 599 | PIN_OSPEED_100M(9) | \ 600 | PIN_OSPEED_100M(10) | \ 601 | PIN_OSPEED_100M(11) | \ 602 | PIN_OSPEED_100M(12) | \ 603 | PIN_OSPEED_100M(13) | \ 604 | PIN_OSPEED_100M(14) | \ 605 | PIN_OSPEED_100M(15)) 606 | #define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(0) | \ 607 | PIN_PUPDR_PULLUP(1) | \ 608 | PIN_PUPDR_FLOATING(2) | \ 609 | PIN_PUPDR_PULLUP(3) | \ 610 | PIN_PUPDR_FLOATING(4) | \ 611 | PIN_PUPDR_FLOATING(5) | \ 612 | PIN_PUPDR_FLOATING(6) | \ 613 | PIN_PUPDR_FLOATING(7) | \ 614 | PIN_PUPDR_FLOATING(8) | \ 615 | PIN_PUPDR_FLOATING(9) | \ 616 | PIN_PUPDR_FLOATING(10) | \ 617 | PIN_PUPDR_FLOATING(11) | \ 618 | PIN_PUPDR_FLOATING(12) | \ 619 | PIN_PUPDR_FLOATING(13) | \ 620 | PIN_PUPDR_FLOATING(14) | \ 621 | PIN_PUPDR_FLOATING(15)) 622 | #define VAL_GPIOE_ODR (PIN_ODR_HIGH(0) | \ 623 | PIN_ODR_HIGH(1) | \ 624 | PIN_ODR_HIGH(2) | \ 625 | PIN_ODR_HIGH(3) | \ 626 | PIN_ODR_HIGH(4) | \ 627 | PIN_ODR_HIGH(5) | \ 628 | PIN_ODR_HIGH(6) | \ 629 | PIN_ODR_HIGH(7) | \ 630 | PIN_ODR_HIGH(8) | \ 631 | PIN_ODR_HIGH(9) | \ 632 | PIN_ODR_HIGH(10) | \ 633 | PIN_ODR_HIGH(11) | \ 634 | PIN_ODR_HIGH(12) | \ 635 | PIN_ODR_HIGH(13) | \ 636 | PIN_ODR_HIGH(14) | \ 637 | PIN_ODR_HIGH(15)) 638 | #define VAL_GPIOE_AFRL (PIN_AFIO_AF(0, 0) | \ 639 | PIN_AFIO_AF(1, 0) | \ 640 | PIN_AFIO_AF(2, 0) | \ 641 | PIN_AFIO_AF(3, 0) | \ 642 | PIN_AFIO_AF(4, 0) | \ 643 | PIN_AFIO_AF(5, 0) | \ 644 | PIN_AFIO_AF(6, 0) | \ 645 | PIN_AFIO_AF(7, 0)) 646 | #define VAL_GPIOE_AFRH (PIN_AFIO_AF(8, 0) | \ 647 | PIN_AFIO_AF(9, 0) | \ 648 | PIN_AFIO_AF(10, 0) | \ 649 | PIN_AFIO_AF(11, 0) | \ 650 | PIN_AFIO_AF(12, 0) | \ 651 | PIN_AFIO_AF(13, 0) | \ 652 | PIN_AFIO_AF(14, 0) | \ 653 | PIN_AFIO_AF(15, 0)) 654 | 655 | /* 656 | * GPIOF setup: 657 | * 658 | */ 659 | #define VAL_GPIOF_MODER (PIN_MODE_INPUT(0) | \ 660 | PIN_MODE_INPUT(1) | \ 661 | PIN_MODE_INPUT(2) | \ 662 | PIN_MODE_INPUT(3) | \ 663 | PIN_MODE_INPUT(4) | \ 664 | PIN_MODE_INPUT(5) | \ 665 | PIN_MODE_INPUT(6) | \ 666 | PIN_MODE_INPUT(7) | \ 667 | PIN_MODE_INPUT(8) | \ 668 | PIN_MODE_INPUT(9) | \ 669 | PIN_MODE_INPUT(10) | \ 670 | PIN_MODE_INPUT(11) | \ 671 | PIN_MODE_INPUT(12) | \ 672 | PIN_MODE_INPUT(13) | \ 673 | PIN_MODE_INPUT(14) | \ 674 | PIN_MODE_INPUT(15)) 675 | #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(0) | \ 676 | PIN_OTYPE_PUSHPULL(1) | \ 677 | PIN_OTYPE_PUSHPULL(2) | \ 678 | PIN_OTYPE_PUSHPULL(3) | \ 679 | PIN_OTYPE_PUSHPULL(4) | \ 680 | PIN_OTYPE_PUSHPULL(5) | \ 681 | PIN_OTYPE_PUSHPULL(6) | \ 682 | PIN_OTYPE_PUSHPULL(7) | \ 683 | PIN_OTYPE_PUSHPULL(8) | \ 684 | PIN_OTYPE_PUSHPULL(9) | \ 685 | PIN_OTYPE_PUSHPULL(10) | \ 686 | PIN_OTYPE_PUSHPULL(11) | \ 687 | PIN_OTYPE_PUSHPULL(12) | \ 688 | PIN_OTYPE_PUSHPULL(13) | \ 689 | PIN_OTYPE_PUSHPULL(14) | \ 690 | PIN_OTYPE_PUSHPULL(15)) 691 | #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_100M(0) | \ 692 | PIN_OSPEED_100M(1) | \ 693 | PIN_OSPEED_100M(2) | \ 694 | PIN_OSPEED_100M(3) | \ 695 | PIN_OSPEED_100M(4) | \ 696 | PIN_OSPEED_100M(5) | \ 697 | PIN_OSPEED_100M(6) | \ 698 | PIN_OSPEED_100M(7) | \ 699 | PIN_OSPEED_100M(8) | \ 700 | PIN_OSPEED_100M(9) | \ 701 | PIN_OSPEED_100M(10) | \ 702 | PIN_OSPEED_100M(11) | \ 703 | PIN_OSPEED_100M(12) | \ 704 | PIN_OSPEED_100M(13) | \ 705 | PIN_OSPEED_100M(14) | \ 706 | PIN_OSPEED_100M(15)) 707 | #define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(0) | \ 708 | PIN_PUPDR_FLOATING(1) | \ 709 | PIN_PUPDR_FLOATING(2) | \ 710 | PIN_PUPDR_FLOATING(3) | \ 711 | PIN_PUPDR_FLOATING(4) | \ 712 | PIN_PUPDR_FLOATING(5) | \ 713 | PIN_PUPDR_FLOATING(6) | \ 714 | PIN_PUPDR_FLOATING(7) | \ 715 | PIN_PUPDR_FLOATING(8) | \ 716 | PIN_PUPDR_FLOATING(9) | \ 717 | PIN_PUPDR_FLOATING(10) | \ 718 | PIN_PUPDR_FLOATING(11) | \ 719 | PIN_PUPDR_FLOATING(12) | \ 720 | PIN_PUPDR_FLOATING(13) | \ 721 | PIN_PUPDR_FLOATING(14) | \ 722 | PIN_PUPDR_FLOATING(15)) 723 | #define VAL_GPIOF_ODR (PIN_ODR_HIGH(0) | \ 724 | PIN_ODR_HIGH(1) | \ 725 | PIN_ODR_HIGH(2) | \ 726 | PIN_ODR_HIGH(3) | \ 727 | PIN_ODR_HIGH(4) | \ 728 | PIN_ODR_HIGH(5) | \ 729 | PIN_ODR_HIGH(6) | \ 730 | PIN_ODR_HIGH(7) | \ 731 | PIN_ODR_HIGH(8) | \ 732 | PIN_ODR_HIGH(9) | \ 733 | PIN_ODR_HIGH(10) | \ 734 | PIN_ODR_HIGH(11) | \ 735 | PIN_ODR_HIGH(12) | \ 736 | PIN_ODR_HIGH(13) | \ 737 | PIN_ODR_HIGH(14) | \ 738 | PIN_ODR_HIGH(15)) 739 | #define VAL_GPIOF_AFRL (PIN_AFIO_AF(0, 0) | \ 740 | PIN_AFIO_AF(1, 0) | \ 741 | PIN_AFIO_AF(2, 0) | \ 742 | PIN_AFIO_AF(3, 0) | \ 743 | PIN_AFIO_AF(4, 0) | \ 744 | PIN_AFIO_AF(5, 0) | \ 745 | PIN_AFIO_AF(6, 0) | \ 746 | PIN_AFIO_AF(7, 0)) 747 | #define VAL_GPIOF_AFRH (PIN_AFIO_AF(8, 0) | \ 748 | PIN_AFIO_AF(9, 0) | \ 749 | PIN_AFIO_AF(10, 0) | \ 750 | PIN_AFIO_AF(11, 0) | \ 751 | PIN_AFIO_AF(12, 0) | \ 752 | PIN_AFIO_AF(13, 0) | \ 753 | PIN_AFIO_AF(14, 0) | \ 754 | PIN_AFIO_AF(15, 0)) 755 | 756 | #if !defined(_FROM_ASM_) 757 | #ifdef __cplusplus 758 | extern "C" { 759 | #endif 760 | void boardInit(void); 761 | #ifdef __cplusplus 762 | } 763 | #endif 764 | #endif /* _FROM_ASM_ */ 765 | 766 | #endif /* _BOARD_H_ */ 767 | -------------------------------------------------------------------------------- /NANOVNA_STM32_F072/board.mk: -------------------------------------------------------------------------------- 1 | # List of all the board related files. 2 | #BOARDSRC = ${CHIBIOS}/os/hal/boards/NANOSDR_STM32_F303/board.c 3 | BOARDSRC = ${PROJ}/NANOVNA_STM32_F072/board.c 4 | 5 | # Required include directories 6 | #BOARDINC = ${CHIBIOS}/os/hal/boards/NANOSDR_STM32_F303 7 | BOARDINC = ${PROJ}/NANOVNA_STM32_F072 8 | -------------------------------------------------------------------------------- /NANOVNA_STM32_F072/flash_config.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "nanovna.h" 3 | 4 | #if defined(__ICCARM__) 5 | 6 | #pragma section = "FLASH_CONFIG" 7 | const size_t __flash_config_size_block = __section_size("FLASH_CONFIG"); 8 | const size_t __flash_config_size_page = 0x800; 9 | __root __no_init const config_t __flash_config_main @ "FLASH_CONFIG_MAIN"; 10 | __root __no_init const properties_t __flash_config_save0 @ "FLASH_CONFIG_SAVE0"; 11 | __root __no_init const properties_t __flash_config_save1 @ "FLASH_CONFIG_SAVE1"; 12 | __root __no_init const properties_t __flash_config_save2 @ "FLASH_CONFIG_SAVE2"; 13 | __root __no_init const properties_t __flash_config_save3 @ "FLASH_CONFIG_SAVE3"; 14 | __root __no_init const properties_t __flash_config_save4 @ "FLASH_CONFIG_SAVE4"; 15 | 16 | 17 | #elif defined(__GNUC__) || defined(__DOXYGEN__) 18 | 19 | #warning ****************** NOT IMPLEMENTED YET! ******************************* 20 | const size_t __flash_config_size_block = 0x8000; 21 | const size_t __flash_config_size_page = 0x800; 22 | const config_t __flash_config_main __attribute__((section("FLASH_CONFIG_MAIN"))); 23 | const properties_t __flash_config_save0 __attribute__((section("FLASH_CONFIG_SAVE0"))); 24 | const properties_t __flash_config_save1 __attribute__((section("FLASH_CONFIG_SAVE1"))); 25 | const properties_t __flash_config_save2 __attribute__((section("FLASH_CONFIG_SAVE2"))); 26 | const properties_t __flash_config_save3 __attribute__((section("FLASH_CONFIG_SAVE3"))); 27 | const properties_t __flash_config_save4 __attribute__((section("FLASH_CONFIG_SAVE4"))); 28 | 29 | #else 30 | 31 | #warning ****************** NOT IMPLEMENTED YET! ******************************* 32 | const size_t __flash_config_size_block = 0x8000; 33 | const size_t __flash_config_size_page = 0x800; 34 | const config_t __flash_config_main @ 0x08018000; 35 | const properties_t __flash_config_save0 @ 0x08018800; 36 | const properties_t __flash_config_save1 @ 0x0801a000; 37 | const properties_t __flash_config_save2 @ 0x0801b800; 38 | const properties_t __flash_config_save3 @ 0x0801d000; 39 | const properties_t __flash_config_save4 @ 0x0801e800; 40 | 41 | #endif 42 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | NanoVNA-Q - Stable firmware for NanoVNA 2 | ========================================================== 3 | 4 | [![GitHub release](https://img.shields.io/github/v/release/qrp73/NanoVNA-Q.svg?style=flat)][release] 5 | 6 | [release]: https://github.com/qrp73/NanoVNA-Q/releases 7 | 8 |
9 | 10 |
11 | 12 | # About 13 | 14 | NanoVNA-Q is firmware for NanoVNA vector network analyzer. 15 | 16 | Original NanoVNA firmware and hardware was developed by @edy555 and it's source code can be found here: https://github.com/ttrftech/NanoVNA 17 | 18 | Later, @hugen79 introduced a new PCB (NanoVNA-H) and improvements for firmware and device become very popular. @hugen79 project can be found here: https://github.com/hugen79/NanoVNA-H 19 | 20 | NanoVNA-Q is based on @edy555 code, includes improvements from @hugen79 and is targeted for NanoVNA-H hardware. 21 | 22 | The main goal of this project is to fix bugs, improve stability, measurement quality and usability. 23 | 24 | 25 | The main differences with original firmware: 26 | - added impedance label for current marker 27 | - improved noise floor, imbalance gain, measurement quality and data transfer to PC 28 | - added scanraw command (allows to read raw gamma data for unlimited point count with no calibration apply) 29 | - added color command (allows to customize trace colors) 30 | - fixed frequency rounding issues 31 | - fixed multithreading issues 32 | - added si5351 PLL lock hardware check 33 | - fixed couple of bugs 34 | 35 | 36 | ## Reference 37 | 38 | * [NanoVNA-H Schematic](/doc/NanoVNA-H_V3.0_Jul-11-19.pdf) 39 | * [NanoVNA-H PCB Photo](/doc/NanoVNA-H_V3.1_pcb_front.jpg) 40 | * [Block Diagram](/doc/nanovna-blockdiagram.png) 41 | * [NanoVNA](https://github.com/ttrftech/NanoVNA) 42 | * [NanoVNA-H](https://github.com/hugen79/NanoVNA-H) 43 | 44 | ### Contributors 45 | 46 | * [@edy555](https://github.com/edy555) 47 | * [@hugen79](https://github.com/hugen79) 48 | * [@cho45](https://github.com/cho45) 49 | * [@qrp73](https://github.com/qrp73) 50 | -------------------------------------------------------------------------------- /adc.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com 3 | * All rights reserved. 4 | * 5 | * This is free software; you can redistribute it and/or modify 6 | * it under the terms of the GNU General Public License as published by 7 | * the Free Software Foundation; either version 3, or (at your option) 8 | * any later version. 9 | * 10 | * The software is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with GNU Radio; see the file COPYING. If not, write to 17 | * the Free Software Foundation, Inc., 51 Franklin Street, 18 | * Boston, MA 02110-1301, USA. 19 | */ 20 | #include "ch.h" 21 | #include "hal.h" 22 | #include "nanovna.h" 23 | 24 | 25 | #define ADC_TR(low, high) (((uint32_t)(high) << 16U) | \ 26 | (uint32_t)(low)) 27 | #define ADC_SMPR_SMP_1P5 0U /**< @brief 14 cycles conversion time */ 28 | #define ADC_SMPR_SMP_239P5 7U /**< @brief 252 cycles conversion time. */ 29 | #define ADC_CFGR1_RES_12BIT (0U << 3U) 30 | 31 | void adc_init(void) 32 | { 33 | rccEnableADC1(FALSE); 34 | 35 | /* Ensure flag states */ 36 | ADC1->IER = 0; 37 | 38 | /* Calibration procedure.*/ 39 | ADC->CCR = 0; 40 | if (ADC1->CR & ADC_CR_ADEN) { 41 | ADC1->CR |= ~ADC_CR_ADDIS; /* Disable ADC */ 42 | } 43 | while (ADC1->CR & ADC_CR_ADEN) 44 | ; 45 | ADC1->CFGR1 &= ~ADC_CFGR1_DMAEN; 46 | ADC1->CR |= ADC_CR_ADCAL; 47 | while (ADC1->CR & ADC_CR_ADCAL) 48 | ; 49 | 50 | if (ADC1->ISR & ADC_ISR_ADRDY) { 51 | ADC1->ISR |= ADC_ISR_ADRDY; /* clear ADRDY */ 52 | } 53 | /* Enable ADC */ 54 | ADC1->CR |= ADC_CR_ADEN; 55 | while (!(ADC1->ISR & ADC_ISR_ADRDY)) 56 | ; 57 | } 58 | 59 | uint16_t adc_single_read(ADC_TypeDef *adc, uint32_t chsel) 60 | { 61 | /* ADC setup */ 62 | adc->ISR = adc->ISR; 63 | adc->IER = 0; 64 | adc->TR = ADC_TR(0, 0); 65 | adc->SMPR = ADC_SMPR_SMP_239P5; 66 | adc->CFGR1 = ADC_CFGR1_RES_12BIT; 67 | adc->CHSELR = chsel; 68 | 69 | /* ADC conversion start.*/ 70 | adc->CR |= ADC_CR_ADSTART; 71 | 72 | while (adc->CR & ADC_CR_ADSTART) 73 | ; 74 | 75 | return adc->DR; 76 | } 77 | 78 | 79 | #define ADCFILTER 32 80 | static uint16_t adc_single_read_filtered(ADC_TypeDef *adc, uint32_t chsel) 81 | { 82 | uint32_t value = 0; 83 | for (int i=0; i < ADCFILTER; i++) 84 | value += adc_single_read(adc, chsel); 85 | value /= ADCFILTER; 86 | return (uint16_t)value; 87 | } 88 | 89 | 90 | #define TEMP110_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7C2)) 91 | #define TEMP30_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7B8)) 92 | #define VDD_CALIB ((uint16_t) (330)) 93 | #define VDD_APPLI ((uint16_t) (300)) 94 | #define VREFINT_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7BA)) 95 | 96 | int16_t adc_vbat_read(ADC_TypeDef *adc) 97 | { 98 | // VREFINT == ADC_IN17 99 | // VBAT == ADC_IN18 100 | // VBATEN enables resiter devider circuit. It consume vbat power. 101 | ADC->CCR |= ADC_CCR_VREFEN | ADC_CCR_VBATEN; 102 | int32_t adc_ref = adc_single_read_filtered(adc, ADC_CHSELR_CHSEL17); 103 | int32_t adc_bat = adc_single_read_filtered(adc, ADC_CHSELR_CHSEL18); 104 | ADC->CCR &= ~(ADC_CCR_VREFEN | ADC_CCR_VBATEN); 105 | 106 | int16_t vbat_raw = (int16_t)((2 * 3300 * (int64_t)(*VREFINT_CAL_ADDR) * adc_bat) / ((int64_t)adc_ref * ((1<<12)-1))); 107 | return vbat_raw + config.vbat_offset; 108 | } 109 | 110 | int16_t adc_tjun_read(ADC_TypeDef *adc) 111 | { 112 | // TJUN == ADC_IN16 113 | ADC->CCR |= ADC_CCR_VREFEN | ADC_CCR_TSEN; 114 | int32_t adc_ref = adc_single_read_filtered(adc, ADC_CHSELR_CHSEL17); 115 | int32_t adc_t = adc_single_read_filtered(adc, ADC_CHSELR_CHSEL16); 116 | ADC->CCR &= ~(ADC_CCR_VREFEN | ADC_CCR_TSEN); 117 | 118 | int32_t t = ((adc_t * (*VREFINT_CAL_ADDR)) / adc_ref) - (int32_t) *TEMP30_CAL_ADDR; 119 | t *= (int32_t)(110 - 30); 120 | t = t / (int32_t)(*TEMP110_CAL_ADDR - *TEMP30_CAL_ADDR); 121 | t += 30; 122 | return (int16_t)t; 123 | } 124 | 125 | void adc_start_analog_watchdogd(ADC_TypeDef *adc, uint32_t chsel) 126 | { 127 | uint32_t cfgr1; 128 | 129 | cfgr1 = ADC_CFGR1_RES_12BIT | ADC_CFGR1_AWDEN 130 | | ADC_CFGR1_EXTEN_0 // rising edge of external trigger 131 | | ADC_CFGR1_EXTSEL_0 | ADC_CFGR1_EXTSEL_1; // TRG3 , /* CFGR1 */ 132 | 133 | /* ADC setup, if it is defined a callback for the analog watch dog then it 134 | is enabled.*/ 135 | adc->ISR = adc->ISR; 136 | adc->IER = ADC_IER_AWDIE; 137 | adc->TR = ADC_TR(0, TOUCH_THRESHOLD); 138 | adc->SMPR = ADC_SMPR_SMP_1P5; 139 | adc->CHSELR = chsel; 140 | 141 | /* ADC configuration and start.*/ 142 | adc->CFGR1 = cfgr1; 143 | 144 | /* ADC conversion start.*/ 145 | adc->CR |= ADC_CR_ADSTART; 146 | } 147 | 148 | void adc_stop(ADC_TypeDef *adc) 149 | { 150 | if (adc->CR & ADC_CR_ADEN) { 151 | if (adc->CR & ADC_CR_ADSTART) { 152 | adc->CR |= ADC_CR_ADSTP; 153 | while (adc->CR & ADC_CR_ADSTP) 154 | ; 155 | } 156 | 157 | /* adc->CR |= ADC_CR_ADDIS; 158 | while (adc->CR & ADC_CR_ADDIS) 159 | ;*/ 160 | } 161 | } 162 | 163 | static void adc_interrupt(ADC_TypeDef *adc) 164 | { 165 | uint32_t isr = adc->ISR; 166 | adc->ISR = isr; 167 | 168 | if (isr & ADC_ISR_OVR) { 169 | /* ADC overflow condition, this could happen only if the DMA is unable 170 | to read data fast enough.*/ 171 | 172 | } 173 | if (isr & ADC_ISR_AWD) { 174 | /* Analog watchdog error.*/ 175 | handle_touch_interrupt(); 176 | } 177 | } 178 | 179 | OSAL_IRQ_HANDLER(STM32_ADC1_HANDLER) 180 | { 181 | OSAL_IRQ_PROLOGUE(); 182 | 183 | adc_interrupt(ADC1); 184 | 185 | OSAL_IRQ_EPILOGUE(); 186 | } 187 | -------------------------------------------------------------------------------- /chconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /** 18 | * @file templates/chconf.h 19 | * @brief Configuration file template. 20 | * @details A copy of this file must be placed in each project directory, it 21 | * contains the application specific kernel settings. 22 | * 23 | * @addtogroup config 24 | * @details Kernel related settings and hooks. 25 | * @{ 26 | */ 27 | 28 | #ifndef _CHCONF_H_ 29 | #define _CHCONF_H_ 30 | 31 | #define _CHIBIOS_RT_CONF_ 32 | 33 | /*===========================================================================*/ 34 | /** 35 | * @name System timers settings 36 | * @{ 37 | */ 38 | /*===========================================================================*/ 39 | 40 | /** 41 | * @brief System time counter resolution. 42 | * @note Allowed values are 16 or 32 bits. 43 | */ 44 | #define CH_CFG_ST_RESOLUTION 32 45 | 46 | /** 47 | * @brief System tick frequency. 48 | * @details Frequency of the system timer that drives the system ticks. This 49 | * setting also defines the system tick time unit. 50 | */ 51 | #define CH_CFG_ST_FREQUENCY 10000 52 | 53 | /** 54 | * @brief Time delta constant for the tick-less mode. 55 | * @note If this value is zero then the system uses the classic 56 | * periodic tick. This value represents the minimum number 57 | * of ticks that is safe to specify in a timeout directive. 58 | * The value one is not valid, timeouts are rounded up to 59 | * this value. 60 | */ 61 | #define CH_CFG_ST_TIMEDELTA 2 62 | 63 | /** @} */ 64 | 65 | /*===========================================================================*/ 66 | /** 67 | * @name Kernel parameters and options 68 | * @{ 69 | */ 70 | /*===========================================================================*/ 71 | 72 | /** 73 | * @brief Round robin interval. 74 | * @details This constant is the number of system ticks allowed for the 75 | * threads before preemption occurs. Setting this value to zero 76 | * disables the preemption for threads with equal priority and the 77 | * round robin becomes cooperative. Note that higher priority 78 | * threads can still preempt, the kernel is always preemptive. 79 | * @note Disabling the round robin preemption makes the kernel more compact 80 | * and generally faster. 81 | * @note The round robin preemption is not supported in tickless mode and 82 | * must be set to zero in that case. 83 | */ 84 | #define CH_CFG_TIME_QUANTUM 0 85 | 86 | /** 87 | * @brief Managed RAM size. 88 | * @details Size of the RAM area to be managed by the OS. If set to zero 89 | * then the whole available RAM is used. The core memory is made 90 | * available to the heap allocator and/or can be used directly through 91 | * the simplified core memory allocator. 92 | * 93 | * @note In order to let the OS manage the whole RAM the linker script must 94 | * provide the @p __heap_base__ and @p __heap_end__ symbols. 95 | * @note Requires @p CH_CFG_USE_MEMCORE. 96 | */ 97 | #define CH_CFG_MEMCORE_SIZE 0 98 | 99 | /** 100 | * @brief Idle thread automatic spawn suppression. 101 | * @details When this option is activated the function @p chSysInit() 102 | * does not spawn the idle thread. The application @p main() 103 | * function becomes the idle thread and must implement an 104 | * infinite loop. */ 105 | #define CH_CFG_NO_IDLE_THREAD FALSE 106 | 107 | /** @} */ 108 | 109 | /*===========================================================================*/ 110 | /** 111 | * @name Performance options 112 | * @{ 113 | */ 114 | /*===========================================================================*/ 115 | 116 | /** 117 | * @brief OS optimization. 118 | * @details If enabled then time efficient rather than space efficient code 119 | * is used when two possible implementations exist. 120 | * 121 | * @note This is not related to the compiler optimization options. 122 | * @note The default is @p TRUE. 123 | */ 124 | #define CH_CFG_OPTIMIZE_SPEED TRUE 125 | 126 | /** @} */ 127 | 128 | /*===========================================================================*/ 129 | /** 130 | * @name Subsystem options 131 | * @{ 132 | */ 133 | /*===========================================================================*/ 134 | 135 | /** 136 | * @brief Time Measurement APIs. 137 | * @details If enabled then the time measurement APIs are included in 138 | * the kernel. 139 | * 140 | * @note The default is @p TRUE. 141 | */ 142 | #define CH_CFG_USE_TM FALSE 143 | 144 | /** 145 | * @brief Threads registry APIs. 146 | * @details If enabled then the registry APIs are included in the kernel. 147 | * 148 | * @note The default is @p TRUE. 149 | */ 150 | #define CH_CFG_USE_REGISTRY TRUE 151 | 152 | /** 153 | * @brief Threads synchronization APIs. 154 | * @details If enabled then the @p chThdWait() function is included in 155 | * the kernel. 156 | * 157 | * @note The default is @p TRUE. 158 | */ 159 | #define CH_CFG_USE_WAITEXIT TRUE 160 | 161 | /** 162 | * @brief Semaphores APIs. 163 | * @details If enabled then the Semaphores APIs are included in the kernel. 164 | * 165 | * @note The default is @p TRUE. 166 | */ 167 | #define CH_CFG_USE_SEMAPHORES FALSE 168 | 169 | /** 170 | * @brief Semaphores queuing mode. 171 | * @details If enabled then the threads are enqueued on semaphores by 172 | * priority rather than in FIFO order. 173 | * 174 | * @note The default is @p FALSE. Enable this if you have special 175 | * requirements. 176 | * @note Requires @p CH_CFG_USE_SEMAPHORES. 177 | */ 178 | #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE 179 | 180 | /** 181 | * @brief Mutexes APIs. 182 | * @details If enabled then the mutexes APIs are included in the kernel. 183 | * 184 | * @note The default is @p TRUE. 185 | */ 186 | #define CH_CFG_USE_MUTEXES TRUE 187 | 188 | /** 189 | * @brief Enables recursive behavior on mutexes. 190 | * @note Recursive mutexes are heavier and have an increased 191 | * memory footprint. 192 | * 193 | * @note The default is @p FALSE. 194 | * @note Requires @p CH_CFG_USE_MUTEXES. 195 | */ 196 | #define CH_CFG_USE_MUTEXES_RECURSIVE TRUE 197 | 198 | /** 199 | * @brief Conditional Variables APIs. 200 | * @details If enabled then the conditional variables APIs are included 201 | * in the kernel. 202 | * 203 | * @note The default is @p TRUE. 204 | * @note Requires @p CH_CFG_USE_MUTEXES. 205 | */ 206 | #define CH_CFG_USE_CONDVARS FALSE 207 | 208 | /** 209 | * @brief Conditional Variables APIs with timeout. 210 | * @details If enabled then the conditional variables APIs with timeout 211 | * specification are included in the kernel. 212 | * 213 | * @note The default is @p TRUE. 214 | * @note Requires @p CH_CFG_USE_CONDVARS. 215 | */ 216 | #define CH_CFG_USE_CONDVARS_TIMEOUT FALSE 217 | 218 | /** 219 | * @brief Events Flags APIs. 220 | * @details If enabled then the event flags APIs are included in the kernel. 221 | * 222 | * @note The default is @p TRUE. 223 | */ 224 | #define CH_CFG_USE_EVENTS TRUE 225 | 226 | /** 227 | * @brief Events Flags APIs with timeout. 228 | * @details If enabled then the events APIs with timeout specification 229 | * are included in the kernel. 230 | * 231 | * @note The default is @p TRUE. 232 | * @note Requires @p CH_CFG_USE_EVENTS. 233 | */ 234 | #define CH_CFG_USE_EVENTS_TIMEOUT TRUE 235 | 236 | /** 237 | * @brief Synchronous Messages APIs. 238 | * @details If enabled then the synchronous messages APIs are included 239 | * in the kernel. 240 | * 241 | * @note The default is @p TRUE. 242 | */ 243 | #define CH_CFG_USE_MESSAGES FALSE 244 | 245 | /** 246 | * @brief Synchronous Messages queuing mode. 247 | * @details If enabled then messages are served by priority rather than in 248 | * FIFO order. 249 | * 250 | * @note The default is @p FALSE. Enable this if you have special 251 | * requirements. 252 | * @note Requires @p CH_CFG_USE_MESSAGES. 253 | */ 254 | #define CH_CFG_USE_MESSAGES_PRIORITY FALSE 255 | 256 | /** 257 | * @brief Mailboxes APIs. 258 | * @details If enabled then the asynchronous messages (mailboxes) APIs are 259 | * included in the kernel. 260 | * 261 | * @note The default is @p TRUE. 262 | * @note Requires @p CH_CFG_USE_SEMAPHORES. 263 | */ 264 | #define CH_CFG_USE_MAILBOXES FALSE 265 | 266 | /** 267 | * @brief I/O Queues APIs. 268 | * @details If enabled then the I/O queues APIs are included in the kernel. 269 | * 270 | * @note The default is @p TRUE. 271 | */ 272 | #define CH_CFG_USE_QUEUES TRUE 273 | 274 | /** 275 | * @brief Core Memory Manager APIs. 276 | * @details If enabled then the core memory manager APIs are included 277 | * in the kernel. 278 | * 279 | * @note The default is @p TRUE. 280 | */ 281 | #define CH_CFG_USE_MEMCORE FALSE 282 | 283 | /** 284 | * @brief Heap Allocator APIs. 285 | * @details If enabled then the memory heap allocator APIs are included 286 | * in the kernel. 287 | * 288 | * @note The default is @p TRUE. 289 | * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or 290 | * @p CH_CFG_USE_SEMAPHORES. 291 | * @note Mutexes are recommended. 292 | */ 293 | #define CH_CFG_USE_HEAP FALSE 294 | 295 | /** 296 | * @brief Memory Pools Allocator APIs. 297 | * @details If enabled then the memory pools allocator APIs are included 298 | * in the kernel. 299 | * 300 | * @note The default is @p TRUE. 301 | */ 302 | #define CH_CFG_USE_MEMPOOLS FALSE 303 | 304 | /** 305 | * @brief Dynamic Threads APIs. 306 | * @details If enabled then the dynamic threads creation APIs are included 307 | * in the kernel. 308 | * 309 | * @note The default is @p TRUE. 310 | * @note Requires @p CH_CFG_USE_WAITEXIT. 311 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. 312 | */ 313 | #define CH_CFG_USE_DYNAMIC FALSE 314 | 315 | /** @} */ 316 | 317 | /*===========================================================================*/ 318 | /** 319 | * @name Debug options 320 | * @{ 321 | */ 322 | /*===========================================================================*/ 323 | 324 | /** 325 | * @brief Debug option, kernel statistics. 326 | * 327 | * @note The default is @p FALSE. 328 | */ 329 | #define CH_DBG_STATISTICS FALSE 330 | 331 | /** 332 | * @brief Debug option, system state check. 333 | * @details If enabled the correct call protocol for system APIs is checked 334 | * at runtime. 335 | * 336 | * @note The default is @p FALSE. 337 | */ 338 | #define CH_DBG_SYSTEM_STATE_CHECK FALSE 339 | 340 | /** 341 | * @brief Debug option, parameters checks. 342 | * @details If enabled then the checks on the API functions input 343 | * parameters are activated. 344 | * 345 | * @note The default is @p FALSE. 346 | */ 347 | #define CH_DBG_ENABLE_CHECKS FALSE 348 | 349 | /** 350 | * @brief Debug option, consistency checks. 351 | * @details If enabled then all the assertions in the kernel code are 352 | * activated. This includes consistency checks inside the kernel, 353 | * runtime anomalies and port-defined checks. 354 | * 355 | * @note The default is @p FALSE. 356 | */ 357 | #define CH_DBG_ENABLE_ASSERTS FALSE 358 | 359 | /** 360 | * @brief Debug option, trace buffer. 361 | * @details If enabled then the trace buffer is activated. 362 | * 363 | * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. 364 | */ 365 | #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED 366 | 367 | /** 368 | * @brief Trace buffer entries. 369 | * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is 370 | * different from @p CH_DBG_TRACE_MASK_DISABLED. 371 | */ 372 | #define CH_DBG_TRACE_BUFFER_SIZE 128 373 | 374 | /** 375 | * @brief Debug option, stack checks. 376 | * @details If enabled then a runtime stack check is performed. 377 | * 378 | * @note The default is @p FALSE. 379 | * @note The stack check is performed in a architecture/port dependent way. 380 | * It may not be implemented or some ports. 381 | * @note The default failure mode is to halt the system with the global 382 | * @p panic_msg variable set to @p NULL. 383 | */ 384 | #define CH_DBG_ENABLE_STACK_CHECK TRUE 385 | 386 | /** 387 | * @brief Debug option, stacks initialization. 388 | * @details If enabled then the threads working area is filled with a byte 389 | * value when a thread is created. This can be useful for the 390 | * runtime measurement of the used stack. 391 | * 392 | * @note The default is @p FALSE. 393 | */ 394 | #define CH_DBG_FILL_THREADS TRUE 395 | 396 | /** 397 | * @brief Debug option, threads profiling. 398 | * @details If enabled then a field is added to the @p thread_t structure that 399 | * counts the system ticks occurred while executing the thread. 400 | * 401 | * @note The default is @p FALSE. 402 | * @note This debug option is not currently compatible with the 403 | * tickless mode. 404 | */ 405 | #define CH_DBG_THREADS_PROFILING FALSE 406 | 407 | /** @} */ 408 | 409 | /*===========================================================================*/ 410 | /** 411 | * @name Kernel hooks 412 | * @{ 413 | */ 414 | /*===========================================================================*/ 415 | 416 | /** 417 | * @brief Threads descriptor structure extension. 418 | * @details User fields added to the end of the @p thread_t structure. 419 | */ 420 | #define CH_CFG_THREAD_EXTRA_FIELDS \ 421 | /* Add threads custom fields here.*/ 422 | 423 | /** 424 | * @brief Threads initialization hook. 425 | * @details User initialization code added to the @p chThdInit() API. 426 | * 427 | * @note It is invoked from within @p chThdInit() and implicitly from all 428 | * the threads creation APIs. 429 | */ 430 | #define CH_CFG_THREAD_INIT_HOOK(tp) { \ 431 | /* Add threads initialization code here.*/ \ 432 | } 433 | 434 | /** 435 | * @brief Threads finalization hook. 436 | * @details User finalization code added to the @p chThdExit() API. 437 | * 438 | * @note It is inserted into lock zone. 439 | * @note It is also invoked when the threads simply return in order to 440 | * terminate. 441 | */ 442 | #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ 443 | /* Add threads finalization code here.*/ \ 444 | } 445 | 446 | /** 447 | * @brief Context switch hook. 448 | * @details This hook is invoked just before switching between threads. 449 | */ 450 | #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ 451 | /* System halt code here.*/ \ 452 | } 453 | 454 | /** 455 | * @brief ISR enter hook. 456 | */ 457 | #define CH_CFG_IRQ_PROLOGUE_HOOK() { \ 458 | /* IRQ prologue code here.*/ \ 459 | } 460 | 461 | /** 462 | * @brief ISR exit hook. 463 | */ 464 | #define CH_CFG_IRQ_EPILOGUE_HOOK() { \ 465 | /* IRQ epilogue code here.*/ \ 466 | } 467 | 468 | /** 469 | * @brief Idle thread enter hook. 470 | * @note This hook is invoked within a critical zone, no OS functions 471 | * should be invoked from here. 472 | * @note This macro can be used to activate a power saving mode. 473 | */ 474 | #define CH_CFG_IDLE_ENTER_HOOK() { \ 475 | } 476 | 477 | /** 478 | * @brief Idle thread leave hook. 479 | * @note This hook is invoked within a critical zone, no OS functions 480 | * should be invoked from here. 481 | * @note This macro can be used to deactivate a power saving mode. 482 | */ 483 | #define CH_CFG_IDLE_LEAVE_HOOK() { \ 484 | } 485 | 486 | /** 487 | * @brief Idle Loop hook. 488 | * @details This hook is continuously invoked by the idle thread loop. 489 | */ 490 | #define CH_CFG_IDLE_LOOP_HOOK() { \ 491 | /* Idle loop code here.*/ \ 492 | } 493 | 494 | /** 495 | * @brief System tick event hook. 496 | * @details This hook is invoked in the system tick handler immediately 497 | * after processing the virtual timers queue. 498 | */ 499 | #define CH_CFG_SYSTEM_TICK_HOOK() { \ 500 | /* System tick event code here.*/ \ 501 | } 502 | 503 | /** 504 | * @brief System halt hook. 505 | * @details This hook is invoked in case to a system halting error before 506 | * the system is halted. 507 | */ 508 | #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ 509 | /* System halt code here.*/ \ 510 | } 511 | 512 | /** 513 | * @brief Trace hook. 514 | * @details This hook is invoked each time a new record is written in the 515 | * trace buffer. 516 | */ 517 | #define CH_CFG_TRACE_HOOK(tep) { \ 518 | /* Trace code here.*/ \ 519 | } 520 | 521 | /** @} */ 522 | 523 | /*===========================================================================*/ 524 | /* Port-specific settings (override port settings defaulted in chcore.h). */ 525 | /*===========================================================================*/ 526 | 527 | #define CHPRINTF_USE_FLOAT TRUE 528 | 529 | /** 530 | * ChibiOS/os/various/shell/shell_cmd.c 531 | */ 532 | #define SHELL_CMD_EXIT_ENABLED TRUE 533 | #define SHELL_CMD_INFO_ENABLED TRUE 534 | #define SHELL_CMD_ECHO_ENABLED FALSE 535 | #define SHELL_CMD_SYSTIME_ENABLED FALSE 536 | #define SHELL_CMD_MEM_ENABLED FALSE 537 | #define SHELL_CMD_THREADS_ENABLED TRUE 538 | #define SHELL_CMD_TEST_ENABLED FALSE 539 | #define SHELL_MAX_ARGUMENTS 5 540 | 541 | 542 | 543 | #endif /* _CHCONF_H_ */ 544 | 545 | /** @} */ 546 | -------------------------------------------------------------------------------- /doc/NanoVNA-H_V3.0_Jul-11-19.pdf: -------------------------------------------------------------------------------- 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https://raw.githubusercontent.com/qrp73/NanoVNA-Q/ceb6cbcce16b1916e6828970021b8b70d2904861/doc/nanovna.jpg -------------------------------------------------------------------------------- /dsp.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com 3 | * All rights reserved. 4 | * 5 | * This is free software; you can redistribute it and/or modify 6 | * it under the terms of the GNU General Public License as published by 7 | * the Free Software Foundation; either version 3, or (at your option) 8 | * any later version. 9 | * 10 | * The software is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with GNU Radio; see the file COPYING. If not, write to 17 | * the Free Software Foundation, Inc., 51 Franklin Street, 18 | * Boston, MA 02110-1301, USA. 19 | */ 20 | 21 | #include 22 | #include "nanovna.h" 23 | 24 | #ifdef __DUMP_CMD__ 25 | int16_t samp_buf[SAMPLE_LEN]; 26 | int16_t ref_buf[SAMPLE_LEN]; 27 | #endif //__DUMP_CMD__ 28 | 29 | static const int16_t sincos_tbl[48][2] = { 30 | { 10533, 31029 }, { 27246, 18205 }, { 32698, -2143 }, { 24636, -21605 }, 31 | { 6393, -32138 }, {-14493, -29389 }, {-29389, -14493 }, {-32138, 6393 }, 32 | {-21605, 24636 }, { -2143, 32698 }, { 18205, 27246 }, { 31029, 10533 }, 33 | { 31029, -10533 }, { 18205, -27246 }, { -2143, -32698 }, {-21605, -24636 }, 34 | {-32138, -6393 }, {-29389, 14493 }, {-14493, 29389 }, { 6393, 32138 }, 35 | { 24636, 21605 }, { 32698, 2143 }, { 27246, -18205 }, { 10533, -31029 }, 36 | {-10533, -31029 }, {-27246, -18205 }, {-32698, 2143 }, {-24636, 21605 }, 37 | { -6393, 32138 }, { 14493, 29389 }, { 29389, 14493 }, { 32138, -6393 }, 38 | { 21605, -24636 }, { 2143, -32698 }, {-18205, -27246 }, {-31029, -10533 }, 39 | {-31029, 10533 }, {-18205, 27246 }, { 2143, 32698 }, { 21605, 24636 }, 40 | { 32138, 6393 }, { 29389, -14493 }, { 14493, -29389 }, { -6393, -32138 }, 41 | {-24636, -21605 }, {-32698, -2143 }, {-27246, 18205 }, {-10533, 31029 } 42 | }; 43 | 44 | static int32_t acc_samp_s; 45 | static int32_t acc_samp_c; 46 | static int32_t acc_ref_s; 47 | static int32_t acc_ref_c; 48 | 49 | void dsp_process(int16_t *capture, size_t length) 50 | { 51 | uint32_t *p = (uint32_t*)capture; 52 | uint32_t len = length / 2; 53 | uint32_t i; 54 | int32_t samp_s = 0; 55 | int32_t samp_c = 0; 56 | int32_t ref_s = 0; 57 | int32_t ref_c = 0; 58 | 59 | for (i = 0; i < len; i++) { 60 | uint32_t sr = *p++; 61 | int16_t ref = sr & 0xffff; 62 | int16_t smp = (sr>>16) & 0xffff; 63 | #ifdef __DUMP_CMD__ 64 | ref_buf[i] = ref; 65 | samp_buf[i] = smp; 66 | #endif //__DUMP_CMD__ 67 | int32_t s = sincos_tbl[i][0]; 68 | int32_t c = sincos_tbl[i][1]; 69 | samp_s += smp * s / 16; 70 | samp_c += smp * c / 16; 71 | ref_s += ref * s / 16; 72 | ref_c += ref * c / 16; 73 | #if 0 74 | uint32_t sc = *(uint32_t)&sincos_tbl[i]; 75 | samp_s = __SMLABB(sr, sc, samp_s); 76 | samp_c = __SMLABT(sr, sc, samp_c); 77 | ref_s = __SMLATB(sr, sc, ref_s); 78 | ref_c = __SMLATT(sr, sc, ref_c); 79 | #endif 80 | } 81 | acc_samp_s = samp_s; 82 | acc_samp_c = samp_c; 83 | acc_ref_s = ref_s; 84 | acc_ref_c = ref_c; 85 | } 86 | 87 | void calculate_gamma(float gamma[2]) 88 | { 89 | #if 1 90 | // calculate reflection coeff. by samp divide by ref 91 | float rs = acc_ref_s; 92 | float rc = acc_ref_c; 93 | float rr = rs * rs + rc * rc; 94 | //rr = sqrtf(rr) * 1e8; 95 | float ss = acc_samp_s; 96 | float sc = acc_samp_c; 97 | gamma[0] = (sc * rc + ss * rs) / rr; 98 | gamma[1] = (ss * rc - sc * rs) / rr; 99 | #elif 0 100 | gamma[0] = acc_samp_s; 101 | gamma[1] = acc_samp_c; 102 | #else 103 | gamma[0] = acc_ref_s; 104 | gamma[1] = acc_ref_c; 105 | #endif 106 | } 107 | 108 | void fetch_amplitude(float gamma[2]) 109 | { 110 | gamma[0] = acc_samp_s * 1e-9; 111 | gamma[1] = acc_samp_c * 1e-9; 112 | } 113 | 114 | void fetch_amplitude_ref(float gamma[2]) 115 | { 116 | gamma[0] = acc_ref_s * 1e-9; 117 | gamma[1] = acc_ref_c * 1e-9; 118 | } 119 | 120 | void reset_dsp_accumerator(void) 121 | { 122 | acc_ref_s = 0; 123 | acc_ref_c = 0; 124 | acc_samp_s = 0; 125 | acc_samp_c = 0; 126 | } 127 | -------------------------------------------------------------------------------- /ffconf.h: -------------------------------------------------------------------------------- 1 | /* CHIBIOS FIX */ 2 | #include "ch.h" 3 | 4 | /*---------------------------------------------------------------------------/ 5 | / FatFs - FAT file system module configuration file R0.09 (C)ChaN, 2011 6 | /----------------------------------------------------------------------------/ 7 | / 8 | / CAUTION! Do not forget to make clean the project after any changes to 9 | / the configuration options. 10 | / 11 | /----------------------------------------------------------------------------*/ 12 | #ifndef _FFCONF 13 | #define _FFCONF 6502 /* Revision ID */ 14 | 15 | 16 | /*---------------------------------------------------------------------------/ 17 | / Functions and Buffer Configurations 18 | /----------------------------------------------------------------------------*/ 19 | 20 | #define _FS_TINY 0 /* 0:Normal or 1:Tiny */ 21 | /* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system 22 | / object instead of the sector buffer in the individual file object for file 23 | / data transfer. This reduces memory consumption 512 bytes each file object. */ 24 | 25 | 26 | #define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */ 27 | /* Setting _FS_READONLY to 1 defines read only configuration. This removes 28 | / writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename, 29 | / f_truncate and useless f_getfree. */ 30 | 31 | 32 | #define _FS_MINIMIZE 0 /* 0 to 3 */ 33 | /* The _FS_MINIMIZE option defines minimization level to remove some functions. 34 | / 35 | / 0: Full function. 36 | / 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename 37 | / are removed. 38 | / 2: f_opendir and f_readdir are removed in addition to 1. 39 | / 3: f_lseek is removed in addition to 2. */ 40 | 41 | 42 | #define _USE_STRFUNC 0 /* 0:Disable or 1-2:Enable */ 43 | /* To enable string functions, set _USE_STRFUNC to 1 or 2. */ 44 | 45 | 46 | #define _USE_MKFS 1 /* 0:Disable or 1:Enable */ 47 | /* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */ 48 | 49 | 50 | #define _USE_FORWARD 0 /* 0:Disable or 1:Enable */ 51 | /* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */ 52 | 53 | 54 | #define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */ 55 | /* To enable fast seek feature, set _USE_FASTSEEK to 1. */ 56 | 57 | 58 | 59 | /*---------------------------------------------------------------------------/ 60 | / Locale and Namespace Configurations 61 | /----------------------------------------------------------------------------*/ 62 | 63 | #define _CODE_PAGE 1251 64 | /* The _CODE_PAGE specifies the OEM code page to be used on the target system. 65 | / Incorrect setting of the code page can cause a file open failure. 66 | / 67 | / 932 - Japanese Shift-JIS (DBCS, OEM, Windows) 68 | / 936 - Simplified Chinese GBK (DBCS, OEM, Windows) 69 | / 949 - Korean (DBCS, OEM, Windows) 70 | / 950 - Traditional Chinese Big5 (DBCS, OEM, Windows) 71 | / 1250 - Central Europe (Windows) 72 | / 1251 - Cyrillic (Windows) 73 | / 1252 - Latin 1 (Windows) 74 | / 1253 - Greek (Windows) 75 | / 1254 - Turkish (Windows) 76 | / 1255 - Hebrew (Windows) 77 | / 1256 - Arabic (Windows) 78 | / 1257 - Baltic (Windows) 79 | / 1258 - Vietnam (OEM, Windows) 80 | / 437 - U.S. (OEM) 81 | / 720 - Arabic (OEM) 82 | / 737 - Greek (OEM) 83 | / 775 - Baltic (OEM) 84 | / 850 - Multilingual Latin 1 (OEM) 85 | / 858 - Multilingual Latin 1 + Euro (OEM) 86 | / 852 - Latin 2 (OEM) 87 | / 855 - Cyrillic (OEM) 88 | / 866 - Russian (OEM) 89 | / 857 - Turkish (OEM) 90 | / 862 - Hebrew (OEM) 91 | / 874 - Thai (OEM, Windows) 92 | / 1 - ASCII only (Valid for non LFN cfg.) 93 | */ 94 | 95 | 96 | #define _USE_LFN 1 /* 0 to 3 */ 97 | #define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */ 98 | /* The _USE_LFN option switches the LFN support. 99 | / 100 | / 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect. 101 | / 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant. 102 | / 2: Enable LFN with dynamic working buffer on the STACK. 103 | / 3: Enable LFN with dynamic working buffer on the HEAP. 104 | / 105 | / The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN, 106 | / Unicode handling functions ff_convert() and ff_wtoupper() must be added 107 | / to the project. When enable to use heap, memory control functions 108 | / ff_memalloc() and ff_memfree() must be added to the project. */ 109 | 110 | 111 | #define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */ 112 | /* To switch the character code set on FatFs API to Unicode, 113 | / enable LFN feature and set _LFN_UNICODE to 1. */ 114 | 115 | 116 | #define _FS_RPATH 0 /* 0 to 2 */ 117 | /* The _FS_RPATH option configures relative path feature. 118 | / 119 | / 0: Disable relative path feature and remove related functions. 120 | / 1: Enable relative path. f_chdrive() and f_chdir() are available. 121 | / 2: f_getcwd() is available in addition to 1. 122 | / 123 | / Note that output of the f_readdir fnction is affected by this option. */ 124 | 125 | 126 | 127 | /*---------------------------------------------------------------------------/ 128 | / Physical Drive Configurations 129 | /----------------------------------------------------------------------------*/ 130 | 131 | #define _VOLUMES 1 132 | /* Number of volumes (logical drives) to be used. */ 133 | 134 | 135 | #define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */ 136 | /* Maximum sector size to be handled. 137 | / Always set 512 for memory card and hard disk but a larger value may be 138 | / required for on-board flash memory, floppy disk and optical disk. 139 | / When _MAX_SS is larger than 512, it configures FatFs to variable sector size 140 | / and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */ 141 | 142 | 143 | #define _MULTI_PARTITION 0 /* 0:Single partition, 1/2:Enable multiple partition */ 144 | /* When set to 0, each volume is bound to the same physical drive number and 145 | / it can mount only first primaly partition. When it is set to 1, each volume 146 | / is tied to the partitions listed in VolToPart[]. */ 147 | 148 | 149 | #define _USE_ERASE 1 /* 0:Disable or 1:Enable */ 150 | /* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command 151 | / should be added to the disk_ioctl functio. */ 152 | 153 | 154 | 155 | /*---------------------------------------------------------------------------/ 156 | / System Configurations 157 | /----------------------------------------------------------------------------*/ 158 | 159 | #define _WORD_ACCESS 1 /* 0 or 1 */ 160 | /* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS 161 | / option defines which access method is used to the word data on the FAT volume. 162 | / 163 | / 0: Byte-by-byte access. 164 | / 1: Word access. Do not choose this unless following condition is met. 165 | / 166 | / When the byte order on the memory is big-endian or address miss-aligned word 167 | / access results incorrect behavior, the _WORD_ACCESS must be set to 0. 168 | / If it is not the case, the value can also be set to 1 to improve the 169 | / performance and code size. 170 | */ 171 | 172 | 173 | /* A header file that defines sync object types on the O/S, such as 174 | / windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */ 175 | 176 | #define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */ 177 | #define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */ 178 | #define _SYNC_t Semaphore * /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */ 179 | 180 | /* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module. 181 | / 182 | / 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect. 183 | / 1: Enable reentrancy. Also user provided synchronization handlers, 184 | / ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj 185 | / function must be added to the project. */ 186 | 187 | 188 | #define _FS_SHARE 0 /* 0:Disable or >=1:Enable */ 189 | /* To enable file shareing feature, set _FS_SHARE to 1 or greater. The value 190 | defines how many files can be opened simultaneously. */ 191 | 192 | 193 | #endif /* _FFCONFIG */ 194 | -------------------------------------------------------------------------------- /fft.h: -------------------------------------------------------------------------------- 1 | /* 2 | * fft.h is Based on 3 | * Free FFT and convolution (C) 4 | * 5 | * Copyright (c) 2019 Project Nayuki. (MIT License) 6 | * https://www.nayuki.io/page/free-small-fft-in-multiple-languages 7 | * 8 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 9 | * this software and associated documentation files (the "Software"), to deal in 10 | * the Software without restriction, including without limitation the rights to 11 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 12 | * the Software, and to permit persons to whom the Software is furnished to do so, 13 | * subject to the following conditions: 14 | * - The above copyright notice and this permission notice shall be included in 15 | * all copies or substantial portions of the Software. 16 | * - The Software is provided "as is", without warranty of any kind, express or 17 | * implied, including but not limited to the warranties of merchantability, 18 | * fitness for a particular purpose and noninfringement. In no event shall the 19 | * authors or copyright holders be liable for any claim, damages or other 20 | * liability, whether in an action of contract, tort or otherwise, arising from, 21 | * out of or in connection with the Software or the use or other dealings in the 22 | * Software. 23 | */ 24 | 25 | 26 | #include 27 | #include 28 | 29 | static uint16_t reverse_bits(uint16_t x, int n) { 30 | uint16_t result = 0; 31 | for (int i = 0; i < n; i++, x >>= 1) 32 | result = (result << 1) | (x & 1U); 33 | return result; 34 | } 35 | 36 | static const float sin_table[] = { 37 | /* 38 | * float has about 7.2 digits of precision 39 | for (uint8_t i = 0; i < FFT_SIZE - (FFT_SIZE / 4); i++) { 40 | printf("% .8f,%c", sin(2 * M_PI * i / FFT_SIZE), i % 8 == 7 ? '\n' : ' '); 41 | } 42 | */ 43 | 0.00000000, 0.02454123, 0.04906767, 0.07356456, 0.09801714, 0.12241068, 0.14673047, 0.17096189, 44 | 0.19509032, 0.21910124, 0.24298018, 0.26671276, 0.29028468, 0.31368174, 0.33688985, 0.35989504, 45 | 0.38268343, 0.40524131, 0.42755509, 0.44961133, 0.47139674, 0.49289819, 0.51410274, 0.53499762, 46 | 0.55557023, 0.57580819, 0.59569930, 0.61523159, 0.63439328, 0.65317284, 0.67155895, 0.68954054, 47 | 0.70710678, 0.72424708, 0.74095113, 0.75720885, 0.77301045, 0.78834643, 0.80320753, 0.81758481, 48 | 0.83146961, 0.84485357, 0.85772861, 0.87008699, 0.88192126, 0.89322430, 0.90398929, 0.91420976, 49 | 0.92387953, 0.93299280, 0.94154407, 0.94952818, 0.95694034, 0.96377607, 0.97003125, 0.97570213, 50 | 0.98078528, 0.98527764, 0.98917651, 0.99247953, 0.99518473, 0.99729046, 0.99879546, 0.99969882, 51 | 1.00000000, 0.99969882, 0.99879546, 0.99729046, 0.99518473, 0.99247953, 0.98917651, 0.98527764, 52 | 0.98078528, 0.97570213, 0.97003125, 0.96377607, 0.95694034, 0.94952818, 0.94154407, 0.93299280, 53 | 0.92387953, 0.91420976, 0.90398929, 0.89322430, 0.88192126, 0.87008699, 0.85772861, 0.84485357, 54 | 0.83146961, 0.81758481, 0.80320753, 0.78834643, 0.77301045, 0.75720885, 0.74095113, 0.72424708, 55 | 0.70710678, 0.68954054, 0.67155895, 0.65317284, 0.63439328, 0.61523159, 0.59569930, 0.57580819, 56 | 0.55557023, 0.53499762, 0.51410274, 0.49289819, 0.47139674, 0.44961133, 0.42755509, 0.40524131, 57 | 0.38268343, 0.35989504, 0.33688985, 0.31368174, 0.29028468, 0.26671276, 0.24298018, 0.21910124, 58 | 0.19509032, 0.17096189, 0.14673047, 0.12241068, 0.09801714, 0.07356456, 0.04906767, 0.02454123, 59 | 0.00000000, -0.02454123, -0.04906767, -0.07356456, -0.09801714, -0.12241068, -0.14673047, -0.17096189, 60 | -0.19509032, -0.21910124, -0.24298018, -0.26671276, -0.29028468, -0.31368174, -0.33688985, -0.35989504, 61 | -0.38268343, -0.40524131, -0.42755509, -0.44961133, -0.47139674, -0.49289819, -0.51410274, -0.53499762, 62 | -0.55557023, -0.57580819, -0.59569930, -0.61523159, -0.63439328, -0.65317284, -0.67155895, -0.68954054, 63 | -0.70710678, -0.72424708, -0.74095113, -0.75720885, -0.77301045, -0.78834643, -0.80320753, -0.81758481, 64 | -0.83146961, -0.84485357, -0.85772861, -0.87008699, -0.88192126, -0.89322430, -0.90398929, -0.91420976, 65 | -0.92387953, -0.93299280, -0.94154407, -0.94952818, -0.95694034, -0.96377607, -0.97003125, -0.97570213, 66 | -0.98078528, -0.98527764, -0.98917651, -0.99247953, -0.99518473, -0.99729046, -0.99879546, -0.99969882, 67 | }; 68 | 69 | /*** 70 | * dir = forward: 0, inverse: 1 71 | * https://www.nayuki.io/res/free-small-fft-in-multiple-languages/fft.c 72 | */ 73 | static void fft256(float array[][2], const uint8_t dir) { 74 | const uint16_t n = 256; 75 | const uint8_t levels = 8; // log2(n) 76 | const float* const cos_table = &sin_table[64]; 77 | 78 | const uint8_t real = dir & 1; 79 | const uint8_t imag = ~real & 1; 80 | 81 | for (uint16_t i = 0; i < n; i++) { 82 | uint16_t j = reverse_bits(i, levels); 83 | if (j > i) { 84 | float temp = array[i][real]; 85 | array[i][real] = array[j][real]; 86 | array[j][real] = temp; 87 | temp = array[i][imag]; 88 | array[i][imag] = array[j][imag]; 89 | array[j][imag] = temp; 90 | } 91 | } 92 | 93 | // Cooley-Tukey decimation-in-time radix-2 FFT 94 | for (uint16_t size = 2; size <= n; size *= 2) { 95 | uint16_t halfsize = size / 2; 96 | uint16_t tablestep = n / size; 97 | for (uint16_t i = 0; i < n; i += size) { 98 | for (uint16_t j = i, k = 0; j < i + halfsize; j++, k += tablestep) { 99 | uint16_t l = j + halfsize; 100 | float tpre = array[l][real] * cos_table[k] + array[l][imag] * sin_table[k]; 101 | float tpim = -array[l][real] * sin_table[k] + array[l][imag] * cos_table[k] ; 102 | array[l][real] = array[j][real] - tpre; 103 | array[l][imag] = array[j][imag] - tpim; 104 | array[j][real] += tpre; 105 | array[j][imag] += tpim; 106 | } 107 | } 108 | if (size == n) // Prevent overflow in 'size *= 2' 109 | break; 110 | } 111 | } 112 | 113 | static inline void fft256_forward(float array[][2]) { 114 | fft256(array, 0); 115 | } 116 | 117 | static inline void fft256_inverse(float array[][2]) { 118 | fft256(array, 1); 119 | } 120 | -------------------------------------------------------------------------------- /flash.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com 3 | * All rights reserved. 4 | * 5 | * This is free software; you can redistribute it and/or modify 6 | * it under the terms of the GNU General Public License as published by 7 | * the Free Software Foundation; either version 3, or (at your option) 8 | * any later version. 9 | * 10 | * The software is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with GNU Radio; see the file COPYING. If not, write to 17 | * the Free Software Foundation, Inc., 51 Franklin Street, 18 | * Boston, MA 02110-1301, USA. 19 | */ 20 | #include "ch.h" 21 | #include "hal.h" 22 | #include "nanovna.h" 23 | #include 24 | 25 | static int flash_wait_for_last_operation(void) 26 | { 27 | while (FLASH->SR == FLASH_SR_BSY) { 28 | //WWDG->CR = WWDG_CR_T; 29 | } 30 | return FLASH->SR; 31 | } 32 | 33 | static void flash_erase_page0(uint32_t page_address) 34 | { 35 | flash_wait_for_last_operation(); 36 | FLASH->CR |= FLASH_CR_PER; 37 | FLASH->AR = page_address; 38 | FLASH->CR |= FLASH_CR_STRT; 39 | flash_wait_for_last_operation(); 40 | FLASH->CR &= ~FLASH_CR_PER; 41 | } 42 | 43 | static int flash_erase_page(uint32_t page_address) 44 | { 45 | chSysLock(); 46 | flash_erase_page0(page_address); 47 | chSysUnlock(); 48 | return 0; 49 | } 50 | 51 | static void flash_program_half_word(uint32_t address, uint16_t data) 52 | { 53 | flash_wait_for_last_operation(); 54 | FLASH->CR |= FLASH_CR_PG; 55 | *(__IO uint16_t*)address = data; 56 | flash_wait_for_last_operation(); 57 | FLASH->CR &= ~FLASH_CR_PG; 58 | } 59 | 60 | static void flash_unlock(void) 61 | { 62 | // unlock sequence 63 | FLASH->KEYR = 0x45670123; 64 | FLASH->KEYR = 0xCDEF89AB; 65 | } 66 | 67 | 68 | static uint32_t checksum(const void *start, size_t len) 69 | { 70 | uint32_t *p = (uint32_t*)start; 71 | uint32_t *tail = (uint32_t*)((uint8_t*)start + len); 72 | uint32_t value = 0; 73 | while (p < tail) 74 | value ^= *p++; 75 | return value; 76 | } 77 | 78 | 79 | #define FLASH_PAGESIZE 0x800 80 | 81 | static const uint32_t save_config_area = 0x08018000; 82 | 83 | int config_save(void) 84 | { 85 | uint16_t *src = (uint16_t*)&config; 86 | uint16_t *dst = (uint16_t*)save_config_area; 87 | int count = sizeof(config_t) / sizeof(uint16_t); 88 | 89 | config.magic = CONFIG_MAGIC; 90 | config.checksum = 0; 91 | config.checksum = checksum(&config, sizeof config); 92 | 93 | flash_unlock(); 94 | 95 | /* erase flash pages */ 96 | flash_erase_page((uint32_t)dst); 97 | 98 | /* write to flahs */ 99 | while(count-- > 0) { 100 | flash_program_half_word((uint32_t)dst, *src++); 101 | dst++; 102 | } 103 | 104 | return 0; 105 | } 106 | 107 | int config_recall(void) 108 | { 109 | const config_t *src = (const config_t*)save_config_area; 110 | void *dst = &config; 111 | 112 | if (src->magic != CONFIG_MAGIC) 113 | return -1; 114 | if (checksum(src, sizeof(config_t)) != 0) 115 | return -1; 116 | 117 | /* duplicated saved data onto sram to be able to modify marker/trace */ 118 | memcpy(dst, src, sizeof(config_t)); 119 | return 0; 120 | } 121 | 122 | #define SAVEAREA_MAX 5 123 | 124 | static const uint32_t saveareas[] = 125 | { 0x08018800, 0x0801a000, 0x0801b800, 0x0801d000, 0x0801e800 }; 126 | 127 | int16_t lastsaveid = 0; 128 | 129 | 130 | int caldata_save(int id) 131 | { 132 | uint16_t *src = (uint16_t*)¤t_props; 133 | uint16_t *dst; 134 | int count = sizeof(properties_t) / sizeof(uint16_t); 135 | 136 | if (id < 0 || id >= SAVEAREA_MAX) 137 | return -1; 138 | dst = (uint16_t*)saveareas[id]; 139 | 140 | current_props.magic = CONFIG_MAGIC; 141 | current_props.checksum = 0; 142 | current_props.checksum = checksum(¤t_props, sizeof current_props); 143 | 144 | flash_unlock(); 145 | 146 | /* erase flash pages */ 147 | uint8_t* p = (uint8_t*)dst; 148 | uint8_t* tail = p + sizeof(properties_t); 149 | while (p < tail) { 150 | flash_erase_page((uint32_t)p); 151 | p += FLASH_PAGESIZE; 152 | } 153 | 154 | /* write to flahs */ 155 | while(count-- > 0) { 156 | flash_program_half_word((uint32_t)dst, *src++); 157 | dst++; 158 | } 159 | 160 | /* after saving data, make active configuration points to flash */ 161 | active_props = (properties_t*)saveareas[id]; 162 | lastsaveid = id; 163 | 164 | return 0; 165 | } 166 | 167 | int caldata_recall(int id) 168 | { 169 | properties_t *src; 170 | void *dst = ¤t_props; 171 | 172 | if (id < 0 || id >= SAVEAREA_MAX) 173 | return -1; 174 | 175 | // point to saved area on the flash memory 176 | src = (properties_t*)saveareas[id]; 177 | 178 | if (src->magic != CONFIG_MAGIC) 179 | return -1; 180 | if (checksum(src, sizeof(properties_t)) != 0) 181 | return -1; 182 | 183 | /* active configuration points to save data on flash memory */ 184 | active_props = src; 185 | lastsaveid = id; 186 | 187 | /* duplicated saved data onto sram to be able to modify marker/trace */ 188 | memcpy(dst, src, sizeof(properties_t)); 189 | 190 | return 0; 191 | } 192 | 193 | const properties_t* caldata_ref(int id) 194 | { 195 | const properties_t *src; 196 | if (id < 0 || id >= SAVEAREA_MAX) 197 | return NULL; 198 | src = (const properties_t*)saveareas[id]; 199 | 200 | if (src->magic != CONFIG_MAGIC) 201 | return NULL; 202 | if (checksum(src, sizeof(properties_t)) != 0) 203 | return NULL; 204 | return src; 205 | } 206 | 207 | static const uint32_t save_config_prop_area_size = 0x8000; 208 | 209 | void clear_all_config_prop_data(void) 210 | { 211 | flash_unlock(); 212 | 213 | /* erase flash pages */ 214 | uint8_t* p = (uint8_t*)save_config_area; 215 | uint8_t* tail = p + save_config_prop_area_size; 216 | while (p < tail) { 217 | flash_erase_page((uint32_t)p); 218 | p += FLASH_PAGESIZE; 219 | } 220 | } 221 | 222 | -------------------------------------------------------------------------------- /halconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /** 18 | * @file templates/halconf.h 19 | * @brief HAL configuration header. 20 | * @details HAL configuration file, this file allows to enable or disable the 21 | * various device drivers from your application. You may also use 22 | * this file in order to override the device drivers default settings. 23 | * 24 | * @addtogroup HAL_CONF 25 | * @{ 26 | */ 27 | 28 | #ifndef _HALCONF_H_ 29 | #define _HALCONF_H_ 30 | 31 | #include "mcuconf.h" 32 | 33 | /** 34 | * @brief Enables the PAL subsystem. 35 | */ 36 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) 37 | #define HAL_USE_PAL TRUE 38 | #endif 39 | 40 | /** 41 | * @brief Enables the ADC subsystem. 42 | */ 43 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) 44 | #define HAL_USE_ADC FALSE 45 | #endif 46 | 47 | /** 48 | * @brief Enables the CAN subsystem. 49 | */ 50 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) 51 | #define HAL_USE_CAN FALSE 52 | #endif 53 | 54 | /** 55 | * @brief Enables the DAC subsystem. 56 | */ 57 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) 58 | #define HAL_USE_DAC TRUE 59 | #endif 60 | 61 | /** 62 | * @brief Enables the EXT subsystem. 63 | */ 64 | #if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) 65 | #define HAL_USE_EXT TRUE 66 | #endif 67 | 68 | /** 69 | * @brief Enables the GPT subsystem. 70 | */ 71 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) 72 | #define HAL_USE_GPT TRUE 73 | #endif 74 | 75 | /** 76 | * @brief Enables the I2C subsystem. 77 | */ 78 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) 79 | #define HAL_USE_I2C TRUE 80 | #endif 81 | 82 | /** 83 | * @brief Enables the I2S subsystem. 84 | */ 85 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) 86 | #define HAL_USE_I2S TRUE 87 | #endif 88 | 89 | /** 90 | * @brief Enables the ICU subsystem. 91 | */ 92 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) 93 | #define HAL_USE_ICU FALSE 94 | #endif 95 | 96 | /** 97 | * @brief Enables the MAC subsystem. 98 | */ 99 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) 100 | #define HAL_USE_MAC FALSE 101 | #endif 102 | 103 | /** 104 | * @brief Enables the MMC_SPI subsystem. 105 | */ 106 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) 107 | #define HAL_USE_MMC_SPI FALSE 108 | #endif 109 | 110 | /** 111 | * @brief Enables the PWM subsystem. 112 | */ 113 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) 114 | #define HAL_USE_PWM FALSE 115 | #endif 116 | 117 | /** 118 | * @brief Enables the RTC subsystem. 119 | */ 120 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) 121 | #define HAL_USE_RTC TRUE 122 | #endif 123 | 124 | /** 125 | * @brief Enables the SDC subsystem. 126 | */ 127 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) 128 | #define HAL_USE_SDC FALSE 129 | #endif 130 | 131 | /** 132 | * @brief Enables the SERIAL subsystem. 133 | */ 134 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) 135 | #define HAL_USE_SERIAL TRUE 136 | #endif 137 | 138 | /** 139 | * @brief Enables the SERIAL over USB subsystem. 140 | */ 141 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) 142 | #define HAL_USE_SERIAL_USB TRUE 143 | #endif 144 | 145 | /** 146 | * @brief Enables the SPI subsystem. 147 | */ 148 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) 149 | #define HAL_USE_SPI TRUE 150 | #endif 151 | 152 | /** 153 | * @brief Enables the UART subsystem. 154 | */ 155 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) 156 | #define HAL_USE_UART FALSE 157 | #endif 158 | 159 | /** 160 | * @brief Enables the USB subsystem. 161 | */ 162 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) 163 | #define HAL_USE_USB TRUE 164 | #endif 165 | 166 | /** 167 | * @brief Enables the WDG subsystem. 168 | */ 169 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) 170 | #define HAL_USE_WDG FALSE 171 | #endif 172 | 173 | /*===========================================================================*/ 174 | /* ADC driver related settings. */ 175 | /*===========================================================================*/ 176 | 177 | /** 178 | * @brief Enables synchronous APIs. 179 | * @note Disabling this option saves both code and data space. 180 | */ 181 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) 182 | #define ADC_USE_WAIT TRUE 183 | #endif 184 | 185 | /** 186 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. 187 | * @note Disabling this option saves both code and data space. 188 | */ 189 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 190 | #define ADC_USE_MUTUAL_EXCLUSION TRUE 191 | #endif 192 | 193 | /*===========================================================================*/ 194 | /* CAN driver related settings. */ 195 | /*===========================================================================*/ 196 | 197 | /** 198 | * @brief Sleep mode related APIs inclusion switch. 199 | */ 200 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) 201 | #define CAN_USE_SLEEP_MODE TRUE 202 | #endif 203 | 204 | /*===========================================================================*/ 205 | /* I2C driver related settings. */ 206 | /*===========================================================================*/ 207 | 208 | /** 209 | * @brief Enables the mutual exclusion APIs on the I2C bus. 210 | */ 211 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 212 | #define I2C_USE_MUTUAL_EXCLUSION TRUE 213 | #endif 214 | 215 | /*===========================================================================*/ 216 | /* MAC driver related settings. */ 217 | /*===========================================================================*/ 218 | 219 | /** 220 | * @brief Enables an event sources for incoming packets. 221 | */ 222 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) 223 | #define MAC_USE_ZERO_COPY FALSE 224 | #endif 225 | 226 | /** 227 | * @brief Enables an event sources for incoming packets. 228 | */ 229 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) 230 | #define MAC_USE_EVENTS TRUE 231 | #endif 232 | 233 | /*===========================================================================*/ 234 | /* MMC_SPI driver related settings. */ 235 | /*===========================================================================*/ 236 | 237 | /** 238 | * @brief Delays insertions. 239 | * @details If enabled this options inserts delays into the MMC waiting 240 | * routines releasing some extra CPU time for the threads with 241 | * lower priority, this may slow down the driver a bit however. 242 | * This option is recommended also if the SPI driver does not 243 | * use a DMA channel and heavily loads the CPU. 244 | */ 245 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) 246 | #define MMC_NICE_WAITING TRUE 247 | #endif 248 | 249 | /*===========================================================================*/ 250 | /* SDC driver related settings. */ 251 | /*===========================================================================*/ 252 | 253 | /** 254 | * @brief Number of initialization attempts before rejecting the card. 255 | * @note Attempts are performed at 10mS intervals. 256 | */ 257 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) 258 | #define SDC_INIT_RETRY 100 259 | #endif 260 | 261 | /** 262 | * @brief Include support for MMC cards. 263 | * @note MMC support is not yet implemented so this option must be kept 264 | * at @p FALSE. 265 | */ 266 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) 267 | #define SDC_MMC_SUPPORT FALSE 268 | #endif 269 | 270 | /** 271 | * @brief Delays insertions. 272 | * @details If enabled this options inserts delays into the MMC waiting 273 | * routines releasing some extra CPU time for the threads with 274 | * lower priority, this may slow down the driver a bit however. 275 | */ 276 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) 277 | #define SDC_NICE_WAITING TRUE 278 | #endif 279 | 280 | /*===========================================================================*/ 281 | /* SERIAL driver related settings. */ 282 | /*===========================================================================*/ 283 | 284 | /** 285 | * @brief Default bit rate. 286 | * @details Configuration parameter, this is the baud rate selected for the 287 | * default configuration. 288 | */ 289 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) 290 | #define SERIAL_DEFAULT_BITRATE 38400 291 | #endif 292 | 293 | /** 294 | * @brief Serial buffers size. 295 | * @details Configuration parameter, you can change the depth of the queue 296 | * buffers depending on the requirements of your application. 297 | * @note The default is 64 bytes for both the transmission and receive 298 | * buffers. 299 | */ 300 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) 301 | #define SERIAL_BUFFERS_SIZE 16 302 | #endif 303 | 304 | /*===========================================================================*/ 305 | /* SERIAL_USB driver related setting. */ 306 | /*===========================================================================*/ 307 | 308 | /** 309 | * @brief Serial over USB buffers size. 310 | * @details Configuration parameter, the buffer size must be a multiple of 311 | * the USB data endpoint maximum packet size. 312 | * @note The default is 64 bytes for both the transmission and receive 313 | * buffers. 314 | */ 315 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) 316 | #define SERIAL_USB_BUFFERS_SIZE 128 317 | #endif 318 | 319 | /** 320 | * @brief Serial over USB number of buffers. 321 | * @note The default is 2 buffers. 322 | */ 323 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) 324 | #define SERIAL_USB_BUFFERS_NUMBER 1 325 | #endif 326 | 327 | /*===========================================================================*/ 328 | /* SPI driver related settings. */ 329 | /*===========================================================================*/ 330 | 331 | /** 332 | * @brief Enables synchronous APIs. 333 | * @note Disabling this option saves both code and data space. 334 | */ 335 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) 336 | #define SPI_USE_WAIT TRUE 337 | #endif 338 | 339 | /** 340 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. 341 | * @note Disabling this option saves both code and data space. 342 | */ 343 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 344 | #define SPI_USE_MUTUAL_EXCLUSION TRUE 345 | #endif 346 | 347 | /** 348 | * @brief Enables synchronous APIs. 349 | * @note Disabling this option saves both code and data space. 350 | */ 351 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) 352 | #define UART_USE_WAIT FALSE 353 | #endif 354 | 355 | /** 356 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. 357 | * @note Disabling this option saves both code and data space. 358 | */ 359 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 360 | #define UART_USE_MUTUAL_EXCLUSION FALSE 361 | #endif 362 | 363 | /*===========================================================================*/ 364 | /* USB driver related settings. */ 365 | /*===========================================================================*/ 366 | 367 | /** 368 | * @brief Enables synchronous APIs. 369 | * @note Disabling this option saves both code and data space. 370 | */ 371 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) 372 | #define USB_USE_WAIT FALSE 373 | #endif 374 | 375 | #endif /* _HALCONF_H_ */ 376 | 377 | /** @} */ 378 | -------------------------------------------------------------------------------- /iar/NanoVNA.eww: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | $WS_DIR$\NanoVNA.ewp 5 | 6 | 7 | 8 | -------------------------------------------------------------------------------- /iar/githash_get.bat: -------------------------------------------------------------------------------- 1 | git rev-parse --short HEAD > githash.h 2 | set /p GITHASH=githash.h 5 | echo #define VERSION "%GITHASH%-release">>githash.h 6 | echo #else>>githash.h 7 | echo #define VERSION "%GITHASH%-debug">>githash.h 8 | echo #endif>>githash.h 9 | -------------------------------------------------------------------------------- /ili9341.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com 3 | * All rights reserved. 4 | * 5 | * This is free software; you can redistribute it and/or modify 6 | * it under the terms of the GNU General Public License as published by 7 | * the Free Software Foundation; either version 3, or (at your option) 8 | * any later version. 9 | * 10 | * The software is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with GNU Radio; see the file COPYING. If not, write to 17 | * the Free Software Foundation, Inc., 51 Franklin Street, 18 | * Boston, MA 02110-1301, USA. 19 | */ 20 | #include "ch.h" 21 | #include "hal.h" 22 | #include "nanovna.h" 23 | 24 | #define RESET_ASSERT palClearPad(GPIOA, 15) 25 | #define RESET_NEGATE palSetPad(GPIOA, 15) 26 | #define CS_LOW palClearPad(GPIOB, 6) 27 | #define CS_HIGH palSetPad(GPIOB, 6) 28 | #define DC_CMD palClearPad(GPIOB, 7) 29 | #define DC_DATA palSetPad(GPIOB, 7) 30 | 31 | uint16_t spi_buffer[1024]; 32 | 33 | //static void ssp_wait(void) 34 | //{ 35 | // while (SPI1->SR & SPI_SR_BSY) 36 | // ; 37 | //} 38 | 39 | static void ssp_wait_slot(void) 40 | { 41 | while ((SPI1->SR & 0x1800) == 0x1800) 42 | ; 43 | } 44 | 45 | static void ssp_senddata(uint8_t x) 46 | { 47 | *(uint8_t*)(&SPI1->DR) = x; 48 | while (SPI1->SR & SPI_SR_BSY) 49 | ; 50 | } 51 | 52 | static uint8_t ssp_sendrecvdata(uint8_t x) 53 | { 54 | while (!(SPI1->SR & SPI_SR_TXE)); 55 | // clear OVR 56 | while (SPI1->SR & SPI_SR_RXNE) (void)SPI1->DR; 57 | 58 | *(uint8_t*)(&SPI1->DR) = x; 59 | while (!(SPI1->SR & SPI_SR_RXNE)); 60 | return SPI1->DR; 61 | } 62 | 63 | static void ssp_senddata16(uint16_t x) 64 | { 65 | ssp_wait_slot(); 66 | SPI1->DR = x; 67 | //while (SPI1->SR & SPI_SR_BSY) 68 | // ; 69 | } 70 | 71 | static void ssp_databit8(void) 72 | { 73 | SPI1->CR2 = (SPI1->CR2 & 0xf0ff) | 0x0700; 74 | //LPC_SSP1->CR0 = (LPC_SSP1->CR0 & 0xf0) | SSP_DATABIT_8; 75 | } 76 | 77 | //static void ssp_databit16(void) 78 | //{ 79 | // SPI1->CR2 = (SPI1->CR2 & 0xf0ff) | 0x0f00; 80 | // //LPC_SSP1->CR0 = (LPC_SSP1->CR0 & 0xf0) | SSP_DATABIT_16; 81 | //} 82 | 83 | 84 | static const stm32_dma_stream_t *dmatx; 85 | static uint32_t txdmamode; 86 | 87 | static void spi_lld_serve_tx_interrupt(SPIDriver *spip, uint32_t flags) { 88 | (void)spip; 89 | (void)flags; 90 | } 91 | 92 | static void spi_init(void) 93 | { 94 | rccEnableSPI1(FALSE); 95 | 96 | dmatx = STM32_DMA_STREAM(STM32_SPI_SPI1_TX_DMA_STREAM); 97 | txdmamode = STM32_DMA_CR_CHSEL(SPI1_TX_DMA_CHANNEL) | 98 | STM32_DMA_CR_PL(STM32_SPI_SPI1_DMA_PRIORITY) | 99 | STM32_DMA_CR_DIR_M2P | 100 | STM32_DMA_CR_DMEIE | 101 | STM32_DMA_CR_TEIE | 102 | STM32_DMA_CR_PSIZE_HWORD | 103 | STM32_DMA_CR_MSIZE_HWORD; 104 | dmaStreamAllocate(dmatx, 105 | STM32_SPI_SPI1_IRQ_PRIORITY, 106 | (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, 107 | NULL); 108 | dmaStreamSetPeripheral(dmatx, &SPI1->DR); 109 | 110 | SPI1->CR1 = 0; 111 | SPI1->CR1 = SPI_CR1_MSTR | SPI_CR1_SSM | SPI_CR1_SSI;// | SPI_CR1_BR_1; 112 | SPI1->CR2 = 0x0700 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH; 113 | SPI1->CR1 |= SPI_CR1_SPE; 114 | } 115 | 116 | static void send_command(uint8_t cmd, int len, const uint8_t *data) 117 | { 118 | CS_LOW; 119 | DC_CMD; 120 | ssp_databit8(); 121 | ssp_senddata(cmd); 122 | DC_DATA; 123 | while (len-- > 0) { 124 | ssp_senddata(*data++); 125 | } 126 | //CS_HIGH; 127 | } 128 | 129 | //static void send_command16(uint8_t cmd, int data) 130 | //{ 131 | // CS_LOW; 132 | // DC_CMD; 133 | // ssp_databit8(); 134 | // ssp_senddata(cmd); 135 | // DC_DATA; 136 | // ssp_databit16(); 137 | // ssp_senddata16(data); 138 | // CS_HIGH; 139 | //} 140 | 141 | static const uint8_t ili9341_init_seq[] = { 142 | // cmd, len, data..., 143 | // Power control B 144 | 0xCF, 3, 0x00, 0x83, 0x30, 145 | // Power on sequence control 146 | 0xED, 4, 0x64, 0x03, 0x12, 0x81, 147 | //0xED, 4, 0x55, 0x01, 0x23, 0x01, 148 | // Driver timing control A 149 | 0xE8, 3, 0x85, 0x01, 0x79, 150 | //0xE8, 3, 0x84, 0x11, 0x7a, 151 | // Power control A 152 | 0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02, 153 | // Pump ratio control 154 | 0xF7, 1, 0x20, 155 | // Driver timing control B 156 | 0xEA, 2, 0x00, 0x00, 157 | // POWER_CONTROL_1 158 | 0xC0, 1, 0x26, 159 | // POWER_CONTROL_2 160 | 0xC1, 1, 0x11, 161 | // VCOM_CONTROL_1 162 | 0xC5, 2, 0x35, 0x3E, 163 | // VCOM_CONTROL_2 164 | 0xC7, 1, 0xBE, 165 | // MEMORY_ACCESS_CONTROL 166 | //0x36, 1, 0x48, // portlait 167 | 0x36, 1, 0x28, // landscape 168 | // COLMOD_PIXEL_FORMAT_SET : 16 bit pixel 169 | 0x3A, 1, 0x55, 170 | // Frame Rate 171 | 0xB1, 2, 0x00, 0x1B, 172 | // Gamma Function Disable 173 | 0xF2, 1, 0x08, 174 | // gamma set for curve 01/2/04/08 175 | 0x26, 1, 0x01, 176 | // positive gamma correction 177 | 0xE0, 15, 0x1F, 0x1A, 0x18, 0x0A, 0x0F, 0x06, 0x45, 0x87, 0x32, 0x0A, 0x07, 0x02, 0x07, 0x05, 0x00, 178 | // negativ gamma correction 179 | 0xE1, 15, 0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3A, 0x78, 0x4D, 0x05, 0x18, 0x0D, 0x38, 0x3A, 0x1F, 180 | 181 | // Column Address Set 182 | 0x2A, 4, 0x00, 0x00, 0x01, 0x3f, // width 320 183 | // Page Address Set 184 | 0x2B, 4, 0x00, 0x00, 0x00, 0xef, // height 240 185 | 186 | // entry mode 187 | 0xB7, 1, 0x06, 188 | // display function control 189 | 0xB6, 4, 0x0A, 0x82, 0x27, 0x00, 190 | 191 | // control display 192 | //0x53, 1, 0x0c, 193 | // diaplay brightness 194 | //0x51, 1, 0xff, 195 | 196 | // sleep out 197 | 0x11, 0, 198 | 0 // sentinel 199 | }; 200 | 201 | void ili9341_init(void) 202 | { 203 | chMtxLock(&mutex_ili9341); 204 | spi_init(); 205 | 206 | DC_DATA; 207 | RESET_ASSERT; 208 | chThdSleepMilliseconds(10); 209 | RESET_NEGATE; 210 | 211 | send_command(0x01, 0, NULL); // SW reset 212 | chThdSleepMilliseconds(5); 213 | send_command(0x28, 0, NULL); // display off 214 | 215 | const uint8_t *p; 216 | for (p = ili9341_init_seq; *p; ) { 217 | send_command(p[0], p[1], &p[2]); 218 | p += 2 + p[1]; 219 | chThdSleepMilliseconds(5); 220 | } 221 | 222 | chThdSleepMilliseconds(100); 223 | send_command(0x29, 0, NULL); // display on 224 | chMtxUnlock(&mutex_ili9341); 225 | } 226 | 227 | void ili9341_fill(int x, int y, int w, int h, int color) 228 | { 229 | chMtxLock(&mutex_ili9341); 230 | uint8_t xx[4] = { x >> 8, x, (x+w-1) >> 8, (x+w-1) }; 231 | uint8_t yy[4] = { y >> 8, y, (y+h-1) >> 8, (y+h-1) }; 232 | int len = w * h; 233 | send_command(0x2A, 4, xx); 234 | send_command(0x2B, 4, yy); 235 | send_command(0x2C, 0, NULL); 236 | while (len-- > 0) 237 | ssp_senddata16(color); 238 | chMtxUnlock(&mutex_ili9341); 239 | } 240 | 241 | #if 0 242 | void ili9341_bulk(int x, int y, int w, int h) 243 | { 244 | chMtxLock(&mutex_ili9341); 245 | uint8_t xx[4] = { x >> 8, x, (x+w-1) >> 8, (x+w-1) }; 246 | uint8_t yy[4] = { y >> 8, y, (y+h-1) >> 8, (y+h-1) }; 247 | uint16_t *buf = spi_buffer; 248 | int len = w * h; 249 | send_command(0x2A, 4, xx); 250 | send_command(0x2B, 4, yy); 251 | send_command(0x2C, 0, NULL); 252 | while (len-- > 0) 253 | ssp_senddata16(*buf++); 254 | chMtxUnlock(&mutex_ili9341); 255 | } 256 | #else 257 | void ili9341_bulk(int x, int y, int w, int h) 258 | { 259 | chMtxLock(&mutex_ili9341); 260 | uint8_t xx[4] = { x >> 8, x, (x+w-1) >> 8, (x+w-1) }; 261 | uint8_t yy[4] = { y >> 8, y, (y+h-1) >> 8, (y+h-1) }; 262 | int len = w * h; 263 | 264 | send_command(0x2A, 4, xx); 265 | send_command(0x2B, 4, yy); 266 | send_command(0x2C, 0, NULL); 267 | 268 | dmaStreamSetMemory0(dmatx, spi_buffer); 269 | dmaStreamSetTransactionSize(dmatx, len); 270 | dmaStreamSetMode(dmatx, txdmamode | STM32_DMA_CR_MINC); 271 | dmaStreamEnable(dmatx); 272 | dmaWaitCompletion(dmatx); 273 | chMtxUnlock(&mutex_ili9341); 274 | } 275 | #endif 276 | 277 | static void ili9341_read_memory_raw(uint8_t cmd, int len, uint16_t* out) 278 | { 279 | uint8_t r, g, b; 280 | send_command(cmd, 0, NULL); 281 | ssp_databit8(); 282 | 283 | // consume old data 284 | while (!(SPI1->SR & SPI_SR_TXE)); 285 | // clear OVR 286 | while (SPI1->SR & SPI_SR_RXNE) r = SPI1->DR; 287 | 288 | // require 8bit dummy clock 289 | r = ssp_sendrecvdata(0); 290 | 291 | while (len-- > 0) { 292 | // read data is always 18bit 293 | r = ssp_sendrecvdata(0); 294 | g = ssp_sendrecvdata(0); 295 | b = ssp_sendrecvdata(0); 296 | *out++ = ((r & 0xF8) << 8) | ((g & 0xFC) << 3) | (b >> 3); 297 | } 298 | 299 | CS_HIGH; 300 | } 301 | 302 | void ili9341_read_memory(int x, int y, int w, int h, int len, uint16_t *out) 303 | { 304 | chMtxLock(&mutex_ili9341); 305 | uint8_t xx[4] = { x >> 8, x, (x+w-1) >> 8, (x+w-1) }; 306 | uint8_t yy[4] = { y >> 8, y, (y+h-1) >> 8, (y+h-1) }; 307 | 308 | send_command(0x2A, 4, xx); 309 | send_command(0x2B, 4, yy); 310 | 311 | ili9341_read_memory_raw(0x2E, len, out); 312 | chMtxUnlock(&mutex_ili9341); 313 | } 314 | 315 | void ili9341_read_memory_continue(int len, uint16_t* out) 316 | { 317 | chMtxLock(&mutex_ili9341); 318 | ili9341_read_memory_raw(0x3E, len, out); 319 | chMtxUnlock(&mutex_ili9341); 320 | } 321 | 322 | void ili9341_drawchar_5x7(uint8_t ch, int x, int y, uint16_t fg, uint16_t bg) 323 | { 324 | chMtxLock(&mutex_ili9341); 325 | uint16_t *buf = spi_buffer; 326 | uint8_t bits; 327 | int c, r; 328 | for(c = 0; c < 7; c++) { 329 | bits = x5x7_bits[(ch * 7) + c]; 330 | for (r = 0; r < 5; r++) { 331 | *buf++ = (0x80 & bits) ? fg : bg; 332 | bits <<= 1; 333 | } 334 | } 335 | ili9341_bulk(x, y, 5, 7); 336 | chMtxUnlock(&mutex_ili9341); 337 | } 338 | 339 | void ili9341_drawstring_5x7(const char *str, int x, int y, uint16_t fg, uint16_t bg) 340 | { 341 | chMtxLock(&mutex_ili9341); 342 | while (*str) { 343 | ili9341_drawchar_5x7(*str, x, y, fg, bg); 344 | x += 5; 345 | str++; 346 | } 347 | chMtxUnlock(&mutex_ili9341); 348 | } 349 | 350 | void ili9341_drawchar_size(uint8_t ch, int x, int y, uint16_t fg, uint16_t bg, uint8_t size) 351 | { 352 | chMtxLock(&mutex_ili9341); 353 | uint16_t *buf = spi_buffer; 354 | uint8_t bits; 355 | int c, r; 356 | for(c = 0; c < 7*size; c++) { 357 | bits = x5x7_bits[(ch * 7) + (c / size)]; 358 | for (r = 0; r < 5*size; r++) { 359 | *buf++ = (0x80 & bits) ? fg : bg; 360 | if (r % size == (size-1)) { 361 | bits <<= 1; 362 | } 363 | } 364 | } 365 | ili9341_bulk(x, y, 5*size, 7*size); 366 | chMtxUnlock(&mutex_ili9341); 367 | } 368 | 369 | void ili9341_drawstring_size(const char *str, int x, int y, uint16_t fg, uint16_t bg, uint8_t size) 370 | { 371 | chMtxLock(&mutex_ili9341); 372 | while (*str) { 373 | ili9341_drawchar_size(*str, x, y, fg, bg, size); 374 | x += 5 * size; 375 | str++; 376 | } 377 | chMtxUnlock(&mutex_ili9341); 378 | } 379 | 380 | #define SWAP(x,y) { int z=x; x = y; y = z; } 381 | 382 | void ili9341_line(int x0, int y0, int x1, int y1, uint16_t fg) 383 | { 384 | chMtxLock(&mutex_ili9341); 385 | if (x0 > x1) { 386 | SWAP(x0, x1); 387 | SWAP(y0, y1); 388 | } 389 | 390 | while (x0 <= x1) { 391 | int dx = x1 - x0 + 1; 392 | int dy = y1 - y0; 393 | if (dy >= 0) { 394 | dy++; 395 | if (dy > dx) { 396 | dy /= dx; dx = 1; 397 | } else { 398 | dx /= dy; dy = 1; 399 | } 400 | } else { 401 | dy--; 402 | if (-dy > dx) { 403 | dy /= dx; dx = 1; 404 | } else { 405 | dx /= -dy; dy = -1; 406 | } 407 | } 408 | if (dy > 0) 409 | ili9341_fill(x0, y0, dx, dy, fg); 410 | else 411 | ili9341_fill(x0, y0+dy, dx, -dy, fg); 412 | x0 += dx; 413 | y0 += dy; 414 | } 415 | chMtxUnlock(&mutex_ili9341); 416 | } 417 | 418 | 419 | const font_t NF20x22 = { 20, 22, 1, 3*22, (const uint8_t *)numfont20x22 }; 420 | 421 | void ili9341_drawfont(uint8_t ch, const font_t *font, int x, int y, uint16_t fg, uint16_t bg) 422 | { 423 | chMtxLock(&mutex_ili9341); 424 | uint16_t *buf = spi_buffer; 425 | const uint8_t *bitmap = &font->bitmap[font->slide * ch]; 426 | int c, r; 427 | 428 | for (c = 0; c < font->height; c++) { 429 | uint8_t bits = *bitmap++; 430 | uint8_t m = 0x80; 431 | for (r = 0; r < font->width; r++) { 432 | *buf++ = (bits & m) ? fg : bg; 433 | m >>= 1; 434 | 435 | if (m == 0) { 436 | bits = *bitmap++; 437 | m = 0x80; 438 | } 439 | } 440 | } 441 | ili9341_bulk(x, y, font->width, font->height); 442 | chMtxUnlock(&mutex_ili9341); 443 | } 444 | 445 | #if 0 446 | static const uint16_t colormap[] = { 447 | RGBHEX(0x00ff00), RGBHEX(0x0000ff), RGBHEX(0xff0000), 448 | RGBHEX(0x00ffff), RGBHEX(0xff00ff), RGBHEX(0xffff00) 449 | }; 450 | 451 | static void ili9341_pixel(int x, int y, int color) 452 | { 453 | uint8_t xx[4] = { x >> 8, x, (x+1) >> 8, (x+1) }; 454 | uint8_t yy[4] = { y >> 8, y, (y+1) >> 8, (y+1) }; 455 | uint8_t cc[2] = { color >> 8, color }; 456 | send_command(0x2A, 4, xx); 457 | send_command(0x2B, 4, yy); 458 | send_command(0x2C, 2, cc); 459 | //send_command16(0x2C, color); 460 | } 461 | 462 | void ili9341_test(int mode) 463 | { 464 | chMtxLock(&mutex_ili9341); 465 | int x, y; 466 | int i; 467 | switch (mode) { 468 | default: 469 | #if 1 470 | ili9341_fill(0, 0, 320, 240, 0); 471 | for (y = 0; y < 240; y++) { 472 | ili9341_fill(0, y, 320, 1, RGB(240-y, y, (y + 120) % 256)); 473 | } 474 | break; 475 | case 1: 476 | ili9341_fill(0, 0, 320, 240, 0); 477 | for (y = 0; y < 240; y++) { 478 | for (x = 0; x < 320; x++) { 479 | ili9341_pixel(x, y, (y<<8)|x); 480 | } 481 | } 482 | break; 483 | case 2: 484 | //send_command16(0x55, 0xff00); 485 | ili9341_pixel(64, 64, 0xaa55); 486 | break; 487 | #endif 488 | #if 1 489 | case 3: 490 | for (i = 0; i < 10; i++) 491 | ili9341_drawfont(i, &NF20x22, i*20, 120, colormap[i%6], 0x0000); 492 | break; 493 | #endif 494 | #if 0 495 | case 4: 496 | draw_grid(10, 8, 29, 29, 15, 0, 0xffff, 0); 497 | break; 498 | #endif 499 | case 4: 500 | ili9341_line(0, 0, 15, 100, 0xffff); 501 | ili9341_line(0, 0, 100, 100, 0xffff); 502 | ili9341_line(0, 15, 100, 0, 0xffff); 503 | ili9341_line(0, 100, 100, 0, 0xffff); 504 | break; 505 | } 506 | chMtxUnlock(&mutex_ili9341); 507 | } 508 | #endif 509 | -------------------------------------------------------------------------------- /mcuconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #ifndef MCUCONF_H 18 | #define MCUCONF_H 19 | 20 | /* 21 | * STM32F0xx drivers configuration. 22 | * The following settings override the default settings present in 23 | * the various device driver implementation headers. 24 | * Note that the settings for each driver only have effect if the whole 25 | * driver is enabled in halconf.h. 26 | * 27 | * IRQ priorities: 28 | * 3...0 Lowest...Highest. 29 | * 30 | * DMA priorities: 31 | * 0...3 Lowest...Highest. 32 | */ 33 | 34 | #define STM32F0xx_MCUCONF 35 | 36 | /* 37 | * HAL driver system settings. 38 | */ 39 | #define STM32_NO_INIT FALSE 40 | #define STM32_PVD_ENABLE FALSE 41 | #define STM32_PLS STM32_PLS_LEV0 42 | #define STM32_HSI_ENABLED TRUE 43 | #define STM32_HSI14_ENABLED TRUE 44 | #define STM32_HSI48_ENABLED TRUE 45 | #define STM32_LSI_ENABLED TRUE 46 | #define STM32_HSE_ENABLED FALSE 47 | #define STM32_LSE_ENABLED FALSE 48 | #define STM32_SW STM32_SW_PLL 49 | #define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2 50 | #define STM32_PREDIV_VALUE 1 51 | #define STM32_PLLMUL_VALUE 12 52 | #define STM32_HPRE STM32_HPRE_DIV1 53 | #define STM32_PPRE STM32_PPRE_DIV1 54 | #define STM32_ADCSW STM32_ADCSW_HSI14 55 | #define STM32_ADCPRE STM32_ADCPRE_DIV4 56 | #define STM32_MCOSEL STM32_MCOSEL_PLLDIV2 57 | #define STM32_ADCPRE STM32_ADCPRE_DIV4 58 | #define STM32_ADCSW STM32_ADCSW_HSI14 59 | #define STM32_USBSW STM32_USBSW_HSI48 60 | #define STM32_CECSW STM32_CECSW_HSI 61 | #define STM32_I2C1SW STM32_I2C1SW_HSI 62 | #define STM32_USART1SW STM32_USART1SW_PCLK 63 | #define STM32_RTCSEL STM32_RTCSEL_LSI 64 | 65 | /* 66 | * ADC driver system settings. 67 | */ 68 | #define STM32_ADC_USE_ADC1 FALSE 69 | #define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK 70 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 71 | #define STM32_ADC_IRQ_PRIORITY 2 72 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 73 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) 74 | 75 | /* 76 | * DAC driver system settings. 77 | */ 78 | #define STM32_DAC_DUAL_MODE FALSE 79 | #define STM32_DAC_USE_DAC1_CH1 TRUE 80 | #define STM32_DAC_USE_DAC1_CH2 TRUE 81 | #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 82 | #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 83 | #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 84 | #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 85 | #define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) 86 | #define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) 87 | 88 | /* 89 | * EXT driver system settings. 90 | */ 91 | #define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 92 | #define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 93 | #define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 94 | #define STM32_EXT_EXTI16_IRQ_PRIORITY 3 95 | #define STM32_EXT_EXTI17_IRQ_PRIORITY 3 96 | #define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3 97 | 98 | #define STM32_DISABLE_EXTI2122_HANDLER TRUE 99 | 100 | /* 101 | * GPT driver system settings. 102 | */ 103 | #define STM32_GPT_USE_TIM1 FALSE 104 | #define STM32_GPT_USE_TIM2 FALSE 105 | #define STM32_GPT_USE_TIM3 TRUE 106 | #define STM32_GPT_USE_TIM14 FALSE 107 | #define STM32_GPT_TIM1_IRQ_PRIORITY 2 108 | #define STM32_GPT_TIM2_IRQ_PRIORITY 2 109 | #define STM32_GPT_TIM3_IRQ_PRIORITY 2 110 | #define STM32_GPT_TIM14_IRQ_PRIORITY 2 111 | 112 | /* 113 | * I2C driver system settings. 114 | */ 115 | #define STM32_I2C_USE_I2C1 TRUE 116 | #define STM32_I2C_USE_I2C2 FALSE 117 | #define STM32_I2C_BUSY_TIMEOUT 50 118 | #define STM32_I2C_I2C1_IRQ_PRIORITY 3 119 | #define STM32_I2C_I2C2_IRQ_PRIORITY 3 120 | // note: for unknown reason I2C read operation doesn't works with USE_DMA=TRUE 121 | #define STM32_I2C_USE_DMA FALSE 122 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 123 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 124 | #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) 125 | #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) 126 | #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) 127 | #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) 128 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") 129 | 130 | /* 131 | * I2S driver system settings. 132 | */ 133 | #define STM32_I2S_USE_SPI1 FALSE 134 | #define STM32_I2S_USE_SPI2 TRUE 135 | #define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \ 136 | STM32_I2S_MODE_RX) 137 | #define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_SLAVE | \ 138 | STM32_I2S_MODE_RX) 139 | #define STM32_I2S_SPI1_IRQ_PRIORITY 2 140 | #define STM32_I2S_SPI2_IRQ_PRIORITY 2 141 | #define STM32_I2S_SPI1_DMA_PRIORITY 1 142 | #define STM32_I2S_SPI2_DMA_PRIORITY 1 143 | #define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) 144 | #define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) 145 | #define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) 146 | #define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) 147 | #define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") 148 | 149 | /* 150 | * ICU driver system settings. 151 | */ 152 | #define STM32_ICU_USE_TIM1 FALSE 153 | #define STM32_ICU_USE_TIM2 FALSE 154 | #define STM32_ICU_USE_TIM3 FALSE 155 | #define STM32_ICU_TIM1_IRQ_PRIORITY 3 156 | #define STM32_ICU_TIM2_IRQ_PRIORITY 3 157 | #define STM32_ICU_TIM3_IRQ_PRIORITY 3 158 | 159 | /* 160 | * PWM driver system settings. 161 | */ 162 | #define STM32_PWM_USE_ADVANCED FALSE 163 | #define STM32_PWM_USE_TIM1 FALSE 164 | #define STM32_PWM_USE_TIM2 FALSE 165 | #define STM32_PWM_USE_TIM3 FALSE 166 | #define STM32_PWM_TIM1_IRQ_PRIORITY 3 167 | #define STM32_PWM_TIM2_IRQ_PRIORITY 3 168 | #define STM32_PWM_TIM3_IRQ_PRIORITY 3 169 | 170 | /* 171 | * SERIAL driver system settings. 172 | */ 173 | #define STM32_SERIAL_USE_USART1 TRUE 174 | #define STM32_SERIAL_USE_USART2 FALSE 175 | #define STM32_SERIAL_USART1_PRIORITY 3 176 | #define STM32_SERIAL_USART2_PRIORITY 3 177 | 178 | /* 179 | * SPI driver system settings. 180 | */ 181 | #define STM32_SPI_USE_SPI1 TRUE 182 | #define STM32_SPI_USE_SPI2 FALSE 183 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 184 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 185 | #define STM32_SPI_SPI1_IRQ_PRIORITY 2 186 | #define STM32_SPI_SPI2_IRQ_PRIORITY 2 187 | #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) 188 | #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) 189 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) 190 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) 191 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") 192 | 193 | /* 194 | * ST driver system settings. 195 | */ 196 | #define STM32_ST_IRQ_PRIORITY 2 197 | #define STM32_ST_USE_TIMER 2 198 | 199 | /* 200 | * UART driver system settings. 201 | */ 202 | #define STM32_UART_USE_USART1 FALSE 203 | #define STM32_UART_USE_USART2 FALSE 204 | #define STM32_UART_USART1_IRQ_PRIORITY 3 205 | #define STM32_UART_USART2_IRQ_PRIORITY 3 206 | #define STM32_UART_USART1_DMA_PRIORITY 0 207 | #define STM32_UART_USART2_DMA_PRIORITY 0 208 | #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) 209 | #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) 210 | #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) 211 | #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) 212 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") 213 | 214 | /* 215 | * USB driver system settings. 216 | */ 217 | #define STM32_USB_USE_USB1 TRUE 218 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE 219 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 3 220 | 221 | /* 222 | * WDG driver system settings. 223 | */ 224 | #define STM32_WDG_USE_IWDG FALSE 225 | 226 | #endif /* MCUCONF_H */ 227 | -------------------------------------------------------------------------------- /nanovna.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com 3 | * All rights reserved. 4 | * 5 | * This is free software; you can redistribute it and/or modify 6 | * it under the terms of the GNU General Public License as published by 7 | * the Free Software Foundation; either version 3, or (at your option) 8 | * any later version. 9 | * 10 | * The software is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with GNU Radio; see the file COPYING. If not, write to 17 | * the Free Software Foundation, Inc., 51 Franklin Street, 18 | * Boston, MA 02110-1301, USA. 19 | */ 20 | #ifndef __NANOVNA_H__ 21 | #define __NANOVNA_H__ 22 | 23 | #include 24 | #include 25 | #include "ch.h" 26 | 27 | 28 | //#define __DUMP_CMD__ 29 | #define __SCANRAW_CMD__ 30 | #define __COLOR_CMD__ 31 | 32 | 33 | #if defined(__ICCARM__) 34 | #define __USE_STDIO__ 35 | #define __USE_ATOF__ 36 | #endif //defined(__ICCARM__) 37 | 38 | 39 | /* 40 | * main.c 41 | */ 42 | #define POINT_COUNT 101 43 | #define MARKER_COUNT 4 44 | #define TRACE_COUNT 4 45 | 46 | 47 | extern float measured[2][POINT_COUNT][2]; 48 | 49 | #define CAL_LOAD 0 50 | #define CAL_OPEN 1 51 | #define CAL_SHORT 2 52 | #define CAL_THRU 3 53 | #define CAL_ISOLN 4 54 | 55 | #define CALSTAT_LOAD (1<<0) 56 | #define CALSTAT_OPEN (1<<1) 57 | #define CALSTAT_SHORT (1<<2) 58 | #define CALSTAT_THRU (1<<3) 59 | #define CALSTAT_ISOLN (1<<4) 60 | #define CALSTAT_ES (1<<5) 61 | #define CALSTAT_ER (1<<6) 62 | #define CALSTAT_ET (1<<7) 63 | #define CALSTAT_ED CALSTAT_LOAD 64 | #define CALSTAT_EX CALSTAT_ISOLN 65 | #define CALSTAT_APPLY (1<<8) 66 | #define CALSTAT_INTERPOLATED (1<<9) 67 | 68 | #define ETERM_ED 0 /* error term directivity */ 69 | #define ETERM_ES 1 /* error term source match */ 70 | #define ETERM_ER 2 /* error term refrection tracking */ 71 | #define ETERM_ET 3 /* error term transmission tracking */ 72 | #define ETERM_EX 4 /* error term isolation */ 73 | 74 | #define DOMAIN_MODE (1<<0) 75 | #define DOMAIN_FREQ (0<<0) 76 | #define DOMAIN_TIME (1<<0) 77 | #define TD_FUNC (3<<1) 78 | #define TD_FUNC_BANDPASS (0<<1) 79 | #define TD_FUNC_LOWPASS_IMPULSE (1<<1) 80 | #define TD_FUNC_LOWPASS_STEP (2<<1) 81 | #define TD_WINDOW (3<<3) 82 | #define TD_WINDOW_NORMAL (0<<3) 83 | #define TD_WINDOW_MINIMUM (1<<3) 84 | #define TD_WINDOW_MAXIMUM (2<<3) 85 | 86 | #define FFT_SIZE 256 87 | 88 | void cal_collect(int type); 89 | void cal_done(void); 90 | 91 | enum { 92 | ST_START, ST_STOP, ST_CENTER, ST_SPAN, ST_CW 93 | }; 94 | 95 | void set_sweep_frequency(int type, int32_t frequency); 96 | uint32_t get_sweep_frequency(int type); 97 | 98 | void toggle_sweep(void); 99 | 100 | extern int8_t sweep_enabled; 101 | 102 | /* 103 | * ui.c 104 | */ 105 | extern void ui_init(void); 106 | extern void ui_process(void); 107 | 108 | enum { OP_NONE = 0, OP_LEVER, OP_TOUCH, OP_FREQCHANGE }; 109 | extern uint8_t operation_requested; 110 | 111 | /* 112 | * dsp.c 113 | */ 114 | 115 | // 5ms @ 48kHz 116 | #define AUDIO_BUFFER_LEN 96 117 | 118 | //#define STATE_LEN 32 119 | #define SAMPLE_LEN 48 120 | 121 | #ifdef __DUMP_CMD__ 122 | extern int16_t ref_buf[]; 123 | extern int16_t samp_buf[]; 124 | #endif //__DUMP_CMD__ 125 | 126 | void dsp_process(int16_t *src, size_t len); 127 | void reset_dsp_accumerator(void); 128 | void calculate_gamma(float *gamma); 129 | void fetch_amplitude(float *gamma); 130 | void fetch_amplitude_ref(float *gamma); 131 | 132 | 133 | /* 134 | * tlv320aic3204.c 135 | */ 136 | 137 | extern void tlv320aic3204_init(void); 138 | extern void tlv320aic3204_set_gain(int lgain, int rgain); 139 | extern void tlv320aic3204_select(int channel); 140 | 141 | 142 | /* 143 | * plot.c 144 | */ 145 | #define OFFSETX 15 146 | #define OFFSETY 0 147 | #define WIDTH 291 148 | #define HEIGHT 233 149 | 150 | #define CELLOFFSETX 5 151 | #define AREA_WIDTH_NORMAL (WIDTH + CELLOFFSETX*2) 152 | 153 | extern int area_width; 154 | extern int area_height; 155 | 156 | #define GRIDY 29 157 | 158 | // font 159 | 160 | extern const uint8_t x5x7_bits []; 161 | extern const uint8_t numfont20x22[][22 * 3]; 162 | 163 | #define S_PI "\034" 164 | #define S_MICRO "\035" 165 | #define S_OHM "\036" 166 | #define S_DEGREE "\037" 167 | #define S_LARROW "\032" 168 | #define S_RARROW "\033" 169 | 170 | // trace 171 | 172 | enum { 173 | TRC_LOGMAG, TRC_PHASE, TRC_DELAY, TRC_SMITH, TRC_POLAR, TRC_LINEAR, TRC_SWR, TRC_REAL, TRC_IMAG, TRC_R, TRC_X, TRC_OFF 174 | }; 175 | 176 | // LOGMAG: SCALE, REFPOS, REFVAL 177 | // PHASE: SCALE, REFPOS, REFVAL 178 | // DELAY: SCALE, REFPOS, REFVAL 179 | // SMITH: SCALE, , 180 | // LINMAG: SCALE, REFPOS, REFVAL 181 | // SWR: SCALE, REFPOS, REFVAL 182 | 183 | // Electrical Delay 184 | // Phase 185 | 186 | typedef struct { 187 | uint8_t enabled; 188 | uint8_t type; 189 | uint8_t channel; 190 | uint8_t polar; 191 | float scale; 192 | float refpos; 193 | } trace_t; 194 | 195 | typedef struct { 196 | uint32_t magic; 197 | uint16_t dac_value; 198 | uint16_t grid_color; 199 | uint16_t menu_normal_color; 200 | uint16_t menu_active_color; 201 | uint16_t trace_color[TRACE_COUNT]; 202 | int16_t touch_cal[4]; 203 | int8_t default_loadcal; 204 | uint32_t harmonic_freq_threshold; 205 | int16_t vbat_offset; 206 | int32_t checksum; 207 | } config_t; 208 | 209 | extern config_t config; 210 | 211 | //extern trace_t trace[TRACE_COUNT]; 212 | 213 | void set_trace_type(int t, int type); 214 | void set_trace_channel(int t, int channel); 215 | void set_trace_scale(int t, float scale); 216 | void set_trace_refpos(int t, float refpos); 217 | float get_trace_scale(int t); 218 | float get_trace_refpos(int t); 219 | const char *get_trace_typename(int t); 220 | void draw_battery_status(void); 221 | void draw_pll_lock_error(void); 222 | 223 | void set_electrical_delay(float picoseconds); 224 | float get_electrical_delay(void); 225 | 226 | // marker 227 | 228 | typedef struct { 229 | int8_t enabled; 230 | int16_t index; 231 | uint32_t frequency; 232 | } marker_t; 233 | 234 | //extern marker_t markers[MARKER_COUNT]; 235 | //extern int active_marker; 236 | 237 | void plot_init(void); 238 | void update_grid(void); 239 | void request_to_redraw_grid(void); 240 | void redraw_frame(void); 241 | //void redraw_all(void); 242 | void request_to_draw_cells_behind_menu(void); 243 | void request_to_draw_cells_behind_numeric_input(void); 244 | void redraw_marker(int marker, int update_info); 245 | void trace_get_info(int t, char *buf, int len); 246 | void plot_into_index(float measured[2][POINT_COUNT][2]); 247 | void force_set_markmap(void); 248 | void draw_frequencies(void); 249 | void draw_all(bool flush); 250 | 251 | void draw_cal_status(void); 252 | 253 | void marker_position(int m, int t, int *x, int *y); 254 | int search_nearest_index(int x, int y, int t); 255 | 256 | extern uint16_t redraw_request; 257 | 258 | #define REDRAW_CELLS (1<<0) 259 | #define REDRAW_FREQUENCY (1<<1) 260 | #define REDRAW_CAL_STATUS (1<<2) 261 | #define REDRAW_MARKER (1<<3) 262 | 263 | extern int16_t vbat; 264 | extern bool pll_lock_failed; 265 | 266 | 267 | /* 268 | * ili9341.c 269 | */ 270 | //gggBBBbb RRRrrGGG 271 | #define RGB(r,g,b) ( (((g)&0x1c)<<11) | (((b)&0xf8)<<5) | ((r)&0xf8) | (((g)&0xe0)>>5) ) 272 | #define RGBHEX(hex) ( (((hex)&0x001c00)<<3) | (((hex)&0x0000f8)<<5) | (((hex)&0xf80000)>>16) | (((hex)&0x00e000)>>13) ) 273 | 274 | typedef struct { 275 | uint16_t width; 276 | uint16_t height; 277 | uint16_t scaley; 278 | uint16_t slide; 279 | const uint8_t *bitmap; 280 | } font_t; 281 | 282 | extern const font_t NF20x22; 283 | 284 | extern uint16_t spi_buffer[1024]; 285 | 286 | extern mutex_t mutex_ili9341; 287 | 288 | void ili9341_init(void); 289 | void ili9341_test(int mode); 290 | void ili9341_bulk(int x, int y, int w, int h); 291 | void ili9341_fill(int x, int y, int w, int h, int color); 292 | void ili9341_drawchar_5x7(uint8_t ch, int x, int y, uint16_t fg, uint16_t bg); 293 | void ili9341_drawstring_5x7(const char *str, int x, int y, uint16_t fg, uint16_t bg); 294 | void ili9341_drawchar_size(uint8_t ch, int x, int y, uint16_t fg, uint16_t bg, uint8_t size); 295 | void ili9341_drawstring_size(const char *str, int x, int y, uint16_t fg, uint16_t bg, uint8_t size); 296 | void ili9341_drawfont(uint8_t ch, const font_t *font, int x, int y, uint16_t fg, uint16_t bg); 297 | void ili9341_read_memory(int x, int y, int w, int h, int len, uint16_t* out); 298 | void ili9341_read_memory_continue(int len, uint16_t* out); 299 | void ili9341_line(int x0, int y0, int x1, int y1, uint16_t fg); 300 | 301 | /* 302 | * flash.c 303 | */ 304 | #define SAVEAREA_MAX 5 305 | 306 | typedef struct { 307 | uint32_t magic; 308 | int32_t _frequency0; // start or center 309 | int32_t _frequency1; // stop or span 310 | uint16_t _sweep_points; 311 | uint16_t _cal_status; 312 | 313 | uint32_t _frequencies[POINT_COUNT]; 314 | float _cal_data[5][POINT_COUNT][2]; 315 | float _electrical_delay; // picoseconds 316 | 317 | trace_t _trace[TRACE_COUNT]; 318 | marker_t _markers[MARKER_COUNT]; 319 | int _active_marker; 320 | uint8_t _domain_mode; /* 0bxxxxxffm : where ff: TD_FUNC m: DOMAIN_MODE */ 321 | uint8_t _velocity_factor; // % 322 | 323 | int32_t checksum; 324 | } properties_t; 325 | 326 | #define CONFIG_MAGIC 0xC0FEFEED 327 | 328 | extern int16_t lastsaveid; 329 | extern properties_t *active_props; 330 | extern properties_t current_props; 331 | 332 | extern int8_t previous_marker; 333 | extern bool sweep_avg; 334 | 335 | #define frequency0 current_props._frequency0 336 | #define frequency1 current_props._frequency1 337 | #define sweep_points current_props._sweep_points 338 | #define cal_status current_props._cal_status 339 | #define frequencies current_props._frequencies 340 | #define cal_data active_props->_cal_data 341 | #define electrical_delay current_props._electrical_delay 342 | 343 | #define trace current_props._trace 344 | #define markers current_props._markers 345 | #define active_marker current_props._active_marker 346 | #define domain_mode current_props._domain_mode 347 | #define velocity_factor current_props._velocity_factor 348 | 349 | int caldata_save(int id); 350 | int caldata_recall(int id); 351 | const properties_t* caldata_ref(int id); 352 | 353 | int config_save(void); 354 | int config_recall(void); 355 | 356 | void clear_all_config_prop_data(void); 357 | 358 | /* 359 | * ui.c 360 | */ 361 | 362 | typedef struct { 363 | int8_t digit; /* 0~5 */ 364 | int8_t digit_mode; 365 | int8_t current_trace; /* 0..3 */ 366 | uint32_t value; // for editing at numeric input area 367 | uint32_t previous_value; 368 | } uistat_t; 369 | 370 | extern uistat_t uistat; 371 | 372 | void ui_init(void); 373 | void ui_show(void); 374 | void ui_hide(void); 375 | 376 | extern uint8_t operation_requested; 377 | 378 | void touch_start_watchdog(void); 379 | void touch_position(int *x, int *y); 380 | void handle_touch_interrupt(void); 381 | 382 | #define TOUCH_THRESHOLD 2000 383 | 384 | void touch_cal_exec(void); 385 | void touch_draw_test(void); 386 | void enter_dfu(void); 387 | 388 | /* 389 | * adc.c 390 | */ 391 | 392 | void adc_init(void); 393 | uint16_t adc_single_read(ADC_TypeDef *adc, uint32_t chsel); 394 | void adc_start_analog_watchdogd(ADC_TypeDef *adc, uint32_t chsel); 395 | void adc_stop(ADC_TypeDef *adc); 396 | int16_t adc_vbat_read(ADC_TypeDef *adc); 397 | int16_t adc_tjun_read(ADC_TypeDef *adc); 398 | 399 | 400 | /* 401 | * misclinous 402 | */ 403 | #define PULSE { palClearPad(GPIOC, GPIOC_LED); palSetPad(GPIOC, GPIOC_LED);} 404 | 405 | uint8_t vbat2percent(int16_t vbat); 406 | 407 | #ifdef __USE_ATOF__ 408 | #define my_atof(a) atof(a) 409 | #else 410 | extern double my_atof(const char *p); 411 | #endif //__USE_ATOF__ 412 | 413 | #endif //__NANOVNA_H__ 414 | -------------------------------------------------------------------------------- /numfont20x22.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2019, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com 3 | * All rights reserved. 4 | * 5 | * Converted to hex by @qrp73 [ https://github.com/qrp73 ] 6 | * 7 | * This is free software; you can redistribute it and/or modify 8 | * it under the terms of the GNU General Public License as published by 9 | * the Free Software Foundation; either version 3, or (at your option) 10 | * any later version. 11 | * 12 | * The software is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU General Public License 18 | * along with GNU Radio; see the file COPYING. If not, write to 19 | * the Free Software Foundation, Inc., 51 Franklin Street, 20 | * Boston, MA 02110-1301, USA. 21 | */ 22 | 23 | #include 24 | 25 | const uint8_t numfont20x22[][22 * 3] = { 26 | { // 0 27 | 0x07, 0xfc, 0x08, 28 | 0x1f, 0xff, 0x00, 29 | 0x3f, 0xff, 0x80, 30 | 0x7f, 0xff, 0xc0, 31 | 0x7e, 0x0f, 0xc0, 32 | 0xfc, 0x07, 0xe0, 33 | 0xf8, 0x03, 0xe0, 34 | 0xf8, 0x03, 0xe0, 35 | 36 | 0xf8, 0x03, 0xe0, 37 | 0xf8, 0x03, 0xe0, 38 | 0xf8, 0x03, 0xe0, 39 | 0xf8, 0x03, 0xe0, 40 | 0xf8, 0x03, 0xe0, 41 | 0xf8, 0x03, 0xe0, 42 | 0xf8, 0x03, 0xe0, 43 | 0xf8, 0x03, 0xe0, 44 | 45 | 0xfc, 0x07, 0xe0, 46 | 0x7e, 0x0f, 0xc0, 47 | 0x7f, 0xff, 0xc0, 48 | 0x3f, 0xff, 0x80, 49 | 0x1f, 0xff, 0x00, 50 | 0x07, 0xfc, 0x08, 51 | }, 52 | { // 1 53 | 0x00, 0x7c, 0x08, 54 | 0x00, 0xfc, 0x00, 55 | 0x00, 0xfc, 0x00, 56 | 0x01, 0xfc, 0x00, 57 | 0x07, 0xfc, 0x00, 58 | 0x1f, 0xfc, 0x00, 59 | 0x1f, 0xfc, 0x00, 60 | 0x1f, 0xfc, 0x00, 61 | 62 | 0x1f, 0x7c, 0x00, 63 | 0x1f, 0x7c, 0x00, 64 | 0x00, 0x7c, 0x00, 65 | 0x00, 0x7c, 0x00, 66 | 0x00, 0x7c, 0x00, 67 | 0x00, 0x7c, 0x00, 68 | 0x00, 0x7c, 0x00, 69 | 0x00, 0x7c, 0x00, 70 | 71 | 0x00, 0x7c, 0x00, 72 | 0x00, 0x7c, 0x00, 73 | 0x00, 0x7c, 0x00, 74 | 0x00, 0x7c, 0x00, 75 | 0x00, 0x7c, 0x00, 76 | 0x00, 0x7c, 0x00, 77 | }, 78 | { // 2 79 | 0x03, 0xf8, 0x08, 80 | 0x0f, 0xfe, 0x00, 81 | 0x3f, 0xff, 0x80, 82 | 0x7f, 0xff, 0xc0, 83 | 0x7e, 0x0f, 0xc0, 84 | 0xfc, 0x07, 0xe0, 85 | 0xf8, 0x03, 0xe0, 86 | 0xf8, 0x07, 0xe0, 87 | 88 | 0x00, 0x0f, 0xe0, 89 | 0x00, 0x3f, 0xc0, 90 | 0x00, 0xff, 0x80, 91 | 0x03, 0xfe, 0x00, 92 | 0x0f, 0xf8, 0x00, 93 | 0x1f, 0xe0, 0x00, 94 | 0x3f, 0x80, 0x00, 95 | 0x7f, 0x00, 0x00, 96 | 97 | 0xfe, 0x00, 0x00, 98 | 0xfc, 0x00, 0x00, 99 | 0xff, 0xff, 0xe0, 100 | 0xff, 0xff, 0xe0, 101 | 0xff, 0xff, 0xe0, 102 | 0xff, 0xff, 0xe0, 103 | }, 104 | { // 3 105 | 0x03, 0xf8, 0x08, 106 | 0x0f, 0xfe, 0x00, 107 | 0x3f, 0xff, 0x80, 108 | 0x7f, 0xff, 0xc0, 109 | 0x7e, 0x0f, 0xc0, 110 | 0xfc, 0x07, 0xe0, 111 | 0xf8, 0x03, 0xe0, 112 | 0xf8, 0x07, 0xe0, 113 | 114 | 0x00, 0x0f, 0xc0, 115 | 0x00, 0xff, 0xc0, 116 | 0x00, 0xff, 0x00, 117 | 0x00, 0xff, 0x00, 118 | 0x00, 0xff, 0x80, 119 | 0x00, 0x0f, 0xc0, 120 | 0xf8, 0x03, 0xe0, 121 | 0xf8, 0x03, 0xe0, 122 | 123 | 0xf8, 0x03, 0xe0, 124 | 0xfe, 0x07, 0xe0, 125 | 0x7f, 0xff, 0xc0, 126 | 0x3f, 0xff, 0x80, 127 | 0x0f, 0xff, 0x00, 128 | 0x01, 0xf8, 0x08, 129 | }, 130 | { // 4 131 | 0x00, 0x0f, 0x08, 132 | 0x00, 0x1f, 0x00, 133 | 0x00, 0x3f, 0x00, 134 | 0x00, 0x7f, 0x00, 135 | 0x00, 0xff, 0x00, 136 | 0x01, 0xff, 0x00, 137 | 0x03, 0xff, 0x00, 138 | 0x07, 0xff, 0x00, 139 | 140 | 0x0f, 0xdf, 0x00, 141 | 0x1f, 0x9f, 0x00, 142 | 0x3f, 0x1f, 0x00, 143 | 0x7e, 0x1f, 0x00, 144 | 0xfc, 0x1f, 0x00, 145 | 0xf8, 0x1f, 0x00, 146 | 0xff, 0xff, 0xe0, 147 | 0xff, 0xff, 0xe0, 148 | 149 | 0xff, 0xff, 0xe0, 150 | 0xff, 0xff, 0xe0, 151 | 0x00, 0x1f, 0x00, 152 | 0x00, 0x1f, 0x00, 153 | 0x00, 0x1f, 0x00, 154 | 0x00, 0x1f, 0x00, 155 | }, 156 | { // 5 157 | 0xff, 0xff, 0xe8, 158 | 0xff, 0xff, 0xe0, 159 | 0xff, 0xff, 0xe0, 160 | 0xff, 0xff, 0xe0, 161 | 0xf0, 0x00, 0x00, 162 | 0xf0, 0x00, 0x00, 163 | 0xf0, 0x00, 0x00, 164 | 0xf3, 0xf8, 0x00, 165 | 166 | 0xff, 0xff, 0x00, 167 | 0xff, 0xff, 0x80, 168 | 0xff, 0xff, 0xc0, 169 | 0xfe, 0x0f, 0xc0, 170 | 0x00, 0x07, 0xe0, 171 | 0x00, 0x03, 0xe0, 172 | 0x00, 0x03, 0xe0, 173 | 0xf8, 0x03, 0xe0, 174 | 175 | 0xf8, 0x07, 0xe0, 176 | 0xfe, 0x1f, 0xe0, 177 | 0x7f, 0xff, 0xc0, 178 | 0x3f, 0xff, 0x80, 179 | 0x0f, 0xff, 0x00, 180 | 0x01, 0xf8, 0x08, 181 | }, 182 | { // 6 183 | 0x03, 0xfe, 0x08, 184 | 0x1f, 0xff, 0x80, 185 | 0x3f, 0xff, 0xc0, 186 | 0x7f, 0xff, 0xc0, 187 | 0x7e, 0x07, 0xc0, 188 | 0xfc, 0x00, 0x00, 189 | 0xf8, 0x00, 0x00, 190 | 0xf8, 0x00, 0x00, 191 | 192 | 0xfb, 0xf8, 0x00, 193 | 0xff, 0xff, 0x00, 194 | 0xff, 0xff, 0x80, 195 | 0xff, 0xff, 0xc0, 196 | 0xfe, 0x1f, 0xc0, 197 | 0xfc, 0x07, 0xe0, 198 | 0xf8, 0x03, 0xe0, 199 | 0xf8, 0x03, 0xe0, 200 | 201 | 0xfc, 0x07, 0xe0, 202 | 0xfe, 0x0f, 0xe0, 203 | 0x7f, 0xff, 0xc0, 204 | 0x3f, 0xff, 0x80, 205 | 0x0f, 0xff, 0x00, 206 | 0x01, 0xf8, 0x08, 207 | }, 208 | { // 7 209 | 0xff, 0xff, 0xe8, 210 | 0xff, 0xff, 0xe0, 211 | 0xff, 0xff, 0xe0, 212 | 0xff, 0xff, 0xe0, 213 | 0x00, 0x07, 0xe0, 214 | 0x00, 0x0f, 0xc0, 215 | 0x00, 0x1f, 0x80, 216 | 0x00, 0x3f, 0x00, 217 | 218 | 0x00, 0x7e, 0x00, 219 | 0x00, 0x7c, 0x00, 220 | 0x00, 0xfc, 0x00, 221 | 0x00, 0xf8, 0x00, 222 | 0x01, 0xf8, 0x00, 223 | 0x01, 0xf0, 0x00, 224 | 0x01, 0xf0, 0x00, 225 | 0x03, 0xf0, 0x00, 226 | 227 | 0x03, 0xe0, 0x00, 228 | 0x03, 0xe0, 0x00, 229 | 0x03, 0xe0, 0x00, 230 | 0x03, 0xe0, 0x00, 231 | 0x03, 0xe0, 0x00, 232 | 0x03, 0xe0, 0x00, 233 | }, 234 | { // 8 235 | 0x03, 0xf8, 0x08, 236 | 0x0f, 0xfe, 0x00, 237 | 0x3f, 0xff, 0x80, 238 | 0x7f, 0xff, 0xc0, 239 | 0x7e, 0x0f, 0xc0, 240 | 0xfc, 0x07, 0xe0, 241 | 0xf8, 0x03, 0xe0, 242 | 0x7c, 0x07, 0xc0, 243 | 244 | 0x7e, 0x0f, 0xc0, 245 | 0x3f, 0xff, 0x80, 246 | 0x1f, 0xff, 0x00, 247 | 0x1f, 0xff, 0x00, 248 | 0x3f, 0xff, 0x80, 249 | 0x7e, 0x0f, 0xc0, 250 | 0xfc, 0x07, 0xe0, 251 | 0xf8, 0x03, 0xe0, 252 | 253 | 0xf8, 0x03, 0xe0, 254 | 0xfc, 0x07, 0xe0, 255 | 0x7f, 0xff, 0xc0, 256 | 0x3f, 0xff, 0x80, 257 | 0x1f, 0xff, 0x00, 258 | 0x07, 0xfc, 0x08, 259 | }, 260 | { // 9 261 | 0x03, 0xf8, 0x08, 262 | 0x0f, 0xfe, 0x00, 263 | 0x3f, 0xff, 0x80, 264 | 0x7f, 0xff, 0xc0, 265 | 0x7e, 0x0f, 0xc0, 266 | 0xfc, 0x07, 0xe0, 267 | 0xf8, 0x03, 0xe0, 268 | 0xf8, 0x03, 0xe0, 269 | 270 | 0xfc, 0x03, 0xe0, 271 | 0xfe, 0x07, 0xe0, 272 | 0x7f, 0xff, 0xe0, 273 | 0x3f, 0xff, 0xe0, 274 | 0x0f, 0xff, 0xe0, 275 | 0x03, 0xff, 0xe0, 276 | 0x00, 0x03, 0xe0, 277 | 0x00, 0x03, 0xe0, 278 | 279 | 0xf8, 0x07, 0xe0, 280 | 0xfc, 0x0f, 0xc0, 281 | 0xff, 0xff, 0xc0, 282 | 0x7f, 0xff, 0x80, 283 | 0x3f, 0xff, 0x00, 284 | 0x0f, 0xfc, 0x08, 285 | }, 286 | { // . (period) = \001 287 | 0x00, 0x00, 0x08, 288 | 0x00, 0x00, 0x00, 289 | 0x00, 0x00, 0x00, 290 | 0x00, 0x00, 0x00, 291 | 0x00, 0x00, 0x00, 292 | 0x00, 0x00, 0x00, 293 | 0x00, 0x00, 0x00, 294 | 0x00, 0x00, 0x00, 295 | 296 | 0x00, 0x00, 0x00, 297 | 0x00, 0x00, 0x00, 298 | 0x00, 0x00, 0x00, 299 | 0x00, 0x00, 0x00, 300 | 0x00, 0x00, 0x00, 301 | 0x00, 0x00, 0x00, 302 | 0x00, 0x00, 0x00, 303 | 0x00, 0x00, 0x00, 304 | 305 | 0x00, 0x00, 0x00, 306 | 0x01, 0xc0, 0x00, 307 | 0x03, 0xe0, 0x00, 308 | 0x03, 0xe0, 0x00, 309 | 0x01, 0xc0, 0x00, 310 | 0x00, 0x00, 0x08, 311 | }, 312 | { // - (minus) = \002 313 | 0x00, 0x00, 0x08, 314 | 0x00, 0x00, 0x00, 315 | 0x00, 0x00, 0x00, 316 | 0x00, 0x00, 0x00, 317 | 0x00, 0x00, 0x00, 318 | 0x00, 0x00, 0x00, 319 | 0x00, 0x00, 0x00, 320 | 0x00, 0x00, 0x00, 321 | 322 | 0x00, 0x00, 0x00, 323 | 0x00, 0x00, 0x00, 324 | 0x3f, 0xff, 0xc0, 325 | 0x3f, 0xff, 0xc0, 326 | 0x3f, 0xff, 0xc0, 327 | 0x3f, 0xff, 0xc0, 328 | 0x00, 0x00, 0x00, 329 | 0x00, 0x00, 0x00, 330 | 331 | 0x00, 0x00, 0x00, 332 | 0x00, 0x00, 0x00, 333 | 0x00, 0x00, 0x00, 334 | 0x00, 0x00, 0x00, 335 | 0x00, 0x00, 0x00, 336 | 0x00, 0x00, 0x08, 337 | }, 338 | { // x1 339 | 0x00, 0x00, 0x08, 340 | 0x00, 0x00, 0x00, 341 | 0x00, 0x00, 0x00, 342 | 0x00, 0x00, 0x00, 343 | 0x00, 0x00, 0x00, 344 | 0x00, 0x01, 0xe0, 345 | 0x00, 0x03, 0xe0, 346 | 0x00, 0x07, 0xe0, 347 | 348 | 0x00, 0x0f, 0xe0, 349 | 0x00, 0x0f, 0xe0, 350 | 0x00, 0x03, 0xe0, 351 | 0x00, 0x03, 0xe0, 352 | 0x30, 0x63, 0xe0, 353 | 0xf8, 0xf3, 0xe0, 354 | 0x7d, 0xe3, 0xe0, 355 | 0x1f, 0xc3, 0xe0, 356 | 357 | 0x0f, 0x83, 0xe0, 358 | 0x0f, 0x83, 0xe0, 359 | 0x1f, 0xc3, 0xe0, 360 | 0x3d, 0xe3, 0xe0, 361 | 0x78, 0xf3, 0xe0, 362 | 0x30, 0x63, 0xe8, 363 | }, 364 | { // k 365 | 0x7c, 0x00, 0x08, 366 | 0x7c, 0x00, 0x00, 367 | 0x7c, 0x00, 0x00, 368 | 0x7c, 0x00, 0x00, 369 | 0x7c, 0x00, 0x00, 370 | 0x7c, 0x00, 0x00, 371 | 0x7c, 0x1f, 0x80, 372 | 0x7c, 0x3f, 0x00, 373 | 374 | 0x7c, 0x7e, 0x00, 375 | 0x7c, 0xfc, 0x00, 376 | 0x7d, 0xf8, 0x00, 377 | 0x7f, 0xf0, 0x00, 378 | 0x7f, 0xe0, 0x00, 379 | 0x7f, 0xc0, 0x00, 380 | 0x7f, 0xc0, 0x00, 381 | 0x7f, 0xe0, 0x00, 382 | 383 | 0x7f, 0xf0, 0x00, 384 | 0x7d, 0xf8, 0x00, 385 | 0x7c, 0xfc, 0x00, 386 | 0x7c, 0x7e, 0x00, 387 | 0x7c, 0x3f, 0x00, 388 | 0x7c, 0x1f, 0x88, 389 | }, 390 | { // M 391 | 0xf8, 0x03, 0xe8, 392 | 0xf8, 0x03, 0xe0, 393 | 0xfc, 0x07, 0xe0, 394 | 0xfc, 0x07, 0xe0, 395 | 0xfe, 0x0f, 0xe0, 396 | 0xfe, 0x0f, 0xe0, 397 | 0xff, 0x1f, 0xe0, 398 | 0xff, 0x1f, 0xe0, 399 | 400 | 0xff, 0xbf, 0xe0, 401 | 0xff, 0xbf, 0xe0, 402 | 0xff, 0xff, 0xe0, 403 | 0xff, 0xff, 0xe0, 404 | 0xff, 0xff, 0xe0, 405 | 0xff, 0xff, 0xe0, 406 | 0xfb, 0xfb, 0xe0, 407 | 0xfb, 0xfb, 0xe0, 408 | 409 | 0xf9, 0xf3, 0xe0, 410 | 0xf9, 0xf3, 0xe0, 411 | 0xf8, 0xe3, 0xe0, 412 | 0xf8, 0xe3, 0xe0, 413 | 0xf8, 0x03, 0xe0, 414 | 0xf8, 0x03, 0xe8, 415 | }, 416 | { // G 417 | 0x07, 0xfc, 0x08, 418 | 0x1f, 0xff, 0x00, 419 | 0x3f, 0xff, 0x80, 420 | 0x7f, 0xff, 0xc0, 421 | 0x7e, 0x0f, 0xc0, 422 | 0xfc, 0x07, 0xe0, 423 | 0xf8, 0x03, 0xe0, 424 | 0xf8, 0x03, 0xe0, 425 | 426 | 0xf8, 0x00, 0x00, 427 | 0xf8, 0x00, 0x00, 428 | 0xf8, 0x00, 0x00, 429 | 0xf8, 0x00, 0x00, 430 | 0xf8, 0x1f, 0xe0, 431 | 0xf8, 0x1f, 0xe0, 432 | 0xf8, 0x1f, 0xe0, 433 | 0xf8, 0x1f, 0xe0, 434 | 435 | 0xfc, 0x07, 0xe0, 436 | 0x7e, 0x0f, 0xe0, 437 | 0x7f, 0xff, 0xe0, 438 | 0x3f, 0xff, 0xe0, 439 | 0x1f, 0xff, 0xe0, 440 | 0x07, 0xfb, 0xe8, 441 | 442 | }, 443 | { // BS 444 | 0x00, 0x00, 0x08, 445 | 0x00, 0x20, 0x00, 446 | 0x00, 0x60, 0x00, 447 | 0x00, 0xe0, 0x00, 448 | 0x01, 0xe0, 0x00, 449 | 0x03, 0xe0, 0x00, 450 | 0x07, 0xff, 0xe0, 451 | 0x0f, 0xff, 0xe0, 452 | 453 | 0x1f, 0xff, 0xe0, 454 | 0x3f, 0xff, 0xe0, 455 | 0x7f, 0xff, 0xe0, 456 | 0xff, 0xff, 0xe0, 457 | 0x7f, 0xff, 0xe0, 458 | 0x3f, 0xff, 0xe0, 459 | 0x1f, 0xff, 0xe0, 460 | 0x0f, 0xff, 0xe0, 461 | 462 | 0x07, 0xff, 0xe0, 463 | 0x03, 0xe0, 0x00, 464 | 0x01, 0xe0, 0x00, 465 | 0x00, 0xe0, 0x00, 466 | 0x00, 0x60, 0x00, 467 | 0x00, 0x20, 0x08, 468 | }, 469 | { // infinity = \003 470 | 0x00, 0x00, 0x08, 471 | 0x00, 0x00, 0x00, 472 | 0x00, 0x00, 0x00, 473 | 0x00, 0x00, 0x00, 474 | 0x00, 0x00, 0x00, 475 | 0x07, 0x8f, 0x00, 476 | 0x0f, 0xdf, 0x80, 477 | 0x1f, 0xdf, 0xc0, 478 | 479 | 0x38, 0xf1, 0xc0, 480 | 0x78, 0xe1, 0xe0, 481 | 0x70, 0x60, 0xe0, 482 | 0x70, 0x60, 0xe0, 483 | 0x70, 0x60, 0xe0, 484 | 0x70, 0x60, 0xe0, 485 | 0x78, 0x71, 0xe0, 486 | 0x38, 0xf1, 0xc0, 487 | 488 | 0x3f, 0xbf, 0xc0, 489 | 0x1f, 0xbf, 0x80, 490 | 0x0f, 0x1e, 0x00, 491 | 0x00, 0x00, 0x00, 492 | 0x00, 0x00, 0x00, 493 | 0x00, 0x00, 0x08, 494 | }, 495 | { // dB = \004 496 | 0x00, 0x00, 0x00, 497 | 0x00, 0x00, 0x00, 498 | 0x00, 0x00, 0x00, 499 | 0x00, 0x00, 0x00, 500 | 0x00, 0x00, 0x00, 501 | 0x00, 0x00, 0x00, 502 | 0x00, 0x00, 0x00, 503 | 0x03, 0xbf, 0x00, 504 | 505 | 0x03, 0xbf, 0x80, 506 | 0x03, 0xbf, 0xc0, 507 | 0x03, 0xb9, 0xe0, 508 | 0x03, 0xb8, 0xe0, 509 | 0x3f, 0xb9, 0xe0, 510 | 0x7f, 0xbf, 0xe0, 511 | 0xff, 0xbf, 0x80, 512 | 0xf3, 0xbf, 0xc0, 513 | 514 | 0xe3, 0xb9, 0xe0, 515 | 0xe3, 0xb8, 0xe0, 516 | 0xf3, 0xb9, 0xe0, 517 | 0x7f, 0xbf, 0xe0, 518 | 0x7f, 0xbf, 0xc0, 519 | 0x3d, 0xbf, 0x08, 520 | }, 521 | { // plus/minus = \005 522 | 0x00, 0x00, 0x00, 523 | 0x00, 0x00, 0x00, 524 | 0x00, 0x00, 0x00, 525 | 0x00, 0x00, 0x00, 526 | 0x00, 0x00, 0x00, 527 | 0x00, 0x00, 0x00, 528 | 0x00, 0x00, 0x00, 529 | 0x00, 0x18, 0x00, 530 | 531 | 0x1c, 0x18, 0x00, 532 | 0x1c, 0x18, 0x00, 533 | 0x1c, 0x30, 0x00, 534 | 0xff, 0xb7, 0xf0, 535 | 0xff, 0xb7, 0xf0, 536 | 0xff, 0xb7, 0xf0, 537 | 0x1c, 0x30, 0x00, 538 | 0x1c, 0x60, 0x00, 539 | 540 | 0x1c, 0x60, 0x00, 541 | 0x00, 0x60, 0x00, 542 | 0x00, 0x00, 0x00, 543 | 0x00, 0x00, 0x00, 544 | 0x00, 0x00, 0x00, 545 | 0x00, 0x00, 0x08, 546 | }, 547 | { // keypad = \007 548 | 0x00, 0x00, 0x00, 549 | 0x3d, 0xef, 0x00, 550 | 0x3d, 0xef, 0x00, 551 | 0x3d, 0xef, 0x00, 552 | 0x3d, 0xef, 0x00, 553 | 0x00, 0x00, 0x00, 554 | 0x3d, 0xef, 0x00, 555 | 0x3d, 0xef, 0x00, 556 | 557 | 0x3d, 0xef, 0x00, 558 | 0x3d, 0xef, 0x00, 559 | 0x00, 0x00, 0x00, 560 | 0x3d, 0xef, 0x00, 561 | 0x3d, 0xef, 0x00, 562 | 0x3d, 0xef, 0x00, 563 | 0x3d, 0xef, 0x00, 564 | 0x00, 0x00, 0x00, 565 | 566 | 0x3d, 0xef, 0x00, 567 | 0x3d, 0xef, 0x00, 568 | 0x3d, 0xef, 0x00, 569 | 0x3d, 0xef, 0x00, 570 | 0x00, 0x00, 0x00, 571 | 0x00, 0x00, 0x08, 572 | }, 573 | { // nano 574 | 0x00, 0x00, 0x00, 575 | 0x00, 0x00, 0x00, 576 | 0x00, 0x00, 0x00, 577 | 0x00, 0x00, 0x00, 578 | 0x00, 0x00, 0x00, 579 | 0x00, 0x00, 0x00, 580 | 0x00, 0x00, 0x00, 581 | 0x00, 0x00, 0x00, 582 | 583 | 0x79, 0xfc, 0x00, 584 | 0x7f, 0xff, 0x00, 585 | 0x7f, 0xff, 0x80, 586 | 0x7f, 0xff, 0x80, 587 | 0x7e, 0x0f, 0xc0, 588 | 0x7c, 0x07, 0xc0, 589 | 0x78, 0x03, 0xc0, 590 | 0x78, 0x03, 0xc0, 591 | 592 | 0x78, 0x03, 0xc0, 593 | 0x78, 0x03, 0xc0, 594 | 0x78, 0x03, 0xc0, 595 | 0x78, 0x03, 0xc0, 596 | 0x78, 0x03, 0xc0, 597 | 0x78, 0x03, 0xc8, 598 | }, 599 | { // pico 600 | 0x00, 0x00, 0x00, 601 | 0x00, 0x00, 0x00, 602 | 0x00, 0x00, 0x00, 603 | 0x00, 0x00, 0x00, 604 | 0x00, 0x00, 0x00, 605 | 0x00, 0x00, 0x00, 606 | 0x3d, 0xfc, 0x00, 607 | 0x3f, 0xff, 0x00, 608 | 609 | 0x3f, 0xff, 0x80, 610 | 0x3f, 0xff, 0xc0, 611 | 0x3f, 0x07, 0xc0, 612 | 0x3e, 0x03, 0xc0, 613 | 0x3e, 0x03, 0xc0, 614 | 0x3e, 0x03, 0xc0, 615 | 0x3f, 0x07, 0xc0, 616 | 0x3f, 0xff, 0xc0, 617 | 0x3f, 0xff, 0x80, 618 | 619 | 0x3f, 0xff, 0x00, 620 | 0x3d, 0xfc, 0x00, 621 | 0x3c, 0x00, 0x00, 622 | 0x3c, 0x00, 0x00, 623 | 0x3c, 0x00, 0x08, 624 | }, 625 | }; 626 | 627 | -------------------------------------------------------------------------------- /prog.sh: -------------------------------------------------------------------------------- 1 | #! /bin/sh 2 | DFU_UTIL=../chibios-stm/dfu-util/src/dfu-util 3 | $DFU_UTIL -d 0483:df11 -a 0 -s 0x08000000:leave -D build/ch.bin 4 | -------------------------------------------------------------------------------- /si5351.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com 3 | * All rights reserved. 4 | * 5 | * This is free software; you can redistribute it and/or modify 6 | * it under the terms of the GNU General Public License as published by 7 | * the Free Software Foundation; either version 3, or (at your option) 8 | * any later version. 9 | * 10 | * The software is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with GNU Radio; see the file COPYING. If not, write to 17 | * the Free Software Foundation, Inc., 51 Franklin Street, 18 | * Boston, MA 02110-1301, USA. 19 | */ 20 | #include "hal.h" 21 | #include "nanovna.h" 22 | #include "si5351.h" 23 | 24 | #define SI5351_I2C_ADDR (0x60<<1) 25 | 26 | static bool si5351_bulk_read(uint8_t reg, uint8_t* buf, int len) 27 | { 28 | int addr = SI5351_I2C_ADDR>>1; 29 | i2cAcquireBus(&I2CD1); 30 | msg_t mr = i2cMasterTransmitTimeout(&I2CD1, addr, ®, 1, buf, len, 1000); 31 | i2cReleaseBus(&I2CD1); 32 | return mr == MSG_OK; 33 | } 34 | 35 | static bool si5351_write(uint8_t reg, uint8_t dat) 36 | { 37 | int addr = SI5351_I2C_ADDR>>1; 38 | uint8_t buf[] = { reg, dat }; 39 | i2cAcquireBus(&I2CD1); 40 | msg_t mr = i2cMasterTransmitTimeout(&I2CD1, addr, buf, 2, NULL, 0, 1000); 41 | i2cReleaseBus(&I2CD1); 42 | return mr == MSG_OK; 43 | } 44 | 45 | static bool si5351_bulk_write(const uint8_t *buf, int len) 46 | { 47 | int addr = SI5351_I2C_ADDR>>1; 48 | i2cAcquireBus(&I2CD1); 49 | msg_t mr = i2cMasterTransmitTimeout(&I2CD1, addr, buf, len, NULL, 0, 1000); 50 | i2cReleaseBus(&I2CD1); 51 | return mr == MSG_OK; 52 | } 53 | 54 | // register addr, length, data, ... 55 | static const uint8_t si5351_configs[] = { 56 | 2, SI5351_REG_3_OUTPUT_ENABLE_CONTROL, 0xff, 57 | 4, SI5351_REG_16_CLK0_CONTROL, SI5351_CLK_POWERDOWN, SI5351_CLK_POWERDOWN, SI5351_CLK_POWERDOWN, 58 | 2, SI5351_REG_183_CRYSTAL_LOAD, SI5351_CRYSTAL_LOAD_8PF, 59 | // setup PLL (26MHz * 32 = 832MHz, 32/2-2=14) 60 | 9, SI5351_REG_26_PLL_A, /*P3*/0, 1, /*P1*/0, 14, 0, /*P3/P2*/0, 0, 0, 61 | // RESET PLL 62 | 2, SI5351_REG_177_PLL_RESET, SI5351_PLL_RESET_A | SI5351_PLL_RESET_B, 63 | // setup multisynth (832MHz / 104 = 8MHz, 104/2-2=50) 64 | 9, SI5351_REG_58_MULTISYNTH2, /*P3*/0, 1, /*P1*/0, 50, 0, /*P2|P3*/0, 0, 0, 65 | 2, SI5351_REG_18_CLK2_CONTROL, SI5351_CLK_DRIVE_STRENGTH_2MA | SI5351_CLK_INPUT_MULTISYNTH_N | SI5351_CLK_INTEGER_MODE, 66 | 2, SI5351_REG_3_OUTPUT_ENABLE_CONTROL, 0, 67 | 0 // sentinel 68 | }; 69 | 70 | static bool si5351_wait_ready(void) 71 | { 72 | uint8_t status = 0xff; 73 | systime_t start = chVTGetSystemTime(); 74 | systime_t end = start + MS2ST(1000); // 1000 ms timeout 75 | while (chVTIsSystemTimeWithin(start, end)) 76 | { 77 | if(!si5351_bulk_read(0, &status, 1)) 78 | status = 0xff; // comm timeout 79 | if ((status & 0x80) == 0) 80 | return true; 81 | } 82 | return false; 83 | } 84 | 85 | static void si5351_wait_pll_lock(void) 86 | { 87 | systime_t start = chVTGetSystemTime(); 88 | uint8_t status = 0xff; 89 | if(!si5351_bulk_read(0, &status, 1)) 90 | status = 0xff; // comm timeout 91 | if ((status & 0x60) == 0) 92 | return; 93 | systime_t end = start + MS2ST(100); // 100 ms timeout 94 | while (chVTIsSystemTimeWithin(start, end)) 95 | { 96 | if(!si5351_bulk_read(0, &status, 1)) 97 | status = 0xff; // comm timeout 98 | if ((status & 0x60) == 0) 99 | return; 100 | } 101 | pll_lock_failed = true; 102 | } 103 | 104 | bool si5351_init(void) 105 | { 106 | if (!si5351_wait_ready()) 107 | return false; 108 | const uint8_t *p = si5351_configs; 109 | while (*p) { 110 | uint8_t len = *p++; 111 | if (!si5351_bulk_write(p, len)) 112 | return false; 113 | p += len; 114 | } 115 | return true; 116 | } 117 | 118 | static void si5351_disable_output(void) 119 | { 120 | uint8_t reg[4]; 121 | si5351_write(SI5351_REG_3_OUTPUT_ENABLE_CONTROL, 0xff); 122 | reg[0] = SI5351_REG_16_CLK0_CONTROL; 123 | reg[1] = SI5351_CLK_POWERDOWN; 124 | reg[2] = SI5351_CLK_POWERDOWN; 125 | reg[3] = SI5351_CLK_POWERDOWN; 126 | si5351_bulk_write(reg, 4); 127 | } 128 | 129 | static void si5351_enable_output(void) 130 | { 131 | si5351_write(SI5351_REG_3_OUTPUT_ENABLE_CONTROL, 0x00); 132 | } 133 | 134 | static void si5351_reset_pll(void) 135 | { 136 | //si5351_write(SI5351_REG_177_PLL_RESET, SI5351_PLL_RESET_A | SI5351_PLL_RESET_B); 137 | si5351_write(SI5351_REG_177_PLL_RESET, 0xAC); 138 | } 139 | 140 | static void si5351_setupPLL( 141 | uint8_t pll, /* SI5351_PLL_A or SI5351_PLL_B */ 142 | uint8_t mult, 143 | uint32_t num, 144 | uint32_t denom) 145 | { 146 | /* Get the appropriate starting point for the PLL registers */ 147 | const uint8_t pllreg_base[] = { 148 | SI5351_REG_26_PLL_A, 149 | SI5351_REG_34_PLL_B 150 | }; 151 | uint32_t P1; 152 | uint32_t P2; 153 | uint32_t P3; 154 | 155 | /* Feedback Multisynth Divider Equation 156 | * where: a = mult, b = num and c = denom 157 | * P1 register is an 18-bit value using following formula: 158 | * P1[17:0] = 128 * mult + floor(128*(num/denom)) - 512 159 | * P2 register is a 20-bit value using the following formula: 160 | * P2[19:0] = 128 * num - denom * floor(128*(num/denom)) 161 | * P3 register is a 20-bit value using the following formula: 162 | * P3[19:0] = denom 163 | */ 164 | 165 | /* Set the main PLL config registers */ 166 | if (num == 0) 167 | { 168 | /* Integer mode */ 169 | P1 = 128 * mult - 512; 170 | P2 = 0; 171 | P3 = 1; 172 | } 173 | else 174 | { 175 | /* Fractional mode */ 176 | //P1 = (uint32_t)(128 * mult + floor(128 * ((float)num/(float)denom)) - 512); 177 | P1 = 128 * mult + ((128 * num) / denom) - 512; 178 | //P2 = (uint32_t)(128 * num - denom * floor(128 * ((float)num/(float)denom))); 179 | P2 = 128 * num - denom * ((128 * num) / denom); 180 | P3 = denom; 181 | } 182 | 183 | /* The datasheet is a nightmare of typos and inconsistencies here! */ 184 | uint8_t reg[9]; 185 | reg[0] = pllreg_base[pll]; 186 | reg[1] = (P3 & 0x0000FF00) >> 8; 187 | reg[2] = (P3 & 0x000000FF); 188 | reg[3] = (P1 & 0x00030000) >> 16; 189 | reg[4] = (P1 & 0x0000FF00) >> 8; 190 | reg[5] = (P1 & 0x000000FF); 191 | reg[6] = ((P3 & 0x000F0000) >> 12) | ((P2 & 0x000F0000) >> 16); 192 | reg[7] = (P2 & 0x0000FF00) >> 8; 193 | reg[8] = (P2 & 0x000000FF); 194 | si5351_bulk_write(reg, 9); 195 | } 196 | 197 | static void si5351_setupMultisynth( 198 | uint8_t output, 199 | uint8_t pllSource, 200 | uint32_t div, // 4,6,8, 8+ ~ 900 201 | uint32_t num, 202 | uint32_t denom, 203 | uint32_t rdiv, // SI5351_R_DIV_1~128 204 | uint8_t drive_strength) 205 | { 206 | /* Get the appropriate starting point for the PLL registers */ 207 | const uint8_t msreg_base[] = { 208 | SI5351_REG_42_MULTISYNTH0, 209 | SI5351_REG_50_MULTISYNTH1, 210 | SI5351_REG_58_MULTISYNTH2, 211 | }; 212 | const uint8_t clkctrl[] = { 213 | SI5351_REG_16_CLK0_CONTROL, 214 | SI5351_REG_17_CLK1_CONTROL, 215 | SI5351_REG_18_CLK2_CONTROL 216 | }; 217 | uint8_t dat; 218 | 219 | uint32_t P1; 220 | uint32_t P2; 221 | uint32_t P3; 222 | uint32_t div4 = 0; 223 | 224 | /* Output Multisynth Divider Equations 225 | * where: a = div, b = num and c = denom 226 | * P1 register is an 18-bit value using following formula: 227 | * P1[17:0] = 128 * a + floor(128*(b/c)) - 512 228 | * P2 register is a 20-bit value using the following formula: 229 | * P2[19:0] = 128 * b - c * floor(128*(b/c)) 230 | * P3 register is a 20-bit value using the following formula: 231 | * P3[19:0] = c 232 | */ 233 | /* Set the main PLL config registers */ 234 | if (div == 4) { 235 | div4 = SI5351_DIVBY4; 236 | P1 = P2 = 0; 237 | P3 = 1; 238 | } else if (num == 0) { 239 | /* Integer mode */ 240 | P1 = 128 * div - 512; 241 | P2 = 0; 242 | P3 = 1; 243 | } else { 244 | /* Fractional mode */ 245 | P1 = 128 * div + ((128 * num) / denom) - 512; 246 | P2 = 128 * num - denom * ((128 * num) / denom); 247 | P3 = denom; 248 | } 249 | 250 | /* Set the MSx config registers */ 251 | uint8_t reg[9]; 252 | reg[0] = msreg_base[output]; 253 | reg[1] = (P3 & 0x0000FF00) >> 8; 254 | reg[2] = (P3 & 0x000000FF); 255 | reg[3] = ((P1 & 0x00030000) >> 16) | div4 | rdiv; 256 | reg[4] = (P1 & 0x0000FF00) >> 8; 257 | reg[5] = (P1 & 0x000000FF); 258 | reg[6] = ((P3 & 0x000F0000) >> 12) | ((P2 & 0x000F0000) >> 16); 259 | reg[7] = (P2 & 0x0000FF00) >> 8; 260 | reg[8] = (P2 & 0x000000FF); 261 | si5351_bulk_write(reg, 9); 262 | 263 | /* Configure the clk control and enable the output */ 264 | dat = drive_strength | SI5351_CLK_INPUT_MULTISYNTH_N; 265 | if (pllSource == SI5351_PLL_B) 266 | dat |= SI5351_CLK_PLL_SELECT_B; 267 | if (num == 0) 268 | dat |= SI5351_CLK_INTEGER_MODE; 269 | si5351_write(clkctrl[output], dat); 270 | } 271 | 272 | static uint32_t gcd(uint32_t x, uint32_t y) 273 | { 274 | uint32_t z; 275 | while (y != 0) { 276 | z = x % y; 277 | x = y; 278 | y = z; 279 | } 280 | return x; 281 | } 282 | 283 | #define XTALFREQ 26000000L 284 | #define PLL_N 32 285 | #define PLLFREQ (XTALFREQ * PLL_N) 286 | 287 | static void si5351_set_frequency_fixedpll( 288 | int channel, int pll, int pllfreq, int freq, 289 | uint32_t rdiv, uint8_t drive_strength) 290 | { 291 | int32_t div = pllfreq / freq; // range: 8 ~ 1800 292 | int32_t num = pllfreq - freq * div; 293 | int32_t denom = freq; 294 | //int32_t k = freq / (1<<20) + 1; 295 | int32_t k = gcd(num, denom); 296 | num /= k; 297 | denom /= k; 298 | while (denom >= (1<<20)) { 299 | num >>= 1; 300 | denom >>= 1; 301 | } 302 | si5351_setupMultisynth(channel, pll, div, num, denom, rdiv, drive_strength); 303 | } 304 | 305 | static void si5351_set_frequency_fixeddiv( 306 | int channel, int pll, int freq, int div, 307 | uint8_t drive_strength) 308 | { 309 | int32_t pllfreq = freq * div; 310 | int32_t multi = pllfreq / XTALFREQ; 311 | int32_t num = pllfreq - multi * XTALFREQ; 312 | int32_t denom = XTALFREQ; 313 | int32_t k = gcd(num, denom); 314 | num /= k; 315 | denom /= k; 316 | while (denom >= (1<<20)) { 317 | num >>= 1; 318 | denom >>= 1; 319 | } 320 | si5351_setupPLL(pll, multi, num, denom); 321 | si5351_setupMultisynth(channel, pll, div, 0, 1, SI5351_R_DIV_1, drive_strength); 322 | } 323 | 324 | /* 325 | * 1~100MHz fixed PLL 900MHz, fractional divider 326 | * 100~150MHz fractional PLL 600-900MHz, fixed divider 6 327 | * 150~200MHz fractional PLL 600-900MHz, fixed divider 4 328 | */ 329 | void si5351_set_frequency(int channel, int freq, uint8_t drive_strength) 330 | { 331 | if (freq <= 100000000) { 332 | si5351_setupPLL(SI5351_PLL_B, 32, 0, 1); 333 | si5351_set_frequency_fixedpll(channel, SI5351_PLL_B, PLLFREQ, freq, SI5351_R_DIV_1, drive_strength); 334 | } else if (freq < 150000000) { 335 | si5351_set_frequency_fixeddiv(channel, SI5351_PLL_B, freq, 6, drive_strength); 336 | } else { 337 | si5351_set_frequency_fixeddiv(channel, SI5351_PLL_B, freq, 4, drive_strength); 338 | } 339 | } 340 | 341 | 342 | static int current_band = -1; 343 | 344 | /* 345 | * configure output as follows: 346 | * CLK0: frequency + offset 347 | * CLK1: frequency 348 | * CLK2: fixed 8MHz 349 | */ 350 | #define CLK2_FREQUENCY 8000000L 351 | int si5351_set_frequency_with_offset(uint32_t freq, int offset, uint8_t drive_strength) 352 | { 353 | int band; 354 | int delay = 3; 355 | uint32_t ofreq = freq + offset; 356 | uint32_t rdiv = SI5351_R_DIV_1; 357 | if (freq >= config.harmonic_freq_threshold * 3) { 358 | freq /= 5; 359 | ofreq /= 7; 360 | } else if (freq >= config.harmonic_freq_threshold) { 361 | freq /= 3; 362 | ofreq /= 5; 363 | } 364 | if (freq <= 100000000) { 365 | band = 0; 366 | } else if (freq < 150000000) { 367 | band = 1; 368 | } else { 369 | band = 2; 370 | } 371 | if (freq <= 500000) { 372 | rdiv = SI5351_R_DIV_64; 373 | } else if (freq <= 4000000) { 374 | rdiv = SI5351_R_DIV_8; 375 | } 376 | 377 | #if 1 378 | if (current_band != band) 379 | si5351_disable_output(); 380 | #endif 381 | 382 | switch (band) { 383 | case 0: 384 | // fractional divider mode. only PLL A is used. 385 | if (current_band == 1 || current_band == 2) 386 | si5351_setupPLL(SI5351_PLL_A, 32, 0, 1); 387 | // Set PLL twice on changing from band 2 388 | if (current_band == 2) 389 | si5351_setupPLL(SI5351_PLL_A, 32, 0, 1); 390 | 391 | if (rdiv == SI5351_R_DIV_8) { 392 | freq *= 8; 393 | ofreq *= 8; 394 | } else if (rdiv == SI5351_R_DIV_64) { 395 | freq *= 64; 396 | ofreq *= 64; 397 | } 398 | 399 | si5351_set_frequency_fixedpll(0, SI5351_PLL_A, PLLFREQ, ofreq, 400 | rdiv, drive_strength); 401 | si5351_set_frequency_fixedpll(1, SI5351_PLL_A, PLLFREQ, freq, 402 | rdiv, drive_strength); 403 | //if (current_band != 0) 404 | si5351_set_frequency_fixedpll(2, SI5351_PLL_A, PLLFREQ, CLK2_FREQUENCY, 405 | SI5351_R_DIV_1, SI5351_CLK_DRIVE_STRENGTH_2MA); 406 | break; 407 | 408 | case 1: 409 | // Set PLL twice on changing from band 2 410 | if (current_band == 2) { 411 | si5351_set_frequency_fixeddiv(0, SI5351_PLL_A, ofreq, 6, drive_strength); 412 | si5351_set_frequency_fixeddiv(1, SI5351_PLL_B, freq, 6, drive_strength); 413 | } 414 | 415 | // div by 6 mode. both PLL A and B are dedicated for CLK0, CLK1 416 | si5351_set_frequency_fixeddiv(0, SI5351_PLL_A, ofreq, 6, drive_strength); 417 | si5351_set_frequency_fixeddiv(1, SI5351_PLL_B, freq, 6, drive_strength); 418 | si5351_set_frequency_fixedpll(2, SI5351_PLL_B, freq * 6, CLK2_FREQUENCY, 419 | SI5351_R_DIV_1, SI5351_CLK_DRIVE_STRENGTH_2MA); 420 | break; 421 | 422 | case 2: 423 | // div by 4 mode. both PLL A and B are dedicated for CLK0, CLK1 424 | si5351_set_frequency_fixeddiv(0, SI5351_PLL_A, ofreq, 4, drive_strength); 425 | si5351_set_frequency_fixeddiv(1, SI5351_PLL_B, freq, 4, drive_strength); 426 | si5351_set_frequency_fixedpll(2, SI5351_PLL_B, freq * 4, CLK2_FREQUENCY, 427 | SI5351_R_DIV_1, SI5351_CLK_DRIVE_STRENGTH_2MA); 428 | break; 429 | } 430 | 431 | if (current_band != band) { 432 | si5351_reset_pll(); 433 | si5351_wait_pll_lock(); 434 | #if 1 435 | si5351_enable_output(); 436 | #endif 437 | delay += 10; 438 | } 439 | 440 | current_band = band; 441 | return delay; 442 | } 443 | -------------------------------------------------------------------------------- /si5351.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com 3 | * All rights reserved. 4 | * 5 | * This is free software; you can redistribute it and/or modify 6 | * it under the terms of the GNU General Public License as published by 7 | * the Free Software Foundation; either version 3, or (at your option) 8 | * any later version. 9 | * 10 | * The software is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with GNU Radio; see the file COPYING. If not, write to 17 | * the Free Software Foundation, Inc., 51 Franklin Street, 18 | * Boston, MA 02110-1301, USA. 19 | */ 20 | #ifndef __SI5351_H__ 21 | #define __SI5351_H__ 22 | 23 | #include 24 | #include 25 | 26 | #define SI5351_PLL_A 0 27 | #define SI5351_PLL_B 1 28 | 29 | #define SI5351_MULTISYNTH_DIV_4 4 30 | #define SI5351_MULTISYNTH_DIV_6 6 31 | #define SI5351_MULTISYNTH_DIV_8 8 32 | #define SI5351_R_DIV_1 (0<<4) 33 | #define SI5351_R_DIV_2 (1<<4) 34 | #define SI5351_R_DIV_4 (2<<4) 35 | #define SI5351_R_DIV_8 (3<<4) 36 | #define SI5351_R_DIV_16 (4<<4) 37 | #define SI5351_R_DIV_32 (5<<4) 38 | #define SI5351_R_DIV_64 (6<<4) 39 | #define SI5351_R_DIV_128 (7<<4) 40 | #define SI5351_DIVBY4 (3<<2) 41 | 42 | #define SI5351_REG_3_OUTPUT_ENABLE_CONTROL 3 43 | #define SI5351_REG_16_CLK0_CONTROL 16 44 | #define SI5351_REG_17_CLK1_CONTROL 17 45 | #define SI5351_REG_18_CLK2_CONTROL 18 46 | #define SI5351_REG_26_PLL_A 26 47 | #define SI5351_REG_34_PLL_B 34 48 | #define SI5351_REG_42_MULTISYNTH0 42 49 | #define SI5351_REG_50_MULTISYNTH1 50 50 | #define SI5351_REG_58_MULTISYNTH2 58 51 | 52 | #define SI5351_CLK_POWERDOWN (1<<7) 53 | #define SI5351_CLK_INTEGER_MODE (1<<6) 54 | #define SI5351_CLK_PLL_SELECT_B (1<<5) 55 | #define SI5351_CLK_INVERT (1<<4) 56 | 57 | #define SI5351_CLK_INPUT_MASK (3<<2) 58 | #define SI5351_CLK_INPUT_XTAL (0<<2) 59 | #define SI5351_CLK_INPUT_CLKIN (1<<2) 60 | #define SI5351_CLK_INPUT_MULTISYNTH_0_4 (2<<2) 61 | #define SI5351_CLK_INPUT_MULTISYNTH_N (3<<2) 62 | 63 | #define SI5351_CLK_DRIVE_STRENGTH_MASK (3<<0) 64 | #define SI5351_CLK_DRIVE_STRENGTH_2MA (0<<0) 65 | #define SI5351_CLK_DRIVE_STRENGTH_4MA (1<<0) 66 | #define SI5351_CLK_DRIVE_STRENGTH_6MA (2<<0) 67 | #define SI5351_CLK_DRIVE_STRENGTH_8MA (3<<0) 68 | 69 | 70 | #define SI5351_REG_177_PLL_RESET 177 71 | #define SI5351_PLL_RESET_B (1<<7) 72 | #define SI5351_PLL_RESET_A (1<<5) 73 | 74 | #define SI5351_REG_183_CRYSTAL_LOAD 183 75 | #define SI5351_CRYSTAL_LOAD_6PF (1<<6) 76 | #define SI5351_CRYSTAL_LOAD_8PF (2<<6) 77 | #define SI5351_CRYSTAL_LOAD_10PF (3<<6) 78 | 79 | #define SI5351_CRYSTAL_FREQ_25MHZ 25000000 80 | 81 | bool si5351_init(void); 82 | void si5351_set_frequency(int channel, int freq, uint8_t drive_strength); 83 | int si5351_set_frequency_with_offset(uint32_t freq, int offset, uint8_t drive_strength); 84 | 85 | #endif //__SI5351_H__ 86 | -------------------------------------------------------------------------------- /tlv320aic3204.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com 3 | * All rights reserved. 4 | * 5 | * This is free software; you can redistribute it and/or modify 6 | * it under the terms of the GNU General Public License as published by 7 | * the Free Software Foundation; either version 3, or (at your option) 8 | * any later version. 9 | * 10 | * The software is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with GNU Radio; see the file COPYING. If not, write to 17 | * the Free Software Foundation, Inc., 51 Franklin Street, 18 | * Boston, MA 02110-1301, USA. 19 | */ 20 | #include "hal.h" 21 | #include "nanovna.h" 22 | 23 | #define REFCLK_8000KHZ 24 | #define AIC3204_ADDR 0x18 25 | 26 | #define wait_ms(ms) chThdSleepMilliseconds(ms) 27 | 28 | static const uint8_t conf_data_pll[] = { 29 | // len, ( reg, data ), 30 | 2, 0x00, 0x00, /* Initialize to Page 0 */ 31 | 2, 0x01, 0x01, /* Initialize the device through software reset */ 32 | 2, 0x04, 0x43, /* PLL Clock High, MCLK, PLL */ 33 | #ifdef REFCLK_8000KHZ 34 | /* 8.000MHz*10.7520 = 86.016MHz, 86.016MHz/(2*7*128) = 48kHz */ 35 | 2, 0x05, 0x91, /* Power up PLL, P=1,R=1 */ 36 | 2, 0x06, 0x0a, /* J=10 */ 37 | 2, 0x07, 29, /* D=7520 = (29<<8) + 96 */ 38 | 2, 0x08, 96, 39 | #endif 40 | 0 // sentinel 41 | }; 42 | 43 | // default fs=48kHz 44 | static const uint8_t conf_data_clk[] = { 45 | 2, 0x0b, 0x82, /* Power up the NDAC divider with value 2 */ 46 | 2, 0x0c, 0x87, /* Power up the MDAC divider with value 7 */ 47 | 2, 0x0d, 0x00, /* Program the OSR of DAC to 128 */ 48 | 2, 0x0e, 0x80, 49 | 2, 0x3c, 0x08, /* Set the DAC Mode to PRB_P8 */ 50 | //2, 0x3c, 25, /* Set the DAC Mode to PRB_P25 */ 51 | 2, 0x1b, 0x0c, /* Set the BCLK,WCLK as output */ 52 | 2, 0x1e, 0x80 + 28, /* Enable the BCLKN divider with value 28 */ 53 | 2, 0x25, 0xee, /* DAC power up */ 54 | 55 | 2, 0x12, 0x82, /* Power up the NADC divider with value 2 */ 56 | 2, 0x13, 0x87, /* Power up the MADC divider with value 7 */ 57 | 2, 0x14, 0x80, /* Program the OSR of ADC to 128 */ 58 | 2, 0x3d, 0x01, /* Select ADC PRB_R1 */ 59 | 0 // sentinel 60 | }; 61 | 62 | static const uint8_t conf_data_routing[] = { 63 | 2, 0x00, 0x01, /* Select Page 1 */ 64 | 2, 0x01, 0x08, /* Disable Internal Crude AVdd in presence of external AVdd supply or before powering up internal AVdd LDO*/ 65 | 2, 0x02, 0x01, /* Enable Master Analog Power Control */ 66 | 2, 0x7b, 0x01, /* Set the REF charging time to 40ms */ 67 | 2, 0x14, 0x25, /* HP soft stepping settings for optimal pop performance at power up Rpop used is 6k with N = 6 and soft step = 20usec. This should work with 47uF coupling capacitor. Can try N=5,6 or 7 time constants as well. Trade-off delay vs “pop” sound. */ 68 | 2, 0x0a, 0x33, /* Set the Input Common Mode to 0.9V and Output Common Mode for Headphone to 1.65V */ 69 | 70 | 2, 0x3d, 0x00, /* Select ADC PTM_R4 */ 71 | 2, 0x47, 0x32, /* Set MicPGA startup delay to 3.1ms */ 72 | 2, 0x7b, 0x01, /* Set the REF charging time to 40ms */ 73 | 2, 0x34, 0x10, /* Route IN2L to LEFT_P with 10K */ 74 | 2, 0x36, 0x10, /* Route IN2R to LEFT_N with 10K */ 75 | 2, 0x37, 0x04, /* Route IN3R to RIGHT_P with 10K */ 76 | 2, 0x39, 0x04, /* Route IN3L to RIGHT_N with 10K */ 77 | 2, 0x3b, 0, /* Unmute Left MICPGA, Gain selection of 32dB to make channel gain 0dB */ 78 | 2, 0x3c, 0, /* Unmute Right MICPGA, Gain selection of 32dB to make channel gain 0dB */ 79 | 0 // sentinel 80 | }; 81 | 82 | static const uint8_t conf_data_unmute[] = { 83 | 2, 0x00, 0x00, /* Select Page 0 */ 84 | 2, 0x51, 0xc0, /* Power up Left and Right ADC Channels */ 85 | 2, 0x52, 0x00, /* Unmute Left and Right ADC Digital Volume Control */ 86 | 0 // sentinel 87 | }; 88 | 89 | static void tlv320aic3204_bulk_write(const uint8_t *buf, int len) 90 | { 91 | int addr = AIC3204_ADDR; 92 | i2cAcquireBus(&I2CD1); 93 | (void)i2cMasterTransmitTimeout(&I2CD1, addr, buf, len, NULL, 0, 1000); 94 | i2cReleaseBus(&I2CD1); 95 | } 96 | 97 | #if 0 98 | static int tlv320aic3204_read(uint8_t d0) 99 | { 100 | int addr = AIC3204_ADDR; 101 | uint8_t buf[] = { d0 }; 102 | i2cAcquireBus(&I2CD1); 103 | i2cMasterTransmitTimeout(&I2CD1, addr, buf, 1, buf, 1, 1000); 104 | i2cReleaseBus(&I2CD1); 105 | return buf[0]; 106 | } 107 | #endif 108 | 109 | static void tlv320aic3204_config(const uint8_t *data) 110 | { 111 | const uint8_t *p = data; 112 | while (*p) { 113 | uint8_t len = *p++; 114 | tlv320aic3204_bulk_write(p, len); 115 | p += len; 116 | } 117 | } 118 | 119 | void tlv320aic3204_init(void) 120 | { 121 | tlv320aic3204_config(conf_data_pll); 122 | tlv320aic3204_config(conf_data_clk); 123 | tlv320aic3204_config(conf_data_routing); 124 | wait_ms(40); 125 | tlv320aic3204_config(conf_data_unmute); 126 | } 127 | 128 | void tlv320aic3204_select(int channel) 129 | { 130 | const uint8_t ch3[] = { 131 | 2, 0x00, 0x01, /* Select Page 1 */ 132 | 2, 0x37, 0x04, /* Route IN3R to RIGHT_P with input impedance of 10K */ 133 | 2, 0x39, 0x04, /* Route IN3L to RIGHT_N with input impedance of 10K */ 134 | 0 // sentinel 135 | }; 136 | const uint8_t ch1[] = { 137 | 2, 0x00, 0x01, /* Select Page 1 */ 138 | 2, 0x37, 0x40, /* Route IN1R to RIGHT_P with input impedance of 10K */ 139 | 2, 0x39, 0x10, /* Route IN1L to RIGHT_N with input impedance of 10K */ 140 | 0 // sentinel 141 | }; 142 | tlv320aic3204_config(channel ? ch1 : ch3); 143 | } 144 | 145 | void tlv320aic3204_set_gain(int lgain, int rgain) 146 | { 147 | uint8_t data[] = { 148 | 2, 0x00, 0x01, /* Select Page 1 */ 149 | 2, 0x3b, lgain, /* Unmute Left MICPGA, set gain */ 150 | 2, 0x3c, rgain, /* Unmute Right MICPGA, set gain */ 151 | 0 // sentinel 152 | }; 153 | tlv320aic3204_config(data); 154 | } 155 | -------------------------------------------------------------------------------- /usbcfg.c: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #include "hal.h" 18 | 19 | /* Virtual serial port over USB.*/ 20 | SerialUSBDriver SDU1; 21 | 22 | /* 23 | * Endpoints to be used for USBD1. 24 | */ 25 | #define USBD1_DATA_REQUEST_EP 1 26 | #define USBD1_DATA_AVAILABLE_EP 1 27 | #define USBD1_INTERRUPT_REQUEST_EP 2 28 | 29 | /* 30 | * USB Device Descriptor. 31 | */ 32 | static const uint8_t vcom_device_descriptor_data[18] = { 33 | USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ 34 | 0x02, /* bDeviceClass (CDC). */ 35 | 0x00, /* bDeviceSubClass. */ 36 | 0x00, /* bDeviceProtocol. */ 37 | 0x40, /* bMaxPacketSize. */ 38 | 0x0483, /* idVendor (ST). */ 39 | 0x5740, /* idProduct. */ 40 | 0x0200, /* bcdDevice. */ 41 | 1, /* iManufacturer. */ 42 | 2, /* iProduct. */ 43 | 3, /* iSerialNumber. */ 44 | 1) /* bNumConfigurations. */ 45 | }; 46 | 47 | /* 48 | * Device Descriptor wrapper. 49 | */ 50 | static const USBDescriptor vcom_device_descriptor = { 51 | sizeof vcom_device_descriptor_data, 52 | vcom_device_descriptor_data 53 | }; 54 | 55 | /* Configuration Descriptor tree for a CDC.*/ 56 | static const uint8_t vcom_configuration_descriptor_data[67] = { 57 | /* Configuration Descriptor.*/ 58 | USB_DESC_CONFIGURATION(67, /* wTotalLength. */ 59 | 0x02, /* bNumInterfaces. */ 60 | 0x01, /* bConfigurationValue. */ 61 | 0, /* iConfiguration. */ 62 | 0xC0, /* bmAttributes (self powered). */ 63 | 50), /* bMaxPower (100mA). */ 64 | /* Interface Descriptor.*/ 65 | USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ 66 | 0x00, /* bAlternateSetting. */ 67 | 0x01, /* bNumEndpoints. */ 68 | 0x02, /* bInterfaceClass (Communications 69 | Interface Class, CDC section 70 | 4.2). */ 71 | 0x02, /* bInterfaceSubClass (Abstract 72 | Control Model, CDC section 4.3). */ 73 | 0x01, /* bInterfaceProtocol (AT commands, 74 | CDC section 4.4). */ 75 | 0), /* iInterface. */ 76 | /* Header Functional Descriptor (CDC section 5.2.3).*/ 77 | USB_DESC_BYTE (5), /* bLength. */ 78 | USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ 79 | USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header 80 | Functional Descriptor. */ 81 | USB_DESC_BCD (0x0110), /* bcdCDC. */ 82 | /* Call Management Functional Descriptor. */ 83 | USB_DESC_BYTE (5), /* bFunctionLength. */ 84 | USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ 85 | USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management 86 | Functional Descriptor). */ 87 | USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ 88 | USB_DESC_BYTE (0x01), /* bDataInterface. */ 89 | /* ACM Functional Descriptor.*/ 90 | USB_DESC_BYTE (4), /* bFunctionLength. */ 91 | USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ 92 | USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract 93 | Control Management Descriptor). */ 94 | USB_DESC_BYTE (0x02), /* bmCapabilities. */ 95 | /* Union Functional Descriptor.*/ 96 | USB_DESC_BYTE (5), /* bFunctionLength. */ 97 | USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ 98 | USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union 99 | Functional Descriptor). */ 100 | USB_DESC_BYTE (0x00), /* bMasterInterface (Communication 101 | Class Interface). */ 102 | USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class 103 | Interface). */ 104 | /* Endpoint 2 Descriptor.*/ 105 | USB_DESC_ENDPOINT (USBD1_INTERRUPT_REQUEST_EP|0x80, 106 | 0x03, /* bmAttributes (Interrupt). */ 107 | 0x0008, /* wMaxPacketSize. */ 108 | 0xFF), /* bInterval. */ 109 | /* Interface Descriptor.*/ 110 | USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ 111 | 0x00, /* bAlternateSetting. */ 112 | 0x02, /* bNumEndpoints. */ 113 | 0x0A, /* bInterfaceClass (Data Class 114 | Interface, CDC section 4.5). */ 115 | 0x00, /* bInterfaceSubClass (CDC section 116 | 4.6). */ 117 | 0x00, /* bInterfaceProtocol (CDC section 118 | 4.7). */ 119 | 0x00), /* iInterface. */ 120 | /* Endpoint 3 Descriptor.*/ 121 | USB_DESC_ENDPOINT (USBD1_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ 122 | 0x02, /* bmAttributes (Bulk). */ 123 | 0x0040, /* wMaxPacketSize. */ 124 | 0x00), /* bInterval. */ 125 | /* Endpoint 1 Descriptor.*/ 126 | USB_DESC_ENDPOINT (USBD1_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ 127 | 0x02, /* bmAttributes (Bulk). */ 128 | 0x0040, /* wMaxPacketSize. */ 129 | 0x00) /* bInterval. */ 130 | }; 131 | 132 | /* 133 | * Configuration Descriptor wrapper. 134 | */ 135 | static const USBDescriptor vcom_configuration_descriptor = { 136 | sizeof vcom_configuration_descriptor_data, 137 | vcom_configuration_descriptor_data 138 | }; 139 | 140 | /* 141 | * U.S. English language identifier. 142 | */ 143 | static const uint8_t vcom_string0[] = { 144 | USB_DESC_BYTE(4), /* bLength. */ 145 | USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ 146 | USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ 147 | }; 148 | 149 | /* 150 | * Vendor string. 151 | */ 152 | static const uint8_t vcom_string1[] = { 153 | USB_DESC_BYTE(38), /* bLength. */ 154 | USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ 155 | 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, 156 | 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, 157 | 'c', 0, 's', 0 158 | }; 159 | 160 | /* 161 | * Device Description string. 162 | */ 163 | static const uint8_t vcom_string2[] = { 164 | USB_DESC_BYTE(56), /* bLength. */ 165 | USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ 166 | 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, 167 | 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, 168 | 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, 169 | 'o', 0, 'r', 0, 't', 0 170 | }; 171 | 172 | /* 173 | * Serial Number string. 174 | */ 175 | static const uint8_t vcom_string3[] = { 176 | USB_DESC_BYTE(8), /* bLength. */ 177 | USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ 178 | '0' + CH_KERNEL_MAJOR, 0, 179 | '0' + CH_KERNEL_MINOR, 0, 180 | '0' + CH_KERNEL_PATCH, 0 181 | }; 182 | 183 | /* 184 | * Strings wrappers array. 185 | */ 186 | static const USBDescriptor vcom_strings[] = { 187 | {sizeof vcom_string0, vcom_string0}, 188 | {sizeof vcom_string1, vcom_string1}, 189 | {sizeof vcom_string2, vcom_string2}, 190 | {sizeof vcom_string3, vcom_string3} 191 | }; 192 | 193 | /* 194 | * Handles the GET_DESCRIPTOR callback. All required descriptors must be 195 | * handled here. 196 | */ 197 | static const USBDescriptor *get_descriptor( 198 | USBDriver *usbp, 199 | uint8_t dtype, 200 | uint8_t dindex, 201 | uint16_t lang) { 202 | 203 | (void)usbp; 204 | (void)lang; 205 | switch (dtype) { 206 | case USB_DESCRIPTOR_DEVICE: 207 | return &vcom_device_descriptor; 208 | case USB_DESCRIPTOR_CONFIGURATION: 209 | return &vcom_configuration_descriptor; 210 | case USB_DESCRIPTOR_STRING: 211 | if (dindex < 4) 212 | return &vcom_strings[dindex]; 213 | } 214 | return NULL; 215 | } 216 | 217 | /** 218 | * @brief IN EP1 state. 219 | */ 220 | static USBInEndpointState ep1instate; 221 | 222 | /** 223 | * @brief OUT EP1 state. 224 | */ 225 | static USBOutEndpointState ep1outstate; 226 | 227 | /** 228 | * @brief EP1 initialization structure (both IN and OUT). 229 | */ 230 | static const USBEndpointConfig ep1config = { 231 | USB_EP_MODE_TYPE_BULK, 232 | NULL, 233 | sduDataTransmitted, 234 | sduDataReceived, 235 | 0x0040, 236 | 0x0040, 237 | &ep1instate, 238 | &ep1outstate, 239 | 2, 240 | NULL 241 | }; 242 | 243 | /** 244 | * @brief IN EP2 state. 245 | */ 246 | static USBInEndpointState ep2instate; 247 | 248 | /** 249 | * @brief EP2 initialization structure (IN only). 250 | */ 251 | static const USBEndpointConfig ep2config = { 252 | USB_EP_MODE_TYPE_INTR, 253 | NULL, 254 | sduInterruptTransmitted, 255 | NULL, 256 | 0x0010, 257 | 0x0000, 258 | &ep2instate, 259 | NULL, 260 | 1, 261 | NULL 262 | }; 263 | 264 | /* 265 | * Handles the USB driver global events. 266 | */ 267 | static void usb_event(USBDriver *usbp, usbevent_t event) { 268 | extern SerialUSBDriver SDU1; 269 | 270 | switch (event) { 271 | case USB_EVENT_RESET: 272 | return; 273 | case USB_EVENT_ADDRESS: 274 | return; 275 | case USB_EVENT_CONFIGURED: 276 | chSysLockFromISR(); 277 | 278 | /* Enables the endpoints specified into the configuration. 279 | Note, this callback is invoked from an ISR so I-Class functions 280 | must be used.*/ 281 | usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config); 282 | usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); 283 | 284 | /* Resetting the state of the CDC subsystem.*/ 285 | sduConfigureHookI(&SDU1); 286 | 287 | chSysUnlockFromISR(); 288 | return; 289 | case USB_EVENT_SUSPEND: 290 | chSysLockFromISR(); 291 | 292 | /* Disconnection event on suspend.*/ 293 | sduDisconnectI(&SDU1); 294 | 295 | chSysUnlockFromISR(); 296 | return; 297 | case USB_EVENT_WAKEUP: 298 | return; 299 | case USB_EVENT_STALLED: 300 | return; 301 | } 302 | return; 303 | } 304 | 305 | /* 306 | * Handles the USB driver global events. 307 | */ 308 | static void sof_handler(USBDriver *usbp) { 309 | 310 | (void)usbp; 311 | 312 | osalSysLockFromISR(); 313 | sduSOFHookI(&SDU1); 314 | osalSysUnlockFromISR(); 315 | } 316 | 317 | /* 318 | * USB driver configuration. 319 | */ 320 | const USBConfig usbcfg = { 321 | usb_event, 322 | get_descriptor, 323 | sduRequestsHook, 324 | sof_handler 325 | }; 326 | 327 | /* 328 | * Serial over USB driver configuration. 329 | */ 330 | const SerialUSBConfig serusbcfg = { 331 | &USBD1, 332 | USBD1_DATA_REQUEST_EP, 333 | USBD1_DATA_AVAILABLE_EP, 334 | USBD1_INTERRUPT_REQUEST_EP 335 | }; 336 | -------------------------------------------------------------------------------- /usbcfg.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #ifndef _USBCFG_H_ 18 | #define _USBCFG_H_ 19 | 20 | extern const USBConfig usbcfg; 21 | extern SerialUSBConfig serusbcfg; 22 | extern SerialUSBDriver SDU1; 23 | 24 | #endif /* _USBCFG_H_ */ 25 | 26 | /** @} */ 27 | --------------------------------------------------------------------------------