├── .gitignore
├── README.md
├── app
├── .mxproject
├── Drivers
│ ├── CMSIS
│ │ ├── DSP_Lib
│ │ │ └── Source
│ │ │ │ ├── BasicMathFunctions
│ │ │ │ ├── arm_abs_f32.c
│ │ │ │ ├── arm_abs_q15.c
│ │ │ │ ├── arm_abs_q31.c
│ │ │ │ ├── arm_abs_q7.c
│ │ │ │ ├── arm_add_f32.c
│ │ │ │ ├── arm_add_q15.c
│ │ │ │ ├── arm_add_q31.c
│ │ │ │ ├── arm_add_q7.c
│ │ │ │ ├── arm_dot_prod_f32.c
│ │ │ │ ├── arm_dot_prod_q15.c
│ │ │ │ ├── arm_dot_prod_q31.c
│ │ │ │ ├── arm_dot_prod_q7.c
│ │ │ │ ├── arm_mult_f32.c
│ │ │ │ ├── arm_mult_q15.c
│ │ │ │ ├── arm_mult_q31.c
│ │ │ │ ├── arm_mult_q7.c
│ │ │ │ ├── arm_negate_f32.c
│ │ │ │ ├── arm_negate_q15.c
│ │ │ │ ├── arm_negate_q31.c
│ │ │ │ ├── arm_negate_q7.c
│ │ │ │ ├── arm_offset_f32.c
│ │ │ │ ├── arm_offset_q15.c
│ │ │ │ ├── arm_offset_q31.c
│ │ │ │ ├── arm_offset_q7.c
│ │ │ │ ├── arm_scale_f32.c
│ │ │ │ ├── arm_scale_q15.c
│ │ │ │ ├── arm_scale_q31.c
│ │ │ │ ├── arm_scale_q7.c
│ │ │ │ ├── arm_shift_q15.c
│ │ │ │ ├── arm_shift_q31.c
│ │ │ │ ├── arm_shift_q7.c
│ │ │ │ ├── arm_sub_f32.c
│ │ │ │ ├── arm_sub_q15.c
│ │ │ │ ├── arm_sub_q31.c
│ │ │ │ └── arm_sub_q7.c
│ │ │ │ ├── CommonTables
│ │ │ │ ├── arm_common_tables.c
│ │ │ │ └── arm_const_structs.c
│ │ │ │ ├── ComplexMathFunctions
│ │ │ │ ├── arm_cmplx_conj_f32.c
│ │ │ │ ├── arm_cmplx_conj_q15.c
│ │ │ │ ├── arm_cmplx_conj_q31.c
│ │ │ │ ├── arm_cmplx_dot_prod_f32.c
│ │ │ │ ├── arm_cmplx_dot_prod_q15.c
│ │ │ │ ├── arm_cmplx_dot_prod_q31.c
│ │ │ │ ├── arm_cmplx_mag_f32.c
│ │ │ │ ├── arm_cmplx_mag_q15.c
│ │ │ │ ├── arm_cmplx_mag_q31.c
│ │ │ │ ├── arm_cmplx_mag_squared_f32.c
│ │ │ │ ├── arm_cmplx_mag_squared_q15.c
│ │ │ │ ├── arm_cmplx_mag_squared_q31.c
│ │ │ │ ├── arm_cmplx_mult_cmplx_f32.c
│ │ │ │ ├── arm_cmplx_mult_cmplx_q15.c
│ │ │ │ ├── arm_cmplx_mult_cmplx_q31.c
│ │ │ │ ├── arm_cmplx_mult_real_f32.c
│ │ │ │ ├── arm_cmplx_mult_real_q15.c
│ │ │ │ └── arm_cmplx_mult_real_q31.c
│ │ │ │ ├── ControllerFunctions
│ │ │ │ ├── arm_pid_init_f32.c
│ │ │ │ ├── arm_pid_init_q15.c
│ │ │ │ ├── arm_pid_init_q31.c
│ │ │ │ ├── arm_pid_reset_f32.c
│ │ │ │ ├── arm_pid_reset_q15.c
│ │ │ │ ├── arm_pid_reset_q31.c
│ │ │ │ ├── arm_sin_cos_f32.c
│ │ │ │ └── arm_sin_cos_q31.c
│ │ │ │ ├── FastMathFunctions
│ │ │ │ ├── arm_cos_f32.c
│ │ │ │ ├── arm_cos_q15.c
│ │ │ │ ├── arm_cos_q31.c
│ │ │ │ ├── arm_sin_f32.c
│ │ │ │ ├── arm_sin_q15.c
│ │ │ │ ├── arm_sin_q31.c
│ │ │ │ ├── arm_sqrt_q15.c
│ │ │ │ └── arm_sqrt_q31.c
│ │ │ │ ├── FilteringFunctions
│ │ │ │ ├── arm_biquad_cascade_df1_32x64_init_q31.c
│ │ │ │ ├── arm_biquad_cascade_df1_32x64_q31.c
│ │ │ │ ├── arm_biquad_cascade_df1_f32.c
│ │ │ │ ├── arm_biquad_cascade_df1_fast_q15.c
│ │ │ │ ├── arm_biquad_cascade_df1_fast_q31.c
│ │ │ │ ├── arm_biquad_cascade_df1_init_f32.c
│ │ │ │ ├── arm_biquad_cascade_df1_init_q15.c
│ │ │ │ ├── arm_biquad_cascade_df1_init_q31.c
│ │ │ │ ├── arm_biquad_cascade_df1_q15.c
│ │ │ │ ├── arm_biquad_cascade_df1_q31.c
│ │ │ │ ├── arm_biquad_cascade_df2T_f32.c
│ │ │ │ ├── arm_biquad_cascade_df2T_f64.c
│ │ │ │ ├── arm_biquad_cascade_df2T_init_f32.c
│ │ │ │ ├── arm_biquad_cascade_df2T_init_f64.c
│ │ │ │ ├── arm_biquad_cascade_stereo_df2T_f32.c
│ │ │ │ ├── arm_biquad_cascade_stereo_df2T_init_f32.c
│ │ │ │ ├── arm_conv_f32.c
│ │ │ │ ├── arm_conv_fast_opt_q15.c
│ │ │ │ ├── arm_conv_fast_q15.c
│ │ │ │ ├── arm_conv_fast_q31.c
│ │ │ │ ├── arm_conv_opt_q15.c
│ │ │ │ ├── arm_conv_opt_q7.c
│ │ │ │ ├── arm_conv_partial_f32.c
│ │ │ │ ├── arm_conv_partial_fast_opt_q15.c
│ │ │ │ ├── arm_conv_partial_fast_q15.c
│ │ │ │ ├── arm_conv_partial_fast_q31.c
│ │ │ │ ├── arm_conv_partial_opt_q15.c
│ │ │ │ ├── arm_conv_partial_opt_q7.c
│ │ │ │ ├── arm_conv_partial_q15.c
│ │ │ │ ├── arm_conv_partial_q31.c
│ │ │ │ ├── arm_conv_partial_q7.c
│ │ │ │ ├── arm_conv_q15.c
│ │ │ │ ├── arm_conv_q31.c
│ │ │ │ ├── arm_conv_q7.c
│ │ │ │ ├── arm_correlate_f32.c
│ │ │ │ ├── arm_correlate_fast_opt_q15.c
│ │ │ │ ├── arm_correlate_fast_q15.c
│ │ │ │ ├── arm_correlate_fast_q31.c
│ │ │ │ ├── arm_correlate_opt_q15.c
│ │ │ │ ├── arm_correlate_opt_q7.c
│ │ │ │ ├── arm_correlate_q15.c
│ │ │ │ ├── arm_correlate_q31.c
│ │ │ │ ├── arm_correlate_q7.c
│ │ │ │ ├── arm_fir_decimate_f32.c
│ │ │ │ ├── arm_fir_decimate_fast_q15.c
│ │ │ │ ├── arm_fir_decimate_fast_q31.c
│ │ │ │ ├── arm_fir_decimate_init_f32.c
│ │ │ │ ├── arm_fir_decimate_init_q15.c
│ │ │ │ ├── arm_fir_decimate_init_q31.c
│ │ │ │ ├── arm_fir_decimate_q15.c
│ │ │ │ ├── arm_fir_decimate_q31.c
│ │ │ │ ├── arm_fir_f32.c
│ │ │ │ ├── arm_fir_fast_q15.c
│ │ │ │ ├── arm_fir_fast_q31.c
│ │ │ │ ├── arm_fir_init_f32.c
│ │ │ │ ├── arm_fir_init_q15.c
│ │ │ │ ├── arm_fir_init_q31.c
│ │ │ │ ├── arm_fir_init_q7.c
│ │ │ │ ├── arm_fir_interpolate_f32.c
│ │ │ │ ├── arm_fir_interpolate_init_f32.c
│ │ │ │ ├── arm_fir_interpolate_init_q15.c
│ │ │ │ ├── arm_fir_interpolate_init_q31.c
│ │ │ │ ├── arm_fir_interpolate_q15.c
│ │ │ │ ├── arm_fir_interpolate_q31.c
│ │ │ │ ├── arm_fir_lattice_f32.c
│ │ │ │ ├── arm_fir_lattice_init_f32.c
│ │ │ │ ├── arm_fir_lattice_init_q15.c
│ │ │ │ ├── arm_fir_lattice_init_q31.c
│ │ │ │ ├── arm_fir_lattice_q15.c
│ │ │ │ ├── arm_fir_lattice_q31.c
│ │ │ │ ├── arm_fir_q15.c
│ │ │ │ ├── arm_fir_q31.c
│ │ │ │ ├── arm_fir_q7.c
│ │ │ │ ├── arm_fir_sparse_f32.c
│ │ │ │ ├── arm_fir_sparse_init_f32.c
│ │ │ │ ├── arm_fir_sparse_init_q15.c
│ │ │ │ ├── arm_fir_sparse_init_q31.c
│ │ │ │ ├── arm_fir_sparse_init_q7.c
│ │ │ │ ├── arm_fir_sparse_q15.c
│ │ │ │ ├── arm_fir_sparse_q31.c
│ │ │ │ ├── arm_fir_sparse_q7.c
│ │ │ │ ├── arm_iir_lattice_f32.c
│ │ │ │ ├── arm_iir_lattice_init_f32.c
│ │ │ │ ├── arm_iir_lattice_init_q15.c
│ │ │ │ ├── arm_iir_lattice_init_q31.c
│ │ │ │ ├── arm_iir_lattice_q15.c
│ │ │ │ ├── arm_iir_lattice_q31.c
│ │ │ │ ├── arm_lms_f32.c
│ │ │ │ ├── arm_lms_init_f32.c
│ │ │ │ ├── arm_lms_init_q15.c
│ │ │ │ ├── arm_lms_init_q31.c
│ │ │ │ ├── arm_lms_norm_f32.c
│ │ │ │ ├── arm_lms_norm_init_f32.c
│ │ │ │ ├── arm_lms_norm_init_q15.c
│ │ │ │ ├── arm_lms_norm_init_q31.c
│ │ │ │ ├── arm_lms_norm_q15.c
│ │ │ │ ├── arm_lms_norm_q31.c
│ │ │ │ ├── arm_lms_q15.c
│ │ │ │ └── arm_lms_q31.c
│ │ │ │ ├── MatrixFunctions
│ │ │ │ ├── arm_mat_add_f32.c
│ │ │ │ ├── arm_mat_add_q15.c
│ │ │ │ ├── arm_mat_add_q31.c
│ │ │ │ ├── arm_mat_cmplx_mult_f32.c
│ │ │ │ ├── arm_mat_cmplx_mult_q15.c
│ │ │ │ ├── arm_mat_cmplx_mult_q31.c
│ │ │ │ ├── arm_mat_init_f32.c
│ │ │ │ ├── arm_mat_init_q15.c
│ │ │ │ ├── arm_mat_init_q31.c
│ │ │ │ ├── arm_mat_inverse_f32.c
│ │ │ │ ├── arm_mat_inverse_f64.c
│ │ │ │ ├── arm_mat_mult_f32.c
│ │ │ │ ├── arm_mat_mult_fast_q15.c
│ │ │ │ ├── arm_mat_mult_fast_q31.c
│ │ │ │ ├── arm_mat_mult_q15.c
│ │ │ │ ├── arm_mat_mult_q31.c
│ │ │ │ ├── arm_mat_scale_f32.c
│ │ │ │ ├── arm_mat_scale_q15.c
│ │ │ │ ├── arm_mat_scale_q31.c
│ │ │ │ ├── arm_mat_sub_f32.c
│ │ │ │ ├── arm_mat_sub_q15.c
│ │ │ │ ├── arm_mat_sub_q31.c
│ │ │ │ ├── arm_mat_trans_f32.c
│ │ │ │ ├── arm_mat_trans_q15.c
│ │ │ │ └── arm_mat_trans_q31.c
│ │ │ │ ├── StatisticsFunctions
│ │ │ │ ├── arm_max_f32.c
│ │ │ │ ├── arm_max_q15.c
│ │ │ │ ├── arm_max_q31.c
│ │ │ │ ├── arm_max_q7.c
│ │ │ │ ├── arm_mean_f32.c
│ │ │ │ ├── arm_mean_q15.c
│ │ │ │ ├── arm_mean_q31.c
│ │ │ │ ├── arm_mean_q7.c
│ │ │ │ ├── arm_min_f32.c
│ │ │ │ ├── arm_min_q15.c
│ │ │ │ ├── arm_min_q31.c
│ │ │ │ ├── arm_min_q7.c
│ │ │ │ ├── arm_power_f32.c
│ │ │ │ ├── arm_power_q15.c
│ │ │ │ ├── arm_power_q31.c
│ │ │ │ ├── arm_power_q7.c
│ │ │ │ ├── arm_rms_f32.c
│ │ │ │ ├── arm_rms_q15.c
│ │ │ │ ├── arm_rms_q31.c
│ │ │ │ ├── arm_std_f32.c
│ │ │ │ ├── arm_std_q15.c
│ │ │ │ ├── arm_std_q31.c
│ │ │ │ ├── arm_var_f32.c
│ │ │ │ ├── arm_var_q15.c
│ │ │ │ └── arm_var_q31.c
│ │ │ │ ├── SupportFunctions
│ │ │ │ ├── arm_copy_f32.c
│ │ │ │ ├── arm_copy_q15.c
│ │ │ │ ├── arm_copy_q31.c
│ │ │ │ ├── arm_copy_q7.c
│ │ │ │ ├── arm_fill_f32.c
│ │ │ │ ├── arm_fill_q15.c
│ │ │ │ ├── arm_fill_q31.c
│ │ │ │ ├── arm_fill_q7.c
│ │ │ │ ├── arm_float_to_q15.c
│ │ │ │ ├── arm_float_to_q31.c
│ │ │ │ ├── arm_float_to_q7.c
│ │ │ │ ├── arm_q15_to_float.c
│ │ │ │ ├── arm_q15_to_q31.c
│ │ │ │ ├── arm_q15_to_q7.c
│ │ │ │ ├── arm_q31_to_float.c
│ │ │ │ ├── arm_q31_to_q15.c
│ │ │ │ ├── arm_q31_to_q7.c
│ │ │ │ ├── arm_q7_to_float.c
│ │ │ │ ├── arm_q7_to_q15.c
│ │ │ │ └── arm_q7_to_q31.c
│ │ │ │ └── TransformFunctions
│ │ │ │ ├── arm_bitreversal.c
│ │ │ │ ├── arm_cfft_f32.c
│ │ │ │ ├── arm_cfft_q15.c
│ │ │ │ ├── arm_cfft_q31.c
│ │ │ │ ├── arm_cfft_radix2_f32.c
│ │ │ │ ├── arm_cfft_radix2_init_f32.c
│ │ │ │ ├── arm_cfft_radix2_init_q15.c
│ │ │ │ ├── arm_cfft_radix2_init_q31.c
│ │ │ │ ├── arm_cfft_radix2_q15.c
│ │ │ │ ├── arm_cfft_radix2_q31.c
│ │ │ │ ├── arm_cfft_radix4_f32.c
│ │ │ │ ├── arm_cfft_radix4_init_f32.c
│ │ │ │ ├── arm_cfft_radix4_init_q15.c
│ │ │ │ ├── arm_cfft_radix4_init_q31.c
│ │ │ │ ├── arm_cfft_radix4_q15.c
│ │ │ │ ├── arm_cfft_radix4_q31.c
│ │ │ │ ├── arm_cfft_radix8_f32.c
│ │ │ │ ├── arm_dct4_f32.c
│ │ │ │ ├── arm_dct4_init_f32.c
│ │ │ │ ├── arm_dct4_init_q15.c
│ │ │ │ ├── arm_dct4_init_q31.c
│ │ │ │ ├── arm_dct4_q15.c
│ │ │ │ ├── arm_dct4_q31.c
│ │ │ │ ├── arm_rfft_f32.c
│ │ │ │ ├── arm_rfft_fast_f32.c
│ │ │ │ ├── arm_rfft_fast_init_f32.c
│ │ │ │ ├── arm_rfft_init_f32.c
│ │ │ │ ├── arm_rfft_init_q15.c
│ │ │ │ ├── arm_rfft_init_q31.c
│ │ │ │ ├── arm_rfft_q15.c
│ │ │ │ └── arm_rfft_q31.c
│ │ ├── Device
│ │ │ └── ST
│ │ │ │ └── STM32F1xx
│ │ │ │ ├── Include
│ │ │ │ ├── stm32f100xb.h
│ │ │ │ ├── stm32f100xe.h
│ │ │ │ ├── stm32f101x6.h
│ │ │ │ ├── stm32f101xb.h
│ │ │ │ ├── stm32f101xe.h
│ │ │ │ ├── stm32f101xg.h
│ │ │ │ ├── stm32f102x6.h
│ │ │ │ ├── stm32f102xb.h
│ │ │ │ ├── stm32f103x6.h
│ │ │ │ ├── stm32f103xb.h
│ │ │ │ ├── stm32f103xe.h
│ │ │ │ ├── stm32f103xg.h
│ │ │ │ ├── stm32f105xc.h
│ │ │ │ ├── stm32f107xc.h
│ │ │ │ ├── stm32f1xx.h
│ │ │ │ └── system_stm32f1xx.h
│ │ │ │ └── Source
│ │ │ │ └── Templates
│ │ │ │ ├── arm
│ │ │ │ ├── startup_stm32f100xb.s
│ │ │ │ ├── startup_stm32f100xe.s
│ │ │ │ ├── startup_stm32f101x6.s
│ │ │ │ ├── startup_stm32f101xb.s
│ │ │ │ ├── startup_stm32f101xe.s
│ │ │ │ ├── startup_stm32f101xg.s
│ │ │ │ ├── startup_stm32f102x6.s
│ │ │ │ ├── startup_stm32f102xb.s
│ │ │ │ ├── startup_stm32f103x6.s
│ │ │ │ ├── startup_stm32f103xb.s
│ │ │ │ ├── startup_stm32f103xe.s
│ │ │ │ ├── startup_stm32f103xg.s
│ │ │ │ ├── startup_stm32f105xc.s
│ │ │ │ └── startup_stm32f107xc.s
│ │ │ │ ├── gcc
│ │ │ │ ├── startup_stm32f100xb.s
│ │ │ │ ├── startup_stm32f100xe.s
│ │ │ │ ├── startup_stm32f101x6.s
│ │ │ │ ├── startup_stm32f101xb.s
│ │ │ │ ├── startup_stm32f101xe.s
│ │ │ │ ├── startup_stm32f101xg.s
│ │ │ │ ├── startup_stm32f102x6.s
│ │ │ │ ├── startup_stm32f102xb.s
│ │ │ │ ├── startup_stm32f103x6.s
│ │ │ │ ├── startup_stm32f103xb.s
│ │ │ │ ├── startup_stm32f103xe.s
│ │ │ │ ├── startup_stm32f103xg.s
│ │ │ │ ├── startup_stm32f105xc.s
│ │ │ │ └── startup_stm32f107xc.s
│ │ │ │ ├── iar
│ │ │ │ ├── linker
│ │ │ │ │ ├── stm32f100xb_flash.icf
│ │ │ │ │ ├── stm32f100xb_sram.icf
│ │ │ │ │ ├── stm32f100xe_flash.icf
│ │ │ │ │ ├── stm32f100xe_sram.icf
│ │ │ │ │ ├── stm32f101x6_flash.icf
│ │ │ │ │ ├── stm32f101x6_sram.icf
│ │ │ │ │ ├── stm32f101xb_flash.icf
│ │ │ │ │ ├── stm32f101xb_sram.icf
│ │ │ │ │ ├── stm32f101xe_flash.icf
│ │ │ │ │ ├── stm32f101xe_sram.icf
│ │ │ │ │ ├── stm32f101xg_flash.icf
│ │ │ │ │ ├── stm32f101xg_sram.icf
│ │ │ │ │ ├── stm32f102x6_flash.icf
│ │ │ │ │ ├── stm32f102x6_sram.icf
│ │ │ │ │ ├── stm32f102xb_flash.icf
│ │ │ │ │ ├── stm32f102xb_sram.icf
│ │ │ │ │ ├── stm32f103x6_flash.icf
│ │ │ │ │ ├── stm32f103x6_sram.icf
│ │ │ │ │ ├── stm32f103xb_flash.icf
│ │ │ │ │ ├── stm32f103xb_sram.icf
│ │ │ │ │ ├── stm32f103xe_flash.icf
│ │ │ │ │ ├── stm32f103xe_sram.icf
│ │ │ │ │ ├── stm32f103xg_flash.icf
│ │ │ │ │ ├── stm32f103xg_sram.icf
│ │ │ │ │ ├── stm32f105xc_flash.icf
│ │ │ │ │ ├── stm32f105xc_sram.icf
│ │ │ │ │ ├── stm32f107xc_flash.icf
│ │ │ │ │ └── stm32f107xc_sram.icf
│ │ │ │ ├── startup_stm32f100xb.s
│ │ │ │ ├── startup_stm32f100xe.s
│ │ │ │ ├── startup_stm32f101x6.s
│ │ │ │ ├── startup_stm32f101xb.s
│ │ │ │ ├── startup_stm32f101xe.s
│ │ │ │ ├── startup_stm32f101xg.s
│ │ │ │ ├── startup_stm32f102x6.s
│ │ │ │ ├── startup_stm32f102xb.s
│ │ │ │ ├── startup_stm32f103x6.s
│ │ │ │ ├── startup_stm32f103xb.s
│ │ │ │ ├── startup_stm32f103xe.s
│ │ │ │ ├── startup_stm32f103xg.s
│ │ │ │ ├── startup_stm32f105xc.s
│ │ │ │ └── startup_stm32f107xc.s
│ │ │ │ └── system_stm32f1xx.c
│ │ ├── Include
│ │ │ ├── arm_common_tables.h
│ │ │ ├── arm_const_structs.h
│ │ │ ├── arm_math.h
│ │ │ ├── cmsis_armcc.h
│ │ │ ├── cmsis_armcc_V6.h
│ │ │ ├── cmsis_gcc.h
│ │ │ ├── core_cm0.h
│ │ │ ├── core_cm0plus.h
│ │ │ ├── core_cm3.h
│ │ │ ├── core_cm4.h
│ │ │ ├── core_cm7.h
│ │ │ ├── core_cmFunc.h
│ │ │ ├── core_cmInstr.h
│ │ │ ├── core_cmSimd.h
│ │ │ ├── core_sc000.h
│ │ │ └── core_sc300.h
│ │ ├── Lib
│ │ │ ├── ARM
│ │ │ │ ├── arm_cortexM3b_math.lib
│ │ │ │ └── arm_cortexM3l_math.lib
│ │ │ └── GCC
│ │ │ │ └── libarm_cortexM3l_math.a
│ │ └── RTOS
│ │ │ └── Template
│ │ │ └── cmsis_os.h
│ └── STM32F1xx_HAL_Driver
│ │ ├── Inc
│ │ ├── Legacy
│ │ │ ├── stm32_hal_legacy.h
│ │ │ ├── stm32f1xx_hal_can_ex_legacy.h
│ │ │ └── stm32f1xx_hal_can_legacy.h
│ │ ├── stm32_assert_template.h
│ │ ├── stm32f1xx_hal.h
│ │ ├── stm32f1xx_hal_adc.h
│ │ ├── stm32f1xx_hal_adc_ex.h
│ │ ├── stm32f1xx_hal_can.h
│ │ ├── stm32f1xx_hal_cec.h
│ │ ├── stm32f1xx_hal_conf_template.h
│ │ ├── stm32f1xx_hal_cortex.h
│ │ ├── stm32f1xx_hal_crc.h
│ │ ├── stm32f1xx_hal_dac.h
│ │ ├── stm32f1xx_hal_dac_ex.h
│ │ ├── stm32f1xx_hal_def.h
│ │ ├── stm32f1xx_hal_dma.h
│ │ ├── stm32f1xx_hal_dma_ex.h
│ │ ├── stm32f1xx_hal_eth.h
│ │ ├── stm32f1xx_hal_flash.h
│ │ ├── stm32f1xx_hal_flash_ex.h
│ │ ├── stm32f1xx_hal_gpio.h
│ │ ├── stm32f1xx_hal_gpio_ex.h
│ │ ├── stm32f1xx_hal_hcd.h
│ │ ├── stm32f1xx_hal_i2c.h
│ │ ├── stm32f1xx_hal_i2s.h
│ │ ├── stm32f1xx_hal_irda.h
│ │ ├── stm32f1xx_hal_iwdg.h
│ │ ├── stm32f1xx_hal_mmc.h
│ │ ├── stm32f1xx_hal_nand.h
│ │ ├── stm32f1xx_hal_nor.h
│ │ ├── stm32f1xx_hal_pccard.h
│ │ ├── stm32f1xx_hal_pcd.h
│ │ ├── stm32f1xx_hal_pcd_ex.h
│ │ ├── stm32f1xx_hal_pwr.h
│ │ ├── stm32f1xx_hal_rcc.h
│ │ ├── stm32f1xx_hal_rcc_ex.h
│ │ ├── stm32f1xx_hal_rtc.h
│ │ ├── stm32f1xx_hal_rtc_ex.h
│ │ ├── stm32f1xx_hal_sd.h
│ │ ├── stm32f1xx_hal_smartcard.h
│ │ ├── stm32f1xx_hal_spi.h
│ │ ├── stm32f1xx_hal_sram.h
│ │ ├── stm32f1xx_hal_tim.h
│ │ ├── stm32f1xx_hal_tim_ex.h
│ │ ├── stm32f1xx_hal_uart.h
│ │ ├── stm32f1xx_hal_usart.h
│ │ ├── stm32f1xx_hal_wwdg.h
│ │ ├── stm32f1xx_ll_adc.h
│ │ ├── stm32f1xx_ll_bus.h
│ │ ├── stm32f1xx_ll_cortex.h
│ │ ├── stm32f1xx_ll_crc.h
│ │ ├── stm32f1xx_ll_dac.h
│ │ ├── stm32f1xx_ll_dma.h
│ │ ├── stm32f1xx_ll_exti.h
│ │ ├── stm32f1xx_ll_fsmc.h
│ │ ├── stm32f1xx_ll_gpio.h
│ │ ├── stm32f1xx_ll_i2c.h
│ │ ├── stm32f1xx_ll_iwdg.h
│ │ ├── stm32f1xx_ll_pwr.h
│ │ ├── stm32f1xx_ll_rcc.h
│ │ ├── stm32f1xx_ll_rtc.h
│ │ ├── stm32f1xx_ll_sdmmc.h
│ │ ├── stm32f1xx_ll_spi.h
│ │ ├── stm32f1xx_ll_system.h
│ │ ├── stm32f1xx_ll_tim.h
│ │ ├── stm32f1xx_ll_usart.h
│ │ ├── stm32f1xx_ll_usb.h
│ │ ├── stm32f1xx_ll_utils.h
│ │ └── stm32f1xx_ll_wwdg.h
│ │ └── Src
│ │ ├── stm32f1xx_hal.c
│ │ ├── stm32f1xx_hal_adc.c
│ │ ├── stm32f1xx_hal_adc_ex.c
│ │ ├── stm32f1xx_hal_can.c
│ │ ├── stm32f1xx_hal_cec.c
│ │ ├── stm32f1xx_hal_cortex.c
│ │ ├── stm32f1xx_hal_crc.c
│ │ ├── stm32f1xx_hal_dac.c
│ │ ├── stm32f1xx_hal_dac_ex.c
│ │ ├── stm32f1xx_hal_dma.c
│ │ ├── stm32f1xx_hal_eth.c
│ │ ├── stm32f1xx_hal_flash.c
│ │ ├── stm32f1xx_hal_flash_ex.c
│ │ ├── stm32f1xx_hal_gpio.c
│ │ ├── stm32f1xx_hal_gpio_ex.c
│ │ ├── stm32f1xx_hal_hcd.c
│ │ ├── stm32f1xx_hal_i2c.c
│ │ ├── stm32f1xx_hal_i2s.c
│ │ ├── stm32f1xx_hal_irda.c
│ │ ├── stm32f1xx_hal_iwdg.c
│ │ ├── stm32f1xx_hal_mmc.c
│ │ ├── stm32f1xx_hal_msp_template.c
│ │ ├── stm32f1xx_hal_nand.c
│ │ ├── stm32f1xx_hal_nor.c
│ │ ├── stm32f1xx_hal_pccard.c
│ │ ├── stm32f1xx_hal_pcd.c
│ │ ├── stm32f1xx_hal_pcd_ex.c
│ │ ├── stm32f1xx_hal_pwr.c
│ │ ├── stm32f1xx_hal_rcc.c
│ │ ├── stm32f1xx_hal_rcc_ex.c
│ │ ├── stm32f1xx_hal_rtc.c
│ │ ├── stm32f1xx_hal_rtc_ex.c
│ │ ├── stm32f1xx_hal_sd.c
│ │ ├── stm32f1xx_hal_smartcard.c
│ │ ├── stm32f1xx_hal_spi.c
│ │ ├── stm32f1xx_hal_spi_ex.c
│ │ ├── stm32f1xx_hal_sram.c
│ │ ├── stm32f1xx_hal_tim.c
│ │ ├── stm32f1xx_hal_tim_ex.c
│ │ ├── stm32f1xx_hal_timebase_rtc_alarm_template.c
│ │ ├── stm32f1xx_hal_timebase_tim_template.c
│ │ ├── stm32f1xx_hal_uart.c
│ │ ├── stm32f1xx_hal_usart.c
│ │ ├── stm32f1xx_hal_wwdg.c
│ │ ├── stm32f1xx_ll_adc.c
│ │ ├── stm32f1xx_ll_crc.c
│ │ ├── stm32f1xx_ll_dac.c
│ │ ├── stm32f1xx_ll_dma.c
│ │ ├── stm32f1xx_ll_exti.c
│ │ ├── stm32f1xx_ll_fsmc.c
│ │ ├── stm32f1xx_ll_gpio.c
│ │ ├── stm32f1xx_ll_i2c.c
│ │ ├── stm32f1xx_ll_pwr.c
│ │ ├── stm32f1xx_ll_rcc.c
│ │ ├── stm32f1xx_ll_rtc.c
│ │ ├── stm32f1xx_ll_sdmmc.c
│ │ ├── stm32f1xx_ll_spi.c
│ │ ├── stm32f1xx_ll_tim.c
│ │ ├── stm32f1xx_ll_usart.c
│ │ ├── stm32f1xx_ll_usb.c
│ │ └── stm32f1xx_ll_utils.c
├── Inc
│ ├── gpio.h
│ ├── main.h
│ ├── stm32f1xx_hal_conf.h
│ ├── stm32f1xx_it.h
│ └── usart.h
├── MDK-ARM
│ ├── DebugConfig
│ │ └── app_STM32F103RB.dbgconf
│ ├── JLinkLog.txt
│ ├── JLinkSettings.ini
│ ├── RTE
│ │ └── _app
│ │ │ └── RTE_Components.h
│ ├── app.bin
│ ├── app.uvguix.nest
│ ├── app.uvoptx
│ ├── app.uvprojx
│ ├── startup_stm32f103xb.lst
│ └── startup_stm32f103xb.s
├── Src
│ ├── gpio.c
│ ├── main.c
│ ├── stm32f1xx_hal_msp.c
│ ├── stm32f1xx_it.c
│ ├── system_stm32f1xx.c
│ └── usart.c
└── app.ioc
├── bootloader
├── .mxproject
├── Drivers
│ ├── CMSIS
│ │ ├── Device
│ │ │ └── ST
│ │ │ │ └── STM32F1xx
│ │ │ │ └── Include
│ │ │ │ ├── stm32f103xb.h
│ │ │ │ ├── stm32f1xx.h
│ │ │ │ └── system_stm32f1xx.h
│ │ └── Include
│ │ │ ├── arm_common_tables.h
│ │ │ ├── arm_const_structs.h
│ │ │ ├── arm_math.h
│ │ │ ├── cmsis_armcc.h
│ │ │ ├── cmsis_armcc_V6.h
│ │ │ ├── cmsis_gcc.h
│ │ │ ├── core_cm0.h
│ │ │ ├── core_cm0plus.h
│ │ │ ├── core_cm3.h
│ │ │ ├── core_cm4.h
│ │ │ ├── core_cm7.h
│ │ │ ├── core_cmFunc.h
│ │ │ ├── core_cmInstr.h
│ │ │ ├── core_cmSimd.h
│ │ │ ├── core_sc000.h
│ │ │ └── core_sc300.h
│ └── STM32F1xx_HAL_Driver
│ │ ├── Inc
│ │ ├── Legacy
│ │ │ └── stm32_hal_legacy.h
│ │ ├── stm32f1xx_hal.h
│ │ ├── stm32f1xx_hal_cortex.h
│ │ ├── stm32f1xx_hal_crc.h
│ │ ├── stm32f1xx_hal_def.h
│ │ ├── stm32f1xx_hal_dma.h
│ │ ├── stm32f1xx_hal_dma_ex.h
│ │ ├── stm32f1xx_hal_flash.h
│ │ ├── stm32f1xx_hal_flash_ex.h
│ │ ├── stm32f1xx_hal_gpio.h
│ │ ├── stm32f1xx_hal_gpio_ex.h
│ │ ├── stm32f1xx_hal_pwr.h
│ │ ├── stm32f1xx_hal_rcc.h
│ │ ├── stm32f1xx_hal_rcc_ex.h
│ │ ├── stm32f1xx_hal_tim.h
│ │ ├── stm32f1xx_hal_tim_ex.h
│ │ └── stm32f1xx_hal_uart.h
│ │ └── Src
│ │ ├── stm32f1xx_hal.c
│ │ ├── stm32f1xx_hal_cortex.c
│ │ ├── stm32f1xx_hal_crc.c
│ │ ├── stm32f1xx_hal_dma.c
│ │ ├── stm32f1xx_hal_flash.c
│ │ ├── stm32f1xx_hal_flash_ex.c
│ │ ├── stm32f1xx_hal_gpio.c
│ │ ├── stm32f1xx_hal_gpio_ex.c
│ │ ├── stm32f1xx_hal_pwr.c
│ │ ├── stm32f1xx_hal_rcc.c
│ │ ├── stm32f1xx_hal_rcc_ex.c
│ │ ├── stm32f1xx_hal_tim.c
│ │ ├── stm32f1xx_hal_tim_ex.c
│ │ └── stm32f1xx_hal_uart.c
├── Inc
│ ├── bootcmd.h
│ ├── bootloader.h
│ ├── crc.h
│ ├── debug.h
│ ├── dma.h
│ ├── gpio.h
│ ├── main.h
│ ├── stm32f1xx_hal_conf.h
│ ├── stm32f1xx_it.h
│ └── usart.h
├── MDK-ARM
│ ├── DebugConfig
│ │ └── bootloader_STM32F103RB.dbgconf
│ ├── EventRecorderStub.scvd
│ ├── JLinkLog.txt
│ ├── JLinkSettings.ini
│ ├── RTE
│ │ └── _bootloader
│ │ │ └── RTE_Components.h
│ ├── bootloader.uvguix.nest
│ ├── bootloader.uvoptx
│ ├── bootloader.uvprojx
│ ├── startup_stm32f103xb.lst
│ └── startup_stm32f103xb.s
├── Src
│ ├── bootcmd.cpp
│ ├── bootloader.c
│ ├── crc.c
│ ├── dma.c
│ ├── gpio.c
│ ├── main.c
│ ├── stm32f1xx_hal_msp.c
│ ├── stm32f1xx_it.c
│ ├── system_stm32f1xx.c
│ └── usart.c
└── bootloader.ioc
├── docs
└── test.PNG
└── test
├── app-test-1.bin
└── app-test-2.bin
/.gitignore:
--------------------------------------------------------------------------------
1 | */MDK-ARM/bootloader/
2 | */MDK-ARM/app/
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | #
stm32-boot
2 | ## 简介
3 | stm32在线升级程序,bootloader程序通过仿真器烧录到flash中stm32在线升级程序;
4 | bootloader程序通过仿真器烧录到flash中,从uart1中接收命令和app的bin升级。
5 | ## 测试
6 | 在stm32RBT6 flash:128KB ram:20KB上测试使用,其他型号请自行修改bootloader.ioc.
7 |
8 | ## 流程说明:
9 |
10 | ```
11 | graph TB
12 | A1((stm32上电)) --> B0{等待bootcmd命令}
13 |
14 | B0 --> |接收到cmd命令| D1[进入bootcmd模式]
15 | B0 --> |3S内没有收到cmd命令| B1{校验app代码crc通过?}
16 |
17 | B1 --> |Y| C1[运行app程序]
18 | B1 --> |N| C2[进入升级流程]
19 |
20 | C2 --> D1
21 |
22 | D1 --> |FE A5 01| E1[建立连接]
23 | D1 --> |FE A5 02| E2[擦除FLASH]
24 | D1 --> |FE A5 04| E4[开始写入flash]
25 | D1 --> |FE A5 05| E5[写入crc]
26 | D1 --> |FE A5 F2| E6[单片机重启]
27 | D1 --> |FE A5 F3| E7[强制跳转到app]
28 | D1 --> |FE A5 F4| E8[升级测试]
29 |
30 | E1--> F1[ret: FE A5 01 03 FF 03 00 01]
31 | E2--> F2[延时1s]
32 | E4--> F4[连续写入,每次写入小于256字节,间隔10ms]
33 | F4 --> |FE A5 F1| G1[结束编程]
34 | ```
35 | ## 内存分配:
36 |
37 | use | start addr | end addr | size
38 | ---|---|---|---
39 | total| 0x08000000 | 0x0801FFFF |0x00020000
40 | bootloader | 0x08000000 | 0x08003FFF |0x00004000
41 | app| 0x08004000 | 0x08013FFF |0x00010000
42 | free| 0x08014000 | 0x0801FBFE |0x0000BBFE
43 | Private data| 0x801F000 | 0x0801FFFF |0x00001000
44 |
45 | ## 演示
46 | 如下图:1、打开串口,给已经烧入bootloader的单片机上电且复位。
47 | 2、按照图中1-7顺序执行。
48 | 3、注意第四步,加载app测试程序的bin文件,在发送设置中设置每发送256字节延迟100ms,发送文件。
49 | 4、重启后单片机三秒后执行app程序,如果没有跳转到app,请检查crc。
50 | 
51 |
52 | ## 测试
53 | 在/test/目录下由两个bin文件可以测试使用,通过bootloader更新bin后在串口会看到不同的打印效果。
54 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_f32.c
9 | *
10 | * Description: Floating-point PID Control initialization function
11 | *
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * ------------------------------------------------------------------- */
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @addtogroup PID
46 | * @{
47 | */
48 |
49 | /**
50 | * @brief Initialization function for the floating-point PID Control.
51 | * @param[in,out] *S points to an instance of the PID structure.
52 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state.
53 | * @return none.
54 | * \par Description:
55 | * \par
56 | * The resetStateFlag
specifies whether to set state to zero or not. \n
57 | * The function computes the structure fields: A0
, A1
A2
58 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
59 | * also sets the state variables to all zeros.
60 | */
61 |
62 | void arm_pid_init_f32(
63 | arm_pid_instance_f32 * S,
64 | int32_t resetStateFlag)
65 | {
66 |
67 | /* Derived coefficient A0 */
68 | S->A0 = S->Kp + S->Ki + S->Kd;
69 |
70 | /* Derived coefficient A1 */
71 | S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
72 |
73 | /* Derived coefficient A2 */
74 | S->A2 = S->Kd;
75 |
76 | /* Check whether state needs reset or not */
77 | if(resetStateFlag)
78 | {
79 | /* Clear the state buffer. The size will be always 3 samples */
80 | memset(S->state, 0, 3u * sizeof(float32_t));
81 | }
82 |
83 | }
84 |
85 | /**
86 | * @} end of PID group
87 | */
88 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_f32.c
9 | *
10 | * Description: Floating-point PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the floating-point PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_f32(
56 | arm_pid_instance_f32 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(float32_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q15.c
9 | *
10 | * Description: Q15 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q15 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q15(
56 | arm_pid_instance_q15 * S)
57 | {
58 | /* Reset state to zero, The size will be always 3 samples */
59 | memset(S->state, 0, 3u * sizeof(q15_t));
60 | }
61 |
62 | /**
63 | * @} end of PID group
64 | */
65 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q31.c
9 | *
10 | * Description: Q31 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q31 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q31(
56 | arm_pid_instance_q31 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(q31_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q15.c
9 | *
10 | * Description: Fast cosine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q15_t arm_cos_q15(
63 | q15_t x)
64 | {
65 | q15_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q15_t a, b; /* Four nearest output values */
68 | q15_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint16_t)x + 0x2000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint16_t)x + 0x8000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q15[index];
85 | b = sinTable_q15[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q31_t)(0x8000-fract)*a >> 16;
89 | cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract*b)) >> 16);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q31.c
9 | *
10 | * Description: Fast cosine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q31_t arm_cos_q31(
63 | q31_t x)
64 | {
65 | q31_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q31_t a, b; /* Four nearest output values */
68 | q31_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint32_t)x + 0x20000000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint32_t)x + 0x80000000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q31[index];
85 | b = sinTable_q31[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q63_t)(0x80000000-fract)*a >> 32;
89 | cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q15.c
9 | *
10 | * Description: Fast sine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
59 | */
60 |
61 | q15_t arm_sin_q15(
62 | q15_t x)
63 | {
64 | q15_t sinVal; /* Temporary variables for input, output */
65 | int32_t index; /* Index variables */
66 | q15_t a, b; /* Four nearest output values */
67 | q15_t fract; /* Temporary values for fractional values */
68 |
69 | /* Calculate the nearest index */
70 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
71 |
72 | /* Calculation of fractional value */
73 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
74 |
75 | /* Read two nearest values of input value from the sin table */
76 | a = sinTable_q15[index];
77 | b = sinTable_q15[index+1];
78 |
79 | /* Linear interpolation process */
80 | sinVal = (q31_t)(0x8000-fract)*a >> 16;
81 | sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
82 |
83 | return sinVal << 1;
84 | }
85 |
86 | /**
87 | * @} end of sin group
88 | */
89 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q31.c
9 | *
10 | * Description: Fast sine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
59 |
60 | q31_t arm_sin_q31(
61 | q31_t x)
62 | {
63 | q31_t sinVal; /* Temporary variables for input, output */
64 | int32_t index; /* Index variables */
65 | q31_t a, b; /* Four nearest output values */
66 | q31_t fract; /* Temporary values for fractional values */
67 |
68 | /* Calculate the nearest index */
69 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
70 |
71 | /* Calculation of fractional value */
72 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
73 |
74 | /* Read two nearest values of input value from the sin table */
75 | a = sinTable_q31[index];
76 | b = sinTable_q31[index+1];
77 |
78 | /* Linear interpolation process */
79 | sinVal = (q63_t)(0x80000000-fract)*a >> 32;
80 | sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
81 |
82 | return sinVal << 1;
83 | }
84 |
85 | /**
86 | * @} end of sin group
87 | */
88 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_f32.c
9 | *
10 | * Description: Floating-point FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState
points to the array of state variables.
70 | * pState
is of length numTaps+blockSize-1
samples, where blockSize
is the number of input samples processed by each call to arm_fir_f32()
.
71 | */
72 |
73 | void arm_fir_init_f32(
74 | arm_fir_instance_f32 * S,
75 | uint16_t numTaps,
76 | float32_t * pCoeffs,
77 | float32_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q31.c
9 | *
10 | * Description: Q31 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the Q31 FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState
points to the array of state variables.
70 | * pState
is of length numTaps+blockSize-1
samples, where blockSize
is the number of input samples processed by each call to arm_fir_q31()
.
71 | */
72 |
73 | void arm_fir_init_q31(
74 | arm_fir_instance_q31 * S,
75 | uint16_t numTaps,
76 | q31_t * pCoeffs,
77 | q31_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q7.c
9 | *
10 | * Description: Q7 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 | /**
52 | * @param[in,out] *S points to an instance of the Q7 FIR filter structure.
53 | * @param[in] numTaps Number of filter coefficients in the filter.
54 | * @param[in] *pCoeffs points to the filter coefficients buffer.
55 | * @param[in] *pState points to the state buffer.
56 | * @param[in] blockSize number of samples that are processed per call.
57 | * @return none
58 | *
59 | * Description:
60 | * \par
61 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * \par
66 | * pState
points to the array of state variables.
67 | * pState
is of length numTaps+blockSize-1
samples, where blockSize
is the number of input samples processed by each call to arm_fir_q7()
.
68 | */
69 |
70 | void arm_fir_init_q7(
71 | arm_fir_instance_q7 * S,
72 | uint16_t numTaps,
73 | q7_t * pCoeffs,
74 | q7_t * pState,
75 | uint32_t blockSize)
76 | {
77 |
78 | /* Assign filter taps */
79 | S->numTaps = numTaps;
80 |
81 | /* Assign coefficient pointer */
82 | S->pCoeffs = pCoeffs;
83 |
84 | /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
85 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
86 |
87 | /* Assign state pointer */
88 | S->pState = pState;
89 |
90 | }
91 |
92 | /**
93 | * @} end of FIR group
94 | */
95 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point FIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_f32(
62 | arm_fir_lattice_instance_f32 * S,
63 | uint16_t numStages,
64 | float32_t * pCoeffs,
65 | float32_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(float32_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q15.c
9 | *
10 | * Description: Q15 FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q15(
62 | arm_fir_lattice_instance_q15 * S,
63 | uint16_t numStages,
64 | q15_t * pCoeffs,
65 | q15_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q15_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q31.c
9 | *
10 | * Description: Q31 FIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q31(
62 | arm_fir_lattice_instance_q31 * S,
63 | uint16_t numStages,
64 | q31_t * pCoeffs,
65 | q31_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q31_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point IIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_f32(
64 | arm_iir_lattice_instance_f32 * S,
65 | uint16_t numStages,
66 | float32_t * pkCoeffs,
67 | float32_t * pvCoeffs,
68 | float32_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q15.c
9 | *
10 | * Description: Q15 IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process per call.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q15(
64 | arm_iir_lattice_instance_q15 * S,
65 | uint16_t numStages,
66 | q15_t * pkCoeffs,
67 | q15_t * pvCoeffs,
68 | q15_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q31.c
9 | *
10 | * Description: Initialization function for the Q31 IIR lattice filter.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q31(
64 | arm_iir_lattice_instance_q31 * S,
65 | uint16_t numStages,
66 | q31_t * pkCoeffs,
67 | q31_t * pvCoeffs,
68 | q31_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_f32.c
9 | *
10 | * Description: Floating-point LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup LMS
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for floating-point LMS filter.
50 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
51 | * @param[in] numTaps number of filter coefficients.
52 | * @param[in] *pCoeffs points to the coefficient buffer.
53 | * @param[in] *pState points to state buffer.
54 | * @param[in] mu step size that controls filter coefficient updates.
55 | * @param[in] blockSize number of samples to process.
56 | * @return none.
57 | */
58 |
59 | /**
60 | * \par Description:
61 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * The initial filter coefficients serve as a starting point for the adaptive filter.
66 | * pState
points to an array of length numTaps+blockSize-1
samples, where blockSize
is the number of input samples processed by each call to arm_lms_f32()
.
67 | */
68 |
69 | void arm_lms_init_f32(
70 | arm_lms_instance_f32 * S,
71 | uint16_t numTaps,
72 | float32_t * pCoeffs,
73 | float32_t * pState,
74 | float32_t mu,
75 | uint32_t blockSize)
76 | {
77 | /* Assign filter taps */
78 | S->numTaps = numTaps;
79 |
80 | /* Assign coefficient pointer */
81 | S->pCoeffs = pCoeffs;
82 |
83 | /* Clear state buffer and size is always blockSize + numTaps */
84 | memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
85 |
86 | /* Assign state pointer */
87 | S->pState = pState;
88 |
89 | /* Assign Step size value */
90 | S->mu = mu;
91 | }
92 |
93 | /**
94 | * @} end of LMS group
95 | */
96 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_f32.c
9 | *
10 | * Description: Floating-point matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | * Initializes the underlying matrix data structure.
51 | * The functions set the numRows
,
52 | * numCols
, and pData
fields
53 | * of the matrix data structure.
54 | */
55 |
56 | /**
57 | * @addtogroup MatrixInit
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Floating-point matrix initialization.
63 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
64 | * @param[in] nRows number of rows in the matrix.
65 | * @param[in] nColumns number of columns in the matrix.
66 | * @param[in] *pData points to the matrix data array.
67 | * @return none
68 | */
69 |
70 | void arm_mat_init_f32(
71 | arm_matrix_instance_f32 * S,
72 | uint16_t nRows,
73 | uint16_t nColumns,
74 | float32_t * pData)
75 | {
76 | /* Assign Number of Rows */
77 | S->numRows = nRows;
78 |
79 | /* Assign Number of Columns */
80 | S->numCols = nColumns;
81 |
82 | /* Assign Data pointer */
83 | S->pData = pData;
84 | }
85 |
86 | /**
87 | * @} end of MatrixInit group
88 | */
89 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q15.c
9 | *
10 | * Description: Q15 matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @ingroup groupMatrix
46 | */
47 |
48 | /**
49 | * @addtogroup MatrixInit
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Q15 matrix initialization.
55 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
56 | * @param[in] nRows number of rows in the matrix.
57 | * @param[in] nColumns number of columns in the matrix.
58 | * @param[in] *pData points to the matrix data array.
59 | * @return none
60 | */
61 |
62 | void arm_mat_init_q15(
63 | arm_matrix_instance_q15 * S,
64 | uint16_t nRows,
65 | uint16_t nColumns,
66 | q15_t * pData)
67 | {
68 | /* Assign Number of Rows */
69 | S->numRows = nRows;
70 |
71 | /* Assign Number of Columns */
72 | S->numCols = nColumns;
73 |
74 | /* Assign Data pointer */
75 | S->pData = pData;
76 | }
77 |
78 | /**
79 | * @} end of MatrixInit group
80 | */
81 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q31.c
9 | *
10 | * Description: Q31 matrix initialization.
11 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
12 | *
13 | * Redistribution and use in source and binary forms, with or without
14 | * modification, are permitted provided that the following conditions
15 | * are met:
16 | * - Redistributions of source code must retain the above copyright
17 | * notice, this list of conditions and the following disclaimer.
18 | * - Redistributions in binary form must reproduce the above copyright
19 | * notice, this list of conditions and the following disclaimer in
20 | * the documentation and/or other materials provided with the
21 | * distribution.
22 | * - Neither the name of ARM LIMITED nor the names of its contributors
23 | * may be used to endorse or promote products derived from this
24 | * software without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
29 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
30 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
31 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
32 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
36 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 | * POSSIBILITY OF SUCH DAMAGE.
38 | * -------------------------------------------------------------------------- */
39 |
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | */
51 |
52 | /**
53 | * @addtogroup MatrixInit
54 | * @{
55 | */
56 |
57 | /**
58 | * @brief Q31 matrix initialization.
59 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
60 | * @param[in] nRows number of rows in the matrix.
61 | * @param[in] nColumns number of columns in the matrix.
62 | * @param[in] *pData points to the matrix data array.
63 | * @return none
64 | */
65 |
66 | void arm_mat_init_q31(
67 | arm_matrix_instance_q31 * S,
68 | uint16_t nRows,
69 | uint16_t nColumns,
70 | q31_t * pData)
71 | {
72 | /* Assign Number of Rows */
73 | S->numRows = nRows;
74 |
75 | /* Assign Number of Columns */
76 | S->numCols = nColumns;
77 |
78 | /* Assign Data pointer */
79 | S->pData = pData;
80 | }
81 |
82 | /**
83 | * @} end of MatrixInit group
84 | */
85 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q15.c
9 | *
10 | * Description: Copies the elements of a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 | /**
52 | * @brief Copies the elements of a Q15 vector.
53 | * @param[in] *pSrc points to input vector
54 | * @param[out] *pDst points to output vector
55 | * @param[in] blockSize length of the input vector
56 | * @return none.
57 | *
58 | */
59 |
60 | void arm_copy_q15(
61 | q15_t * pSrc,
62 | q15_t * pDst,
63 | uint32_t blockSize)
64 | {
65 | uint32_t blkCnt; /* loop counter */
66 |
67 | #ifndef ARM_MATH_CM0_FAMILY
68 |
69 | /* Run the below code for Cortex-M4 and Cortex-M3 */
70 |
71 | /*loop Unrolling */
72 | blkCnt = blockSize >> 2u;
73 |
74 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 | ** a second loop below computes the remaining 1 to 3 samples. */
76 | while(blkCnt > 0u)
77 | {
78 | /* C = A */
79 | /* Read two inputs */
80 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
81 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
82 |
83 | /* Decrement the loop counter */
84 | blkCnt--;
85 | }
86 |
87 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
88 | ** No loop unrolling is used. */
89 | blkCnt = blockSize % 0x4u;
90 |
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 | while(blkCnt > 0u)
102 | {
103 | /* C = A */
104 | /* Copy and then store the value in the destination buffer */
105 | *pDst++ = *pSrc++;
106 |
107 | /* Decrement the loop counter */
108 | blkCnt--;
109 | }
110 | }
111 |
112 | /**
113 | * @} end of BasicCopy group
114 | */
115 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h:
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https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h
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/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h
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/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h
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/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h
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/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h
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/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h
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/app/Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
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1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f10x.h
4 | * @author MCD Application Team
5 | * @version V4.2.0
6 | * @date 31-March-2017
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2017 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /** @addtogroup CMSIS
39 | * @{
40 | */
41 |
42 | /** @addtogroup stm32f10x_system
43 | * @{
44 | */
45 |
46 | /**
47 | * @brief Define to prevent recursive inclusion
48 | */
49 | #ifndef __SYSTEM_STM32F10X_H
50 | #define __SYSTEM_STM32F10X_H
51 |
52 | #ifdef __cplusplus
53 | extern "C" {
54 | #endif
55 |
56 | /** @addtogroup STM32F10x_System_Includes
57 | * @{
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 |
65 | /** @addtogroup STM32F10x_System_Exported_types
66 | * @{
67 | */
68 |
69 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
70 | extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */
71 | extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /** @addtogroup STM32F10x_System_Exported_Constants
78 | * @{
79 | */
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | /** @addtogroup STM32F10x_System_Exported_Macros
86 | * @{
87 | */
88 |
89 | /**
90 | * @}
91 | */
92 |
93 | /** @addtogroup STM32F10x_System_Exported_Functions
94 | * @{
95 | */
96 |
97 | extern void SystemInit(void);
98 | extern void SystemCoreClockUpdate(void);
99 | /**
100 | * @}
101 | */
102 |
103 | #ifdef __cplusplus
104 | }
105 | #endif
106 |
107 | #endif /*__SYSTEM_STM32F10X_H */
108 |
109 | /**
110 | * @}
111 | */
112 |
113 | /**
114 | * @}
115 | */
116 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
117 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Include/arm_const_structs.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_const_structs.h
9 | *
10 | * Description: This file has constant structs that are initialized for
11 | * user convenience. For example, some can be given as
12 | * arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | * - Redistributions of source code must retain the above copyright
20 | * notice, this list of conditions and the following disclaimer.
21 | * - Redistributions in binary form must reproduce the above copyright
22 | * notice, this list of conditions and the following disclaimer in
23 | * the documentation and/or other materials provided with the
24 | * distribution.
25 | * - Neither the name of ARM LIMITED nor the names of its contributors
26 | * may be used to endorse or promote products derived from this
27 | * software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 |
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 |
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 |
49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
58 |
59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
68 |
69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
78 |
79 | #endif
80 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Include/core_cmFunc.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmFunc.h
3 | * @brief CMSIS Cortex-M Core Function Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMFUNC_H
42 | #define __CORE_CMFUNC_H
43 |
44 |
45 | /* ########################### Core Function Access ########################### */
46 | /** \ingroup CMSIS_Core_FunctionInterface
47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@} end of CMSIS_Core_RegAccFunctions */
86 |
87 | #endif /* __CORE_CMFUNC_H */
88 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Include/core_cmInstr.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmInstr.h
3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMINSTR_H
42 | #define __CORE_CMINSTR_H
43 |
44 |
45 | /* ########################## Core Instruction Access ######################### */
46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
47 | Access to dedicated instructions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
86 |
87 | #endif /* __CORE_CMINSTR_H */
88 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Include/core_cmSimd.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmSimd.h
3 | * @brief CMSIS Cortex-M SIMD Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMSIMD_H
42 | #define __CORE_CMSIMD_H
43 |
44 | #ifdef __cplusplus
45 | extern "C" {
46 | #endif
47 |
48 |
49 | /* ################### Compiler specific Intrinsics ########################### */
50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
51 | Access to dedicated SIMD instructions
52 | @{
53 | */
54 |
55 | /*------------------ RealView Compiler -----------------*/
56 | #if defined ( __CC_ARM )
57 | #include "cmsis_armcc.h"
58 |
59 | /*------------------ ARM Compiler V6 -------------------*/
60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
61 | #include "cmsis_armcc_V6.h"
62 |
63 | /*------------------ GNU Compiler ----------------------*/
64 | #elif defined ( __GNUC__ )
65 | #include "cmsis_gcc.h"
66 |
67 | /*------------------ ICC Compiler ----------------------*/
68 | #elif defined ( __ICCARM__ )
69 | #include
70 |
71 | /*------------------ TI CCS Compiler -------------------*/
72 | #elif defined ( __TMS470__ )
73 | #include
74 |
75 | /*------------------ TASKING Compiler ------------------*/
76 | #elif defined ( __TASKING__ )
77 | /*
78 | * The CMSIS functions have been implemented as intrinsics in the compiler.
79 | * Please use "carm -?i" to get an up to date list of all intrinsics,
80 | * Including the CMSIS ones.
81 | */
82 |
83 | /*------------------ COSMIC Compiler -------------------*/
84 | #elif defined ( __CSMC__ )
85 | #include
86 |
87 | #endif
88 |
89 | /*@} end of group CMSIS_SIMD_intrinsics */
90 |
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /* __CORE_CMSIMD_H */
97 |
--------------------------------------------------------------------------------
/app/Drivers/CMSIS/Lib/ARM/arm_cortexM3b_math.lib:
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https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Lib/ARM/arm_cortexM3b_math.lib
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/app/Drivers/CMSIS/Lib/ARM/arm_cortexM3l_math.lib:
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https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Lib/ARM/arm_cortexM3l_math.lib
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/app/Drivers/CMSIS/Lib/GCC/libarm_cortexM3l_math.a:
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https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/CMSIS/Lib/GCC/libarm_cortexM3l_math.a
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/app/Drivers/STM32F1xx_HAL_Driver/Inc/stm32_assert_template.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32_assert.h
4 | * @author MCD Application Team
5 | * @brief STM32 assert template file.
6 | * This file should be copied to the application folder and renamed
7 | * to stm32_assert.h.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /* Define to prevent recursive inclusion -------------------------------------*/
39 | #ifndef __STM32_ASSERT_H
40 | #define __STM32_ASSERT_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /* Exported types ------------------------------------------------------------*/
47 | /* Exported constants --------------------------------------------------------*/
48 | /* Includes ------------------------------------------------------------------*/
49 | /* Exported macro ------------------------------------------------------------*/
50 | #ifdef USE_FULL_ASSERT
51 | /**
52 | * @brief The assert_param macro is used for function's parameters check.
53 | * @param expr: If expr is false, it calls assert_failed function
54 | * which reports the name of the source file and the source
55 | * line number of the call that failed.
56 | * If expr is true, it returns no value.
57 | * @retval None
58 | */
59 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
60 | /* Exported functions ------------------------------------------------------- */
61 | void assert_failed(uint8_t *file, uint32_t line);
62 | #else
63 | #define assert_param(expr) ((void)0U)
64 | #endif /* USE_FULL_ASSERT */
65 |
66 | #ifdef __cplusplus
67 | }
68 | #endif
69 |
70 | #endif /* __STM32_ASSERT_H */
71 |
72 |
73 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
74 |
--------------------------------------------------------------------------------
/app/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_msp_template.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_hal_msp_template.c
4 | * @author MCD Application Team
5 | * @brief HAL BSP module.
6 | * This file template is located in the HAL folder and should be copied
7 | * to the user folder.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /* Includes ------------------------------------------------------------------*/
39 | #include "stm32f1xx_hal.h"
40 |
41 | /** @addtogroup STM32F1xx_HAL_Driver
42 | * @{
43 | */
44 |
45 | /** @defgroup HAL_MSP HAL_MSP
46 | * @brief HAL MSP module.
47 | * @{
48 | */
49 |
50 | /* Private typedef -----------------------------------------------------------*/
51 | /* Private define ------------------------------------------------------------*/
52 | /* Private macro -------------------------------------------------------------*/
53 | /* Private variables ---------------------------------------------------------*/
54 | /* Private function prototypes -----------------------------------------------*/
55 | /* Private functions ---------------------------------------------------------*/
56 |
57 | /** @defgroup HAL_MSP_Exported_Functions HAL MSP Exported Functions
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Initializes the Global MSP.
63 | * @retval None
64 | */
65 | void HAL_MspInit(void)
66 | {
67 |
68 | }
69 |
70 | /**
71 | * @brief DeInitializes the Global MSP.
72 | * @retval None
73 | */
74 | void HAL_MspDeInit(void)
75 | {
76 |
77 | }
78 |
79 | /**
80 | * @brief Initializes the PPP MSP.
81 | * @retval None
82 | */
83 | void HAL_PPP_MspInit(void)
84 | {
85 |
86 | }
87 |
88 | /**
89 | * @brief DeInitializes the PPP MSP.
90 | * @retval None
91 | */
92 | void HAL_PPP_MspDeInit(void)
93 | {
94 |
95 | }
96 |
97 | /**
98 | * @}
99 | */
100 |
101 | /**
102 | * @}
103 | */
104 |
105 | /**
106 | * @}
107 | */
108 |
109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
110 |
--------------------------------------------------------------------------------
/app/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c:
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https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c
--------------------------------------------------------------------------------
/app/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_ll_pwr.c
4 | * @author MCD Application Team
5 | * @brief PWR LL module driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2016 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 | #if defined(USE_FULL_LL_DRIVER)
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f1xx_ll_pwr.h"
39 | #include "stm32f1xx_ll_bus.h"
40 |
41 | /** @addtogroup STM32F1xx_LL_Driver
42 | * @{
43 | */
44 |
45 | #if defined(PWR)
46 |
47 | /** @defgroup PWR_LL PWR
48 | * @{
49 | */
50 |
51 | /* Private types -------------------------------------------------------------*/
52 | /* Private variables ---------------------------------------------------------*/
53 | /* Private constants ---------------------------------------------------------*/
54 | /* Private macros ------------------------------------------------------------*/
55 | /* Private function prototypes -----------------------------------------------*/
56 |
57 | /* Exported functions --------------------------------------------------------*/
58 | /** @addtogroup PWR_LL_Exported_Functions
59 | * @{
60 | */
61 |
62 | /** @addtogroup PWR_LL_EF_Init
63 | * @{
64 | */
65 |
66 | /**
67 | * @brief De-initialize the PWR registers to their default reset values.
68 | * @retval An ErrorStatus enumeration value:
69 | * - SUCCESS: PWR registers are de-initialized
70 | * - ERROR: not applicable
71 | */
72 | ErrorStatus LL_PWR_DeInit(void)
73 | {
74 | /* Force reset of PWR clock */
75 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR);
76 |
77 | /* Release reset of PWR clock */
78 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR);
79 |
80 | return SUCCESS;
81 | }
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /**
92 | * @}
93 | */
94 | #endif /* defined(PWR) */
95 | /**
96 | * @}
97 | */
98 |
99 | #endif /* USE_FULL_LL_DRIVER */
100 |
101 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
102 |
--------------------------------------------------------------------------------
/app/Inc/gpio.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : gpio.h
4 | * Description : This file contains all the functions prototypes for
5 | * the gpio
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef __gpio_H
22 | #define __gpio_H
23 | #ifdef __cplusplus
24 | extern "C" {
25 | #endif
26 |
27 | /* Includes ------------------------------------------------------------------*/
28 | #include "main.h"
29 |
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* USER CODE BEGIN Private defines */
35 |
36 | /* USER CODE END Private defines */
37 |
38 | void MX_GPIO_Init(void);
39 |
40 | /* USER CODE BEGIN Prototypes */
41 |
42 | /* USER CODE END Prototypes */
43 |
44 | #ifdef __cplusplus
45 | }
46 | #endif
47 | #endif /*__ pinoutConfig_H */
48 |
49 | /**
50 | * @}
51 | */
52 |
53 | /**
54 | * @}
55 | */
56 |
57 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
58 |
--------------------------------------------------------------------------------
/app/Inc/main.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file : main.h
5 | * @brief : Header for main.c file.
6 | * This file contains the common defines of the application.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2019 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __MAIN_H
24 | #define __MAIN_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f1xx_hal.h"
32 |
33 | /* Private includes ----------------------------------------------------------*/
34 | /* USER CODE BEGIN Includes */
35 |
36 | /* USER CODE END Includes */
37 |
38 | /* Exported types ------------------------------------------------------------*/
39 | /* USER CODE BEGIN ET */
40 |
41 | /* USER CODE END ET */
42 |
43 | /* Exported constants --------------------------------------------------------*/
44 | /* USER CODE BEGIN EC */
45 |
46 | /* USER CODE END EC */
47 |
48 | /* Exported macro ------------------------------------------------------------*/
49 | /* USER CODE BEGIN EM */
50 |
51 | /* USER CODE END EM */
52 |
53 | /* Exported functions prototypes ---------------------------------------------*/
54 | void Error_Handler(void);
55 |
56 | /* USER CODE BEGIN EFP */
57 |
58 | /* USER CODE END EFP */
59 |
60 | /* Private defines -----------------------------------------------------------*/
61 | #define led4_Pin GPIO_PIN_10
62 | #define led4_GPIO_Port GPIOC
63 | #define led3_Pin GPIO_PIN_11
64 | #define led3_GPIO_Port GPIOC
65 | #define led2_Pin GPIO_PIN_12
66 | #define led2_GPIO_Port GPIOC
67 | #define led1_Pin GPIO_PIN_2
68 | #define led1_GPIO_Port GPIOD
69 | /* USER CODE BEGIN Private defines */
70 |
71 | /* USER CODE END Private defines */
72 |
73 | #ifdef __cplusplus
74 | }
75 | #endif
76 |
77 | #endif /* __MAIN_H */
78 |
79 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
80 |
--------------------------------------------------------------------------------
/app/Inc/stm32f1xx_it.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32f1xx_it.h
5 | * @brief This file contains the headers of the interrupt handlers.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F1xx_IT_H
23 | #define __STM32F1xx_IT_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Private includes ----------------------------------------------------------*/
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* Exported types ------------------------------------------------------------*/
35 | /* USER CODE BEGIN ET */
36 |
37 | /* USER CODE END ET */
38 |
39 | /* Exported constants --------------------------------------------------------*/
40 | /* USER CODE BEGIN EC */
41 |
42 | /* USER CODE END EC */
43 |
44 | /* Exported macro ------------------------------------------------------------*/
45 | /* USER CODE BEGIN EM */
46 |
47 | /* USER CODE END EM */
48 |
49 | /* Exported functions prototypes ---------------------------------------------*/
50 | void NMI_Handler(void);
51 | void HardFault_Handler(void);
52 | void MemManage_Handler(void);
53 | void BusFault_Handler(void);
54 | void UsageFault_Handler(void);
55 | void SVC_Handler(void);
56 | void DebugMon_Handler(void);
57 | void PendSV_Handler(void);
58 | void SysTick_Handler(void);
59 | /* USER CODE BEGIN EFP */
60 |
61 | /* USER CODE END EFP */
62 |
63 | #ifdef __cplusplus
64 | }
65 | #endif
66 |
67 | #endif /* __STM32F1xx_IT_H */
68 |
69 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
70 |
--------------------------------------------------------------------------------
/app/Inc/usart.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : USART.h
4 | * Description : This file provides code for the configuration
5 | * of the USART instances.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef __usart_H
21 | #define __usart_H
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "main.h"
28 |
29 | /* USER CODE BEGIN Includes */
30 |
31 | /* USER CODE END Includes */
32 |
33 | extern UART_HandleTypeDef huart1;
34 | extern UART_HandleTypeDef huart2;
35 | extern UART_HandleTypeDef huart3;
36 |
37 | /* USER CODE BEGIN Private defines */
38 |
39 | /* USER CODE END Private defines */
40 |
41 | void MX_USART1_UART_Init(void);
42 | void MX_USART2_UART_Init(void);
43 | void MX_USART3_UART_Init(void);
44 |
45 | /* USER CODE BEGIN Prototypes */
46 |
47 | /* USER CODE END Prototypes */
48 |
49 | #ifdef __cplusplus
50 | }
51 | #endif
52 | #endif /*__ usart_H */
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /**
59 | * @}
60 | */
61 |
62 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
63 |
--------------------------------------------------------------------------------
/app/MDK-ARM/JLinkSettings.ini:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ForceImpTypeAny = 0
3 | ShowInfoWin = 1
4 | EnableFlashBP = 2
5 | BPDuringExecution = 0
6 | [CFI]
7 | CFISize = 0x00
8 | CFIAddr = 0x00
9 | [CPU]
10 | MonModeVTableAddr = 0xFFFFFFFF
11 | MonModeDebug = 0
12 | MaxNumAPs = 0
13 | LowPowerHandlingMode = 0
14 | OverrideMemMap = 0
15 | AllowSimulation = 1
16 | ScriptFile=""
17 | [FLASH]
18 | CacheExcludeSize = 0x00
19 | CacheExcludeAddr = 0x00
20 | MinNumBytesFlashDL = 0
21 | SkipProgOnCRCMatch = 1
22 | VerifyDownload = 1
23 | AllowCaching = 1
24 | EnableFlashDL = 2
25 | Override = 0
26 | Device="ARM7"
27 | [GENERAL]
28 | WorkRAMSize = 0x00
29 | WorkRAMAddr = 0x00
30 | RAMUsageLimit = 0x00
31 | [SWO]
32 | SWOLogFile=""
33 | [MEM]
34 | RdOverrideOrMask = 0x00
35 | RdOverrideAndMask = 0xFFFFFFFF
36 | RdOverrideAddr = 0xFFFFFFFF
37 | WrOverrideOrMask = 0x00
38 | WrOverrideAndMask = 0xFFFFFFFF
39 | WrOverrideAddr = 0xFFFFFFFF
40 |
--------------------------------------------------------------------------------
/app/MDK-ARM/RTE/_app/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'app'
7 | * Target: 'app'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "stm32f10x.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
--------------------------------------------------------------------------------
/app/MDK-ARM/app.bin:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/MDK-ARM/app.bin
--------------------------------------------------------------------------------
/app/Src/gpio.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : gpio.c
4 | * Description : This file provides code for the configuration
5 | * of all used GPIO pins.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "gpio.h"
22 | /* USER CODE BEGIN 0 */
23 |
24 | /* USER CODE END 0 */
25 |
26 | /*----------------------------------------------------------------------------*/
27 | /* Configure GPIO */
28 | /*----------------------------------------------------------------------------*/
29 | /* USER CODE BEGIN 1 */
30 |
31 | /* USER CODE END 1 */
32 |
33 | /** Configure pins as
34 | * Analog
35 | * Input
36 | * Output
37 | * EVENT_OUT
38 | * EXTI
39 | */
40 | void MX_GPIO_Init(void)
41 | {
42 |
43 | GPIO_InitTypeDef GPIO_InitStruct = {0};
44 |
45 | /* GPIO Ports Clock Enable */
46 | __HAL_RCC_GPIOD_CLK_ENABLE();
47 | __HAL_RCC_GPIOA_CLK_ENABLE();
48 | __HAL_RCC_GPIOB_CLK_ENABLE();
49 | __HAL_RCC_GPIOC_CLK_ENABLE();
50 |
51 | /*Configure GPIO pin Output Level */
52 | HAL_GPIO_WritePin(GPIOC, led4_Pin|led3_Pin|led2_Pin, GPIO_PIN_RESET);
53 |
54 | /*Configure GPIO pin Output Level */
55 | HAL_GPIO_WritePin(led1_GPIO_Port, led1_Pin, GPIO_PIN_RESET);
56 |
57 | /*Configure GPIO pins : PCPin PCPin */
58 | GPIO_InitStruct.Pin = led4_Pin|led3_Pin;
59 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
60 | GPIO_InitStruct.Pull = GPIO_PULLUP;
61 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
62 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
63 |
64 | /*Configure GPIO pin : PtPin */
65 | GPIO_InitStruct.Pin = led2_Pin;
66 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
67 | GPIO_InitStruct.Pull = GPIO_PULLUP;
68 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
69 | HAL_GPIO_Init(led2_GPIO_Port, &GPIO_InitStruct);
70 |
71 | /*Configure GPIO pin : PtPin */
72 | GPIO_InitStruct.Pin = led1_Pin;
73 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
74 | GPIO_InitStruct.Pull = GPIO_PULLUP;
75 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
76 | HAL_GPIO_Init(led1_GPIO_Port, &GPIO_InitStruct);
77 |
78 | }
79 |
80 | /* USER CODE BEGIN 2 */
81 |
82 | /* USER CODE END 2 */
83 |
84 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
85 |
--------------------------------------------------------------------------------
/app/Src/main.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/app/Src/main.c
--------------------------------------------------------------------------------
/app/Src/stm32f1xx_hal_msp.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * File Name : stm32f1xx_hal_msp.c
5 | * Description : This file provides code for the MSP Initialization
6 | * and de-Initialization codes.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2019 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "main.h"
24 | /* USER CODE BEGIN Includes */
25 |
26 | /* USER CODE END Includes */
27 |
28 | /* Private typedef -----------------------------------------------------------*/
29 | /* USER CODE BEGIN TD */
30 |
31 | /* USER CODE END TD */
32 |
33 | /* Private define ------------------------------------------------------------*/
34 | /* USER CODE BEGIN Define */
35 |
36 | /* USER CODE END Define */
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* USER CODE BEGIN Macro */
40 |
41 | /* USER CODE END Macro */
42 |
43 | /* Private variables ---------------------------------------------------------*/
44 | /* USER CODE BEGIN PV */
45 |
46 | /* USER CODE END PV */
47 |
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* USER CODE BEGIN PFP */
50 |
51 | /* USER CODE END PFP */
52 |
53 | /* External functions --------------------------------------------------------*/
54 | /* USER CODE BEGIN ExternalFunctions */
55 |
56 | /* USER CODE END ExternalFunctions */
57 |
58 | /* USER CODE BEGIN 0 */
59 |
60 | /* USER CODE END 0 */
61 | /**
62 | * Initializes the Global MSP.
63 | */
64 | void HAL_MspInit(void)
65 | {
66 | /* USER CODE BEGIN MspInit 0 */
67 |
68 | /* USER CODE END MspInit 0 */
69 |
70 | __HAL_RCC_AFIO_CLK_ENABLE();
71 | __HAL_RCC_PWR_CLK_ENABLE();
72 |
73 | /* System interrupt init*/
74 |
75 | /** NONJTRST: Full SWJ (JTAG-DP + SW-DP) but without NJTRST
76 | */
77 | __HAL_AFIO_REMAP_SWJ_NONJTRST();
78 |
79 | /* USER CODE BEGIN MspInit 1 */
80 |
81 | /* USER CODE END MspInit 1 */
82 | }
83 |
84 | /* USER CODE BEGIN 1 */
85 |
86 | /* USER CODE END 1 */
87 |
88 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
89 |
--------------------------------------------------------------------------------
/bootloader/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/bootloader/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h
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/bootloader/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/ranranff/stm32-boot/cd1603fa7147a322759ec7bc95996b8670dd3680/bootloader/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h
--------------------------------------------------------------------------------
/bootloader/Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f10x.h
4 | * @author MCD Application Team
5 | * @version V4.2.0
6 | * @date 31-March-2017
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2017 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /** @addtogroup CMSIS
39 | * @{
40 | */
41 |
42 | /** @addtogroup stm32f10x_system
43 | * @{
44 | */
45 |
46 | /**
47 | * @brief Define to prevent recursive inclusion
48 | */
49 | #ifndef __SYSTEM_STM32F10X_H
50 | #define __SYSTEM_STM32F10X_H
51 |
52 | #ifdef __cplusplus
53 | extern "C" {
54 | #endif
55 |
56 | /** @addtogroup STM32F10x_System_Includes
57 | * @{
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 |
65 | /** @addtogroup STM32F10x_System_Exported_types
66 | * @{
67 | */
68 |
69 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
70 | extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */
71 | extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /** @addtogroup STM32F10x_System_Exported_Constants
78 | * @{
79 | */
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | /** @addtogroup STM32F10x_System_Exported_Macros
86 | * @{
87 | */
88 |
89 | /**
90 | * @}
91 | */
92 |
93 | /** @addtogroup STM32F10x_System_Exported_Functions
94 | * @{
95 | */
96 |
97 | extern void SystemInit(void);
98 | extern void SystemCoreClockUpdate(void);
99 | /**
100 | * @}
101 | */
102 |
103 | #ifdef __cplusplus
104 | }
105 | #endif
106 |
107 | #endif /*__SYSTEM_STM32F10X_H */
108 |
109 | /**
110 | * @}
111 | */
112 |
113 | /**
114 | * @}
115 | */
116 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
117 |
--------------------------------------------------------------------------------
/bootloader/Drivers/CMSIS/Include/core_cmFunc.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmFunc.h
3 | * @brief CMSIS Cortex-M Core Function Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMFUNC_H
42 | #define __CORE_CMFUNC_H
43 |
44 |
45 | /* ########################### Core Function Access ########################### */
46 | /** \ingroup CMSIS_Core_FunctionInterface
47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@} end of CMSIS_Core_RegAccFunctions */
86 |
87 | #endif /* __CORE_CMFUNC_H */
88 |
--------------------------------------------------------------------------------
/bootloader/Drivers/CMSIS/Include/core_cmInstr.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmInstr.h
3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMINSTR_H
42 | #define __CORE_CMINSTR_H
43 |
44 |
45 | /* ########################## Core Instruction Access ######################### */
46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
47 | Access to dedicated instructions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
86 |
87 | #endif /* __CORE_CMINSTR_H */
88 |
--------------------------------------------------------------------------------
/bootloader/Drivers/CMSIS/Include/core_cmSimd.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmSimd.h
3 | * @brief CMSIS Cortex-M SIMD Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMSIMD_H
42 | #define __CORE_CMSIMD_H
43 |
44 | #ifdef __cplusplus
45 | extern "C" {
46 | #endif
47 |
48 |
49 | /* ################### Compiler specific Intrinsics ########################### */
50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
51 | Access to dedicated SIMD instructions
52 | @{
53 | */
54 |
55 | /*------------------ RealView Compiler -----------------*/
56 | #if defined ( __CC_ARM )
57 | #include "cmsis_armcc.h"
58 |
59 | /*------------------ ARM Compiler V6 -------------------*/
60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
61 | #include "cmsis_armcc_V6.h"
62 |
63 | /*------------------ GNU Compiler ----------------------*/
64 | #elif defined ( __GNUC__ )
65 | #include "cmsis_gcc.h"
66 |
67 | /*------------------ ICC Compiler ----------------------*/
68 | #elif defined ( __ICCARM__ )
69 | #include
70 |
71 | /*------------------ TI CCS Compiler -------------------*/
72 | #elif defined ( __TMS470__ )
73 | #include
74 |
75 | /*------------------ TASKING Compiler ------------------*/
76 | #elif defined ( __TASKING__ )
77 | /*
78 | * The CMSIS functions have been implemented as intrinsics in the compiler.
79 | * Please use "carm -?i" to get an up to date list of all intrinsics,
80 | * Including the CMSIS ones.
81 | */
82 |
83 | /*------------------ COSMIC Compiler -------------------*/
84 | #elif defined ( __CSMC__ )
85 | #include
86 |
87 | #endif
88 |
89 | /*@} end of group CMSIS_SIMD_intrinsics */
90 |
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /* __CORE_CMSIMD_H */
97 |
--------------------------------------------------------------------------------
/bootloader/Inc/bootcmd.h:
--------------------------------------------------------------------------------
1 | #ifndef __BOOTCMD_H
2 | #define __BOOTCMD_H
3 |
4 | #ifdef __cplusplus
5 | extern "C" {
6 | #endif
7 |
8 | void DoLoop(void);
9 |
10 | #ifdef __cplusplus
11 | }
12 | #endif
13 | #endif
14 |
--------------------------------------------------------------------------------
/bootloader/Inc/bootloader.h:
--------------------------------------------------------------------------------
1 | #ifndef __BOOTLOADER_H
2 | #define __BOOTLOADER_H
3 |
4 | #include
5 |
6 | #ifdef __cplusplus
7 | extern "C" {
8 | #endif
9 |
10 | void JumpToApp(uint32_t addr);
11 | int FlashRead( char *pBuf, uint32_t addr, int size);
12 | int FlashWrite( char *pBuf, uint32_t addr, int size);
13 | int FlashErase(uint32_t startAddr, uint32_t endAddr);
14 | void FlashTest(void);
15 |
16 | #ifdef __cplusplus
17 | }
18 | #endif
19 |
20 |
21 | #endif /* bootloader.h */
22 |
--------------------------------------------------------------------------------
/bootloader/Inc/crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : CRC.h
4 | * Description : This file provides code for the configuration
5 | * of the CRC instances.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef __crc_H
21 | #define __crc_H
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "main.h"
28 |
29 | /* USER CODE BEGIN Includes */
30 |
31 | /* USER CODE END Includes */
32 |
33 | extern CRC_HandleTypeDef hcrc;
34 |
35 | /* USER CODE BEGIN Private defines */
36 |
37 | /* USER CODE END Private defines */
38 |
39 | void MX_CRC_Init(void);
40 |
41 | /* USER CODE BEGIN Prototypes */
42 |
43 | /* USER CODE END Prototypes */
44 |
45 | #ifdef __cplusplus
46 | }
47 | #endif
48 | #endif /*__ crc_H */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
59 |
--------------------------------------------------------------------------------
/bootloader/Inc/debug.h:
--------------------------------------------------------------------------------
1 | #ifndef __DEBUG_H
2 | #define __DEBUG_H
3 | #include
4 | #include
5 |
6 |
7 | #define DEBUG_ON 1
8 | #define WARNING_ON 1
9 | #define ERROR_ON 1
10 |
11 | /*-------------------------------------------------------------------------------------------------------------*/
12 | #if DEBUG_ON
13 | #define DEBUG(fmt,...) do{\
14 | printf("[ debug ] %s:%u %s: ",__FILE__,__LINE__,__FUNCTION__); \
15 | printf(fmt,##__VA_ARGS__); \
16 | printf("\n");}while(0)
17 | #else
18 | #define DEBUG(fmt,...)
19 | #endif
20 |
21 | /*-------------------------------------------------------------------------------------------------------------*/
22 | #if DEBUG_ON
23 | #define LOG() do{\
24 | printf("[ log ] %s:%u %s: ",__FILE__,__LINE__,__FUNCTION__); \
25 | printf("\n");}while(0)
26 | #else
27 | #define LOG()
28 | #endif
29 |
30 | /*-------------------------------------------------------------------------------------------------------------*/
31 | #if WARNING_ON
32 | #define DBA_WARNING(fmt,...) do{\
33 | printf("[ warning ] %s:%u %s: ",__FILE__,__LINE__,__FUNCTION__);\
34 | printf(fmt,##__VA_ARGS__);\
35 | printf("\n");}while(0)
36 | #else
37 | #define DBA_WARNING(fmt,...)
38 | #endif
39 |
40 | /*-------------------------------------------------------------------------------------------------------------*/
41 | #if ERROR_ON
42 | #define ERROR(fmt,...) do{\
43 | printf("[ error ] %s:%u %s: ",__FILE__,__LINE__,__FUNCTION__);\
44 | printf(fmt,##__VA_ARGS__);\
45 | printf("\n");}while(0)
46 | #else
47 | #define ERROR(fmt,...)
48 | #endif
49 |
50 | /*-------------------------------------------------------------------------------------------------------------*/
51 | #endif
52 |
--------------------------------------------------------------------------------
/bootloader/Inc/dma.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : dma.h
4 | * Description : This file contains all the function prototypes for
5 | * the dma.c file
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef __dma_H
21 | #define __dma_H
22 |
23 | #ifdef __cplusplus
24 | extern "C" {
25 | #endif
26 |
27 | /* Includes ------------------------------------------------------------------*/
28 | #include "main.h"
29 |
30 | /* DMA memory to memory transfer handles -------------------------------------*/
31 |
32 | /* USER CODE BEGIN Includes */
33 |
34 | /* USER CODE END Includes */
35 |
36 | /* USER CODE BEGIN Private defines */
37 |
38 | /* USER CODE END Private defines */
39 |
40 | void MX_DMA_Init(void);
41 |
42 | /* USER CODE BEGIN Prototypes */
43 |
44 | /* USER CODE END Prototypes */
45 |
46 | #ifdef __cplusplus
47 | }
48 | #endif
49 |
50 | #endif /* __dma_H */
51 |
52 | /**
53 | * @}
54 | */
55 |
56 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
57 |
--------------------------------------------------------------------------------
/bootloader/Inc/gpio.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : gpio.h
4 | * Description : This file contains all the functions prototypes for
5 | * the gpio
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef __gpio_H
22 | #define __gpio_H
23 | #ifdef __cplusplus
24 | extern "C" {
25 | #endif
26 |
27 | /* Includes ------------------------------------------------------------------*/
28 | #include "main.h"
29 |
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* USER CODE BEGIN Private defines */
35 |
36 | /* USER CODE END Private defines */
37 |
38 | void MX_GPIO_Init(void);
39 |
40 | /* USER CODE BEGIN Prototypes */
41 |
42 | /* USER CODE END Prototypes */
43 |
44 | #ifdef __cplusplus
45 | }
46 | #endif
47 | #endif /*__ pinoutConfig_H */
48 |
49 | /**
50 | * @}
51 | */
52 |
53 | /**
54 | * @}
55 | */
56 |
57 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
58 |
--------------------------------------------------------------------------------
/bootloader/Inc/main.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file : main.h
5 | * @brief : Header for main.c file.
6 | * This file contains the common defines of the application.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2019 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __MAIN_H
24 | #define __MAIN_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f1xx_hal.h"
32 |
33 | /* Private includes ----------------------------------------------------------*/
34 | /* USER CODE BEGIN Includes */
35 |
36 | /* USER CODE END Includes */
37 |
38 | /* Exported types ------------------------------------------------------------*/
39 | /* USER CODE BEGIN ET */
40 |
41 | /* USER CODE END ET */
42 |
43 | /* Exported constants --------------------------------------------------------*/
44 | /* USER CODE BEGIN EC */
45 |
46 | /* USER CODE END EC */
47 |
48 | /* Exported macro ------------------------------------------------------------*/
49 | /* USER CODE BEGIN EM */
50 |
51 | /* USER CODE END EM */
52 |
53 | /* Exported functions prototypes ---------------------------------------------*/
54 | void Error_Handler(void);
55 |
56 | /* USER CODE BEGIN EFP */
57 |
58 | /* USER CODE END EFP */
59 |
60 | /* Private defines -----------------------------------------------------------*/
61 | #define NET_POWER_Pin GPIO_PIN_4
62 | #define NET_POWER_GPIO_Port GPIOC
63 | #define PI_POWER_Pin GPIO_PIN_0
64 | #define PI_POWER_GPIO_Port GPIOB
65 | #define led4_Pin GPIO_PIN_10
66 | #define led4_GPIO_Port GPIOC
67 | #define led3_Pin GPIO_PIN_11
68 | #define led3_GPIO_Port GPIOC
69 | #define led2_Pin GPIO_PIN_12
70 | #define led2_GPIO_Port GPIOC
71 | #define led1_Pin GPIO_PIN_2
72 | #define led1_GPIO_Port GPIOD
73 | /* USER CODE BEGIN Private defines */
74 |
75 | /* USER CODE END Private defines */
76 |
77 | #ifdef __cplusplus
78 | }
79 | #endif
80 |
81 | #endif /* __MAIN_H */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/bootloader/Inc/stm32f1xx_it.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32f1xx_it.h
5 | * @brief This file contains the headers of the interrupt handlers.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F1xx_IT_H
23 | #define __STM32F1xx_IT_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Private includes ----------------------------------------------------------*/
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* Exported types ------------------------------------------------------------*/
35 | /* USER CODE BEGIN ET */
36 |
37 | /* USER CODE END ET */
38 |
39 | /* Exported constants --------------------------------------------------------*/
40 | /* USER CODE BEGIN EC */
41 |
42 | /* USER CODE END EC */
43 |
44 | /* Exported macro ------------------------------------------------------------*/
45 | /* USER CODE BEGIN EM */
46 |
47 | /* USER CODE END EM */
48 |
49 | /* Exported functions prototypes ---------------------------------------------*/
50 | void NMI_Handler(void);
51 | void HardFault_Handler(void);
52 | void MemManage_Handler(void);
53 | void BusFault_Handler(void);
54 | void UsageFault_Handler(void);
55 | void SVC_Handler(void);
56 | void DebugMon_Handler(void);
57 | void PendSV_Handler(void);
58 | void SysTick_Handler(void);
59 | void DMA1_Channel4_IRQHandler(void);
60 | void DMA1_Channel5_IRQHandler(void);
61 | void USART1_IRQHandler(void);
62 | /* USER CODE BEGIN EFP */
63 |
64 | /* USER CODE END EFP */
65 |
66 | #ifdef __cplusplus
67 | }
68 | #endif
69 |
70 | #endif /* __STM32F1xx_IT_H */
71 |
72 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
73 |
--------------------------------------------------------------------------------
/bootloader/Inc/usart.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : USART.h
4 | * Description : This file provides code for the configuration
5 | * of the USART instances.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef __usart_H
21 | #define __usart_H
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "main.h"
28 |
29 | /* USER CODE BEGIN Includes */
30 |
31 | /* USER CODE END Includes */
32 |
33 | extern UART_HandleTypeDef huart1;
34 |
35 | /* USER CODE BEGIN Private defines */
36 |
37 | /* USER CODE END Private defines */
38 |
39 | void MX_USART1_UART_Init(void);
40 |
41 | /* USER CODE BEGIN Prototypes */
42 |
43 | /* USER CODE END Prototypes */
44 |
45 | #ifdef __cplusplus
46 | }
47 | #endif
48 | #endif /*__ usart_H */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
59 |
--------------------------------------------------------------------------------
/bootloader/MDK-ARM/EventRecorderStub.scvd:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
--------------------------------------------------------------------------------
/bootloader/MDK-ARM/JLinkSettings.ini:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ForceImpTypeAny = 0
3 | ShowInfoWin = 1
4 | EnableFlashBP = 2
5 | BPDuringExecution = 0
6 | [CFI]
7 | CFISize = 0x00
8 | CFIAddr = 0x00
9 | [CPU]
10 | MonModeVTableAddr = 0xFFFFFFFF
11 | MonModeDebug = 0
12 | MaxNumAPs = 0
13 | LowPowerHandlingMode = 0
14 | OverrideMemMap = 0
15 | AllowSimulation = 1
16 | ScriptFile=""
17 | [FLASH]
18 | CacheExcludeSize = 0x00
19 | CacheExcludeAddr = 0x00
20 | MinNumBytesFlashDL = 0
21 | SkipProgOnCRCMatch = 1
22 | VerifyDownload = 1
23 | AllowCaching = 1
24 | EnableFlashDL = 2
25 | Override = 0
26 | Device="ARM7"
27 | [GENERAL]
28 | WorkRAMSize = 0x00
29 | WorkRAMAddr = 0x00
30 | RAMUsageLimit = 0x00
31 | [SWO]
32 | SWOLogFile=""
33 | [MEM]
34 | RdOverrideOrMask = 0x00
35 | RdOverrideAndMask = 0xFFFFFFFF
36 | RdOverrideAddr = 0xFFFFFFFF
37 | WrOverrideOrMask = 0x00
38 | WrOverrideAndMask = 0xFFFFFFFF
39 | WrOverrideAddr = 0xFFFFFFFF
40 |
--------------------------------------------------------------------------------
/bootloader/MDK-ARM/RTE/_bootloader/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'bootloader'
7 | * Target: 'bootloader'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "stm32f10x.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
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/bootloader/Src/crc.c:
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1 | /**
2 | ******************************************************************************
3 | * File Name : CRC.c
4 | * Description : This file provides code for the configuration
5 | * of the CRC instances.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "crc.h"
22 |
23 | /* USER CODE BEGIN 0 */
24 |
25 | /* USER CODE END 0 */
26 |
27 | CRC_HandleTypeDef hcrc;
28 |
29 | /* CRC init function */
30 | void MX_CRC_Init(void)
31 | {
32 |
33 | hcrc.Instance = CRC;
34 | if (HAL_CRC_Init(&hcrc) != HAL_OK)
35 | {
36 | Error_Handler();
37 | }
38 |
39 | }
40 |
41 | void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle)
42 | {
43 |
44 | if(crcHandle->Instance==CRC)
45 | {
46 | /* USER CODE BEGIN CRC_MspInit 0 */
47 |
48 | /* USER CODE END CRC_MspInit 0 */
49 | /* CRC clock enable */
50 | __HAL_RCC_CRC_CLK_ENABLE();
51 | /* USER CODE BEGIN CRC_MspInit 1 */
52 |
53 | /* USER CODE END CRC_MspInit 1 */
54 | }
55 | }
56 |
57 | void HAL_CRC_MspDeInit(CRC_HandleTypeDef* crcHandle)
58 | {
59 |
60 | if(crcHandle->Instance==CRC)
61 | {
62 | /* USER CODE BEGIN CRC_MspDeInit 0 */
63 |
64 | /* USER CODE END CRC_MspDeInit 0 */
65 | /* Peripheral clock disable */
66 | __HAL_RCC_CRC_CLK_DISABLE();
67 | /* USER CODE BEGIN CRC_MspDeInit 1 */
68 |
69 | /* USER CODE END CRC_MspDeInit 1 */
70 | }
71 | }
72 |
73 | /* USER CODE BEGIN 1 */
74 |
75 | /* USER CODE END 1 */
76 |
77 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
78 |
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/bootloader/Src/dma.c:
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1 | /**
2 | ******************************************************************************
3 | * File Name : dma.c
4 | * Description : This file provides code for the configuration
5 | * of all the requested memory to memory DMA transfers.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* Includes ------------------------------------------------------------------*/
20 | #include "dma.h"
21 |
22 | /* USER CODE BEGIN 0 */
23 |
24 | /* USER CODE END 0 */
25 |
26 | /*----------------------------------------------------------------------------*/
27 | /* Configure DMA */
28 | /*----------------------------------------------------------------------------*/
29 |
30 | /* USER CODE BEGIN 1 */
31 |
32 | /* USER CODE END 1 */
33 |
34 | /**
35 | * Enable DMA controller clock
36 | */
37 | void MX_DMA_Init(void)
38 | {
39 | /* DMA controller clock enable */
40 | __HAL_RCC_DMA1_CLK_ENABLE();
41 |
42 | /* DMA interrupt init */
43 | /* DMA1_Channel4_IRQn interrupt configuration */
44 | HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
45 | HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
46 | /* DMA1_Channel5_IRQn interrupt configuration */
47 | HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
48 | HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
49 |
50 | }
51 |
52 | /* USER CODE BEGIN 2 */
53 |
54 | /* USER CODE END 2 */
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
65 |
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/bootloader/Src/gpio.c:
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1 | /**
2 | ******************************************************************************
3 | * File Name : gpio.c
4 | * Description : This file provides code for the configuration
5 | * of all used GPIO pins.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "gpio.h"
22 | /* USER CODE BEGIN 0 */
23 |
24 | /* USER CODE END 0 */
25 |
26 | /*----------------------------------------------------------------------------*/
27 | /* Configure GPIO */
28 | /*----------------------------------------------------------------------------*/
29 | /* USER CODE BEGIN 1 */
30 |
31 | /* USER CODE END 1 */
32 |
33 | /** Configure pins as
34 | * Analog
35 | * Input
36 | * Output
37 | * EVENT_OUT
38 | * EXTI
39 | */
40 | void MX_GPIO_Init(void)
41 | {
42 |
43 | GPIO_InitTypeDef GPIO_InitStruct = {0};
44 |
45 | /* GPIO Ports Clock Enable */
46 | __HAL_RCC_GPIOD_CLK_ENABLE();
47 | __HAL_RCC_GPIOC_CLK_ENABLE();
48 | __HAL_RCC_GPIOB_CLK_ENABLE();
49 | __HAL_RCC_GPIOA_CLK_ENABLE();
50 |
51 | /*Configure GPIO pin Output Level */
52 | HAL_GPIO_WritePin(GPIOC, NET_POWER_Pin|led4_Pin|led3_Pin|led2_Pin, GPIO_PIN_RESET);
53 |
54 | /*Configure GPIO pin Output Level */
55 | HAL_GPIO_WritePin(PI_POWER_GPIO_Port, PI_POWER_Pin, GPIO_PIN_SET);
56 |
57 | /*Configure GPIO pin Output Level */
58 | HAL_GPIO_WritePin(led1_GPIO_Port, led1_Pin, GPIO_PIN_SET);
59 |
60 | /*Configure GPIO pin : PtPin */
61 | GPIO_InitStruct.Pin = NET_POWER_Pin;
62 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
63 | GPIO_InitStruct.Pull = GPIO_NOPULL;
64 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
65 | HAL_GPIO_Init(NET_POWER_GPIO_Port, &GPIO_InitStruct);
66 |
67 | /*Configure GPIO pin : PtPin */
68 | GPIO_InitStruct.Pin = PI_POWER_Pin;
69 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
70 | GPIO_InitStruct.Pull = GPIO_NOPULL;
71 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
72 | HAL_GPIO_Init(PI_POWER_GPIO_Port, &GPIO_InitStruct);
73 |
74 | /*Configure GPIO pins : PCPin PCPin PCPin */
75 | GPIO_InitStruct.Pin = led4_Pin|led3_Pin|led2_Pin;
76 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
77 | GPIO_InitStruct.Pull = GPIO_PULLUP;
78 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
79 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
80 |
81 | /*Configure GPIO pin : PtPin */
82 | GPIO_InitStruct.Pin = led1_Pin;
83 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
84 | GPIO_InitStruct.Pull = GPIO_PULLUP;
85 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
86 | HAL_GPIO_Init(led1_GPIO_Port, &GPIO_InitStruct);
87 |
88 | }
89 |
90 | /* USER CODE BEGIN 2 */
91 |
92 | /* USER CODE END 2 */
93 |
94 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
95 |
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/bootloader/Src/stm32f1xx_hal_msp.c:
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1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * File Name : stm32f1xx_hal_msp.c
5 | * Description : This file provides code for the MSP Initialization
6 | * and de-Initialization codes.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2019 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "main.h"
24 | /* USER CODE BEGIN Includes */
25 |
26 | /* USER CODE END Includes */
27 |
28 | /* Private typedef -----------------------------------------------------------*/
29 | /* USER CODE BEGIN TD */
30 |
31 | /* USER CODE END TD */
32 |
33 | /* Private define ------------------------------------------------------------*/
34 | /* USER CODE BEGIN Define */
35 |
36 | /* USER CODE END Define */
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* USER CODE BEGIN Macro */
40 |
41 | /* USER CODE END Macro */
42 |
43 | /* Private variables ---------------------------------------------------------*/
44 | /* USER CODE BEGIN PV */
45 |
46 | /* USER CODE END PV */
47 |
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* USER CODE BEGIN PFP */
50 |
51 | /* USER CODE END PFP */
52 |
53 | /* External functions --------------------------------------------------------*/
54 | /* USER CODE BEGIN ExternalFunctions */
55 |
56 | /* USER CODE END ExternalFunctions */
57 |
58 | /* USER CODE BEGIN 0 */
59 |
60 | /* USER CODE END 0 */
61 | /**
62 | * Initializes the Global MSP.
63 | */
64 | void HAL_MspInit(void)
65 | {
66 | /* USER CODE BEGIN MspInit 0 */
67 |
68 | /* USER CODE END MspInit 0 */
69 |
70 | __HAL_RCC_AFIO_CLK_ENABLE();
71 | __HAL_RCC_PWR_CLK_ENABLE();
72 |
73 | /* System interrupt init*/
74 |
75 | /** NONJTRST: Full SWJ (JTAG-DP + SW-DP) but without NJTRST
76 | */
77 | __HAL_AFIO_REMAP_SWJ_NONJTRST();
78 |
79 | /* USER CODE BEGIN MspInit 1 */
80 |
81 | /* USER CODE END MspInit 1 */
82 | }
83 |
84 | /* USER CODE BEGIN 1 */
85 |
86 | /* USER CODE END 1 */
87 |
88 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
89 |
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