├── .clang-format ├── .gitignore ├── CMakeLists.txt ├── LICENSE ├── README.md └── gemm ├── CMakeLists.txt ├── gemm.cu └── impl.h /.clang-format: -------------------------------------------------------------------------------- 1 | --- 2 | Language: Cpp 3 | BasedOnStyle: Google 4 | 5 | # If true, analyze the formatted file for the most common alignment of & and * 6 | DerivePointerAlignment: false 7 | 8 | PointerAlignment: Right 9 | 10 | # Only sort headers in each include block 11 | SortIncludes: true 12 | IncludeBlocks: Preserve 13 | 14 | # Horizontally aligns arguments after an open bracket? 15 | AlignAfterOpenBracket: AlwaysBreak 16 | 17 | # Style of aligning consecutive bit field 18 | AlignConsecutiveBitFields: AcrossEmptyLinesAndComments 19 | 20 | # Style of aligning consecutive declarations 21 | #AlignConsecutiveDeclarations: None 22 | 23 | # Style of aligning consecutive macro definitions 24 | AlignConsecutiveMacros: AcrossEmptyLinesAndComments 25 | 26 | # Dependent on the value, int f() { return 0; } can be put on a single line 27 | AllowShortFunctionsOnASingleLine: None 28 | 29 | # Dependent on the value, if (a) return; can be put on a single line 30 | AllowShortIfStatementsOnASingleLine: Never 31 | 32 | # Dependent on the value, auto lambda []() { return 0; } can be put on a single line 33 | AllowShortLambdasOnASingleLine: None 34 | 35 | # If true, while (true) continue; can be put on a single line 36 | AllowShortLoopsOnASingleLine: false 37 | 38 | # Aligns trailing comments? 39 | AlignTrailingComments: true 40 | 41 | # Always break before multiline string literals? 42 | AlwaysBreakBeforeMultilineStrings: true 43 | 44 | # The template declaration breaking style to use 45 | AlwaysBreakTemplateDeclarations: true 46 | 47 | # Control of individual brace wrapping cases, valid when BreakBeforeBraces is Custom 48 | BraceWrapping: 49 | AfterCaseLabel: false 50 | AfterClass: false 51 | AfterControlStatement: false 52 | AfterEnum: false 53 | AfterFunction: false 54 | AfterNamespace: false 55 | AfterStruct: false 56 | AfterUnion: false 57 | AfterExternBlock: false 58 | BeforeCatch: false 59 | BeforeElse: false 60 | BeforeLambdaBody: false 61 | BeforeWhile: false 62 | IndentBraces: false 63 | SplitEmptyFunction: false 64 | SplitEmptyRecord: false 65 | SplitEmptyNamespace: false 66 | 67 | # The brace breaking style to use. Candidates: Custom, Allman, Attach 68 | BreakBeforeBraces: Custom 69 | 70 | BreakBeforeBinaryOperators: NonAssignment 71 | 72 | # Ternary operators will be placed after line breaks? 73 | BreakBeforeTernaryOperators: false 74 | 75 | # The constructor initializers style to use 76 | BreakConstructorInitializers: BeforeComma 77 | 78 | # The column limit. A column limit of 0 means that there is no column limit 79 | ColumnLimit: 120 80 | 81 | # Consecutive namespace declarations will be on the same line? 82 | CompactNamespaces: false 83 | 84 | # Analyze the formatted file for the most used line ending 85 | DeriveLineEnding: true 86 | 87 | # Adds missing namespace end comments and fixes invalid existing ones? 88 | FixNamespaceComments: true 89 | 90 | # Indent case label blocks one level from the case label 91 | IndentCaseBlocks: true 92 | 93 | # Indent case labels one level from the switch statement 94 | IndentCaseLabels: false 95 | 96 | # IndentExternBlockStyle is the type of indenting of extern blocks 97 | IndentExternBlock: NoIndent 98 | 99 | # The preprocessor directive indenting style to use 100 | IndentPPDirectives: None 101 | 102 | # The number of columns to use for indentation 103 | IndentWidth: 4 104 | 105 | # Indent if a function definition or declaration is wrapped after the type 106 | IndentWrappedFunctionNames: false 107 | 108 | # The maximum number of consecutive empty lines to keep 109 | MaxEmptyLinesToKeep: 1 110 | 111 | # Attempt to re-flow comments? 112 | ReflowComments: false 113 | 114 | # A space will be inserted after the ‘template’ keyword? 115 | SpaceAfterTemplateKeyword: true 116 | 117 | Standard: Auto 118 | 119 | # The way to use tab characters in the resulting file 120 | UseTab: Never 121 | --- 122 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Prerequisites 2 | *.d 3 | 4 | # Compiled Object files 5 | *.slo 6 | *.lo 7 | *.o 8 | *.obj 9 | 10 | # Precompiled Headers 11 | *.gch 12 | *.pch 13 | 14 | # Compiled Dynamic libraries 15 | *.so 16 | *.dylib 17 | *.dll 18 | 19 | # Fortran module files 20 | *.mod 21 | *.smod 22 | 23 | # Compiled Static libraries 24 | *.lai 25 | *.la 26 | *.a 27 | *.lib 28 | 29 | # Executables 30 | *.exe 31 | *.out 32 | *.app 33 | -------------------------------------------------------------------------------- /CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.14) 2 | 3 | project(gemm) 4 | 5 | include(CheckLanguage) 6 | 7 | check_language(CXX) 8 | if(CMAKE_CXX_COMPILER) 9 | enable_language(CXX) 10 | else() 11 | message(FATAL_ERROR "No C++ support") 12 | endif() 13 | 14 | if(CMAKE_COMPILER_IS_GNUCC) 15 | if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 13.3.0) 16 | message(FATAL_ERROR "gcc >= 13.3.0 is required.") 17 | endif() 18 | endif() 19 | 20 | set(CMAKE_CXX_EXTENSIONS OFF) 21 | 22 | if(NOT DEFINED CMAKE_CXX_STANDARD) 23 | set(CMAKE_CXX_STANDARD 20) 24 | set(CMAKE_CXX_STANDARD_REQUIRED ON) 25 | endif() 26 | 27 | check_language(CUDA) 28 | if(CMAKE_CUDA_COMPILER) 29 | enable_language(CUDA) 30 | find_package(CUDAToolkit REQUIRED) 31 | endif() 32 | 33 | if(CUDAToolkit_VERSION VERSION_LESS "12.6") 34 | message(FATAL_ERROR "CUDA Version >= 12.6 is required (found ${CUDAToolkit_VERSION}).") 35 | endif() 36 | 37 | if(NOT DEFINED CMAKE_CUDA_STANDARD) 38 | set(CMAKE_CUDA_STANDARD 20) 39 | set(CMAKE_CUDA_STANDARD_REQUIRED ON) 40 | endif() 41 | 42 | if(NOT DEFINED CMAKE_CUDA_ARCHITECTURES OR NOT CMAKE_CUDA_ARCHITECTURES) 43 | set(CMAKE_CUDA_ARCHITECTURES 90a) 44 | endif() 45 | 46 | add_compile_options(-ffunction-sections -fdata-sections -fno-common) 47 | 48 | add_compile_options(-fPIC) 49 | 50 | add_compile_options("$<$:-O0;-g>") 51 | 52 | add_compile_options("$<$:-O3;-g>") 53 | 54 | add_compile_options("$<$:--expt-relaxed-constexpr>") 55 | add_compile_options("$<$:--expt-extended-lambda>") 56 | add_compile_options("$<$:--ptxas-options=--warn-on-spills>") 57 | 58 | add_link_options("LINKER:--as-needed") 59 | add_link_options("LINKER:--gc-sections") 60 | 61 | include_directories(${CMAKE_CURRENT_SOURCE_DIR}) 62 | 63 | add_subdirectory(gemm) 64 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 3, 29 June 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | Preamble 9 | 10 | The GNU General Public License is a free, copyleft license for 11 | software and other kinds of works. 12 | 13 | The licenses for most software and other practical works are designed 14 | to take away your freedom to share and change the works. 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If not, see . 649 | 650 | Also add information on how to contact you by electronic and paper mail. 651 | 652 | If the program does terminal interaction, make it output a short 653 | notice like this when it starts in an interactive mode: 654 | 655 | Copyright (C) 656 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 657 | This is free software, and you are welcome to redistribute it 658 | under certain conditions; type `show c' for details. 659 | 660 | The hypothetical commands `show w' and `show c' should show the appropriate 661 | parts of the General Public License. Of course, your program's commands 662 | might be different; for a GUI interface, you would use an "about box". 663 | 664 | You should also get your employer (if you work as a programmer) or school, 665 | if any, to sign a "copyright disclaimer" for the program, if necessary. 666 | For more information on this, and how to apply and follow the GNU GPL, see 667 | . 668 | 669 | The GNU General Public License does not permit incorporating your program 670 | into proprietary programs. If your program is a subroutine library, you 671 | may consider it more useful to permit linking proprietary applications with 672 | the library. If this is what you want to do, use the GNU Lesser General 673 | Public License instead of this License. But first, please read 674 | . 675 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # cuda-gemm 2 | 3 | ```bash 4 | mkdir build && cd build 5 | cmake .. && make && ./gemm/gemm 6 | ``` 7 | -------------------------------------------------------------------------------- /gemm/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(__SRCS__) 2 | set(__INCLUDE_DIRS__) 3 | set(__LINK_LIBS__) 4 | 5 | file(GLOB __TMP_SRCS__ 6 | *.cu) 7 | list(APPEND __SRCS__ ${__TMP_SRCS__}) 8 | unset(__TMP_SRCS__) 9 | 10 | list(APPEND __INCLUDE_DIRS__ ${CUDAToolkit_INCLUDE_DIRS}) 11 | list(APPEND __LINK_LIBS__ 12 | CUDA::cuda_driver CUDA::cudart CUDA::cublasLt CUDA::cupti) 13 | 14 | add_executable(gemm ${__SRCS__}) 15 | 16 | target_include_directories(gemm PUBLIC 17 | ${__INCLUDE_DIRS__}) 18 | 19 | target_link_libraries(gemm PRIVATE 20 | ${__LINK_LIBS__}) 21 | 22 | set_property(TARGET gemm PROPERTY INTERPROCEDURAL_OPTIMIZATION TRUE) 23 | 24 | unset(__SRCS__) 25 | unset(__INCLUDE_DIRS__) 26 | unset(__LINK_LIBS__) 27 | -------------------------------------------------------------------------------- /gemm/gemm.cu: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | 8 | #include 9 | #include 10 | #include 11 | #include 12 | 13 | #include "gemm/impl.h" 14 | 15 | // For power limited testing, please run 2000+ iterations 16 | constexpr int warmup_iterations = 10; 17 | constexpr int iterations = 2000; 18 | 19 | constexpr size_t l2_size = 50 * 1024 * 1024; 20 | void *to_flush = nullptr; 21 | 22 | std::vector kernel_durations; 23 | 24 | void CUPTIAPI 25 | getTimestampCallback(void *userdata, CUpti_CallbackDomain domain, CUpti_CallbackId cbid, const void *cbdata) { 26 | const CUpti_CallbackData *cbInfo = (CUpti_CallbackData *)cbdata; 27 | uint64_t start_timestamp, end_timestamp; 28 | 29 | if (domain == CUPTI_CB_DOMAIN_RUNTIME_API && cbid == CUPTI_RUNTIME_TRACE_CBID_cudaLaunch_v3020) { 30 | if (cbInfo->callbackSite == CUPTI_API_ENTER) { 31 | cuptiGetTimestamp(&start_timestamp); 32 | *((uint64_t *)userdata) = start_timestamp; 33 | } else if (cbInfo->callbackSite == CUPTI_API_EXIT) { 34 | cuptiGetTimestamp(&end_timestamp); 35 | start_timestamp = *((uint64_t *)userdata); 36 | } 37 | } 38 | } 39 | 40 | void CUPTIAPI buffer_completed(CUcontext ctx, uint32_t stream_id, uint8_t *buffer, size_t size, size_t valid_size) { 41 | CUptiResult status; 42 | CUpti_Activity *record = NULL; 43 | 44 | if (valid_size > 0) { 45 | do { 46 | status = cuptiActivityGetNextRecord(buffer, valid_size, &record); 47 | if (status == CUPTI_SUCCESS) { 48 | switch (record->kind) { 49 | case CUPTI_ACTIVITY_KIND_KERNEL: 50 | { 51 | CUpti_ActivityKernel5 *kernel = (CUpti_ActivityKernel5 *)record; 52 | kernel_durations.push_back(kernel->end - kernel->start); 53 | break; 54 | } 55 | default: 56 | break; 57 | } 58 | } else if (status == CUPTI_ERROR_MAX_LIMIT_REACHED) { 59 | break; 60 | } 61 | } while (1); 62 | } 63 | 64 | free(buffer); 65 | } 66 | 67 | void CUPTIAPI buffer_requested(uint8_t **buffer, size_t *size, size_t *max_num_records) { 68 | *size = 1024 * 1024; 69 | *buffer = (uint8_t *)malloc(*size); 70 | *max_num_records = 0; 71 | } 72 | 73 | void flush(void *ptr) { 74 | cudaMemsetAsync(ptr, 0, l2_size); 75 | } 76 | 77 | void fill_randn(std::vector<__nv_bfloat16> &data) { 78 | std::random_device rd; 79 | std::mt19937 gen(rd()); 80 | std::normal_distribution distribution(0.0f, 0.5f); 81 | 82 | for (auto &value : data) { 83 | const float rand_value = std::clamp(distribution(gen), -1.0f, 1.0f); 84 | value = __nv_bfloat16(rand_value); 85 | } 86 | } 87 | 88 | void cublas(__nv_bfloat16 *A_device, __nv_bfloat16 *B_device, __nv_bfloat16 *C_device, int M, int N, int K) { 89 | cublasLtHandle_t handle; 90 | cublasLtCreate(&handle); 91 | 92 | cublasLtMatrixLayout_t A_desc, B_desc, C_desc; 93 | 94 | cublasLtMatrixLayoutCreate(&A_desc, CUDA_R_16BF, N, K, K); 95 | cublasLtMatrixLayoutCreate(&B_desc, CUDA_R_16BF, K, M, K); 96 | cublasLtMatrixLayoutCreate(&C_desc, CUDA_R_16BF, N, M, N); 97 | 98 | cublasLtMatmulDesc_t matmul_desc; 99 | cublasLtMatmulDescCreate(&matmul_desc, CUBLAS_COMPUTE_32F, CUDA_R_32F); 100 | 101 | const cublasOperation_t transa = CUBLAS_OP_T; 102 | const cublasOperation_t transb = CUBLAS_OP_N; 103 | 104 | cublasLtMatmulDescSetAttribute(matmul_desc, CUBLASLT_MATMUL_DESC_TRANSA, &transa, sizeof(transa)); 105 | cublasLtMatmulDescSetAttribute(matmul_desc, CUBLASLT_MATMUL_DESC_TRANSB, &transb, sizeof(transb)); 106 | 107 | cublasDataType_t scale_type = CUDA_R_32F; 108 | cublasLtMatmulDescSetAttribute(matmul_desc, CUBLASLT_MATMUL_DESC_SCALE_TYPE, &scale_type, sizeof(scale_type)); 109 | 110 | float alpha = 1.0f; 111 | float beta = 0.0f; 112 | 113 | size_t workspace_size = 32 * 1024 * 1024; // 32 MiB workspace 114 | void *workspace = nullptr; 115 | cudaMalloc(&workspace, workspace_size); 116 | 117 | cublasLtMatmulPreference_t preference; 118 | cublasLtMatmulPreferenceCreate(&preference); 119 | cublasLtMatmulPreferenceSetAttribute( 120 | preference, CUBLASLT_MATMUL_PREF_MAX_WORKSPACE_BYTES, &workspace_size, sizeof(workspace_size)); 121 | 122 | cublasLtMatmulHeuristicResult_t heuristic_result; 123 | int returned_results = 0; 124 | 125 | cublasLtMatmulAlgoGetHeuristic( 126 | handle, matmul_desc, A_desc, B_desc, C_desc, C_desc, preference, 1, &heuristic_result, &returned_results); 127 | 128 | if (returned_results == 0) { 129 | std::cerr << "No algorithm found!" << std::endl; 130 | exit(EXIT_FAILURE); 131 | } 132 | 133 | for (int i = 0; i < warmup_iterations; i++) { 134 | cublasLtMatmul( 135 | handle, matmul_desc, &alpha, B_device, A_desc, A_device, B_desc, &beta, C_device, C_desc, C_device, C_desc, 136 | &heuristic_result.algo, workspace, workspace_size, 0); 137 | } 138 | 139 | kernel_durations.clear(); 140 | 141 | CUpti_SubscriberHandle subscriber; 142 | uint64_t userdata = 0; 143 | cuptiSubscribe(&subscriber, (CUpti_CallbackFunc)getTimestampCallback, &userdata); 144 | cuptiEnableDomain(1, subscriber, CUPTI_CB_DOMAIN_RUNTIME_API); 145 | 146 | cuptiActivityRegisterCallbacks(buffer_requested, buffer_completed); 147 | cuptiActivityEnable(CUPTI_ACTIVITY_KIND_KERNEL); 148 | 149 | for (int i = 0; i < iterations; i++) { 150 | flush(to_flush); 151 | cublasLtMatmul( 152 | handle, matmul_desc, &alpha, B_device, A_desc, A_device, B_desc, &beta, C_device, C_desc, C_device, C_desc, 153 | &heuristic_result.algo, workspace, workspace_size, 0); 154 | } 155 | 156 | cudaDeviceSynchronize(); 157 | 158 | cuptiActivityFlushAll(0); 159 | 160 | cuptiUnsubscribe(subscriber); 161 | cuptiActivityDisable(CUPTI_ACTIVITY_KIND_KERNEL); 162 | 163 | double time_ns = 0.0; 164 | if (!kernel_durations.empty()) { 165 | time_ns = std::accumulate(kernel_durations.begin(), kernel_durations.end(), 0ull) / kernel_durations.size(); 166 | } 167 | 168 | double flops = 2.0 * double(M) * double(N) * double(K); 169 | double tflops = flops / time_ns * 1e-3; 170 | 171 | std::cout << "cuBLAS Average time (ns): " << time_ns << std::endl; 172 | std::cout << "cuBLAS Performance: " << tflops << " TFLOPS" << std::endl; 173 | 174 | cublasLtMatmulPreferenceDestroy(preference); 175 | cublasLtMatmulDescDestroy(matmul_desc); 176 | cublasLtMatrixLayoutDestroy(A_desc); 177 | cublasLtMatrixLayoutDestroy(B_desc); 178 | cublasLtMatrixLayoutDestroy(C_desc); 179 | cublasLtDestroy(handle); 180 | 181 | cudaFree(workspace); 182 | } 183 | 184 | template 185 | uint32_t get_smem_size() { 186 | uint32_t smem_size = 0; 187 | smem_size += sizeof(__nv_bfloat16) * (BLOCK_M * BLOCK_N); 188 | smem_size += sizeof(__nv_bfloat16) * (BLOCK_M * BLOCK_K) * NUM_STAGES; 189 | smem_size += sizeof(__nv_bfloat16) * (BLOCK_N * BLOCK_K) * NUM_STAGES; 190 | smem_size += sizeof(uint64_t) * 2 * NUM_STAGES; 191 | return smem_size; 192 | } 193 | 194 | void impl( 195 | __nv_bfloat16 *A_device, __nv_bfloat16 *B_device, __nv_bfloat16 *C_device, uint32_t M, uint32_t N, uint32_t K) { 196 | constexpr uint32_t BLOCK_M = 128; 197 | constexpr uint32_t BLOCK_N = 256; 198 | constexpr uint32_t BLOCK_K = 64; 199 | constexpr uint32_t NUM_STAGES = 3; 200 | constexpr uint32_t NUM_TMA_MULTICAST = 2; 201 | 202 | using GemmType = Gemm; 203 | 204 | auto tma_a_desc = GemmType::make_2d_tma_a_desc(A_device, M, K); 205 | auto tma_b_desc = GemmType::make_2d_tma_b_desc(B_device, K, N); 206 | auto tma_c_desc = GemmType::make_2d_tma_c_desc(C_device, M, N); 207 | 208 | cudaDeviceProp deviceProp; 209 | cudaGetDeviceProperties(&deviceProp, 0); 210 | 211 | uint32_t num_sms = deviceProp.multiProcessorCount; 212 | 213 | const uint32_t num_blocks = ceil_div(M, BLOCK_M) * ceil_div(N, BLOCK_N); 214 | const uint32_t num_waves = ceil_div(num_blocks, num_sms); 215 | num_sms = std::min(num_sms, ceil_div(num_blocks, num_waves)); 216 | num_sms = ceil_div(num_sms, NUM_TMA_MULTICAST) * NUM_TMA_MULTICAST; 217 | 218 | const uint32_t smem_size = get_smem_size(); 219 | 220 | for (int i = 0; i < warmup_iterations; i++) { 221 | GemmType::run(C_device, M, N, K, tma_a_desc, tma_b_desc, tma_c_desc, 0, num_sms, smem_size); 222 | } 223 | 224 | kernel_durations.clear(); 225 | 226 | CUpti_SubscriberHandle subscriber; 227 | uint64_t userdata = 0; 228 | cuptiSubscribe(&subscriber, (CUpti_CallbackFunc)getTimestampCallback, &userdata); 229 | cuptiEnableDomain(1, subscriber, CUPTI_CB_DOMAIN_RUNTIME_API); 230 | 231 | cuptiActivityRegisterCallbacks(buffer_requested, buffer_completed); 232 | cuptiActivityEnable(CUPTI_ACTIVITY_KIND_KERNEL); 233 | 234 | for (int i = 0; i < iterations; i++) { 235 | flush(to_flush); 236 | GemmType::run(C_device, M, N, K, tma_a_desc, tma_b_desc, tma_c_desc, 0, num_sms, smem_size); 237 | } 238 | 239 | cudaDeviceSynchronize(); 240 | 241 | cuptiActivityFlushAll(0); 242 | 243 | cuptiUnsubscribe(subscriber); 244 | cuptiActivityDisable(CUPTI_ACTIVITY_KIND_KERNEL); 245 | 246 | double time_ns = 0.0; 247 | if (!kernel_durations.empty()) { 248 | time_ns = std::accumulate(kernel_durations.begin(), kernel_durations.end(), 0ull) / kernel_durations.size(); 249 | } 250 | 251 | double flops = 2.0 * double(M) * double(N) * double(K); 252 | double tflops = flops / time_ns * 1e-3; 253 | 254 | std::cout << "Impl Average time (ns): " << time_ns << std::endl; 255 | std::cout << "Impl Performance: " << tflops << " TFLOPS" << std::endl; 256 | } 257 | 258 | int main() { 259 | const int M = 4096; 260 | const int N = 4096; 261 | const int K = 4096; 262 | 263 | __nv_bfloat16 *A_device, *B_device, *C_device, *C_cublas_device; 264 | 265 | size_t A_bytes = M * K * sizeof(__nv_bfloat16); 266 | size_t B_bytes = N * K * sizeof(__nv_bfloat16); 267 | size_t C_bytes = M * N * sizeof(__nv_bfloat16); 268 | 269 | cudaMalloc(&A_device, A_bytes); 270 | cudaMalloc(&B_device, B_bytes); 271 | cudaMalloc(&C_device, C_bytes); 272 | cudaMalloc(&C_cublas_device, C_bytes); 273 | 274 | cudaMalloc(&to_flush, l2_size); 275 | 276 | std::vector<__nv_bfloat16> A_host(M * K); 277 | std::vector<__nv_bfloat16> B_host(N * K); 278 | 279 | fill_randn(A_host); 280 | fill_randn(B_host); 281 | 282 | cudaMemcpy(A_device, A_host.data(), A_bytes, cudaMemcpyHostToDevice); 283 | cudaMemcpy(B_device, B_host.data(), B_bytes, cudaMemcpyHostToDevice); 284 | 285 | impl(A_device, B_device, C_device, M, N, K); 286 | 287 | cublas(A_device, B_device, C_cublas_device, M, N, K); 288 | 289 | std::vector<__nv_bfloat16> C_host(M * N); 290 | std::vector<__nv_bfloat16> C_cublas_host(M * N); 291 | cudaMemcpy(C_host.data(), C_device, C_bytes, cudaMemcpyDeviceToHost); 292 | cudaMemcpy(C_cublas_host.data(), C_cublas_device, C_bytes, cudaMemcpyDeviceToHost); 293 | 294 | bool is_correct = std::ranges::equal(C_host, C_cublas_host); 295 | std::cout << (is_correct ? "Correct!" : "Incorrect!") << std::endl; 296 | 297 | cudaFree(A_device); 298 | cudaFree(B_device); 299 | cudaFree(C_device); 300 | cudaFree(C_cublas_device); 301 | 302 | cudaFree(to_flush); 303 | 304 | return 0; 305 | } 306 | -------------------------------------------------------------------------------- /gemm/impl.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include 4 | 5 | #include 6 | #include 7 | #include 8 | #include 9 | 10 | template 11 | __device__ __host__ __forceinline__ constexpr T ceil_div(T a, T b) { 12 | return (a + b - 1) / b; 13 | } 14 | 15 | __device__ __forceinline__ void prefetch_tma_descriptor(void const *desc_ptr) { 16 | uint64_t gmem_int_desc = reinterpret_cast(desc_ptr); 17 | asm volatile("prefetch.tensormap [%0];" : : "l"(gmem_int_desc) : "memory"); 18 | } 19 | 20 | union GmmaDescriptor { 21 | __host__ __device__ constexpr GmmaDescriptor() noexcept : desc_(0) { 22 | } 23 | 24 | __host__ __device__ constexpr GmmaDescriptor(uint64_t desc) noexcept : desc_(desc) { 25 | } 26 | 27 | __host__ __device__ constexpr GmmaDescriptor(GmmaDescriptor const &t) noexcept : desc_(t.desc_) { 28 | } 29 | 30 | __host__ __device__ constexpr GmmaDescriptor(GmmaDescriptor &&t) noexcept : desc_(t.desc_) { 31 | } 32 | 33 | __host__ __device__ constexpr GmmaDescriptor &operator=(GmmaDescriptor const &t) noexcept { 34 | desc_ = t.desc_; 35 | return *this; 36 | } 37 | 38 | __host__ __device__ constexpr GmmaDescriptor &operator=(GmmaDescriptor &&t) noexcept { 39 | desc_ = t.desc_; 40 | return *this; 41 | } 42 | 43 | uint64_t desc_; 44 | uint32_t reg32_[2]; 45 | uint16_t reg16_[4]; 46 | 47 | struct { 48 | uint16_t start_address_ : 14, : 2; 49 | uint16_t leading_byte_offset_ : 14, : 2; 50 | uint16_t stride_byte_offset_ : 14, : 2; 51 | uint8_t : 1, base_offset_ : 3, : 4; 52 | uint8_t : 6, layout_type_ : 2; 53 | } bitfield; 54 | 55 | // Decay to an `uint64_t` 56 | __host__ __device__ constexpr operator uint64_t() const noexcept { 57 | return desc_; 58 | } 59 | }; 60 | 61 | template 62 | __device__ GmmaDescriptor make_k_major_smem_desc( 63 | PointerType smem_ptr, int layout_type, int leading_byte_offset = 0, int stride_byte_offset = 1024) { 64 | GmmaDescriptor desc; 65 | auto uint_ptr = static_cast(__cvta_generic_to_shared(smem_ptr)); 66 | desc.bitfield.start_address_ = uint_ptr >> 4; 67 | desc.bitfield.layout_type_ = layout_type; 68 | desc.bitfield.leading_byte_offset_ = leading_byte_offset >> 4; 69 | desc.bitfield.stride_byte_offset_ = stride_byte_offset >> 4; 70 | desc.bitfield.base_offset_ = 0; 71 | return desc; 72 | } 73 | 74 | __device__ __forceinline__ void warpgroup_arrive() { 75 | asm volatile("wgmma.fence.sync.aligned;\n" ::: "memory"); 76 | } 77 | 78 | __device__ __forceinline__ void warpgroup_commit_batch() { 79 | asm volatile("wgmma.commit_group.sync.aligned;\n" ::: "memory"); 80 | } 81 | 82 | __device__ __forceinline__ void warpgroup_fence_operand(float ®) { 83 | asm volatile("" : "+f"(reg)::"memory"); 84 | } 85 | 86 | template 87 | __device__ __forceinline__ void warpgroup_wait() { 88 | static_assert(N >= 0 and N <= 7, "WGMMA wait: N must be in range [0, 7]"); 89 | asm volatile("wgmma.wait_group.sync.aligned %0;\n" : : "n"(N) : "memory"); 90 | } 91 | 92 | template 93 | __device__ __forceinline__ void tma_store_wait() { 94 | asm volatile("cp.async.bulk.wait_group.read %0;" : : "n"(Count) : "memory"); 95 | } 96 | 97 | __device__ __forceinline__ void tma_store_fence() { 98 | asm volatile("fence.proxy.async.shared::cta;"); 99 | } 100 | 101 | __device__ __forceinline__ void tma_store_arrive() { 102 | asm volatile("cp.async.bulk.commit_group;"); 103 | } 104 | 105 | struct WGMMA { 106 | __device__ static void wgmma( 107 | uint64_t const &desc_a, uint64_t const &desc_b, float &d000, float &d001, float &d002, float &d003, float &d004, 108 | float &d005, float &d006, float &d007, float &d008, float &d009, float &d010, float &d011, float &d012, 109 | float &d013, float &d014, float &d015, float &d016, float &d017, float &d018, float &d019, float &d020, 110 | float &d021, float &d022, float &d023, float &d024, float &d025, float &d026, float &d027, float &d028, 111 | float &d029, float &d030, float &d031, float &d032, float &d033, float &d034, float &d035, float &d036, 112 | float &d037, float &d038, float &d039, float &d040, float &d041, float &d042, float &d043, float &d044, 113 | float &d045, float &d046, float &d047, float &d048, float &d049, float &d050, float &d051, float &d052, 114 | float &d053, float &d054, float &d055, float &d056, float &d057, float &d058, float &d059, float &d060, 115 | float &d061, float &d062, float &d063, float &d064, float &d065, float &d066, float &d067, float &d068, 116 | float &d069, float &d070, float &d071, float &d072, float &d073, float &d074, float &d075, float &d076, 117 | float &d077, float &d078, float &d079, float &d080, float &d081, float &d082, float &d083, float &d084, 118 | float &d085, float &d086, float &d087, float &d088, float &d089, float &d090, float &d091, float &d092, 119 | float &d093, float &d094, float &d095, float &d096, float &d097, float &d098, float &d099, float &d100, 120 | float &d101, float &d102, float &d103, float &d104, float &d105, float &d106, float &d107, float &d108, 121 | float &d109, float &d110, float &d111, float &d112, float &d113, float &d114, float &d115, float &d116, 122 | float &d117, float &d118, float &d119, float &d120, float &d121, float &d122, float &d123, float &d124, 123 | float &d125, float &d126, float &d127, bool scale_d) { 124 | asm volatile( 125 | "{\n" 126 | ".reg .pred p;\n" 127 | "setp.ne.b32 p, %130, 0;\n" 128 | "wgmma.mma_async.sync.aligned.m64n256k16.f32.bf16.bf16 " 129 | "{%0, %1, %2, %3, %4, %5, %6, %7, " 130 | " %8, %9, %10, %11, %12, %13, %14, %15, " 131 | " %16, %17, %18, %19, %20, %21, %22, %23, " 132 | " %24, %25, %26, %27, %28, %29, %30, %31, " 133 | " %32, %33, %34, %35, %36, %37, %38, %39, " 134 | " %40, %41, %42, %43, %44, %45, %46, %47, " 135 | " %48, %49, %50, %51, %52, %53, %54, %55, " 136 | " %56, %57, %58, %59, %60, %61, %62, %63, " 137 | " %64, %65, %66, %67, %68, %69, %70, %71, " 138 | " %72, %73, %74, %75, %76, %77, %78, %79, " 139 | " %80, %81, %82, %83, %84, %85, %86, %87, " 140 | " %88, %89, %90, %91, %92, %93, %94, %95, " 141 | " %96, %97, %98, %99, %100, %101, %102, %103, " 142 | " %104, %105, %106, %107, %108, %109, %110, %111, " 143 | " %112, %113, %114, %115, %116, %117, %118, %119, " 144 | " %120, %121, %122, %123, %124, %125, %126, %127}," 145 | " %128," 146 | " %129," 147 | " p, 1, 1, 0, 0;\n" 148 | "}\n" 149 | : "+f"(d000), "+f"(d001), "+f"(d002), "+f"(d003), "+f"(d004), "+f"(d005), "+f"(d006), "+f"(d007), 150 | "+f"(d008), "+f"(d009), "+f"(d010), "+f"(d011), "+f"(d012), "+f"(d013), "+f"(d014), "+f"(d015), 151 | "+f"(d016), "+f"(d017), "+f"(d018), "+f"(d019), "+f"(d020), "+f"(d021), "+f"(d022), "+f"(d023), 152 | "+f"(d024), "+f"(d025), "+f"(d026), "+f"(d027), "+f"(d028), "+f"(d029), "+f"(d030), "+f"(d031), 153 | "+f"(d032), "+f"(d033), "+f"(d034), "+f"(d035), "+f"(d036), "+f"(d037), "+f"(d038), "+f"(d039), 154 | "+f"(d040), "+f"(d041), "+f"(d042), "+f"(d043), "+f"(d044), "+f"(d045), "+f"(d046), "+f"(d047), 155 | "+f"(d048), "+f"(d049), "+f"(d050), "+f"(d051), "+f"(d052), "+f"(d053), "+f"(d054), "+f"(d055), 156 | "+f"(d056), "+f"(d057), "+f"(d058), "+f"(d059), "+f"(d060), "+f"(d061), "+f"(d062), "+f"(d063), 157 | "+f"(d064), "+f"(d065), "+f"(d066), "+f"(d067), "+f"(d068), "+f"(d069), "+f"(d070), "+f"(d071), 158 | "+f"(d072), "+f"(d073), "+f"(d074), "+f"(d075), "+f"(d076), "+f"(d077), "+f"(d078), "+f"(d079), 159 | "+f"(d080), "+f"(d081), "+f"(d082), "+f"(d083), "+f"(d084), "+f"(d085), "+f"(d086), "+f"(d087), 160 | "+f"(d088), "+f"(d089), "+f"(d090), "+f"(d091), "+f"(d092), "+f"(d093), "+f"(d094), "+f"(d095), 161 | "+f"(d096), "+f"(d097), "+f"(d098), "+f"(d099), "+f"(d100), "+f"(d101), "+f"(d102), "+f"(d103), 162 | "+f"(d104), "+f"(d105), "+f"(d106), "+f"(d107), "+f"(d108), "+f"(d109), "+f"(d110), "+f"(d111), 163 | "+f"(d112), "+f"(d113), "+f"(d114), "+f"(d115), "+f"(d116), "+f"(d117), "+f"(d118), "+f"(d119), 164 | "+f"(d120), "+f"(d121), "+f"(d122), "+f"(d123), "+f"(d124), "+f"(d125), "+f"(d126), "+f"(d127) 165 | : "l"(desc_a), "l"(desc_b), "r"(int32_t(scale_d))); 166 | } 167 | 168 | __device__ static void wgmma(uint64_t const &desc_a, uint64_t const &desc_b, float *d, bool scale_d) { 169 | wgmma( 170 | desc_a, desc_b, d[0], d[1], d[2], d[3], d[4], d[5], d[6], d[7], d[8], d[9], d[10], d[11], d[12], d[13], 171 | d[14], d[15], d[16], d[17], d[18], d[19], d[20], d[21], d[22], d[23], d[24], d[25], d[26], d[27], d[28], 172 | d[29], d[30], d[31], d[32], d[33], d[34], d[35], d[36], d[37], d[38], d[39], d[40], d[41], d[42], d[43], 173 | d[44], d[45], d[46], d[47], d[48], d[49], d[50], d[51], d[52], d[53], d[54], d[55], d[56], d[57], d[58], 174 | d[59], d[60], d[61], d[62], d[63], d[64], d[65], d[66], d[67], d[68], d[69], d[70], d[71], d[72], d[73], 175 | d[74], d[75], d[76], d[77], d[78], d[79], d[80], d[81], d[82], d[83], d[84], d[85], d[86], d[87], d[88], 176 | d[89], d[90], d[91], d[92], d[93], d[94], d[95], d[96], d[97], d[98], d[99], d[100], d[101], d[102], d[103], 177 | d[104], d[105], d[106], d[107], d[108], d[109], d[110], d[111], d[112], d[113], d[114], d[115], d[116], 178 | d[117], d[118], d[119], d[120], d[121], d[122], d[123], d[124], d[125], d[126], d[127], scale_d); 179 | } 180 | 181 | static constexpr int M = 64; 182 | static constexpr int N = 256; 183 | static constexpr int K = 16; 184 | static constexpr int NUM_ACCUMS = M * N / 128; 185 | }; 186 | 187 | template 188 | struct SM90_U32x4_STSM_N { 189 | __device__ __forceinline__ static void copy(T src0, T src1, T src_2, T src_3, void *smem_dst) { 190 | const uint32_t src[4] = { 191 | *reinterpret_cast(&src0), *reinterpret_cast(&src1), 192 | *reinterpret_cast(&src_2), *reinterpret_cast(&src_3)}; 193 | asm volatile( 194 | "stmatrix.sync.aligned.x4.m8n8.shared.b16 [%0], {%1, %2, %3, %4};\n" ::"l"(smem_dst), "r"(src[0]), 195 | "r"(src[1]), "r"(src[2]), "r"(src[3])); 196 | } 197 | }; 198 | 199 | __device__ __forceinline__ uint32_t get_lane_id() { 200 | uint32_t lane_id; 201 | asm("mov.u32 %0, %laneid;" : "=r"(lane_id)); 202 | return lane_id; 203 | } 204 | 205 | __device__ __forceinline__ uint32_t block_rank_in_cluster() { 206 | uint32_t rank; 207 | asm volatile("mov.u32 %0, %%cluster_ctarank;\n" : "=r"(rank) :); 208 | return rank; 209 | } 210 | 211 | template 212 | __device__ __forceinline__ void warpgroup_reg_alloc() { 213 | asm volatile("setmaxnreg.inc.sync.aligned.u32 %0;\n" : : "n"(RegCount)); 214 | } 215 | 216 | template 217 | __device__ __forceinline__ void warpgroup_reg_dealloc() { 218 | asm volatile("setmaxnreg.dec.sync.aligned.u32 %0;\n" : : "n"(RegCount)); 219 | } 220 | 221 | __device__ __forceinline__ void init_barrier(uint64_t *barrier, int arrive_count) { 222 | uint32_t barrier_ptr = static_cast(__cvta_generic_to_shared(barrier)); 223 | asm volatile( 224 | "{\n\t" 225 | "mbarrier.init.shared::cta.b64 [%1], %0; \n" 226 | "}" 227 | : 228 | : "r"(arrive_count), "r"(barrier_ptr)); 229 | } 230 | 231 | __device__ static __forceinline__ void wait(uint64_t *barrier, int phase) { 232 | uint32_t barrier_ptr = static_cast(__cvta_generic_to_shared(barrier)); 233 | constexpr uint32_t ticks = 0x989680; 234 | asm volatile( 235 | "{\n\t" 236 | ".reg .pred P1; \n\t" 237 | "LAB_WAIT: \n\t" 238 | "mbarrier.try_wait.parity.shared::cta.b64 P1, [%0], %1, %2; \n\t" 239 | "@P1 bra DONE; \n\t" 240 | "bra LAB_WAIT; \n\t" 241 | "DONE: \n\t" 242 | "}" 243 | : 244 | : "r"(barrier_ptr), "r"(phase), "r"(ticks)); 245 | } 246 | 247 | __device__ __forceinline__ void arrive_and_expect_tx(uint64_t *barrier, uint32_t transaction_bytes) { 248 | uint32_t barrier_ptr = static_cast(__cvta_generic_to_shared(barrier)); 249 | asm volatile( 250 | "{\n\t" 251 | "mbarrier.arrive.expect_tx.shared::cta.b64 _, [%1], %0; \n\t" 252 | "}" 253 | : 254 | : "r"(transaction_bytes), "r"(barrier_ptr)); 255 | } 256 | 257 | __device__ __forceinline__ void arrive(uint64_t const *barrier) { 258 | uint32_t barrier_ptr = static_cast(__cvta_generic_to_shared(barrier)); 259 | asm volatile( 260 | "{\n\t" 261 | "mbarrier.arrive.shared::cta.b64 _, [%0];\n\t" 262 | "}" 263 | : 264 | : "r"(barrier_ptr)); 265 | } 266 | 267 | __device__ __forceinline__ void arrive_cluster(uint64_t *barrier, uint32_t cta_id) { 268 | uint32_t barrier_ptr = static_cast(__cvta_generic_to_shared(barrier)); 269 | 270 | asm volatile( 271 | "{\n" 272 | ".reg .b32 remAddr32;\n" 273 | "mapa.shared::cluster.u32 remAddr32, %0, %1;\n" 274 | "mbarrier.arrive.shared::cluster.b64 _, [remAddr32];\n" 275 | "}" 276 | : 277 | : "r"(barrier_ptr), "r"(cta_id)); 278 | } 279 | 280 | template 281 | struct Scheduler { 282 | int current_iter = -1; 283 | uint32_t num_aligned_m_blocks; 284 | uint32_t num_aligned_n_blocks; 285 | uint32_t num_blocks; 286 | 287 | __device__ explicit Scheduler(uint32_t shape_m, uint32_t shape_n) { 288 | num_aligned_m_blocks = ceil_div(shape_m, BLOCK_M); 289 | num_aligned_n_blocks = ceil_div(shape_n, BLOCK_N); 290 | num_blocks = num_aligned_m_blocks * num_aligned_n_blocks; 291 | } 292 | 293 | __device__ void get_swizzled_block_idx(int block_idx, uint32_t &m_block_idx, uint32_t &n_block_idx) { 294 | static_assert(NUM_BLOCKS_PER_GROUP % NUM_TMA_MULTICAST == 0, "Invalid group size"); 295 | 296 | const auto num_blocks_per_group = num_aligned_n_blocks * NUM_BLOCKS_PER_GROUP; 297 | const auto group_idx = block_idx / num_blocks_per_group; 298 | const auto in_group_idx = block_idx % num_blocks_per_group; 299 | 300 | const auto first_m_block_idx = group_idx * NUM_BLOCKS_PER_GROUP; 301 | const auto num_m_blocks_in_group = min(NUM_BLOCKS_PER_GROUP, num_aligned_m_blocks - first_m_block_idx); 302 | m_block_idx = first_m_block_idx + in_group_idx % num_m_blocks_in_group; 303 | n_block_idx = in_group_idx / num_m_blocks_in_group; 304 | } 305 | 306 | __device__ bool get_next_block(uint32_t &m_block_idx, uint32_t &n_block_idx) { 307 | const auto next_block_idx = (++current_iter) * gridDim.x + blockIdx.x; 308 | if (next_block_idx >= num_blocks) 309 | return false; 310 | get_swizzled_block_idx(next_block_idx, m_block_idx, n_block_idx); 311 | return true; 312 | } 313 | }; 314 | 315 | template 316 | __device__ __forceinline__ void load_async_multicast( 317 | __nv_bfloat16 *smem, void const *src_tma_map, uint64_t *barrier, int crd0, int crd1) { 318 | constexpr uint64_t CACHE_HINT = 0x1000000000000000ull; 319 | constexpr uint16_t MASK = (1 << NUM_TMA_MULTICAST) - 1; 320 | 321 | uint64_t tma_ptr = reinterpret_cast(src_tma_map); 322 | uint32_t barrier_ptr = static_cast(__cvta_generic_to_shared(barrier)); 323 | uint32_t smem_int_ptr = static_cast(__cvta_generic_to_shared(smem)); 324 | 325 | asm volatile( 326 | "cp.async.bulk.tensor.2d.shared::cluster.global.mbarrier::complete_tx::bytes.multicast::cluster.L2::cache_hint" 327 | " [%0], [%1, {%4, %5}], [%2], %3, %6;" 328 | : 329 | : "r"(smem_int_ptr), "l"(tma_ptr), "r"(barrier_ptr), "h"(MASK), "r"(crd0), "r"(crd1), "l"(CACHE_HINT) 330 | : "memory"); 331 | } 332 | 333 | __device__ __forceinline__ void load_async( 334 | __nv_bfloat16 *smem, void const *src_tma_map, uint64_t *barrier, int crd0, int crd1) { 335 | constexpr uint64_t CACHE_HINT = 0x1000000000000000ull; 336 | 337 | uint64_t tma_ptr = reinterpret_cast(src_tma_map); 338 | uint32_t barrier_ptr = static_cast(__cvta_generic_to_shared(barrier)); 339 | uint32_t smem_int_ptr = static_cast(__cvta_generic_to_shared(smem)); 340 | 341 | asm volatile( 342 | "cp.async.bulk.tensor.2d.shared::cluster.global.mbarrier::complete_tx::bytes.L2::cache_hint" 343 | " [%0], [%1, {%3, %4}], [%2], %5;" 344 | : 345 | : "r"(smem_int_ptr), "l"(tma_ptr), "r"(barrier_ptr), "r"(crd0), "r"(crd1), "l"(CACHE_HINT) 346 | : "memory"); 347 | } 348 | 349 | __device__ __forceinline__ void store_async(void const *dst_tma_map, __nv_bfloat16 *smem, int crd0, int crd1) { 350 | uint64_t tma_ptr = reinterpret_cast(dst_tma_map); 351 | uint32_t smem_int_ptr = static_cast(__cvta_generic_to_shared(smem)); 352 | 353 | asm volatile("cp.async.bulk.tensor.2d.global.shared::cta.bulk_group [%0, {%2, %3}], [%1];" 354 | : 355 | : "l"(tma_ptr), "r"(smem_int_ptr), "r"(crd0), "r"(crd1) 356 | : "memory"); 357 | } 358 | 359 | template 360 | __global__ void __launch_bounds__(384, 1) bf16_gemm_kernel_nt( 361 | __nv_bfloat16 *gmem_c, uint32_t shape_m, uint32_t shape_n, uint32_t shape_k, 362 | const __grid_constant__ CUtensorMap tensor_map_a, const __grid_constant__ CUtensorMap tensor_map_b, 363 | const __grid_constant__ CUtensorMap tensor_map_c) { 364 | constexpr uint32_t SMEM_D_SIZE = BLOCK_M * BLOCK_N * sizeof(__nv_bfloat16); 365 | constexpr uint32_t SMEM_A_SIZE_PER_STAGE = BLOCK_M * BLOCK_K * sizeof(__nv_bfloat16); 366 | constexpr uint32_t SMEM_B_SIZE_PER_STAGE = BLOCK_N * BLOCK_K * sizeof(__nv_bfloat16); 367 | 368 | constexpr uint32_t MATH_NUM_THREADS = 256; 369 | 370 | constexpr uint32_t FULL_K_ALL_STAGES = NUM_STAGES * BLOCK_K; 371 | const uint32_t num_k_full_iterations = ceil_div(shape_k, FULL_K_ALL_STAGES); 372 | 373 | const uint32_t warp_group_idx = __shfl_sync(0xffffffff, threadIdx.x / 128, 0); 374 | const uint32_t in_group_idx = threadIdx.x % 128; 375 | const uint32_t warp_idx = __shfl_sync(0xffffffff, threadIdx.x / 32, 0); 376 | const uint32_t lane_idx = get_lane_id(); 377 | 378 | if (threadIdx.x == MATH_NUM_THREADS) { 379 | prefetch_tma_descriptor(&tensor_map_a); 380 | prefetch_tma_descriptor(&tensor_map_b); 381 | prefetch_tma_descriptor(&tensor_map_c); 382 | } 383 | __syncwarp(); 384 | 385 | extern __shared__ __align__(1024) uint8_t smem_buffer[]; 386 | static_assert(SMEM_D_SIZE % 1024 == 0, "Shared memory of D must be aligned to 1024 bytes"); 387 | static_assert(SMEM_A_SIZE_PER_STAGE % 1024 == 0, "Shared memory of A must be aligned to 1024 bytes"); 388 | static_assert(SMEM_B_SIZE_PER_STAGE % 1024 == 0, "Shared memory of B must be aligned to 1024 bytes"); 389 | 390 | auto smem_d = reinterpret_cast<__nv_bfloat16 *>(smem_buffer); 391 | __nv_bfloat16 *smem_a[NUM_STAGES]; 392 | __nv_bfloat16 *smem_b[NUM_STAGES]; 393 | 394 | uint64_t *full_barriers[NUM_STAGES]; 395 | uint64_t *empty_barriers[NUM_STAGES]; 396 | 397 | #pragma unroll 398 | for (uint32_t i = 0; i < NUM_STAGES; ++i) { 399 | smem_a[i] = reinterpret_cast<__nv_bfloat16 *>(smem_buffer + SMEM_D_SIZE + i * SMEM_A_SIZE_PER_STAGE); 400 | smem_b[i] = reinterpret_cast<__nv_bfloat16 *>( 401 | smem_buffer + SMEM_D_SIZE + NUM_STAGES * SMEM_A_SIZE_PER_STAGE + i * SMEM_B_SIZE_PER_STAGE); 402 | } 403 | 404 | auto barrier_start_ptr = reinterpret_cast( 405 | smem_buffer + SMEM_D_SIZE + NUM_STAGES * SMEM_A_SIZE_PER_STAGE + NUM_STAGES * SMEM_B_SIZE_PER_STAGE); 406 | #pragma unroll 407 | for (uint32_t i = 0; i < NUM_STAGES; ++i) { 408 | full_barriers[i] = barrier_start_ptr + i; 409 | empty_barriers[i] = barrier_start_ptr + NUM_STAGES + i; 410 | } 411 | 412 | if (threadIdx.x == MATH_NUM_THREADS) { 413 | #pragma unroll 414 | for (uint32_t i = 0; i < NUM_STAGES; ++i) { 415 | init_barrier(full_barriers[i], 1); 416 | init_barrier(empty_barriers[i], NUM_TMA_MULTICAST * MATH_NUM_THREADS / 128); 417 | } 418 | 419 | asm volatile("fence.proxy.async.shared::cta;\n"); 420 | if constexpr (NUM_TMA_MULTICAST > 1) { 421 | asm volatile("fence.mbarrier_init.release.cluster;\n"); 422 | } 423 | } 424 | 425 | if constexpr (NUM_TMA_MULTICAST > 1) { 426 | asm volatile("barrier.cluster.arrive.aligned;\n"); 427 | asm volatile("barrier.cluster.wait.aligned;\n"); 428 | } else { 429 | __syncthreads(); 430 | } 431 | 432 | const uint32_t block_rank = block_rank_in_cluster(); 433 | 434 | uint32_t m_block_idx, n_block_idx; 435 | auto scheduler = Scheduler(shape_m, shape_n); 436 | 437 | if (threadIdx.x >= MATH_NUM_THREADS) { 438 | warpgroup_reg_dealloc<40>(); 439 | 440 | if (threadIdx.x == MATH_NUM_THREADS) { 441 | while (scheduler.get_next_block(m_block_idx, n_block_idx)) { 442 | for (uint32_t k_iter = 0; k_iter < num_k_full_iterations; ++k_iter) { 443 | #pragma unroll 444 | for (uint32_t s = 0; s < NUM_STAGES; ++s) { 445 | wait(empty_barriers[s], (scheduler.current_iter * num_k_full_iterations + k_iter + 1) & 1); 446 | 447 | const uint32_t k_idx = k_iter * FULL_K_ALL_STAGES + s * BLOCK_K; 448 | if (k_idx >= shape_k) { 449 | arrive(full_barriers[s]); 450 | continue; 451 | } 452 | 453 | load_async(smem_a[s], &tensor_map_a, full_barriers[s], k_idx, m_block_idx * BLOCK_M); 454 | 455 | if constexpr (NUM_TMA_MULTICAST > 1) { 456 | if (block_rank == 0) { 457 | load_async_multicast( 458 | smem_b[s], &tensor_map_b, full_barriers[s], k_idx, n_block_idx * BLOCK_N); 459 | } 460 | } else { 461 | load_async(smem_b[s], &tensor_map_b, full_barriers[s], k_idx, n_block_idx * BLOCK_N); 462 | } 463 | 464 | arrive_and_expect_tx(full_barriers[s], SMEM_A_SIZE_PER_STAGE + SMEM_B_SIZE_PER_STAGE); 465 | } 466 | } 467 | } 468 | 469 | if constexpr (NUM_TMA_MULTICAST > 1) { 470 | #pragma unroll 471 | for (uint32_t s = 0; s < NUM_STAGES; ++s) 472 | wait(empty_barriers[s], (scheduler.current_iter * num_k_full_iterations + 1) & 1); 473 | } 474 | } 475 | } else { 476 | warpgroup_reg_alloc<232>(); 477 | 478 | auto empty_barrier_arrive = [&](uint32_t s) { 479 | if constexpr (NUM_TMA_MULTICAST == 1) { 480 | in_group_idx == 0 ? arrive(empty_barriers[s]) : void(); 481 | } else { 482 | in_group_idx < NUM_TMA_MULTICAST ? arrive_cluster(empty_barriers[s], in_group_idx) : void(); 483 | } 484 | }; 485 | 486 | while (scheduler.get_next_block(m_block_idx, n_block_idx)) { 487 | float accum[WGMMA::NUM_ACCUMS]; 488 | 489 | auto compute_wgmma_stage = [&](uint32_t s, bool scale_d = true) { 490 | const auto smem_a_warp_group_offset = warp_group_idx * WGMMA::M * BLOCK_K; 491 | 492 | #pragma unroll 493 | for (int i = 0; i < WGMMA::NUM_ACCUMS; ++i) 494 | warpgroup_fence_operand(accum[i]); 495 | warpgroup_arrive(); 496 | 497 | auto desc_a = make_k_major_smem_desc(smem_a[s] + smem_a_warp_group_offset, 1); 498 | auto desc_b = make_k_major_smem_desc(smem_b[s], 1); 499 | WGMMA::wgmma(desc_a, desc_b, accum, scale_d); 500 | #pragma unroll 501 | for (int k = 1; k < BLOCK_K / WGMMA::K; ++k) { 502 | auto desc_a = make_k_major_smem_desc(smem_a[s] + k * WGMMA::K + smem_a_warp_group_offset, 1); 503 | auto desc_b = make_k_major_smem_desc(smem_b[s] + k * WGMMA::K, 1); 504 | WGMMA::wgmma(desc_a, desc_b, accum, true); 505 | } 506 | 507 | warpgroup_commit_batch(); 508 | #pragma unroll 509 | for (int i = 0; i < WGMMA::NUM_ACCUMS; ++i) 510 | warpgroup_fence_operand(accum[i]); 511 | warpgroup_wait<0>(); 512 | }; 513 | 514 | wait(full_barriers[0], (scheduler.current_iter * num_k_full_iterations) & 1); 515 | compute_wgmma_stage(0, false); 516 | empty_barrier_arrive(0); 517 | 518 | #pragma unroll 519 | for (uint32_t s = 1; s < NUM_STAGES; ++s) { 520 | wait(full_barriers[s], (scheduler.current_iter * num_k_full_iterations) & 1); 521 | 522 | const uint32_t k_idx = s * BLOCK_K; 523 | if (k_idx >= shape_k) { 524 | empty_barrier_arrive(s); 525 | continue; 526 | } 527 | 528 | compute_wgmma_stage(s); 529 | 530 | empty_barrier_arrive(s); 531 | } 532 | for (uint32_t k_iter = 1; k_iter < num_k_full_iterations; ++k_iter) { 533 | #pragma unroll 534 | for (uint32_t s = 0; s < NUM_STAGES; ++s) { 535 | wait(full_barriers[s], (scheduler.current_iter * num_k_full_iterations + k_iter) & 1); 536 | 537 | const uint32_t k_idx = k_iter * FULL_K_ALL_STAGES + s * BLOCK_K; 538 | if (k_idx >= shape_k) { 539 | empty_barrier_arrive(s); 540 | continue; 541 | } 542 | 543 | compute_wgmma_stage(s); 544 | 545 | empty_barrier_arrive(s); 546 | } 547 | } 548 | 549 | tma_store_wait<0>(); 550 | asm volatile("bar.sync %0, 128;\n" ::"r"(warp_group_idx + 8) : "memory"); 551 | 552 | uint32_t smem_store_offset = (warp_idx * 16 + lane_idx % 16) * 32 + 8 * (lane_idx / 16); 553 | 554 | uint32_t tma_store_smem_offset = warp_group_idx * WGMMA::M * 32; 555 | uint32_t tma_store_gmem_n = n_block_idx * BLOCK_N; 556 | uint32_t tma_store_gmem_m = m_block_idx * BLOCK_M + warp_group_idx * WGMMA::M; 557 | 558 | #pragma unroll 559 | for (auto j = 0; j < WGMMA::NUM_ACCUMS / 16; ++j) { 560 | const auto i0 = j * 2 + 0; 561 | SM90_U32x4_STSM_N::copy( 562 | __float22bfloat162_rn({accum[i0 * 8 + 0], accum[i0 * 8 + 1]}), 563 | __float22bfloat162_rn({accum[i0 * 8 + 2], accum[i0 * 8 + 3]}), 564 | __float22bfloat162_rn({accum[i0 * 8 + 4], accum[i0 * 8 + 5]}), 565 | __float22bfloat162_rn({accum[i0 * 8 + 6], accum[i0 * 8 + 7]}), smem_d + smem_store_offset); 566 | 567 | const auto i1 = j * 2 + 1; 568 | SM90_U32x4_STSM_N::copy( 569 | __float22bfloat162_rn({accum[i1 * 8 + 0], accum[i1 * 8 + 1]}), 570 | __float22bfloat162_rn({accum[i1 * 8 + 2], accum[i1 * 8 + 3]}), 571 | __float22bfloat162_rn({accum[i1 * 8 + 4], accum[i1 * 8 + 5]}), 572 | __float22bfloat162_rn({accum[i1 * 8 + 6], accum[i1 * 8 + 7]}), smem_d + smem_store_offset + 16); 573 | 574 | smem_store_offset += BLOCK_M * 32; 575 | 576 | tma_store_fence(); 577 | asm volatile("bar.sync %0, 128;\n" ::"r"(warp_group_idx + 8) : "memory"); 578 | 579 | if (in_group_idx == 0) { 580 | store_async(&tensor_map_c, smem_d + tma_store_smem_offset, tma_store_gmem_n, tma_store_gmem_m); 581 | 582 | tma_store_arrive(); 583 | } 584 | __syncwarp(); 585 | 586 | tma_store_smem_offset += BLOCK_M * 32; 587 | tma_store_gmem_n += 32; 588 | } 589 | } 590 | } 591 | } 592 | 593 | enum class Layout { RowMajor, ColMajor }; 594 | 595 | template 596 | class Gemm { 597 | public: 598 | Gemm() = default; 599 | 600 | static void run( 601 | __nv_bfloat16 *gmem_c, uint32_t shape_m, uint32_t shape_n, uint32_t shape_k, const CUtensorMap &tma_a_desc, 602 | const CUtensorMap &tma_b_desc, const CUtensorMap &tma_c_desc, cudaStream_t stream, int num_sms, 603 | uint32_t smem_size) { 604 | auto kernel = bf16_gemm_kernel_nt; 605 | assert(cudaFuncSetAttribute(kernel, cudaFuncAttributeMaxDynamicSharedMemorySize, smem_size) == cudaSuccess); 606 | 607 | cudaLaunchConfig_t config; 608 | config.gridDim = num_sms; 609 | config.blockDim = 384; 610 | config.dynamicSmemBytes = smem_size; 611 | config.stream = stream; 612 | 613 | cudaLaunchAttribute attr; 614 | attr.id = cudaLaunchAttributeClusterDimension; 615 | attr.val.clusterDim = {NUM_TMA_MULTICAST, 1, 1}; 616 | config.attrs = &attr; 617 | config.numAttrs = 1; 618 | 619 | auto status = 620 | cudaLaunchKernelEx(&config, kernel, gmem_c, shape_m, shape_n, shape_k, tma_a_desc, tma_b_desc, tma_c_desc); 621 | assert(status == cudaSuccess); 622 | } 623 | 624 | template 625 | static CUtensorMap make_2d_tma_a_desc(T *global_address, uint32_t shape_m, uint32_t shape_k) { 626 | return make_2d_tma_desc(global_address, Layout::RowMajor, shape_m, shape_k, BLOCK_M, BLOCK_K); 627 | } 628 | 629 | template 630 | static CUtensorMap make_2d_tma_b_desc(T *global_address, uint32_t shape_k, uint32_t shape_n) { 631 | return make_2d_tma_desc(global_address, Layout::ColMajor, shape_k, shape_n, BLOCK_K, BLOCK_N); 632 | } 633 | 634 | template 635 | static CUtensorMap make_2d_tma_c_desc(T *global_address, uint32_t shape_m, uint32_t shape_n) { 636 | return make_2d_tma_desc( 637 | global_address, Layout::RowMajor, shape_m, shape_n, BLOCK_M / 2, 32, 638 | CUtensorMapSwizzle::CU_TENSOR_MAP_SWIZZLE_NONE, false); 639 | } 640 | 641 | template 642 | static CUtensorMap make_2d_tma_desc( 643 | T *global_address, Layout layout, uint32_t gmem_rows, uint32_t gmem_cols, uint32_t smem_rows, 644 | uint32_t smem_cols, CUtensorMapSwizzle swizzle_type = CUtensorMapSwizzle::CU_TENSOR_MAP_SWIZZLE_128B, 645 | bool enable_l2_promotion = true) { 646 | if (layout == Layout::RowMajor) { 647 | uint64_t gmem_dim[2] = {gmem_cols, gmem_rows}; 648 | uint32_t smem_dim[2] = {smem_cols, smem_rows}; 649 | return make_2d_tma_copy_desc( 650 | global_address, gmem_dim, gmem_cols * sizeof(T), smem_dim, swizzle_type, enable_l2_promotion); 651 | } else { 652 | uint64_t gmem_dim[2] = {gmem_rows, gmem_cols}; 653 | uint32_t smem_dim[2] = {smem_rows, smem_cols}; 654 | return make_2d_tma_copy_desc( 655 | global_address, gmem_dim, gmem_rows * sizeof(T), smem_dim, swizzle_type, enable_l2_promotion); 656 | } 657 | } 658 | 659 | static PFN_cuTensorMapEncodeTiled get_cuTensorMapEncodeTiled() { 660 | cudaDriverEntryPointQueryResult driver_status; 661 | void *cuTensorMapEncodeTiled_ptr = nullptr; 662 | 663 | #if CUDA_VERSION >= 12050 664 | cudaGetDriverEntryPointByVersion( 665 | "cuTensorMapEncodeTiled", &cuTensorMapEncodeTiled_ptr, 12000, cudaEnableDefault, &driver_status); 666 | #else 667 | cudaGetDriverEntryPoint( 668 | "cuTensorMapEncodeTiled", &cuTensorMapEncodeTiled_ptr, cudaEnableDefault, &driver_status); 669 | #endif 670 | 671 | if (driver_status != cudaDriverEntryPointSuccess) 672 | throw std::runtime_error("driver_status != cudaDriverEntryPointSuccess"); 673 | return reinterpret_cast(cuTensorMapEncodeTiled_ptr); 674 | } 675 | 676 | template 677 | static CUtensorMap make_2d_tma_copy_desc( 678 | T *global_address, uint64_t gmem_dim[2], uint64_t stride_in_bytes, uint32_t smem_dim[2], 679 | CUtensorMapSwizzle swizzle_type, bool enable_l2_promotion = true) { 680 | CUtensorMap tensor_map{}; 681 | constexpr uint32_t rank = 2; 682 | uint64_t global_stride[rank - 1] = {stride_in_bytes}; 683 | uint32_t elem_strides[rank] = {1, 1}; 684 | 685 | PFN_cuTensorMapEncodeTiled encode_func = get_cuTensorMapEncodeTiled(); 686 | 687 | auto result = encode_func( 688 | &tensor_map, CU_TENSOR_MAP_DATA_TYPE_BFLOAT16, rank, global_address, gmem_dim, global_stride, smem_dim, 689 | elem_strides, CUtensorMapInterleave::CU_TENSOR_MAP_INTERLEAVE_NONE, swizzle_type, 690 | enable_l2_promotion ? CUtensorMapL2promotion::CU_TENSOR_MAP_L2_PROMOTION_L2_256B : 691 | CUtensorMapL2promotion::CU_TENSOR_MAP_L2_PROMOTION_NONE, 692 | CUtensorMapFloatOOBfill::CU_TENSOR_MAP_FLOAT_OOB_FILL_NONE); 693 | assert(result == CUDA_SUCCESS); 694 | return tensor_map; 695 | } 696 | }; 697 | --------------------------------------------------------------------------------