├── .gitattributes ├── .gitignore ├── HELLO ├── ABSTRACT.TXT ├── HELLO ├── HELLO.C ├── HELLO.LST ├── HELLO.M51 ├── HELLO.OBJ ├── HELLO.SRC ├── HELLO.bak.C ├── HELLO.bin ├── HELLO.hex ├── HELLO.lnp ├── HELLO.ls1 ├── HELLO.plg ├── Hello.uvgui ├── Hello.uvgui.Administrator ├── Hello.uvgui.Lixinbing ├── Hello.uvgui_Administrator.bak ├── Hello.uvgui_Lixinbing.bak ├── Hello.uvopt ├── Hello.uvproj ├── Hello_uvopt.bak ├── Hello_uvproj.bak ├── arithmetic.LST ├── arithmetic.OBJ ├── arithmetic.SRC ├── arithmetic.__i ├── arithmetic.c ├── arithmetic.ls1 ├── boolean.LST ├── boolean.OBJ ├── boolean.SRC ├── boolean.__i ├── boolean.c ├── boolean.ls1 ├── hex2bin.exe ├── instruction.LST ├── instruction.OBJ ├── instruction.SRC ├── instruction.c ├── instruction.h ├── instruction.ls1 ├── logical.LST ├── logical.OBJ ├── logical.SRC ├── logical.__i ├── logical.c ├── logical.ls1 ├── program.LST ├── program.OBJ ├── program.SRC ├── program.__i ├── program.c ├── program.ls1 ├── transfer.LST ├── transfer.OBJ ├── transfer.SRC ├── transfer.__i ├── transfer.c └── transfer.ls1 ├── LICENSE ├── README.md ├── doc ├── 8051.docx └── book.jpg ├── illustration ├── instruction.v ├── r8051_0.v ├── r8051_1.v ├── r8051_2.v ├── r8051_3.v ├── r8051_4.v ├── r8051_a.v ├── r8051_b.v ├── r8051_bulk.v ├── r8051_c.v ├── r8051_d.v └── r8051_e.v ├── rtl ├── instruction.v ├── interrupt │ ├── interrupt.pdf │ └── r8051.v └── r8051.v └── sim └── tb.v /.gitattributes: -------------------------------------------------------------------------------- 1 | # Auto detect text files and perform LF normalization 2 | * text=auto 3 | 4 | # Custom for Visual Studio 5 | *.cs diff=csharp 6 | *.sln merge=union 7 | *.csproj merge=union 8 | *.vbproj merge=union 9 | *.fsproj merge=union 10 | *.dbproj merge=union 11 | 12 | # Standard to msysgit 13 | *.doc diff=astextplain 14 | *.DOC diff=astextplain 15 | *.docx diff=astextplain 16 | *.DOCX diff=astextplain 17 | *.dot diff=astextplain 18 | *.DOT diff=astextplain 19 | *.pdf diff=astextplain 20 | *.PDF diff=astextplain 21 | *.rtf diff=astextplain 22 | *.RTF diff=astextplain 23 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Windows image file caches 2 | Thumbs.db 3 | ehthumbs.db 4 | 5 | # Folder config file 6 | Desktop.ini 7 | 8 | # Recycle Bin used on file shares 9 | $RECYCLE.BIN/ 10 | 11 | # Windows Installer files 12 | *.cab 13 | *.msi 14 | *.msm 15 | *.msp 16 | 17 | # ========================= 18 | # Operating System Files 19 | # ========================= 20 | 21 | # OSX 22 | # ========================= 23 | 24 | .DS_Store 25 | .AppleDouble 26 | .LSOverride 27 | 28 | # Icon must ends with two \r. 29 | Icon 30 | 31 | # Thumbnails 32 | ._* 33 | 34 | # Files that might appear on external disk 35 | .Spotlight-V100 36 | .Trashes 37 | -------------------------------------------------------------------------------- /HELLO/ABSTRACT.TXT: -------------------------------------------------------------------------------- 1 | The HELLO program is a very simple program that prints "Hello World" 2 | to the serial port of the 8051. When you can successfully build and 3 | run this program, you have used the entire toolset including: 4 | 5 | The uVision integrated development environment. 6 | The C51 compiler, linker and the uVision simulator/debugger. 7 | 8 | The ASM program is available in one target: 9 | Simulator: uses the uVision simulator for testing -------------------------------------------------------------------------------- /HELLO/HELLO: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/HELLO -------------------------------------------------------------------------------- /HELLO/HELLO.C: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | HELLO.C 3 | 4 | Copyright 1995-2005 Keil Software, Inc. 5 | ------------------------------------------------------------------------------*/ 6 | 7 | #include /* special function register declarations */ 8 | /* for the intended 8051 derivative */ 9 | 10 | #include /* prototype declarations for I/O functions */ 11 | 12 | #include "instruction.h" 13 | 14 | 15 | /*------------------------------------------------ 16 | The main C function. Program execution starts 17 | here after stack initialization. 18 | ------------------------------------------------*/ 19 | void main (void) { 20 | test_status = 1; 21 | 22 | instruction_test_all(); 23 | 24 | 25 | if (test_status) { 26 | printf("Test success!\n"); 27 | }else{ 28 | printf("Test failed!\n"); 29 | } 30 | printf("Test finished!\n"); 31 | kill_self = 1; 32 | while (1); 33 | } 34 | 35 | 36 | -------------------------------------------------------------------------------- /HELLO/HELLO.LST: -------------------------------------------------------------------------------- 1 | C51 COMPILER V9.52.0.0 HELLO 07/21/2014 16:39:33 PAGE 1 2 | 3 | 4 | C51 COMPILER V9.52.0.0, COMPILATION OF MODULE HELLO 5 | OBJECT MODULE PLACED IN HELLO.OBJ 6 | COMPILER INVOKED BY: C:\myprog\Keil\C51\BIN\C51.EXE HELLO.C BROWSE DEBUG OBJECTEXTEND TABS(2) 7 | 8 | line level source 9 | 10 | 1 /*------------------------------------------------------------------------------ 11 | 2 HELLO.C 12 | 3 13 | 4 Copyright 1995-2005 Keil Software, Inc. 14 | 5 ------------------------------------------------------------------------------*/ 15 | 6 16 | 7 #include /* special function register declarations */ 17 | 8 /* for the intended 8051 derivative */ 18 | 9 19 | 10 #include /* prototype declarations for I/O functions */ 20 | 11 21 | 12 #include "instruction.h" 22 | 13 23 | 14 24 | 15 /*------------------------------------------------ 25 | 16 The main C function. Program execution starts 26 | 17 here after stack initialization. 27 | 18 ------------------------------------------------*/ 28 | 19 void main (void) { 29 | 20 1 test_status = 1; 30 | 21 1 31 | 22 1 instruction_test_all(); 32 | 23 1 33 | 24 1 34 | 25 1 if (test_status) { 35 | 26 2 printf("Test success!\n"); 36 | 27 2 }else{ 37 | 28 2 printf("Test failed!\n"); 38 | 29 2 } 39 | 30 1 printf("Test finished!\n"); 40 | 31 1 kill_self = 1; 41 | 32 1 while (1); 42 | 33 1 } 43 | 34 44 | 35 45 | 46 | 47 | MODULE INFORMATION: STATIC OVERLAYABLE 48 | CODE SIZE = 47 ---- 49 | CONSTANT SIZE = 45 ---- 50 | XDATA SIZE = ---- ---- 51 | PDATA SIZE = ---- ---- 52 | DATA SIZE = ---- ---- 53 | IDATA SIZE = ---- ---- 54 | BIT SIZE = ---- ---- 55 | END OF MODULE INFORMATION. 56 | 57 | 58 | C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S) 59 | -------------------------------------------------------------------------------- /HELLO/HELLO.OBJ: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/HELLO.OBJ -------------------------------------------------------------------------------- /HELLO/HELLO.SRC: -------------------------------------------------------------------------------- 1 | ; .\HELLO.SRC generated from: HELLO.C 2 | ; COMPILER INVOKED BY: 3 | ; C:\myprog\Keil\C51\BIN\C51.EXE HELLO.C BROWSE DEBUG OBJECTEXTEND TABS(2) SRC(.\HELLO.SRC) 4 | 5 | $NOMOD51 6 | 7 | NAME HELLO 8 | 9 | P0 DATA 080H 10 | P1 DATA 090H 11 | P2 DATA 0A0H 12 | P3 DATA 0B0H 13 | T0 BIT 0B0H.4 14 | AC BIT 0D0H.6 15 | T1 BIT 0B0H.5 16 | T2 BIT 090H.0 17 | EA BIT 0A8H.7 18 | IE DATA 0A8H 19 | EXF2 BIT 0C8H.6 20 | RD BIT 0B0H.7 21 | ES BIT 0A8H.4 22 | IP DATA 0B8H 23 | RI BIT 098H.0 24 | INT0 BIT 0B0H.2 25 | CY BIT 0D0H.7 26 | TI BIT 098H.1 27 | INT1 BIT 0B0H.3 28 | RCAP2H DATA 0CBH 29 | PS BIT 0B8H.4 30 | SP DATA 081H 31 | T2EX BIT 090H.1 32 | OV BIT 0D0H.2 33 | RCAP2L DATA 0CAH 34 | C_T2 BIT 0C8H.1 35 | WR BIT 0B0H.6 36 | RCLK BIT 0C8H.5 37 | TCLK BIT 0C8H.4 38 | SBUF DATA 099H 39 | PCON DATA 087H 40 | SCON DATA 098H 41 | TMOD DATA 089H 42 | TCON DATA 088H 43 | IE0 BIT 088H.1 44 | IE1 BIT 088H.3 45 | B DATA 0F0H 46 | CP_RL2 BIT 0C8H.0 47 | ACC DATA 0E0H 48 | ET0 BIT 0A8H.1 49 | ET1 BIT 0A8H.3 50 | TF0 BIT 088H.5 51 | ET2 BIT 0A8H.5 52 | TF1 BIT 088H.7 53 | TF2 BIT 0C8H.7 54 | RB8 BIT 098H.2 55 | TH0 DATA 08CH 56 | EX0 BIT 0A8H.0 57 | IT0 BIT 088H.0 58 | TH1 DATA 08DH 59 | TB8 BIT 098H.3 60 | EX1 BIT 0A8H.2 61 | IT1 BIT 088H.2 62 | TH2 DATA 0CDH 63 | P BIT 0D0H.0 64 | SM0 BIT 098H.7 65 | TL0 DATA 08AH 66 | SM1 BIT 098H.6 67 | TL1 DATA 08BH 68 | SM2 BIT 098H.5 69 | TL2 DATA 0CCH 70 | PT0 BIT 0B8H.1 71 | PT1 BIT 0B8H.3 72 | RS0 BIT 0D0H.3 73 | PT2 BIT 0B8H.5 74 | TR0 BIT 088H.4 75 | RS1 BIT 0D0H.4 76 | TR1 BIT 088H.6 77 | TR2 BIT 0C8H.2 78 | PX0 BIT 0B8H.0 79 | PX1 BIT 0B8H.2 80 | DPH DATA 083H 81 | DPL DATA 082H 82 | EXEN2 BIT 0C8H.3 83 | REN BIT 098H.4 84 | T2CON DATA 0C8H 85 | RXD BIT 0B0H.0 86 | TXD BIT 0B0H.1 87 | F0 BIT 0D0H.5 88 | PSW DATA 0D0H 89 | ?PR?main?HELLO SEGMENT CODE 90 | ?CO?HELLO SEGMENT CODE 91 | EXTRN CODE (_printf) 92 | EXTRN DATA (?_printf?BYTE) 93 | EXTRN CODE (?C_STARTUP) 94 | PUBLIC main 95 | 96 | RSEG ?CO?HELLO 97 | ?SC_0: 98 | DB 'H' ,'e' ,'l' ,'l' ,'o' ,' ' ,'W' ,'o' ,'r' ,'l' 99 | DB 'd' ,00AH,000H 100 | 101 | ; /*------------------------------------------------------------------------------ 102 | ; HELLO.C 103 | ; 104 | ; Copyright 1995-2005 Keil Software, Inc. 105 | ; ------------------------------------------------------------------------------*/ 106 | ; 107 | ; #include /* special function register declarations */ 108 | ; /* for the intended 8051 derivative */ 109 | ; 110 | ; #include /* prototype declarations for I/O functions */ 111 | ; 112 | ; typedef volatile unsigned char VUCHAR; 113 | ; #define EE(N) *(VUCHAR xdata *) (0x2000+N) 114 | ; #define R(N) *(VUCHAR data *) (0x0+N) 115 | ; 116 | ; /*------------------------------------------------ 117 | ; The main C function. Program execution starts 118 | ; here after stack initialization. 119 | ; ------------------------------------------------*/ 120 | ; void main (void) { 121 | 122 | RSEG ?PR?main?HELLO 123 | main: 124 | USING 0 125 | ; SOURCE LINE # 20 126 | ; #pragma ASM 127 | ; //MOV sp,0x20 128 | 129 | ; //push acc 130 | 131 | ?C0001: 132 | ; #pragma ENDASM 133 | ; 134 | ; 135 | ; /*------------------------------------------------ 136 | ; Setup the serial port for 1200 baud at 16MHz. 137 | ; ------------------------------------------------*/ 138 | ; 139 | ; 140 | ; /*------------------------------------------------ 141 | ; Note that an embedded program never exits (because 142 | ; there is no operating system to return to). It 143 | ; must loop and execute forever. 144 | ; ------------------------------------------------*/ 145 | ; while (1) { 146 | ; SOURCE LINE # 37 147 | ; printf ("Hello World\n"); /* Print "Hello World" */ 148 | ; SOURCE LINE # 38 149 | MOV R3,#0FFH 150 | MOV R2,#HIGH (?SC_0) 151 | MOV R1,#LOW (?SC_0) 152 | LCALL _printf 153 | ; } 154 | ; SOURCE LINE # 39 155 | SJMP ?C0001 156 | ; END OF main 157 | 158 | END 159 | -------------------------------------------------------------------------------- /HELLO/HELLO.bak.C: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | HELLO.C 3 | 4 | Copyright 1995-2005 Keil Software, Inc. 5 | ------------------------------------------------------------------------------*/ 6 | 7 | //#include /* special function register declarations */ 8 | /* for the intended 8051 derivative */ 9 | 10 | #include /* prototype declarations for I/O functions */ 11 | 12 | 13 | sbit UART_OK = 0x88^0; 14 | bit TEST = 0x20^1; 15 | sfr UART_DATA = 0x81; 16 | 17 | timerint () interrupt 31 { 18 | TEST = 0; 19 | } 20 | 21 | char putchar (char x) { 22 | while(UART_OK==0); 23 | UART_DATA = x; 24 | } 25 | 26 | /*------------------------------------------------ 27 | The main C function. Program execution starts 28 | here after stack initialization. 29 | ------------------------------------------------*/ 30 | void main (void) { 31 | 32 | /*------------------------------------------------ 33 | Setup the serial port for 1200 baud at 16MHz. 34 | ------------------------------------------------*/ 35 | 36 | 37 | /*------------------------------------------------ 38 | Note that an embedded program never exits (because 39 | there is no operating system to return to). It 40 | must loop and execute forever. 41 | ------------------------------------------------*/ 42 | while (1) { 43 | //P1 ^= 0x01; /* Toggle P1.0 each time we print */ 44 | printf ("Hello World\n"); /* Print "Hello World" */ 45 | } 46 | } 47 | 48 | 49 | -------------------------------------------------------------------------------- /HELLO/HELLO.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/HELLO.bin -------------------------------------------------------------------------------- /HELLO/HELLO.lnp: -------------------------------------------------------------------------------- 1 | "HELLO.obj", 2 | "program.obj", 3 | "boolean.obj", 4 | "transfer.obj", 5 | "logical.obj", 6 | "arithmetic.obj", 7 | "instruction.obj" 8 | TO "HELLO" 9 | RAMSIZE(256) 10 | -------------------------------------------------------------------------------- /HELLO/HELLO.ls1: -------------------------------------------------------------------------------- 1 | A51 MACRO ASSEMBLER HELLO 10/01/2013 15:40:25 PAGE 1 2 | 3 | 4 | MACRO ASSEMBLER A51 V8.02b 5 | OBJECT MODULE PLACED IN HELLO.OBJ 6 | ASSEMBLER INVOKED BY: C:\myprog\Keil\C51\BIN\A51.EXE HELLO.src PR(.\HELLO.ls1) EP DEBUG 7 | 8 | LOC OBJ LINE SOURCE 9 | 10 | 1 ; .\HELLO.SRC generated from: HELLO.C 11 | 2 ; COMPILER INVOKED BY: 12 | 3 ; C:\myprog\Keil\C51\BIN\C51.EXE HELLO.C BROWSE DEBUG OBJECTEXTEND TABS(2) SRC(.\HEL 13 | LO.SRC) 14 | 4 15 | 5 $nomod51 16 | 6 17 | 7 NAME HELLO 18 | 8 19 | 0080 9 P0 DATA 080H 20 | 0090 10 P1 DATA 090H 21 | 00A0 11 P2 DATA 0A0H 22 | 00B0 12 P3 DATA 0B0H 23 | 00B4 13 T0 BIT 0B0H.4 24 | 00D6 14 AC BIT 0D0H.6 25 | 00B5 15 T1 BIT 0B0H.5 26 | 0090 16 T2 BIT 090H.0 27 | 00AF 17 EA BIT 0A8H.7 28 | 00A8 18 IE DATA 0A8H 29 | 00CE 19 EXF2 BIT 0C8H.6 30 | 00B7 20 RD BIT 0B0H.7 31 | 00AC 21 ES BIT 0A8H.4 32 | 00B8 22 IP DATA 0B8H 33 | 0098 23 RI BIT 098H.0 34 | 00B2 24 INT0 BIT 0B0H.2 35 | 00D7 25 CY BIT 0D0H.7 36 | 0099 26 TI BIT 098H.1 37 | 00B3 27 INT1 BIT 0B0H.3 38 | 00CB 28 RCAP2H DATA 0CBH 39 | 00BC 29 PS BIT 0B8H.4 40 | 0081 30 SP DATA 081H 41 | 0091 31 T2EX BIT 090H.1 42 | 00D2 32 OV BIT 0D0H.2 43 | 00CA 33 RCAP2L DATA 0CAH 44 | 00C9 34 C_T2 BIT 0C8H.1 45 | 00B6 35 WR BIT 0B0H.6 46 | 00CD 36 RCLK BIT 0C8H.5 47 | 00CC 37 TCLK BIT 0C8H.4 48 | 0099 38 SBUF DATA 099H 49 | 0087 39 PCON DATA 087H 50 | 0098 40 SCON DATA 098H 51 | 0089 41 TMOD DATA 089H 52 | 0088 42 TCON DATA 088H 53 | 0089 43 IE0 BIT 088H.1 54 | 008B 44 IE1 BIT 088H.3 55 | 00F0 45 B DATA 0F0H 56 | 00C8 46 CP_RL2 BIT 0C8H.0 57 | 00E0 47 ACC DATA 0E0H 58 | 00A9 48 ET0 BIT 0A8H.1 59 | 00AB 49 ET1 BIT 0A8H.3 60 | 008D 50 TF0 BIT 088H.5 61 | 00AD 51 ET2 BIT 0A8H.5 62 | 008F 52 TF1 BIT 088H.7 63 | 00CF 53 TF2 BIT 0C8H.7 64 | 009A 54 RB8 BIT 098H.2 65 | 008C 55 TH0 DATA 08CH 66 | 00A8 56 EX0 BIT 0A8H.0 67 | 0088 57 IT0 BIT 088H.0 68 | A51 MACRO ASSEMBLER HELLO 10/01/2013 15:40:25 PAGE 2 69 | 70 | 008D 58 TH1 DATA 08DH 71 | 009B 59 TB8 BIT 098H.3 72 | 00AA 60 EX1 BIT 0A8H.2 73 | 008A 61 IT1 BIT 088H.2 74 | 00CD 62 TH2 DATA 0CDH 75 | 00D0 63 P BIT 0D0H.0 76 | 009F 64 SM0 BIT 098H.7 77 | 008A 65 TL0 DATA 08AH 78 | 009E 66 SM1 BIT 098H.6 79 | 008B 67 TL1 DATA 08BH 80 | 009D 68 SM2 BIT 098H.5 81 | 00CC 69 TL2 DATA 0CCH 82 | 00B9 70 PT0 BIT 0B8H.1 83 | 00BB 71 PT1 BIT 0B8H.3 84 | 00D3 72 RS0 BIT 0D0H.3 85 | 00BD 73 PT2 BIT 0B8H.5 86 | 008C 74 TR0 BIT 088H.4 87 | 00D4 75 RS1 BIT 0D0H.4 88 | 008E 76 TR1 BIT 088H.6 89 | 00CA 77 TR2 BIT 0C8H.2 90 | 00B8 78 PX0 BIT 0B8H.0 91 | 00BA 79 PX1 BIT 0B8H.2 92 | 0083 80 DPH DATA 083H 93 | 0082 81 DPL DATA 082H 94 | 00CB 82 EXEN2 BIT 0C8H.3 95 | 009C 83 REN BIT 098H.4 96 | 00C8 84 T2CON DATA 0C8H 97 | 00B0 85 RXD BIT 0B0H.0 98 | 00B1 86 TXD BIT 0B0H.1 99 | 00D5 87 F0 BIT 0D0H.5 100 | 00D0 88 PSW DATA 0D0H 101 | 89 ?PR?main?HELLO SEGMENT CODE 102 | 90 ?CO?HELLO SEGMENT CODE 103 | 91 EXTRN CODE (_printf) 104 | 92 EXTRN DATA (?_printf?BYTE) 105 | 93 EXTRN CODE (?C_STARTUP) 106 | 94 PUBLIC main 107 | 95 108 | ---- 96 RSEG ?CO?HELLO 109 | 0000 97 ?SC_0: 110 | 0000 48656C6C 98 DB 'H' ,'e' ,'l' ,'l' ,'o' ,' ' ,'W' ,'o' ,'r' ,'l' 111 | 0004 6F20576F 112 | 0008 726C 113 | 000A 640A00 99 DB 'd' ,00AH,000H 114 | 100 115 | 101 ; /*------------------------------------------------------------------------------ 116 | 102 ; HELLO.C 117 | 103 ; 118 | 104 ; Copyright 1995-2005 Keil Software, Inc. 119 | 105 ; ------------------------------------------------------------------------------*/ 120 | 106 ; 121 | 107 ; #include /* special function register declarations */ 122 | 108 ; /* for the intended 8051 derivative */ 123 | 109 ; 124 | 110 ; #include /* prototype declarations for I/O functions */ 125 | 111 ; 126 | 112 ; typedef volatile unsigned char VUCHAR; 127 | 113 ; #define EE(N) *(VUCHAR xdata *) (0x2000+N) 128 | 114 ; #define R(N) *(VUCHAR data *) (0x0+N) 129 | 115 ; 130 | 116 ; /*------------------------------------------------ 131 | 117 ; The main C function. Program execution starts 132 | 118 ; here after stack initialization. 133 | 119 ; ------------------------------------------------*/ 134 | 120 ; void main (void) { 135 | 121 136 | A51 MACRO ASSEMBLER HELLO 10/01/2013 15:40:25 PAGE 3 137 | 138 | ---- 122 RSEG ?PR?main?HELLO 139 | 0000 123 main: 140 | 124 USING 0 141 | 125 ; SOURCE LINE # 20 142 | 126 ; #pragma ASM 143 | 127 ; //MOV sp,0x20 144 | 128 145 | 129 ; //push acc 146 | 130 147 | 0000 131 ?C0001: 148 | 132 ; #pragma ENDASM 149 | 133 ; 150 | 134 ; 151 | 135 ; /*------------------------------------------------ 152 | 136 ; Setup the serial port for 1200 baud at 16MHz. 153 | 137 ; ------------------------------------------------*/ 154 | 138 ; 155 | 139 ; 156 | 140 ; /*------------------------------------------------ 157 | 141 ; Note that an embedded program never exits (because 158 | 142 ; there is no operating system to return to). It 159 | 143 ; must loop and execute forever. 160 | 144 ; ------------------------------------------------*/ 161 | 145 ; while (1) { 162 | 146 ; SOURCE LINE # 37 163 | 147 ; printf ("Hello World\n"); /* Print "Hello World" */ 164 | 148 ; SOURCE LINE # 38 165 | 0000 7BFF 149 MOV R3,#0FFH 166 | 0002 7A00 F 150 MOV R2,#HIGH (?SC_0) 167 | 0004 7900 F 151 MOV R1,#LOW (?SC_0) 168 | 0006 120000 F 152 LCALL _printf 169 | 153 ; } 170 | 154 ; SOURCE LINE # 39 171 | 0009 80F5 155 SJMP ?C0001 172 | 156 ; END OF main 173 | 157 174 | 158 END 175 | A51 MACRO ASSEMBLER HELLO 10/01/2013 15:40:25 PAGE 4 176 | 177 | SYMBOL TABLE LISTING 178 | ------ ----- ------- 179 | 180 | 181 | N A M E T Y P E V A L U E ATTRIBUTES 182 | 183 | ?C0001 . . . . . . C ADDR 0000H R SEG=?PR?MAIN?HELLO 184 | ?CO?HELLO. . . . . C SEG 000DH REL=UNIT 185 | ?C_STARTUP . . . . C ADDR ----- EXT 186 | ?PR?MAIN?HELLO . . C SEG 000BH REL=UNIT 187 | ?SC_0. . . . . . . C ADDR 0000H R SEG=?CO?HELLO 188 | ?_PRINTF?BYTE. . . D ADDR ----- EXT 189 | AC . . . . . . . . B ADDR 00D0H.6 A 190 | ACC. . . . . . . . D ADDR 00E0H A 191 | B. . . . . . . . . D ADDR 00F0H A 192 | CP_RL2 . . . . . . B ADDR 00C8H.0 A 193 | CY . . . . . . . . B ADDR 00D0H.7 A 194 | C_T2 . . . . . . . B ADDR 00C8H.1 A 195 | DPH. . . . . . . . D ADDR 0083H A 196 | DPL. . . . . . . . D ADDR 0082H A 197 | EA . . . . . . . . B ADDR 00A8H.7 A 198 | ES . . . . . . . . B ADDR 00A8H.4 A 199 | ET0. . . . . . . . B ADDR 00A8H.1 A 200 | ET1. . . . . . . . B ADDR 00A8H.3 A 201 | ET2. . . . . . . . B ADDR 00A8H.5 A 202 | EX0. . . . . . . . B ADDR 00A8H.0 A 203 | EX1. . . . . . . . B ADDR 00A8H.2 A 204 | EXEN2. . . . . . . B ADDR 00C8H.3 A 205 | EXF2 . . . . . . . B ADDR 00C8H.6 A 206 | F0 . . . . . . . . B ADDR 00D0H.5 A 207 | HELLO. . . . . . . N NUMB ----- 208 | IE . . . . . . . . D ADDR 00A8H A 209 | IE0. . . . . . . . B ADDR 0088H.1 A 210 | IE1. . . . . . . . B ADDR 0088H.3 A 211 | INT0 . . . . . . . B ADDR 00B0H.2 A 212 | INT1 . . . . . . . B ADDR 00B0H.3 A 213 | IP . . . . . . . . D ADDR 00B8H A 214 | IT0. . . . . . . . B ADDR 0088H.0 A 215 | IT1. . . . . . . . B ADDR 0088H.2 A 216 | MAIN . . . . . . . C ADDR 0000H R SEG=?PR?MAIN?HELLO 217 | OV . . . . . . . . B ADDR 00D0H.2 A 218 | P. . . . . . . . . B ADDR 00D0H.0 A 219 | P0 . . . . . . . . D ADDR 0080H A 220 | P1 . . . . . . . . D ADDR 0090H A 221 | P2 . . . . . . . . D ADDR 00A0H A 222 | P3 . . . . . . . . D ADDR 00B0H A 223 | PCON . . . . . . . D ADDR 0087H A 224 | PS . . . . . . . . B ADDR 00B8H.4 A 225 | PSW. . . . . . . . D ADDR 00D0H A 226 | PT0. . . . . . . . B ADDR 00B8H.1 A 227 | PT1. . . . . . . . B ADDR 00B8H.3 A 228 | PT2. . . . . . . . B ADDR 00B8H.5 A 229 | PX0. . . . . . . . B ADDR 00B8H.0 A 230 | PX1. . . . . . . . B ADDR 00B8H.2 A 231 | RB8. . . . . . . . B ADDR 0098H.2 A 232 | RCAP2H . . . . . . D ADDR 00CBH A 233 | RCAP2L . . . . . . D ADDR 00CAH A 234 | RCLK . . . . . . . B ADDR 00C8H.5 A 235 | RD . . . . . . . . B ADDR 00B0H.7 A 236 | REN. . . . . . . . B ADDR 0098H.4 A 237 | RI . . . . . . . . B ADDR 0098H.0 A 238 | RS0. . . . . . . . B ADDR 00D0H.3 A 239 | RS1. . . . . . . . B ADDR 00D0H.4 A 240 | RXD. . . . . . . . B ADDR 00B0H.0 A 241 | SBUF . . . . . . . D ADDR 0099H A 242 | SCON . . . . . . . D ADDR 0098H A 243 | A51 MACRO ASSEMBLER HELLO 10/01/2013 15:40:25 PAGE 5 244 | 245 | SM0. . . . . . . . B ADDR 0098H.7 A 246 | SM1. . . . . . . . B ADDR 0098H.6 A 247 | SM2. . . . . . . . B ADDR 0098H.5 A 248 | SP . . . . . . . . D ADDR 0081H A 249 | T0 . . . . . . . . B ADDR 00B0H.4 A 250 | T1 . . . . . . . . B ADDR 00B0H.5 A 251 | T2 . . . . . . . . B ADDR 0090H.0 A 252 | T2CON. . . . . . . D ADDR 00C8H A 253 | T2EX . . . . . . . B ADDR 0090H.1 A 254 | TB8. . . . . . . . B ADDR 0098H.3 A 255 | TCLK . . . . . . . B ADDR 00C8H.4 A 256 | TCON . . . . . . . D ADDR 0088H A 257 | TF0. . . . . . . . B ADDR 0088H.5 A 258 | TF1. . . . . . . . B ADDR 0088H.7 A 259 | TF2. . . . . . . . B ADDR 00C8H.7 A 260 | TH0. . . . . . . . D ADDR 008CH A 261 | TH1. . . . . . . . D ADDR 008DH A 262 | TH2. . . . . . . . D ADDR 00CDH A 263 | TI . . . . . . . . B ADDR 0098H.1 A 264 | TL0. . . . . . . . D ADDR 008AH A 265 | TL1. . . . . . . . D ADDR 008BH A 266 | TL2. . . . . . . . D ADDR 00CCH A 267 | TMOD . . . . . . . D ADDR 0089H A 268 | TR0. . . . . . . . B ADDR 0088H.4 A 269 | TR1. . . . . . . . B ADDR 0088H.6 A 270 | TR2. . . . . . . . B ADDR 00C8H.2 A 271 | TXD. . . . . . . . B ADDR 00B0H.1 A 272 | WR . . . . . . . . B ADDR 00B0H.6 A 273 | _PRINTF. . . . . . C ADDR ----- EXT 274 | 275 | 276 | REGISTER BANK(S) USED: 0 277 | 278 | 279 | ASSEMBLY COMPLETE. 0 WARNING(S), 0 ERROR(S) 280 | -------------------------------------------------------------------------------- /HELLO/HELLO.plg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/HELLO.plg -------------------------------------------------------------------------------- /HELLO/Hello.uvopt: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 1.0 5 | 6 |
### uVision Project, (C) Keil Software
7 | 8 | 9 | *.c 10 | *.a*; *.src 11 | *.obj 12 | *.lib 13 | *.txt 14 | *.plm 15 | *.cpp 16 | 17 | 18 | 19 | 0 20 | 0 21 | 22 | 23 | 24 | Simulator 25 | 0x0 26 | MCS-51 27 | 28 | 33000000 29 | 30 | 1 31 | 1 32 | 1 33 | 0 34 | 35 | 36 | 0 37 | 65535 38 | 0 39 | 0 40 | 0 41 | 42 | 43 | 120 44 | 65 45 | 8 46 | .\ 47 | 48 | 49 | 1 50 | 1 51 | 1 52 | 0 53 | 1 54 | 1 55 | 0 56 | 1 57 | 0 58 | 0 59 | 0 60 | 0 61 | 62 | 63 | 1 64 | 1 65 | 1 66 | 1 67 | 1 68 | 1 69 | 1 70 | 0 71 | 0 72 | 73 | 74 | 1 75 | 0 76 | 1 77 | 78 | 255 79 | 80 | 81 | 0 82 | 80C51 Family Programmer's Guide 83 | DATASHTS\PHILIPS\P51_PG.PDF 84 | 85 | 86 | 1 87 | Data Sheet 88 | DATASHTS\PHILIPS\8XC5X_FX_RX_DS.PDF 89 | 90 | 91 | 92 | S8051.DLL 93 | 94 | DP51.DLL 95 | -p52 96 | S8051.DLL 97 | 98 | TP51.DLL 99 | -p52 100 | 101 | 102 | 1 103 | 0 104 | 1 105 | 1 106 | 1 107 | 1 108 | 1 109 | 1 110 | 1 111 | 0 112 | 0 113 | 0 114 | 0 115 | 0 116 | 0 117 | 0 118 | 0 119 | 0 120 | 1 121 | 0 122 | 123 | 124 | 125 | 126 | 127 | 128 | 129 | 130 | 131 | 132 | BIN\MON51.DLL 133 | 134 | 135 | 136 | 0 137 | DLGDP51 138 | (98=-1,-1,-1,-1,0)(82=-1,-1,-1,-1,0)(83=-1,-1,-1,-1,0)(84=-1,-1,-1,-1,0)(85=-1,-1,-1,-1,0)(99=-1,-1,-1,-1,0)(91=-1,-1,-1,-1,0)(92=-1,-1,-1,-1,0)(93=-1,-1,-1,-1,0) 139 | 140 | 141 | 142 | 143 | 144 | 1 145 | 0 146 | V:0 147 | 148 | 149 | 150 | 151 | 2 152 | 0 153 | large_array 154 | 155 | 156 | 157 | 158 | 3 159 | 0 160 | LanguageC_Menu 161 | 162 | 163 | 164 | 165 | 4 166 | 0 167 | &y 168 | 169 | 170 | 171 | 0 172 | 173 | 174 | 0 175 | 1 176 | 1 177 | 0 178 | 0 179 | 0 180 | 0 181 | 1 182 | 0 183 | 0 184 | 0 185 | 0 186 | 0 187 | 0 188 | 0 189 | 0 190 | 0 191 | 0 192 | 0 193 | 0 194 | 0 195 | 0 196 | 0 197 | 0 198 | 199 | 200 | 201 | 202 | 203 | 204 | 205 | Main 206 | 1 207 | 0 208 | 0 209 | 0 210 | 211 | 1 212 | 1 213 | 1 214 | 1 215 | 0 216 | 23 217 | 0 218 | 13 219 | 22 220 | 0 221 | .\HELLO.C 222 | HELLO.C 223 | 0 224 | 0 225 | 226 | 44 227 | 0 228 | 1 229 | 230 | -1 231 | -1 232 | 233 | 234 | -1 235 | -1 236 | 237 | 238 | 3 239 | 3 240 | 730 241 | 386 242 | 243 | 244 | 245 | 246 | 247 | 248 | Instruction 249 | 1 250 | 0 251 | 0 252 | 0 253 | 254 | 2 255 | 2 256 | 1 257 | 0 258 | 0 259 | 0 260 | 0 261 | 0 262 | 0 263 | 0 264 | .\program.c 265 | program.c 266 | 0 267 | 0 268 | 269 | 270 | 2 271 | 3 272 | 1 273 | 0 274 | 0 275 | 0 276 | 0 277 | 0 278 | 0 279 | 0 280 | .\boolean.c 281 | boolean.c 282 | 0 283 | 0 284 | 285 | 286 | 2 287 | 4 288 | 1 289 | 0 290 | 0 291 | 10 292 | 0 293 | 552 294 | 553 295 | 0 296 | .\transfer.c 297 | transfer.c 298 | 0 299 | 0 300 | 301 | 302 | 2 303 | 5 304 | 1 305 | 0 306 | 0 307 | 0 308 | 0 309 | 0 310 | 0 311 | 0 312 | .\logical.c 313 | logical.c 314 | 0 315 | 0 316 | 317 | 318 | 2 319 | 6 320 | 1 321 | 0 322 | 0 323 | 0 324 | 0 325 | 88 326 | 89 327 | 0 328 | .\arithmetic.c 329 | arithmetic.c 330 | 0 331 | 0 332 | 333 | 334 | 2 335 | 7 336 | 1 337 | 1 338 | 0 339 | 10 340 | 0 341 | 349 342 | 5 343 | 0 344 | .\instruction.c 345 | instruction.c 346 | 0 347 | 0 348 | 349 | 350 | 351 | 352 | Documentation 353 | 0 354 | 0 355 | 0 356 | 0 357 | 358 | 3 359 | 8 360 | 5 361 | 0 362 | 0 363 | 0 364 | 0 365 | 0 366 | 0 367 | 0 368 | .\ABSTRACT.TXT 369 | ABSTRACT.TXT 370 | 0 371 | 0 372 | 373 | 374 | 375 | 376 | -------------------------------------------------------------------------------- /HELLO/Hello_uvopt.bak: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 1.0 5 | 6 |
### uVision Project, (C) Keil Software
7 | 8 | 9 | *.c 10 | *.a*; *.src 11 | *.obj 12 | *.lib 13 | *.txt 14 | *.plm 15 | *.cpp 16 | 17 | 18 | 19 | 0 20 | 0 21 | 22 | 23 | 24 | Simulator 25 | 0x0 26 | MCS-51 27 | 28 | 33000000 29 | 30 | 1 31 | 1 32 | 1 33 | 0 34 | 35 | 36 | 0 37 | 65535 38 | 0 39 | 0 40 | 0 41 | 42 | 43 | 120 44 | 65 45 | 8 46 | .\ 47 | 48 | 49 | 1 50 | 1 51 | 1 52 | 0 53 | 1 54 | 1 55 | 0 56 | 1 57 | 0 58 | 0 59 | 0 60 | 0 61 | 62 | 63 | 1 64 | 1 65 | 1 66 | 1 67 | 1 68 | 1 69 | 1 70 | 0 71 | 0 72 | 73 | 74 | 1 75 | 0 76 | 1 77 | 78 | 255 79 | 80 | 81 | 0 82 | 80C51 Family Programmer's Guide 83 | DATASHTS\PHILIPS\P51_PG.PDF 84 | 85 | 86 | 1 87 | Data Sheet 88 | DATASHTS\PHILIPS\8XC5X_FX_RX_DS.PDF 89 | 90 | 91 | 92 | S8051.DLL 93 | 94 | DP51.DLL 95 | -p52 96 | S8051.DLL 97 | 98 | TP51.DLL 99 | -p52 100 | 101 | 102 | 1 103 | 0 104 | 1 105 | 1 106 | 1 107 | 1 108 | 1 109 | 1 110 | 1 111 | 0 112 | 0 113 | 0 114 | 0 115 | 0 116 | 0 117 | 0 118 | 0 119 | 1 120 | 0 121 | 122 | 123 | 124 | 125 | 126 | 127 | 128 | 129 | 130 | 131 | BIN\MON51.DLL 132 | 133 | 134 | 135 | 0 136 | DLGDP51 137 | (98=-1,-1,-1,-1,0)(82=-1,-1,-1,-1,0)(83=-1,-1,-1,-1,0)(84=-1,-1,-1,-1,0)(85=-1,-1,-1,-1,0)(99=-1,-1,-1,-1,0)(91=-1,-1,-1,-1,0)(92=-1,-1,-1,-1,0)(93=-1,-1,-1,-1,0) 138 | 139 | 140 | 141 | 142 | 143 | 1 144 | 0 145 | V:0 146 | 147 | 148 | 149 | 150 | 2 151 | 0 152 | large_array 153 | 154 | 155 | 156 | 157 | 3 158 | 0 159 | LanguageC_Menu 160 | 161 | 162 | 163 | 164 | 4 165 | 0 166 | &y 167 | 168 | 169 | 170 | 0 171 | 1 172 | 1 173 | 0 174 | 0 175 | 0 176 | 0 177 | 1 178 | 0 179 | 0 180 | 0 181 | 0 182 | 0 183 | 0 184 | 0 185 | 0 186 | 0 187 | 0 188 | 0 189 | 0 190 | 0 191 | 0 192 | 0 193 | 0 194 | 195 | 196 | 197 | 198 | 199 | 200 | 201 | Source Group 1 202 | 1 203 | 0 204 | 0 205 | 206 | 1 207 | 1 208 | 1 209 | 1 210 | 0 211 | 0 212 | 0 213 | 1 214 | 20 215 | 0 216 | .\HELLO.C 217 | HELLO.C 218 | 219 | 44 220 | 0 221 | 1 222 | 223 | -1 224 | -1 225 | 226 | 227 | -1 228 | -1 229 | 230 | 231 | 3 232 | 3 233 | 730 234 | 386 235 | 236 | 237 | 238 | 239 | 1 240 | 0 241 | 1 242 | 0 243 | 0 244 | 9 245 | 0 246 | 9 247 | 30 248 | 0 249 | .\instruction.c 250 | instruction.c 251 | 252 | 253 | 254 | 255 | Documentation 256 | 1 257 | 0 258 | 0 259 | 260 | 2 261 | 2 262 | 5 263 | 0 264 | 0 265 | 0 266 | 0 267 | 0 268 | 0 269 | 0 270 | .\ABSTRACT.TXT 271 | ABSTRACT.TXT 272 | 273 | 44 274 | 0 275 | 1 276 | 277 | -1 278 | -1 279 | 280 | 281 | -1 282 | -1 283 | 284 | 285 | 115 286 | 96 287 | 729 288 | 386 289 | 290 | 291 | 292 | 293 | 294 | 295 | -------------------------------------------------------------------------------- /HELLO/Hello_uvproj.bak: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 1.1 5 | 6 |
### uVision Project, (C) Keil Software
7 | 8 | 9 | 10 | Simulator 11 | 0x0 12 | MCS-51 13 | 14 | 15 | 8XC52 16 | NXP (founded by Philips) 17 | IRAM(0-0xFF) IROM(0-0x1FFF) CLOCK(33000000) MODP2 18 | 19 | "LIB\STARTUP.A51" ("Standard 8051 Startup Code") 20 | 21 | 2928 22 | REG52.H 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 0 34 | 35 | 36 | 37 | 38 | 39 | 40 | 0 41 | 0 42 | 0 43 | 0 44 | 1 45 | 46 | .\ 47 | HELLO 48 | 1 49 | 0 50 | 1 51 | 1 52 | 1 53 | .\ 54 | 0 55 | 0 56 | 0 57 | 58 | 0 59 | 0 60 | 61 | 62 | 0 63 | 0 64 | 0 65 | 0 66 | 67 | 68 | 0 69 | 0 70 | 71 | 72 | 0 73 | 0 74 | 75 | 76 | 1 77 | 0 78 | $k/C51/BIN/hex2bin.exe @H.BIN @H.HEX 79 | 80 | 0 81 | 0 82 | 83 | 0 84 | 85 | 86 | 87 | 0 88 | 0 89 | 0 90 | 0 91 | 0 92 | 1 93 | 0 94 | 0 95 | 0 96 | 0 97 | 3 98 | 99 | 100 | 65535 101 | 102 | 103 | S8051.DLL 104 | 105 | DP51.DLL 106 | -p52 107 | S8051.DLL 108 | 109 | TP51.DLL 110 | -p52 111 | 112 | 113 | 114 | 0 115 | 0 116 | 0 117 | 0 118 | 16 119 | 120 | 121 | 1 122 | 1 123 | 1 124 | 1 125 | 1 126 | 1 127 | 1 128 | 1 129 | 1 130 | 131 | 132 | 0 133 | 0 134 | 0 135 | 0 136 | 0 137 | 0 138 | 0 139 | 0 140 | 141 | 0 142 | 0 143 | 144 | 145 | 146 | 147 | 148 | 149 | 150 | 151 | 152 | 153 | 154 | 155 | 156 | BIN\MON51.DLL 157 | 158 | 159 | 160 | 161 | 1 162 | 0 163 | 0 164 | 0 165 | 0 166 | -1 167 | 168 | 169 | 170 | 171 | 172 | 173 | 174 | 0 175 | 0 176 | 2 177 | 0 178 | 0 179 | 0 180 | 0 181 | 0 182 | 0 183 | 1 184 | 0 185 | 1 186 | 0 187 | 0 188 | 1 189 | 0 190 | 0 191 | 0 192 | 0 193 | 0 194 | 0 195 | 0 196 | 0 197 | 0 198 | 0 199 | 0 200 | 0 201 | 0 202 | 0 203 | 0 204 | 0 205 | 0 206 | 0 207 | 0 208 | 0 209 | 0 210 | 0 211 | 0 212 | 0 213 | 0 214 | 0 215 | 216 | 217 | 0 218 | 0x0 219 | 0xffff 220 | 221 | 222 | 0 223 | 0x0 224 | 0x0 225 | 226 | 227 | 0 228 | 0x0 229 | 0x0 230 | 231 | 232 | 0 233 | 0x0 234 | 0x0 235 | 236 | 237 | 0 238 | 0x0 239 | 0x0 240 | 241 | 242 | 0 243 | 0x0 244 | 0x0 245 | 246 | 247 | 0 248 | 0x0 249 | 0x0 250 | 251 | 252 | 0 253 | 0x0 254 | 0x0 255 | 256 | 257 | 1 258 | 0x0 259 | 0x2000 260 | 261 | 262 | 0 263 | 0x0 264 | 0x100 265 | 266 | 267 | 0 268 | 0x0 269 | 0x0 270 | 271 | 272 | 0 273 | 0x0 274 | 0x0 275 | 276 | 277 | 0 278 | 0x0 279 | 0x0 280 | 281 | 282 | 283 | 284 | 0 285 | 0 286 | 1 287 | 0 288 | 1 289 | 3 290 | 8 291 | 2 292 | 1 293 | 1 294 | 0 295 | 0 296 | 297 | 298 | 299 | 300 | 301 | 302 | 303 | 304 | 0 305 | 1 306 | 0 307 | 0 308 | 309 | 310 | 311 | 312 | 313 | 314 | 315 | 316 | 0 317 | 0 318 | 1 319 | 0 320 | 2 321 | 1 322 | 323 | 324 | 325 | 326 | 327 | 328 | 329 | 330 | 331 | 332 | 333 | 334 | 335 | 336 | 337 | 338 | 339 | 340 | 341 | 342 | 343 | 344 | 345 | 346 | 347 | 348 | 349 | 350 | Source Group 1 351 | 352 | 353 | HELLO.C 354 | 1 355 | .\HELLO.C 356 | 357 | 358 | 359 | 360 | Documentation 361 | 362 | 363 | ABSTRACT.TXT 364 | 5 365 | .\ABSTRACT.TXT 366 | 367 | 368 | 369 | 370 | 371 | 372 | 373 | 374 | -------------------------------------------------------------------------------- /HELLO/arithmetic.OBJ: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/arithmetic.OBJ -------------------------------------------------------------------------------- /HELLO/arithmetic.__i: -------------------------------------------------------------------------------- 1 | "arithmetic.c" BROWSE DEBUG OBJECTEXTEND TABS (2) SRC (.\arithmetic.SRC) -------------------------------------------------------------------------------- /HELLO/boolean.OBJ: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/boolean.OBJ -------------------------------------------------------------------------------- /HELLO/boolean.__i: -------------------------------------------------------------------------------- 1 | "boolean.c" BROWSE DEBUG OBJECTEXTEND TABS (2) SRC (.\boolean.SRC) -------------------------------------------------------------------------------- /HELLO/boolean.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "instruction.h" 4 | 5 | void clr_c(void) { 6 | printf("CLR_C\n"); 7 | #pragma ASM 8 | push psw 9 | push acc 10 | mov psw,#0H 11 | setb rs0 12 | setb rs1 13 | #pragma ENDASM 14 | 15 | #pragma ASM 16 | setb C 17 | clr C 18 | #pragma ENDASM 19 | if (CY!=0x0) test_status = 0; 20 | 21 | #pragma ASM 22 | pop acc 23 | pop psw 24 | #pragma ENDASM 25 | error(); 26 | } 27 | 28 | void clr_bit(void) { 29 | printf("CLR_BIT\n"); 30 | #pragma ASM 31 | push psw 32 | push acc 33 | mov psw,#0H 34 | setb rs0 35 | setb rs1 36 | #pragma ENDASM 37 | 38 | #pragma ASM 39 | mov 0x20,#0ffH 40 | clr 0x7 41 | #pragma ENDASM 42 | if (bit_data!=0x7f) test_status = 0; 43 | 44 | #pragma ASM 45 | pop acc 46 | pop psw 47 | #pragma ENDASM 48 | error(); 49 | } 50 | 51 | void setb_c(void) { 52 | printf("SETB_C\n"); 53 | #pragma ASM 54 | push psw 55 | push acc 56 | mov psw,#0H 57 | setb rs0 58 | setb rs1 59 | #pragma ENDASM 60 | 61 | #pragma ASM 62 | setb C 63 | #pragma ENDASM 64 | if (CY!=0x1) test_status = 0; 65 | 66 | #pragma ASM 67 | pop acc 68 | pop psw 69 | #pragma ENDASM 70 | error(); 71 | } 72 | 73 | void setb_bit(void) { 74 | printf("SETB_BIT\n"); 75 | #pragma ASM 76 | push psw 77 | push acc 78 | mov psw,#0H 79 | setb rs0 80 | setb rs1 81 | #pragma ENDASM 82 | 83 | #pragma ASM 84 | mov 0x20,#0H 85 | setb 0x6 86 | #pragma ENDASM 87 | if (bit_data!=0x40) test_status = 0; 88 | 89 | #pragma ASM 90 | pop acc 91 | pop psw 92 | #pragma ENDASM 93 | error(); 94 | } 95 | 96 | void cpl_c(void) { 97 | printf("CPL_C\n"); 98 | #pragma ASM 99 | push psw 100 | push acc 101 | mov psw,#0H 102 | setb rs0 103 | setb rs1 104 | #pragma ENDASM 105 | 106 | #pragma ASM 107 | clr C 108 | cpl C 109 | #pragma ENDASM 110 | if (CY!=0x1) test_status = 0; 111 | 112 | #pragma ASM 113 | pop acc 114 | pop psw 115 | #pragma ENDASM 116 | error(); 117 | } 118 | 119 | void cpl_bit(void) { 120 | printf("CPL_BIT\n"); 121 | #pragma ASM 122 | push psw 123 | push acc 124 | mov psw,#0H 125 | setb rs0 126 | setb rs1 127 | #pragma ENDASM 128 | 129 | #pragma ASM 130 | mov 0x20,#55H 131 | cpl 0x7 132 | #pragma ENDASM 133 | if (bit_data!=0xd5) test_status = 0; 134 | 135 | #pragma ASM 136 | pop acc 137 | pop psw 138 | #pragma ENDASM 139 | error(); 140 | } 141 | 142 | void anl_c_bit(void) { 143 | printf("ANL_C_BIT\n"); 144 | #pragma ASM 145 | push psw 146 | push acc 147 | mov psw,#0H 148 | setb rs0 149 | setb rs1 150 | #pragma ENDASM 151 | 152 | #pragma ASM 153 | mov 0x20,#7fH 154 | setb C 155 | anl C,0x7 156 | #pragma ENDASM 157 | if (CY!=0x0) test_status = 0; 158 | 159 | #pragma ASM 160 | pop acc 161 | pop psw 162 | #pragma ENDASM 163 | error(); 164 | } 165 | 166 | void anl_c_nbit(void) { 167 | printf("ANL_C_NBIT\n"); 168 | #pragma ASM 169 | push psw 170 | push acc 171 | mov psw,#0H 172 | setb rs0 173 | setb rs1 174 | #pragma ENDASM 175 | 176 | #pragma ASM 177 | mov 0x20,#010H 178 | setb C 179 | anl C,/0x4 180 | #pragma ENDASM 181 | if (CY!=0x0) test_status = 0; 182 | 183 | #pragma ASM 184 | pop acc 185 | pop psw 186 | #pragma ENDASM 187 | error(); 188 | } 189 | 190 | void orl_c_bit(void) { 191 | printf("ORL_C_BIT\n"); 192 | #pragma ASM 193 | push psw 194 | push acc 195 | mov psw,#0H 196 | setb rs0 197 | setb rs1 198 | #pragma ENDASM 199 | 200 | #pragma ASM 201 | mov 0x20,#80H 202 | clr C 203 | orl C,0x7 204 | #pragma ENDASM 205 | if (CY!=0x1) test_status = 0; 206 | 207 | #pragma ASM 208 | pop acc 209 | pop psw 210 | #pragma ENDASM 211 | error(); 212 | } 213 | 214 | void orl_c_nbit(void) { 215 | printf("ORL_C_NBIT\n"); 216 | #pragma ASM 217 | push psw 218 | push acc 219 | mov psw,#0H 220 | setb rs0 221 | setb rs1 222 | #pragma ENDASM 223 | 224 | #pragma ASM 225 | mov 0x20,#0efH 226 | clr C 227 | orl C,/0x4 228 | #pragma ENDASM 229 | if (CY!=0x1) test_status = 0; 230 | 231 | #pragma ASM 232 | pop acc 233 | pop psw 234 | #pragma ENDASM 235 | error(); 236 | } 237 | 238 | void mov_c_bit(void) { 239 | printf("MOV_C_BIT\n"); 240 | #pragma ASM 241 | push psw 242 | push acc 243 | mov psw,#0H 244 | setb rs0 245 | setb rs1 246 | #pragma ENDASM 247 | 248 | #pragma ASM 249 | mov 0x20,#080H 250 | clr C 251 | mov C,0x7 252 | #pragma ENDASM 253 | if (CY!=0x1) test_status = 0; 254 | 255 | #pragma ASM 256 | pop acc 257 | pop psw 258 | #pragma ENDASM 259 | error(); 260 | } 261 | 262 | void mov_bit_c(void) { 263 | printf("MOV_BIT_C\n"); 264 | #pragma ASM 265 | push psw 266 | push acc 267 | mov psw,#0H 268 | setb rs0 269 | setb rs1 270 | #pragma ENDASM 271 | 272 | #pragma ASM 273 | mov 0x20,#000H 274 | setb C 275 | mov 0x4,C 276 | #pragma ENDASM 277 | if (bit_data!=0x10) test_status = 0; 278 | 279 | #pragma ASM 280 | pop acc 281 | pop psw 282 | #pragma ENDASM 283 | error(); 284 | } 285 | 286 | void jc_c(void) { 287 | printf("JC_C\n"); 288 | #pragma ASM 289 | push psw 290 | push acc 291 | mov psw,#0H 292 | setb rs0 293 | setb rs1 294 | #pragma ENDASM 295 | 296 | #pragma ASM 297 | clr C 298 | JC ERROR0_JC_C 299 | cpl C 300 | JC RIGHT0_JC_C 301 | nop 302 | nop 303 | nop 304 | ERROR0_JC_C: clr A 305 | SJMP EXIT0_JC_C 306 | nop 307 | nop 308 | RIGHT0_JC_C: mov A,#0ffH 309 | SJMP EXIT0_JC_C 310 | nop 311 | nop 312 | EXIT0_JC_C: nop 313 | #pragma ENDASM 314 | if (ACC!=0xff) test_status = 0; 315 | 316 | #pragma ASM 317 | sjmp NOW_JC_C 318 | nop 319 | nop 320 | nop 321 | ERROR1_JC_C: clr A 322 | SJMP EXIT1_JC_C 323 | nop 324 | nop 325 | RIGHT1_JC_C: mov A,#0ffH 326 | SJMP EXIT1_JC_C 327 | nop 328 | nop 329 | nop 330 | nop 331 | NOW_JC_C: clr C 332 | JC ERROR1_JC_C 333 | cpl C 334 | JC RIGHT1_JC_C 335 | nop 336 | nop 337 | EXIT1_JC_C: nop 338 | #pragma ENDASM 339 | if (ACC!=0xff) test_status = 0; 340 | 341 | #pragma ASM 342 | pop acc 343 | pop psw 344 | #pragma ENDASM 345 | error(); 346 | } 347 | 348 | void jnc_c(void) { 349 | printf("JNC_C\n"); 350 | #pragma ASM 351 | push psw 352 | push acc 353 | mov psw,#0H 354 | setb rs0 355 | setb rs1 356 | #pragma ENDASM 357 | 358 | #pragma ASM 359 | setb C 360 | JNC ERROR0_JNC_C 361 | cpl C 362 | JNC RIGHT0_JNC_C 363 | nop 364 | nop 365 | nop 366 | ERROR0_JNC_C: clr A 367 | SJMP EXIT0_JNC_C 368 | nop 369 | nop 370 | RIGHT0_JNC_C: mov A,#0ffH 371 | SJMP EXIT0_JNC_C 372 | nop 373 | nop 374 | EXIT0_JNC_C: nop 375 | #pragma ENDASM 376 | if (ACC!=0xff) test_status = 0; 377 | 378 | #pragma ASM 379 | sjmp NOW_JNC_C 380 | nop 381 | nop 382 | nop 383 | ERROR1_JNC_C: clr A 384 | SJMP EXIT1_JNC_C 385 | nop 386 | nop 387 | RIGHT1_JNC_C: mov A,#0ffH 388 | SJMP EXIT1_JNC_C 389 | nop 390 | nop 391 | nop 392 | nop 393 | NOW_JNC_C: setb C 394 | JNC ERROR1_JNC_C 395 | cpl C 396 | JNC RIGHT1_JNC_C 397 | nop 398 | nop 399 | EXIT1_JNC_C: nop 400 | #pragma ENDASM 401 | if (ACC!=0xff) test_status = 0; 402 | 403 | #pragma ASM 404 | pop acc 405 | pop psw 406 | #pragma ENDASM 407 | error(); 408 | } 409 | 410 | void jb_bit(void) { 411 | printf("JB_BIT\n"); 412 | #pragma ASM 413 | push psw 414 | push acc 415 | mov psw,#0H 416 | setb rs0 417 | setb rs1 418 | #pragma ENDASM 419 | 420 | #pragma ASM 421 | mov 0x20,#0f7H 422 | jb 0x3,ERROR0_JB_BIT 423 | cpl 0x3 424 | jb 0x3,RIGHT0_JB_BIT 425 | nop 426 | nop 427 | nop 428 | ERROR0_JB_BIT: clr A 429 | SJMP EXIT0_JB_BIT 430 | nop 431 | nop 432 | RIGHT0_JB_BIT: mov A,#0ffH 433 | SJMP EXIT0_JB_BIT 434 | nop 435 | nop 436 | EXIT0_JB_BIT: nop 437 | #pragma ENDASM 438 | if (ACC!=0xff) test_status = 0; 439 | 440 | #pragma ASM 441 | sjmp NOW_JB_BIT 442 | nop 443 | nop 444 | nop 445 | ERROR1_JB_BIT: clr A 446 | SJMP EXIT1_JB_BIT 447 | nop 448 | nop 449 | RIGHT1_JB_BIT: mov A,#0ffH 450 | SJMP EXIT1_JB_BIT 451 | nop 452 | nop 453 | nop 454 | nop 455 | NOW_JB_BIT: mov 0x20,#0f7H 456 | jb 0x3,ERROR1_JB_BIT 457 | cpl 0x3 458 | jb 0x3,RIGHT1_JB_BIT 459 | nop 460 | nop 461 | EXIT1_JB_BIT: nop 462 | #pragma ENDASM 463 | if (ACC!=0xff) test_status = 0; 464 | 465 | #pragma ASM 466 | pop acc 467 | pop psw 468 | #pragma ENDASM 469 | error(); 470 | } 471 | 472 | void jnb_bit(void) { 473 | printf("JNB_BIT\n"); 474 | #pragma ASM 475 | push psw 476 | push acc 477 | mov psw,#0H 478 | setb rs0 479 | setb rs1 480 | #pragma ENDASM 481 | 482 | #pragma ASM 483 | mov 0x20,#010H 484 | jnb 0x4,ERROR0_JNB_BIT 485 | cpl 0x4 486 | jnb 0x4,RIGHT0_JNB_BIT 487 | nop 488 | nop 489 | nop 490 | ERROR0_JNB_BIT: clr A 491 | SJMP EXIT0_JNB_BIT 492 | nop 493 | nop 494 | RIGHT0_JNB_BIT: mov A,#0ffH 495 | SJMP EXIT0_JNB_BIT 496 | nop 497 | nop 498 | EXIT0_JNB_BIT: nop 499 | #pragma ENDASM 500 | if (ACC!=0xff) test_status = 0; 501 | 502 | #pragma ASM 503 | sjmp NOW_JNB_BIT 504 | nop 505 | nop 506 | nop 507 | ERROR1_JNB_BIT: clr A 508 | SJMP EXIT1_JNB_BIT 509 | nop 510 | nop 511 | RIGHT1_JNB_BIT: mov A,#0ffH 512 | SJMP EXIT1_JNB_BIT 513 | nop 514 | nop 515 | nop 516 | nop 517 | NOW_JNB_BIT: mov 0x20,#010H 518 | jnb 0x4,ERROR1_JNB_BIT 519 | cpl 0x4 520 | jnb 0x4,RIGHT1_JNB_BIT 521 | nop 522 | nop 523 | EXIT1_JNB_BIT: nop 524 | #pragma ENDASM 525 | if (ACC!=0xff) test_status = 0; 526 | 527 | #pragma ASM 528 | pop acc 529 | pop psw 530 | #pragma ENDASM 531 | error(); 532 | } 533 | 534 | void jbc_bit(void) { 535 | printf("JBC_BIT\n"); 536 | #pragma ASM 537 | push psw 538 | push acc 539 | mov psw,#0H 540 | setb rs0 541 | setb rs1 542 | #pragma ENDASM 543 | 544 | #pragma ASM 545 | mov 0x20,#0f7H 546 | jbc 0x3,ERROR0_JBC_BIT 547 | cpl 0x3 548 | jbc 0x3,RIGHT0_JBC_BIT 549 | nop 550 | nop 551 | nop 552 | ERROR0_JBC_BIT: clr A 553 | SJMP EXIT0_JBC_BIT 554 | nop 555 | nop 556 | RIGHT0_JBC_BIT: mov A,#0ffH 557 | SJMP EXIT0_JBC_BIT 558 | nop 559 | nop 560 | EXIT0_JBC_BIT: nop 561 | #pragma ENDASM 562 | if (ACC!=0xff) test_status = 0; 563 | if (bit_data!=0xf7) test_status = 0; 564 | 565 | #pragma ASM 566 | sjmp NOW_JBC_BIT 567 | nop 568 | nop 569 | nop 570 | ERROR1_JBC_BIT: clr A 571 | SJMP EXIT1_JBC_BIT 572 | nop 573 | nop 574 | RIGHT1_JBC_BIT: mov A,#0ffH 575 | SJMP EXIT1_JBC_BIT 576 | nop 577 | nop 578 | nop 579 | nop 580 | NOW_JBC_BIT: mov 0x20,#0f7H 581 | jbc 0x3,ERROR1_JBC_BIT 582 | cpl 0x3 583 | jbc 0x3,RIGHT1_JBC_BIT 584 | nop 585 | nop 586 | EXIT1_JBC_BIT: nop 587 | #pragma ENDASM 588 | if (ACC!=0xff) test_status = 0; 589 | if (bit_data!=0xf7) test_status = 0; 590 | 591 | #pragma ASM 592 | pop acc 593 | pop psw 594 | #pragma ENDASM 595 | error(); 596 | } 597 | -------------------------------------------------------------------------------- /HELLO/hex2bin.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/hex2bin.exe -------------------------------------------------------------------------------- /HELLO/instruction.LST: -------------------------------------------------------------------------------- 1 | C51 COMPILER V9.52.0.0 INSTRUCTION 07/21/2014 16:39:35 PAGE 1 2 | 3 | 4 | C51 COMPILER V9.52.0.0, COMPILATION OF MODULE INSTRUCTION 5 | OBJECT MODULE PLACED IN instruction.OBJ 6 | COMPILER INVOKED BY: C:\myprog\Keil\C51\BIN\C51.EXE instruction.c BROWSE DEBUG OBJECTEXTEND TABS(2) 7 | 8 | line level source 9 | 10 | 1 #include 11 | 2 #include 12 | 3 #include "instruction.h" 13 | 4 14 | 5 void error(void){ 15 | 6 1 if (test_status==0) { 16 | 7 2 printf("ERROR HERE...\n"); 17 | 8 2 while(1); 18 | 9 2 } 19 | 10 1 } 20 | 11 21 | 12 void instruction_test_all(void){ 22 | 13 1 #ifdef ARITHMETIC 23 | 14 1 arithmetic(); 24 | 15 1 #endif 25 | 16 1 #ifdef LOGICAL 26 | 17 1 logical(); 27 | 18 1 #endif 28 | 19 1 #ifdef TRANSFER 29 | 20 1 transfer(); 30 | 21 1 #endif 31 | 22 1 #ifdef BOOLEAN 32 | 23 1 boolean(); 33 | 24 1 #endif 34 | 25 1 #ifdef PROGRAM 35 | 26 1 program(); 36 | 27 1 #endif 37 | 28 1 } 38 | 29 39 | 30 void arithmetic(void){ 40 | 31 1 #ifdef ADD_A_RN 41 | 32 1 add_a_rn(); 42 | 33 1 #endif 43 | 34 1 #ifdef ADD_A_DI 44 | 35 1 add_a_di(); 45 | 36 1 #endif 46 | 37 1 #ifdef ADD_A_RI 47 | 38 1 add_a_ri(); 48 | 39 1 #endif 49 | 40 1 #ifdef ADD_A_DA 50 | 41 1 add_a_da(); 51 | 42 1 #endif 52 | 43 1 #ifdef ADDC_A_RN 53 | 44 1 addc_a_rn(); 54 | 45 1 #endif 55 | 46 1 #ifdef ADDC_A_DI 56 | 47 1 addc_a_di(); 57 | 48 1 #endif 58 | 49 1 #ifdef ADDC_A_RI 59 | 50 1 addc_a_ri(); 60 | 51 1 #endif 61 | 52 1 #ifdef ADDC_A_DA 62 | 53 1 addc_a_da(); 63 | 54 1 #endif 64 | 55 1 #ifdef SUBB_A_RN 65 | C51 COMPILER V9.52.0.0 INSTRUCTION 07/21/2014 16:39:35 PAGE 2 66 | 67 | 56 1 subb_a_rn(); 68 | 57 1 #endif 69 | 58 1 #ifdef SUBB_A_DI 70 | 59 1 subb_a_di(); 71 | 60 1 #endif 72 | 61 1 #ifdef SUBB_A_RI 73 | 62 1 subb_a_ri(); 74 | 63 1 #endif 75 | 64 1 #ifdef SUBB_A_DA 76 | 65 1 subb_a_da(); 77 | 66 1 #endif 78 | 67 1 #ifdef INC_A 79 | 68 1 inc_a(); 80 | 69 1 #endif 81 | 70 1 #ifdef INC_RN 82 | 71 1 inc_rn(); 83 | 72 1 #endif 84 | 73 1 #ifdef INC_DI 85 | 74 1 inc_di(); 86 | 75 1 #endif 87 | 76 1 #ifdef INC_RI 88 | 77 1 inc_ri(); 89 | 78 1 #endif 90 | 79 1 #ifdef INC_DP 91 | 80 1 inc_dp(); 92 | 81 1 #endif 93 | 82 1 #ifdef DEC_A 94 | 83 1 dec_a(); 95 | 84 1 #endif 96 | 85 1 #ifdef DEC_RN 97 | 86 1 dec_rn(); 98 | 87 1 #endif 99 | 88 1 #ifdef DEC_DI 100 | 89 1 dec_di(); 101 | 90 1 #endif 102 | 91 1 #ifdef DEC_RI 103 | 92 1 dec_ri(); 104 | 93 1 #endif 105 | 94 1 #ifdef MULT 106 | 95 1 mult(); 107 | 96 1 #endif 108 | 97 1 #ifdef DIVIDE 109 | 98 1 divide(); 110 | 99 1 #endif 111 | 100 1 #ifdef DA_A 112 | 101 1 da_a(); 113 | 102 1 #endif 114 | 103 1 } 115 | 104 116 | 105 void logical(void){ 117 | 106 1 #ifdef ANL_A_RN 118 | 107 1 anl_a_rn(); 119 | 108 1 #endif 120 | 109 1 #ifdef ANL_A_DI 121 | 110 1 anl_a_di(); 122 | 111 1 #endif 123 | 112 1 #ifdef ANL_A_RI 124 | 113 1 anl_a_ri(); 125 | 114 1 #endif 126 | 115 1 #ifdef ANL_A_DA 127 | 116 1 anl_a_da(); 128 | 117 1 #endif 129 | C51 COMPILER V9.52.0.0 INSTRUCTION 07/21/2014 16:39:35 PAGE 3 130 | 131 | 118 1 #ifdef ANL_DI_A 132 | 119 1 anl_di_a(); 133 | 120 1 #endif 134 | 121 1 #ifdef ANL_DI_DA 135 | 122 1 anl_di_da(); 136 | 123 1 #endif 137 | 124 1 #ifdef ORL_A_RN 138 | 125 1 orl_a_rn(); 139 | 126 1 #endif 140 | 127 1 #ifdef ORL_A_DI 141 | 128 1 orl_a_di(); 142 | 129 1 #endif 143 | 130 1 #ifdef ORL_A_RI 144 | 131 1 orl_a_ri(); 145 | 132 1 #endif 146 | 133 1 #ifdef ORL_A_DA 147 | 134 1 orl_a_da(); 148 | 135 1 #endif 149 | 136 1 #ifdef ORL_DI_A 150 | 137 1 orl_di_a(); 151 | 138 1 #endif 152 | 139 1 #ifdef ORL_DI_DA 153 | 140 1 orl_di_da(); 154 | 141 1 #endif 155 | 142 1 #ifdef XRL_A_RN 156 | 143 1 xrl_a_rn(); 157 | 144 1 #endif 158 | 145 1 #ifdef XRL_A_DI 159 | 146 1 xrl_a_di(); 160 | 147 1 #endif 161 | 148 1 #ifdef XRL_A_RI 162 | 149 1 xrl_a_ri(); 163 | 150 1 #endif 164 | 151 1 #ifdef XRL_A_DA 165 | 152 1 xrl_a_da(); 166 | 153 1 #endif 167 | 154 1 #ifdef XRL_DI_A 168 | 155 1 xrl_di_a(); 169 | 156 1 #endif 170 | 157 1 #ifdef XRL_DI_DA 171 | 158 1 xrl_di_da(); 172 | 159 1 #endif 173 | 160 1 #ifdef CLR_A 174 | 161 1 clr_a(); 175 | 162 1 #endif 176 | 163 1 #ifdef CPL_A 177 | 164 1 cpl_a(); 178 | 165 1 #endif 179 | 166 1 #ifdef RL_A 180 | 167 1 rl_a(); 181 | 168 1 #endif 182 | 169 1 #ifdef RLC_A 183 | 170 1 rlc_a(); 184 | 171 1 #endif 185 | 172 1 #ifdef RR_A 186 | 173 1 rr_a(); 187 | 174 1 #endif 188 | 175 1 #ifdef RRC_A 189 | 176 1 rrc_a(); 190 | 177 1 #endif 191 | 178 1 #ifdef SWAP_A 192 | 179 1 swap_a(); 193 | C51 COMPILER V9.52.0.0 INSTRUCTION 07/21/2014 16:39:35 PAGE 4 194 | 195 | 180 1 #endif 196 | 181 1 } 197 | 182 198 | 183 void transfer(void){ 199 | 184 1 #ifdef MOV_A_RN 200 | 185 1 mov_a_rn(); 201 | 186 1 #endif 202 | 187 1 #ifdef MOV_A_DI 203 | 188 1 mov_a_di(); 204 | 189 1 #endif 205 | 190 1 #ifdef MOV_A_RI 206 | 191 1 mov_a_ri(); 207 | 192 1 #endif 208 | 193 1 #ifdef MOV_A_DA 209 | 194 1 mov_a_da(); 210 | 195 1 #endif 211 | 196 1 #ifdef MOV_RN_A 212 | 197 1 mov_rn_a(); 213 | 198 1 #endif 214 | 199 1 #ifdef MOV_RN_DI 215 | 200 1 mov_rn_di(); 216 | 201 1 #endif 217 | 202 1 #ifdef MOV_RN_DA 218 | 203 1 mov_rn_da(); 219 | 204 1 #endif 220 | 205 1 #ifdef MOV_DI_A 221 | 206 1 mov_di_a(); 222 | 207 1 #endif 223 | 208 1 #ifdef MOV_DI_RN 224 | 209 1 mov_di_rn(); 225 | 210 1 #endif 226 | 211 1 #ifdef MOV_DI_DI 227 | 212 1 mov_di_di(); 228 | 213 1 #endif 229 | 214 1 #ifdef MOV_DI_RI 230 | 215 1 mov_di_ri(); 231 | 216 1 #endif 232 | 217 1 #ifdef MOV_DI_DA 233 | 218 1 mov_di_da(); 234 | 219 1 #endif 235 | 220 1 #ifdef MOV_RI_A 236 | 221 1 mov_ri_a(); 237 | 222 1 #endif 238 | 223 1 #ifdef MOV_RI_DI 239 | 224 1 mov_ri_di(); 240 | 225 1 #endif 241 | 226 1 #ifdef MOV_RI_DA 242 | 227 1 mov_ri_da(); 243 | 228 1 #endif 244 | 229 1 #ifdef MOV_DP_DA 245 | 230 1 mov_dp_da(); 246 | 231 1 #endif 247 | 232 1 #ifdef MOVC_A_DP 248 | 233 1 movc_a_dp(); 249 | 234 1 #endif 250 | 235 1 #ifdef MOVC_A_PC 251 | 236 1 movc_a_pc(); 252 | 237 1 #endif 253 | 238 1 #ifdef MOVX_A_RI 254 | 239 1 movx_a_ri(); 255 | 240 1 #endif 256 | 241 1 #ifdef MOVX_A_DP 257 | C51 COMPILER V9.52.0.0 INSTRUCTION 07/21/2014 16:39:35 PAGE 5 258 | 259 | 242 1 movx_a_dp(); 260 | 243 1 #endif 261 | 244 1 #ifdef MOVX_RI_A 262 | 245 1 movx_ri_a(); 263 | 246 1 #endif 264 | 247 1 #ifdef MOVX_DP_A 265 | 248 1 movx_dp_a(); 266 | 249 1 #endif 267 | 250 1 #ifdef PUSH_DI 268 | 251 1 push_di(); 269 | 252 1 #endif 270 | 253 1 #ifdef POP_DI 271 | 254 1 pop_di(); 272 | 255 1 #endif 273 | 256 1 #ifdef XCH_A_RN 274 | 257 1 xch_a_rn(); 275 | 258 1 #endif 276 | 259 1 #ifdef XCH_A_DI 277 | 260 1 xch_a_di(); 278 | 261 1 #endif 279 | 262 1 #ifdef XCH_A_RI 280 | 263 1 xch_a_ri(); 281 | 264 1 #endif 282 | 265 1 #ifdef XCHD_A_RI 283 | 266 1 xchd_a_ri(); 284 | 267 1 #endif 285 | 268 1 } 286 | 269 287 | 270 void boolean(void){ 288 | 271 1 #ifdef CLR_C 289 | 272 1 clr_c(); 290 | 273 1 #endif 291 | 274 1 #ifdef CLR_BIT 292 | 275 1 clr_bit(); 293 | 276 1 #endif 294 | 277 1 #ifdef SETB_C 295 | 278 1 setb_c(); 296 | 279 1 #endif 297 | 280 1 #ifdef SETB_BIT 298 | 281 1 setb_bit(); 299 | 282 1 #endif 300 | 283 1 #ifdef CPL_C 301 | 284 1 cpl_c(); 302 | 285 1 #endif 303 | 286 1 #ifdef CPL_BIT 304 | 287 1 cpl_bit(); 305 | 288 1 #endif 306 | 289 1 #ifdef ANL_C_BIT 307 | 290 1 anl_c_bit(); 308 | 291 1 #endif 309 | 292 1 #ifdef ANL_C_NBIT 310 | 293 1 anl_c_nbit(); 311 | 294 1 #endif 312 | 295 1 #ifdef ORL_C_BIT 313 | 296 1 orl_c_bit(); 314 | 297 1 #endif 315 | 298 1 #ifdef ORL_C_NBIT 316 | 299 1 orl_c_nbit(); 317 | 300 1 #endif 318 | 301 1 #ifdef MOV_C_BIT 319 | 302 1 mov_c_bit(); 320 | 303 1 #endif 321 | C51 COMPILER V9.52.0.0 INSTRUCTION 07/21/2014 16:39:35 PAGE 6 322 | 323 | 304 1 #ifdef MOV_BIT_C 324 | 305 1 mov_bit_c(); 325 | 306 1 #endif 326 | 307 1 #ifdef JC_C 327 | 308 1 jc_c(); 328 | 309 1 #endif 329 | 310 1 #ifdef JNC_C 330 | 311 1 jnc_c(); 331 | 312 1 #endif 332 | 313 1 #ifdef JB_BIT 333 | 314 1 jb_bit(); 334 | 315 1 #endif 335 | 316 1 #ifdef JNB_BIT 336 | 317 1 jnb_bit(); 337 | 318 1 #endif 338 | 319 1 #ifdef JBC_BIT 339 | 320 1 jbc_bit(); 340 | 321 1 #endif 341 | 322 1 } 342 | 323 343 | 324 void program(void){ 344 | 325 1 #ifdef ACALL_FUNC 345 | 326 1 acall_func(); 346 | 327 1 #endif 347 | 328 1 #ifdef LCALL_FUNC 348 | 329 1 lcall_func(); 349 | 330 1 #endif 350 | 331 1 #ifdef RET_FUNC 351 | 332 1 ret_func(); 352 | 333 1 #endif 353 | 334 1 #ifdef RETI_FUNC 354 | 335 1 reti_func(); 355 | 336 1 #endif 356 | 337 1 #ifdef AJMP_FUNC 357 | 338 1 ajmp_func(); 358 | 339 1 #endif 359 | 340 1 #ifdef SJMP_FUNC 360 | 341 1 sjmp_func(); 361 | 342 1 #endif 362 | 343 1 #ifdef JMP_FUNC 363 | 344 1 jmp_func(); 364 | 345 1 #endif 365 | 346 1 #ifdef JZ_FUNC 366 | 347 1 jz_func(); 367 | 348 1 #endif 368 | 349 1 #ifdef JNZ_FUNC 369 | 350 1 jnz_func(); 370 | 351 1 #endif 371 | 352 1 #ifdef CJNE_A_DI_REL 372 | 353 1 cjne_a_di_rel(); 373 | 354 1 #endif 374 | 355 1 #ifdef CJNE_A_DA_REL 375 | 356 1 cjne_a_da_rel(); 376 | 357 1 #endif 377 | 358 1 #ifdef CJNE_RN_DA_REL 378 | 359 1 cjne_rn_da_rel(); 379 | 360 1 #endif 380 | 361 1 #ifdef CJNE_RI_DA_REL 381 | 362 1 cjne_ri_da_rel(); 382 | 363 1 #endif 383 | 364 1 #ifdef DJNZ_RN_REL 384 | 365 1 djnz_rn_rel(); 385 | C51 COMPILER V9.52.0.0 INSTRUCTION 07/21/2014 16:39:35 PAGE 7 386 | 387 | 366 1 #endif 388 | 367 1 #ifdef DJNZ_DI_REL 389 | 368 1 djnz_di_rel(); 390 | 369 1 #endif 391 | 370 1 } 392 | 371 393 | 394 | 395 | MODULE INFORMATION: STATIC OVERLAYABLE 396 | CODE SIZE = 360 ---- 397 | CONSTANT SIZE = 15 ---- 398 | XDATA SIZE = ---- ---- 399 | PDATA SIZE = ---- ---- 400 | DATA SIZE = ---- ---- 401 | IDATA SIZE = ---- ---- 402 | BIT SIZE = ---- ---- 403 | END OF MODULE INFORMATION. 404 | 405 | 406 | C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S) 407 | -------------------------------------------------------------------------------- /HELLO/instruction.OBJ: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/instruction.OBJ -------------------------------------------------------------------------------- /HELLO/instruction.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "instruction.h" 4 | 5 | void error(void){ 6 | if (test_status==0) { 7 | printf("ERROR HERE...\n"); 8 | while(1); 9 | } 10 | } 11 | 12 | void instruction_test_all(void){ 13 | #ifdef ARITHMETIC 14 | arithmetic(); 15 | #endif 16 | #ifdef LOGICAL 17 | logical(); 18 | #endif 19 | #ifdef TRANSFER 20 | transfer(); 21 | #endif 22 | #ifdef BOOLEAN 23 | boolean(); 24 | #endif 25 | #ifdef PROGRAM 26 | program(); 27 | #endif 28 | } 29 | 30 | void arithmetic(void){ 31 | #ifdef ADD_A_RN 32 | add_a_rn(); 33 | #endif 34 | #ifdef ADD_A_DI 35 | add_a_di(); 36 | #endif 37 | #ifdef ADD_A_RI 38 | add_a_ri(); 39 | #endif 40 | #ifdef ADD_A_DA 41 | add_a_da(); 42 | #endif 43 | #ifdef ADDC_A_RN 44 | addc_a_rn(); 45 | #endif 46 | #ifdef ADDC_A_DI 47 | addc_a_di(); 48 | #endif 49 | #ifdef ADDC_A_RI 50 | addc_a_ri(); 51 | #endif 52 | #ifdef ADDC_A_DA 53 | addc_a_da(); 54 | #endif 55 | #ifdef SUBB_A_RN 56 | subb_a_rn(); 57 | #endif 58 | #ifdef SUBB_A_DI 59 | subb_a_di(); 60 | #endif 61 | #ifdef SUBB_A_RI 62 | subb_a_ri(); 63 | #endif 64 | #ifdef SUBB_A_DA 65 | subb_a_da(); 66 | #endif 67 | #ifdef INC_A 68 | inc_a(); 69 | #endif 70 | #ifdef INC_RN 71 | inc_rn(); 72 | #endif 73 | #ifdef INC_DI 74 | inc_di(); 75 | #endif 76 | #ifdef INC_RI 77 | inc_ri(); 78 | #endif 79 | #ifdef INC_DP 80 | inc_dp(); 81 | #endif 82 | #ifdef DEC_A 83 | dec_a(); 84 | #endif 85 | #ifdef DEC_RN 86 | dec_rn(); 87 | #endif 88 | #ifdef DEC_DI 89 | dec_di(); 90 | #endif 91 | #ifdef DEC_RI 92 | dec_ri(); 93 | #endif 94 | #ifdef MULT 95 | mult(); 96 | #endif 97 | #ifdef DIVIDE 98 | divide(); 99 | #endif 100 | #ifdef DA_A 101 | da_a(); 102 | #endif 103 | } 104 | 105 | void logical(void){ 106 | #ifdef ANL_A_RN 107 | anl_a_rn(); 108 | #endif 109 | #ifdef ANL_A_DI 110 | anl_a_di(); 111 | #endif 112 | #ifdef ANL_A_RI 113 | anl_a_ri(); 114 | #endif 115 | #ifdef ANL_A_DA 116 | anl_a_da(); 117 | #endif 118 | #ifdef ANL_DI_A 119 | anl_di_a(); 120 | #endif 121 | #ifdef ANL_DI_DA 122 | anl_di_da(); 123 | #endif 124 | #ifdef ORL_A_RN 125 | orl_a_rn(); 126 | #endif 127 | #ifdef ORL_A_DI 128 | orl_a_di(); 129 | #endif 130 | #ifdef ORL_A_RI 131 | orl_a_ri(); 132 | #endif 133 | #ifdef ORL_A_DA 134 | orl_a_da(); 135 | #endif 136 | #ifdef ORL_DI_A 137 | orl_di_a(); 138 | #endif 139 | #ifdef ORL_DI_DA 140 | orl_di_da(); 141 | #endif 142 | #ifdef XRL_A_RN 143 | xrl_a_rn(); 144 | #endif 145 | #ifdef XRL_A_DI 146 | xrl_a_di(); 147 | #endif 148 | #ifdef XRL_A_RI 149 | xrl_a_ri(); 150 | #endif 151 | #ifdef XRL_A_DA 152 | xrl_a_da(); 153 | #endif 154 | #ifdef XRL_DI_A 155 | xrl_di_a(); 156 | #endif 157 | #ifdef XRL_DI_DA 158 | xrl_di_da(); 159 | #endif 160 | #ifdef CLR_A 161 | clr_a(); 162 | #endif 163 | #ifdef CPL_A 164 | cpl_a(); 165 | #endif 166 | #ifdef RL_A 167 | rl_a(); 168 | #endif 169 | #ifdef RLC_A 170 | rlc_a(); 171 | #endif 172 | #ifdef RR_A 173 | rr_a(); 174 | #endif 175 | #ifdef RRC_A 176 | rrc_a(); 177 | #endif 178 | #ifdef SWAP_A 179 | swap_a(); 180 | #endif 181 | } 182 | 183 | void transfer(void){ 184 | #ifdef MOV_A_RN 185 | mov_a_rn(); 186 | #endif 187 | #ifdef MOV_A_DI 188 | mov_a_di(); 189 | #endif 190 | #ifdef MOV_A_RI 191 | mov_a_ri(); 192 | #endif 193 | #ifdef MOV_A_DA 194 | mov_a_da(); 195 | #endif 196 | #ifdef MOV_RN_A 197 | mov_rn_a(); 198 | #endif 199 | #ifdef MOV_RN_DI 200 | mov_rn_di(); 201 | #endif 202 | #ifdef MOV_RN_DA 203 | mov_rn_da(); 204 | #endif 205 | #ifdef MOV_DI_A 206 | mov_di_a(); 207 | #endif 208 | #ifdef MOV_DI_RN 209 | mov_di_rn(); 210 | #endif 211 | #ifdef MOV_DI_DI 212 | mov_di_di(); 213 | #endif 214 | #ifdef MOV_DI_RI 215 | mov_di_ri(); 216 | #endif 217 | #ifdef MOV_DI_DA 218 | mov_di_da(); 219 | #endif 220 | #ifdef MOV_RI_A 221 | mov_ri_a(); 222 | #endif 223 | #ifdef MOV_RI_DI 224 | mov_ri_di(); 225 | #endif 226 | #ifdef MOV_RI_DA 227 | mov_ri_da(); 228 | #endif 229 | #ifdef MOV_DP_DA 230 | mov_dp_da(); 231 | #endif 232 | #ifdef MOVC_A_DP 233 | movc_a_dp(); 234 | #endif 235 | #ifdef MOVC_A_PC 236 | movc_a_pc(); 237 | #endif 238 | #ifdef MOVX_A_RI 239 | movx_a_ri(); 240 | #endif 241 | #ifdef MOVX_A_DP 242 | movx_a_dp(); 243 | #endif 244 | #ifdef MOVX_RI_A 245 | movx_ri_a(); 246 | #endif 247 | #ifdef MOVX_DP_A 248 | movx_dp_a(); 249 | #endif 250 | #ifdef PUSH_DI 251 | push_di(); 252 | #endif 253 | #ifdef POP_DI 254 | pop_di(); 255 | #endif 256 | #ifdef XCH_A_RN 257 | xch_a_rn(); 258 | #endif 259 | #ifdef XCH_A_DI 260 | xch_a_di(); 261 | #endif 262 | #ifdef XCH_A_RI 263 | xch_a_ri(); 264 | #endif 265 | #ifdef XCHD_A_RI 266 | xchd_a_ri(); 267 | #endif 268 | } 269 | 270 | void boolean(void){ 271 | #ifdef CLR_C 272 | clr_c(); 273 | #endif 274 | #ifdef CLR_BIT 275 | clr_bit(); 276 | #endif 277 | #ifdef SETB_C 278 | setb_c(); 279 | #endif 280 | #ifdef SETB_BIT 281 | setb_bit(); 282 | #endif 283 | #ifdef CPL_C 284 | cpl_c(); 285 | #endif 286 | #ifdef CPL_BIT 287 | cpl_bit(); 288 | #endif 289 | #ifdef ANL_C_BIT 290 | anl_c_bit(); 291 | #endif 292 | #ifdef ANL_C_NBIT 293 | anl_c_nbit(); 294 | #endif 295 | #ifdef ORL_C_BIT 296 | orl_c_bit(); 297 | #endif 298 | #ifdef ORL_C_NBIT 299 | orl_c_nbit(); 300 | #endif 301 | #ifdef MOV_C_BIT 302 | mov_c_bit(); 303 | #endif 304 | #ifdef MOV_BIT_C 305 | mov_bit_c(); 306 | #endif 307 | #ifdef JC_C 308 | jc_c(); 309 | #endif 310 | #ifdef JNC_C 311 | jnc_c(); 312 | #endif 313 | #ifdef JB_BIT 314 | jb_bit(); 315 | #endif 316 | #ifdef JNB_BIT 317 | jnb_bit(); 318 | #endif 319 | #ifdef JBC_BIT 320 | jbc_bit(); 321 | #endif 322 | } 323 | 324 | void program(void){ 325 | #ifdef ACALL_FUNC 326 | acall_func(); 327 | #endif 328 | #ifdef LCALL_FUNC 329 | lcall_func(); 330 | #endif 331 | #ifdef RET_FUNC 332 | ret_func(); 333 | #endif 334 | #ifdef RETI_FUNC 335 | reti_func(); 336 | #endif 337 | #ifdef AJMP_FUNC 338 | ajmp_func(); 339 | #endif 340 | #ifdef SJMP_FUNC 341 | sjmp_func(); 342 | #endif 343 | #ifdef JMP_FUNC 344 | jmp_func(); 345 | #endif 346 | #ifdef JZ_FUNC 347 | jz_func(); 348 | #endif 349 | #ifdef JNZ_FUNC 350 | jnz_func(); 351 | #endif 352 | #ifdef CJNE_A_DI_REL 353 | cjne_a_di_rel(); 354 | #endif 355 | #ifdef CJNE_A_DA_REL 356 | cjne_a_da_rel(); 357 | #endif 358 | #ifdef CJNE_RN_DA_REL 359 | cjne_rn_da_rel(); 360 | #endif 361 | #ifdef CJNE_RI_DA_REL 362 | cjne_ri_da_rel(); 363 | #endif 364 | #ifdef DJNZ_RN_REL 365 | djnz_rn_rel(); 366 | #endif 367 | #ifdef DJNZ_DI_REL 368 | djnz_di_rel(); 369 | #endif 370 | } 371 | 372 | -------------------------------------------------------------------------------- /HELLO/instruction.h: -------------------------------------------------------------------------------- 1 | #ifndef __INSTRUCTION 2 | #define __INSTRUCTION 3 | 4 | typedef unsigned char UCHAR; 5 | 6 | typedef volatile UCHAR VUCHAR; 7 | 8 | #define R(M,N) *(VUCHAR data *) (8*(M)+(N)) 9 | 10 | #define test_status *(VUCHAR xdata *) 0x7e 11 | 12 | #define kill_self *(VUCHAR xdata *) 0x7f 13 | 14 | #define bit_data *(VUCHAR bdata *) 0x20 15 | 16 | 17 | extern void error(void); 18 | extern void instruction_test_all(void); 19 | 20 | #define ARITHMETIC 21 | 22 | #define ADD_A_RN 23 | #define ADD_A_DI 24 | #define ADD_A_RI 25 | #define ADD_A_DA 26 | #define ADDC_A_RN 27 | #define ADDC_A_DI 28 | #define ADDC_A_RI 29 | #define ADDC_A_DA 30 | #define SUBB_A_RN 31 | #define SUBB_A_DI 32 | #define SUBB_A_RI 33 | #define SUBB_A_DA 34 | #define INC_A 35 | #define INC_RN 36 | #define INC_DI 37 | #define INC_RI 38 | #define INC_DP 39 | #define DEC_A 40 | #define DEC_RN 41 | #define DEC_DI 42 | #define DEC_RI 43 | #define MULT 44 | #define DIVIDE 45 | #define DA_A 46 | 47 | extern void arithmetic(void); 48 | extern void add_a_rn(void); 49 | extern void add_a_di(void); 50 | extern void add_a_ri(void); 51 | extern void add_a_da(void); 52 | extern void addc_a_rn(void); 53 | extern void addc_a_di(void); 54 | extern void addc_a_ri(void); 55 | extern void addc_a_da(void); 56 | extern void subb_a_rn(void); 57 | extern void subb_a_di(void); 58 | extern void subb_a_ri(void); 59 | extern void subb_a_da(void); 60 | extern void inc_a(void); 61 | extern void inc_rn(void); 62 | extern void inc_di(void); 63 | extern void inc_ri(void); 64 | extern void inc_dp(void); 65 | extern void dec_a(void); 66 | extern void dec_rn(void); 67 | extern void dec_di(void); 68 | extern void dec_ri(void); 69 | extern void mult(void); 70 | extern void divide(void); 71 | extern void da_a(void); 72 | 73 | #define LOGICAL 74 | 75 | #define ANL_A_RN 76 | #define ANL_A_DI 77 | #define ANL_A_RI 78 | #define ANL_A_DA 79 | #define ANL_DI_A 80 | #define ANL_DI_DA 81 | #define ORL_A_RN 82 | #define ORL_A_DI 83 | #define ORL_A_RI 84 | #define ORL_A_DA 85 | #define ORL_DI_A 86 | #define ORL_DI_DA 87 | #define XRL_A_RN 88 | #define XRL_A_DI 89 | #define XRL_A_RI 90 | #define XRL_A_DA 91 | #define XRL_DI_A 92 | #define XRL_DI_DA 93 | #define CLR_A 94 | #define CPL_A 95 | #define RL_A 96 | #define RLC_A 97 | #define RR_A 98 | #define RRC_A 99 | #define SWAP_A 100 | 101 | extern void logical(void); 102 | extern void anl_a_rn(void); 103 | extern void anl_a_di(void); 104 | extern void anl_a_ri(void); 105 | extern void anl_a_da(void); 106 | extern void anl_di_a(void); 107 | extern void anl_di_da(void); 108 | extern void orl_a_rn(void); 109 | extern void orl_a_di(void); 110 | extern void orl_a_ri(void); 111 | extern void orl_a_da(void); 112 | extern void orl_di_a(void); 113 | extern void orl_di_da(void); 114 | extern void xrl_a_rn(void); 115 | extern void xrl_a_di(void); 116 | extern void xrl_a_ri(void); 117 | extern void xrl_a_da(void); 118 | extern void xrl_di_a(void); 119 | extern void xrl_di_da(void); 120 | extern void clr_a(void); 121 | extern void cpl_a(void); 122 | extern void rl_a(void); 123 | extern void rlc_a(void); 124 | extern void rr_a(void); 125 | extern void rrc_a(void); 126 | extern void swap_a(void); 127 | 128 | #define TRANSFER 129 | 130 | #define MOV_A_RN 131 | #define MOV_A_DI 132 | #define MOV_A_RI 133 | #define MOV_A_DA 134 | #define MOV_RN_A 135 | #define MOV_RN_DI 136 | #define MOV_RN_DA 137 | #define MOV_DI_A 138 | #define MOV_DI_RN 139 | #define MOV_DI_DI 140 | #define MOV_DI_RI 141 | #define MOV_DI_DA 142 | #define MOV_RI_A 143 | #define MOV_RI_DI 144 | #define MOV_RI_DA 145 | #define MOV_DP_DA 146 | #define MOVC_A_DP 147 | #define MOVC_A_PC 148 | #define MOVX_A_RI 149 | #define MOVX_A_DP 150 | #define MOVX_RI_A 151 | #define MOVX_DP_A 152 | #define PUSH_DI 153 | #define POP_DI 154 | #define XCH_A_RN 155 | #define XCH_A_DI 156 | #define XCH_A_RI 157 | #define XCHD_A_RI 158 | 159 | extern void transfer(void); 160 | extern void mov_a_rn(void); 161 | extern void mov_a_di(void); 162 | extern void mov_a_ri(void); 163 | extern void mov_a_da(void); 164 | extern void mov_rn_a(void); 165 | extern void mov_rn_di(void); 166 | extern void mov_rn_da(void); 167 | extern void mov_di_a(void); 168 | extern void mov_di_rn(void); 169 | extern void mov_di_di(void); 170 | extern void mov_di_ri(void); 171 | extern void mov_di_da(void); 172 | extern void mov_ri_a(void); 173 | extern void mov_ri_di(void); 174 | extern void mov_ri_da(void); 175 | extern void mov_dp_da(void); 176 | extern void movc_a_dp(void); 177 | extern void movc_a_pc(void); 178 | extern void movx_a_ri(void); 179 | extern void movx_a_dp(void); 180 | extern void movx_ri_a(void); 181 | extern void movx_dp_a(void); 182 | extern void push_di(void); 183 | extern void pop_di(void); 184 | extern void xch_a_rn(void); 185 | extern void xch_a_di(void); 186 | extern void xch_a_ri(void); 187 | extern void xchd_a_ri(void); 188 | 189 | #define BOOLEAN 190 | 191 | #define CLR_C 192 | #define CLR_BIT 193 | #define SETB_C 194 | #define SETB_BIT 195 | #define CPL_C 196 | #define CPL_BIT 197 | #define ANL_C_BIT 198 | #define ANL_C_NBIT 199 | #define ORL_C_BIT 200 | #define ORL_C_NBIT 201 | #define MOV_C_BIT 202 | #define MOV_BIT_C 203 | #define JC_C 204 | #define JNC_C 205 | #define JB_BIT 206 | #define JNB_BIT 207 | #define JBC_BIT 208 | 209 | 210 | extern void boolean(void); 211 | extern void clr_c(void); 212 | extern void clr_bit(void); 213 | extern void setb_c(void); 214 | extern void setb_bit(void); 215 | extern void cpl_c(void); 216 | extern void cpl_bit(void); 217 | extern void anl_c_bit(void); 218 | extern void anl_c_nbit(void); 219 | extern void orl_c_bit(void); 220 | extern void orl_c_nbit(void); 221 | extern void mov_c_bit(void); 222 | extern void mov_bit_c(void); 223 | extern void jc_c(void); 224 | extern void jnc_c(void); 225 | extern void jb_bit(void); 226 | extern void jnb_bit(void); 227 | extern void jbc_bit(void); 228 | 229 | #define PROGRAM 230 | 231 | #define ACALL_FUNC 232 | #define LCALL_FUNC 233 | #define RET_FUNC 234 | #define RETI_FUNC 235 | #define AJMP_FUNC 236 | #define SJMP_FUNC 237 | #define JMP_FUNC 238 | #define JZ_FUNC 239 | #define JNZ_FUNC 240 | #define CJNE_A_DI_REL 241 | #define CJNE_A_DA_REL 242 | #define CJNE_RN_DA_REL 243 | #define CJNE_RI_DA_REL 244 | #define DJNZ_RN_REL 245 | #define DJNZ_DI_REL 246 | 247 | extern void program(void); 248 | extern void acall_func(void); 249 | extern void lcall_func(void); 250 | extern void ret_func(void); 251 | extern void reti_func(void); 252 | extern void ajmp_func(void); 253 | extern void sjmp_func(void); 254 | extern void jmp_func(void); 255 | extern void jz_func(void); 256 | extern void jnz_func(void); 257 | extern void cjne_a_di_rel(void); 258 | extern void cjne_a_da_rel(void); 259 | extern void cjne_rn_da_rel(void); 260 | extern void cjne_ri_da_rel(void); 261 | extern void djnz_rn_rel(void); 262 | extern void djnz_di_rel(void); 263 | 264 | #endif -------------------------------------------------------------------------------- /HELLO/logical.OBJ: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/logical.OBJ -------------------------------------------------------------------------------- /HELLO/logical.__i: -------------------------------------------------------------------------------- 1 | "logical.c" BROWSE DEBUG OBJECTEXTEND TABS (2) SRC (.\logical.SRC) -------------------------------------------------------------------------------- /HELLO/logical.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "instruction.h" 4 | 5 | void anl_a_rn(void) { 6 | printf("ANL_A_RN\n"); 7 | #pragma ASM 8 | push psw 9 | push acc 10 | mov psw,#0H 11 | setb rs0 12 | setb rs1 13 | #pragma ENDASM 14 | 15 | #pragma ASM 16 | mov acc,#0a5H 17 | mov R0,#0f0H 18 | anl A,R0 19 | #pragma ENDASM 20 | if (ACC!=0xa0) test_status = 0; 21 | 22 | #pragma ASM 23 | pop acc 24 | pop psw 25 | #pragma ENDASM 26 | error(); 27 | } 28 | 29 | void anl_a_di(void) { 30 | printf("ANL_A_DI\n"); 31 | #pragma ASM 32 | push psw 33 | push acc 34 | mov psw,#0H 35 | setb rs0 36 | setb rs1 37 | #pragma ENDASM 38 | 39 | #pragma ASM 40 | mov acc,#0a5H 41 | mov R3,#0fH 42 | anl A,0x1b 43 | #pragma ENDASM 44 | if (ACC!=0x5) test_status = 0; 45 | 46 | #pragma ASM 47 | pop acc 48 | pop psw 49 | #pragma ENDASM 50 | error(); 51 | } 52 | 53 | void anl_a_ri(void) { 54 | printf("ANL_A_RI\n"); 55 | #pragma ASM 56 | push psw 57 | push acc 58 | mov psw,#0H 59 | setb rs0 60 | setb rs1 61 | #pragma ENDASM 62 | 63 | #pragma ASM 64 | mov acc,#0a5H 65 | mov R3,#0f0H 66 | mov R1,#0x1b 67 | anl A,@R1 68 | #pragma ENDASM 69 | if (ACC!=0xa0) test_status = 0; 70 | 71 | #pragma ASM 72 | pop acc 73 | pop psw 74 | #pragma ENDASM 75 | error(); 76 | } 77 | 78 | void anl_a_da(void) { 79 | printf("ANL_A_DA\n"); 80 | #pragma ASM 81 | push psw 82 | push acc 83 | mov psw,#0H 84 | setb rs0 85 | setb rs1 86 | #pragma ENDASM 87 | 88 | #pragma ASM 89 | mov acc,#0a5H 90 | anl A,#0fH 91 | #pragma ENDASM 92 | if (ACC!=0x5) test_status = 0; 93 | 94 | #pragma ASM 95 | pop acc 96 | pop psw 97 | #pragma ENDASM 98 | error(); 99 | } 100 | 101 | void anl_di_a(void) { 102 | printf("ANL_DI_A\n"); 103 | #pragma ASM 104 | push psw 105 | push acc 106 | mov psw,#0H 107 | setb rs0 108 | setb rs1 109 | #pragma ENDASM 110 | 111 | #pragma ASM 112 | mov acc,#0a5H 113 | mov R3,#0fH 114 | anl 0x1b,A 115 | #pragma ENDASM 116 | if (R(3,3)!=0x5) test_status = 0; 117 | 118 | #pragma ASM 119 | pop acc 120 | pop psw 121 | #pragma ENDASM 122 | error(); 123 | } 124 | 125 | void anl_di_da(void) { 126 | printf("ANL_DI_DA\n"); 127 | #pragma ASM 128 | push psw 129 | push acc 130 | mov psw,#0H 131 | setb rs0 132 | setb rs1 133 | #pragma ENDASM 134 | 135 | #pragma ASM 136 | mov R3,#0f0H 137 | anl 0x1b,#0a5H 138 | #pragma ENDASM 139 | if (R(3,3)!=0xa0) test_status = 0; 140 | 141 | #pragma ASM 142 | pop acc 143 | pop psw 144 | #pragma ENDASM 145 | error(); 146 | } 147 | 148 | void orl_a_rn(void) { 149 | printf("ORL_A_RN\n"); 150 | #pragma ASM 151 | push psw 152 | push acc 153 | mov psw,#0H 154 | setb rs0 155 | setb rs1 156 | #pragma ENDASM 157 | 158 | #pragma ASM 159 | mov acc,#0a5H 160 | mov R0,#0f0H 161 | orl A,R0 162 | #pragma ENDASM 163 | if (ACC!=0xf5) test_status = 0; 164 | 165 | #pragma ASM 166 | pop acc 167 | pop psw 168 | #pragma ENDASM 169 | error(); 170 | } 171 | 172 | void orl_a_di(void) { 173 | printf("ORL_A_DI\n"); 174 | #pragma ASM 175 | push psw 176 | push acc 177 | mov psw,#0H 178 | setb rs0 179 | setb rs1 180 | #pragma ENDASM 181 | 182 | #pragma ASM 183 | mov acc,#0a5H 184 | mov R3,#0fH 185 | orl A,0x1b 186 | #pragma ENDASM 187 | if (ACC!=0xaf) test_status = 0; 188 | 189 | #pragma ASM 190 | pop acc 191 | pop psw 192 | #pragma ENDASM 193 | error(); 194 | } 195 | 196 | void orl_a_ri(void) { 197 | printf("ORL_A_RI\n"); 198 | #pragma ASM 199 | push psw 200 | push acc 201 | mov psw,#0H 202 | setb rs0 203 | setb rs1 204 | #pragma ENDASM 205 | 206 | #pragma ASM 207 | mov acc,#0a5H 208 | mov R3,#0f0H 209 | mov R1,#0x1b 210 | orl A,@R1 211 | #pragma ENDASM 212 | if (ACC!=0xf5) test_status = 0; 213 | 214 | #pragma ASM 215 | pop acc 216 | pop psw 217 | #pragma ENDASM 218 | error(); 219 | } 220 | 221 | void orl_a_da(void) { 222 | printf("ORL_A_DA\n"); 223 | #pragma ASM 224 | push psw 225 | push acc 226 | mov psw,#0H 227 | setb rs0 228 | setb rs1 229 | #pragma ENDASM 230 | 231 | #pragma ASM 232 | mov acc,#0a5H 233 | orl A,#0fH 234 | #pragma ENDASM 235 | if (ACC!=0xaf) test_status = 0; 236 | 237 | #pragma ASM 238 | pop acc 239 | pop psw 240 | #pragma ENDASM 241 | error(); 242 | } 243 | 244 | void orl_di_a(void) { 245 | printf("ORL_DI_A\n"); 246 | #pragma ASM 247 | push psw 248 | push acc 249 | mov psw,#0H 250 | setb rs0 251 | setb rs1 252 | #pragma ENDASM 253 | 254 | #pragma ASM 255 | mov acc,#0a5H 256 | mov R3,#0fH 257 | orl 0x1b,A 258 | #pragma ENDASM 259 | if (R(3,3)!=0xaf) test_status = 0; 260 | 261 | #pragma ASM 262 | pop acc 263 | pop psw 264 | #pragma ENDASM 265 | error(); 266 | } 267 | 268 | void orl_di_da(void) { 269 | printf("ORL_DI_DA\n"); 270 | #pragma ASM 271 | push psw 272 | push acc 273 | mov psw,#0H 274 | setb rs0 275 | setb rs1 276 | #pragma ENDASM 277 | 278 | #pragma ASM 279 | mov R3,#0f0H 280 | orl 0x1b,#0a5H 281 | #pragma ENDASM 282 | if (R(3,3)!=0xf5) test_status = 0; 283 | 284 | #pragma ASM 285 | pop acc 286 | pop psw 287 | #pragma ENDASM 288 | error(); 289 | } 290 | 291 | void xrl_a_rn(void) { 292 | printf("XRL_A_RN\n"); 293 | #pragma ASM 294 | push psw 295 | push acc 296 | mov psw,#0H 297 | setb rs0 298 | setb rs1 299 | #pragma ENDASM 300 | 301 | #pragma ASM 302 | mov acc,#0a5H 303 | mov R0,#0f0H 304 | xrl A,R0 305 | #pragma ENDASM 306 | if (ACC!=0x55) test_status = 0; 307 | 308 | #pragma ASM 309 | pop acc 310 | pop psw 311 | #pragma ENDASM 312 | error(); 313 | } 314 | 315 | void xrl_a_di(void) { 316 | printf("XRL_A_DI\n"); 317 | #pragma ASM 318 | push psw 319 | push acc 320 | mov psw,#0H 321 | setb rs0 322 | setb rs1 323 | #pragma ENDASM 324 | 325 | #pragma ASM 326 | mov acc,#0a5H 327 | mov R3,#0fH 328 | xrl A,0x1b 329 | #pragma ENDASM 330 | if (ACC!=0xaa) test_status = 0; 331 | 332 | #pragma ASM 333 | pop acc 334 | pop psw 335 | #pragma ENDASM 336 | error(); 337 | } 338 | 339 | void xrl_a_ri(void) { 340 | printf("XRL_A_RI\n"); 341 | #pragma ASM 342 | push psw 343 | push acc 344 | mov psw,#0H 345 | setb rs0 346 | setb rs1 347 | #pragma ENDASM 348 | 349 | #pragma ASM 350 | mov acc,#0a5H 351 | mov R3,#0f0H 352 | mov R1,#0x1b 353 | xrl A,@R1 354 | #pragma ENDASM 355 | if (ACC!=0x55) test_status = 0; 356 | 357 | #pragma ASM 358 | pop acc 359 | pop psw 360 | #pragma ENDASM 361 | error(); 362 | } 363 | 364 | void xrl_a_da(void) { 365 | printf("XRL_A_DA\n"); 366 | #pragma ASM 367 | push psw 368 | push acc 369 | mov psw,#0H 370 | setb rs0 371 | setb rs1 372 | #pragma ENDASM 373 | 374 | #pragma ASM 375 | mov acc,#0a5H 376 | xrl A,#0fH 377 | #pragma ENDASM 378 | if (ACC!=0xaa) test_status = 0; 379 | 380 | #pragma ASM 381 | pop acc 382 | pop psw 383 | #pragma ENDASM 384 | error(); 385 | } 386 | 387 | void xrl_di_a(void) { 388 | printf("XRL_DI_A\n"); 389 | #pragma ASM 390 | push psw 391 | push acc 392 | mov psw,#0H 393 | setb rs0 394 | setb rs1 395 | #pragma ENDASM 396 | 397 | #pragma ASM 398 | mov acc,#0a5H 399 | mov R3,#0fH 400 | xrl 0x1b,A 401 | #pragma ENDASM 402 | if (R(3,3)!=0xaa) test_status = 0; 403 | 404 | #pragma ASM 405 | pop acc 406 | pop psw 407 | #pragma ENDASM 408 | error(); 409 | } 410 | 411 | void xrl_di_da(void) { 412 | printf("XRL_DI_DA\n"); 413 | #pragma ASM 414 | push psw 415 | push acc 416 | mov psw,#0H 417 | setb rs0 418 | setb rs1 419 | #pragma ENDASM 420 | 421 | #pragma ASM 422 | mov R3,#0f0H 423 | xrl 0x1b,#0a5H 424 | #pragma ENDASM 425 | if (R(3,3)!=0x55) test_status = 0; 426 | 427 | #pragma ASM 428 | pop acc 429 | pop psw 430 | #pragma ENDASM 431 | error(); 432 | } 433 | 434 | void clr_a(void) { 435 | printf("CLR_A\n"); 436 | #pragma ASM 437 | push psw 438 | push acc 439 | mov psw,#0H 440 | setb rs0 441 | setb rs1 442 | #pragma ENDASM 443 | 444 | #pragma ASM 445 | mov A,#0ffH 446 | clr A 447 | #pragma ENDASM 448 | if (ACC!=0x0) test_status = 0; 449 | 450 | #pragma ASM 451 | pop acc 452 | pop psw 453 | #pragma ENDASM 454 | error(); 455 | } 456 | 457 | void cpl_a(void) { 458 | printf("CPL_A\n"); 459 | #pragma ASM 460 | push psw 461 | push acc 462 | mov psw,#0H 463 | setb rs0 464 | setb rs1 465 | #pragma ENDASM 466 | 467 | #pragma ASM 468 | mov A,#0a5H 469 | cpl A 470 | #pragma ENDASM 471 | if (ACC!=0x5a) test_status = 0; 472 | 473 | #pragma ASM 474 | pop acc 475 | pop psw 476 | #pragma ENDASM 477 | error(); 478 | } 479 | 480 | void rl_a(void) { 481 | printf("RL_A\n"); 482 | #pragma ASM 483 | push psw 484 | push acc 485 | mov psw,#0H 486 | setb rs0 487 | setb rs1 488 | #pragma ENDASM 489 | 490 | #pragma ASM 491 | mov A,#0a0H 492 | rl A 493 | #pragma ENDASM 494 | if (ACC!=0x41) test_status = 0; 495 | 496 | #pragma ASM 497 | pop acc 498 | pop psw 499 | #pragma ENDASM 500 | error(); 501 | } 502 | 503 | void rlc_a(void) { 504 | printf("RLC_A\n"); 505 | #pragma ASM 506 | push psw 507 | push acc 508 | mov psw,#0H 509 | setb rs0 510 | setb rs1 511 | #pragma ENDASM 512 | 513 | #pragma ASM 514 | mov A,#0a0H 515 | rlc A 516 | #pragma ENDASM 517 | if (ACC!=0x40) test_status = 0; 518 | if (CY!=1) test_status = 0; 519 | 520 | #pragma ASM 521 | pop acc 522 | pop psw 523 | #pragma ENDASM 524 | error(); 525 | } 526 | 527 | void rr_a(void) { 528 | printf("RR_A\n"); 529 | #pragma ASM 530 | push psw 531 | push acc 532 | mov psw,#0H 533 | setb rs0 534 | setb rs1 535 | #pragma ENDASM 536 | 537 | #pragma ASM 538 | mov A,#0e1H 539 | rr A 540 | #pragma ENDASM 541 | if (ACC!=0xf0) test_status = 0; 542 | 543 | #pragma ASM 544 | pop acc 545 | pop psw 546 | #pragma ENDASM 547 | error(); 548 | } 549 | 550 | void rrc_a(void) { 551 | printf("RRC_A\n"); 552 | #pragma ASM 553 | push psw 554 | push acc 555 | mov psw,#0H 556 | setb rs0 557 | setb rs1 558 | #pragma ENDASM 559 | 560 | #pragma ASM 561 | mov A,#0e1H 562 | rrc A 563 | #pragma ENDASM 564 | if (ACC!=0x70) test_status = 0; 565 | if (CY!=1) test_status = 0; 566 | 567 | #pragma ASM 568 | pop acc 569 | pop psw 570 | #pragma ENDASM 571 | error(); 572 | } 573 | 574 | void swap_a(void) { 575 | printf("SWAP_A\n"); 576 | #pragma ASM 577 | push psw 578 | push acc 579 | mov psw,#0H 580 | setb rs0 581 | setb rs1 582 | #pragma ENDASM 583 | 584 | #pragma ASM 585 | mov A,#037H 586 | swap A 587 | #pragma ENDASM 588 | if (ACC!=0x73) test_status = 0; 589 | 590 | #pragma ASM 591 | pop acc 592 | pop psw 593 | #pragma ENDASM 594 | error(); 595 | } 596 | -------------------------------------------------------------------------------- /HELLO/program.LST: -------------------------------------------------------------------------------- 1 | C51 COMPILER V9.52.0.0 PROGRAM 07/21/2014 16:39:33 PAGE 1 2 | 3 | 4 | C51 COMPILER V9.52.0.0, COMPILATION OF MODULE PROGRAM 5 | NO OBJECT MODULE REQUESTED 6 | COMPILER INVOKED BY: C:\myprog\Keil\C51\BIN\C51.EXE program.c BROWSE DEBUG OBJECTEXTEND TABS(2) SRC(.\program.SRC) 7 | 8 | line level source 9 | 10 | 1 #include 11 | 2 #include 12 | 3 #include "instruction.h" 13 | 4 14 | 5 void acall_func(void) { 15 | 6 1 printf("ACALL_FUNC\n"); 16 | 7 1 #pragma ASM 17 | 8 1 push psw 18 | 9 1 push acc 19 | 10 1 mov psw,#0H 20 | 11 1 setb rs0 21 | 12 1 setb rs1 22 | 13 1 #pragma ENDASM 23 | 14 1 24 | 15 1 #pragma ASM 25 | 16 1 mov A,SP 26 | 17 1 acall JUMP_ACALL 27 | 18 1 jmp EXIT_ACALL 28 | 19 1 nop 29 | 20 1 nop 30 | 21 1 nop 31 | 22 1 JUMP_ACALL: inc A 32 | 23 1 inc A 33 | 24 1 mov B,SP 34 | 25 1 ret 35 | 26 1 nop 36 | 27 1 nop 37 | 28 1 EXIT_ACALL: nop 38 | 29 1 #pragma ENDASM 39 | 30 1 if (ACC!=B) test_status = 0; 40 | 31 1 if (SP!=(B-2)) test_status=0; 41 | 32 1 42 | 33 1 #pragma ASM 43 | 34 1 pop acc 44 | 35 1 pop psw 45 | 36 1 #pragma ENDASM 46 | 37 1 error(); 47 | 38 1 } 48 | 39 49 | 40 void lcall_func(void) { 50 | 41 1 printf("LCALL_FUNC\n"); 51 | 42 1 #pragma ASM 52 | 43 1 push psw 53 | 44 1 push acc 54 | 45 1 mov psw,#0H 55 | 46 1 setb rs0 56 | 47 1 setb rs1 57 | 48 1 #pragma ENDASM 58 | 49 1 59 | 50 1 #pragma ASM 60 | 51 1 mov A,SP 61 | 52 1 lcall JUMP_LCALL 62 | 53 1 jmp EXIT_LCALL 63 | 54 1 nop 64 | 55 1 nop 65 | C51 COMPILER V9.52.0.0 PROGRAM 07/21/2014 16:39:33 PAGE 2 66 | 67 | 56 1 nop 68 | 57 1 JUMP_LCALL: inc A 69 | 58 1 inc A 70 | 59 1 mov B,SP 71 | 60 1 ret 72 | 61 1 nop 73 | 62 1 nop 74 | 63 1 EXIT_LCALL: nop 75 | 64 1 #pragma ENDASM 76 | 65 1 if (ACC!=B) test_status = 0; 77 | 66 1 if (SP!=(B-2)) test_status=0; 78 | 67 1 79 | 68 1 #pragma ASM 80 | 69 1 pop acc 81 | 70 1 pop psw 82 | 71 1 #pragma ENDASM 83 | 72 1 error(); 84 | 73 1 } 85 | 74 86 | 75 87 | 76 void ret_func(void) { 88 | 77 1 printf("RET_FUNC\n"); 89 | 78 1 #pragma ASM 90 | 79 1 push psw 91 | 80 1 push acc 92 | 81 1 mov psw,#0H 93 | 82 1 setb rs0 94 | 83 1 setb rs1 95 | 84 1 #pragma ENDASM 96 | 85 1 97 | 86 1 #pragma ASM 98 | 87 1 lcall JUMP_RET 99 | 88 1 mov B,SP 100 | 89 1 inc B 101 | 90 1 inc B 102 | 91 1 jmp EXIT_RET 103 | 92 1 nop 104 | 93 1 nop 105 | 94 1 nop 106 | 95 1 JUMP_RET: mov A,SP 107 | 96 1 ret 108 | 97 1 nop 109 | 98 1 nop 110 | 99 1 EXIT_RET: nop 111 | 100 1 #pragma ENDASM 112 | 101 1 if (ACC!=B) test_status = 0; 113 | 102 1 114 | 103 1 #pragma ASM 115 | 104 1 pop acc 116 | 105 1 pop psw 117 | 106 1 #pragma ENDASM 118 | 107 1 error(); 119 | 108 1 } 120 | 109 121 | 110 void reti_func(void) { 122 | 111 1 printf("RETI_FUNC\n"); 123 | 112 1 #pragma ASM 124 | 113 1 push psw 125 | 114 1 push acc 126 | 115 1 mov psw,#0H 127 | 116 1 setb rs0 128 | 117 1 setb rs1 129 | C51 COMPILER V9.52.0.0 PROGRAM 07/21/2014 16:39:33 PAGE 3 130 | 131 | 118 1 #pragma ENDASM 132 | 119 1 133 | 120 1 #pragma ASM 134 | 121 1 lcall JUMP_RETI 135 | 122 1 mov B,SP 136 | 123 1 inc B 137 | 124 1 inc B 138 | 125 1 jmp EXIT_RETI 139 | 126 1 nop 140 | 127 1 nop 141 | 128 1 nop 142 | 129 1 JUMP_RETI: mov A,SP 143 | 130 1 reti 144 | 131 1 nop 145 | 132 1 nop 146 | 133 1 EXIT_RETI: nop 147 | 134 1 #pragma ENDASM 148 | 135 1 if (ACC!=B) test_status = 0; 149 | 136 1 150 | 137 1 #pragma ASM 151 | 138 1 pop acc 152 | 139 1 pop psw 153 | 140 1 #pragma ENDASM 154 | 141 1 error(); 155 | 142 1 } 156 | 143 157 | 144 void ajmp_func(void) { 158 | 145 1 printf("AJMP_FUNC\n"); 159 | 146 1 #pragma ASM 160 | 147 1 push psw 161 | 148 1 push acc 162 | 149 1 mov psw,#0H 163 | 150 1 setb rs0 164 | 151 1 setb rs1 165 | 152 1 #pragma ENDASM 166 | 153 1 167 | 154 1 #pragma ASM 168 | 155 1 clr A 169 | 156 1 ajmp EXIT_AJMP 170 | 157 1 mov A,#0ffH 171 | 158 1 EXIT_AJMP: nop 172 | 159 1 #pragma ENDASM 173 | 160 1 if (ACC!=0) test_status = 0; 174 | 161 1 175 | 162 1 #pragma ASM 176 | 163 1 pop acc 177 | 164 1 pop psw 178 | 165 1 #pragma ENDASM 179 | 166 1 error(); 180 | 167 1 } 181 | 168 void sjmp_func(void) { 182 | 169 1 printf("SJMP_FUNC\n"); 183 | 170 1 #pragma ASM 184 | 171 1 push psw 185 | 172 1 push acc 186 | 173 1 mov psw,#0H 187 | 174 1 setb rs0 188 | 175 1 setb rs1 189 | 176 1 #pragma ENDASM 190 | 177 1 191 | 178 1 #pragma ASM 192 | 179 1 clr A 193 | C51 COMPILER V9.52.0.0 PROGRAM 07/21/2014 16:39:33 PAGE 4 194 | 195 | 180 1 sjmp EXIT_SJMP 196 | 181 1 mov A,#0ffH 197 | 182 1 EXIT_SJMP: nop 198 | 183 1 #pragma ENDASM 199 | 184 1 if (ACC!=0) test_status = 0; 200 | 185 1 201 | 186 1 #pragma ASM 202 | 187 1 pop acc 203 | 188 1 pop psw 204 | 189 1 #pragma ENDASM 205 | 190 1 error(); 206 | 191 1 } 207 | 192 208 | 193 void jmp_func(void) { 209 | 194 1 printf("JMP_FUNC\n"); 210 | 195 1 #pragma ASM 211 | 196 1 push psw 212 | 197 1 push acc 213 | 198 1 mov psw,#0H 214 | 199 1 setb rs0 215 | 200 1 setb rs1 216 | 201 1 #pragma ENDASM 217 | 202 1 218 | 203 1 #pragma ASM 219 | 204 1 mov B,#00H 220 | 205 1 mov DPTR,#EXIT_JMP 221 | 206 1 inc DPTR 222 | 207 1 mov A,#0ffH 223 | 208 1 jmp @A+DPTR 224 | 209 1 mov A,#0ffH 225 | 210 1 EXIT_JMP: nop 226 | 211 1 #pragma ENDASM 227 | 212 1 if (B!=0) test_status = 0; 228 | 213 1 229 | 214 1 #pragma ASM 230 | 215 1 pop acc 231 | 216 1 pop psw 232 | 217 1 #pragma ENDASM 233 | 218 1 error(); 234 | 219 1 } 235 | 220 236 | 221 void jz_func(void) { 237 | 222 1 printf("JZ_FUNC\n"); 238 | 223 1 #pragma ASM 239 | 224 1 push psw 240 | 225 1 push acc 241 | 226 1 mov psw,#0H 242 | 227 1 setb rs0 243 | 228 1 setb rs1 244 | 229 1 #pragma ENDASM 245 | 230 1 246 | 231 1 #pragma ASM 247 | 232 1 mov B,#0H 248 | 233 1 mov A,#0ffH 249 | 234 1 jz EXIT_JZ 250 | 235 1 mov B,#0ffH 251 | 236 1 clr A 252 | 237 1 JZ EXIT_JZ 253 | 238 1 nop 254 | 239 1 nop 255 | 240 1 mov B,#0H 256 | 241 1 nop 257 | C51 COMPILER V9.52.0.0 PROGRAM 07/21/2014 16:39:33 PAGE 5 258 | 259 | 242 1 nop 260 | 243 1 EXIT_JZ: nop 261 | 244 1 #pragma ENDASM 262 | 245 1 if (B!=0xff) test_status = 0; 263 | 246 1 264 | 247 1 #pragma ASM 265 | 248 1 pop acc 266 | 249 1 pop psw 267 | 250 1 #pragma ENDASM 268 | 251 1 error(); 269 | 252 1 } 270 | 253 271 | 254 void jnz_func(void) { 272 | 255 1 printf("JNZ_FUNC\n"); 273 | 256 1 #pragma ASM 274 | 257 1 push psw 275 | 258 1 push acc 276 | 259 1 mov psw,#0H 277 | 260 1 setb rs0 278 | 261 1 setb rs1 279 | 262 1 #pragma ENDASM 280 | 263 1 281 | 264 1 #pragma ASM 282 | 265 1 mov B,#0H 283 | 266 1 mov A,#0H 284 | 267 1 jnz EXIT_JNZ 285 | 268 1 mov B,#0ffH 286 | 269 1 inc A 287 | 270 1 JNZ EXIT_JNZ 288 | 271 1 nop 289 | 272 1 nop 290 | 273 1 mov B,#0H 291 | 274 1 nop 292 | 275 1 nop 293 | 276 1 EXIT_JNZ: nop 294 | 277 1 #pragma ENDASM 295 | 278 1 if (B!=0xff) test_status = 0; 296 | 279 1 297 | 280 1 #pragma ASM 298 | 281 1 pop acc 299 | 282 1 pop psw 300 | 283 1 #pragma ENDASM 301 | 284 1 error(); 302 | 285 1 } 303 | 286 304 | 287 void cjne_a_di_rel(void) { 305 | 288 1 printf("CJNE_A_DI_REL\n"); 306 | 289 1 #pragma ASM 307 | 290 1 push psw 308 | 291 1 push acc 309 | 292 1 mov psw,#0H 310 | 293 1 setb rs0 311 | 294 1 setb rs1 312 | 295 1 #pragma ENDASM 313 | 296 1 314 | 297 1 #pragma ASM 315 | 298 1 mov B,#0H 316 | 299 1 mov A,#0H 317 | 300 1 mov 0x20,#0H 318 | 301 1 cjne A,0x20,EXIT_CJNE_A_DI_REL 319 | 302 1 nop 320 | 303 1 mov B,#0ffH 321 | C51 COMPILER V9.52.0.0 PROGRAM 07/21/2014 16:39:33 PAGE 6 322 | 323 | 304 1 inc 0x20 324 | 305 1 cjne A,0x20,EXIT_CJNE_A_DI_REL 325 | 306 1 nop 326 | 307 1 mov B,#0H 327 | 308 1 nop 328 | 309 1 EXIT_CJNE_A_DI_REL: nop 329 | 310 1 #pragma ENDASM 330 | 311 1 if (B!=0xff) test_status = 0; 331 | 312 1 if (CY!=0x1) test_status = 0; 332 | 313 1 333 | 314 1 #pragma ASM 334 | 315 1 pop acc 335 | 316 1 pop psw 336 | 317 1 #pragma ENDASM 337 | 318 1 error(); 338 | 319 1 } 339 | 320 340 | 321 void cjne_a_da_rel(void) { 341 | 322 1 printf("CJNE_A_DA_REL\n"); 342 | 323 1 #pragma ASM 343 | 324 1 push psw 344 | 325 1 push acc 345 | 326 1 mov psw,#0H 346 | 327 1 setb rs0 347 | 328 1 setb rs1 348 | 329 1 #pragma ENDASM 349 | 330 1 350 | 331 1 #pragma ASM 351 | 332 1 mov B,#0H 352 | 333 1 mov A,#035H 353 | 334 1 cjne A,#035H,EXIT_CJNE_A_DA_REL 354 | 335 1 nop 355 | 336 1 mov B,#0ffH 356 | 337 1 cjne A,#036H,EXIT_CJNE_A_DA_REL 357 | 338 1 nop 358 | 339 1 mov B,#0H 359 | 340 1 nop 360 | 341 1 EXIT_CJNE_A_DA_REL: nop 361 | 342 1 #pragma ENDASM 362 | 343 1 if (B!=0xff) test_status = 0; 363 | 344 1 if (CY!=0x1) test_status = 0; 364 | 345 1 365 | 346 1 #pragma ASM 366 | 347 1 pop acc 367 | 348 1 pop psw 368 | 349 1 #pragma ENDASM 369 | 350 1 error(); 370 | 351 1 } 371 | 352 372 | 353 void cjne_rn_da_rel(void) { 373 | 354 1 printf("CJNE_RN_DA_REL\n"); 374 | 355 1 #pragma ASM 375 | 356 1 push psw 376 | 357 1 push acc 377 | 358 1 mov psw,#0H 378 | 359 1 setb rs0 379 | 360 1 setb rs1 380 | 361 1 #pragma ENDASM 381 | 362 1 382 | 363 1 #pragma ASM 383 | 364 1 mov B,#0H 384 | 365 1 mov R7,#035H 385 | C51 COMPILER V9.52.0.0 PROGRAM 07/21/2014 16:39:33 PAGE 7 386 | 387 | 366 1 cjne R7,#035H,EXIT_CJNE_RN_DA_REL 388 | 367 1 nop 389 | 368 1 mov B,#0ffH 390 | 369 1 cjne R7,#036H,EXIT_CJNE_RN_DA_REL 391 | 370 1 nop 392 | 371 1 mov B,#0H 393 | 372 1 nop 394 | 373 1 EXIT_CJNE_RN_DA_REL: nop 395 | 374 1 #pragma ENDASM 396 | 375 1 if (B!=0xff) test_status = 0; 397 | 376 1 if (CY!=0x1) test_status = 0; 398 | 377 1 399 | 378 1 #pragma ASM 400 | 379 1 pop acc 401 | 380 1 pop psw 402 | 381 1 #pragma ENDASM 403 | 382 1 error(); 404 | 383 1 } 405 | 384 406 | 385 void cjne_ri_da_rel(void) { 407 | 386 1 printf("CJNE_RI_DA_REL\n"); 408 | 387 1 #pragma ASM 409 | 388 1 push psw 410 | 389 1 push acc 411 | 390 1 mov psw,#0H 412 | 391 1 setb rs0 413 | 392 1 setb rs1 414 | 393 1 #pragma ENDASM 415 | 394 1 416 | 395 1 #pragma ASM 417 | 396 1 mov B,#0H 418 | 397 1 mov R7,#035H 419 | 398 1 mov R1,#01fH 420 | 399 1 cjne @R1,#035H,EXIT_CJNE_RI_DA_REL 421 | 400 1 nop 422 | 401 1 mov B,#0ffH 423 | 402 1 cjne @R1,#036H,EXIT_CJNE_RI_DA_REL 424 | 403 1 nop 425 | 404 1 mov B,#0H 426 | 405 1 nop 427 | 406 1 EXIT_CJNE_RI_DA_REL: nop 428 | 407 1 #pragma ENDASM 429 | 408 1 if (B!=0xff) test_status = 0; 430 | 409 1 if (CY!=0x1) test_status = 0; 431 | 410 1 432 | 411 1 #pragma ASM 433 | 412 1 pop acc 434 | 413 1 pop psw 435 | 414 1 #pragma ENDASM 436 | 415 1 error(); 437 | 416 1 } 438 | 417 439 | 418 void djnz_rn_rel(void) { 440 | 419 1 printf("DJNZ_RN_REL\n"); 441 | 420 1 #pragma ASM 442 | 421 1 push psw 443 | 422 1 push acc 444 | 423 1 mov psw,#0H 445 | 424 1 setb rs0 446 | 425 1 setb rs1 447 | 426 1 #pragma ENDASM 448 | 427 1 449 | C51 COMPILER V9.52.0.0 PROGRAM 07/21/2014 16:39:33 PAGE 8 450 | 451 | 428 1 #pragma ASM 452 | 429 1 mov B,#0H 453 | 430 1 mov R7,#01H 454 | 431 1 djnz R7,EXIT_DJNZ_RN_REL 455 | 432 1 mov B,#0ffH 456 | 433 1 djnz R7,EXIT_DJNZ_RN_REL 457 | 434 1 nop 458 | 435 1 mov B,#0H 459 | 436 1 nop 460 | 437 1 EXIT_DJNZ_RN_REL: nop 461 | 438 1 #pragma ENDASM 462 | 439 1 if (B!=0xff) test_status = 0; 463 | 440 1 if (R(3,7)!=0xff) test_status = 0; 464 | 441 1 465 | 442 1 #pragma ASM 466 | 443 1 pop acc 467 | 444 1 pop psw 468 | 445 1 #pragma ENDASM 469 | 446 1 error(); 470 | 447 1 } 471 | 448 472 | 449 void djnz_di_rel(void) { 473 | 450 1 printf("DJNZ_DI_REL\n"); 474 | 451 1 #pragma ASM 475 | 452 1 push psw 476 | 453 1 push acc 477 | 454 1 mov psw,#0H 478 | 455 1 setb rs0 479 | 456 1 setb rs1 480 | 457 1 #pragma ENDASM 481 | 458 1 482 | 459 1 #pragma ASM 483 | 460 1 mov B,#0H 484 | 461 1 mov R7,#01H 485 | 462 1 djnz 0x1f,EXIT_DJNZ_DI_REL 486 | 463 1 mov B,#0ffH 487 | 464 1 djnz 0x1f,EXIT_DJNZ_DI_REL 488 | 465 1 nop 489 | 466 1 mov B,#0H 490 | 467 1 nop 491 | 468 1 EXIT_DJNZ_DI_REL: nop 492 | 469 1 #pragma ENDASM 493 | 470 1 if (B!=0xff) test_status = 0; 494 | 471 1 if (R(3,7)!=0xff) test_status = 0; 495 | 472 1 496 | 473 1 #pragma ASM 497 | 474 1 pop acc 498 | 475 1 pop psw 499 | 476 1 #pragma ENDASM 500 | 477 1 error(); 501 | 478 1 } 502 | 479 503 | 504 | 505 | MODULE INFORMATION: STATIC OVERLAYABLE 506 | CODE SIZE = 1170 ---- 507 | CONSTANT SIZE = 184 ---- 508 | XDATA SIZE = ---- ---- 509 | PDATA SIZE = ---- ---- 510 | DATA SIZE = ---- ---- 511 | IDATA SIZE = ---- ---- 512 | BIT SIZE = ---- ---- 513 | C51 COMPILER V9.52.0.0 PROGRAM 07/21/2014 16:39:33 PAGE 9 514 | 515 | END OF MODULE INFORMATION. 516 | 517 | 518 | C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S) 519 | -------------------------------------------------------------------------------- /HELLO/program.OBJ: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/program.OBJ -------------------------------------------------------------------------------- /HELLO/program.__i: -------------------------------------------------------------------------------- 1 | "program.c" BROWSE DEBUG OBJECTEXTEND TABS (2) SRC (.\program.SRC) -------------------------------------------------------------------------------- /HELLO/program.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "instruction.h" 4 | 5 | void acall_func(void) { 6 | printf("ACALL_FUNC\n"); 7 | #pragma ASM 8 | push psw 9 | push acc 10 | mov psw,#0H 11 | setb rs0 12 | setb rs1 13 | #pragma ENDASM 14 | 15 | #pragma ASM 16 | mov A,SP 17 | acall JUMP_ACALL 18 | jmp EXIT_ACALL 19 | nop 20 | nop 21 | nop 22 | JUMP_ACALL: inc A 23 | inc A 24 | mov B,SP 25 | ret 26 | nop 27 | nop 28 | EXIT_ACALL: nop 29 | #pragma ENDASM 30 | if (ACC!=B) test_status = 0; 31 | if (SP!=(B-2)) test_status=0; 32 | 33 | #pragma ASM 34 | pop acc 35 | pop psw 36 | #pragma ENDASM 37 | error(); 38 | } 39 | 40 | void lcall_func(void) { 41 | printf("LCALL_FUNC\n"); 42 | #pragma ASM 43 | push psw 44 | push acc 45 | mov psw,#0H 46 | setb rs0 47 | setb rs1 48 | #pragma ENDASM 49 | 50 | #pragma ASM 51 | mov A,SP 52 | lcall JUMP_LCALL 53 | jmp EXIT_LCALL 54 | nop 55 | nop 56 | nop 57 | JUMP_LCALL: inc A 58 | inc A 59 | mov B,SP 60 | ret 61 | nop 62 | nop 63 | EXIT_LCALL: nop 64 | #pragma ENDASM 65 | if (ACC!=B) test_status = 0; 66 | if (SP!=(B-2)) test_status=0; 67 | 68 | #pragma ASM 69 | pop acc 70 | pop psw 71 | #pragma ENDASM 72 | error(); 73 | } 74 | 75 | 76 | void ret_func(void) { 77 | printf("RET_FUNC\n"); 78 | #pragma ASM 79 | push psw 80 | push acc 81 | mov psw,#0H 82 | setb rs0 83 | setb rs1 84 | #pragma ENDASM 85 | 86 | #pragma ASM 87 | lcall JUMP_RET 88 | mov B,SP 89 | inc B 90 | inc B 91 | jmp EXIT_RET 92 | nop 93 | nop 94 | nop 95 | JUMP_RET: mov A,SP 96 | ret 97 | nop 98 | nop 99 | EXIT_RET: nop 100 | #pragma ENDASM 101 | if (ACC!=B) test_status = 0; 102 | 103 | #pragma ASM 104 | pop acc 105 | pop psw 106 | #pragma ENDASM 107 | error(); 108 | } 109 | 110 | void reti_func(void) { 111 | printf("RETI_FUNC\n"); 112 | #pragma ASM 113 | push psw 114 | push acc 115 | mov psw,#0H 116 | setb rs0 117 | setb rs1 118 | #pragma ENDASM 119 | 120 | #pragma ASM 121 | lcall JUMP_RETI 122 | mov B,SP 123 | inc B 124 | inc B 125 | jmp EXIT_RETI 126 | nop 127 | nop 128 | nop 129 | JUMP_RETI: mov A,SP 130 | reti 131 | nop 132 | nop 133 | EXIT_RETI: nop 134 | #pragma ENDASM 135 | if (ACC!=B) test_status = 0; 136 | 137 | #pragma ASM 138 | pop acc 139 | pop psw 140 | #pragma ENDASM 141 | error(); 142 | } 143 | 144 | void ajmp_func(void) { 145 | printf("AJMP_FUNC\n"); 146 | #pragma ASM 147 | push psw 148 | push acc 149 | mov psw,#0H 150 | setb rs0 151 | setb rs1 152 | #pragma ENDASM 153 | 154 | #pragma ASM 155 | clr A 156 | ajmp EXIT_AJMP 157 | mov A,#0ffH 158 | EXIT_AJMP: nop 159 | #pragma ENDASM 160 | if (ACC!=0) test_status = 0; 161 | 162 | #pragma ASM 163 | pop acc 164 | pop psw 165 | #pragma ENDASM 166 | error(); 167 | } 168 | void sjmp_func(void) { 169 | printf("SJMP_FUNC\n"); 170 | #pragma ASM 171 | push psw 172 | push acc 173 | mov psw,#0H 174 | setb rs0 175 | setb rs1 176 | #pragma ENDASM 177 | 178 | #pragma ASM 179 | clr A 180 | sjmp EXIT_SJMP 181 | mov A,#0ffH 182 | EXIT_SJMP: nop 183 | #pragma ENDASM 184 | if (ACC!=0) test_status = 0; 185 | 186 | #pragma ASM 187 | pop acc 188 | pop psw 189 | #pragma ENDASM 190 | error(); 191 | } 192 | 193 | void jmp_func(void) { 194 | printf("JMP_FUNC\n"); 195 | #pragma ASM 196 | push psw 197 | push acc 198 | mov psw,#0H 199 | setb rs0 200 | setb rs1 201 | #pragma ENDASM 202 | 203 | #pragma ASM 204 | mov B,#00H 205 | mov DPTR,#EXIT_JMP 206 | inc DPTR 207 | mov A,#0ffH 208 | jmp @A+DPTR 209 | mov A,#0ffH 210 | EXIT_JMP: nop 211 | #pragma ENDASM 212 | if (B!=0) test_status = 0; 213 | 214 | #pragma ASM 215 | pop acc 216 | pop psw 217 | #pragma ENDASM 218 | error(); 219 | } 220 | 221 | void jz_func(void) { 222 | printf("JZ_FUNC\n"); 223 | #pragma ASM 224 | push psw 225 | push acc 226 | mov psw,#0H 227 | setb rs0 228 | setb rs1 229 | #pragma ENDASM 230 | 231 | #pragma ASM 232 | mov B,#0H 233 | mov A,#0ffH 234 | jz EXIT_JZ 235 | mov B,#0ffH 236 | clr A 237 | JZ EXIT_JZ 238 | nop 239 | nop 240 | mov B,#0H 241 | nop 242 | nop 243 | EXIT_JZ: nop 244 | #pragma ENDASM 245 | if (B!=0xff) test_status = 0; 246 | 247 | #pragma ASM 248 | pop acc 249 | pop psw 250 | #pragma ENDASM 251 | error(); 252 | } 253 | 254 | void jnz_func(void) { 255 | printf("JNZ_FUNC\n"); 256 | #pragma ASM 257 | push psw 258 | push acc 259 | mov psw,#0H 260 | setb rs0 261 | setb rs1 262 | #pragma ENDASM 263 | 264 | #pragma ASM 265 | mov B,#0H 266 | mov A,#0H 267 | jnz EXIT_JNZ 268 | mov B,#0ffH 269 | inc A 270 | JNZ EXIT_JNZ 271 | nop 272 | nop 273 | mov B,#0H 274 | nop 275 | nop 276 | EXIT_JNZ: nop 277 | #pragma ENDASM 278 | if (B!=0xff) test_status = 0; 279 | 280 | #pragma ASM 281 | pop acc 282 | pop psw 283 | #pragma ENDASM 284 | error(); 285 | } 286 | 287 | void cjne_a_di_rel(void) { 288 | printf("CJNE_A_DI_REL\n"); 289 | #pragma ASM 290 | push psw 291 | push acc 292 | mov psw,#0H 293 | setb rs0 294 | setb rs1 295 | #pragma ENDASM 296 | 297 | #pragma ASM 298 | mov B,#0H 299 | mov A,#0H 300 | mov 0x20,#0H 301 | cjne A,0x20,EXIT_CJNE_A_DI_REL 302 | nop 303 | mov B,#0ffH 304 | inc 0x20 305 | cjne A,0x20,EXIT_CJNE_A_DI_REL 306 | nop 307 | mov B,#0H 308 | nop 309 | EXIT_CJNE_A_DI_REL: nop 310 | #pragma ENDASM 311 | if (B!=0xff) test_status = 0; 312 | if (CY!=0x1) test_status = 0; 313 | 314 | #pragma ASM 315 | pop acc 316 | pop psw 317 | #pragma ENDASM 318 | error(); 319 | } 320 | 321 | void cjne_a_da_rel(void) { 322 | printf("CJNE_A_DA_REL\n"); 323 | #pragma ASM 324 | push psw 325 | push acc 326 | mov psw,#0H 327 | setb rs0 328 | setb rs1 329 | #pragma ENDASM 330 | 331 | #pragma ASM 332 | mov B,#0H 333 | mov A,#035H 334 | cjne A,#035H,EXIT_CJNE_A_DA_REL 335 | nop 336 | mov B,#0ffH 337 | cjne A,#036H,EXIT_CJNE_A_DA_REL 338 | nop 339 | mov B,#0H 340 | nop 341 | EXIT_CJNE_A_DA_REL: nop 342 | #pragma ENDASM 343 | if (B!=0xff) test_status = 0; 344 | if (CY!=0x1) test_status = 0; 345 | 346 | #pragma ASM 347 | pop acc 348 | pop psw 349 | #pragma ENDASM 350 | error(); 351 | } 352 | 353 | void cjne_rn_da_rel(void) { 354 | printf("CJNE_RN_DA_REL\n"); 355 | #pragma ASM 356 | push psw 357 | push acc 358 | mov psw,#0H 359 | setb rs0 360 | setb rs1 361 | #pragma ENDASM 362 | 363 | #pragma ASM 364 | mov B,#0H 365 | mov R7,#035H 366 | cjne R7,#035H,EXIT_CJNE_RN_DA_REL 367 | nop 368 | mov B,#0ffH 369 | cjne R7,#036H,EXIT_CJNE_RN_DA_REL 370 | nop 371 | mov B,#0H 372 | nop 373 | EXIT_CJNE_RN_DA_REL: nop 374 | #pragma ENDASM 375 | if (B!=0xff) test_status = 0; 376 | if (CY!=0x1) test_status = 0; 377 | 378 | #pragma ASM 379 | pop acc 380 | pop psw 381 | #pragma ENDASM 382 | error(); 383 | } 384 | 385 | void cjne_ri_da_rel(void) { 386 | printf("CJNE_RI_DA_REL\n"); 387 | #pragma ASM 388 | push psw 389 | push acc 390 | mov psw,#0H 391 | setb rs0 392 | setb rs1 393 | #pragma ENDASM 394 | 395 | #pragma ASM 396 | mov B,#0H 397 | mov R7,#035H 398 | mov R1,#01fH 399 | cjne @R1,#035H,EXIT_CJNE_RI_DA_REL 400 | nop 401 | mov B,#0ffH 402 | cjne @R1,#036H,EXIT_CJNE_RI_DA_REL 403 | nop 404 | mov B,#0H 405 | nop 406 | EXIT_CJNE_RI_DA_REL: nop 407 | #pragma ENDASM 408 | if (B!=0xff) test_status = 0; 409 | if (CY!=0x1) test_status = 0; 410 | 411 | #pragma ASM 412 | pop acc 413 | pop psw 414 | #pragma ENDASM 415 | error(); 416 | } 417 | 418 | void djnz_rn_rel(void) { 419 | printf("DJNZ_RN_REL\n"); 420 | #pragma ASM 421 | push psw 422 | push acc 423 | mov psw,#0H 424 | setb rs0 425 | setb rs1 426 | #pragma ENDASM 427 | 428 | #pragma ASM 429 | mov B,#0H 430 | mov R7,#01H 431 | djnz R7,EXIT_DJNZ_RN_REL 432 | mov B,#0ffH 433 | djnz R7,EXIT_DJNZ_RN_REL 434 | nop 435 | mov B,#0H 436 | nop 437 | EXIT_DJNZ_RN_REL: nop 438 | #pragma ENDASM 439 | if (B!=0xff) test_status = 0; 440 | if (R(3,7)!=0xff) test_status = 0; 441 | 442 | #pragma ASM 443 | pop acc 444 | pop psw 445 | #pragma ENDASM 446 | error(); 447 | } 448 | 449 | void djnz_di_rel(void) { 450 | printf("DJNZ_DI_REL\n"); 451 | #pragma ASM 452 | push psw 453 | push acc 454 | mov psw,#0H 455 | setb rs0 456 | setb rs1 457 | #pragma ENDASM 458 | 459 | #pragma ASM 460 | mov B,#0H 461 | mov R7,#01H 462 | djnz 0x1f,EXIT_DJNZ_DI_REL 463 | mov B,#0ffH 464 | djnz 0x1f,EXIT_DJNZ_DI_REL 465 | nop 466 | mov B,#0H 467 | nop 468 | EXIT_DJNZ_DI_REL: nop 469 | #pragma ENDASM 470 | if (B!=0xff) test_status = 0; 471 | if (R(3,7)!=0xff) test_status = 0; 472 | 473 | #pragma ASM 474 | pop acc 475 | pop psw 476 | #pragma ENDASM 477 | error(); 478 | } 479 | 480 | -------------------------------------------------------------------------------- /HELLO/transfer.OBJ: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/HELLO/transfer.OBJ -------------------------------------------------------------------------------- /HELLO/transfer.__i: -------------------------------------------------------------------------------- 1 | "transfer.c" BROWSE DEBUG OBJECTEXTEND TABS (2) SRC (.\transfer.SRC) -------------------------------------------------------------------------------- /HELLO/transfer.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "instruction.h" 4 | 5 | void mov_a_rn(void) { 6 | printf("MOV_A_RN\n"); 7 | #pragma ASM 8 | push psw 9 | push acc 10 | mov psw,#0H 11 | setb rs0 12 | setb rs1 13 | #pragma ENDASM 14 | 15 | #pragma ASM 16 | mov acc,#0a5H 17 | mov R5,#0f0H 18 | mov A,R5 19 | #pragma ENDASM 20 | if (ACC!=0xf0) test_status = 0; 21 | 22 | #pragma ASM 23 | pop acc 24 | pop psw 25 | #pragma ENDASM 26 | error(); 27 | } 28 | 29 | void mov_a_di(void) { 30 | printf("MOV_A_DI\n"); 31 | #pragma ASM 32 | push psw 33 | push acc 34 | mov psw,#0H 35 | setb rs0 36 | setb rs1 37 | #pragma ENDASM 38 | 39 | #pragma ASM 40 | mov acc,#0a5H 41 | mov R5,#0f0H 42 | mov A,0x1d 43 | #pragma ENDASM 44 | if (ACC!=0xf0) test_status = 0; 45 | 46 | #pragma ASM 47 | pop acc 48 | pop psw 49 | #pragma ENDASM 50 | error(); 51 | } 52 | 53 | void mov_a_ri(void) { 54 | printf("MOV_A_RI\n"); 55 | #pragma ASM 56 | push psw 57 | push acc 58 | mov psw,#0H 59 | setb rs0 60 | setb rs1 61 | #pragma ENDASM 62 | 63 | #pragma ASM 64 | mov acc,#0a5H 65 | mov R5,#0f0H 66 | mov R0,#01dH 67 | mov A,@R0 68 | #pragma ENDASM 69 | if (ACC!=0xf0) test_status = 0; 70 | 71 | #pragma ASM 72 | pop acc 73 | pop psw 74 | #pragma ENDASM 75 | error(); 76 | } 77 | 78 | void mov_a_da(void) { 79 | printf("MOV_A_DA\n"); 80 | #pragma ASM 81 | push psw 82 | push acc 83 | mov psw,#0H 84 | setb rs0 85 | setb rs1 86 | #pragma ENDASM 87 | 88 | #pragma ASM 89 | mov A,#0f4H 90 | #pragma ENDASM 91 | if (ACC!=0xf4) test_status = 0; 92 | 93 | #pragma ASM 94 | pop acc 95 | pop psw 96 | #pragma ENDASM 97 | error(); 98 | } 99 | 100 | void mov_rn_a(void) { 101 | printf("MOV_RN_A\n"); 102 | #pragma ASM 103 | push psw 104 | push acc 105 | mov psw,#0H 106 | setb rs0 107 | setb rs1 108 | #pragma ENDASM 109 | 110 | #pragma ASM 111 | mov acc,#038H 112 | mov R5,A 113 | #pragma ENDASM 114 | if (R(3,5)!=0x38) test_status = 0; 115 | 116 | #pragma ASM 117 | pop acc 118 | pop psw 119 | #pragma ENDASM 120 | error(); 121 | } 122 | 123 | void mov_rn_di(void) { 124 | printf("MOV_RN_DI\n"); 125 | #pragma ASM 126 | push psw 127 | push acc 128 | mov psw,#0H 129 | setb rs0 130 | setb rs1 131 | #pragma ENDASM 132 | 133 | #pragma ASM 134 | mov R1,#06aH 135 | mov R5,0x19 136 | #pragma ENDASM 137 | if (R(3,5)!=0x6a) test_status = 0; 138 | 139 | #pragma ASM 140 | pop acc 141 | pop psw 142 | #pragma ENDASM 143 | error(); 144 | } 145 | 146 | void mov_rn_da(void) { 147 | printf("MOV_RN_DA\n"); 148 | #pragma ASM 149 | push psw 150 | push acc 151 | mov psw,#0H 152 | setb rs0 153 | setb rs1 154 | #pragma ENDASM 155 | 156 | #pragma ASM 157 | mov R5,#0f1H 158 | #pragma ENDASM 159 | if (R(3,5)!=0xf1) test_status = 0; 160 | 161 | #pragma ASM 162 | pop acc 163 | pop psw 164 | #pragma ENDASM 165 | error(); 166 | } 167 | 168 | void mov_di_a(void) { 169 | printf("MOV_DI_A\n"); 170 | #pragma ASM 171 | push psw 172 | push acc 173 | mov psw,#0H 174 | setb rs0 175 | setb rs1 176 | #pragma ENDASM 177 | 178 | #pragma ASM 179 | mov A,#0dcH 180 | mov 0x1f,A 181 | #pragma ENDASM 182 | if (R(3,7)!=0xdc) test_status = 0; 183 | 184 | #pragma ASM 185 | pop acc 186 | pop psw 187 | #pragma ENDASM 188 | error(); 189 | } 190 | 191 | void mov_di_rn(void) { 192 | printf("MOV_DI_RN\n"); 193 | #pragma ASM 194 | push psw 195 | push acc 196 | mov psw,#0H 197 | setb rs0 198 | setb rs1 199 | #pragma ENDASM 200 | 201 | #pragma ASM 202 | mov R4,#0dcH 203 | mov 0x1f,R4 204 | #pragma ENDASM 205 | if (R(3,7)!=0xdc) test_status = 0; 206 | 207 | #pragma ASM 208 | pop acc 209 | pop psw 210 | #pragma ENDASM 211 | error(); 212 | } 213 | 214 | void mov_di_di(void) { 215 | printf("MOV_DI_DI\n"); 216 | #pragma ASM 217 | push psw 218 | push acc 219 | mov psw,#0H 220 | setb rs0 221 | setb rs1 222 | #pragma ENDASM 223 | 224 | #pragma ASM 225 | mov R4,#016H 226 | mov 0x1f,0x1c 227 | #pragma ENDASM 228 | if (R(3,7)!=0x16) test_status = 0; 229 | 230 | #pragma ASM 231 | pop acc 232 | pop psw 233 | #pragma ENDASM 234 | error(); 235 | } 236 | 237 | void mov_di_ri(void) { 238 | printf("MOV_DI_RI\n"); 239 | #pragma ASM 240 | push psw 241 | push acc 242 | mov psw,#0H 243 | setb rs0 244 | setb rs1 245 | #pragma ENDASM 246 | 247 | #pragma ASM 248 | mov R4,#047H 249 | mov R1,#01cH 250 | mov 0x1f,@R1 251 | #pragma ENDASM 252 | if (R(3,7)!=0x47) test_status = 0; 253 | 254 | #pragma ASM 255 | pop acc 256 | pop psw 257 | #pragma ENDASM 258 | error(); 259 | } 260 | 261 | void mov_di_da(void) { 262 | printf("MOV_DI_DA\n"); 263 | #pragma ASM 264 | push psw 265 | push acc 266 | mov psw,#0H 267 | setb rs0 268 | setb rs1 269 | #pragma ENDASM 270 | 271 | #pragma ASM 272 | mov 0x1f,#0abH 273 | #pragma ENDASM 274 | if (R(3,7)!=0xab) test_status = 0; 275 | 276 | #pragma ASM 277 | pop acc 278 | pop psw 279 | #pragma ENDASM 280 | error(); 281 | } 282 | 283 | void mov_ri_a(void) { 284 | printf("MOV_RI_A\n"); 285 | #pragma ASM 286 | push psw 287 | push acc 288 | mov psw,#0H 289 | setb rs0 290 | setb rs1 291 | #pragma ENDASM 292 | 293 | #pragma ASM 294 | mov A,#05fH 295 | mov R0,#1eH 296 | mov @R0,A 297 | #pragma ENDASM 298 | if (R(3,6)!=0x5f) test_status = 0; 299 | 300 | #pragma ASM 301 | pop acc 302 | pop psw 303 | #pragma ENDASM 304 | error(); 305 | } 306 | 307 | void mov_ri_di(void) { 308 | printf("MOV_RI_DI\n"); 309 | #pragma ASM 310 | push psw 311 | push acc 312 | mov psw,#0H 313 | setb rs0 314 | setb rs1 315 | #pragma ENDASM 316 | 317 | #pragma ASM 318 | mov R7,#033H 319 | mov R0,#1eH 320 | mov @R0,0x1f 321 | #pragma ENDASM 322 | if (R(3,6)!=0x33) test_status = 0; 323 | 324 | #pragma ASM 325 | pop acc 326 | pop psw 327 | #pragma ENDASM 328 | error(); 329 | } 330 | 331 | void mov_ri_da(void) { 332 | printf("MOV_RI_DA\n"); 333 | #pragma ASM 334 | push psw 335 | push acc 336 | mov psw,#0H 337 | setb rs0 338 | setb rs1 339 | #pragma ENDASM 340 | 341 | #pragma ASM 342 | mov R0,#1eH 343 | mov @R0,#09aH 344 | #pragma ENDASM 345 | if (R(3,6)!=0x9a) test_status = 0; 346 | 347 | #pragma ASM 348 | pop acc 349 | pop psw 350 | #pragma ENDASM 351 | error(); 352 | } 353 | 354 | void mov_dp_da(void) { 355 | printf("MOV_DP_DA\n"); 356 | #pragma ASM 357 | push psw 358 | push acc 359 | mov psw,#0H 360 | setb rs0 361 | setb rs1 362 | #pragma ENDASM 363 | 364 | #pragma ASM 365 | mov DPTR,#781eH 366 | #pragma ENDASM 367 | if (DPL!=0x1e) test_status = 0; 368 | if (DPH!=0x78) test_status = 0; 369 | 370 | #pragma ASM 371 | pop acc 372 | pop psw 373 | #pragma ENDASM 374 | error(); 375 | } 376 | void movc_a_dp(void) { 377 | printf("MOVC_A_DP\n"); 378 | #pragma ASM 379 | push psw 380 | push acc 381 | mov psw,#0H 382 | setb rs0 383 | setb rs1 384 | #pragma ENDASM 385 | 386 | #pragma ASM 387 | clr A 388 | mov DPTR,#POINT_MOVC_A_DP 389 | movc A,@A+DPTR 390 | JMP EXIT_MOVC_A_DP 391 | NOP 392 | NOP 393 | POINT_MOVC_A_DP: DB 78H 394 | NOP 395 | NOP 396 | EXIT_MOVC_A_DP: NOP 397 | #pragma ENDASM 398 | if (ACC!=0x78) test_status = 0; 399 | 400 | #pragma ASM 401 | pop acc 402 | pop psw 403 | #pragma ENDASM 404 | error(); 405 | } 406 | 407 | void movc_a_pc(void) { 408 | printf("MOVC_A_PC\n"); 409 | #pragma ASM 410 | push psw 411 | push acc 412 | mov psw,#0H 413 | setb rs0 414 | setb rs1 415 | #pragma ENDASM 416 | 417 | #pragma ASM 418 | mov A,#4H 419 | movc A,@A+PC 420 | SJMP EXIT_MOVC_A_PC 421 | NOP 422 | NOP 423 | DB 53H 424 | NOP 425 | NOP 426 | EXIT_MOVC_A_PC: NOP 427 | #pragma ENDASM 428 | if (ACC!=0x53) test_status = 0; 429 | 430 | #pragma ASM 431 | pop acc 432 | pop psw 433 | #pragma ENDASM 434 | error(); 435 | } 436 | 437 | void movx_a_ri(void) { 438 | printf("MOVX_A_RI\n"); 439 | #pragma ASM 440 | push psw 441 | push acc 442 | mov psw,#0H 443 | setb rs0 444 | setb rs1 445 | #pragma ENDASM 446 | 447 | #pragma ASM 448 | mov R0,#0H 449 | mov acc,#95H 450 | movx @R0,A 451 | clr A 452 | movx A,@R0 453 | #pragma ENDASM 454 | if (ACC!=0x95) test_status = 0; 455 | 456 | #pragma ASM 457 | pop acc 458 | pop psw 459 | #pragma ENDASM 460 | error(); 461 | } 462 | 463 | void movx_a_dp(void) { 464 | printf("MOVX_A_DP\n"); 465 | #pragma ASM 466 | push psw 467 | push acc 468 | mov psw,#0H 469 | setb rs0 470 | setb rs1 471 | #pragma ENDASM 472 | 473 | #pragma ASM 474 | mov DPTR,#0001H 475 | mov acc,#3dH 476 | movx @DPTR,A 477 | clr A 478 | movx A,@DPTR 479 | #pragma ENDASM 480 | if (ACC!=0x3d) test_status = 0; 481 | 482 | #pragma ASM 483 | pop acc 484 | pop psw 485 | #pragma ENDASM 486 | error(); 487 | } 488 | 489 | void movx_ri_a(void) { 490 | printf("MOVX_RI_A\n"); 491 | #pragma ASM 492 | push psw 493 | push acc 494 | mov psw,#0H 495 | setb rs0 496 | setb rs1 497 | #pragma ENDASM 498 | 499 | #pragma ASM 500 | mov R0,#0H 501 | mov acc,#95H 502 | movx @R0,A 503 | clr A 504 | movx A,@R0 505 | #pragma ENDASM 506 | if (ACC!=0x95) test_status = 0; 507 | 508 | #pragma ASM 509 | pop acc 510 | pop psw 511 | #pragma ENDASM 512 | error(); 513 | } 514 | 515 | void movx_dp_a(void) { 516 | printf("MOVX_DP_A\n"); 517 | #pragma ASM 518 | push psw 519 | push acc 520 | mov psw,#0H 521 | setb rs0 522 | setb rs1 523 | #pragma ENDASM 524 | 525 | #pragma ASM 526 | mov DPTR,#0001H 527 | mov acc,#3dH 528 | movx @DPTR,A 529 | clr A 530 | movx A,@DPTR 531 | #pragma ENDASM 532 | if (ACC!=0x3d) test_status = 0; 533 | 534 | #pragma ASM 535 | pop acc 536 | pop psw 537 | #pragma ENDASM 538 | error(); 539 | } 540 | 541 | void push_di(void) { 542 | printf("PUSH_DI\n"); 543 | #pragma ASM 544 | push psw 545 | push acc 546 | mov psw,#0H 547 | setb rs0 548 | setb rs1 549 | #pragma ENDASM 550 | 551 | #pragma ASM 552 | mov R7,#0edH 553 | mov A,SP 554 | push 0x1f 555 | inc A 556 | mov R0,SP 557 | mov B,@R0 558 | #pragma ENDASM 559 | if (ACC!=SP) test_status = 0; 560 | if (B!=0xed) test_status = 0; 561 | 562 | #pragma ASM 563 | pop 0x1f 564 | pop acc 565 | pop psw 566 | #pragma ENDASM 567 | error(); 568 | } 569 | 570 | void pop_di(void) { 571 | printf("POP_DI\n"); 572 | #pragma ASM 573 | push psw 574 | push acc 575 | mov psw,#0H 576 | setb rs0 577 | setb rs1 578 | #pragma ENDASM 579 | 580 | #pragma ASM 581 | mov R6,#0H 582 | mov R7,#049H 583 | push 0x1f 584 | mov A,SP 585 | pop 0x1e 586 | dec A 587 | #pragma ENDASM 588 | if (ACC!=SP) test_status = 0; 589 | if (R(3,6)!=0x49) test_status = 0; 590 | 591 | #pragma ASM 592 | pop acc 593 | pop psw 594 | #pragma ENDASM 595 | error(); 596 | } 597 | 598 | void xch_a_rn(void) { 599 | printf("XCH_A_RN\n"); 600 | #pragma ASM 601 | push psw 602 | push acc 603 | mov psw,#0H 604 | setb rs0 605 | setb rs1 606 | #pragma ENDASM 607 | 608 | #pragma ASM 609 | mov R7,#22H 610 | mov acc,#0ffH 611 | xch A,R7 612 | #pragma ENDASM 613 | if (ACC!=0x22) test_status = 0; 614 | if (R(3,7)!=0xff) test_status = 0; 615 | 616 | #pragma ASM 617 | pop acc 618 | pop psw 619 | #pragma ENDASM 620 | error(); 621 | } 622 | 623 | void xch_a_di(void) { 624 | printf("XCH_A_DI\n"); 625 | #pragma ASM 626 | push psw 627 | push acc 628 | mov psw,#0H 629 | setb rs0 630 | setb rs1 631 | #pragma ENDASM 632 | 633 | #pragma ASM 634 | mov R6,#54H 635 | mov acc,#088H 636 | xch A,0x1e 637 | #pragma ENDASM 638 | if (ACC!=0x54) test_status = 0; 639 | if (R(3,6)!=0x88) test_status = 0; 640 | 641 | #pragma ASM 642 | pop acc 643 | pop psw 644 | #pragma ENDASM 645 | error(); 646 | } 647 | 648 | void xch_a_ri(void) { 649 | printf("XCH_A_RI\n"); 650 | #pragma ASM 651 | push psw 652 | push acc 653 | mov psw,#0H 654 | setb rs0 655 | setb rs1 656 | #pragma ENDASM 657 | 658 | #pragma ASM 659 | mov R5,#99H 660 | mov acc,#0a1H 661 | mov R1,#1dH 662 | xch A,@R1 663 | #pragma ENDASM 664 | if (ACC!=0x99) test_status = 0; 665 | if (R(3,5)!=0xa1) test_status = 0; 666 | 667 | #pragma ASM 668 | pop acc 669 | pop psw 670 | #pragma ENDASM 671 | error(); 672 | } 673 | 674 | void xchd_a_ri(void) { 675 | printf("XCHD_A_RI\n"); 676 | #pragma ASM 677 | push psw 678 | push acc 679 | mov psw,#0H 680 | setb rs0 681 | setb rs1 682 | #pragma ENDASM 683 | 684 | #pragma ASM 685 | mov R5,#99H 686 | mov acc,#0a1H 687 | mov R1,#1dH 688 | xchd A,@R1 689 | #pragma ENDASM 690 | if (ACC!=0xa9) test_status = 0; 691 | if (R(3,5)!=0x91) test_status = 0; 692 | 693 | #pragma ASM 694 | pop acc 695 | pop psw 696 | #pragma ENDASM 697 | error(); 698 | } 699 | 700 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Apache License 2 | Version 2.0, January 2004 3 | http://www.apache.org/licenses/ 4 | 5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 6 | 7 | 1. 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We also recommend that a 185 | file or class name and description of purpose be included on the 186 | same "printed page" as the copyright notice for easier 187 | identification within third-party archives. 188 | 189 | Copyright [yyyy] [name of copyright owner] 190 | 191 | Licensed under the Apache License, Version 2.0 (the "License"); 192 | you may not use this file except in compliance with the License. 193 | You may obtain a copy of the License at 194 | 195 | http://www.apache.org/licenses/LICENSE-2.0 196 | 197 | Unless required by applicable law or agreed to in writing, software 198 | distributed under the License is distributed on an "AS IS" BASIS, 199 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 200 | See the License for the specific language governing permissions and 201 | limitations under the License. 202 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | R8051 2 | ===== 3 | 4 | Thank you for interesting in this new type of 8051 soft core. This core has only 2 files and the main one has 700 statements to support all 111 instructions of 8051. Yes, I make it with fully synthesizable verilog. 5 | 6 | First of all, please open **rtl/r8051.v** and review it.The another file: **rtl/instruction.v** is an included file which has some verilog functions. These are all RTL files to implementation. 7 | 8 | There is a folder: **Hello** that has 111-instructions compliance tests project. If your have the software "KEIL", you can open this project and check it. You can comment or uncomment any single instruction test and re-compile again. The other folder **sim** has one testbench file: **tb.v**, it is understandable easily for verilog designer. You may compile **tb.v** and **r8051.v** for your verilog simulator. This testbench file will link the compiled binary file of **HELLO** directory to the simulation. Instructions in the binary file will be fetched one by one and be executed. You can open a wave window and drag signals you are instresting in. 9 | 10 | Maybe you are pulsed with how this works. 8051 has 111-instructions and each has 1 or 2 or 3 bytes.This CPU core will fetch 1 byte every clock. There is a 3-byte-long pipiline, named: A, B, C according to time. For 1-byte instrctions, if it is in A, its operand is loaded from memory pool, and the result is stored to memory pool when this instrcution enters B position. For one 2-bytes intruction, when the head byte of it is in the position A, it has enough info for loading operands from memory pool. When the head byte is in B, the tail byte is in A and it is for storing the result to memory pool since all 2 bytes are available. For one 3-bytes instruction, when the head byte is in B , the middle byte is in A and the tail byte is not present, its two operands are being fetched. In the next clock, its two operands are available and all 3 bytes of it are present in "A-B-C" pipeline, which is good for storing the result into the destination. So, one byte by one byte, different-length instructions are executed in this pipeline. 11 | 12 | I made it with an incremental method. As a centipede for example, it has a bulk body and 111 legs. I build the bulk body firstly and give it one leg one time. When all legs are installed, this centipede is finished. In the fold **illustration**, there are several **.v** files. The **r8051_bulk.v** is the bulk body I mentioned and it could not interpret any instruction. It may look ugly but helpful on its structure. Since 111 instruction are divided into five categories(ARITHMETIC/LOGICAL/DATA/BOOLEAN/PROGRAM), the **r8051_0/1/2/3/4.v** is for every category solely and the **r8051_a/b/c/d/e.v** is for building these 5 categories incrementally. 13 | 14 | If you can read Chinese, please refer this: 15 | 16 | ![book Picture](https://github.com/risclite/R8051/blob/master/doc/book.jpg) 17 | 18 | [Amazon Book: How to design 8051-compatiable soft core for FPGA](https://www.amazon.com/dp/B00UH9GLQ6/) 19 | 20 | -------------------------------------------------------------------------------- /doc/8051.docx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/doc/8051.docx -------------------------------------------------------------------------------- /doc/book.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/doc/book.jpg -------------------------------------------------------------------------------- /illustration/instruction.v: -------------------------------------------------------------------------------- 1 | //ARITHMETIC OPERATIONS 2 | //ADD 3 | function add_a_rn(input [7:0] i); add_a_rn = (i[7:3]==5'b00101); endfunction 4 | function add_a_di(input [7:0] i); add_a_di=(i==8'b00100101); endfunction 5 | function add_a_ri(input [7:0] i); add_a_ri=(i[7:1]==7'b0010011); endfunction 6 | function add_a_da(input [7:0] i); add_a_da = (i==8'b00100100); endfunction 7 | //ADDC 8 | function addc_a_rn(input [7:0] i); addc_a_rn = (i[7:3]==5'b00111); endfunction 9 | function addc_a_di(input [7:0] i); addc_a_di = (i==8'b00110101); endfunction 10 | function addc_a_ri(input [7:0] i); addc_a_ri = (i[7:1]==7'b0011011); endfunction 11 | function addc_a_da(input [7:0] i); addc_a_da = (i==8'b00110100); endfunction 12 | //SUBB 13 | function subb_a_rn(input [7:0] i); subb_a_rn=(i[7:3]==5'b10011); endfunction 14 | function subb_a_di(input [7:0] i); subb_a_di=(i==8'b10010101); endfunction 15 | function subb_a_ri(input [7:0] i); subb_a_ri=(i[7:1]==7'b1001011); endfunction 16 | function subb_a_da(input [7:0] i); subb_a_da = (i==8'b10010100); endfunction 17 | //INC 18 | function inc_a (input [7:0] i); inc_a = (i==8'b00000100); endfunction 19 | function inc_rn(input [7:0] i); inc_rn = (i[7:3]==5'b00001); endfunction 20 | function inc_di(input [7:0] i); inc_di = (i==8'b00000101); endfunction 21 | function inc_ri(input [7:0] i); inc_ri = (i[7:1]==7'b0000011); endfunction 22 | function inc_dp(input [7:0] i); inc_dp =(i==8'b10100011); endfunction 23 | //DEC 24 | function dec_a(input [7:0] i); dec_a = (i==8'b00010100); endfunction 25 | function dec_rn(input [7:0] i); dec_rn = (i[7:3]==5'b00011); endfunction 26 | function dec_di(input [7:0] i); dec_di = (i==8'b00010101); endfunction 27 | function dec_ri(input [7:0] i); dec_ri = (i[7:1]==7'b0001011); endfunction 28 | //MUL 29 | function mul(input [7:0] i); mul=(i==8'b10100100); endfunction 30 | //DIV 31 | function div(input [7:0] i); div=(i==8'b10000100); endfunction 32 | //DA 33 | function da(input [7:0] i); da = (i==8'b11010100); endfunction 34 | 35 | //LOGICAL OPERATIONS 36 | //ANL 37 | function anl_a_rn(input [7:0] i); anl_a_rn = (i[7:3]==5'b01011); endfunction 38 | function anl_a_di(input [7:0] i); anl_a_di = (i==8'b01010101); endfunction 39 | function anl_a_ri(input [7:0] i); anl_a_ri = (i[7:1]==7'b0101011); endfunction 40 | function anl_a_da(input [7:0] i); anl_a_da = (i==8'b01010100); endfunction 41 | function anl_di_a(input [7:0] i); anl_di_a = (i==8'b01010010); endfunction 42 | function anl_di_da(input [7:0] i); anl_di_da = (i==8'b01010011); endfunction 43 | //ORL 44 | function orl_a_rn(input [7:0] i); orl_a_rn = (i[7:3]==5'b01001); endfunction 45 | function orl_a_di(input [7:0] i); orl_a_di = (i==8'b01000101); endfunction 46 | function orl_a_ri(input [7:0] i); orl_a_ri = (i[7:1]==7'b0100011); endfunction 47 | function orl_a_da(input [7:0] i); orl_a_da = (i==8'b01000100); endfunction 48 | function orl_di_a(input [7:0] i); orl_di_a=(i==8'b01000010); endfunction 49 | function orl_di_da(input [7:0] i); orl_di_da=(i==8'b01000011); endfunction 50 | //XRL 51 | function xrl_a_rn(input [7:0] i); xrl_a_rn = (i[7:3]==5'b01101); endfunction 52 | function xrl_a_di(input [7:0] i); xrl_a_di = (i==8'b01100101); endfunction 53 | function xrl_a_ri(input [7:0] i); xrl_a_ri = (i[7:1]==7'b0110011); endfunction 54 | function xrl_a_da(input [7:0] i); xrl_a_da = (i==8'b01100100); endfunction 55 | function xrl_di_a(input [7:0] i); xrl_di_a = (i==8'b01100010); endfunction 56 | function xrl_di_da(input [7:0] i); xrl_di_da = (i==8'b01100011); endfunction 57 | //CLR 58 | function clr_a(input [7:0] i); clr_a = (i==8'b11100100); endfunction 59 | //CPL 60 | function cpl_a(input [7:0] i); cpl_a = (i==8'b11110100); endfunction 61 | //RL 62 | function rl(input [7:0] i); rl = (i==8'b00100011); endfunction 63 | //RLC 64 | function rlc(input [7:0] i); rlc = (i==8'b00110011); endfunction 65 | //RR 66 | function rr(input [7:0] i); rr = (i==8'b00000011); endfunction 67 | //RRC 68 | function rrc(input [7:0] i); rrc = (i==8'b00010011); endfunction 69 | //SWAP 70 | function swap(input [7:0] i); swap = (i==8'b11000100); endfunction 71 | 72 | //DATA TRANSFER 73 | //MOV 74 | function mov_a_rn(input [7:0] i); mov_a_rn = (i[7:3]==5'b11101); endfunction 75 | function mov_a_di(input [7:0] i); mov_a_di = (i==8'b11100101); endfunction 76 | function mov_a_ri(input [7:0] i); mov_a_ri = (i[7:1]==7'b1110011); endfunction 77 | function mov_a_da(input [7:0] i); mov_a_da = (i==8'b01110100); endfunction 78 | function mov_rn_a(input [7:0] i); mov_rn_a = (i[7:3]==5'b11111); endfunction 79 | function mov_rn_di(input [7:0] i); mov_rn_di = (i[7:3]==5'b10101); endfunction 80 | function mov_rn_da(input [7:0] i); mov_rn_da = (i[7:3]==5'b01111); endfunction 81 | function mov_di_a(input [7:0] i); mov_di_a = (i==8'b11110101); endfunction 82 | function mov_di_rn(input [7:0] i); mov_di_rn = (i[7:3]==5'b10001); endfunction 83 | function mov_di_di(input [7:0] i); mov_di_di = (i==8'b10000101); endfunction 84 | function mov_di_ri(input [7:0] i); mov_di_ri = (i[7:1]==7'b1000011); endfunction 85 | function mov_di_da(input [7:0] i); mov_di_da = (i==8'b01110101); endfunction 86 | function mov_ri_a(input [7:0] i); mov_ri_a = (i[7:1]==7'b1111011); endfunction 87 | function mov_ri_di(input [7:0] i); mov_ri_di = (i[7:1]==7'b1010011); endfunction 88 | function mov_ri_da(input [7:0] i); mov_ri_da=(i[7:1]==7'b0111011); endfunction 89 | function mov_dp_da(input [7:0] i); mov_dp_da=(i==8'b10010000); endfunction 90 | //MOVC 91 | function movc_a_dp(input [7:0] i); movc_a_dp = (i==8'b10010011); endfunction 92 | function movc_a_pc(input [7:0] i); movc_a_pc = (i==8'b10000011); endfunction 93 | //MOVX 94 | function movx_a_ri(input [7:0] i); movx_a_ri = (i[7:1]==7'b1110001); endfunction 95 | function movx_a_dp(input [7:0] i); movx_a_dp = (i==8'b11100000); endfunction 96 | function movx_ri_a(input [7:0] i); movx_ri_a = (i[7:1]==7'b1111001); endfunction 97 | function movx_dp_a(input [7:0] i); movx_dp_a = (i==8'b11110000); endfunction 98 | //PUSH 99 | function push(input [7:0] i); push = (i==8'b11000000); endfunction 100 | //POP 101 | function pop(input [7:0] i); pop = (i==8'b11010000); endfunction 102 | //XCH 103 | function xch_a_rn(input [7:0] i); xch_a_rn = (i[7:3]==5'b11001); endfunction 104 | function xch_a_di(input [7:0] i); xch_a_di = (i==8'b11000101); endfunction 105 | function xch_a_ri(input [7:0] i); xch_a_ri = (i[7:1]==7'b1100011); endfunction 106 | //XCHD 107 | function xchd(input [7:0] i); xchd = (i[7:1]==7'b1101011); endfunction 108 | 109 | //BOOLEAN VARIABLE MANIPULATION 110 | //CLR 111 | function clr_c(input [7:0] i); clr_c = (i==8'b11000011); endfunction 112 | function clr_bit(input [7:0] i); clr_bit = (i==8'b11000010); endfunction 113 | //SETB 114 | function setb_c(input [7:0] i); setb_c = (i==8'b11010011); endfunction 115 | function setb_bit(input [7:0] i); setb_bit = (i==8'b11010010); endfunction 116 | //CPL 117 | function cpl_c(input [7:0] i); cpl_c = (i==8'b10110011); endfunction 118 | function cpl_bit(input [7:0] i); cpl_bit=(i==8'b10110010); endfunction 119 | //ANL 120 | function anl_c_bit(input [7:0] i); anl_c_bit = (i==8'b10000010); endfunction 121 | function anl_c_nbit(input [7:0] i); anl_c_nbit = (i==8'b10110000); endfunction 122 | //ORL 123 | function orl_c_bit(input [7:0] i); orl_c_bit = (i==8'b01110010); endfunction 124 | function orl_c_nbit(input [7:0] i); orl_c_nbit = (i==8'b10100000); endfunction 125 | //MOV 126 | function mov_c_bit(input [7:0] i); mov_c_bit = (i==8'b10100010); endfunction 127 | function mov_bit_c(input [7:0] i); mov_bit_c = (i==8'b10010010); endfunction 128 | //JC 129 | function jc(input [7:0] i); jc = (i==8'b01000000); endfunction 130 | //JNC 131 | function jnc(input [7:0] i); jnc =(i==8'b01010000); endfunction 132 | //JB 133 | function jb(input [7:0] i); jb = (i==8'b00100000); endfunction 134 | //JNB 135 | function jnb(input [7:0] i); jnb = (i==8'b00110000); endfunction 136 | //JBC 137 | function jbc(input [7:0] i); jbc = (i==8'b00010000); endfunction 138 | 139 | //PROGRAM BRANCHING 140 | //ACALL 141 | function acall(input [7:0] i); acall = (i[4:0]==5'b10001); endfunction 142 | //LCALL 143 | function lcall(input [7:0] i); lcall = (i==8'b00010010); endfunction 144 | //RET 145 | function ret(input [7:0] i); ret = (i==8'b00100010); endfunction 146 | //RETI 147 | function reti(input [7:0] i); reti = (i==8'b00110010); endfunction 148 | //AJMP 149 | function ajmp(input [7:0] i); ajmp = (i[4:0]==5'b00001); endfunction 150 | //LJMP 151 | function ljmp(input [7:0] i); ljmp = (i==8'b00000010); endfunction 152 | //SJMP 153 | function sjmp(input [7:0] i); sjmp = (i==8'b10000000); endfunction 154 | //JMP 155 | function jmp(input [7:0] i); jmp = (i==8'b01110011); endfunction 156 | //JZ 157 | function jz(input [7:0] i); jz = (i==8'b01100000); endfunction 158 | //JNZ 159 | function jnz(input [7:0] i); jnz = (i==8'b01110000); endfunction 160 | //CJNE 161 | function cjne_a_di_rel(input [7:0] i); cjne_a_di_rel = (i==8'b10110101); endfunction 162 | function cjne_a_da_rel(input [7:0] i); cjne_a_da_rel = (i==8'b10110100); endfunction 163 | function cjne_rn_da_rel(input [7:0] i); cjne_rn_da_rel = (i[7:3]==5'b10111); endfunction 164 | function cjne_ri_da_rel(input [7:0] i); cjne_ri_da_rel=(i[7:1]==7'b1011011); endfunction 165 | //DJNZ 166 | function djnz_rn_rel(input [7:0] i); djnz_rn_rel = (i[7:3]==5'b11011); endfunction 167 | function djnz_di_rel(input [7:0] i); djnz_di_rel =(i==8'b11010101); endfunction 168 | //NOP 169 | function nop(input [7:0] i); nop = (i==8'b00000000); endfunction 170 | 171 | 172 | function [15:0] divide ( input [7:0] a, input [7:0] b); 173 | reg [7:0] ans; 174 | reg [7:0] rem; 175 | reg [7:0] x7; 176 | reg [7:0] x6; 177 | reg [7:0] x5; 178 | reg [7:0] x4; 179 | reg [7:0] x3; 180 | reg [7:0] x2; 181 | reg [7:0] x1; 182 | reg [7:0] x0; 183 | 184 | reg [1:0] y5; 185 | reg [2:0] y4; 186 | reg [3:0] y3; 187 | reg [4:0] y2; 188 | reg [5:0] y1; 189 | reg [6:0] y0; 190 | begin 191 | 192 | x7 = a; 193 | ans[7] = (|b[7:1])? 1'b0 : x7[7]; 194 | 195 | x6 = {(~ans[7])&a[7],a[6:0]}; 196 | ans[6] = (|b[7:2])? 1'b0 : (x6[7:6]>=b[1:0]); 197 | 198 | y5 = ans[6] ? (x6[7:6]-b[1:0]) : x6[7:6]; 199 | x5 = { y5, a[5:0] }; 200 | ans[5] = (|b[7:3])? 1'b0 : ( x5[7:5]>=b[2:0] ); 201 | 202 | y4 = ans[5] ? (x5[7:5]-b[2:0]) : x5[7:5]; 203 | x4 = { y4, a[4:0]}; 204 | ans[4] = (|b[7:4])? 1'b0 : ( x4[7:4]>=b[3:0] ); 205 | 206 | y3 = ans[4] ? (x4[7:4]-b[3:0]) : x4[7:4]; 207 | x3 = {y3, a[3:0]}; 208 | ans[3] = (|b[7:5])? 1'b0 : ( x3[7:3]>=b[4:0] ); 209 | 210 | y2 = ans[3] ? (x3[7:3]-b[4:0]) : x3[7:3]; 211 | x2 = {y2,a[2:0]}; 212 | ans[2] = (|b[7:6])? 1'b0 : ( x2[7:2]>=b[5:0] ); 213 | 214 | y1 = ans[2] ? (x2[7:2]-b[5:0]) : x2[7:2]; 215 | x1 = {y1,a[1:0]}; 216 | ans[1] = (|b[7]) ? 1'b0 : ( x1[7:1]>=b[6:0] ); 217 | 218 | y0 = ans[1] ? (x1[7:1]-b[6:0]) : x1[7:1]; 219 | x0 = {y0,a[0]}; 220 | ans[0] = (x0>=b); 221 | 222 | rem = ans[0] ? (x0-b) : x0; 223 | 224 | divide = {rem,ans}; 225 | end 226 | 227 | endfunction 228 | 229 | -------------------------------------------------------------------------------- /illustration/r8051_3.v: -------------------------------------------------------------------------------- 1 | `define TYPE8052 2 | `define DEL 1 3 | module r8051 ( 4 | 5 | input wire clk, 6 | input wire rst, 7 | input wire cpu_en, 8 | input wire cpu_restart, 9 | 10 | output reg rom_en, 11 | output reg [15:0] rom_addr, 12 | input wire [7:0] rom_byte, 13 | 14 | output wire ram_rd_en_data, 15 | output wire ram_rd_en_sfr, 16 | `ifdef TYPE8052 17 | output wire ram_rd_en_idata, 18 | `endif 19 | output wire ram_rd_en_xdata, 20 | output wire [15:0] ram_rd_addr, 21 | input wire [7:0] ram_rd_byte, 22 | input wire ram_rd_vld, 23 | 24 | output wire ram_wr_en_data, 25 | output wire ram_wr_en_sfr, 26 | `ifdef TYPE8052 27 | output wire ram_wr_en_idata, 28 | `endif 29 | output wire ram_wr_en_xdata, 30 | output wire [15:0] ram_wr_addr, 31 | output wire [7:0] ram_wr_byte 32 | 33 | ); 34 | 35 | `include "instruction.v" 36 | 37 | /*********************************************************/ 38 | //register definition 39 | 40 | reg rd_wait; 41 | reg [7:0] cmd1; 42 | reg [7:0] cmd2; 43 | reg [2:0] cmd_flag; 44 | reg [15:0] pc; 45 | reg [7:0] acc; 46 | reg psw_ov; 47 | reg psw_ac; 48 | reg psw_c; 49 | reg [3:0] psw_other; 50 | reg [15:0] dp; 51 | reg [7:0] sp; 52 | reg [7:0] b; 53 | reg same_flag; 54 | reg [7:0] same_byte; 55 | reg [7:0] data1; 56 | 57 | 58 | /*********************************************************/ 59 | //wire definition 60 | 61 | wire work_en; 62 | wire [7:0] cmd0; 63 | wire [7:0] cmda; 64 | wire [7:0] cmdb; 65 | wire [7:0] cmdc; 66 | reg pc_en; 67 | wire [15:0] pc_add1; 68 | wire [15:0] code_base; 69 | wire [15:0] code_rel; 70 | wire [15:0] code_addr; 71 | wire length1; 72 | wire length2r1; 73 | wire length2; 74 | wire length3; 75 | wire rd_en_data_sfr; 76 | wire rd_en_data_idata; 77 | wire rd_en_xdata; 78 | wire rd_en_data; 79 | wire rd_en_sfr; 80 | `ifdef TYPE8052 81 | wire rd_en_idata; 82 | `endif 83 | wire same_flag_data; 84 | wire same_flag_sfr; 85 | `ifdef TYPE8052 86 | wire same_flag_idata; 87 | `endif 88 | wire same_flag_xdata; 89 | wire read_internal; 90 | reg [15:0] rd_addr; 91 | wire use_psw_rs; 92 | wire use_dp; 93 | wire use_acc; 94 | wire use_sp; 95 | wire wait_en; 96 | wire wr_en_data_sfr; 97 | wire wr_en_data_idata; 98 | wire wr_en_xdata; 99 | wire wr_en_data; 100 | wire wr_en_sfr; 101 | `ifdef TYPE8052 102 | wire wr_en_idata; 103 | `endif 104 | wire write_internal; 105 | reg [15:0] wr_addr; 106 | reg [7:0] wr_bit_byte; 107 | reg [7:0] wr_byte; 108 | reg [7:0] add_a; 109 | reg [7:0] add_b; 110 | reg add_c; 111 | reg sub_flag; 112 | wire bit_ac; 113 | wire [3:0] low; 114 | wire [3:0] high; 115 | wire bit_c; 116 | wire bit_high; 117 | wire bit_ov; 118 | wire [7:0] add_byte; 119 | wire [15:0] mult; 120 | wire [7:0] and_out; 121 | wire [7:0] or_out; 122 | wire [7:0] xor_out; 123 | wire wr_acc; 124 | wire psw_p; 125 | wire [1:0] psw_rs; 126 | wire wr_psw_rs; 127 | wire [7:0] psw; 128 | wire wr_dp; 129 | wire [7:0] sp_sub1; 130 | wire [7:0] sp_add1; 131 | wire wr_sp; 132 | wire [7:0] div_ans; 133 | wire [7:0] div_rem; 134 | reg [7:0] data0; 135 | 136 | 137 | /*********************************************************/ 138 | 139 | 140 | /*********************************************************/ 141 | //work_en 142 | 143 | always @ ( posedge clk or posedge rst ) 144 | if ( rst ) 145 | rd_wait <= #`DEL 1'b0; 146 | else if ( cpu_restart ) 147 | rd_wait <= #`DEL 1'b0; 148 | else if ( work_en ) 149 | `ifdef TYPE8052 150 | if ( ram_rd_en_data|ram_rd_en_sfr|ram_rd_en_idata|ram_rd_en_xdata ) 151 | `else 152 | if ( ram_rd_en_data|ram_rd_en_sfr|ram_rd_en_xdata ) 153 | `endif 154 | rd_wait <= #`DEL 1'b1; 155 | else if ( ram_rd_vld ) 156 | rd_wait <= #`DEL 1'b0; 157 | else; 158 | else; 159 | 160 | assign work_en = ( rd_wait & ~ram_rd_vld ) ? 1'b0 : cpu_en; 161 | 162 | /*********************************************************/ 163 | 164 | /*********************************************************/ 165 | //cmd0/cmd1/cmd2 cmda/cmdb/cmdc 166 | 167 | assign cmd0 = rom_byte; 168 | 169 | always @ ( posedge clk or posedge rst ) 170 | if ( rst ) 171 | cmd1 <= #`DEL 8'b0; 172 | else if ( work_en ) 173 | cmd1 <= #`DEL cmd0; 174 | else; 175 | 176 | always @ ( posedge clk or posedge rst ) 177 | if ( rst ) 178 | cmd2 <= #`DEL 8'b0; 179 | else if ( work_en ) 180 | cmd2 <= #`DEL cmdb; 181 | else; 182 | 183 | always @ ( posedge clk or posedge rst ) 184 | if ( rst ) 185 | cmd_flag <= #`DEL 3'b1; 186 | else if ( cpu_restart ) 187 | cmd_flag <= #`DEL 3'b1; 188 | else if ( work_en ) 189 | if ( wait_en ) 190 | cmd_flag <= {1'b0,cmd_flag[1:0]}; 191 | else if ( length2|length2r1 ) 192 | cmd_flag <= #`DEL 3'b101; 193 | else if ( length3 ) 194 | cmd_flag <= #`DEL 3'b100; 195 | else 196 | cmd_flag <= #`DEL { cmd_flag[1:0],1'b1}; 197 | else; 198 | 199 | assign cmda = cmd_flag[1] ? cmd0 : 8'b0; 200 | 201 | assign cmdb = cmd_flag[2] ? cmd1 : 8'b0; 202 | 203 | assign cmdc = cmd2; 204 | 205 | 206 | /*********************************************************/ 207 | 208 | 209 | /*********************************************************/ 210 | //rom_en rom_addr 211 | 212 | always @* 213 | if ( ~work_en ) 214 | pc_en = 1'b0; 215 | else if ( wait_en|length2r1 ) 216 | pc_en = 1'b0; 217 | else 218 | pc_en = 1'b1; 219 | 220 | always @ ( posedge clk or posedge rst ) 221 | if ( rst ) 222 | pc <= #`DEL 16'd0; 223 | else if ( cpu_restart ) 224 | pc <= #`DEL 16'd0; 225 | else if ( work_en ) 226 | if ( pc_en ) 227 | pc <= #`DEL pc_add1; 228 | else; 229 | else; 230 | 231 | assign pc_add1 = rom_addr + 1'b1; 232 | 233 | always @* 234 | if ( ~work_en ) 235 | rom_en = 1'b0; 236 | else if ( wait_en ) 237 | rom_en = 1'b0; 238 | else if ( length2r1 ) 239 | rom_en = 1'b0; 240 | else 241 | rom_en = 1'b1; 242 | 243 | assign code_base = 1'b0 ? dp : pc; 244 | 245 | assign code_rel = ( jc(cmdb)|jnc(cmdb)|jb(cmdc)|jnb(cmdc)|jbc(cmdb) ) ? {{8{cmd0[7]}},cmd0} : {{8{acc[7]}},acc}; 246 | 247 | assign code_addr = code_base + code_rel; 248 | 249 | always @* 250 | rom_addr = ( (jc(cmdb) & psw_c)|(jnc(cmdb) & ~psw_c)|((jb(cmdc)|jbc(cmdc)) & data0[cmd1[2:0]])|(jnb(cmdc) & ~data0[cmd1[2:0]]) ) ? code_addr : pc; 251 | 252 | 253 | /*********************************************************/ 254 | 255 | /*********************************************************/ 256 | //command length 257 | 258 | assign length1 = clr_c(cmda)|setb_c(cmda)|cpl_c(cmda); 259 | 260 | assign length2r1 = 1'b0; 261 | 262 | assign length2 = clr_bit(cmda)|setb_bit(cmda)|cpl_bit(cmda)|anl_c_bit(cmda)|anl_c_nbit(cmda)|orl_c_bit(cmda)|orl_c_nbit(cmda)|mov_c_bit(cmda)|mov_bit_c(cmda)|jc(cmda)|jnc(cmda); 263 | 264 | assign length3 = jb(cmda)|jnb(cmda)|jbc(cmda); 265 | 266 | 267 | /*********************************************************/ 268 | 269 | 270 | /*********************************************************/ 271 | //ram_rd_en ram_rd_addr 272 | 273 | assign rd_en_data_sfr = clr_bit(cmdb)|setb_bit(cmdb)|cpl_bit(cmdb)|anl_c_bit(cmdb)|anl_c_nbit(cmdb)|orl_c_bit(cmdb)|orl_c_nbit(cmdb)|mov_c_bit(cmdb)|mov_bit_c(cmdb)|jb(cmdb)|jnb(cmdb)|jbc(cmdb); 274 | 275 | assign rd_en_data_idata = 1'b0; 276 | 277 | assign rd_en_xdata = 1'b0; 278 | 279 | assign rd_en_data = (rd_en_data_sfr|rd_en_data_idata) & ~rd_addr[7]; 280 | `ifdef TYPE8052 281 | assign rd_en_sfr = rd_en_data_sfr & rd_addr[7]; 282 | assign rd_en_idata = rd_en_data_idata & rd_addr[7]; 283 | `else 284 | assign rd_en_sfr = (rd_en_data_sfr|rd_en_data_idata) & rd_addr[7]; 285 | `endif 286 | assign same_flag_data = rd_en_data & wr_en_data & (rd_addr[7:0]==wr_addr[7:0]); 287 | assign same_flag_sfr = rd_en_sfr & wr_en_sfr & (rd_addr[7:0]==wr_addr[7:0]); 288 | `ifdef TYPE8052 289 | assign same_flag_idata = rd_en_idata & wr_en_idata & (rd_addr[7:0]==wr_addr[7:0]); 290 | `endif 291 | assign same_flag_xdata = rd_en_xdata & wr_en_xdata & (rd_addr[15:0]==wr_addr[15:0]); 292 | assign read_internal = rd_en_sfr & ( (rd_addr[7:0]==8'he0)|(rd_addr[7:0]==8'hd0)|(rd_addr[7:0]==8'h83)|(rd_addr[7:0]==8'h82)|(rd_addr[7:0]==8'h81)|(rd_addr[7:0]==8'hf0) ); 293 | assign ram_rd_en_data = work_en & rd_en_data & ~same_flag_data & ~wait_en; 294 | assign ram_rd_en_sfr = work_en & rd_en_sfr & ~same_flag_sfr & ~read_internal & ~wait_en; 295 | `ifdef TYPE8052 296 | assign ram_rd_en_idata = work_en & rd_en_idata & ~same_flag_idata & ~wait_en; 297 | `endif 298 | assign ram_rd_en_xdata = work_en & rd_en_xdata & ~same_flag_xdata & ~wait_en; 299 | 300 | 301 | always @* 302 | if ( clr_bit(cmdb)|setb_bit(cmdb)|cpl_bit(cmdb)|anl_c_bit(cmdb)|anl_c_nbit(cmdb)|orl_c_bit(cmdb)|orl_c_nbit(cmdb)|mov_c_bit(cmdb)|mov_bit_c(cmdb)|jb(cmdb)|jnb(cmdb)|jbc(cmdb) ) 303 | rd_addr = cmd0[7] ? {cmd0[7:3],3'b0} : {3'b001,cmd0[7:3]}; 304 | else 305 | rd_addr = 16'd0; 306 | 307 | assign ram_rd_addr = rd_addr; 308 | 309 | assign use_psw_rs = 1'b0; 310 | 311 | assign use_dp = 1'b0; 312 | 313 | assign use_acc = 1'b0; 314 | 315 | assign use_sp = 1'b0; 316 | 317 | assign wait_en = (use_psw_rs&wr_psw_rs)|(use_dp&wr_dp)|(use_acc&wr_acc)|(use_sp&wr_sp); 318 | 319 | /*********************************************************/ 320 | 321 | /*********************************************************/ 322 | //ram_wr_en ram_wr_addr 323 | 324 | assign wr_en_data_sfr = clr_bit(cmdc)|setb_bit(cmdc)|cpl_bit(cmdc)|mov_bit_c(cmdc)|(jbc(cmdb)&data0[cmd1[2:0]]); 325 | 326 | assign wr_en_data_idata = 1'b0; 327 | 328 | assign wr_en_xdata = 1'b0; 329 | 330 | assign wr_en_data = (wr_en_data_sfr|wr_en_data_idata) & ~wr_addr[7]; 331 | `ifdef TYPE8052 332 | assign wr_en_sfr = wr_en_data_sfr & wr_addr[7]; 333 | assign wr_en_idata = wr_en_data_idata & wr_addr[7]; 334 | `else 335 | assign wr_en_sfr = (wr_en_data_sfr|wr_en_data_idata) & wr_addr[7]; 336 | `endif 337 | assign write_internal = wr_en_sfr & ( (wr_addr[7:0]==8'he0)|(wr_addr[7:0]==8'hd0)|(wr_addr[7:0]==8'h83)|(wr_addr[7:0]==8'h82)|(wr_addr[7:0]==8'h81)|(wr_addr[7:0]==8'hf0) ); 338 | assign ram_wr_en_data = work_en & wr_en_data; 339 | assign ram_wr_en_sfr = work_en & wr_en_sfr & ~write_internal; 340 | `ifdef TYPE8052 341 | assign ram_wr_en_idata = work_en & wr_en_idata; 342 | `endif 343 | assign ram_wr_en_xdata = work_en & wr_en_xdata; 344 | 345 | always @* 346 | if ( clr_bit(cmdc)|setb_bit(cmdc)|cpl_bit(cmdc)|mov_bit_c(cmdc)|jbc(cmdc) ) 347 | wr_addr = cmd1[7] ? {cmd1[7:3],3'b0} : {3'b001,cmd1[7:3]}; 348 | else 349 | wr_addr = 16'd0; 350 | 351 | assign ram_wr_addr = wr_addr; 352 | 353 | /*********************************************************/ 354 | 355 | 356 | /*********************************************************/ 357 | //ram_wr_byte 358 | 359 | always @* begin 360 | wr_bit_byte = data0; 361 | if ( clr_bit(cmdc)|jbc(cmdc) ) 362 | wr_bit_byte[cmd1[2:0]] = 1'b0; 363 | else if ( setb_bit(cmdc) ) 364 | wr_bit_byte[cmd1[2:0]] = 1'b1; 365 | else if ( cpl_bit(cmdc) ) 366 | wr_bit_byte[cmd1[2:0]] = ~wr_bit_byte[cmd1[2:0]]; 367 | else if ( mov_bit_c(cmdc) ) 368 | wr_bit_byte[cmd1[2:0]] = psw_c; 369 | else; 370 | end 371 | 372 | always @* 373 | if ( clr_bit(cmdc)|setb_bit(cmdc)|cpl_bit(cmdc)|mov_bit_c(cmdc)|jbc(cmdc) ) 374 | wr_byte = wr_bit_byte; 375 | else 376 | wr_byte = 8'd0; 377 | 378 | assign ram_wr_byte = wr_byte; 379 | 380 | /*********************************************************/ 381 | 382 | 383 | /*********************************************************/ 384 | //acc register 385 | 386 | always @* 387 | add_a = 8'b0; 388 | 389 | 390 | always @* 391 | add_b = 8'b0; 392 | 393 | 394 | always @* 395 | add_c = 1'b0; 396 | 397 | 398 | always @* 399 | sub_flag = 1'b0; 400 | 401 | 402 | assign {bit_ac,low} = sub_flag ? (add_a[3:0]-add_b[3:0]-add_c) : (add_a[3:0]+add_b[3:0]+add_c); 403 | assign high = sub_flag ? (add_a[6:4]-add_b[6:4]-bit_ac) : (add_a[6:4]+add_b[6:4]+bit_ac); 404 | assign {bit_c,bit_high} = sub_flag ? (add_a[7]-add_b[7]-high[3]) : (add_a[7]+add_b[7]+high[3]); 405 | assign bit_ov = bit_c ^ high[3]; 406 | assign add_byte = {bit_high,high[2:0],low}; 407 | 408 | assign mult = acc * b; 409 | assign {div_rem,div_ans} = divide(acc,b); 410 | assign and_out = acc & data0; 411 | assign or_out = acc | data0; 412 | assign xor_out = acc ^ data0; 413 | 414 | always @ ( posedge clk or posedge rst ) 415 | if ( rst ) 416 | acc <= #`DEL 8'b0; 417 | else if ( work_en ) 418 | if ( wr_en_sfr & (wr_addr[7:0]==8'he0 ) ) 419 | acc <= #`DEL wr_byte; 420 | else; 421 | else; 422 | 423 | assign wr_acc = (wr_en_sfr & (wr_addr[7:0]==8'he0)); 424 | 425 | /*********************************************************/ 426 | 427 | 428 | /*********************************************************/ 429 | //psw register 430 | 431 | assign psw_p = ^acc; 432 | 433 | always @ ( posedge clk or posedge rst ) 434 | if ( rst ) 435 | psw_ov <= #`DEL 1'b0; 436 | else if ( work_en ) 437 | if ( wr_en_sfr & (wr_addr[7:0]==8'hd0 ) ) 438 | psw_ov <= #`DEL wr_byte[2]; 439 | else; 440 | else; 441 | 442 | always @ ( posedge clk or posedge rst ) 443 | if ( rst ) 444 | psw_ac <= #`DEL 1'b0; 445 | else if ( work_en ) 446 | if ( wr_en_sfr & (wr_addr[7:0]==8'hd0 ) ) 447 | psw_ac <= #`DEL wr_byte[6]; 448 | else; 449 | else; 450 | 451 | always @ ( posedge clk or posedge rst ) 452 | if ( rst ) 453 | psw_c <= #`DEL 1'b0; 454 | else if ( work_en ) 455 | if ( wr_en_sfr & (wr_addr[7:0]==8'hd0 ) ) 456 | psw_c <= #`DEL wr_byte[7]; 457 | else if ( clr_c(cmda) ) 458 | psw_c <= #`DEL 1'b0; 459 | else if ( setb_c(cmda) ) 460 | psw_c <= #`DEL 1'b1; 461 | else if ( cpl_c(cmdb) ) 462 | psw_c <= #`DEL ~psw_c; 463 | else if ( anl_c_bit(cmdc) ) 464 | psw_c <= #`DEL psw_c & data0[cmd1[2:0]]; 465 | else if ( anl_c_nbit(cmdc) ) 466 | psw_c <= #`DEL psw_c & ~data0[cmd1[2:0]]; 467 | else if ( orl_c_bit(cmdc) ) 468 | psw_c <= #`DEL psw_c | data0[cmd1[2:0]]; 469 | else if ( orl_c_nbit(cmdc) ) 470 | psw_c <= #`DEL psw_c | ~data0[cmd1[2:0]]; 471 | else if ( mov_c_bit(cmdc) ) 472 | psw_c <= #`DEL data0[cmd1[2:0]]; 473 | else; 474 | else; 475 | 476 | always @ ( posedge clk or posedge rst ) 477 | if ( rst ) 478 | psw_other <= #`DEL 4'b0; 479 | else if ( work_en ) 480 | if ( wr_en_sfr & (wr_addr[7:0]==8'hd0 ) ) 481 | psw_other <= #`DEL {wr_byte[5:3],wr_byte[1]}; 482 | else; 483 | else; 484 | 485 | assign psw_rs = psw_other[2:1]; 486 | 487 | assign wr_psw_rs = wr_en_sfr & (wr_addr[7:0]==8'hd0); 488 | 489 | assign psw = {psw_c,psw_ac,psw_other[3:1],psw_ov,psw_other[0],psw_p}; 490 | 491 | /*********************************************************/ 492 | 493 | /*********************************************************/ 494 | //dp sp registers 495 | 496 | always @ ( posedge clk or posedge rst ) 497 | if ( rst ) 498 | dp <= #`DEL 16'b0; 499 | else if ( work_en ) 500 | if ( wr_en_sfr & (wr_addr[7:0]==8'h82 ) ) 501 | dp[7:0] <= #`DEL wr_byte; 502 | else if ( wr_en_sfr & (wr_addr[7:0]==8'h83 ) ) 503 | dp[15:8] <= #`DEL wr_byte; 504 | else; 505 | else; 506 | 507 | assign wr_dp = (wr_en_sfr & ((wr_addr[7:0]==8'h82)|(wr_addr[7:0]==8'h83))); 508 | 509 | always @ ( posedge clk or posedge rst ) 510 | if ( rst ) 511 | sp <= #`DEL 8'b0; 512 | else if ( work_en ) 513 | if ( wr_en_sfr & (wr_addr[7:0]==8'h81) ) 514 | sp <= #`DEL wr_byte; 515 | else; 516 | else; 517 | 518 | assign sp_sub1 = sp - 1'b1; 519 | 520 | assign sp_add1 = sp + 1'b1; 521 | 522 | assign wr_sp = (wr_en_sfr & (wr_addr[7:0]==8'h81)); 523 | 524 | always @ ( posedge clk or posedge rst ) 525 | if ( rst ) 526 | b <= #`DEL 8'b0; 527 | else if ( work_en ) 528 | if ( wr_en_sfr & (wr_addr[7:0]==8'hf0) ) 529 | b <= #`DEL wr_byte; 530 | else; 531 | else; 532 | 533 | /*********************************************************/ 534 | 535 | 536 | /*********************************************************/ 537 | //ram output 538 | 539 | always @* 540 | if ( same_flag ) 541 | data0 = same_byte; 542 | else if ( same_byte[7] ) 543 | data0 = acc; 544 | else if ( same_byte[6] ) 545 | data0 = psw; 546 | else if ( same_byte[5] ) 547 | data0 = dp[15:8]; 548 | else if ( same_byte[4] ) 549 | data0 = dp[7:0]; 550 | else if ( same_byte[3] ) 551 | data0 = sp; 552 | else if ( same_byte[2] ) 553 | data0 = b; 554 | else 555 | data0 = ram_rd_byte; 556 | 557 | always @ ( posedge clk or posedge rst ) 558 | if ( rst ) 559 | data1 <= #`DEL 8'b0; 560 | else if ( work_en ) 561 | data1 <= #`DEL data0; 562 | else; 563 | 564 | always @ ( posedge clk or posedge rst ) 565 | if ( rst ) 566 | same_flag <= #`DEL 1'b0; 567 | else if ( work_en ) 568 | `ifdef TYPE8052 569 | if ( same_flag_data|same_flag_sfr|same_flag_idata|same_flag_xdata ) 570 | `else 571 | if ( same_flag_data|same_flag_sfr|same_flag_xdata ) 572 | `endif 573 | same_flag <= #`DEL 1'b1; 574 | else 575 | same_flag <= #`DEL 1'b0; 576 | else; 577 | 578 | always @ ( posedge clk or posedge rst ) 579 | if ( rst ) 580 | same_byte <= #`DEL 8'd0; 581 | else if ( work_en ) 582 | `ifdef TYPE8052 583 | if ( same_flag_data|same_flag_sfr|same_flag_idata|same_flag_xdata ) 584 | `else 585 | if ( same_flag_data|same_flag_sfr|same_flag_xdata ) 586 | `endif 587 | same_byte <= #`DEL wr_byte; 588 | else if ( rd_en_sfr & (rd_addr[7:0]==8'he0) ) //acc 589 | same_byte <= #`DEL 1'b1<<7; 590 | else if ( rd_en_sfr & (rd_addr[7:0]==8'hd0) ) //psw 591 | same_byte <= #`DEL 1'b1<<6; 592 | else if ( rd_en_sfr & (rd_addr[7:0]==8'h83) ) //dph 593 | same_byte <= #`DEL 1'b1<<5; 594 | else if ( rd_en_sfr & (rd_addr[7:0]==8'h82) ) //dpl 595 | same_byte <= #`DEL 1'b1<<4; 596 | else if ( rd_en_sfr & (rd_addr[7:0]==8'h81) ) //sp 597 | same_byte <= #`DEL 1'b1<<3; 598 | else if ( rd_en_sfr & (rd_addr[7:0]==8'hf0) ) //b 599 | same_byte <= #`DEL 1'b1<<2; 600 | else 601 | same_byte <= #`DEL 8'b0; 602 | else; 603 | 604 | /*********************************************************/ 605 | 606 | endmodule 607 | -------------------------------------------------------------------------------- /illustration/r8051_bulk.v: -------------------------------------------------------------------------------- 1 | `define TYPE8052 2 | `define DEL 1 3 | module r8051 ( 4 | 5 | input wire clk, 6 | input wire rst, 7 | input wire cpu_en, 8 | input wire cpu_restart, 9 | 10 | output reg rom_en, 11 | output reg [15:0] rom_addr, 12 | input wire [7:0] rom_byte, 13 | input wire rom_vld, 14 | 15 | output wire ram_rd_en_data, 16 | output wire ram_rd_en_sfr, 17 | `ifdef TYPE8052 18 | output wire ram_rd_en_idata, 19 | `endif 20 | output wire ram_rd_en_xdata, 21 | output wire [15:0] ram_rd_addr, 22 | input wire [7:0] ram_rd_byte, 23 | input wire ram_rd_vld, 24 | 25 | output wire ram_wr_en_data, 26 | output wire ram_wr_en_sfr, 27 | `ifdef TYPE8052 28 | output wire ram_wr_en_idata, 29 | `endif 30 | output wire ram_wr_en_xdata, 31 | output wire [15:0] ram_wr_addr, 32 | output wire [7:0] ram_wr_byte 33 | 34 | ); 35 | 36 | `include "instruction.v" 37 | 38 | /*********************************************************/ 39 | //register definition 40 | 41 | reg rd_wait; 42 | reg rom_wait; 43 | reg [7:0] cmd1; 44 | reg [7:0] cmd2; 45 | reg [2:0] cmd_flag; 46 | reg [15:0] pc; 47 | reg [7:0] acc; 48 | reg psw_ov; 49 | reg psw_ac; 50 | reg psw_c; 51 | reg [3:0] psw_other; 52 | reg [15:0] dp; 53 | reg [7:0] sp; 54 | reg [7:0] b; 55 | reg same_flag; 56 | reg [7:0] same_byte; 57 | reg [7:0] data1; 58 | 59 | 60 | /*********************************************************/ 61 | //wire definition 62 | 63 | wire work_en; 64 | wire [7:0] cmd0; 65 | wire [7:0] cmda; 66 | wire [7:0] cmdb; 67 | wire [7:0] cmdc; 68 | reg pc_en; 69 | wire [15:0] pc_add1; 70 | wire [15:0] code_base; 71 | wire [15:0] code_rel; 72 | wire [15:0] code_addr; 73 | wire length1; 74 | wire length2r1; 75 | wire length2; 76 | wire length3; 77 | wire rd_en_data_sfr; 78 | wire rd_en_data_idata; 79 | wire rd_en_xdata; 80 | wire rd_en_data; 81 | wire rd_en_sfr; 82 | `ifdef TYPE8052 83 | wire rd_en_idata; 84 | `endif 85 | wire same_flag_data; 86 | wire same_flag_sfr; 87 | `ifdef TYPE8052 88 | wire same_flag_idata; 89 | `endif 90 | wire same_flag_xdata; 91 | wire read_internal; 92 | reg [15:0] rd_addr; 93 | wire use_psw_rs; 94 | wire use_dp; 95 | wire use_acc; 96 | wire use_sp; 97 | wire wait_en; 98 | wire wr_en_data_sfr; 99 | wire wr_en_data_idata; 100 | wire wr_en_xdata; 101 | wire wr_en_data; 102 | wire wr_en_sfr; 103 | `ifdef TYPE8052 104 | wire wr_en_idata; 105 | `endif 106 | wire write_internal; 107 | reg [15:0] wr_addr; 108 | reg [7:0] wr_bit_byte; 109 | reg [7:0] wr_byte; 110 | reg [7:0] add_a; 111 | reg [7:0] add_b; 112 | reg add_c; 113 | reg sub_flag; 114 | wire bit_ac; 115 | wire [3:0] low; 116 | wire [3:0] high; 117 | wire bit_c; 118 | wire bit_high; 119 | wire bit_ov; 120 | wire [7:0] add_byte; 121 | wire [15:0] mult; 122 | wire [7:0] and_out; 123 | wire [7:0] or_out; 124 | wire [7:0] xor_out; 125 | wire wr_acc; 126 | wire psw_p; 127 | wire [1:0] psw_rs; 128 | wire wr_psw_rs; 129 | wire [7:0] psw; 130 | wire wr_dp; 131 | wire [7:0] sp_sub1; 132 | wire [7:0] sp_add1; 133 | wire wr_sp; 134 | wire [7:0] div_ans; 135 | wire [7:0] div_rem; 136 | reg [7:0] data0; 137 | 138 | 139 | /*********************************************************/ 140 | 141 | 142 | /*********************************************************/ 143 | //work_en 144 | 145 | always @ ( posedge clk or posedge rst ) 146 | if ( rst ) 147 | rd_wait <= #`DEL 1'b0; 148 | else if ( cpu_restart ) 149 | rd_wait <= #`DEL 1'b0; 150 | else if ( work_en ) 151 | `ifdef TYPE8052 152 | if ( ram_rd_en_data|ram_rd_en_sfr|ram_rd_en_idata|ram_rd_en_xdata ) 153 | `else 154 | if ( ram_rd_en_data|ram_rd_en_sfr|ram_rd_en_xdata ) 155 | `endif 156 | rd_wait <= #`DEL 1'b1; 157 | else if ( ram_rd_vld ) 158 | rd_wait <= #`DEL 1'b0; 159 | else; 160 | else; 161 | 162 | always @ ( posedge clk or posedge rst ) 163 | if ( rst ) 164 | rom_wait <= #`DEL 1'b0; 165 | else if ( cpu_restart ) 166 | rom_wait <= #`DEL 1'b0; 167 | else if ( work_en ) 168 | if ( rom_en ) 169 | rom_wait <= #`DEL 1'b1; 170 | else if ( rom_vld ) 171 | rom_wait <= #`DEL 1'b0; 172 | else; 173 | else; 174 | 175 | 176 | assign work_en = ( ( rd_wait & ~ram_rd_vld )|( rom_wait & ~rom_vld ) ) ? 1'b0 : cpu_en; 177 | 178 | /*********************************************************/ 179 | 180 | /*********************************************************/ 181 | //cmd0/cmd1/cmd2 cmda/cmdb/cmdc 182 | 183 | assign cmd0 = rom_byte; 184 | 185 | always @ ( posedge clk or posedge rst ) 186 | if ( rst ) 187 | cmd1 <= #`DEL 8'b0; 188 | else if ( work_en ) 189 | cmd1 <= #`DEL cmd0; 190 | else; 191 | 192 | always @ ( posedge clk or posedge rst ) 193 | if ( rst ) 194 | cmd2 <= #`DEL 8'b0; 195 | else if ( work_en ) 196 | cmd2 <= #`DEL cmdb; 197 | else; 198 | 199 | always @ ( posedge clk or posedge rst ) 200 | if ( rst ) 201 | cmd_flag <= #`DEL 3'b1; 202 | else if ( cpu_restart ) 203 | cmd_flag <= #`DEL 3'b1; 204 | else if ( work_en ) 205 | if ( wait_en ) 206 | cmd_flag <= {1'b0,cmd_flag[1:0]}; 207 | else if ( length2|length2r1 ) 208 | cmd_flag <= #`DEL 3'b101; 209 | else if ( length3 ) 210 | cmd_flag <= #`DEL 3'b100; 211 | else 212 | cmd_flag <= #`DEL { cmd_flag[1:0],1'b1}; 213 | else; 214 | 215 | assign cmda = cmd_flag[1] ? cmd0 : 8'b0; 216 | 217 | assign cmdb = cmd_flag[2] ? cmd1 : 8'b0; 218 | 219 | assign cmdc = cmd2; 220 | 221 | 222 | /*********************************************************/ 223 | 224 | 225 | /*********************************************************/ 226 | //rom_en rom_addr 227 | 228 | always @* 229 | if ( ~work_en ) 230 | pc_en = 1'b0; 231 | else if ( wait_en|length2r1 ) 232 | pc_en = 1'b0; 233 | else 234 | pc_en = 1'b1; 235 | 236 | always @ ( posedge clk or posedge rst ) 237 | if ( rst ) 238 | pc <= #`DEL 16'd0; 239 | else if ( cpu_restart ) 240 | pc <= #`DEL 16'd0; 241 | else if ( work_en ) 242 | if ( pc_en ) 243 | pc <= #`DEL pc_add1; 244 | else; 245 | else; 246 | 247 | assign pc_add1 = rom_addr + 1'b1; 248 | 249 | always @* 250 | if ( ~work_en ) 251 | rom_en = 1'b0; 252 | else if ( wait_en ) 253 | rom_en = 1'b0; 254 | else if ( length2r1 ) 255 | rom_en = 1'b0; 256 | else 257 | rom_en = 1'b1; 258 | 259 | assign code_base = 1'b0 ? dp : pc; 260 | 261 | assign code_rel = 1'b0 ? {{8{cmd0[7]}},cmd0} : {{8{acc[7]}},acc}; 262 | 263 | assign code_addr = code_base + code_rel; 264 | 265 | always @* 266 | rom_addr = 1'b0 ? code_addr : pc; 267 | 268 | 269 | /*********************************************************/ 270 | 271 | /*********************************************************/ 272 | //command length 273 | 274 | assign length1 = 1'b0; 275 | 276 | assign length2r1 = 1'b0; 277 | 278 | assign length2 = 1'b0; 279 | 280 | assign length3 = 1'b0; 281 | 282 | 283 | /*********************************************************/ 284 | 285 | 286 | /*********************************************************/ 287 | //ram_rd_en ram_rd_addr 288 | 289 | assign rd_en_data_sfr = 1'b0; 290 | 291 | assign rd_en_data_idata = 1'b0; 292 | 293 | assign rd_en_xdata = 1'b0; 294 | 295 | assign rd_en_data = (rd_en_data_sfr|rd_en_data_idata) & ~rd_addr[7]; 296 | `ifdef TYPE8052 297 | assign rd_en_sfr = rd_en_data_sfr & rd_addr[7]; 298 | assign rd_en_idata = rd_en_data_idata & rd_addr[7]; 299 | `else 300 | assign rd_en_sfr = (rd_en_data_sfr|rd_en_data_idata) & rd_addr[7]; 301 | `endif 302 | assign same_flag_data = rd_en_data & wr_en_data & (rd_addr[7:0]==wr_addr[7:0]); 303 | assign same_flag_sfr = rd_en_sfr & wr_en_sfr & (rd_addr[7:0]==wr_addr[7:0]); 304 | `ifdef TYPE8052 305 | assign same_flag_idata = rd_en_idata & wr_en_idata & (rd_addr[7:0]==wr_addr[7:0]); 306 | `endif 307 | assign same_flag_xdata = rd_en_xdata & wr_en_xdata & (rd_addr[15:0]==wr_addr[15:0]); 308 | assign read_internal = rd_en_sfr & ( (rd_addr[7:0]==8'he0)|(rd_addr[7:0]==8'hd0)|(rd_addr[7:0]==8'h83)|(rd_addr[7:0]==8'h82)|(rd_addr[7:0]==8'h81)|(rd_addr[7:0]==8'hf0) ); 309 | assign ram_rd_en_data = work_en & rd_en_data & ~same_flag_data & ~wait_en; 310 | assign ram_rd_en_sfr = work_en & rd_en_sfr & ~same_flag_sfr & ~read_internal & ~wait_en; 311 | `ifdef TYPE8052 312 | assign ram_rd_en_idata = work_en & rd_en_idata & ~same_flag_idata & ~wait_en; 313 | `endif 314 | assign ram_rd_en_xdata = work_en & rd_en_xdata & ~same_flag_xdata & ~wait_en; 315 | 316 | 317 | always @* 318 | rd_addr = 16'd0; 319 | 320 | assign ram_rd_addr = rd_addr; 321 | 322 | assign use_psw_rs = 1'b0; 323 | 324 | assign use_dp = 1'b0; 325 | 326 | assign use_acc = 1'b0; 327 | 328 | assign use_sp = 1'b0; 329 | 330 | assign wait_en = (use_psw_rs&wr_psw_rs)|(use_dp&wr_dp)|(use_acc&wr_acc)|(use_sp&wr_sp); 331 | 332 | /*********************************************************/ 333 | 334 | /*********************************************************/ 335 | //ram_wr_en ram_wr_addr 336 | 337 | assign wr_en_data_sfr = 1'b0; 338 | 339 | assign wr_en_data_idata = 1'b0; 340 | 341 | assign wr_en_xdata = 1'b0; 342 | 343 | assign wr_en_data = (wr_en_data_sfr|wr_en_data_idata) & ~wr_addr[7]; 344 | `ifdef TYPE8052 345 | assign wr_en_sfr = wr_en_data_sfr & wr_addr[7]; 346 | assign wr_en_idata = wr_en_data_idata & wr_addr[7]; 347 | `else 348 | assign wr_en_sfr = (wr_en_data_sfr|wr_en_data_idata) & wr_addr[7]; 349 | `endif 350 | assign write_internal = wr_en_sfr & ( (wr_addr[7:0]==8'he0)|(wr_addr[7:0]==8'hd0)|(wr_addr[7:0]==8'h83)|(wr_addr[7:0]==8'h82)|(wr_addr[7:0]==8'h81)|(wr_addr[7:0]==8'hf0) ); 351 | assign ram_wr_en_data = work_en & wr_en_data; 352 | assign ram_wr_en_sfr = work_en & wr_en_sfr & ~write_internal; 353 | `ifdef TYPE8052 354 | assign ram_wr_en_idata = work_en & wr_en_idata; 355 | `endif 356 | assign ram_wr_en_xdata = work_en & wr_en_xdata; 357 | 358 | always @* 359 | wr_addr = 16'd0; 360 | 361 | assign ram_wr_addr = wr_addr; 362 | 363 | /*********************************************************/ 364 | 365 | 366 | /*********************************************************/ 367 | //ram_wr_byte 368 | 369 | always @* begin 370 | wr_bit_byte = data0; 371 | end 372 | 373 | always @* 374 | wr_byte = 8'd0; 375 | 376 | assign ram_wr_byte = wr_byte; 377 | 378 | /*********************************************************/ 379 | 380 | 381 | /*********************************************************/ 382 | //acc register 383 | 384 | always @* 385 | add_a = 8'b0; 386 | 387 | 388 | always @* 389 | add_b = 8'b0; 390 | 391 | 392 | always @* 393 | add_c = 1'b0; 394 | 395 | 396 | always @* 397 | sub_flag = 1'b0; 398 | 399 | 400 | assign {bit_ac,low} = sub_flag ? (add_a[3:0]-add_b[3:0]-add_c) : (add_a[3:0]+add_b[3:0]+add_c); 401 | assign high = sub_flag ? (add_a[6:4]-add_b[6:4]-bit_ac) : (add_a[6:4]+add_b[6:4]+bit_ac); 402 | assign {bit_c,bit_high} = sub_flag ? (add_a[7]-add_b[7]-high[3]) : (add_a[7]+add_b[7]+high[3]); 403 | assign bit_ov = bit_c ^ high[3]; 404 | assign add_byte = {bit_high,high[2:0],low}; 405 | 406 | assign mult = acc * b; 407 | assign {div_rem,div_ans} = divide(acc,b); 408 | assign and_out = acc & data0; 409 | assign or_out = acc | data0; 410 | assign xor_out = acc ^ data0; 411 | 412 | always @ ( posedge clk or posedge rst ) 413 | if ( rst ) 414 | acc <= #`DEL 8'b0; 415 | else if ( work_en ) 416 | if ( wr_en_sfr & (wr_addr[7:0]==8'he0 ) ) 417 | acc <= #`DEL wr_byte; 418 | else; 419 | else; 420 | 421 | assign wr_acc = (wr_en_sfr & (wr_addr[7:0]==8'he0)); 422 | 423 | /*********************************************************/ 424 | 425 | 426 | /*********************************************************/ 427 | //psw register 428 | 429 | assign psw_p = ^acc; 430 | 431 | always @ ( posedge clk or posedge rst ) 432 | if ( rst ) 433 | psw_ov <= #`DEL 1'b0; 434 | else if ( work_en ) 435 | if ( wr_en_sfr & (wr_addr[7:0]==8'hd0 ) ) 436 | psw_ov <= #`DEL wr_byte[2]; 437 | else; 438 | else; 439 | 440 | always @ ( posedge clk or posedge rst ) 441 | if ( rst ) 442 | psw_ac <= #`DEL 1'b0; 443 | else if ( work_en ) 444 | if ( wr_en_sfr & (wr_addr[7:0]==8'hd0 ) ) 445 | psw_ac <= #`DEL wr_byte[6]; 446 | else; 447 | else; 448 | 449 | always @ ( posedge clk or posedge rst ) 450 | if ( rst ) 451 | psw_c <= #`DEL 1'b0; 452 | else if ( work_en ) 453 | if ( wr_en_sfr & (wr_addr[7:0]==8'hd0 ) ) 454 | psw_c <= #`DEL wr_byte[7]; 455 | else; 456 | else; 457 | 458 | always @ ( posedge clk or posedge rst ) 459 | if ( rst ) 460 | psw_other <= #`DEL 4'b0; 461 | else if ( work_en ) 462 | if ( wr_en_sfr & (wr_addr[7:0]==8'hd0 ) ) 463 | psw_other <= #`DEL {wr_byte[5:3],wr_byte[1]}; 464 | else; 465 | else; 466 | 467 | assign psw_rs = psw_other[2:1]; 468 | 469 | assign wr_psw_rs = wr_en_sfr & (wr_addr[7:0]==8'hd0); 470 | 471 | assign psw = {psw_c,psw_ac,psw_other[3:1],psw_ov,psw_other[0],psw_p}; 472 | 473 | /*********************************************************/ 474 | 475 | /*********************************************************/ 476 | //dp sp registers 477 | 478 | always @ ( posedge clk or posedge rst ) 479 | if ( rst ) 480 | dp <= #`DEL 16'b0; 481 | else if ( work_en ) 482 | if ( wr_en_sfr & (wr_addr[7:0]==8'h82 ) ) 483 | dp[7:0] <= #`DEL wr_byte; 484 | else if ( wr_en_sfr & (wr_addr[7:0]==8'h83 ) ) 485 | dp[15:8] <= #`DEL wr_byte; 486 | else; 487 | else; 488 | 489 | assign wr_dp = (wr_en_sfr & ((wr_addr[7:0]==8'h82)|(wr_addr[7:0]==8'h83))); 490 | 491 | always @ ( posedge clk or posedge rst ) 492 | if ( rst ) 493 | sp <= #`DEL 8'b0; 494 | else if ( work_en ) 495 | if ( wr_en_sfr & (wr_addr[7:0]==8'h81) ) 496 | sp <= #`DEL wr_byte; 497 | else; 498 | else; 499 | 500 | assign sp_sub1 = sp - 1'b1; 501 | 502 | assign sp_add1 = sp + 1'b1; 503 | 504 | assign wr_sp = (wr_en_sfr & (wr_addr[7:0]==8'h81)); 505 | 506 | always @ ( posedge clk or posedge rst ) 507 | if ( rst ) 508 | b <= #`DEL 8'b0; 509 | else if ( work_en ) 510 | if ( wr_en_sfr & (wr_addr[7:0]==8'hf0) ) 511 | b <= #`DEL wr_byte; 512 | else; 513 | else; 514 | 515 | /*********************************************************/ 516 | 517 | 518 | /*********************************************************/ 519 | //ram output 520 | 521 | always @* 522 | if ( same_flag ) 523 | data0 = same_byte; 524 | else if ( same_byte[7] ) 525 | data0 = acc; 526 | else if ( same_byte[6] ) 527 | data0 = psw; 528 | else if ( same_byte[5] ) 529 | data0 = dp[15:8]; 530 | else if ( same_byte[4] ) 531 | data0 = dp[7:0]; 532 | else if ( same_byte[3] ) 533 | data0 = sp; 534 | else if ( same_byte[2] ) 535 | data0 = b; 536 | else 537 | data0 = ram_rd_byte; 538 | 539 | always @ ( posedge clk or posedge rst ) 540 | if ( rst ) 541 | data1 <= #`DEL 8'b0; 542 | else if ( work_en ) 543 | data1 <= #`DEL data0; 544 | else; 545 | 546 | always @ ( posedge clk or posedge rst ) 547 | if ( rst ) 548 | same_flag <= #`DEL 1'b0; 549 | else if ( work_en ) 550 | `ifdef TYPE8052 551 | if ( same_flag_data|same_flag_sfr|same_flag_idata|same_flag_xdata ) 552 | `else 553 | if ( same_flag_data|same_flag_sfr|same_flag_xdata ) 554 | `endif 555 | same_flag <= #`DEL 1'b1; 556 | else 557 | same_flag <= #`DEL 1'b0; 558 | else; 559 | 560 | always @ ( posedge clk or posedge rst ) 561 | if ( rst ) 562 | same_byte <= #`DEL 8'd0; 563 | else if ( work_en ) 564 | `ifdef TYPE8052 565 | if ( same_flag_data|same_flag_sfr|same_flag_idata|same_flag_xdata ) 566 | `else 567 | if ( same_flag_data|same_flag_sfr|same_flag_xdata ) 568 | `endif 569 | same_byte <= #`DEL wr_byte; 570 | else if ( rd_en_sfr & (rd_addr[7:0]==8'he0) ) //acc 571 | same_byte <= #`DEL 1'b1<<7; 572 | else if ( rd_en_sfr & (rd_addr[7:0]==8'hd0) ) //psw 573 | same_byte <= #`DEL 1'b1<<6; 574 | else if ( rd_en_sfr & (rd_addr[7:0]==8'h83) ) //dph 575 | same_byte <= #`DEL 1'b1<<5; 576 | else if ( rd_en_sfr & (rd_addr[7:0]==8'h82) ) //dpl 577 | same_byte <= #`DEL 1'b1<<4; 578 | else if ( rd_en_sfr & (rd_addr[7:0]==8'h81) ) //sp 579 | same_byte <= #`DEL 1'b1<<3; 580 | else if ( rd_en_sfr & (rd_addr[7:0]==8'hf0) ) //b 581 | same_byte <= #`DEL 1'b1<<2; 582 | else 583 | same_byte <= #`DEL 8'b0; 584 | else; 585 | 586 | /*********************************************************/ 587 | 588 | endmodule 589 | -------------------------------------------------------------------------------- /rtl/instruction.v: -------------------------------------------------------------------------------- 1 | ///////////////////////////////////////////////////////////////////////////////////// 2 | // 3 | //Copyright 2018 Li Xinbing 4 | // 5 | //Licensed under the Apache License, Version 2.0 (the "License"); 6 | //you may not use this file except in compliance with the License. 7 | //You may obtain a copy of the License at 8 | // 9 | // http://www.apache.org/licenses/LICENSE-2.0 10 | // 11 | //Unless required by applicable law or agreed to in writing, software 12 | //distributed under the License is distributed on an "AS IS" BASIS, 13 | //WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 | //See the License for the specific language governing permissions and 15 | //limitations under the License. 16 | // 17 | ///////////////////////////////////////////////////////////////////////////////////// 18 | 19 | 20 | //ARITHMETIC OPERATIONS 21 | //ADD 22 | function add_a_rn(input [7:0] i); add_a_rn = (i[7:3]==5'b00101); endfunction 23 | function add_a_di(input [7:0] i); add_a_di=(i==8'b00100101); endfunction 24 | function add_a_ri(input [7:0] i); add_a_ri=(i[7:1]==7'b0010011); endfunction 25 | function add_a_da(input [7:0] i); add_a_da = (i==8'b00100100); endfunction 26 | //ADDC 27 | function addc_a_rn(input [7:0] i); addc_a_rn = (i[7:3]==5'b00111); endfunction 28 | function addc_a_di(input [7:0] i); addc_a_di = (i==8'b00110101); endfunction 29 | function addc_a_ri(input [7:0] i); addc_a_ri = (i[7:1]==7'b0011011); endfunction 30 | function addc_a_da(input [7:0] i); addc_a_da = (i==8'b00110100); endfunction 31 | //SUBB 32 | function subb_a_rn(input [7:0] i); subb_a_rn=(i[7:3]==5'b10011); endfunction 33 | function subb_a_di(input [7:0] i); subb_a_di=(i==8'b10010101); endfunction 34 | function subb_a_ri(input [7:0] i); subb_a_ri=(i[7:1]==7'b1001011); endfunction 35 | function subb_a_da(input [7:0] i); subb_a_da = (i==8'b10010100); endfunction 36 | //INC 37 | function inc_a (input [7:0] i); inc_a = (i==8'b00000100); endfunction 38 | function inc_rn(input [7:0] i); inc_rn = (i[7:3]==5'b00001); endfunction 39 | function inc_di(input [7:0] i); inc_di = (i==8'b00000101); endfunction 40 | function inc_ri(input [7:0] i); inc_ri = (i[7:1]==7'b0000011); endfunction 41 | function inc_dp(input [7:0] i); inc_dp =(i==8'b10100011); endfunction 42 | //DEC 43 | function dec_a(input [7:0] i); dec_a = (i==8'b00010100); endfunction 44 | function dec_rn(input [7:0] i); dec_rn = (i[7:3]==5'b00011); endfunction 45 | function dec_di(input [7:0] i); dec_di = (i==8'b00010101); endfunction 46 | function dec_ri(input [7:0] i); dec_ri = (i[7:1]==7'b0001011); endfunction 47 | //MUL 48 | function mul(input [7:0] i); mul=(i==8'b10100100); endfunction 49 | //DIV 50 | function div(input [7:0] i); div=(i==8'b10000100); endfunction 51 | //DA 52 | function da(input [7:0] i); da = (i==8'b11010100); endfunction 53 | 54 | //LOGICAL OPERATIONS 55 | //ANL 56 | function anl_a_rn(input [7:0] i); anl_a_rn = (i[7:3]==5'b01011); endfunction 57 | function anl_a_di(input [7:0] i); anl_a_di = (i==8'b01010101); endfunction 58 | function anl_a_ri(input [7:0] i); anl_a_ri = (i[7:1]==7'b0101011); endfunction 59 | function anl_a_da(input [7:0] i); anl_a_da = (i==8'b01010100); endfunction 60 | function anl_di_a(input [7:0] i); anl_di_a = (i==8'b01010010); endfunction 61 | function anl_di_da(input [7:0] i); anl_di_da = (i==8'b01010011); endfunction 62 | //ORL 63 | function orl_a_rn(input [7:0] i); orl_a_rn = (i[7:3]==5'b01001); endfunction 64 | function orl_a_di(input [7:0] i); orl_a_di = (i==8'b01000101); endfunction 65 | function orl_a_ri(input [7:0] i); orl_a_ri = (i[7:1]==7'b0100011); endfunction 66 | function orl_a_da(input [7:0] i); orl_a_da = (i==8'b01000100); endfunction 67 | function orl_di_a(input [7:0] i); orl_di_a=(i==8'b01000010); endfunction 68 | function orl_di_da(input [7:0] i); orl_di_da=(i==8'b01000011); endfunction 69 | //XRL 70 | function xrl_a_rn(input [7:0] i); xrl_a_rn = (i[7:3]==5'b01101); endfunction 71 | function xrl_a_di(input [7:0] i); xrl_a_di = (i==8'b01100101); endfunction 72 | function xrl_a_ri(input [7:0] i); xrl_a_ri = (i[7:1]==7'b0110011); endfunction 73 | function xrl_a_da(input [7:0] i); xrl_a_da = (i==8'b01100100); endfunction 74 | function xrl_di_a(input [7:0] i); xrl_di_a = (i==8'b01100010); endfunction 75 | function xrl_di_da(input [7:0] i); xrl_di_da = (i==8'b01100011); endfunction 76 | //CLR 77 | function clr_a(input [7:0] i); clr_a = (i==8'b11100100); endfunction 78 | //CPL 79 | function cpl_a(input [7:0] i); cpl_a = (i==8'b11110100); endfunction 80 | //RL 81 | function rl(input [7:0] i); rl = (i==8'b00100011); endfunction 82 | //RLC 83 | function rlc(input [7:0] i); rlc = (i==8'b00110011); endfunction 84 | //RR 85 | function rr(input [7:0] i); rr = (i==8'b00000011); endfunction 86 | //RRC 87 | function rrc(input [7:0] i); rrc = (i==8'b00010011); endfunction 88 | //SWAP 89 | function swap(input [7:0] i); swap = (i==8'b11000100); endfunction 90 | 91 | //DATA TRANSFER 92 | //MOV 93 | function mov_a_rn(input [7:0] i); mov_a_rn = (i[7:3]==5'b11101); endfunction 94 | function mov_a_di(input [7:0] i); mov_a_di = (i==8'b11100101); endfunction 95 | function mov_a_ri(input [7:0] i); mov_a_ri = (i[7:1]==7'b1110011); endfunction 96 | function mov_a_da(input [7:0] i); mov_a_da = (i==8'b01110100); endfunction 97 | function mov_rn_a(input [7:0] i); mov_rn_a = (i[7:3]==5'b11111); endfunction 98 | function mov_rn_di(input [7:0] i); mov_rn_di = (i[7:3]==5'b10101); endfunction 99 | function mov_rn_da(input [7:0] i); mov_rn_da = (i[7:3]==5'b01111); endfunction 100 | function mov_di_a(input [7:0] i); mov_di_a = (i==8'b11110101); endfunction 101 | function mov_di_rn(input [7:0] i); mov_di_rn = (i[7:3]==5'b10001); endfunction 102 | function mov_di_di(input [7:0] i); mov_di_di = (i==8'b10000101); endfunction 103 | function mov_di_ri(input [7:0] i); mov_di_ri = (i[7:1]==7'b1000011); endfunction 104 | function mov_di_da(input [7:0] i); mov_di_da = (i==8'b01110101); endfunction 105 | function mov_ri_a(input [7:0] i); mov_ri_a = (i[7:1]==7'b1111011); endfunction 106 | function mov_ri_di(input [7:0] i); mov_ri_di = (i[7:1]==7'b1010011); endfunction 107 | function mov_ri_da(input [7:0] i); mov_ri_da=(i[7:1]==7'b0111011); endfunction 108 | function mov_dp_da(input [7:0] i); mov_dp_da=(i==8'b10010000); endfunction 109 | //MOVC 110 | function movc_a_dp(input [7:0] i); movc_a_dp = (i==8'b10010011); endfunction 111 | function movc_a_pc(input [7:0] i); movc_a_pc = (i==8'b10000011); endfunction 112 | //MOVX 113 | function movx_a_ri(input [7:0] i); movx_a_ri = (i[7:1]==7'b1110001); endfunction 114 | function movx_a_dp(input [7:0] i); movx_a_dp = (i==8'b11100000); endfunction 115 | function movx_ri_a(input [7:0] i); movx_ri_a = (i[7:1]==7'b1111001); endfunction 116 | function movx_dp_a(input [7:0] i); movx_dp_a = (i==8'b11110000); endfunction 117 | //PUSH 118 | function push(input [7:0] i); push = (i==8'b11000000); endfunction 119 | //POP 120 | function pop(input [7:0] i); pop = (i==8'b11010000); endfunction 121 | //XCH 122 | function xch_a_rn(input [7:0] i); xch_a_rn = (i[7:3]==5'b11001); endfunction 123 | function xch_a_di(input [7:0] i); xch_a_di = (i==8'b11000101); endfunction 124 | function xch_a_ri(input [7:0] i); xch_a_ri = (i[7:1]==7'b1100011); endfunction 125 | //XCHD 126 | function xchd(input [7:0] i); xchd = (i[7:1]==7'b1101011); endfunction 127 | 128 | //BOOLEAN VARIABLE MANIPULATION 129 | //CLR 130 | function clr_c(input [7:0] i); clr_c = (i==8'b11000011); endfunction 131 | function clr_bit(input [7:0] i); clr_bit = (i==8'b11000010); endfunction 132 | //SETB 133 | function setb_c(input [7:0] i); setb_c = (i==8'b11010011); endfunction 134 | function setb_bit(input [7:0] i); setb_bit = (i==8'b11010010); endfunction 135 | //CPL 136 | function cpl_c(input [7:0] i); cpl_c = (i==8'b10110011); endfunction 137 | function cpl_bit(input [7:0] i); cpl_bit=(i==8'b10110010); endfunction 138 | //ANL 139 | function anl_c_bit(input [7:0] i); anl_c_bit = (i==8'b10000010); endfunction 140 | function anl_c_nbit(input [7:0] i); anl_c_nbit = (i==8'b10110000); endfunction 141 | //ORL 142 | function orl_c_bit(input [7:0] i); orl_c_bit = (i==8'b01110010); endfunction 143 | function orl_c_nbit(input [7:0] i); orl_c_nbit = (i==8'b10100000); endfunction 144 | //MOV 145 | function mov_c_bit(input [7:0] i); mov_c_bit = (i==8'b10100010); endfunction 146 | function mov_bit_c(input [7:0] i); mov_bit_c = (i==8'b10010010); endfunction 147 | //JC 148 | function jc(input [7:0] i); jc = (i==8'b01000000); endfunction 149 | //JNC 150 | function jnc(input [7:0] i); jnc =(i==8'b01010000); endfunction 151 | //JB 152 | function jb(input [7:0] i); jb = (i==8'b00100000); endfunction 153 | //JNB 154 | function jnb(input [7:0] i); jnb = (i==8'b00110000); endfunction 155 | //JBC 156 | function jbc(input [7:0] i); jbc = (i==8'b00010000); endfunction 157 | 158 | //PROGRAM BRANCHING 159 | //ACALL 160 | function acall(input [7:0] i); acall = (i[4:0]==5'b10001); endfunction 161 | //LCALL 162 | function lcall(input [7:0] i); lcall = (i==8'b00010010); endfunction 163 | //RET 164 | function ret(input [7:0] i); ret = (i==8'b00100010); endfunction 165 | //RETI 166 | function reti(input [7:0] i); reti = (i==8'b00110010); endfunction 167 | //AJMP 168 | function ajmp(input [7:0] i); ajmp = (i[4:0]==5'b00001); endfunction 169 | //LJMP 170 | function ljmp(input [7:0] i); ljmp = (i==8'b00000010); endfunction 171 | //SJMP 172 | function sjmp(input [7:0] i); sjmp = (i==8'b10000000); endfunction 173 | //JMP 174 | function jmp(input [7:0] i); jmp = (i==8'b01110011); endfunction 175 | //JZ 176 | function jz(input [7:0] i); jz = (i==8'b01100000); endfunction 177 | //JNZ 178 | function jnz(input [7:0] i); jnz = (i==8'b01110000); endfunction 179 | //CJNE 180 | function cjne_a_di_rel(input [7:0] i); cjne_a_di_rel = (i==8'b10110101); endfunction 181 | function cjne_a_da_rel(input [7:0] i); cjne_a_da_rel = (i==8'b10110100); endfunction 182 | function cjne_rn_da_rel(input [7:0] i); cjne_rn_da_rel = (i[7:3]==5'b10111); endfunction 183 | function cjne_ri_da_rel(input [7:0] i); cjne_ri_da_rel=(i[7:1]==7'b1011011); endfunction 184 | //DJNZ 185 | function djnz_rn_rel(input [7:0] i); djnz_rn_rel = (i[7:3]==5'b11011); endfunction 186 | function djnz_di_rel(input [7:0] i); djnz_di_rel =(i==8'b11010101); endfunction 187 | //NOP 188 | function nop(input [7:0] i); nop = (i==8'b00000000); endfunction 189 | 190 | 191 | function [15:0] divide ( input [7:0] a, input [7:0] b); 192 | reg [7:0] ans; 193 | reg [7:0] rem; 194 | reg [7:0] x7; 195 | reg [7:0] x6; 196 | reg [7:0] x5; 197 | reg [7:0] x4; 198 | reg [7:0] x3; 199 | reg [7:0] x2; 200 | reg [7:0] x1; 201 | reg [7:0] x0; 202 | 203 | reg [1:0] y5; 204 | reg [2:0] y4; 205 | reg [3:0] y3; 206 | reg [4:0] y2; 207 | reg [5:0] y1; 208 | reg [6:0] y0; 209 | begin 210 | 211 | x7 = a; 212 | ans[7] = (|b[7:1])? 1'b0 : x7[7]; 213 | 214 | x6 = {(~ans[7])&a[7],a[6:0]}; 215 | ans[6] = (|b[7:2])? 1'b0 : (x6[7:6]>=b[1:0]); 216 | 217 | y5 = ans[6] ? (x6[7:6]-b[1:0]) : x6[7:6]; 218 | x5 = { y5, a[5:0] }; 219 | ans[5] = (|b[7:3])? 1'b0 : ( x5[7:5]>=b[2:0] ); 220 | 221 | y4 = ans[5] ? (x5[7:5]-b[2:0]) : x5[7:5]; 222 | x4 = { y4, a[4:0]}; 223 | ans[4] = (|b[7:4])? 1'b0 : ( x4[7:4]>=b[3:0] ); 224 | 225 | y3 = ans[4] ? (x4[7:4]-b[3:0]) : x4[7:4]; 226 | x3 = {y3, a[3:0]}; 227 | ans[3] = (|b[7:5])? 1'b0 : ( x3[7:3]>=b[4:0] ); 228 | 229 | y2 = ans[3] ? (x3[7:3]-b[4:0]) : x3[7:3]; 230 | x2 = {y2,a[2:0]}; 231 | ans[2] = (|b[7:6])? 1'b0 : ( x2[7:2]>=b[5:0] ); 232 | 233 | y1 = ans[2] ? (x2[7:2]-b[5:0]) : x2[7:2]; 234 | x1 = {y1,a[1:0]}; 235 | ans[1] = (|b[7]) ? 1'b0 : ( x1[7:1]>=b[6:0] ); 236 | 237 | y0 = ans[1] ? (x1[7:1]-b[6:0]) : x1[7:1]; 238 | x0 = {y0,a[0]}; 239 | ans[0] = (x0>=b); 240 | 241 | rem = ans[0] ? (x0-b) : x0; 242 | 243 | divide = {rem,ans}; 244 | end 245 | 246 | endfunction 247 | 248 | -------------------------------------------------------------------------------- /rtl/interrupt/interrupt.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/risclite/R8051/7df2f5a0ab01969f49f260619fba0650ac97fe14/rtl/interrupt/interrupt.pdf -------------------------------------------------------------------------------- /sim/tb.v: -------------------------------------------------------------------------------- 1 | `timescale 1 ns/1 ps 2 | `define PERIOD 10 3 | `define HALF_PERIOD (`PERIOD/2) 4 | //`define TYPE8052 5 | `define CODE_FILE "../HELLO/HELLO.bin" 6 | module tb; 7 | 8 | reg clk = 1'b0; 9 | always #`HALF_PERIOD clk = ~clk; 10 | 11 | reg rst = 1'b1; 12 | initial #`PERIOD rst = 1'b0; 13 | 14 | wire rom_en; 15 | wire [15:0] rom_addr; 16 | reg [7:0] rom_byte; 17 | reg rom_vld; 18 | 19 | wire ram_rd_en_data; 20 | wire ram_rd_en_sfr; 21 | wire ram_rd_en_xdata; 22 | wire [15:0] ram_rd_addr; 23 | 24 | reg [7:0] ram_rd_byte; 25 | 26 | wire ram_wr_en_data; 27 | wire ram_wr_en_sfr; 28 | wire ram_wr_en_xdata; 29 | wire [15:0] ram_wr_addr; 30 | wire [7:0] ram_wr_byte; 31 | 32 | 33 | r8051 u_cpu ( 34 | .clk ( clk ), 35 | .rst ( rst ), 36 | .cpu_en ( 1'b1 ), 37 | .cpu_restart ( 1'b0 ), 38 | 39 | .rom_en ( rom_en ), 40 | .rom_addr ( rom_addr ), 41 | .rom_byte ( rom_byte ), 42 | .rom_vld ( rom_vld ), 43 | 44 | .ram_rd_en_data ( ram_rd_en_data ), 45 | .ram_rd_en_sfr ( ram_rd_en_sfr ), 46 | .ram_rd_en_xdata ( ram_rd_en_xdata ), 47 | .ram_rd_addr ( ram_rd_addr ), 48 | .ram_rd_byte ( ram_rd_byte ), 49 | .ram_rd_vld ( 1'b1 ), 50 | 51 | .ram_wr_en_data ( ram_wr_en_data ), 52 | .ram_wr_en_sfr ( ram_wr_en_sfr ), 53 | .ram_wr_en_xdata ( ram_wr_en_xdata ), 54 | .ram_wr_addr ( ram_wr_addr ), 55 | .ram_wr_byte ( ram_wr_byte ) 56 | 57 | ); 58 | 59 | reg [7:0] rom[(1'b1<<16)-1:0]; 60 | 61 | integer fd,fx; 62 | initial begin 63 | fd = $fopen(`CODE_FILE,"rb"); 64 | fx = $fread(rom,fd); 65 | $fclose(fd); 66 | end 67 | 68 | always @ ( posedge clk ) 69 | if ( rom_en ) 70 | rom_byte <= rom[rom_addr]; 71 | else; 72 | 73 | always @ ( posedge clk ) 74 | rom_vld <= rom_en; 75 | 76 | 77 | reg [7:0] data [127:0]; 78 | reg [7:0] data_rd_byte; 79 | always @ ( posedge clk ) 80 | if ( ram_rd_en_data ) 81 | data_rd_byte <= data[ram_rd_addr[6:0]]; 82 | else; 83 | 84 | always @ ( posedge clk ) 85 | if ( ram_wr_en_data ) 86 | data[ram_wr_addr[6:0]] <= ram_wr_byte; 87 | else; 88 | 89 | reg [7:0] xdata [127:0]; 90 | reg [7:0] xdata_rd_byte; 91 | always @ ( posedge clk ) 92 | if ( ram_rd_en_xdata ) 93 | xdata_rd_byte <= xdata[ram_rd_addr[6:0]]; 94 | else; 95 | 96 | always @ ( posedge clk ) 97 | if ( ram_wr_en_xdata ) 98 | if (( ram_wr_addr[6:0]==8'h7f ) & ram_wr_byte[0] ) begin 99 | repeat(1000) @ (posedge clk); 100 | $display("Test over, simulation is OK!"); 101 | $stop(1); 102 | end 103 | else 104 | xdata[ram_wr_addr[6:0]] <= ram_wr_byte; 105 | else; 106 | 107 | reg [7:0] sfr_rd_byte; 108 | 109 | always @ ( posedge clk ) 110 | if ( ram_wr_en_sfr & ( ram_wr_addr[7:0]==8'h99 ) ) 111 | $write("%s",ram_wr_byte); 112 | else; 113 | 114 | 115 | always @ ( posedge clk ) 116 | if ( ram_rd_en_sfr ) 117 | if ( ram_rd_addr[7:0]==8'h98 ) 118 | sfr_rd_byte <= 8'h3; 119 | else if ( ram_rd_addr[7:0]==8'h99 ) 120 | sfr_rd_byte <= 0; 121 | else 122 | begin 123 | $display($time," ns : --- SFR READ: %2h---",ram_rd_addr[7:0]); 124 | //$stop; 125 | end 126 | else; 127 | 128 | always @ ( posedge clk ) 129 | if ( ram_wr_en_sfr ) 130 | if(( ram_wr_addr[7:0]==8'h98 )|( ram_wr_addr[7:0]==8'h99 )) 131 | #0; 132 | else 133 | begin 134 | $display($time," ns : --- SFR WRITE: %2h -> %2h---",ram_wr_addr[7:0],ram_wr_byte); 135 | //$stop; 136 | end 137 | else; 138 | 139 | reg [1:0] read_flag; 140 | always @ ( posedge clk ) 141 | if ( ram_rd_en_sfr ) 142 | read_flag <= 2'b10; 143 | else if ( ram_rd_en_xdata ) 144 | read_flag <= 2'b01; 145 | else if ( ram_rd_en_data ) 146 | read_flag <= 2'b0; 147 | else; 148 | 149 | always @* 150 | if ( read_flag[1] ) 151 | ram_rd_byte = sfr_rd_byte; 152 | else if ( read_flag[0] ) 153 | ram_rd_byte = xdata_rd_byte; 154 | else 155 | ram_rd_byte = data_rd_byte; 156 | 157 | endmodule 158 | --------------------------------------------------------------------------------