├── .gitignore ├── README.md ├── STM8S_lib.cbp ├── inc ├── stm8s.h ├── stm8s_adc1.h ├── stm8s_adc2.h ├── stm8s_awu.h ├── stm8s_beep.h ├── stm8s_can.h ├── stm8s_clk.h ├── stm8s_conf.h ├── stm8s_exti.h ├── stm8s_flash.h ├── stm8s_gpio.h ├── stm8s_i2c.h ├── stm8s_itc.h ├── stm8s_iwdg.h ├── stm8s_rst.h ├── stm8s_spi.h ├── stm8s_tim1.h ├── stm8s_tim2.h ├── stm8s_tim3.h ├── stm8s_tim4.h ├── stm8s_tim5.h ├── stm8s_tim6.h ├── stm8s_uart1.h ├── stm8s_uart2.h ├── stm8s_uart3.h ├── stm8s_uart4.h └── stm8s_wwdg.h ├── src ├── stm8s_adc1.c ├── stm8s_adc2.c ├── stm8s_awu.c ├── stm8s_beep.c ├── stm8s_can.c ├── stm8s_clk.c ├── stm8s_exti.c ├── stm8s_flash.c ├── stm8s_gpio.c ├── stm8s_i2c.c ├── stm8s_itc.c ├── stm8s_iwdg.c ├── stm8s_rst.c ├── stm8s_spi.c ├── stm8s_tim1.c ├── stm8s_tim2.c ├── stm8s_tim3.c ├── stm8s_tim4.c ├── stm8s_tim5.c ├── stm8s_tim6.c ├── stm8s_uart1.c ├── stm8s_uart2.c ├── stm8s_uart3.c ├── stm8s_uart4.c └── stm8s_wwdg.c ├── stm8s_it.c └── stm8s_it.h /.gitignore: -------------------------------------------------------------------------------- 1 | lib/ 2 | obj/ 3 | *.rel 4 | *.depend 5 | *.layout 6 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | STM8S Std. Peripheral Library for SDCC. 2 | -------------------------------------------------------------------------------- /STM8S_lib.cbp: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 183 | 184 | -------------------------------------------------------------------------------- /inc/stm8s_adc2.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm8s_adc2.h 4 | * @author MCD Application Team 5 | * @version V2.2.0 6 | * @date 30-September-2014 7 | * @brief This file contains all the prototypes/macros for the ADC2 peripheral. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM8S_ADC2_H 31 | #define __STM8S_ADC2_H 32 | 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "stm8s.h" 35 | 36 | /* Exported types ------------------------------------------------------------*/ 37 | 38 | /** @addtogroup ADC2_Exported_Types 39 | * @{ 40 | */ 41 | 42 | /** 43 | * @brief ADC2 clock prescaler selection 44 | */ 45 | 46 | typedef enum { 47 | ADC2_PRESSEL_FCPU_D2 = (uint8_t)0x00, /**< Prescaler selection fADC2 = fcpu/2 */ 48 | ADC2_PRESSEL_FCPU_D3 = (uint8_t)0x10, /**< Prescaler selection fADC2 = fcpu/3 */ 49 | ADC2_PRESSEL_FCPU_D4 = (uint8_t)0x20, /**< Prescaler selection fADC2 = fcpu/4 */ 50 | ADC2_PRESSEL_FCPU_D6 = (uint8_t)0x30, /**< Prescaler selection fADC2 = fcpu/6 */ 51 | ADC2_PRESSEL_FCPU_D8 = (uint8_t)0x40, /**< Prescaler selection fADC2 = fcpu/8 */ 52 | ADC2_PRESSEL_FCPU_D10 = (uint8_t)0x50, /**< Prescaler selection fADC2 = fcpu/10 */ 53 | ADC2_PRESSEL_FCPU_D12 = (uint8_t)0x60, /**< Prescaler selection fADC2 = fcpu/12 */ 54 | ADC2_PRESSEL_FCPU_D18 = (uint8_t)0x70 /**< Prescaler selection fADC2 = fcpu/18 */ 55 | } ADC2_PresSel_TypeDef; 56 | 57 | /** 58 | * @brief ADC2 External conversion trigger event selection 59 | */ 60 | typedef enum { 61 | ADC2_EXTTRIG_TIM = (uint8_t)0x00, /**< Conversion from Internal TIM TRGO event */ 62 | ADC2_EXTTRIG_GPIO = (uint8_t)0x01 /**< Conversion from External interrupt on ADC_ETR pin*/ 63 | } ADC2_ExtTrig_TypeDef; 64 | 65 | /** 66 | * @brief ADC2 data alignment 67 | */ 68 | typedef enum { 69 | ADC2_ALIGN_LEFT = (uint8_t)0x00, /**< Data alignment left */ 70 | ADC2_ALIGN_RIGHT = (uint8_t)0x08 /**< Data alignment right */ 71 | } ADC2_Align_TypeDef; 72 | 73 | /** 74 | * @brief ADC2 schmitt Trigger 75 | */ 76 | typedef enum { 77 | ADC2_SCHMITTTRIG_CHANNEL0 = (uint8_t)0x00, /**< Schmitt trigger disable on AIN0 */ 78 | ADC2_SCHMITTTRIG_CHANNEL1 = (uint8_t)0x01, /**< Schmitt trigger disable on AIN1 */ 79 | ADC2_SCHMITTTRIG_CHANNEL2 = (uint8_t)0x02, /**< Schmitt trigger disable on AIN2 */ 80 | ADC2_SCHMITTTRIG_CHANNEL3 = (uint8_t)0x03, /**< Schmitt trigger disable on AIN3 */ 81 | ADC2_SCHMITTTRIG_CHANNEL4 = (uint8_t)0x04, /**< Schmitt trigger disable on AIN4 */ 82 | ADC2_SCHMITTTRIG_CHANNEL5 = (uint8_t)0x05, /**< Schmitt trigger disable on AIN5 */ 83 | ADC2_SCHMITTTRIG_CHANNEL6 = (uint8_t)0x06, /**< Schmitt trigger disable on AIN6 */ 84 | ADC2_SCHMITTTRIG_CHANNEL7 = (uint8_t)0x07, /**< Schmitt trigger disable on AIN7 */ 85 | ADC2_SCHMITTTRIG_CHANNEL8 = (uint8_t)0x08, /**< Schmitt trigger disable on AIN8 */ 86 | ADC2_SCHMITTTRIG_CHANNEL9 = (uint8_t)0x09, /**< Schmitt trigger disable on AIN9 */ 87 | ADC2_SCHMITTTRIG_CHANNEL10 = (uint8_t)0x0A, /**< Schmitt trigger disable on AIN10 */ 88 | ADC2_SCHMITTTRIG_CHANNEL11 = (uint8_t)0x0B, /**< Schmitt trigger disable on AIN11 */ 89 | ADC2_SCHMITTTRIG_CHANNEL12 = (uint8_t)0x0C, /**< Schmitt trigger disable on AIN12 */ 90 | ADC2_SCHMITTTRIG_CHANNEL13 = (uint8_t)0x0D, /**< Schmitt trigger disable on AIN13 */ 91 | ADC2_SCHMITTTRIG_CHANNEL14 = (uint8_t)0x0E, /**< Schmitt trigger disable on AIN14 */ 92 | ADC2_SCHMITTTRIG_CHANNEL15 = (uint8_t)0x0F, /**< Schmitt trigger disable on AIN15 */ 93 | ADC2_SCHMITTTRIG_ALL = (uint8_t)0x1F /**< Schmitt trigger disable on all channels */ 94 | 95 | } ADC2_SchmittTrigg_TypeDef; 96 | 97 | /** 98 | * @brief ADC2 conversion mode selection 99 | */ 100 | 101 | typedef enum { 102 | ADC2_CONVERSIONMODE_SINGLE = (uint8_t)0x00, /**< Single conversion mode */ 103 | ADC2_CONVERSIONMODE_CONTINUOUS = (uint8_t)0x01 /**< Continuous conversion mode */ 104 | } ADC2_ConvMode_TypeDef; 105 | 106 | /** 107 | * @brief ADC2 analog channel selection 108 | */ 109 | 110 | typedef enum { 111 | ADC2_CHANNEL_0 = (uint8_t)0x00, /**< Analog channel 0 */ 112 | ADC2_CHANNEL_1 = (uint8_t)0x01, /**< Analog channel 1 */ 113 | ADC2_CHANNEL_2 = (uint8_t)0x02, /**< Analog channel 2 */ 114 | ADC2_CHANNEL_3 = (uint8_t)0x03, /**< Analog channel 3 */ 115 | ADC2_CHANNEL_4 = (uint8_t)0x04, /**< Analog channel 4 */ 116 | ADC2_CHANNEL_5 = (uint8_t)0x05, /**< Analog channel 5 */ 117 | ADC2_CHANNEL_6 = (uint8_t)0x06, /**< Analog channel 6 */ 118 | ADC2_CHANNEL_7 = (uint8_t)0x07, /**< Analog channel 7 */ 119 | ADC2_CHANNEL_8 = (uint8_t)0x08, /**< Analog channel 8 */ 120 | ADC2_CHANNEL_9 = (uint8_t)0x09, /**< Analog channel 9 */ 121 | ADC2_CHANNEL_10 = (uint8_t)0x0A, /**< Analog channel 10 */ 122 | ADC2_CHANNEL_11 = (uint8_t)0x0B, /**< Analog channel 11 */ 123 | ADC2_CHANNEL_12 = (uint8_t)0x0C, /**< Analog channel 12 */ 124 | ADC2_CHANNEL_13 = (uint8_t)0x0D, /**< Analog channel 13 */ 125 | ADC2_CHANNEL_14 = (uint8_t)0x0E, /**< Analog channel 14 */ 126 | ADC2_CHANNEL_15 = (uint8_t)0x0F /**< Analog channel 15 */ 127 | } ADC2_Channel_TypeDef; 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | /* Exported constants --------------------------------------------------------*/ 134 | 135 | /* Exported macros ------------------------------------------------------------*/ 136 | 137 | /* Private macros ------------------------------------------------------------*/ 138 | 139 | /** @addtogroup ADC2_Private_Macros 140 | * @brief Macros used by the assert function to check the different functions parameters. 141 | * @{ 142 | */ 143 | 144 | /** 145 | * @brief Macro used by the assert function to check the different prescaler's values. 146 | */ 147 | #define IS_ADC2_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC2_PRESSEL_FCPU_D2) || \ 148 | ((PRESCALER) == ADC2_PRESSEL_FCPU_D3) || \ 149 | ((PRESCALER) == ADC2_PRESSEL_FCPU_D4) || \ 150 | ((PRESCALER) == ADC2_PRESSEL_FCPU_D6) || \ 151 | ((PRESCALER) == ADC2_PRESSEL_FCPU_D8) || \ 152 | ((PRESCALER) == ADC2_PRESSEL_FCPU_D10) || \ 153 | ((PRESCALER) == ADC2_PRESSEL_FCPU_D12) || \ 154 | ((PRESCALER) == ADC2_PRESSEL_FCPU_D18)) 155 | 156 | /** 157 | * @brief Macro used by the assert function to check the different external trigger values. 158 | */ 159 | #define IS_ADC2_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC2_EXTTRIG_TIM) || \ 160 | ((EXTRIG) == ADC2_EXTTRIG_GPIO)) 161 | 162 | /** 163 | * @brief Macro used by the assert function to check the different alignment modes. 164 | */ 165 | #define IS_ADC2_ALIGN_OK(ALIGN) (((ALIGN) == ADC2_ALIGN_LEFT) || \ 166 | ((ALIGN) == ADC2_ALIGN_RIGHT)) 167 | 168 | 169 | /** 170 | * @brief Macro used by the assert function to check the different schmitt trigger values. 171 | */ 172 | #define IS_ADC2_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL0) || \ 173 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL1) || \ 174 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL2) || \ 175 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL3) || \ 176 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL4) || \ 177 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL5) || \ 178 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL6) || \ 179 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL7) || \ 180 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL8) || \ 181 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL9) || \ 182 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL10) || \ 183 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL11) || \ 184 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL12) || \ 185 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL13) || \ 186 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL14) || \ 187 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL15) || \ 188 | ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_ALL)) 189 | 190 | /** 191 | * @brief Macro used by the assert function to check the different conversion modes. 192 | */ 193 | #define IS_ADC2_CONVERSIONMODE_OK(MODE) (((MODE) == ADC2_CONVERSIONMODE_SINGLE) || \ 194 | ((MODE) == ADC2_CONVERSIONMODE_CONTINUOUS)) 195 | 196 | /** 197 | * @brief Macro used by the assert function to check the different channels values. 198 | */ 199 | #define IS_ADC2_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC2_CHANNEL_0) || \ 200 | ((CHANNEL) == ADC2_CHANNEL_1) || \ 201 | ((CHANNEL) == ADC2_CHANNEL_2) || \ 202 | ((CHANNEL) == ADC2_CHANNEL_3) || \ 203 | ((CHANNEL) == ADC2_CHANNEL_4) || \ 204 | ((CHANNEL) == ADC2_CHANNEL_5) || \ 205 | ((CHANNEL) == ADC2_CHANNEL_6) || \ 206 | ((CHANNEL) == ADC2_CHANNEL_7) || \ 207 | ((CHANNEL) == ADC2_CHANNEL_8) || \ 208 | ((CHANNEL) == ADC2_CHANNEL_9) || \ 209 | ((CHANNEL) == ADC2_CHANNEL_10) || \ 210 | ((CHANNEL) == ADC2_CHANNEL_11) || \ 211 | ((CHANNEL) == ADC2_CHANNEL_12) || \ 212 | ((CHANNEL) == ADC2_CHANNEL_13) || \ 213 | ((CHANNEL) == ADC2_CHANNEL_14) || \ 214 | ((CHANNEL) == ADC2_CHANNEL_15)) 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | /* Exported functions ------------------------------------------------------- */ 221 | 222 | /** @addtogroup ADC2_Exported_Functions 223 | * @{ 224 | */ 225 | void ADC2_DeInit(void); 226 | void ADC2_Init(ADC2_ConvMode_TypeDef ADC2_ConversionMode, 227 | ADC2_Channel_TypeDef ADC2_Channel, 228 | ADC2_PresSel_TypeDef ADC2_PrescalerSelection, 229 | ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, 230 | FunctionalState ADC2_ExtTriggerState, 231 | ADC2_Align_TypeDef ADC2_Align, 232 | ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel, 233 | FunctionalState ADC2_SchmittTriggerState); 234 | void ADC2_Cmd(FunctionalState NewState); 235 | void ADC2_ITConfig(FunctionalState NewState); 236 | void ADC2_PrescalerConfig(ADC2_PresSel_TypeDef ADC2_Prescaler); 237 | void ADC2_SchmittTriggerConfig(ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel, 238 | FunctionalState NewState); 239 | void ADC2_ConversionConfig(ADC2_ConvMode_TypeDef ADC2_ConversionMode, 240 | ADC2_Channel_TypeDef ADC2_Channel, 241 | ADC2_Align_TypeDef ADC2_Align); 242 | void ADC2_ExternalTriggerConfig(ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, FunctionalState NewState); 243 | void ADC2_StartConversion(void); 244 | uint16_t ADC2_GetConversionValue(void); 245 | FlagStatus ADC2_GetFlagStatus(void); 246 | void ADC2_ClearFlag(void); 247 | ITStatus ADC2_GetITStatus(void); 248 | void ADC2_ClearITPendingBit(void); 249 | /** 250 | * @} 251 | */ 252 | 253 | #endif /* __STM8S_ADC2_H */ 254 | 255 | 256 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 257 | -------------------------------------------------------------------------------- /inc/stm8s_awu.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm8s_awu.h 4 | * @author MCD Application Team 5 | * @version V2.2.0 6 | * @date 30-September-2014 7 | * @brief This file contains all functions prototype and macros for the AWU peripheral. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM8S_FLASH_H 30 | #define __STM8S_FLASH_H 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm8s.h" 34 | 35 | /* Exported constants --------------------------------------------------------*/ 36 | 37 | /** @addtogroup FLASH_Exported_Constants 38 | * @{ 39 | */ 40 | 41 | #define FLASH_PROG_START_PHYSICAL_ADDRESS ((uint32_t)0x008000) /*!< Program memory: start address */ 42 | 43 | #if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF52Ax) || defined (STM8AF62Ax) 44 | #define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x027FFF) /*!< Program memory: end address */ 45 | #define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)1024) /*!< Program memory: total number of blocks */ 46 | #define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */ 47 | #define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0047FF) /*!< Data EEPROM memory: end address */ 48 | #define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)16) /*!< Data EEPROM memory: total number of blocks */ 49 | #define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */ 50 | #endif /* STM8S208, STM8S207, STM8S007, STM8AF52Ax, STM8AF62Ax */ 51 | 52 | #if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x) 53 | #define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0xFFFF) /*!< Program memory: end address */ 54 | #define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)256) /*!< Program memory: total number of blocks */ 55 | #define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */ 56 | #define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0043FF) /*!< Data EEPROM memory: end address */ 57 | #define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)8) /*!< Data EEPROM memory: total number of blocks */ 58 | #define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */ 59 | #endif /* STM8S105 or STM8AF626x */ 60 | 61 | #if defined(STM8S103) || defined(STM8S003) || defined(STM8S903) || defined(STM8AF622x) 62 | #define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x9FFF) /*!< Program memory: end address */ 63 | #define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)128) /*!< Program memory: total number of blocks */ 64 | #define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */ 65 | #define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x00427F) /*!< Data EEPROM memory: end address */ 66 | #define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)10) /*!< Data EEPROM memory: total number of blocks */ 67 | #define FLASH_BLOCK_SIZE ((uint8_t)64) /*!< Number of bytes in a block (common for Program and Data memories) */ 68 | #endif /* STM8S103 or STM8S003 or STM8S903 or STM8AF622x*/ 69 | 70 | #define FLASH_RASS_KEY1 ((uint8_t)0x56) /*!< First RASS key */ 71 | #define FLASH_RASS_KEY2 ((uint8_t)0xAE) /*!< Second RASS key */ 72 | 73 | #define OPTION_BYTE_START_PHYSICAL_ADDRESS ((uint16_t)0x4800) 74 | #define OPTION_BYTE_END_PHYSICAL_ADDRESS ((uint16_t)0x487F) 75 | #define FLASH_OPTIONBYTE_ERROR ((uint16_t)0x5555) /*!< Error code option byte 76 | (if value read is not equal to complement value read) */ 77 | /** 78 | * @} 79 | */ 80 | 81 | /* Exported types ------------------------------------------------------------*/ 82 | 83 | /** @addtogroup FLASH_Exported_Types 84 | * @{ 85 | */ 86 | 87 | /** 88 | * @brief FLASH Memory types 89 | */ 90 | typedef enum { 91 | FLASH_MEMTYPE_PROG = (uint8_t)0xFD, /*!< Program memory */ 92 | FLASH_MEMTYPE_DATA = (uint8_t)0xF7 /*!< Data EEPROM memory */ 93 | } FLASH_MemType_TypeDef; 94 | 95 | /** 96 | * @brief FLASH programming modes 97 | */ 98 | typedef enum { 99 | FLASH_PROGRAMMODE_STANDARD = (uint8_t)0x00, /*!< Standard programming mode */ 100 | FLASH_PROGRAMMODE_FAST = (uint8_t)0x10 /*!< Fast programming mode */ 101 | } FLASH_ProgramMode_TypeDef; 102 | 103 | /** 104 | * @brief FLASH fixed programming time 105 | */ 106 | typedef enum { 107 | FLASH_PROGRAMTIME_STANDARD = (uint8_t)0x00, /*!< Standard programming time fixed at 1/2 tprog */ 108 | FLASH_PROGRAMTIME_TPROG = (uint8_t)0x01 /*!< Programming time fixed at tprog */ 109 | } FLASH_ProgramTime_TypeDef; 110 | 111 | /** 112 | * @brief FLASH Low Power mode select 113 | */ 114 | typedef enum { 115 | FLASH_LPMODE_POWERDOWN = (uint8_t)0x04, /*!< HALT: Power-Down / ACTIVE-HALT: Power-Down */ 116 | FLASH_LPMODE_STANDBY = (uint8_t)0x08, /*!< HALT: Standby / ACTIVE-HALT: Standby */ 117 | FLASH_LPMODE_POWERDOWN_STANDBY = (uint8_t)0x00, /*!< HALT: Power-Down / ACTIVE-HALT: Standby */ 118 | FLASH_LPMODE_STANDBY_POWERDOWN = (uint8_t)0x0C /*!< HALT: Standby / ACTIVE-HALT: Power-Down */ 119 | } 120 | FLASH_LPMode_TypeDef; 121 | 122 | /** 123 | * @brief FLASH status of the last operation 124 | */ 125 | typedef enum { 126 | #if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ 127 | defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x) 128 | FLASH_STATUS_END_HIGH_VOLTAGE = (uint8_t)0x40, /*!< End of high voltage */ 129 | #endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */ 130 | FLASH_STATUS_SUCCESSFUL_OPERATION = (uint8_t)0x04, /*!< End of operation flag */ 131 | FLASH_STATUS_TIMEOUT = (uint8_t)0x02, /*!< Time out error */ 132 | FLASH_STATUS_WRITE_PROTECTION_ERROR = (uint8_t)0x01 /*!< Write attempted to protected page */ 133 | } FLASH_Status_TypeDef; 134 | 135 | /** 136 | * @brief FLASH flags definition 137 | * - Warning : FLAG value = mapping position register 138 | */ 139 | typedef enum { 140 | #if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ 141 | defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x) 142 | FLASH_FLAG_HVOFF = (uint8_t)0x40, /*!< End of high voltage flag */ 143 | #endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */ 144 | FLASH_FLAG_DUL = (uint8_t)0x08, /*!< Data EEPROM unlocked flag */ 145 | FLASH_FLAG_EOP = (uint8_t)0x04, /*!< End of programming (write or erase operation) flag */ 146 | FLASH_FLAG_PUL = (uint8_t)0x02, /*!< Flash Program memory unlocked flag */ 147 | FLASH_FLAG_WR_PG_DIS = (uint8_t)0x01 /*!< Write attempted to protected page flag */ 148 | } FLASH_Flag_TypeDef; 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /* Private macros ------------------------------------------------------------*/ 155 | 156 | /** 157 | * @brief Macros used by the assert function in order to check the different functions parameters. 158 | * @addtogroup FLASH_Private_Macros 159 | * @{ 160 | */ 161 | 162 | /** 163 | * @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Address 164 | */ 165 | 166 | #define IS_FLASH_PROG_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && \ 167 | ((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS)) 168 | 169 | /** 170 | * @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Address 171 | */ 172 | 173 | #define IS_FLASH_DATA_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && \ 174 | ((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS)) 175 | 176 | /** 177 | * @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom and flash program Address 178 | */ 179 | #define IS_FLASH_ADDRESS_OK(ADDRESS)((((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS)) || \ 180 | (((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS))) 181 | 182 | /** 183 | * @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Block number 184 | */ 185 | #define IS_FLASH_PROG_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_PROG_BLOCKS_NUMBER) 186 | 187 | /** 188 | * @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Block number 189 | */ 190 | #define IS_FLASH_DATA_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_DATA_BLOCKS_NUMBER) 191 | 192 | /** 193 | * @brief Macro used by the assert function in order to check the different sensitivity values for the flash memory type 194 | */ 195 | 196 | #define IS_MEMORY_TYPE_OK(MEMTYPE) (((MEMTYPE) == FLASH_MEMTYPE_PROG) || \ 197 | ((MEMTYPE) == FLASH_MEMTYPE_DATA)) 198 | 199 | /** 200 | * @brief Macro used by the assert function in order to check the different sensitivity values for the flash program mode 201 | */ 202 | 203 | #define IS_FLASH_PROGRAM_MODE_OK(MODE) (((MODE) == FLASH_PROGRAMMODE_STANDARD) || \ 204 | ((MODE) == FLASH_PROGRAMMODE_FAST)) 205 | 206 | /** 207 | * @brief Macro used by the assert function in order to check the program time mode 208 | */ 209 | 210 | #define IS_FLASH_PROGRAM_TIME_OK(TIME) (((TIME) == FLASH_PROGRAMTIME_STANDARD) || \ 211 | ((TIME) == FLASH_PROGRAMTIME_TPROG)) 212 | 213 | /** 214 | * @brief Macro used by the assert function in order to check the different 215 | * sensitivity values for the low power mode 216 | */ 217 | 218 | #define IS_FLASH_LOW_POWER_MODE_OK(LPMODE) (((LPMODE) == FLASH_LPMODE_POWERDOWN) || \ 219 | ((LPMODE) == FLASH_LPMODE_STANDBY) || \ 220 | ((LPMODE) == FLASH_LPMODE_POWERDOWN_STANDBY) || \ 221 | ((LPMODE) == FLASH_LPMODE_STANDBY_POWERDOWN)) 222 | 223 | /** 224 | * @brief Macro used by the assert function in order to check the different 225 | * sensitivity values for the option bytes Address 226 | */ 227 | #define IS_OPTION_BYTE_ADDRESS_OK(ADDRESS) (((ADDRESS) >= OPTION_BYTE_START_PHYSICAL_ADDRESS) && \ 228 | ((ADDRESS) <= OPTION_BYTE_END_PHYSICAL_ADDRESS)) 229 | 230 | 231 | /** 232 | * @brief Macro used by the assert function in order to check the different flags values 233 | */ 234 | #if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ 235 | defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x) 236 | #define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_HVOFF) || \ 237 | ((FLAG) == FLASH_FLAG_DUL) || \ 238 | ((FLAG) == FLASH_FLAG_EOP) || \ 239 | ((FLAG) == FLASH_FLAG_PUL) || \ 240 | ((FLAG) == FLASH_FLAG_WR_PG_DIS)) 241 | #else /* STM8S103, STM8S903, STM8AF622x */ 242 | #define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_DUL) || \ 243 | ((FLAG) == FLASH_FLAG_EOP) || \ 244 | ((FLAG) == FLASH_FLAG_PUL) || \ 245 | ((FLAG) == FLASH_FLAG_WR_PG_DIS)) 246 | #endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */ 247 | /** 248 | * @} 249 | */ 250 | 251 | /* Exported functions ------------------------------------------------------- */ 252 | 253 | /** @addtogroup FLASH_Exported_Functions 254 | * @{ 255 | */ 256 | void FLASH_Unlock(FLASH_MemType_TypeDef FLASH_MemType); 257 | void FLASH_Lock(FLASH_MemType_TypeDef FLASH_MemType); 258 | void FLASH_DeInit(void); 259 | void FLASH_ITConfig(FunctionalState NewState); 260 | void FLASH_EraseByte(uint32_t Address); 261 | void FLASH_ProgramByte(uint32_t Address, uint8_t Data); 262 | uint8_t FLASH_ReadByte(uint32_t Address); 263 | void FLASH_ProgramWord(uint32_t Address, uint32_t Data); 264 | uint16_t FLASH_ReadOptionByte(uint16_t Address); 265 | void FLASH_ProgramOptionByte(uint16_t Address, uint8_t Data); 266 | void FLASH_EraseOptionByte(uint16_t Address); 267 | void FLASH_SetLowPowerMode(FLASH_LPMode_TypeDef FLASH_LPMode); 268 | void FLASH_SetProgrammingTime(FLASH_ProgramTime_TypeDef FLASH_ProgTime); 269 | FLASH_LPMode_TypeDef FLASH_GetLowPowerMode(void); 270 | FLASH_ProgramTime_TypeDef FLASH_GetProgrammingTime(void); 271 | uint32_t FLASH_GetBootSize(void); 272 | FlagStatus FLASH_GetFlagStatus(FLASH_Flag_TypeDef FLASH_FLAG); 273 | 274 | /** 275 | @code 276 | All the functions declared below must be executed from RAM exclusively, except 277 | for the FLASH_WaitForLastOperation function which can be executed from Flash. 278 | 279 | Steps of the execution from RAM differs from one toolchain to another. 280 | for more details refer to stm8s_flash.c file. 281 | 282 | To enable execution from RAM you can either uncomment the following define 283 | in the stm8s.h file or define it in your toolchain compiler preprocessor 284 | - #define RAM_EXECUTION (1) 285 | 286 | @endcode 287 | */ 288 | IN_RAM(void FLASH_EraseBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType)); 289 | IN_RAM(void FLASH_ProgramBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType, 290 | FLASH_ProgramMode_TypeDef FLASH_ProgMode, uint8_t *Buffer)); 291 | IN_RAM(FLASH_Status_TypeDef FLASH_WaitForLastOperation(FLASH_MemType_TypeDef FLASH_MemType)); 292 | 293 | /** 294 | * @} 295 | */ 296 | 297 | #endif /*__STM8S_FLASH_H */ 298 | 299 | 300 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 301 | -------------------------------------------------------------------------------- /inc/stm8s_gpio.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm8s_gpio.h 4 | * @author MCD Application Team 5 | * @version V2.2.0 6 | * @date 30-September-2014 7 | * @brief This file contains all functions prototype and macros for the GPIO peripheral. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM8S_SPI_H 30 | #define __STM8S_SPI_H 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm8s.h" 34 | 35 | /** @addtogroup STM8S_StdPeriph_Driver 36 | * @{ 37 | */ 38 | 39 | /** @addtogroup SPI_Exported_Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief SPI data direction mode 45 | * Warning: element values correspond to BDM, BDOE, RXONLY bits position 46 | */ 47 | typedef enum { 48 | SPI_DATADIRECTION_2LINES_FULLDUPLEX = (uint8_t)0x00, /*!< 2-line uni-directional data mode enable */ 49 | SPI_DATADIRECTION_2LINES_RXONLY = (uint8_t)0x04, /*!< Receiver only in 2 line uni-directional data mode */ 50 | SPI_DATADIRECTION_1LINE_RX = (uint8_t)0x80, /*!< Receiver only in 1 line bi-directional data mode */ 51 | SPI_DATADIRECTION_1LINE_TX = (uint8_t)0xC0 /*!< Transmit only in 1 line bi-directional data mode */ 52 | } SPI_DataDirection_TypeDef; 53 | 54 | /** 55 | * @brief SPI Slave Select management 56 | * Warning: element values correspond to LSBFIRST bit position 57 | */ 58 | typedef enum 59 | { 60 | SPI_NSS_SOFT = (uint8_t)0x02, /*!< Software slave management disabled */ 61 | SPI_NSS_HARD = (uint8_t)0x00 /*!< Software slave management enabled */ 62 | } SPI_NSS_TypeDef; 63 | 64 | 65 | /** 66 | * @brief SPI direction transmit/receive 67 | */ 68 | 69 | typedef enum { 70 | SPI_DIRECTION_RX = (uint8_t)0x00, /*!< Selects Rx receive direction in bi-directional mode */ 71 | SPI_DIRECTION_TX = (uint8_t)0x01 /*!< Selects Tx transmission direction in bi-directional mode */ 72 | } SPI_Direction_TypeDef; 73 | 74 | /** 75 | * @brief SPI master/slave mode 76 | * Warning: element values correspond to MSTR bit position 77 | */ 78 | typedef enum { 79 | SPI_MODE_MASTER = (uint8_t)0x04, /*!< SPI Master configuration */ 80 | SPI_MODE_SLAVE = (uint8_t)0x00 /*!< SPI Slave configuration */ 81 | } SPI_Mode_TypeDef; 82 | 83 | /** 84 | * @brief SPI BaudRate Prescaler 85 | * Warning: element values correspond to BR bits position 86 | */ 87 | typedef enum { 88 | SPI_BAUDRATEPRESCALER_2 = (uint8_t)0x00, /*!< SPI frequency = frequency(CPU)/2 */ 89 | SPI_BAUDRATEPRESCALER_4 = (uint8_t)0x08, /*!< SPI frequency = frequency(CPU)/4 */ 90 | SPI_BAUDRATEPRESCALER_8 = (uint8_t)0x10, /*!< SPI frequency = frequency(CPU)/8 */ 91 | SPI_BAUDRATEPRESCALER_16 = (uint8_t)0x18, /*!< SPI frequency = frequency(CPU)/16 */ 92 | SPI_BAUDRATEPRESCALER_32 = (uint8_t)0x20, /*!< SPI frequency = frequency(CPU)/32 */ 93 | SPI_BAUDRATEPRESCALER_64 = (uint8_t)0x28, /*!< SPI frequency = frequency(CPU)/64 */ 94 | SPI_BAUDRATEPRESCALER_128 = (uint8_t)0x30, /*!< SPI frequency = frequency(CPU)/128 */ 95 | SPI_BAUDRATEPRESCALER_256 = (uint8_t)0x38 /*!< SPI frequency = frequency(CPU)/256 */ 96 | } SPI_BaudRatePrescaler_TypeDef; 97 | 98 | /** 99 | * @brief SPI Clock Polarity 100 | * Warning: element values correspond to CPOL bit position 101 | */ 102 | typedef enum { 103 | SPI_CLOCKPOLARITY_LOW = (uint8_t)0x00, /*!< Clock to 0 when idle */ 104 | SPI_CLOCKPOLARITY_HIGH = (uint8_t)0x02 /*!< Clock to 1 when idle */ 105 | } SPI_ClockPolarity_TypeDef; 106 | 107 | /** 108 | * @brief SPI Clock Phase 109 | * Warning: element values correspond to CPHA bit position 110 | */ 111 | typedef enum { 112 | SPI_CLOCKPHASE_1EDGE = (uint8_t)0x00, /*!< The first clock transition is the first data capture edge */ 113 | SPI_CLOCKPHASE_2EDGE = (uint8_t)0x01 /*!< The second clock transition is the first data capture edge */ 114 | } SPI_ClockPhase_TypeDef; 115 | 116 | /** 117 | * @brief SPI Frame Format: MSB or LSB transmitted first 118 | * Warning: element values correspond to LSBFIRST bit position 119 | */ 120 | typedef enum { 121 | SPI_FIRSTBIT_MSB = (uint8_t)0x00, /*!< MSB bit will be transmitted first */ 122 | SPI_FIRSTBIT_LSB = (uint8_t)0x80 /*!< LSB bit will be transmitted first */ 123 | } SPI_FirstBit_TypeDef; 124 | 125 | /** 126 | * @brief SPI CRC Transmit/Receive 127 | */ 128 | typedef enum { 129 | SPI_CRC_RX = (uint8_t)0x00, /*!< Select Tx CRC register */ 130 | SPI_CRC_TX = (uint8_t)0x01 /*!< Select Rx CRC register */ 131 | } SPI_CRC_TypeDef; 132 | 133 | /** 134 | * @brief SPI flags definition - Warning : FLAG value = mapping position register 135 | */ 136 | typedef enum { 137 | SPI_FLAG_BSY = (uint8_t)0x80, /*!< Busy flag */ 138 | SPI_FLAG_OVR = (uint8_t)0x40, /*!< Overrun flag */ 139 | SPI_FLAG_MODF = (uint8_t)0x20, /*!< Mode fault */ 140 | SPI_FLAG_CRCERR = (uint8_t)0x10, /*!< CRC error flag */ 141 | SPI_FLAG_WKUP = (uint8_t)0x08, /*!< Wake-up flag */ 142 | SPI_FLAG_TXE = (uint8_t)0x02, /*!< Transmit buffer empty */ 143 | SPI_FLAG_RXNE = (uint8_t)0x01 /*!< Receive buffer empty */ 144 | } SPI_Flag_TypeDef; 145 | 146 | /** 147 | * @brief SPI_IT possible values 148 | * Elements values convention: 0xYX 149 | * X: Position of the corresponding Interrupt 150 | * Y: ITPENDINGBIT position 151 | */ 152 | typedef enum 153 | { 154 | SPI_IT_WKUP = (uint8_t)0x34, /*!< Wake-up interrupt*/ 155 | SPI_IT_OVR = (uint8_t)0x65, /*!< Overrun interrupt*/ 156 | SPI_IT_MODF = (uint8_t)0x55, /*!< Mode fault interrupt*/ 157 | SPI_IT_CRCERR = (uint8_t)0x45, /*!< CRC error interrupt*/ 158 | SPI_IT_TXE = (uint8_t)0x17, /*!< Transmit buffer empty interrupt*/ 159 | SPI_IT_RXNE = (uint8_t)0x06, /*!< Receive buffer not empty interrupt*/ 160 | SPI_IT_ERR = (uint8_t)0x05 /*!< Error interrupt*/ 161 | } SPI_IT_TypeDef; 162 | 163 | /** 164 | * @} 165 | */ 166 | 167 | /* Private define ------------------------------------------------------------*/ 168 | 169 | /** @addtogroup SPI_Private_Macros 170 | * @brief Macros used by the assert_param function to check the different functions parameters. 171 | * @{ 172 | */ 173 | 174 | /** 175 | * @brief Macro used by the assert_param function in order to check the data direction mode values 176 | */ 177 | #define IS_SPI_DATA_DIRECTION_OK(MODE) (((MODE) == SPI_DATADIRECTION_2LINES_FULLDUPLEX) || \ 178 | ((MODE) == SPI_DATADIRECTION_2LINES_RXONLY) || \ 179 | ((MODE) == SPI_DATADIRECTION_1LINE_RX) || \ 180 | ((MODE) == SPI_DATADIRECTION_1LINE_TX)) 181 | 182 | /** 183 | * @brief Macro used by the assert_param function in order to check the mode 184 | * half duplex data direction values 185 | */ 186 | #define IS_SPI_DIRECTION_OK(DIRECTION) (((DIRECTION) == SPI_DIRECTION_RX) || \ 187 | ((DIRECTION) == SPI_DIRECTION_TX)) 188 | 189 | /** 190 | * @brief Macro used by the assert_param function in order to check the NSS 191 | * management values 192 | */ 193 | #define IS_SPI_SLAVEMANAGEMENT_OK(NSS) (((NSS) == SPI_NSS_SOFT) || \ 194 | ((NSS) == SPI_NSS_HARD)) 195 | 196 | 197 | /** 198 | * @brief Macro used by the assert_param function in order to check the different 199 | * sensitivity values for the CRC polynomial 200 | */ 201 | #define IS_SPI_CRC_POLYNOMIAL_OK(POLYNOMIAL) ((POLYNOMIAL) > (uint8_t)0x00) 202 | 203 | /** 204 | * @brief Macro used by the assert_param function in order to check the SPI Mode values 205 | */ 206 | #define IS_SPI_MODE_OK(MODE) (((MODE) == SPI_MODE_MASTER) || \ 207 | ((MODE) == SPI_MODE_SLAVE)) 208 | 209 | /** 210 | * @brief Macro used by the assert_param function in order to check the baudrate values 211 | */ 212 | #define IS_SPI_BAUDRATE_PRESCALER_OK(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ 213 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ 214 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ 215 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ 216 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ 217 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ 218 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ 219 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) 220 | 221 | /** 222 | * @brief Macro used by the assert_param function in order to check the polarity values 223 | */ 224 | #define IS_SPI_POLARITY_OK(CLKPOL) (((CLKPOL) == SPI_CLOCKPOLARITY_LOW) || \ 225 | ((CLKPOL) == SPI_CLOCKPOLARITY_HIGH)) 226 | 227 | /** 228 | * @brief Macro used by the assert_param function in order to check the phase values 229 | */ 230 | #define IS_SPI_PHASE_OK(CLKPHA) (((CLKPHA) == SPI_CLOCKPHASE_1EDGE) || \ 231 | ((CLKPHA) == SPI_CLOCKPHASE_2EDGE)) 232 | 233 | /** 234 | * @brief Macro used by the assert_param function in order to check the first 235 | * bit to be transmited values 236 | */ 237 | #define IS_SPI_FIRSTBIT_OK(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ 238 | ((BIT) == SPI_FIRSTBIT_LSB)) 239 | 240 | /** 241 | * @brief Macro used by the assert_param function in order to check the CRC 242 | * Transmit/Receive 243 | */ 244 | #define IS_SPI_CRC_OK(CRC) (((CRC) == SPI_CRC_TX) || \ 245 | ((CRC) == SPI_CRC_RX)) 246 | 247 | /** 248 | * @brief Macro used by the assert_param function in order to check the 249 | * different flags values 250 | */ 251 | #define IS_SPI_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_OVR) || \ 252 | ((FLAG) == SPI_FLAG_MODF) || \ 253 | ((FLAG) == SPI_FLAG_CRCERR) || \ 254 | ((FLAG) == SPI_FLAG_WKUP) || \ 255 | ((FLAG) == SPI_FLAG_TXE) || \ 256 | ((FLAG) == SPI_FLAG_RXNE) || \ 257 | ((FLAG) == SPI_FLAG_BSY)) 258 | 259 | /** 260 | * @brief Macro used by the assert_param function in order to check the 261 | * different sensitivity values for the flag that can be cleared 262 | * by writing 0 263 | */ 264 | #define IS_SPI_CLEAR_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_CRCERR) || \ 265 | ((FLAG) == SPI_FLAG_WKUP)) 266 | 267 | /** 268 | * @brief Macro used by the assert_param function in order to check the 269 | * different sensitivity values for the Interrupts 270 | */ 271 | #define IS_SPI_CONFIG_IT_OK(Interrupt) (((Interrupt) == SPI_IT_TXE) || \ 272 | ((Interrupt) == SPI_IT_RXNE) || \ 273 | ((Interrupt) == SPI_IT_ERR) || \ 274 | ((Interrupt) == SPI_IT_WKUP)) 275 | 276 | /** 277 | * @brief Macro used by the assert_param function in order to check the 278 | * different sensitivity values for the pending bit 279 | */ 280 | #define IS_SPI_GET_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_OVR) || \ 281 | ((ITPendingBit) == SPI_IT_MODF) || \ 282 | ((ITPendingBit) == SPI_IT_CRCERR) || \ 283 | ((ITPendingBit) == SPI_IT_WKUP) || \ 284 | ((ITPendingBit) == SPI_IT_TXE) || \ 285 | ((ITPendingBit) == SPI_IT_RXNE)) 286 | 287 | /** 288 | * @brief Macro used by the assert_param function in order to check the 289 | * different sensitivity values for the pending bit that can be cleared 290 | * by writing 0 291 | */ 292 | #define IS_SPI_CLEAR_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_CRCERR) || \ 293 | ((ITPendingBit) == SPI_IT_WKUP)) 294 | 295 | /** 296 | * @} 297 | */ 298 | 299 | /** @addtogroup SPI_Exported_Functions 300 | * @{ 301 | */ 302 | void SPI_DeInit(void); 303 | void SPI_Init(SPI_FirstBit_TypeDef FirstBit, 304 | SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler, 305 | SPI_Mode_TypeDef Mode, SPI_ClockPolarity_TypeDef ClockPolarity, 306 | SPI_ClockPhase_TypeDef ClockPhase, 307 | SPI_DataDirection_TypeDef Data_Direction, 308 | SPI_NSS_TypeDef Slave_Management, uint8_t CRCPolynomial); 309 | void SPI_Cmd(FunctionalState NewState); 310 | void SPI_ITConfig(SPI_IT_TypeDef SPI_IT, FunctionalState NewState); 311 | void SPI_SendData(uint8_t Data); 312 | uint8_t SPI_ReceiveData(void); 313 | void SPI_NSSInternalSoftwareCmd(FunctionalState NewState); 314 | void SPI_TransmitCRC(void); 315 | void SPI_CalculateCRCCmd(FunctionalState NewState); 316 | uint8_t SPI_GetCRC(SPI_CRC_TypeDef SPI_CRC); 317 | void SPI_ResetCRC(void); 318 | uint8_t SPI_GetCRCPolynomial(void); 319 | void SPI_BiDirectionalLineConfig(SPI_Direction_TypeDef SPI_Direction); 320 | FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG); 321 | void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG); 322 | ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT); 323 | void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT); 324 | 325 | /** 326 | * @} 327 | */ 328 | 329 | #endif /* __STM8S_SPI_H */ 330 | 331 | /** 332 | * @} 333 | */ 334 | 335 | 336 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 337 | -------------------------------------------------------------------------------- /inc/stm8s_tim2.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm8s_tim2.h 4 | * @author MCD Application Team 5 | * @version V2.2.0 6 | * @date 30-September-2014 7 | * @brief This file contains all functions prototype and macros for the TIM2 peripheral. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM8S_TIM2_H 30 | #define __STM8S_TIM2_H 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm8s.h" 34 | 35 | /** @addtogroup STM8S_StdPeriph_Driver 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | 41 | 42 | /** TIM2 Forced Action */ 43 | typedef enum 44 | { 45 | TIM2_FORCEDACTION_ACTIVE = ((uint8_t)0x50), 46 | TIM2_FORCEDACTION_INACTIVE = ((uint8_t)0x40) 47 | }TIM2_ForcedAction_TypeDef; 48 | 49 | #define IS_TIM2_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM2_FORCEDACTION_ACTIVE) || \ 50 | ((ACTION) == TIM2_FORCEDACTION_INACTIVE)) 51 | 52 | /** TIM2 Prescaler */ 53 | typedef enum 54 | { 55 | TIM2_PRESCALER_1 = ((uint8_t)0x00), 56 | TIM2_PRESCALER_2 = ((uint8_t)0x01), 57 | TIM2_PRESCALER_4 = ((uint8_t)0x02), 58 | TIM2_PRESCALER_8 = ((uint8_t)0x03), 59 | TIM2_PRESCALER_16 = ((uint8_t)0x04), 60 | TIM2_PRESCALER_32 = ((uint8_t)0x05), 61 | TIM2_PRESCALER_64 = ((uint8_t)0x06), 62 | TIM2_PRESCALER_128 = ((uint8_t)0x07), 63 | TIM2_PRESCALER_256 = ((uint8_t)0x08), 64 | TIM2_PRESCALER_512 = ((uint8_t)0x09), 65 | TIM2_PRESCALER_1024 = ((uint8_t)0x0A), 66 | TIM2_PRESCALER_2048 = ((uint8_t)0x0B), 67 | TIM2_PRESCALER_4096 = ((uint8_t)0x0C), 68 | TIM2_PRESCALER_8192 = ((uint8_t)0x0D), 69 | TIM2_PRESCALER_16384 = ((uint8_t)0x0E), 70 | TIM2_PRESCALER_32768 = ((uint8_t)0x0F) 71 | }TIM2_Prescaler_TypeDef; 72 | 73 | #define IS_TIM2_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM2_PRESCALER_1 ) || \ 74 | ((PRESCALER) == TIM2_PRESCALER_2 ) || \ 75 | ((PRESCALER) == TIM2_PRESCALER_4 ) || \ 76 | ((PRESCALER) == TIM2_PRESCALER_8 ) || \ 77 | ((PRESCALER) == TIM2_PRESCALER_16 ) || \ 78 | ((PRESCALER) == TIM2_PRESCALER_32 ) || \ 79 | ((PRESCALER) == TIM2_PRESCALER_64 ) || \ 80 | ((PRESCALER) == TIM2_PRESCALER_128 ) || \ 81 | ((PRESCALER) == TIM2_PRESCALER_256 ) || \ 82 | ((PRESCALER) == TIM2_PRESCALER_512 ) || \ 83 | ((PRESCALER) == TIM2_PRESCALER_1024 ) || \ 84 | ((PRESCALER) == TIM2_PRESCALER_2048 ) || \ 85 | ((PRESCALER) == TIM2_PRESCALER_4096 ) || \ 86 | ((PRESCALER) == TIM2_PRESCALER_8192 ) || \ 87 | ((PRESCALER) == TIM2_PRESCALER_16384 ) || \ 88 | ((PRESCALER) == TIM2_PRESCALER_32768 )) 89 | 90 | /** TIM2 Output Compare and PWM modes */ 91 | typedef enum 92 | { 93 | TIM2_OCMODE_TIMING = ((uint8_t)0x00), 94 | TIM2_OCMODE_ACTIVE = ((uint8_t)0x10), 95 | TIM2_OCMODE_INACTIVE = ((uint8_t)0x20), 96 | TIM2_OCMODE_TOGGLE = ((uint8_t)0x30), 97 | TIM2_OCMODE_PWM1 = ((uint8_t)0x60), 98 | TIM2_OCMODE_PWM2 = ((uint8_t)0x70) 99 | }TIM2_OCMode_TypeDef; 100 | 101 | #define IS_TIM2_OC_MODE_OK(MODE) (((MODE) == TIM2_OCMODE_TIMING) || \ 102 | ((MODE) == TIM2_OCMODE_ACTIVE) || \ 103 | ((MODE) == TIM2_OCMODE_INACTIVE) || \ 104 | ((MODE) == TIM2_OCMODE_TOGGLE)|| \ 105 | ((MODE) == TIM2_OCMODE_PWM1) || \ 106 | ((MODE) == TIM2_OCMODE_PWM2)) 107 | 108 | #define IS_TIM2_OCM_OK(MODE)(((MODE) == TIM2_OCMODE_TIMING) || \ 109 | ((MODE) == TIM2_OCMODE_ACTIVE) || \ 110 | ((MODE) == TIM2_OCMODE_INACTIVE) || \ 111 | ((MODE) == TIM2_OCMODE_TOGGLE)|| \ 112 | ((MODE) == TIM2_OCMODE_PWM1) || \ 113 | ((MODE) == TIM2_OCMODE_PWM2) || \ 114 | ((MODE) == (uint8_t)TIM2_FORCEDACTION_ACTIVE) || \ 115 | ((MODE) == (uint8_t)TIM2_FORCEDACTION_INACTIVE)) 116 | 117 | /** TIM2 One Pulse Mode */ 118 | typedef enum 119 | { 120 | TIM2_OPMODE_SINGLE = ((uint8_t)0x01), 121 | TIM2_OPMODE_REPETITIVE = ((uint8_t)0x00) 122 | }TIM2_OPMode_TypeDef; 123 | 124 | #define IS_TIM2_OPM_MODE_OK(MODE) (((MODE) == TIM2_OPMODE_SINGLE) || \ 125 | ((MODE) == TIM2_OPMODE_REPETITIVE)) 126 | 127 | /** TIM2 Channel */ 128 | typedef enum 129 | { 130 | TIM2_CHANNEL_1 = ((uint8_t)0x00), 131 | TIM2_CHANNEL_2 = ((uint8_t)0x01), 132 | TIM2_CHANNEL_3 = ((uint8_t)0x02) 133 | }TIM2_Channel_TypeDef; 134 | 135 | #define IS_TIM2_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM2_CHANNEL_1) || \ 136 | ((CHANNEL) == TIM2_CHANNEL_2) || \ 137 | ((CHANNEL) == TIM2_CHANNEL_3)) 138 | 139 | #define IS_TIM2_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM2_CHANNEL_1) || \ 140 | ((CHANNEL) == TIM2_CHANNEL_2)) 141 | 142 | /** TIM2 Output Compare Polarity */ 143 | typedef enum 144 | { 145 | TIM2_OCPOLARITY_HIGH = ((uint8_t)0x00), 146 | TIM2_OCPOLARITY_LOW = ((uint8_t)0x22) 147 | }TIM2_OCPolarity_TypeDef; 148 | 149 | #define IS_TIM2_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM2_OCPOLARITY_HIGH) || \ 150 | ((POLARITY) == TIM2_OCPOLARITY_LOW)) 151 | 152 | /** TIM2 Output Compare states */ 153 | typedef enum 154 | { 155 | TIM2_OUTPUTSTATE_DISABLE = ((uint8_t)0x00), 156 | TIM2_OUTPUTSTATE_ENABLE = ((uint8_t)0x11) 157 | }TIM2_OutputState_TypeDef; 158 | 159 | #define IS_TIM2_OUTPUT_STATE_OK(STATE) (((STATE) == TIM2_OUTPUTSTATE_DISABLE) || \ 160 | ((STATE) == TIM2_OUTPUTSTATE_ENABLE)) 161 | 162 | /** TIM2 Input Capture Polarity */ 163 | typedef enum 164 | { 165 | TIM2_ICPOLARITY_RISING = ((uint8_t)0x00), 166 | TIM2_ICPOLARITY_FALLING = ((uint8_t)0x44) 167 | }TIM2_ICPolarity_TypeDef; 168 | 169 | #define IS_TIM2_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM2_ICPOLARITY_RISING) || \ 170 | ((POLARITY) == TIM2_ICPOLARITY_FALLING)) 171 | 172 | /** TIM2 Input Capture Selection */ 173 | typedef enum 174 | { 175 | TIM2_ICSELECTION_DIRECTTI = ((uint8_t)0x01), 176 | TIM2_ICSELECTION_INDIRECTTI = ((uint8_t)0x02), 177 | TIM2_ICSELECTION_TRGI = ((uint8_t)0x03) 178 | }TIM2_ICSelection_TypeDef; 179 | 180 | #define IS_TIM2_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM2_ICSELECTION_DIRECTTI) || \ 181 | ((SELECTION) == TIM2_ICSELECTION_INDIRECTTI) || \ 182 | ((SELECTION) == TIM2_ICSELECTION_TRGI)) 183 | 184 | #define IS_TIM2_IC_SELECTION1_OK(SELECTION) (((SELECTION) == TIM2_ICSELECTION_DIRECTTI) || \ 185 | ((SELECTION) == TIM2_ICSELECTION_TRGI)) 186 | 187 | /** TIM2 Input Capture Prescaler */ 188 | typedef enum 189 | { 190 | TIM2_ICPSC_DIV1 = ((uint8_t)0x00), 191 | TIM2_ICPSC_DIV2 = ((uint8_t)0x04), 192 | TIM2_ICPSC_DIV4 = ((uint8_t)0x08), 193 | TIM2_ICPSC_DIV8 = ((uint8_t)0x0C) 194 | }TIM2_ICPSC_TypeDef; 195 | 196 | #define IS_TIM2_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM2_ICPSC_DIV1) || \ 197 | ((PRESCALER) == TIM2_ICPSC_DIV2) || \ 198 | ((PRESCALER) == TIM2_ICPSC_DIV4) || \ 199 | ((PRESCALER) == TIM2_ICPSC_DIV8)) 200 | 201 | /** TIM2 Input Capture Filer Value */ 202 | #define IS_TIM2_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) 203 | 204 | /** TIM2 interrupt sources */ 205 | typedef enum 206 | { 207 | TIM2_IT_UPDATE = ((uint8_t)0x01), 208 | TIM2_IT_CC1 = ((uint8_t)0x02), 209 | TIM2_IT_CC2 = ((uint8_t)0x04), 210 | TIM2_IT_CC3 = ((uint8_t)0x08) 211 | }TIM2_IT_TypeDef; 212 | 213 | #define IS_TIM2_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x0F)) 214 | 215 | #define IS_TIM2_GET_IT_OK(IT) (((IT) == TIM2_IT_UPDATE) || \ 216 | ((IT) == TIM2_IT_CC1) || \ 217 | ((IT) == TIM2_IT_CC2) || \ 218 | ((IT) == TIM2_IT_CC3)) 219 | 220 | /** TIM2 Prescaler Reload Mode */ 221 | typedef enum 222 | { 223 | TIM2_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), 224 | TIM2_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) 225 | }TIM2_PSCReloadMode_TypeDef; 226 | 227 | #define IS_TIM2_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM2_PSCRELOADMODE_UPDATE) || \ 228 | ((RELOAD) == TIM2_PSCRELOADMODE_IMMEDIATE)) 229 | 230 | /** TIM2 Event Source */ 231 | typedef enum 232 | { 233 | TIM2_EVENTSOURCE_UPDATE = ((uint8_t)0x01), 234 | TIM2_EVENTSOURCE_CC1 = ((uint8_t)0x02), 235 | TIM2_EVENTSOURCE_CC2 = ((uint8_t)0x04), 236 | TIM2_EVENTSOURCE_CC3 = ((uint8_t)0x08) 237 | }TIM2_EventSource_TypeDef; 238 | 239 | #define IS_TIM2_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) 240 | 241 | /** TIM2 Update Source */ 242 | typedef enum 243 | { 244 | TIM2_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), 245 | TIM2_UPDATESOURCE_REGULAR = ((uint8_t)0x01) 246 | }TIM2_UpdateSource_TypeDef; 247 | 248 | #define IS_TIM2_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM2_UPDATESOURCE_GLOBAL) || \ 249 | ((SOURCE) == TIM2_UPDATESOURCE_REGULAR)) 250 | 251 | /** TIM2 Flags */ 252 | typedef enum 253 | { 254 | TIM2_FLAG_UPDATE = ((uint16_t)0x0001), 255 | TIM2_FLAG_CC1 = ((uint16_t)0x0002), 256 | TIM2_FLAG_CC2 = ((uint16_t)0x0004), 257 | TIM2_FLAG_CC3 = ((uint16_t)0x0008), 258 | TIM2_FLAG_CC1OF = ((uint16_t)0x0200), 259 | TIM2_FLAG_CC2OF = ((uint16_t)0x0400), 260 | TIM2_FLAG_CC3OF = ((uint16_t)0x0800) 261 | }TIM2_FLAG_TypeDef; 262 | 263 | #define IS_TIM2_GET_FLAG_OK(FLAG) (((FLAG) == TIM2_FLAG_UPDATE) || \ 264 | ((FLAG) == TIM2_FLAG_CC1) || \ 265 | ((FLAG) == TIM2_FLAG_CC2) || \ 266 | ((FLAG) == TIM2_FLAG_CC3) || \ 267 | ((FLAG) == TIM2_FLAG_CC1OF) || \ 268 | ((FLAG) == TIM2_FLAG_CC2OF) || \ 269 | ((FLAG) == TIM2_FLAG_CC3OF)) 270 | 271 | #define IS_TIM2_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF1F0) == 0x0000) && ((uint16_t)(FLAG) != 0x0000)) 272 | 273 | /** 274 | * @} 275 | */ 276 | 277 | /* Exported macro ------------------------------------------------------------*/ 278 | 279 | /* Exported functions --------------------------------------------------------*/ 280 | 281 | /** @addtogroup TIM2_Exported_Functions 282 | * @{ 283 | */ 284 | 285 | void TIM2_DeInit(void); 286 | void TIM2_TimeBaseInit(TIM2_Prescaler_TypeDef TIM2_Prescaler, uint16_t TIM2_Period); 287 | void TIM2_OC1Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity); 288 | void TIM2_OC2Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity); 289 | void TIM2_OC3Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity); 290 | void TIM2_ICInit(TIM2_Channel_TypeDef TIM2_Channel, TIM2_ICPolarity_TypeDef TIM2_ICPolarity, TIM2_ICSelection_TypeDef TIM2_ICSelection, TIM2_ICPSC_TypeDef TIM2_ICPrescaler, uint8_t TIM2_ICFilter); 291 | void TIM2_PWMIConfig(TIM2_Channel_TypeDef TIM2_Channel, TIM2_ICPolarity_TypeDef TIM2_ICPolarity, TIM2_ICSelection_TypeDef TIM2_ICSelection, TIM2_ICPSC_TypeDef TIM2_ICPrescaler, uint8_t TIM2_ICFilter); 292 | void TIM2_Cmd(FunctionalState NewState); 293 | void TIM2_ITConfig(TIM2_IT_TypeDef TIM2_IT, FunctionalState NewState); 294 | void TIM2_InternalClockConfig(void); 295 | void TIM2_UpdateDisableConfig(FunctionalState NewState); 296 | void TIM2_UpdateRequestConfig(TIM2_UpdateSource_TypeDef TIM2_UpdateSource); 297 | void TIM2_SelectOnePulseMode(TIM2_OPMode_TypeDef TIM2_OPMode); 298 | void TIM2_PrescalerConfig(TIM2_Prescaler_TypeDef Prescaler, TIM2_PSCReloadMode_TypeDef TIM2_PSCReloadMode); 299 | void TIM2_ForcedOC1Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); 300 | void TIM2_ForcedOC2Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); 301 | void TIM2_ForcedOC3Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); 302 | void TIM2_ARRPreloadConfig(FunctionalState NewState); 303 | void TIM2_CCPreloadControl(FunctionalState NewState); 304 | void TIM2_OC1PreloadConfig(FunctionalState NewState); 305 | void TIM2_OC2PreloadConfig(FunctionalState NewState); 306 | void TIM2_OC3PreloadConfig(FunctionalState NewState); 307 | void TIM2_GenerateEvent(TIM2_EventSource_TypeDef TIM2_EventSource); 308 | void TIM2_OC1PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); 309 | void TIM2_OC2PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); 310 | void TIM2_OC3PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); 311 | void TIM2_CCxCmd(TIM2_Channel_TypeDef TIM2_Channel, FunctionalState NewState); 312 | void TIM2_SelectOCxM(TIM2_Channel_TypeDef TIM2_Channel, TIM2_OCMode_TypeDef TIM2_OCMode); 313 | void TIM2_SetCounter(uint16_t Counter); 314 | void TIM2_SetAutoreload(uint16_t Autoreload); 315 | void TIM2_SetCompare1(uint16_t Compare1); 316 | void TIM2_SetCompare2(uint16_t Compare2); 317 | void TIM2_SetCompare3(uint16_t Compare3); 318 | void TIM2_SetIC1Prescaler(TIM2_ICPSC_TypeDef TIM2_IC1Prescaler); 319 | void TIM2_SetIC2Prescaler(TIM2_ICPSC_TypeDef TIM2_IC2Prescaler); 320 | void TIM2_SetIC3Prescaler(TIM2_ICPSC_TypeDef TIM2_IC3Prescaler); 321 | uint16_t TIM2_GetCapture1(void); 322 | uint16_t TIM2_GetCapture2(void); 323 | uint16_t TIM2_GetCapture3(void); 324 | uint16_t TIM2_GetCounter(void); 325 | TIM2_Prescaler_TypeDef TIM2_GetPrescaler(void); 326 | FlagStatus TIM2_GetFlagStatus(TIM2_FLAG_TypeDef TIM2_FLAG); 327 | void TIM2_ClearFlag(TIM2_FLAG_TypeDef TIM2_FLAG); 328 | ITStatus TIM2_GetITStatus(TIM2_IT_TypeDef TIM2_IT); 329 | void TIM2_ClearITPendingBit(TIM2_IT_TypeDef TIM2_IT); 330 | 331 | /** 332 | * @} 333 | */ 334 | 335 | #endif /* __STM8S_TIM2_H */ 336 | 337 | /** 338 | * @} 339 | */ 340 | 341 | 342 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 343 | -------------------------------------------------------------------------------- /inc/stm8s_tim3.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm8s_tim3.h 4 | * @author MCD Application Team 5 | * @version V2.2.0 6 | * @date 30-September-2014 7 | * @brief This file contains all functions prototype and macros for the TIM3 peripheral. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM8S_TIM3_H 30 | #define __STM8S_TIM3_H 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm8s.h" 34 | 35 | /** @addtogroup STM8S_StdPeriph_Driver 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | 41 | /** @addtogroup TIM3_Exported_Types 42 | * @{ 43 | */ 44 | 45 | /** TIM3 Forced Action */ 46 | typedef enum 47 | { 48 | TIM3_FORCEDACTION_ACTIVE = ((uint8_t)0x50), 49 | TIM3_FORCEDACTION_INACTIVE = ((uint8_t)0x40) 50 | } TIM3_ForcedAction_TypeDef; 51 | 52 | #define IS_TIM3_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM3_FORCEDACTION_ACTIVE) || \ 53 | ((ACTION) == TIM3_FORCEDACTION_INACTIVE)) 54 | 55 | /** TIM3 Prescaler */ 56 | typedef enum 57 | { 58 | TIM3_PRESCALER_1 = ((uint8_t)0x00), 59 | TIM3_PRESCALER_2 = ((uint8_t)0x01), 60 | TIM3_PRESCALER_4 = ((uint8_t)0x02), 61 | TIM3_PRESCALER_8 = ((uint8_t)0x03), 62 | TIM3_PRESCALER_16 = ((uint8_t)0x04), 63 | TIM3_PRESCALER_32 = ((uint8_t)0x05), 64 | TIM3_PRESCALER_64 = ((uint8_t)0x06), 65 | TIM3_PRESCALER_128 = ((uint8_t)0x07), 66 | TIM3_PRESCALER_256 = ((uint8_t)0x08), 67 | TIM3_PRESCALER_512 = ((uint8_t)0x09), 68 | TIM3_PRESCALER_1024 = ((uint8_t)0x0A), 69 | TIM3_PRESCALER_2048 = ((uint8_t)0x0B), 70 | TIM3_PRESCALER_4096 = ((uint8_t)0x0C), 71 | TIM3_PRESCALER_8192 = ((uint8_t)0x0D), 72 | TIM3_PRESCALER_16384 = ((uint8_t)0x0E), 73 | TIM3_PRESCALER_32768 = ((uint8_t)0x0F) 74 | } TIM3_Prescaler_TypeDef; 75 | 76 | #define IS_TIM3_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_PRESCALER_1 ) || \ 77 | ((PRESCALER) == TIM3_PRESCALER_2 ) || \ 78 | ((PRESCALER) == TIM3_PRESCALER_4 ) || \ 79 | ((PRESCALER) == TIM3_PRESCALER_8 ) || \ 80 | ((PRESCALER) == TIM3_PRESCALER_16 ) || \ 81 | ((PRESCALER) == TIM3_PRESCALER_32 ) || \ 82 | ((PRESCALER) == TIM3_PRESCALER_64 ) || \ 83 | ((PRESCALER) == TIM3_PRESCALER_128 ) || \ 84 | ((PRESCALER) == TIM3_PRESCALER_256 ) || \ 85 | ((PRESCALER) == TIM3_PRESCALER_512 ) || \ 86 | ((PRESCALER) == TIM3_PRESCALER_1024 ) || \ 87 | ((PRESCALER) == TIM3_PRESCALER_2048 ) || \ 88 | ((PRESCALER) == TIM3_PRESCALER_4096 ) || \ 89 | ((PRESCALER) == TIM3_PRESCALER_8192 ) || \ 90 | ((PRESCALER) == TIM3_PRESCALER_16384 ) || \ 91 | ((PRESCALER) == TIM3_PRESCALER_32768 )) 92 | 93 | /** TIM3 Output Compare and PWM modes */ 94 | typedef enum 95 | { 96 | TIM3_OCMODE_TIMING = ((uint8_t)0x00), 97 | TIM3_OCMODE_ACTIVE = ((uint8_t)0x10), 98 | TIM3_OCMODE_INACTIVE = ((uint8_t)0x20), 99 | TIM3_OCMODE_TOGGLE = ((uint8_t)0x30), 100 | TIM3_OCMODE_PWM1 = ((uint8_t)0x60), 101 | TIM3_OCMODE_PWM2 = ((uint8_t)0x70) 102 | } TIM3_OCMode_TypeDef; 103 | 104 | #define IS_TIM3_OC_MODE_OK(MODE) (((MODE) == TIM3_OCMODE_TIMING) || \ 105 | ((MODE) == TIM3_OCMODE_ACTIVE) || \ 106 | ((MODE) == TIM3_OCMODE_INACTIVE) || \ 107 | ((MODE) == TIM3_OCMODE_TOGGLE)|| \ 108 | ((MODE) == TIM3_OCMODE_PWM1) || \ 109 | ((MODE) == TIM3_OCMODE_PWM2)) 110 | 111 | #define IS_TIM3_OCM_OK(MODE)(((MODE) == TIM3_OCMODE_TIMING) || \ 112 | ((MODE) == TIM3_OCMODE_ACTIVE) || \ 113 | ((MODE) == TIM3_OCMODE_INACTIVE) || \ 114 | ((MODE) == TIM3_OCMODE_TOGGLE)|| \ 115 | ((MODE) == TIM3_OCMODE_PWM1) || \ 116 | ((MODE) == TIM3_OCMODE_PWM2) || \ 117 | ((MODE) == (uint8_t)TIM3_FORCEDACTION_ACTIVE) || \ 118 | ((MODE) == (uint8_t)TIM3_FORCEDACTION_INACTIVE)) 119 | 120 | /** TIM3 One Pulse Mode */ 121 | typedef enum 122 | { 123 | TIM3_OPMODE_SINGLE = ((uint8_t)0x01), 124 | TIM3_OPMODE_REPETITIVE = ((uint8_t)0x00) 125 | } TIM3_OPMode_TypeDef; 126 | 127 | #define IS_TIM3_OPM_MODE_OK(MODE) (((MODE) == TIM3_OPMODE_SINGLE) || \ 128 | ((MODE) == TIM3_OPMODE_REPETITIVE)) 129 | 130 | /** TIM3 Channel */ 131 | 132 | typedef enum 133 | { 134 | TIM3_CHANNEL_1 = ((uint8_t)0x00), 135 | TIM3_CHANNEL_2 = ((uint8_t)0x01) 136 | } TIM3_Channel_TypeDef; 137 | 138 | #define IS_TIM3_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \ 139 | ((CHANNEL) == TIM3_CHANNEL_2)) 140 | 141 | #define IS_TIM3_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \ 142 | ((CHANNEL) == TIM3_CHANNEL_2)) 143 | 144 | /** TIM3 Output Compare Polarity */ 145 | typedef enum 146 | { 147 | TIM3_OCPOLARITY_HIGH = ((uint8_t)0x00), 148 | TIM3_OCPOLARITY_LOW = ((uint8_t)0x22) 149 | } TIM3_OCPolarity_TypeDef; 150 | 151 | #define IS_TIM3_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_OCPOLARITY_HIGH) || \ 152 | ((POLARITY) == TIM3_OCPOLARITY_LOW)) 153 | 154 | /** TIM3 Output Compare states */ 155 | typedef enum 156 | { 157 | TIM3_OUTPUTSTATE_DISABLE = ((uint8_t)0x00), 158 | TIM3_OUTPUTSTATE_ENABLE = ((uint8_t)0x11) 159 | } TIM3_OutputState_TypeDef; 160 | 161 | #define IS_TIM3_OUTPUT_STATE_OK(STATE) (((STATE) == TIM3_OUTPUTSTATE_DISABLE) || \ 162 | ((STATE) == TIM3_OUTPUTSTATE_ENABLE)) 163 | 164 | /** TIM3 Input Capture Polarity */ 165 | typedef enum 166 | { 167 | TIM3_ICPOLARITY_RISING = ((uint8_t)0x00), 168 | TIM3_ICPOLARITY_FALLING = ((uint8_t)0x44) 169 | } TIM3_ICPolarity_TypeDef; 170 | 171 | #define IS_TIM3_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_ICPOLARITY_RISING) || \ 172 | ((POLARITY) == TIM3_ICPOLARITY_FALLING)) 173 | 174 | /** TIM3 Input Capture Selection */ 175 | typedef enum 176 | { 177 | TIM3_ICSELECTION_DIRECTTI = ((uint8_t)0x01), 178 | TIM3_ICSELECTION_INDIRECTTI = ((uint8_t)0x02), 179 | TIM3_ICSELECTION_TRGI = ((uint8_t)0x03) 180 | } TIM3_ICSelection_TypeDef; 181 | 182 | #define IS_TIM3_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM3_ICSELECTION_DIRECTTI) || \ 183 | ((SELECTION) == TIM3_ICSELECTION_INDIRECTTI) || \ 184 | ((SELECTION) == TIM3_ICSELECTION_TRGI)) 185 | 186 | /** TIM3 Input Capture Prescaler */ 187 | typedef enum 188 | { 189 | TIM3_ICPSC_DIV1 = ((uint8_t)0x00), 190 | TIM3_ICPSC_DIV2 = ((uint8_t)0x04), 191 | TIM3_ICPSC_DIV4 = ((uint8_t)0x08), 192 | TIM3_ICPSC_DIV8 = ((uint8_t)0x0C) 193 | } TIM3_ICPSC_TypeDef; 194 | 195 | #define IS_TIM3_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_ICPSC_DIV1) || \ 196 | ((PRESCALER) == TIM3_ICPSC_DIV2) || \ 197 | ((PRESCALER) == TIM3_ICPSC_DIV4) || \ 198 | ((PRESCALER) == TIM3_ICPSC_DIV8)) 199 | 200 | /** TIM3 Input Capture Filer Value */ 201 | #define IS_TIM3_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) 202 | 203 | /** TIM3 interrupt sources */ 204 | typedef enum 205 | { 206 | TIM3_IT_UPDATE = ((uint8_t)0x01), 207 | TIM3_IT_CC1 = ((uint8_t)0x02), 208 | TIM3_IT_CC2 = ((uint8_t)0x04) 209 | } TIM3_IT_TypeDef; 210 | 211 | #define IS_TIM3_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x07)) 212 | 213 | #define IS_TIM3_GET_IT_OK(IT) (((IT) == TIM3_IT_UPDATE) || \ 214 | ((IT) == TIM3_IT_CC1) || \ 215 | ((IT) == TIM3_IT_CC2)) 216 | 217 | /** TIM3 Prescaler Reload Mode */ 218 | typedef enum 219 | { 220 | TIM3_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), 221 | TIM3_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) 222 | } TIM3_PSCReloadMode_TypeDef; 223 | 224 | #define IS_TIM3_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM3_PSCRELOADMODE_UPDATE) || \ 225 | ((RELOAD) == TIM3_PSCRELOADMODE_IMMEDIATE)) 226 | 227 | /** TIM3 Event Source */ 228 | typedef enum 229 | { 230 | TIM3_EVENTSOURCE_UPDATE = ((uint8_t)0x01), 231 | TIM3_EVENTSOURCE_CC1 = ((uint8_t)0x02), 232 | TIM3_EVENTSOURCE_CC2 = ((uint8_t)0x04) 233 | } TIM3_EventSource_TypeDef; 234 | 235 | #define IS_TIM3_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) 236 | 237 | /** TIM3 Update Source */ 238 | typedef enum 239 | { 240 | TIM3_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), 241 | TIM3_UPDATESOURCE_REGULAR = ((uint8_t)0x01) 242 | } TIM3_UpdateSource_TypeDef; 243 | 244 | #define IS_TIM3_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM3_UPDATESOURCE_GLOBAL) || \ 245 | ((SOURCE) == TIM3_UPDATESOURCE_REGULAR)) 246 | 247 | /** TIM3 Flags */ 248 | typedef enum 249 | { 250 | TIM3_FLAG_UPDATE = ((uint16_t)0x0001), 251 | TIM3_FLAG_CC1 = ((uint16_t)0x0002), 252 | TIM3_FLAG_CC2 = ((uint16_t)0x0004), 253 | TIM3_FLAG_CC1OF = ((uint16_t)0x0200), 254 | TIM3_FLAG_CC2OF = ((uint16_t)0x0400) 255 | } TIM3_FLAG_TypeDef; 256 | 257 | #define IS_TIM3_GET_FLAG_OK(FLAG) (((FLAG) == TIM3_FLAG_UPDATE) || \ 258 | ((FLAG) == TIM3_FLAG_CC1) || \ 259 | ((FLAG) == TIM3_FLAG_CC2) || \ 260 | ((FLAG) == TIM3_FLAG_CC1OF) || \ 261 | ((FLAG) == TIM3_FLAG_CC2OF) ) 262 | 263 | #define IS_TIM3_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF9F8) == 0x0000) && ((uint16_t)(FLAG)!= 0x0000)) 264 | 265 | /** 266 | * @} 267 | */ 268 | 269 | /* Exported macro ------------------------------------------------------------*/ 270 | 271 | /* Exported functions --------------------------------------------------------*/ 272 | 273 | /** @addtogroup TIM3_Exported_Functions 274 | * @{ 275 | */ 276 | 277 | void TIM3_DeInit(void); 278 | void TIM3_TimeBaseInit(TIM3_Prescaler_TypeDef TIM3_Prescaler, uint16_t TIM3_Period); 279 | void TIM3_OC1Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 280 | void TIM3_OC2Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 281 | void TIM3_ICInit(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter); 282 | void TIM3_PWMIConfig(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter); 283 | void TIM3_Cmd(FunctionalState NewState); 284 | void TIM3_ITConfig(TIM3_IT_TypeDef TIM3_IT, FunctionalState NewState); 285 | void TIM3_InternalClockConfig(void); 286 | void TIM3_UpdateDisableConfig(FunctionalState NewState); 287 | void TIM3_UpdateRequestConfig(TIM3_UpdateSource_TypeDef TIM3_UpdateSource); 288 | void TIM3_SelectOnePulseMode(TIM3_OPMode_TypeDef TIM3_OPMode); 289 | void TIM3_PrescalerConfig(TIM3_Prescaler_TypeDef Prescaler, TIM3_PSCReloadMode_TypeDef TIM3_PSCReloadMode); 290 | void TIM3_ForcedOC1Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); 291 | void TIM3_ForcedOC2Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); 292 | void TIM3_ARRPreloadConfig(FunctionalState NewState); 293 | void TIM3_CCPreloadControl(FunctionalState NewState); 294 | void TIM3_OC1PreloadConfig(FunctionalState NewState); 295 | void TIM3_OC2PreloadConfig(FunctionalState NewState); 296 | void TIM3_GenerateEvent(TIM3_EventSource_TypeDef TIM3_EventSource); 297 | void TIM3_OC1PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 298 | void TIM3_OC2PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 299 | void TIM3_CCxCmd(TIM3_Channel_TypeDef TIM3_Channel, FunctionalState NewState); 300 | void TIM3_SelectOCxM(TIM3_Channel_TypeDef TIM3_Channel, TIM3_OCMode_TypeDef TIM3_OCMode); 301 | void TIM3_SetCounter(uint16_t Counter); 302 | void TIM3_SetAutoreload(uint16_t Autoreload); 303 | void TIM3_SetCompare1(uint16_t Compare1); 304 | void TIM3_SetCompare2(uint16_t Compare2); 305 | void TIM3_SetIC1Prescaler(TIM3_ICPSC_TypeDef TIM3_IC1Prescaler); 306 | void TIM3_SetIC2Prescaler(TIM3_ICPSC_TypeDef TIM3_IC2Prescaler); 307 | uint16_t TIM3_GetCapture1(void); 308 | uint16_t TIM3_GetCapture2(void); 309 | uint16_t TIM3_GetCounter(void); 310 | TIM3_Prescaler_TypeDef TIM3_GetPrescaler(void); 311 | FlagStatus TIM3_GetFlagStatus(TIM3_FLAG_TypeDef TIM3_FLAG); 312 | void TIM3_ClearFlag(TIM3_FLAG_TypeDef TIM3_FLAG); 313 | ITStatus TIM3_GetITStatus(TIM3_IT_TypeDef TIM3_IT); 314 | void TIM3_ClearITPendingBit(TIM3_IT_TypeDef TIM3_IT); 315 | 316 | /** 317 | * @} 318 | */ 319 | 320 | #endif /* __STM8S_TIM3_H */ 321 | 322 | /** 323 | * @} 324 | */ 325 | 326 | 327 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 328 | -------------------------------------------------------------------------------- /inc/stm8s_tim4.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm8s_tim4.h 4 | * @author MCD Application Team 5 | * @version V2.2.0 6 | * @date 30-September-2014 7 | * @brief This file contains all functions prototype and macros for the TIM4 peripheral. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM8S_TIM6_H 30 | #define __STM8S_TIM6_H 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm8s.h" 34 | 35 | /** @addtogroup STM8S_StdPeriph_Driver 36 | * @{ 37 | */ 38 | 39 | /* Exported variables ------------------------------------------------------- */ 40 | /* Exported types ------------------------------------------------------------*/ 41 | 42 | /** @addtogroup TIM6_Exported_Types 43 | * @{ 44 | */ 45 | 46 | 47 | /** 48 | * @brief TIM6 Prescaler 49 | */ 50 | typedef enum 51 | { 52 | TIM6_PRESCALER_1 = ((uint8_t)0x00), /*!< Time base Prescaler = 1 (No effect)*/ 53 | TIM6_PRESCALER_2 = ((uint8_t)0x01), /*!< Time base Prescaler = 2 */ 54 | TIM6_PRESCALER_4 = ((uint8_t)0x02), /*!< Time base Prescaler = 4 */ 55 | TIM6_PRESCALER_8 = ((uint8_t)0x03), /*!< Time base Prescaler = 8 */ 56 | TIM6_PRESCALER_16 = ((uint8_t)0x04), /*!< Time base Prescaler = 16 */ 57 | TIM6_PRESCALER_32 = ((uint8_t)0x05), /*!< Time base Prescaler = 32 */ 58 | TIM6_PRESCALER_64 = ((uint8_t)0x06), /*!< Time base Prescaler = 64 */ 59 | TIM6_PRESCALER_128 = ((uint8_t)0x07) /*!< Time base Prescaler = 128 */ 60 | }TIM6_Prescaler_TypeDef; 61 | 62 | /** 63 | * @brief TIM6 One Pulse Mode 64 | */ 65 | typedef enum 66 | { 67 | TIM6_OPMODE_SINGLE = ((uint8_t)0x01), /*!< Single one Pulse mode (OPM Active) */ 68 | TIM6_OPMODE_REPETITIVE = ((uint8_t)0x00) /*!< Repetitive Pulse mode (OPM inactive) */ 69 | }TIM6_OPMode_TypeDef; 70 | 71 | /** 72 | * @brief TIM6 Prescaler Reload Mode 73 | */ 74 | typedef enum 75 | { 76 | TIM6_PSCRELOADMODE_UPDATE =((uint8_t)0x00), /*!< Prescaler value is reloaded at every update*/ 77 | TIM6_PSCRELOADMODE_IMMEDIATE =((uint8_t)0x01) /*!< Prescaler value is reloaded immediately*/ 78 | }TIM6_PSCReloadMode_TypeDef; 79 | 80 | /** 81 | * @brief TIM6 Update Source 82 | */ 83 | typedef enum 84 | { 85 | TIM6_UPDATESOURCE_GLOBAL =((uint8_t)0x00), /*!< Global Update request source */ 86 | TIM6_UPDATESOURCE_REGULAR =((uint8_t)0x01) /*!< Regular Update request source */ 87 | }TIM6_UpdateSource_TypeDef; 88 | 89 | /** 90 | * @brief TIM6 Event Source 91 | */ 92 | typedef enum 93 | { 94 | TIM6_EVENTSOURCE_UPDATE = ((uint8_t)0x01), /*!< Update Event*/ 95 | TIM6_EVENTSOURCE_TRIGGER = ((uint8_t)0x40) /*!< Trigger Event*/ 96 | }TIM6_EventSource_TypeDef; 97 | 98 | /** 99 | * @brief TIM6 Trigger Output Source 100 | */ 101 | typedef enum 102 | { 103 | TIM6_TRGOSOURCE_RESET = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/ 104 | TIM6_TRGOSOURCE_ENABLE = ((uint8_t)0x10), /*!< Trigger Output source = TIM5 is enabled*/ 105 | TIM6_TRGOSOURCE_UPDATE = ((uint8_t)0x20) /*!< Trigger Output source = Update event*/ 106 | }TIM6_TRGOSource_TypeDef; 107 | 108 | /** 109 | * @brief TIM6 Slave Mode 110 | */ 111 | typedef enum 112 | { 113 | TIM6_SLAVEMODE_DISABLE = ((uint8_t)0x00), /*!< Disable slave mode to clock the prescaler directly with the internal clock */ 114 | TIM6_SLAVEMODE_RESET = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/ 115 | TIM6_SLAVEMODE_GATED = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/ 116 | TIM6_SLAVEMODE_TRIGGER = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/ 117 | TIM6_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/ 118 | }TIM6_SlaveMode_TypeDef; 119 | 120 | /** 121 | * @brief TIM6 Flags 122 | */ 123 | typedef enum 124 | { 125 | TIM6_FLAG_UPDATE = ((uint8_t)0x01), /*!< Update Flag */ 126 | TIM6_FLAG_TRIGGER = ((uint8_t)0x40) /*!< Trigger Flag */ 127 | }TIM6_FLAG_TypeDef; 128 | 129 | /** 130 | * @brief TIM6 interrupt sources 131 | */ 132 | typedef enum 133 | { 134 | TIM6_IT_UPDATE = ((uint8_t)0x01), /*!< Update Interrupt*/ 135 | TIM6_IT_TRIGGER = ((uint8_t)0x40) /*!< Trigger Interrupt*/ 136 | }TIM6_IT_TypeDef; 137 | 138 | /** 139 | * @brief TIM6 Internal Trigger Selection 140 | */ 141 | typedef enum 142 | { 143 | TIM6_TS_TIM1 = ((uint8_t)0x20),/*!< TRIG Input source = TIM1 TRIG Output */ 144 | TIM6_TS_TIM5 = ((uint8_t)0x30) /*!< TRIG Input source = TIM5 TRIG Output */ 145 | }TIM6_TS_TypeDef; 146 | 147 | /** 148 | * @} 149 | */ 150 | 151 | /* Exported constants --------------------------------------------------------*/ 152 | /* Exported macros -----------------------------------------------------------*/ 153 | /* Private macros ------------------------------------------------------------*/ 154 | 155 | /** @addtogroup TIM6_Private_Macros 156 | * @{ 157 | */ 158 | 159 | /** 160 | * @brief Macro used by the assert function to check the different functions parameters. 161 | */ 162 | 163 | /** 164 | * @brief Macro TIM6 Prescaler 165 | */ 166 | #define IS_TIM6_PRESCALER_OK(PRESCALER) \ 167 | (((PRESCALER) == TIM6_PRESCALER_1) || \ 168 | ((PRESCALER) == TIM6_PRESCALER_2) || \ 169 | ((PRESCALER) == TIM6_PRESCALER_4) || \ 170 | ((PRESCALER) == TIM6_PRESCALER_8) || \ 171 | ((PRESCALER) == TIM6_PRESCALER_16) || \ 172 | ((PRESCALER) == TIM6_PRESCALER_32) || \ 173 | ((PRESCALER) == TIM6_PRESCALER_64) || \ 174 | ((PRESCALER) == TIM6_PRESCALER_128)) 175 | /** 176 | * @brief Macro TIM6 One Pulse Mode 177 | */ 178 | #define IS_TIM6_OPM_MODE_OK(MODE) \ 179 | (((MODE) == TIM6_OPMODE_SINGLE) || \ 180 | ((MODE) == TIM6_OPMODE_REPETITIVE)) 181 | 182 | /** 183 | * @brief Macro TIM6 Prescaler reload 184 | */ 185 | #define IS_TIM6_PRESCALER_RELOAD_OK(RELOAD) \ 186 | (((RELOAD) == TIM6_PSCRELOADMODE_UPDATE) || \ 187 | ((RELOAD) == TIM6_PSCRELOADMODE_IMMEDIATE)) 188 | /** 189 | * @brief Macro TIM6 Update source 190 | */ 191 | #define IS_TIM6_UPDATE_SOURCE_OK(SOURCE) \ 192 | (((SOURCE) == TIM6_UPDATESOURCE_GLOBAL) || \ 193 | ((SOURCE) == TIM6_UPDATESOURCE_REGULAR)) 194 | /** 195 | * @brief Macro TIM6 Event source 196 | */ 197 | #define IS_TIM6_EVENT_SOURCE_OK(SOURCE) \ 198 | ((((SOURCE) & (uint8_t)0xBE) == 0x00) && \ 199 | ((SOURCE) != 0x00)) 200 | 201 | /** 202 | * @brief Macro TIM6 TRGO source 203 | */ 204 | #define IS_TIM6_TRGO_SOURCE_OK(SOURCE) \ 205 | (((SOURCE) == TIM6_TRGOSOURCE_RESET) || \ 206 | ((SOURCE) == TIM6_TRGOSOURCE_ENABLE)|| \ 207 | ((SOURCE) == TIM6_TRGOSOURCE_UPDATE)) 208 | /** 209 | * @brief Macro TIM6 Slave mode 210 | */ 211 | #define IS_TIM6_SLAVE_MODE_OK(MODE) \ 212 | (((MODE) == TIM6_SLAVEMODE_DISABLE) || \ 213 | ((MODE) == TIM6_SLAVEMODE_RESET) || \ 214 | ((MODE) == TIM6_SLAVEMODE_GATED) || \ 215 | ((MODE) == TIM6_SLAVEMODE_TRIGGER) || \ 216 | ((MODE) == TIM6_SLAVEMODE_EXTERNAL1)) 217 | /** 218 | * @brief Macro TIM6 Flags 219 | */ 220 | #define IS_TIM6_GET_FLAG_OK(FLAG) \ 221 | (((FLAG) == TIM6_FLAG_UPDATE) || \ 222 | ((FLAG) == TIM6_FLAG_TRIGGER)) 223 | 224 | #define IS_TIM6_CLEAR_FLAG_OK(FLAG) \ 225 | ((((FLAG) & (uint8_t)0xBE) == 0x00) && ((FLAG) != 0x00)) 226 | /** 227 | * @brief Macro TIM6 interrupts 228 | */ 229 | #define IS_TIM6_IT_OK(IT) \ 230 | (((IT) != 0x00) && \ 231 | (((IT) & (uint8_t)(~(uint8_t)(0x41)))== 0x00)) 232 | 233 | #define IS_TIM6_GET_IT_OK(IT) \ 234 | (((IT) == TIM6_IT_UPDATE) || \ 235 | ((IT) == TIM6_IT_TRIGGER)) 236 | /** 237 | * @brief Macro TIM6 Trigger selection 238 | */ 239 | #define IS_TIM6_TRIGGER_SELECTION_OK(SELECTION) \ 240 | (((SELECTION) == TIM6_TS_TIM5) || \ 241 | ((SELECTION) == TIM6_TS_TIM1)) 242 | /** 243 | * @} 244 | */ 245 | 246 | /* Exported functions --------------------------------------------------------*/ 247 | 248 | /** @addtogroup TIM6_Exported_Functions 249 | * @{ 250 | */ 251 | 252 | void TIM6_DeInit(void); 253 | void TIM6_TimeBaseInit(TIM6_Prescaler_TypeDef TIM6_Prescaler, uint8_t TIM6_Period); 254 | void TIM6_Cmd(FunctionalState NewState); 255 | void TIM6_UpdateDisableConfig(FunctionalState NewState); 256 | void TIM6_UpdateRequestConfig(TIM6_UpdateSource_TypeDef TIM6_UpdateSource); 257 | void TIM6_SelectOnePulseMode(TIM6_OPMode_TypeDef TIM6_OPMode); 258 | void TIM6_PrescalerConfig(TIM6_Prescaler_TypeDef Prescaler, TIM6_PSCReloadMode_TypeDef TIM6_PSCReloadMode); 259 | void TIM6_ARRPreloadConfig(FunctionalState NewState); 260 | void TIM6_SetCounter(uint8_t Counter); 261 | void TIM6_SetAutoreload(uint8_t Autoreload); 262 | uint8_t TIM6_GetCounter(void); 263 | TIM6_Prescaler_TypeDef TIM6_GetPrescaler(void); 264 | void TIM6_ITConfig(TIM6_IT_TypeDef TIM6_IT, FunctionalState NewState); 265 | void TIM6_ClearFlag(TIM6_FLAG_TypeDef TIM6_FLAG); 266 | ITStatus TIM6_GetITStatus(TIM6_IT_TypeDef TIM6_IT); 267 | void TIM6_GenerateEvent(TIM6_EventSource_TypeDef TIM6_EventSource); 268 | FlagStatus TIM6_GetFlagStatus(TIM6_FLAG_TypeDef TIM6_FLAG); 269 | void TIM6_ClearITPendingBit(TIM6_IT_TypeDef TIM6_IT); 270 | void TIM6_SelectOutputTrigger(TIM6_TRGOSource_TypeDef TIM6_TRGOSource); 271 | void TIM6_SelectMasterSlaveMode(FunctionalState NewState); 272 | void TIM6_SelectInputTrigger(TIM6_TS_TypeDef TIM6_InputTriggerSource); 273 | void TIM6_InternalClockConfig(void); 274 | void TIM6_SelectSlaveMode(TIM6_SlaveMode_TypeDef TIM6_SlaveMode); 275 | 276 | /** 277 | * @} 278 | */ 279 | 280 | #endif /* __STM8S_TIM6_H */ 281 | 282 | /** 283 | * @} 284 | */ 285 | 286 | 287 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 288 | -------------------------------------------------------------------------------- /inc/stm8s_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ******************************************************************************** 3 | * @file stm8s_wwdg.h 4 | * @author MCD Application Team 5 | * @version V2.2.0 6 | * @date 30-September-2014 7 | * @brief This file contains all functions prototype and macros for the WWDG peripheral. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm8s_adc2.h" 30 | 31 | /** @addtogroup STM8S_StdPeriph_Driver 32 | * @{ 33 | */ 34 | /* Private typedef -----------------------------------------------------------*/ 35 | /* Private define ------------------------------------------------------------*/ 36 | /* Private macro -------------------------------------------------------------*/ 37 | /* Private variables ---------------------------------------------------------*/ 38 | /* Private function prototypes -----------------------------------------------*/ 39 | /* Private functions ---------------------------------------------------------*/ 40 | 41 | /* Public functions ----------------------------------------------------------*/ 42 | 43 | /** 44 | * @addtogroup ADC2_Public_Functions 45 | * @{ 46 | */ 47 | 48 | /** 49 | * @brief Deinitializes the ADC2 peripheral registers to their default reset 50 | * values. 51 | * @param None 52 | * @retval None 53 | */ 54 | void ADC2_DeInit(void) 55 | { 56 | ADC2->CSR = ADC2_CSR_RESET_VALUE; 57 | ADC2->CR1 = ADC2_CR1_RESET_VALUE; 58 | ADC2->CR2 = ADC2_CR2_RESET_VALUE; 59 | ADC2->TDRH = ADC2_TDRH_RESET_VALUE; 60 | ADC2->TDRL = ADC2_TDRL_RESET_VALUE; 61 | } 62 | 63 | /** 64 | * @brief Initializes the ADC2 peripheral according to the specified parameters 65 | * @param ADC2_ConversionMode: specifies the conversion mode 66 | * can be one of the values of @ref ADC2_ConvMode_TypeDef. 67 | * @param ADC2_Channel: specifies the channel to convert 68 | * can be one of the values of @ref ADC2_Channel_TypeDef. 69 | * @param ADC2_PrescalerSelection: specifies the ADC2 prescaler 70 | * can be one of the values of @ref ADC2_PresSel_TypeDef. 71 | * @param ADC2_ExtTrigger: specifies the external trigger 72 | * can be one of the values of @ref ADC2_ExtTrig_TypeDef. 73 | * @param ADC2_ExtTriggerState: specifies the external trigger new state 74 | * can be one of the values of @ref FunctionalState. 75 | * @param ADC2_Align: specifies the converted data alignment 76 | * can be one of the values of @ref ADC2_Align_TypeDef. 77 | * @param ADC2_SchmittTriggerChannel: specifies the schmitt trigger channel 78 | * can be one of the values of @ref ADC2_SchmittTrigg_TypeDef. 79 | * @param ADC2_SchmittTriggerState: specifies the schmitt trigger state 80 | * can be one of the values of @ref FunctionalState. 81 | * @retval None 82 | */ 83 | void ADC2_Init(ADC2_ConvMode_TypeDef ADC2_ConversionMode, ADC2_Channel_TypeDef ADC2_Channel, ADC2_PresSel_TypeDef ADC2_PrescalerSelection, ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, FunctionalState ADC2_ExtTriggerState, ADC2_Align_TypeDef ADC2_Align, ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel, FunctionalState ADC2_SchmittTriggerState) 84 | { 85 | /* Check the parameters */ 86 | assert_param(IS_ADC2_CONVERSIONMODE_OK(ADC2_ConversionMode)); 87 | assert_param(IS_ADC2_CHANNEL_OK(ADC2_Channel)); 88 | assert_param(IS_ADC2_PRESSEL_OK(ADC2_PrescalerSelection)); 89 | assert_param(IS_ADC2_EXTTRIG_OK(ADC2_ExtTrigger)); 90 | assert_param(IS_FUNCTIONALSTATE_OK(((ADC2_ExtTriggerState)))); 91 | assert_param(IS_ADC2_ALIGN_OK(ADC2_Align)); 92 | assert_param(IS_ADC2_SCHMITTTRIG_OK(ADC2_SchmittTriggerChannel)); 93 | assert_param(IS_FUNCTIONALSTATE_OK(ADC2_SchmittTriggerState)); 94 | 95 | /*-----------------CR1 & CSR configuration --------------------*/ 96 | /* Configure the conversion mode and the channel to convert 97 | respectively according to ADC2_ConversionMode & ADC2_Channel values & ADC2_Align values */ 98 | ADC2_ConversionConfig(ADC2_ConversionMode, ADC2_Channel, ADC2_Align); 99 | /* Select the prescaler division factor according to ADC2_PrescalerSelection values */ 100 | ADC2_PrescalerConfig(ADC2_PrescalerSelection); 101 | 102 | /*-----------------CR2 configuration --------------------*/ 103 | /* Configure the external trigger state and event respectively 104 | according to ADC2_ExtTrigStatus, ADC2_ExtTrigger */ 105 | ADC2_ExternalTriggerConfig(ADC2_ExtTrigger, ADC2_ExtTriggerState); 106 | 107 | /*------------------TDR configuration ---------------------------*/ 108 | /* Configure the schmitt trigger channel and state respectively 109 | according to ADC2_SchmittTriggerChannel & ADC2_SchmittTriggerNewState values */ 110 | ADC2_SchmittTriggerConfig(ADC2_SchmittTriggerChannel, ADC2_SchmittTriggerState); 111 | 112 | /* Enable the ADC2 peripheral */ 113 | ADC2->CR1 |= ADC2_CR1_ADON; 114 | } 115 | 116 | /** 117 | * @brief Enables or Disables the ADC2 peripheral. 118 | * @param NewState: specifies the peripheral enabled or disabled state. 119 | * @retval None 120 | */ 121 | void ADC2_Cmd(FunctionalState NewState) 122 | { 123 | /* Check the parameters */ 124 | assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 125 | 126 | if (NewState != DISABLE) 127 | { 128 | ADC2->CR1 |= ADC2_CR1_ADON; 129 | } 130 | else /* NewState == DISABLE */ 131 | { 132 | ADC2->CR1 &= (uint8_t)(~ADC2_CR1_ADON); 133 | } 134 | } 135 | 136 | /** 137 | * @brief Enables or disables the ADC2 interrupt. 138 | * @param NewState specifies the state of ADC2 interrupt. 139 | * @retval None 140 | */ 141 | void ADC2_ITConfig(FunctionalState NewState) 142 | { 143 | /* Check the parameters */ 144 | assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 145 | 146 | if (NewState != DISABLE) 147 | { 148 | /* Enable the ADC2 interrupts */ 149 | ADC2->CSR |= (uint8_t)ADC2_CSR_EOCIE; 150 | } 151 | else /*NewState == DISABLE */ 152 | { 153 | /* Disable the ADC2 interrupts */ 154 | ADC2->CSR &= (uint8_t)(~ADC2_CSR_EOCIE); 155 | } 156 | } 157 | 158 | /** 159 | * @brief Configure the ADC2 prescaler division factor. 160 | * @param ADC2_Prescaler: the selected prescaler. 161 | * It can be one of the values of @ref ADC2_PresSel_TypeDef. 162 | * @retval None 163 | */ 164 | void ADC2_PrescalerConfig(ADC2_PresSel_TypeDef ADC2_Prescaler) 165 | { 166 | /* Check the parameter */ 167 | assert_param(IS_ADC2_PRESSEL_OK(ADC2_Prescaler)); 168 | 169 | /* Clear the SPSEL bits */ 170 | ADC2->CR1 &= (uint8_t)(~ADC2_CR1_SPSEL); 171 | /* Select the prescaler division factor according to ADC2_PrescalerSelection values */ 172 | ADC2->CR1 |= (uint8_t)(ADC2_Prescaler); 173 | } 174 | 175 | /** 176 | * @brief Enables or disables the ADC2 Schmitt Trigger on a selected channel. 177 | * @param ADC2_SchmittTriggerChannel specifies the desired Channel. 178 | * It can be set of the values of @ref ADC2_SchmittTrigg_TypeDef. 179 | * @param NewState specifies the Channel ADC2 Schmitt Trigger new status. 180 | * can have one of the values of @ref FunctionalState. 181 | * @retval None 182 | */ 183 | void ADC2_SchmittTriggerConfig(ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel, FunctionalState NewState) 184 | { 185 | /* Check the parameters */ 186 | assert_param(IS_ADC2_SCHMITTTRIG_OK(ADC2_SchmittTriggerChannel)); 187 | assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 188 | 189 | if (ADC2_SchmittTriggerChannel == ADC2_SCHMITTTRIG_ALL) 190 | { 191 | if (NewState != DISABLE) 192 | { 193 | ADC2->TDRL &= (uint8_t)0x0; 194 | ADC2->TDRH &= (uint8_t)0x0; 195 | } 196 | else /* NewState == DISABLE */ 197 | { 198 | ADC2->TDRL |= (uint8_t)0xFF; 199 | ADC2->TDRH |= (uint8_t)0xFF; 200 | } 201 | } 202 | else if (ADC2_SchmittTriggerChannel < ADC2_SCHMITTTRIG_CHANNEL8) 203 | { 204 | if (NewState != DISABLE) 205 | { 206 | ADC2->TDRL &= (uint8_t)(~(uint8_t)((uint8_t)0x01 << (uint8_t)ADC2_SchmittTriggerChannel)); 207 | } 208 | else /* NewState == DISABLE */ 209 | { 210 | ADC2->TDRL |= (uint8_t)((uint8_t)0x01 << (uint8_t)ADC2_SchmittTriggerChannel); 211 | } 212 | } 213 | else /* ADC2_SchmittTriggerChannel >= ADC2_SCHMITTTRIG_CHANNEL8 */ 214 | { 215 | if (NewState != DISABLE) 216 | { 217 | ADC2->TDRH &= (uint8_t)(~(uint8_t)((uint8_t)0x01 << ((uint8_t)ADC2_SchmittTriggerChannel - (uint8_t)8))); 218 | } 219 | else /* NewState == DISABLE */ 220 | { 221 | ADC2->TDRH |= (uint8_t)((uint8_t)0x01 << ((uint8_t)ADC2_SchmittTriggerChannel - (uint8_t)8)); 222 | } 223 | } 224 | } 225 | 226 | /** 227 | * @brief Configure the ADC2 conversion on selected channel. 228 | * @param ADC2_ConversionMode Specifies the conversion type. 229 | * It can be set of the values of @ref ADC2_ConvMode_TypeDef 230 | * @param ADC2_Channel specifies the ADC2 Channel. 231 | * It can be set of the values of @ref ADC2_Channel_TypeDef 232 | * @param ADC2_Align specifies the converted data alignment. 233 | * It can be set of the values of @ref ADC2_Align_TypeDef 234 | * @retval None 235 | */ 236 | void ADC2_ConversionConfig(ADC2_ConvMode_TypeDef ADC2_ConversionMode, ADC2_Channel_TypeDef ADC2_Channel, ADC2_Align_TypeDef ADC2_Align) 237 | { 238 | /* Check the parameters */ 239 | assert_param(IS_ADC2_CONVERSIONMODE_OK(ADC2_ConversionMode)); 240 | assert_param(IS_ADC2_CHANNEL_OK(ADC2_Channel)); 241 | assert_param(IS_ADC2_ALIGN_OK(ADC2_Align)); 242 | 243 | /* Clear the align bit */ 244 | ADC2->CR2 &= (uint8_t)(~ADC2_CR2_ALIGN); 245 | /* Configure the data alignment */ 246 | ADC2->CR2 |= (uint8_t)(ADC2_Align); 247 | 248 | if (ADC2_ConversionMode == ADC2_CONVERSIONMODE_CONTINUOUS) 249 | { 250 | /* Set the continuous conversion mode */ 251 | ADC2->CR1 |= ADC2_CR1_CONT; 252 | } 253 | else /* ADC2_ConversionMode == ADC2_CONVERSIONMODE_SINGLE */ 254 | { 255 | /* Set the single conversion mode */ 256 | ADC2->CR1 &= (uint8_t)(~ADC2_CR1_CONT); 257 | } 258 | 259 | /* Clear the ADC2 channels */ 260 | ADC2->CSR &= (uint8_t)(~ADC2_CSR_CH); 261 | /* Select the ADC2 channel */ 262 | ADC2->CSR |= (uint8_t)(ADC2_Channel); 263 | } 264 | 265 | /** 266 | * @brief Configure the ADC2 conversion on external trigger event. 267 | * @par Full description: 268 | * The selected external trigger event can be enabled or disabled. 269 | * @param ADC2_ExtTrigger to select the External trigger event. 270 | * can have one of the values of @ref ADC2_ExtTrig_TypeDef. 271 | * @param NewState to enable/disable the selected external trigger 272 | * can have one of the values of @ref FunctionalState. 273 | * @retval None 274 | */ 275 | void ADC2_ExternalTriggerConfig(ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, FunctionalState NewState) 276 | { 277 | /* Check the parameters */ 278 | assert_param(IS_ADC2_EXTTRIG_OK(ADC2_ExtTrigger)); 279 | assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 280 | 281 | /* Clear the external trigger selection bits */ 282 | ADC2->CR2 &= (uint8_t)(~ADC2_CR2_EXTSEL); 283 | 284 | if (NewState != DISABLE) 285 | { 286 | /* Enable the selected external Trigger */ 287 | ADC2->CR2 |= (uint8_t)(ADC2_CR2_EXTTRIG); 288 | } 289 | else /* NewState == DISABLE */ 290 | { 291 | /* Disable the selected external trigger */ 292 | ADC2->CR2 &= (uint8_t)(~ADC2_CR2_EXTTRIG); 293 | } 294 | 295 | /* Set the selected external trigger */ 296 | ADC2->CR2 |= (uint8_t)(ADC2_ExtTrigger); 297 | } 298 | 299 | /** 300 | * @brief Start ADC2 conversion 301 | * @par Full description: 302 | * This function triggers the start of conversion, after ADC2 configuration. 303 | * @param None 304 | * @retval None 305 | * @par Required preconditions: 306 | * Enable the ADC2 peripheral before calling this function 307 | */ 308 | void ADC2_StartConversion(void) 309 | { 310 | ADC2->CR1 |= ADC2_CR1_ADON; 311 | } 312 | 313 | /** 314 | * @brief Get one sample of measured signal. 315 | * @param None 316 | * @retval ConversionValue: value of the measured signal. 317 | * @par Required preconditions: 318 | * ADC2 conversion finished. 319 | */ 320 | uint16_t ADC2_GetConversionValue(void) 321 | { 322 | uint16_t temph = 0; 323 | uint8_t templ = 0; 324 | 325 | if ((ADC2->CR2 & ADC2_CR2_ALIGN) != 0) /* Right alignment */ 326 | { 327 | /* Read LSB first */ 328 | templ = ADC2->DRL; 329 | /* Then read MSB */ 330 | temph = ADC2->DRH; 331 | 332 | temph = (uint16_t)(templ | (uint16_t)(temph << (uint8_t)8)); 333 | } 334 | else /* Left alignment */ 335 | { 336 | /* Read MSB first*/ 337 | temph = ADC2->DRH; 338 | /* Then read LSB */ 339 | templ = ADC2->DRL; 340 | 341 | temph = (uint16_t)((uint16_t)((uint16_t)templ << 6) | (uint16_t)((uint16_t)temph << 8)); 342 | } 343 | 344 | return ((uint16_t)temph); 345 | } 346 | 347 | /** 348 | * @brief Checks the ADC2 EOC flag status. 349 | * @param None 350 | * @retval FlagStatus Status of the ADC2 EOC flag. 351 | */ 352 | FlagStatus ADC2_GetFlagStatus(void) 353 | { 354 | /* Get EOC flag status */ 355 | return (FlagStatus)(ADC2->CSR & ADC2_CSR_EOC); 356 | } 357 | 358 | /** 359 | * @brief Clear the ADC2 EOC Flag. 360 | * @param None 361 | * @retval None 362 | */ 363 | void ADC2_ClearFlag(void) 364 | { 365 | ADC2->CSR &= (uint8_t)(~ADC2_CSR_EOC); 366 | } 367 | 368 | /** 369 | * @brief Returns the EOC pending bit status 370 | * @par Parameters: 371 | * None 372 | * @retval FlagStatus: status of the EOC pending bit. 373 | */ 374 | ITStatus ADC2_GetITStatus(void) 375 | { 376 | return (ITStatus)(ADC2->CSR & ADC2_CSR_EOC); 377 | } 378 | 379 | /** 380 | * @brief Clear the ADC2 End of Conversion pending bit. 381 | * @param None 382 | * @retval None 383 | */ 384 | void ADC2_ClearITPendingBit(void) 385 | { 386 | ADC2->CSR &= (uint8_t)(~ADC2_CSR_EOC); 387 | } 388 | 389 | /** 390 | * @} 391 | */ 392 | 393 | /** 394 | * @} 395 | */ 396 | 397 | 398 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 399 | -------------------------------------------------------------------------------- /src/stm8s_awu.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm8s_awu.c 4 | * @author MCD Application Team 5 | * @version V2.2.0 6 | * @date 30-September-2014 7 | * @brief This file contains all the functions for the AWU peripheral. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm8s_itc.h" 30 | 31 | /** @addtogroup STM8S_StdPeriph_Driver 32 | * @{ 33 | */ 34 | /* Private typedef -----------------------------------------------------------*/ 35 | /* Private define ------------------------------------------------------------*/ 36 | /* Private macro -------------------------------------------------------------*/ 37 | /* Private variables ---------------------------------------------------------*/ 38 | /* Private function prototypes -----------------------------------------------*/ 39 | /* Private functions ---------------------------------------------------------*/ 40 | 41 | /** @addtogroup ITC_Private_Functions 42 | * @{ 43 | */ 44 | 45 | /** 46 | * @brief Utility function used to read CC register. 47 | * @param None 48 | * @retval CPU CC register value 49 | */ 50 | #ifdef _SDCC_ 51 | #pragma save 52 | #pragma disable_warning 59 53 | #endif // _SDCC_ 54 | uint8_t ITC_GetCPUCC(void) 55 | { 56 | #ifdef _COSMIC_ 57 | _asm("push cc"); 58 | _asm("pop a"); 59 | return; /* Ignore compiler warning, the returned value is in A register */ 60 | #elif defined _RAISONANCE_ /* _RAISONANCE_ */ 61 | return _getCC_(); 62 | #elif defined _SDCC_ /* _SDCC_ */ 63 | __asm__("push cc"); 64 | __asm__("pop a"); /* Ignore compiler warning, the returned value is in A register */ 65 | #else /* _IAR_ */ 66 | asm("push cc"); 67 | asm("pop a"); /* Ignore compiler warning, the returned value is in A register */ 68 | #endif /* _COSMIC_*/ 69 | } 70 | #ifdef _SDCC_ 71 | #pragma restore 72 | #endif // _SDCC_ 73 | 74 | 75 | /** 76 | * @} 77 | */ 78 | 79 | /* Public functions ----------------------------------------------------------*/ 80 | 81 | /** @addtogroup ITC_Public_Functions 82 | * @{ 83 | */ 84 | 85 | /** 86 | * @brief Deinitializes the ITC registers to their default reset value. 87 | * @param None 88 | * @retval None 89 | */ 90 | void ITC_DeInit(void) 91 | { 92 | ITC->ISPR1 = ITC_SPRX_RESET_VALUE; 93 | ITC->ISPR2 = ITC_SPRX_RESET_VALUE; 94 | ITC->ISPR3 = ITC_SPRX_RESET_VALUE; 95 | ITC->ISPR4 = ITC_SPRX_RESET_VALUE; 96 | ITC->ISPR5 = ITC_SPRX_RESET_VALUE; 97 | ITC->ISPR6 = ITC_SPRX_RESET_VALUE; 98 | ITC->ISPR7 = ITC_SPRX_RESET_VALUE; 99 | ITC->ISPR8 = ITC_SPRX_RESET_VALUE; 100 | } 101 | 102 | /** 103 | * @brief Gets the interrupt software priority bits (I1, I0) value from CPU CC register. 104 | * @param None 105 | * @retval The interrupt software priority bits value. 106 | */ 107 | uint8_t ITC_GetSoftIntStatus(void) 108 | { 109 | return (uint8_t)(ITC_GetCPUCC() & CPU_CC_I1I0); 110 | } 111 | 112 | /** 113 | * @brief Gets the software priority of the specified interrupt source. 114 | * @param IrqNum : Specifies the peripheral interrupt source. 115 | * @retval ITC_PriorityLevel_TypeDef : Specifies the software priority of the interrupt source. 116 | */ 117 | ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum) 118 | { 119 | uint8_t Value = 0; 120 | uint8_t Mask = 0; 121 | 122 | /* Check function parameters */ 123 | assert_param(IS_ITC_IRQ_OK((uint8_t)IrqNum)); 124 | 125 | /* Define the mask corresponding to the bits position in the SPR register */ 126 | Mask = (uint8_t)(0x03U << (((uint8_t)IrqNum % 4U) * 2U)); 127 | 128 | switch (IrqNum) 129 | { 130 | case ITC_IRQ_TLI: /* TLI software priority can be read but has no meaning */ 131 | case ITC_IRQ_AWU: 132 | case ITC_IRQ_CLK: 133 | case ITC_IRQ_PORTA: 134 | Value = (uint8_t)(ITC->ISPR1 & Mask); /* Read software priority */ 135 | break; 136 | 137 | case ITC_IRQ_PORTB: 138 | case ITC_IRQ_PORTC: 139 | case ITC_IRQ_PORTD: 140 | case ITC_IRQ_PORTE: 141 | Value = (uint8_t)(ITC->ISPR2 & Mask); /* Read software priority */ 142 | break; 143 | 144 | #if defined(STM8S208) || defined(STM8AF52Ax) 145 | case ITC_IRQ_CAN_RX: 146 | case ITC_IRQ_CAN_TX: 147 | #endif /*STM8S208 or STM8AF52Ax */ 148 | #if defined(STM8S903) || defined(STM8AF622x) 149 | case ITC_IRQ_PORTF: 150 | #endif /*STM8S903 or STM8AF622x */ 151 | case ITC_IRQ_SPI: 152 | case ITC_IRQ_TIM1_OVF: 153 | Value = (uint8_t)(ITC->ISPR3 & Mask); /* Read software priority */ 154 | break; 155 | 156 | case ITC_IRQ_TIM1_CAPCOM: 157 | #if defined (STM8S903) || defined (STM8AF622x) 158 | case ITC_IRQ_TIM5_OVFTRI: 159 | case ITC_IRQ_TIM5_CAPCOM: 160 | #else 161 | case ITC_IRQ_TIM2_OVF: 162 | case ITC_IRQ_TIM2_CAPCOM: 163 | #endif /* STM8S903 or STM8AF622x*/ 164 | case ITC_IRQ_TIM3_OVF: 165 | Value = (uint8_t)(ITC->ISPR4 & Mask); /* Read software priority */ 166 | break; 167 | 168 | case ITC_IRQ_TIM3_CAPCOM: 169 | #if defined(STM8S208) ||defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \ 170 | defined(STM8S003) ||defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax) 171 | case ITC_IRQ_UART1_TX: 172 | case ITC_IRQ_UART1_RX: 173 | #endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S903 or STM8AF52Ax or STM8AF62Ax */ 174 | #if defined(STM8AF622x) 175 | case ITC_IRQ_UART4_TX: 176 | case ITC_IRQ_UART4_RX: 177 | #endif /*STM8AF622x */ 178 | case ITC_IRQ_I2C: 179 | Value = (uint8_t)(ITC->ISPR5 & Mask); /* Read software priority */ 180 | break; 181 | 182 | #if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x) 183 | case ITC_IRQ_UART2_TX: 184 | case ITC_IRQ_UART2_RX: 185 | #endif /*STM8S105 or STM8AF626x*/ 186 | #if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || \ 187 | defined(STM8AF62Ax) 188 | case ITC_IRQ_UART3_TX: 189 | case ITC_IRQ_UART3_RX: 190 | case ITC_IRQ_ADC2: 191 | #endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */ 192 | #if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \ 193 | defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x) 194 | case ITC_IRQ_ADC1: 195 | #endif /*STM8S105, STM8S005, STM8S103 or STM8S003 or STM8S903 or STM8AF626x or STM8AF622x */ 196 | #if defined (STM8S903) || defined (STM8AF622x) 197 | case ITC_IRQ_TIM6_OVFTRI: 198 | #else 199 | case ITC_IRQ_TIM4_OVF: 200 | #endif /*STM8S903 or STM8AF622x */ 201 | Value = (uint8_t)(ITC->ISPR6 & Mask); /* Read software priority */ 202 | break; 203 | 204 | case ITC_IRQ_EEPROM_EEC: 205 | Value = (uint8_t)(ITC->ISPR7 & Mask); /* Read software priority */ 206 | break; 207 | 208 | default: 209 | break; 210 | } 211 | 212 | Value >>= (uint8_t)(((uint8_t)IrqNum % 4u) * 2u); 213 | 214 | return((ITC_PriorityLevel_TypeDef)Value); 215 | } 216 | 217 | /** 218 | * @brief Sets the software priority of the specified interrupt source. 219 | * @note - The modification of the software priority is only possible when 220 | * the interrupts are disabled. 221 | * - The normal behavior is to disable the interrupt before calling 222 | * this function, and re-enable it after. 223 | * - The priority level 0 cannot be set (see product specification 224 | * for more details). 225 | * @param IrqNum : Specifies the peripheral interrupt source. 226 | * @param PriorityValue : Specifies the software priority value to set, 227 | * can be a value of @ref ITC_PriorityLevel_TypeDef . 228 | * @retval None 229 | */ 230 | void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue) 231 | { 232 | uint8_t Mask = 0; 233 | uint8_t NewPriority = 0; 234 | 235 | /* Check function parameters */ 236 | assert_param(IS_ITC_IRQ_OK((uint8_t)IrqNum)); 237 | assert_param(IS_ITC_PRIORITY_OK(PriorityValue)); 238 | 239 | /* Check if interrupts are disabled */ 240 | assert_param(IS_ITC_INTERRUPTS_DISABLED); 241 | 242 | /* Define the mask corresponding to the bits position in the SPR register */ 243 | /* The mask is reversed in order to clear the 2 bits after more easily */ 244 | Mask = (uint8_t)(~(uint8_t)(0x03U << (((uint8_t)IrqNum % 4U) * 2U))); 245 | 246 | /* Define the new priority to write */ 247 | NewPriority = (uint8_t)((uint8_t)(PriorityValue) << (((uint8_t)IrqNum % 4U) * 2U)); 248 | 249 | switch (IrqNum) 250 | { 251 | case ITC_IRQ_TLI: /* TLI software priority can be written but has no meaning */ 252 | case ITC_IRQ_AWU: 253 | case ITC_IRQ_CLK: 254 | case ITC_IRQ_PORTA: 255 | ITC->ISPR1 &= Mask; 256 | ITC->ISPR1 |= NewPriority; 257 | break; 258 | 259 | case ITC_IRQ_PORTB: 260 | case ITC_IRQ_PORTC: 261 | case ITC_IRQ_PORTD: 262 | case ITC_IRQ_PORTE: 263 | ITC->ISPR2 &= Mask; 264 | ITC->ISPR2 |= NewPriority; 265 | break; 266 | 267 | #if defined(STM8S208) || defined(STM8AF52Ax) 268 | case ITC_IRQ_CAN_RX: 269 | case ITC_IRQ_CAN_TX: 270 | #endif /*STM8S208 or STM8AF52Ax */ 271 | #if defined(STM8S903) || defined(STM8AF622x) 272 | case ITC_IRQ_PORTF: 273 | #endif /*STM8S903 or STM8AF622x */ 274 | case ITC_IRQ_SPI: 275 | case ITC_IRQ_TIM1_OVF: 276 | ITC->ISPR3 &= Mask; 277 | ITC->ISPR3 |= NewPriority; 278 | break; 279 | 280 | case ITC_IRQ_TIM1_CAPCOM: 281 | #if defined(STM8S903) || defined(STM8AF622x) 282 | case ITC_IRQ_TIM5_OVFTRI: 283 | case ITC_IRQ_TIM5_CAPCOM: 284 | #else 285 | case ITC_IRQ_TIM2_OVF: 286 | case ITC_IRQ_TIM2_CAPCOM: 287 | #endif /*STM8S903 or STM8AF622x */ 288 | case ITC_IRQ_TIM3_OVF: 289 | ITC->ISPR4 &= Mask; 290 | ITC->ISPR4 |= NewPriority; 291 | break; 292 | 293 | case ITC_IRQ_TIM3_CAPCOM: 294 | #if defined(STM8S208) ||defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \ 295 | defined(STM8S003) ||defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax) 296 | case ITC_IRQ_UART1_TX: 297 | case ITC_IRQ_UART1_RX: 298 | #endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S903 or STM8AF52Ax or STM8AF62Ax */ 299 | #if defined(STM8AF622x) 300 | case ITC_IRQ_UART4_TX: 301 | case ITC_IRQ_UART4_RX: 302 | #endif /*STM8AF622x */ 303 | case ITC_IRQ_I2C: 304 | ITC->ISPR5 &= Mask; 305 | ITC->ISPR5 |= NewPriority; 306 | break; 307 | 308 | #if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x) 309 | case ITC_IRQ_UART2_TX: 310 | case ITC_IRQ_UART2_RX: 311 | #endif /*STM8S105 or STM8AF626x */ 312 | 313 | #if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || \ 314 | defined(STM8AF62Ax) 315 | case ITC_IRQ_UART3_TX: 316 | case ITC_IRQ_UART3_RX: 317 | case ITC_IRQ_ADC2: 318 | #endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */ 319 | 320 | #if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \ 321 | defined(STM8S903) || defined(STM8AF626x) || defined (STM8AF622x) 322 | case ITC_IRQ_ADC1: 323 | #endif /*STM8S105, STM8S005, STM8S103 or STM8S003 or STM8S903 or STM8AF626x or STM8AF622x */ 324 | 325 | #if defined (STM8S903) || defined (STM8AF622x) 326 | case ITC_IRQ_TIM6_OVFTRI: 327 | #else 328 | case ITC_IRQ_TIM4_OVF: 329 | #endif /* STM8S903 or STM8AF622x */ 330 | ITC->ISPR6 &= Mask; 331 | ITC->ISPR6 |= NewPriority; 332 | break; 333 | 334 | case ITC_IRQ_EEPROM_EEC: 335 | ITC->ISPR7 &= Mask; 336 | ITC->ISPR7 |= NewPriority; 337 | break; 338 | 339 | default: 340 | break; 341 | } 342 | } 343 | 344 | /** 345 | * @} 346 | */ 347 | 348 | /** 349 | * @} 350 | */ 351 | 352 | 353 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 354 | -------------------------------------------------------------------------------- /src/stm8s_iwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ******************************************************************************** 3 | * @file stm8s_iwdg.c 4 | * @author MCD Application Team 5 | * @version V2.2.0 6 | * @date 30-September-2014 7 | * @brief This file contains all the functions for the IWDG peripheral. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *