├── .gitignore ├── .vscode ├── c_cpp_properties.json ├── launch.json ├── settings.json └── tasks.json ├── Core ├── Inc │ ├── gpio.h │ ├── i2c.h │ ├── main.h │ ├── stm32f1xx_hal_conf.h │ ├── stm32f1xx_it.h │ └── usart.h └── Src │ ├── gpio.c │ ├── i2c.c │ ├── main.c │ ├── stm32f1xx_hal_msp.c │ ├── stm32f1xx_it.c │ ├── system_stm32f1xx.c │ └── usart.c ├── LICENSE ├── Makefile ├── README.md ├── STM32F103CBTx_FLASH.ld ├── openocd.cfg ├── package.json ├── script.scr ├── startup_stm32f103xb.s └── stm32_learn.ioc /.gitignore: -------------------------------------------------------------------------------- 1 | # Object files 2 | *.o 3 | *.ko 4 | *.obj 5 | *.elf 6 | 7 | # Precompiled Headers 8 | *.gch 9 | *.pch 10 | 11 | # Libraries 12 | *.lib 13 | *.a 14 | *.la 15 | *.lo 16 | 17 | # Shared objects (inc. Windows DLLs) 18 | *.dll 19 | *.so 20 | *.so.* 21 | *.dylib 22 | 23 | # Executables 24 | *.exe 25 | *.out 26 | *.app 27 | *.i*86 28 | *.x86_64 29 | *.hex 30 | *.bin 31 | 32 | # Debug files 33 | *.dSYM/ 34 | 35 | *.state.json 36 | build 37 | Drivers 38 | xpacks 39 | STM32F103.svd 40 | .mxproject 41 | -------------------------------------------------------------------------------- /.vscode/c_cpp_properties.json: -------------------------------------------------------------------------------- 1 | { 2 | "configurations": [ 3 | { 4 | "name": "STM32", 5 | "includePath": [ 6 | "Core/Inc", 7 | "Drivers/CMSIS/Device/ST/STM32F1xx/Include", 8 | "Drivers/CMSIS/Include", 9 | "Drivers/STM32F1xx_HAL_Driver/Inc", 10 | "Drivers/STM32F1xx_HAL_Driver/Inc/Legacy", 11 | "xpacks/xpack-dev-tools-arm-none-eabi-gcc/.content/arm-none-eabi/include", 12 | "xpacks/xpack-dev-tools-arm-none-eabi-gcc/.content/arm-none-eabi/include/machine", 13 | "xpacks/xpack-dev-tools-arm-none-eabi-gcc/.content/arm-none-eabi/include/sys", 14 | "xpacks/xpack-dev-tools-arm-none-eabi-gcc/.content/lib/gcc/arm-none-eabi/11.3.1/include", 15 | "xpacks/xpack-dev-tools-arm-none-eabi-gcc/.content/lib/gcc/arm-none-eabi/11.3.1/include-fixed" 16 | ], 17 | "defines": [ 18 | "DEBUG", 19 | "STM32F103xB", 20 | "USE_HAL_DRIVER" 21 | ], 22 | "intelliSenseMode": "linux-gcc-arm", 23 | "cStandard": "c11", 24 | "compilerPath": "${workspaceRoot}/xpacks/.bin/arm-none-eabi-gcc", 25 | "configurationProvider": "ms-vscode.makefile-tools" 26 | } 27 | ], 28 | "version": 4 29 | } -------------------------------------------------------------------------------- /.vscode/launch.json: -------------------------------------------------------------------------------- 1 | { 2 | "version": "0.2.0", 3 | "configurations": [ 4 | { 5 | "name": "Debug openocd", 6 | "showDevDebugOutput": "parsed", 7 | "cwd": "${workspaceRoot}", 8 | "executable": "./build/stm32_learn.elf", 9 | "request": "launch", 10 | "type": "cortex-debug", 11 | "servertype": "openocd", 12 | "preLaunchTask": "Build all", 13 | "device": "STM32F103XB", 14 | "configFiles": [ 15 | "openocd.cfg" 16 | ], 17 | "svdFile": "./STM32F103.svd", 18 | "swoConfig": { 19 | "enabled": true, 20 | "cpuFrequency": 64000000, 21 | "swoFrequency": 2000000, 22 | "source": "probe", 23 | "runTomain": true, 24 | "decoders": [ 25 | { 26 | "label": "ITM output", 27 | "type": "console", 28 | "port": 0, 29 | "showOnStartup": true, 30 | "encoding": "ascii" 31 | } 32 | ] 33 | } 34 | }, 35 | { 36 | "name": "Attach openocd", 37 | "showDevDebugOutput": "parsed", 38 | "cwd": "${workspaceRoot}", 39 | "executable": "./build/stm32_learn.elf", 40 | "request": "attach", 41 | "type": "cortex-debug", 42 | "servertype": "openocd", 43 | "preLaunchTask": "Build all", 44 | "device": "STM32F103XB", 45 | "configFiles": [ 46 | "openocd.cfg" 47 | ] 48 | }, 49 | { 50 | "name": "Debug stutil", 51 | "cwd": "${workspaceRoot}", 52 | "executable": "./build/stm32_learn.elf", 53 | "request": "launch", 54 | "type": "cortex-debug", 55 | "showDevDebugOutput": "parsed", 56 | "servertype": "stutil", 57 | "device": "STM32F103XB", 58 | "preLaunchTask": "Build all", 59 | "svdFile": "./STM32F103.svd" 60 | }, 61 | { 62 | "name": "Attach stutil", 63 | "cwd": "${workspaceRoot}", 64 | "executable": "./build/stm32_learn.elf", 65 | "request": "attach", 66 | "type": "cortex-debug", 67 | "showDevDebugOutput": "parsed", 68 | "servertype": "stutil", 69 | "device": "STM32F103XB", 70 | "preLaunchTask": "Build all", 71 | } 72 | ] 73 | } -------------------------------------------------------------------------------- /.vscode/settings.json: -------------------------------------------------------------------------------- 1 | { 2 | "cortex-debug.armToolchainPath": "xpacks/.bin", 3 | "cortex-debug.gdbPath": "xpacks/.bin/arm-none-eabi-gdb", 4 | "cortex-debug.openocdPath": "xpacks/.bin/openocd", 5 | "C_Cpp.default.configurationProvider": "ms-vscode.makefile-tools" 6 | } -------------------------------------------------------------------------------- /.vscode/tasks.json: -------------------------------------------------------------------------------- 1 | { 2 | "version": "2.0.0", 3 | "tasks": [ 4 | { 5 | "label": "Build all", 6 | "group": "build", 7 | "type": "shell", 8 | "command": "make", 9 | "args": ["all"] 10 | }, 11 | { 12 | "label": "Build clean", 13 | "group": "build", 14 | "type": "shell", 15 | "command": "make", 16 | "args": ["clean"] 17 | }, 18 | { 19 | "label": "STFlash", 20 | "group": "build", 21 | "type": "shell", 22 | "command": "make", 23 | "args": ["stflash"] 24 | } 25 | ] 26 | } -------------------------------------------------------------------------------- /Core/Inc/gpio.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file gpio.h 5 | * @brief This file contains all the function prototypes for 6 | * the gpio.c file 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2022 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __GPIO_H__ 22 | #define __GPIO_H__ 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "main.h" 30 | 31 | /* USER CODE BEGIN Includes */ 32 | 33 | /* USER CODE END Includes */ 34 | 35 | /* USER CODE BEGIN Private defines */ 36 | 37 | /* USER CODE END Private defines */ 38 | 39 | void MX_GPIO_Init(void); 40 | 41 | /* USER CODE BEGIN Prototypes */ 42 | 43 | /* USER CODE END Prototypes */ 44 | 45 | #ifdef __cplusplus 46 | } 47 | #endif 48 | #endif /*__ GPIO_H__ */ 49 | 50 | -------------------------------------------------------------------------------- /Core/Inc/i2c.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file i2c.h 5 | * @brief This file contains all the function prototypes for 6 | * the i2c.c file 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2022 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __I2C_H__ 22 | #define __I2C_H__ 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "main.h" 30 | 31 | /* USER CODE BEGIN Includes */ 32 | 33 | /* USER CODE END Includes */ 34 | 35 | extern I2C_HandleTypeDef hi2c1; 36 | 37 | /* USER CODE BEGIN Private defines */ 38 | 39 | /* USER CODE END Private defines */ 40 | 41 | void MX_I2C1_Init(void); 42 | 43 | /* USER CODE BEGIN Prototypes */ 44 | 45 | /* USER CODE END Prototypes */ 46 | 47 | #ifdef __cplusplus 48 | } 49 | #endif 50 | 51 | #endif /* __I2C_H__ */ 52 | 53 | -------------------------------------------------------------------------------- /Core/Inc/main.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file : main.h 5 | * @brief : Header for main.c file. 6 | * This file contains the common defines of the application. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2022 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __MAIN_H 23 | #define __MAIN_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32f1xx_hal.h" 31 | 32 | /* Private includes ----------------------------------------------------------*/ 33 | /* USER CODE BEGIN Includes */ 34 | 35 | /* USER CODE END Includes */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* USER CODE BEGIN ET */ 39 | 40 | /* USER CODE END ET */ 41 | 42 | /* Exported constants --------------------------------------------------------*/ 43 | /* USER CODE BEGIN EC */ 44 | 45 | /* USER CODE END EC */ 46 | 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* USER CODE BEGIN EM */ 49 | 50 | /* USER CODE END EM */ 51 | 52 | /* Exported functions prototypes ---------------------------------------------*/ 53 | void Error_Handler(void); 54 | 55 | /* USER CODE BEGIN EFP */ 56 | 57 | /* USER CODE END EFP */ 58 | 59 | /* Private defines -----------------------------------------------------------*/ 60 | 61 | /* USER CODE BEGIN Private defines */ 62 | 63 | /* USER CODE END Private defines */ 64 | 65 | #ifdef __cplusplus 66 | } 67 | #endif 68 | 69 | #endif /* __MAIN_H */ 70 | -------------------------------------------------------------------------------- /Core/Inc/stm32f1xx_hal_conf.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f1xx_hal_conf.h 5 | * @brief HAL configuration file. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F1xx_HAL_CONF_H 22 | #define __STM32F1xx_HAL_CONF_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Exported types ------------------------------------------------------------*/ 29 | /* Exported constants --------------------------------------------------------*/ 30 | 31 | /* ########################## Module Selection ############################## */ 32 | /** 33 | * @brief This is the list of modules to be used in the HAL driver 34 | */ 35 | 36 | #define HAL_MODULE_ENABLED 37 | /*#define HAL_ADC_MODULE_ENABLED */ 38 | /*#define HAL_CRYP_MODULE_ENABLED */ 39 | /*#define HAL_CAN_MODULE_ENABLED */ 40 | /*#define HAL_CAN_LEGACY_MODULE_ENABLED */ 41 | /*#define HAL_CEC_MODULE_ENABLED */ 42 | /*#define HAL_CORTEX_MODULE_ENABLED */ 43 | /*#define HAL_CRC_MODULE_ENABLED */ 44 | /*#define HAL_DAC_MODULE_ENABLED */ 45 | /*#define HAL_DMA_MODULE_ENABLED */ 46 | /*#define HAL_ETH_MODULE_ENABLED */ 47 | /*#define HAL_FLASH_MODULE_ENABLED */ 48 | #define HAL_GPIO_MODULE_ENABLED 49 | /*#define HAL_I2C_MODULE_ENABLED */ 50 | /*#define HAL_I2S_MODULE_ENABLED */ 51 | /*#define HAL_IRDA_MODULE_ENABLED */ 52 | /*#define HAL_IWDG_MODULE_ENABLED */ 53 | /*#define HAL_NOR_MODULE_ENABLED */ 54 | /*#define HAL_NAND_MODULE_ENABLED */ 55 | /*#define HAL_PCCARD_MODULE_ENABLED */ 56 | /*#define HAL_PCD_MODULE_ENABLED */ 57 | /*#define HAL_HCD_MODULE_ENABLED */ 58 | /*#define HAL_PWR_MODULE_ENABLED */ 59 | /*#define HAL_RCC_MODULE_ENABLED */ 60 | /*#define HAL_RTC_MODULE_ENABLED */ 61 | /*#define HAL_SD_MODULE_ENABLED */ 62 | /*#define HAL_MMC_MODULE_ENABLED */ 63 | /*#define HAL_SDRAM_MODULE_ENABLED */ 64 | /*#define HAL_SMARTCARD_MODULE_ENABLED */ 65 | /*#define HAL_SPI_MODULE_ENABLED */ 66 | /*#define HAL_SRAM_MODULE_ENABLED */ 67 | /*#define HAL_TIM_MODULE_ENABLED */ 68 | #define HAL_UART_MODULE_ENABLED 69 | /*#define HAL_USART_MODULE_ENABLED */ 70 | /*#define HAL_WWDG_MODULE_ENABLED */ 71 | 72 | #define HAL_CORTEX_MODULE_ENABLED 73 | #define HAL_DMA_MODULE_ENABLED 74 | #define HAL_FLASH_MODULE_ENABLED 75 | #define HAL_EXTI_MODULE_ENABLED 76 | #define HAL_GPIO_MODULE_ENABLED 77 | #define HAL_PWR_MODULE_ENABLED 78 | #define HAL_RCC_MODULE_ENABLED 79 | 80 | /* ########################## Oscillator Values adaptation ####################*/ 81 | /** 82 | * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. 83 | * This value is used by the RCC HAL module to compute the system frequency 84 | * (when HSE is used as system clock source, directly or through the PLL). 85 | */ 86 | #if !defined (HSE_VALUE) 87 | #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ 88 | #endif /* HSE_VALUE */ 89 | 90 | #if !defined (HSE_STARTUP_TIMEOUT) 91 | #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ 92 | #endif /* HSE_STARTUP_TIMEOUT */ 93 | 94 | /** 95 | * @brief Internal High Speed oscillator (HSI) value. 96 | * This value is used by the RCC HAL module to compute the system frequency 97 | * (when HSI is used as system clock source, directly or through the PLL). 98 | */ 99 | #if !defined (HSI_VALUE) 100 | #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz*/ 101 | #endif /* HSI_VALUE */ 102 | 103 | /** 104 | * @brief Internal Low Speed oscillator (LSI) value. 105 | */ 106 | #if !defined (LSI_VALUE) 107 | #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ 108 | #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz 109 | The real value may vary depending on the variations 110 | in voltage and temperature. */ 111 | 112 | /** 113 | * @brief External Low Speed oscillator (LSE) value. 114 | * This value is used by the UART, RTC HAL module to compute the system frequency 115 | */ 116 | #if !defined (LSE_VALUE) 117 | #define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/ 118 | #endif /* LSE_VALUE */ 119 | 120 | #if !defined (LSE_STARTUP_TIMEOUT) 121 | #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ 122 | #endif /* LSE_STARTUP_TIMEOUT */ 123 | 124 | /* Tip: To avoid modifying this file each time you need to use different HSE, 125 | === you can define the HSE value in your toolchain compiler preprocessor. */ 126 | 127 | /* ########################### System Configuration ######################### */ 128 | /** 129 | * @brief This is the HAL system configuration section 130 | */ 131 | #define VDD_VALUE 3300U /*!< Value of VDD in mv */ 132 | #define TICK_INT_PRIORITY 15U /*!< tick interrupt priority (lowest by default) */ 133 | #define USE_RTOS 0U 134 | #define PREFETCH_ENABLE 1U 135 | 136 | #define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ 137 | #define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ 138 | #define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ 139 | #define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ 140 | #define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ 141 | #define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ 142 | #define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ 143 | #define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ 144 | #define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ 145 | #define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ 146 | #define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ 147 | #define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ 148 | #define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ 149 | #define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ 150 | #define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ 151 | #define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ 152 | #define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ 153 | #define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ 154 | #define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ 155 | #define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ 156 | #define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ 157 | #define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ 158 | #define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ 159 | 160 | /* ########################## Assert Selection ############################## */ 161 | /** 162 | * @brief Uncomment the line below to expanse the "assert_param" macro in the 163 | * HAL drivers code 164 | */ 165 | /* #define USE_FULL_ASSERT 1U */ 166 | 167 | /* ################## Ethernet peripheral configuration ##################### */ 168 | 169 | /* Section 1 : Ethernet peripheral configuration */ 170 | 171 | /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ 172 | #define MAC_ADDR0 2U 173 | #define MAC_ADDR1 0U 174 | #define MAC_ADDR2 0U 175 | #define MAC_ADDR3 0U 176 | #define MAC_ADDR4 0U 177 | #define MAC_ADDR5 0U 178 | 179 | /* Definition of the Ethernet driver buffers size and count */ 180 | #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ 181 | #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ 182 | #define ETH_RXBUFNB 8U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ 183 | #define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ 184 | 185 | /* Section 2: PHY configuration section */ 186 | 187 | /* DP83848_PHY_ADDRESS Address*/ 188 | #define DP83848_PHY_ADDRESS 0x01U 189 | /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 190 | #define PHY_RESET_DELAY 0x000000FFU 191 | /* PHY Configuration delay */ 192 | #define PHY_CONFIG_DELAY 0x00000FFFU 193 | 194 | #define PHY_READ_TO 0x0000FFFFU 195 | #define PHY_WRITE_TO 0x0000FFFFU 196 | 197 | /* Section 3: Common PHY Registers */ 198 | 199 | #define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ 200 | #define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ 201 | 202 | #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ 203 | #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ 204 | #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ 205 | #define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ 206 | #define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ 207 | #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ 208 | #define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ 209 | #define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ 210 | #define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ 211 | #define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ 212 | 213 | #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ 214 | #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ 215 | #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ 216 | 217 | /* Section 4: Extended PHY Registers */ 218 | #define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ 219 | 220 | #define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ 221 | #define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ 222 | 223 | /* ################## SPI peripheral configuration ########################## */ 224 | 225 | /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver 226 | * Activated: CRC code is present inside driver 227 | * Deactivated: CRC code cleaned from driver 228 | */ 229 | 230 | #define USE_SPI_CRC 0U 231 | 232 | /* Includes ------------------------------------------------------------------*/ 233 | /** 234 | * @brief Include module's header file 235 | */ 236 | 237 | #ifdef HAL_RCC_MODULE_ENABLED 238 | #include "stm32f1xx_hal_rcc.h" 239 | #endif /* HAL_RCC_MODULE_ENABLED */ 240 | 241 | #ifdef HAL_GPIO_MODULE_ENABLED 242 | #include "stm32f1xx_hal_gpio.h" 243 | #endif /* HAL_GPIO_MODULE_ENABLED */ 244 | 245 | #ifdef HAL_EXTI_MODULE_ENABLED 246 | #include "stm32f1xx_hal_exti.h" 247 | #endif /* HAL_EXTI_MODULE_ENABLED */ 248 | 249 | #ifdef HAL_DMA_MODULE_ENABLED 250 | #include "stm32f1xx_hal_dma.h" 251 | #endif /* HAL_DMA_MODULE_ENABLED */ 252 | 253 | #ifdef HAL_ETH_MODULE_ENABLED 254 | #include "stm32f1xx_hal_eth.h" 255 | #endif /* HAL_ETH_MODULE_ENABLED */ 256 | 257 | #ifdef HAL_CAN_MODULE_ENABLED 258 | #include "stm32f1xx_hal_can.h" 259 | #endif /* HAL_CAN_MODULE_ENABLED */ 260 | 261 | #ifdef HAL_CAN_LEGACY_MODULE_ENABLED 262 | #include "Legacy/stm32f1xx_hal_can_legacy.h" 263 | #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ 264 | 265 | #ifdef HAL_CEC_MODULE_ENABLED 266 | #include "stm32f1xx_hal_cec.h" 267 | #endif /* HAL_CEC_MODULE_ENABLED */ 268 | 269 | #ifdef HAL_CORTEX_MODULE_ENABLED 270 | #include "stm32f1xx_hal_cortex.h" 271 | #endif /* HAL_CORTEX_MODULE_ENABLED */ 272 | 273 | #ifdef HAL_ADC_MODULE_ENABLED 274 | #include "stm32f1xx_hal_adc.h" 275 | #endif /* HAL_ADC_MODULE_ENABLED */ 276 | 277 | #ifdef HAL_CRC_MODULE_ENABLED 278 | #include "stm32f1xx_hal_crc.h" 279 | #endif /* HAL_CRC_MODULE_ENABLED */ 280 | 281 | #ifdef HAL_DAC_MODULE_ENABLED 282 | #include "stm32f1xx_hal_dac.h" 283 | #endif /* HAL_DAC_MODULE_ENABLED */ 284 | 285 | #ifdef HAL_FLASH_MODULE_ENABLED 286 | #include "stm32f1xx_hal_flash.h" 287 | #endif /* HAL_FLASH_MODULE_ENABLED */ 288 | 289 | #ifdef HAL_SRAM_MODULE_ENABLED 290 | #include "stm32f1xx_hal_sram.h" 291 | #endif /* HAL_SRAM_MODULE_ENABLED */ 292 | 293 | #ifdef HAL_NOR_MODULE_ENABLED 294 | #include "stm32f1xx_hal_nor.h" 295 | #endif /* HAL_NOR_MODULE_ENABLED */ 296 | 297 | #ifdef HAL_I2C_MODULE_ENABLED 298 | #include "stm32f1xx_hal_i2c.h" 299 | #endif /* HAL_I2C_MODULE_ENABLED */ 300 | 301 | #ifdef HAL_I2S_MODULE_ENABLED 302 | #include "stm32f1xx_hal_i2s.h" 303 | #endif /* HAL_I2S_MODULE_ENABLED */ 304 | 305 | #ifdef HAL_IWDG_MODULE_ENABLED 306 | #include "stm32f1xx_hal_iwdg.h" 307 | #endif /* HAL_IWDG_MODULE_ENABLED */ 308 | 309 | #ifdef HAL_PWR_MODULE_ENABLED 310 | #include "stm32f1xx_hal_pwr.h" 311 | #endif /* HAL_PWR_MODULE_ENABLED */ 312 | 313 | #ifdef HAL_RTC_MODULE_ENABLED 314 | #include "stm32f1xx_hal_rtc.h" 315 | #endif /* HAL_RTC_MODULE_ENABLED */ 316 | 317 | #ifdef HAL_PCCARD_MODULE_ENABLED 318 | #include "stm32f1xx_hal_pccard.h" 319 | #endif /* HAL_PCCARD_MODULE_ENABLED */ 320 | 321 | #ifdef HAL_SD_MODULE_ENABLED 322 | #include "stm32f1xx_hal_sd.h" 323 | #endif /* HAL_SD_MODULE_ENABLED */ 324 | 325 | #ifdef HAL_NAND_MODULE_ENABLED 326 | #include "stm32f1xx_hal_nand.h" 327 | #endif /* HAL_NAND_MODULE_ENABLED */ 328 | 329 | #ifdef HAL_SPI_MODULE_ENABLED 330 | #include "stm32f1xx_hal_spi.h" 331 | #endif /* HAL_SPI_MODULE_ENABLED */ 332 | 333 | #ifdef HAL_TIM_MODULE_ENABLED 334 | #include "stm32f1xx_hal_tim.h" 335 | #endif /* HAL_TIM_MODULE_ENABLED */ 336 | 337 | #ifdef HAL_UART_MODULE_ENABLED 338 | #include "stm32f1xx_hal_uart.h" 339 | #endif /* HAL_UART_MODULE_ENABLED */ 340 | 341 | #ifdef HAL_USART_MODULE_ENABLED 342 | #include "stm32f1xx_hal_usart.h" 343 | #endif /* HAL_USART_MODULE_ENABLED */ 344 | 345 | #ifdef HAL_IRDA_MODULE_ENABLED 346 | #include "stm32f1xx_hal_irda.h" 347 | #endif /* HAL_IRDA_MODULE_ENABLED */ 348 | 349 | #ifdef HAL_SMARTCARD_MODULE_ENABLED 350 | #include "stm32f1xx_hal_smartcard.h" 351 | #endif /* HAL_SMARTCARD_MODULE_ENABLED */ 352 | 353 | #ifdef HAL_WWDG_MODULE_ENABLED 354 | #include "stm32f1xx_hal_wwdg.h" 355 | #endif /* HAL_WWDG_MODULE_ENABLED */ 356 | 357 | #ifdef HAL_PCD_MODULE_ENABLED 358 | #include "stm32f1xx_hal_pcd.h" 359 | #endif /* HAL_PCD_MODULE_ENABLED */ 360 | 361 | #ifdef HAL_HCD_MODULE_ENABLED 362 | #include "stm32f1xx_hal_hcd.h" 363 | #endif /* HAL_HCD_MODULE_ENABLED */ 364 | 365 | #ifdef HAL_MMC_MODULE_ENABLED 366 | #include "stm32f1xx_hal_mmc.h" 367 | #endif /* HAL_MMC_MODULE_ENABLED */ 368 | 369 | /* Exported macro ------------------------------------------------------------*/ 370 | #ifdef USE_FULL_ASSERT 371 | /** 372 | * @brief The assert_param macro is used for function's parameters check. 373 | * @param expr If expr is false, it calls assert_failed function 374 | * which reports the name of the source file and the source 375 | * line number of the call that failed. 376 | * If expr is true, it returns no value. 377 | * @retval None 378 | */ 379 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 380 | /* Exported functions ------------------------------------------------------- */ 381 | void assert_failed(uint8_t* file, uint32_t line); 382 | #else 383 | #define assert_param(expr) ((void)0U) 384 | #endif /* USE_FULL_ASSERT */ 385 | 386 | #ifdef __cplusplus 387 | } 388 | #endif 389 | 390 | #endif /* __STM32F1xx_HAL_CONF_H */ 391 | 392 | -------------------------------------------------------------------------------- /Core/Inc/stm32f1xx_it.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f1xx_it.h 5 | * @brief This file contains the headers of the interrupt handlers. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2022 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F1xx_IT_H 22 | #define __STM32F1xx_IT_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Private includes ----------------------------------------------------------*/ 29 | /* USER CODE BEGIN Includes */ 30 | 31 | /* USER CODE END Includes */ 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN ET */ 35 | 36 | /* USER CODE END ET */ 37 | 38 | /* Exported constants --------------------------------------------------------*/ 39 | /* USER CODE BEGIN EC */ 40 | 41 | /* USER CODE END EC */ 42 | 43 | /* Exported macro ------------------------------------------------------------*/ 44 | /* USER CODE BEGIN EM */ 45 | 46 | /* USER CODE END EM */ 47 | 48 | /* Exported functions prototypes ---------------------------------------------*/ 49 | void NMI_Handler(void); 50 | void HardFault_Handler(void); 51 | void MemManage_Handler(void); 52 | void BusFault_Handler(void); 53 | void UsageFault_Handler(void); 54 | void SVC_Handler(void); 55 | void DebugMon_Handler(void); 56 | void PendSV_Handler(void); 57 | void SysTick_Handler(void); 58 | void USART1_IRQHandler(void); 59 | /* USER CODE BEGIN EFP */ 60 | 61 | /* USER CODE END EFP */ 62 | 63 | #ifdef __cplusplus 64 | } 65 | #endif 66 | 67 | #endif /* __STM32F1xx_IT_H */ 68 | -------------------------------------------------------------------------------- /Core/Inc/usart.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file usart.h 5 | * @brief This file contains all the function prototypes for 6 | * the usart.c file 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2022 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __USART_H__ 22 | #define __USART_H__ 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "main.h" 30 | 31 | /* USER CODE BEGIN Includes */ 32 | 33 | /* USER CODE END Includes */ 34 | 35 | extern UART_HandleTypeDef huart1; 36 | 37 | extern UART_HandleTypeDef huart3; 38 | 39 | /* USER CODE BEGIN Private defines */ 40 | 41 | /* USER CODE END Private defines */ 42 | 43 | void MX_USART1_UART_Init(void); 44 | void MX_USART3_UART_Init(void); 45 | 46 | /* USER CODE BEGIN Prototypes */ 47 | 48 | /* USER CODE END Prototypes */ 49 | 50 | #ifdef __cplusplus 51 | } 52 | #endif 53 | 54 | #endif /* __USART_H__ */ 55 | 56 | -------------------------------------------------------------------------------- /Core/Src/gpio.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file gpio.c 5 | * @brief This file provides code for the configuration 6 | * of all used GPIO pins. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2022 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "gpio.h" 23 | 24 | /* USER CODE BEGIN 0 */ 25 | 26 | /* USER CODE END 0 */ 27 | 28 | /*----------------------------------------------------------------------------*/ 29 | /* Configure GPIO */ 30 | /*----------------------------------------------------------------------------*/ 31 | /* USER CODE BEGIN 1 */ 32 | 33 | /* USER CODE END 1 */ 34 | 35 | /** Configure pins as 36 | * Analog 37 | * Input 38 | * Output 39 | * EVENT_OUT 40 | * EXTI 41 | */ 42 | void MX_GPIO_Init(void) 43 | { 44 | 45 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 46 | 47 | /* GPIO Ports Clock Enable */ 48 | __HAL_RCC_GPIOC_CLK_ENABLE(); 49 | __HAL_RCC_GPIOD_CLK_ENABLE(); 50 | __HAL_RCC_GPIOB_CLK_ENABLE(); 51 | __HAL_RCC_GPIOA_CLK_ENABLE(); 52 | 53 | /*Configure GPIO pin Output Level */ 54 | HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET); 55 | 56 | /*Configure GPIO pin : PC13 */ 57 | GPIO_InitStruct.Pin = GPIO_PIN_13; 58 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 59 | GPIO_InitStruct.Pull = GPIO_NOPULL; 60 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 61 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 62 | 63 | } 64 | 65 | /* USER CODE BEGIN 2 */ 66 | 67 | /* USER CODE END 2 */ 68 | -------------------------------------------------------------------------------- /Core/Src/i2c.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file i2c.c 5 | * @brief This file provides code for the configuration 6 | * of the I2C instances. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2022 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "i2c.h" 22 | 23 | /* USER CODE BEGIN 0 */ 24 | 25 | /* USER CODE END 0 */ 26 | 27 | I2C_HandleTypeDef hi2c1; 28 | 29 | /* I2C1 init function */ 30 | void MX_I2C1_Init(void) 31 | { 32 | 33 | /* USER CODE BEGIN I2C1_Init 0 */ 34 | 35 | /* USER CODE END I2C1_Init 0 */ 36 | 37 | /* USER CODE BEGIN I2C1_Init 1 */ 38 | 39 | /* USER CODE END I2C1_Init 1 */ 40 | hi2c1.Instance = I2C1; 41 | hi2c1.Init.ClockSpeed = 100000; 42 | hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; 43 | hi2c1.Init.OwnAddress1 = 0; 44 | hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 45 | hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 46 | hi2c1.Init.OwnAddress2 = 0; 47 | hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 48 | hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 49 | if (HAL_I2C_Init(&hi2c1) != HAL_OK) 50 | { 51 | Error_Handler(); 52 | } 53 | /* USER CODE BEGIN I2C1_Init 2 */ 54 | 55 | /* USER CODE END I2C1_Init 2 */ 56 | 57 | } 58 | 59 | void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) 60 | { 61 | 62 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 63 | if(i2cHandle->Instance==I2C1) 64 | { 65 | /* USER CODE BEGIN I2C1_MspInit 0 */ 66 | 67 | /* USER CODE END I2C1_MspInit 0 */ 68 | 69 | __HAL_RCC_GPIOB_CLK_ENABLE(); 70 | /**I2C1 GPIO Configuration 71 | PB6 ------> I2C1_SCL 72 | PB7 ------> I2C1_SDA 73 | */ 74 | GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 75 | GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 76 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 77 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 78 | 79 | /* I2C1 clock enable */ 80 | __HAL_RCC_I2C1_CLK_ENABLE(); 81 | /* USER CODE BEGIN I2C1_MspInit 1 */ 82 | 83 | /* USER CODE END I2C1_MspInit 1 */ 84 | } 85 | } 86 | 87 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle) 88 | { 89 | 90 | if(i2cHandle->Instance==I2C1) 91 | { 92 | /* USER CODE BEGIN I2C1_MspDeInit 0 */ 93 | 94 | /* USER CODE END I2C1_MspDeInit 0 */ 95 | /* Peripheral clock disable */ 96 | __HAL_RCC_I2C1_CLK_DISABLE(); 97 | 98 | /**I2C1 GPIO Configuration 99 | PB6 ------> I2C1_SCL 100 | PB7 ------> I2C1_SDA 101 | */ 102 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6); 103 | 104 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7); 105 | 106 | /* USER CODE BEGIN I2C1_MspDeInit 1 */ 107 | 108 | /* USER CODE END I2C1_MspDeInit 1 */ 109 | } 110 | } 111 | 112 | /* USER CODE BEGIN 1 */ 113 | 114 | /* USER CODE END 1 */ 115 | -------------------------------------------------------------------------------- /Core/Src/main.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file : main.c 5 | * @brief : Main program body 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2022 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | /* Includes ------------------------------------------------------------------*/ 20 | #include "main.h" 21 | #include "usart.h" 22 | #include "gpio.h" 23 | 24 | /* Private includes ----------------------------------------------------------*/ 25 | /* USER CODE BEGIN Includes */ 26 | #include 27 | #include 28 | /* USER CODE END Includes */ 29 | 30 | /* Private typedef -----------------------------------------------------------*/ 31 | /* USER CODE BEGIN PTD */ 32 | 33 | /* USER CODE END PTD */ 34 | 35 | /* Private define ------------------------------------------------------------*/ 36 | /* USER CODE BEGIN PD */ 37 | /* USER CODE END PD */ 38 | 39 | /* Private macro -------------------------------------------------------------*/ 40 | /* USER CODE BEGIN PM */ 41 | 42 | /* USER CODE END PM */ 43 | 44 | /* Private variables ---------------------------------------------------------*/ 45 | 46 | /* USER CODE BEGIN PV */ 47 | 48 | /* USER CODE END PV */ 49 | 50 | /* Private function prototypes -----------------------------------------------*/ 51 | void SystemClock_Config(void); 52 | /* USER CODE BEGIN PFP */ 53 | 54 | /* USER CODE END PFP */ 55 | 56 | /* Private user code ---------------------------------------------------------*/ 57 | /* USER CODE BEGIN 0 */ 58 | void SWO_PrintChar(char const c, uint8_t const portNo) 59 | { 60 | volatile int timeout; 61 | 62 | /* Check if Trace Control Register (ITM->TCR at 0xE0000E80) is set */ 63 | /* check Trace Control Register if ITM trace is enabled*/ 64 | if ((ITM->TCR & ITM_TCR_ITMENA_Msk) == 0) 65 | { 66 | return; /* not enabled? */ 67 | } 68 | /* Check if the requested channel stimulus port (ITM->TER at 0xE0000E00) is enabled */ 69 | /* check Trace Enable Register if requested port is enabled */ 70 | if ((ITM->TER & (1ul << portNo)) == 0) 71 | { 72 | return; /* requested port not enabled? */ 73 | } 74 | timeout = 5000; /* arbitrary timeout value */ 75 | while (ITM->PORT[0].u32 == 0) 76 | { 77 | /* Wait until STIMx is ready, then send data */ 78 | if (--timeout == 0) 79 | { 80 | return; /* not able to send */ 81 | } 82 | } 83 | ITM->PORT[0].u8 = (uint8_t)c; 84 | } 85 | void SWO_PrintString(char const *s, uint8_t const portNumber) 86 | { 87 | while (*s != '\0') 88 | { 89 | SWO_PrintChar(*s++, portNumber); 90 | } 91 | } 92 | void printString(char const *str) 93 | { 94 | SWO_PrintString(str, 0); 95 | } 96 | /* USER CODE END 0 */ 97 | 98 | /** 99 | * @brief The application entry point. 100 | * @retval int 101 | */ 102 | int main(void) 103 | { 104 | /* USER CODE BEGIN 1 */ 105 | /* USER CODE END 1 */ 106 | 107 | /* MCU Configuration--------------------------------------------------------*/ 108 | 109 | /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ 110 | HAL_Init(); 111 | 112 | /* USER CODE BEGIN Init */ 113 | 114 | /* USER CODE END Init */ 115 | 116 | /* Configure the system clock */ 117 | SystemClock_Config(); 118 | 119 | /* USER CODE BEGIN SysInit */ 120 | 121 | /* USER CODE END SysInit */ 122 | 123 | /* Initialize all configured peripherals */ 124 | MX_GPIO_Init(); 125 | MX_USART1_UART_Init(); 126 | MX_USART3_UART_Init(); 127 | /* USER CODE BEGIN 2 */ 128 | printString("start"); 129 | /* USER CODE END 2 */ 130 | 131 | /* Infinite loop */ 132 | /* USER CODE BEGIN WHILE */ 133 | while (1) 134 | { 135 | /* USER CODE END WHILE */ 136 | 137 | /* USER CODE BEGIN 3 */ 138 | 139 | HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, 1); 140 | printString("led off\n"); 141 | HAL_Delay(500); 142 | HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, 0); 143 | printString("led on\n"); 144 | HAL_Delay(500); 145 | } 146 | /* USER CODE END 3 */ 147 | } 148 | 149 | /** 150 | * @brief System Clock Configuration 151 | * @retval None 152 | */ 153 | void SystemClock_Config(void) 154 | { 155 | RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 156 | RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 157 | 158 | /** Initializes the RCC Oscillators according to the specified parameters 159 | * in the RCC_OscInitTypeDef structure. 160 | */ 161 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 162 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; 163 | RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 164 | RCC_OscInitStruct.HSIState = RCC_HSI_ON; 165 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 166 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 167 | RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 168 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 169 | { 170 | Error_Handler(); 171 | } 172 | 173 | /** Initializes the CPU, AHB and APB buses clocks 174 | */ 175 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 176 | |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 177 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 178 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 179 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 180 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 181 | 182 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 183 | { 184 | Error_Handler(); 185 | } 186 | } 187 | 188 | /* USER CODE BEGIN 4 */ 189 | 190 | /* USER CODE END 4 */ 191 | 192 | /** 193 | * @brief This function is executed in case of error occurrence. 194 | * @retval None 195 | */ 196 | void Error_Handler(void) 197 | { 198 | /* USER CODE BEGIN Error_Handler_Debug */ 199 | /* User can add his own implementation to report the HAL error return state */ 200 | __disable_irq(); 201 | while (1) 202 | { 203 | } 204 | /* USER CODE END Error_Handler_Debug */ 205 | } 206 | 207 | #ifdef USE_FULL_ASSERT 208 | /** 209 | * @brief Reports the name of the source file and the source line number 210 | * where the assert_param error has occurred. 211 | * @param file: pointer to the source file name 212 | * @param line: assert_param error line source number 213 | * @retval None 214 | */ 215 | void assert_failed(uint8_t *file, uint32_t line) 216 | { 217 | /* USER CODE BEGIN 6 */ 218 | /* User can add his own implementation to report the file name and line number, 219 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 220 | /* USER CODE END 6 */ 221 | } 222 | #endif /* USE_FULL_ASSERT */ 223 | -------------------------------------------------------------------------------- /Core/Src/stm32f1xx_hal_msp.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f1xx_hal_msp.c 5 | * @brief This file provides code for the MSP Initialization 6 | * and de-Initialization codes. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2022 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "main.h" 23 | 24 | /* USER CODE BEGIN Includes */ 25 | 26 | /* USER CODE END Includes */ 27 | 28 | /* Private typedef -----------------------------------------------------------*/ 29 | /* USER CODE BEGIN TD */ 30 | 31 | /* USER CODE END TD */ 32 | 33 | /* Private define ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN Define */ 35 | 36 | /* USER CODE END Define */ 37 | 38 | /* Private macro -------------------------------------------------------------*/ 39 | /* USER CODE BEGIN Macro */ 40 | 41 | /* USER CODE END Macro */ 42 | 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* USER CODE BEGIN PV */ 45 | 46 | /* USER CODE END PV */ 47 | 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* USER CODE BEGIN PFP */ 50 | 51 | /* USER CODE END PFP */ 52 | 53 | /* External functions --------------------------------------------------------*/ 54 | /* USER CODE BEGIN ExternalFunctions */ 55 | 56 | /* USER CODE END ExternalFunctions */ 57 | 58 | /* USER CODE BEGIN 0 */ 59 | 60 | /* USER CODE END 0 */ 61 | /** 62 | * Initializes the Global MSP. 63 | */ 64 | void HAL_MspInit(void) 65 | { 66 | /* USER CODE BEGIN MspInit 0 */ 67 | 68 | /* USER CODE END MspInit 0 */ 69 | 70 | __HAL_RCC_AFIO_CLK_ENABLE(); 71 | __HAL_RCC_PWR_CLK_ENABLE(); 72 | 73 | /* System interrupt init*/ 74 | 75 | /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled 76 | */ 77 | __HAL_AFIO_REMAP_SWJ_NOJTAG(); 78 | 79 | /* USER CODE BEGIN MspInit 1 */ 80 | 81 | /* USER CODE END MspInit 1 */ 82 | } 83 | 84 | /* USER CODE BEGIN 1 */ 85 | 86 | /* USER CODE END 1 */ 87 | -------------------------------------------------------------------------------- /Core/Src/stm32f1xx_it.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f1xx_it.c 5 | * @brief Interrupt Service Routines. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2022 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "main.h" 22 | #include "stm32f1xx_it.h" 23 | /* Private includes ----------------------------------------------------------*/ 24 | /* USER CODE BEGIN Includes */ 25 | /* USER CODE END Includes */ 26 | 27 | /* Private typedef -----------------------------------------------------------*/ 28 | /* USER CODE BEGIN TD */ 29 | 30 | /* USER CODE END TD */ 31 | 32 | /* Private define ------------------------------------------------------------*/ 33 | /* USER CODE BEGIN PD */ 34 | 35 | /* USER CODE END PD */ 36 | 37 | /* Private macro -------------------------------------------------------------*/ 38 | /* USER CODE BEGIN PM */ 39 | 40 | /* USER CODE END PM */ 41 | 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* USER CODE BEGIN PV */ 44 | 45 | /* USER CODE END PV */ 46 | 47 | /* Private function prototypes -----------------------------------------------*/ 48 | /* USER CODE BEGIN PFP */ 49 | 50 | /* USER CODE END PFP */ 51 | 52 | /* Private user code ---------------------------------------------------------*/ 53 | /* USER CODE BEGIN 0 */ 54 | 55 | /* USER CODE END 0 */ 56 | 57 | /* External variables --------------------------------------------------------*/ 58 | extern UART_HandleTypeDef huart1; 59 | /* USER CODE BEGIN EV */ 60 | 61 | /* USER CODE END EV */ 62 | 63 | /******************************************************************************/ 64 | /* Cortex-M3 Processor Interruption and Exception Handlers */ 65 | /******************************************************************************/ 66 | /** 67 | * @brief This function handles Non maskable interrupt. 68 | */ 69 | void NMI_Handler(void) 70 | { 71 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 72 | 73 | /* USER CODE END NonMaskableInt_IRQn 0 */ 74 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 75 | while (1) 76 | { 77 | } 78 | /* USER CODE END NonMaskableInt_IRQn 1 */ 79 | } 80 | 81 | /** 82 | * @brief This function handles Hard fault interrupt. 83 | */ 84 | void HardFault_Handler(void) 85 | { 86 | /* USER CODE BEGIN HardFault_IRQn 0 */ 87 | 88 | /* USER CODE END HardFault_IRQn 0 */ 89 | while (1) 90 | { 91 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 92 | /* USER CODE END W1_HardFault_IRQn 0 */ 93 | } 94 | } 95 | 96 | /** 97 | * @brief This function handles Memory management fault. 98 | */ 99 | void MemManage_Handler(void) 100 | { 101 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 102 | 103 | /* USER CODE END MemoryManagement_IRQn 0 */ 104 | while (1) 105 | { 106 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 107 | /* USER CODE END W1_MemoryManagement_IRQn 0 */ 108 | } 109 | } 110 | 111 | /** 112 | * @brief This function handles Prefetch fault, memory access fault. 113 | */ 114 | void BusFault_Handler(void) 115 | { 116 | /* USER CODE BEGIN BusFault_IRQn 0 */ 117 | 118 | /* USER CODE END BusFault_IRQn 0 */ 119 | while (1) 120 | { 121 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 122 | /* USER CODE END W1_BusFault_IRQn 0 */ 123 | } 124 | } 125 | 126 | /** 127 | * @brief This function handles Undefined instruction or illegal state. 128 | */ 129 | void UsageFault_Handler(void) 130 | { 131 | /* USER CODE BEGIN UsageFault_IRQn 0 */ 132 | 133 | /* USER CODE END UsageFault_IRQn 0 */ 134 | while (1) 135 | { 136 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 137 | /* USER CODE END W1_UsageFault_IRQn 0 */ 138 | } 139 | } 140 | 141 | /** 142 | * @brief This function handles System service call via SWI instruction. 143 | */ 144 | void SVC_Handler(void) 145 | { 146 | /* USER CODE BEGIN SVCall_IRQn 0 */ 147 | 148 | /* USER CODE END SVCall_IRQn 0 */ 149 | /* USER CODE BEGIN SVCall_IRQn 1 */ 150 | 151 | /* USER CODE END SVCall_IRQn 1 */ 152 | } 153 | 154 | /** 155 | * @brief This function handles Debug monitor. 156 | */ 157 | void DebugMon_Handler(void) 158 | { 159 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 160 | 161 | /* USER CODE END DebugMonitor_IRQn 0 */ 162 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 163 | 164 | /* USER CODE END DebugMonitor_IRQn 1 */ 165 | } 166 | 167 | /** 168 | * @brief This function handles Pendable request for system service. 169 | */ 170 | void PendSV_Handler(void) 171 | { 172 | /* USER CODE BEGIN PendSV_IRQn 0 */ 173 | 174 | /* USER CODE END PendSV_IRQn 0 */ 175 | /* USER CODE BEGIN PendSV_IRQn 1 */ 176 | 177 | /* USER CODE END PendSV_IRQn 1 */ 178 | } 179 | 180 | /** 181 | * @brief This function handles System tick timer. 182 | */ 183 | void SysTick_Handler(void) 184 | { 185 | /* USER CODE BEGIN SysTick_IRQn 0 */ 186 | 187 | /* USER CODE END SysTick_IRQn 0 */ 188 | HAL_IncTick(); 189 | /* USER CODE BEGIN SysTick_IRQn 1 */ 190 | 191 | /* USER CODE END SysTick_IRQn 1 */ 192 | } 193 | 194 | /******************************************************************************/ 195 | /* STM32F1xx Peripheral Interrupt Handlers */ 196 | /* Add here the Interrupt Handlers for the used peripherals. */ 197 | /* For the available peripheral interrupt handler names, */ 198 | /* please refer to the startup file (startup_stm32f1xx.s). */ 199 | /******************************************************************************/ 200 | 201 | /** 202 | * @brief This function handles USART1 global interrupt. 203 | */ 204 | void USART1_IRQHandler(void) 205 | { 206 | /* USER CODE BEGIN USART1_IRQn 0 */ 207 | 208 | /* USER CODE END USART1_IRQn 0 */ 209 | HAL_UART_IRQHandler(&huart1); 210 | /* USER CODE BEGIN USART1_IRQn 1 */ 211 | 212 | /* USER CODE END USART1_IRQn 1 */ 213 | } 214 | 215 | /* USER CODE BEGIN 1 */ 216 | 217 | /* USER CODE END 1 */ 218 | -------------------------------------------------------------------------------- /Core/Src/system_stm32f1xx.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f1xx.c 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. 6 | * 7 | * 1. This file provides two functions and one global variable to be called from 8 | * user application: 9 | * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier 10 | * factors, AHB/APBx prescalers and Flash settings). 11 | * This function is called at startup just after reset and 12 | * before branch to main program. This call is made inside 13 | * the "startup_stm32f1xx_xx.s" file. 14 | * 15 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used 16 | * by the user application to setup the SysTick 17 | * timer or configure other parameters. 18 | * 19 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must 20 | * be called whenever the core clock is changed 21 | * during program execution. 22 | * 23 | * 2. After each device reset the HSI (8 MHz) is used as system clock source. 24 | * Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to 25 | * configure the system clock before to branch to main program. 26 | * 27 | * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on 28 | * the product used), refer to "HSE_VALUE". 29 | * When HSE is used as system clock source, directly or through PLL, and you 30 | * are using different crystal you have to adapt the HSE value to your own 31 | * configuration. 32 | * 33 | ****************************************************************************** 34 | * @attention 35 | * 36 | *

© Copyright (c) 2017 STMicroelectronics. 37 | * All rights reserved.

38 | * 39 | * This software component is licensed by ST under BSD 3-Clause license, 40 | * the "License"; You may not use this file except in compliance with the 41 | * License. You may obtain a copy of the License at: 42 | * opensource.org/licenses/BSD-3-Clause 43 | * 44 | ****************************************************************************** 45 | */ 46 | 47 | /** @addtogroup CMSIS 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup stm32f1xx_system 52 | * @{ 53 | */ 54 | 55 | /** @addtogroup STM32F1xx_System_Private_Includes 56 | * @{ 57 | */ 58 | 59 | #include "stm32f1xx.h" 60 | 61 | /** 62 | * @} 63 | */ 64 | 65 | /** @addtogroup STM32F1xx_System_Private_TypesDefinitions 66 | * @{ 67 | */ 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** @addtogroup STM32F1xx_System_Private_Defines 74 | * @{ 75 | */ 76 | 77 | #if !defined (HSE_VALUE) 78 | #define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz. 79 | This value can be provided and adapted by the user application. */ 80 | #endif /* HSE_VALUE */ 81 | 82 | #if !defined (HSI_VALUE) 83 | #define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz. 84 | This value can be provided and adapted by the user application. */ 85 | #endif /* HSI_VALUE */ 86 | 87 | /*!< Uncomment the following line if you need to use external SRAM */ 88 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) 89 | /* #define DATA_IN_ExtSRAM */ 90 | #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ 91 | 92 | /* Note: Following vector table addresses must be defined in line with linker 93 | configuration. */ 94 | /*!< Uncomment the following line if you need to relocate the vector table 95 | anywhere in Flash or Sram, else the vector table is kept at the automatic 96 | remap of boot address selected */ 97 | /* #define USER_VECT_TAB_ADDRESS */ 98 | 99 | #if defined(USER_VECT_TAB_ADDRESS) 100 | /*!< Uncomment the following line if you need to relocate your vector Table 101 | in Sram else user remap will be done in Flash. */ 102 | /* #define VECT_TAB_SRAM */ 103 | #if defined(VECT_TAB_SRAM) 104 | #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. 105 | This value must be a multiple of 0x200. */ 106 | #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. 107 | This value must be a multiple of 0x200. */ 108 | #else 109 | #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. 110 | This value must be a multiple of 0x200. */ 111 | #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. 112 | This value must be a multiple of 0x200. */ 113 | #endif /* VECT_TAB_SRAM */ 114 | #endif /* USER_VECT_TAB_ADDRESS */ 115 | 116 | /******************************************************************************/ 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /** @addtogroup STM32F1xx_System_Private_Macros 123 | * @{ 124 | */ 125 | 126 | /** 127 | * @} 128 | */ 129 | 130 | /** @addtogroup STM32F1xx_System_Private_Variables 131 | * @{ 132 | */ 133 | 134 | /* This variable is updated in three ways: 135 | 1) by calling CMSIS function SystemCoreClockUpdate() 136 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq() 137 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 138 | Note: If you use this function to configure the system clock; then there 139 | is no need to call the 2 first functions listed above, since SystemCoreClock 140 | variable is updated automatically. 141 | */ 142 | uint32_t SystemCoreClock = 16000000; 143 | const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; 144 | const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4}; 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /** @addtogroup STM32F1xx_System_Private_FunctionPrototypes 151 | * @{ 152 | */ 153 | 154 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) 155 | #ifdef DATA_IN_ExtSRAM 156 | static void SystemInit_ExtMemCtl(void); 157 | #endif /* DATA_IN_ExtSRAM */ 158 | #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ 159 | 160 | /** 161 | * @} 162 | */ 163 | 164 | /** @addtogroup STM32F1xx_System_Private_Functions 165 | * @{ 166 | */ 167 | 168 | /** 169 | * @brief Setup the microcontroller system 170 | * Initialize the Embedded Flash Interface, the PLL and update the 171 | * SystemCoreClock variable. 172 | * @note This function should be used only after reset. 173 | * @param None 174 | * @retval None 175 | */ 176 | void SystemInit (void) 177 | { 178 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) 179 | #ifdef DATA_IN_ExtSRAM 180 | SystemInit_ExtMemCtl(); 181 | #endif /* DATA_IN_ExtSRAM */ 182 | #endif 183 | 184 | /* Configure the Vector Table location -------------------------------------*/ 185 | #if defined(USER_VECT_TAB_ADDRESS) 186 | SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ 187 | #endif /* USER_VECT_TAB_ADDRESS */ 188 | } 189 | 190 | /** 191 | * @brief Update SystemCoreClock variable according to Clock Register Values. 192 | * The SystemCoreClock variable contains the core clock (HCLK), it can 193 | * be used by the user application to setup the SysTick timer or configure 194 | * other parameters. 195 | * 196 | * @note Each time the core clock (HCLK) changes, this function must be called 197 | * to update SystemCoreClock variable value. Otherwise, any configuration 198 | * based on this variable will be incorrect. 199 | * 200 | * @note - The system frequency computed by this function is not the real 201 | * frequency in the chip. It is calculated based on the predefined 202 | * constant and the selected clock source: 203 | * 204 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) 205 | * 206 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) 207 | * 208 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 209 | * or HSI_VALUE(*) multiplied by the PLL factors. 210 | * 211 | * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value 212 | * 8 MHz) but the real value may vary depending on the variations 213 | * in voltage and temperature. 214 | * 215 | * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value 216 | * 8 MHz or 25 MHz, depending on the product used), user has to ensure 217 | * that HSE_VALUE is same as the real frequency of the crystal used. 218 | * Otherwise, this function may have wrong result. 219 | * 220 | * - The result of this function could be not correct when using fractional 221 | * value for HSE crystal. 222 | * @param None 223 | * @retval None 224 | */ 225 | void SystemCoreClockUpdate (void) 226 | { 227 | uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U; 228 | 229 | #if defined(STM32F105xC) || defined(STM32F107xC) 230 | uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U; 231 | #endif /* STM32F105xC */ 232 | 233 | #if defined(STM32F100xB) || defined(STM32F100xE) 234 | uint32_t prediv1factor = 0U; 235 | #endif /* STM32F100xB or STM32F100xE */ 236 | 237 | /* Get SYSCLK source -------------------------------------------------------*/ 238 | tmp = RCC->CFGR & RCC_CFGR_SWS; 239 | 240 | switch (tmp) 241 | { 242 | case 0x00U: /* HSI used as system clock */ 243 | SystemCoreClock = HSI_VALUE; 244 | break; 245 | case 0x04U: /* HSE used as system clock */ 246 | SystemCoreClock = HSE_VALUE; 247 | break; 248 | case 0x08U: /* PLL used as system clock */ 249 | 250 | /* Get PLL clock source and multiplication factor ----------------------*/ 251 | pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; 252 | pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; 253 | 254 | #if !defined(STM32F105xC) && !defined(STM32F107xC) 255 | pllmull = ( pllmull >> 18U) + 2U; 256 | 257 | if (pllsource == 0x00U) 258 | { 259 | /* HSI oscillator clock divided by 2 selected as PLL clock entry */ 260 | SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; 261 | } 262 | else 263 | { 264 | #if defined(STM32F100xB) || defined(STM32F100xE) 265 | prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; 266 | /* HSE oscillator clock selected as PREDIV1 clock entry */ 267 | SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; 268 | #else 269 | /* HSE selected as PLL clock entry */ 270 | if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) 271 | {/* HSE oscillator clock divided by 2 */ 272 | SystemCoreClock = (HSE_VALUE >> 1U) * pllmull; 273 | } 274 | else 275 | { 276 | SystemCoreClock = HSE_VALUE * pllmull; 277 | } 278 | #endif 279 | } 280 | #else 281 | pllmull = pllmull >> 18U; 282 | 283 | if (pllmull != 0x0DU) 284 | { 285 | pllmull += 2U; 286 | } 287 | else 288 | { /* PLL multiplication factor = PLL input clock * 6.5 */ 289 | pllmull = 13U / 2U; 290 | } 291 | 292 | if (pllsource == 0x00U) 293 | { 294 | /* HSI oscillator clock divided by 2 selected as PLL clock entry */ 295 | SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; 296 | } 297 | else 298 | {/* PREDIV1 selected as PLL clock entry */ 299 | 300 | /* Get PREDIV1 clock source and division factor */ 301 | prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; 302 | prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; 303 | 304 | if (prediv1source == 0U) 305 | { 306 | /* HSE oscillator clock selected as PREDIV1 clock entry */ 307 | SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; 308 | } 309 | else 310 | {/* PLL2 clock selected as PREDIV1 clock entry */ 311 | 312 | /* Get PREDIV2 division factor and PLL2 multiplication factor */ 313 | prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U; 314 | pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U; 315 | SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; 316 | } 317 | } 318 | #endif /* STM32F105xC */ 319 | break; 320 | 321 | default: 322 | SystemCoreClock = HSI_VALUE; 323 | break; 324 | } 325 | 326 | /* Compute HCLK clock frequency ----------------*/ 327 | /* Get HCLK prescaler */ 328 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; 329 | /* HCLK clock frequency */ 330 | SystemCoreClock >>= tmp; 331 | } 332 | 333 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) 334 | /** 335 | * @brief Setup the external memory controller. Called in startup_stm32f1xx.s 336 | * before jump to __main 337 | * @param None 338 | * @retval None 339 | */ 340 | #ifdef DATA_IN_ExtSRAM 341 | /** 342 | * @brief Setup the external memory controller. 343 | * Called in startup_stm32f1xx_xx.s/.c before jump to main. 344 | * This function configures the external SRAM mounted on STM3210E-EVAL 345 | * board (STM32 High density devices). This SRAM will be used as program 346 | * data memory (including heap and stack). 347 | * @param None 348 | * @retval None 349 | */ 350 | void SystemInit_ExtMemCtl(void) 351 | { 352 | __IO uint32_t tmpreg; 353 | /*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is 354 | required, then adjust the Register Addresses */ 355 | 356 | /* Enable FSMC clock */ 357 | RCC->AHBENR = 0x00000114U; 358 | 359 | /* Delay after an RCC peripheral clock enabling */ 360 | tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN); 361 | 362 | /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ 363 | RCC->APB2ENR = 0x000001E0U; 364 | 365 | /* Delay after an RCC peripheral clock enabling */ 366 | tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN); 367 | 368 | (void)(tmpreg); 369 | 370 | /* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ 371 | /*---------------- SRAM Address lines configuration -------------------------*/ 372 | /*---------------- NOE and NWE configuration --------------------------------*/ 373 | /*---------------- NE3 configuration ----------------------------------------*/ 374 | /*---------------- NBL0, NBL1 configuration ---------------------------------*/ 375 | 376 | GPIOD->CRL = 0x44BB44BBU; 377 | GPIOD->CRH = 0xBBBBBBBBU; 378 | 379 | GPIOE->CRL = 0xB44444BBU; 380 | GPIOE->CRH = 0xBBBBBBBBU; 381 | 382 | GPIOF->CRL = 0x44BBBBBBU; 383 | GPIOF->CRH = 0xBBBB4444U; 384 | 385 | GPIOG->CRL = 0x44BBBBBBU; 386 | GPIOG->CRH = 0x444B4B44U; 387 | 388 | /*---------------- FSMC Configuration ---------------------------------------*/ 389 | /*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ 390 | 391 | FSMC_Bank1->BTCR[4U] = 0x00001091U; 392 | FSMC_Bank1->BTCR[5U] = 0x00110212U; 393 | } 394 | #endif /* DATA_IN_ExtSRAM */ 395 | #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ 396 | 397 | /** 398 | * @} 399 | */ 400 | 401 | /** 402 | * @} 403 | */ 404 | 405 | /** 406 | * @} 407 | */ 408 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 409 | -------------------------------------------------------------------------------- /Core/Src/usart.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file usart.c 5 | * @brief This file provides code for the configuration 6 | * of the USART instances. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2022 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "usart.h" 22 | 23 | /* USER CODE BEGIN 0 */ 24 | 25 | /* USER CODE END 0 */ 26 | 27 | UART_HandleTypeDef huart1; 28 | UART_HandleTypeDef huart3; 29 | 30 | /* USART1 init function */ 31 | 32 | void MX_USART1_UART_Init(void) 33 | { 34 | 35 | /* USER CODE BEGIN USART1_Init 0 */ 36 | 37 | /* USER CODE END USART1_Init 0 */ 38 | 39 | /* USER CODE BEGIN USART1_Init 1 */ 40 | 41 | /* USER CODE END USART1_Init 1 */ 42 | huart1.Instance = USART1; 43 | huart1.Init.BaudRate = 400000; 44 | huart1.Init.WordLength = UART_WORDLENGTH_8B; 45 | huart1.Init.StopBits = UART_STOPBITS_1; 46 | huart1.Init.Parity = UART_PARITY_NONE; 47 | huart1.Init.Mode = UART_MODE_TX_RX; 48 | huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 49 | huart1.Init.OverSampling = UART_OVERSAMPLING_16; 50 | if (HAL_UART_Init(&huart1) != HAL_OK) 51 | { 52 | Error_Handler(); 53 | } 54 | /* USER CODE BEGIN USART1_Init 2 */ 55 | 56 | /* USER CODE END USART1_Init 2 */ 57 | 58 | } 59 | /* USART3 init function */ 60 | 61 | void MX_USART3_UART_Init(void) 62 | { 63 | 64 | /* USER CODE BEGIN USART3_Init 0 */ 65 | 66 | /* USER CODE END USART3_Init 0 */ 67 | 68 | /* USER CODE BEGIN USART3_Init 1 */ 69 | 70 | /* USER CODE END USART3_Init 1 */ 71 | huart3.Instance = USART3; 72 | huart3.Init.BaudRate = 400000; 73 | huart3.Init.WordLength = UART_WORDLENGTH_8B; 74 | huart3.Init.StopBits = UART_STOPBITS_1; 75 | huart3.Init.Parity = UART_PARITY_NONE; 76 | huart3.Init.Mode = UART_MODE_TX_RX; 77 | huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; 78 | huart3.Init.OverSampling = UART_OVERSAMPLING_16; 79 | if (HAL_UART_Init(&huart3) != HAL_OK) 80 | { 81 | Error_Handler(); 82 | } 83 | /* USER CODE BEGIN USART3_Init 2 */ 84 | 85 | /* USER CODE END USART3_Init 2 */ 86 | 87 | } 88 | 89 | void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) 90 | { 91 | 92 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 93 | if(uartHandle->Instance==USART1) 94 | { 95 | /* USER CODE BEGIN USART1_MspInit 0 */ 96 | 97 | /* USER CODE END USART1_MspInit 0 */ 98 | /* USART1 clock enable */ 99 | __HAL_RCC_USART1_CLK_ENABLE(); 100 | 101 | __HAL_RCC_GPIOA_CLK_ENABLE(); 102 | /**USART1 GPIO Configuration 103 | PA9 ------> USART1_TX 104 | PA10 ------> USART1_RX 105 | */ 106 | GPIO_InitStruct.Pin = GPIO_PIN_9; 107 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 108 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 109 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 110 | 111 | GPIO_InitStruct.Pin = GPIO_PIN_10; 112 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 113 | GPIO_InitStruct.Pull = GPIO_NOPULL; 114 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 115 | 116 | /* USART1 interrupt Init */ 117 | HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 118 | HAL_NVIC_EnableIRQ(USART1_IRQn); 119 | /* USER CODE BEGIN USART1_MspInit 1 */ 120 | 121 | /* USER CODE END USART1_MspInit 1 */ 122 | } 123 | else if(uartHandle->Instance==USART3) 124 | { 125 | /* USER CODE BEGIN USART3_MspInit 0 */ 126 | 127 | /* USER CODE END USART3_MspInit 0 */ 128 | /* USART3 clock enable */ 129 | __HAL_RCC_USART3_CLK_ENABLE(); 130 | 131 | __HAL_RCC_GPIOB_CLK_ENABLE(); 132 | /**USART3 GPIO Configuration 133 | PB10 ------> USART3_TX 134 | PB11 ------> USART3_RX 135 | */ 136 | GPIO_InitStruct.Pin = GPIO_PIN_10; 137 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 138 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 139 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 140 | 141 | GPIO_InitStruct.Pin = GPIO_PIN_11; 142 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 143 | GPIO_InitStruct.Pull = GPIO_NOPULL; 144 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 145 | 146 | /* USER CODE BEGIN USART3_MspInit 1 */ 147 | 148 | /* USER CODE END USART3_MspInit 1 */ 149 | } 150 | } 151 | 152 | void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) 153 | { 154 | 155 | if(uartHandle->Instance==USART1) 156 | { 157 | /* USER CODE BEGIN USART1_MspDeInit 0 */ 158 | 159 | /* USER CODE END USART1_MspDeInit 0 */ 160 | /* Peripheral clock disable */ 161 | __HAL_RCC_USART1_CLK_DISABLE(); 162 | 163 | /**USART1 GPIO Configuration 164 | PA9 ------> USART1_TX 165 | PA10 ------> USART1_RX 166 | */ 167 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); 168 | 169 | /* USART1 interrupt Deinit */ 170 | HAL_NVIC_DisableIRQ(USART1_IRQn); 171 | /* USER CODE BEGIN USART1_MspDeInit 1 */ 172 | 173 | /* USER CODE END USART1_MspDeInit 1 */ 174 | } 175 | else if(uartHandle->Instance==USART3) 176 | { 177 | /* USER CODE BEGIN USART3_MspDeInit 0 */ 178 | 179 | /* USER CODE END USART3_MspDeInit 0 */ 180 | /* Peripheral clock disable */ 181 | __HAL_RCC_USART3_CLK_DISABLE(); 182 | 183 | /**USART3 GPIO Configuration 184 | PB10 ------> USART3_TX 185 | PB11 ------> USART3_RX 186 | */ 187 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_11); 188 | 189 | /* USER CODE BEGIN USART3_MspDeInit 1 */ 190 | 191 | /* USER CODE END USART3_MspDeInit 1 */ 192 | } 193 | } 194 | 195 | /* USER CODE BEGIN 1 */ 196 | 197 | /* USER CODE END 1 */ 198 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Copyright (c) 2015, 寒晨 2 | All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions are met: 6 | 7 | * Redistributions of source code must retain the above copyright notice, this 8 | list of conditions and the following disclaimer. 9 | 10 | * Redistributions in binary form must reproduce the above copyright notice, 11 | this list of conditions and the following disclaimer in the documentation 12 | and/or other materials provided with the distribution. 13 | 14 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 17 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 18 | FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 | DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 | SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 21 | CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 | OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 23 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 | 25 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | ########################################################################################################################## 2 | # File automatically-generated by tool: [projectgenerator] version: [4.1.0] date: [Thu Sep 14 22:21:43 EEST 2023] 3 | ########################################################################################################################## 4 | 5 | # ------------------------------------------------ 6 | # Generic Makefile (based on gcc) 7 | # 8 | # ChangeLog : 9 | # 2017-02-10 - Several enhancements + project update mode 10 | # 2015-07-22 - first version 11 | # ------------------------------------------------ 12 | 13 | ###################################### 14 | # target 15 | ###################################### 16 | TARGET = stm32_learn 17 | 18 | 19 | ###################################### 20 | # building variables 21 | ###################################### 22 | # debug build? 23 | DEBUG = 1 24 | # optimization 25 | OPT = -O0 26 | 27 | 28 | ####################################### 29 | # paths 30 | ####################################### 31 | # Build path 32 | BUILD_DIR = build 33 | 34 | # Path to "arm-none-eabi" that installed with xpack 35 | GCC_PATH=xpacks/.bin 36 | 37 | ###################################### 38 | # source 39 | ###################################### 40 | # C sources 41 | C_SOURCES = \ 42 | Core/Src/main.c \ 43 | Core/Src/stm32f1xx_it.c \ 44 | Core/Src/stm32f1xx_hal_msp.c \ 45 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c \ 46 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c \ 47 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c \ 48 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c \ 49 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c \ 50 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c \ 51 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c \ 52 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c \ 53 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c \ 54 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c \ 55 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c \ 56 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c \ 57 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c \ 58 | Core/Src/system_stm32f1xx.c \ 59 | Core/Src/gpio.c \ 60 | Core/Src/i2c.c \ 61 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c \ 62 | Core/Src/usart.c \ 63 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c 64 | 65 | # ASM sources 66 | ASM_SOURCES = \ 67 | startup_stm32f103xb.s 68 | 69 | 70 | ####################################### 71 | # binaries 72 | ####################################### 73 | PREFIX = arm-none-eabi- 74 | # The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx) 75 | # either it can be added to the PATH environment variable. 76 | ifdef GCC_PATH 77 | CC = $(GCC_PATH)/$(PREFIX)gcc 78 | AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp 79 | CP = $(GCC_PATH)/$(PREFIX)objcopy 80 | SZ = $(GCC_PATH)/$(PREFIX)size 81 | else 82 | CC = $(PREFIX)gcc 83 | AS = $(PREFIX)gcc -x assembler-with-cpp 84 | CP = $(PREFIX)objcopy 85 | SZ = $(PREFIX)size 86 | endif 87 | HEX = $(CP) -O ihex 88 | BIN = $(CP) -O binary -S 89 | 90 | ####################################### 91 | # CFLAGS 92 | ####################################### 93 | # cpu 94 | CPU = -mcpu=cortex-m3 95 | 96 | # fpu 97 | # NONE for Cortex-M0/M0+/M3 98 | 99 | # float-abi 100 | 101 | 102 | # mcu 103 | MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) 104 | 105 | # macros for gcc 106 | # AS defines 107 | AS_DEFS = 108 | 109 | # C defines 110 | C_DEFS = \ 111 | -DUSE_HAL_DRIVER \ 112 | -DSTM32F103xB 113 | 114 | 115 | # AS includes 116 | AS_INCLUDES = 117 | 118 | # C includes 119 | C_INCLUDES = \ 120 | -ICore/Inc \ 121 | -IDrivers/STM32F1xx_HAL_Driver/Inc \ 122 | -IDrivers/STM32F1xx_HAL_Driver/Inc/Legacy \ 123 | -IDrivers/CMSIS/Device/ST/STM32F1xx/Include \ 124 | -IDrivers/CMSIS/Include 125 | 126 | 127 | # compile gcc flags 128 | ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections 129 | 130 | CFLAGS += $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections 131 | 132 | ifeq ($(DEBUG), 1) 133 | CFLAGS += -g -gdwarf-2 134 | endif 135 | 136 | 137 | # Generate dependency information 138 | CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" 139 | 140 | 141 | ####################################### 142 | # LDFLAGS 143 | ####################################### 144 | # link script 145 | LDSCRIPT = STM32F103CBTx_FLASH.ld 146 | 147 | # libraries 148 | LIBS = -lc -lm -lnosys 149 | LIBDIR = 150 | LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections 151 | 152 | # default action: build all 153 | all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin 154 | 155 | 156 | ####################################### 157 | # build the application 158 | ####################################### 159 | # list of objects 160 | OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) 161 | vpath %.c $(sort $(dir $(C_SOURCES))) 162 | # list of ASM program objects 163 | OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o))) 164 | vpath %.s $(sort $(dir $(ASM_SOURCES))) 165 | 166 | $(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) 167 | $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ 168 | 169 | $(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR) 170 | $(AS) -c $(CFLAGS) $< -o $@ 171 | 172 | $(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile 173 | $(CC) $(OBJECTS) $(LDFLAGS) -o $@ 174 | $(SZ) $@ 175 | 176 | $(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 177 | $(HEX) $< $@ 178 | 179 | $(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 180 | $(BIN) $< $@ 181 | 182 | $(BUILD_DIR): 183 | mkdir $@ 184 | 185 | ####################################### 186 | # clean up 187 | ####################################### 188 | clean: 189 | -rm -fR $(BUILD_DIR) 190 | 191 | ####################################### 192 | # flash 193 | ####################################### 194 | stflash: $(BUILD_DIR)/$(TARGET).bin 195 | st-flash --reset write $< 0x8000000 196 | 197 | ####################################### 198 | # dependencies 199 | ####################################### 200 | -include $(wildcard $(BUILD_DIR)/*.d) 201 | 202 | # *** EOF *** 203 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # STM32F1Learn 2 | 3 | ## First Steps 4 | 5 | ### UBuntu: 6 | --- 7 | #### Install [STM32CubeMX](https://www.st.com/en/development-tools/stm32cubemx.html) 8 | 9 | 1. Download zip archive 10 | 2. Extract it somewhere 11 | 3. Doudle click on `SetupSTM32CubeMX-XXX` file and follow instructions 12 | 4. Go to installation folder and Run CubeMX 13 | 14 | 5. Install latest (1.8.4 atm) MCUS Embedded Software from CubeMX: 15 | `Help -> Manage embedded software packages -> STM32F1` 16 | default installation path can be changed in _udater settings_ menu 17 | 18 | --- 19 | ### Install VSCode Extensions 20 | 21 | 1. [C/C++](https://github.com/Microsoft/vscode-cpptools) 22 | 2. [Cortex Debug](https://github.com/Marus/cortex-debug) 23 | 3. [Makefile Tools](https://github.com/Microsoft/vscode-makefile-tools) 24 | 25 | --- 26 | #### Install [stlink](https://github.com/stlink-org/stlink#installation) 27 | 28 | 1. Go to releases and download `*.deb` package 29 | 2. Install it with `sudo dpkg -i stlink_*.deb` 30 | 3. In case of missing packages run this command `sudo apt-get -f install` 31 | 4. Check installation: `st-info --version` 32 | 33 | * `export LD_LIBRARY_PATH=/usr/local/lib` - for `libstlink-shared.so` related error 34 | 35 | --- 36 | #### Install tools 37 | 38 | 1. Install `xpm` if you don't have it: https://xpack.github.io/xpm/install/ 39 | 2. Run `xpm install` command 40 | 41 | --- 42 | #### Get latest SVD file for our processor on st.com 43 | 44 | - in case of our "blue pill" STM32F103 the link is: [here](https://www.st.com/en/microcontrollers-microprocessors/stm32f103.html#cad-resources) 45 | 1. add `STM32F103.svd` file to the root folder 46 | 47 | 48 | ## Interesting articles 49 | - [CUSTOM ST-LINK V2.1](http://embedblog.eu/?p=780) -------------------------------------------------------------------------------- /STM32F103CBTx_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | 5 | ** File : LinkerScript.ld 6 | ** 7 | ** Author : STM32CubeMX 8 | ** 9 | ** Abstract : Linker script for STM32F103CBTx series 10 | ** 128Kbytes FLASH and 20Kbytes RAM 11 | ** 12 | ** Set heap size, stack size and stack location according 13 | ** to application requirements. 14 | ** 15 | ** Set memory bank area and size if external memory is used. 16 | ** 17 | ** Target : STMicroelectronics STM32 18 | ** 19 | ** Distribution: The file is distributed “as is,” without any warranty 20 | ** of any kind. 21 | ** 22 | ***************************************************************************** 23 | ** @attention 24 | ** 25 | **

© COPYRIGHT(c) 2019 STMicroelectronics

26 | ** 27 | ** Redistribution and use in source and binary forms, with or without modification, 28 | ** are permitted provided that the following conditions are met: 29 | ** 1. Redistributions of source code must retain the above copyright notice, 30 | ** this list of conditions and the following disclaimer. 31 | ** 2. Redistributions in binary form must reproduce the above copyright notice, 32 | ** this list of conditions and the following disclaimer in the documentation 33 | ** and/or other materials provided with the distribution. 34 | ** 3. Neither the name of STMicroelectronics nor the names of its contributors 35 | ** may be used to endorse or promote products derived from this software 36 | ** without specific prior written permission. 37 | ** 38 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 39 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 42 | ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 43 | ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 45 | ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 46 | ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 47 | ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 | ** 49 | ***************************************************************************** 50 | */ 51 | 52 | /* Entry Point */ 53 | ENTRY(Reset_Handler) 54 | 55 | /* Highest address of the user mode stack */ 56 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ 57 | /* Generate a link error if heap and stack don't fit into RAM */ 58 | _Min_Heap_Size = 0x200; /* required amount of heap */ 59 | _Min_Stack_Size = 0x400; /* required amount of stack */ 60 | 61 | /* Specify the memory areas */ 62 | MEMORY 63 | { 64 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K 65 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K 66 | } 67 | 68 | /* Define output sections */ 69 | SECTIONS 70 | { 71 | /* The startup code goes first into FLASH */ 72 | .isr_vector : 73 | { 74 | . = ALIGN(4); 75 | KEEP(*(.isr_vector)) /* Startup code */ 76 | . = ALIGN(4); 77 | } >FLASH 78 | 79 | /* The program code and other data goes into FLASH */ 80 | .text : 81 | { 82 | . = ALIGN(4); 83 | *(.text) /* .text sections (code) */ 84 | *(.text*) /* .text* sections (code) */ 85 | *(.glue_7) /* glue arm to thumb code */ 86 | *(.glue_7t) /* glue thumb to arm code */ 87 | *(.eh_frame) 88 | 89 | KEEP (*(.init)) 90 | KEEP (*(.fini)) 91 | 92 | . = ALIGN(4); 93 | _etext = .; /* define a global symbols at end of code */ 94 | } >FLASH 95 | 96 | /* Constant data goes into FLASH */ 97 | .rodata : 98 | { 99 | . = ALIGN(4); 100 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 101 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 102 | . = ALIGN(4); 103 | } >FLASH 104 | 105 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 106 | .ARM : { 107 | __exidx_start = .; 108 | *(.ARM.exidx*) 109 | __exidx_end = .; 110 | } >FLASH 111 | 112 | .preinit_array : 113 | { 114 | PROVIDE_HIDDEN (__preinit_array_start = .); 115 | KEEP (*(.preinit_array*)) 116 | PROVIDE_HIDDEN (__preinit_array_end = .); 117 | } >FLASH 118 | .init_array : 119 | { 120 | PROVIDE_HIDDEN (__init_array_start = .); 121 | KEEP (*(SORT(.init_array.*))) 122 | KEEP (*(.init_array*)) 123 | PROVIDE_HIDDEN (__init_array_end = .); 124 | } >FLASH 125 | .fini_array : 126 | { 127 | PROVIDE_HIDDEN (__fini_array_start = .); 128 | KEEP (*(SORT(.fini_array.*))) 129 | KEEP (*(.fini_array*)) 130 | PROVIDE_HIDDEN (__fini_array_end = .); 131 | } >FLASH 132 | 133 | /* used by the startup to initialize data */ 134 | _sidata = LOADADDR(.data); 135 | 136 | /* Initialized data sections goes into RAM, load LMA copy after code */ 137 | .data : 138 | { 139 | . = ALIGN(4); 140 | _sdata = .; /* create a global symbol at data start */ 141 | *(.data) /* .data sections */ 142 | *(.data*) /* .data* sections */ 143 | 144 | . = ALIGN(4); 145 | _edata = .; /* define a global symbol at data end */ 146 | } >RAM AT> FLASH 147 | 148 | 149 | /* Uninitialized data section */ 150 | . = ALIGN(4); 151 | .bss : 152 | { 153 | /* This is used by the startup in order to initialize the .bss secion */ 154 | _sbss = .; /* define a global symbol at bss start */ 155 | __bss_start__ = _sbss; 156 | *(.bss) 157 | *(.bss*) 158 | *(COMMON) 159 | 160 | . = ALIGN(4); 161 | _ebss = .; /* define a global symbol at bss end */ 162 | __bss_end__ = _ebss; 163 | } >RAM 164 | 165 | /* User_heap_stack section, used to check that there is enough RAM left */ 166 | ._user_heap_stack : 167 | { 168 | . = ALIGN(8); 169 | PROVIDE ( end = . ); 170 | PROVIDE ( _end = . ); 171 | . = . + _Min_Heap_Size; 172 | . = . + _Min_Stack_Size; 173 | . = ALIGN(8); 174 | } >RAM 175 | 176 | 177 | 178 | /* Remove information from the standard libraries */ 179 | /DISCARD/ : 180 | { 181 | libc.a ( * ) 182 | libm.a ( * ) 183 | libgcc.a ( * ) 184 | } 185 | 186 | .ARM.attributes 0 : { *(.ARM.attributes) } 187 | } 188 | 189 | 190 | -------------------------------------------------------------------------------- /openocd.cfg: -------------------------------------------------------------------------------- 1 | #OpenOCD configuration file, generated by STM32 for VSCode 2 | 3 | # Programmer, can be changed to several interfaces 4 | # Standard will be the stlink interface as this is the standard for STM32 dev boards 5 | source [find interface/stlink.cfg] 6 | 7 | # The target MCU. This should match your board 8 | source [find target/stm32f1x.cfg] 9 | -------------------------------------------------------------------------------- /package.json: -------------------------------------------------------------------------------- 1 | { 2 | "name": "rtm7777_stm32_learn", 3 | "version": "0.1.0", 4 | "main": "", 5 | "scripts": { 6 | "test": "echo \"Error: no test specified\" && exit 1" 7 | }, 8 | "repository": { 9 | "type": "git", 10 | "url": "https://github.com/rtm7777/stm32_learn.git" 11 | }, 12 | "homepage": "https://github.com/rtm7777/stm32_learn/", 13 | "bugs": { 14 | "url": "https://github.com/rtm7777/stm32_learn/issues/" 15 | }, 16 | "keywords": [ 17 | "xpack" 18 | ], 19 | "author": { 20 | "name": "rtm7777", 21 | "email": "kolan678@gmail.com" 22 | }, 23 | "license": "MIT", 24 | "config": {}, 25 | "dependencies": {}, 26 | "devDependencies": {}, 27 | "xpack": { 28 | "minimumXpmRequired": "0.14.0", 29 | "dependencies": {}, 30 | "devDependencies": { 31 | "@xpack-dev-tools/arm-none-eabi-gcc": "12.3.1-1.1.1", 32 | "@xpack-dev-tools/openocd": "0.12.0-1.1" 33 | }, 34 | "properties": {}, 35 | "actions": {}, 36 | "buildConfigurations": {} 37 | } 38 | } 39 | -------------------------------------------------------------------------------- /script.scr: -------------------------------------------------------------------------------- 1 | target extended-remote /dev/ttyACM0 2 | monitor swdp_scan 3 | attach 1 4 | load 5 | compare-sections 6 | kill -------------------------------------------------------------------------------- /startup_stm32f103xb.s: -------------------------------------------------------------------------------- 1 | /** 2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ 3 | * @file startup_stm32f103xb.s 4 | * @author MCD Application Team 5 | * @brief STM32F103xB Devices vector table for Atollic toolchain. 6 | * This module performs: 7 | * - Set the initial SP 8 | * - Set the initial PC == Reset_Handler, 9 | * - Set the vector table entries with the exceptions ISR address 10 | * - Configure the clock system 11 | * - Branches to main in the C library (which eventually 12 | * calls main()). 13 | * After Reset the Cortex-M3 processor is in Thread mode, 14 | * priority is Privileged, and the Stack is set to Main. 15 | ****************************************************************************** 16 | * @attention 17 | * 18 | *

© Copyright (c) 2017 STMicroelectronics. 19 | * All rights reserved.

20 | * 21 | * This software component is licensed by ST under BSD 3-Clause license, 22 | * the "License"; You may not use this file except in compliance with the 23 | * License. You may obtain a copy of the License at: 24 | * opensource.org/licenses/BSD-3-Clause 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | .syntax unified 30 | .cpu cortex-m3 31 | .fpu softvfp 32 | .thumb 33 | 34 | .global g_pfnVectors 35 | .global Default_Handler 36 | 37 | /* start address for the initialization values of the .data section. 38 | defined in linker script */ 39 | .word _sidata 40 | /* start address for the .data section. defined in linker script */ 41 | .word _sdata 42 | /* end address for the .data section. defined in linker script */ 43 | .word _edata 44 | /* start address for the .bss section. defined in linker script */ 45 | .word _sbss 46 | /* end address for the .bss section. defined in linker script */ 47 | .word _ebss 48 | 49 | .equ BootRAM, 0xF108F85F 50 | /** 51 | * @brief This is the code that gets called when the processor first 52 | * starts execution following a reset event. Only the absolutely 53 | * necessary set is performed, after which the application 54 | * supplied main() routine is called. 55 | * @param None 56 | * @retval : None 57 | */ 58 | 59 | .section .text.Reset_Handler 60 | .weak Reset_Handler 61 | .type Reset_Handler, %function 62 | Reset_Handler: 63 | 64 | /* Copy the data segment initializers from flash to SRAM */ 65 | ldr r0, =_sdata 66 | ldr r1, =_edata 67 | ldr r2, =_sidata 68 | movs r3, #0 69 | b LoopCopyDataInit 70 | 71 | CopyDataInit: 72 | ldr r4, [r2, r3] 73 | str r4, [r0, r3] 74 | adds r3, r3, #4 75 | 76 | LoopCopyDataInit: 77 | adds r4, r0, r3 78 | cmp r4, r1 79 | bcc CopyDataInit 80 | 81 | /* Zero fill the bss segment. */ 82 | ldr r2, =_sbss 83 | ldr r4, =_ebss 84 | movs r3, #0 85 | b LoopFillZerobss 86 | 87 | FillZerobss: 88 | str r3, [r2] 89 | adds r2, r2, #4 90 | 91 | LoopFillZerobss: 92 | cmp r2, r4 93 | bcc FillZerobss 94 | 95 | /* Call the clock system intitialization function.*/ 96 | bl SystemInit 97 | /* Call static constructors */ 98 | bl __libc_init_array 99 | /* Call the application's entry point.*/ 100 | bl main 101 | bx lr 102 | .size Reset_Handler, .-Reset_Handler 103 | 104 | /** 105 | * @brief This is the code that gets called when the processor receives an 106 | * unexpected interrupt. This simply enters an infinite loop, preserving 107 | * the system state for examination by a debugger. 108 | * 109 | * @param None 110 | * @retval : None 111 | */ 112 | .section .text.Default_Handler,"ax",%progbits 113 | Default_Handler: 114 | Infinite_Loop: 115 | b Infinite_Loop 116 | .size Default_Handler, .-Default_Handler 117 | /****************************************************************************** 118 | * 119 | * The minimal vector table for a Cortex M3. Note that the proper constructs 120 | * must be placed on this to ensure that it ends up at physical address 121 | * 0x0000.0000. 122 | * 123 | ******************************************************************************/ 124 | .section .isr_vector,"a",%progbits 125 | .type g_pfnVectors, %object 126 | .size g_pfnVectors, .-g_pfnVectors 127 | 128 | 129 | g_pfnVectors: 130 | 131 | .word _estack 132 | .word Reset_Handler 133 | .word NMI_Handler 134 | .word HardFault_Handler 135 | .word MemManage_Handler 136 | .word BusFault_Handler 137 | .word UsageFault_Handler 138 | .word 0 139 | .word 0 140 | .word 0 141 | .word 0 142 | .word SVC_Handler 143 | .word DebugMon_Handler 144 | .word 0 145 | .word PendSV_Handler 146 | .word SysTick_Handler 147 | .word WWDG_IRQHandler 148 | .word PVD_IRQHandler 149 | .word TAMPER_IRQHandler 150 | .word RTC_IRQHandler 151 | .word FLASH_IRQHandler 152 | .word RCC_IRQHandler 153 | .word EXTI0_IRQHandler 154 | .word EXTI1_IRQHandler 155 | .word EXTI2_IRQHandler 156 | .word EXTI3_IRQHandler 157 | .word EXTI4_IRQHandler 158 | .word DMA1_Channel1_IRQHandler 159 | .word DMA1_Channel2_IRQHandler 160 | .word DMA1_Channel3_IRQHandler 161 | .word DMA1_Channel4_IRQHandler 162 | .word DMA1_Channel5_IRQHandler 163 | .word DMA1_Channel6_IRQHandler 164 | .word DMA1_Channel7_IRQHandler 165 | .word ADC1_2_IRQHandler 166 | .word USB_HP_CAN1_TX_IRQHandler 167 | .word USB_LP_CAN1_RX0_IRQHandler 168 | .word CAN1_RX1_IRQHandler 169 | .word CAN1_SCE_IRQHandler 170 | .word EXTI9_5_IRQHandler 171 | .word TIM1_BRK_IRQHandler 172 | .word TIM1_UP_IRQHandler 173 | .word TIM1_TRG_COM_IRQHandler 174 | .word TIM1_CC_IRQHandler 175 | .word TIM2_IRQHandler 176 | .word TIM3_IRQHandler 177 | .word TIM4_IRQHandler 178 | .word I2C1_EV_IRQHandler 179 | .word I2C1_ER_IRQHandler 180 | .word I2C2_EV_IRQHandler 181 | .word I2C2_ER_IRQHandler 182 | .word SPI1_IRQHandler 183 | .word SPI2_IRQHandler 184 | .word USART1_IRQHandler 185 | .word USART2_IRQHandler 186 | .word USART3_IRQHandler 187 | .word EXTI15_10_IRQHandler 188 | .word RTC_Alarm_IRQHandler 189 | .word USBWakeUp_IRQHandler 190 | .word 0 191 | .word 0 192 | .word 0 193 | .word 0 194 | .word 0 195 | .word 0 196 | .word 0 197 | .word BootRAM /* @0x108. This is for boot in RAM mode for 198 | STM32F10x Medium Density devices. */ 199 | 200 | /******************************************************************************* 201 | * 202 | * Provide weak aliases for each Exception handler to the Default_Handler. 203 | * As they are weak aliases, any function with the same name will override 204 | * this definition. 205 | * 206 | *******************************************************************************/ 207 | 208 | .weak NMI_Handler 209 | .thumb_set NMI_Handler,Default_Handler 210 | 211 | .weak HardFault_Handler 212 | .thumb_set HardFault_Handler,Default_Handler 213 | 214 | .weak MemManage_Handler 215 | .thumb_set MemManage_Handler,Default_Handler 216 | 217 | .weak BusFault_Handler 218 | .thumb_set BusFault_Handler,Default_Handler 219 | 220 | .weak UsageFault_Handler 221 | .thumb_set UsageFault_Handler,Default_Handler 222 | 223 | .weak SVC_Handler 224 | .thumb_set SVC_Handler,Default_Handler 225 | 226 | .weak DebugMon_Handler 227 | .thumb_set DebugMon_Handler,Default_Handler 228 | 229 | .weak PendSV_Handler 230 | .thumb_set PendSV_Handler,Default_Handler 231 | 232 | .weak SysTick_Handler 233 | .thumb_set SysTick_Handler,Default_Handler 234 | 235 | .weak WWDG_IRQHandler 236 | .thumb_set WWDG_IRQHandler,Default_Handler 237 | 238 | .weak PVD_IRQHandler 239 | .thumb_set PVD_IRQHandler,Default_Handler 240 | 241 | .weak TAMPER_IRQHandler 242 | .thumb_set TAMPER_IRQHandler,Default_Handler 243 | 244 | .weak RTC_IRQHandler 245 | .thumb_set RTC_IRQHandler,Default_Handler 246 | 247 | .weak FLASH_IRQHandler 248 | .thumb_set FLASH_IRQHandler,Default_Handler 249 | 250 | .weak RCC_IRQHandler 251 | .thumb_set RCC_IRQHandler,Default_Handler 252 | 253 | .weak EXTI0_IRQHandler 254 | .thumb_set EXTI0_IRQHandler,Default_Handler 255 | 256 | .weak EXTI1_IRQHandler 257 | .thumb_set EXTI1_IRQHandler,Default_Handler 258 | 259 | .weak EXTI2_IRQHandler 260 | .thumb_set EXTI2_IRQHandler,Default_Handler 261 | 262 | .weak EXTI3_IRQHandler 263 | .thumb_set EXTI3_IRQHandler,Default_Handler 264 | 265 | .weak EXTI4_IRQHandler 266 | .thumb_set EXTI4_IRQHandler,Default_Handler 267 | 268 | .weak DMA1_Channel1_IRQHandler 269 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 270 | 271 | .weak DMA1_Channel2_IRQHandler 272 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler 273 | 274 | .weak DMA1_Channel3_IRQHandler 275 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler 276 | 277 | .weak DMA1_Channel4_IRQHandler 278 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler 279 | 280 | .weak DMA1_Channel5_IRQHandler 281 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler 282 | 283 | .weak DMA1_Channel6_IRQHandler 284 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler 285 | 286 | .weak DMA1_Channel7_IRQHandler 287 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler 288 | 289 | .weak ADC1_2_IRQHandler 290 | .thumb_set ADC1_2_IRQHandler,Default_Handler 291 | 292 | .weak USB_HP_CAN1_TX_IRQHandler 293 | .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler 294 | 295 | .weak USB_LP_CAN1_RX0_IRQHandler 296 | .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler 297 | 298 | .weak CAN1_RX1_IRQHandler 299 | .thumb_set CAN1_RX1_IRQHandler,Default_Handler 300 | 301 | .weak CAN1_SCE_IRQHandler 302 | .thumb_set CAN1_SCE_IRQHandler,Default_Handler 303 | 304 | .weak EXTI9_5_IRQHandler 305 | .thumb_set EXTI9_5_IRQHandler,Default_Handler 306 | 307 | .weak TIM1_BRK_IRQHandler 308 | .thumb_set TIM1_BRK_IRQHandler,Default_Handler 309 | 310 | .weak TIM1_UP_IRQHandler 311 | .thumb_set TIM1_UP_IRQHandler,Default_Handler 312 | 313 | .weak TIM1_TRG_COM_IRQHandler 314 | .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler 315 | 316 | .weak TIM1_CC_IRQHandler 317 | .thumb_set TIM1_CC_IRQHandler,Default_Handler 318 | 319 | .weak TIM2_IRQHandler 320 | .thumb_set TIM2_IRQHandler,Default_Handler 321 | 322 | .weak TIM3_IRQHandler 323 | .thumb_set TIM3_IRQHandler,Default_Handler 324 | 325 | .weak TIM4_IRQHandler 326 | .thumb_set TIM4_IRQHandler,Default_Handler 327 | 328 | .weak I2C1_EV_IRQHandler 329 | .thumb_set I2C1_EV_IRQHandler,Default_Handler 330 | 331 | .weak I2C1_ER_IRQHandler 332 | .thumb_set I2C1_ER_IRQHandler,Default_Handler 333 | 334 | .weak I2C2_EV_IRQHandler 335 | .thumb_set I2C2_EV_IRQHandler,Default_Handler 336 | 337 | .weak I2C2_ER_IRQHandler 338 | .thumb_set I2C2_ER_IRQHandler,Default_Handler 339 | 340 | .weak SPI1_IRQHandler 341 | .thumb_set SPI1_IRQHandler,Default_Handler 342 | 343 | .weak SPI2_IRQHandler 344 | .thumb_set SPI2_IRQHandler,Default_Handler 345 | 346 | .weak USART1_IRQHandler 347 | .thumb_set USART1_IRQHandler,Default_Handler 348 | 349 | .weak USART2_IRQHandler 350 | .thumb_set USART2_IRQHandler,Default_Handler 351 | 352 | .weak USART3_IRQHandler 353 | .thumb_set USART3_IRQHandler,Default_Handler 354 | 355 | .weak EXTI15_10_IRQHandler 356 | .thumb_set EXTI15_10_IRQHandler,Default_Handler 357 | 358 | .weak RTC_Alarm_IRQHandler 359 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler 360 | 361 | .weak USBWakeUp_IRQHandler 362 | .thumb_set USBWakeUp_IRQHandler,Default_Handler 363 | 364 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 365 | 366 | -------------------------------------------------------------------------------- /stm32_learn.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | CAD.formats= 3 | CAD.pinconfig= 4 | CAD.provider= 5 | File.Version=6 6 | GPIO.groupedBy=Group By Peripherals 7 | KeepUserPlacement=false 8 | Mcu.CPN=STM32F103CBT6 9 | Mcu.Family=STM32F1 10 | Mcu.IP0=NVIC 11 | Mcu.IP1=RCC 12 | Mcu.IP2=SYS 13 | Mcu.IP3=USART1 14 | Mcu.IP4=USART3 15 | Mcu.IPNb=5 16 | Mcu.Name=STM32F103C(8-B)Tx 17 | Mcu.Package=LQFP48 18 | Mcu.Pin0=PC13-TAMPER-RTC 19 | Mcu.Pin1=PD0-OSC_IN 20 | Mcu.Pin10=VP_SYS_VS_Systick 21 | Mcu.Pin2=PD1-OSC_OUT 22 | Mcu.Pin3=PB10 23 | Mcu.Pin4=PB11 24 | Mcu.Pin5=PA9 25 | Mcu.Pin6=PA10 26 | Mcu.Pin7=PA13 27 | Mcu.Pin8=PA14 28 | Mcu.Pin9=PB3 29 | Mcu.PinsNb=11 30 | Mcu.ThirdPartyNb=0 31 | Mcu.UserConstants= 32 | Mcu.UserName=STM32F103CBTx 33 | MxCube.Version=6.9.0 34 | MxDb.Version=DB.6.0.90 35 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 36 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 37 | NVIC.ForceEnableDMAVector=true 38 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 39 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 40 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 41 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 42 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 43 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 44 | NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false 45 | NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true 46 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 47 | PA10.Mode=Asynchronous 48 | PA10.Signal=USART1_RX 49 | PA13.Mode=Trace_Asynchronous_SW 50 | PA13.Signal=SYS_JTMS-SWDIO 51 | PA14.Mode=Trace_Asynchronous_SW 52 | PA14.Signal=SYS_JTCK-SWCLK 53 | PA9.Mode=Asynchronous 54 | PA9.Signal=USART1_TX 55 | PB10.Mode=Asynchronous 56 | PB10.Signal=USART3_TX 57 | PB11.Mode=Asynchronous 58 | PB11.Signal=USART3_RX 59 | PB3.Mode=Trace_Asynchronous_SW 60 | PB3.Signal=SYS_JTDO-TRACESWO 61 | PC13-TAMPER-RTC.Signal=GPIO_Output 62 | PD0-OSC_IN.Mode=HSE-External-Oscillator 63 | PD0-OSC_IN.Signal=RCC_OSC_IN 64 | PD1-OSC_OUT.Mode=HSE-External-Oscillator 65 | PD1-OSC_OUT.Signal=RCC_OSC_OUT 66 | PinOutPanel.RotationAngle=0 67 | ProjectManager.AskForMigrate=true 68 | ProjectManager.BackupPrevious=false 69 | ProjectManager.CompilerOptimize=6 70 | ProjectManager.ComputerToolchain=false 71 | ProjectManager.CoupleFile=true 72 | ProjectManager.CustomerFirmwarePackage= 73 | ProjectManager.DefaultFWLocation=true 74 | ProjectManager.DeletePrevious=true 75 | ProjectManager.DeviceId=STM32F103CBTx 76 | ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.5 77 | ProjectManager.FreePins=false 78 | ProjectManager.HalAssertFull=false 79 | ProjectManager.HeapSize=0x200 80 | ProjectManager.KeepUserCode=true 81 | ProjectManager.LastFirmware=true 82 | ProjectManager.LibraryCopy=1 83 | ProjectManager.MainLocation=Core/Src 84 | ProjectManager.NoMain=false 85 | ProjectManager.PreviousToolchain= 86 | ProjectManager.ProjectBuild=false 87 | ProjectManager.ProjectFileName=stm32_learn.ioc 88 | ProjectManager.ProjectName=stm32_learn 89 | ProjectManager.ProjectStructure= 90 | ProjectManager.RegisterCallBack= 91 | ProjectManager.StackSize=0x400 92 | ProjectManager.TargetToolchain=Makefile 93 | ProjectManager.ToolChainLocation= 94 | ProjectManager.UAScriptAfterPath= 95 | ProjectManager.UAScriptBeforePath= 96 | ProjectManager.UnderRoot=false 97 | ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_USART3_UART_Init-USART3-false-HAL-true 98 | RCC.ADCFreqValue=36000000 99 | RCC.AHBFreq_Value=72000000 100 | RCC.APB1CLKDivider=RCC_HCLK_DIV2 101 | RCC.APB1Freq_Value=36000000 102 | RCC.APB1TimFreq_Value=72000000 103 | RCC.APB2Freq_Value=72000000 104 | RCC.APB2TimFreq_Value=72000000 105 | RCC.FCLKCortexFreq_Value=72000000 106 | RCC.FamilyName=M 107 | RCC.HCLKFreq_Value=72000000 108 | RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value 109 | RCC.MCOFreq_Value=72000000 110 | RCC.PLLCLKFreq_Value=72000000 111 | RCC.PLLMCOFreq_Value=36000000 112 | RCC.PLLMUL=RCC_PLL_MUL9 113 | RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE 114 | RCC.SYSCLKFreq_VALUE=72000000 115 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 116 | RCC.TimSysFreq_Value=72000000 117 | RCC.USBFreq_Value=72000000 118 | RCC.VCOOutput2Freq_Value=8000000 119 | USART1.BaudRate=400000 120 | USART1.IPParameters=VirtualMode,BaudRate 121 | USART1.VirtualMode=VM_ASYNC 122 | USART3.BaudRate=400000 123 | USART3.IPParameters=VirtualMode,BaudRate 124 | USART3.VirtualMode=VM_ASYNC 125 | VP_SYS_VS_Systick.Mode=SysTick 126 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 127 | board=custom 128 | --------------------------------------------------------------------------------