├── LICENSE ├── Makefile ├── README.md ├── codegen ├── Argument.cc ├── Argument.h ├── CodeBlock.cc ├── CodeBlock.h ├── DataFlow.cc ├── DataFlow.h ├── Makefile ├── Module.cc ├── Module.h ├── filter.c └── verilog.cc ├── figures └── ll-verilog_uml_diagram.png ├── filter.c ├── parser ├── Makefile ├── SymbolTable.cc ├── SymbolTable.h ├── Type.cc ├── Type.h ├── parser.h ├── parser.y └── scanner.l └── simpleHLS.bash /LICENSE: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/sabbaghm/c-ll-verilog/HEAD/LICENSE -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/sabbaghm/c-ll-verilog/HEAD/Makefile -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 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