├── .gitignore
├── LICENSE
├── Project
├── EventRecorderStub.scvd
├── Fire_FreeRTOS.Administrator
├── Fire_FreeRTOS.uvguix.USER
├── Fire_FreeRTOS.uvoptx
├── Fire_FreeRTOS.uvprojx
├── Listings
│ └── startup_armcm3.lst
├── Objects
│ └── .gitkeep
└── RTE
│ ├── Device
│ └── ARMCM3
│ │ ├── startup_ARMCM3.s
│ │ ├── startup_ARMCM3.s@1.0.1
│ │ ├── system_ARMCM3.c
│ │ └── system_ARMCM3.c@1.0.1
│ └── _Target_1
│ └── RTE_Components.h
├── README.md
├── docs
├── 1_list.c_带头双向循环链表.md
├── 4_空闲任务与阻塞延时的实现.md
├── 5_支持多优先级.md
├── 6_任务延时列表的实现.md
├── 7_支持时间片.md
├── task_创建任务与任务切换的实现.md
└── 临界保护.md
├── freertos
├── include
│ ├── FreeRTOS.h
│ ├── FreeRTOSConfig.h
│ ├── list.h
│ ├── portable.h
│ ├── portmacro.h
│ ├── projdefs.h
│ └── task.h
├── list.c
├── portable
│ └── RVDS
│ │ └── ARM_CM3
│ │ └── port.c
└── task.c
├── keilkilll.bat
└── user
└── main.c
/.gitignore:
--------------------------------------------------------------------------------
1 | # Prerequisites
2 | *.d
3 |
4 | # Object files
5 | *.o
6 | *.ko
7 | *.obj
8 | *.elf
9 |
10 | # Linker output
11 | *.ilk
12 | *.map
13 | *.exp
14 |
15 | # Precompiled Headers
16 | *.gch
17 | *.pch
18 |
19 | # Libraries
20 | *.lib
21 | *.a
22 | *.la
23 | *.lo
24 |
25 | # Shared objects (inc. Windows DLLs)
26 | *.dll
27 | *.so
28 | *.so.*
29 | *.dylib
30 |
31 | # Executables
32 | *.exe
33 | *.out
34 | *.app
35 | *.i*86
36 | *.x86_64
37 | *.hex
38 |
39 | # Debug files
40 | *.dSYM/
41 | *.su
42 | *.idb
43 | *.pdb
44 |
45 | # Kernel Module Compile Results
46 | *.mod*
47 | *.cmd
48 | .tmp_versions/
49 | modules.order
50 | Module.symvers
51 | Mkfile.old
52 | dkms.conf
53 |
54 | # Keil
55 | Project/Objects/*
56 | !.gitkeep
--------------------------------------------------------------------------------
/LICENSE:
--------------------------------------------------------------------------------
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519 | work and works based on it.
520 |
521 | A patent license is "discriminatory" if it does not include within
522 | the scope of its coverage, prohibits the exercise of, or is
523 | conditioned on the non-exercise of one or more of the rights that are
524 | specifically granted under this License. You may not convey a covered
525 | work if you are a party to an arrangement with a third party that is
526 | in the business of distributing software, under which you make payment
527 | to the third party based on the extent of your activity of conveying
528 | the work, and under which the third party grants, to any of the
529 | parties who would receive the covered work from you, a discriminatory
530 | patent license (a) in connection with copies of the covered work
531 | conveyed by you (or copies made from those copies), or (b) primarily
532 | for and in connection with specific products or compilations that
533 | contain the covered work, unless you entered into that arrangement,
534 | or that patent license was granted, prior to 28 March 2007.
535 |
536 | Nothing in this License shall be construed as excluding or limiting
537 | any implied license or other defenses to infringement that may
538 | otherwise be available to you under applicable patent law.
539 |
540 | 12. No Surrender of Others' Freedom.
541 |
542 | If conditions are imposed on you (whether by court order, agreement or
543 | otherwise) that contradict the conditions of this License, they do not
544 | excuse you from the conditions of this License. If you cannot convey a
545 | covered work so as to satisfy simultaneously your obligations under this
546 | License and any other pertinent obligations, then as a consequence you may
547 | not convey it at all. For example, if you agree to terms that obligate you
548 | to collect a royalty for further conveying from those to whom you convey
549 | the Program, the only way you could satisfy both those terms and this
550 | License would be to refrain entirely from conveying the Program.
551 |
552 | 13. Use with the GNU Affero General Public License.
553 |
554 | Notwithstanding any other provision of this License, you have
555 | permission to link or combine any covered work with a work licensed
556 | under version 3 of the GNU Affero General Public License into a single
557 | combined work, and to convey the resulting work. The terms of this
558 | License will continue to apply to the part which is the covered work,
559 | but the special requirements of the GNU Affero General Public License,
560 | section 13, concerning interaction through a network will apply to the
561 | combination as such.
562 |
563 | 14. Revised Versions of this License.
564 |
565 | The Free Software Foundation may publish revised and/or new versions of
566 | the GNU General Public License from time to time. Such new versions will
567 | be similar in spirit to the present version, but may differ in detail to
568 | address new problems or concerns.
569 |
570 | Each version is given a distinguishing version number. If the
571 | Program specifies that a certain numbered version of the GNU General
572 | Public License "or any later version" applies to it, you have the
573 | option of following the terms and conditions either of that numbered
574 | version or of any later version published by the Free Software
575 | Foundation. If the Program does not specify a version number of the
576 | GNU General Public License, you may choose any version ever published
577 | by the Free Software Foundation.
578 |
579 | If the Program specifies that a proxy can decide which future
580 | versions of the GNU General Public License can be used, that proxy's
581 | public statement of acceptance of a version permanently authorizes you
582 | to choose that version for the Program.
583 |
584 | Later license versions may give you additional or different
585 | permissions. However, no additional obligations are imposed on any
586 | author or copyright holder as a result of your choosing to follow a
587 | later version.
588 |
589 | 15. Disclaimer of Warranty.
590 |
591 | THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
592 | APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
593 | HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
594 | OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
595 | THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
596 | PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
597 | IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
598 | ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
599 |
600 | 16. Limitation of Liability.
601 |
602 | IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
603 | WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
604 | THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
605 | GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
606 | USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
607 | DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
608 | PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
609 | EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
610 | SUCH DAMAGES.
611 |
612 | 17. Interpretation of Sections 15 and 16.
613 |
614 | If the disclaimer of warranty and limitation of liability provided
615 | above cannot be given local legal effect according to their terms,
616 | reviewing courts shall apply local law that most closely approximates
617 | an absolute waiver of all civil liability in connection with the
618 | Program, unless a warranty or assumption of liability accompanies a
619 | copy of the Program in return for a fee.
620 |
621 | END OF TERMS AND CONDITIONS
622 |
623 | How to Apply These Terms to Your New Programs
624 |
625 | If you develop a new program, and you want it to be of the greatest
626 | possible use to the public, the best way to achieve this is to make it
627 | free software which everyone can redistribute and change under these terms.
628 |
629 | To do so, attach the following notices to the program. It is safest
630 | to attach them to the start of each source file to most effectively
631 | state the exclusion of warranty; and each file should have at least
632 | the "copyright" line and a pointer to where the full notice is found.
633 |
634 |
635 | Copyright (C)
636 |
637 | This program is free software: you can redistribute it and/or modify
638 | it under the terms of the GNU General Public License as published by
639 | the Free Software Foundation, either version 3 of the License, or
640 | (at your option) any later version.
641 |
642 | This program is distributed in the hope that it will be useful,
643 | but WITHOUT ANY WARRANTY; without even the implied warranty of
644 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
645 | GNU General Public License for more details.
646 |
647 | You should have received a copy of the GNU General Public License
648 | along with this program. If not, see .
649 |
650 | Also add information on how to contact you by electronic and paper mail.
651 |
652 | If the program does terminal interaction, make it output a short
653 | notice like this when it starts in an interactive mode:
654 |
655 | Copyright (C)
656 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
657 | This is free software, and you are welcome to redistribute it
658 | under certain conditions; type `show c' for details.
659 |
660 | The hypothetical commands `show w' and `show c' should show the appropriate
661 | parts of the General Public License. Of course, your program's commands
662 | might be different; for a GUI interface, you would use an "about box".
663 |
664 | You should also get your employer (if you work as a programmer) or school,
665 | if any, to sign a "copyright disclaimer" for the program, if necessary.
666 | For more information on this, and how to apply and follow the GNU GPL, see
667 | .
668 |
669 | The GNU General Public License does not permit incorporating your program
670 | into proprietary programs. If your program is a subroutine library, you
671 | may consider it more useful to permit linking proprietary applications with
672 | the library. If this is what you want to do, use the GNU Lesser General
673 | Public License instead of this License. But first, please read
674 | .
675 |
--------------------------------------------------------------------------------
/Project/EventRecorderStub.scvd:
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1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
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/Project/Fire_FreeRTOS.uvoptx:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | 1.0
5 |
6 | ### uVision Project, (C) Keil Software
7 |
8 |
9 | *.c
10 | *.s*; *.src; *.a*
11 | *.obj; *.o
12 | *.lib
13 | *.txt; *.h; *.inc; *.md
14 | *.plm
15 | *.cpp
16 | 0
17 |
18 |
19 |
20 | 0
21 | 0
22 |
23 |
24 |
25 | Target 1
26 | 0x4
27 | ARM-ADS
28 |
29 | 25000000
30 |
31 | 1
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34 | 1
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36 |
37 |
38 | 1
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44 |
45 | 79
46 | 66
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48 | .\Listings\
49 |
50 |
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105 | 0
106 | 0
107 |
108 |
109 |
110 |
111 |
112 |
113 |
114 |
115 |
116 |
117 | BIN\UL2CM3.DLL
118 |
119 |
120 |
121 | 0
122 | ARMRTXEVENTFLAGS
123 | -L70 -Z18 -C0 -M0 -T1
124 |
125 |
126 | 0
127 | DLGDARM
128 | (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
129 |
130 |
131 | 0
132 | ARMDBGFLAGS
133 | -T0
134 |
135 |
136 | 0
137 | UL2CM3
138 | UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)
139 |
140 |
141 |
142 |
143 | 0
144 | 0
145 | 276
146 | 1
147 | 700
148 | 0
149 | 0
150 | 0
151 | 0
152 | 0
153 | 1
154 | ..\freertos\portable\RVDS\ARM_CM3\port.c
155 |
156 | \\YH_RT_Thread\../freertos/portable/RVDS/ARM_CM3/port.c\276
157 |
158 |
159 |
160 |
161 | 0
162 | 1
163 | Task1TCB
164 |
165 |
166 | 1
167 | 1
168 | Task2TCB
169 |
170 |
171 | 2
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173 | pxCurrentTCB
174 |
175 |
176 | 3
177 | 1
178 | IdleTaskTCB
179 |
180 |
181 | 4
182 | 1
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184 |
185 |
186 | 5
187 | 1
188 | xTicksToWait
189 |
190 |
191 | 6
192 | 1
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194 |
195 |
196 | 7
197 | 1
198 | xNextTaskUnblockTime
199 |
200 |
201 | 8
202 | 1
203 | pxDelayedTaskList
204 |
205 |
206 | 9
207 | 1
208 | pxOverflowDelayedTaskList
209 |
210 |
211 | 10
212 | 1
213 | pxReadyTasksLists
214 |
215 |
216 | 11
217 | 1
218 | uxTaskNumber
219 |
220 |
221 | 12
222 | 1
223 | xTickCount
224 |
225 |
226 | 13
227 | 1
228 | xTaskIncrementTick()
229 |
230 |
231 |
232 |
233 | 0
234 | 2
235 | Task2TCB
236 |
237 |
238 |
239 |
240 | 1
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242 | 0x20000048
243 | 0
244 |
245 |
246 |
247 |
248 | 4
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250 | \\YH_RT_Thread\../User/main.c\Task1Stack[19]
251 | 0
252 |
253 |
254 |
255 | 0
256 |
257 |
258 | 0
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283 |
284 |
285 | 0
286 | 0
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288 |
289 |
290 |
291 |
292 |
293 |
294 |
295 |
296 |
297 |
298 | 0
299 | `flag1
300 | FF00000000000000000000000000E0FFFFFFEF4101000000000000000000000000000000666C6167310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000565555555555D53F100000000000000000000000000000000000000044020000
301 |
302 |
303 | 1
304 | `flag2
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306 |
307 |
308 | 2
309 | `flag3
310 | 0000800000000000000000000000E0FFFFFFEF4101000000000000000000000000000000666C6167330000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000003000000555555555555D53F100000000000000000000000000000000000000058030000
311 |
312 |
313 |
314 |
315 |
316 |
317 | user
318 | 0
319 | 0
320 | 0
321 | 0
322 |
323 | 1
324 | 1
325 | 1
326 | 0
327 | 0
328 | 0
329 | ..\User\main.c
330 | main.c
331 | 0
332 | 0
333 |
334 |
335 |
336 |
337 | FreeRTOS/Ports
338 | 0
339 | 0
340 | 0
341 | 0
342 |
343 | 2
344 | 2
345 | 1
346 | 0
347 | 0
348 | 0
349 | ..\freertos\portable\RVDS\ARM_CM3\port.c
350 | port.c
351 | 0
352 | 0
353 |
354 |
355 |
356 |
357 | FreeRTOS/Source
358 | 0
359 | 0
360 | 0
361 | 0
362 |
363 | 3
364 | 3
365 | 1
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367 | 0
368 | 0
369 | ..\freertos\list.c
370 | list.c
371 | 0
372 | 0
373 |
374 |
375 | 3
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380 | 0
381 | ..\freertos\include\list.h
382 | list.h
383 | 0
384 | 0
385 |
386 |
387 | 3
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390 | 0
391 | 0
392 | 0
393 | ..\freertos\include\FreeRTOSConfig.h
394 | FreeRTOSConfig.h
395 | 0
396 | 0
397 |
398 |
399 | 3
400 | 6
401 | 5
402 | 0
403 | 0
404 | 0
405 | ..\freertos\include\portmacro.h
406 | portmacro.h
407 | 0
408 | 0
409 |
410 |
411 | 3
412 | 7
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415 | 0
416 | 0
417 | ..\freertos\include\FreeRTOS.h
418 | FreeRTOS.h
419 | 0
420 | 0
421 |
422 |
423 | 3
424 | 8
425 | 5
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427 | 0
428 | 0
429 | ..\freertos\include\portable.h
430 | portable.h
431 | 0
432 | 0
433 |
434 |
435 | 3
436 | 9
437 | 5
438 | 0
439 | 0
440 | 0
441 | ..\freertos\include\projdefs.h
442 | projdefs.h
443 | 0
444 | 0
445 |
446 |
447 | 3
448 | 10
449 | 1
450 | 0
451 | 0
452 | 0
453 | ..\freertos\task.c
454 | task.c
455 | 0
456 | 0
457 |
458 |
459 | 3
460 | 11
461 | 5
462 | 0
463 | 0
464 | 0
465 | ..\freertos\include\task.h
466 | task.h
467 | 0
468 | 0
469 |
470 |
471 |
472 |
473 | docs
474 | 1
475 | 0
476 | 0
477 | 0
478 |
479 |
480 |
481 | ::CMSIS
482 | 0
483 | 0
484 | 0
485 | 1
486 |
487 |
488 |
489 | ::Device
490 | 1
491 | 0
492 | 0
493 | 1
494 |
495 |
496 |
497 |
--------------------------------------------------------------------------------
/Project/Fire_FreeRTOS.uvprojx:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | 2.1
5 |
6 | ### uVision Project, (C) Keil Software
7 |
8 |
9 |
10 | Target 1
11 | 0x4
12 | ARM-ADS
13 | 5060960::V5.06 update 7 (build 960)::.\ARMCC
14 | 0
15 |
16 |
17 | ARMCM3
18 | ARM
19 | ARM.CMSIS.5.9.0
20 | http://www.keil.com/pack/
21 | IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE
22 |
23 |
24 | UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)
25 | 0
26 | $$Device:ARMCM3$Device\ARM\ARMCM3\Include\ARMCM3.h
27 |
28 |
29 |
30 |
31 |
32 |
33 |
34 |
35 |
36 | $$Device:ARMCM3$Device\ARM\SVD\ARMCM3.svd
37 | 0
38 | 0
39 |
40 |
41 |
42 |
43 |
44 |
45 | 0
46 | 0
47 | 0
48 | 0
49 | 1
50 |
51 | .\Objects\
52 | YH-RT-Thread
53 | 1
54 | 0
55 | 0
56 | 1
57 | 1
58 | .\Listings\
59 | 1
60 | 0
61 | 0
62 |
63 | 0
64 | 0
65 |
66 |
67 | 0
68 | 0
69 | 0
70 | 0
71 |
72 |
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76 |
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95 |
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100 | 0
101 | 1
102 | 0
103 | 0
104 | 0
105 | 0
106 | 3
107 |
108 |
109 | 1
110 |
111 |
112 | SARMCM3.DLL
113 | -MPU
114 | DCM.DLL
115 | -pCM3
116 | SARMCM3.DLL
117 | -MPU
118 | TCM.DLL
119 | -pCM3
120 |
121 |
122 |
123 | 1
124 | 0
125 | 0
126 | 0
127 | 16
128 |
129 |
130 |
131 |
132 | 1
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139 | 1
140 | BIN\UL2CM3.DLL
141 |
142 |
143 |
144 |
145 |
146 | 0
147 |
148 |
149 |
150 | 0
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340 |
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342 |
343 | ..\User;..\freertos\include;..\freertos\portable\RVDS\ARM_CM3
344 |
345 |
346 |
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374 |
375 |
376 |
377 |
378 |
379 |
380 |
381 |
382 |
383 |
384 |
385 | user
386 |
387 |
388 | main.c
389 | 1
390 | ..\User\main.c
391 |
392 |
393 |
394 |
395 | FreeRTOS/Ports
396 |
397 |
398 | port.c
399 | 1
400 | ..\freertos\portable\RVDS\ARM_CM3\port.c
401 |
402 |
403 |
404 |
405 | FreeRTOS/Source
406 |
407 |
408 | list.c
409 | 1
410 | ..\freertos\list.c
411 |
412 |
413 | list.h
414 | 5
415 | ..\freertos\include\list.h
416 |
417 |
418 | FreeRTOSConfig.h
419 | 5
420 | ..\freertos\include\FreeRTOSConfig.h
421 |
422 |
423 | portmacro.h
424 | 5
425 | ..\freertos\include\portmacro.h
426 |
427 |
428 | FreeRTOS.h
429 | 5
430 | ..\freertos\include\FreeRTOS.h
431 |
432 |
433 | portable.h
434 | 5
435 | ..\freertos\include\portable.h
436 |
437 |
438 | projdefs.h
439 | 5
440 | ..\freertos\include\projdefs.h
441 |
442 |
443 | task.c
444 | 1
445 | ..\freertos\task.c
446 |
447 |
448 | task.h
449 | 5
450 | ..\freertos\include\task.h
451 |
452 |
453 |
454 |
455 | docs
456 |
457 |
458 | ::CMSIS
459 |
460 |
461 | ::Device
462 |
463 |
464 |
465 |
466 |
467 |
468 |
469 |
470 |
471 |
472 |
473 |
474 |
475 |
476 |
477 |
478 |
479 |
480 |
481 |
482 |
483 |
484 |
485 | RTE\Device\ARMCM3\startup_ARMCM3.s
486 |
487 |
488 |
489 |
490 |
491 |
492 |
493 | RTE\Device\ARMCM3\system_ARMCM3.c
494 |
495 |
496 |
497 |
498 |
499 |
500 |
501 |
502 |
503 |
504 |
505 |
506 | Fire_FreeRTOS
507 | 1
508 |
509 |
510 |
511 |
512 |
513 |
--------------------------------------------------------------------------------
/Project/Listings/startup_armcm3.lst:
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1 |
2 |
3 |
4 | ARM Macro Assembler Page 1
5 |
6 |
7 | 1 00000000 ;/******************************************************
8 | ********************//**
9 | 2 00000000 ; * @file startup_ARMCM3.s
10 | 3 00000000 ; * @brief CMSIS Core Device Startup File for
11 | 4 00000000 ; * ARMCM3 Device Series
12 | 5 00000000 ; * @version V5.00
13 | 6 00000000 ; * @date 02. March 2016
14 | 7 00000000 ; ******************************************************
15 | ************************/
16 | 8 00000000 ;/*
17 | 9 00000000 ; * Copyright (c) 2009-2016 ARM Limited. All rights rese
18 | rved.
19 | 10 00000000 ; *
20 | 11 00000000 ; * SPDX-License-Identifier: Apache-2.0
21 | 12 00000000 ; *
22 | 13 00000000 ; * Licensed under the Apache License, Version 2.0 (the
23 | License); you may
24 | 14 00000000 ; * not use this file except in compliance with the Lice
25 | nse.
26 | 15 00000000 ; * You may obtain a copy of the License at
27 | 16 00000000 ; *
28 | 17 00000000 ; * www.apache.org/licenses/LICENSE-2.0
29 | 18 00000000 ; *
30 | 19 00000000 ; * Unless required by applicable law or agreed to in wr
31 | iting, software
32 | 20 00000000 ; * distributed under the License is distributed on an A
33 | S IS BASIS, WITHOUT
34 | 21 00000000 ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express
35 | or implied.
36 | 22 00000000 ; * See the License for the specific language governing
37 | permissions and
38 | 23 00000000 ; * limitations under the License.
39 | 24 00000000 ; */
40 | 25 00000000
41 | 26 00000000 ;/*
42 | 27 00000000 ;//-------- <<< Use Configuration Wizard in Context Menu
43 | >>> ------------------
44 | 28 00000000 ;*/
45 | 29 00000000
46 | 30 00000000
47 | 31 00000000 ; Stack Configuration
48 | 32 00000000 ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
49 | 33 00000000 ;
50 | 34 00000000
51 | 35 00000000 00000400
52 | Stack_Size
53 | EQU 0x00000400
54 | 36 00000000
55 | 37 00000000 AREA STACK, NOINIT, READWRITE, ALIGN
56 | =3
57 | 38 00000000 Stack_Mem
58 | SPACE Stack_Size
59 | 39 00000400 __initial_sp
60 | 40 00000400
61 | 41 00000400
62 | 42 00000400 ; Heap Configuration
63 | 43 00000400 ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
64 | 44 00000400 ;
65 | 45 00000400
66 |
67 |
68 |
69 | ARM Macro Assembler Page 2
70 |
71 |
72 | 46 00000400 00000C00
73 | Heap_Size
74 | EQU 0x00000C00
75 | 47 00000400
76 | 48 00000400 AREA HEAP, NOINIT, READWRITE, ALIGN=
77 | 3
78 | 49 00000000 __heap_base
79 | 50 00000000 Heap_Mem
80 | SPACE Heap_Size
81 | 51 00000C00 __heap_limit
82 | 52 00000C00
83 | 53 00000C00
84 | 54 00000C00 PRESERVE8
85 | 55 00000C00 THUMB
86 | 56 00000C00
87 | 57 00000C00
88 | 58 00000C00 ; Vector Table Mapped to Address 0 at Reset
89 | 59 00000C00
90 | 60 00000C00 AREA RESET, DATA, READONLY
91 | 61 00000000 EXPORT __Vectors
92 | 62 00000000 EXPORT __Vectors_End
93 | 63 00000000 EXPORT __Vectors_Size
94 | 64 00000000
95 | 65 00000000 00000000
96 | __Vectors
97 | DCD __initial_sp ; Top of Stack
98 | 66 00000004 00000000 DCD Reset_Handler ; Reset Handler
99 | 67 00000008 00000000 DCD NMI_Handler ; NMI Handler
100 | 68 0000000C 00000000 DCD HardFault_Handler ; Hard Fault
101 | Handler
102 | 69 00000010 00000000 DCD MemManage_Handler
103 | ; MPU Fault Handler
104 |
105 | 70 00000014 00000000 DCD BusFault_Handler
106 | ; Bus Fault Handler
107 |
108 | 71 00000018 00000000 DCD UsageFault_Handler ; Usage Faul
109 | t Handler
110 | 72 0000001C 00000000 DCD 0 ; Reserved
111 | 73 00000020 00000000 DCD 0 ; Reserved
112 | 74 00000024 00000000 DCD 0 ; Reserved
113 | 75 00000028 00000000 DCD 0 ; Reserved
114 | 76 0000002C 00000000 DCD SVC_Handler ; SVCall Handler
115 | 77 00000030 00000000 DCD DebugMon_Handler ; Debug Monito
116 | r Handler
117 | 78 00000034 00000000 DCD 0 ; Reserved
118 | 79 00000038 00000000 DCD PendSV_Handler ; PendSV Handler
119 |
120 | 80 0000003C 00000000 DCD SysTick_Handler
121 | ; SysTick Handler
122 | 81 00000040
123 | 82 00000040 ; External Interrupts
124 | 83 00000040 00000000 DCD WDT_IRQHandler ; 0: Watchdog
125 | Timer
126 | 84 00000044 00000000 DCD RTC_IRQHandler ; 1: Real Time
127 | Clock
128 | 85 00000048 00000000 DCD TIM0_IRQHandler ; 2: Timer0 /
129 | Timer1
130 | 86 0000004C 00000000 DCD TIM2_IRQHandler ; 3: Timer2 /
131 |
132 |
133 |
134 | ARM Macro Assembler Page 3
135 |
136 |
137 | Timer3
138 | 87 00000050 00000000 DCD MCIA_IRQHandler ; 4: MCIa
139 | 88 00000054 00000000 DCD MCIB_IRQHandler ; 5: MCIb
140 | 89 00000058 00000000 DCD UART0_IRQHandler ; 6: UART0 -
141 | DUT FPGA
142 | 90 0000005C 00000000 DCD UART1_IRQHandler ; 7: UART1 -
143 | DUT FPGA
144 | 91 00000060 00000000 DCD UART2_IRQHandler ; 8: UART2 -
145 | DUT FPGA
146 | 92 00000064 00000000 DCD UART4_IRQHandler ; 9: UART4 -
147 | not connected
148 | 93 00000068 00000000 DCD AACI_IRQHandler
149 | ; 10: AACI / AC97
150 | 94 0000006C 00000000 DCD CLCD_IRQHandler ; 11: CLCD Comb
151 | ined Interrupt
152 | 95 00000070 00000000 DCD ENET_IRQHandler ; 12: Ethernet
153 | 96 00000074 00000000 DCD USBDC_IRQHandler
154 | ; 13: USB Device
155 | 97 00000078 00000000 DCD USBHC_IRQHandler ; 14: USB Host
156 | Controller
157 | 98 0000007C 00000000 DCD CHLCD_IRQHandler
158 | ; 15: Character LCD
159 |
160 | 99 00000080 00000000 DCD FLEXRAY_IRQHandler
161 | ; 16: Flexray
162 | 100 00000084 00000000 DCD CAN_IRQHandler ; 17: CAN
163 | 101 00000088 00000000 DCD LIN_IRQHandler ; 18: LIN
164 | 102 0000008C 00000000 DCD I2C_IRQHandler
165 | ; 19: I2C ADC/DAC
166 | 103 00000090 00000000 DCD 0 ; 20: Reserved
167 | 104 00000094 00000000 DCD 0 ; 21: Reserved
168 | 105 00000098 00000000 DCD 0 ; 22: Reserved
169 | 106 0000009C 00000000 DCD 0 ; 23: Reserved
170 | 107 000000A0 00000000 DCD 0 ; 24: Reserved
171 | 108 000000A4 00000000 DCD 0 ; 25: Reserved
172 | 109 000000A8 00000000 DCD 0 ; 26: Reserved
173 | 110 000000AC 00000000 DCD 0 ; 27: Reserved
174 | 111 000000B0 00000000 DCD CPU_CLCD_IRQHandler ; 28: Reser
175 | ved - CPU FPGA CLCD
176 |
177 | 112 000000B4 00000000 DCD 0 ; 29: Reserved - CP
178 | U FPGA
179 | 113 000000B8 00000000 DCD UART3_IRQHandler ; 30: UART3
180 | - CPU FPGA
181 | 114 000000BC 00000000 DCD SPI_IRQHandler ; 31: SPI Touchs
182 | creen - CPU FPGA
183 | 115 000000C0 __Vectors_End
184 | 116 000000C0
185 | 117 000000C0 000000C0
186 | __Vectors_Size
187 | EQU __Vectors_End - __Vectors
188 | 118 000000C0
189 | 119 000000C0 AREA |.text|, CODE, READONLY
190 | 120 00000000
191 | 121 00000000
192 | 122 00000000 ; Reset Handler
193 | 123 00000000
194 | 124 00000000 Reset_Handler
195 | PROC
196 |
197 |
198 |
199 | ARM Macro Assembler Page 4
200 |
201 |
202 | 125 00000000 EXPORT Reset_Handler [WEAK
203 | ]
204 | 126 00000000 IMPORT SystemInit
205 | 127 00000000 IMPORT __main
206 | 128 00000000 4809 LDR R0, =SystemInit
207 | 129 00000002 4780 BLX R0
208 | 130 00000004 4809 LDR R0, =__main
209 | 131 00000006 4700 BX R0
210 | 132 00000008 ENDP
211 | 133 00000008
212 | 134 00000008
213 | 135 00000008 ; Dummy Exception Handlers (infinite loops which can be
214 | modified)
215 | 136 00000008
216 | 137 00000008 NMI_Handler
217 | PROC
218 | 138 00000008 EXPORT NMI_Handler [WEAK
219 | ]
220 | 139 00000008 E7FE B .
221 | 140 0000000A ENDP
222 | 142 0000000A HardFault_Handler
223 | PROC
224 | 143 0000000A EXPORT HardFault_Handler [WEAK
225 | ]
226 | 144 0000000A E7FE B .
227 | 145 0000000C ENDP
228 | 147 0000000C MemManage_Handler
229 | PROC
230 | 148 0000000C EXPORT MemManage_Handler [WEAK
231 | ]
232 | 149 0000000C E7FE B .
233 | 150 0000000E ENDP
234 | 152 0000000E BusFault_Handler
235 | PROC
236 | 153 0000000E EXPORT BusFault_Handler [WEAK
237 | ]
238 | 154 0000000E E7FE B .
239 | 155 00000010 ENDP
240 | 157 00000010 UsageFault_Handler
241 | PROC
242 | 158 00000010 EXPORT UsageFault_Handler [WEAK
243 | ]
244 | 159 00000010 E7FE B .
245 | 160 00000012 ENDP
246 | 161 00000012 SVC_Handler
247 | PROC
248 | 162 00000012 EXPORT SVC_Handler [WEAK
249 | ]
250 | 163 00000012 E7FE B .
251 | 164 00000014 ENDP
252 | 166 00000014 DebugMon_Handler
253 | PROC
254 | 167 00000014 EXPORT DebugMon_Handler [WEAK
255 | ]
256 | 168 00000014 E7FE B .
257 | 169 00000016 ENDP
258 | 170 00000016 PendSV_Handler
259 | PROC
260 | 171 00000016 EXPORT PendSV_Handler [WEAK
261 |
262 |
263 |
264 | ARM Macro Assembler Page 5
265 |
266 |
267 | ]
268 | 172 00000016 E7FE B .
269 | 173 00000018 ENDP
270 | 174 00000018 SysTick_Handler
271 | PROC
272 | 175 00000018 EXPORT SysTick_Handler [WEAK
273 | ]
274 | 176 00000018 E7FE B .
275 | 177 0000001A ENDP
276 | 178 0000001A
277 | 179 0000001A Default_Handler
278 | PROC
279 | 180 0000001A
280 | 181 0000001A EXPORT WDT_IRQHandler [WEAK
281 | ]
282 | 182 0000001A EXPORT RTC_IRQHandler [WEAK
283 | ]
284 | 183 0000001A EXPORT TIM0_IRQHandler [WEAK
285 | ]
286 | 184 0000001A EXPORT TIM2_IRQHandler [WEAK
287 | ]
288 | 185 0000001A EXPORT MCIA_IRQHandler [WEAK
289 | ]
290 | 186 0000001A EXPORT MCIB_IRQHandler [WEAK
291 | ]
292 | 187 0000001A EXPORT UART0_IRQHandler [WEAK
293 | ]
294 | 188 0000001A EXPORT UART1_IRQHandler [WEAK
295 | ]
296 | 189 0000001A EXPORT UART2_IRQHandler [WEAK
297 | ]
298 | 190 0000001A EXPORT UART3_IRQHandler [WEAK
299 | ]
300 | 191 0000001A EXPORT UART4_IRQHandler [WEAK
301 | ]
302 | 192 0000001A EXPORT AACI_IRQHandler [WEAK
303 | ]
304 | 193 0000001A EXPORT CLCD_IRQHandler [WEAK
305 | ]
306 | 194 0000001A EXPORT ENET_IRQHandler [WEAK
307 | ]
308 | 195 0000001A EXPORT USBDC_IRQHandler [WEAK
309 | ]
310 | 196 0000001A EXPORT USBHC_IRQHandler [WEAK
311 | ]
312 | 197 0000001A EXPORT CHLCD_IRQHandler [WEAK
313 | ]
314 | 198 0000001A EXPORT FLEXRAY_IRQHandler [WEAK
315 | ]
316 | 199 0000001A EXPORT CAN_IRQHandler [WEAK
317 | ]
318 | 200 0000001A EXPORT LIN_IRQHandler [WEAK
319 | ]
320 | 201 0000001A EXPORT I2C_IRQHandler [WEAK
321 | ]
322 | 202 0000001A EXPORT CPU_CLCD_IRQHandler [WEAK
323 | ]
324 | 203 0000001A EXPORT SPI_IRQHandler [WEAK
325 | ]
326 |
327 |
328 |
329 | ARM Macro Assembler Page 6
330 |
331 |
332 | 204 0000001A
333 | 205 0000001A WDT_IRQHandler
334 | 206 0000001A RTC_IRQHandler
335 | 207 0000001A TIM0_IRQHandler
336 | 208 0000001A TIM2_IRQHandler
337 | 209 0000001A MCIA_IRQHandler
338 | 210 0000001A MCIB_IRQHandler
339 | 211 0000001A UART0_IRQHandler
340 | 212 0000001A UART1_IRQHandler
341 | 213 0000001A UART2_IRQHandler
342 | 214 0000001A UART3_IRQHandler
343 | 215 0000001A UART4_IRQHandler
344 | 216 0000001A AACI_IRQHandler
345 | 217 0000001A CLCD_IRQHandler
346 | 218 0000001A ENET_IRQHandler
347 | 219 0000001A USBDC_IRQHandler
348 | 220 0000001A USBHC_IRQHandler
349 | 221 0000001A CHLCD_IRQHandler
350 | 222 0000001A FLEXRAY_IRQHandler
351 | 223 0000001A CAN_IRQHandler
352 | 224 0000001A LIN_IRQHandler
353 | 225 0000001A I2C_IRQHandler
354 | 226 0000001A CPU_CLCD_IRQHandler
355 | 227 0000001A SPI_IRQHandler
356 | 228 0000001A E7FE B .
357 | 229 0000001C
358 | 230 0000001C ENDP
359 | 231 0000001C
360 | 232 0000001C
361 | 233 0000001C ALIGN
362 | 234 0000001C
363 | 235 0000001C
364 | 236 0000001C ; User Initial Stack & Heap
365 | 237 0000001C
366 | 238 0000001C IF :DEF:__MICROLIB
367 | 245 0000001C
368 | 246 0000001C IMPORT __use_two_region_memory
369 | 247 0000001C EXPORT __user_initial_stackheap
370 | 248 0000001C
371 | 249 0000001C __user_initial_stackheap
372 | PROC
373 | 250 0000001C 4804 LDR R0, = Heap_Mem
374 | 251 0000001E 4905 LDR R1, =(Stack_Mem + Stack_Size)
375 | 252 00000020 4A05 LDR R2, = (Heap_Mem + Heap_Size)
376 | 253 00000022 4B06 LDR R3, = Stack_Mem
377 | 254 00000024 4770 BX LR
378 | 255 00000026 ENDP
379 | 256 00000026
380 | 257 00000026 00 00 ALIGN
381 | 258 00000028
382 | 259 00000028 ENDIF
383 | 260 00000028
384 | 261 00000028
385 | 262 00000028 END
386 | 00000000
387 | 00000000
388 | 00000000
389 | 00000400
390 | 00000C00
391 |
392 |
393 |
394 | ARM Macro Assembler Page 7
395 |
396 |
397 | 00000000
398 | Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
399 | ork --depend=.\objects\startup_armcm3.d -o.\objects\startup_armcm3.o -I.\RTE\_T
400 | arget_1 -IE:\Keil\Packs\ARM\CMSIS\5.9.0\CMSIS\Core\Include -IE:\Keil\Packs\ARM\
401 | CMSIS\5.9.0\Device\ARM\ARMCM3\Include --predefine="__UVISION_VERSION SETA 537"
402 | --predefine="_RTE_ SETA 1" --predefine="ARMCM3 SETA 1" --predefine="_RTE_ SETA
403 | 1" --list=.\listings\startup_armcm3.lst RTE/Device/ARMCM3/startup_ARMCM3.s
404 |
405 |
406 |
407 | ARM Macro Assembler Page 1 Alphabetic symbol ordering
408 | Relocatable symbols
409 |
410 | STACK 00000000
411 |
412 | Symbol: STACK
413 | Definitions
414 | At line 37 in file RTE/Device/ARMCM3/startup_ARMCM3.s
415 | Uses
416 | None
417 | Comment: STACK unused
418 | Stack_Mem 00000000
419 |
420 | Symbol: Stack_Mem
421 | Definitions
422 | At line 38 in file RTE/Device/ARMCM3/startup_ARMCM3.s
423 | Uses
424 | At line 251 in file RTE/Device/ARMCM3/startup_ARMCM3.s
425 | At line 253 in file RTE/Device/ARMCM3/startup_ARMCM3.s
426 |
427 | __initial_sp 00000400
428 |
429 | Symbol: __initial_sp
430 | Definitions
431 | At line 39 in file RTE/Device/ARMCM3/startup_ARMCM3.s
432 | Uses
433 | At line 65 in file RTE/Device/ARMCM3/startup_ARMCM3.s
434 | Comment: __initial_sp used once
435 | 3 symbols
436 |
437 |
438 |
439 | ARM Macro Assembler Page 1 Alphabetic symbol ordering
440 | Relocatable symbols
441 |
442 | HEAP 00000000
443 |
444 | Symbol: HEAP
445 | Definitions
446 | At line 48 in file RTE/Device/ARMCM3/startup_ARMCM3.s
447 | Uses
448 | None
449 | Comment: HEAP unused
450 | Heap_Mem 00000000
451 |
452 | Symbol: Heap_Mem
453 | Definitions
454 | At line 50 in file RTE/Device/ARMCM3/startup_ARMCM3.s
455 | Uses
456 | At line 250 in file RTE/Device/ARMCM3/startup_ARMCM3.s
457 | At line 252 in file RTE/Device/ARMCM3/startup_ARMCM3.s
458 |
459 | __heap_base 00000000
460 |
461 | Symbol: __heap_base
462 | Definitions
463 | At line 49 in file RTE/Device/ARMCM3/startup_ARMCM3.s
464 | Uses
465 | None
466 | Comment: __heap_base unused
467 | __heap_limit 00000C00
468 |
469 | Symbol: __heap_limit
470 | Definitions
471 | At line 51 in file RTE/Device/ARMCM3/startup_ARMCM3.s
472 | Uses
473 | None
474 | Comment: __heap_limit unused
475 | 4 symbols
476 |
477 |
478 |
479 | ARM Macro Assembler Page 1 Alphabetic symbol ordering
480 | Relocatable symbols
481 |
482 | RESET 00000000
483 |
484 | Symbol: RESET
485 | Definitions
486 | At line 60 in file RTE/Device/ARMCM3/startup_ARMCM3.s
487 | Uses
488 | None
489 | Comment: RESET unused
490 | __Vectors 00000000
491 |
492 | Symbol: __Vectors
493 | Definitions
494 | At line 65 in file RTE/Device/ARMCM3/startup_ARMCM3.s
495 | Uses
496 | At line 61 in file RTE/Device/ARMCM3/startup_ARMCM3.s
497 | At line 117 in file RTE/Device/ARMCM3/startup_ARMCM3.s
498 |
499 | __Vectors_End 000000C0
500 |
501 | Symbol: __Vectors_End
502 | Definitions
503 | At line 115 in file RTE/Device/ARMCM3/startup_ARMCM3.s
504 | Uses
505 | At line 62 in file RTE/Device/ARMCM3/startup_ARMCM3.s
506 | At line 117 in file RTE/Device/ARMCM3/startup_ARMCM3.s
507 |
508 | 3 symbols
509 |
510 |
511 |
512 | ARM Macro Assembler Page 1 Alphabetic symbol ordering
513 | Relocatable symbols
514 |
515 | .text 00000000
516 |
517 | Symbol: .text
518 | Definitions
519 | At line 119 in file RTE/Device/ARMCM3/startup_ARMCM3.s
520 | Uses
521 | None
522 | Comment: .text unused
523 | AACI_IRQHandler 0000001A
524 |
525 | Symbol: AACI_IRQHandler
526 | Definitions
527 | At line 216 in file RTE/Device/ARMCM3/startup_ARMCM3.s
528 | Uses
529 | At line 93 in file RTE/Device/ARMCM3/startup_ARMCM3.s
530 | At line 192 in file RTE/Device/ARMCM3/startup_ARMCM3.s
531 |
532 | BusFault_Handler 0000000E
533 |
534 | Symbol: BusFault_Handler
535 | Definitions
536 | At line 152 in file RTE/Device/ARMCM3/startup_ARMCM3.s
537 | Uses
538 | At line 70 in file RTE/Device/ARMCM3/startup_ARMCM3.s
539 | At line 153 in file RTE/Device/ARMCM3/startup_ARMCM3.s
540 |
541 | CAN_IRQHandler 0000001A
542 |
543 | Symbol: CAN_IRQHandler
544 | Definitions
545 | At line 223 in file RTE/Device/ARMCM3/startup_ARMCM3.s
546 | Uses
547 | At line 100 in file RTE/Device/ARMCM3/startup_ARMCM3.s
548 | At line 199 in file RTE/Device/ARMCM3/startup_ARMCM3.s
549 |
550 | CHLCD_IRQHandler 0000001A
551 |
552 | Symbol: CHLCD_IRQHandler
553 | Definitions
554 | At line 221 in file RTE/Device/ARMCM3/startup_ARMCM3.s
555 | Uses
556 | At line 98 in file RTE/Device/ARMCM3/startup_ARMCM3.s
557 | At line 197 in file RTE/Device/ARMCM3/startup_ARMCM3.s
558 |
559 | CLCD_IRQHandler 0000001A
560 |
561 | Symbol: CLCD_IRQHandler
562 | Definitions
563 | At line 217 in file RTE/Device/ARMCM3/startup_ARMCM3.s
564 | Uses
565 | At line 94 in file RTE/Device/ARMCM3/startup_ARMCM3.s
566 | At line 193 in file RTE/Device/ARMCM3/startup_ARMCM3.s
567 |
568 | CPU_CLCD_IRQHandler 0000001A
569 |
570 | Symbol: CPU_CLCD_IRQHandler
571 | Definitions
572 | At line 226 in file RTE/Device/ARMCM3/startup_ARMCM3.s
573 | Uses
574 |
575 |
576 |
577 | ARM Macro Assembler Page 2 Alphabetic symbol ordering
578 | Relocatable symbols
579 |
580 | At line 111 in file RTE/Device/ARMCM3/startup_ARMCM3.s
581 | At line 202 in file RTE/Device/ARMCM3/startup_ARMCM3.s
582 |
583 | DebugMon_Handler 00000014
584 |
585 | Symbol: DebugMon_Handler
586 | Definitions
587 | At line 166 in file RTE/Device/ARMCM3/startup_ARMCM3.s
588 | Uses
589 | At line 77 in file RTE/Device/ARMCM3/startup_ARMCM3.s
590 | At line 167 in file RTE/Device/ARMCM3/startup_ARMCM3.s
591 |
592 | Default_Handler 0000001A
593 |
594 | Symbol: Default_Handler
595 | Definitions
596 | At line 179 in file RTE/Device/ARMCM3/startup_ARMCM3.s
597 | Uses
598 | None
599 | Comment: Default_Handler unused
600 | ENET_IRQHandler 0000001A
601 |
602 | Symbol: ENET_IRQHandler
603 | Definitions
604 | At line 218 in file RTE/Device/ARMCM3/startup_ARMCM3.s
605 | Uses
606 | At line 95 in file RTE/Device/ARMCM3/startup_ARMCM3.s
607 | At line 194 in file RTE/Device/ARMCM3/startup_ARMCM3.s
608 |
609 | FLEXRAY_IRQHandler 0000001A
610 |
611 | Symbol: FLEXRAY_IRQHandler
612 | Definitions
613 | At line 222 in file RTE/Device/ARMCM3/startup_ARMCM3.s
614 | Uses
615 | At line 99 in file RTE/Device/ARMCM3/startup_ARMCM3.s
616 | At line 198 in file RTE/Device/ARMCM3/startup_ARMCM3.s
617 |
618 | HardFault_Handler 0000000A
619 |
620 | Symbol: HardFault_Handler
621 | Definitions
622 | At line 142 in file RTE/Device/ARMCM3/startup_ARMCM3.s
623 | Uses
624 | At line 68 in file RTE/Device/ARMCM3/startup_ARMCM3.s
625 | At line 143 in file RTE/Device/ARMCM3/startup_ARMCM3.s
626 |
627 | I2C_IRQHandler 0000001A
628 |
629 | Symbol: I2C_IRQHandler
630 | Definitions
631 | At line 225 in file RTE/Device/ARMCM3/startup_ARMCM3.s
632 | Uses
633 | At line 102 in file RTE/Device/ARMCM3/startup_ARMCM3.s
634 | At line 201 in file RTE/Device/ARMCM3/startup_ARMCM3.s
635 |
636 | LIN_IRQHandler 0000001A
637 |
638 | Symbol: LIN_IRQHandler
639 |
640 |
641 |
642 | ARM Macro Assembler Page 3 Alphabetic symbol ordering
643 | Relocatable symbols
644 |
645 | Definitions
646 | At line 224 in file RTE/Device/ARMCM3/startup_ARMCM3.s
647 | Uses
648 | At line 101 in file RTE/Device/ARMCM3/startup_ARMCM3.s
649 | At line 200 in file RTE/Device/ARMCM3/startup_ARMCM3.s
650 |
651 | MCIA_IRQHandler 0000001A
652 |
653 | Symbol: MCIA_IRQHandler
654 | Definitions
655 | At line 209 in file RTE/Device/ARMCM3/startup_ARMCM3.s
656 | Uses
657 | At line 87 in file RTE/Device/ARMCM3/startup_ARMCM3.s
658 | At line 185 in file RTE/Device/ARMCM3/startup_ARMCM3.s
659 |
660 | MCIB_IRQHandler 0000001A
661 |
662 | Symbol: MCIB_IRQHandler
663 | Definitions
664 | At line 210 in file RTE/Device/ARMCM3/startup_ARMCM3.s
665 | Uses
666 | At line 88 in file RTE/Device/ARMCM3/startup_ARMCM3.s
667 | At line 186 in file RTE/Device/ARMCM3/startup_ARMCM3.s
668 |
669 | MemManage_Handler 0000000C
670 |
671 | Symbol: MemManage_Handler
672 | Definitions
673 | At line 147 in file RTE/Device/ARMCM3/startup_ARMCM3.s
674 | Uses
675 | At line 69 in file RTE/Device/ARMCM3/startup_ARMCM3.s
676 | At line 148 in file RTE/Device/ARMCM3/startup_ARMCM3.s
677 |
678 | NMI_Handler 00000008
679 |
680 | Symbol: NMI_Handler
681 | Definitions
682 | At line 137 in file RTE/Device/ARMCM3/startup_ARMCM3.s
683 | Uses
684 | At line 67 in file RTE/Device/ARMCM3/startup_ARMCM3.s
685 | At line 138 in file RTE/Device/ARMCM3/startup_ARMCM3.s
686 |
687 | PendSV_Handler 00000016
688 |
689 | Symbol: PendSV_Handler
690 | Definitions
691 | At line 170 in file RTE/Device/ARMCM3/startup_ARMCM3.s
692 | Uses
693 | At line 79 in file RTE/Device/ARMCM3/startup_ARMCM3.s
694 | At line 171 in file RTE/Device/ARMCM3/startup_ARMCM3.s
695 |
696 | RTC_IRQHandler 0000001A
697 |
698 | Symbol: RTC_IRQHandler
699 | Definitions
700 | At line 206 in file RTE/Device/ARMCM3/startup_ARMCM3.s
701 | Uses
702 | At line 84 in file RTE/Device/ARMCM3/startup_ARMCM3.s
703 | At line 182 in file RTE/Device/ARMCM3/startup_ARMCM3.s
704 |
705 |
706 |
707 | ARM Macro Assembler Page 4 Alphabetic symbol ordering
708 | Relocatable symbols
709 |
710 |
711 | Reset_Handler 00000000
712 |
713 | Symbol: Reset_Handler
714 | Definitions
715 | At line 124 in file RTE/Device/ARMCM3/startup_ARMCM3.s
716 | Uses
717 | At line 66 in file RTE/Device/ARMCM3/startup_ARMCM3.s
718 | At line 125 in file RTE/Device/ARMCM3/startup_ARMCM3.s
719 |
720 | SPI_IRQHandler 0000001A
721 |
722 | Symbol: SPI_IRQHandler
723 | Definitions
724 | At line 227 in file RTE/Device/ARMCM3/startup_ARMCM3.s
725 | Uses
726 | At line 114 in file RTE/Device/ARMCM3/startup_ARMCM3.s
727 | At line 203 in file RTE/Device/ARMCM3/startup_ARMCM3.s
728 |
729 | SVC_Handler 00000012
730 |
731 | Symbol: SVC_Handler
732 | Definitions
733 | At line 161 in file RTE/Device/ARMCM3/startup_ARMCM3.s
734 | Uses
735 | At line 76 in file RTE/Device/ARMCM3/startup_ARMCM3.s
736 | At line 162 in file RTE/Device/ARMCM3/startup_ARMCM3.s
737 |
738 | SysTick_Handler 00000018
739 |
740 | Symbol: SysTick_Handler
741 | Definitions
742 | At line 174 in file RTE/Device/ARMCM3/startup_ARMCM3.s
743 | Uses
744 | At line 80 in file RTE/Device/ARMCM3/startup_ARMCM3.s
745 | At line 175 in file RTE/Device/ARMCM3/startup_ARMCM3.s
746 |
747 | TIM0_IRQHandler 0000001A
748 |
749 | Symbol: TIM0_IRQHandler
750 | Definitions
751 | At line 207 in file RTE/Device/ARMCM3/startup_ARMCM3.s
752 | Uses
753 | At line 85 in file RTE/Device/ARMCM3/startup_ARMCM3.s
754 | At line 183 in file RTE/Device/ARMCM3/startup_ARMCM3.s
755 |
756 | TIM2_IRQHandler 0000001A
757 |
758 | Symbol: TIM2_IRQHandler
759 | Definitions
760 | At line 208 in file RTE/Device/ARMCM3/startup_ARMCM3.s
761 | Uses
762 | At line 86 in file RTE/Device/ARMCM3/startup_ARMCM3.s
763 | At line 184 in file RTE/Device/ARMCM3/startup_ARMCM3.s
764 |
765 | UART0_IRQHandler 0000001A
766 |
767 | Symbol: UART0_IRQHandler
768 | Definitions
769 |
770 |
771 |
772 | ARM Macro Assembler Page 5 Alphabetic symbol ordering
773 | Relocatable symbols
774 |
775 | At line 211 in file RTE/Device/ARMCM3/startup_ARMCM3.s
776 | Uses
777 | At line 89 in file RTE/Device/ARMCM3/startup_ARMCM3.s
778 | At line 187 in file RTE/Device/ARMCM3/startup_ARMCM3.s
779 |
780 | UART1_IRQHandler 0000001A
781 |
782 | Symbol: UART1_IRQHandler
783 | Definitions
784 | At line 212 in file RTE/Device/ARMCM3/startup_ARMCM3.s
785 | Uses
786 | At line 90 in file RTE/Device/ARMCM3/startup_ARMCM3.s
787 | At line 188 in file RTE/Device/ARMCM3/startup_ARMCM3.s
788 |
789 | UART2_IRQHandler 0000001A
790 |
791 | Symbol: UART2_IRQHandler
792 | Definitions
793 | At line 213 in file RTE/Device/ARMCM3/startup_ARMCM3.s
794 | Uses
795 | At line 91 in file RTE/Device/ARMCM3/startup_ARMCM3.s
796 | At line 189 in file RTE/Device/ARMCM3/startup_ARMCM3.s
797 |
798 | UART3_IRQHandler 0000001A
799 |
800 | Symbol: UART3_IRQHandler
801 | Definitions
802 | At line 214 in file RTE/Device/ARMCM3/startup_ARMCM3.s
803 | Uses
804 | At line 113 in file RTE/Device/ARMCM3/startup_ARMCM3.s
805 | At line 190 in file RTE/Device/ARMCM3/startup_ARMCM3.s
806 |
807 | UART4_IRQHandler 0000001A
808 |
809 | Symbol: UART4_IRQHandler
810 | Definitions
811 | At line 215 in file RTE/Device/ARMCM3/startup_ARMCM3.s
812 | Uses
813 | At line 92 in file RTE/Device/ARMCM3/startup_ARMCM3.s
814 | At line 191 in file RTE/Device/ARMCM3/startup_ARMCM3.s
815 |
816 | USBDC_IRQHandler 0000001A
817 |
818 | Symbol: USBDC_IRQHandler
819 | Definitions
820 | At line 219 in file RTE/Device/ARMCM3/startup_ARMCM3.s
821 | Uses
822 | At line 96 in file RTE/Device/ARMCM3/startup_ARMCM3.s
823 | At line 195 in file RTE/Device/ARMCM3/startup_ARMCM3.s
824 |
825 | USBHC_IRQHandler 0000001A
826 |
827 | Symbol: USBHC_IRQHandler
828 | Definitions
829 | At line 220 in file RTE/Device/ARMCM3/startup_ARMCM3.s
830 | Uses
831 | At line 97 in file RTE/Device/ARMCM3/startup_ARMCM3.s
832 | At line 196 in file RTE/Device/ARMCM3/startup_ARMCM3.s
833 |
834 |
835 |
836 |
837 | ARM Macro Assembler Page 6 Alphabetic symbol ordering
838 | Relocatable symbols
839 |
840 | UsageFault_Handler 00000010
841 |
842 | Symbol: UsageFault_Handler
843 | Definitions
844 | At line 157 in file RTE/Device/ARMCM3/startup_ARMCM3.s
845 | Uses
846 | At line 71 in file RTE/Device/ARMCM3/startup_ARMCM3.s
847 | At line 158 in file RTE/Device/ARMCM3/startup_ARMCM3.s
848 |
849 | WDT_IRQHandler 0000001A
850 |
851 | Symbol: WDT_IRQHandler
852 | Definitions
853 | At line 205 in file RTE/Device/ARMCM3/startup_ARMCM3.s
854 | Uses
855 | At line 83 in file RTE/Device/ARMCM3/startup_ARMCM3.s
856 | At line 181 in file RTE/Device/ARMCM3/startup_ARMCM3.s
857 |
858 | __user_initial_stackheap 0000001C
859 |
860 | Symbol: __user_initial_stackheap
861 | Definitions
862 | At line 249 in file RTE/Device/ARMCM3/startup_ARMCM3.s
863 | Uses
864 | At line 247 in file RTE/Device/ARMCM3/startup_ARMCM3.s
865 | Comment: __user_initial_stackheap used once
866 | 36 symbols
867 |
868 |
869 |
870 | ARM Macro Assembler Page 1 Alphabetic symbol ordering
871 | Absolute symbols
872 |
873 | Heap_Size 00000C00
874 |
875 | Symbol: Heap_Size
876 | Definitions
877 | At line 46 in file RTE/Device/ARMCM3/startup_ARMCM3.s
878 | Uses
879 | At line 50 in file RTE/Device/ARMCM3/startup_ARMCM3.s
880 | At line 252 in file RTE/Device/ARMCM3/startup_ARMCM3.s
881 |
882 | Stack_Size 00000400
883 |
884 | Symbol: Stack_Size
885 | Definitions
886 | At line 35 in file RTE/Device/ARMCM3/startup_ARMCM3.s
887 | Uses
888 | At line 38 in file RTE/Device/ARMCM3/startup_ARMCM3.s
889 | At line 251 in file RTE/Device/ARMCM3/startup_ARMCM3.s
890 |
891 | __Vectors_Size 000000C0
892 |
893 | Symbol: __Vectors_Size
894 | Definitions
895 | At line 117 in file RTE/Device/ARMCM3/startup_ARMCM3.s
896 | Uses
897 | At line 63 in file RTE/Device/ARMCM3/startup_ARMCM3.s
898 | Comment: __Vectors_Size used once
899 | 3 symbols
900 |
901 |
902 |
903 | ARM Macro Assembler Page 1 Alphabetic symbol ordering
904 | External symbols
905 |
906 | SystemInit 00000000
907 |
908 | Symbol: SystemInit
909 | Definitions
910 | At line 126 in file RTE/Device/ARMCM3/startup_ARMCM3.s
911 | Uses
912 | At line 128 in file RTE/Device/ARMCM3/startup_ARMCM3.s
913 | Comment: SystemInit used once
914 | __main 00000000
915 |
916 | Symbol: __main
917 | Definitions
918 | At line 127 in file RTE/Device/ARMCM3/startup_ARMCM3.s
919 | Uses
920 | At line 130 in file RTE/Device/ARMCM3/startup_ARMCM3.s
921 | Comment: __main used once
922 | __use_two_region_memory 00000000
923 |
924 | Symbol: __use_two_region_memory
925 | Definitions
926 | At line 246 in file RTE/Device/ARMCM3/startup_ARMCM3.s
927 | Uses
928 | None
929 | Comment: __use_two_region_memory unused
930 | 3 symbols
931 | 389 symbols in table
932 |
--------------------------------------------------------------------------------
/Project/Objects/.gitkeep:
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https://raw.githubusercontent.com/sevend/Learn_RTOS/ddc1c874c06620dd3a9416b14d8a81caa7824951/Project/Objects/.gitkeep
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/Project/RTE/Device/ARMCM3/startup_ARMCM3.s:
--------------------------------------------------------------------------------
1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM3.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM3 Device Series
5 | ; * @version V5.00
6 | ; * @date 02. March 2016
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;/*
27 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
28 | ;*/
29 |
30 |
31 | ; Stack Configuration
32 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
33 | ;
34 |
35 | Stack_Size EQU 0x00000400
36 |
37 | AREA STACK, NOINIT, READWRITE, ALIGN=3
38 | Stack_Mem SPACE Stack_Size
39 | __initial_sp
40 |
41 |
42 | ; Heap Configuration
43 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
44 | ;
45 |
46 | Heap_Size EQU 0x00000C00
47 |
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 |
53 |
54 | PRESERVE8
55 | THUMB
56 |
57 |
58 | ; Vector Table Mapped to Address 0 at Reset
59 |
60 | AREA RESET, DATA, READONLY
61 | EXPORT __Vectors
62 | EXPORT __Vectors_End
63 | EXPORT __Vectors_Size
64 |
65 | __Vectors DCD __initial_sp ; Top of Stack
66 | DCD Reset_Handler ; Reset Handler
67 | DCD NMI_Handler ; NMI Handler
68 | DCD HardFault_Handler ; Hard Fault Handler
69 | DCD MemManage_Handler ; MPU Fault Handler
70 | DCD BusFault_Handler ; Bus Fault Handler
71 | DCD UsageFault_Handler ; Usage Fault Handler
72 | DCD 0 ; Reserved
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD SVC_Handler ; SVCall Handler
77 | DCD DebugMon_Handler ; Debug Monitor Handler
78 | DCD 0 ; Reserved
79 | DCD PendSV_Handler ; PendSV Handler
80 | DCD SysTick_Handler ; SysTick Handler
81 |
82 | ; External Interrupts
83 | DCD WDT_IRQHandler ; 0: Watchdog Timer
84 | DCD RTC_IRQHandler ; 1: Real Time Clock
85 | DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
86 | DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
87 | DCD MCIA_IRQHandler ; 4: MCIa
88 | DCD MCIB_IRQHandler ; 5: MCIb
89 | DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
90 | DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
91 | DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
92 | DCD UART4_IRQHandler ; 9: UART4 - not connected
93 | DCD AACI_IRQHandler ; 10: AACI / AC97
94 | DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
95 | DCD ENET_IRQHandler ; 12: Ethernet
96 | DCD USBDC_IRQHandler ; 13: USB Device
97 | DCD USBHC_IRQHandler ; 14: USB Host Controller
98 | DCD CHLCD_IRQHandler ; 15: Character LCD
99 | DCD FLEXRAY_IRQHandler ; 16: Flexray
100 | DCD CAN_IRQHandler ; 17: CAN
101 | DCD LIN_IRQHandler ; 18: LIN
102 | DCD I2C_IRQHandler ; 19: I2C ADC/DAC
103 | DCD 0 ; 20: Reserved
104 | DCD 0 ; 21: Reserved
105 | DCD 0 ; 22: Reserved
106 | DCD 0 ; 23: Reserved
107 | DCD 0 ; 24: Reserved
108 | DCD 0 ; 25: Reserved
109 | DCD 0 ; 26: Reserved
110 | DCD 0 ; 27: Reserved
111 | DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
112 | DCD 0 ; 29: Reserved - CPU FPGA
113 | DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
114 | DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
115 | __Vectors_End
116 |
117 | __Vectors_Size EQU __Vectors_End - __Vectors
118 |
119 | AREA |.text|, CODE, READONLY
120 |
121 |
122 | ; Reset Handler
123 |
124 | Reset_Handler PROC
125 | EXPORT Reset_Handler [WEAK]
126 | IMPORT SystemInit
127 | IMPORT __main
128 | LDR R0, =SystemInit
129 | BLX R0
130 | LDR R0, =__main
131 | BX R0
132 | ENDP
133 |
134 |
135 | ; Dummy Exception Handlers (infinite loops which can be modified)
136 |
137 | NMI_Handler PROC
138 | EXPORT NMI_Handler [WEAK]
139 | B .
140 | ENDP
141 | HardFault_Handler\
142 | PROC
143 | EXPORT HardFault_Handler [WEAK]
144 | B .
145 | ENDP
146 | MemManage_Handler\
147 | PROC
148 | EXPORT MemManage_Handler [WEAK]
149 | B .
150 | ENDP
151 | BusFault_Handler\
152 | PROC
153 | EXPORT BusFault_Handler [WEAK]
154 | B .
155 | ENDP
156 | UsageFault_Handler\
157 | PROC
158 | EXPORT UsageFault_Handler [WEAK]
159 | B .
160 | ENDP
161 | SVC_Handler PROC
162 | EXPORT SVC_Handler [WEAK]
163 | B .
164 | ENDP
165 | DebugMon_Handler\
166 | PROC
167 | EXPORT DebugMon_Handler [WEAK]
168 | B .
169 | ENDP
170 | PendSV_Handler PROC
171 | EXPORT PendSV_Handler [WEAK]
172 | B .
173 | ENDP
174 | SysTick_Handler PROC
175 | EXPORT SysTick_Handler [WEAK]
176 | B .
177 | ENDP
178 |
179 | Default_Handler PROC
180 |
181 | EXPORT WDT_IRQHandler [WEAK]
182 | EXPORT RTC_IRQHandler [WEAK]
183 | EXPORT TIM0_IRQHandler [WEAK]
184 | EXPORT TIM2_IRQHandler [WEAK]
185 | EXPORT MCIA_IRQHandler [WEAK]
186 | EXPORT MCIB_IRQHandler [WEAK]
187 | EXPORT UART0_IRQHandler [WEAK]
188 | EXPORT UART1_IRQHandler [WEAK]
189 | EXPORT UART2_IRQHandler [WEAK]
190 | EXPORT UART3_IRQHandler [WEAK]
191 | EXPORT UART4_IRQHandler [WEAK]
192 | EXPORT AACI_IRQHandler [WEAK]
193 | EXPORT CLCD_IRQHandler [WEAK]
194 | EXPORT ENET_IRQHandler [WEAK]
195 | EXPORT USBDC_IRQHandler [WEAK]
196 | EXPORT USBHC_IRQHandler [WEAK]
197 | EXPORT CHLCD_IRQHandler [WEAK]
198 | EXPORT FLEXRAY_IRQHandler [WEAK]
199 | EXPORT CAN_IRQHandler [WEAK]
200 | EXPORT LIN_IRQHandler [WEAK]
201 | EXPORT I2C_IRQHandler [WEAK]
202 | EXPORT CPU_CLCD_IRQHandler [WEAK]
203 | EXPORT SPI_IRQHandler [WEAK]
204 |
205 | WDT_IRQHandler
206 | RTC_IRQHandler
207 | TIM0_IRQHandler
208 | TIM2_IRQHandler
209 | MCIA_IRQHandler
210 | MCIB_IRQHandler
211 | UART0_IRQHandler
212 | UART1_IRQHandler
213 | UART2_IRQHandler
214 | UART3_IRQHandler
215 | UART4_IRQHandler
216 | AACI_IRQHandler
217 | CLCD_IRQHandler
218 | ENET_IRQHandler
219 | USBDC_IRQHandler
220 | USBHC_IRQHandler
221 | CHLCD_IRQHandler
222 | FLEXRAY_IRQHandler
223 | CAN_IRQHandler
224 | LIN_IRQHandler
225 | I2C_IRQHandler
226 | CPU_CLCD_IRQHandler
227 | SPI_IRQHandler
228 | B .
229 |
230 | ENDP
231 |
232 |
233 | ALIGN
234 |
235 |
236 | ; User Initial Stack & Heap
237 |
238 | IF :DEF:__MICROLIB
239 |
240 | EXPORT __initial_sp
241 | EXPORT __heap_base
242 | EXPORT __heap_limit
243 |
244 | ELSE
245 |
246 | IMPORT __use_two_region_memory
247 | EXPORT __user_initial_stackheap
248 |
249 | __user_initial_stackheap PROC
250 | LDR R0, = Heap_Mem
251 | LDR R1, =(Stack_Mem + Stack_Size)
252 | LDR R2, = (Heap_Mem + Heap_Size)
253 | LDR R3, = Stack_Mem
254 | BX LR
255 | ENDP
256 |
257 | ALIGN
258 |
259 | ENDIF
260 |
261 |
262 | END
263 |
--------------------------------------------------------------------------------
/Project/RTE/Device/ARMCM3/startup_ARMCM3.s@1.0.1:
--------------------------------------------------------------------------------
1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM3.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM3 Device
5 | ; * @version V1.0.1
6 | ; * @date 23. July 2019
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVC Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 | ; The default macro is not used for HardFault_Handler
116 | ; because this results in a poor debug illusion.
117 | HardFault_Handler PROC
118 | EXPORT HardFault_Handler [WEAK]
119 | B .
120 | ENDP
121 |
122 | ; Macro to define default exception/interrupt handlers.
123 | ; Default handler are weak symbols with an endless loop.
124 | ; They can be overwritten by real handlers.
125 | MACRO
126 | Set_Default_Handler $Handler_Name
127 | $Handler_Name PROC
128 | EXPORT $Handler_Name [WEAK]
129 | B .
130 | ENDP
131 | MEND
132 |
133 |
134 | ; Default exception/interrupt handler
135 |
136 | Set_Default_Handler NMI_Handler
137 | Set_Default_Handler MemManage_Handler
138 | Set_Default_Handler BusFault_Handler
139 | Set_Default_Handler UsageFault_Handler
140 | Set_Default_Handler SVC_Handler
141 | Set_Default_Handler DebugMon_Handler
142 | Set_Default_Handler PendSV_Handler
143 | Set_Default_Handler SysTick_Handler
144 |
145 | Set_Default_Handler Interrupt0_Handler
146 | Set_Default_Handler Interrupt1_Handler
147 | Set_Default_Handler Interrupt2_Handler
148 | Set_Default_Handler Interrupt3_Handler
149 | Set_Default_Handler Interrupt4_Handler
150 | Set_Default_Handler Interrupt5_Handler
151 | Set_Default_Handler Interrupt6_Handler
152 | Set_Default_Handler Interrupt7_Handler
153 | Set_Default_Handler Interrupt8_Handler
154 | Set_Default_Handler Interrupt9_Handler
155 |
156 | ALIGN
157 |
158 |
159 | ; User setup Stack & Heap
160 |
161 | IF :LNOT::DEF:__MICROLIB
162 | IMPORT __use_two_region_memory
163 | ENDIF
164 |
165 | EXPORT __stack_limit
166 | EXPORT __initial_sp
167 | IF Heap_Size != 0 ; Heap is provided
168 | EXPORT __heap_base
169 | EXPORT __heap_limit
170 | ENDIF
171 |
172 | END
173 |
--------------------------------------------------------------------------------
/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
/Project/RTE/Device/ARMCM3/system_ARMCM3.c@1.0.1:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device
5 | * @version V1.0.1
6 | * @date 15. November 2019
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL (50000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (XTAL / 2U)
34 |
35 | /*----------------------------------------------------------------------------
36 | Exception / Interrupt Vector table
37 | *----------------------------------------------------------------------------*/
38 | extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
39 |
40 | /*----------------------------------------------------------------------------
41 | System Core Clock Variable
42 | *----------------------------------------------------------------------------*/
43 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
44 |
45 |
46 | /*----------------------------------------------------------------------------
47 | System Core Clock update function
48 | *----------------------------------------------------------------------------*/
49 | void SystemCoreClockUpdate (void)
50 | {
51 | SystemCoreClock = SYSTEM_CLOCK;
52 | }
53 |
54 | /*----------------------------------------------------------------------------
55 | System initialization function
56 | *----------------------------------------------------------------------------*/
57 | void SystemInit (void)
58 | {
59 |
60 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
61 | SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
62 | #endif
63 |
64 | SystemCoreClock = SYSTEM_CLOCK;
65 | }
66 |
--------------------------------------------------------------------------------
/Project/RTE/_Target_1/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | ## Learn RTOS
2 |
3 | ### 前言
4 |
5 | 如何真正掌握 RTOS?自己动手写个RTOS不就行了。
6 |
7 | 探索吧!Just for Fun.
8 |
9 | ### 第一阶段目标
10 |
11 | 对标FreeRTOS源码,参考野火的《FreeRTOS 内核实现与应用开发实战》.
12 |
13 | 写一个可以跑起来的Demo,模拟FreeRTOS。
14 |
15 | #### [1. list.c 带头双向循环链表](docs/1_list.c_带头双向循环链表.md)
16 |
17 | #### [2. task.c 任务的定义与任务切换的实现](docs/task_创建任务与任务切换的实现.md)
18 |
19 | #### [3. 临界段的保护](docs/临界保护.md)
20 |
21 | #### [4. 空闲任务与阻塞延时的实现](docs/4_空闲任务与阻塞延时的实现.md)
22 |
23 | #### [5. 支持多优先级](docs/5_支持多优先级.md)
24 |
25 | #### [6. 任务延时列表的实现](docs/6_任务延时列表的实现.md)
26 |
27 | #### [7.支持时间片](docs/7_支持时间片.md)
28 |
29 | ### 第一阶段小结
30 |
31 | 首先,整个流程是可以走通的,目的在于演化FreeRTOS的内核实现,从而能深入理解FreeRTOS的运行原理,这是其先进的地方。
32 |
33 | 但在实际操作过程中,无论是书还是视频的都存在一些缺陷,不仅如此,其学习曲线极度陡峭,要有一定的基础,对CM3 内核及厂家芯片要有一些基本的理解,在学习平滑度方面,课程处理得不太好。
34 |
35 | 这两点就已经劝退了很多人,但人之毒药我之醍醐,我就是想要深入学习RTOS,Cortex-M3内核也是经典。
36 |
37 | 全程扎实地跟下来,有一种贯通之感。
38 |
39 | 中间的重要知识点及难点,可以用Keil调试,一步步去观察,观察程序动态地执行,有利于理解其原理。
40 |
41 | 相比一些其他软件,其实Keil的编辑功能不强但弱,可它是ARM官方软件,官方自然最懂自己的内核,要用的就是Keil的调试,要善用调试。特别是在一些软硬件结合的地方,(往往会涉及汇编)有很多精妙的设计,习来如饮醇酒。
42 |
43 | **Just for Fun.**
44 |
45 | 今后若机缘和合,可以继续...
46 |
47 | **完**
48 |
49 | --
50 |
--------------------------------------------------------------------------------
/docs/1_list.c_带头双向循环链表.md:
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1 | #### 1. list.c 带头双向循环链表
2 |
3 | 链表是通过节点把离散的数据链接成一个表,通过对节点的插入和删除操作从而实现
4 | 对数据的存取。
5 |
6 | FreeRTOS 中与链表相关的操作均在 list.h和 list.c 这两个文件中实现。
7 |
8 | 学习方法:
9 |
10 | 1. 可以先从带头双向循环链表数据结去理解,相对而言比较容易理解,如果对数据结构与指针不熟悉,那要先补课;
11 |
12 | 2. 带头双向循环链表数据结构的理解要结合对链表的操作一起,两者其实是一体的,为什么是这种结构,只有对这个链表的操作,才能真正理解;
13 |
14 | 3. 善用Keil的模拟调试,可以一步步跟进观察数据结构中重要变量的数据的变化,验证理解。
15 |
16 | 数据结构是前人反复实践之后,高度精炼,高度抽象的成果,理解的过程如同逆向破解,在不知道其演化过程的情况下,要能善用工具,通过观察变量在数据结构中的变化来理解其原理,这种方法对于所有数据结构都通用。
17 |
18 | ----
19 |
20 | 附上我写的一篇关于带头双向循环链表的博客 [数据结构-带头双向循环链表](https://juejin.cn/post/7111508196136583175)
21 |
22 | --
23 |
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/docs/4_空闲任务与阻塞延时的实现.md:
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1 | **空闲任务与阻塞延时的实现**
2 |
3 | 任务体内的延时使用的是软件延时,即还是让 CPU空等来达到延时的效果。使用 RTOS 的很大优势就是榨干 CPU 的性能,永远不能让它闲着,任务如果需要延时也就不能再让 CPU 空等来实现延时的效果。RTOS 中的延时叫阻塞延时,即任务需要延时的时候,任务会放弃 CPU的使用权,CPU可以去干其它的事情,当任务延时时间到,重新获取 CPU使用权,任务继续运行,这样就充分地利用了 CPU的资源,而不是干等着。
4 | 当任务需要延时,进入阻塞状态,那 CPU又去干什么事情了?如果没有其它任务可以运行,RTOS 都会为 CPU 创建一个空闲任务,这个时候 CPU 就运行空闲任务。在FreeRTOS中,空闲任务是系统在【启动调度器】的时候创建的优先级最低的任务,空闲任务主体主要是做一些系统内存的清理工作。但是为了简单起见,我们本章实现的空闲任务只是对一个全局变量进行计数。鉴于空闲任务的这种特性,在实际应用中,当系统进入空闲任务的时候,可在空闲任务中让单片机进入休眠或者低功耗等操作。
5 |
6 | 4.1 实现空闲任务
7 |
8 | TCB_t IdleTaskTCB;
9 |
10 | 4.2 实现阻塞延时
11 |
12 | 4.2.1 vTaskDelay ()函数
13 |
14 | 阻塞延时的阻塞是指任务调用该延时函数后,任务会被剥离 CPU 使用权,然后进入阻塞状态,直到延时结束,任务重新获取 CPU 使用权才可以继续运行。在任务阻塞的这段时间,CPU可以去执行其它的任务,如果其它的任务也在延时状态,那么 CPU就将运行空闲任务。
15 |
16 | 4.2.2 vTaskSwitchContext()函数
17 |
18 | 调用 tashYIELD()会产生PendSV中断,在PendSV中断服务函数中会调用上下文切换函数 vTaskSwitchContext(),该函数的作用是寻找最高优先级的就绪任务,然后更新 pxCurrentTCB。
19 |
20 | 4.3 SysTick中断服务函数
21 |
22 | 在任务上下文切换函数 vTaskSwitchContext ()中,会判断每个任务的任务控制块中的延时成员 xTicksToDelay的值是否为 0,如果为 0就要将对应的任务就绪,如果不为 0就继续延时。如果一个任务要延时,一开始 xTicksToDelay 肯定不为 0,当 xTicksToDelay 变为0 的时候表示延时结束,那么 xTicksToDelay 是以什么周期在递减?在哪里递减?在FreeRTOS 中,这个周期由 SysTick 中断提供,操作系统里面的最小的时间单位就是SysTick 的中断周期,我们称之为一个 tick,SysTick 中断服务函数在 port.c 中实现。
23 |
24 | 4.3.1 xTaskIncrementTick()函数
25 |
26 | 更新系统时基.
27 |
28 | 4.4 SysTick初始化函数
29 |
30 | SysTick 的中断服务函数要想被顺利执行,则 SysTick 必须先初始化。
31 |
32 | - vPortSetupTimerInterrupt()函数.
33 |
34 | SysTick 初 始 化 函 数 vPortSetupTimerInterrupt() , 在xPortStartScheduler()中被调用.
35 |
36 | - 系统时钟的大小,因为目前是软件仿真,需要配置成与
37 | system_ARMCM3.c文件中的 SYSTEM_CLOCK的一样,即等于 25M。如果有具体的硬件,则配置成与硬件的系统时钟一样。
38 |
39 | - SysTick 每秒中断多少次,目前配置为 100,即每 10ms中断一次。
40 |
41 |
42 |
43 |
44 |
45 | 注意
46 |
47 | 这部分与内核相关的知识比较多,TaskDelay() 与SysTick部分,在多次模拟运行之后,再结合内核部分的知识,相互印证,这里是一个重点。
48 |
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/docs/5_支持多优先级.md:
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1 | 现在开始,任务中我们开始加入优先级的功能。在 FreeRTOS 中,数字优先级越小,逻辑优先级也越小,这与隔壁的 RT-Thread和 μC/OS 刚好相反。
2 |
3 | 就绪列表 pxReadyTasksLists[ configMAX_PRIORITIES ]是一个数组,数组里面存的是
4 | 就绪任务的 TCB(准确来说是 TCB 里面的 xStateListItem 节点),数组的下标对应任务的优先级,优先级越低对应的数组下标越小。空闲任务的优先级最低,对应的是下标为 0 的链表。
5 |
6 | 任务在创建的时候,会根据任务的优先级将任务插入到就绪列表不同的位置。相同优
7 | 先级的任务插入到就绪列表里面的同一条链表中,这就是我们下一章要讲解的支持时间片。
8 | pxCurrenTCB是一个全局的 TCB 指针,用于指向优先级最高的就绪任务的 TCB,即当
9 | 前正在运行的 TCB。那么我们要想让任务支持优先级,即只要解决在任务切换
10 | (taskYIELD)的时候,让 pxCurrenTCB 指向最高优先级的就绪任务的 TCB 就可以,pxCurrenTCB 在任务切换的时候指向最高优先级的就绪任务的 TCB 即可,那问题的关键就是:如何找到最高优先级的就绪任务的 TCB。
11 |
12 | FreeRTOS 提供了两套方法,一套是通用的,一套是根据特定的处理器优化过的,接下来我们重点讲解下这两个方法。
13 |
14 | 优化方法,用了 Cortex-M 内核的一个计算前导零的指令CLZ。
15 |
16 | 所谓前导零就是计算一个变量(Cortex-M 内核单片机的变量为 32位)从高位开始第
17 | 一次出现 1 的位的前面的零的个数。
18 |
19 | 不必再使用通用的循环查找方式。
20 |
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/docs/6_任务延时列表的实现.md:
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1 | 在本章之前,为了实现任务的阻塞延时,在任务控制块中内置了一个延时变xTicksToDelay。每当任务需要延时的时候,就初始化 xTicksToDelay 需要延时的时间,然后将任务挂起,这里的挂起只是将任务在优先级位图表 uxTopReadyPriority 中对应的位清零,并不会将任务从就绪列表中删除。当每次时基中断(SysTick 中断)来临时,就扫描就绪列表中的每个任务的 xTicksToDelay,如果 xTicksToDelay 大于 0 则递减一次,然后判断xTicksToDelay 是否为 0,如果为 0 则表示延时时间到,将该任务就绪(即将任务在优先级位图表 uxTopReadyPriority 中对应的位置位),然后进行任务切换。
2 |
3 | 这种延时的缺点是,在每个时基中断中需要对所有任务都扫描一遍,费时,优点是容易理解。之所以先这样讲解是为了慢慢地过度到 FreeRTOS 任务延时列表的讲解。
4 |
5 | **任务延时列表的工作原理**
6 |
7 | 在 FreeRTOS 中,有一个任务延时列表(实际上有两个,为了方便讲解原理,我们假装合并为一个,其实两个的作用是一样的),当任务需要延时的时候,则先将任务挂起,即先将任务从就绪列表删除,然后插入到任务延时列表,同时更新下一个任务的解锁时刻变量:xNextTaskUnblockTime 的值。
8 |
9 | xNextTaskUnblockTime 是一个在 task.c 中定义的静态变量,用于表示下一个任务的解锁时刻。xNextTaskUnblockTime 的值等于系统时基计数器的值 xTickCount 加上任务需要延时值 xTicksToDelay。当系统时基计数器 xTickCount 的值与 xNextTaskUnblockTime 相时,就表示有任务延时到期了,需要将该任务就绪。
10 |
11 | ---
12 |
13 | taskRESET_READY_PRIORITY()函数
14 |
15 | 在没有添加任务延时列表之前,与任务相关的列表只有一个,就是就绪列表,无论任务在延时还是就绪都只能通过扫描就绪列表来找到任务的 TCB,从而实现系统调度。所以在上一章“支持多优先级”中,实现 taskRESET_READY_PRIORITY()函数的时候,不用先判断当前优先级下就绪列表中的链表的节点是否为 0,而是直接把任务在优先级位图表uxTopReadyPriority 中对应的位清零。因为当前优先级下就绪列表中的链表的节点不可能为
16 | 0,目前我们还没有添加其它列表来存放任务的 TCB,只有一个就绪列表。
17 |
18 | 但是从本章开始,我们额外添加了延时列表,当任务要延时的时候,将任务从就绪列表移除,然后添加到延时列表,同时将任务在优先级位图表 uxTopReadyPriority 中对应的位清除。在清除任务在优先级位图表 uxTopReadyPriority 中对应的位的时候,与上一章不同的是需要判断就绪列表 pxReadyTasksLists[]在当前优先级下对应的链表的节点是否为 0,只有当该链表下没有任务时才真正地将任务在优先级位图表 uxTopReadyPriority 中对应的位清零。
19 |
20 | ---
21 |
22 | 注意:
23 |
24 | **这一部分的内容有点复杂,需要好好调式,观察程序运行,观察任务的状态切换,体会这种方法的精妙,高效。**
25 |
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/docs/7_支持时间片.md:
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1 | FreeRTOS 与隔壁的 RT-Thread 和 μC/OS 一样,都支持时间片的功能。所谓时间片就是同一个优先级下可以有多个任务,每个任务轮流地享有相同的 CPU 时间,享有 CPU 的
2 | 时间我们叫时间片。在 RTOS 中,最小的时间单位为一个 tick,即 SysTick 的中断周期,
3 | RT-Thread 和 μC/OS可以指定时间片的大小为多个 tick,但是 FreeRTOS不一样,时间片只能是一个 tick。与其说 FreeRTOS支持时间片,倒不如说它的时间片就是正常的任务调度。
4 |
5 | 系统在任务切换的时候总会从就绪列表中寻找优先级最高的任务来执行,寻找优先级最高的任务这个功能由 taskSELECT_HIGHEST_PRIORITY_TASK()函数来实现。
6 |
7 | 即 当xTaskIncrementTick()函数返回为真时才进行任务切换。
8 |
9 | 定义一个局部变量xSwitchRequired,用于存储xTaskIncrementTick()函数的返回值,当返回值是 pdTRUE 时,需要执行一次任务切换,默认初始化为 pdFALSE。
10 |
11 | configUSE_PREEMPTION 是在 FreeRTOSConfig.h 的一个宏,默认为 1,表示有任务就绪且就绪任务的优先级比当前优先级高时,需要执行一次任务切换,
12 | 即将 xSwitchRequired的值置为 pdTRUE。
13 |
14 | 在 xTaskIncrementTick()函数还没有修改成带返回值的时候,我们是在执行完 xTaskIncrementTick()函数的时候,不管是否有任务就绪,不管就绪的任务的优先级是否比当前任务优先级高都执行一次任务切换。如果就绪任务的优先级比当前优先级高,那么执行一次任务切换与加了代码实现的功能是一样的。
15 |
16 | 如果没有任务就绪呢?就不需要执行任务切换,这样与之前的实现方法相比就省了一次任务切换的时间。虽然说没有更高优先级的任务就绪,执行任务切换的时候还是会运行原来的任务,但这是以多花一次任务切换的时间为代价的。
17 |
18 | 这部分与时间片功能相关。当 configUSE_PREEMPTION 与configUSE_TIME_SLICING 都为真,且当前优先级下不止一个任务时就执行一次任务切换,即将 xSwitchRequired 置为 pdTRUE 即可。
19 |
20 | 在 xTaskIncrementTick()函数还没有修改成带返回值之前,这部分代码不需要也是可以实现时间片功能的,即只要在执行 完xTaskIncrementTick()函数后执行一次任务切换即可。
21 |
22 | configUSE_PREEMPTION 在FreeRTOSConfig.h 中默认定义为 1,configUSE_TIME_SLICING 如果没有定义,则会默认在 FreeRTOS.h中定义为 1。
23 | 其实 FreeRTOS 的这种时间片功能不能说是真正意义的时间片,因为它不能随意的设置时间为多少个 tick,而是默认一个 tick,然后默认在每个 tick 中断周期中进行任务切换而已。
24 |
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/docs/task_创建任务与任务切换的实现.md:
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1 | **task.c 任务的定义与任务切换的实现**
2 |
3 | 这个部分我们的**目标**要实现两个变量按照一定的频率轮流的翻转,每个变量对应一个任务。
4 |
5 | 什么是任务?
6 |
7 | 在多任务系统中,我们根据功能的不同,把整个系统分割成一个个独立的且无法返回的函数,这个函数我们称为任务。
8 |
9 | ##### 2.1 创建任务
10 |
11 | 每个任务都是独立的,互不干扰的,所以要为每个任务都分配独立的栈空间,这个栈空间通常是一个预先定义好的全局数组,也可以是动态分配的一段内存空间,但它们都存在于 RAM 中。
12 |
13 | 任务的执行是由系统调度的。系统为了顺利的调度任务,为每个任务都额外定义了一个任务控制块,这个任务控制块就相当于任务的身份证,里面存有任务的所有信息,比如任务的栈指针,任务名称,任务的形参等。有了这个任务控制块之后,以后系统对任务的全部操作都可以通过这个任务控制块来实现。
14 |
15 | 任务的栈,任务的函数实体,任务的控制块最终需要联系起来才能由系统进行统一调度。那么这个联系的工作就由任务创建函数 xTaskCreateStatic()来实现,该函数在 task.c定义。
16 |
17 | ##### 2.2 实现就绪列表
18 |
19 | 任务创建好之后,我们需要把任务添加到就绪列表里面,表示任务已经就绪,系统随时可以调度。
20 |
21 | 就绪列表实际上就是一个 List_t 类型的数组,数组的大小由决定最 大 任 务 优 先 级 的 宏 configMAX_PRIORITIES 决 定 , configMAX_PRIORITIES 在FreeRTOSConfig.h 中默认定义为 5,最大支持 256 个优先级。数组的下标对应了任务的优先级,同一优先级的任务统一插入到就绪列表的同一条链表中。
22 |
23 | 任务控制块里面有一个 xStateListItem 成员,数据类型为 ListItem_t,我们将任务插入到就绪列表里面,就是通过将任务控制块的 xStateListItem 这个节点插入到就绪列表中来实现的。如果把就绪列表比作是晾衣架,任务是衣服,那 xStateListItem 就是晾衣架上面的钩
24 | 子,每个任务都自带晾衣架钩子,就是为了把自己挂在各种不同的链表中。
25 |
26 | ##### 2.3 实现调度器
27 |
28 | 调度器是操作系统的核心,其主要功能就是实现任务的切换,即从就绪列表里面找到优先级最高的任务,然后去执行该任务。从代码上来看,调度器无非也就是由几个全局变量和一些可以实现任务切换的函数组成,全部都在 task.c文件中实现。
29 |
30 | ###### 2.3.1 启动调度器
31 |
32 | 调度器的启动由 vTaskStartScheduler()函数来完成。
33 |
34 | 调用函数 xPortStartScheduler()启动调度器。
35 |
36 | 配置 PendSV 和 SysTick 的中断优先级为最低。
37 |
38 | SysTick 和PendSV 都会涉及到系统调度,系统调度的优先级要低于系统的其它硬件中断优先级,即优先响应系统中的外部硬件中断,所以 SysTick 和 PendSV的中断优先级配置为最低。
39 |
40 | 调用函数 prvStartFirstTask()启动第一个任务,启动成功后,则不再返回。
41 |
42 | prvStartFirstTask()函数用于开始第一个任务,主要做了两个动作,一个是更新 MSP 的值,二是产生 SVC 系统调用,然后去到 SVC 的中断服务函数里面真正切换到第一个任务。
43 |
44 | vPortSVCHandler()函数
45 |
46 | SVC 中断要想被成功响应,其函数名必须与向量表注册的名称一致,在启动文件的向量表中,SVC的中断服务函数注册的名称是 SVC_Handler,所以 SVC 中断服务函数的名称我们应该写成 SVC_Handler,但是在 FreeRTOS 中,官方版本写的是 vPortSVCHandler()。
47 |
48 | vPortSVCHandler()函数开始真正启动第一个任务,不再返回
49 |
50 | 当从 SVC 中断服务退出前,通过向 r14 寄存器最后 4 位按位或上0x0D,使得硬件在退出时使用进程堆栈指针 PSP 完成出栈操作并返回后进入任务模式、返回 Thumb 状态。在 SVC 中断服务里面,使用的是 MSP 堆栈指针,是处在ARM 状态。
51 |
52 | ###### 2.3.2 任务切换
53 |
54 | 任务切换就是在就绪列表中寻找优先级最高的就绪任务,然后去执行该任务。但是目前我们还不支持优先级,仅实现两个任务轮流切换,任务切换函数 taskYIELD()。
55 |
56 | portYIELD 的实现很简单,实际就是将 PendSV 的悬起位置 1,当没有其它中断运行的时候响应 PendSV中断,去执行我们写好的 PendSV中断服务函数,在里面实现任务切换。
57 |
58 | xPortPendSVHandler()函数,**PendSV中断服务函数是真正实现任务切换的地方**。
59 |
60 | vTaskSwitchContext()函数 ,目前我们还不支持优先级,则手动切换,不是任务 1 就是任务 2。
61 |
62 | ---
63 |
64 | ##### - 注意
65 |
66 | 任务调度涉及CM内核与硬件联系紧密,不仅要有内核的知识,还要懂汇编指令,这里是一个难点。
67 |
68 | 汇编语言的颗粒度很细,从语句块上理解整体的逻辑与功能,不要陷入细节而被困住。
69 |
70 | 1. task 与 链表的结合,这一部分理解是重点;
71 |
72 | 2. TCB任务控制模块的数据结构理解也是一个;
73 |
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/docs/临界保护.md:
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1 | **临界段的保护**
2 |
3 | 临界段用一句话概括就是一段在执行的时候不能被中断的代码段。在 FreeRTOS 里面,这个临界段最常出现的就是对全局变量的操作,全局变量就好像是一个枪把子,谁都可以对他开枪,但是我开枪的时候,你就不能开枪,否则就不知道是谁命中了靶子。可能有人会说我可以在子弹上面做个标记,我说你能不能不要瞎扯淡。
4 |
5 | 那么什么情况下临界段会被打断?一个是系统调度,还有一个就是外部中断。在FreeRTOS,系统调度,最终也是产生 PendSV中断,在 PendSV Handler里面实现任务的切换,所以还是可以归结为中断。既然这样,FreeRTOS对临界段的保护最终还是回到对中断的开和关的控制。
6 |
7 | 在 FreeRTOS 中,对临界段的保护出现在两种场合,一种是在中断场合一种是在非中断场合。
8 |
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 | #include "projdefs.h"
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 |
9 | BaseType_t xPortStartScheduler( void );
10 |
11 | #endif /* PORTABLE_H */
12 |
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/freertos/include/projdefs.h:
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
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