├── README.md
├── Schematic
└── dwm.pdf
├── Code
└── gataway20181020
│ └── test_rx11
│ ├── README.TXT
│ ├── USER
│ ├── main.c
│ ├── stm32f10x.h
│ ├── JLinkSettings.ini
│ ├── RTE
│ │ ├── RTE_Components.h
│ │ ├── _TREK1000
│ │ │ └── RTE_Components.h
│ │ └── Device
│ │ │ ├── STM32F103RC
│ │ │ └── stm32f10x_conf.h
│ │ │ └── STM32F103T8
│ │ │ └── stm32f10x_conf.h
│ ├── stm32f10x_it.h
│ ├── system_stm32f10x.h
│ ├── stm32f10x_conf.h
│ ├── stm32f10x_it.c
│ └── DebugConfig
│ │ ├── TREK1000_STM32F103RC.dbgconf
│ │ ├── TREK1000_STM32F103T8.dbgconf
│ │ ├── Target_1_STM32F103RC.dbgconf
│ │ ├── Target_1_STM32F103T8.dbgconf
│ │ ├── TREK1000_STM32F103RC_1.0.0.dbgconf
│ │ └── TREK1000_STM32F103T8_1.0.0.dbgconf
│ ├── Public
│ ├── Queue.c
│ ├── Queue.h
│ ├── Library.h
│ └── Library.cpp
│ ├── keilkilll.bat
│ ├── SYSTEM
│ ├── sys
│ │ ├── sys.c
│ │ └── sys.h
│ ├── delay
│ │ ├── delay.c
│ │ └── delay.h
│ └── usart
│ │ ├── usart.c
│ │ └── usart.h
│ ├── HARDWARE
│ ├── DMA
│ │ ├── dma.c
│ │ └── dma.h
│ ├── LED
│ │ ├── led.c
│ │ └── led.h
│ ├── PORT
│ │ ├── port.c
│ │ └── port.h
│ ├── W5500
│ │ ├── W5500.c
│ │ └── w5500.h
│ ├── decadriver
│ │ ├── deca_regs.h
│ │ ├── deca_device.c
│ │ ├── deca_device_api.h
│ │ ├── deca_params_init.c
│ │ ├── deca_version.h
│ │ ├── deca_types.h
│ │ └── deca_param_types.h
│ ├── platform
│ │ ├── device_info.c
│ │ ├── deca_spi.h
│ │ ├── device_info.h
│ │ ├── stm32f10x_it.h
│ │ ├── stm32f10x_conf.h
│ │ ├── deca_mutex.c
│ │ └── deca_spi.c
│ ├── stm32flash
│ │ ├── stmflash.c
│ │ └── stmflash.h
│ ├── application
│ │ ├── instance_calib.c
│ │ └── lib.h
│ ├── SPI
│ │ ├── spi.c
│ │ └── spi.h
│ └── compiler
│ │ └── compiler.h
│ ├── USB
│ ├── src
│ │ ├── hw_config.c
│ │ ├── platform_config.h
│ │ ├── usb_pwr.h
│ │ ├── usb_it.c
│ │ ├── hw_config.h
│ │ ├── usb_istr.h
│ │ ├── usb_desc.h
│ │ ├── usb_prop.h
│ │ ├── usb_conf.h
│ │ └── usb_endp.c
│ └── lib
│ │ ├── usb_int.h
│ │ ├── usb_mem.h
│ │ ├── usb_type.h
│ │ ├── usb_sil.h
│ │ ├── usb_lib.h
│ │ ├── usb_init.h
│ │ ├── usb_def.h
│ │ ├── usb_init.c
│ │ ├── usb_mem.c
│ │ ├── usb_sil.c
│ │ └── usb_int.c
│ └── STM32F10x_FWLib
│ ├── src
│ ├── stm32f10x_flash.c
│ ├── stm32f10x_i2c.c
│ ├── stm32f10x_usart.c
│ ├── stm32f10x_crc.c
│ ├── stm32f10x_iwdg.c
│ ├── stm32f10x_dbgmcu.c
│ └── stm32f10x_wwdg.c
│ └── inc
│ ├── stm32f10x_crc.h
│ ├── stm32f10x_wwdg.h
│ ├── stm32f10x_dbgmcu.h
│ ├── stm32f10x_iwdg.h
│ ├── stm32f10x_rtc.h
│ └── stm32f10x_pwr.h
└── .gitignore
/README.md:
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1 | # UWB_V1_1
2 | UWB with dw1000 & stm32 f103
3 |
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/Schematic/dwm.pdf:
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/.gitignore:
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1 | Code/gataway20181020/test_rx11/OBJ/
2 | Code/gataway20181020/test_rx11/USER/SPI.uvoptx
3 | Code/gataway20181020/test_rx11/USER/test.map
4 | Code/gataway20181020/test_rx11/USER/startup_stm32f10x_hd.lst
5 |
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/Code/gataway20181020/test_rx11/HARDWARE/SPI/spi.c:
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1 | #include "spi.h"
2 |
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/Code/gataway20181020/test_rx11/HARDWARE/LED/led.h:
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1 | #ifndef __LED_H
2 | #define __LED_H
3 | #include "sys.h"
4 | typedef enum
5 | {
6 | LED_PC6,
7 | LED_PC7,
8 | LED_PC8,
9 | LED_PC9,
10 | LED_ALL,
11 | LEDn
12 | } led_t;
13 | void GPIO_Configuration(void);
14 | void led_off (led_t led);
15 | void led_on (led_t led);
16 |
17 |
18 | #endif
19 |
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/Code/gataway20181020/test_rx11/USER/JLinkSettings.ini:
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1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | MinNumBytesFlashDL = 0
14 | SkipProgOnCRCMatch = 1
15 | VerifyDownload = 1
16 | AllowCaching = 1
17 | EnableFlashDL = 2
18 | Override = 0
19 | Device="UNSPECIFIED"
20 | [GENERAL]
21 | WorkRAMSize = 0x00
22 | WorkRAMAddr = 0x00
23 | [SWO]
24 | SWOLogFile=""
25 | [MEM]
26 | RdOverrideOrMask = 0x00
27 | RdOverrideAndMask = 0xFFFFFFFF
28 | RdOverrideAddr = 0xFFFFFFFF
29 | WrOverrideOrMask = 0x00
30 | WrOverrideAndMask = 0xFFFFFFFF
31 | WrOverrideAddr = 0xFFFFFFFF
32 |
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/Code/gataway20181020/test_rx11/HARDWARE/platform/deca_spi.h:
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1 | /*! ----------------------------------------------------------------------------
2 | * @file deca_spi.h
3 | * @brief SPI access functions
4 | *
5 | * @attention
6 | *
7 | * Copyright 2015 (c) DecaWave Ltd, Dublin, Ireland.
8 | *
9 | * All rights reserved.
10 | *
11 | * @author DecaWave
12 | */
13 |
14 | #ifndef _DECA_SPI_H_
15 | #define _DECA_SPI_H_
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | #include "deca_types.h"
22 |
23 | #define DECA_MAX_SPI_HEADER_LENGTH (3) // max number of bytes in header (for formating & sizing)
24 |
25 | int openspi(void) ;
26 | int closespi(void) ;
27 |
28 |
29 |
30 | #endif /* _DECA_SPI_H_ */
31 |
32 |
33 |
34 |
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/Code/gataway20181020/test_rx11/USER/RTE/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'SPI'
7 | * Target: 'TREK1000'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "stm32f10x.h"
18 |
19 | #define RTE_DEVICE_STDPERIPH_DMA
20 | #define RTE_DEVICE_STDPERIPH_EXTI
21 | #define RTE_DEVICE_STDPERIPH_FLASH
22 | #define RTE_DEVICE_STDPERIPH_FRAMEWORK
23 | #define RTE_DEVICE_STDPERIPH_GPIO
24 | #define RTE_DEVICE_STDPERIPH_RCC
25 | #define RTE_DEVICE_STDPERIPH_SPI
26 | #define RTE_DEVICE_STDPERIPH_USART
27 |
28 | #endif /* RTE_COMPONENTS_H */
29 |
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/Code/gataway20181020/test_rx11/USER/RTE/_TREK1000/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'SPI'
7 | * Target: 'TREK1000'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "stm32f10x.h"
18 |
19 | #define RTE_DEVICE_STDPERIPH_DMA
20 | #define RTE_DEVICE_STDPERIPH_EXTI
21 | #define RTE_DEVICE_STDPERIPH_FLASH
22 | #define RTE_DEVICE_STDPERIPH_FRAMEWORK
23 | #define RTE_DEVICE_STDPERIPH_GPIO
24 | #define RTE_DEVICE_STDPERIPH_RCC
25 | #define RTE_DEVICE_STDPERIPH_SPI
26 | #define RTE_DEVICE_STDPERIPH_USART
27 |
28 | #endif /* RTE_COMPONENTS_H */
29 |
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/Code/gataway20181020/test_rx11/HARDWARE/application/lib.h:
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1 | /*! ----------------------------------------------------------------------------
2 | * @file lib.h
3 | * @brief DecaWave header for general purpose library functions
4 | *
5 | * @attention
6 | *
7 | * Copyright 2015 (c) DecaWave Ltd, Dublin, Ireland.
8 | *
9 | * All rights reserved.
10 | *
11 | * @author DecaWave
12 | */
13 | #ifndef _LIB_H_
14 | #define _LIB_H_
15 |
16 | #ifdef __cplusplus
17 | extern "C" {
18 | #endif
19 |
20 | // Give the rounded up result of a division between two positive integers.
21 | // param a numerator
22 | // param b denominator
23 | // return rounded up result of the division
24 | #define CEIL_DIV(a,b) (((a) + (b) - 1) / (b))
25 |
26 | #ifdef __cplusplus
27 | }
28 | #endif
29 |
30 | #endif // _LIB_H_
31 |
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/Code/gataway20181020/test_rx11/HARDWARE/platform/device_info.h:
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1 | #ifndef _DEVICE_INFO_H_
2 | #define _DEVICE_INFO_H_
3 | #include "stm32f10x.h"
4 |
5 | #define SN 0x01
6 | #define SW 0x02
7 | #define DECA 0x03
8 | #define ADMI 0x04
9 | #define PSWD 0x05
10 | #define SVIP 0x06
11 | #define SVPT 0x07
12 | typedef struct
13 | {
14 | u16 flag;
15 | u16 start_count;
16 | u16 device_switch;
17 | u16 hw_version[4];
18 | u16 sw_version[4];
19 | } System_Para_TypeDef;
20 |
21 | extern u16 FLAH_BUFF0[16];
22 | extern u8 buff_version[19];
23 | extern u8 buff_sn[41];
24 | extern u8 buff_wifipassword[10];
25 | extern System_Para_TypeDef sys_para;
26 |
27 |
28 | u8 Check_cmd(u8* RXbuff);
29 | u8 Get_UniqueID(void);
30 | void Flash_Configuration(void);
31 | u8 RouterInfo_Write_to_Flash(u8 OBJ, u8* buffer);
32 | void My_STMFLASH_Write(void);
33 | #endif
34 |
35 |
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/Code/gataway20181020/test_rx11/HARDWARE/decadriver/deca_version.h:
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1 | /*! ----------------------------------------------------------------------------
2 | * @file deca_version.h
3 | * @brief Defines the version info for the DW1000 device driver including its API
4 | *
5 | * @attention
6 | *
7 | * Copyright 2015 (c) DecaWave Ltd, Dublin, Ireland.
8 | *
9 | * All rights reserved.
10 | *
11 | */
12 |
13 | #ifndef _DECA_VERSION_H_
14 | #define _DECA_VERSION_H_
15 |
16 | //
17 | // The DW1000 device driver is separately version numbered to any version the application using it may have
18 | //
19 | // Two symbols are defined here one a hexidecimal value and string that incluides the hex bytes.
20 | // Both should be updated together in a consistent way when the software is being modified.
21 | //
22 | // The format of the hex version is 0xAABBCC and the string ends with AA.BB.CC, where...
23 | //
24 | // Quantity CC is updated for minor changes/bug fixes that should need user code changes
25 | // Quantity BB is updated for changes/bug fixes that may need user code changes
26 | // Quantity AA is updated for major changes that will need user code changes
27 | //
28 |
29 | #define DW1000_DRIVER_VERSION 0x021601
30 | #define DW1000_DEVICE_DRIVER_VER_STRING "DW1000 Device Driver Version 02.16.01"
31 |
32 | #endif
33 |
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/Code/gataway20181020/test_rx11/HARDWARE/decadriver/deca_types.h:
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1 | /*! ----------------------------------------------------------------------------
2 | * @file deca_types.h
3 | * @brief DecaWave general type definitions
4 | *
5 | * @attention
6 | *
7 | * Copyright 2015 (c) DecaWave Ltd, Dublin, Ireland.
8 | *
9 | * All rights reserved.
10 | *
11 | */
12 |
13 | #ifndef _DECA_TYPES_H_
14 | #define _DECA_TYPES_H_
15 |
16 | #ifdef __cplusplus
17 | extern "C" {
18 | #endif
19 |
20 | #include "compiler.h"
21 |
22 | #ifndef uint8
23 | #ifndef _DECA_UINT8_
24 | #define _DECA_UINT8_
25 | typedef unsigned char uint8;
26 | #endif
27 | #endif
28 |
29 | #ifndef uint16
30 | #ifndef _DECA_UINT16_
31 | #define _DECA_UINT16_
32 | typedef unsigned short uint16;
33 | #endif
34 | #endif
35 |
36 | #ifndef uint32
37 | #ifndef _DECA_UINT32_
38 | #define _DECA_UINT32_
39 | typedef unsigned long uint32;
40 | #endif
41 | #endif
42 |
43 | #ifndef int8
44 | #ifndef _DECA_INT8_
45 | #define _DECA_INT8_
46 | typedef signed char int8;
47 | #endif
48 | #endif
49 |
50 | #ifndef int16
51 | #ifndef _DECA_INT16_
52 | #define _DECA_INT16_
53 | typedef signed short int16;
54 | #endif
55 | #endif
56 |
57 | #ifndef int32
58 | #ifndef _DECA_INT32_
59 | #define _DECA_INT32_
60 | typedef signed long int32;
61 | #endif
62 | #endif
63 |
64 | typedef uint64_t uint64 ;
65 |
66 | typedef int64_t int64 ;
67 |
68 |
69 | #ifndef FALSE
70 | #define FALSE 0
71 | #endif
72 |
73 | #ifndef TRUE
74 | #define TRUE 1
75 | #endif
76 |
77 | #ifdef __cplusplus
78 | }
79 | #endif
80 |
81 | #endif /* DECA_TYPES_H_ */
82 |
83 |
84 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/HARDWARE/decadriver/deca_param_types.h:
--------------------------------------------------------------------------------
1 | /*! ----------------------------------------------------------------------------
2 | * @file deca_param_types.h
3 | * @brief DecaWave general type definitions for configuration structures
4 | *
5 | * @attention
6 | *
7 | * Copyright 2015 (c) DecaWave Ltd, Dublin, Ireland.
8 | *
9 | * All rights reserved.
10 | *
11 | */
12 | #ifndef _DECA_PARAM_TYPES_H_
13 | #define _DECA_PARAM_TYPES_H_
14 |
15 | #ifdef __cplusplus
16 | extern "C" {
17 | #endif
18 | #include "deca_types.h"
19 |
20 | #define NUM_BR 3
21 | #define NUM_PRF 2
22 | #define NUM_PACS 4
23 | #define NUM_BW 2 //2 bandwidths are supported
24 | #define NUM_SFD 2 //supported number of SFDs - standard = 0, non-standard = 1
25 | #define NUM_CH 6 //supported channels are 1, 2, 3, 4, 5, 7
26 | #define NUM_CH_SUPPORTED 8 //supported channels are '0', 1, 2, 3, 4, 5, '6', 7
27 | #define PCODES 25 //supported preamble codes
28 |
29 |
30 | typedef struct {
31 | uint32 lo32;
32 | uint16 target[NUM_PRF];
33 | } agc_cfg_struct ;
34 |
35 | extern const agc_cfg_struct agc_config ;
36 |
37 | //SFD threshold settings for 110k, 850k, 6.8Mb standard and non-standard
38 | extern const uint16 sftsh[NUM_BR][NUM_SFD];
39 |
40 | extern const uint16 dtune1[NUM_PRF];
41 |
42 | #define XMLPARAMS_VERSION (1.17f)
43 |
44 | extern const uint8 pll2_config[NUM_CH][5];
45 | extern const uint8 pll2calcfg;
46 | extern const uint8 rx_config[NUM_BW];
47 | extern const uint32 tx_config[NUM_CH];
48 | extern const uint8 dwnsSFDlen[NUM_BR]; //length of SFD for each of the bitrates
49 | extern const uint32 digital_bb_config[NUM_PRF][NUM_PACS];
50 | extern const uint8 chan_idx[NUM_CH_SUPPORTED];
51 |
52 | #define PEAK_MULTPLIER (0x60) //3 -> (0x3 * 32) & 0x00E0
53 | #define N_STD_FACTOR (13)
54 | #define LDE_PARAM1 (PEAK_MULTPLIER | N_STD_FACTOR)
55 |
56 | #define LDE_PARAM3_16 (0x1607)
57 | #define LDE_PARAM3_64 (0x0607)
58 |
59 | extern const uint16 lde_replicaCoeff[PCODES];
60 |
61 | #ifdef __cplusplus
62 | }
63 | #endif
64 |
65 | #endif
66 |
67 |
68 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_int.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_int.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Endpoint CTR (Low and High) interrupt's service routines prototypes
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_INT_H
31 | #define __USB_INT_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | /* Exported constants --------------------------------------------------------*/
36 | /* Exported macro ------------------------------------------------------------*/
37 | /* Exported functions ------------------------------------------------------- */
38 | void CTR_LP(void);
39 | void CTR_HP(void);
40 |
41 | /* External variables --------------------------------------------------------*/
42 |
43 | #endif /* __USB_INT_H */
44 |
45 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
46 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/stm32f10x_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file GPIO/IOToggle/stm32f10x_it.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief This file contains the headers of the interrupt handlers.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_IT_H
24 | #define __STM32F10x_IT_H
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "stm32f10x.h"
28 |
29 | /* Exported types ------------------------------------------------------------*/
30 | /* Exported constants --------------------------------------------------------*/
31 | /* Exported macro ------------------------------------------------------------*/
32 | /* Exported functions ------------------------------------------------------- */
33 |
34 | void NMI_Handler(void);
35 | void HardFault_Handler(void);
36 | void MemManage_Handler(void);
37 | void BusFault_Handler(void);
38 | void UsageFault_Handler(void);
39 | void SVC_Handler(void);
40 | void DebugMon_Handler(void);
41 | void PendSV_Handler(void);
42 | void SysTick_Handler(void);
43 |
44 | #endif /* __STM32F10x_IT_H */
45 |
46 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
47 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/HARDWARE/platform/stm32f10x_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h
4 | * @author MCD Application Team
5 | * @version V3.4.0
6 | * @date 10/15/2010
7 | * @brief This file contains the headers of the interrupt handlers.
8 | ******************************************************************************
9 | * @copy
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2010 STMicroelectronics
19 | */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F10x_IT_H
23 | #define __STM32F10x_IT_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Includes ------------------------------------------------------------------*/
30 | #include "stm32f10x.h"
31 |
32 | /* Exported types ------------------------------------------------------------*/
33 | /* Exported constants --------------------------------------------------------*/
34 | /* Exported macro ------------------------------------------------------------*/
35 | /* Exported functions ------------------------------------------------------- */
36 |
37 | void NMI_Handler(void);
38 | void HardFault_Handler(void);
39 | void MemManage_Handler(void);
40 | void BusFault_Handler(void);
41 | void UsageFault_Handler(void);
42 | void SVC_Handler(void);
43 | void DebugMon_Handler(void);
44 | void PendSV_Handler(void);
45 | void SysTick_Handler(void);
46 |
47 |
48 | #ifdef __cplusplus
49 | }
50 | #endif
51 |
52 | #endif /* __STM32F10x_IT_H */
53 |
54 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
55 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_mem.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_mem.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Utility prototypes functions for memory/PMA transfers
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_MEM_H
31 | #define __USB_MEM_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | /* Exported constants --------------------------------------------------------*/
36 | /* Exported macro ------------------------------------------------------------*/
37 | /* Exported functions ------------------------------------------------------- */
38 | void UserToPMABufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
39 | void PMAToUserBufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
40 |
41 | /* External variables --------------------------------------------------------*/
42 |
43 | #endif /*__USB_MEM_H*/
44 |
45 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
46 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_type.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_type.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Type definitions used by the USB Library
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_TYPE_H
31 | #define __USB_TYPE_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "usb_conf.h"
35 |
36 | /* Exported types ------------------------------------------------------------*/
37 | /* Exported constants --------------------------------------------------------*/
38 | #ifndef NULL
39 | #define NULL ((void *)0)
40 | #endif
41 |
42 | typedef enum
43 | {
44 | FALSE_usb = 0, TRUE_usb = !FALSE_usb
45 | }
46 | bool;
47 |
48 | /* Exported macro ------------------------------------------------------------*/
49 | /* Exported functions ------------------------------------------------------- */
50 | /* External variables --------------------------------------------------------*/
51 |
52 | #endif /* __USB_TYPE_H */
53 |
54 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
55 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_sil.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_sil.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Simplified Interface Layer function prototypes.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_SIL_H
31 | #define __USB_SIL_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | /* Exported constants --------------------------------------------------------*/
36 | /* Exported macro ------------------------------------------------------------*/
37 | /* Exported functions ------------------------------------------------------- */
38 |
39 | uint32_t USB_SIL_Init(void);
40 | uint32_t USB_SIL_Write(uint8_t bEpAddr, uint8_t* pBufferPointer, uint32_t wBufferSize);
41 | uint32_t USB_SIL_Read(uint8_t bEpAddr, uint8_t* pBufferPointer);
42 |
43 | /* External variables --------------------------------------------------------*/
44 |
45 | #endif /* __USB_SIL_H */
46 |
47 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
48 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_lib.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_lib.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief USB library include files
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_LIB_H
31 | #define __USB_LIB_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "hw_config.h"
35 | #include "usb_type.h"
36 | #include "usb_regs.h"
37 | #include "usb_def.h"
38 | #include "usb_core.h"
39 | #include "usb_init.h"
40 | #include "usb_sil.h"
41 | #include "usb_mem.h"
42 | #include "usb_int.h"
43 |
44 | /* Exported types ------------------------------------------------------------*/
45 | /* Exported constants --------------------------------------------------------*/
46 | /* Exported macro ------------------------------------------------------------*/
47 | /* Exported functions ------------------------------------------------------- */
48 | /* External variables --------------------------------------------------------*/
49 |
50 | #endif /* __USB_LIB_H */
51 |
52 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
53 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/system_stm32f10x.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f10x.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /** @addtogroup CMSIS
23 | * @{
24 | */
25 |
26 | /** @addtogroup stm32f10x_system
27 | * @{
28 | */
29 |
30 | /**
31 | * @brief Define to prevent recursive inclusion
32 | */
33 | #ifndef __SYSTEM_STM32F10X_H
34 | #define __SYSTEM_STM32F10X_H
35 |
36 | #ifdef __cplusplus
37 | extern "C" {
38 | #endif
39 |
40 | /** @addtogroup STM32F10x_System_Includes
41 | * @{
42 | */
43 |
44 | /**
45 | * @}
46 | */
47 |
48 |
49 | /** @addtogroup STM32F10x_System_Exported_types
50 | * @{
51 | */
52 |
53 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /** @addtogroup STM32F10x_System_Exported_Constants
60 | * @{
61 | */
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /** @addtogroup STM32F10x_System_Exported_Macros
68 | * @{
69 | */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /** @addtogroup STM32F10x_System_Exported_Functions
76 | * @{
77 | */
78 |
79 | extern void SystemInit(void);
80 | extern void SystemCoreClockUpdate(void);
81 | /**
82 | * @}
83 | */
84 |
85 | #ifdef __cplusplus
86 | }
87 | #endif
88 |
89 | #endif /*__SYSTEM_STM32F10X_H */
90 |
91 | /**
92 | * @}
93 | */
94 |
95 | /**
96 | * @}
97 | */
98 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
99 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/HARDWARE/compiler/compiler.h:
--------------------------------------------------------------------------------
1 | /*! ----------------------------------------------------------------------------
2 | * @file compiler.h
3 | * @brief
4 | *
5 | * @attention
6 | *
7 | * Copyright 2015 (c) DecaWave Ltd, Dublin, Ireland.
8 | *
9 | * All rights reserved.
10 | *
11 | * @author DecaWave
12 | */
13 |
14 | #ifndef COMPILER_H_
15 | #define COMPILER_H_
16 |
17 | //#ifdef __cplusplus
18 | //extern "C" {
19 | //#endif
20 |
21 | #include
22 | #include
23 | #include
24 | #include
25 | #include
26 | #include
27 | #include
28 | #include
29 | #include "delay.h"
30 | //#ifdef __GNUC__
31 | //#include
32 | //#include
33 | //#ifndef __cplusplus
34 | //#ifndef TRUE
35 | //#define TRUE true
36 | //#endif
37 | //#ifndef FALSE
38 | //#define FALSE false
39 | //#endif
40 | //#endif
41 | //#include
42 | //#include
43 | //#include
44 | //#define Sleep(x) usleep((x*1000))
45 | //#define __align4 __attribute__((aligned (4)))
46 | //#define __weak __attribute__((weak))
47 | //#ifndef __always_inline
48 | //#define __always_inline __attribute__((always_inline))
49 | //#endif
50 | //#endif
51 |
52 | //#ifdef __ICCARM__
53 | //#include
54 | //#define __caddr_t_required_
55 | //#define __useconds_t_required_
56 | //#define __tms_struct_required_
57 | //#define __stat_struct_required_
58 | //#define STDIN_FILENO _LLIO_STDIN
59 | //#define STDOUT_FILENO _LLIO_STDOUT
60 | //#define STDERR_FILENO _LLIO_STDERR
61 | //#define __align4 /* to be defined? */
62 | //#define __weak /* to be defined? */
63 | //#define _exit __exit
64 | //#define Sleep(x) usleep((x*1000))
65 | //#include "sleep.h"
66 | //#endif
67 |
68 | //#ifdef _MSC_VER
69 | //#include
70 | //#include
71 | //#define __align4 /* no implementation */
72 | //#define __weak /* no implementation */
73 | //#define __always_inline
74 | //#else
75 | //#define sprintf_s(x,y,...) 0 // temporary workaround
76 | //#endif
77 |
78 | //#ifndef __IO
79 | //#define __IO volatile
80 | //#endif
81 |
82 | ///* Redefine CLOCKS_PER_SEC to make it work with Sleep(1) */
83 | //#undef CLOCKS_PER_SEC
84 | //#define CLOCKS_PER_SEC 1000
85 |
86 |
87 | //#ifdef __cplusplus
88 | //}
89 | //#endif
90 |
91 | #endif /* COMPILER_H_ */
92 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/src/platform_config.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file platform_config.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 21-January-2013
7 | * @brief Evaluation board specific configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __PLATFORM_CONFIG_H
31 | #define __PLATFORM_CONFIG_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "misc.h"
35 | #include "stm32f10x_gpio.h"
36 | #include "stm32f10x_rcc.h"
37 | #include "stm32f10x_usart.h"
38 | #include "stm32f10x_exti.h"
39 | #include "stm32f10x_pwr.h"
40 |
41 | /*Unique Devices IDs register set*/
42 | #define ID1 (0x1FFFF7E8)
43 | #define ID2 (0x1FFFF7EC)
44 | #define ID3 (0x1FFFF7F0)
45 |
46 |
47 | /* Define the STM32F10x hardware depending on the used evaluation board */
48 | #define USB_DISCONNECT GPIOG
49 | #define USB_DISCONNECT_PIN GPIO_Pin_10
50 | #define RCC_APB2Periph_GPIO_DISCONNECT RCC_APB2Periph_GPIOA
51 | //#define EVAL_COM1_IRQHandler USART1_IRQHandler
52 |
53 | /* Exported macro ------------------------------------------------------------*/
54 | /* Exported functions ------------------------------------------------------- */
55 |
56 | #endif /* __PLATFORM_CONFIG_H */
57 |
58 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
59 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/STM32F10x_FWLib/inc/stm32f10x_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_crc.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_CRC_H
25 | #define __STM32F10x_CRC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup CRC
39 | * @{
40 | */
41 |
42 | /** @defgroup CRC_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup CRC_Exported_Constants
51 | * @{
52 | */
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /** @defgroup CRC_Exported_Macros
59 | * @{
60 | */
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup CRC_Exported_Functions
67 | * @{
68 | */
69 |
70 | void CRC_ResetDR(void);
71 | uint32_t CRC_CalcCRC(uint32_t Data);
72 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
73 | uint32_t CRC_GetCRC(void);
74 | void CRC_SetIDRegister(uint8_t IDValue);
75 | uint8_t CRC_GetIDRegister(void);
76 |
77 | #ifdef __cplusplus
78 | }
79 | #endif
80 |
81 | #endif /* __STM32F10x_CRC_H */
82 | /**
83 | * @}
84 | */
85 |
86 | /**
87 | * @}
88 | */
89 |
90 | /**
91 | * @}
92 | */
93 |
94 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
95 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/src/usb_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_pwr.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 21-January-2013
7 | * @brief Connection/disconnection & power management header
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_PWR_H
31 | #define __USB_PWR_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | typedef enum _RESUME_STATE
36 | {
37 | RESUME_EXTERNAL,
38 | RESUME_INTERNAL,
39 | RESUME_LATER,
40 | RESUME_WAIT,
41 | RESUME_START,
42 | RESUME_ON,
43 | RESUME_OFF,
44 | RESUME_ESOF
45 | } RESUME_STATE;
46 |
47 | typedef enum _DEVICE_STATE
48 | {
49 | UNCONNECTED,
50 | ATTACHED,
51 | POWERED,
52 | SUSPENDED,
53 | ADDRESSED,
54 | CONFIGURED
55 | } DEVICE_STATE;
56 |
57 | /* Exported constants --------------------------------------------------------*/
58 | /* Exported macro ------------------------------------------------------------*/
59 | /* Exported functions ------------------------------------------------------- */
60 | void Suspend(void);
61 | void Resume_Init(void);
62 | void Resume(RESUME_STATE eResumeSetVal);
63 | RESULT PowerOn(void);
64 | RESULT PowerOff(void);
65 |
66 | /* External variables --------------------------------------------------------*/
67 | extern __IO uint32_t bDeviceState; /* USB device status */
68 | extern __IO bool fSuspendEnabled; /* true when suspend is possible */
69 |
70 | #endif /*__USB_PWR_H*/
71 |
72 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
73 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/src/usb_it.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_it.c
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 21-January-2013
7 | * @brief Main Interrupt Service Routines.
8 | * This file provides template for all exceptions handler and peripherals
9 | * interrupt service routine.
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * © COPYRIGHT 2013 STMicroelectronics
14 | *
15 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
16 | * You may not use this file except in compliance with the License.
17 | * You may obtain a copy of the License at:
18 | *
19 | * http://www.st.com/software_license_agreement_liberty_v2
20 | *
21 | * Unless required by applicable law or agreed to in writing, software
22 | * distributed under the License is distributed on an "AS IS" BASIS,
23 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
24 | * See the License for the specific language governing permissions and
25 | * limitations under the License.
26 | *
27 | ******************************************************************************
28 | */
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "hw_config.h"
32 | #include "usb_lib.h"
33 | #include "usb_istr.h"
34 |
35 |
36 | /*******************************************************************************
37 | * Function Name : USB_IRQHandler
38 | * Description : This function handles USB Low Priority interrupts
39 | * requests.
40 | * Input : None
41 | * Output : None
42 | * Return : None
43 | *******************************************************************************/
44 | #if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS)|| defined (STM32F37X)
45 | void USB_LP_IRQHandler(void)
46 | #else
47 | void USB_LP_CAN1_RX0_IRQHandler(void)
48 | #endif
49 | {
50 | USB_Istr();
51 | }
52 |
53 | /*******************************************************************************
54 | * Function Name : USB_FS_WKUP_IRQHandler
55 | * Description : This function handles USB WakeUp interrupt request.
56 | * Input : None
57 | * Output : None
58 | * Return : None
59 | *******************************************************************************/
60 |
61 | #if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS)
62 | void USB_FS_WKUP_IRQHandler(void)
63 | #else
64 | void USBWakeUp_IRQHandler(void)
65 | #endif
66 | {
67 | EXTI_ClearITPendingBit(EXTI_Line18);
68 | }
69 |
70 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
71 |
72 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/HARDWARE/SPI/spi.h:
--------------------------------------------------------------------------------
1 | #ifndef __SPI_H
2 | #define __SPI_H
3 | #include "sys.h"
4 | int SPI_Configuration(void);
5 | void SPI_ChangeRate(uint16_t scalingfactor);
6 | void SPI_ConfigFastRate(uint16_t scalingfactor);
7 |
8 | #define SPIy_PRESCALER SPI_BaudRatePrescaler_128
9 |
10 | #define SPIy SPI2
11 | #define SPIy_GPIO GPIOB
12 | #define SPIy_CS GPIO_Pin_12
13 | #define SPIy_CS_GPIO GPIOB
14 | #define SPIy_SCK GPIO_Pin_13
15 | #define SPIy_MISO GPIO_Pin_14
16 | #define SPIy_MOSI GPIO_Pin_15
17 |
18 | #define LCD_RW GPIO_Pin_10
19 | #define LCD_RS GPIO_Pin_11
20 |
21 | #define SPIx_PRESCALER SPI_BaudRatePrescaler_8
22 |
23 | #define SPIx SPI1
24 | #define SPIx_GPIO GPIOA
25 | #define SPIx_CS GPIO_Pin_4
26 | #define SPIx_CS_GPIO GPIOA
27 | #define SPIx_SCK GPIO_Pin_5
28 | #define SPIx_MISO GPIO_Pin_6
29 | #define SPIx_MOSI GPIO_Pin_7
30 |
31 | #define DW1000_RSTn GPIO_Pin_0
32 | #define DW1000_RSTn_GPIO GPIOA
33 |
34 | #define DECARSTIRQ GPIO_Pin_0
35 | #define DECARSTIRQ_GPIO GPIOA
36 | #define DECARSTIRQ_EXTI EXTI_Line0
37 | #define DECARSTIRQ_EXTI_PORT GPIO_PortSourceGPIOA
38 | #define DECARSTIRQ_EXTI_PIN GPIO_PinSource0
39 | #define DECARSTIRQ_EXTI_IRQn EXTI0_IRQn
40 |
41 | #define DECAIRQ GPIO_Pin_5
42 | #define DECAIRQ_GPIO GPIOB
43 | #define DECAIRQ_EXTI EXTI_Line5
44 | #define DECAIRQ_EXTI_PORT GPIO_PortSourceGPIOB
45 | #define DECAIRQ_EXTI_PIN GPIO_PinSource5
46 | #define DECAIRQ_EXTI_IRQn EXTI9_5_IRQn
47 | #define DECAIRQ_EXTI_USEIRQ ENABLE
48 | #define DECAIRQ_EXTI_NOIRQ DISABLE
49 |
50 | #define port_SPIx_busy_sending() (SPI_I2S_GetFlagStatus((SPIx),(SPI_I2S_FLAG_TXE))==(RESET))
51 | #define port_SPIx_no_data() (SPI_I2S_GetFlagStatus((SPIx),(SPI_I2S_FLAG_RXNE))==(RESET))
52 | #define port_SPIx_send_data(x) SPI_I2S_SendData((SPIx),(x))
53 | #define port_SPIx_receive_data() SPI_I2S_ReceiveData(SPIx)
54 | #define port_SPIx_disable() SPI_Cmd(SPIx,DISABLE)
55 | #define port_SPIx_enable() SPI_Cmd(SPIx,ENABLE)
56 | #define port_SPIx_set_chip_select() GPIO_SetBits(SPIx_CS_GPIO,SPIx_CS)
57 | #define port_SPIx_clear_chip_select() GPIO_ResetBits(SPIx_CS_GPIO,SPIx_CS)
58 |
59 | #define port_SPIy_busy_sending() (SPI_I2S_GetFlagStatus((SPIy),(SPI_I2S_FLAG_TXE))==(RESET))
60 | #define port_SPIy_no_data() (SPI_I2S_GetFlagStatus((SPIy),(SPI_I2S_FLAG_RXNE))==(RESET))
61 | #define port_SPIy_send_data(x) SPI_I2S_SendData((SPIy),(x))
62 | #define port_SPIy_receive_data() SPI_I2S_ReceiveData(SPIy)
63 | #define port_SPIy_disable() SPI_Cmd(SPIy,DISABLE)
64 | #define port_SPIy_enable() SPI_Cmd(SPIy,ENABLE)
65 | #define port_SPIy_set_chip_select() GPIO_SetBits(SPIy_CS_GPIO,SPIy_CS)
66 | #define port_SPIy_clear_chip_select() GPIO_ResetBits(SPIy_CS_GPIO,SPIy_CS)
67 |
68 |
69 | #endif
70 |
71 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_init.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_init.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Initialization routines & global variables
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_INIT_H
31 | #define __USB_INIT_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | /* Exported constants --------------------------------------------------------*/
36 | /* Exported macro ------------------------------------------------------------*/
37 | /* Exported functions ------------------------------------------------------- */
38 | void USB_Init(void);
39 |
40 | /* External variables --------------------------------------------------------*/
41 | /* The number of current endpoint, it will be used to specify an endpoint */
42 | extern uint8_t EPindex;
43 | /* The number of current device, it is an index to the Device_Table */
44 | /*extern uint8_t Device_no; */
45 | /* Points to the DEVICE_INFO structure of current device */
46 | /* The purpose of this register is to speed up the execution */
47 | extern DEVICE_INFO* pInformation;
48 | /* Points to the DEVICE_PROP structure of current device */
49 | /* The purpose of this register is to speed up the execution */
50 | extern DEVICE_PROP* pProperty;
51 | /* Temporary save the state of Rx & Tx status. */
52 | /* Whenever the Rx or Tx state is changed, its value is saved */
53 | /* in this variable first and will be set to the EPRB or EPRA */
54 | /* at the end of interrupt process */
55 | extern USER_STANDARD_REQUESTS *pUser_Standard_Requests;
56 |
57 | extern uint16_t SaveState ;
58 | extern uint16_t wInterrupt_Mask;
59 |
60 | #endif /* __USB_INIT_H */
61 |
62 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
63 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/src/hw_config.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file hw_config.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 21-January-2013
7 | * @brief Hardware Configuration & Setup
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __HW_CONFIG_H
31 | #define __HW_CONFIG_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "platform_config.h"
35 | #include "usb_type.h"
36 |
37 | /* Exported types ------------------------------------------------------------*/
38 | /* Exported constants --------------------------------------------------------*/
39 | /* Exported macro ------------------------------------------------------------*/
40 | /* Exported define -----------------------------------------------------------*/
41 | #define MASS_MEMORY_START 0x04002000
42 | #define BULK_MAX_PACKET_SIZE 0x00000040
43 | //#define LED_ON 0xF0
44 | //#define LED_OFF 0xFF
45 |
46 | #define USART_RX_DATA_SIZE 2048
47 | /* Exported functions ------------------------------------------------------- */
48 | void Set_System(void);
49 | void Set_USBClock(void);
50 | void Enter_LowPowerMode(void);
51 | void Leave_LowPowerMode(void);
52 | void USB_Interrupts_Config(void);
53 | void USB_Cable_Config (FunctionalState NewState);
54 | void USART_Config_Default(void);
55 | bool USART_Config(void);
56 | void USB_To_USART_Send_Data(uint8_t* data_buffer, uint8_t Nb_bytes);
57 | void USART_To_USB_Send_Data(void);
58 | void Handle_USBAsynchXfer (void);
59 | void Get_SerialNum(void);
60 |
61 | void USB_Config(void);
62 |
63 | uint32_t USB_RxRead(uint8_t *buffter, uint32_t buffterSize);
64 | uint32_t USB_RxWrite(uint8_t *buffter, uint32_t writeLen);
65 | uint32_t USB_TxRead(uint8_t *buffter, uint32_t buffterSize);
66 | uint32_t USB_TxWrite(uint8_t *buffter, uint32_t writeLen);
67 |
68 |
69 | /* External variables --------------------------------------------------------*/
70 |
71 | #endif /*__HW_CONFIG_H*/
72 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
73 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/src/usb_istr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_istr.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 21-January-2013
7 | * @brief This file includes the peripherals header files in the user application.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_ISTR_H
31 | #define __USB_ISTR_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "usb_conf.h"
35 |
36 | /* Exported types ------------------------------------------------------------*/
37 | /* Exported constants --------------------------------------------------------*/
38 | /* Exported macro ------------------------------------------------------------*/
39 | /* Exported functions ------------------------------------------------------- */
40 |
41 | void USB_Istr(void);
42 |
43 | /* function prototypes Automatically built defining related macros */
44 |
45 | void EP1_IN_Callback(void);
46 | void EP2_IN_Callback(void);
47 | void EP3_IN_Callback(void);
48 | void EP4_IN_Callback(void);
49 | void EP5_IN_Callback(void);
50 | void EP6_IN_Callback(void);
51 | void EP7_IN_Callback(void);
52 |
53 | void EP1_OUT_Callback(void);
54 | void EP2_OUT_Callback(void);
55 | void EP3_OUT_Callback(void);
56 | void EP4_OUT_Callback(void);
57 | void EP5_OUT_Callback(void);
58 | void EP6_OUT_Callback(void);
59 | void EP7_OUT_Callback(void);
60 |
61 | #ifdef CTR_CALLBACK
62 | void CTR_Callback(void);
63 | #endif
64 |
65 | #ifdef DOVR_CALLBACK
66 | void DOVR_Callback(void);
67 | #endif
68 |
69 | #ifdef ERR_CALLBACK
70 | void ERR_Callback(void);
71 | #endif
72 |
73 | #ifdef WKUP_CALLBACK
74 | void WKUP_Callback(void);
75 | #endif
76 |
77 | #ifdef SUSP_CALLBACK
78 | void SUSP_Callback(void);
79 | #endif
80 |
81 | #ifdef RESET_CALLBACK
82 | void RESET_Callback(void);
83 | #endif
84 |
85 | #ifdef SOF_CALLBACK
86 | void SOF_Callback(void);
87 | #endif
88 |
89 | #ifdef ESOF_CALLBACK
90 | void ESOF_Callback(void);
91 | #endif
92 | #endif /*__USB_ISTR_H*/
93 |
94 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
95 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_def.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_def.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Definitions related to USB Core
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __USB_DEF_H
30 | #define __USB_DEF_H
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | /* Exported types ------------------------------------------------------------*/
34 | typedef enum _RECIPIENT_TYPE
35 | {
36 | DEVICE_RECIPIENT, /* Recipient device */
37 | INTERFACE_RECIPIENT, /* Recipient interface */
38 | ENDPOINT_RECIPIENT, /* Recipient endpoint */
39 | OTHER_RECIPIENT
40 | } RECIPIENT_TYPE;
41 |
42 |
43 | typedef enum _STANDARD_REQUESTS
44 | {
45 | GET_STATUS = 0,
46 | CLEAR_FEATURE,
47 | RESERVED1,
48 | SET_FEATURE,
49 | RESERVED2,
50 | SET_ADDRESS,
51 | GET_DESCRIPTOR,
52 | SET_DESCRIPTOR,
53 | GET_CONFIGURATION,
54 | SET_CONFIGURATION,
55 | GET_INTERFACE,
56 | SET_INTERFACE,
57 | TOTAL_sREQUEST, /* Total number of Standard request */
58 | SYNCH_FRAME = 12
59 | } STANDARD_REQUESTS;
60 |
61 | /* Definition of "USBwValue" */
62 | typedef enum _DESCRIPTOR_TYPE
63 | {
64 | DEVICE_DESCRIPTOR = 1,
65 | CONFIG_DESCRIPTOR,
66 | STRING_DESCRIPTOR,
67 | INTERFACE_DESCRIPTOR,
68 | ENDPOINT_DESCRIPTOR
69 | } DESCRIPTOR_TYPE;
70 |
71 | /* Feature selector of a SET_FEATURE or CLEAR_FEATURE */
72 | typedef enum _FEATURE_SELECTOR
73 | {
74 | ENDPOINT_STALL,
75 | DEVICE_REMOTE_WAKEUP
76 | } FEATURE_SELECTOR;
77 |
78 | /* Exported constants --------------------------------------------------------*/
79 | /* Definition of "USBbmRequestType" */
80 | #define REQUEST_TYPE 0x60 /* Mask to get request type */
81 | #define STANDARD_REQUEST 0x00 /* Standard request */
82 | #define CLASS_REQUEST 0x20 /* Class request */
83 | #define VENDOR_REQUEST 0x40 /* Vendor request */
84 |
85 | #define RECIPIENT 0x1F /* Mask to get recipient */
86 |
87 | /* Exported macro ------------------------------------------------------------*/
88 | /* Exported functions ------------------------------------------------------- */
89 |
90 | #endif /* __USB_DEF_H */
91 |
92 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
93 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/src/usb_desc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_desc.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 21-January-2013
7 | * @brief Descriptor Header for Virtual COM Port Device
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_DESC_H
31 | #define __USB_DESC_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | /* Exported constants --------------------------------------------------------*/
36 | /* Exported macro ------------------------------------------------------------*/
37 | /* Exported define -----------------------------------------------------------*/
38 | #define USB_DEVICE_DESCRIPTOR_TYPE 0x01
39 | #define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02
40 | #define USB_STRING_DESCRIPTOR_TYPE 0x03
41 | #define USB_INTERFACE_DESCRIPTOR_TYPE 0x04
42 | #define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05
43 |
44 | #define VIRTUAL_COM_PORT_DATA_SIZE 64
45 | #define VIRTUAL_COM_PORT_INT_SIZE 8
46 |
47 | #define VIRTUAL_COM_PORT_SIZ_DEVICE_DESC 18
48 | #define VIRTUAL_COM_PORT_SIZ_CONFIG_DESC 67
49 | #define VIRTUAL_COM_PORT_SIZ_STRING_LANGID 4
50 | #define VIRTUAL_COM_PORT_SIZ_STRING_VENDOR 24
51 | #define VIRTUAL_COM_PORT_SIZ_STRING_PRODUCT 38
52 | #define VIRTUAL_COM_PORT_SIZ_STRING_SERIAL 38
53 |
54 | #define STANDARD_ENDPOINT_DESC_SIZE 0x09
55 |
56 | /* Exported functions ------------------------------------------------------- */
57 | extern const uint8_t Virtual_Com_Port_DeviceDescriptor[VIRTUAL_COM_PORT_SIZ_DEVICE_DESC];
58 | extern const uint8_t Virtual_Com_Port_ConfigDescriptor[VIRTUAL_COM_PORT_SIZ_CONFIG_DESC];
59 |
60 | extern const uint8_t Virtual_Com_Port_StringLangID[VIRTUAL_COM_PORT_SIZ_STRING_LANGID];
61 | extern const uint8_t Virtual_Com_Port_StringVendor[VIRTUAL_COM_PORT_SIZ_STRING_VENDOR];
62 | extern const uint8_t Virtual_Com_Port_StringProduct[VIRTUAL_COM_PORT_SIZ_STRING_PRODUCT];
63 | extern uint8_t Virtual_Com_Port_StringSerial[VIRTUAL_COM_PORT_SIZ_STRING_SERIAL];
64 |
65 | #endif /* __USB_DESC_H */
66 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
67 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/stm32f10x_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file GPIO/IOToggle/stm32f10x_conf.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_CONF_H
24 | #define __STM32F10x_CONF_H
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | /* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
28 | #include "stm32f10x_adc.h"
29 | #include "stm32f10x_bkp.h"
30 | #include "stm32f10x_can.h"
31 | #include "stm32f10x_cec.h"
32 | #include "stm32f10x_crc.h"
33 | #include "stm32f10x_dac.h"
34 | #include "stm32f10x_dbgmcu.h"
35 | #include "stm32f10x_dma.h"
36 | #include "stm32f10x_exti.h"
37 | #include "stm32f10x_flash.h"
38 | #include "stm32f10x_fsmc.h"
39 | #include "stm32f10x_gpio.h"
40 | #include "stm32f10x_i2c.h"
41 | #include "stm32f10x_iwdg.h"
42 | #include "stm32f10x_pwr.h"
43 | #include "stm32f10x_rcc.h"
44 | #include "stm32f10x_rtc.h"
45 | #include "stm32f10x_sdio.h"
46 | #include "stm32f10x_spi.h"
47 | #include "stm32f10x_tim.h"
48 | #include "stm32f10x_usart.h"
49 | #include "stm32f10x_wwdg.h"
50 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
51 |
52 | /* Exported types ------------------------------------------------------------*/
53 | /* Exported constants --------------------------------------------------------*/
54 | /* Uncomment the line below to expanse the "assert_param" macro in the
55 | Standard Peripheral Library drivers code */
56 | /* #define USE_FULL_ASSERT 1 */
57 |
58 | /* Exported macro ------------------------------------------------------------*/
59 | #ifdef USE_FULL_ASSERT
60 |
61 | /**
62 | * @brief The assert_param macro is used for function's parameters check.
63 | * @param expr: If expr is false, it calls assert_failed function which reports
64 | * the name of the source file and the source line number of the call
65 | * that failed. If expr is true, it returns no value.
66 | * @retval None
67 | */
68 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
69 | /* Exported functions ------------------------------------------------------- */
70 | void assert_failed(uint8_t* file, uint32_t line);
71 | #else
72 | #define assert_param(expr) ((void)0)
73 | #endif /* USE_FULL_ASSERT */
74 |
75 | #endif /* __STM32F10x_CONF_H */
76 |
77 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
78 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/STM32F10x_FWLib/inc/stm32f10x_wwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_wwdg.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the WWDG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_WWDG_H
25 | #define __STM32F10x_WWDG_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup WWDG
39 | * @{
40 | */
41 |
42 | /** @defgroup WWDG_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup WWDG_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup WWDG_Prescaler
55 | * @{
56 | */
57 |
58 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000)
59 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080)
60 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100)
61 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180)
62 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
63 | ((PRESCALER) == WWDG_Prescaler_2) || \
64 | ((PRESCALER) == WWDG_Prescaler_4) || \
65 | ((PRESCALER) == WWDG_Prescaler_8))
66 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
67 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
68 |
69 | /**
70 | * @}
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /** @defgroup WWDG_Exported_Macros
78 | * @{
79 | */
80 | /**
81 | * @}
82 | */
83 |
84 | /** @defgroup WWDG_Exported_Functions
85 | * @{
86 | */
87 |
88 | void WWDG_DeInit(void);
89 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
90 | void WWDG_SetWindowValue(uint8_t WindowValue);
91 | void WWDG_EnableIT(void);
92 | void WWDG_SetCounter(uint8_t Counter);
93 | void WWDG_Enable(uint8_t Counter);
94 | FlagStatus WWDG_GetFlagStatus(void);
95 | void WWDG_ClearFlag(void);
96 |
97 | #ifdef __cplusplus
98 | }
99 | #endif
100 |
101 | #endif /* __STM32F10x_WWDG_H */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 | /**
108 | * @}
109 | */
110 |
111 | /**
112 | * @}
113 | */
114 |
115 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
116 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/HARDWARE/platform/stm32f10x_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h
4 | * @author MCD Application Team
5 | * @version V3.4.0
6 | * @date 10/15/2010
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @copy
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2010 STMicroelectronics
19 | */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F10x_CONF_H
23 | #define __STM32F10x_CONF_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Includes ------------------------------------------------------------------*/
30 | /* Uncomment the line below to enable peripheral header file inclusion */
31 | #include "stm32f10x_adc.h"
32 | #include "stm32f10x_bkp.h"
33 | #include "stm32f10x_can.h"
34 | #include "stm32f10x_cec.h"
35 | #include "stm32f10x_crc.h"
36 | #include "stm32f10x_dac.h"
37 | #include "stm32f10x_dbgmcu.h"
38 | #include "stm32f10x_dma.h"
39 | #include "stm32f10x_exti.h"
40 | #include "stm32f10x_flash.h"
41 | #include "stm32f10x_fsmc.h"
42 | #include "stm32f10x_gpio.h"
43 | #include "stm32f10x_i2c.h"
44 | #include "stm32f10x_iwdg.h"
45 | #include "stm32f10x_pwr.h"
46 | #include "stm32f10x_rcc.h"
47 | #include "stm32f10x_rtc.h"
48 | #include "stm32f10x_sdio.h"
49 | #include "stm32f10x_spi.h"
50 | #include "stm32f10x_tim.h"
51 | #include "stm32f10x_usart.h"
52 | #include "stm32f10x_wwdg.h"
53 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 | /* Exported constants --------------------------------------------------------*/
57 | /* Uncomment the line below to expanse the "assert_param" macro in the
58 | Standard Peripheral Library drivers code */
59 | /* #define USE_FULL_ASSERT 1 */
60 |
61 | /* Exported macro ------------------------------------------------------------*/
62 | #ifdef USE_FULL_ASSERT
63 |
64 | /**
65 | * @brief The assert_param macro is used for function's parameters check.
66 | * @param expr: If expr is false, it calls assert_failed function
67 | * which reports the name of the source file and the source
68 | * line number of the call that failed.
69 | * If expr is true, it returns no value.
70 | * @retval None
71 | */
72 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
73 | /* Exported functions ------------------------------------------------------- */
74 | void assert_failed(uint8_t* file, uint32_t line);
75 | #else
76 | #define assert_param(expr) ((void)0)
77 | #endif /* USE_FULL_ASSERT */
78 |
79 | #ifdef __cplusplus
80 | }
81 | #endif
82 |
83 | #endif /* __STM32F10x_CONF_H */
84 |
85 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
86 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_init.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_init.c
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Initialization routines & global variables
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Includes ------------------------------------------------------------------*/
30 | #include "usb_lib.h"
31 |
32 | /* Private typedef -----------------------------------------------------------*/
33 | /* Private define ------------------------------------------------------------*/
34 | /* Private macro -------------------------------------------------------------*/
35 | /* Private variables ---------------------------------------------------------*/
36 | /* The number of current endpoint, it will be used to specify an endpoint */
37 | uint8_t EPindex;
38 | /* The number of current device, it is an index to the Device_Table */
39 | /* uint8_t Device_no; */
40 | /* Points to the DEVICE_INFO structure of current device */
41 | /* The purpose of this register is to speed up the execution */
42 | DEVICE_INFO *pInformation;
43 | /* Points to the DEVICE_PROP structure of current device */
44 | /* The purpose of this register is to speed up the execution */
45 | DEVICE_PROP *pProperty;
46 | /* Temporary save the state of Rx & Tx status. */
47 | /* Whenever the Rx or Tx state is changed, its value is saved */
48 | /* in this variable first and will be set to the EPRB or EPRA */
49 | /* at the end of interrupt process */
50 | uint16_t SaveState ;
51 | uint16_t wInterrupt_Mask;
52 | DEVICE_INFO Device_Info;
53 | USER_STANDARD_REQUESTS *pUser_Standard_Requests;
54 |
55 | /* Extern variables ----------------------------------------------------------*/
56 | /* Private function prototypes -----------------------------------------------*/
57 | /* Private functions ---------------------------------------------------------*/
58 |
59 | /*******************************************************************************
60 | * Function Name : USB_Init
61 | * Description : USB system initialization
62 | * Input : None.
63 | * Output : None.
64 | * Return : None.
65 | *******************************************************************************/
66 | void USB_Init(void)
67 | {
68 | pInformation = &Device_Info;
69 | pInformation->ControlState = 2;
70 | pProperty = &Device_Property;
71 | pUser_Standard_Requests = &User_Standard_Requests;
72 | /* Initialize devices one by one */
73 | pProperty->Init();
74 | }
75 |
76 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
77 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/HARDWARE/platform/deca_mutex.c:
--------------------------------------------------------------------------------
1 | /*! ----------------------------------------------------------------------------
2 | * @file deca_mutex.c
3 | * @brief IRQ interface / mutex implementation
4 | *
5 | * @attention
6 | *
7 | * Copyright 2015 (c) DecaWave Ltd, Dublin, Ireland.
8 | *
9 | * All rights reserved.
10 | *
11 | */
12 |
13 | #include "deca_device_api.h"
14 | #include "port.h"
15 | // ---------------------------------------------------------------------------
16 | //
17 | // NB: The purpose of this file is to provide for microprocessor interrupt enable/disable, this is used for
18 | // controlling mutual exclusion from critical sections in the code where interrupts and background
19 | // processing may interact. The code using this is kept to a minimum and the disabling time is also
20 | // kept to a minimum, so blanket interrupt disable may be the easiest way to provide this. But at a
21 | // minimum those interrupts coming from the decawave device should be disabled/re-enabled by this activity.
22 | //
23 | // In porting this to a particular microprocessor, the implementer may choose to use #defines in the
24 | // deca_irq.h include file to map these calls transparently to the target system. Alternatively the
25 | // appropriate code may be embedded in the functions provided below.
26 | //
27 | // This mutex dependent on HW port.
28 | // If HW port uses EXT_IRQ line to receive ready/busy status from DW1000 then mutex should use this signal
29 | // If HW port not use EXT_IRQ line (i.e. SW polling) then no necessary for decamutex(on/off)
30 | //
31 | // For critical section use this mutex instead
32 | // __save_intstate()
33 | // __restore_intstate()
34 | // ---------------------------------------------------------------------------
35 |
36 |
37 | /*! ------------------------------------------------------------------------------------------------------------------
38 | * Function: decamutexon()
39 | *
40 | * Description: This function should disable interrupts. This is called at the start of a critical section
41 | * It returns the irq state before disable, this value is used to re-enable in decamutexoff call
42 | *
43 | * Note: The body of this function is defined in deca_mutex.c and is platform specific
44 | *
45 | * input parameters:
46 | *
47 | * output parameters
48 | *
49 | * returns the state of the DW1000 interrupt
50 | */
51 | decaIrqStatus_t decamutexon(void)
52 | {
53 | decaIrqStatus_t s = port_GetEXT_IRQStatus();
54 |
55 | if(s) {
56 | port_DisableEXT_IRQ(); //disable the external interrupt line
57 | }
58 | return s ; // return state before disable, value is used to re-enable in decamutexoff call
59 | }
60 |
61 | /*! ------------------------------------------------------------------------------------------------------------------
62 | * Function: decamutexoff()
63 | *
64 | * Description: This function should re-enable interrupts, or at least restore their state as returned(&saved) by decamutexon
65 | * This is called at the end of a critical section
66 | *
67 | * Note: The body of this function is defined in deca_mutex.c and is platform specific
68 | *
69 | * input parameters:
70 | * @param s - the state of the DW1000 interrupt as returned by decamutexon
71 | *
72 | * output parameters
73 | *
74 | * returns the state of the DW1000 interrupt
75 | */
76 | void decamutexoff(decaIrqStatus_t s) // put a function here that re-enables the interrupt at the end of the critical section
77 | {
78 | if(s) { //need to check the port state as we can't use level sensitive interrupt on the STM ARM
79 | port_EnableEXT_IRQ();
80 | }
81 | }
82 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/src/usb_prop.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_prop.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 21-January-2013
7 | * @brief All processing related to Virtual COM Port Demo (Endpoint 0)
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __usb_prop_H
31 | #define __usb_prop_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | typedef struct
36 | {
37 | uint32_t bitrate;
38 | uint8_t format;
39 | uint8_t paritytype;
40 | uint8_t datatype;
41 | }LINE_CODING;
42 |
43 | /* Exported constants --------------------------------------------------------*/
44 | /* Exported macro ------------------------------------------------------------*/
45 | /* Exported define -----------------------------------------------------------*/
46 |
47 | #define Virtual_Com_Port_GetConfiguration NOP_Process
48 | //#define Virtual_Com_Port_SetConfiguration NOP_Process
49 | #define Virtual_Com_Port_GetInterface NOP_Process
50 | #define Virtual_Com_Port_SetInterface NOP_Process
51 | #define Virtual_Com_Port_GetStatus NOP_Process
52 | #define Virtual_Com_Port_ClearFeature NOP_Process
53 | #define Virtual_Com_Port_SetEndPointFeature NOP_Process
54 | #define Virtual_Com_Port_SetDeviceFeature NOP_Process
55 | //#define Virtual_Com_Port_SetDeviceAddress NOP_Process
56 |
57 | #define SEND_ENCAPSULATED_COMMAND 0x00
58 | #define GET_ENCAPSULATED_RESPONSE 0x01
59 | #define SET_COMM_FEATURE 0x02
60 | #define GET_COMM_FEATURE 0x03
61 | #define CLEAR_COMM_FEATURE 0x04
62 | #define SET_LINE_CODING 0x20
63 | #define GET_LINE_CODING 0x21
64 | #define SET_CONTROL_LINE_STATE 0x22
65 | #define SEND_BREAK 0x23
66 |
67 | /* Exported functions ------------------------------------------------------- */
68 | void Virtual_Com_Port_init(void);
69 | void Virtual_Com_Port_Reset(void);
70 | void Virtual_Com_Port_SetConfiguration(void);
71 | void Virtual_Com_Port_SetDeviceAddress (void);
72 | void Virtual_Com_Port_Status_In (void);
73 | void Virtual_Com_Port_Status_Out (void);
74 | RESULT Virtual_Com_Port_Data_Setup(uint8_t);
75 | RESULT Virtual_Com_Port_NoData_Setup(uint8_t);
76 | RESULT Virtual_Com_Port_Get_Interface_Setting(uint8_t Interface, uint8_t AlternateSetting);
77 | uint8_t *Virtual_Com_Port_GetDeviceDescriptor(uint16_t );
78 | uint8_t *Virtual_Com_Port_GetConfigDescriptor(uint16_t);
79 | uint8_t *Virtual_Com_Port_GetStringDescriptor(uint16_t);
80 |
81 | uint8_t *Virtual_Com_Port_GetLineCoding(uint16_t Length);
82 | uint8_t *Virtual_Com_Port_SetLineCoding(uint16_t Length);
83 |
84 | #endif /* __usb_prop_H */
85 |
86 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
87 |
88 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_mem.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_mem.c
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Utility functions for memory transfers to/from PMA
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "usb_lib.h"
30 |
31 | /* Private typedef -----------------------------------------------------------*/
32 | /* Private define ------------------------------------------------------------*/
33 | /* Private macro -------------------------------------------------------------*/
34 | /* Private variables ---------------------------------------------------------*/
35 | /* Extern variables ----------------------------------------------------------*/
36 | /* Private function prototypes -----------------------------------------------*/
37 | /* Private functions ---------------------------------------------------------*/
38 |
39 | /*******************************************************************************
40 | * Function Name : UserToPMABufferCopy
41 | * Description : Copy a buffer from user memory area to packet memory area (PMA)
42 | * Input : - pbUsrBuf: pointer to user memory area.
43 | * - wPMABufAddr: address into PMA.
44 | * - wNBytes: no. of bytes to be copied.
45 | * Output : None.
46 | * Return : None .
47 | *******************************************************************************/
48 | void UserToPMABufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
49 | {
50 | uint32_t n = (wNBytes + 1) >> 1; /* n = (wNBytes + 1) / 2 */
51 | uint32_t i, temp1, temp2;
52 | uint16_t *pdwVal;
53 | pdwVal = (uint16_t *)(wPMABufAddr * 2 + PMAAddr);
54 | for (i = n; i != 0; i--)
55 | {
56 | temp1 = (uint16_t) * pbUsrBuf;
57 | pbUsrBuf++;
58 | temp2 = temp1 | (uint16_t) * pbUsrBuf << 8;
59 | *pdwVal++ = temp2;
60 | pdwVal++;
61 | pbUsrBuf++;
62 | }
63 | }
64 |
65 | /*******************************************************************************
66 | * Function Name : PMAToUserBufferCopy
67 | * Description : Copy a buffer from user memory area to packet memory area (PMA)
68 | * Input : - pbUsrBuf = pointer to user memory area.
69 | * - wPMABufAddr = address into PMA.
70 | * - wNBytes = no. of bytes to be copied.
71 | * Output : None.
72 | * Return : None.
73 | *******************************************************************************/
74 | void PMAToUserBufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
75 | {
76 | uint32_t n = (wNBytes + 1) >> 1;/* /2*/
77 | uint32_t i;
78 | uint32_t *pdwVal;
79 | pdwVal = (uint32_t *)(wPMABufAddr * 2 + PMAAddr);
80 | for (i = n; i != 0; i--)
81 | {
82 | *(uint16_t*)pbUsrBuf++ = *pdwVal++;
83 | pbUsrBuf++;
84 | }
85 | }
86 |
87 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
88 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/STM32F10x_FWLib/src/stm32f10x_crc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_crc.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the CRC firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_crc.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup CRC
30 | * @brief CRC driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup CRC_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup CRC_Private_Defines
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup CRC_Private_Macros
51 | * @{
52 | */
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /** @defgroup CRC_Private_Variables
59 | * @{
60 | */
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup CRC_Private_FunctionPrototypes
67 | * @{
68 | */
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /** @defgroup CRC_Private_Functions
75 | * @{
76 | */
77 |
78 | /**
79 | * @brief Resets the CRC Data register (DR).
80 | * @param None
81 | * @retval None
82 | */
83 | void CRC_ResetDR(void)
84 | {
85 | /* Reset CRC generator */
86 | CRC->CR = CRC_CR_RESET;
87 | }
88 |
89 | /**
90 | * @brief Computes the 32-bit CRC of a given data word(32-bit).
91 | * @param Data: data word(32-bit) to compute its CRC
92 | * @retval 32-bit CRC
93 | */
94 | uint32_t CRC_CalcCRC(uint32_t Data)
95 | {
96 | CRC->DR = Data;
97 |
98 | return (CRC->DR);
99 | }
100 |
101 | /**
102 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit).
103 | * @param pBuffer: pointer to the buffer containing the data to be computed
104 | * @param BufferLength: length of the buffer to be computed
105 | * @retval 32-bit CRC
106 | */
107 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
108 | {
109 | uint32_t index = 0;
110 |
111 | for(index = 0; index < BufferLength; index++)
112 | {
113 | CRC->DR = pBuffer[index];
114 | }
115 | return (CRC->DR);
116 | }
117 |
118 | /**
119 | * @brief Returns the current CRC value.
120 | * @param None
121 | * @retval 32-bit CRC
122 | */
123 | uint32_t CRC_GetCRC(void)
124 | {
125 | return (CRC->DR);
126 | }
127 |
128 | /**
129 | * @brief Stores a 8-bit data in the Independent Data(ID) register.
130 | * @param IDValue: 8-bit value to be stored in the ID register
131 | * @retval None
132 | */
133 | void CRC_SetIDRegister(uint8_t IDValue)
134 | {
135 | CRC->IDR = IDValue;
136 | }
137 |
138 | /**
139 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register
140 | * @param None
141 | * @retval 8-bit value of the ID register
142 | */
143 | uint8_t CRC_GetIDRegister(void)
144 | {
145 | return (CRC->IDR);
146 | }
147 |
148 | /**
149 | * @}
150 | */
151 |
152 | /**
153 | * @}
154 | */
155 |
156 | /**
157 | * @}
158 | */
159 |
160 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
161 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/STM32F10x_FWLib/inc/stm32f10x_dbgmcu.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_dbgmcu.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the DBGMCU
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_DBGMCU_H
25 | #define __STM32F10x_DBGMCU_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup DBGMCU
39 | * @{
40 | */
41 |
42 | /** @defgroup DBGMCU_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup DBGMCU_Exported_Constants
51 | * @{
52 | */
53 |
54 | #define DBGMCU_SLEEP ((uint32_t)0x00000001)
55 | #define DBGMCU_STOP ((uint32_t)0x00000002)
56 | #define DBGMCU_STANDBY ((uint32_t)0x00000004)
57 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00000100)
58 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000200)
59 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000400)
60 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000800)
61 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00001000)
62 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00002000)
63 | #define DBGMCU_CAN1_STOP ((uint32_t)0x00004000)
64 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000)
65 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000)
66 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00020000)
67 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00040000)
68 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00080000)
69 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00100000)
70 | #define DBGMCU_CAN2_STOP ((uint32_t)0x00200000)
71 | #define DBGMCU_TIM15_STOP ((uint32_t)0x00400000)
72 | #define DBGMCU_TIM16_STOP ((uint32_t)0x00800000)
73 | #define DBGMCU_TIM17_STOP ((uint32_t)0x01000000)
74 | #define DBGMCU_TIM12_STOP ((uint32_t)0x02000000)
75 | #define DBGMCU_TIM13_STOP ((uint32_t)0x04000000)
76 | #define DBGMCU_TIM14_STOP ((uint32_t)0x08000000)
77 | #define DBGMCU_TIM9_STOP ((uint32_t)0x10000000)
78 | #define DBGMCU_TIM10_STOP ((uint32_t)0x20000000)
79 | #define DBGMCU_TIM11_STOP ((uint32_t)0x40000000)
80 |
81 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00))
82 | /**
83 | * @}
84 | */
85 |
86 | /** @defgroup DBGMCU_Exported_Macros
87 | * @{
88 | */
89 |
90 | /**
91 | * @}
92 | */
93 |
94 | /** @defgroup DBGMCU_Exported_Functions
95 | * @{
96 | */
97 |
98 | uint32_t DBGMCU_GetREVID(void);
99 | uint32_t DBGMCU_GetDEVID(void);
100 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
101 |
102 | #ifdef __cplusplus
103 | }
104 | #endif
105 |
106 | #endif /* __STM32F10x_DBGMCU_H */
107 | /**
108 | * @}
109 | */
110 |
111 | /**
112 | * @}
113 | */
114 |
115 | /**
116 | * @}
117 | */
118 |
119 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
120 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/stm32f10x_it.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file GPIO/IOToggle/stm32f10x_it.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief Main Interrupt Service Routines.
8 | * This file provides template for all exceptions handler and peripherals
9 | * interrupt service routine.
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
15 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
16 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
17 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
18 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 | *
20 | * © COPYRIGHT 2011 STMicroelectronics
21 | ******************************************************************************
22 | */
23 |
24 | /* Includes ------------------------------------------------------------------*/
25 | #include "stm32f10x_it.h"
26 | #include "port.h"
27 | __IO unsigned long time32_incr;
28 |
29 | void NMI_Handler(void)
30 | {
31 | }
32 |
33 | void HardFault_Handler(void)
34 | {
35 | /* Go to infinite loop when Hard Fault exception occurs */
36 | while (1)
37 | {
38 | }
39 | }
40 |
41 | void MemManage_Handler(void)
42 | {
43 | /* Go to infinite loop when Memory Manage exception occurs */
44 | while (1)
45 | {
46 | }
47 | }
48 |
49 |
50 | void BusFault_Handler(void)
51 | {
52 | /* Go to infinite loop when Bus Fault exception occurs */
53 | while (1)
54 | {
55 | }
56 | }
57 |
58 | void UsageFault_Handler(void)
59 | {
60 | /* Go to infinite loop when Usage Fault exception occurs */
61 | while (1)
62 | {
63 | }
64 | }
65 |
66 | void SVC_Handler(void)
67 | {
68 | }
69 |
70 | void DebugMon_Handler(void)
71 | {
72 | }
73 |
74 | void PendSV_Handler(void)
75 | {
76 | }
77 |
78 | void SysTick_Handler(void)
79 | {
80 | time32_incr++;
81 | }
82 |
83 | void EXTI15_10_IRQHandler(void)
84 | {
85 | button_callback();
86 | /* Clear EXTI Line 13 Pending Bit */
87 | EXTI_ClearITPendingBit(EXTI_Line13);
88 | }
89 |
90 | /******************************************************************************/
91 | /* STM32F10x Peripherals Interrupt Handlers */
92 | /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
93 | /* available peripheral interrupt handler's name please refer to the startup */
94 | /* file (startup_stm32f10x_xx.s). */
95 | /******************************************************************************/
96 |
97 | /**
98 | * @brief This function handles PPP interrupt request.
99 | * @param None
100 | * @retval None
101 | */
102 | /*void PPP_IRQHandler(void)
103 | {
104 | }*/
105 |
106 |
107 | /**
108 | * @brief This function handles ScenSor interrupt request.
109 | * @param None
110 | * @retval None
111 | */
112 | void EXTI0_IRQHandler(void)
113 | {
114 | process_dwRSTn_irq();
115 | /* Clear EXTI Line 0 Pending Bit */
116 | EXTI_ClearITPendingBit(DECARSTIRQ_EXTI);
117 | }
118 |
119 | void EXTI3_IRQHandler(void)
120 | {
121 | process_deca_irq();
122 | /* Clear EXTI Line 3 Pending Bit */
123 | EXTI_ClearITPendingBit(EXTI_Line3);
124 | }
125 |
126 | void EXTI9_5_IRQHandler(void)
127 | {
128 | process_deca_irq();
129 | /* Clear EXTI Line 8 Pending Bit */
130 | EXTI_ClearITPendingBit(DECAIRQ_EXTI);
131 | }
132 |
133 | /******************************************************************************/
134 | /* STM32F10x Peripherals Interrupt Handlers */
135 | /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
136 | /* available peripheral interrupt handler's name please refer to the startup */
137 | /* file (startup_stm32f10x_xx.s). */
138 | /******************************************************************************/
139 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/src/usb_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_conf.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 21-January-2013
7 | * @brief Virtual COM Port Demo configuration header
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_CONF_H
31 | #define __USB_CONF_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | /* Exported constants --------------------------------------------------------*/
36 | /* Exported macro ------------------------------------------------------------*/
37 | /* Exported functions ------------------------------------------------------- */
38 | /* External variables --------------------------------------------------------*/
39 |
40 | /*-------------------------------------------------------------*/
41 | /* EP_NUM */
42 | /* defines how many endpoints are used by the device */
43 | /*-------------------------------------------------------------*/
44 |
45 | #define EP_NUM (4)
46 |
47 | /*-------------------------------------------------------------*/
48 | /* -------------- Buffer Description Table -----------------*/
49 | /*-------------------------------------------------------------*/
50 | /* buffer table base address */
51 | /* buffer table base address */
52 | #define BTABLE_ADDRESS (0x00)
53 |
54 | /* EP0 */
55 | /* rx/tx buffer base address */
56 | #define ENDP0_RXADDR (0x40)
57 | #define ENDP0_TXADDR (0x80)
58 |
59 | /* EP1 */
60 | /* tx buffer base address */
61 | #define ENDP1_TXADDR (0xC0)
62 | #define ENDP2_TXADDR (0x100)
63 | #define ENDP3_RXADDR (0x110)
64 |
65 |
66 | /*-------------------------------------------------------------*/
67 | /* ------------------- ISTR events -------------------------*/
68 | /*-------------------------------------------------------------*/
69 | /* IMR_MSK */
70 | /* mask defining which events has to be handled */
71 | /* by the device application software */
72 | #define IMR_MSK (CNTR_CTRM | CNTR_WKUPM | CNTR_SUSPM | CNTR_ERRM | CNTR_SOFM \
73 | | CNTR_ESOFM | CNTR_RESETM )
74 |
75 | /*#define CTR_CALLBACK*/
76 | /*#define DOVR_CALLBACK*/
77 | /*#define ERR_CALLBACK*/
78 | /*#define WKUP_CALLBACK*/
79 | /*#define SUSP_CALLBACK*/
80 | /*#define RESET_CALLBACK*/
81 | #define SOF_CALLBACK
82 | /*#define ESOF_CALLBACK*/
83 | /* CTR service routines */
84 | /* associated to defined endpoints */
85 | /*#define EP1_IN_Callback NOP_Process*/
86 | #define EP2_IN_Callback NOP_Process
87 | #define EP3_IN_Callback NOP_Process
88 | #define EP4_IN_Callback NOP_Process
89 | #define EP5_IN_Callback NOP_Process
90 | #define EP6_IN_Callback NOP_Process
91 | #define EP7_IN_Callback NOP_Process
92 |
93 | #define EP1_OUT_Callback NOP_Process
94 | #define EP2_OUT_Callback NOP_Process
95 | /*#define EP3_OUT_Callback NOP_Process*/
96 | #define EP4_OUT_Callback NOP_Process
97 | #define EP5_OUT_Callback NOP_Process
98 | #define EP6_OUT_Callback NOP_Process
99 | #define EP7_OUT_Callback NOP_Process
100 |
101 | #endif /* __USB_CONF_H */
102 |
103 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
104 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/STM32F10x_FWLib/inc/stm32f10x_iwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_iwdg.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the IWDG
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_IWDG_H
25 | #define __STM32F10x_IWDG_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup IWDG
39 | * @{
40 | */
41 |
42 | /** @defgroup IWDG_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup IWDG_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup IWDG_WriteAccess
55 | * @{
56 | */
57 |
58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
61 | ((ACCESS) == IWDG_WriteAccess_Disable))
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup IWDG_prescaler
67 | * @{
68 | */
69 |
70 | #define IWDG_Prescaler_4 ((uint8_t)0x00)
71 | #define IWDG_Prescaler_8 ((uint8_t)0x01)
72 | #define IWDG_Prescaler_16 ((uint8_t)0x02)
73 | #define IWDG_Prescaler_32 ((uint8_t)0x03)
74 | #define IWDG_Prescaler_64 ((uint8_t)0x04)
75 | #define IWDG_Prescaler_128 ((uint8_t)0x05)
76 | #define IWDG_Prescaler_256 ((uint8_t)0x06)
77 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
78 | ((PRESCALER) == IWDG_Prescaler_8) || \
79 | ((PRESCALER) == IWDG_Prescaler_16) || \
80 | ((PRESCALER) == IWDG_Prescaler_32) || \
81 | ((PRESCALER) == IWDG_Prescaler_64) || \
82 | ((PRESCALER) == IWDG_Prescaler_128)|| \
83 | ((PRESCALER) == IWDG_Prescaler_256))
84 | /**
85 | * @}
86 | */
87 |
88 | /** @defgroup IWDG_Flag
89 | * @{
90 | */
91 |
92 | #define IWDG_FLAG_PVU ((uint16_t)0x0001)
93 | #define IWDG_FLAG_RVU ((uint16_t)0x0002)
94 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
95 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
96 | /**
97 | * @}
98 | */
99 |
100 | /**
101 | * @}
102 | */
103 |
104 | /** @defgroup IWDG_Exported_Macros
105 | * @{
106 | */
107 |
108 | /**
109 | * @}
110 | */
111 |
112 | /** @defgroup IWDG_Exported_Functions
113 | * @{
114 | */
115 |
116 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
117 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
118 | void IWDG_SetReload(uint16_t Reload);
119 | void IWDG_ReloadCounter(void);
120 | void IWDG_Enable(void);
121 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
122 |
123 | #ifdef __cplusplus
124 | }
125 | #endif
126 |
127 | #endif /* __STM32F10x_IWDG_H */
128 | /**
129 | * @}
130 | */
131 |
132 | /**
133 | * @}
134 | */
135 |
136 | /**
137 | * @}
138 | */
139 |
140 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
141 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/STM32F10x_FWLib/inc/stm32f10x_rtc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_rtc.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the RTC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_RTC_H
25 | #define __STM32F10x_RTC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup RTC
39 | * @{
40 | */
41 |
42 | /** @defgroup RTC_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup RTC_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup RTC_interrupts_define
55 | * @{
56 | */
57 |
58 | #define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */
59 | #define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */
60 | #define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */
61 | #define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00))
62 | #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \
63 | ((IT) == RTC_IT_SEC))
64 | /**
65 | * @}
66 | */
67 |
68 | /** @defgroup RTC_interrupts_flags
69 | * @{
70 | */
71 |
72 | #define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */
73 | #define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */
74 | #define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */
75 | #define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */
76 | #define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */
77 | #define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00))
78 | #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \
79 | ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \
80 | ((FLAG) == RTC_FLAG_SEC))
81 | #define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF)
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /** @defgroup RTC_Exported_Macros
92 | * @{
93 | */
94 |
95 | /**
96 | * @}
97 | */
98 |
99 | /** @defgroup RTC_Exported_Functions
100 | * @{
101 | */
102 |
103 | void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState);
104 | void RTC_EnterConfigMode(void);
105 | void RTC_ExitConfigMode(void);
106 | uint32_t RTC_GetCounter(void);
107 | void RTC_SetCounter(uint32_t CounterValue);
108 | void RTC_SetPrescaler(uint32_t PrescalerValue);
109 | void RTC_SetAlarm(uint32_t AlarmValue);
110 | uint32_t RTC_GetDivider(void);
111 | void RTC_WaitForLastTask(void);
112 | void RTC_WaitForSynchro(void);
113 | FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG);
114 | void RTC_ClearFlag(uint16_t RTC_FLAG);
115 | ITStatus RTC_GetITStatus(uint16_t RTC_IT);
116 | void RTC_ClearITPendingBit(uint16_t RTC_IT);
117 |
118 | #ifdef __cplusplus
119 | }
120 | #endif
121 |
122 | #endif /* __STM32F10x_RTC_H */
123 | /**
124 | * @}
125 | */
126 |
127 | /**
128 | * @}
129 | */
130 |
131 | /**
132 | * @}
133 | */
134 |
135 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
136 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/RTE/Device/STM32F103RC/stm32f10x_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_CONF_H
24 | #define __STM32F10x_CONF_H
25 |
26 | /* Run Time Environment will set specific #define for each selected module below */
27 | #include "RTE_Components.h"
28 |
29 | #ifdef RTE_DEVICE_STDPERIPH_ADC
30 | #include "stm32f10x_adc.h"
31 | #endif
32 | #ifdef RTE_DEVICE_STDPERIPH_BKP
33 | #include "stm32f10x_bkp.h"
34 | #endif
35 | #ifdef RTE_DEVICE_STDPERIPH_CAN
36 | #include "stm32f10x_can.h"
37 | #endif
38 | #ifdef RTE_DEVICE_STDPERIPH_CEC
39 | #include "stm32f10x_cec.h"
40 | #endif
41 | #ifdef RTE_DEVICE_STDPERIPH_CRC
42 | #include "stm32f10x_crc.h"
43 | #endif
44 | #ifdef RTE_DEVICE_STDPERIPH_DAC
45 | #include "stm32f10x_dac.h"
46 | #endif
47 | #ifdef RTE_DEVICE_STDPERIPH_DBGMCU
48 | #include "stm32f10x_dbgmcu.h"
49 | #endif
50 | #ifdef RTE_DEVICE_STDPERIPH_DMA
51 | #include "stm32f10x_dma.h"
52 | #endif
53 | #ifdef RTE_DEVICE_STDPERIPH_EXTI
54 | #include "stm32f10x_exti.h"
55 | #endif
56 | #ifdef RTE_DEVICE_STDPERIPH_FLASH
57 | #include "stm32f10x_flash.h"
58 | #endif
59 | #ifdef RTE_DEVICE_STDPERIPH_FSMC
60 | #include "stm32f10x_fsmc.h"
61 | #endif
62 | #ifdef RTE_DEVICE_STDPERIPH_GPIO
63 | #include "stm32f10x_gpio.h"
64 | #endif
65 | #ifdef RTE_DEVICE_STDPERIPH_I2C
66 | #include "stm32f10x_i2c.h"
67 | #endif
68 | #ifdef RTE_DEVICE_STDPERIPH_IWDG
69 | #include "stm32f10x_iwdg.h"
70 | #endif
71 | #ifdef RTE_DEVICE_STDPERIPH_PWR
72 | #include "stm32f10x_pwr.h"
73 | #endif
74 | #ifdef RTE_DEVICE_STDPERIPH_RCC
75 | #include "stm32f10x_rcc.h"
76 | #endif
77 | #ifdef RTE_DEVICE_STDPERIPH_RTC
78 | #include "stm32f10x_rtc.h"
79 | #endif
80 | #ifdef RTE_DEVICE_STDPERIPH_SDIO
81 | #include "stm32f10x_sdio.h"
82 | #endif
83 | #ifdef RTE_DEVICE_STDPERIPH_SPI
84 | #include "stm32f10x_spi.h"
85 | #endif
86 | #ifdef RTE_DEVICE_STDPERIPH_TIM
87 | #include "stm32f10x_tim.h"
88 | #endif
89 | #ifdef RTE_DEVICE_STDPERIPH_USART
90 | #include "stm32f10x_usart.h"
91 | #endif
92 | #ifdef RTE_DEVICE_STDPERIPH_WWDG
93 | #include "stm32f10x_wwdg.h"
94 | #endif
95 | #ifdef RTE_DEVICE_STDPERIPH_FRAMEWORK
96 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
97 | #endif
98 |
99 | /* Exported types ------------------------------------------------------------*/
100 | /* Exported constants --------------------------------------------------------*/
101 | /* Uncomment the line below to expanse the "assert_param" macro in the
102 | Standard Peripheral Library drivers code */
103 | /* #define USE_FULL_ASSERT 1 */
104 |
105 | /* Exported macro ------------------------------------------------------------*/
106 | #ifdef USE_FULL_ASSERT
107 |
108 | /**
109 | * @brief The assert_param macro is used for function's parameters check.
110 | * @param expr: If expr is false, it calls assert_failed function which reports
111 | * the name of the source file and the source line number of the call
112 | * that failed. If expr is true, it returns no value.
113 | * @retval None
114 | */
115 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
116 | /* Exported functions ------------------------------------------------------- */
117 | void assert_failed(uint8_t* file, uint32_t line);
118 | #else
119 | #define assert_param(expr) ((void)0)
120 | #endif /* USE_FULL_ASSERT */
121 |
122 | #endif /* __STM32F10x_CONF_H */
123 |
124 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
125 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/RTE/Device/STM32F103T8/stm32f10x_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_CONF_H
24 | #define __STM32F10x_CONF_H
25 |
26 | /* Run Time Environment will set specific #define for each selected module below */
27 | #include "RTE_Components.h"
28 |
29 | #ifdef RTE_DEVICE_STDPERIPH_ADC
30 | #include "stm32f10x_adc.h"
31 | #endif
32 | #ifdef RTE_DEVICE_STDPERIPH_BKP
33 | #include "stm32f10x_bkp.h"
34 | #endif
35 | #ifdef RTE_DEVICE_STDPERIPH_CAN
36 | #include "stm32f10x_can.h"
37 | #endif
38 | #ifdef RTE_DEVICE_STDPERIPH_CEC
39 | #include "stm32f10x_cec.h"
40 | #endif
41 | #ifdef RTE_DEVICE_STDPERIPH_CRC
42 | #include "stm32f10x_crc.h"
43 | #endif
44 | #ifdef RTE_DEVICE_STDPERIPH_DAC
45 | #include "stm32f10x_dac.h"
46 | #endif
47 | #ifdef RTE_DEVICE_STDPERIPH_DBGMCU
48 | #include "stm32f10x_dbgmcu.h"
49 | #endif
50 | #ifdef RTE_DEVICE_STDPERIPH_DMA
51 | #include "stm32f10x_dma.h"
52 | #endif
53 | #ifdef RTE_DEVICE_STDPERIPH_EXTI
54 | #include "stm32f10x_exti.h"
55 | #endif
56 | #ifdef RTE_DEVICE_STDPERIPH_FLASH
57 | #include "stm32f10x_flash.h"
58 | #endif
59 | #ifdef RTE_DEVICE_STDPERIPH_FSMC
60 | #include "stm32f10x_fsmc.h"
61 | #endif
62 | #ifdef RTE_DEVICE_STDPERIPH_GPIO
63 | #include "stm32f10x_gpio.h"
64 | #endif
65 | #ifdef RTE_DEVICE_STDPERIPH_I2C
66 | #include "stm32f10x_i2c.h"
67 | #endif
68 | #ifdef RTE_DEVICE_STDPERIPH_IWDG
69 | #include "stm32f10x_iwdg.h"
70 | #endif
71 | #ifdef RTE_DEVICE_STDPERIPH_PWR
72 | #include "stm32f10x_pwr.h"
73 | #endif
74 | #ifdef RTE_DEVICE_STDPERIPH_RCC
75 | #include "stm32f10x_rcc.h"
76 | #endif
77 | #ifdef RTE_DEVICE_STDPERIPH_RTC
78 | #include "stm32f10x_rtc.h"
79 | #endif
80 | #ifdef RTE_DEVICE_STDPERIPH_SDIO
81 | #include "stm32f10x_sdio.h"
82 | #endif
83 | #ifdef RTE_DEVICE_STDPERIPH_SPI
84 | #include "stm32f10x_spi.h"
85 | #endif
86 | #ifdef RTE_DEVICE_STDPERIPH_TIM
87 | #include "stm32f10x_tim.h"
88 | #endif
89 | #ifdef RTE_DEVICE_STDPERIPH_USART
90 | #include "stm32f10x_usart.h"
91 | #endif
92 | #ifdef RTE_DEVICE_STDPERIPH_WWDG
93 | #include "stm32f10x_wwdg.h"
94 | #endif
95 | #ifdef RTE_DEVICE_STDPERIPH_FRAMEWORK
96 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
97 | #endif
98 |
99 | /* Exported types ------------------------------------------------------------*/
100 | /* Exported constants --------------------------------------------------------*/
101 | /* Uncomment the line below to expanse the "assert_param" macro in the
102 | Standard Peripheral Library drivers code */
103 | /* #define USE_FULL_ASSERT 1 */
104 |
105 | /* Exported macro ------------------------------------------------------------*/
106 | #ifdef USE_FULL_ASSERT
107 |
108 | /**
109 | * @brief The assert_param macro is used for function's parameters check.
110 | * @param expr: If expr is false, it calls assert_failed function which reports
111 | * the name of the source file and the source line number of the call
112 | * that failed. If expr is true, it returns no value.
113 | * @retval None
114 | */
115 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
116 | /* Exported functions ------------------------------------------------------- */
117 | void assert_failed(uint8_t* file, uint32_t line);
118 | #else
119 | #define assert_param(expr) ((void)0)
120 | #endif /* USE_FULL_ASSERT */
121 |
122 | #endif /* __STM32F10x_CONF_H */
123 |
124 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
125 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_sil.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_sil.c
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Simplified Interface Layer for Global Initialization and Endpoint
8 | * Rea/Write operations.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2012 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "usb_lib.h"
32 |
33 | /* Private typedef -----------------------------------------------------------*/
34 | /* Private define ------------------------------------------------------------*/
35 | /* Private macro -------------------------------------------------------------*/
36 | /* Private variables ---------------------------------------------------------*/
37 | /* Extern variables ----------------------------------------------------------*/
38 | /* Private function prototypes -----------------------------------------------*/
39 | /* Private functions ---------------------------------------------------------*/
40 |
41 | /*******************************************************************************
42 | * Function Name : USB_SIL_Init
43 | * Description : Initialize the USB Device IP and the Endpoint 0.
44 | * Input : None.
45 | * Output : None.
46 | * Return : Status.
47 | *******************************************************************************/
48 | uint32_t USB_SIL_Init(void)
49 | {
50 | /* USB interrupts initialization */
51 | /* clear pending interrupts */
52 | _SetISTR(0);
53 | wInterrupt_Mask = IMR_MSK;
54 | /* set interrupts mask */
55 | _SetCNTR(wInterrupt_Mask);
56 | return 0;
57 | }
58 |
59 | /*******************************************************************************
60 | * Function Name : USB_SIL_Write
61 | * Description : Write a buffer of data to a selected endpoint.
62 | * Input : - bEpAddr: The address of the non control endpoint.
63 | * - pBufferPointer: The pointer to the buffer of data to be written
64 | * to the endpoint.
65 | * - wBufferSize: Number of data to be written (in bytes).
66 | * Output : None.
67 | * Return : Status.
68 | *******************************************************************************/
69 | uint32_t USB_SIL_Write(uint8_t bEpAddr, uint8_t* pBufferPointer, uint32_t wBufferSize)
70 | {
71 | /* Use the memory interface function to write to the selected endpoint */
72 | UserToPMABufferCopy(pBufferPointer, GetEPTxAddr(bEpAddr & 0x7F), wBufferSize);
73 |
74 | /* Update the data length in the control register */
75 | SetEPTxCount((bEpAddr & 0x7F), wBufferSize);
76 |
77 | return 0;
78 | }
79 |
80 | /*******************************************************************************
81 | * Function Name : USB_SIL_Read
82 | * Description : Write a buffer of data to a selected endpoint.
83 | * Input : - bEpAddr: The address of the non control endpoint.
84 | * - pBufferPointer: The pointer to which will be saved the
85 | * received data buffer.
86 | * Output : None.
87 | * Return : Number of received data (in Bytes).
88 | *******************************************************************************/
89 | uint32_t USB_SIL_Read(uint8_t bEpAddr, uint8_t* pBufferPointer)
90 | {
91 | uint32_t DataLength = 0;
92 |
93 | /* Get the number of received data on the selected Endpoint */
94 | DataLength = GetEPRxCount(bEpAddr & 0x7F);
95 |
96 | /* Use the memory interface function to write to the selected endpoint */
97 | PMAToUserBufferCopy(pBufferPointer, GetEPRxAddr(bEpAddr & 0x7F), DataLength);
98 |
99 | /* Return the number of received data */
100 | return DataLength;
101 | }
102 |
103 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
104 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/STM32F10x_FWLib/inc/stm32f10x_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_pwr.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the PWR firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_PWR_H
25 | #define __STM32F10x_PWR_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup PWR
39 | * @{
40 | */
41 |
42 | /** @defgroup PWR_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup PWR_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup PVD_detection_level
55 | * @{
56 | */
57 |
58 | #define PWR_PVDLevel_2V2 ((uint32_t)0x00000000)
59 | #define PWR_PVDLevel_2V3 ((uint32_t)0x00000020)
60 | #define PWR_PVDLevel_2V4 ((uint32_t)0x00000040)
61 | #define PWR_PVDLevel_2V5 ((uint32_t)0x00000060)
62 | #define PWR_PVDLevel_2V6 ((uint32_t)0x00000080)
63 | #define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0)
64 | #define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0)
65 | #define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0)
66 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \
67 | ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \
68 | ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
69 | ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))
70 | /**
71 | * @}
72 | */
73 |
74 | /** @defgroup Regulator_state_is_STOP_mode
75 | * @{
76 | */
77 |
78 | #define PWR_Regulator_ON ((uint32_t)0x00000000)
79 | #define PWR_Regulator_LowPower ((uint32_t)0x00000001)
80 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
81 | ((REGULATOR) == PWR_Regulator_LowPower))
82 | /**
83 | * @}
84 | */
85 |
86 | /** @defgroup STOP_mode_entry
87 | * @{
88 | */
89 |
90 | #define PWR_STOPEntry_WFI ((uint8_t)0x01)
91 | #define PWR_STOPEntry_WFE ((uint8_t)0x02)
92 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | /** @defgroup PWR_Flag
99 | * @{
100 | */
101 |
102 | #define PWR_FLAG_WU ((uint32_t)0x00000001)
103 | #define PWR_FLAG_SB ((uint32_t)0x00000002)
104 | #define PWR_FLAG_PVDO ((uint32_t)0x00000004)
105 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
106 | ((FLAG) == PWR_FLAG_PVDO))
107 |
108 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
109 | /**
110 | * @}
111 | */
112 |
113 | /**
114 | * @}
115 | */
116 |
117 | /** @defgroup PWR_Exported_Macros
118 | * @{
119 | */
120 |
121 | /**
122 | * @}
123 | */
124 |
125 | /** @defgroup PWR_Exported_Functions
126 | * @{
127 | */
128 |
129 | void PWR_DeInit(void);
130 | void PWR_BackupAccessCmd(FunctionalState NewState);
131 | void PWR_PVDCmd(FunctionalState NewState);
132 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
133 | void PWR_WakeUpPinCmd(FunctionalState NewState);
134 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
135 | void PWR_EnterSTANDBYMode(void);
136 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
137 | void PWR_ClearFlag(uint32_t PWR_FLAG);
138 |
139 | #ifdef __cplusplus
140 | }
141 | #endif
142 |
143 | #endif /* __STM32F10x_PWR_H */
144 | /**
145 | * @}
146 | */
147 |
148 | /**
149 | * @}
150 | */
151 |
152 | /**
153 | * @}
154 | */
155 |
156 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
157 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/src/usb_endp.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_endp.c
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 21-January-2013
7 | * @brief Endpoint routines
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2013 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Includes ------------------------------------------------------------------*/
30 | #include "usb_lib.h"
31 | #include "usb_desc.h"
32 | #include "usb_mem.h"
33 | #include "hw_config.h"
34 | #include "usb_istr.h"
35 | #include "usb_pwr.h"
36 |
37 | /* Private typedef -----------------------------------------------------------*/
38 | /* Private define ------------------------------------------------------------*/
39 |
40 | /* Interval between sending IN packets in frame number (1 frame = 1ms) */
41 | #define VCOMPORT_IN_FRAME_INTERVAL 5
42 |
43 | /* Private macro -------------------------------------------------------------*/
44 | /* Private variables ---------------------------------------------------------*/
45 | static uint8_t txBuffter[VIRTUAL_COM_PORT_DATA_SIZE] = {0};
46 | static volatile uint8_t txFlg = 0;
47 | static volatile uint32_t FrameCount = 0;
48 |
49 |
50 | /* Private function prototypes -----------------------------------------------*/
51 | /* Private functions ---------------------------------------------------------*/
52 |
53 | /*******************************************************************************
54 | * Function Name : EP1_IN_Callback
55 | * Description :
56 | * Input : None.
57 | * Output : None.
58 | * Return : None.
59 | *******************************************************************************/
60 | void EP1_IN_Callback (void)
61 | {
62 | uint16_t len = 0;
63 |
64 | if (1 == txFlg)
65 | {
66 | len = USB_TxRead(txBuffter, sizeof(txBuffter));
67 |
68 | if (len > 0)
69 | {
70 | UserToPMABufferCopy(txBuffter, ENDP1_TXADDR, len);
71 | SetEPTxCount(ENDP1, len);
72 | SetEPTxValid(ENDP1);
73 | FrameCount = 0;
74 | }
75 | else
76 | {
77 | txFlg = 0;
78 | }
79 | }
80 | }
81 |
82 | /*******************************************************************************
83 | * Function Name : EP3_OUT_Callback
84 | * Description :
85 | * Input : None.
86 | * Output : None.
87 | * Return : None.
88 | *******************************************************************************/
89 | void EP3_OUT_Callback(void)
90 | {
91 | static uint8_t buffter[VIRTUAL_COM_PORT_DATA_SIZE] = {0};
92 |
93 | uint16_t USB_Rx_Cnt;
94 |
95 | /* Get the received data buffer and update the counter */
96 | USB_Rx_Cnt = USB_SIL_Read(EP3_OUT, buffter);
97 |
98 | /* USB data will be immediately processed, this allow next USB traffic being
99 | NAKed till the end of the USART Xfer */
100 | USB_RxWrite(buffter, USB_Rx_Cnt);
101 |
102 | /* Enable the receive of data on EP3 */
103 | SetEPRxValid(ENDP3);
104 | }
105 |
106 |
107 | /*******************************************************************************
108 | * Function Name : SOF_Callback / INTR_SOFINTR_Callback
109 | * Description :
110 | * Input : None.
111 | * Output : None.
112 | * Return : None.
113 | *******************************************************************************/
114 | void SOF_Callback(void)
115 | {
116 | uint16_t len = 0;
117 |
118 | if(bDeviceState == CONFIGURED)
119 | {
120 | if (0 == txFlg)
121 | {
122 | if (FrameCount++ == VCOMPORT_IN_FRAME_INTERVAL)
123 | {
124 | /* Reset the frame counter */
125 | FrameCount = 0;
126 |
127 | /* Check the data to be sent through IN pipe */
128 | len = USB_TxRead(txBuffter, sizeof(txBuffter));
129 |
130 | if (len > 0)
131 | {
132 | UserToPMABufferCopy(txBuffter, ENDP1_TXADDR, len);
133 | SetEPTxCount(ENDP1, len);
134 | SetEPTxValid(ENDP1);
135 |
136 | txFlg = 1;
137 | }
138 | }
139 | }
140 | }
141 | }
142 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
143 |
144 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/STM32F10x_FWLib/src/stm32f10x_iwdg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_iwdg.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the IWDG firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_iwdg.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup IWDG
30 | * @brief IWDG driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup IWDG_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup IWDG_Private_Defines
43 | * @{
44 | */
45 |
46 | /* ---------------------- IWDG registers bit mask ----------------------------*/
47 |
48 | /* KR register bit mask */
49 | #define KR_KEY_Reload ((uint16_t)0xAAAA)
50 | #define KR_KEY_Enable ((uint16_t)0xCCCC)
51 |
52 | /**
53 | * @}
54 | */
55 |
56 | /** @defgroup IWDG_Private_Macros
57 | * @{
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 | /** @defgroup IWDG_Private_Variables
65 | * @{
66 | */
67 |
68 | /**
69 | * @}
70 | */
71 |
72 | /** @defgroup IWDG_Private_FunctionPrototypes
73 | * @{
74 | */
75 |
76 | /**
77 | * @}
78 | */
79 |
80 | /** @defgroup IWDG_Private_Functions
81 | * @{
82 | */
83 |
84 | /**
85 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
86 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
87 | * This parameter can be one of the following values:
88 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
89 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
90 | * @retval None
91 | */
92 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
93 | {
94 | /* Check the parameters */
95 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
96 | IWDG->KR = IWDG_WriteAccess;
97 | }
98 |
99 | /**
100 | * @brief Sets IWDG Prescaler value.
101 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
102 | * This parameter can be one of the following values:
103 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
104 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
105 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
106 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
107 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
108 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
109 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
110 | * @retval None
111 | */
112 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
113 | {
114 | /* Check the parameters */
115 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
116 | IWDG->PR = IWDG_Prescaler;
117 | }
118 |
119 | /**
120 | * @brief Sets IWDG Reload value.
121 | * @param Reload: specifies the IWDG Reload value.
122 | * This parameter must be a number between 0 and 0x0FFF.
123 | * @retval None
124 | */
125 | void IWDG_SetReload(uint16_t Reload)
126 | {
127 | /* Check the parameters */
128 | assert_param(IS_IWDG_RELOAD(Reload));
129 | IWDG->RLR = Reload;
130 | }
131 |
132 | /**
133 | * @brief Reloads IWDG counter with value defined in the reload register
134 | * (write access to IWDG_PR and IWDG_RLR registers disabled).
135 | * @param None
136 | * @retval None
137 | */
138 | void IWDG_ReloadCounter(void)
139 | {
140 | IWDG->KR = KR_KEY_Reload;
141 | }
142 |
143 | /**
144 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
145 | * @param None
146 | * @retval None
147 | */
148 | void IWDG_Enable(void)
149 | {
150 | IWDG->KR = KR_KEY_Enable;
151 | }
152 |
153 | /**
154 | * @brief Checks whether the specified IWDG flag is set or not.
155 | * @param IWDG_FLAG: specifies the flag to check.
156 | * This parameter can be one of the following values:
157 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
158 | * @arg IWDG_FLAG_RVU: Reload Value Update on going
159 | * @retval The new state of IWDG_FLAG (SET or RESET).
160 | */
161 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
162 | {
163 | FlagStatus bitstatus = RESET;
164 | /* Check the parameters */
165 | assert_param(IS_IWDG_FLAG(IWDG_FLAG));
166 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
167 | {
168 | bitstatus = SET;
169 | }
170 | else
171 | {
172 | bitstatus = RESET;
173 | }
174 | /* Return the flag status */
175 | return bitstatus;
176 | }
177 |
178 | /**
179 | * @}
180 | */
181 |
182 | /**
183 | * @}
184 | */
185 |
186 | /**
187 | * @}
188 | */
189 |
190 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
191 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/HARDWARE/platform/deca_spi.c:
--------------------------------------------------------------------------------
1 | /*! ----------------------------------------------------------------------------
2 | * @file deca_spi.c
3 | * @brief SPI access functions
4 | *
5 | * @attention
6 | *
7 | * Copyright 2015 (c) DecaWave Ltd, Dublin, Ireland.
8 | *
9 | * All rights reserved.
10 | *
11 | * @author DecaWave
12 | */
13 |
14 | #include "deca_spi.h"
15 | #include "deca_device_api.h"
16 | #include "port.h"
17 | #include "delay.h"
18 |
19 | //int writetospi_serial( uint16 headerLength,
20 | // const uint8 *headerBuffer,
21 | // uint32 bodylength,
22 | // const uint8 *bodyBuffer
23 | // );
24 |
25 | //int readfromspi_serial( uint16 headerLength,
26 | // const uint8 *headerBuffer,
27 | // uint32 readlength,
28 | // uint8 *readBuffer );
29 | /*! ------------------------------------------------------------------------------------------------------------------
30 | * Function: openspi()
31 | *
32 | * Low level abstract function to open and initialise access to the SPI device.
33 | * returns 0 for success, or -1 for error
34 | */
35 | int openspi(/*SPI_TypeDef* SPIx*/)
36 | {
37 | // done by port.c, default SPI used is SPI1
38 |
39 | return 0;
40 |
41 | } // end openspi()
42 |
43 | /*! ------------------------------------------------------------------------------------------------------------------
44 | * Function: closespi()
45 | *
46 | * Low level abstract function to close the the SPI device.
47 | * returns 0 for success, or -1 for error
48 | */
49 | int closespi(void)
50 | {
51 | while (port_SPIx_busy_sending()); //wait for tx buffer to empty
52 |
53 | port_SPIx_disable();
54 |
55 | return 0;
56 |
57 | } // end closespi()
58 |
59 | /*! ------------------------------------------------------------------------------------------------------------------
60 | * Function: writetospi()
61 | *
62 | * Low level abstract function to write to the SPI
63 | * Takes two separate byte buffers for write header and write data
64 | * returns 0 for success, or -1 for error
65 | */
66 |
67 | int writetospi_serial
68 | (
69 | uint16 headerLength,
70 | const uint8 *headerBuffer,
71 | uint32 bodyLength,
72 | const uint8 *bodyBuffer
73 | )
74 | {
75 |
76 | int i=0;
77 |
78 | decaIrqStatus_t stat ;
79 |
80 | stat = decamutexon() ;
81 |
82 | SPIx_CS_GPIO->BRR = SPIx_CS;
83 |
84 | for(i=0; iDR = headerBuffer[i];
87 |
88 | while ((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
89 |
90 | SPIx->DR ;
91 | }
92 |
93 | for(i=0; iDR = bodyBuffer[i];
96 |
97 | while((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
98 |
99 | SPIx->DR ;
100 | }
101 |
102 | SPIx_CS_GPIO->BSRR = SPIx_CS;
103 |
104 | decamutexoff(stat) ;
105 |
106 | return 0;
107 | } // end writetospi()
108 |
109 |
110 | /*! ------------------------------------------------------------------------------------------------------------------
111 | * Function: readfromspi()
112 | *
113 | * Low level abstract function to read from the SPI
114 | * Takes two separate byte buffers for write header and read data
115 | * returns the offset into read buffer where first byte of read data may be found,
116 | * or returns -1 if there was an error
117 | */
118 |
119 | int readfromspi_serial
120 | (
121 | uint16 headerLength,
122 | const uint8 *headerBuffer,
123 | uint32 readlength,
124 | uint8 *readBuffer
125 | )
126 | {
127 |
128 | int i=0;
129 |
130 | decaIrqStatus_t stat ;
131 |
132 | stat = decamutexon() ;
133 |
134 | /* Wait for SPIx Tx buffer empty */
135 | //while (port_SPIx_busy_sending());
136 |
137 | SPIx_CS_GPIO->BRR = SPIx_CS;
138 |
139 | for(i=0; iDR = headerBuffer[i];
142 |
143 | while((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
144 |
145 | readBuffer[0] = SPIx->DR ; // Dummy read as we write the header
146 | }
147 |
148 | for(i=0; iDR = 0; // Dummy write as we read the message body
151 |
152 | while((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
153 |
154 | readBuffer[i] = SPIx->DR ;//port_SPIx_receive_data(); //this clears RXNE bit
155 | }
156 |
157 | SPIx_CS_GPIO->BSRR = SPIx_CS;
158 |
159 | decamutexoff(stat) ;
160 |
161 | return 0;
162 | } // end readfromspi()
163 |
164 | //#if (EVB1000_LCD_SUPPORT == 1)
165 |
166 | //void writetoLCD
167 | //(
168 | // uint32 bodylength,
169 | // uint8 rs_enable,
170 | // const uint8 *bodyBuffer
171 | //)
172 | //{
173 |
174 | // int i = 0;
175 | // int sleep = 0;
176 | // //int j = 10000;
177 |
178 | // if(rs_enable)
179 | // {
180 | // port_LCD_RS_set();
181 | // }
182 | // else
183 | // {
184 | // if(bodylength == 1)
185 | // {
186 | // if(bodyBuffer[0] & 0x3) //if this is command = 1 or 2 - exsecution time is > 1ms
187 | // sleep = 1 ;
188 | // }
189 | // port_LCD_RS_clear();
190 | // }
191 |
192 | // port_SPIy_clear_chip_select(); //CS low
193 |
194 |
195 | // //while(j--); //delay
196 |
197 | // for(i=0; i© COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_dbgmcu.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup DBGMCU
30 | * @brief DBGMCU driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup DBGMCU_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup DBGMCU_Private_Defines
43 | * @{
44 | */
45 |
46 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
47 | /**
48 | * @}
49 | */
50 |
51 | /** @defgroup DBGMCU_Private_Macros
52 | * @{
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /** @defgroup DBGMCU_Private_Variables
60 | * @{
61 | */
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /** @defgroup DBGMCU_Private_FunctionPrototypes
68 | * @{
69 | */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /** @defgroup DBGMCU_Private_Functions
76 | * @{
77 | */
78 |
79 | /**
80 | * @brief Returns the device revision identifier.
81 | * @param None
82 | * @retval Device revision identifier
83 | */
84 | uint32_t DBGMCU_GetREVID(void)
85 | {
86 | return(DBGMCU->IDCODE >> 16);
87 | }
88 |
89 | /**
90 | * @brief Returns the device identifier.
91 | * @param None
92 | * @retval Device identifier
93 | */
94 | uint32_t DBGMCU_GetDEVID(void)
95 | {
96 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
97 | }
98 |
99 | /**
100 | * @brief Configures the specified peripheral and low power mode behavior
101 | * when the MCU under Debug mode.
102 | * @param DBGMCU_Periph: specifies the peripheral and low power mode.
103 | * This parameter can be any combination of the following values:
104 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
105 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode
106 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
107 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
108 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
109 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
110 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
111 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
112 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted
113 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted
114 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted
115 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted
116 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted
117 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
118 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
119 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
120 | * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted
121 | * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted
122 | * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted
123 | * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted
124 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted
125 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted
126 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted
127 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted
128 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted
129 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
130 | * @param NewState: new state of the specified peripheral in Debug mode.
131 | * This parameter can be: ENABLE or DISABLE.
132 | * @retval None
133 | */
134 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
135 | {
136 | /* Check the parameters */
137 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
138 | assert_param(IS_FUNCTIONAL_STATE(NewState));
139 |
140 | if (NewState != DISABLE)
141 | {
142 | DBGMCU->CR |= DBGMCU_Periph;
143 | }
144 | else
145 | {
146 | DBGMCU->CR &= ~DBGMCU_Periph;
147 | }
148 | }
149 |
150 | /**
151 | * @}
152 | */
153 |
154 | /**
155 | * @}
156 | */
157 |
158 | /**
159 | * @}
160 | */
161 |
162 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
163 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/STM32F10x_FWLib/src/stm32f10x_wwdg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_wwdg.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the WWDG firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_wwdg.h"
24 | #include "stm32f10x_rcc.h"
25 |
26 | /** @addtogroup STM32F10x_StdPeriph_Driver
27 | * @{
28 | */
29 |
30 | /** @defgroup WWDG
31 | * @brief WWDG driver modules
32 | * @{
33 | */
34 |
35 | /** @defgroup WWDG_Private_TypesDefinitions
36 | * @{
37 | */
38 |
39 | /**
40 | * @}
41 | */
42 |
43 | /** @defgroup WWDG_Private_Defines
44 | * @{
45 | */
46 |
47 | /* ----------- WWDG registers bit address in the alias region ----------- */
48 | #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
49 |
50 | /* Alias word address of EWI bit */
51 | #define CFR_OFFSET (WWDG_OFFSET + 0x04)
52 | #define EWI_BitNumber 0x09
53 | #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
54 |
55 | /* --------------------- WWDG registers bit mask ------------------------ */
56 |
57 | /* CR register bit mask */
58 | #define CR_WDGA_Set ((uint32_t)0x00000080)
59 |
60 | /* CFR register bit mask */
61 | #define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F)
62 | #define CFR_W_Mask ((uint32_t)0xFFFFFF80)
63 | #define BIT_Mask ((uint8_t)0x7F)
64 |
65 | /**
66 | * @}
67 | */
68 |
69 | /** @defgroup WWDG_Private_Macros
70 | * @{
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /** @defgroup WWDG_Private_Variables
78 | * @{
79 | */
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | /** @defgroup WWDG_Private_FunctionPrototypes
86 | * @{
87 | */
88 |
89 | /**
90 | * @}
91 | */
92 |
93 | /** @defgroup WWDG_Private_Functions
94 | * @{
95 | */
96 |
97 | /**
98 | * @brief Deinitializes the WWDG peripheral registers to their default reset values.
99 | * @param None
100 | * @retval None
101 | */
102 | void WWDG_DeInit(void)
103 | {
104 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
105 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
106 | }
107 |
108 | /**
109 | * @brief Sets the WWDG Prescaler.
110 | * @param WWDG_Prescaler: specifies the WWDG Prescaler.
111 | * This parameter can be one of the following values:
112 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
113 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
114 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
115 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
116 | * @retval None
117 | */
118 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
119 | {
120 | uint32_t tmpreg = 0;
121 | /* Check the parameters */
122 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
123 | /* Clear WDGTB[1:0] bits */
124 | tmpreg = WWDG->CFR & CFR_WDGTB_Mask;
125 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
126 | tmpreg |= WWDG_Prescaler;
127 | /* Store the new value */
128 | WWDG->CFR = tmpreg;
129 | }
130 |
131 | /**
132 | * @brief Sets the WWDG window value.
133 | * @param WindowValue: specifies the window value to be compared to the downcounter.
134 | * This parameter value must be lower than 0x80.
135 | * @retval None
136 | */
137 | void WWDG_SetWindowValue(uint8_t WindowValue)
138 | {
139 | __IO uint32_t tmpreg = 0;
140 |
141 | /* Check the parameters */
142 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
143 | /* Clear W[6:0] bits */
144 |
145 | tmpreg = WWDG->CFR & CFR_W_Mask;
146 |
147 | /* Set W[6:0] bits according to WindowValue value */
148 | tmpreg |= WindowValue & (uint32_t) BIT_Mask;
149 |
150 | /* Store the new value */
151 | WWDG->CFR = tmpreg;
152 | }
153 |
154 | /**
155 | * @brief Enables the WWDG Early Wakeup interrupt(EWI).
156 | * @param None
157 | * @retval None
158 | */
159 | void WWDG_EnableIT(void)
160 | {
161 | *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
162 | }
163 |
164 | /**
165 | * @brief Sets the WWDG counter value.
166 | * @param Counter: specifies the watchdog counter value.
167 | * This parameter must be a number between 0x40 and 0x7F.
168 | * @retval None
169 | */
170 | void WWDG_SetCounter(uint8_t Counter)
171 | {
172 | /* Check the parameters */
173 | assert_param(IS_WWDG_COUNTER(Counter));
174 | /* Write to T[6:0] bits to configure the counter value, no need to do
175 | a read-modify-write; writing a 0 to WDGA bit does nothing */
176 | WWDG->CR = Counter & BIT_Mask;
177 | }
178 |
179 | /**
180 | * @brief Enables WWDG and load the counter value.
181 | * @param Counter: specifies the watchdog counter value.
182 | * This parameter must be a number between 0x40 and 0x7F.
183 | * @retval None
184 | */
185 | void WWDG_Enable(uint8_t Counter)
186 | {
187 | /* Check the parameters */
188 | assert_param(IS_WWDG_COUNTER(Counter));
189 | WWDG->CR = CR_WDGA_Set | Counter;
190 | }
191 |
192 | /**
193 | * @brief Checks whether the Early Wakeup interrupt flag is set or not.
194 | * @param None
195 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
196 | */
197 | FlagStatus WWDG_GetFlagStatus(void)
198 | {
199 | return (FlagStatus)(WWDG->SR);
200 | }
201 |
202 | /**
203 | * @brief Clears Early Wakeup interrupt flag.
204 | * @param None
205 | * @retval None
206 | */
207 | void WWDG_ClearFlag(void)
208 | {
209 | WWDG->SR = (uint32_t)RESET;
210 | }
211 |
212 | /**
213 | * @}
214 | */
215 |
216 | /**
217 | * @}
218 | */
219 |
220 | /**
221 | * @}
222 | */
223 |
224 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
225 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/HARDWARE/PORT/port.h:
--------------------------------------------------------------------------------
1 | #ifndef PORT_H_
2 | #define PORT_H_
3 |
4 | #ifdef __cplusplus
5 | extern "C" {
6 | #endif
7 |
8 | #include "stm32f10x.h"
9 |
10 | //#define USB_SUPPORT
11 |
12 | //#define LCD_UPDATE_ON (0)
13 | #define DMA_ENABLE (0)
14 |
15 | /*****************************************************************************************************************//*
16 | **/
17 | #if (DMA_ENABLE == 1)
18 | #define writetospi writetospi_dma
19 | #define readfromspi readfromspi_dma
20 | void dma_init(void);
21 | #else
22 | #define writetospi writetospi_serial
23 | #define readfromspi readfromspi_serial
24 | //extern int writetospi_serial( uint16_t headerLength,
25 | // const uint8_t *headerBuffer,
26 | // uint32_t bodylength,
27 | // const uint8_t *bodyBuffer
28 | // );
29 |
30 | //extern int readfromspi_serial( uint16_t headerLength,
31 | // const uint8_t *headerBuffer,
32 | // uint32_t readlength,
33 | // uint8_t *readBuffer );
34 |
35 |
36 | #endif
37 |
38 | //typedef enum
39 | //{
40 | // LED_PC6,
41 | // LED_PC7,
42 | // LED_PC8,
43 | // LED_PC9,
44 | // LED_ALL,
45 | // LEDn
46 | //} led_t;
47 |
48 | int SPI_Configuration(void);
49 | void SPI_ChangeRate(uint16_t scalingfactor);
50 | void SPI_ConfigFastRate(uint16_t scalingfactor);
51 |
52 | #define SPIy_PRESCALER SPI_BaudRatePrescaler_128
53 |
54 | //#define SPIy SPI2
55 | //#define SPIy_GPIO GPIOB
56 | //#define SPIy_CS GPIO_Pin_12
57 | //#define SPIy_CS_GPIO GPIOB
58 | //#define SPIy_SCK GPIO_Pin_13
59 | //#define SPIy_MISO GPIO_Pin_14
60 | //#define SPIy_MOSI GPIO_Pin_15
61 |
62 | //#define LCD_RW GPIO_Pin_10
63 | //#define LCD_RS GPIO_Pin_11
64 |
65 | #define SPIx_PRESCALER SPI_BaudRatePrescaler_8
66 |
67 | #define SPIx SPI1
68 | #define SPIx_GPIO GPIOA
69 | #define SPIx_CS GPIO_Pin_4
70 | #define SPIx_CS_GPIO GPIOA
71 | #define SPIx_SCK GPIO_Pin_5
72 | #define SPIx_MISO GPIO_Pin_6
73 | #define SPIx_MOSI GPIO_Pin_7
74 |
75 | #define DW1000_RSTn GPIO_Pin_0
76 | #define DW1000_RSTn_GPIO GPIOA
77 |
78 | #define DECARSTIRQ GPIO_Pin_0
79 | #define DECARSTIRQ_GPIO GPIOA
80 | #define DECARSTIRQ_EXTI EXTI_Line0
81 | #define DECARSTIRQ_EXTI_PORT GPIO_PortSourceGPIOA
82 | #define DECARSTIRQ_EXTI_PIN GPIO_PinSource0
83 | #define DECARSTIRQ_EXTI_IRQn EXTI0_IRQn
84 |
85 | #define DECAIRQ GPIO_Pin_5
86 | #define DECAIRQ_GPIO GPIOB
87 | #define DECAIRQ_EXTI EXTI_Line5
88 | #define DECAIRQ_EXTI_PORT GPIO_PortSourceGPIOB
89 | #define DECAIRQ_EXTI_PIN GPIO_PinSource5
90 | #define DECAIRQ_EXTI_IRQn EXTI9_5_IRQn
91 | #define DECAIRQ_EXTI_USEIRQ ENABLE
92 | #define DECAIRQ_EXTI_NOIRQ DISABLE
93 |
94 | #define port_SPIx_busy_sending() (SPI_I2S_GetFlagStatus((SPIx),(SPI_I2S_FLAG_TXE))==(RESET))
95 | #define port_SPIx_no_data() (SPI_I2S_GetFlagStatus((SPIx),(SPI_I2S_FLAG_RXNE))==(RESET))
96 | #define port_SPIx_send_data(x) SPI_I2S_SendData((SPIx),(x))
97 | #define port_SPIx_receive_data() SPI_I2S_ReceiveData(SPIx)
98 | #define port_SPIx_disable() SPI_Cmd(SPIx,DISABLE)
99 | #define port_SPIx_enable() SPI_Cmd(SPIx,ENABLE)
100 | #define port_SPIx_set_chip_select() GPIO_SetBits(SPIx_CS_GPIO,SPIx_CS)
101 | #define port_SPIx_clear_chip_select() GPIO_ResetBits(SPIx_CS_GPIO,SPIx_CS)
102 |
103 | #define port_SPIy_busy_sending() (SPI_I2S_GetFlagStatus((SPIy),(SPI_I2S_FLAG_TXE))==(RESET))
104 | #define port_SPIy_no_data() (SPI_I2S_GetFlagStatus((SPIy),(SPI_I2S_FLAG_RXNE))==(RESET))
105 | #define port_SPIy_send_data(x) SPI_I2S_SendData((SPIy),(x))
106 | #define port_SPIy_receive_data() SPI_I2S_ReceiveData(SPIy)
107 | #define port_SPIy_disable() SPI_Cmd(SPIy,DISABLE)
108 | #define port_SPIy_enable() SPI_Cmd(SPIy,ENABLE)
109 | #define port_SPIy_set_chip_select() GPIO_SetBits(SPIy_CS_GPIO,SPIy_CS)
110 | #define port_SPIy_clear_chip_select() GPIO_ResetBits(SPIy_CS_GPIO,SPIy_CS)
111 |
112 | #define DW1000_RSTn GPIO_Pin_0
113 | #define DW1000_RSTn_GPIO GPIOA
114 |
115 | #define DECARSTIRQ GPIO_Pin_0
116 | #define DECARSTIRQ_GPIO GPIOA
117 | #define DECARSTIRQ_EXTI EXTI_Line0
118 | #define DECARSTIRQ_EXTI_PORT GPIO_PortSourceGPIOA
119 | #define DECARSTIRQ_EXTI_PIN GPIO_PinSource0
120 | #define DECARSTIRQ_EXTI_IRQn EXTI0_IRQn
121 |
122 | #define DECAIRQ GPIO_Pin_5
123 | #define DECAIRQ_GPIO GPIOB
124 | #define DECAIRQ_EXTI EXTI_Line5
125 | #define DECAIRQ_EXTI_PORT GPIO_PortSourceGPIOB
126 | #define DECAIRQ_EXTI_PIN GPIO_PinSource5
127 | #define DECAIRQ_EXTI_IRQn EXTI9_5_IRQn
128 | #define DECAIRQ_EXTI_USEIRQ ENABLE
129 | #define DECAIRQ_EXTI_NOIRQ DISABLE
130 |
131 |
132 |
133 | #define S1_SWITCH_ON (1)
134 | #define S1_SWITCH_OFF (0)
135 | //when switch (S1) is 'on' the pin is low
136 | int is_switch_on(uint16_t GPIOpin);
137 |
138 | #define port_IS_TAG_pressed() is_switch_on(TA_SW1_4)
139 | #define port_IS_LONGDLY_pressed() is_dlybutton_low()
140 |
141 |
142 |
143 | #define port_GET_stack_pointer() __get_MSP()
144 | #define port_GET_rtc_time() RTC_GetCounter()
145 | #define port_SET_rtc_time(x) RTC_SetCounter(x)
146 |
147 | ITStatus EXTI_GetITEnStatus(uint32_t x);
148 |
149 | #define port_AUDIBLE_enable() // not used
150 | #define port_AUDIBLE_disable() // not used
151 | #define port_AUDIBLE_set_interval_ms(x) // not used
152 | #define port_AUDIBLE_get_interval_ms(x) // not used
153 | #define port_GetEXT_IRQStatus() EXTI_GetITEnStatus(DECAIRQ_EXTI_IRQn)
154 | #define port_DisableEXT_IRQ() NVIC_DisableIRQ(DECAIRQ_EXTI_IRQn)
155 | #define port_EnableEXT_IRQ() NVIC_EnableIRQ(DECAIRQ_EXTI_IRQn)
156 | #define port_CheckEXT_IRQ() GPIO_ReadInputDataBit(DECAIRQ_GPIO, DECAIRQ)
157 | int NVIC_DisableDECAIRQ(void);
158 |
159 | void __weak process_dwRSTn_irq(void);
160 | void __weak process_deca_irq(void);
161 |
162 | void __weak button_callback(void);
163 | int is_IRQ_enabled(void);
164 |
165 | int is_button_low(uint16_t GPIOpin);
166 | #define is_fastrng_on(x) is_button_low(x)
167 |
168 |
169 | int peripherals_init(void);
170 | void spi_peripheral_init(void);
171 |
172 |
173 |
174 | unsigned long portGetTickCnt(void);
175 |
176 | #define portGetTickCount() portGetTickCnt()
177 |
178 | void reset_DW1000(void);
179 | void setup_DW1000RSTnIRQ(int enable);
180 |
181 | #ifdef __cplusplus
182 | }
183 | #endif
184 |
185 | #endif /* PORT_H_ */
186 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USB/lib/usb_int.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_int.c
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Endpoint CTR (Low and High) interrupt's service routines
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "usb_lib.h"
30 |
31 | /* Private typedef -----------------------------------------------------------*/
32 | /* Private define ------------------------------------------------------------*/
33 | /* Private macro -------------------------------------------------------------*/
34 | /* Private variables ---------------------------------------------------------*/
35 | __IO uint16_t SaveRState;
36 | __IO uint16_t SaveTState;
37 |
38 | /* Extern variables ----------------------------------------------------------*/
39 | extern void (*pEpInt_IN[7])(void); /* Handles IN interrupts */
40 | extern void (*pEpInt_OUT[7])(void); /* Handles OUT interrupts */
41 |
42 | /* Private function prototypes -----------------------------------------------*/
43 | /* Private functions ---------------------------------------------------------*/
44 |
45 | /*******************************************************************************
46 | * Function Name : CTR_LP.
47 | * Description : Low priority Endpoint Correct Transfer interrupt's service
48 | * routine.
49 | * Input : None.
50 | * Output : None.
51 | * Return : None.
52 | *******************************************************************************/
53 | void CTR_LP(void)
54 | {
55 | __IO uint16_t wEPVal = 0;
56 | /* stay in loop while pending interrupts */
57 | while (((wIstr = _GetISTR()) & ISTR_CTR) != 0)
58 | {
59 | /* extract highest priority endpoint number */
60 | EPindex = (uint8_t)(wIstr & ISTR_EP_ID);
61 | if (EPindex == 0)
62 | {
63 | /* Decode and service control endpoint interrupt */
64 | /* calling related service routine */
65 | /* (Setup0_Process, In0_Process, Out0_Process) */
66 |
67 | /* save RX & TX status */
68 | /* and set both to NAK */
69 |
70 | SaveRState = _GetENDPOINT(ENDP0);
71 | SaveTState = SaveRState & EPTX_STAT;
72 | SaveRState &= EPRX_STAT;
73 |
74 | _SetEPRxTxStatus(ENDP0,EP_RX_NAK,EP_TX_NAK);
75 |
76 | /* DIR bit = origin of the interrupt */
77 |
78 | if ((wIstr & ISTR_DIR) == 0)
79 | {
80 | /* DIR = 0 */
81 |
82 | /* DIR = 0 => IN int */
83 | /* DIR = 0 implies that (EP_CTR_TX = 1) always */
84 |
85 | _ClearEP_CTR_TX(ENDP0);
86 | In0_Process();
87 |
88 | /* before terminate set Tx & Rx status */
89 |
90 | _SetEPRxTxStatus(ENDP0,SaveRState,SaveTState);
91 | return;
92 | }
93 | else
94 | {
95 | /* DIR = 1 */
96 |
97 | /* DIR = 1 & CTR_RX => SETUP or OUT int */
98 | /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
99 |
100 | wEPVal = _GetENDPOINT(ENDP0);
101 |
102 | if ((wEPVal &EP_SETUP) != 0)
103 | {
104 | _ClearEP_CTR_RX(ENDP0); /* SETUP bit kept frozen while CTR_RX = 1 */
105 | Setup0_Process();
106 | /* before terminate set Tx & Rx status */
107 |
108 | _SetEPRxTxStatus(ENDP0,SaveRState,SaveTState);
109 | return;
110 | }
111 |
112 | else if ((wEPVal & EP_CTR_RX) != 0)
113 | {
114 | _ClearEP_CTR_RX(ENDP0);
115 | Out0_Process();
116 | /* before terminate set Tx & Rx status */
117 |
118 | _SetEPRxTxStatus(ENDP0,SaveRState,SaveTState);
119 | return;
120 | }
121 | }
122 | }/* if(EPindex == 0) */
123 | else
124 | {
125 | /* Decode and service non control endpoints interrupt */
126 |
127 | /* process related endpoint register */
128 | wEPVal = _GetENDPOINT(EPindex);
129 | if ((wEPVal & EP_CTR_RX) != 0)
130 | {
131 | /* clear int flag */
132 | _ClearEP_CTR_RX(EPindex);
133 |
134 | /* call OUT service function */
135 | (*pEpInt_OUT[EPindex-1])();
136 |
137 | } /* if((wEPVal & EP_CTR_RX) */
138 |
139 | if ((wEPVal & EP_CTR_TX) != 0)
140 | {
141 | /* clear int flag */
142 | _ClearEP_CTR_TX(EPindex);
143 |
144 | /* call IN service function */
145 | (*pEpInt_IN[EPindex-1])();
146 | } /* if((wEPVal & EP_CTR_TX) != 0) */
147 |
148 | }/* if(EPindex == 0) else */
149 |
150 | }/* while(...) */
151 | }
152 |
153 | /*******************************************************************************
154 | * Function Name : CTR_HP.
155 | * Description : High Priority Endpoint Correct Transfer interrupt's service
156 | * routine.
157 | * Input : None.
158 | * Output : None.
159 | * Return : None.
160 | *******************************************************************************/
161 | void CTR_HP(void)
162 | {
163 | uint32_t wEPVal = 0;
164 |
165 | while (((wIstr = _GetISTR()) & ISTR_CTR) != 0)
166 | {
167 | _SetISTR((uint16_t)CLR_CTR); /* clear CTR flag */
168 | /* extract highest priority endpoint number */
169 | EPindex = (uint8_t)(wIstr & ISTR_EP_ID);
170 | /* process related endpoint register */
171 | wEPVal = _GetENDPOINT(EPindex);
172 | if ((wEPVal & EP_CTR_RX) != 0)
173 | {
174 | /* clear int flag */
175 | _ClearEP_CTR_RX(EPindex);
176 |
177 | /* call OUT service function */
178 | (*pEpInt_OUT[EPindex-1])();
179 |
180 | } /* if((wEPVal & EP_CTR_RX) */
181 | else if ((wEPVal & EP_CTR_TX) != 0)
182 | {
183 | /* clear int flag */
184 | _ClearEP_CTR_TX(EPindex);
185 |
186 | /* call IN service function */
187 | (*pEpInt_IN[EPindex-1])();
188 |
189 |
190 | } /* if((wEPVal & EP_CTR_TX) != 0) */
191 |
192 | }/* while(...) */
193 | }
194 |
195 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
196 |
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/DebugConfig/TREK1000_STM32F103RC.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 | // Debug MCU Configuration
3 | // DBG_SLEEP
4 | // Debug Sleep Mode
5 | // 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
7 | // DBG_STOP
8 | // Debug Stop Mode
9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
11 | // DBG_STANDBY
12 | // Debug Standby Mode
13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
15 | // DBG_IWDG_STOP
16 | // Debug independent watchdog stopped when core is halted
17 | // 0: The watchdog counter clock continues even if the core is halted
18 | // 1: The watchdog counter clock is stopped when the core is halted
19 | // DBG_WWDG_STOP
20 | // Debug window watchdog stopped when core is halted
21 | // 0: The window watchdog counter clock continues even if the core is halted
22 | // 1: The window watchdog counter clock is stopped when the core is halted
23 | // DBG_TIM1_STOP
24 | // Timer 1 counter stopped when core is halted
25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
26 | // 1: The clock of the involved Timer counter is stopped when the core is halted
27 | // DBG_TIM2_STOP
28 | // Timer 2 counter stopped when core is halted
29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
30 | // 1: The clock of the involved Timer counter is stopped when the core is halted
31 | // DBG_TIM3_STOP
32 | // Timer 3 counter stopped when core is halted
33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
34 | // 1: The clock of the involved Timer counter is stopped when the core is halted
35 | // DBG_TIM4_STOP
36 | // Timer 4 counter stopped when core is halted
37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
38 | // 1: The clock of the involved Timer counter is stopped when the core is halted
39 | // DBG_CAN1_STOP
40 | // Debug CAN1 stopped when Core is halted
41 | // 0: Same behavior as in normal mode
42 | // 1: CAN1 receive registers are frozen
43 | // DBG_I2C1_SMBUS_TIMEOUT
44 | // I2C1 SMBUS timeout mode stopped when Core is halted
45 | // 0: Same behavior as in normal mode
46 | // 1: The SMBUS timeout is frozen
47 | // DBG_I2C2_SMBUS_TIMEOUT
48 | // I2C2 SMBUS timeout mode stopped when Core is halted
49 | // 0: Same behavior as in normal mode
50 | // 1: The SMBUS timeout is frozen
51 | // DBG_TIM8_STOP
52 | // Timer 8 counter stopped when core is halted
53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
55 | // DBG_TIM5_STOP
56 | // Timer 5 counter stopped when core is halted
57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
59 | // DBG_TIM6_STOP
60 | // Timer 6 counter stopped when core is halted
61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
63 | // DBG_TIM7_STOP
64 | // Timer 7 counter stopped when core is halted
65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
67 | // DBG_CAN2_STOP
68 | // Debug CAN2 stopped when Core is halted
69 | // 0: Same behavior as in normal mode
70 | // 1: CAN2 receive registers are frozen
71 | // DBG_TIM12_STOP
72 | // Timer 12 counter stopped when core is halted
73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
75 | // DBG_TIM13_STOP
76 | // Timer 13 counter stopped when core is halted
77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
79 | // DBG_TIM14_STOP
80 | // Timer 14 counter stopped when core is halted
81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
83 | // DBG_TIM9_STOP
84 | // Timer 9 counter stopped when core is halted
85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
87 | // DBG_TIM10_STOP
88 | // Timer 10 counter stopped when core is halted
89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
91 | // DBG_TIM11_STOP
92 | // Timer 11 counter stopped when core is halted
93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
95 | //
96 | DbgMCU_CR = 0x00000007;
97 | // <<< end of configuration section >>>
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/Code/gataway20181020/test_rx11/USER/DebugConfig/TREK1000_STM32F103T8.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 | // Debug MCU Configuration
3 | // DBG_SLEEP
4 | // Debug Sleep Mode
5 | // 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
7 | // DBG_STOP
8 | // Debug Stop Mode
9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
11 | // DBG_STANDBY
12 | // Debug Standby Mode
13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
15 | // DBG_IWDG_STOP
16 | // Debug independent watchdog stopped when core is halted
17 | // 0: The watchdog counter clock continues even if the core is halted
18 | // 1: The watchdog counter clock is stopped when the core is halted
19 | // DBG_WWDG_STOP
20 | // Debug window watchdog stopped when core is halted
21 | // 0: The window watchdog counter clock continues even if the core is halted
22 | // 1: The window watchdog counter clock is stopped when the core is halted
23 | // DBG_TIM1_STOP
24 | // Timer 1 counter stopped when core is halted
25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
26 | // 1: The clock of the involved Timer counter is stopped when the core is halted
27 | // DBG_TIM2_STOP
28 | // Timer 2 counter stopped when core is halted
29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
30 | // 1: The clock of the involved Timer counter is stopped when the core is halted
31 | // DBG_TIM3_STOP
32 | // Timer 3 counter stopped when core is halted
33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
34 | // 1: The clock of the involved Timer counter is stopped when the core is halted
35 | // DBG_TIM4_STOP
36 | // Timer 4 counter stopped when core is halted
37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
38 | // 1: The clock of the involved Timer counter is stopped when the core is halted
39 | // DBG_CAN1_STOP
40 | // Debug CAN1 stopped when Core is halted
41 | // 0: Same behavior as in normal mode
42 | // 1: CAN1 receive registers are frozen
43 | // DBG_I2C1_SMBUS_TIMEOUT
44 | // I2C1 SMBUS timeout mode stopped when Core is halted
45 | // 0: Same behavior as in normal mode
46 | // 1: The SMBUS timeout is frozen
47 | // DBG_I2C2_SMBUS_TIMEOUT
48 | // I2C2 SMBUS timeout mode stopped when Core is halted
49 | // 0: Same behavior as in normal mode
50 | // 1: The SMBUS timeout is frozen
51 | // DBG_TIM8_STOP
52 | // Timer 8 counter stopped when core is halted
53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
55 | // DBG_TIM5_STOP
56 | // Timer 5 counter stopped when core is halted
57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
59 | // DBG_TIM6_STOP
60 | // Timer 6 counter stopped when core is halted
61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
63 | // DBG_TIM7_STOP
64 | // Timer 7 counter stopped when core is halted
65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
67 | // DBG_CAN2_STOP
68 | // Debug CAN2 stopped when Core is halted
69 | // 0: Same behavior as in normal mode
70 | // 1: CAN2 receive registers are frozen
71 | // DBG_TIM12_STOP
72 | // Timer 12 counter stopped when core is halted
73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
75 | // DBG_TIM13_STOP
76 | // Timer 13 counter stopped when core is halted
77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
79 | // DBG_TIM14_STOP
80 | // Timer 14 counter stopped when core is halted
81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
83 | // DBG_TIM9_STOP
84 | // Timer 9 counter stopped when core is halted
85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
87 | // DBG_TIM10_STOP
88 | // Timer 10 counter stopped when core is halted
89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
91 | // DBG_TIM11_STOP
92 | // Timer 11 counter stopped when core is halted
93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
95 | //
96 | DbgMCU_CR = 0x00000007;
97 | // <<< end of configuration section >>>
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/DebugConfig/Target_1_STM32F103RC.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 | // Debug MCU Configuration
3 | // DBG_SLEEP
4 | // Debug Sleep Mode
5 | // 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
7 | // DBG_STOP
8 | // Debug Stop Mode
9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
11 | // DBG_STANDBY
12 | // Debug Standby Mode
13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
15 | // DBG_IWDG_STOP
16 | // Debug independent watchdog stopped when core is halted
17 | // 0: The watchdog counter clock continues even if the core is halted
18 | // 1: The watchdog counter clock is stopped when the core is halted
19 | // DBG_WWDG_STOP
20 | // Debug window watchdog stopped when core is halted
21 | // 0: The window watchdog counter clock continues even if the core is halted
22 | // 1: The window watchdog counter clock is stopped when the core is halted
23 | // DBG_TIM1_STOP
24 | // Timer 1 counter stopped when core is halted
25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
26 | // 1: The clock of the involved Timer counter is stopped when the core is halted
27 | // DBG_TIM2_STOP
28 | // Timer 2 counter stopped when core is halted
29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
30 | // 1: The clock of the involved Timer counter is stopped when the core is halted
31 | // DBG_TIM3_STOP
32 | // Timer 3 counter stopped when core is halted
33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
34 | // 1: The clock of the involved Timer counter is stopped when the core is halted
35 | // DBG_TIM4_STOP
36 | // Timer 4 counter stopped when core is halted
37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
38 | // 1: The clock of the involved Timer counter is stopped when the core is halted
39 | // DBG_CAN1_STOP
40 | // Debug CAN1 stopped when Core is halted
41 | // 0: Same behavior as in normal mode
42 | // 1: CAN1 receive registers are frozen
43 | // DBG_I2C1_SMBUS_TIMEOUT
44 | // I2C1 SMBUS timeout mode stopped when Core is halted
45 | // 0: Same behavior as in normal mode
46 | // 1: The SMBUS timeout is frozen
47 | // DBG_I2C2_SMBUS_TIMEOUT
48 | // I2C2 SMBUS timeout mode stopped when Core is halted
49 | // 0: Same behavior as in normal mode
50 | // 1: The SMBUS timeout is frozen
51 | // DBG_TIM8_STOP
52 | // Timer 8 counter stopped when core is halted
53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
55 | // DBG_TIM5_STOP
56 | // Timer 5 counter stopped when core is halted
57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
59 | // DBG_TIM6_STOP
60 | // Timer 6 counter stopped when core is halted
61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
63 | // DBG_TIM7_STOP
64 | // Timer 7 counter stopped when core is halted
65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
67 | // DBG_CAN2_STOP
68 | // Debug CAN2 stopped when Core is halted
69 | // 0: Same behavior as in normal mode
70 | // 1: CAN2 receive registers are frozen
71 | // DBG_TIM12_STOP
72 | // Timer 12 counter stopped when core is halted
73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
75 | // DBG_TIM13_STOP
76 | // Timer 13 counter stopped when core is halted
77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
79 | // DBG_TIM14_STOP
80 | // Timer 14 counter stopped when core is halted
81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
83 | // DBG_TIM9_STOP
84 | // Timer 9 counter stopped when core is halted
85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
87 | // DBG_TIM10_STOP
88 | // Timer 10 counter stopped when core is halted
89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
91 | // DBG_TIM11_STOP
92 | // Timer 11 counter stopped when core is halted
93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
95 | //
96 | DbgMCU_CR = 0x00000007;
97 | // <<< end of configuration section >>>
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/DebugConfig/Target_1_STM32F103T8.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 | // Debug MCU Configuration
3 | // DBG_SLEEP
4 | // Debug Sleep Mode
5 | // 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
7 | // DBG_STOP
8 | // Debug Stop Mode
9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
11 | // DBG_STANDBY
12 | // Debug Standby Mode
13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
15 | // DBG_IWDG_STOP
16 | // Debug independent watchdog stopped when core is halted
17 | // 0: The watchdog counter clock continues even if the core is halted
18 | // 1: The watchdog counter clock is stopped when the core is halted
19 | // DBG_WWDG_STOP
20 | // Debug window watchdog stopped when core is halted
21 | // 0: The window watchdog counter clock continues even if the core is halted
22 | // 1: The window watchdog counter clock is stopped when the core is halted
23 | // DBG_TIM1_STOP
24 | // Timer 1 counter stopped when core is halted
25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
26 | // 1: The clock of the involved Timer counter is stopped when the core is halted
27 | // DBG_TIM2_STOP
28 | // Timer 2 counter stopped when core is halted
29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
30 | // 1: The clock of the involved Timer counter is stopped when the core is halted
31 | // DBG_TIM3_STOP
32 | // Timer 3 counter stopped when core is halted
33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
34 | // 1: The clock of the involved Timer counter is stopped when the core is halted
35 | // DBG_TIM4_STOP
36 | // Timer 4 counter stopped when core is halted
37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
38 | // 1: The clock of the involved Timer counter is stopped when the core is halted
39 | // DBG_CAN1_STOP
40 | // Debug CAN1 stopped when Core is halted
41 | // 0: Same behavior as in normal mode
42 | // 1: CAN1 receive registers are frozen
43 | // DBG_I2C1_SMBUS_TIMEOUT
44 | // I2C1 SMBUS timeout mode stopped when Core is halted
45 | // 0: Same behavior as in normal mode
46 | // 1: The SMBUS timeout is frozen
47 | // DBG_I2C2_SMBUS_TIMEOUT
48 | // I2C2 SMBUS timeout mode stopped when Core is halted
49 | // 0: Same behavior as in normal mode
50 | // 1: The SMBUS timeout is frozen
51 | // DBG_TIM8_STOP
52 | // Timer 8 counter stopped when core is halted
53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
55 | // DBG_TIM5_STOP
56 | // Timer 5 counter stopped when core is halted
57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
59 | // DBG_TIM6_STOP
60 | // Timer 6 counter stopped when core is halted
61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
63 | // DBG_TIM7_STOP
64 | // Timer 7 counter stopped when core is halted
65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
67 | // DBG_CAN2_STOP
68 | // Debug CAN2 stopped when Core is halted
69 | // 0: Same behavior as in normal mode
70 | // 1: CAN2 receive registers are frozen
71 | // DBG_TIM12_STOP
72 | // Timer 12 counter stopped when core is halted
73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
75 | // DBG_TIM13_STOP
76 | // Timer 13 counter stopped when core is halted
77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
79 | // DBG_TIM14_STOP
80 | // Timer 14 counter stopped when core is halted
81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
83 | // DBG_TIM9_STOP
84 | // Timer 9 counter stopped when core is halted
85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
87 | // DBG_TIM10_STOP
88 | // Timer 10 counter stopped when core is halted
89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
91 | // DBG_TIM11_STOP
92 | // Timer 11 counter stopped when core is halted
93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
95 | //
96 | DbgMCU_CR = 0x00000007;
97 | // <<< end of configuration section >>>
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/DebugConfig/TREK1000_STM32F103RC_1.0.0.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 | // Debug MCU Configuration
3 | // DBG_SLEEP
4 | // Debug Sleep Mode
5 | // 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
7 | // DBG_STOP
8 | // Debug Stop Mode
9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
11 | // DBG_STANDBY
12 | // Debug Standby Mode
13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
15 | // DBG_IWDG_STOP
16 | // Debug independent watchdog stopped when core is halted
17 | // 0: The watchdog counter clock continues even if the core is halted
18 | // 1: The watchdog counter clock is stopped when the core is halted
19 | // DBG_WWDG_STOP
20 | // Debug window watchdog stopped when core is halted
21 | // 0: The window watchdog counter clock continues even if the core is halted
22 | // 1: The window watchdog counter clock is stopped when the core is halted
23 | // DBG_TIM1_STOP
24 | // Timer 1 counter stopped when core is halted
25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
26 | // 1: The clock of the involved Timer counter is stopped when the core is halted
27 | // DBG_TIM2_STOP
28 | // Timer 2 counter stopped when core is halted
29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
30 | // 1: The clock of the involved Timer counter is stopped when the core is halted
31 | // DBG_TIM3_STOP
32 | // Timer 3 counter stopped when core is halted
33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
34 | // 1: The clock of the involved Timer counter is stopped when the core is halted
35 | // DBG_TIM4_STOP
36 | // Timer 4 counter stopped when core is halted
37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
38 | // 1: The clock of the involved Timer counter is stopped when the core is halted
39 | // DBG_CAN1_STOP
40 | // Debug CAN1 stopped when Core is halted
41 | // 0: Same behavior as in normal mode
42 | // 1: CAN1 receive registers are frozen
43 | // DBG_I2C1_SMBUS_TIMEOUT
44 | // I2C1 SMBUS timeout mode stopped when Core is halted
45 | // 0: Same behavior as in normal mode
46 | // 1: The SMBUS timeout is frozen
47 | // DBG_I2C2_SMBUS_TIMEOUT
48 | // I2C2 SMBUS timeout mode stopped when Core is halted
49 | // 0: Same behavior as in normal mode
50 | // 1: The SMBUS timeout is frozen
51 | // DBG_TIM8_STOP
52 | // Timer 8 counter stopped when core is halted
53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
55 | // DBG_TIM5_STOP
56 | // Timer 5 counter stopped when core is halted
57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
59 | // DBG_TIM6_STOP
60 | // Timer 6 counter stopped when core is halted
61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
63 | // DBG_TIM7_STOP
64 | // Timer 7 counter stopped when core is halted
65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
67 | // DBG_CAN2_STOP
68 | // Debug CAN2 stopped when Core is halted
69 | // 0: Same behavior as in normal mode
70 | // 1: CAN2 receive registers are frozen
71 | // DBG_TIM12_STOP
72 | // Timer 12 counter stopped when core is halted
73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
75 | // DBG_TIM13_STOP
76 | // Timer 13 counter stopped when core is halted
77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
79 | // DBG_TIM14_STOP
80 | // Timer 14 counter stopped when core is halted
81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
83 | // DBG_TIM9_STOP
84 | // Timer 9 counter stopped when core is halted
85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
87 | // DBG_TIM10_STOP
88 | // Timer 10 counter stopped when core is halted
89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
91 | // DBG_TIM11_STOP
92 | // Timer 11 counter stopped when core is halted
93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
95 | //
96 | DbgMCU_CR = 0x00000007;
97 | // <<< end of configuration section >>>
--------------------------------------------------------------------------------
/Code/gataway20181020/test_rx11/USER/DebugConfig/TREK1000_STM32F103T8_1.0.0.dbgconf:
--------------------------------------------------------------------------------
1 | // <<< Use Configuration Wizard in Context Menu >>>
2 | // Debug MCU Configuration
3 | // DBG_SLEEP
4 | // Debug Sleep Mode
5 | // 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
7 | // DBG_STOP
8 | // Debug Stop Mode
9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
11 | // DBG_STANDBY
12 | // Debug Standby Mode
13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
15 | // DBG_IWDG_STOP
16 | // Debug independent watchdog stopped when core is halted
17 | // 0: The watchdog counter clock continues even if the core is halted
18 | // 1: The watchdog counter clock is stopped when the core is halted
19 | // DBG_WWDG_STOP
20 | // Debug window watchdog stopped when core is halted
21 | // 0: The window watchdog counter clock continues even if the core is halted
22 | // 1: The window watchdog counter clock is stopped when the core is halted
23 | // DBG_TIM1_STOP
24 | // Timer 1 counter stopped when core is halted
25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
26 | // 1: The clock of the involved Timer counter is stopped when the core is halted
27 | // DBG_TIM2_STOP
28 | // Timer 2 counter stopped when core is halted
29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
30 | // 1: The clock of the involved Timer counter is stopped when the core is halted
31 | // DBG_TIM3_STOP
32 | // Timer 3 counter stopped when core is halted
33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
34 | // 1: The clock of the involved Timer counter is stopped when the core is halted
35 | // DBG_TIM4_STOP
36 | // Timer 4 counter stopped when core is halted
37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted
38 | // 1: The clock of the involved Timer counter is stopped when the core is halted
39 | // DBG_CAN1_STOP
40 | // Debug CAN1 stopped when Core is halted
41 | // 0: Same behavior as in normal mode
42 | // 1: CAN1 receive registers are frozen
43 | // DBG_I2C1_SMBUS_TIMEOUT
44 | // I2C1 SMBUS timeout mode stopped when Core is halted
45 | // 0: Same behavior as in normal mode
46 | // 1: The SMBUS timeout is frozen
47 | // DBG_I2C2_SMBUS_TIMEOUT
48 | // I2C2 SMBUS timeout mode stopped when Core is halted
49 | // 0: Same behavior as in normal mode
50 | // 1: The SMBUS timeout is frozen
51 | // DBG_TIM8_STOP
52 | // Timer 8 counter stopped when core is halted
53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
55 | // DBG_TIM5_STOP
56 | // Timer 5 counter stopped when core is halted
57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
59 | // DBG_TIM6_STOP
60 | // Timer 6 counter stopped when core is halted
61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
63 | // DBG_TIM7_STOP
64 | // Timer 7 counter stopped when core is halted
65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
67 | // DBG_CAN2_STOP
68 | // Debug CAN2 stopped when Core is halted
69 | // 0: Same behavior as in normal mode
70 | // 1: CAN2 receive registers are frozen
71 | // DBG_TIM12_STOP
72 | // Timer 12 counter stopped when core is halted
73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
75 | // DBG_TIM13_STOP
76 | // Timer 13 counter stopped when core is halted
77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
79 | // DBG_TIM14_STOP
80 | // Timer 14 counter stopped when core is halted
81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
83 | // DBG_TIM9_STOP
84 | // Timer 9 counter stopped when core is halted
85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
87 | // DBG_TIM10_STOP
88 | // Timer 10 counter stopped when core is halted
89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
91 | // DBG_TIM11_STOP
92 | // Timer 11 counter stopped when core is halted
93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
95 | //
96 | DbgMCU_CR = 0x00000007;
97 | // <<< end of configuration section >>>
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