├── .gitignore ├── Makefile ├── README.md ├── afro.inc ├── afro2.inc ├── afro_hv.inc ├── afro_nfet.inc ├── afro_pr0.inc ├── afro_pr1.inc ├── arctictiger.inc ├── birdie70a.inc ├── boot.inc ├── bs.inc ├── bs40a.inc ├── bs_nfet.inc ├── diy0.inc ├── dlu40a.inc ├── dlux.inc ├── dys_nfet.inc ├── hk200a.inc ├── hm135a.inc ├── hxt200a.inc ├── kda.inc ├── kda_8khz.inc ├── kda_nfet.inc ├── kda_nfet_ni.inc ├── m8def.inc ├── mkblctrl1.inc ├── rb50a.inc ├── rb70a.inc ├── rb70a2.inc ├── rct50a.inc ├── tbs.inc ├── tbs_hv.inc ├── tgy.asm ├── tgy.inc ├── tgy6a.inc ├── tgy_8mhz.inc ├── tp.inc ├── tp70a.inc ├── tp_8khz.inc ├── tp_i2c.inc └── tp_nfet.inc /.gitignore: -------------------------------------------------------------------------------- 1 | *.hex 2 | *.obj 3 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | # This Makefile is compatible with both BSD and GNU make 2 | 3 | ASM?= avra 4 | SHELL = /bin/bash 5 | 6 | .SUFFIXES: .inc .hex 7 | 8 | ALL_TARGETS = afro.hex afro2.hex afro_hv.hex afro_nfet.hex arctictiger.hex birdie70a.hex bs_nfet.hex bs.hex bs40a.hex dlu40a.hex dlux.hex dys_nfet.hex hk200a.hex hm135a.hex hxt200a.hex kda.hex kda_8khz.hex kda_nfet.hex kda_nfet_ni.hex mkblctrl1.hex rb50a.hex rb70a.hex rb70a2.hex rct50a.hex tbs.hex tbs_hv.hex tp.hex tp_8khz.hex tp_i2c.hex tp_nfet.hex tp70a.hex tgy6a.hex tgy_8mhz.hex tgy.hex 9 | AUX_TARGETS = afro_pr0.hex afro_pr1.hex diy0.hex 10 | 11 | all: $(ALL_TARGETS) 12 | 13 | $(ALL_TARGETS): tgy.asm boot.inc 14 | $(AUX_TARGETS): tgy.asm boot.inc 15 | 16 | .inc.hex: 17 | @test -e $*.asm || ln -s tgy.asm $*.asm 18 | @echo "$(ASM) -fI -o $@ -D $*_esc -e $*.eeprom -d $*.obj $*.asm" 19 | @set -o pipefail; $(ASM) -fI -o $@ -D $*_esc -e $*.eeprom -d $*.obj $*.asm 2>&1 | sed '/PRAGMA directives currently ignored/d' 20 | @test -L $*.asm && rm -f $*.asm || true 21 | 22 | test: all 23 | 24 | clean: 25 | -rm -f $(ALL_TARGETS) *.cof *.obj *.eep.hex *.eeprom 26 | 27 | binary_zip: $(ALL_TARGETS) 28 | TARGET="tgy_`date '+%Y-%m-%d'`_`git rev-parse --verify --short HEAD`"; \ 29 | mkdir "$$TARGET" && \ 30 | cp $(ALL_TARGETS) "$$TARGET" && \ 31 | git archive -9 --prefix="$$TARGET/" -o "$$TARGET".zip HEAD && \ 32 | zip -9 "$$TARGET".zip "$$TARGET"/*.hex && ls -l "$$TARGET".zip; \ 33 | rm -f "$$TARGET"/*.hex; \ 34 | rmdir "$$TARGET" 35 | 36 | program_tgy_%: %.hex 37 | avrdude -c stk500v2 -b 9600 -P /dev/ttyUSB0 -u -p m8 -U flash:w:$<:i 38 | 39 | program_usbasp_%: %.hex 40 | avrdude -c usbasp -B.5 -p m8 -U flash:w:$<:i 41 | 42 | program_avrisp2_%: %.hex 43 | avrdude -c avrisp2 -p m8 -U flash:w:$<:i 44 | 45 | program_jtag3isp_%: %.hex 46 | avrdude -c jtag3isp -p m8 -U flash:w:$<:i 47 | 48 | program_dragon_%: %.hex 49 | avrdude -c dragon_isp -p m8 -P usb -U flash:w:$<:i 50 | 51 | program_dapa_%: %.hex 52 | avrdude -c dapa -p m8 -U flash:w:$<:i 53 | 54 | program_uisp_%: %.hex 55 | uisp -dprog=dapa --erase --upload --verify -v if=$< 56 | 57 | bootload_usbasp: 58 | avrdude -c usbasp -u -p m8 -U hfuse:w:`avrdude -c usbasp -u -p m8 -U hfuse:r:-:h | sed -n '/^0x/{s/.$$/a/;p}'`:m 59 | 60 | read: read_tgy 61 | 62 | read_tgy: 63 | avrdude -c stk500v2 -b 9600 -P /dev/ttyUSB0 -u -p m8 -U flash:r:flash.hex:i -U eeprom:r:eeprom.hex:i 64 | 65 | read_usbasp: 66 | avrdude -c usbasp -u -p m8 -U flash:r:flash.hex:i -U eeprom:r:eeprom.hex:i 67 | 68 | read_avrisp2: 69 | avrdude -c avrisp2 -p m8 -P usb -v -U flash:r:flash.hex:i -U eeprom:r:eeprom.hex:i 70 | 71 | read_jtag3isp: 72 | avrdude -c jtag3isp -p m8 -P usb -v -U flash:r:flash.hex:i -U eeprom:r:eeprom.hex:i 73 | 74 | read_dragon: 75 | avrdude -c dragon_isp -p m8 -P usb -v -U flash:r:flash.hex:i -U eeprom:r:eeprom.hex:i 76 | 77 | read_dapa: 78 | avrdude -c dapa -p m8 -v -U flash:r:flash.hex:i -U eeprom:r:eeprom.hex:i 79 | 80 | read_uisp: 81 | uisp -dprog=dapa --download -v of=flash.hex 82 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | https://github.com/sim-/tgy 2 | 3 | **Binary Downloads**: http://0x.ca/tgy/downloads/ 4 | 5 | This tree contains Atmel AVR assembly code for ATmega-based 3-phase 6 | sensor-less motor electronic speed control (ESC) boards, originally for 7 | Turnigy and similar models. This work is based on Bernhard Konze's 8 | "tp-18a" software, which was a port from his earlier personal work to the 9 | TowerPro 18A and original (not current!) Turnigy Plush boards. Please see 10 | tgy.asm for Bernhard's license. 11 | 12 | Patches and comments are always welcome! Let me know how it goes! 13 | 14 | Features 15 | -------- 16 | - 16MHz operation on most boards 17 | - 16-bit output PWM with full clock rate resolution (~18kHz PWM with 18 | a POWER_RANGE of 800 steps) 19 | - 24-bit timing and PWM pulse tracking at full clock rate resolution 20 | - ICP-based pulse time recording (on supported hardware) for zero PWM 21 | input control jitter 22 | - Immediate PWM input to PWM output for best possible multicopter 23 | response (but NOT where soft start or really any significant current 24 | limiting is needed!) 25 | - Accepts any PWM update rate (minimum ~5microseconds PWM low time) 26 | - Optimized interrupt code (very low minimum PWM and reduced full 27 | throttle bump) 28 | - Configurable board pin assignments by include file 29 | - Smooth starting in most cases 30 | - Forward and reverse commutation supported, including RC-car style 31 | reverse-neutral-forward PWM ranges, with optional braking 32 | 33 | Hardware 34 | -------- 35 | See http://wiki.openpilot.org/display/Doc/RapidESC+Database and/or 36 | https://docs.google.com/spreadsheet/ccc?key=0AhR02IDNb7_MdEhfVjk3MkRHVzhKdjU1YzdBQkZZRlE 37 | for a complete list. 38 | Some board pictures here: http://0x.ca/sim/esc/ 39 | 40 | 41 | Notes 42 | ----- 43 | - If it breaks, you get to keep both pieces! 44 | - Use at your own risk, and always test first without propellers! 45 | - New Turnigy Plush, Basic, Sentry and Pentium boards (Hobbywing OEM) 46 | have all switched to SiLabs C8051F334, d'oh! 47 | - If your ESC has 6 pads and an AVR, it's probably compatible; the pads 48 | are MOSI, MISO, SCLK, GND, VCC, and RESET. If it has 4 pads, it is 49 | probably a newer SiLabs-based one, for which this code will not work. 50 | (Except HK_261000001 which has 4 pads but has an AVR.) 51 | - I build and maintain this in Linux with AVRA (1.3.0 or newer). Patches 52 | welcome for AVR Studio APS files, etc. 53 | - The TowerPro/Turnigy Plush type boards typically do not come with 54 | external oscillators, which means their frequency drifts a bit with 55 | temperature and between boards. Multicopters and RC-car/boat 56 | controllers (with a neutral deadband) would probably be better on a 57 | board with an external oscillator. The Mystery/BlueSeries boards 58 | typically have them, as well as most higher current boards. 59 | - This doesn't yet check temperature or battery voltage. This is not 60 | desired on multi-rotor platforms; however, people still want to use 61 | this on planes, cars, boats, etc., so I suppose I'll add it. 62 | 63 | Building from Source 64 | -------------------- 65 | AVRA 1.3.0 or newer or avrasm2, part of the AVR Tools, should assemble 66 | this source. AVRA should also build on a Mac. "make all" will emit a 67 | .hex file for every build target; "make binary_zip" will make a release 68 | .zip file. There are some other make targets for programming. 69 | 70 | In AVR Studio, the Makefile is not supported, and just loading tgy.asm 71 | and attempting to build it will not define the constant indicating the 72 | board type / build target. You must either edit tgy.asm or add an option 73 | for the assembler command line to define the board symbol, unless 74 | building the default "tgy" board type. For example, this option should 75 | emit the bs_nfet target: -D bs_nfet_esc=bs_nfet_esc 76 | Look near the top of tgy.asm for the includes and board information. 77 | 78 | WARNING 79 | ------- 80 | Never just randomly try build targets until one works, especially not 81 | when directly powered from a LiPo! :P Many boards have inverted FET 82 | drives and different pin assignments. Toggling one wrong pin can fry 83 | multiple FETs. Some boards, like the Mystery 20A ESC, may all look the 84 | same on the outside by have different FETs as well. Be careful and check 85 | your board before flashing. 86 | 87 | Installation 88 | ------------ 89 | For more information, check out these sites: 90 | 91 | http://wiki.openpilot.org/display/Doc/RapidESCs 92 | http://wiki.openpilot.org/display/Doc/Flashing+Instructions 93 | http://www.rcgroups.com/forums/showthread.php?t=1513678 94 | 95 | See warning above! The safest arrangement is to use a current-limited 96 | bench power supply, set to a low voltage (6V-7V), for both flashing and 97 | initial testing. If the pinout is wrong and causes a short, the current 98 | limiting causes the input voltage to drop below the brown-out detection 99 | voltage of the MCU, causing all output pins to go high-impedance in 100 | hardware, and an automatic reset when the voltage comes back. 101 | 102 | If you do not have a current-limited supply, you can improvise by using 4 103 | AA batteries or an old NiCd pack or even a LiPo with a 12V light bulb in 104 | series to act as a current limiter. Be careful when touching the board, 105 | since it can be quite easy to turn on a FET gate with just your finger. 106 | This should be OK if you have a current-limited supply, since it should 107 | just reset. 108 | 109 | Even if the board appears to be one tested by others, make sure yours 110 | has the expected FET pin assignments, inversions, and sense lines! The 111 | assignments for each board type can be found in the .inc files, and 112 | the actual pin mappings can be found in the first few pages of ATmega8 113 | datasheet. This typically requires a voltmeter and, preferably, an 114 | oscilloscope. 115 | 116 | When not powered, use a voltmeter to check the path from the MCU pins to 117 | either the FET resistors, transistors, or driver chips, and verify that 118 | they match the assignments in one of the include files. Then power up 119 | the ESC with the original firmware, and check with an oscilloscope the 120 | inversions of the same pins. A voltmeter may be used instead when the 121 | motor is stopped. Be careful not to short FET pins together! If all 122 | voltages are low when the motor is off, nothing is inverted, and the 123 | INIT_Px values in the .inc file should be 0 for all of the FET bits. 124 | 125 | Older and smaller boards typically use P-FETs and N-FETs in the H-bridge; 126 | the P-FETs are typically driven by three NPN transistors, while the 127 | N-FETs are driven directly at TTL voltages with just a low resistor. 128 | Medium-sized and newer boards have moved to all-N-FET designs, but 129 | maintain the NPN transistors, and so have inverted P-FET pins from the 130 | MCU. Larger current (>~30A) boards typically have separate FET driver 131 | chips, to which the N-FET _or_ P-FET pins _may_ be inverted (but not both, 132 | since it would blow up before the MCU initializes). 133 | 134 | PWM is usually done on the low side of the H-bridge, where high frequency 135 | driving is easiest. If the average voltage increases at the AVR pin as 136 | throttle increases, and drops to 0V when stopped, the low-side FETs are 137 | not inverted; if average voltage decreases, and rises to 5V when stopped, 138 | the low-side FETs are likely inverted. The high side FETs are only 139 | switched at every other motor commutation step, and so switch at a lower 140 | frequency, and should be off 2/3rds of the time. If at 0V when stopped, 141 | and less than 2.5V average when running, the P-FETs are not inverted. If 142 | at 5V when stopped, and more than 2.5V when running, the P-FETs are 143 | inverted. In the case of inverted an FET group, they should be listed in 144 | the INIT_Px values (to turn them ON at boot), and the "on" macros should 145 | use clear instead of set instructions. The inverse applies to the "off" 146 | macros. 147 | 148 | There are four sense lines. The three output phases go through resistor 149 | dividers (to bring the voltage down to between 0-5V), and then are 150 | connected to ADC channels which can be accessed by the comparator with 151 | the ADC multiplexer when the ACME (Analog Comparator Multiplexer Enable) 152 | bit is enabled. Some boards use all ADC channels while others put one pin 153 | on AIN1 so that the ADC can sample voltages on other ADC channels while 154 | the comparator samples that phase. A "center tap" is established with a 155 | resistor star and connected to AIN0 on all boards, for detecting the 156 | zero-crossing from the motor back-EMF for timing. You can check which 157 | pins run to which output phases as they will have the lowest resistance 158 | from output phase to AVR pin, and all three will have a common resistance 159 | to the AIN0 pin. 160 | 161 | Boot Loader 162 | ----------- 163 | Since the 2012-06-01 release, the pre-built .hex files contain a boot 164 | loader that allows for flash and EEPROM reading and writing over the PWM 165 | input wire. The main purpose of this boot loader is to support software 166 | updates without having to expose the MCU or ISP pads for SPI programming, 167 | assuming this version or newer has previously been flashed. 168 | 169 | The boot loader is available on all boards which are wired in way that 170 | permits two-way communication over the wire. Some ESCs are isolated with 171 | an opto-isolator or by components to invert the signal to be compatible 172 | with ESCs that do have an opto-isolator, such as ESCs that work with the 173 | kda.hex target. Such boards will not be able to use this protocol. 174 | 175 | The boot loader uses an implementation of the same wire encoding as the 176 | Turnigy USB Linker. This is a simple 9600bps serial to half duplex wire 177 | converter that encodes signals in a way that should make it difficult to 178 | start a motor, even on an ESC not supporting the protocol, regardless of 179 | data sent. However, it is still possible that this could occur, so follow 180 | the same precautions as with normal ISP flashing, below. 181 | 182 | If the Turnigy USB Linker is not available, it is possible to use an 183 | Arduino or MultiWii board as a gateway between (USB and) serial and the 184 | wire protocol used by the boot loader. See the ArduinoUSBLinker project 185 | by Chris Osgood: https://github.com/c---/ArduinoUSBLinker 186 | 187 | Boot Loader Fuses 188 | ----------------- 189 | Since the 2012-09-30 release, long periods of high PWM input while 190 | disarmed will cause a jump to the boot loader, if present. Since the 191 | 2013-04-24 release, this became detangled from the included boot loader 192 | (BOOT_JUMP vs BOOT_LOADER), so other boot loaders may be used instead. 193 | 194 | As a result of the automatic jumping, it is not necessary to change the 195 | fuses to enable the boot loader. It may or may not be desirable to set 196 | the BOOTRST flag depending on intended operation and the hardware in use. 197 | 198 | If the hardware does not have any low pass filter or pull-down on the PWM 199 | input, it may easily float high by the time the boot loader checks it, 200 | which can prevent normal startup if another input (eg: I2C) is expected 201 | to be used. There should be pull-down or load present on the PWM input 202 | to prevent this if BOOTRST is enabled. 203 | 204 | Confusion may also result if the pin floats high with nothing connected 205 | and power is connected to check for starting beeps. Likewise, touching 206 | the connector or connecting it later may drain the input and cause normal 207 | startup to occur, which may seem like the ESC is resetting while powered. 208 | This is not a problem if the PWM input is normally intended to be used. 209 | 210 | On the other hand, with BOOTRST not set, it is not possible to recover 211 | from an interrupted flash, flash of the wrong board type, or flash of 212 | other software or versions older than 2012-09-30 without connecting to 213 | the ISP pins to do the flashing. 214 | 215 | To enable the the boot loader on ATmega8 boards, the low nibble of the 216 | hfuse should be set to 'a'. See "make bootload_usbasp" to do this 217 | automatically. BOOTRST and BOOTSZ1 should be enabled to set 512 words, 218 | start at $0E00. 219 | 220 | Flashing and Testing 221 | -------------------- 222 | Sort out how you want to connect an ISP programming device to the chip. 223 | Some boards have 6 pads in a row for this purpose. You can either solder 224 | wires, or make up some kind of springy-pin connector that touches the 225 | pads or chip pins without needing to solder. This is helpful when 226 | flashing more than one board. See here for some ideas and discussion: 227 | http://www.rcgroups.com/forums/showthread.php?t=1513678 228 | 229 | Sort out which software you will use for flashing. The KKMulticopter 230 | Flashtool now supports ESC flashing and is commonly used. You may also 231 | download AVR Studio and the AVR Toolchain from www.atmel.com, or try 232 | "avrdude" on most OSes. There are plenty of resources on the web for AVR 233 | ISP programming, and many ways to do it. 234 | 235 | Power the ESC from a current-limited supply and try to read the stock 236 | firmware (flash) _and_ EEPROM, to use as a backup. Most are locked and 237 | will still appear to read, but the files will contain just a series of 238 | repeating/increasing digits. If you do manage to get something, consider 239 | yourself lucky! 240 | 241 | Write down the stock fuse values, and check that they are sane. Most AVR 242 | programmers have a menu for this, but with avrdude or uisp, Google "AVR 243 | fuse calculator", select the ATmega8 target, and type in the hex values. 244 | If the "watchdog" fuse is enabled, you will want to disable it for now. 245 | The brown-out voltage should be set to 4.0V and enabled (BODEN). Leave 246 | the rest of the fuse values as shipped, and write down the new values. 247 | 248 | Flash the desired target .hex file to the AVR, then set the fuses, if 249 | anything needs changing. If you have any errors, check the connections 250 | to and voltage at the chip. Sometimes, a weak power or signal connection 251 | can temporarily work and then fail part-way through programming, giving 252 | verification errors. This can happen particularly if the target chip is 253 | powered weakly by the programmer itself, which then back-feeds to the 254 | rest of the circuit and tries to charge the capacitor, etc. Also check 255 | that the ground pin (black wire) actually connects to a pin marked "GND", 256 | not "NC" as on some USBasp devices! 257 | 258 | Once programming is successful, hook up a small motor without propeller 259 | and reset the power. You should hear three increasing beeps. If not, or 260 | if you hear only some beeps, the FET pinout may be incorrect or one or 261 | more FETs may be broken. Repetitive clicking can also indicate that the 262 | pinout is incorrect and causing continuous brown-out resets. 263 | 264 | Now, if you attach a valid PWM servo pulse with low-enough pulse length, 265 | you should hear a forth beep indicating that the ESC is armed. If not, 266 | try lowering the trim as far as possible. If it still doesn't work, you 267 | may need to raise the STOP_RC_PULS value in the code. 268 | 269 | Once armed, the ESC will try to start the motor if the pulse length 270 | (throttle) is increased. Try running up the motor slowly, and make sure 271 | everything runs smoothly. If on a variable supply, increase the voltage 272 | to the expected running voltage, and try again, with slow and rapid 273 | throttle changes. 274 | 275 | Finally, test the ESC in the intended application, with the usual power 276 | source, without anything attached to the motor shaft/bell first. Then, 277 | attach the propeller or gear, etc., LOCK IT DOWN so it doesn't hit you in 278 | the face, and try a slow sweep from idle to full throttle. Finally, try 279 | rapid throttle changes from slow to fast. The ESC and motor should run 280 | smoothly, never lose timing, and the ESC should not reset. If using a 281 | flight control board, you can sometimes tap the board to make it output a 282 | sudden throttle increase. 283 | 284 | For debugging reset causes, recent code has different beep sequences for 285 | each AVR reset case. See the Troubleshooting section below. 286 | 287 | Throttle Calibration and Programming 288 | ------------------------------------ 289 | 290 | Since the 2012-01-04 release, the input throttle range may be calibrated. 291 | This should be used whenever PWM input mode is used, including where 292 | external resonators are present, to set the usable throttle range. 293 | 294 | The default range is set at the top of tgy.asm (stop at 1060us, full 295 | throttle at 1860us) and is not changed if no new value is saved to the 296 | EEPROM. However, boards without external oscillators (typically those 297 | which use tgy.hex) must use the internal RC oscillator on the Atmega8, 298 | which may be off by 5% - 10% between each board, and will also drift by 299 | 10% or more over a 40 degree Celsius temperature range. This can cause 300 | throttle differences between boards if not calibrated, and issues arming 301 | the ESC, particularly in cold environments. 302 | 303 | Some flight boards may have automatic calibration procedures, or it may 304 | just be possible to set the min/max motor output to exactly match the ESC 305 | defaults listed above. ESCs with external resonators can use this method 306 | to avoid calibration. With a flight board such as the Naze32 running 307 | baseflight, the min/max can be set with CLI commands as follows: 308 | 309 | set minthrottle=1064 310 | 311 | set maxthrottle=1864 312 | 313 | Otherwise, to calibrate the ESC, REMOVE ALL PROPELLERS and follow the 314 | steps that may be documented for your flight controller board. KK2 boards 315 | have a two-button procedure that emits calibration pulses automatically. 316 | With KK boards, the Yaw pot must be set to the minimum position in order 317 | to enable "pass through" mode from the RX input to the ESC output. The 318 | ESCs are then calibrated to the radio's throttle stick. 319 | 320 | Calibration may also be done with a servo tester or with the ESC directly 321 | connected to an RX channel. The only requirement is that the input pulse 322 | has to be at or above PROGRAM_RC_PULS (default 1460us) to enter 323 | programming mode. This will differ slightly on boards with no external 324 | oscillator. If calibrating ESCs individually, try to maintain a close 325 | temperature and at least 6-7V input voltage (the ATmega8 oscillator 326 | speeds up as temperature and Vcc decrease). 327 | 328 | With the propellers removed and the source (radio, servo tester, or flight 329 | control board) set to full throttle, power up the ESC and wait for a 330 | single beep after the typical rising initialization beeps. This indicates 331 | the high pulse length has been saved to RAM. Move the stick or knob to 332 | the lowest setting, and wait for two beeps. This indicates that the low 333 | pulse length has been saved to RAM. 334 | 335 | If RC_PULS_NEUTRAL has been enabled (RC Car-style reverse mode), move the 336 | stick/knob to the center, and wait for three beeps. This indicates that 337 | the neutral pulse length has been saved to RAM. 338 | 339 | If the stick is not moved after the final setting, the ESC should now 340 | write the RAM settings to EEPROM, and continue startup. The ESC should 341 | recognize the same pulse length input as a valid arming pulse, and arm 342 | and work as usual. 343 | 344 | The input PWM pulse is measured in 24-bit space and scaled in 16.16 space 345 | to fit the number of PWM steps defined by POWER_RANGE - MIN_DUTY. There 346 | should be no measurable aliasing or quantization. Alternatively, the 347 | values may be adjusted in EEPROM directly. While calibrating, margins of 348 | 1/16th on the low end and 1/32nd on the high end are used to try to 349 | avoid problems with arming and reaching full throttle during temperature 350 | extremes. If desired, margins may be adjusted in tgy.asm between rc_prog2 351 | and rc_prog5. 352 | 353 | There is currently no way to reset (remove) the calibration other than by 354 | clearing the EEPROM (or reflashing without EESAVE set). This may be 355 | implemented in the future by some basic stick programming feature. 356 | 357 | NOTE: As of 2012-03-15, throttle calibration is disabled when a brown-out 358 | reset is detected. I accidentally calibrated an ESC when testing with a 359 | NiCd pack. The pack could not supply enough current, resulting in a 360 | brown-out reset of all ESCs, excluding the flight controller. I did not 361 | lower the throttle in time, resulting in one ESC getting a stable enough 362 | signal to store a new calibration. When intentionally calibrating, be 363 | sure that you cleanly connect the power. If you don't hear the rising 364 | beeps, remove the power for a few seconds to allow the capacitors to 365 | discharge, then try again. 366 | 367 | Troubleshooting 368 | --------------- 369 | 370 | There are 4 main beep frequencies used at different intervals and lengths 371 | to signal the various operation and fault states. These beep frequencies 372 | are labelled here as f1 through f4, where a higher number indicates a 373 | higher frequency. Repetition indicates longer beeps. 374 | 375 | If CHECK_HARDWARE is enabled (default on the Afro and TBS boards), the 376 | drive and sense circuitry will be tested for correct operation at boot. 377 | This check will prevent beeping if it would be unsafe to do so (for 378 | example, if beeping would end up completing a short circuit), and so may 379 | prevent further damage in some cases. 380 | 381 | Error conditions from CHECK_HARDWARE are flashed through the LED(s), if 382 | present, or beeped (if possible) before anything else, in a looping 383 | pattern, for as long as the error condition(s) persist. All conditions 384 | cannot be checked on some hardware due to pin routing, but will be 385 | indicated by beeping or flashing a particular count followed by a pause. 386 | If more than one error condition is present, each error will be reported 387 | in sequence. The error conditions are: 388 | 389 | 1: Phase A stuck high 390 | 2: Phase B stuck high 391 | 3: Phase C stuck high 392 | 4: AIN1 stuck high 393 | 5: AIN0 stuck high 394 | 6: Phase A low-side drive broken 395 | 7: Phase B low-side drive broken 396 | 8: Phase C low-side drive broken 397 | 9: Phase A high-side drive broken 398 | 10: Phase B high-side drive broken 399 | 11: Phase C high-side drive broken 400 | 401 | Note that if the ESC resets while the motor is still spinning (such as 402 | after a brief power cut), it is possible that the induced current will 403 | cause some transient errors that will clear once the motor stops, and 404 | then operation will continue. 405 | 406 | During boot, the MCUCSR register is checked to see the reason for reset. 407 | For exact behaviour, see near "Check reset cause" in tgy.asm. Here are the 408 | expected beep sequences: 409 | 410 | f1 f2 f3: Regular startup with nothing special detected 411 | 412 | f3 f1: Voltage brown-out bit was set (MCU voltage dropped below 2.7V/4.0V) 413 | 414 | f4: External reset (via the reset pin, as in after programming) 415 | 416 | looping f1 f1 f3 f3: Watchdog reset (previous execution locked up) 417 | 418 | looping beeps (8) of f2 or f4: Unknown (beeps out all MCUCSR bits, LSF) 419 | 420 | fast repeating beeps of f4 while idle: Noise on PWM input detected 421 | 422 | Once a valid input source is found and receiving idle throttle, f4 f4 f4 423 | (a long f4 beep) indicates that the ESC is armed and will start the motor 424 | when throttle goes non-zero. If you are unable to start the motor and are 425 | not hearing the forth, long beep, try lowering the throttle trim, or 426 | raise it all the way to start throttle calibration (above). 427 | 428 | If no input command is received for about 1 second, f3 f2 is beeped and 429 | the ESC returns to disarmed state, waiting for a valid arming signal. 430 | 431 | If no valid input is received while disarmed and BEACON is enabled, an f3 432 | beep will be emitted after about 8 seconds and then every 4 seconds. 433 | 434 | The various beep frequencies use different FET combinations (rather than 435 | all FETs at the same time) to try to help diagnose boards with failed 436 | FETs or possible incorrect firmware pin configuration (build target). If 437 | you hear only one or two of the usual three power-up beeps, and the board 438 | worked previously, it is likely that one of the FETs has burned out. The 439 | ESC may still start and run the motor like this, but the motor will sound 440 | bad, and power and efficiency will be reduced. 441 | -------------------------------------------------------------------------------- /afro.inc: -------------------------------------------------------------------------------- 1 | ;*********************************************************** 2 | ;* AfroESC * 3 | ;* 2011.09 * 4 | ;*********************************************************** 5 | 6 | .equ F_CPU = 16000000 7 | .equ USE_INT0 = 0 8 | .equ USE_I2C = 1 9 | .equ USE_UART = 1 10 | .equ USE_ICP = 1 11 | 12 | .equ DEAD_LOW_NS = 2200 13 | .equ DEAD_HIGH_NS = 24000 14 | 15 | ;********************* 16 | ; PORT B definitions * 17 | ;********************* 18 | ;.equ = 7 19 | ;.equ = 6 20 | ;.equ = 5 (sck) 21 | ;.equ = 4 (miso) 22 | .equ ApFET = 3 ;o (mosi) 23 | .equ BpFET = 2 ;o 24 | .equ CpFET = 1 ;o 25 | .equ rcp_in = 0 ;i r/c pulse input 26 | 27 | .equ INIT_PB = 0 28 | .equ DIR_PB = (1< 1.565V at ADC7) 40 | .equ mux_temperature = 6 ; ADC6 temperature input (3.3k from +5V, 10k NTC to gnd) 41 | .equ i2c_clk = 5 ; ADC5/SCL 42 | .equ i2c_data = 4 ; ADC4/SDA 43 | .equ red_led = 3 ; o 44 | .equ green_led = 2 ; o 45 | .equ mux_b = 1 ; ADC1 phase input 46 | .equ mux_a = 0 ; ADC0 phase input 47 | 48 | .equ O_POWER = 470 49 | .equ O_GROUND = 47 50 | 51 | .equ INIT_PC = (1< 1.565V at ADC7) 40 | .equ mux_temperature = 6 ; ADC6 temperature input (3.3k from +5V, 10k NTC to gnd) 41 | .equ i2c_clk = 5 ; ADC5/SCL 42 | .equ i2c_data = 4 ; ADC4/SDA 43 | .equ red_led = 3 ; o 44 | .equ green_led = 2 ; o 45 | .equ mux_b = 1 ; ADC1 phase input 46 | .equ mux_a = 0 ; ADC0 phase input 47 | 48 | .equ O_POWER = 180 49 | .equ O_GROUND = 33 50 | 51 | .equ INIT_PC = (1< 1.565V at ADC7) 47 | ;.equ mux_temperature = 6 ; ADC6 temperature input (3.3k from +5V, 10k NTC to gnd) 48 | ;.equ i2c_clk = 5 ; ADC5/SCL 49 | ;.equ i2c_data = 4 ; ADC4/SDA 50 | .equ green_led = 3 ; o 51 | .equ red_led = 2 ; o 52 | .equ mux_a = 1 ; ADC1 phase input 53 | .equ mux_b = 0 ; ADC0 phase input 54 | 55 | .equ O_POWER = 330 56 | .equ O_GROUND = 47 57 | 58 | .equ INIT_PC = (1<<4)+(1<<5)+(1<<6)+(1<<7) 59 | .equ DIR_PC = 0 60 | 61 | .MACRO RED_on 62 | sbi DDRC, red_led 63 | .ENDMACRO 64 | .MACRO RED_off 65 | cbi DDRC, red_led 66 | .ENDMACRO 67 | .MACRO GRN_on 68 | sbi DDRC, green_led 69 | .ENDMACRO 70 | .MACRO GRN_off 71 | cbi DDRC, green_led 72 | .ENDMACRO 73 | 74 | ;********************* 75 | ; PORT D definitions * 76 | ;********************* 77 | ;.equ mux_c = 7 (comparator AN1) 78 | ;.equ sense_star = 6 (comparator AN0) 79 | .equ ENABLE_C = 5 80 | .equ ENABLE_B = 4 81 | .equ ENABLE_A = 3 82 | .equ VBAT_HIGH = 2 83 | .equ txd = 1 84 | .equ PWM_A = 0 85 | 86 | .equ INIT_PD = (1< 1.565V at ADC7) 46 | ;.equ mux_temperature = 6 ; ADC6 temperature input (3.3k from +5V, 10k NTC to gnd) 47 | ;.equ i2c_clk = 5 ; ADC5/SCL 48 | ;.equ i2c_data = 4 ; ADC4/SDA 49 | .equ green_led = 3 ; oish 50 | .equ red_led = 2 ; oish 51 | .equ mux_a = 1 ; ADC1 phase input 52 | .equ mux_b = 0 ; ADC0 phase input 53 | 54 | .equ O_POWER = 330 55 | .equ O_GROUND = 47 56 | 57 | .equ INIT_PC = 0 58 | .equ DIR_PC = (1< .406V at ADC7) 39 | ;.equ = 6 ; ADC6 40 | ;.equ = 5 ; ADC5 41 | .equ mux_c = 4 ; ADC4 phase input 42 | .equ mux_b = 3 ; ADC3 phase input 43 | .equ mux_a = 2 ; ADC2 phase input 44 | ;.equ = 1 ; ADC1 45 | ;.equ = 0 ; ADC0 46 | 47 | .equ O_POWER = 47 48 | .equ O_GROUND = 2 49 | 50 | .equ INIT_PC = 0 51 | .equ DIR_PC = 0 52 | 53 | ;********************* 54 | ; PORT B definitions * 55 | ;********************* 56 | ;.equ = 7 57 | ;.equ = 6 58 | ;.equ = 5 (sck stk200 interface) 59 | ;.equ = 4 (miso stk200 interface) 60 | ;.equ = 3 (mosi stk200 interface) 61 | ;.equ = 2 62 | ;.equ = 1 63 | ;.equ = 0 64 | 65 | .equ INIT_PB = 0 66 | .equ DIR_PB = 0 67 | -------------------------------------------------------------------------------- /boot.inc: -------------------------------------------------------------------------------- 1 | ; Simple boot loader on PWM input pin. 2 | ; 3 | ; We stay here as long as the input pin is pulled high, which is typical 4 | ; for the Turnigy USB Linker. The Turnigy USB Linker sports a SiLabs MCU 5 | ; (5V tolerant I/O) which converts 9600baud serial output from a SiLabs 6 | ; CP2102 USB-to-serial converter to a half duplex wire encoding which 7 | ; avoids signalling that can look like valid drive pulses. All bits are 8 | ; either one or two pulses, as opposed to a serial UART which could go 9 | ; high or low for a long time. This means it _should_ be safe to signal 10 | ; even to an armed ESC, as long as the low end has not been calibrated 11 | ; or set to start at pulses shorter than the linker timing. 12 | ; 13 | ; All transmissions have a leader of 23 1-bits followed by 1 0-bit. 14 | ; Byte encoding starts at the least significant bit and is 8 bits wide. 15 | ; Measuring the Turnigy USB Linker results in the following timings: 16 | ; 1-bits are encoded as 62.0us high, 72.0us low. 17 | ; 0-bits are encoded as 27.7us high, 34.4us low, 34.4us high, 37.7 low. 18 | ; Bit encoding takes about 134us in total. 19 | ; End of encoding adds 34.4us high, then returns to input/pull-up mode. 20 | ; Minimum restart time is 37.0us in input state before the next leader. 21 | ; 22 | ; For this implementation, we always learn the actual timing from the 23 | ; host's leader. The USB linker's implementation seems to accept faster 24 | ; or slower responses, but faster will cause drops between the host and 25 | ; its serial-to-USB conversion at 9600baud, so we always try to match or 26 | ; be slower than the host's timing. It works to use an even fraction for 27 | ; the actual bit timing, but since the total doesn't quite fit in a byte 28 | ; at clk/8 at 16MHz, we store and use the high and low times separately. 29 | ; This implementation should work with much faster pulses than currently 30 | ; used by the USB linker. 31 | ; 32 | ; We support self-flashing ourselves (yo dawg), but doing so in a way 33 | ; that can still respond after each page update is a bit tricky. Some 34 | ; nops are present for future expansion without bumping addresses. 35 | ; 36 | ; We implement STK500v2, as recommended by the avrdude author, rather 37 | ; than implementing a random new protocol. STK500v2 is the only serial 38 | ; protocol that passes the chip signature bytes directly instead of 39 | ; using a lookup table. However, avrdude uses CMD_SPI_MULTI to get 40 | ; these, which is for direct SPI access. We have to catch this and fake 41 | ; the response. We respond to CMD_SIGN_ON with "AVRISP_2", which keeps 42 | ; all messages in the same format and with xor-checksums. We could say 43 | ; "AVRISP_MK2" and drop the message structure after sign-on, but then 44 | ; there is nothing to synchronize messages or do checksums. 45 | ; 46 | ; Note that to work with the Turnigy USB linker, the baud rate must be 47 | ; set to 9600. 48 | ; 49 | ; There seem to be some bugs in the USB linker implementation. With a gap 50 | ; of 5.35ms - 5.75ms between two test characters, the decision seems to 51 | ; be made that another byte is not ready to fit in time, and a second 52 | ; leader is scheduled to start after the minimum restart gap. However, 53 | ; the second byte seems to make it in the first transmission after all, 54 | ; leaving the second one with an empty body. We will process the packet 55 | ; at the end of receiving it, but we won't reply until there is silence, 56 | ; so this should cause no ill effect. However, with a gap of 5.8ms, the 57 | ; linker holds the line low for the duration of the second byte (1056us), 58 | ; drives high for 34.4us, returns to input mode for 447us, then starts a 59 | ; new leader with an empty body. This is not recoverable and may cause us 60 | ; to exit to the application. 61 | ;-- 62 | ; Registers: 63 | ; r0: Temporary, spm data (temp5) 64 | ; r1: Temporary, spm data (temp6) 65 | ; r2: Half-bit low time in timer2 ticks 66 | ; r3: Half-bit high time in timer2 ticks 67 | ; r4: Quarter-bit average time in timer2 ticks 68 | ; r5: stk500v2 message checksum (xor) 69 | ; r6: stk500v2 message length low 70 | ; r7: stk500v2 message length high 71 | ; r8: 7/8th bit time in timer2 ticks 72 | ; r9: stk500v2 sequence number 73 | ; r10: Doubled (word) address l 74 | ; r11: Doubled (word) address h 75 | ; r12: Address l 76 | ; r13: Address h 77 | ; r14: Temporary (for checking TIFR, Z storage) (temp7) 78 | ; r15: Temporary (Z storage) 79 | ; r16: Zero 80 | ; r17: EEPROM read/write flags 81 | ; r18: Unused 82 | ; r19: Unused 83 | ; r20: Set for clearing TOV2/OCF2 flags 84 | ; r21: Timeout 85 | ; r22: Byte storage for bit shifting rx/tx (temp3) 86 | ; r23: Temporary (temp4) 87 | ; r24: Loop counter (temp1) 88 | ; r25: Loop counter (temp2) 89 | ; X: TX pointer 90 | ; Y: RX pointer 91 | ; Z: RX jump state pointer 92 | ; 93 | ; We keep the RX buffer just past start of RAM, 94 | ; and start building the response at the start of ram. 95 | ; The whole RAM area is used as the RX/TX buffer. 96 | .equ RX_BUFFER = SRAM_START + 32 97 | .equ TX_BUFFER = SRAM_START 98 | 99 | ; Number of RX timeouts / unsuccessful restarts before exiting boot loader 100 | ; If we get stray pulses or continuous high/low with no successful bytes 101 | ; received, we will exit the boot loader after this many tries. 102 | .equ BOOT_RX_TRIES = 20 103 | 104 | ; STK message constants 105 | .equ MESSAGE_START = 0x1b 106 | .equ TOKEN = 0x0e 107 | 108 | ; STK general command constants 109 | .equ CMD_SIGN_ON = 0x01 110 | .equ CMD_SET_PARAMETER = 0x02 111 | .equ CMD_GET_PARAMETER = 0x03 112 | .equ CMD_SET_DEVICE_PARAMETERS = 0x04 113 | .equ CMD_OSCCAL = 0x05 114 | .equ CMD_LOAD_ADDRESS = 0x06 115 | .equ CMD_FIRMWARE_UPGRADE = 0x07 116 | .equ CMD_CHECK_TARGET_CONNECTION = 0x0d 117 | .equ CMD_LOAD_RC_ID_TABLE = 0x0e 118 | .equ CMD_LOAD_EC_ID_TABLE = 0x0f 119 | 120 | ; STK ISP command constants 121 | .equ CMD_ENTER_PROGMODE_ISP = 0x10 122 | .equ CMD_LEAVE_PROGMODE_ISP = 0x11 123 | .equ CMD_CHIP_ERASE_ISP = 0x12 124 | .equ CMD_PROGRAM_FLASH_ISP = 0x13 125 | .equ CMD_READ_FLASH_ISP = 0x14 126 | .equ CMD_PROGRAM_EEPROM_ISP = 0x15 127 | .equ CMD_READ_EEPROM_ISP = 0x16 128 | .equ CMD_PROGRAM_FUSE_ISP = 0x17 129 | .equ CMD_READ_FUSE_ISP = 0x18 130 | .equ CMD_PROGRAM_LOCK_ISP = 0x19 131 | .equ CMD_READ_LOCK_ISP = 0x1a 132 | .equ CMD_READ_SIGNATURE_ISP = 0x1b 133 | .equ CMD_READ_OSCCAL_ISP = 0x1c 134 | .equ CMD_SPI_MULTI = 0x1d 135 | 136 | ; STK status constants 137 | .equ STATUS_CMD_OK = 0x00 138 | .equ STATUS_CMD_TOUT = 0x80 139 | .equ STATUS_RDY_BSY_TOUT = 0x81 140 | .equ STATUS_SET_PARAM_MISSING = 0x82 141 | .equ STATUS_CMD_FAILED = 0xc0 142 | .equ STATUS_CKSUM_ERROR = 0xc1 143 | .equ STATUS_CMD_UNKNOWN = 0xc9 144 | .equ STATUS_CMD_ILLEGAL_PARAMETER = 0xca 145 | 146 | ; STK parameter constants 147 | .equ PARAM_BUILD_NUMBER_LOW = 0x80 148 | .equ PARAM_BUILD_NUMBER_HIGH = 0x81 149 | .equ PARAM_HW_VER = 0x90 150 | .equ PARAM_SW_MAJOR = 0x91 151 | .equ PARAM_SW_MINOR = 0x92 152 | .equ PARAM_VTARGET = 0x94 153 | .equ PARAM_VADJUST = 0x95 ; STK500 only 154 | .equ PARAM_OSC_PSCALE = 0x96 ; STK500 only 155 | .equ PARAM_OSC_CMATCH = 0x97 ; STK500 only 156 | .equ PARAM_SCK_DURATION = 0x98 ; STK500 only 157 | .equ PARAM_TOPCARD_DETECT = 0x9a ; STK500 only 158 | .equ PARAM_STATUS = 0x9c ; STK500 only 159 | .equ PARAM_DATA = 0x9d ; STK500 only 160 | .equ PARAM_RESET_POLARITY = 0x9e ; STK500 only, and STK600 FW version <= 2.0.3 161 | .equ PARAM_CONTROLLER_INIT = 0x9f 162 | 163 | ; Support listening on ICP pin (on AfroESCs) 164 | .if defined(USE_ICP) && USE_ICP 165 | .equ RCP_PORT = PORTB 166 | .equ RCP_PIN = PINB 167 | .equ RCP_DDR = DDRB 168 | .else 169 | .equ RCP_PORT = PORTD 170 | .equ RCP_PIN = PIND 171 | .equ RCP_DDR = DDRD 172 | .endif 173 | 174 | ; THIRDBOOTSTART on the ATmega8 is 0xe00. 175 | ; Fuses should have BOOTSZ1 set, BOOTSZ0 unset, BOOTRST set. 176 | ; Last nibble of hfuse should be A or 2 to save EEPROM on chip erase. 177 | ; Do not set WTDON. Implementing support for it here is big/difficult. 178 | .if !defined(BOOT_START) 179 | .equ BOOT_START = THIRDBOOTSTART 180 | .endif 181 | .org BOOT_START 182 | boot_reset: ldi ZL, high(RAMEND) ; Set up stack 183 | ldi ZH, low(RAMEND) 184 | out SPH, ZH 185 | out SPL, ZL 186 | ldi r16, 0 ; Use r16 as zero 187 | ldi ZL, low(stk_rx_start) 188 | ldi ZH, high(stk_rx_start) 189 | ldi YL, low(RX_BUFFER) 190 | ldi YH, high(RX_BUFFER) 191 | ldi XL, low(TX_BUFFER) 192 | ldi XH, high(TX_BUFFER) 193 | ldi r20, (1< 1.900V at ADC2) 43 | .equ mux_temperature = 1 ; ADC1 temperature input (some boards) (10k NTC to 5V, 820 to gnd) 44 | .equ mux_c = 0 ; ADC0 45 | 46 | .equ O_POWER = 220 47 | .equ O_GROUND = 51 48 | 49 | .equ INIT_PC = 0 50 | .equ DIR_PC = (1< 1.900V at ADC2) 39 | ;.equ = 1 40 | .equ mux_c = 0 ; ADC0 41 | 42 | .equ O_POWER = 220 43 | .equ O_GROUND = 51 44 | 45 | .equ INIT_PC = 0 46 | .equ DIR_PC = (1< 1.900V at ADC2) 43 | .equ mux_temperature = 1 ; ADC1 temperature input (some boards) (10k NTC to 5V, 820 to gnd) 44 | .equ mux_c = 0 ; ADC0 45 | 46 | .equ O_POWER = 220 47 | .equ O_GROUND = 51 48 | 49 | .equ INIT_PC = (1< .598V at ADC7) 42 | ;.equ = 6 ; ADC6 43 | ;.equ = 5 ; ADC5 44 | .equ mux_c = 4 ; ADC4 phase input 45 | .equ mux_b = 3 ; ADC3 phase input 46 | .equ mux_a = 2 ; ADC2 phase input 47 | ;.equ = 1 ; ADC1 48 | ;.equ = 0 ; ADC0 49 | 50 | .equ O_POWER = 47 51 | .equ O_GROUND = 2 52 | 53 | .equ INIT_PC = 0 54 | .equ DIR_PC = 0 55 | 56 | ;********************* 57 | ; PORT B definitions * 58 | ;********************* 59 | ;.equ = 7 60 | ;.equ = 6 61 | ;.equ = 5 (sck stk200 interface) 62 | ;.equ = 4 (miso stk200 interface) 63 | ;.equ = 3 (mosi stk200 interface) 64 | ;.equ = 2 65 | ;.equ = 1 66 | ;.equ = 0 67 | 68 | .equ INIT_PB = 0 69 | .equ DIR_PB = 0 70 | -------------------------------------------------------------------------------- /dlux.inc: -------------------------------------------------------------------------------- 1 | ;******************************************** 2 | ;* Turnigy Dlux ESC 20A * 3 | ;* Original fuses are lfuse:0xae hfuse:0xcf * 4 | ;* 2012-10-07 * 5 | ;******************************************** 6 | 7 | .equ F_CPU = 16000000 8 | .equ USE_INT0 = 1 9 | .equ USE_I2C = 0 10 | .equ USE_UART = 0 11 | .equ USE_ICP = 0 12 | 13 | ;********************* 14 | ; PORT D definitions * 15 | ;********************* 16 | .equ BnFET = 7 ;o 17 | .equ AnFET = 5 ;o 18 | .equ ApFET = 4 ;o 19 | ;.equ = 3 20 | .equ rcp_in = 2 ;i r/c pulse input 21 | ;.equ = 1 22 | ;.equ = 0 23 | 24 | .equ INIT_PD = (1< 1.888V at ADC2) 40 | .equ mux_temperature = 1 ; ADC1 41 | .equ mux_c = 0 ; ADC0 phase input 42 | 43 | .equ O_POWER = 220 44 | .equ O_GROUND = 51 45 | 46 | .equ INIT_PC = (1< .410V at ADC7) 39 | ;.equ = 6 ; ADC6 40 | ;.equ = 5 ; ADC5 41 | .equ mux_a = 4 ; ADC4 phase input 42 | .equ mux_b = 3 ; ADC3 phase input 43 | .equ mux_c = 2 ; ADC2 phase input 44 | ;.equ = 1 ; ADC1 45 | ;.equ = 0 ; ADC0 46 | 47 | .equ O_POWER = 47 48 | .equ O_GROUND = 2 49 | 50 | .equ INIT_PC = 0 51 | .equ DIR_PC = 0 52 | 53 | ;********************* 54 | ; PORT B definitions * 55 | ;********************* 56 | ;.equ = 7 57 | ;.equ = 6 58 | ;.equ = 5 (sck stk200 interface) 59 | ;.equ = 4 (miso stk200 interface) 60 | ;.equ = 3 (mosi stk200 interface) 61 | ;.equ = 2 62 | ;.equ = 1 63 | ;.equ = 0 64 | 65 | .equ INIT_PB = 0 66 | .equ DIR_PB = 0 67 | -------------------------------------------------------------------------------- /hm135a.inc: -------------------------------------------------------------------------------- 1 | ;*********************************************************** 2 | ;* Hacker/Jeti Master 135-O-F5B with all FETs on PORTD * 3 | ;* Same pinout as Pulso Advance Plus DLU40A but at 12MHz * 4 | ;*********************************************************** 5 | 6 | .equ F_CPU = 12000000 7 | .equ USE_INT0 = 2 8 | .equ USE_I2C = 0 9 | .equ USE_UART = 0 10 | .equ USE_ICP = 0 11 | 12 | ;********************* 13 | ; PORT D definitions * 14 | ;********************* 15 | .equ ApFET = 7 ;o 16 | .equ c_comp = 6 ;i common comparator input (AIN0) 17 | .equ AnFET = 5 ;o 18 | .equ BnFET = 4 ;o 19 | .equ BpFET = 3 ;o 20 | .equ rcp_in = 2 ;i r/c pulse input, opto-coupled, maybe needs pull-up 21 | .equ CpFET = 1 ;o 22 | .equ CnFET = 0 ;o 23 | 24 | .equ INIT_PD = (1< .598V at ADC7) 38 | ;.equ = 6 ; ADC6 39 | ;.equ = 5 ; ADC5 40 | .equ mux_c = 4 ; ADC4 phase input 41 | .equ mux_b = 3 ; ADC3 phase input 42 | .equ mux_a = 2 ; ADC2 phase input 43 | ;.equ = 1 ; ADC1 44 | ;.equ = 0 ; ADC0 45 | 46 | .equ O_POWER = 47 47 | .equ O_GROUND = 2 48 | 49 | .equ INIT_PC = 0 50 | .equ DIR_PC = 0 51 | 52 | ;********************* 53 | ; PORT B definitions * 54 | ;********************* 55 | ;.equ = 7 56 | ;.equ = 6 57 | ;.equ = 5 (sck stk200 interface) 58 | ;.equ = 4 (miso stk200 interface) 59 | ;.equ = 3 (mosi stk200 interface) 60 | ;.equ = 2 61 | ;.equ = 1 62 | ;.equ = 0 63 | 64 | .equ INIT_PB = 0 65 | .equ DIR_PB = 0 66 | -------------------------------------------------------------------------------- /hxt200a.inc: -------------------------------------------------------------------------------- 1 | ;******************************************* 2 | ;* HexTronik HXT200A * 3 | ;* 2015-01-21 * 4 | ;* Based on prototype schematic from Josef * 5 | ;******************************************* 6 | 7 | .equ F_CPU = 16000000 8 | .equ USE_INT0 = 1 9 | .equ USE_I2C = 0 10 | .equ USE_UART = 1 11 | .equ USE_ICP = 0 12 | 13 | .equ DEAD_LOW_NS = 1400 ; Uncalibrated 14 | .equ DEAD_HIGH_NS = 1700 ; Uncalibrated 15 | .equ MOTOR_ADVANCE = 15 16 | .equ CHECK_HARDWARE = 1 17 | 18 | ;********************* 19 | ; PORT B definitions * 20 | ;********************* 21 | ;.equ = 7 22 | ;.equ = 6 23 | ;.equ = 5 (sck) 24 | ;.equ = 4 (miso) 25 | ;.equ = 3 (mosi) 26 | .equ red_led = 2 27 | ;.equ = 1 28 | .equ AnFET = 0 29 | 30 | .equ INIT_PB = 0 31 | .equ DIR_PB = (1< .969V at ADC2) 51 | .equ mux_temperature = 1 ; ADC1 temperature input (1.5k from +5V, 10k NTC to gnd) 52 | .equ mux_a = 0 ; ADC0 phase input 53 | 54 | .equ O_POWER = 470 55 | .equ O_GROUND = 47 56 | 57 | .equ INIT_PC = 0 58 | .equ DIR_PC = (1< .918V at ADC7) 40 | ;.equ = 6 ; ADC6 41 | ;.equ = 5 ; ADC5 42 | .equ mux_c = 4 ; ADC4 phase input 43 | .equ mux_b = 3 ; ADC3 phase input 44 | .equ mux_a = 2 ; ADC2 phase input 45 | ;.equ = 1 ; ADC1 46 | ;.equ = 0 ; ADC0 47 | 48 | .equ O_POWER = 470 49 | .equ O_GROUND = 47 50 | 51 | .equ INIT_PC = 0 52 | .equ DIR_PC = 0 53 | 54 | ;********************* 55 | ; PORT B definitions * 56 | ;********************* 57 | ;.equ = 7 58 | ;.equ = 6 59 | ;.equ = 5 (sck stk200 interface) 60 | ;.equ = 4 (miso stk200 interface) 61 | ;.equ = 3 (mosi stk200 interface) 62 | ;.equ = 2 63 | ;.equ = 1 64 | ;.equ = 0 65 | 66 | .equ INIT_PB = 0 67 | .equ DIR_PB = 0 68 | -------------------------------------------------------------------------------- /kda_8khz.inc: -------------------------------------------------------------------------------- 1 | ;************************************************* 2 | ;* Keda/Multistar 12A, 20A, 30A with P/N-ch FETs * 3 | ;* 8kHz PWM variant for early-ish 2014 boards * 4 | ;* before they went to an all-N-channel design * 5 | ;************************************************* 6 | 7 | ; Like HK-SS TowerPro clones, it seems some Multistar 30A boards 8 | ; have a P-channel FET gate noise problem that causes overheating 9 | ; if the P-ch body diode is conducting when the PWM chops on. 10 | ; This happens less often at 8kHz, so, uhh...fixed! 11 | 12 | #include "kda.inc" 13 | 14 | .equ T_CPU_MHZ = F_CPU / 1000000 15 | .equ MIN_DUTY = 56 * T_CPU_MHZ / 16 16 | .equ POWER_RANGE = 2000 * T_CPU_MHZ / 16 + MIN_DUTY 17 | -------------------------------------------------------------------------------- /kda_nfet.inc: -------------------------------------------------------------------------------- 1 | ;******************************************** 2 | ;* Multistar 30A with all NFETs on PORTD * 3 | ;* Same as kda but with inverted high side * 4 | ;* Original fuses are lfuse:0x9f hfuse:0xc9 * 5 | ;******************************************** 6 | 7 | .equ F_CPU = 16000000 8 | .equ USE_INT0 = 2 9 | .equ USE_I2C = 0 10 | .equ USE_UART = 0 11 | .equ USE_ICP = 0 12 | 13 | ;********************* 14 | ; PORT D definitions * 15 | ;********************* 16 | .equ BpFET = 7 ;o 17 | .equ c_comp = 6 ;i common comparator input (AIN0) 18 | .equ CpFET = 5 ;o 19 | .equ ApFET = 4 ;o 20 | .equ CnFET = 3 ;o 21 | .equ rcp_in = 2 ;i r/c pulse input 22 | .equ AnFET = 1 ;o 23 | .equ BnFET = 0 ;o 24 | 25 | .equ INIT_PD = (1< .918V at ADC7) 40 | ;.equ = 6 ; ADC6 41 | ;.equ = 5 ; ADC5 42 | .equ mux_c = 4 ; ADC4 phase input 43 | .equ mux_b = 3 ; ADC3 phase input 44 | .equ mux_a = 2 ; ADC2 phase input 45 | ;.equ = 1 ; ADC1 46 | ;.equ = 0 ; ADC0 47 | 48 | .equ O_POWER = 470 49 | .equ O_GROUND = 47 50 | 51 | .equ INIT_PC = 0 52 | .equ DIR_PC = 0 53 | 54 | ;********************* 55 | ; PORT B definitions * 56 | ;********************* 57 | ;.equ = 7 58 | ;.equ = 6 59 | ;.equ = 5 (sck stk200 interface) 60 | ;.equ = 4 (miso stk200 interface) 61 | ;.equ = 3 (mosi stk200 interface) 62 | ;.equ = 2 63 | ;.equ = 1 64 | ;.equ = 0 65 | 66 | .equ INIT_PB = 0 67 | .equ DIR_PB = 0 68 | -------------------------------------------------------------------------------- /kda_nfet_ni.inc: -------------------------------------------------------------------------------- 1 | ;************************************************* 2 | ;* Multistar 6A with all NFETs on PORTD * 3 | ;* Same as kda_nfet but without input inversion; * 4 | ;* also seen on some larger Multistar ESCs and * 5 | ;* Sunrise 20A/40A ESCs, which typically ship * 6 | ;* with 0-ohm resistors jumpering over NPN pads. * 7 | ;************************************************* 8 | 9 | .equ F_CPU = 16000000 10 | .equ USE_INT0 = 1 11 | .equ USE_I2C = 0 12 | .equ USE_UART = 0 13 | .equ USE_ICP = 0 14 | 15 | ;********************* 16 | ; PORT D definitions * 17 | ;********************* 18 | .equ BpFET = 7 ;o 19 | .equ c_comp = 6 ;i common comparator input (AIN0) 20 | .equ CpFET = 5 ;o 21 | .equ ApFET = 4 ;o 22 | .equ CnFET = 3 ;o 23 | .equ rcp_in = 2 ;i r/c pulse input 24 | .equ AnFET = 1 ;o 25 | .equ BnFET = 0 ;o 26 | 27 | .equ INIT_PD = (1< .598V at ADC7) 42 | ;.equ = 6 ; ADC6 43 | ;.equ = 5 ; ADC5 44 | .equ mux_c = 4 ; ADC4 phase input 45 | .equ mux_b = 3 ; ADC3 phase input 46 | .equ mux_a = 2 ; ADC2 phase input 47 | ;.equ = 1 ; ADC1 48 | ;.equ = 0 ; ADC0 49 | 50 | .equ O_POWER = 47 51 | .equ O_GROUND = 2 ; Mystery Cloud-50A seen to have 4.7k here, pfft 52 | 53 | .equ INIT_PC = 0 54 | .equ DIR_PC = 0 55 | 56 | ;********************* 57 | ; PORT B definitions * 58 | ;********************* 59 | ;.equ = 7 60 | ;.equ = 6 61 | ;.equ = 5 (sck stk200 interface) 62 | ;.equ = 4 (miso stk200 interface) 63 | ;.equ = 3 (mosi stk200 interface) 64 | ;.equ = 2 65 | ;.equ = 1 66 | ;.equ = 0 67 | 68 | .equ INIT_PB = 0 69 | .equ DIR_PB = 0 70 | -------------------------------------------------------------------------------- /rb70a.inc: -------------------------------------------------------------------------------- 1 | ;***************************************************** 2 | ;* Red Brick 70A with all FETs on PORTD * 3 | ;* Also Red Brick 200A black (RB200A-BTO) * 4 | ;* Original fuses are lfuse:0x3f hfuse:0xc1 * 5 | ;* If your pcb is blue, you probably need rb70a2.inc * 6 | ;***************************************************** 7 | 8 | .equ F_CPU = 16000000 9 | .equ USE_INT0 = 1 10 | .equ USE_I2C = 0 11 | .equ USE_UART = 0 12 | .equ USE_ICP = 0 13 | 14 | ;********************* 15 | ; PORT D definitions * 16 | ;********************* 17 | .equ CnFET = 7 ;11 o 18 | .equ c_comp = 6 ;10 i common comparator input (AIN0) 19 | .equ CpFET = 5 ;9 o 20 | .equ BpFET = 4 ;2 o 21 | .equ BnFET = 3 ;1 o 22 | .equ rcp_in = 2 ;32 i r/c pulse input 23 | .equ ApFET = 1 ;31 o 24 | .equ AnFET = 0 ;30 o 25 | 26 | .equ INIT_PD = 0 27 | .equ DIR_PD = (1< .402V at ADC7) 40 | ;.equ = 6 ; ADC6 41 | ;.equ = 5 ; ADC5 42 | .equ mux_a = 4 ; ADC4 phase input 43 | .equ mux_b = 3 ; ADC3 phase input 44 | .equ mux_c = 2 ; ADC2 phase input 45 | ;.equ = 1 ; ADC1 46 | ;.equ = 0 ; ADC0 47 | 48 | .equ O_POWER = 47 49 | .equ O_GROUND = 2 50 | 51 | .equ INIT_PC = 0 52 | .equ DIR_PC = 0 53 | 54 | ;********************* 55 | ; PORT B definitions * 56 | ;********************* 57 | ;.equ = 7 58 | ;.equ = 6 59 | ;.equ = 5 (sck stk200 interface) 60 | ;.equ = 4 (miso stk200 interface) 61 | ;.equ = 3 (mosi stk200 interface) 62 | ;.equ = 2 63 | ;.equ = 1 64 | ;.equ = 0 65 | 66 | .equ INIT_PB = 0 67 | .equ DIR_PB = 0 68 | -------------------------------------------------------------------------------- /rb70a2.inc: -------------------------------------------------------------------------------- 1 | ;******************************************** 2 | ;* Red Brick 70A first seen September 2015 * 3 | ;* Blue circuit board labeled 4P0529A * 4 | ;* If this doesn't work, try rb70a or rb50a * 5 | ;* Also new blue HK SS 190-200A boards * 6 | ;******************************************** 7 | 8 | .equ F_CPU = 16000000 9 | .equ USE_INT0 = 1 10 | .equ USE_I2C = 0 11 | .equ USE_UART = 0 12 | .equ USE_ICP = 0 13 | 14 | ;********************* 15 | ; PORT D definitions * 16 | ;********************* 17 | .equ c_comp = 6 ;10 i common comparator input (AIN0) 18 | .equ AnFET = 5 ;30 o 19 | .equ ApFET = 4 ;31 o 20 | .equ rcp_in = 2 ;32 i r/c pulse input 21 | 22 | .equ INIT_PD = 0 23 | .equ DIR_PD = (1< .402V at ADC7) 32 | .equ mux_a = 6 ; ADC6 33 | .equ BpFET = 5 ; ADC5 34 | .equ CnFET = 4 ; ADC4 35 | .equ CpFET = 3 ; ADC3 36 | .equ mux_voltage = 2 ; ADC2 37 | ;.equ = 1 ; ADC1 38 | .equ mux_b = 0 ; ADC0 39 | 40 | .equ BpFET_port = PORTC 41 | .equ CpFET_port = PORTC 42 | .equ CnFET_port = PORTC 43 | 44 | .equ O_POWER = 47 45 | .equ O_GROUND = 2 46 | 47 | .equ INIT_PC = 0 48 | .equ DIR_PC = (1< .598V at ADC7) 42 | ;.equ = 6 ; ADC6 43 | ;.equ = 5 ; ADC5 44 | .equ mux_c = 4 ; ADC4 phase input 45 | .equ mux_b = 3 ; ADC3 phase input 46 | .equ mux_a = 2 ; ADC2 phase input 47 | ;.equ = 1 ; ADC1 48 | ;.equ = 0 ; ADC0 49 | 50 | .equ O_POWER = 47 51 | .equ O_GROUND = 2 52 | 53 | .equ INIT_PC = 0 54 | .equ DIR_PC = 0 55 | 56 | ;********************* 57 | ; PORT B definitions * 58 | ;********************* 59 | ;.equ = 7 60 | ;.equ = 6 61 | ;.equ = 5 (sck stk200 interface) 62 | ;.equ = 4 (miso stk200 interface) 63 | ;.equ = 3 (mosi stk200 interface) 64 | ;.equ = 2 65 | ;.equ = 1 66 | ;.equ = 0 67 | 68 | .equ INIT_PB = 0 69 | .equ DIR_PB = 0 70 | -------------------------------------------------------------------------------- /tbs.inc: -------------------------------------------------------------------------------- 1 | ;***************************************** 2 | ;* TBS ESC * 3 | ;* 2013-03-27 * 4 | ;* Fuses should be lfuse=0x3f hfuse=0xca * 5 | ;***************************************** 6 | 7 | .equ F_CPU = 16000000 8 | .equ USE_INT0 = 0 9 | .equ USE_I2C = 0 10 | .equ USE_UART = 1 11 | .equ USE_ICP = 1 12 | .equ COMP_PWM = 1 13 | 14 | .equ DEAD_LOW_NS = 400 15 | .equ DEAD_HIGH_NS = 400 16 | .equ CHECK_HARDWARE = 1 17 | 18 | ;********************* 19 | ; PORT B definitions * 20 | ;********************* 21 | ;.equ = 7 22 | ;.equ = 6 23 | ;.equ = 5 (sck) 24 | ;.equ = 4 (miso) 25 | ;.equ = 3 (mosi) 26 | ;.equ = 2 27 | ;.equ = 1 28 | .equ rcp_in = 0 ;i r/c pulse input 29 | 30 | .equ INIT_PB = 0 31 | .equ DIR_PB = 0 32 | 33 | ;********************* 34 | ; PORT C definitions * 35 | ;********************* 36 | .equ mux_b = 7 ; ADC7 37 | .equ mux_a = 6 ; ADC6 38 | .equ BpFET = 5 ; ADC5/SCL 39 | .equ AnFET = 4 ; ADC4/SDA 40 | ;.equ = 3 ; ADC3 41 | .equ mux_voltage = 2 ; ADC2 voltage input (18k from Vbat, 3.3k to gnd, 10.10V -> 1.565V at ADC7) 42 | ;.equ = 1 ; ADC1 phase input 43 | .equ mux_c = 0 ; ADC0 phase input 44 | 45 | .equ O_POWER = 180 46 | .equ O_GROUND = 33 47 | 48 | .equ INIT_PC = (1< 1.565V at ADC7) 43 | ;.equ = 1 ; ADC1 phase input 44 | .equ mux_c = 0 ; ADC0 phase input 45 | 46 | .equ O_POWER = 180 47 | .equ O_GROUND = 33 48 | 49 | .equ INIT_PC = 0 50 | .equ DIR_PC = (1< comparator input (AIN0) 23 | ;.equ c_comp = 6 ;i common comparator input (AIN0) 24 | .equ ApFET = 5 ;o 25 | .equ BpFET = 4 ;o 26 | .equ CpFET = 3 ;o 27 | .equ rcp_in = 2 ;i r/c pulse input 28 | 29 | .equ INIT_PD = 0 30 | .equ DIR_PD = (1< .918V at ADC0) 47 | 48 | .equ O_POWER = 10 49 | .equ O_GROUND = 1 50 | 51 | .equ INIT_PC = 0 52 | .equ DIR_PC = 0 53 | 54 | ;********************* 55 | ; PORT B definitions * 56 | ;********************* 57 | ;.equ = 7 58 | ;.equ = 6 59 | ;.equ = 5 (sck stk200 interface) 60 | ;.equ = 4 (miso stk200 interface) 61 | ;.equ = 3 (mosi stk200 interface) 62 | .equ AnFET = 2 63 | .equ BnFET = 1 64 | .equ CnFET = 0 65 | 66 | .equ INIT_PB = 0 67 | .equ DIR_PB = (1< comparator input (AIN0) 23 | ;.equ c_comp = 6 ;i common comparator input (AIN0) 24 | .equ ApFET = 5 ;o 25 | .equ BpFET = 4 ;o 26 | .equ CpFET = 3 ;o 27 | .equ rcp_in = 2 ;i r/c pulse input 28 | 29 | .equ INIT_PD = 0 30 | .equ DIR_PD = (1< 1.772V at ADC0) 47 | 48 | .equ O_POWER = 47 49 | .equ O_GROUND = 10 50 | 51 | .equ INIT_PC = 0 52 | .equ DIR_PC = 0 53 | 54 | ;********************* 55 | ; PORT B definitions * 56 | ;********************* 57 | ;.equ = 7 58 | ;.equ = 6 59 | ;.equ = 5 (sck stk200 interface) 60 | ;.equ = 4 (miso stk200 interface) 61 | ;.equ = 3 (mosi stk200 interface) 62 | .equ AnFET = 2 63 | .equ BnFET = 1 64 | .equ CnFET = 0 65 | 66 | .equ INIT_PB = 0 67 | .equ DIR_PB = (1< .448V at ADC7) 39 | ;.equ = 6 ; ADC6 40 | ;.equ = 5 ; ADC5 41 | .equ mux_c = 4 ; ADC4 phase input 42 | .equ mux_b = 3 ; ADC3 phase input 43 | .equ mux_a = 2 ; ADC2 phase input 44 | ;.equ = 1 ; ADC1 45 | ;.equ = 0 ; ADC0 46 | 47 | .equ O_POWER = 44 ; Seen as 22k + 22k 48 | .equ O_GROUND = 2 49 | 50 | .equ INIT_PC = 0 51 | .equ DIR_PC = 0 52 | 53 | ;********************* 54 | ; PORT B definitions * 55 | ;********************* 56 | ;.equ = 7 57 | ;.equ = 6 58 | ;.equ = 5 (sck stk200 interface) 59 | ;.equ = 4 (miso stk200 interface) 60 | ;.equ = 3 (mosi stk200 interface) 61 | ;.equ = 2 62 | ;.equ = 1 63 | ;.equ = 0 64 | 65 | .equ INIT_PB = 0 66 | .equ DIR_PB = 0 67 | -------------------------------------------------------------------------------- /tp_8khz.inc: -------------------------------------------------------------------------------- 1 | ;*********************************************************** 2 | ;* TowerPro 17A / 25A / HK-18A "type 1" boards * 3 | ;* with all FETs on PORTD * 4 | ;*********************************************************** 5 | 6 | ; Some TowerPro type 1 clones have a P-channel FET gate noise 7 | ; problem that causes self-destruction if the P-ch body diode 8 | ; is conducting when the PWM chops on. This happens less often 9 | ; at 8kHz, so, uhh...fixed! 10 | 11 | #include "tp.inc" 12 | 13 | .equ T_CPU_MHZ = F_CPU / 1000000 14 | .equ MIN_DUTY = 56 * T_CPU_MHZ / 16 15 | .equ POWER_RANGE = 2000 * T_CPU_MHZ / 16 + MIN_DUTY 16 | -------------------------------------------------------------------------------- /tp_i2c.inc: -------------------------------------------------------------------------------- 1 | ;*********************************************************** 2 | ;* TowerPro 17A / 25A / HK-18A "type 1" boards * 3 | ;* with all FETs on PORTD * 4 | ;* ONLY for boards modified for i2c input * 5 | ;* as with Bernhard's 17a410_i2c_r08.zip * 6 | ;* http://home.versanet.de/~b-konze/ * 7 | ;* http://home.versanet.de/~b-konze/blc_18a/blc_18a.htm * 8 | ;*********************************************************** 9 | 10 | .equ F_CPU = 16000000 11 | .equ USE_INT0 = 0 12 | .equ USE_I2C = 1 13 | .equ USE_UART = 0 14 | .equ USE_ICP = 0 15 | 16 | ;********************* 17 | ; PORT D definitions * 18 | ;********************* 19 | .equ BpFET = 7 ;o 20 | .equ c_comp = 6 ;i common comparator input (AIN0) 21 | .equ ApFET = 5 ;o 22 | .equ CpFET = 4 ;o 23 | .equ CnFET = 3 ;o 24 | .equ rcp_in = 2 ;i r/c pulse input 25 | .equ BnFET = 1 ;o 26 | .equ AnFET = 0 ;o 27 | 28 | .equ INIT_PD = 0 29 | .equ DIR_PD = (1< comparator input (AIN0) 17 | ;.equ c_comp = 6 ;i common comparator input (AIN0) 18 | .equ ApFET = 5 ;o 19 | .equ BpFET = 4 ;o 20 | .equ CpFET = 3 ;o 21 | .equ rcp_in = 2 ;i r/c pulse input 22 | 23 | .equ INIT_PD = 0 24 | .equ DIR_PD = (1< .936V at ADC0) 41 | 42 | .equ O_POWER = 625 ; 10k 43 | .equ O_GROUND = 61 ; 976 44 | 45 | .equ INIT_PC = 0 46 | .equ DIR_PC = 0 47 | 48 | ;********************* 49 | ; PORT B definitions * 50 | ;********************* 51 | ;.equ = 7 52 | ;.equ = 6 53 | ;.equ = 5 (sck stk200 interface) 54 | ;.equ = 4 (miso stk200 interface) 55 | ;.equ = 3 (mosi stk200 interface) 56 | .equ AnFET = 2 57 | .equ BnFET = 1 58 | .equ CnFET = 0 59 | 60 | .equ INIT_PB = (1<