├── rootdir └── system │ └── etc │ ├── BCM4356.hcd │ ├── camera │ ├── imx241_chromatix.xml │ ├── imx300_chromatix.xml │ └── camera_config.xml │ ├── wifi │ └── bcmdhd.cal │ ├── audio_policy.conf │ ├── sensors │ └── sensor_def_qcomdev.conf │ ├── thermanager.xml │ ├── libnfc-brcm.conf │ └── libnfc-nxp.conf ├── Android.mk ├── README.md ├── vendorsetup.sh ├── AndroidProducts.mk ├── BoardConfig.mk ├── aosp_e6883.mk ├── aosp_e6853.mk ├── device.mk └── overlay └── frameworks └── base └── core └── res └── res ├── xml └── power_profile.xml └── values └── config.xml /rootdir/system/etc/BCM4356.hcd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/sonyxperiadev/device-sony-satsuki/HEAD/rootdir/system/etc/BCM4356.hcd -------------------------------------------------------------------------------- /Android.mk: -------------------------------------------------------------------------------- 1 | # 2 | # This empty Android.mk file exists to prevent the build system from 3 | # automatically including any other Android.mk files under this directory. 4 | # 5 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | Copyright (C) Sony Mobile Communications 2015 2 | ============================================= 3 | 4 | This is the Android device configuration for Xperia Z5 Premium(kitakami platform). 5 | 6 | Build instructions 7 | https://developer.sony.com/develop/open-devices/guides/aosp-build-instructions/ 8 | -------------------------------------------------------------------------------- /vendorsetup.sh: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright 2014 The Android Open Source Project 3 | # 4 | # Licensed under the Apache License, Version 2.0 (the "License"); 5 | # you may not use this file except in compliance with the License. 6 | # You may obtain a copy of the License at 7 | # 8 | # http://www.apache.org/licenses/LICENSE-2.0 9 | # 10 | # Unless required by applicable law or agreed to in writing, software 11 | # distributed under the License is distributed on an "AS IS" BASIS, 12 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | # See the License for the specific language governing permissions and 14 | # limitations under the License. 15 | # 16 | 17 | add_lunch_combo aosp_e6853-userdebug 18 | add_lunch_combo aosp_e6883-userdebug 19 | -------------------------------------------------------------------------------- /AndroidProducts.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2014 The Android Open Source Project 2 | # 3 | # Licensed under the Apache License, Version 2.0 (the "License"); 4 | # you may not use this file except in compliance with the License. 5 | # You may obtain a copy of the License at 6 | # 7 | # http://www.apache.org/licenses/LICENSE-2.0 8 | # 9 | # Unless required by applicable law or agreed to in writing, software 10 | # distributed under the License is distributed on an "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | # See the License for the specific language governing permissions and 13 | # limitations under the License. 14 | 15 | PRODUCT_MAKEFILES := $(LOCAL_DIR)/aosp_e6853.mk \ 16 | $(LOCAL_DIR)/aosp_e6883.mk 17 | 18 | -------------------------------------------------------------------------------- /BoardConfig.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2014 The Android Open Source Project 2 | # 3 | # Licensed under the Apache License, Version 2.0 (the "License"); 4 | # you may not use this file except in compliance with the License. 5 | # You may obtain a copy of the License at 6 | # 7 | # http://www.apache.org/licenses/LICENSE-2.0 8 | # 9 | # Unless required by applicable law or agreed to in writing, software 10 | # distributed under the License is distributed on an "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | # See the License for the specific language governing permissions and 13 | # limitations under the License. 14 | 15 | include device/sony/kitakami/PlatformConfig.mk 16 | 17 | TARGET_BOOTLOADER_BOARD_NAME := E6853 18 | 19 | WIFI_BUS := PCIE 20 | 21 | BOARD_KERNEL_CMDLINE += androidboot.hardware=satsuki 22 | 23 | TARGET_TAP_TO_WAKE_NODE := "/sys/devices/virtual/input/clearpad/wakeup_gesture" 24 | -------------------------------------------------------------------------------- /aosp_e6883.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2014 The Android Open Source Project 2 | # 3 | # Licensed under the Apache License, Version 2.0 (the "License"); 4 | # you may not use this file except in compliance with the License. 5 | # You may obtain a copy of the License at 6 | # 7 | # http://www.apache.org/licenses/LICENSE-2.0 8 | # 9 | # Unless required by applicable law or agreed to in writing, software 10 | # distributed under the License is distributed on an "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | # See the License for the specific language governing permissions and 13 | # limitations under the License. 14 | 15 | # Inherit from those products. Most specific first. 16 | $(call inherit-product, device/sony/satsuki/aosp_e6853.mk) 17 | 18 | # DualSim 19 | PRODUCT_PROPERTY_OVERRIDES += \ 20 | persist.multisim.config=dsds \ 21 | persist.radio.multisim.config=dsds \ 22 | ro.telephony.default_network=9,1 23 | 24 | PRODUCT_NAME := aosp_e6883 25 | PRODUCT_DEVICE := satsuki 26 | PRODUCT_MODEL := Xperia Z5 Premium Dual (AOSP) 27 | PRODUCT_BRAND := Sony 28 | PRODUCT_MANUFACTURER := Sony 29 | -------------------------------------------------------------------------------- /aosp_e6853.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2014 The Android Open Source Project 2 | # 3 | # Licensed under the Apache License, Version 2.0 (the "License"); 4 | # you may not use this file except in compliance with the License. 5 | # You may obtain a copy of the License at 6 | # 7 | # http://www.apache.org/licenses/LICENSE-2.0 8 | # 9 | # Unless required by applicable law or agreed to in writing, software 10 | # distributed under the License is distributed on an "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | # See the License for the specific language governing permissions and 13 | # limitations under the License. 14 | 15 | TARGET_KERNEL_CONFIG := aosp_kitakami_satsuki_defconfig 16 | 17 | # Inherit from those products. Most specific first. 18 | $(call inherit-product, device/sony/satsuki/device.mk) 19 | $(call inherit-product, frameworks/native/build/phone-xhdpi-2048-dalvik-heap.mk) 20 | $(call inherit-product, $(SRC_TARGET_DIR)/product/aosp_base_telephony.mk) 21 | 22 | PRODUCT_NAME := aosp_e6853 23 | PRODUCT_DEVICE := satsuki 24 | PRODUCT_MODEL := Xperia Z5 Premium (AOSP) 25 | PRODUCT_BRAND := Sony 26 | PRODUCT_MANUFACTURER := Sony 27 | -------------------------------------------------------------------------------- /rootdir/system/etc/camera/imx241_chromatix.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | imx241_common 5 | imx241_postproc 6 | imx241_cpp_preview 7 | imx241_cpp_snapshot 8 | imx241_cpp_liveshot 9 | 10 | 11 | 12 | 13 | imx241_snapshot 14 | imx241_snapshot 15 | imx241_video 16 | imx241_cpp_video 17 | imx241_zsl_preview 18 | imx241_zsl_video 19 | 20 | 21 | imx241_preview 22 | imx241_preview 23 | imx241_video 24 | imx241_cpp_video 25 | imx241_postproc 26 | imx241_default_preview 27 | imx241_default_video 28 | 29 | 30 | 31 | -------------------------------------------------------------------------------- /rootdir/system/etc/camera/imx300_chromatix.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | imx300_common 5 | imx300_postproc 6 | 7 | 8 | 9 | 10 | imx300_snapshot 11 | imx300_snapshot 12 | imx300_snapshot 13 | imx300_cpp_preview 14 | imx300_cpp_snapshot 15 | imx300_cpp_video 16 | imx300_cpp_liveshot 17 | imx300_default_preview_bu64747gwz 18 | imx300_default_video_bu64747gwz 19 | 20 | 21 | imx300_preview 22 | imx300_preview 23 | imx300_preview 24 | imx300_cpp_preview 25 | imx300_cpp_snapshot 26 | imx300_cpp_video 27 | imx300_cpp_liveshot 28 | imx300_default_preview_bu64747gwz 29 | imx300_default_video_bu64747gwz 30 | 31 | 32 | 33 | -------------------------------------------------------------------------------- /rootdir/system/etc/camera/camera_config.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 0 4 | imx300 5 | pmic 6 | imx300_chromatix 7 | 1 8 | BACK 9 | 90 10 | 11 | 0 12 | 0x1F 13 | 0x4320 14 | 0 15 | 16 | 17 | 4.23 18 | 2.0 19 | 1.9 20 | 64.1 21 | 51.6 22 | 0.1 23 | 24 | 25 | 26 | 1 27 | imx241 28 | imx241_chromatix 29 | 1 30 | FRONT 31 | 360 32 | 33 | 1 34 | 0x7 35 | 0x4320 36 | 0 37 | 38 | 39 | 2.12 40 | 2.4 41 | 1.2 42 | 54.8 43 | 42.5 44 | 0.1 45 | 46 | 47 | 48 | -------------------------------------------------------------------------------- /device.mk: -------------------------------------------------------------------------------- 1 | # Copyright 2014 The Android Open Source Project 2 | # 3 | # Licensed under the Apache License, Version 2.0 (the "License"); 4 | # you may not use this file except in compliance with the License. 5 | # You may obtain a copy of the License at 6 | # 7 | # http://www.apache.org/licenses/LICENSE-2.0 8 | # 9 | # Unless required by applicable law or agreed to in writing, software 10 | # distributed under the License is distributed on an "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | # See the License for the specific language governing permissions and 13 | # limitations under the License. 14 | 15 | # Device path 16 | DEVICE_PATH := device/sony/satsuki 17 | 18 | DEVICE_PACKAGE_OVERLAYS += \ 19 | $(DEVICE_PATH)/overlay 20 | 21 | PRODUCT_COPY_FILES := \ 22 | $(DEVICE_PATH)/rootdir/system/etc/audio_policy.conf:system/etc/audio_policy.conf \ 23 | $(DEVICE_PATH)/rootdir/system/etc/BCM4356.hcd:system/etc/firmware/BCM43xx.hcd \ 24 | $(DEVICE_PATH)/rootdir/system/etc/wifi/bcmdhd.cal:system/etc/wifi/bcmdhd.cal \ 25 | $(DEVICE_PATH)/rootdir/system/etc/sensors/sensor_def_qcomdev.conf:system/etc/sensors/sensor_def_qcomdev.conf \ 26 | $(DEVICE_PATH)/rootdir/system/etc/thermanager.xml:system/etc/thermanager.xml \ 27 | $(DEVICE_PATH)/rootdir/system/etc/libnfc-brcm.conf:system/etc/libnfc-brcm.conf \ 28 | $(DEVICE_PATH)/rootdir/system/etc/libnfc-nxp.conf:system/etc/libnfc-nxp.conf \ 29 | $(DEVICE_PATH)/rootdir/system/etc/mixer_paths.xml:system/etc/mixer_paths.xml 30 | 31 | # Device Specific Permissions 32 | PRODUCT_COPY_FILES += \ 33 | frameworks/native/data/etc/handheld_core_hardware.xml:system/etc/permissions/handheld_core_hardware.xml \ 34 | frameworks/native/data/etc/android.hardware.fingerprint.xml:system/etc/permissions/android.hardware.fingerprint.xml \ 35 | frameworks/native/data/etc/android.hardware.telephony.gsm.xml:system/etc/permissions/android.hardware.telephony.gsm.xml \ 36 | frameworks/native/data/etc/android.hardware.sensor.barometer.xml:system/etc/permissions/android.hardware.sensor.barometer.xml \ 37 | frameworks/native/data/etc/android.hardware.sensor.gyroscope.xml:system/etc/permissions/android.hardware.sensor.gyroscope.xml 38 | 39 | # Device Init 40 | PRODUCT_PACKAGES += \ 41 | init.recovery.satsuki \ 42 | init.satsuki \ 43 | ueventd.satsuki 44 | 45 | # Lights 46 | PRODUCT_PACKAGES += \ 47 | lights.satsuki 48 | 49 | # Simple PowerHAL 50 | PRODUCT_PACKAGES += \ 51 | power.satsuki 52 | 53 | # Fingerprint HAL 54 | PRODUCT_PACKAGES += \ 55 | fingerprintd \ 56 | fingerprint.satsuki 57 | 58 | # NFC config 59 | PRODUCT_PACKAGES += \ 60 | nfc_nci.satsuki 61 | 62 | # Telephony Packages (AOSP) 63 | PRODUCT_PACKAGES += \ 64 | InCallUI \ 65 | Stk 66 | 67 | # SAR 68 | PRODUCT_PACKAGES += \ 69 | TransPowerSensors 70 | 71 | PRODUCT_AAPT_CONFIG := normal 72 | PRODUCT_AAPT_PREBUILT_DPI := xxhdpi xhdpi hdpi 73 | PRODUCT_AAPT_PREF_CONFIG := xxhdpi 74 | 75 | PRODUCT_PROPERTY_OVERRIDES := \ 76 | ro.sf.lcd_density=480 \ 77 | ro.usb.pid_suffix=1DB 78 | 79 | ## 8MP Switch for ES 80 | PRODUCT_PROPERTY_OVERRIDES += \ 81 | persist.camera.8mp.config=true 82 | 83 | # Inherit from those products. Most specific first. 84 | $(call inherit-product, device/sony/kitakami/platform.mk) 85 | $(call inherit-product, vendor/sony/kitakami-satsuki/satsuki-vendor.mk) 86 | 87 | # copy wlan firmware 88 | $(call inherit-product-if-exists, hardware/broadcom/wlan/bcmdhd/firmware/bcm4356/device-bcm.mk) 89 | -------------------------------------------------------------------------------- /overlay/frameworks/base/core/res/res/xml/power_profile.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 0 4 | 89.89 5 | 0.1 6 | 0.61 7 | 39.93 8 | 447.69 9 | 2.19 10 | 94.22 11 | 0.1 12 | 0.1 13 | 0.1 14 | 178.62 15 | 0.29 16 | 153.62 17 | 132.21 18 | 0.74 19 | 9.37 20 | 51.70 21 | 22 | 9.01 23 | 8.28 24 | 7.53 25 | 6.78 26 | 6.04 27 | 28 | 29 | 384000 30 | 460800 31 | 600000 32 | 672000 33 | 768000 34 | 864000 35 | 960000 36 | 1248000 37 | 1344000 38 | 1478400 39 | 1555200 40 | 41 | 42 | 384000 43 | 480000 44 | 633600 45 | 768000 46 | 864000 47 | 960000 48 | 1248000 49 | 1344000 50 | 1440000 51 | 1536000 52 | 1632000 53 | 1728000 54 | 1824000 55 | 1958400 56 | 57 | 4.66 58 | 59 | 39.96 60 | 43.41 61 | 46.21 62 | 48.55 63 | 51.43 64 | 55.45 65 | 58.72 66 | 71.81 67 | 76.52 68 | 83.71 69 | 88.25 70 | 71 | 72 | 83.34 73 | 92.39 74 | 105.66 75 | 120.27 76 | 134.08 77 | 146.66 78 | 179.14 79 | 193.78 80 | 211.58 81 | 220.23 82 | 240.82 83 | 258.02 84 | 276.53 85 | 399.00 86 | 87 | 88 | 4 89 | 4 90 | 91 | 40.36 92 | 3430 93 | 94 | .0002 95 | .002 96 | .02 97 | .2 98 | 2 99 | 100 | -------------------------------------------------------------------------------- /overlay/frameworks/base/core/res/res/values/config.xml: -------------------------------------------------------------------------------- 1 | 2 | 19 | 20 | 22 | 23 | 33 | 34 | 16 35 | 64 36 | 144 37 | 256 38 | 400 39 | 576 40 | 784 41 | 1024 42 | 1296 43 | 1600 44 | 1936 45 | 2304 46 | 2704 47 | 3136 48 | 3600 49 | 4096 50 | 51 | 52 | 56 | 57 | 10 58 | 16 59 | 32 60 | 48 61 | 64 62 | 80 63 | 96 64 | 112 65 | 128 66 | 144 67 | 160 68 | 176 69 | 192 70 | 208 71 | 224 72 | 240 73 | 255 74 | 75 | 76 | 78 | 10 79 | 80 | 83 | 5 84 | 85 | 88 | 10 89 | 90 | 97 | 5 98 | 99 | 100 | true 101 | 102 | 103 | http://uaprof.sonymobile.com/E6853R3211.xml 104 | 105 | -------------------------------------------------------------------------------- /rootdir/system/etc/wifi/bcmdhd.cal: -------------------------------------------------------------------------------- 1 | # Copyright (C) 2015 Sony Mobile Communications Inc. 2 | NVRAMRev=$Rev: 492111 $ 3 | sromrev=11 4 | boardrev=0x1101 5 | ## boardtype is subject to change 6 | boardtype=0x0735 7 | boardflags=0x12401201 8 | #enable eLNA both 2G/5G 9 | boardflags2=0x00802000 10 | boardflags3=0x48000109 11 | #boardnum=57410 12 | macaddr=00:90:4c:16:70:01 13 | ccode=XT 14 | regrev=54 15 | antswitch=0 16 | pdgain5g=4 17 | pdgain2g=4 18 | 19 | femctrl=10 20 | vendid=0x14e4 21 | devid=0x43ec 22 | manfid=0x2d0 23 | #prodid=0x052e 24 | nocrc=1 25 | otpimagesize=484 26 | xtalfreq=37400 27 | rxgains2gelnagaina0=2 28 | #rxgains2gtrisoa0=6 29 | rxgains2gtrisoa0=8 30 | rxgains2gtrelnabypa0=1 31 | rxgains5gelnagaina0=2 32 | rxgains5gtrisoa0=6 33 | rxgains5gtrelnabypa0=1 34 | rxgains5gmelnagaina0=2 35 | rxgains5gmtrisoa0=6 36 | rxgains5gmtrelnabypa0=1 37 | rxgains5ghelnagaina0=2 38 | rxgains5ghtrisoa0=6 39 | rxgains5ghtrelnabypa0=1 40 | rxgains2gelnagaina1=2 41 | #rxgains2gtrisoa1=6 42 | rxgains2gtrisoa1=8 43 | rxgains2gtrelnabypa1=1 44 | rxgains5gelnagaina1=2 45 | rxgains5gtrisoa1=6 46 | rxgains5gtrelnabypa1=1 47 | rxgains5gmelnagaina1=2 48 | rxgains5gmtrisoa1=6 49 | rxgains5gmtrelnabypa1=1 50 | rxgains5ghelnagaina1=2 51 | rxgains5ghtrisoa1=6 52 | rxgains5ghtrelnabypa1=1 53 | rxchain=3 54 | txchain=3 55 | ag0=1 56 | ag1=1 57 | ## aa2g/aa5g should be set to 3 - 8/29 58 | aa2g=3 59 | aa5g=3 60 | 61 | agbg0=0 62 | agbg1=0 63 | aga0=0 64 | aga1=0 65 | tssipos2g=1 66 | extpagain2g=2 67 | tssipos5g=1 68 | extpagain5g=2 69 | tempthresh=120 70 | temps_hysteresis=15 71 | tempoffset=255 72 | rawtempsense=0x1ff 73 | 74 | tworangetssi2g=1 75 | tworangetssi5g=0 76 | lowpowerrange2g=0 77 | lowpowerrange5g=0 78 | 79 | #pa2gccka0=-145,6220,-699 80 | #pa2gccka1=-167,5991,-703 81 | #pa2ga0=-194,5543,-677 82 | #pa2ga1=-198,5466,-674 83 | 84 | pa2ga0=-151,5895,-687 85 | pa2ga1=-149,5797,-667 86 | pa5ga0=-181,5980,-717,-180,6058,-723,-189,5930,-715,-170,6150,-732 87 | pa5ga1=-181,5950,-717,-180,6058,-723,-189,5938,-715,-170,6216,-732 88 | 89 | pa2ga2=-140,4083,-571 90 | pa2ga3=-154,3985,-568 91 | #pa5ga2=-153,3951,-562,-156,4006,-560,-152,4080,-566,-153,3850,-546 92 | #pa5ga3=-165,3846,-551,-160,4023,-566,-157,4138,-574,-167,3953,-552 93 | 94 | maxp2ga0=118 95 | maxp5ga0=102,104,106,106 96 | maxp2ga1=114 97 | maxp5ga1=102,102,102,102 98 | subband5gver=0x4 99 | 100 | pdoffsetcckma0=0x4 101 | pdoffsetcckma1=0x4 102 | 103 | pdoffset40ma0=0x0000 104 | pdoffset80ma0=0x0000 105 | pdoffset40ma1=0x0000 106 | pdoffset80ma1=0x0000 107 | 108 | cckbw202gpo=0x5555,0x1111 109 | cckbw20ul2gpo=0x0000,0x0000 110 | mcsbw202gpo=0xccccca81,0x11111111 111 | mcsbw402gpo=0xccccca81,0x11111111 112 | dot11agofdmhrbw202gpo=0x8888,0x1111 113 | ofdmlrbw202gpo=0x0061,0x0011 114 | mcsbw205glpo=0x88866440,0x11111111 115 | mcsbw405glpo=0xcca86644,0x11111111 116 | mcsbw805glpo=0xcaaaaaaa,0x11111111 117 | mcsbw205gmpo=0x88866440,0x11111111 118 | mcsbw405gmpo=0xcca86644,0x11111111 119 | mcsbw805gmpo=0xcaaaaaaa,0x11111111 120 | mcsbw205ghpo=0x88866440,0x11111111 121 | mcsbw405ghpo=0xcca86644,0x11111111 122 | mcsbw805ghpo=0xcaaaaaaa,0x11111111 123 | 124 | mcslr5glpo=0x0000 125 | mcslr5gmpo=0x0000 126 | mcslr5ghpo=0x0000 127 | sb20in40hrpo=0x0 128 | sb20in80and160hr5glpo=0x0 129 | sb40and80hr5glpo=0x0 130 | sb20in80and160hr5gmpo=0x0 131 | sb40and80hr5gmpo=0x0 132 | sb20in80and160hr5ghpo=0x0 133 | sb40and80hr5ghpo=0x0 134 | sb20in40lrpo=0x0 135 | sb20in80and160lr5glpo=0x0 136 | sb40and80lr5glpo=0x0 137 | sb20in80and160lr5gmpo=0x0 138 | sb40and80lr5gmpo=0x0 139 | sb20in80and160lr5ghpo=0x0 140 | sb40and80lr5ghpo=0x0 141 | dot11agduphrpo=0x0 142 | dot11agduplrpo=0x0 143 | phycal_tempdelta=25 144 | temps_period=15 145 | AvVmid_c0=2,140,2,145,2,145,2,145,2,145 146 | AvVmid_c1=2,140,2,145,2,145,2,145,2,145 147 | 148 | #epsdelta2g0=0 149 | #epsdelta2g1=0 150 | ofdmfilttype=1 151 | ##cckfilttype 152 | cckdigfilttype=5 153 | phy4350_ss_opt=1 154 | ## SWCTRL map changed - 8/28 155 | swctrlmap_5g=0x02020202,0x05050404,0x04040000,0x000000,0x047 156 | swctrlmap_2g=0x140c140c,0x28300820,0x08200000,0x803020,0x0ff 157 | ## muxenab to enable OOB signal - needed for final board 158 | muxenab=0x11 159 | host_wake_opt=0 160 | papdwar=4 161 | 162 | tssisleep_en=0x1f 163 | cck_onecore_tx=1 164 | 165 | rssi_delta_2g_c0=4,3,0,0 166 | rssi_delta_2g_c1=3,4,0,0 167 | rssi_delta_5gl_c0=-1,0,0,0,0,0 168 | rssi_delta_5gml_c0=-1,0,0,0,0,0 169 | rssi_delta_5gmu_c0=-1,-2,0,-1,0,-1 170 | rssi_delta_5gh_c0=-1,-1,0,-1,0,-1 171 | rssi_delta_5gl_c1=2,5,2,5,2,5 172 | rssi_delta_5gml_c1=2,4,3,5,3,4 173 | rssi_delta_5gmu_c1=1,0,1,0,2,0 174 | rssi_delta_5gh_c1=1,0,1,0,2,0 175 | 176 | #rssicorrnorm_c0=0,0 177 | #rssicorrnorm_c1=0,0 178 | #rssicorrnorm5g_c0=0,0,0,0,0,0,0,0,0,0,0,0 179 | #rssicorrnorm5g_c1=0,0,0,0,0,0,0,0,0,0,0,0 180 | 181 | ltecxmux=0x78560 182 | 183 | initxidx2g=37 184 | initxidx5g=36 185 | 186 | sbpowoffs5g20mtna0=0,0,0,0 187 | sbpowoffs5g40mtna0=0,0,0,0 188 | sbpowoffs5g80mtna0=0,0,0,0 189 | sbpowoffs5g20mtna1=0,0,0,0 190 | sbpowoffs5g40mtna1=0,0,0,0 191 | sbpowoffs5g80mtna1=0,0,0,0 192 | 193 | powoffs2gtna0=0,-2,-4,-4,-2,0,0,0,0,-2,-3,-2,0,0 194 | powoffs2gtna1=0,0,0,0,0,0,-1,-1,0,0,0,0,0,0 195 | powoffs5g20mtna0=0,0,0,0,0,0,0 196 | powoffs5g40mtna0=0,0,0,0,0 197 | powoffs5g80mtna0=0,0,0,0,0 198 | powoffs5g20mtna1=0,0,0,0,0,0,0 199 | powoffs5g40mtna1=0,0,0,0,0 200 | powoffs5g80mtna1=0,0,0,0,0 201 | 202 | ed_thresh2g=-65 203 | ed_thresh5g=-65 204 | 205 | btc_mode=1 206 | -------------------------------------------------------------------------------- /rootdir/system/etc/audio_policy.conf: -------------------------------------------------------------------------------- 1 | # Global configuration section: 2 | # - lists input and output devices always present on the device 3 | # as well as the output device selected by default. 4 | # Devices are designated by a string that corresponds to the enum in audio.h 5 | # - defines whether the speaker output path uses DRC 6 | # "TRUE" means DRC is enabled, "FALSE" or omission means DRC isn't used. 7 | 8 | global_configuration { 9 | attached_output_devices AUDIO_DEVICE_OUT_EARPIECE|AUDIO_DEVICE_OUT_SPEAKER|AUDIO_DEVICE_OUT_TELEPHONY_TX 10 | default_output_device AUDIO_DEVICE_OUT_SPEAKER 11 | attached_input_devices AUDIO_DEVICE_IN_BUILTIN_MIC|AUDIO_DEVICE_IN_BACK_MIC|AUDIO_DEVICE_IN_REMOTE_SUBMIX|AUDIO_DEVICE_IN_TELEPHONY_RX|AUDIO_DEVICE_IN_FM_TUNER 12 | } 13 | 14 | # audio hardware module section: contains descriptors for all audio hw modules present on the 15 | # device. Each hw module node is named after the corresponding hw module library base name. 16 | # For instance, "primary" corresponds to audio.primary..so. 17 | # The "primary" module is mandatory and must include at least one output with 18 | # AUDIO_OUTPUT_FLAG_PRIMARY flag. 19 | # Each module descriptor contains one or more output profile descriptors and zero or more 20 | # input profile descriptors. Each profile lists all the parameters supported by a given output 21 | # or input stream category. 22 | # The "channel_masks", "formats", "devices" and "flags" are specified using strings corresponding 23 | # to enums in audio.h and audio_policy.h. They are concatenated by use of "|" without space or "\n". 24 | 25 | audio_hw_modules { 26 | primary { 27 | outputs { 28 | primary { 29 | sampling_rates 44100|48000 30 | channel_masks AUDIO_CHANNEL_OUT_STEREO 31 | formats AUDIO_FORMAT_PCM_16_BIT 32 | devices AUDIO_DEVICE_OUT_EARPIECE|AUDIO_DEVICE_OUT_SPEAKER|AUDIO_DEVICE_OUT_WIRED_HEADSET|AUDIO_DEVICE_OUT_WIRED_HEADPHONE|AUDIO_DEVICE_OUT_ALL_SCO|AUDIO_DEVICE_OUT_AUX_DIGITAL 33 | flags AUDIO_OUTPUT_FLAG_PRIMARY 34 | } 35 | deep_buffer { 36 | sampling_rates 8000|11025|12000|16000|22050|24000|32000|44100|48000 37 | channel_masks AUDIO_CHANNEL_OUT_STEREO 38 | formats AUDIO_FORMAT_PCM_16_BIT 39 | devices AUDIO_DEVICE_OUT_SPEAKER|AUDIO_DEVICE_OUT_EARPIECE|AUDIO_DEVICE_OUT_WIRED_HEADSET|AUDIO_DEVICE_OUT_WIRED_HEADPHONE|AUDIO_DEVICE_OUT_ALL_SCO|AUDIO_DEVICE_OUT_AUX_DIGITAL 40 | flags AUDIO_OUTPUT_FLAG_DEEP_BUFFER 41 | } 42 | hdmi { 43 | sampling_rates 44100|48000 44 | channel_masks dynamic 45 | formats AUDIO_FORMAT_PCM_16_BIT 46 | devices AUDIO_DEVICE_OUT_AUX_DIGITAL 47 | flags AUDIO_OUTPUT_FLAG_DIRECT 48 | } 49 | compress_offload { 50 | sampling_rates 8000|11025|12000|16000|22050|24000|32000|44100|48000 51 | channel_masks AUDIO_CHANNEL_OUT_MONO|AUDIO_CHANNEL_OUT_STEREO 52 | formats AUDIO_FORMAT_MP3|AUDIO_FORMAT_AAC_LC|AUDIO_FORMAT_AAC_HE_V1|AUDIO_FORMAT_AAC_HE_V2 53 | devices AUDIO_DEVICE_OUT_SPEAKER|AUDIO_DEVICE_OUT_WIRED_HEADSET|AUDIO_DEVICE_OUT_WIRED_HEADPHONE 54 | flags AUDIO_OUTPUT_FLAG_DIRECT|AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD|AUDIO_OUTPUT_FLAG_NON_BLOCKING 55 | } 56 | voice_tx { 57 | sampling_rates 8000|16000|48000 58 | channel_masks AUDIO_CHANNEL_OUT_STEREO|AUDIO_CHANNEL_OUT_MONO 59 | formats AUDIO_FORMAT_PCM_16_BIT 60 | devices AUDIO_DEVICE_OUT_TELEPHONY_TX 61 | } 62 | } 63 | inputs { 64 | primary { 65 | sampling_rates 8000|11025|12000|16000|22050|24000|32000|44100|48000 66 | channel_masks AUDIO_CHANNEL_IN_MONO|AUDIO_CHANNEL_IN_STEREO|AUDIO_CHANNEL_IN_FRONT_BACK 67 | formats AUDIO_FORMAT_PCM_16_BIT 68 | devices AUDIO_DEVICE_IN_BUILTIN_MIC|AUDIO_DEVICE_IN_WIRED_HEADSET|AUDIO_DEVICE_IN_BLUETOOTH_SCO_HEADSET|AUDIO_DEVICE_IN_VOICE_CALL|AUDIO_DEVICE_IN_BACK_MIC|AUDIO_DEVICE_IN_FM_TUNER 69 | } 70 | voice_rx { 71 | sampling_rates 8000|16000|48000 72 | channel_masks AUDIO_CHANNEL_IN_STEREO|AUDIO_CHANNEL_IN_MONO 73 | formats AUDIO_FORMAT_PCM_16_BIT 74 | devices AUDIO_DEVICE_IN_TELEPHONY_RX 75 | } 76 | } 77 | } 78 | a2dp { 79 | outputs { 80 | a2dp { 81 | sampling_rates 44100 82 | channel_masks AUDIO_CHANNEL_OUT_STEREO 83 | formats AUDIO_FORMAT_PCM_16_BIT 84 | devices AUDIO_DEVICE_OUT_ALL_A2DP 85 | } 86 | } 87 | inputs { 88 | a2dp { 89 | sampling_rates 44100|48000 90 | channel_masks AUDIO_CHANNEL_IN_MONO|AUDIO_CHANNEL_IN_STEREO 91 | formats AUDIO_FORMAT_PCM_16_BIT 92 | devices AUDIO_DEVICE_IN_BLUETOOTH_A2DP 93 | } 94 | } 95 | } 96 | usb { 97 | outputs { 98 | usb_accessory { 99 | sampling_rates 44100 100 | channel_masks AUDIO_CHANNEL_OUT_STEREO 101 | formats AUDIO_FORMAT_PCM_16_BIT 102 | devices AUDIO_DEVICE_OUT_USB_ACCESSORY 103 | } 104 | usb_device { 105 | sampling_rates dynamic 106 | channel_masks dynamic 107 | formats dynamic 108 | devices AUDIO_DEVICE_OUT_USB_DEVICE 109 | } 110 | } 111 | inputs { 112 | usb_device { 113 | sampling_rates dynamic 114 | channel_masks dynamic 115 | formats dynamic 116 | devices AUDIO_DEVICE_IN_USB_DEVICE 117 | } 118 | } 119 | } 120 | r_submix { 121 | outputs { 122 | submix { 123 | sampling_rates 48000 124 | channel_masks AUDIO_CHANNEL_OUT_STEREO 125 | formats AUDIO_FORMAT_PCM_16_BIT 126 | devices AUDIO_DEVICE_OUT_REMOTE_SUBMIX 127 | } 128 | } 129 | inputs { 130 | submix { 131 | sampling_rates 48000 132 | channel_masks AUDIO_CHANNEL_IN_STEREO 133 | formats AUDIO_FORMAT_PCM_16_BIT 134 | devices AUDIO_DEVICE_IN_REMOTE_SUBMIX 135 | } 136 | } 137 | } 138 | } 139 | -------------------------------------------------------------------------------- /rootdir/system/etc/sensors/sensor_def_qcomdev.conf: -------------------------------------------------------------------------------- 1 | # 2 | # File: sensor_def_qcomdev.conf 3 | # 4 | # Tihs file contains default sensor registry values for Qualcomm development 5 | # test platforms. 6 | # 7 | # Copyright (c) 2013 Qualcomm Technologies, Inc. All Rights Reserved. 8 | # Qualcomm Technologies Proprietary and Confidential 9 | # 10 | # NOTE: This file has been modified by Sony Mobile Communications Inc. 11 | # Modifications are Copyright (C) 2014 Sony Mobile Communications Inc., 12 | # and licensed under the license of the file. 13 | 14 | # File format: 15 | # 16 | # Lines starting with "#" are comments and ignored. 17 | # 18 | # File metadata uses this format: 19 | # :key value1 value2 20 | # 21 | # The following keys are defined: 22 | # - "version" : value1 is non-zero positive version number of the file. This 23 | # number will be stored in the sensors registry. It should be equal to the 24 | # largest version of any item. It will be saved in the sensors registry for 25 | # later use when initializing values. See the item format below. 26 | # This value should only be specified once in the file. 27 | # 28 | # - "hardware" : The value1 will be compared to the "Hardware" string from 29 | # the property of ro.board.platform. 30 | # Items will only be used as default values in the registry if the hardware 31 | # string value is a substring of the ro.board.platform string. 32 | # This metadata key can be used more than once, so that one file can support 33 | # more than one type of hardware. 34 | # The value may be NULL, indicating common item values for all hardware. 35 | # 36 | # - "platform" : Similar to the "hardware" key, but this string will need to 37 | # match the text of either /sys/devices/soc0/hw_platform or 38 | # /sys/devices/soc0/platform_subtype. 39 | # 40 | # - "soc_id" : Similar to the "hardware" key, but this string will need to 41 | # match the text of /sys/devices/soc0/soc_id. 42 | # 43 | # - "property" : value1 is the Android system property key, and value2 is 44 | # the desired property value. If the system property value matches the 45 | # desired property value, then the following items will be applied. 46 | # This metadata key can be used more than once, in which case the new 47 | # property value overrides the old. 48 | # value1 and 2 may be NULL, indicating common item values for all properties. 49 | # 50 | # Registry items are in lines with the following format: 51 | # 52 | # Where: 53 | # itemID is the numeric item ID defined in sns_reg_api_v02.h 54 | # 55 | # "value" is the numeric value of the item. 56 | # 57 | # "version" is a non-zero version of the item value. 58 | # The version field will be compared against the previous saved 59 | # value in the sensors registry. If this value is greater than the 60 | # saved value, the default will be applied. Otherwise, the default 61 | # will be skipped. 62 | # 63 | # Registry item values will only be applied if the hardware, platform, and 64 | # property values match for the current hardware configuration. 65 | # 66 | # The numeric fields are parsed with the strtoull function, base 0. 67 | # 68 | 69 | :version 0x00010001 70 | 71 | ######################################################################## 72 | ### 8994 Chipsets 73 | ######################################################################## 74 | :hardware 8994 75 | :platform 76 | :property 77 | # Orientation of sensors 78 | # accel x/y/z 79 | 700 1 0x00010001 #accel-x-axis 80 | 701 -2 0x00010001 #accel-y-axis 81 | 702 -3 0x00010001 #accel-z-axis 82 | # gyro x/y/z 83 | 800 1 0x00010001 #gyro-x-axis 84 | 801 -2 0x00010001 #gyro-y-axis 85 | 802 -3 0x00010001 #gyro-z-axis 86 | # mag x/y/z 87 | 900 -2 0x00010001 #mag-x-axis 88 | 901 3 0x00010001 #mag-y-axis 89 | 902 -1 0x00010001 #mag-z-axis 90 | # SSI SMGR Version 91 | 1900 1 0x00010001 #Maj Ver 92 | 1901 1 0x00010001 #Min Ver 93 | 94 | # SAM config 95 | # 96 | 203 65536 0x10001 # AMD 97 | 225 327680 0x10001 # RMD 98 | 504 65536 0x10001 # Gyro Cal 99 | 1703 65536 0x10001 # Ped 100 | 2800 327680 0x10001 # basic ges 101 | 2900 327680 0x10001 # Facing 102 | 3400 65536 0x10001 # CMC 103 | 609 65536 0x10001 # FMV 104 | 1005 65536 0x10001 # Grav 105 | 1103 65536 0x10001 # orientation 106 | 3000 65536 0x10001 # gyro quat 107 | 3100 65536 0x10001 # rot vec 108 | 3500 65536 0x10001 # game rv 109 | 4112 65536 0x10001 # SMD 110 | 111 | # SSI SMGR Cfg 0 ICM-20628 Accelerometer DRI 112 | 1903 0x0b25b8431bfd46bc 0x00010001 #UUID 113 | 1902 0xc14075963795c661 0x00010001 #UUID 114 | 1904 500000 0x00010001 #off_to_idle 115 | 1905 2000 0x00010001 #idle_to_ready 116 | 1906 5 0x00010001 #i2c_bus 117 | 1907 1000 0x00010001 #reg_group_id 118 | 1908 0 0x00010001 #cal_grp_id 119 | 1909 64 0x00010001 #gpio1 120 | 1910 0xFFFF 0x00010001 #gpio2 121 | 1911 0 0x00010001 #sensor_id 122 | 1912 0x68 0x00010001 #i2c_address 123 | 1913 1 0x00010001 #data_type1 124 | 1914 0 0x00010001 #data_type2 125 | 1915 1 0x00010001 #rel_sns_idx 126 | 1916 1 0x00010001 #sens_default 127 | 1917 0xD0 0x00010001 #flags 128 | 1982 0 0x00010001 #device_select 129 | 130 | # SSI SMGR Cfg 1 ICM-20628 Gyroscope DRI 131 | 1919 0x0b25b8431bfd46bc 0x00010001 #UUID 132 | 1918 0xc14075963795c661 0x00010001 #UUID 133 | 1920 500000 0x00010001 #off_to_idle 134 | 1921 2000 0x00010001 #idle_to_ready 135 | 1922 5 0x00010001 #i2c_bus 136 | 1923 1010 0x00010001 #reg_group_id 137 | 1924 10 0x00010001 #cal_grp_id 138 | 1925 64 0x00010001 #gpio1 139 | 1926 0xFFFF 0x00010001 #gpio2 140 | 1927 10 0x00010001 #sensor_id 141 | 1928 0x68 0x00010001 #i2c_address 142 | 1929 3 0x00010001 #data_type1 143 | 1930 0 0x00010001 #data_type2 144 | 1931 0 0x00010001 #rel_sns_idx 145 | 1932 3 0x00010001 #sens_default 146 | 1933 0xD0 0x00010001 #flags 147 | 1983 0 0x00010001 #device_select 148 | 149 | # SSI SMGR Cfg 2 AK09912C DRI 150 | 1935 0x0b25b8431bfd46bc 0x00010001 #UUID 151 | 1934 0xc14075963795c661 0x00010001 #UUID 152 | 1936 500000 0x00010001 #off_to_idle 153 | 1937 2000 0x00010001 #idle_to_ready 154 | 1938 5 0x00010001 #i2c_bus 155 | 1939 1020 0x00010001 #reg_group_id 156 | 1940 0xFFFF 0x00010001 #cal_grp_id 157 | 1941 64 0x00010001 #gpio1 158 | 1942 0xFFFF 0x00010001 #gpio2 159 | 1943 20 0x00010001 #sensor_id 160 | 1944 0x0c 0x00010001 #i2c_address 161 | 1945 2 0x00010001 #data_type1 162 | 1946 0 0x00010001 #data_type2 163 | 1947 0xFF 0x00010001 #rel_sns_idx 164 | 1948 0 0x00010001 #sens_default 165 | 1949 0xD0 0x00010001 #flags 166 | 1984 0 0x00010001 #device_select 167 | 168 | # SSI SMGR Cfg 3: HSPPAD038A POLL 169 | 1951 0x5588c14de03f6490 0x00010001 #UUID 170 | 1950 0x69469b7038b0dde8 0x00010001 #UUID 171 | 1952 7680 0x00010001 #off_to_idle 172 | 1953 10000 0x00010001 #idle_to_ready 173 | 1954 5 0x00010001 #i2c_bus 174 | 1955 0xFFFF 0x00010001 #reg_group_id 175 | 1956 0xFFFF 0x00010001 #cal_grp_id 176 | 1957 76 0x00010001 #gpio1 177 | 1958 0xFFFF 0x00010001 #gpio2 178 | 1959 30 0x00010001 #sensor_id 179 | 1960 0x48 0x00010001 #i2c_address 180 | 1961 7 0x00010001 #data_type1 181 | 1962 0 0x00010001 #data_type2 182 | 1963 0xFF 0x00010001 #rel_sns_idx 183 | 1964 0 0x00010001 #sens_default 184 | 1965 0 0x00010001 #flags 185 | 1985 0 0x00010001 #device_select 186 | 187 | # SSI SMGR Cfg 4: APDS9910 DRI 188 | 1967 0x2c95aafbde68bd9d 0x00010001 #UUID 189 | 1966 0xc04992988b1365d3 0x00010001 #UUID 190 | 1968 10000 0x00010001 #off_to_idle 191 | 1969 5000 0x00010001 #idle_to_ready 192 | 1970 5 0x00010001 #i2c_bus 193 | 1971 1040 0x00010001 #reg_group_id 194 | 1972 0xFFFF 0x00010001 #cal_grp_id 195 | 1973 40 0x00010001 #gpio1 196 | 1974 0xFFFF 0x00010001 #gpio2 197 | 1975 40 0x00010001 #sensor_id 198 | 1976 0x39 0x00010001 #i2c_address 199 | 1977 5 0x00010001 #data_type1 200 | 1978 6 0x00010001 #data_type2 201 | 1979 0xFF 0x00010001 #rel_sns_idx 202 | 1980 0 0x00010001 #sens_default 203 | 1981 0x80 0x00010001 #flags 204 | 1986 0 0x00010001 #device_select 205 | 103 0x384 0x00010001 #prx_near_thresh 206 | 104 0x320 0x00010001 #prx_far_thresh 207 | 105 0 0x00010001 #prx_factor 208 | 106 100 0x00010001 #als_factor 209 | 107 1 0x00010001 #version_num 210 | 108 0x58 0x00010001 #id 211 | 109 7 0x00010001 #als_change_pcnt 212 | 110 0x04 0x00010001 #prx_pulse 213 | 111 0x00 0x00010001 #prx_drive 214 | 112 0x08 0x00010001 #prx_gain 215 | 113 1999 0x00010001 #als_coe_b 216 | 114 252 0x00010001 #als_coe_c 217 | 115 450 0x00010001 #als_coe_d 218 | 116 326 0x00010001 #als_dgf 219 | 117 12800 0x00010001 #als_ch0_default 220 | 118 3117 0x00010001 #als_ch1_default 221 | 119 0x00 0x00010001 #prx_offset 222 | 223 | # SSI SMGR Cfg 5 ICM-20628 Game Rotation Vector DRI 224 | 3603 0x0b25b8431bfd46bc 0x00010001 #UUID 225 | 3602 0xc14075963795c661 0x00010001 #UUID 226 | 3604 500000 0x00010001 #off_to_idle 227 | 3605 2000 0x00010001 #idle_to_ready 228 | 3606 5 0x00010001 #i2c_bus 229 | 3607 0xFFFF 0x00010001 #reg_group_id 230 | 3608 0xFFFF 0x00010001 #cal_grp_id 231 | 3609 64 0x00010001 #gpio1 232 | 3610 0xFFFF 0x00010001 #gpio2 233 | 3611 226 0x00010001 #sensor_id 234 | 3612 0x68 0x00010001 #i2c_address 235 | 3613 26 0x00010001 #data_type 236 | 3614 34 0x00010001 #data_type2 237 | 3615 0xFF 0x00010001 #rel_sns_idx 238 | 3616 0 0x00010001 #sens_default 239 | 3617 0xD0 0x00010001 #flags 240 | 3682 0 0x00010001 #device_select 241 | 242 | # SSI SMGR Cfg 6 ICM-20628 SMD DRI 243 | 3619 0x0b25b8431bfd46bc 0x00010001 #UUID 244 | 3618 0xc14075963795c661 0x00010001 #UUID 245 | 3620 500000 0x00010001 #off_to_idle 246 | 3621 2000 0x00010001 #idle_to_ready 247 | 3622 5 0x00010001 #i2c_bus 248 | 3623 0xFFFF 0x00010001 #reg_group_id 249 | 3624 0xFFFF 0x00010001 #cal_grp_id 250 | 3625 64 0x00010001 #gpio1 251 | 3626 0xFFFF 0x00010001 #gpio2 252 | 3627 224 0x00010001 #sensor_id 253 | 3628 0x68 0x00010001 #i2c_address 254 | 3629 25 0x00010001 #data_type1 255 | 3630 0 0x00010001 #data_type2 256 | 3631 0xFF 0x00010001 #rel_sns_idx 257 | 3632 0 0x00010001 #sens_default 258 | 3633 0xC0 0x00010001 #flags 259 | 3683 0 0x00010001 #device_select 260 | 261 | # SSI SMGR Cfg 7 ICM-20628 Step Counter DRI 262 | 3635 0x0b25b8431bfd46bc 0x00010001 #UUID 263 | 3634 0xc14075963795c661 0x00010001 #UUID 264 | 3636 500000 0x00010001 #off_to_idle 265 | 3637 2000 0x00010001 #idle_to_ready 266 | 3638 5 0x00010001 #i2c_bus 267 | 3639 0xFFFF 0x00010001 #reg_group_id 268 | 3640 0xFFFF 0x00010001 #cal_grp_id 269 | 3641 64 0x00010001 #gpio1 270 | 3642 0xFFFF 0x00010001 #gpio2 271 | 3643 222 0x00010001 #sensor_id 272 | 3644 0x68 0x00010001 #i2c_address 273 | 3645 24 0x00010001 #data_type1 274 | 3646 0 0x00010001 #data_type2 275 | 3647 0xFF 0x00010001 #rel_sns_idx 276 | 3648 0 0x00010001 #sens_default 277 | 3649 0xC0 0x00010001 #flags 278 | 3684 0 0x00010001 #device_select 279 | 280 | # SSI SMGR Cfg 8 ICM-20628 Step Detector DRI 281 | 3651 0x0b25b8431bfd46bc 0x00010001 #UUID 282 | 3650 0xc14075963795c661 0x00010001 #UUID 283 | 3652 500000 0x00010001 #off_to_idle 284 | 3653 2000 0x00010001 #idle_to_ready 285 | 3654 5 0x00010001 #i2c_bus 286 | 3655 0xFFFF 0x00010001 #reg_group_id 287 | 3656 0xFFFF 0x00010001 #cal_grp_id 288 | 3657 64 0x00010001 #gpio1 289 | 3658 0xFFFF 0x00010001 #gpio2 290 | 3659 220 0x00010001 #sensor_id 291 | 3660 0x68 0x00010001 #i2c_address 292 | 3661 23 0x00010001 #data_type1 293 | 3662 0 0x00010001 #data_type2 294 | 3663 0xFF 0x00010001 #rel_sns_idx 295 | 3664 0 0x00010001 #sens_default 296 | 3665 0xD0 0x00010001 #flags 297 | 3685 0 0x00010001 #device_select 298 | 299 | # 300 | # SSI GPIO configuration 301 | #----------------------------- 302 | 2700 1 0x00010001 #maj ver 303 | 2701 0 0x00010001 #min ver 304 | 2702 23 0x00010001 #I2C SDA_1 305 | 2703 24 0x00010001 #I2C SCL_1 306 | 2704 0xFFFF 0x00010001 #I2C SDA_2(Reserved) 307 | 2705 0xFFFF 0x00010001 #I2C SCL_2(Reserved) 308 | 309 | # Mag Cal config 310 | #----------------------------- 311 | 3801 1 0x00010001 312 | 3804 0x000a0000 0x10001 #Sample Rate 313 | -------------------------------------------------------------------------------- /rootdir/system/etc/thermanager.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | /sys/class/thermal/thermal_zone0 5 | /sys/class/thermal/thermal_zone1 6 | 7 | /sys/class/thermal/thermal_zone2 8 | /sys/class/thermal/thermal_zone3 9 | /sys/class/thermal/thermal_zone4 10 | /sys/class/thermal/thermal_zone5 11 | /sys/class/thermal/thermal_zone6 12 | /sys/class/thermal/thermal_zone7 13 | 14 | /sys/class/thermal/thermal_zone8 15 | /sys/class/thermal/thermal_zone9 16 | /sys/class/thermal/thermal_zone10 17 | /sys/class/thermal/thermal_zone11 18 | /sys/class/thermal/thermal_zone12 19 | /sys/class/thermal/thermal_zone13 20 | /sys/class/thermal/thermal_zone14 21 | /sys/class/thermal/thermal_zone15 22 | /sys/class/thermal/thermal_zone16 23 | /sys/class/thermal/thermal_zone17 24 | 25 | /sys/class/thermal/thermal_zone18 26 | /sys/class/thermal/thermal_zone19 27 | /sys/class/thermal/thermal_zone20 28 | /sys/class/thermal/thermal_zone21 29 | /sys/class/thermal/thermal_zone22 30 | /sys/class/thermal/thermal_zone23 31 | /sys/class/thermal/thermal_zone24 32 | /sys/class/thermal/thermal_zone25 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | /sys/module/msm_performance/parameters/cpu_max_freq 64 | /sys/module/msm_performance/parameters/cpu_max_freq 65 | 66 | 67 | /sys/devices/system/cpu/cpuquiet/nr_thermal_max_cpus 68 | 69 | 70 | /sys/class/kgsl/kgsl-3d0/max_gpuclk 71 | /sys/class/power_supply/usb/current_max 72 | /sys/class/power_supply/battery/system_temp_level 73 | /sys/class/power_supply/battery/charging_enabled 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 1500000 84 | 1100000 85 | 900000 86 | 700000 87 | 500000 88 | 300000 89 | 150000 90 | 91 | 92 | 93 | 1 94 | 0 95 | 96 | 97 | 98 | 99 | 0 100 | 1 101 | 2 102 | 3 103 | 4 104 | 5 105 | 6 106 | 7 107 | 8 108 | 9 109 | 10 110 | 11 111 | 12 112 | 113 | 114 | 115 | 0 116 | 1 117 | 118 | 119 | 120 | NORMAL 121 | WARNING 122 | CRITICAL 123 | 124 | 125 | 126 | 127 | 128 | 129 | 130 | 131 | 600000000 132 | 510000000 133 | 450000000 134 | 390000000 135 | 305000000 136 | 180000000 137 | 138 | 139 | 140 | 141 | 0:4294967295 142 | 0:1478400 143 | 0:1344000 144 | 0:1248000 145 | 0:960000 146 | 0:864000 147 | 0:768000 148 | 0:672000 149 | 0:600000 150 | 0:460800 151 | 0:384000 152 | 153 | 154 | 155 | 156 | 4:4294967295 157 | 4:1824000 158 | 4:1728000 159 | 4:1632000 160 | 4:1536000 161 | 4:1440000 162 | 4:1344000 163 | 4:1248000 164 | 4:960000 165 | 4:864000 166 | 4:768000 167 | 4:633600 168 | 4:480000 169 | 4:384000 170 | 171 | 172 | 173 | 174 | 8 175 | 7 176 | 6 177 | 5 178 | 4 179 | 180 | 181 | 182 | 183 | 184 | 185 | 186 | 187 | 188 | 189 | 190 | 191 | 192 | 193 | 194 | 195 | 196 | 197 | 198 | 199 | 200 | 201 | 202 | 203 | 204 | 205 | 206 | 207 | 208 | 209 | 210 | 211 | 212 | 213 | 214 | 215 | 216 | 217 | 218 | 219 | 220 | 221 | 222 | 223 | 224 | 225 | 226 | 227 | 228 | 229 | 230 | 231 | 232 | 233 | 234 | 235 | 236 | 237 | 238 | 239 | 240 | 241 | 242 | 243 | 244 | 245 | 246 | 247 | 248 | 249 | 250 | 251 | 252 | 253 | 254 | 255 | 256 | 257 | 258 | 259 | 260 | 261 | 262 | 263 | 264 | 265 | 266 | 267 | 268 | 269 | 270 | 271 | 272 | 273 | 274 | 275 | 276 | 277 | 278 | 279 | 280 | 281 | 282 | 283 | 284 | 285 | 286 | 287 | 288 | 289 | 290 | 291 | 292 | 293 | 294 | 295 | 296 | 297 | 298 | 299 | 300 | 301 | 302 | 303 | 304 | 305 | 306 | 307 | 308 | 309 | 310 | 311 | 312 | 313 | 314 | 315 | 316 | 317 | 318 | 319 | 320 | 321 | 322 | 323 | 324 | 325 | 326 | 327 | 328 | 329 | 330 | 331 | 332 | 333 | 334 | 335 | 336 | 337 | 338 | 339 | 340 | 341 | 342 | 343 | 344 | 345 | 346 | 347 | 348 | 349 | 350 | 351 | 352 | 353 | 354 | 355 | 356 | 357 | 358 | 359 | 360 | 361 | 362 | -------------------------------------------------------------------------------- /rootdir/system/etc/libnfc-brcm.conf: -------------------------------------------------------------------------------- 1 | ## this file is used by Broadcom's Hardware Abstraction Layer at external/libnfc-nci/halimpl/ 2 | 3 | ############################################################################### 4 | # Application options 5 | APPL_TRACE_LEVEL=0xFF 6 | PROTOCOL_TRACE_LEVEL=0xFFFFFFFF 7 | 8 | ############################################################################### 9 | # performance measurement 10 | # Change this setting to control how often USERIAL log the performance (throughput) 11 | # data on read/write/poll 12 | # defailt is to log performance dara for every 100 read or write 13 | #REPORT_PERFORMANCE_MEASURE=100 14 | 15 | ############################################################################### 16 | # File used for NFA storage 17 | NFA_STORAGE="/data/nfc" 18 | 19 | ############################################################################### 20 | # Snooze Mode Settings 21 | # 22 | # By default snooze mode is enabled. Set SNOOZE_MODE_CFG byte[0] to 0 23 | # to disable. 24 | # 25 | # If SNOOZE_MODE_CFG is not provided, the default settings are used: 26 | # They are as follows: 27 | # 8 Sleep Mode (0=Disabled 1=UART 8=SPI/I2C) 28 | # 0 Idle Threshold Host 29 | # 0 Idle Threshold HC 30 | # 0 NFC Wake active mode (0=ActiveLow 1=ActiveHigh) 31 | # 1 Host Wake active mode (0=ActiveLow 1=ActiveHigh) 32 | # 33 | #SNOOZE_MODE_CFG={08:00:00:00:01} 34 | 35 | ############################################################################### 36 | # Insert a delay in milliseconds after NFC_WAKE and before write to NFCC 37 | NFC_WAKE_DELAY=20 38 | 39 | ############################################################################### 40 | # Various Delay settings (in ms) used in USERIAL 41 | # POWER_ON_DELAY 42 | # Delay after turning on chip, before writing to transport (default 300) 43 | # PRE_POWER_OFF_DELAY 44 | # Delay after deasserting NFC-Wake before turn off chip (default 0) 45 | # POST_POWER_OFF_DELAY 46 | # Delay after turning off chip, before USERIAL_close returns (default 0) 47 | # 48 | #POWER_ON_DELAY=300 49 | #PRE_POWER_OFF_DELAY=0 50 | #POST_POWER_OFF_DELAY=0 51 | 52 | ############################################################################### 53 | # LPTD mode configuration 54 | # byte[0] is the length of the remaining bytes in this value 55 | # if set to 0, LPTD params will NOT be sent to NFCC (i.e. disabled). 56 | # byte[1] is the param id it should be set to B9. 57 | # byte[2] is the length of the LPTD parameters 58 | # byte[3] indicates if LPTD is enabled 59 | # if set to 0, LPTD will be disabled (parameters will still be sent). 60 | # byte[4-n] are the LPTD parameters. 61 | # By default, LPTD is enabled and default settings are used. 62 | # See nfc_hal_dm_cfg.c for defaults 63 | LPTD_CFG={23:B9:21:01:02:FF:FF:04:A0:0F:40:00:80:02:02:10:00:00:00:31:0C:30:00:00:00:00:00:00:00:00:00:00:00:00:00:00} 64 | 65 | ############################################################################### 66 | # Startup Configuration (100 bytes maximum) 67 | # 68 | # For the 0xCA parameter, byte[9] (marked by 'AA') is for UICC0, and byte[10] (marked by BB) is 69 | # for UICC1. The values are defined as: 70 | # 0 : UICCx only supports ISO_DEP in low power mode. 71 | # 2 : UICCx only supports Mifare in low power mode. 72 | # 3 : UICCx supports both ISO_DEP and Mifare in low power mode. 73 | # 74 | # AA BB 75 | NFA_DM_START_UP_CFG={1F:CB:01:01:A5:01:01:CA:14:00:00:00:00:06:E8:03:00:00:00:00:00:00:00:00:00:00:00:00:00:80:01:01} 76 | 77 | ############################################################################### 78 | # Startup Vendor Specific Configuration (100 bytes maximum); 79 | # byte[0] TLV total len = 0x5 80 | # byte[1] NCI_MTS_CMD|NCI_GID_PROP = 0x2f 81 | # byte[2] NCI_MSG_FRAME_LOG = 0x9 82 | # byte[3] 2 83 | # byte[4] 0=turn off RF frame logging; 1=turn on 84 | # byte[5] 0=turn off SWP frame logging; 1=turn on 85 | # NFA_DM_START_UP_VSC_CFG={05:2F:09:02:01:01} 86 | 87 | ############################################################################### 88 | # Total Duration Configuration (msec) 89 | # Min=0x0000 Max=0xFFFF(65535) 90 | NFA_DM_DISC_DURATION_POLL=300 91 | 92 | ############################################################################### 93 | # Antenna Configuration - This data is used when setting 0xC8 config item 94 | # at startup (before discovery is started). If not used, no value is sent. 95 | # 96 | # The settings for this value are documented here: 97 | # http://wcgbu.broadcom.com/wpan/PM/Project%20Document%20Library/bcm20791B0/ 98 | # Design/Doc/PHY%20register%20settings/BCM20791-B2-1027-02_PHY_Recommended_Reg_Settings.xlsx 99 | # This document is maintained by Paul Forshaw. 100 | # 101 | # The values marked as ?? should be tweaked per antenna or customer/app: 102 | # {20:C8:1E:06:??:00:??:??:??:00:??:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:??:01:00:00:40:04} 103 | # array[0] = 0x20 is length of the payload from array[1] to the end 104 | # array[1] = 0xC8 is PREINIT_DSP_CFG 105 | #PREINIT_DSP_CFG={20:C8:1E:06:1F:00:0F:03:3C:00:04:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:48:01:00:00:40:04} 106 | 107 | ############################################################################### 108 | # Configure crystal frequency when internal LPO can't detect the frequency. 109 | #XTAL_FREQUENCY=0 110 | ############################################################################### 111 | # Configure the default Destination Gate used by HCI (the default is 4, which 112 | # is the ETSI loopback gate. 113 | NFA_HCI_DEFAULT_DEST_GATE=0xF0 114 | 115 | ############################################################################### 116 | # Configure the single default SE to use. The default is to use the first 117 | # SE that is detected by the stack. This value might be used when the phone 118 | # supports multiple SE (e.g. 0xF3 and 0xF4) but you want to force it to use 119 | # one of them (e.g. 0xF4). 120 | #ACTIVE_SE=0xF3 121 | 122 | ############################################################################### 123 | # Configure the NFC Extras to open and use a static pipe. If the value is 124 | # not set or set to 0, then the default is use a dynamic pipe based on a 125 | # destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value 126 | # for each UICC (where F3="UICC0" and F4="UICC1") 127 | #NFA_HCI_STATIC_PIPE_ID_F3=0x70 128 | #NFA_HCI_STATIC_PIPE_ID_01=0x19 129 | NFA_HCI_STATIC_PIPE_ID_C0=0x19 130 | ############################################################################### 131 | # When disconnecting from Oberthur secure element, perform a warm-reset of 132 | # the secure element to deselect the applet. 133 | # The default hex value of the command is 0x3. If this variable is undefined, 134 | # then this feature is not used. 135 | OBERTHUR_WARM_RESET_COMMAND=0x03 136 | 137 | ############################################################################### 138 | # Force UICC to only listen to the following technology(s). 139 | # The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. 140 | # Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | NFA_TECHNOLOGY_MASK_F 141 | UICC_LISTEN_TECH_MASK=0x07 142 | 143 | ############################################################################### 144 | # Force HOST listen feature enable or disable. 145 | # 0: Disable 146 | # 1: Enable 147 | HOST_LISTEN_ENABLE=0x01 148 | 149 | ############################################################################### 150 | # Enabling/Disabling Forward functionality 151 | # Disable 0x00 152 | # Enable 0x01 153 | NXP_FWD_FUNCTIONALITY_ENABLE=0x01 154 | 155 | ############################################################################### 156 | # Allow UICC to be powered off if there is no traffic. 157 | # Timeout is in ms. If set to 0, then UICC will not be powered off. 158 | #UICC_IDLE_TIMEOUT=30000 159 | UICC_IDLE_TIMEOUT=0 160 | 161 | ############################################################################### 162 | # AID for Empty Select command 163 | # If specified, this AID will be substituted when an Empty SELECT command is 164 | # detected. The first byte is the length of the AID. Maximum length is 16. 165 | AID_FOR_EMPTY_SELECT={08:A0:00:00:01:51:00:00:00} 166 | ############################################################################### 167 | # Maximum Number of Credits to be allowed by the NFCC 168 | # This value overrides what the NFCC specifices allowing the host to have 169 | # the control to work-around transport limitations. If this value does 170 | # not exist or is set to 0, the NFCC will provide the number of credits. 171 | MAX_RF_DATA_CREDITS=1 172 | 173 | ############################################################################### 174 | # This setting allows you to disable registering the T4t Virtual SE that causes 175 | # the NFCC to send PPSE requests to the DH. 176 | # The default setting is enabled (i.e. T4t Virtual SE is registered). 177 | #REGISTER_VIRTUAL_SE=1 178 | 179 | ############################################################################### 180 | # When screen is turned off, specify the desired power state of the controller. 181 | # 0: power-off-sleep state; DEFAULT 182 | # 1: full-power state 183 | # 2: screen-off card-emulation (CE4/CE3/CE1 modes are used) 184 | SCREEN_OFF_POWER_STATE=1 185 | 186 | ############################################################################### 187 | # Firmware patch file 188 | # If the value is not set then patch download is disabled. 189 | FW_PATCH="/vendor/firmware/bcm2079x_firmware.ncd" 190 | 191 | ############################################################################### 192 | # Firmware pre-patch file (sent before the above patch file) 193 | # If the value is not set then pre-patch is not used. 194 | FW_PRE_PATCH="/vendor/firmware/bcm2079x_pre_firmware.ncd" 195 | 196 | ############################################################################### 197 | # Firmware patch format 198 | # 1 = HCD 199 | # 2 = NCD (default) 200 | #NFA_CONFIG_FORMAT=2 201 | 202 | ############################################################################### 203 | # SPD Debug mode 204 | # If set to 1, any failure of downloading a patch will trigger a hard-stop 205 | #SPD_DEBUG=0 206 | 207 | ############################################################################### 208 | # SPD Max Retry Count 209 | # The number of attempts to download a patch before giving up (defualt is 3). 210 | # Note, this resets after a power-cycle. 211 | #SPD_MAX_RETRY_COUNT=3 212 | 213 | ############################################################################### 214 | # transport driver 215 | # 216 | # TRANSPORT_DRIVER= 217 | # 218 | # where can be, for example: 219 | # "/dev/ttyS" (UART) 220 | # "/dev/bcmi2cnfc" (I2C) 221 | # "hwtun" (HW Tunnel) 222 | # "/dev/bcmspinfc" (SPI) 223 | # "/dev/btusb0" (BT USB) 224 | TRANSPORT_DRIVER="/dev/bcm2079x" 225 | 226 | ############################################################################### 227 | # power control driver 228 | # Specify a kernel driver that support ioctl commands to control NFC_EN and 229 | # NFC_WAKE gpio signals. 230 | # 231 | # POWER_CONTRL_DRIVER= 232 | # where can be, for example: 233 | # "/dev/nfcpower" 234 | # "/dev/bcmi2cnfc" (I2C) 235 | # "/dev/bcmspinfc" (SPI) 236 | # i2c and spi driver may be used to control NFC_EN and NFC_WAKE signal 237 | POWER_CONTROL_DRIVER="/dev/bcm2079x" 238 | 239 | ############################################################################### 240 | # I2C transport driver options 241 | # 242 | BCMI2CNFC_ADDRESS=0 243 | 244 | ############################################################################### 245 | # I2C transport driver try to read multiple packets in read() if data is available 246 | # remove the comment below to enable this feature 247 | #READ_MULTIPLE_PACKETS=1 248 | 249 | ############################################################################### 250 | # SPI transport driver options 251 | #SPI_NEGOTIATION={0A:F0:00:01:00:00:00:FF:FF:00:00} 252 | 253 | ############################################################################### 254 | # UART transport driver options 255 | # 256 | # PORT=1,2,3,... 257 | # BAUD=115200, 19200, 9600, 4800, 258 | # DATABITS=8, 7, 6, 5 259 | # PARITY="even" | "odd" | "none" 260 | # STOPBITS="0" | "1" | "1.5" | "2" 261 | 262 | #UART_PORT=2 263 | #UART_BAUD=115200 264 | #UART_DATABITS=8 265 | #UART_PARITY="none" 266 | #UART_STOPBITS="1" 267 | 268 | ############################################################################### 269 | # Insert a delay in microseconds per byte after a write to NFCC. 270 | # after writing a block of data to the NFCC, delay this an amopunt of time before 271 | # writing next block of data. the delay is calculated as below 272 | # NFC_WRITE_DELAY * (number of byte written) / 1000 milliseconds 273 | # e.g. after 259 bytes is written, delay (259 * 20 / 1000) 5 ms before next write 274 | NFC_WRITE_DELAY=20 275 | 276 | ############################################################################### 277 | # Maximum Number of Credits to be allowed by the NFCC 278 | # This value overrides what the NFCC specifices allowing the host to have 279 | # the control to work-around transport limitations. If this value does 280 | # not exist or is set to 0, the NFCC will provide the number of credits. 281 | MAX_RF_DATA_CREDITS=1 282 | 283 | ############################################################################### 284 | # Antenna Configuration - This data is used when setting 0xC8 config item 285 | # at startup (before discovery is started). If not used, no value is sent. 286 | # 287 | # The settings for this value are documented here: 288 | # http://wcgbu.broadcom.com/wpan/PM/Project%20Document%20Library/bcm20791B0/ 289 | # Design/Doc/PHY%20register%20settings/BCM20791-B2-1027-02_PHY_Recommended_Reg_Settings.xlsx 290 | # This document is maintained by Paul Forshaw. 291 | # 292 | # The values marked as ?? should be tweaked per antenna or customer/app: 293 | # {20:C8:1E:06:??:00:??:??:??:00:??:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:??:01:00:00:40:04} 294 | # array[0] = 0x20 is length of the payload from array[1] to the end 295 | # array[1] = 0xC8 is PREINIT_DSP_CFG 296 | #PREINIT_DSP_CFG={20:C8:1E:06:1F:00:0F:03:3C:00:04:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:48:01:00:00:40:04} 297 | 298 | 299 | ############################################################################### 300 | # Force tag polling for the following technology(s). 301 | # The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. 302 | # Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | 303 | # NFA_TECHNOLOGY_MASK_F | NFA_TECHNOLOGY_MASK_ISO15693 | 304 | # NFA_TECHNOLOGY_MASK_B_PRIME | NFA_TECHNOLOGY_MASK_KOVIO | 305 | # NFA_TECHNOLOGY_MASK_A_ACTIVE | NFA_TECHNOLOGY_MASK_F_ACTIVE. 306 | # 307 | # Notable bits: 308 | # NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */ 309 | # NFA_TECHNOLOGY_MASK_B 0x02 /* NFC Technology B */ 310 | # NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */ 311 | # NFA_TECHNOLOGY_MASK_ISO15693 0x08 /* Proprietary Technology */ 312 | # NFA_TECHNOLOGY_MASK_KOVIO 0x20 /* Proprietary Technology */ 313 | # NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40 /* NFC Technology A active mode */ 314 | # NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80 /* NFC Technology F active mode */ 315 | POLLING_TECH_MASK=0xEF 316 | 317 | ############################################################################### 318 | # Force P2P to only listen for the following technology(s). 319 | # The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. 320 | # Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F | 321 | # NFA_TECHNOLOGY_MASK_A_ACTIVE | NFA_TECHNOLOGY_MASK_F_ACTIVE 322 | # 323 | # Notable bits: 324 | # NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */ 325 | # NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */ 326 | # NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40 /* NFC Technology A active mode */ 327 | # NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80 /* NFC Technology F active mode */ 328 | P2P_LISTEN_TECH_MASK=0xC5 329 | 330 | PRESERVE_STORAGE=0x01 331 | 332 | ############################################################################### 333 | # Maximum EE supported number 334 | # NXP PN547C2 0x02 335 | # NXP PN65T 0x03 336 | # NXP PN548C2 0x02 337 | # NXP PN66T 0x03 338 | NFA_MAX_EE_SUPPORTED=0x02 339 | 340 | ############################################################################### 341 | # NCI Hal Module name 342 | NCI_HAL_MODULE="nfc_nci" 343 | 344 | ############################################################################### 345 | # AID_MATCHING constants 346 | # AID_MATCHING_EXACT_ONLY 0x00 347 | # AID_MATCHING_EXACT_OR_PREFIX 0x01 348 | # AID_MATCHING_PREFIX_ONLY 0x02 349 | AID_MATCHING_MODE=0x01 350 | 351 | ############################################################################### 352 | # Preferred Secure Element for Technology based routing 353 | # eSE 0x01 354 | # UICC 0x02 355 | NXP_PRFD_TECH_SE=0x02 356 | 357 | ############################################################################### 358 | # Vendor Specific Proprietary Protocol & Discovery Configuration 359 | # Set to 0xFF if unsupported 360 | # byte[0] NCI_PROTOCOL_18092_ACTIVE 361 | # byte[1] NCI_PROTOCOL_B_PRIME 362 | # byte[2] NCI_PROTOCOL_DUAL 363 | # byte[3] NCI_PROTOCOL_15693 364 | # byte[4] NCI_PROTOCOL_KOVIO 365 | # byte[5] NCI_PROTOCOL_MIFARE 366 | # byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO 367 | # byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME 368 | # byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME 369 | NFA_PROPRIETARY_CFG={05:FF:FF:06:81:80:77:FF:FF} 370 | -------------------------------------------------------------------------------- /rootdir/system/etc/libnfc-nxp.conf: -------------------------------------------------------------------------------- 1 | ## This file is used by NFC NXP NCI HAL(external/libnfc-nci/halimpl/pn547) 2 | ## and NFC Service Java Native Interface Extensions (packages/apps/Nfc/nci/jni/extns/pn547) 3 | 4 | ############################################################################### 5 | # Application options 6 | # Logging Levels 7 | # NXPLOG_DEFAULT_LOGLEVEL 0x01 8 | # ANDROID_LOG_DEBUG 0x03 9 | # ANDROID_LOG_WARN 0x02 10 | # ANDROID_LOG_ERROR 0x01 11 | # ANDROID_LOG_SILENT 0x00 12 | # 13 | NXPLOG_EXTNS_LOGLEVEL=0x01 14 | NXPLOG_NCIHAL_LOGLEVEL=0x01 15 | NXPLOG_NCIX_LOGLEVEL=0x01 16 | NXPLOG_NCIR_LOGLEVEL=0x01 17 | NXPLOG_FWDNLD_LOGLEVEL=0x01 18 | NXPLOG_TML_LOGLEVEL=0x01 19 | 20 | ############################################################################### 21 | # Nfc Device Node name 22 | NXP_NFC_DEV_NODE="/dev/pn54x" 23 | 24 | ############################################################################### 25 | # File name for Firmware 26 | NXP_FW_NAME="libpn547_fw.so" 27 | 28 | ############################################################################### 29 | # Extension for Mifare reader enable 30 | # 0x00 - Disabled 31 | # 0x01 - Enabled 32 | MIFARE_READER_ENABLE=0x01 33 | 34 | ############################################################################### 35 | # File location for Firmware 36 | #FW_STORAGE="/vendor/firmware/libpn547_fw.so" 37 | 38 | ############################################################################### 39 | # System clock source selection configuration 40 | # CLK_SRC_XTAL - 0x01 41 | # CLK_SRC_PLL - 0x02 42 | NXP_SYS_CLK_SRC_SEL=0x02 43 | 44 | ############################################################################### 45 | # System clock frequency selection configuration for PLL 46 | # CLK_FREQ_13MHZ - 0x01 47 | # CLK_FREQ_19_2MHZ - 0x02 48 | # CLK_FREQ_24MHZ - 0x03 49 | # CLK_FREQ_26MHZ - 0x04 50 | # CLK_FREQ_38_4MHZ - 0x05 51 | # CLK_FREQ_52MHZ - 0x06 52 | NXP_SYS_CLK_FREQ_SEL=0x02 53 | 54 | ############################################################################### 55 | # The timeout value to be used for clock request acknowledgment 56 | # min value = 0x01 to max = 0x1A 57 | NXP_SYS_CLOCK_TO_CFG=0x02 58 | 59 | ############################################################################### 60 | # NXP proprietary settings 61 | NXP_ACT_PROP_EXTN={2F, 02, 00} 62 | 63 | ############################################################################### 64 | # NFC forum profile settings 65 | NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00} 66 | 67 | ############################################################################### 68 | # Standby enable settings 69 | # 0x00 - Disabled 70 | # 0x01 - Enabled 71 | NXP_CORE_STANDBY={2F, 00, 01, 01} 72 | 73 | ############################################################################### 74 | #Atonomous Mode 75 | #Enable 0x01 76 | #Disable 0x00 77 | NXP_CORE_SCRN_OFF_AUTONOMOUS_ENABLE=0x00 78 | 79 | ############################################################################### 80 | # NXP RF ALM (NO BOOSTER) configuration settings for FW VERSION = 08.01.25 81 | ############################################################################### 82 | # A0, 0D, 03, 00, 40, 02 RF_CLIF_BOOT CLIF_ANA_NFCLD_REG 83 | # A0, 0D, 03, 04, 43, 20 RF_CLIF_CFG_INITIATOR CLIF_ANA_PBF_CONTROL_REG 84 | # A0, 0D, 03, 04, FF, 05 RF_CLIF_CFG_INITIATOR SMU_PMU_REG (0x40024010) 85 | # A0, 0D, 06, 06, 44, A3, 90, 03, 00 RF_CLIF_CFG_TARGET CLIF_ANA_RX_REG 86 | # A0, 0D, 06, 06, 30, CF, 00, 08, 00 RF_CLIF_CFG_TARGET CLIF_SIGPRO_ADCBCM_THRESHOLD_REG 87 | # A0, 0D, 06, 06, 2F, 8F, 05, 80, 0C RF_CLIF_CFG_TARGET CLIF_SIGPRO_ADCBCM_CONFIG_REG 88 | # A0, 0D, 04, 06, 03, 00, 6E RF_CLIF_CFG_TARGET CLIF_TRANSCEIVE_CONTROL_REG 89 | # A0, 0D, 03, 06, 48, 1F RF_CLIF_CFG_TARGET CLIF_ANA_CLK_MAN_REG 90 | # A0, 0D, 03, 06, 43, A0 RF_CLIF_CFG_TARGET CLIF_ANA_PBF_CONTROL_REG 91 | # A0, 0D, 06, 06, 42, 00, 00, FF, FF RF_CLIF_CFG_TARGET CLIF_ANA_TX_AMPLITUDE_REG 92 | # A0, 0D, 06, 06, 41, 80, 00, 00, 00 RF_CLIF_CFG_TARGET CLIF_ANA_TX_CLK_CONTROL_REG 93 | # A0, 0D, 03, 06, 37, 18 RF_CLIF_CFG_TARGET CLIF_TX_CONTROL_REG 94 | # A0, 0D, 03, 06, 16, 00 RF_CLIF_CFG_TARGET CLIF_TX_UNDERSHOOT_CONFIG_REG 95 | # A0, 0D, 03, 06, 15, 00 RF_CLIF_CFG_TARGET CLIF_TX_OVERSHOOT_CONFIG_REG 96 | # A0, 0D, 06, 06, FF, 05, 00, 00, 00 RF_CLIF_CFG_TARGET SMU_PMU_REG (0x40024010) 97 | # A0, 0D, 06, 08, 44, 00, 00, 00, 00 RF_CLIF_CFG_I_PASSIVE CLIF_ANA_RX_REG 98 | # A0, 0D, 06, 20, 4A, 00, 00, 00, 00 RF_CLIF_CFG_TECHNO_I_TX15693CLIF_ANA_TX_SHAPE_CONTROL_REG 99 | # A0, 0D, 06, 20, 42, 88, 10, FF, FF RF_CLIF_CFG_TECHNO_I_TX15693CLIF_ANA_TX_AMPLITUDE_REG 100 | # A0, 0D, 03, 20, 16, 00 RF_CLIF_CFG_TECHNO_I_TX15693CLIF_TX_UNDERSHOOT_CONFIG_REG 101 | # A0, 0D, 03, 20, 15, 00 RF_CLIF_CFG_TECHNO_I_TX15693CLIF_TX_OVERSHOOT_CONFIG_REG 102 | # A0, 0D, 06, 22, 44, 22, 00, 02, 00 RF_CLIF_CFG_TECHNO_I_RX15693CLIF_ANA_RX_REG 103 | # A0, 0D, 06, 22, 2D, 50, 44, 0C, 00 RF_CLIF_CFG_TECHNO_I_RX15693CLIF_SIGPRO_RM_CONFIG1_REG 104 | # A0, 0D, 04, 32, 03, 40, 3D RF_CLIF_CFG_BR_106_I_TXA CLIF_TRANSCEIVE_CONTROL_REG 105 | # A0, 0D, 06, 32, 42, F8, 10, FF, FF RF_CLIF_CFG_BR_106_I_TXA CLIF_ANA_TX_AMPLITUDE_REG 106 | # A0, 0D, 03, 32, 16, 00 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG 107 | # A0, 0D, 03, 32, 15, 01 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG 108 | # A0, 0D, 03, 32, 0D, 22 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_DATA_MOD_REG 109 | # A0, 0D, 03, 32, 14, 22 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_SYMBOL23_MOD_REG 110 | # A0, 0D, 06, 32, 4A, 30, 07, 01, 1F RF_CLIF_CFG_BR_106_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG 111 | # A0, 0D, 06, 34, 2D, 24, 77, 0C, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_SIGPRO_RM_CONFIG1_REG 112 | # A0, 0D, 06, 34, 34, 00, 00, E4, 03 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_AGC_CONFIG1_REG 113 | # A0, 0D, 06, 34, 44, 21, 00, 02, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_ANA_RX_REG 114 | # A0, 0D, 06, 35, 44, 21, 00, 02, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_ANA_RX_REG 115 | # A0, 0D, 06, 38, 4A, 53, 07, 01, 1B RF_CLIF_CFG_BR_212_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG 116 | # A0, 0D, 06, 38, 42, 68, 10, FF, FF RF_CLIF_CFG_BR_212_I_TXA CLIF_ANA_TX_AMPLITUDE_REG 117 | # A0, 0D, 03, 38, 16, 00 RF_CLIF_CFG_BR_212_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG 118 | # A0, 0D, 03, 38, 15, 00 RF_CLIF_CFG_BR_212_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG 119 | # A0, 0D, 06, 3A, 2D, 15, 47, 0D, 00 RF_CLIF_CFG_BR_212_I_RXA CLIF_SIGPRO_RM_CONFIG1_REG 120 | # A0, 0D, 06, 3C, 4A, 52, 07, 01, 1B RF_CLIF_CFG_BR_424_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG 121 | # A0, 0D, 06, 3C, 42, 68, 10, FF, FF RF_CLIF_CFG_BR_424_I_TXA CLIF_ANA_TX_AMPLITUDE_REG 122 | # A0, 0D, 03, 3C, 16, 00 RF_CLIF_CFG_BR_424_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG 123 | # A0, 0D, 03, 3C, 15, 00 RF_CLIF_CFG_BR_424_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG 124 | # A0, 0D, 06, 3E, 2D, 15, 47, 0D, 00 RF_CLIF_CFG_BR_424_I_RXA CLIF_SIGPRO_RM_CONFIG1_REG 125 | # A0, 0D, 06, 40, 42, F0, 10, FF, FF RF_CLIF_CFG_BR_848_I_TXA CLIF_ANA_TX_AMPLITUDE_REG 126 | # A0, 0D, 03, 40, 0D, 02 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_DATA_MOD_REG 127 | # A0, 0D, 03, 40, 14, 02 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_SYMBOL23_MOD_REG 128 | # A0, 0D, 06, 40, 4A, 12, 07, 00, 00 RF_CLIF_CFG_BR_848_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG 129 | # A0, 0D, 03, 40, 16, 00 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG 130 | # A0, 0D, 03, 40, 15, 00 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG 131 | # A0, 0D, 06, 42, 2D, 15, 47, 0D, 00 RF_CLIF_CFG_BR_848_I_RXA CLIF_SIGPRO_RM_CONFIG1_REG 132 | # A0, 0D, 06, 46, 44, 21, 00, 02, 00 RF_CLIF_CFG_BR_106_I_RXB CLIF_ANA_RX_REG 133 | # A0, 0D, 06, 46, 2D, 05, 47, 0E, 00 RF_CLIF_CFG_BR_106_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG 134 | # A0, 0D, 06, 44, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_106_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG 135 | # A0, 0D, 06, 44, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_106_I_TXB CLIF_ANA_TX_AMPLITUDE_REG 136 | # A0, 0D, 03, 44, 16, 00 RF_CLIF_CFG_BR_106_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG 137 | # A0, 0D, 03, 44, 15, 00 RF_CLIF_CFG_BR_106_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG 138 | # A0, 0D, 06, 4A, 44, 22, 00, 02, 00 RF_CLIF_CFG_BR_212_I_RXB CLIF_ANA_RX_REG 139 | # A0, 0D, 06, 4A, 2D, 05, 37, 0C, 00 RF_CLIF_CFG_BR_212_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG 140 | # A0, 0D, 06, 48, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_212_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG 141 | # A0, 0D, 06, 48, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_212_I_TXB CLIF_ANA_TX_AMPLITUDE_REG 142 | # A0, 0D, 03, 48, 16, 00 RF_CLIF_CFG_BR_212_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG 143 | # A0, 0D, 03, 48, 15, 00 RF_CLIF_CFG_BR_212_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG 144 | # A0, 0D, 06, 4E, 44, 22, 00, 02, 00 RF_CLIF_CFG_BR_424_I_RXB CLIF_ANA_RX_REG 145 | # A0, 0D, 06, 4E, 2D, 05, 37, 0C, 00 RF_CLIF_CFG_BR_424_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG 146 | # A0, 0D, 06, 4C, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_424_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG 147 | # A0, 0D, 06, 4C, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_424_I_TXB CLIF_ANA_TX_AMPLITUDE_REG 148 | # A0, 0D, 03, 4C, 16, 00 RF_CLIF_CFG_BR_424_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG 149 | # A0, 0D, 03, 4C, 15, 00 RF_CLIF_CFG_BR_424_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG 150 | # A0, 0D, 06, 52, 44, 22, 00, 02, 00 RF_CLIF_CFG_BR_848_I_RXB CLIF_ANA_RX_REG 151 | # A0, 0D, 06, 52, 2D, 05, 25, 0C, 00 RF_CLIF_CFG_BR_848_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG 152 | # A0, 0D, 06, 50, 42, 90, 10, FF, FF RF_CLIF_CFG_BR_848_I_TXB CLIF_ANA_TX_AMPLITUDE_REG 153 | # A0, 0D, 06, 50, 4A, 11, 0F, 01, 07 RF_CLIF_CFG_BR_848_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG 154 | # A0, 0D, 03, 50, 16, 00 RF_CLIF_CFG_BR_848_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG 155 | # A0, 0D, 03, 50, 15, 00 RF_CLIF_CFG_BR_848_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG 156 | # A0, 0D, 06, 56, 2D, 05, 9E, 0C, 00 RF_CLIF_CFG_BR_212_I_RXF_P CLIF_SIGPRO_RM_CONFIG1_REG 157 | # A0, 0D, 06, 56, 44, 22, 00, 02, 00 RF_CLIF_CFG_BR_212_I_RXF_P CLIF_ANA_RX_REG 158 | # A0, 0D, 06, 5C, 2D, 05, 69, 0C, 00 RF_CLIF_CFG_BR_424_I_RXF_P CLIF_SIGPRO_RM_CONFIG1_REG 159 | # A0, 0D, 06, 5C, 44, 21, 00, 02, 00 RF_CLIF_CFG_BR_424_I_RXF_P CLIF_ANA_RX_REG 160 | # A0, 0D, 06, 54, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_212_I_TXF CLIF_ANA_TX_AMPLITUDE_REG 161 | # A0, 0D, 06, 54, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_212_I_TXF CLIF_ANA_TX_SHAPE_CONTROL_REG 162 | # A0, 0D, 03, 54, 16, 00 RF_CLIF_CFG_BR_212_I_TXF CLIF_TX_UNDERSHOOT_CONFIG_REG 163 | # A0, 0D, 03, 54, 15, 00 RF_CLIF_CFG_BR_212_I_TXF CLIF_TX_OVERSHOOT_CONFIG_REG 164 | # A0, 0D, 06, 5A, 42, 90, 10, FF, FF RF_CLIF_CFG_BR_424_I_TXF CLIF_ANA_TX_AMPLITUDE_REG 165 | # A0, 0D, 06, 5A, 4A, 31, 07, 01, 07 RF_CLIF_CFG_BR_424_I_TXF CLIF_ANA_TX_SHAPE_CONTROL_REG 166 | # A0, 0D, 03, 5A, 16, 00 RF_CLIF_CFG_BR_424_I_TXF CLIF_TX_UNDERSHOOT_CONFIG_REG 167 | # A0, 0D, 03, 5A, 15, 00 RF_CLIF_CFG_BR_424_I_TXF CLIF_TX_OVERSHOOT_CONFIG_REG 168 | # A0, 0D, 06, 98, 2F, AF, 05, 80, 0F RF_CLIF_GTM_B CLIF_SIGPRO_ADCBCM_CONFIG_REG 169 | # A0, 0D, 06, 9A, 42, 00, 00, FF, FF RF_CLIF_GTM_FELICA CLIF_ANA_TX_AMPLITUDE_REG 170 | # A0, 0D, 06, 30, 44, A3, 90, 03, 00 RF_CLIF_CFG_TECHNO_T_RXF CLIF_ANA_RX_REG 171 | # A0, 0D, 06, 6C, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_106_T_RXA CLIF_ANA_RX_REG 172 | # A0, 0D, 06, 6C, 30, CF, 00, 08, 00 RF_CLIF_CFG_BR_106_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG 173 | # A0, 0D, 06, 6C, 2F, 8F, 05, 80, 0C RF_CLIF_CFG_BR_106_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG 174 | # A0, 0D, 06, 70, 2F, 8F, 05, 80, 12 RF_CLIF_CFG_BR_212_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG 175 | # A0, 0D, 06, 70, 30, CF, 00, 08, 00 RF_CLIF_CFG_BR_212_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG 176 | # A0, 0D, 06, 74, 2F, 8F, 05, 80, 12 RF_CLIF_CFG_BR_424_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG 177 | # A0, 0D, 06, 74, 30, DF, 00, 07, 00 RF_CLIF_CFG_BR_424_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG 178 | # A0, 0D, 06, 78, 2F, 1F, 06, 80, 01 RF_CLIF_CFG_BR_848_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG 179 | # A0, 0D, 06, 78, 30, 3F, 00, 04, 00 RF_CLIF_CFG_BR_848_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG 180 | # A0, 0D, 06, 78, 44, A2, 90, 03, 00 RF_CLIF_CFG_BR_848_T_RXA CLIF_ANA_RX_REG 181 | # A0, 0D, 03, 78, 47, 00 RF_CLIF_CFG_BR_848_T_RXA CLIF_ANA_AGC_REG 182 | # A0, 0D, 06, 7C, 2F, AF, 05, 80, 0F RF_CLIF_CFG_BR_106_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG 183 | # A0, 0D, 06, 7C, 30, CF, 00, 07, 00 RF_CLIF_CFG_BR_106_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG 184 | # A0, 0D, 06, 7C, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_106_T_RXB CLIF_ANA_RX_REG 185 | # A0, 0D, 06, 7D, 30, CF, 00, 08, 00 RF_CLIF_CFG_BR_106_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG 186 | # A0, 0D, 06, 80, 2F, AF, 05, 80, 90 RF_CLIF_CFG_BR_212_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG 187 | # A0, 0D, 06, 80, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_212_T_RXB CLIF_ANA_RX_REG 188 | # A0, 0D, 06, 84, 2F, AF, 05, 80, 92 RF_CLIF_CFG_BR_424_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG 189 | # A0, 0D, 06, 84, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_424_T_RXB CLIF_ANA_RX_REG 190 | # A0, 0D, 06, 88, 2F, 7F, 04, 80, 10 RF_CLIF_CFG_BR_848_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG 191 | # A0, 0D, 06, 88, 30, 5F, 00, 16, 00 RF_CLIF_CFG_BR_848_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG 192 | # A0, 0D, 03, 88, 47, 00 RF_CLIF_CFG_BR_848_T_RXB CLIF_ANA_AGC_REG 193 | # A0, 0D, 06, 88, 44, A1, 90, 03, 00 RF_CLIF_CFG_BR_848_T_RXB CLIF_ANA_RX_REG 194 | # A0, 0D, 03, 0C, 48, 1F RF_CLIF_CFG_T_PASSIVE CLIF_ANA_CLK_MAN_REG 195 | # A0, 0D, 03, 10, 43, 20 RF_CLIF_CFG_T_ACTIVE CLIF_ANA_PBF_CONTROL_REG 196 | # A0, 0D, 06, 6A, 42, F8, 10, FF, FF RF_CLIF_CFG_BR_106_T_TXA_A CLIF_ANA_TX_AMPLITUDE_REG 197 | # A0, 0D, 03, 6A, 16, 00 RF_CLIF_CFG_BR_106_T_TXA_A CLIF_TX_UNDERSHOOT_CONFIG_REG 198 | # A0, 0D, 03, 6A, 15, 01 RF_CLIF_CFG_BR_106_T_TXA_A CLIF_TX_OVERSHOOT_CONFIG_REG 199 | # A0, 0D, 06, 6A, 4A, 30, 0F, 01, 1F RF_CLIF_CFG_BR_106_T_TXA_A CLIF_ANA_TX_SHAPE_CONTROL_REG 200 | # A0, 0D, 06, 8C, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_212_T_TXF_A CLIF_ANA_TX_AMPLITUDE_REG 201 | # A0, 0D, 06, 8C, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_212_T_TXF_A CLIF_ANA_TX_SHAPE_CONTROL_REG 202 | # A0, 0D, 03, 8C, 16, 00 RF_CLIF_CFG_BR_212_T_TXF_A CLIF_TX_UNDERSHOOT_CONFIG_REG 203 | # A0, 0D, 03, 8C, 15, 00 RF_CLIF_CFG_BR_212_T_TXF_A CLIF_TX_OVERSHOOT_CONFIG_REG 204 | # A0, 0D, 06, 92, 42, 90, 10, FF, FF RF_CLIF_CFG_BR_424_T_TXF_A CLIF_ANA_TX_AMPLITUDE_REG 205 | # A0, 0D, 06, 92, 4A, 31, 07, 01, 07 RF_CLIF_CFG_BR_424_T_TXF_A CLIF_ANA_TX_SHAPE_CONTROL_REG 206 | # A0, 0D, 03, 92, 16, 00 RF_CLIF_CFG_BR_424_T_TXF_A CLIF_TX_UNDERSHOOT_CONFIG_REG 207 | # A0, 0D, 03, 92, 15, 00 RF_CLIF_CFG_BR_424_T_TXF_A CLIF_TX_OVERSHOOT_CONFIG_REG 208 | # A0, 0D, 06, 0A, 30, CF, 00, 08, 00 RF_CLIF_CFG_I_ACTIVE CLIF_SIGPRO_ADCBCM_THRESHOLD_REG 209 | # A0, 0D, 06, 0A, 2F, 8F, 05, 80, 0C RF_CLIF_CFG_I_ACTIVE CLIF_SIGPRO_ADCBCM_CONFIG_REG 210 | # A0, 0D, 03, 0A, 48, 10 RF_CLIF_CFG_I_ACTIVE CLIF_ANA_CLK_MAN_REG 211 | # A0, 0D, 06, 0A, 44, A3, 90, 03, 00 RF_CLIF_CFG_I_ACTIVE CLIF_ANA_RX_REG 212 | 213 | # *** ALM(NO BOOSTER) FW VERSION = 08.01.25 *** 214 | NXP_RF_CONF_BLK_1={ 215 | 20, 02, F3, 20, 216 | A0, 0D, 03, 00, 40, 0A, 217 | A0, 0D, 03, 04, 43, 20, 218 | A0, 0D, 03, 04, FF, 05, 219 | A0, 0D, 06, 06, 44, A3, 90, 03, 00, 220 | A0, 0D, 06, 06, 30, CF, 00, 08, 00, 221 | A0, 0D, 06, 06, 2F, 8F, 05, 80, 0C, 222 | A0, 0D, 04, 06, 03, 00, 6E, 223 | A0, 0D, 03, 06, 48, 18, 224 | A0, 0D, 03, 06, 43, A0, 225 | A0, 0D, 06, 06, 42, 00, 02, F3, F1, 226 | A0, 0D, 06, 06, 41, 80, 00, 00, 00, 227 | A0, 0D, 03, 06, 37, 18, 228 | A0, 0D, 03, 06, 16, 00, 229 | A0, 0D, 03, 06, 15, 00, 230 | A0, 0D, 06, 06, FF, 05, 00, 00, 00, 231 | A0, 0D, 06, 08, 44, 00, 00, 00, 00, 232 | A0, 0D, 06, 20, 4A, 00, 00, 00, 00, 233 | A0, 0D, 06, 20, 42, 88, 10, FF, FF, 234 | A0, 0D, 03, 20, 16, 00, 235 | A0, 0D, 03, 20, 15, 00, 236 | A0, 0D, 06, 22, 44, 22, 00, 02, 00, 237 | A0, 0D, 06, 22, 2D, 50, 44, 0C, 00, 238 | A0, 0D, 04, 32, 03, 40, 3D, 239 | A0, 0D, 06, 32, 42, F8, 10, FF, FF, 240 | A0, 0D, 03, 32, 16, 00, 241 | A0, 0D, 03, 32, 15, 01, 242 | A0, 0D, 03, 32, 0D, 22, 243 | A0, 0D, 03, 32, 14, 22, 244 | A0, 0D, 06, 32, 4A, 30, 07, 01, 1F, 245 | A0, 0D, 06, 34, 2D, 24, 77, 0C, 00, 246 | A0, 0D, 06, 34, 34, 00, 00, E4, 03, 247 | A0, 0D, 06, 34, 44, 20, 00, 02, 00 248 | } 249 | # *** ALM(NO BOOSTER) FW VERSION = 08.01.25 *** 250 | NXP_RF_CONF_BLK_2={ 251 | 20, 02, F4, 1F, 252 | A0, 0D, 06, 35, 44, 21, 00, 02, 00, 253 | A0, 0D, 06, 38, 4A, 53, 07, 01, 1B, 254 | A0, 0D, 06, 38, 42, 68, 10, FF, FF, 255 | A0, 0D, 03, 38, 16, 00, 256 | A0, 0D, 03, 38, 15, 00, 257 | A0, 0D, 06, 3A, 2D, 15, 47, 0D, 00, 258 | A0, 0D, 06, 3C, 4A, 52, 07, 01, 1B, 259 | A0, 0D, 06, 3C, 42, 68, 10, FF, FF, 260 | A0, 0D, 03, 3C, 16, 00, 261 | A0, 0D, 03, 3C, 15, 00, 262 | A0, 0D, 06, 3E, 2D, 15, 47, 0D, 00, 263 | A0, 0D, 06, 40, 42, F0, 10, FF, FF, 264 | A0, 0D, 03, 40, 0D, 02, 265 | A0, 0D, 03, 40, 14, 02, 266 | A0, 0D, 06, 40, 4A, 12, 07, 00, 00, 267 | A0, 0D, 03, 40, 16, 00, 268 | A0, 0D, 03, 40, 15, 00, 269 | A0, 0D, 06, 42, 2D, 15, 47, 0D, 00, 270 | A0, 0D, 06, 46, 44, 21, 00, 02, 00, 271 | A0, 0D, 06, 46, 2D, 05, 47, 0E, 00, 272 | A0, 0D, 06, 44, 4A, 33, 07, 01, 07, 273 | A0, 0D, 06, 44, 42, 70, 10, FF, FF, 274 | A0, 0D, 03, 44, 16, 00, 275 | A0, 0D, 03, 44, 15, 00, 276 | A0, 0D, 06, 4A, 44, 22, 00, 02, 00, 277 | A0, 0D, 06, 4A, 2D, 05, 37, 0C, 00, 278 | A0, 0D, 06, 48, 4A, 33, 07, 01, 07, 279 | A0, 0D, 06, 48, 42, 88, 10, FF, FF, 280 | A0, 0D, 03, 48, 16, 00, 281 | A0, 0D, 03, 48, 15, 00, 282 | A0, 0D, 06, 4E, 44, 22, 00, 02, 00 283 | } 284 | # *** ALM(NO BOOSTER) FW VERSION = 08.01.25 *** 285 | NXP_RF_CONF_BLK_3={ 286 | 20, 02, F7, 1E, 287 | A0, 0D, 06, 4E, 2D, 05, 37, 0C, 00, 288 | A0, 0D, 06, 4C, 4A, 33, 07, 01, 07, 289 | A0, 0D, 06, 4C, 42, 88, 10, FF, FF, 290 | A0, 0D, 03, 4C, 16, 00, 291 | A0, 0D, 03, 4C, 15, 00, 292 | A0, 0D, 06, 52, 44, 22, 00, 02, 00, 293 | A0, 0D, 06, 52, 2D, 05, 25, 0C, 00, 294 | A0, 0D, 06, 50, 42, 90, 10, FF, FF, 295 | A0, 0D, 06, 50, 4A, 11, 0F, 01, 07, 296 | A0, 0D, 03, 50, 16, 00, 297 | A0, 0D, 03, 50, 15, 00, 298 | A0, 0D, 06, 56, 2D, 05, 9E, 0C, 00, 299 | A0, 0D, 06, 56, 44, 22, 00, 02, 00, 300 | A0, 0D, 06, 5C, 2D, 05, 69, 0C, 00, 301 | A0, 0D, 06, 5C, 44, 21, 00, 02, 00, 302 | A0, 0D, 06, 54, 42, 70, 10, FF, FF, 303 | A0, 0D, 06, 54, 4A, 33, 07, 01, 07, 304 | A0, 0D, 03, 54, 16, 00, 305 | A0, 0D, 03, 54, 15, 00, 306 | A0, 0D, 06, 5A, 42, 70, 10, FF, FF, 307 | A0, 0D, 06, 5A, 4A, 31, 07, 01, 07, 308 | A0, 0D, 03, 5A, 16, 00, 309 | A0, 0D, 03, 5A, 15, 00, 310 | A0, 0D, 06, 98, 2F, AF, 05, 80, 0F, 311 | A0, 0D, 06, 9A, 42, 00, 03, F2, F1, 312 | A0, 0D, 06, 30, 44, A3, 90, 03, 00, 313 | A0, 0D, 06, 6C, 44, A3, 90, 03, 00, 314 | A0, 0D, 06, 6C, 30, CF, 00, 08, 00, 315 | A0, 0D, 06, 6C, 2F, 8F, 05, 80, 0C, 316 | A0, 0D, 06, 70, 2F, 8F, 05, 80, 12 317 | } 318 | # *** ALM(NO BOOSTER) FW VERSION = 08.01.25 *** 319 | NXP_RF_CONF_BLK_4={ 320 | 20, 02, F7, 1E, 321 | A0, 0D, 06, 70, 30, CF, 00, 08, 00, 322 | A0, 0D, 06, 74, 2F, 8F, 05, 80, 12, 323 | A0, 0D, 06, 74, 30, DF, 00, 07, 00, 324 | A0, 0D, 06, 78, 2F, 1F, 06, 80, 01, 325 | A0, 0D, 06, 78, 30, 3F, 00, 04, 00, 326 | A0, 0D, 06, 78, 44, A2, 90, 03, 00, 327 | A0, 0D, 03, 78, 47, 00, 328 | A0, 0D, 06, 7C, 2F, AF, 05, 80, 0F, 329 | A0, 0D, 06, 7C, 30, CF, 00, 07, 00, 330 | A0, 0D, 06, 7C, 44, A3, 90, 03, 00, 331 | A0, 0D, 06, 7D, 30, CF, 00, 08, 00, 332 | A0, 0D, 06, 80, 2F, AF, 05, 80, 90, 333 | A0, 0D, 06, 80, 44, A3, 90, 03, 00, 334 | A0, 0D, 06, 84, 2F, AF, 05, 80, 92, 335 | A0, 0D, 06, 84, 44, A3, 90, 03, 00, 336 | A0, 0D, 06, 88, 2F, 7F, 04, 80, 10, 337 | A0, 0D, 06, 88, 30, 5F, 00, 16, 00, 338 | A0, 0D, 03, 88, 47, 00, 339 | A0, 0D, 06, 88, 44, A1, 90, 03, 00, 340 | A0, 0D, 03, 0C, 48, 18, 341 | A0, 0D, 03, 10, 43, 20, 342 | A0, 0D, 06, 6A, 42, F8, 10, FF, FF, 343 | A0, 0D, 03, 6A, 16, 00, 344 | A0, 0D, 03, 6A, 15, 01, 345 | A0, 0D, 06, 6A, 4A, 30, 0F, 01, 1F, 346 | A0, 0D, 06, 8C, 42, 88, 10, FF, FF, 347 | A0, 0D, 06, 8C, 4A, 33, 07, 01, 07, 348 | A0, 0D, 03, 8C, 16, 00, 349 | A0, 0D, 03, 8C, 15, 00, 350 | A0, 0D, 06, 92, 42, 90, 10, FF, FF 351 | } 352 | # *** ALM(NO BOOSTER) FW VERSION = 08.01.25 *** 353 | NXP_RF_CONF_BLK_5={ 354 | 20, 02, 37, 07, 355 | A0, 0D, 06, 92, 4A, 31, 07, 01, 07, 356 | A0, 0D, 03, 92, 16, 00, 357 | A0, 0D, 03, 92, 15, 00, 358 | A0, 0D, 06, 0A, 30, CF, 00, 08, 00, 359 | A0, 0D, 06, 0A, 2F, 8F, 05, 80, 0C, 360 | A0, 0D, 03, 0A, 48, 10, 361 | A0, 0D, 06, 0A, 44, A3, 90, 03, 00 362 | } 363 | # *** ALM(NO BOOSTER) FW VERSION = 08.01.25 *** 364 | NXP_RF_CONF_BLK_6={ 365 | } 366 | 367 | ############################################################################### 368 | # Core configuration extensions 369 | # It includes 370 | # A002 - Clock Request 371 | # 0x00 - Disabled 372 | # 0x01 - Enabled 373 | # A003 - Clock Selection 374 | # Please refer to User Manual 375 | # A004 - Clock Time Out 376 | # Defined in ms 377 | # A00E - Load Modulation Mode 378 | # 0x00 - PLM 379 | # 0x01 - ALM 380 | # A011 - Clock specific configuration 381 | # A012 - NFCEE interface 2 configuration 382 | # 0x00 - SWP 383 | # 0x02 - DWP 384 | # Please refer to User Manual 385 | # A013 - TVdd configuration 386 | # 0x00 - TVdd is set to 3.1V in Poll mode 387 | # 0x02 - TVdd is set to 2.7V in Poll mode 388 | # A040-A043 - Ultra Low Power Tag Detector 389 | # Please refer to Application Note of ULPTD 390 | # A05E - Jewel Reader 391 | # Please refer to User Manual 392 | # A061 - Retry after LPCD 393 | # 0b0000XXXX - Number of retry if activation failed 394 | # 0bXXXX0000 - Duration to wait before retry (10ms per step) 395 | # A0CD - SWP S1 line behavior 396 | # Defined S1 High time out during Activation sequence 397 | # A0EC - SWP1 interface 398 | # 0x00 - Disabled 399 | # 0x01 - Enabled 400 | # A0ED - SWP2 interface 401 | # 0x00 - Disabled 402 | # 0x01 - Enabled 403 | NXP_CORE_CONF_EXTN={20, 02, 4D, 12, 404 | A0, 02, 01, 01, 405 | A0, 03, 01, 11, 406 | A0, 04, 01, 02, 407 | A0, 07, 01, 03, 408 | A0, 0E, 01, 01, 409 | A0, 11, 04, CD, 67, 22, 01, 410 | A0, 12, 01, 00, 411 | A0, 13, 01, 02, 412 | A0, 40, 01, 01, 413 | A0, 41, 01, 04, 414 | A0, 42, 01, 19, 415 | A0, 43, 01, 05, 416 | A0, 47, 02, 88, 43, 417 | A0, 5E, 01, 01, 418 | A0, 61, 01, 2A, 419 | A0, CD, 01, 1F, 420 | A0, EC, 01, 01, 421 | A0, ED, 01, 00 422 | } 423 | 424 | ############################################################################### 425 | # Core configuration RF Field notification filter 426 | # 0x00 - Disabled 427 | # 0x01 - Enabled 428 | NXP_CORE_RF_FIELD={20, 02, 05, 01, A0, 62, 01, 01} 429 | 430 | ############################################################################### 431 | # I2C fragmentation 432 | # 0x00 - Disabled 433 | # 0x01 - Enabled 434 | NXP_I2C_FRAGMENTATION_ENABLED=0x00 435 | 436 | ############################################################################### 437 | # Core configuration settings 438 | # It includes 439 | # 18 - Poll Mode NFC-F: PF_BIT_RATE 440 | # 21 - Poll Mode ISO-DEP: PI_BIT_RATE 441 | # 28 - Poll Mode NFC-DEP: PN_NFC_DEP_SPEED 442 | # 30 - Lis. Mode NFC-A: LA_BIT_FRAME_SDD 443 | # 31 - Lis. Mode NFC-A: LA_PLATFORM_CONFIG 444 | # 33 - Lis. Mode NFC-A: LA_SEL_INFO 445 | # 50 - Lis. Mode NFC-F: LF_PROTOCOL_TYPE 446 | # 54 - Lis. Mode NFC-F: LF_CON_BITR_F 447 | # 5B - Lis. Mode ISO-DEP: LI_BIT_RATE 448 | # 60 - Lis. Mode NFC-DEP: LN_WT 449 | # 80 - Other Param.: RF_FIELD_INFO 450 | # 81 - Other Param.: RF_NFCEE_ACTION 451 | # 82 - Other Param.: NFCDEP_OP 452 | NXP_CORE_CONF={ 20, 02, 2B, 0D, 453 | 18, 01, 01, 454 | 21, 01, 00, 455 | 28, 01, 00, 456 | 30, 01, 08, 457 | 31, 01, 03, 458 | 33, 04, 01, 02, 03, 04, 459 | 50, 01, 02, 460 | 54, 01, 06, 461 | 5B, 01, 00, 462 | 60, 01, 0E, 463 | 80, 01, 01, 464 | 81, 01, 01, 465 | 82, 01, 0E 466 | } 467 | 468 | ############################################################################### 469 | # Core configuration extensions for firmware download mode 470 | # Clock setting A003 (0x08:XTAL, 0x11:PLL(19.2MHz)) 471 | NXP_CORE_CONF_EXTN_CLK={20, 02, 05, 01, A0, 03, 01, 11} 472 | 473 | ############################################################################### 474 | # Mifare Classic Key settings 475 | #NXP_CORE_MFCKEY_SETTING={20, 02, 25,04, A0, 51, 06, A0, A1, A2, A3, A4, A5, 476 | # A0, 52, 06, D3, F7, D3, F7, D3, F7, 477 | # A0, 53, 06, FF, FF, FF, FF, FF, FF, 478 | # A0, 54, 06, 00, 00, 00, 00, 00, 00} 479 | 480 | ############################################################################### 481 | # Default SE Options 482 | # No secure element 0x00 483 | # eSE 0x01 484 | # UICC 0x02 485 | # Multi SE 0x03 486 | NXP_DEFAULT_SE=0x02 487 | 488 | 489 | ############################################################################### 490 | NXP_DEFAULT_NFCEE_TIMEOUT=0x06 491 | 492 | ############################################################################### 493 | #Enable SWP full power mode when phone is power off 494 | NXP_SWP_FULL_PWR_ON=0x01 495 | 496 | ############################################################################### 497 | # Set the default AID route Location : 498 | # This settings will be used when application does not set this parameter 499 | # Host 0x00 500 | # eSE 0x01 501 | # UICC 0x02 502 | DEFAULT_AID_ROUTE=0x00 503 | 504 | ############################################################################### 505 | # Set the Mifare Desfire route Location : 506 | # This settings will be used when application does not set this parameter 507 | # Host 0x00 508 | # eSE 0x01 509 | # UICC 0x02 510 | DEFAULT_DESFIRE_ROUTE=0x02 511 | 512 | ############################################################################### 513 | # Set the Mifare CLT route Location : 514 | # This settings will be used when application does not set this parameter 515 | # Host 0x00 516 | # eSE 0x01 517 | # UICC 0x02 518 | DEFAULT_MIFARE_CLT_ROUTE=0x02 519 | 520 | ############################################################################### 521 | #Chip type 522 | #PN547C2 0x01 523 | #PN65T 0x02 524 | NXP_NFC_CHIP=0x01 525 | 526 | ############################################################################### 527 | #SWP Reader feature 528 | #Timeout in seconds 529 | NXP_SWP_RD_START_TIMEOUT=0x0A 530 | #Timeout in seconds 531 | NXP_SWP_RD_TAG_OP_TIMEOUT=0x01 532 | 533 | ############################################################################### 534 | # CE when Screen state is locked 535 | # Disable 0x00 536 | # Enable 0x01 537 | NXP_CE_ROUTE_STRICT_DISABLE=0x01 538 | 539 | ############################################################################### 540 | # AID Matching platform options 541 | # AID_MATCHING_L 0x01 542 | # AID_MATCHING_K 0x02 543 | AID_MATCHING_PLATFORM=0x01 544 | ################################################################################ 545 | #Used to Restrict Type A UICC baud rate 546 | #0 = default supported 547 | #1 = 212 maximum supported 548 | #2 = 424 maximum supported 549 | #3 = 848 maximum supported 550 | 551 | NXP_TYPEA_UICC_BAUD_RATE=0x00 552 | ################################################################################ 553 | #Used to Restrict Type B UICC baud rate 554 | #0 = default supported 555 | #1 = 212 maximum supported 556 | #2 = 424 maximum supported 557 | #3 = 848 maximum supported 558 | 559 | NXP_TYPEB_UICC_BAUD_RATE=0x00 560 | ################################################################################ 561 | 562 | #Config to allow adding aids 563 | #NFC on/off is required after this config 564 | #1 = enabling adding aid to NFCC routing table. 565 | #0 = disabling adding aid to NFCC routing table. 566 | NXP_ENABLE_ADD_AID=0x01 567 | ################################################################################## 568 | 569 | --------------------------------------------------------------------------------