├── .gitignore ├── Cherry MX Breakout Board ├── Cherry MX Breakout Board (Kailh Socket)-cache.lib ├── Cherry MX Breakout Board (Kailh Socket).kicad_pcb ├── Cherry MX Breakout Board (Kailh Socket).kicad_pcb-bak ├── Cherry MX Breakout Board (Kailh Socket).net ├── Cherry MX Breakout Board (Kailh Socket).pro ├── Cherry MX Breakout Board (Kailh Socket).sch ├── Cherry MX Breakout Board (Kailh Socket).sch-bak ├── Cherry MX Breakout Board (Mill-Max-7305)-cache.lib ├── Cherry MX Breakout Board (Mill-Max-7305).kicad_pcb ├── Cherry MX Breakout Board (Mill-Max-7305).kicad_pcb-bak ├── Cherry MX Breakout Board (Mill-Max-7305).net ├── Cherry MX Breakout Board (Mill-Max-7305).pro ├── Cherry MX Breakout Board (Mill-Max-7305).sch ├── Cherry MX Breakout Board (Mill-Max-7305).sch-bak ├── Cherry MX Breakout Board.pro ├── fp-info-cache ├── fp-lib-table └── sym-lib-table ├── LICENSE ├── README.md ├── datasheets ├── Cherry MX.pdf ├── Kailh Socket.pdf ├── LTST-A683CEGBW.pdf └── Mill-Max.pdf ├── gerbers ├── Kailh Socket │ ├── Cherry MX Breakout Board (Kailh Socket)-B_Cu.gbr │ ├── Cherry MX Breakout Board (Kailh Socket)-B_Mask.gbr │ ├── Cherry MX Breakout Board (Kailh Socket)-B_SilkS.gbr │ ├── Cherry MX Breakout Board (Kailh Socket)-Edge_Cuts.gbr │ ├── Cherry MX Breakout Board (Kailh Socket)-F_Cu.gbr │ ├── Cherry MX Breakout Board (Kailh Socket)-F_Mask.gbr │ ├── Cherry MX Breakout Board (Kailh Socket)-F_SilkS.gbr │ ├── Cherry MX Breakout Board (Kailh Socket)-NPTH.drl │ └── Cherry MX Breakout Board (Kailh Socket)-PTH.drl └── Mill-Max 7305 │ ├── Cherry MX Breakout Board (Mill-Max-7305)-B_Cu.gbr │ ├── Cherry MX Breakout Board (Mill-Max-7305)-B_Mask.gbr │ ├── Cherry MX Breakout Board (Mill-Max-7305)-B_SilkS.gbr │ ├── Cherry MX Breakout Board (Mill-Max-7305)-Edge_Cuts.gbr │ ├── Cherry MX Breakout Board (Mill-Max-7305)-F_Cu.gbr │ ├── Cherry MX Breakout Board (Mill-Max-7305)-F_Mask.gbr │ ├── Cherry MX Breakout Board (Mill-Max-7305)-F_SilkS.gbr │ ├── Cherry MX Breakout Board (Mill-Max-7305)-NPTH.drl │ └── Cherry MX Breakout Board (Mill-Max-7305)-PTH.drl └── libraries ├── Cherry MX.pretty ├── Cherry-MX_PCB-Mounted.kicad_mod ├── Cherry-MX_PCB-Mounted_LTST-A683CEGBW_Kailh_Socket.kicad_mod ├── Cherry-MX_PCB-Mounted_LTST-A683CEGBW_Mill-Max-7305.kicad_mod ├── Cherry-MX_Plate-Mounted.kicad_mod ├── Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Kailh_Socket.kicad_mod ├── Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Mill-Max-7305.kicad_mod ├── Kailh_Socket.kicad_mod ├── Kailh_Socket.stp ├── LTST-A683CEGBW.kicad_mod ├── LTST-A683CEGBW.step └── Mill-Max-7305.step ├── Cherry_MX.dcm └── Cherry_MX.lib /.gitignore: -------------------------------------------------------------------------------- 1 | .DS_Store -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Kailh Socket)-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Cherry_MX_Cherry_MX_RGB 5 | # 6 | DEF Cherry_MX_Cherry_MX_RGB U 0 40 Y Y 1 F N 7 | F0 "U" -200 350 50 H V C CNN 8 | F1 "Cherry_MX_Cherry_MX_RGB" 0 -150 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | DRAW 12 | S 225 -100 -225 300 0 1 0 N 13 | X GND 1 -325 -50 100 R 50 50 1 1 I 14 | X DIN 2 325 50 100 L 50 50 1 1 I 15 | X DOUT 3 325 -50 100 L 50 50 1 1 I 16 | X VCC 4 -325 50 100 R 50 50 1 1 I 17 | X SW1 5 325 250 100 L 50 50 1 1 I 18 | X SW2 6 325 150 100 L 50 50 1 1 I 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Connector_Conn_01x06_Male 23 | # 24 | DEF Connector_Conn_01x06_Male J 0 40 Y N 1 F N 25 | F0 "J" 0 300 50 H V C CNN 26 | F1 "Connector_Conn_01x06_Male" 0 -400 50 H V C CNN 27 | F2 "" 0 0 50 H I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | Connector*:*_1x??_* 31 | $ENDFPLIST 32 | DRAW 33 | S 34 -295 0 -305 1 1 6 F 34 | S 34 -195 0 -205 1 1 6 F 35 | S 34 -95 0 -105 1 1 6 F 36 | S 34 5 0 -5 1 1 6 F 37 | S 34 105 0 95 1 1 6 F 38 | S 34 205 0 195 1 1 6 F 39 | P 2 1 1 6 50 -300 34 -300 N 40 | P 2 1 1 6 50 -200 34 -200 N 41 | P 2 1 1 6 50 -100 34 -100 N 42 | P 2 1 1 6 50 0 34 0 N 43 | P 2 1 1 6 50 100 34 100 N 44 | P 2 1 1 6 50 200 34 200 N 45 | X Pin_1 1 200 200 150 L 50 50 1 1 P 46 | X Pin_2 2 200 100 150 L 50 50 1 1 P 47 | X Pin_3 3 200 0 150 L 50 50 1 1 P 48 | X Pin_4 4 200 -100 150 L 50 50 1 1 P 49 | X Pin_5 5 200 -200 150 L 50 50 1 1 P 50 | X Pin_6 6 200 -300 150 L 50 50 1 1 P 51 | ENDDRAW 52 | ENDDEF 53 | # 54 | # Device_C 55 | # 56 | DEF Device_C C 0 10 N Y 1 F N 57 | F0 "C" 25 100 50 H V L CNN 58 | F1 "Device_C" 25 -100 50 H V L CNN 59 | F2 "" 38 -150 50 H I C CNN 60 | F3 "" 0 0 50 H I C CNN 61 | $FPLIST 62 | C_* 63 | $ENDFPLIST 64 | DRAW 65 | P 2 0 1 20 -80 -30 80 -30 N 66 | P 2 0 1 20 -80 30 80 30 N 67 | X ~ 1 0 150 110 D 50 50 1 1 P 68 | X ~ 2 0 -150 110 U 50 50 1 1 P 69 | ENDDRAW 70 | ENDDEF 71 | # 72 | # power_GND 73 | # 74 | DEF power_GND #PWR 0 0 Y Y 1 F P 75 | F0 "#PWR" 0 -250 50 H I C CNN 76 | F1 "power_GND" 0 -150 50 H V C CNN 77 | F2 "" 0 0 50 H I C CNN 78 | F3 "" 0 0 50 H I C CNN 79 | DRAW 80 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 81 | X GND 1 0 0 0 D 50 50 1 1 W N 82 | ENDDRAW 83 | ENDDEF 84 | # 85 | # power_VCC 86 | # 87 | DEF power_VCC #PWR 0 0 Y Y 1 F P 88 | F0 "#PWR" 0 -150 50 H I C CNN 89 | F1 "power_VCC" 0 150 50 H V C CNN 90 | F2 "" 0 0 50 H I C CNN 91 | F3 "" 0 0 50 H I C CNN 92 | DRAW 93 | C 0 75 25 0 1 0 N 94 | P 2 0 1 0 0 0 0 50 N 95 | X VCC 1 0 0 0 U 50 50 1 1 W N 96 | ENDDRAW 97 | ENDDEF 98 | # 99 | #End Library 100 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Kailh Socket).kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20171130) (host pcbnew "(5.1.5-0-10_14)") 2 | 3 | (general 4 | (thickness 1.6) 5 | (drawings 6) 6 | (tracks 32) 7 | (zones 0) 8 | (modules 3) 9 | (nets 7) 10 | ) 11 | 12 | (page A4) 13 | (title_block 14 | (title "Cherry MX Breakout Board with LTST-A683CEGBW LED and Kailh Socket") 15 | (date 2020-01-23) 16 | (rev v1) 17 | (comment 2 https://tldrlegal.com/license/mit-license) 18 | (comment 3 "License: MIT") 19 | (comment 4 "Author: Sebastian Szczepanski") 20 | ) 21 | 22 | (layers 23 | (0 F.Cu signal) 24 | (31 B.Cu signal) 25 | (32 B.Adhes user) 26 | (33 F.Adhes user) 27 | (34 B.Paste user) 28 | (35 F.Paste user) 29 | (36 B.SilkS user) 30 | (37 F.SilkS user) 31 | (38 B.Mask user) 32 | (39 F.Mask user) 33 | (40 Dwgs.User user) 34 | (41 Cmts.User user) 35 | (42 Eco1.User user) 36 | (43 Eco2.User user) 37 | (44 Edge.Cuts user) 38 | (45 Margin user) 39 | (46 B.CrtYd user) 40 | (47 F.CrtYd user) 41 | (48 B.Fab user) 42 | (49 F.Fab user) 43 | ) 44 | 45 | (setup 46 | (last_trace_width 0.25) 47 | (trace_clearance 0.2) 48 | (zone_clearance 0.508) 49 | (zone_45_only no) 50 | (trace_min 0.2) 51 | (via_size 0.8) 52 | (via_drill 0.4) 53 | (via_min_size 0.4) 54 | (via_min_drill 0.3) 55 | (uvia_size 0.3) 56 | (uvia_drill 0.1) 57 | (uvias_allowed no) 58 | (uvia_min_size 0.2) 59 | (uvia_min_drill 0.1) 60 | (edge_width 0.05) 61 | (segment_width 0.2) 62 | (pcb_text_width 0.3) 63 | (pcb_text_size 1.5 1.5) 64 | (mod_edge_width 0.12) 65 | (mod_text_size 1 1) 66 | (mod_text_width 0.15) 67 | (pad_size 2.55 2.5) 68 | (pad_drill 0) 69 | (pad_to_mask_clearance 0.051) 70 | (solder_mask_min_width 0.25) 71 | (aux_axis_origin 0 0) 72 | (visible_elements FFFFFF7F) 73 | (pcbplotparams 74 | (layerselection 0x010f0_ffffffff) 75 | (usegerberextensions false) 76 | (usegerberattributes false) 77 | (usegerberadvancedattributes false) 78 | (creategerberjobfile false) 79 | (excludeedgelayer true) 80 | (linewidth 0.100000) 81 | (plotframeref false) 82 | (viasonmask false) 83 | (mode 1) 84 | (useauxorigin false) 85 | (hpglpennumber 1) 86 | (hpglpenspeed 20) 87 | (hpglpendiameter 15.000000) 88 | (psnegative false) 89 | (psa4output false) 90 | (plotreference true) 91 | (plotvalue true) 92 | (plotinvisibletext false) 93 | (padsonsilk false) 94 | (subtractmaskfromsilk false) 95 | (outputformat 1) 96 | (mirror false) 97 | (drillshape 0) 98 | (scaleselection 1) 99 | (outputdirectory "../gerbers/Kailh Socket/")) 100 | ) 101 | 102 | (net 0 "") 103 | (net 1 VCC) 104 | (net 2 GND) 105 | (net 3 SW1) 106 | (net 4 SW2) 107 | (net 5 DIN) 108 | (net 6 DOUT) 109 | 110 | (net_class Default "This is the default net class." 111 | (clearance 0.2) 112 | (trace_width 0.25) 113 | (via_dia 0.8) 114 | (via_drill 0.4) 115 | (uvia_dia 0.3) 116 | (uvia_drill 0.1) 117 | (add_net DIN) 118 | (add_net DOUT) 119 | (add_net GND) 120 | (add_net SW1) 121 | (add_net SW2) 122 | (add_net VCC) 123 | ) 124 | 125 | (module Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5E27E28B) 126 | (at 159.092 117.946 270) 127 | (descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row") 128 | (tags "Through hole pin header THT 1x06 2.54mm single row") 129 | (path /5E281B3F) 130 | (fp_text reference J1 (at 2.286 2.667 90) (layer F.SilkS) hide 131 | (effects (font (size 1 1) (thickness 0.15))) 132 | ) 133 | (fp_text value Conn_01x06_Male (at 2.794 10.668 180) (layer F.Fab) hide 134 | (effects (font (size 1 1) (thickness 0.15))) 135 | ) 136 | (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) 137 | (fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1)) 138 | (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1)) 139 | (fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) 140 | (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) 141 | (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 142 | (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12)) 143 | (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 144 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 145 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) 146 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) 147 | (fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05)) 148 | (fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05)) 149 | (fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) 150 | (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 151 | (fp_text user %R (at 0 6.35) (layer F.Fab) hide 152 | (effects (font (size 1 1) (thickness 0.15))) 153 | ) 154 | (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 155 | (net 5 DIN)) 156 | (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 157 | (net 2 GND)) 158 | (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 159 | (net 6 DOUT)) 160 | (pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 161 | (net 1 VCC)) 162 | (pad 5 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 163 | (net 3 SW1)) 164 | (pad 6 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 165 | (net 4 SW2)) 166 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x06_P2.54mm_Vertical.wrl 167 | (at (xyz 0 0 0)) 168 | (scale (xyz 1 1 1)) 169 | (rotate (xyz 0 0 0)) 170 | ) 171 | ) 172 | 173 | (module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5B301BBE) (tstamp 5E2DEEB2) 174 | (at 153.92 121.52) 175 | (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") 176 | (tags capacitor) 177 | (path /5E27C2F1) 178 | (attr smd) 179 | (fp_text reference C1 (at 0.003766 -1.506827) (layer B.SilkS) 180 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 181 | ) 182 | (fp_text value 0.1uF (at 0 -1.43) (layer B.SilkS) hide 183 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 184 | ) 185 | (fp_text user %R (at 0 0) (layer B.Fab) 186 | (effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror)) 187 | ) 188 | (fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05)) 189 | (fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05)) 190 | (fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05)) 191 | (fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05)) 192 | (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer B.SilkS) (width 0.12)) 193 | (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer B.SilkS) (width 0.12)) 194 | (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1)) 195 | (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1)) 196 | (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1)) 197 | (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1)) 198 | (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) 199 | (net 2 GND)) 200 | (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) 201 | (net 1 VCC)) 202 | (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl 203 | (at (xyz 0 0 0)) 204 | (scale (xyz 1 1 1)) 205 | (rotate (xyz 0 0 0)) 206 | ) 207 | ) 208 | 209 | (module "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Kailh_Socket" (layer F.Cu) (tedit 5E2DEC68) (tstamp 5E299333) 210 | (at 153.416 105.41 90) 211 | (path /5E278424) 212 | (fp_text reference U1 (at 0 -8.7 90) (layer F.SilkS) hide 213 | (effects (font (size 1 1) (thickness 0.15))) 214 | ) 215 | (fp_text value Cherry_MX_RGB (at 0 9 90) (layer F.Fab) hide 216 | (effects (font (size 1 1) (thickness 0.15))) 217 | ) 218 | (fp_poly (pts (xy 1.7 6.55) (xy -1.7 6.55) (xy -1.7 3.55) (xy 1.7 3.55)) (layer Edge.Cuts) (width 0.01)) 219 | (fp_line (start -1.7 3.25) (end -2 3.25) (layer B.SilkS) (width 0.12)) 220 | (fp_line (start -2 3.25) (end -2 3.55) (layer B.SilkS) (width 0.12)) 221 | (fp_line (start 7.8 7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 222 | (fp_line (start -7.8 7.8) (end -7.8 -7.8) (layer F.Fab) (width 0.12)) 223 | (fp_line (start 7.8 7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 224 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 225 | (pad 3 smd rect (at 2.6 4.3 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 226 | (net 6 DOUT)) 227 | (pad 4 smd rect (at 2.6 5.8 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 228 | (net 1 VCC)) 229 | (pad 2 smd rect (at -2.6 5.8 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 230 | (net 5 DIN)) 231 | (pad 1 smd rect (at -2.6 4.3 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 232 | (net 2 GND)) 233 | (pad 6 smd rect (at 6.015 -5.08 90) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask) 234 | (net 4 SW2)) 235 | (pad 5 smd rect (at -7.41 -2.54 90) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask) 236 | (net 3 SW1)) 237 | (pad "" np_thru_hole circle (at 2.54 -5.08 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 238 | (pad "" np_thru_hole circle (at -3.81 -2.54 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 239 | (pad "" np_thru_hole circle (at 0 0 90) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 240 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Kailh_Socket.stp" 241 | (offset (xyz -0.65 3.8 -3.53)) 242 | (scale (xyz 1 1 1)) 243 | (rotate (xyz 0 0 180)) 244 | ) 245 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/LTST-A683CEGBW.step" 246 | (offset (xyz 0 -5.05 -1.9)) 247 | (scale (xyz 1 1 1)) 248 | (rotate (xyz 0 0 0)) 249 | ) 250 | ) 251 | 252 | (gr_text "Cherry MX Breakout Board v1\n" (at 144.53 113.31 90) (layer F.SilkS) 253 | (effects (font (size 0.8 0.7) (thickness 0.13)) (justify left)) 254 | ) 255 | (gr_text "SW2 SW1 VCC DOUT GND DIN" (at 152.742 120.613) (layer F.SilkS) 256 | (effects (font (size 0.8 0.7) (thickness 0.1))) 257 | ) 258 | (gr_line (start 143.526 97.028) (end 161.798 97.028) (layer Edge.Cuts) (width 0.1)) 259 | (gr_line (start 143.526 122.936) (end 143.526 97.028) (layer Edge.Cuts) (width 0.1)) 260 | (gr_line (start 161.798 122.936) (end 143.526 122.936) (layer Edge.Cuts) (width 0.1)) 261 | (gr_line (start 161.798 97.028) (end 161.798 122.936) (layer Edge.Cuts) (width 0.1)) 262 | 263 | (segment (start 159.216 101.66) (end 158.956 101.4) (width 0.25) (layer B.Cu) (net 1)) 264 | (segment (start 159.216 102.81) (end 159.216 101.66) (width 0.25) (layer B.Cu) (net 1)) 265 | (segment (start 157.190998 101.4) (end 156.05999 102.531008) (width 0.25) (layer B.Cu) (net 1)) 266 | (segment (start 158.956 101.4) (end 157.190998 101.4) (width 0.25) (layer B.Cu) (net 1)) 267 | (segment (start 156.05999 102.531008) (end 156.05999 113.33001) (width 0.25) (layer B.Cu) (net 1)) 268 | (segment (start 156.05999 113.33001) (end 151.44 117.95) (width 0.25) (layer B.Cu) (net 1)) 269 | (segment (start 152.695 121.52) (end 151.45 120.275) (width 0.25) (layer B.Cu) (net 1)) 270 | (segment (start 153.1325 121.52) (end 152.695 121.52) (width 0.25) (layer B.Cu) (net 1)) 271 | (segment (start 151.45 120.275) (end 151.45 118) (width 0.25) (layer B.Cu) (net 1)) 272 | (segment (start 156.679 117.946) (end 156.552 117.946) (width 0.25) (layer B.Cu) (net 2)) 273 | (segment (start 157.716 108.01) (end 157.716 116.704) (width 0.25) (layer B.Cu) (net 2)) 274 | (segment (start 157.716 116.704) (end 156.51 117.91) (width 0.25) (layer B.Cu) (net 2)) 275 | (segment (start 155.145 121.52) (end 156.53 120.135) (width 0.25) (layer B.Cu) (net 2)) 276 | (segment (start 154.7075 121.52) (end 155.145 121.52) (width 0.25) (layer B.Cu) (net 2)) 277 | (segment (start 156.53 120.135) (end 156.53 118.03) (width 0.25) (layer B.Cu) (net 2)) 278 | (segment (start 148.932 117.946) (end 148.932 114.838) (width 0.25) (layer B.Cu) (net 3)) 279 | (segment (start 148.932 114.838) (end 150.72 113.05) (width 0.25) (layer B.Cu) (net 3)) 280 | (segment (start 150.72 113.05) (end 150.72 112.98) (width 0.25) (layer B.Cu) (net 3)) 281 | (segment (start 146.392 116.743919) (end 145.25 115.601919) (width 0.25) (layer B.Cu) (net 4)) 282 | (segment (start 146.392 117.946) (end 146.392 116.743919) (width 0.25) (layer B.Cu) (net 4)) 283 | (segment (start 145.25 115.601919) (end 145.25 100.22) (width 0.25) (layer B.Cu) (net 4)) 284 | (segment (start 145.25 100.22) (end 146.04 99.43) (width 0.25) (layer B.Cu) (net 4)) 285 | (segment (start 146.04 99.43) (end 148.48 99.43) (width 0.25) (layer B.Cu) (net 4)) 286 | (segment (start 159.098001 117.939999) (end 159.092 117.946) (width 0.25) (layer B.Cu) (net 5)) 287 | (segment (start 158.896 117.623) (end 159.092 117.819) (width 0.25) (layer B.Cu) (net 5)) 288 | (segment (start 158.796 117.606) (end 159.05 117.86) (width 0.25) (layer B.Cu) (net 5)) 289 | (segment (start 159.216 108.01) (end 159.216 117.764) (width 0.25) (layer B.Cu) (net 5)) 290 | (segment (start 159.216 117.764) (end 159.05 117.93) (width 0.25) (layer B.Cu) (net 5)) 291 | (segment (start 157.016 102.81) (end 156.51 103.316) (width 0.25) (layer B.Cu) (net 6)) 292 | (segment (start 157.716 102.81) (end 157.016 102.81) (width 0.25) (layer B.Cu) (net 6)) 293 | (segment (start 156.51 103.316) (end 156.51 115.4) (width 0.25) (layer B.Cu) (net 6)) 294 | (segment (start 156.51 115.4) (end 154.03 117.88) (width 0.25) (layer B.Cu) (net 6)) 295 | 296 | ) 297 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Kailh Socket).kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20171130) (host pcbnew "(5.1.5-0-10_14)") 2 | 3 | (general 4 | (thickness 1.6) 5 | (drawings 6) 6 | (tracks 32) 7 | (zones 0) 8 | (modules 3) 9 | (nets 7) 10 | ) 11 | 12 | (page A4) 13 | (title_block 14 | (title "Cherry MX Breakout Board with LTST-A683CEGBW LED and Kailh Socket") 15 | (date 2020-01-23) 16 | (rev v1) 17 | (comment 2 https://tldrlegal.com/license/mit-license) 18 | (comment 3 "License: MIT") 19 | (comment 4 "Author: Sebastian Szczepanski") 20 | ) 21 | 22 | (layers 23 | (0 F.Cu signal) 24 | (31 B.Cu signal) 25 | (32 B.Adhes user) 26 | (33 F.Adhes user) 27 | (34 B.Paste user) 28 | (35 F.Paste user) 29 | (36 B.SilkS user) 30 | (37 F.SilkS user) 31 | (38 B.Mask user) 32 | (39 F.Mask user) 33 | (40 Dwgs.User user) 34 | (41 Cmts.User user) 35 | (42 Eco1.User user) 36 | (43 Eco2.User user) 37 | (44 Edge.Cuts user) 38 | (45 Margin user) 39 | (46 B.CrtYd user) 40 | (47 F.CrtYd user) 41 | (48 B.Fab user) 42 | (49 F.Fab user) 43 | ) 44 | 45 | (setup 46 | (last_trace_width 0.25) 47 | (trace_clearance 0.2) 48 | (zone_clearance 0.508) 49 | (zone_45_only no) 50 | (trace_min 0.2) 51 | (via_size 0.8) 52 | (via_drill 0.4) 53 | (via_min_size 0.4) 54 | (via_min_drill 0.3) 55 | (uvia_size 0.3) 56 | (uvia_drill 0.1) 57 | (uvias_allowed no) 58 | (uvia_min_size 0.2) 59 | (uvia_min_drill 0.1) 60 | (edge_width 0.05) 61 | (segment_width 0.2) 62 | (pcb_text_width 0.3) 63 | (pcb_text_size 1.5 1.5) 64 | (mod_edge_width 0.12) 65 | (mod_text_size 1 1) 66 | (mod_text_width 0.15) 67 | (pad_size 2.55 2.5) 68 | (pad_drill 0) 69 | (pad_to_mask_clearance 0.051) 70 | (solder_mask_min_width 0.25) 71 | (aux_axis_origin 0 0) 72 | (visible_elements FFFFFF7F) 73 | (pcbplotparams 74 | (layerselection 0x010f0_ffffffff) 75 | (usegerberextensions false) 76 | (usegerberattributes false) 77 | (usegerberadvancedattributes false) 78 | (creategerberjobfile false) 79 | (excludeedgelayer true) 80 | (linewidth 0.100000) 81 | (plotframeref false) 82 | (viasonmask false) 83 | (mode 1) 84 | (useauxorigin false) 85 | (hpglpennumber 1) 86 | (hpglpenspeed 20) 87 | (hpglpendiameter 15.000000) 88 | (psnegative false) 89 | (psa4output false) 90 | (plotreference true) 91 | (plotvalue true) 92 | (plotinvisibletext false) 93 | (padsonsilk false) 94 | (subtractmaskfromsilk false) 95 | (outputformat 1) 96 | (mirror false) 97 | (drillshape 0) 98 | (scaleselection 1) 99 | (outputdirectory "../gerbers/Kailh Socket/")) 100 | ) 101 | 102 | (net 0 "") 103 | (net 1 VCC) 104 | (net 2 GND) 105 | (net 3 SW1) 106 | (net 4 SW2) 107 | (net 5 DIN) 108 | (net 6 DOUT) 109 | 110 | (net_class Default "This is the default net class." 111 | (clearance 0.2) 112 | (trace_width 0.25) 113 | (via_dia 0.8) 114 | (via_drill 0.4) 115 | (uvia_dia 0.3) 116 | (uvia_drill 0.1) 117 | (add_net DIN) 118 | (add_net DOUT) 119 | (add_net GND) 120 | (add_net SW1) 121 | (add_net SW2) 122 | (add_net VCC) 123 | ) 124 | 125 | (module Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5E27E28B) 126 | (at 159.092 117.946 270) 127 | (descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row") 128 | (tags "Through hole pin header THT 1x06 2.54mm single row") 129 | (path /5E281B3F) 130 | (fp_text reference J1 (at 2.286 2.667 90) (layer F.SilkS) hide 131 | (effects (font (size 1 1) (thickness 0.15))) 132 | ) 133 | (fp_text value Conn_01x06_Male (at 2.794 10.668 180) (layer F.Fab) hide 134 | (effects (font (size 1 1) (thickness 0.15))) 135 | ) 136 | (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) 137 | (fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1)) 138 | (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1)) 139 | (fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) 140 | (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) 141 | (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 142 | (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12)) 143 | (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 144 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 145 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) 146 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) 147 | (fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05)) 148 | (fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05)) 149 | (fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) 150 | (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 151 | (fp_text user %R (at 0 6.35) (layer F.Fab) hide 152 | (effects (font (size 1 1) (thickness 0.15))) 153 | ) 154 | (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 155 | (net 5 DIN)) 156 | (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 157 | (net 2 GND)) 158 | (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 159 | (net 6 DOUT)) 160 | (pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 161 | (net 1 VCC)) 162 | (pad 5 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 163 | (net 3 SW1)) 164 | (pad 6 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 165 | (net 4 SW2)) 166 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x06_P2.54mm_Vertical.wrl 167 | (at (xyz 0 0 0)) 168 | (scale (xyz 1 1 1)) 169 | (rotate (xyz 0 0 0)) 170 | ) 171 | ) 172 | 173 | (module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5B301BBE) (tstamp 5E2DEEB2) 174 | (at 153.92 121.52) 175 | (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") 176 | (tags capacitor) 177 | (path /5E27C2F1) 178 | (attr smd) 179 | (fp_text reference C1 (at 0.003766 -1.506827) (layer B.SilkS) 180 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 181 | ) 182 | (fp_text value 0.1uF (at 0 -1.43) (layer B.SilkS) hide 183 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 184 | ) 185 | (fp_text user %R (at 0 0) (layer B.Fab) 186 | (effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror)) 187 | ) 188 | (fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05)) 189 | (fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05)) 190 | (fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05)) 191 | (fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05)) 192 | (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer B.SilkS) (width 0.12)) 193 | (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer B.SilkS) (width 0.12)) 194 | (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1)) 195 | (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1)) 196 | (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1)) 197 | (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1)) 198 | (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) 199 | (net 2 GND)) 200 | (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) 201 | (net 1 VCC)) 202 | (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl 203 | (at (xyz 0 0 0)) 204 | (scale (xyz 1 1 1)) 205 | (rotate (xyz 0 0 0)) 206 | ) 207 | ) 208 | 209 | (module "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Kailh_Socket" (layer F.Cu) (tedit 5E2DEC68) (tstamp 5E299333) 210 | (at 153.416 105.41 90) 211 | (path /5E278424) 212 | (fp_text reference U1 (at 0 -8.7 90) (layer F.SilkS) hide 213 | (effects (font (size 1 1) (thickness 0.15))) 214 | ) 215 | (fp_text value Cherry_MX_RGB (at 0 9 90) (layer F.Fab) hide 216 | (effects (font (size 1 1) (thickness 0.15))) 217 | ) 218 | (fp_poly (pts (xy 1.7 6.55) (xy -1.7 6.55) (xy -1.7 3.55) (xy 1.7 3.55)) (layer Edge.Cuts) (width 0.01)) 219 | (fp_line (start -1.7 3.25) (end -2 3.25) (layer B.SilkS) (width 0.12)) 220 | (fp_line (start -2 3.25) (end -2 3.55) (layer B.SilkS) (width 0.12)) 221 | (fp_line (start 7.8 7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 222 | (fp_line (start -7.8 7.8) (end -7.8 -7.8) (layer F.Fab) (width 0.12)) 223 | (fp_line (start 7.8 7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 224 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 225 | (pad 3 smd rect (at 2.6 4.3 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 226 | (net 6 DOUT)) 227 | (pad 4 smd rect (at 2.6 5.8 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 228 | (net 1 VCC)) 229 | (pad 2 smd rect (at -2.6 5.8 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 230 | (net 5 DIN)) 231 | (pad 1 smd rect (at -2.6 4.3 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 232 | (net 2 GND)) 233 | (pad 6 smd rect (at 6.015 -5.08 90) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask) 234 | (net 4 SW2)) 235 | (pad 5 smd rect (at -7.41 -2.54 90) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask) 236 | (net 3 SW1)) 237 | (pad "" np_thru_hole circle (at 2.54 -5.08 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 238 | (pad "" np_thru_hole circle (at -3.81 -2.54 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 239 | (pad "" np_thru_hole circle (at 0 0 90) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 240 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Kailh_Socket.stp" 241 | (offset (xyz -0.65 3.8 -3.53)) 242 | (scale (xyz 1 1 1)) 243 | (rotate (xyz 0 0 180)) 244 | ) 245 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/LTST-A683CEGBW.step" 246 | (offset (xyz 0 -5.05 -1.9)) 247 | (scale (xyz 1 1 1)) 248 | (rotate (xyz 0 0 0)) 249 | ) 250 | ) 251 | 252 | (gr_text "Cherry MX Breakout Board v1\n" (at 144.53 113.31 90) (layer F.SilkS) 253 | (effects (font (size 0.8 0.7) (thickness 0.13)) (justify left)) 254 | ) 255 | (gr_text "SW2 SW1 DOUT VCC DIN GND" (at 152.742 120.613) (layer F.SilkS) 256 | (effects (font (size 0.8 0.7) (thickness 0.1))) 257 | ) 258 | (gr_line (start 143.526 97.028) (end 161.798 97.028) (layer Edge.Cuts) (width 0.1)) 259 | (gr_line (start 143.526 122.936) (end 143.526 97.028) (layer Edge.Cuts) (width 0.1)) 260 | (gr_line (start 161.798 122.936) (end 143.526 122.936) (layer Edge.Cuts) (width 0.1)) 261 | (gr_line (start 161.798 97.028) (end 161.798 122.936) (layer Edge.Cuts) (width 0.1)) 262 | 263 | (segment (start 157.016 102.81) (end 156.51 103.316) (width 0.25) (layer B.Cu) (net 6)) 264 | (segment (start 157.716 102.81) (end 157.016 102.81) (width 0.25) (layer B.Cu) (net 6)) 265 | (segment (start 156.51 103.316) (end 156.51 115.4) (width 0.25) (layer B.Cu) (net 6)) 266 | (segment (start 156.51 115.4) (end 154.03 117.88) (width 0.25) (layer B.Cu) (net 6)) 267 | (segment (start 159.098001 117.939999) (end 159.092 117.946) (width 0.25) (layer B.Cu) (net 5)) 268 | (segment (start 158.896 117.623) (end 159.092 117.819) (width 0.25) (layer B.Cu) (net 5)) 269 | (segment (start 158.796 117.606) (end 159.05 117.86) (width 0.25) (layer B.Cu) (net 5)) 270 | (segment (start 159.216 108.01) (end 159.216 117.764) (width 0.25) (layer B.Cu) (net 5)) 271 | (segment (start 159.216 117.764) (end 159.05 117.93) (width 0.25) (layer B.Cu) (net 5)) 272 | (segment (start 148.932 117.946) (end 148.932 114.838) (width 0.25) (layer B.Cu) (net 3)) 273 | (segment (start 148.932 114.838) (end 150.72 113.05) (width 0.25) (layer B.Cu) (net 3)) 274 | (segment (start 150.72 113.05) (end 150.72 112.98) (width 0.25) (layer B.Cu) (net 3)) 275 | (segment (start 146.392 116.743919) (end 145.25 115.601919) (width 0.25) (layer B.Cu) (net 4)) 276 | (segment (start 146.392 117.946) (end 146.392 116.743919) (width 0.25) (layer B.Cu) (net 4)) 277 | (segment (start 145.25 115.601919) (end 145.25 100.22) (width 0.25) (layer B.Cu) (net 4)) 278 | (segment (start 145.25 100.22) (end 146.04 99.43) (width 0.25) (layer B.Cu) (net 4)) 279 | (segment (start 146.04 99.43) (end 148.48 99.43) (width 0.25) (layer B.Cu) (net 4)) 280 | (segment (start 156.679 117.946) (end 156.552 117.946) (width 0.25) (layer B.Cu) (net 2)) 281 | (segment (start 157.716 108.01) (end 157.716 116.704) (width 0.25) (layer B.Cu) (net 2)) 282 | (segment (start 157.716 116.704) (end 156.51 117.91) (width 0.25) (layer B.Cu) (net 2)) 283 | (segment (start 159.216 101.66) (end 158.956 101.4) (width 0.25) (layer B.Cu) (net 1)) 284 | (segment (start 159.216 102.81) (end 159.216 101.66) (width 0.25) (layer B.Cu) (net 1)) 285 | (segment (start 157.190998 101.4) (end 156.05999 102.531008) (width 0.25) (layer B.Cu) (net 1)) 286 | (segment (start 158.956 101.4) (end 157.190998 101.4) (width 0.25) (layer B.Cu) (net 1)) 287 | (segment (start 156.05999 102.531008) (end 156.05999 113.33001) (width 0.25) (layer B.Cu) (net 1)) 288 | (segment (start 156.05999 113.33001) (end 151.44 117.95) (width 0.25) (layer B.Cu) (net 1)) 289 | (segment (start 152.695 121.52) (end 151.45 120.275) (width 0.25) (layer B.Cu) (net 1)) 290 | (segment (start 153.1325 121.52) (end 152.695 121.52) (width 0.25) (layer B.Cu) (net 1)) 291 | (segment (start 151.45 120.275) (end 151.45 118) (width 0.25) (layer B.Cu) (net 1)) 292 | (segment (start 155.145 121.52) (end 156.53 120.135) (width 0.25) (layer B.Cu) (net 2)) 293 | (segment (start 154.7075 121.52) (end 155.145 121.52) (width 0.25) (layer B.Cu) (net 2)) 294 | (segment (start 156.53 120.135) (end 156.53 118.03) (width 0.25) (layer B.Cu) (net 2)) 295 | 296 | ) 297 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Kailh Socket).net: -------------------------------------------------------------------------------- 1 | (export (version D) 2 | (design 3 | (source "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/Cherry MX Breakout Board/Cherry MX Breakout Board (Kailh Socket).sch") 4 | (date "Sunday, 26 January 2020 at 20:50:50") 5 | (tool "Eeschema (5.1.5-0-10_14)") 6 | (sheet (number 1) (name /) (tstamps /) 7 | (title_block 8 | (title "Cherry MX Breakout Board with LTST-A683CEGBW LED") 9 | (company) 10 | (rev v1) 11 | (date 2020-01-23) 12 | (source "Cherry MX Breakout Board (Kailh Socket).sch") 13 | (comment (number 1) (value "")) 14 | (comment (number 2) (value https://tldrlegal.com/license/mit-license)) 15 | (comment (number 3) (value "License: MIT")) 16 | (comment (number 4) (value "Author: Sebastian Szczepanski"))))) 17 | (components 18 | (comp (ref U1) 19 | (value Cherry_MX_RGB) 20 | (footprint "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Kailh_Socket") 21 | (libsource (lib Cherry_MX) (part Cherry_MX_RGB) (description "")) 22 | (sheetpath (names /) (tstamps /)) 23 | (tstamp 5E278424)) 24 | (comp (ref J1) 25 | (value Conn_01x06_Male) 26 | (footprint Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical) 27 | (datasheet ~) 28 | (libsource (lib Connector) (part Conn_01x06_Male) (description "Generic connector, single row, 01x06, script generated (kicad-library-utils/schlib/autogen/connector/)")) 29 | (sheetpath (names /) (tstamps /)) 30 | (tstamp 5E281B3F)) 31 | (comp (ref C1) 32 | (value 0.1uF) 33 | (footprint Capacitor_SMD:C_0603_1608Metric) 34 | (datasheet ~) 35 | (libsource (lib Device) (part C) (description "Unpolarized capacitor")) 36 | (sheetpath (names /) (tstamps /)) 37 | (tstamp 5E27C2F1))) 38 | (libparts 39 | (libpart (lib Cherry_MX) (part Cherry_MX_RGB) 40 | (fields 41 | (field (name Reference) U) 42 | (field (name Value) Cherry_MX_RGB)) 43 | (pins 44 | (pin (num 1) (name GND) (type input)) 45 | (pin (num 2) (name DIN) (type input)) 46 | (pin (num 3) (name DOUT) (type input)) 47 | (pin (num 4) (name VCC) (type input)) 48 | (pin (num 5) (name SW1) (type input)) 49 | (pin (num 6) (name SW2) (type input)))) 50 | (libpart (lib Connector) (part Conn_01x06_Male) 51 | (description "Generic connector, single row, 01x06, script generated (kicad-library-utils/schlib/autogen/connector/)") 52 | (docs ~) 53 | (footprints 54 | (fp Connector*:*_1x??_*)) 55 | (fields 56 | (field (name Reference) J) 57 | (field (name Value) Conn_01x06_Male)) 58 | (pins 59 | (pin (num 1) (name Pin_1) (type passive)) 60 | (pin (num 2) (name Pin_2) (type passive)) 61 | (pin (num 3) (name Pin_3) (type passive)) 62 | (pin (num 4) (name Pin_4) (type passive)) 63 | (pin (num 5) (name Pin_5) (type passive)) 64 | (pin (num 6) (name Pin_6) (type passive)))) 65 | (libpart (lib Device) (part C) 66 | (description "Unpolarized capacitor") 67 | (docs ~) 68 | (footprints 69 | (fp C_*)) 70 | (fields 71 | (field (name Reference) C) 72 | (field (name Value) C)) 73 | (pins 74 | (pin (num 1) (name ~) (type passive)) 75 | (pin (num 2) (name ~) (type passive))))) 76 | (libraries 77 | (library (logical Cherry_MX) 78 | (uri /Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry_MX.lib)) 79 | (library (logical Connector) 80 | (uri "/Library/Application Support/kicad/library/Connector.lib")) 81 | (library (logical Device) 82 | (uri "/Library/Application Support/kicad/library/Device.lib"))) 83 | (nets 84 | (net (code 1) (name GND) 85 | (node (ref U1) (pin 1)) 86 | (node (ref C1) (pin 2)) 87 | (node (ref J1) (pin 2))) 88 | (net (code 2) (name SW2) 89 | (node (ref U1) (pin 6)) 90 | (node (ref J1) (pin 6))) 91 | (net (code 3) (name VCC) 92 | (node (ref J1) (pin 4)) 93 | (node (ref C1) (pin 1)) 94 | (node (ref U1) (pin 4))) 95 | (net (code 4) (name SW1) 96 | (node (ref J1) (pin 5)) 97 | (node (ref U1) (pin 5))) 98 | (net (code 5) (name DIN) 99 | (node (ref J1) (pin 1)) 100 | (node (ref U1) (pin 2))) 101 | (net (code 6) (name DOUT) 102 | (node (ref J1) (pin 3)) 103 | (node (ref U1) (pin 3))))) -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Kailh Socket).pro: -------------------------------------------------------------------------------- 1 | update=Thursday, 23 January 2020 at 12:30:09 2 | version=1 3 | last_client=pcbnew 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [cvpcb] 9 | version=1 10 | NetIExt=net 11 | [eeschema] 12 | version=1 13 | LibDir= 14 | [eeschema/libraries] 15 | [schematic_editor] 16 | version=1 17 | PageLayoutDescrFile= 18 | PlotDirectoryName= 19 | SubpartIdSeparator=0 20 | SubpartFirstId=65 21 | NetFmtName=Pcbnew 22 | SpiceAjustPassiveValues=0 23 | LabSize=50 24 | ERC_TestSimilarLabels=1 25 | [pcbnew] 26 | version=1 27 | PageLayoutDescrFile= 28 | LastNetListRead=Cherry MX Breakout Board (Kailh Socket).net 29 | CopperLayerCount=2 30 | BoardThickness=1.6 31 | AllowMicroVias=0 32 | AllowBlindVias=0 33 | RequireCourtyardDefinitions=0 34 | ProhibitOverlappingCourtyards=1 35 | MinTrackWidth=0.2 36 | MinViaDiameter=0.4 37 | MinViaDrill=0.3 38 | MinMicroViaDiameter=0.2 39 | MinMicroViaDrill=0.09999999999999999 40 | MinHoleToHole=0.25 41 | TrackWidth1=0.25 42 | ViaDiameter1=0.8 43 | ViaDrill1=0.4 44 | dPairWidth1=0.2 45 | dPairGap1=0.25 46 | dPairViaGap1=0.25 47 | SilkLineWidth=0.12 48 | SilkTextSizeV=1 49 | SilkTextSizeH=1 50 | SilkTextSizeThickness=0.15 51 | SilkTextItalic=0 52 | SilkTextUpright=1 53 | CopperLineWidth=0.2 54 | CopperTextSizeV=1.5 55 | CopperTextSizeH=1.5 56 | CopperTextThickness=0.3 57 | CopperTextItalic=0 58 | CopperTextUpright=1 59 | EdgeCutLineWidth=0.05 60 | CourtyardLineWidth=0.05 61 | OthersLineWidth=0.15 62 | OthersTextSizeV=1 63 | OthersTextSizeH=1 64 | OthersTextSizeThickness=0.15 65 | OthersTextItalic=0 66 | OthersTextUpright=1 67 | SolderMaskClearance=0.051 68 | SolderMaskMinWidth=0.25 69 | SolderPasteClearance=0 70 | SolderPasteRatio=0 71 | [pcbnew/Layer.F.Cu] 72 | Name=F.Cu 73 | Type=0 74 | Enabled=1 75 | [pcbnew/Layer.In1.Cu] 76 | Name=In1.Cu 77 | Type=0 78 | Enabled=0 79 | [pcbnew/Layer.In2.Cu] 80 | Name=In2.Cu 81 | Type=0 82 | Enabled=0 83 | [pcbnew/Layer.In3.Cu] 84 | Name=In3.Cu 85 | Type=0 86 | Enabled=0 87 | [pcbnew/Layer.In4.Cu] 88 | Name=In4.Cu 89 | Type=0 90 | Enabled=0 91 | [pcbnew/Layer.In5.Cu] 92 | Name=In5.Cu 93 | Type=0 94 | Enabled=0 95 | [pcbnew/Layer.In6.Cu] 96 | Name=In6.Cu 97 | Type=0 98 | Enabled=0 99 | [pcbnew/Layer.In7.Cu] 100 | Name=In7.Cu 101 | Type=0 102 | Enabled=0 103 | [pcbnew/Layer.In8.Cu] 104 | Name=In8.Cu 105 | Type=0 106 | Enabled=0 107 | [pcbnew/Layer.In9.Cu] 108 | Name=In9.Cu 109 | Type=0 110 | Enabled=0 111 | [pcbnew/Layer.In10.Cu] 112 | Name=In10.Cu 113 | Type=0 114 | Enabled=0 115 | [pcbnew/Layer.In11.Cu] 116 | Name=In11.Cu 117 | Type=0 118 | Enabled=0 119 | [pcbnew/Layer.In12.Cu] 120 | Name=In12.Cu 121 | Type=0 122 | Enabled=0 123 | [pcbnew/Layer.In13.Cu] 124 | Name=In13.Cu 125 | Type=0 126 | Enabled=0 127 | [pcbnew/Layer.In14.Cu] 128 | Name=In14.Cu 129 | Type=0 130 | Enabled=0 131 | [pcbnew/Layer.In15.Cu] 132 | Name=In15.Cu 133 | Type=0 134 | Enabled=0 135 | [pcbnew/Layer.In16.Cu] 136 | Name=In16.Cu 137 | Type=0 138 | Enabled=0 139 | [pcbnew/Layer.In17.Cu] 140 | Name=In17.Cu 141 | Type=0 142 | Enabled=0 143 | [pcbnew/Layer.In18.Cu] 144 | Name=In18.Cu 145 | Type=0 146 | Enabled=0 147 | [pcbnew/Layer.In19.Cu] 148 | Name=In19.Cu 149 | Type=0 150 | Enabled=0 151 | [pcbnew/Layer.In20.Cu] 152 | Name=In20.Cu 153 | Type=0 154 | Enabled=0 155 | [pcbnew/Layer.In21.Cu] 156 | Name=In21.Cu 157 | Type=0 158 | Enabled=0 159 | [pcbnew/Layer.In22.Cu] 160 | Name=In22.Cu 161 | Type=0 162 | Enabled=0 163 | [pcbnew/Layer.In23.Cu] 164 | Name=In23.Cu 165 | Type=0 166 | Enabled=0 167 | [pcbnew/Layer.In24.Cu] 168 | Name=In24.Cu 169 | Type=0 170 | Enabled=0 171 | [pcbnew/Layer.In25.Cu] 172 | Name=In25.Cu 173 | Type=0 174 | Enabled=0 175 | [pcbnew/Layer.In26.Cu] 176 | Name=In26.Cu 177 | Type=0 178 | Enabled=0 179 | [pcbnew/Layer.In27.Cu] 180 | Name=In27.Cu 181 | Type=0 182 | Enabled=0 183 | [pcbnew/Layer.In28.Cu] 184 | Name=In28.Cu 185 | Type=0 186 | Enabled=0 187 | [pcbnew/Layer.In29.Cu] 188 | Name=In29.Cu 189 | Type=0 190 | Enabled=0 191 | [pcbnew/Layer.In30.Cu] 192 | Name=In30.Cu 193 | Type=0 194 | Enabled=0 195 | [pcbnew/Layer.B.Cu] 196 | Name=B.Cu 197 | Type=0 198 | Enabled=1 199 | [pcbnew/Layer.B.Adhes] 200 | Enabled=1 201 | [pcbnew/Layer.F.Adhes] 202 | Enabled=1 203 | [pcbnew/Layer.B.Paste] 204 | Enabled=1 205 | [pcbnew/Layer.F.Paste] 206 | Enabled=1 207 | [pcbnew/Layer.B.SilkS] 208 | Enabled=1 209 | [pcbnew/Layer.F.SilkS] 210 | Enabled=1 211 | [pcbnew/Layer.B.Mask] 212 | Enabled=1 213 | [pcbnew/Layer.F.Mask] 214 | Enabled=1 215 | [pcbnew/Layer.Dwgs.User] 216 | Enabled=1 217 | [pcbnew/Layer.Cmts.User] 218 | Enabled=1 219 | [pcbnew/Layer.Eco1.User] 220 | Enabled=1 221 | [pcbnew/Layer.Eco2.User] 222 | Enabled=1 223 | [pcbnew/Layer.Edge.Cuts] 224 | Enabled=1 225 | [pcbnew/Layer.Margin] 226 | Enabled=1 227 | [pcbnew/Layer.B.CrtYd] 228 | Enabled=1 229 | [pcbnew/Layer.F.CrtYd] 230 | Enabled=1 231 | [pcbnew/Layer.B.Fab] 232 | Enabled=1 233 | [pcbnew/Layer.F.Fab] 234 | Enabled=1 235 | [pcbnew/Layer.Rescue] 236 | Enabled=0 237 | [pcbnew/Netclasses] 238 | [pcbnew/Netclasses/Default] 239 | Name=Default 240 | Clearance=0.2 241 | TrackWidth=0.25 242 | ViaDiameter=0.8 243 | ViaDrill=0.4 244 | uViaDiameter=0.3 245 | uViaDrill=0.1 246 | dPairWidth=0.2 247 | dPairGap=0.25 248 | dPairViaGap=0.25 249 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Kailh Socket).sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 1 1 7 | Title "Cherry MX Breakout Board with LTST-A683CEGBW LED" 8 | Date "2020-01-23" 9 | Rev "v1" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "https://tldrlegal.com/license/mit-license" 13 | Comment3 "License: MIT" 14 | Comment4 "Author: Sebastian Szczepanski" 15 | $EndDescr 16 | $Comp 17 | L Cherry_MX:Cherry_MX_RGB U1 18 | U 1 1 5E278424 19 | P 5650 3275 20 | F 0 "U1" H 5650 3725 50 0000 C CNN 21 | F 1 "Cherry_MX_RGB" H 5650 3625 50 0000 C CNN 22 | F 2 "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Kailh_Socket" H 5650 3275 50 0001 C CNN 23 | F 3 "" H 5650 3275 50 0001 C CNN 24 | 1 5650 3275 25 | 1 0 0 -1 26 | $EndComp 27 | $Comp 28 | L power:VCC #PWR05 29 | U 1 1 5E27F316 30 | P 5300 3200 31 | F 0 "#PWR05" H 5300 3050 50 0001 C CNN 32 | F 1 "VCC" H 5317 3373 50 0000 C CNN 33 | F 2 "" H 5300 3200 50 0001 C CNN 34 | F 3 "" H 5300 3200 50 0001 C CNN 35 | 1 5300 3200 36 | 1 0 0 -1 37 | $EndComp 38 | $Comp 39 | L power:GND #PWR06 40 | U 1 1 5E28112F 41 | P 5300 3350 42 | F 0 "#PWR06" H 5300 3100 50 0001 C CNN 43 | F 1 "GND" H 5305 3177 50 0000 C CNN 44 | F 2 "" H 5300 3350 50 0001 C CNN 45 | F 3 "" H 5300 3350 50 0001 C CNN 46 | 1 5300 3350 47 | 1 0 0 -1 48 | $EndComp 49 | Wire Wire Line 50 | 5300 3200 5300 3225 51 | Wire Wire Line 52 | 5300 3225 5325 3225 53 | Wire Wire Line 54 | 5325 3325 5300 3325 55 | Wire Wire Line 56 | 5300 3325 5300 3350 57 | $Comp 58 | L Connector:Conn_01x06_Male J1 59 | U 1 1 5E281B3F 60 | P 5175 4425 61 | F 0 "J1" V 5329 4037 50 0000 R CNN 62 | F 1 "Conn_01x06_Male" V 5238 4037 50 0000 R CNN 63 | F 2 "Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical" H 5175 4425 50 0001 C CNN 64 | F 3 "~" H 5175 4425 50 0001 C CNN 65 | 1 5175 4425 66 | 0 -1 -1 0 67 | $EndComp 68 | Text GLabel 6000 3025 2 50 Input ~ 0 69 | SW1 70 | Text GLabel 6000 3225 2 50 Input ~ 0 71 | DIN 72 | Text GLabel 6000 3325 2 50 Input ~ 0 73 | DOUT 74 | Wire Wire Line 75 | 5975 3025 6000 3025 76 | Wire Wire Line 77 | 5975 3125 6000 3125 78 | Wire Wire Line 79 | 5975 3225 6000 3225 80 | Wire Wire Line 81 | 5975 3325 6000 3325 82 | $Comp 83 | L power:GND #PWR02 84 | U 1 1 5E284533 85 | P 4725 3350 86 | F 0 "#PWR02" H 4725 3100 50 0001 C CNN 87 | F 1 "GND" H 4730 3177 50 0000 C CNN 88 | F 2 "" H 4725 3350 50 0001 C CNN 89 | F 3 "" H 4725 3350 50 0001 C CNN 90 | 1 4725 3350 91 | 1 0 0 -1 92 | $EndComp 93 | $Comp 94 | L power:VCC #PWR01 95 | U 1 1 5E2849E1 96 | P 4725 3000 97 | F 0 "#PWR01" H 4725 2850 50 0001 C CNN 98 | F 1 "VCC" H 4742 3173 50 0000 C CNN 99 | F 2 "" H 4725 3000 50 0001 C CNN 100 | F 3 "" H 4725 3000 50 0001 C CNN 101 | 1 4725 3000 102 | 1 0 0 -1 103 | $EndComp 104 | $Comp 105 | L power:GND #PWR03 106 | U 1 1 5E284EFD 107 | P 4850 4225 108 | F 0 "#PWR03" H 4850 3975 50 0001 C CNN 109 | F 1 "GND" H 4855 4052 50 0000 C CNN 110 | F 2 "" H 4850 4225 50 0001 C CNN 111 | F 3 "" H 4850 4225 50 0001 C CNN 112 | 1 4850 4225 113 | 1 0 0 -1 114 | $EndComp 115 | Wire Wire Line 116 | 4725 3350 4725 3325 117 | Wire Wire Line 118 | 4725 3025 4725 3000 119 | $Comp 120 | L power:VCC #PWR04 121 | U 1 1 5E285ED9 122 | P 5275 4050 123 | F 0 "#PWR04" H 5275 3900 50 0001 C CNN 124 | F 1 "VCC" H 5292 4223 50 0000 C CNN 125 | F 2 "" H 5275 4050 50 0001 C CNN 126 | F 3 "" H 5275 4050 50 0001 C CNN 127 | 1 5275 4050 128 | 1 0 0 -1 129 | $EndComp 130 | Text GLabel 5375 4200 1 50 Input ~ 0 131 | SW1 132 | Text GLabel 6000 3125 2 50 Input ~ 0 133 | SW2 134 | Text GLabel 5475 4200 1 50 Input ~ 0 135 | SW2 136 | Text GLabel 4975 4175 1 50 Input ~ 0 137 | DIN 138 | Text GLabel 5175 4200 1 50 Input ~ 0 139 | DOUT 140 | Wire Wire Line 141 | 5475 4225 5475 4200 142 | Wire Wire Line 143 | 5375 4225 5375 4200 144 | $Comp 145 | L Device:C C1 146 | U 1 1 5E27C2F1 147 | P 4725 3175 148 | F 0 "C1" H 4840 3221 50 0000 L CNN 149 | F 1 "0.1uF" H 4840 3130 50 0000 L CNN 150 | F 2 "Capacitor_SMD:C_0603_1608Metric" H 4763 3025 50 0001 C CNN 151 | F 3 "~" H 4725 3175 50 0001 C CNN 152 | 1 4725 3175 153 | 1 0 0 -1 154 | $EndComp 155 | Wire Wire Line 156 | 5075 4225 5075 4200 157 | Wire Wire Line 158 | 4850 4200 4850 4225 159 | Wire Wire Line 160 | 4850 4200 5075 4200 161 | Wire Wire Line 162 | 4975 4225 4975 4175 163 | Wire Wire Line 164 | 5175 4225 5175 4200 165 | Wire Wire Line 166 | 5275 4050 5275 4225 167 | $EndSCHEMATC 168 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Kailh Socket).sch-bak: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 1 1 7 | Title "Cherry MX Breakout Board with LTST-A683CEGBW LED" 8 | Date "2020-01-23" 9 | Rev "v1" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "https://tldrlegal.com/license/mit-license" 13 | Comment3 "License: MIT" 14 | Comment4 "Author: Sebastian Szczepanski" 15 | $EndDescr 16 | $Comp 17 | L Cherry_MX:Cherry_MX_RGB U1 18 | U 1 1 5E278424 19 | P 5650 3275 20 | F 0 "U1" H 5650 3725 50 0000 C CNN 21 | F 1 "Cherry_MX_RGB" H 5650 3625 50 0000 C CNN 22 | F 2 "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Kailh_Socket" H 5650 3275 50 0001 C CNN 23 | F 3 "" H 5650 3275 50 0001 C CNN 24 | 1 5650 3275 25 | 1 0 0 -1 26 | $EndComp 27 | $Comp 28 | L power:VCC #PWR05 29 | U 1 1 5E27F316 30 | P 5300 3200 31 | F 0 "#PWR05" H 5300 3050 50 0001 C CNN 32 | F 1 "VCC" H 5317 3373 50 0000 C CNN 33 | F 2 "" H 5300 3200 50 0001 C CNN 34 | F 3 "" H 5300 3200 50 0001 C CNN 35 | 1 5300 3200 36 | 1 0 0 -1 37 | $EndComp 38 | $Comp 39 | L power:GND #PWR06 40 | U 1 1 5E28112F 41 | P 5300 3350 42 | F 0 "#PWR06" H 5300 3100 50 0001 C CNN 43 | F 1 "GND" H 5305 3177 50 0000 C CNN 44 | F 2 "" H 5300 3350 50 0001 C CNN 45 | F 3 "" H 5300 3350 50 0001 C CNN 46 | 1 5300 3350 47 | 1 0 0 -1 48 | $EndComp 49 | Wire Wire Line 50 | 5300 3200 5300 3225 51 | Wire Wire Line 52 | 5300 3225 5325 3225 53 | Wire Wire Line 54 | 5325 3325 5300 3325 55 | Wire Wire Line 56 | 5300 3325 5300 3350 57 | $Comp 58 | L Connector:Conn_01x06_Male J1 59 | U 1 1 5E281B3F 60 | P 5175 4425 61 | F 0 "J1" V 5329 4037 50 0000 R CNN 62 | F 1 "Conn_01x06_Male" V 5238 4037 50 0000 R CNN 63 | F 2 "Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical" H 5175 4425 50 0001 C CNN 64 | F 3 "~" H 5175 4425 50 0001 C CNN 65 | 1 5175 4425 66 | 0 -1 -1 0 67 | $EndComp 68 | Text GLabel 6000 3025 2 50 Input ~ 0 69 | SW1 70 | Text GLabel 6000 3225 2 50 Input ~ 0 71 | DIN 72 | Text GLabel 6000 3325 2 50 Input ~ 0 73 | DOUT 74 | Wire Wire Line 75 | 5975 3025 6000 3025 76 | Wire Wire Line 77 | 5975 3125 6000 3125 78 | Wire Wire Line 79 | 5975 3225 6000 3225 80 | Wire Wire Line 81 | 5975 3325 6000 3325 82 | $Comp 83 | L power:GND #PWR02 84 | U 1 1 5E284533 85 | P 4725 3350 86 | F 0 "#PWR02" H 4725 3100 50 0001 C CNN 87 | F 1 "GND" H 4730 3177 50 0000 C CNN 88 | F 2 "" H 4725 3350 50 0001 C CNN 89 | F 3 "" H 4725 3350 50 0001 C CNN 90 | 1 4725 3350 91 | 1 0 0 -1 92 | $EndComp 93 | $Comp 94 | L power:VCC #PWR01 95 | U 1 1 5E2849E1 96 | P 4725 3000 97 | F 0 "#PWR01" H 4725 2850 50 0001 C CNN 98 | F 1 "VCC" H 4742 3173 50 0000 C CNN 99 | F 2 "" H 4725 3000 50 0001 C CNN 100 | F 3 "" H 4725 3000 50 0001 C CNN 101 | 1 4725 3000 102 | 1 0 0 -1 103 | $EndComp 104 | $Comp 105 | L power:GND #PWR03 106 | U 1 1 5E284EFD 107 | P 4850 4225 108 | F 0 "#PWR03" H 4850 3975 50 0001 C CNN 109 | F 1 "GND" H 4855 4052 50 0000 C CNN 110 | F 2 "" H 4850 4225 50 0001 C CNN 111 | F 3 "" H 4850 4225 50 0001 C CNN 112 | 1 4850 4225 113 | 1 0 0 -1 114 | $EndComp 115 | Wire Wire Line 116 | 4725 3350 4725 3325 117 | Wire Wire Line 118 | 4725 3025 4725 3000 119 | $Comp 120 | L power:VCC #PWR04 121 | U 1 1 5E285ED9 122 | P 5275 4075 123 | F 0 "#PWR04" H 5275 3925 50 0001 C CNN 124 | F 1 "VCC" H 5292 4248 50 0000 C CNN 125 | F 2 "" H 5275 4075 50 0001 C CNN 126 | F 3 "" H 5275 4075 50 0001 C CNN 127 | 1 5275 4075 128 | 1 0 0 -1 129 | $EndComp 130 | Text GLabel 5375 4200 1 50 Input ~ 0 131 | SW1 132 | Text GLabel 6000 3125 2 50 Input ~ 0 133 | SW2 134 | Text GLabel 5475 4200 1 50 Input ~ 0 135 | SW2 136 | Text GLabel 4975 4175 1 50 Input ~ 0 137 | DIN 138 | Text GLabel 5175 4200 1 50 Input ~ 0 139 | DOUT 140 | Wire Wire Line 141 | 5475 4225 5475 4200 142 | Wire Wire Line 143 | 5375 4225 5375 4200 144 | $Comp 145 | L Device:C C1 146 | U 1 1 5E27C2F1 147 | P 4725 3175 148 | F 0 "C1" H 4840 3221 50 0000 L CNN 149 | F 1 "0.1uF" H 4840 3130 50 0000 L CNN 150 | F 2 "Capacitor_SMD:C_0603_1608Metric" H 4763 3025 50 0001 C CNN 151 | F 3 "~" H 4725 3175 50 0001 C CNN 152 | 1 4725 3175 153 | 1 0 0 -1 154 | $EndComp 155 | Wire Wire Line 156 | 5075 4225 5075 4200 157 | Wire Wire Line 158 | 4850 4200 4850 4225 159 | Wire Wire Line 160 | 4850 4200 5075 4200 161 | Wire Wire Line 162 | 4975 4225 4975 4175 163 | Wire Wire Line 164 | 5175 4225 5175 4200 165 | Wire Wire Line 166 | 5275 4075 5275 4225 167 | $EndSCHEMATC 168 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Mill-Max-7305)-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Cherry_MX_Cherry_MX_RGB 5 | # 6 | DEF Cherry_MX_Cherry_MX_RGB U 0 40 Y Y 1 F N 7 | F0 "U" -200 350 50 H V C CNN 8 | F1 "Cherry_MX_Cherry_MX_RGB" 0 -150 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | DRAW 12 | S 225 -100 -225 300 0 1 0 N 13 | X GND 1 -325 -50 100 R 50 50 1 1 I 14 | X DIN 2 325 50 100 L 50 50 1 1 I 15 | X DOUT 3 325 -50 100 L 50 50 1 1 I 16 | X VCC 4 -325 50 100 R 50 50 1 1 I 17 | X SW1 5 325 250 100 L 50 50 1 1 I 18 | X SW2 6 325 150 100 L 50 50 1 1 I 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Connector_Conn_01x06_Male 23 | # 24 | DEF Connector_Conn_01x06_Male J 0 40 Y N 1 F N 25 | F0 "J" 0 300 50 H V C CNN 26 | F1 "Connector_Conn_01x06_Male" 0 -400 50 H V C CNN 27 | F2 "" 0 0 50 H I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | Connector*:*_1x??_* 31 | $ENDFPLIST 32 | DRAW 33 | S 34 -295 0 -305 1 1 6 F 34 | S 34 -195 0 -205 1 1 6 F 35 | S 34 -95 0 -105 1 1 6 F 36 | S 34 5 0 -5 1 1 6 F 37 | S 34 105 0 95 1 1 6 F 38 | S 34 205 0 195 1 1 6 F 39 | P 2 1 1 6 50 -300 34 -300 N 40 | P 2 1 1 6 50 -200 34 -200 N 41 | P 2 1 1 6 50 -100 34 -100 N 42 | P 2 1 1 6 50 0 34 0 N 43 | P 2 1 1 6 50 100 34 100 N 44 | P 2 1 1 6 50 200 34 200 N 45 | X Pin_1 1 200 200 150 L 50 50 1 1 P 46 | X Pin_2 2 200 100 150 L 50 50 1 1 P 47 | X Pin_3 3 200 0 150 L 50 50 1 1 P 48 | X Pin_4 4 200 -100 150 L 50 50 1 1 P 49 | X Pin_5 5 200 -200 150 L 50 50 1 1 P 50 | X Pin_6 6 200 -300 150 L 50 50 1 1 P 51 | ENDDRAW 52 | ENDDEF 53 | # 54 | # Device_C 55 | # 56 | DEF Device_C C 0 10 N Y 1 F N 57 | F0 "C" 25 100 50 H V L CNN 58 | F1 "Device_C" 25 -100 50 H V L CNN 59 | F2 "" 38 -150 50 H I C CNN 60 | F3 "" 0 0 50 H I C CNN 61 | $FPLIST 62 | C_* 63 | $ENDFPLIST 64 | DRAW 65 | P 2 0 1 20 -80 -30 80 -30 N 66 | P 2 0 1 20 -80 30 80 30 N 67 | X ~ 1 0 150 110 D 50 50 1 1 P 68 | X ~ 2 0 -150 110 U 50 50 1 1 P 69 | ENDDRAW 70 | ENDDEF 71 | # 72 | # power_GND 73 | # 74 | DEF power_GND #PWR 0 0 Y Y 1 F P 75 | F0 "#PWR" 0 -250 50 H I C CNN 76 | F1 "power_GND" 0 -150 50 H V C CNN 77 | F2 "" 0 0 50 H I C CNN 78 | F3 "" 0 0 50 H I C CNN 79 | DRAW 80 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 81 | X GND 1 0 0 0 D 50 50 1 1 W N 82 | ENDDRAW 83 | ENDDEF 84 | # 85 | # power_VCC 86 | # 87 | DEF power_VCC #PWR 0 0 Y Y 1 F P 88 | F0 "#PWR" 0 -150 50 H I C CNN 89 | F1 "power_VCC" 0 150 50 H V C CNN 90 | F2 "" 0 0 50 H I C CNN 91 | F3 "" 0 0 50 H I C CNN 92 | DRAW 93 | C 0 75 25 0 1 0 N 94 | P 2 0 1 0 0 0 0 50 N 95 | X VCC 1 0 0 0 U 50 50 1 1 W N 96 | ENDDRAW 97 | ENDDEF 98 | # 99 | #End Library 100 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Mill-Max-7305).kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20171130) (host pcbnew "(5.1.5-0-10_14)") 2 | 3 | (general 4 | (thickness 1.6) 5 | (drawings 6) 6 | (tracks 28) 7 | (zones 0) 8 | (modules 3) 9 | (nets 7) 10 | ) 11 | 12 | (page A4) 13 | (title_block 14 | (title "Cherry MX Breakout Board with LTST-A683CEGBW LED and Kailh Socket") 15 | (date 2020-01-23) 16 | (rev v1) 17 | (comment 2 https://tldrlegal.com/license/mit-license) 18 | (comment 3 "License: MIT") 19 | (comment 4 "Author: Sebastian Szczepanski") 20 | ) 21 | 22 | (layers 23 | (0 F.Cu signal) 24 | (31 B.Cu signal) 25 | (32 B.Adhes user) 26 | (33 F.Adhes user) 27 | (34 B.Paste user) 28 | (35 F.Paste user) 29 | (36 B.SilkS user) 30 | (37 F.SilkS user) 31 | (38 B.Mask user) 32 | (39 F.Mask user) 33 | (40 Dwgs.User user) 34 | (41 Cmts.User user) 35 | (42 Eco1.User user) 36 | (43 Eco2.User user) 37 | (44 Edge.Cuts user) 38 | (45 Margin user) 39 | (46 B.CrtYd user) 40 | (47 F.CrtYd user) 41 | (48 B.Fab user) 42 | (49 F.Fab user) 43 | ) 44 | 45 | (setup 46 | (last_trace_width 0.25) 47 | (trace_clearance 0.2) 48 | (zone_clearance 0.508) 49 | (zone_45_only no) 50 | (trace_min 0.2) 51 | (via_size 0.8) 52 | (via_drill 0.4) 53 | (via_min_size 0.4) 54 | (via_min_drill 0.3) 55 | (uvia_size 0.3) 56 | (uvia_drill 0.1) 57 | (uvias_allowed no) 58 | (uvia_min_size 0.2) 59 | (uvia_min_drill 0.1) 60 | (edge_width 0.05) 61 | (segment_width 0.2) 62 | (pcb_text_width 0.3) 63 | (pcb_text_size 1.5 1.5) 64 | (mod_edge_width 0.12) 65 | (mod_text_size 1 1) 66 | (mod_text_width 0.15) 67 | (pad_size 2.55 2.5) 68 | (pad_drill 0) 69 | (pad_to_mask_clearance 0.051) 70 | (solder_mask_min_width 0.25) 71 | (aux_axis_origin 0 0) 72 | (visible_elements FFFFFF7F) 73 | (pcbplotparams 74 | (layerselection 0x010f0_ffffffff) 75 | (usegerberextensions false) 76 | (usegerberattributes false) 77 | (usegerberadvancedattributes false) 78 | (creategerberjobfile false) 79 | (excludeedgelayer true) 80 | (linewidth 0.100000) 81 | (plotframeref false) 82 | (viasonmask false) 83 | (mode 1) 84 | (useauxorigin false) 85 | (hpglpennumber 1) 86 | (hpglpenspeed 20) 87 | (hpglpendiameter 15.000000) 88 | (psnegative false) 89 | (psa4output false) 90 | (plotreference true) 91 | (plotvalue true) 92 | (plotinvisibletext false) 93 | (padsonsilk false) 94 | (subtractmaskfromsilk false) 95 | (outputformat 1) 96 | (mirror false) 97 | (drillshape 0) 98 | (scaleselection 1) 99 | (outputdirectory "../gerbers/Mill-Max 7305/")) 100 | ) 101 | 102 | (net 0 "") 103 | (net 1 VCC) 104 | (net 2 GND) 105 | (net 3 SW1) 106 | (net 4 SW2) 107 | (net 5 DIN) 108 | (net 6 DOUT) 109 | 110 | (net_class Default "This is the default net class." 111 | (clearance 0.2) 112 | (trace_width 0.25) 113 | (via_dia 0.8) 114 | (via_drill 0.4) 115 | (uvia_dia 0.3) 116 | (uvia_drill 0.1) 117 | (add_net DIN) 118 | (add_net DOUT) 119 | (add_net GND) 120 | (add_net SW1) 121 | (add_net SW2) 122 | (add_net VCC) 123 | ) 124 | 125 | (module "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Mill-Max-7305" (layer F.Cu) (tedit 5E2DEC77) (tstamp 5E299333) 126 | (at 153.416 105.41 90) 127 | (path /5E278424) 128 | (fp_text reference U1 (at 0 -8.7 90) (layer F.SilkS) hide 129 | (effects (font (size 1 1) (thickness 0.15))) 130 | ) 131 | (fp_text value Cherry_MX_RGB (at 0 9 90) (layer F.Fab) hide 132 | (effects (font (size 1 1) (thickness 0.15))) 133 | ) 134 | (fp_poly (pts (xy 1.7 6.55) (xy -1.7 6.55) (xy -1.7 3.55) (xy 1.7 3.55)) (layer Edge.Cuts) (width 0.01)) 135 | (fp_line (start -1.7 3.25) (end -2 3.25) (layer B.SilkS) (width 0.12)) 136 | (fp_line (start -2 3.25) (end -2 3.55) (layer B.SilkS) (width 0.12)) 137 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 138 | (fp_line (start 7.8 7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 139 | (fp_line (start -7.8 7.8) (end -7.8 -7.8) (layer F.Fab) (width 0.12)) 140 | (fp_line (start 7.8 7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 141 | (pad 3 smd rect (at 2.6 4.3 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 142 | (net 6 DOUT)) 143 | (pad 4 smd rect (at 2.6 5.8 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 144 | (net 1 VCC)) 145 | (pad 2 smd rect (at -2.6 5.8 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 146 | (net 5 DIN)) 147 | (pad 1 smd rect (at -2.6 4.3 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 148 | (net 2 GND)) 149 | (pad "" np_thru_hole circle (at 0 0 90) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 150 | (pad 6 thru_hole circle (at 2.54 -5.08 90) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask) 151 | (net 4 SW2)) 152 | (pad 5 thru_hole circle (at -3.81 -2.54 90) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask) 153 | (net 3 SW1)) 154 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/LTST-A683CEGBW.step" 155 | (offset (xyz 0 -5.05 -1.9)) 156 | (scale (xyz 1 1 1)) 157 | (rotate (xyz 0 0 0)) 158 | ) 159 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Mill-Max-7305.step" 160 | (offset (xyz -3.81 2.54 -2.3)) 161 | (scale (xyz 1 1 1)) 162 | (rotate (xyz 0 0 0)) 163 | ) 164 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Mill-Max-7305.step" 165 | (offset (xyz 2.54 5.08 -2.3)) 166 | (scale (xyz 1 1 1)) 167 | (rotate (xyz 0 0 0)) 168 | ) 169 | ) 170 | 171 | (module Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5E27E28B) 172 | (at 159.092 117.946 270) 173 | (descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row") 174 | (tags "Through hole pin header THT 1x06 2.54mm single row") 175 | (path /5E281B3F) 176 | (fp_text reference J1 (at 2.286 2.667 90) (layer F.SilkS) hide 177 | (effects (font (size 1 1) (thickness 0.15))) 178 | ) 179 | (fp_text value Conn_01x06_Male (at 2.794 10.668 180) (layer F.Fab) hide 180 | (effects (font (size 1 1) (thickness 0.15))) 181 | ) 182 | (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) 183 | (fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1)) 184 | (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1)) 185 | (fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) 186 | (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) 187 | (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 188 | (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12)) 189 | (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 190 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 191 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) 192 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) 193 | (fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05)) 194 | (fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05)) 195 | (fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) 196 | (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 197 | (fp_text user %R (at 0 6.35) (layer F.Fab) hide 198 | (effects (font (size 1 1) (thickness 0.15))) 199 | ) 200 | (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 201 | (net 5 DIN)) 202 | (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 203 | (net 2 GND)) 204 | (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 205 | (net 6 DOUT)) 206 | (pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 207 | (net 1 VCC)) 208 | (pad 5 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 209 | (net 3 SW1)) 210 | (pad 6 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 211 | (net 4 SW2)) 212 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x06_P2.54mm_Vertical.wrl 213 | (at (xyz 0 0 0)) 214 | (scale (xyz 1 1 1)) 215 | (rotate (xyz 0 0 0)) 216 | ) 217 | ) 218 | 219 | (module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5B301BBE) (tstamp 5E2DEEB2) 220 | (at 153.92 121.52) 221 | (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") 222 | (tags capacitor) 223 | (path /5E27C2F1) 224 | (attr smd) 225 | (fp_text reference C1 (at 0.003766 -1.506827) (layer B.SilkS) 226 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 227 | ) 228 | (fp_text value 0.1uF (at 0 -1.43) (layer B.SilkS) hide 229 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 230 | ) 231 | (fp_text user %R (at 0 0) (layer B.Fab) 232 | (effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror)) 233 | ) 234 | (fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05)) 235 | (fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05)) 236 | (fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05)) 237 | (fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05)) 238 | (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer B.SilkS) (width 0.12)) 239 | (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer B.SilkS) (width 0.12)) 240 | (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1)) 241 | (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1)) 242 | (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1)) 243 | (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1)) 244 | (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) 245 | (net 2 GND)) 246 | (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) 247 | (net 1 VCC)) 248 | (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl 249 | (at (xyz 0 0 0)) 250 | (scale (xyz 1 1 1)) 251 | (rotate (xyz 0 0 0)) 252 | ) 253 | ) 254 | 255 | (gr_text "Cherry MX Breakout Board v1\n" (at 144.53 113.31 90) (layer F.SilkS) 256 | (effects (font (size 0.8 0.7) (thickness 0.13)) (justify left)) 257 | ) 258 | (gr_text "SW2 SW1 VCC DOUT GND DIN" (at 152.742 120.613) (layer F.SilkS) 259 | (effects (font (size 0.8 0.7) (thickness 0.1))) 260 | ) 261 | (gr_line (start 143.526 97.028) (end 161.798 97.028) (layer Edge.Cuts) (width 0.1)) 262 | (gr_line (start 143.526 122.936) (end 143.526 97.028) (layer Edge.Cuts) (width 0.1)) 263 | (gr_line (start 161.798 122.936) (end 143.526 122.936) (layer Edge.Cuts) (width 0.1)) 264 | (gr_line (start 161.798 97.028) (end 161.798 122.936) (layer Edge.Cuts) (width 0.1)) 265 | 266 | (segment (start 159.216 101.66) (end 158.956 101.4) (width 0.25) (layer B.Cu) (net 1)) 267 | (segment (start 159.216 102.81) (end 159.216 101.66) (width 0.25) (layer B.Cu) (net 1)) 268 | (segment (start 157.190998 101.4) (end 156.05999 102.531008) (width 0.25) (layer B.Cu) (net 1)) 269 | (segment (start 158.956 101.4) (end 157.190998 101.4) (width 0.25) (layer B.Cu) (net 1)) 270 | (segment (start 156.05999 102.531008) (end 156.05999 113.33001) (width 0.25) (layer B.Cu) (net 1)) 271 | (segment (start 156.05999 113.33001) (end 151.44 117.95) (width 0.25) (layer B.Cu) (net 1)) 272 | (segment (start 152.695 121.52) (end 151.45 120.275) (width 0.25) (layer B.Cu) (net 1)) 273 | (segment (start 153.1325 121.52) (end 152.695 121.52) (width 0.25) (layer B.Cu) (net 1)) 274 | (segment (start 151.45 120.275) (end 151.45 118) (width 0.25) (layer B.Cu) (net 1)) 275 | (segment (start 156.679 117.946) (end 156.552 117.946) (width 0.25) (layer B.Cu) (net 2)) 276 | (segment (start 157.716 108.01) (end 157.716 116.704) (width 0.25) (layer B.Cu) (net 2)) 277 | (segment (start 157.716 116.704) (end 156.51 117.91) (width 0.25) (layer B.Cu) (net 2)) 278 | (segment (start 155.145 121.52) (end 156.53 120.135) (width 0.25) (layer B.Cu) (net 2)) 279 | (segment (start 154.7075 121.52) (end 155.145 121.52) (width 0.25) (layer B.Cu) (net 2)) 280 | (segment (start 156.53 120.135) (end 156.53 118.03) (width 0.25) (layer B.Cu) (net 2)) 281 | (segment (start 148.932 117.946) (end 148.932 111.228) (width 0.25) (layer B.Cu) (net 3)) 282 | (segment (start 148.932 111.228) (end 150.94 109.22) (width 0.25) (layer B.Cu) (net 3)) 283 | (segment (start 146.392 117.946) (end 146.392 104.898) (width 0.25) (layer B.Cu) (net 4)) 284 | (segment (start 146.392 104.898) (end 148.25 103.04) (width 0.25) (layer B.Cu) (net 4)) 285 | (segment (start 159.098001 117.939999) (end 159.092 117.946) (width 0.25) (layer B.Cu) (net 5)) 286 | (segment (start 158.896 117.623) (end 159.092 117.819) (width 0.25) (layer B.Cu) (net 5)) 287 | (segment (start 158.796 117.606) (end 159.05 117.86) (width 0.25) (layer B.Cu) (net 5)) 288 | (segment (start 159.216 108.01) (end 159.216 117.764) (width 0.25) (layer B.Cu) (net 5)) 289 | (segment (start 159.216 117.764) (end 159.05 117.93) (width 0.25) (layer B.Cu) (net 5)) 290 | (segment (start 157.016 102.81) (end 156.51 103.316) (width 0.25) (layer B.Cu) (net 6)) 291 | (segment (start 157.716 102.81) (end 157.016 102.81) (width 0.25) (layer B.Cu) (net 6)) 292 | (segment (start 156.51 103.316) (end 156.51 115.4) (width 0.25) (layer B.Cu) (net 6)) 293 | (segment (start 156.51 115.4) (end 154.03 117.88) (width 0.25) (layer B.Cu) (net 6)) 294 | 295 | ) 296 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Mill-Max-7305).kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20171130) (host pcbnew "(5.1.5-0-10_14)") 2 | 3 | (general 4 | (thickness 1.6) 5 | (drawings 6) 6 | (tracks 28) 7 | (zones 0) 8 | (modules 3) 9 | (nets 7) 10 | ) 11 | 12 | (page A4) 13 | (title_block 14 | (title "Cherry MX Breakout Board with LTST-A683CEGBW LED and Kailh Socket") 15 | (date 2020-01-23) 16 | (rev v1) 17 | (comment 2 https://tldrlegal.com/license/mit-license) 18 | (comment 3 "License: MIT") 19 | (comment 4 "Author: Sebastian Szczepanski") 20 | ) 21 | 22 | (layers 23 | (0 F.Cu signal) 24 | (31 B.Cu signal) 25 | (32 B.Adhes user) 26 | (33 F.Adhes user) 27 | (34 B.Paste user) 28 | (35 F.Paste user) 29 | (36 B.SilkS user) 30 | (37 F.SilkS user) 31 | (38 B.Mask user) 32 | (39 F.Mask user) 33 | (40 Dwgs.User user) 34 | (41 Cmts.User user) 35 | (42 Eco1.User user) 36 | (43 Eco2.User user) 37 | (44 Edge.Cuts user) 38 | (45 Margin user) 39 | (46 B.CrtYd user) 40 | (47 F.CrtYd user) 41 | (48 B.Fab user) 42 | (49 F.Fab user) 43 | ) 44 | 45 | (setup 46 | (last_trace_width 0.25) 47 | (trace_clearance 0.2) 48 | (zone_clearance 0.508) 49 | (zone_45_only no) 50 | (trace_min 0.2) 51 | (via_size 0.8) 52 | (via_drill 0.4) 53 | (via_min_size 0.4) 54 | (via_min_drill 0.3) 55 | (uvia_size 0.3) 56 | (uvia_drill 0.1) 57 | (uvias_allowed no) 58 | (uvia_min_size 0.2) 59 | (uvia_min_drill 0.1) 60 | (edge_width 0.05) 61 | (segment_width 0.2) 62 | (pcb_text_width 0.3) 63 | (pcb_text_size 1.5 1.5) 64 | (mod_edge_width 0.12) 65 | (mod_text_size 1 1) 66 | (mod_text_width 0.15) 67 | (pad_size 2.55 2.5) 68 | (pad_drill 0) 69 | (pad_to_mask_clearance 0.051) 70 | (solder_mask_min_width 0.25) 71 | (aux_axis_origin 0 0) 72 | (visible_elements FFFFFF7F) 73 | (pcbplotparams 74 | (layerselection 0x010f0_ffffffff) 75 | (usegerberextensions false) 76 | (usegerberattributes false) 77 | (usegerberadvancedattributes false) 78 | (creategerberjobfile false) 79 | (excludeedgelayer true) 80 | (linewidth 0.100000) 81 | (plotframeref false) 82 | (viasonmask false) 83 | (mode 1) 84 | (useauxorigin false) 85 | (hpglpennumber 1) 86 | (hpglpenspeed 20) 87 | (hpglpendiameter 15.000000) 88 | (psnegative false) 89 | (psa4output false) 90 | (plotreference true) 91 | (plotvalue true) 92 | (plotinvisibletext false) 93 | (padsonsilk false) 94 | (subtractmaskfromsilk false) 95 | (outputformat 1) 96 | (mirror false) 97 | (drillshape 0) 98 | (scaleselection 1) 99 | (outputdirectory "../gerbers/Kailh Socket/")) 100 | ) 101 | 102 | (net 0 "") 103 | (net 1 VCC) 104 | (net 2 GND) 105 | (net 3 SW1) 106 | (net 4 SW2) 107 | (net 5 DIN) 108 | (net 6 DOUT) 109 | 110 | (net_class Default "This is the default net class." 111 | (clearance 0.2) 112 | (trace_width 0.25) 113 | (via_dia 0.8) 114 | (via_drill 0.4) 115 | (uvia_dia 0.3) 116 | (uvia_drill 0.1) 117 | (add_net DIN) 118 | (add_net DOUT) 119 | (add_net GND) 120 | (add_net SW1) 121 | (add_net SW2) 122 | (add_net VCC) 123 | ) 124 | 125 | (module "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Mill-Max-7305" (layer F.Cu) (tedit 5E2DEC77) (tstamp 5E299333) 126 | (at 153.416 105.41 90) 127 | (path /5E278424) 128 | (fp_text reference U1 (at 0 -8.7 90) (layer F.SilkS) hide 129 | (effects (font (size 1 1) (thickness 0.15))) 130 | ) 131 | (fp_text value Cherry_MX_RGB (at 0 9 90) (layer F.Fab) hide 132 | (effects (font (size 1 1) (thickness 0.15))) 133 | ) 134 | (fp_poly (pts (xy 1.7 6.55) (xy -1.7 6.55) (xy -1.7 3.55) (xy 1.7 3.55)) (layer Edge.Cuts) (width 0.01)) 135 | (fp_line (start -1.7 3.25) (end -2 3.25) (layer B.SilkS) (width 0.12)) 136 | (fp_line (start -2 3.25) (end -2 3.55) (layer B.SilkS) (width 0.12)) 137 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 138 | (fp_line (start 7.8 7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 139 | (fp_line (start -7.8 7.8) (end -7.8 -7.8) (layer F.Fab) (width 0.12)) 140 | (fp_line (start 7.8 7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 141 | (pad 3 smd rect (at 2.6 4.3 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 142 | (net 6 DOUT)) 143 | (pad 4 smd rect (at 2.6 5.8 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 144 | (net 1 VCC)) 145 | (pad 2 smd rect (at -2.6 5.8 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 146 | (net 5 DIN)) 147 | (pad 1 smd rect (at -2.6 4.3 90) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask) 148 | (net 2 GND)) 149 | (pad "" np_thru_hole circle (at 0 0 90) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 150 | (pad 6 thru_hole circle (at 2.54 -5.08 90) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask) 151 | (net 4 SW2)) 152 | (pad 5 thru_hole circle (at -3.81 -2.54 90) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask) 153 | (net 3 SW1)) 154 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/LTST-A683CEGBW.step" 155 | (offset (xyz 0 -5.05 -1.9)) 156 | (scale (xyz 1 1 1)) 157 | (rotate (xyz 0 0 0)) 158 | ) 159 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Mill-Max-7305.step" 160 | (offset (xyz -3.81 2.54 -2.3)) 161 | (scale (xyz 1 1 1)) 162 | (rotate (xyz 0 0 0)) 163 | ) 164 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Mill-Max-7305.step" 165 | (offset (xyz 2.54 5.08 -2.3)) 166 | (scale (xyz 1 1 1)) 167 | (rotate (xyz 0 0 0)) 168 | ) 169 | ) 170 | 171 | (module Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5E27E28B) 172 | (at 159.092 117.946 270) 173 | (descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row") 174 | (tags "Through hole pin header THT 1x06 2.54mm single row") 175 | (path /5E281B3F) 176 | (fp_text reference J1 (at 2.286 2.667 90) (layer F.SilkS) hide 177 | (effects (font (size 1 1) (thickness 0.15))) 178 | ) 179 | (fp_text value Conn_01x06_Male (at 2.794 10.668 180) (layer F.Fab) hide 180 | (effects (font (size 1 1) (thickness 0.15))) 181 | ) 182 | (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) 183 | (fp_line (start 1.27 -1.27) (end 1.27 13.97) (layer F.Fab) (width 0.1)) 184 | (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1)) 185 | (fp_line (start -1.27 13.97) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) 186 | (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) 187 | (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 188 | (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12)) 189 | (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 190 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 191 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) 192 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) 193 | (fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05)) 194 | (fp_line (start -1.8 14.5) (end 1.8 14.5) (layer F.CrtYd) (width 0.05)) 195 | (fp_line (start 1.8 14.5) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) 196 | (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 197 | (fp_text user %R (at 0 6.35) (layer F.Fab) hide 198 | (effects (font (size 1 1) (thickness 0.15))) 199 | ) 200 | (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 201 | (net 5 DIN)) 202 | (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 203 | (net 2 GND)) 204 | (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 205 | (net 6 DOUT)) 206 | (pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 207 | (net 1 VCC)) 208 | (pad 5 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 209 | (net 3 SW1)) 210 | (pad 6 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 211 | (net 4 SW2)) 212 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x06_P2.54mm_Vertical.wrl 213 | (at (xyz 0 0 0)) 214 | (scale (xyz 1 1 1)) 215 | (rotate (xyz 0 0 0)) 216 | ) 217 | ) 218 | 219 | (module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5B301BBE) (tstamp 5E2DEEB2) 220 | (at 153.92 121.52) 221 | (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") 222 | (tags capacitor) 223 | (path /5E27C2F1) 224 | (attr smd) 225 | (fp_text reference C1 (at 0.003766 -1.506827) (layer B.SilkS) 226 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 227 | ) 228 | (fp_text value 0.1uF (at 0 -1.43) (layer B.SilkS) hide 229 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 230 | ) 231 | (fp_text user %R (at 0 0) (layer B.Fab) 232 | (effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror)) 233 | ) 234 | (fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05)) 235 | (fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05)) 236 | (fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05)) 237 | (fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05)) 238 | (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer B.SilkS) (width 0.12)) 239 | (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer B.SilkS) (width 0.12)) 240 | (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1)) 241 | (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1)) 242 | (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1)) 243 | (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1)) 244 | (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) 245 | (net 2 GND)) 246 | (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) 247 | (net 1 VCC)) 248 | (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl 249 | (at (xyz 0 0 0)) 250 | (scale (xyz 1 1 1)) 251 | (rotate (xyz 0 0 0)) 252 | ) 253 | ) 254 | 255 | (gr_text "Cherry MX Breakout Board v1\n" (at 144.53 113.31 90) (layer F.SilkS) 256 | (effects (font (size 0.8 0.7) (thickness 0.13)) (justify left)) 257 | ) 258 | (gr_text "SW2 SW1 VCC DOUT GND DIN" (at 152.742 120.613) (layer F.SilkS) 259 | (effects (font (size 0.8 0.7) (thickness 0.1))) 260 | ) 261 | (gr_line (start 143.526 97.028) (end 161.798 97.028) (layer Edge.Cuts) (width 0.1)) 262 | (gr_line (start 143.526 122.936) (end 143.526 97.028) (layer Edge.Cuts) (width 0.1)) 263 | (gr_line (start 161.798 122.936) (end 143.526 122.936) (layer Edge.Cuts) (width 0.1)) 264 | (gr_line (start 161.798 97.028) (end 161.798 122.936) (layer Edge.Cuts) (width 0.1)) 265 | 266 | (segment (start 159.216 101.66) (end 158.956 101.4) (width 0.25) (layer B.Cu) (net 1)) 267 | (segment (start 159.216 102.81) (end 159.216 101.66) (width 0.25) (layer B.Cu) (net 1)) 268 | (segment (start 157.190998 101.4) (end 156.05999 102.531008) (width 0.25) (layer B.Cu) (net 1)) 269 | (segment (start 158.956 101.4) (end 157.190998 101.4) (width 0.25) (layer B.Cu) (net 1)) 270 | (segment (start 156.05999 102.531008) (end 156.05999 113.33001) (width 0.25) (layer B.Cu) (net 1)) 271 | (segment (start 156.05999 113.33001) (end 151.44 117.95) (width 0.25) (layer B.Cu) (net 1)) 272 | (segment (start 152.695 121.52) (end 151.45 120.275) (width 0.25) (layer B.Cu) (net 1)) 273 | (segment (start 153.1325 121.52) (end 152.695 121.52) (width 0.25) (layer B.Cu) (net 1)) 274 | (segment (start 151.45 120.275) (end 151.45 118) (width 0.25) (layer B.Cu) (net 1)) 275 | (segment (start 156.679 117.946) (end 156.552 117.946) (width 0.25) (layer B.Cu) (net 2)) 276 | (segment (start 157.716 108.01) (end 157.716 116.704) (width 0.25) (layer B.Cu) (net 2)) 277 | (segment (start 157.716 116.704) (end 156.51 117.91) (width 0.25) (layer B.Cu) (net 2)) 278 | (segment (start 155.145 121.52) (end 156.53 120.135) (width 0.25) (layer B.Cu) (net 2)) 279 | (segment (start 154.7075 121.52) (end 155.145 121.52) (width 0.25) (layer B.Cu) (net 2)) 280 | (segment (start 156.53 120.135) (end 156.53 118.03) (width 0.25) (layer B.Cu) (net 2)) 281 | (segment (start 148.932 117.946) (end 148.932 111.228) (width 0.25) (layer B.Cu) (net 3)) 282 | (segment (start 148.932 111.228) (end 150.94 109.22) (width 0.25) (layer B.Cu) (net 3)) 283 | (segment (start 146.392 117.946) (end 146.392 104.898) (width 0.25) (layer B.Cu) (net 4)) 284 | (segment (start 146.392 104.898) (end 148.25 103.04) (width 0.25) (layer B.Cu) (net 4)) 285 | (segment (start 159.098001 117.939999) (end 159.092 117.946) (width 0.25) (layer B.Cu) (net 5)) 286 | (segment (start 158.896 117.623) (end 159.092 117.819) (width 0.25) (layer B.Cu) (net 5)) 287 | (segment (start 158.796 117.606) (end 159.05 117.86) (width 0.25) (layer B.Cu) (net 5)) 288 | (segment (start 159.216 108.01) (end 159.216 117.764) (width 0.25) (layer B.Cu) (net 5)) 289 | (segment (start 159.216 117.764) (end 159.05 117.93) (width 0.25) (layer B.Cu) (net 5)) 290 | (segment (start 157.016 102.81) (end 156.51 103.316) (width 0.25) (layer B.Cu) (net 6)) 291 | (segment (start 157.716 102.81) (end 157.016 102.81) (width 0.25) (layer B.Cu) (net 6)) 292 | (segment (start 156.51 103.316) (end 156.51 115.4) (width 0.25) (layer B.Cu) (net 6)) 293 | (segment (start 156.51 115.4) (end 154.03 117.88) (width 0.25) (layer B.Cu) (net 6)) 294 | 295 | ) 296 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Mill-Max-7305).net: -------------------------------------------------------------------------------- 1 | (export (version D) 2 | (design 3 | (source "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/Cherry MX Breakout Board/Cherry MX Breakout Board (Mill-Max-7305).sch") 4 | (date "Sunday, 26 January 2020 at 20:54:13") 5 | (tool "Eeschema (5.1.5-0-10_14)") 6 | (sheet (number 1) (name /) (tstamps /) 7 | (title_block 8 | (title "Cherry MX Breakout Board with LTST-A683CEGBW LED") 9 | (company) 10 | (rev v1) 11 | (date 2020-01-23) 12 | (source "Cherry MX Breakout Board (Mill-Max-7305).sch") 13 | (comment (number 1) (value "")) 14 | (comment (number 2) (value https://tldrlegal.com/license/mit-license)) 15 | (comment (number 3) (value "License: MIT")) 16 | (comment (number 4) (value "Author: Sebastian Szczepanski"))))) 17 | (components 18 | (comp (ref U1) 19 | (value Cherry_MX_RGB) 20 | (footprint "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Mill-Max-7305") 21 | (libsource (lib Cherry_MX) (part Cherry_MX_RGB) (description "")) 22 | (sheetpath (names /) (tstamps /)) 23 | (tstamp 5E278424)) 24 | (comp (ref J1) 25 | (value Conn_01x06_Male) 26 | (footprint Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical) 27 | (datasheet ~) 28 | (libsource (lib Connector) (part Conn_01x06_Male) (description "Generic connector, single row, 01x06, script generated (kicad-library-utils/schlib/autogen/connector/)")) 29 | (sheetpath (names /) (tstamps /)) 30 | (tstamp 5E281B3F)) 31 | (comp (ref C1) 32 | (value 0.1uF) 33 | (footprint Capacitor_SMD:C_0603_1608Metric) 34 | (datasheet ~) 35 | (libsource (lib Device) (part C) (description "Unpolarized capacitor")) 36 | (sheetpath (names /) (tstamps /)) 37 | (tstamp 5E27C2F1))) 38 | (libparts 39 | (libpart (lib Cherry_MX) (part Cherry_MX_RGB) 40 | (fields 41 | (field (name Reference) U) 42 | (field (name Value) Cherry_MX_RGB)) 43 | (pins 44 | (pin (num 1) (name GND) (type input)) 45 | (pin (num 2) (name DIN) (type input)) 46 | (pin (num 3) (name DOUT) (type input)) 47 | (pin (num 4) (name VCC) (type input)) 48 | (pin (num 5) (name SW1) (type input)) 49 | (pin (num 6) (name SW2) (type input)))) 50 | (libpart (lib Connector) (part Conn_01x06_Male) 51 | (description "Generic connector, single row, 01x06, script generated (kicad-library-utils/schlib/autogen/connector/)") 52 | (docs ~) 53 | (footprints 54 | (fp Connector*:*_1x??_*)) 55 | (fields 56 | (field (name Reference) J) 57 | (field (name Value) Conn_01x06_Male)) 58 | (pins 59 | (pin (num 1) (name Pin_1) (type passive)) 60 | (pin (num 2) (name Pin_2) (type passive)) 61 | (pin (num 3) (name Pin_3) (type passive)) 62 | (pin (num 4) (name Pin_4) (type passive)) 63 | (pin (num 5) (name Pin_5) (type passive)) 64 | (pin (num 6) (name Pin_6) (type passive)))) 65 | (libpart (lib Device) (part C) 66 | (description "Unpolarized capacitor") 67 | (docs ~) 68 | (footprints 69 | (fp C_*)) 70 | (fields 71 | (field (name Reference) C) 72 | (field (name Value) C)) 73 | (pins 74 | (pin (num 1) (name ~) (type passive)) 75 | (pin (num 2) (name ~) (type passive))))) 76 | (libraries 77 | (library (logical Cherry_MX) 78 | (uri /Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry_MX.lib)) 79 | (library (logical Connector) 80 | (uri "/Library/Application Support/kicad/library/Connector.lib")) 81 | (library (logical Device) 82 | (uri "/Library/Application Support/kicad/library/Device.lib"))) 83 | (nets 84 | (net (code 1) (name GND) 85 | (node (ref U1) (pin 1)) 86 | (node (ref C1) (pin 2)) 87 | (node (ref J1) (pin 2))) 88 | (net (code 2) (name SW2) 89 | (node (ref U1) (pin 6)) 90 | (node (ref J1) (pin 6))) 91 | (net (code 3) (name VCC) 92 | (node (ref J1) (pin 4)) 93 | (node (ref C1) (pin 1)) 94 | (node (ref U1) (pin 4))) 95 | (net (code 4) (name SW1) 96 | (node (ref J1) (pin 5)) 97 | (node (ref U1) (pin 5))) 98 | (net (code 5) (name DIN) 99 | (node (ref J1) (pin 1)) 100 | (node (ref U1) (pin 2))) 101 | (net (code 6) (name DOUT) 102 | (node (ref J1) (pin 3)) 103 | (node (ref U1) (pin 3))))) -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Mill-Max-7305).pro: -------------------------------------------------------------------------------- 1 | update=Thursday, 23 January 2020 at 15:24:46 2 | version=1 3 | last_client=pcbnew 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [cvpcb] 9 | version=1 10 | NetIExt=net 11 | [eeschema] 12 | version=1 13 | LibDir= 14 | [eeschema/libraries] 15 | [schematic_editor] 16 | version=1 17 | PageLayoutDescrFile= 18 | PlotDirectoryName= 19 | SubpartIdSeparator=0 20 | SubpartFirstId=65 21 | NetFmtName=Pcbnew 22 | SpiceAjustPassiveValues=0 23 | LabSize=50 24 | ERC_TestSimilarLabels=1 25 | [pcbnew] 26 | version=1 27 | PageLayoutDescrFile= 28 | LastNetListRead=Cherry MX Breakout Board (Mill-Max-7305).net 29 | CopperLayerCount=2 30 | BoardThickness=1.6 31 | AllowMicroVias=0 32 | AllowBlindVias=0 33 | RequireCourtyardDefinitions=0 34 | ProhibitOverlappingCourtyards=1 35 | MinTrackWidth=0.2 36 | MinViaDiameter=0.4 37 | MinViaDrill=0.3 38 | MinMicroViaDiameter=0.2 39 | MinMicroViaDrill=0.09999999999999999 40 | MinHoleToHole=0.25 41 | TrackWidth1=0.25 42 | ViaDiameter1=0.8 43 | ViaDrill1=0.4 44 | dPairWidth1=0.2 45 | dPairGap1=0.25 46 | dPairViaGap1=0.25 47 | SilkLineWidth=0.12 48 | SilkTextSizeV=1 49 | SilkTextSizeH=1 50 | SilkTextSizeThickness=0.15 51 | SilkTextItalic=0 52 | SilkTextUpright=1 53 | CopperLineWidth=0.2 54 | CopperTextSizeV=1.5 55 | CopperTextSizeH=1.5 56 | CopperTextThickness=0.3 57 | CopperTextItalic=0 58 | CopperTextUpright=1 59 | EdgeCutLineWidth=0.05 60 | CourtyardLineWidth=0.05 61 | OthersLineWidth=0.15 62 | OthersTextSizeV=1 63 | OthersTextSizeH=1 64 | OthersTextSizeThickness=0.15 65 | OthersTextItalic=0 66 | OthersTextUpright=1 67 | SolderMaskClearance=0.051 68 | SolderMaskMinWidth=0.25 69 | SolderPasteClearance=0 70 | SolderPasteRatio=0 71 | [pcbnew/Layer.F.Cu] 72 | Name=F.Cu 73 | Type=0 74 | Enabled=1 75 | [pcbnew/Layer.In1.Cu] 76 | Name=In1.Cu 77 | Type=0 78 | Enabled=0 79 | [pcbnew/Layer.In2.Cu] 80 | Name=In2.Cu 81 | Type=0 82 | Enabled=0 83 | [pcbnew/Layer.In3.Cu] 84 | Name=In3.Cu 85 | Type=0 86 | Enabled=0 87 | [pcbnew/Layer.In4.Cu] 88 | Name=In4.Cu 89 | Type=0 90 | Enabled=0 91 | [pcbnew/Layer.In5.Cu] 92 | Name=In5.Cu 93 | Type=0 94 | Enabled=0 95 | [pcbnew/Layer.In6.Cu] 96 | Name=In6.Cu 97 | Type=0 98 | Enabled=0 99 | [pcbnew/Layer.In7.Cu] 100 | Name=In7.Cu 101 | Type=0 102 | Enabled=0 103 | [pcbnew/Layer.In8.Cu] 104 | Name=In8.Cu 105 | Type=0 106 | Enabled=0 107 | [pcbnew/Layer.In9.Cu] 108 | Name=In9.Cu 109 | Type=0 110 | Enabled=0 111 | [pcbnew/Layer.In10.Cu] 112 | Name=In10.Cu 113 | Type=0 114 | Enabled=0 115 | [pcbnew/Layer.In11.Cu] 116 | Name=In11.Cu 117 | Type=0 118 | Enabled=0 119 | [pcbnew/Layer.In12.Cu] 120 | Name=In12.Cu 121 | Type=0 122 | Enabled=0 123 | [pcbnew/Layer.In13.Cu] 124 | Name=In13.Cu 125 | Type=0 126 | Enabled=0 127 | [pcbnew/Layer.In14.Cu] 128 | Name=In14.Cu 129 | Type=0 130 | Enabled=0 131 | [pcbnew/Layer.In15.Cu] 132 | Name=In15.Cu 133 | Type=0 134 | Enabled=0 135 | [pcbnew/Layer.In16.Cu] 136 | Name=In16.Cu 137 | Type=0 138 | Enabled=0 139 | [pcbnew/Layer.In17.Cu] 140 | Name=In17.Cu 141 | Type=0 142 | Enabled=0 143 | [pcbnew/Layer.In18.Cu] 144 | Name=In18.Cu 145 | Type=0 146 | Enabled=0 147 | [pcbnew/Layer.In19.Cu] 148 | Name=In19.Cu 149 | Type=0 150 | Enabled=0 151 | [pcbnew/Layer.In20.Cu] 152 | Name=In20.Cu 153 | Type=0 154 | Enabled=0 155 | [pcbnew/Layer.In21.Cu] 156 | Name=In21.Cu 157 | Type=0 158 | Enabled=0 159 | [pcbnew/Layer.In22.Cu] 160 | Name=In22.Cu 161 | Type=0 162 | Enabled=0 163 | [pcbnew/Layer.In23.Cu] 164 | Name=In23.Cu 165 | Type=0 166 | Enabled=0 167 | [pcbnew/Layer.In24.Cu] 168 | Name=In24.Cu 169 | Type=0 170 | Enabled=0 171 | [pcbnew/Layer.In25.Cu] 172 | Name=In25.Cu 173 | Type=0 174 | Enabled=0 175 | [pcbnew/Layer.In26.Cu] 176 | Name=In26.Cu 177 | Type=0 178 | Enabled=0 179 | [pcbnew/Layer.In27.Cu] 180 | Name=In27.Cu 181 | Type=0 182 | Enabled=0 183 | [pcbnew/Layer.In28.Cu] 184 | Name=In28.Cu 185 | Type=0 186 | Enabled=0 187 | [pcbnew/Layer.In29.Cu] 188 | Name=In29.Cu 189 | Type=0 190 | Enabled=0 191 | [pcbnew/Layer.In30.Cu] 192 | Name=In30.Cu 193 | Type=0 194 | Enabled=0 195 | [pcbnew/Layer.B.Cu] 196 | Name=B.Cu 197 | Type=0 198 | Enabled=1 199 | [pcbnew/Layer.B.Adhes] 200 | Enabled=1 201 | [pcbnew/Layer.F.Adhes] 202 | Enabled=1 203 | [pcbnew/Layer.B.Paste] 204 | Enabled=1 205 | [pcbnew/Layer.F.Paste] 206 | Enabled=1 207 | [pcbnew/Layer.B.SilkS] 208 | Enabled=1 209 | [pcbnew/Layer.F.SilkS] 210 | Enabled=1 211 | [pcbnew/Layer.B.Mask] 212 | Enabled=1 213 | [pcbnew/Layer.F.Mask] 214 | Enabled=1 215 | [pcbnew/Layer.Dwgs.User] 216 | Enabled=1 217 | [pcbnew/Layer.Cmts.User] 218 | Enabled=1 219 | [pcbnew/Layer.Eco1.User] 220 | Enabled=1 221 | [pcbnew/Layer.Eco2.User] 222 | Enabled=1 223 | [pcbnew/Layer.Edge.Cuts] 224 | Enabled=1 225 | [pcbnew/Layer.Margin] 226 | Enabled=1 227 | [pcbnew/Layer.B.CrtYd] 228 | Enabled=1 229 | [pcbnew/Layer.F.CrtYd] 230 | Enabled=1 231 | [pcbnew/Layer.B.Fab] 232 | Enabled=1 233 | [pcbnew/Layer.F.Fab] 234 | Enabled=1 235 | [pcbnew/Layer.Rescue] 236 | Enabled=0 237 | [pcbnew/Netclasses] 238 | [pcbnew/Netclasses/Default] 239 | Name=Default 240 | Clearance=0.2 241 | TrackWidth=0.25 242 | ViaDiameter=0.8 243 | ViaDrill=0.4 244 | uViaDiameter=0.3 245 | uViaDrill=0.1 246 | dPairWidth=0.2 247 | dPairGap=0.25 248 | dPairViaGap=0.25 249 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Mill-Max-7305).sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 1 1 7 | Title "Cherry MX Breakout Board with LTST-A683CEGBW LED" 8 | Date "2020-01-23" 9 | Rev "v1" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "https://tldrlegal.com/license/mit-license" 13 | Comment3 "License: MIT" 14 | Comment4 "Author: Sebastian Szczepanski" 15 | $EndDescr 16 | $Comp 17 | L Cherry_MX:Cherry_MX_RGB U1 18 | U 1 1 5E278424 19 | P 5650 3275 20 | F 0 "U1" H 5650 3725 50 0000 C CNN 21 | F 1 "Cherry_MX_RGB" H 5650 3625 50 0000 C CNN 22 | F 2 "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Mill-Max-7305" H 5650 3275 50 0001 C CNN 23 | F 3 "" H 5650 3275 50 0001 C CNN 24 | 1 5650 3275 25 | 1 0 0 -1 26 | $EndComp 27 | $Comp 28 | L power:VCC #PWR05 29 | U 1 1 5E27F316 30 | P 5300 3200 31 | F 0 "#PWR05" H 5300 3050 50 0001 C CNN 32 | F 1 "VCC" H 5317 3373 50 0000 C CNN 33 | F 2 "" H 5300 3200 50 0001 C CNN 34 | F 3 "" H 5300 3200 50 0001 C CNN 35 | 1 5300 3200 36 | 1 0 0 -1 37 | $EndComp 38 | $Comp 39 | L power:GND #PWR06 40 | U 1 1 5E28112F 41 | P 5300 3350 42 | F 0 "#PWR06" H 5300 3100 50 0001 C CNN 43 | F 1 "GND" H 5305 3177 50 0000 C CNN 44 | F 2 "" H 5300 3350 50 0001 C CNN 45 | F 3 "" H 5300 3350 50 0001 C CNN 46 | 1 5300 3350 47 | 1 0 0 -1 48 | $EndComp 49 | Wire Wire Line 50 | 5300 3200 5300 3225 51 | Wire Wire Line 52 | 5300 3225 5325 3225 53 | Wire Wire Line 54 | 5325 3325 5300 3325 55 | Wire Wire Line 56 | 5300 3325 5300 3350 57 | $Comp 58 | L Connector:Conn_01x06_Male J1 59 | U 1 1 5E281B3F 60 | P 5175 4425 61 | F 0 "J1" V 5329 4037 50 0000 R CNN 62 | F 1 "Conn_01x06_Male" V 5238 4037 50 0000 R CNN 63 | F 2 "Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical" H 5175 4425 50 0001 C CNN 64 | F 3 "~" H 5175 4425 50 0001 C CNN 65 | 1 5175 4425 66 | 0 -1 -1 0 67 | $EndComp 68 | Text GLabel 6000 3025 2 50 Input ~ 0 69 | SW1 70 | Text GLabel 6000 3225 2 50 Input ~ 0 71 | DIN 72 | Text GLabel 6000 3325 2 50 Input ~ 0 73 | DOUT 74 | Wire Wire Line 75 | 5975 3025 6000 3025 76 | Wire Wire Line 77 | 5975 3125 6000 3125 78 | Wire Wire Line 79 | 5975 3225 6000 3225 80 | Wire Wire Line 81 | 5975 3325 6000 3325 82 | $Comp 83 | L power:GND #PWR02 84 | U 1 1 5E284533 85 | P 4725 3350 86 | F 0 "#PWR02" H 4725 3100 50 0001 C CNN 87 | F 1 "GND" H 4730 3177 50 0000 C CNN 88 | F 2 "" H 4725 3350 50 0001 C CNN 89 | F 3 "" H 4725 3350 50 0001 C CNN 90 | 1 4725 3350 91 | 1 0 0 -1 92 | $EndComp 93 | $Comp 94 | L power:VCC #PWR01 95 | U 1 1 5E2849E1 96 | P 4725 3000 97 | F 0 "#PWR01" H 4725 2850 50 0001 C CNN 98 | F 1 "VCC" H 4742 3173 50 0000 C CNN 99 | F 2 "" H 4725 3000 50 0001 C CNN 100 | F 3 "" H 4725 3000 50 0001 C CNN 101 | 1 4725 3000 102 | 1 0 0 -1 103 | $EndComp 104 | $Comp 105 | L power:GND #PWR03 106 | U 1 1 5E284EFD 107 | P 4850 4225 108 | F 0 "#PWR03" H 4850 3975 50 0001 C CNN 109 | F 1 "GND" H 4855 4052 50 0000 C CNN 110 | F 2 "" H 4850 4225 50 0001 C CNN 111 | F 3 "" H 4850 4225 50 0001 C CNN 112 | 1 4850 4225 113 | 1 0 0 -1 114 | $EndComp 115 | Wire Wire Line 116 | 4850 4200 4850 4225 117 | Wire Wire Line 118 | 4725 3350 4725 3325 119 | Wire Wire Line 120 | 4725 3025 4725 3000 121 | $Comp 122 | L power:VCC #PWR04 123 | U 1 1 5E285ED9 124 | P 5275 4050 125 | F 0 "#PWR04" H 5275 3900 50 0001 C CNN 126 | F 1 "VCC" H 5292 4223 50 0000 C CNN 127 | F 2 "" H 5275 4050 50 0001 C CNN 128 | F 3 "" H 5275 4050 50 0001 C CNN 129 | 1 5275 4050 130 | 1 0 0 -1 131 | $EndComp 132 | Text GLabel 5375 4200 1 50 Input ~ 0 133 | SW1 134 | Text GLabel 6000 3125 2 50 Input ~ 0 135 | SW2 136 | Text GLabel 5475 4200 1 50 Input ~ 0 137 | SW2 138 | Text GLabel 4975 4175 1 50 Input ~ 0 139 | DIN 140 | Text GLabel 5175 4200 1 50 Input ~ 0 141 | DOUT 142 | Wire Wire Line 143 | 5475 4225 5475 4200 144 | Wire Wire Line 145 | 5375 4225 5375 4200 146 | $Comp 147 | L Device:C C1 148 | U 1 1 5E27C2F1 149 | P 4725 3175 150 | F 0 "C1" H 4840 3221 50 0000 L CNN 151 | F 1 "0.1uF" H 4840 3130 50 0000 L CNN 152 | F 2 "Capacitor_SMD:C_0603_1608Metric" H 4763 3025 50 0001 C CNN 153 | F 3 "~" H 4725 3175 50 0001 C CNN 154 | 1 4725 3175 155 | 1 0 0 -1 156 | $EndComp 157 | Wire Wire Line 158 | 5075 4225 5075 4200 159 | Wire Wire Line 160 | 4850 4200 5075 4200 161 | Wire Wire Line 162 | 4975 4225 4975 4175 163 | Wire Wire Line 164 | 5175 4225 5175 4200 165 | Wire Wire Line 166 | 5275 4050 5275 4225 167 | $EndSCHEMATC 168 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board (Mill-Max-7305).sch-bak: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 1 1 7 | Title "Cherry MX Breakout Board with LTST-A683CEGBW LED" 8 | Date "2020-01-23" 9 | Rev "v1" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "https://tldrlegal.com/license/mit-license" 13 | Comment3 "License: MIT" 14 | Comment4 "Author: Sebastian Szczepanski" 15 | $EndDescr 16 | $Comp 17 | L Cherry_MX:Cherry_MX_RGB U1 18 | U 1 1 5E278424 19 | P 5650 3275 20 | F 0 "U1" H 5650 3725 50 0000 C CNN 21 | F 1 "Cherry_MX_RGB" H 5650 3625 50 0000 C CNN 22 | F 2 "Cherry MX:Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Mill-Max-7305" H 5650 3275 50 0001 C CNN 23 | F 3 "" H 5650 3275 50 0001 C CNN 24 | 1 5650 3275 25 | 1 0 0 -1 26 | $EndComp 27 | $Comp 28 | L power:VCC #PWR05 29 | U 1 1 5E27F316 30 | P 5300 3200 31 | F 0 "#PWR05" H 5300 3050 50 0001 C CNN 32 | F 1 "VCC" H 5317 3373 50 0000 C CNN 33 | F 2 "" H 5300 3200 50 0001 C CNN 34 | F 3 "" H 5300 3200 50 0001 C CNN 35 | 1 5300 3200 36 | 1 0 0 -1 37 | $EndComp 38 | $Comp 39 | L power:GND #PWR06 40 | U 1 1 5E28112F 41 | P 5300 3350 42 | F 0 "#PWR06" H 5300 3100 50 0001 C CNN 43 | F 1 "GND" H 5305 3177 50 0000 C CNN 44 | F 2 "" H 5300 3350 50 0001 C CNN 45 | F 3 "" H 5300 3350 50 0001 C CNN 46 | 1 5300 3350 47 | 1 0 0 -1 48 | $EndComp 49 | Wire Wire Line 50 | 5300 3200 5300 3225 51 | Wire Wire Line 52 | 5300 3225 5325 3225 53 | Wire Wire Line 54 | 5325 3325 5300 3325 55 | Wire Wire Line 56 | 5300 3325 5300 3350 57 | $Comp 58 | L Connector:Conn_01x06_Male J1 59 | U 1 1 5E281B3F 60 | P 5175 4425 61 | F 0 "J1" V 5329 4037 50 0000 R CNN 62 | F 1 "Conn_01x06_Male" V 5238 4037 50 0000 R CNN 63 | F 2 "Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical" H 5175 4425 50 0001 C CNN 64 | F 3 "~" H 5175 4425 50 0001 C CNN 65 | 1 5175 4425 66 | 0 -1 -1 0 67 | $EndComp 68 | Text GLabel 6000 3025 2 50 Input ~ 0 69 | SW1 70 | Text GLabel 6000 3225 2 50 Input ~ 0 71 | DIN 72 | Text GLabel 6000 3325 2 50 Input ~ 0 73 | DOUT 74 | Wire Wire Line 75 | 5975 3025 6000 3025 76 | Wire Wire Line 77 | 5975 3125 6000 3125 78 | Wire Wire Line 79 | 5975 3225 6000 3225 80 | Wire Wire Line 81 | 5975 3325 6000 3325 82 | $Comp 83 | L power:GND #PWR02 84 | U 1 1 5E284533 85 | P 4725 3350 86 | F 0 "#PWR02" H 4725 3100 50 0001 C CNN 87 | F 1 "GND" H 4730 3177 50 0000 C CNN 88 | F 2 "" H 4725 3350 50 0001 C CNN 89 | F 3 "" H 4725 3350 50 0001 C CNN 90 | 1 4725 3350 91 | 1 0 0 -1 92 | $EndComp 93 | $Comp 94 | L power:VCC #PWR01 95 | U 1 1 5E2849E1 96 | P 4725 3000 97 | F 0 "#PWR01" H 4725 2850 50 0001 C CNN 98 | F 1 "VCC" H 4742 3173 50 0000 C CNN 99 | F 2 "" H 4725 3000 50 0001 C CNN 100 | F 3 "" H 4725 3000 50 0001 C CNN 101 | 1 4725 3000 102 | 1 0 0 -1 103 | $EndComp 104 | $Comp 105 | L power:GND #PWR03 106 | U 1 1 5E284EFD 107 | P 4850 4225 108 | F 0 "#PWR03" H 4850 3975 50 0001 C CNN 109 | F 1 "GND" H 4855 4052 50 0000 C CNN 110 | F 2 "" H 4850 4225 50 0001 C CNN 111 | F 3 "" H 4850 4225 50 0001 C CNN 112 | 1 4850 4225 113 | 1 0 0 -1 114 | $EndComp 115 | Wire Wire Line 116 | 4975 4225 4975 4200 117 | Wire Wire Line 118 | 4975 4200 4850 4200 119 | Wire Wire Line 120 | 4850 4200 4850 4225 121 | Wire Wire Line 122 | 4725 3350 4725 3325 123 | Wire Wire Line 124 | 4725 3025 4725 3000 125 | $Comp 126 | L power:VCC #PWR04 127 | U 1 1 5E285ED9 128 | P 5175 4050 129 | F 0 "#PWR04" H 5175 3900 50 0001 C CNN 130 | F 1 "VCC" H 5192 4223 50 0000 C CNN 131 | F 2 "" H 5175 4050 50 0001 C CNN 132 | F 3 "" H 5175 4050 50 0001 C CNN 133 | 1 5175 4050 134 | 1 0 0 -1 135 | $EndComp 136 | Text GLabel 5375 4200 1 50 Input ~ 0 137 | SW1 138 | Text GLabel 6000 3125 2 50 Input ~ 0 139 | SW2 140 | Text GLabel 5475 4200 1 50 Input ~ 0 141 | SW2 142 | Text GLabel 5075 4200 1 50 Input ~ 0 143 | DIN 144 | Text GLabel 5275 4200 1 50 Input ~ 0 145 | DOUT 146 | Wire Wire Line 147 | 5475 4225 5475 4200 148 | Wire Wire Line 149 | 5375 4225 5375 4200 150 | Wire Wire Line 151 | 5275 4225 5275 4200 152 | $Comp 153 | L Device:C C1 154 | U 1 1 5E27C2F1 155 | P 4725 3175 156 | F 0 "C1" H 4840 3221 50 0000 L CNN 157 | F 1 "0.1uF" H 4840 3130 50 0000 L CNN 158 | F 2 "Capacitor_SMD:C_0603_1608Metric" H 4763 3025 50 0001 C CNN 159 | F 3 "~" H 4725 3175 50 0001 C CNN 160 | 1 4725 3175 161 | 1 0 0 -1 162 | $EndComp 163 | Wire Wire Line 164 | 5075 4225 5075 4200 165 | Wire Wire Line 166 | 5175 4050 5175 4225 167 | $EndSCHEMATC 168 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/Cherry MX Breakout Board.pro: -------------------------------------------------------------------------------- 1 | update=Thursday, 23 January 2020 at 13:35:05 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [cvpcb] 9 | version=1 10 | NetIExt=net 11 | [eeschema] 12 | version=1 13 | LibDir= 14 | [eeschema/libraries] 15 | [schematic_editor] 16 | version=1 17 | PageLayoutDescrFile= 18 | PlotDirectoryName= 19 | SubpartIdSeparator=0 20 | SubpartFirstId=65 21 | NetFmtName=Pcbnew 22 | SpiceAjustPassiveValues=0 23 | LabSize=50 24 | ERC_TestSimilarLabels=1 25 | [pcbnew] 26 | version=1 27 | PageLayoutDescrFile= 28 | LastNetListRead=Cherry MX Breakout Board (Mill-Max-7305).net 29 | CopperLayerCount=2 30 | BoardThickness=1.6 31 | AllowMicroVias=0 32 | AllowBlindVias=0 33 | RequireCourtyardDefinitions=0 34 | ProhibitOverlappingCourtyards=1 35 | MinTrackWidth=0.2 36 | MinViaDiameter=0.4 37 | MinViaDrill=0.3 38 | MinMicroViaDiameter=0.2 39 | MinMicroViaDrill=0.09999999999999999 40 | MinHoleToHole=0.25 41 | TrackWidth1=0.25 42 | ViaDiameter1=0.8 43 | ViaDrill1=0.4 44 | dPairWidth1=0.2 45 | dPairGap1=0.25 46 | dPairViaGap1=0.25 47 | SilkLineWidth=0.12 48 | SilkTextSizeV=1 49 | SilkTextSizeH=1 50 | SilkTextSizeThickness=0.15 51 | SilkTextItalic=0 52 | SilkTextUpright=1 53 | CopperLineWidth=0.2 54 | CopperTextSizeV=1.5 55 | CopperTextSizeH=1.5 56 | CopperTextThickness=0.3 57 | CopperTextItalic=0 58 | CopperTextUpright=1 59 | EdgeCutLineWidth=0.05 60 | CourtyardLineWidth=0.05 61 | OthersLineWidth=0.15 62 | OthersTextSizeV=1 63 | OthersTextSizeH=1 64 | OthersTextSizeThickness=0.15 65 | OthersTextItalic=0 66 | OthersTextUpright=1 67 | SolderMaskClearance=0.051 68 | SolderMaskMinWidth=0.25 69 | SolderPasteClearance=0 70 | SolderPasteRatio=0 71 | [pcbnew/Layer.F.Cu] 72 | Name=F.Cu 73 | Type=0 74 | Enabled=1 75 | [pcbnew/Layer.In1.Cu] 76 | Name=In1.Cu 77 | Type=0 78 | Enabled=0 79 | [pcbnew/Layer.In2.Cu] 80 | Name=In2.Cu 81 | Type=0 82 | Enabled=0 83 | [pcbnew/Layer.In3.Cu] 84 | Name=In3.Cu 85 | Type=0 86 | Enabled=0 87 | [pcbnew/Layer.In4.Cu] 88 | Name=In4.Cu 89 | Type=0 90 | Enabled=0 91 | [pcbnew/Layer.In5.Cu] 92 | Name=In5.Cu 93 | Type=0 94 | Enabled=0 95 | [pcbnew/Layer.In6.Cu] 96 | Name=In6.Cu 97 | Type=0 98 | Enabled=0 99 | [pcbnew/Layer.In7.Cu] 100 | Name=In7.Cu 101 | Type=0 102 | Enabled=0 103 | [pcbnew/Layer.In8.Cu] 104 | Name=In8.Cu 105 | Type=0 106 | Enabled=0 107 | [pcbnew/Layer.In9.Cu] 108 | Name=In9.Cu 109 | Type=0 110 | Enabled=0 111 | [pcbnew/Layer.In10.Cu] 112 | Name=In10.Cu 113 | Type=0 114 | Enabled=0 115 | [pcbnew/Layer.In11.Cu] 116 | Name=In11.Cu 117 | Type=0 118 | Enabled=0 119 | [pcbnew/Layer.In12.Cu] 120 | Name=In12.Cu 121 | Type=0 122 | Enabled=0 123 | [pcbnew/Layer.In13.Cu] 124 | Name=In13.Cu 125 | Type=0 126 | Enabled=0 127 | [pcbnew/Layer.In14.Cu] 128 | Name=In14.Cu 129 | Type=0 130 | Enabled=0 131 | [pcbnew/Layer.In15.Cu] 132 | Name=In15.Cu 133 | Type=0 134 | Enabled=0 135 | [pcbnew/Layer.In16.Cu] 136 | Name=In16.Cu 137 | Type=0 138 | Enabled=0 139 | [pcbnew/Layer.In17.Cu] 140 | Name=In17.Cu 141 | Type=0 142 | Enabled=0 143 | [pcbnew/Layer.In18.Cu] 144 | Name=In18.Cu 145 | Type=0 146 | Enabled=0 147 | [pcbnew/Layer.In19.Cu] 148 | Name=In19.Cu 149 | Type=0 150 | Enabled=0 151 | [pcbnew/Layer.In20.Cu] 152 | Name=In20.Cu 153 | Type=0 154 | Enabled=0 155 | [pcbnew/Layer.In21.Cu] 156 | Name=In21.Cu 157 | Type=0 158 | Enabled=0 159 | [pcbnew/Layer.In22.Cu] 160 | Name=In22.Cu 161 | Type=0 162 | Enabled=0 163 | [pcbnew/Layer.In23.Cu] 164 | Name=In23.Cu 165 | Type=0 166 | Enabled=0 167 | [pcbnew/Layer.In24.Cu] 168 | Name=In24.Cu 169 | Type=0 170 | Enabled=0 171 | [pcbnew/Layer.In25.Cu] 172 | Name=In25.Cu 173 | Type=0 174 | Enabled=0 175 | [pcbnew/Layer.In26.Cu] 176 | Name=In26.Cu 177 | Type=0 178 | Enabled=0 179 | [pcbnew/Layer.In27.Cu] 180 | Name=In27.Cu 181 | Type=0 182 | Enabled=0 183 | [pcbnew/Layer.In28.Cu] 184 | Name=In28.Cu 185 | Type=0 186 | Enabled=0 187 | [pcbnew/Layer.In29.Cu] 188 | Name=In29.Cu 189 | Type=0 190 | Enabled=0 191 | [pcbnew/Layer.In30.Cu] 192 | Name=In30.Cu 193 | Type=0 194 | Enabled=0 195 | [pcbnew/Layer.B.Cu] 196 | Name=B.Cu 197 | Type=0 198 | Enabled=1 199 | [pcbnew/Layer.B.Adhes] 200 | Enabled=1 201 | [pcbnew/Layer.F.Adhes] 202 | Enabled=1 203 | [pcbnew/Layer.B.Paste] 204 | Enabled=1 205 | [pcbnew/Layer.F.Paste] 206 | Enabled=1 207 | [pcbnew/Layer.B.SilkS] 208 | Enabled=1 209 | [pcbnew/Layer.F.SilkS] 210 | Enabled=1 211 | [pcbnew/Layer.B.Mask] 212 | Enabled=1 213 | [pcbnew/Layer.F.Mask] 214 | Enabled=1 215 | [pcbnew/Layer.Dwgs.User] 216 | Enabled=1 217 | [pcbnew/Layer.Cmts.User] 218 | Enabled=1 219 | [pcbnew/Layer.Eco1.User] 220 | Enabled=1 221 | [pcbnew/Layer.Eco2.User] 222 | Enabled=1 223 | [pcbnew/Layer.Edge.Cuts] 224 | Enabled=1 225 | [pcbnew/Layer.Margin] 226 | Enabled=1 227 | [pcbnew/Layer.B.CrtYd] 228 | Enabled=1 229 | [pcbnew/Layer.F.CrtYd] 230 | Enabled=1 231 | [pcbnew/Layer.B.Fab] 232 | Enabled=1 233 | [pcbnew/Layer.F.Fab] 234 | Enabled=1 235 | [pcbnew/Layer.Rescue] 236 | Enabled=0 237 | [pcbnew/Netclasses] 238 | [pcbnew/Netclasses/Default] 239 | Name=Default 240 | Clearance=0.2 241 | TrackWidth=0.25 242 | ViaDiameter=0.8 243 | ViaDrill=0.4 244 | uViaDiameter=0.3 245 | uViaDrill=0.1 246 | dPairWidth=0.2 247 | dPairGap=0.25 248 | dPairViaGap=0.25 249 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/fp-info-cache: -------------------------------------------------------------------------------- 1 | 0 2 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name "Cherry MX")(type KiCad)(uri "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty")(options "")(descr "")) 3 | ) 4 | -------------------------------------------------------------------------------- /Cherry MX Breakout Board/sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (lib (name Cherry_MX)(type Legacy)(uri /Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry_MX.lib)(options "")(descr "")) 3 | ) 4 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2020 Sebastian Szczepański 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Cherry MX Breakout Boards 2 | [!["Buy Me A Coffee"](https://www.buymeacoffee.com/assets/img/custom_images/orange_img.png)](https://www.buymeacoffee.com/sszczep) 3 | 4 | 5 | 6 | 7 | 8 | 18 | 19 | 20 |
9 | 10 | Two breakout boards designed in **KiCad**. 11 | 12 | Both feature reverse-mounted addressable RGB LED **LTST-A683CEGBW**. 13 | 14 | Both are hot-swap capable (**Kailh Socket** / **Mill-Max 7305**). 15 | 16 | Total board dimensions: **26 x 19 mm**. 17 |
21 | 22 | **Mill-Max 7305 holes are compatible with standalone switches so they can be soldered directly to the board.** 23 | 24 | | Schematic | PCB (Kailh Socket) | PCB (Mill-Max 7305) | 25 | |---|---|---| 26 | | ![](https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/media/Schematic.jpg) | ![](https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/media/Kailh%20Socket%20PCB.jpg) | ![](https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/media/Mill-Max%207305%20PCB.jpg) | 27 | 28 | ## Kailh Socket Renders 29 | 30 | | Top View | Bottom View | 31 | |---|---| 32 | | ![](https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/media/Kailh%20Socket%20Top%20View.jpg) | ![](https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/media/Kailh%20Socket%20Bottom%20View.jpg) | 33 | 34 | > Kailh Socket 3D Model was obtained from [*QMK*](https://github.com/qmk). All credits go to them. The exact file can be found [here](https://github.com/qmk/qmk_hardware/blob/master/components/kailh_socket_mx.stp). 35 | 36 | ## Mill-Max 7305 Renders 37 | 38 | | Top View | Bottom View | 39 | |---|---| 40 | | ![](https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/media/Mill-Max%207305%20Top%20View.jpg) | ![](https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/media/Mill-Max%207305%20Bottom%20View.jpg) | 41 | 42 | ## Real Photos 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 |
60 | 61 | ## Hooking up with Arduino 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 95 | 96 | 97 | 98 |
CodeWiring diagram
 72 | #include "FastLED.h"
 73 | 
 74 |     const int ledPin = 6;
 75 |     const int buttonPin = 7;
 76 | 
 77 |     int ledHue = 0;
 78 |     const int ledSaturation = 255;
 79 |     const int ledBrightness = 255;
 80 | 
 81 |     CRGB leds[1];
 82 | 
 83 |     void setup() {
 84 |       pinMode(buttonPin, INPUT_PULLUP);
 85 |       FastLED.addLeds(leds, 1);
 86 |     }
 87 | 
 88 |     void loop() {
 89 |       if(digitalRead(buttonPin) == LOW) ledHue++;
 90 | 
 91 |       leds[0].setHSV(ledHue, ledSaturation, ledBrightness);
 92 |       FastLED.show();
 93 |     }
 94 |
99 | 100 | ## What socket is right for me? 101 | 102 | 103 | 104 | 105 | 106 | 107 | 108 | 109 | 110 | 111 | 112 | 113 | 114 | 115 | 116 | 117 | 118 | 119 | 120 | 121 | 122 | 123 | 124 | 125 | 126 | 128 | 129 |
Kailh SocketMill-Max 7305 & 0305
Cost per switch$0.10 on kbdfans.comabout $0.88 on digikey.com
Requires compatible PCB?YesNo
Soldering difficultyBoth socket types are easy to solder and there shouldn't be any problems
General NotesKailh Sockets are much cheaper when it comes to custom builds but require custom PCB. Mill-Max connectors are not as stabilized as they make an extra gap between PCB and switch. Mill-Max 7305 is preferable over 0305, it's thinner so the gap is not that wide. Swapping switches seems easier using Kailh Sockets, Mill-Max connectors tend to bend sockets' pins. In my opinion, Mill-Max connectors should be taken into an account only when you modify pre-existing PCB as they have no advantage over Kailh Sockets and simply cost more 127 |
130 | 131 | ## Datasheets 132 | 133 | * [Cherry MX](https://github.com/sszczep/Cherry-MX-Breakout-Board/blob/master/datasheets/Cherry%20MX.pdf) 134 | * [LTST-A683CEGBW](https://github.com/sszczep/Cherry-MX-Breakout-Board/blob/master/datasheets/LTST-A683CEGBW.pdf) 135 | * [Kailh Socket](https://github.com/sszczep/Cherry-MX-Breakout-Board/blob/master/datasheets/Kailh%20Socket.pdf) 136 | * [Mill-Max](https://github.com/sszczep/Cherry-MX-Breakout-Board/blob/master/datasheets/Mill-Max.pdf) 137 | -------------------------------------------------------------------------------- /datasheets/Cherry MX.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/3a203af15e45b09b21ce512d06c5d0275e049c50/datasheets/Cherry MX.pdf -------------------------------------------------------------------------------- /datasheets/Kailh Socket.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/3a203af15e45b09b21ce512d06c5d0275e049c50/datasheets/Kailh Socket.pdf -------------------------------------------------------------------------------- /datasheets/LTST-A683CEGBW.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/3a203af15e45b09b21ce512d06c5d0275e049c50/datasheets/LTST-A683CEGBW.pdf -------------------------------------------------------------------------------- /datasheets/Mill-Max.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/sszczep/Cherry-MX-Breakout-Board/3a203af15e45b09b21ce512d06c5d0275e049c50/datasheets/Mill-Max.pdf -------------------------------------------------------------------------------- /gerbers/Kailh Socket/Cherry MX Breakout Board (Kailh Socket)-B_Cu.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! 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TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2020-01-26 21:02:15* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10R,1.700000X1.700000*% 14 | %ADD11O,1.700000X1.700000*% 15 | G04 APERTURE END LIST* 16 | D10* 17 | X159092000Y-117946000D03* 18 | D11* 19 | X156552000Y-117946000D03* 20 | X154012000Y-117946000D03* 21 | X151472000Y-117946000D03* 22 | X148932000Y-117946000D03* 23 | X146392000Y-117946000D03* 24 | M02* 25 | -------------------------------------------------------------------------------- /gerbers/Kailh Socket/Cherry MX Breakout Board (Kailh Socket)-F_Mask.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)* 2 | G04 #@! TF.CreationDate,2020-01-26T21:02:15+01:00* 3 | G04 #@! TF.ProjectId,Cherry MX Breakout Board (Kailh Socket),43686572-7279-4204-9d58-20427265616b,v1* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Soldermask,Top* 6 | G04 #@! TF.FilePolarity,Negative* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2020-01-26 21:02:15* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10C,0.100000*% 14 | G04 APERTURE END LIST* 15 | D10* 16 | G36* 17 | X159993000Y-118847000D02* 18 | G01* 19 | X158191000Y-118847000D01* 20 | X158191000Y-117045000D01* 21 | X159993000Y-117045000D01* 22 | X159993000Y-118847000D01* 23 | G37* 24 | G36* 25 | X156665512Y-117049927D02* 26 | G01* 27 | X156814812Y-117079624D01* 28 | X156978784Y-117147544D01* 29 | X157126354Y-117246147D01* 30 | X157251853Y-117371646D01* 31 | X157350456Y-117519216D01* 32 | X157418376Y-117683188D01* 33 | X157453000Y-117857259D01* 34 | X157453000Y-118034741D01* 35 | X157418376Y-118208812D01* 36 | X157350456Y-118372784D01* 37 | X157251853Y-118520354D01* 38 | X157126354Y-118645853D01* 39 | X156978784Y-118744456D01* 40 | X156814812Y-118812376D01* 41 | X156665512Y-118842073D01* 42 | X156640742Y-118847000D01* 43 | X156463258Y-118847000D01* 44 | X156438488Y-118842073D01* 45 | X156289188Y-118812376D01* 46 | X156125216Y-118744456D01* 47 | X155977646Y-118645853D01* 48 | X155852147Y-118520354D01* 49 | X155753544Y-118372784D01* 50 | X155685624Y-118208812D01* 51 | X155651000Y-118034741D01* 52 | X155651000Y-117857259D01* 53 | X155685624Y-117683188D01* 54 | X155753544Y-117519216D01* 55 | X155852147Y-117371646D01* 56 | X155977646Y-117246147D01* 57 | X156125216Y-117147544D01* 58 | X156289188Y-117079624D01* 59 | X156438488Y-117049927D01* 60 | X156463258Y-117045000D01* 61 | X156640742Y-117045000D01* 62 | X156665512Y-117049927D01* 63 | G37* 64 | G36* 65 | X154125512Y-117049927D02* 66 | G01* 67 | X154274812Y-117079624D01* 68 | X154438784Y-117147544D01* 69 | X154586354Y-117246147D01* 70 | X154711853Y-117371646D01* 71 | X154810456Y-117519216D01* 72 | X154878376Y-117683188D01* 73 | X154913000Y-117857259D01* 74 | X154913000Y-118034741D01* 75 | X154878376Y-118208812D01* 76 | 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| X152171853Y-117371646D01* 111 | X152270456Y-117519216D01* 112 | X152338376Y-117683188D01* 113 | X152373000Y-117857259D01* 114 | X152373000Y-118034741D01* 115 | X152338376Y-118208812D01* 116 | X152270456Y-118372784D01* 117 | X152171853Y-118520354D01* 118 | X152046354Y-118645853D01* 119 | X151898784Y-118744456D01* 120 | X151734812Y-118812376D01* 121 | X151585512Y-118842073D01* 122 | X151560742Y-118847000D01* 123 | X151383258Y-118847000D01* 124 | X151358488Y-118842073D01* 125 | X151209188Y-118812376D01* 126 | X151045216Y-118744456D01* 127 | X150897646Y-118645853D01* 128 | X150772147Y-118520354D01* 129 | X150673544Y-118372784D01* 130 | X150605624Y-118208812D01* 131 | X150571000Y-118034741D01* 132 | X150571000Y-117857259D01* 133 | X150605624Y-117683188D01* 134 | X150673544Y-117519216D01* 135 | X150772147Y-117371646D01* 136 | X150897646Y-117246147D01* 137 | X151045216Y-117147544D01* 138 | X151209188Y-117079624D01* 139 | X151358488Y-117049927D01* 140 | X151383258Y-117045000D01* 141 | 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TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)* 2 | G04 #@! TF.CreationDate,2020-01-26T21:02:15+01:00* 3 | G04 #@! TF.ProjectId,Cherry MX Breakout Board (Kailh Socket),43686572-7279-4204-9d58-20427265616b,v1* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Legend,Top* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2020-01-26 21:02:15* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10C,0.130000*% 14 | %ADD11C,0.100000*% 15 | %ADD12C,0.120000*% 16 | G04 APERTURE END LIST* 17 | D10* 18 | X144815714Y-112658833D02* 19 | X144853809Y-112692166D01* 20 | X144891904Y-112792166D01* 21 | X144891904Y-112858833D01* 22 | X144853809Y-112958833D01* 23 | X144777619Y-113025500D01* 24 | X144701428Y-113058833D01* 25 | X144549047Y-113092166D01* 26 | X144434761Y-113092166D01* 27 | X144282380Y-113058833D01* 28 | X144206190Y-113025500D01* 29 | X144130000Y-112958833D01* 30 | X144091904Y-112858833D01* 31 | X144091904Y-112792166D01* 32 | X144130000Y-112692166D01* 33 | X144168095Y-112658833D01* 34 | X144891904Y-112358833D02* 35 | X144091904Y-112358833D01* 36 | X144891904Y-112058833D02* 37 | X144472857Y-112058833D01* 38 | X144396666Y-112092166D01* 39 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-------------------------------------------------------------------------------- /gerbers/Kailh Socket/Cherry MX Breakout Board (Kailh Socket)-NPTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad (5.1.5-0-10_14)} date Sunday, 26 January 2020 at 21:02:12 3 | ; FORMAT={-:-/ absolute / inch / decimal} 4 | ; #@! TF.CreationDate,2020-01-26T21:02:12+01:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.5-0-10_14) 6 | ; #@! TF.FileFunction,NonPlated,1,2,NPTH 7 | FMAT,2 8 | INCH 9 | T1C0.1181 10 | T2C0.1575 11 | % 12 | G90 13 | G05 14 | T1 15 | X5.84Y-4.05 16 | X5.94Y-4.3 17 | T2 18 | X6.04Y-4.15 19 | T0 20 | M30 21 | -------------------------------------------------------------------------------- /gerbers/Kailh Socket/Cherry MX Breakout Board (Kailh Socket)-PTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad (5.1.5-0-10_14)} date Sunday, 26 January 2020 at 21:02:12 3 | ; FORMAT={-:-/ absolute / inch / decimal} 4 | ; #@! TF.CreationDate,2020-01-26T21:02:12+01:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.5-0-10_14) 6 | ; #@! TF.FileFunction,Plated,1,2,PTH 7 | FMAT,2 8 | INCH 9 | T1C0.0394 10 | % 11 | G90 12 | G05 13 | T1 14 | X5.7635Y-4.6435 15 | X5.8635Y-4.6435 16 | X5.9635Y-4.6435 17 | X6.0635Y-4.6435 18 | X6.1635Y-4.6435 19 | X6.2635Y-4.6435 20 | T0 21 | M30 22 | -------------------------------------------------------------------------------- /gerbers/Mill-Max 7305/Cherry MX Breakout Board (Mill-Max-7305)-B_Cu.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)* 2 | G04 #@! TF.CreationDate,2020-01-26T21:02:46+01:00* 3 | G04 #@! TF.ProjectId,Cherry MX Breakout Board (Mill-Max-7305),43686572-7279-4204-9d58-20427265616b,v1* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Copper,L2,Bot* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2020-01-26 21:02:46* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10R,0.900000X1.800000*% 14 | %ADD11C,2.200000*% 15 | %ADD12R,1.700000X1.700000*% 16 | %ADD13O,1.700000X1.700000*% 17 | %ADD14C,0.100000*% 18 | %ADD15C,0.250000*% 19 | G04 APERTURE END LIST* 20 | D10* 21 | X157716000Y-102810000D03* 22 | X159216000Y-102810000D03* 23 | X159216000Y-108010000D03* 24 | X157716000Y-108010000D03* 25 | D11* 26 | X148336000Y-102870000D03* 27 | X150876000Y-109220000D03* 28 | D12* 29 | X159092000Y-117946000D03* 30 | D13* 31 | X156552000Y-117946000D03* 32 | X154012000Y-117946000D03* 33 | X151472000Y-117946000D03* 34 | X148932000Y-117946000D03* 35 | X146392000Y-117946000D03* 36 | G04 #@! TA.AperFunction,SMDPad,CuDef* 37 | D14* 38 | G36* 39 | X154947691Y-121046053D02* 40 | G01* 41 | X154968926Y-121049203D01* 42 | X154989750Y-121054419D01* 43 | X155009962Y-121061651D01* 44 | X155029368Y-121070830D01* 45 | X155047781Y-121081866D01* 46 | X155065024Y-121094654D01* 47 | X155080930Y-121109070D01* 48 | X155095346Y-121124976D01* 49 | X155108134Y-121142219D01* 50 | X155119170Y-121160632D01* 51 | X155128349Y-121180038D01* 52 | X155135581Y-121200250D01* 53 | X155140797Y-121221074D01* 54 | X155143947Y-121242309D01* 55 | X155145000Y-121263750D01* 56 | X155145000Y-121776250D01* 57 | X155143947Y-121797691D01* 58 | X155140797Y-121818926D01* 59 | X155135581Y-121839750D01* 60 | X155128349Y-121859962D01* 61 | X155119170Y-121879368D01* 62 | X155108134Y-121897781D01* 63 | X155095346Y-121915024D01* 64 | X155080930Y-121930930D01* 65 | X155065024Y-121945346D01* 66 | X155047781Y-121958134D01* 67 | X155029368Y-121969170D01* 68 | X155009962Y-121978349D01* 69 | X154989750Y-121985581D01* 70 | X154968926Y-121990797D01* 71 | X154947691Y-121993947D01* 72 | X154926250Y-121995000D01* 73 | X154488750Y-121995000D01* 74 | X154467309Y-121993947D01* 75 | X154446074Y-121990797D01* 76 | X154425250Y-121985581D01* 77 | X154405038Y-121978349D01* 78 | X154385632Y-121969170D01* 79 | X154367219Y-121958134D01* 80 | X154349976Y-121945346D01* 81 | X154334070Y-121930930D01* 82 | X154319654Y-121915024D01* 83 | X154306866Y-121897781D01* 84 | X154295830Y-121879368D01* 85 | X154286651Y-121859962D01* 86 | X154279419Y-121839750D01* 87 | X154274203Y-121818926D01* 88 | X154271053Y-121797691D01* 89 | X154270000Y-121776250D01* 90 | X154270000Y-121263750D01* 91 | X154271053Y-121242309D01* 92 | X154274203Y-121221074D01* 93 | X154279419Y-121200250D01* 94 | X154286651Y-121180038D01* 95 | X154295830Y-121160632D01* 96 | X154306866Y-121142219D01* 97 | X154319654Y-121124976D01* 98 | X154334070Y-121109070D01* 99 | X154349976Y-121094654D01* 100 | X154367219Y-121081866D01* 101 | X154385632Y-121070830D01* 102 | X154405038Y-121061651D01* 103 | X154425250Y-121054419D01* 104 | X154446074Y-121049203D01* 105 | X154467309Y-121046053D01* 106 | X154488750Y-121045000D01* 107 | X154926250Y-121045000D01* 108 | X154947691Y-121046053D01* 109 | G37* 110 | G04 #@! TD.AperFunction* 111 | G04 #@! TA.AperFunction,SMDPad,CuDef* 112 | G36* 113 | X153372691Y-121046053D02* 114 | G01* 115 | X153393926Y-121049203D01* 116 | X153414750Y-121054419D01* 117 | X153434962Y-121061651D01* 118 | X153454368Y-121070830D01* 119 | X153472781Y-121081866D01* 120 | X153490024Y-121094654D01* 121 | X153505930Y-121109070D01* 122 | X153520346Y-121124976D01* 123 | X153533134Y-121142219D01* 124 | X153544170Y-121160632D01* 125 | X153553349Y-121180038D01* 126 | X153560581Y-121200250D01* 127 | X153565797Y-121221074D01* 128 | X153568947Y-121242309D01* 129 | X153570000Y-121263750D01* 130 | X153570000Y-121776250D01* 131 | X153568947Y-121797691D01* 132 | X153565797Y-121818926D01* 133 | X153560581Y-121839750D01* 134 | X153553349Y-121859962D01* 135 | X153544170Y-121879368D01* 136 | X153533134Y-121897781D01* 137 | X153520346Y-121915024D01* 138 | X153505930Y-121930930D01* 139 | X153490024Y-121945346D01* 140 | X153472781Y-121958134D01* 141 | X153454368Y-121969170D01* 142 | X153434962Y-121978349D01* 143 | X153414750Y-121985581D01* 144 | X153393926Y-121990797D01* 145 | X153372691Y-121993947D01* 146 | X153351250Y-121995000D01* 147 | X152913750Y-121995000D01* 148 | X152892309Y-121993947D01* 149 | X152871074Y-121990797D01* 150 | X152850250Y-121985581D01* 151 | X152830038Y-121978349D01* 152 | X152810632Y-121969170D01* 153 | X152792219Y-121958134D01* 154 | X152774976Y-121945346D01* 155 | X152759070Y-121930930D01* 156 | X152744654Y-121915024D01* 157 | X152731866Y-121897781D01* 158 | X152720830Y-121879368D01* 159 | X152711651Y-121859962D01* 160 | X152704419Y-121839750D01* 161 | X152699203Y-121818926D01* 162 | X152696053Y-121797691D01* 163 | X152695000Y-121776250D01* 164 | X152695000Y-121263750D01* 165 | X152696053Y-121242309D01* 166 | X152699203Y-121221074D01* 167 | X152704419Y-121200250D01* 168 | X152711651Y-121180038D01* 169 | X152720830Y-121160632D01* 170 | X152731866Y-121142219D01* 171 | X152744654Y-121124976D01* 172 | X152759070Y-121109070D01* 173 | X152774976Y-121094654D01* 174 | X152792219Y-121081866D01* 175 | X152810632Y-121070830D01* 176 | X152830038Y-121061651D01* 177 | X152850250Y-121054419D01* 178 | X152871074Y-121049203D01* 179 | X152892309Y-121046053D01* 180 | X152913750Y-121045000D01* 181 | X153351250Y-121045000D01* 182 | X153372691Y-121046053D01* 183 | G37* 184 | G04 #@! TD.AperFunction* 185 | D15* 186 | X159216000Y-101660000D02* 187 | X158956000Y-101400000D01* 188 | X159216000Y-102810000D02* 189 | X159216000Y-101660000D01* 190 | X157190998Y-101400000D02* 191 | X156059990Y-102531008D01* 192 | X158956000Y-101400000D02* 193 | X157190998Y-101400000D01* 194 | X156059990Y-102531008D02* 195 | X156059990Y-113330010D01* 196 | X156059990Y-113330010D02* 197 | X151440000Y-117950000D01* 198 | X152695000Y-121520000D02* 199 | X151450000Y-120275000D01* 200 | X153132500Y-121520000D02* 201 | X152695000Y-121520000D01* 202 | X151450000Y-120275000D02* 203 | X151450000Y-118000000D01* 204 | X156679000Y-117946000D02* 205 | X156552000Y-117946000D01* 206 | X157716000Y-108010000D02* 207 | X157716000Y-116704000D01* 208 | X157716000Y-116704000D02* 209 | X156510000Y-117910000D01* 210 | X155145000Y-121520000D02* 211 | X156530000Y-120135000D01* 212 | X154707500Y-121520000D02* 213 | X155145000Y-121520000D01* 214 | X156530000Y-120135000D02* 215 | X156530000Y-118030000D01* 216 | X148932000Y-117946000D02* 217 | X148932000Y-111228000D01* 218 | X148932000Y-111228000D02* 219 | X150940000Y-109220000D01* 220 | X146392000Y-117946000D02* 221 | X146392000Y-104898000D01* 222 | X146392000Y-104898000D02* 223 | X148250000Y-103040000D01* 224 | X159098001Y-117939999D02* 225 | X159092000Y-117946000D01* 226 | X158896000Y-117623000D02* 227 | X159092000Y-117819000D01* 228 | X158796000Y-117606000D02* 229 | X159050000Y-117860000D01* 230 | X159216000Y-108010000D02* 231 | X159216000Y-117764000D01* 232 | X159216000Y-117764000D02* 233 | X159050000Y-117930000D01* 234 | X157016000Y-102810000D02* 235 | X156510000Y-103316000D01* 236 | X157716000Y-102810000D02* 237 | X157016000Y-102810000D01* 238 | X156510000Y-103316000D02* 239 | X156510000Y-115400000D01* 240 | X156510000Y-115400000D02* 241 | X154030000Y-117880000D01* 242 | M02* 243 | -------------------------------------------------------------------------------- /gerbers/Mill-Max 7305/Cherry MX Breakout Board (Mill-Max-7305)-B_Mask.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)* 2 | G04 #@! TF.CreationDate,2020-01-26T21:02:46+01:00* 3 | G04 #@! TF.ProjectId,Cherry MX Breakout Board (Mill-Max-7305),43686572-7279-4204-9d58-20427265616b,v1* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Soldermask,Bot* 6 | G04 #@! TF.FilePolarity,Negative* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2020-01-26 21:02:46* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10C,0.100000*% 14 | G04 APERTURE END LIST* 15 | D10* 16 | G36* 17 | X155049591Y-120998085D02* 18 | G01* 19 | X155083569Y-121008393D01* 20 | X155114890Y-121025134D01* 21 | X155142339Y-121047661D01* 22 | X155164866Y-121075110D01* 23 | X155181607Y-121106431D01* 24 | X155191915Y-121140409D01* 25 | X155196000Y-121181890D01* 26 | X155196000Y-121858110D01* 27 | X155191915Y-121899591D01* 28 | X155181607Y-121933569D01* 29 | X155164866Y-121964890D01* 30 | X155142339Y-121992339D01* 31 | X155114890Y-122014866D01* 32 | X155083569Y-122031607D01* 33 | X155049591Y-122041915D01* 34 | X155008110Y-122046000D01* 35 | X154406890Y-122046000D01* 36 | X154365409Y-122041915D01* 37 | X154331431Y-122031607D01* 38 | X154300110Y-122014866D01* 39 | X154272661Y-121992339D01* 40 | X154250134Y-121964890D01* 41 | X154233393Y-121933569D01* 42 | X154223085Y-121899591D01* 43 | X154219000Y-121858110D01* 44 | X154219000Y-121181890D01* 45 | X154223085Y-121140409D01* 46 | X154233393Y-121106431D01* 47 | X154250134Y-121075110D01* 48 | X154272661Y-121047661D01* 49 | X154300110Y-121025134D01* 50 | X154331431Y-121008393D01* 51 | X154365409Y-120998085D01* 52 | X154406890Y-120994000D01* 53 | X155008110Y-120994000D01* 54 | X155049591Y-120998085D01* 55 | G37* 56 | G36* 57 | X153474591Y-120998085D02* 58 | G01* 59 | X153508569Y-121008393D01* 60 | X153539890Y-121025134D01* 61 | X153567339Y-121047661D01* 62 | X153589866Y-121075110D01* 63 | X153606607Y-121106431D01* 64 | X153616915Y-121140409D01* 65 | X153621000Y-121181890D01* 66 | X153621000Y-121858110D01* 67 | X153616915Y-121899591D01* 68 | X153606607Y-121933569D01* 69 | X153589866Y-121964890D01* 70 | X153567339Y-121992339D01* 71 | X153539890Y-122014866D01* 72 | X153508569Y-122031607D01* 73 | X153474591Y-122041915D01* 74 | X153433110Y-122046000D01* 75 | X152831890Y-122046000D01* 76 | X152790409Y-122041915D01* 77 | X152756431Y-122031607D01* 78 | X152725110Y-122014866D01* 79 | X152697661Y-121992339D01* 80 | X152675134Y-121964890D01* 81 | X152658393Y-121933569D01* 82 | X152648085Y-121899591D01* 83 | X152644000Y-121858110D01* 84 | X152644000Y-121181890D01* 85 | X152648085Y-121140409D01* 86 | X152658393Y-121106431D01* 87 | X152675134Y-121075110D01* 88 | X152697661Y-121047661D01* 89 | X152725110Y-121025134D01* 90 | X152756431Y-121008393D01* 91 | X152790409Y-120998085D01* 92 | X152831890Y-120994000D01* 93 | X153433110Y-120994000D01* 94 | X153474591Y-120998085D01* 95 | G37* 96 | G36* 97 | X159993000Y-118847000D02* 98 | G01* 99 | X158191000Y-118847000D01* 100 | X158191000Y-117045000D01* 101 | X159993000Y-117045000D01* 102 | X159993000Y-118847000D01* 103 | G37* 104 | G36* 105 | X156665512Y-117049927D02* 106 | G01* 107 | X156814812Y-117079624D01* 108 | X156978784Y-117147544D01* 109 | X157126354Y-117246147D01* 110 | X157251853Y-117371646D01* 111 | X157350456Y-117519216D01* 112 | X157418376Y-117683188D01* 113 | X157453000Y-117857259D01* 114 | X157453000Y-118034741D01* 115 | X157418376Y-118208812D01* 116 | X157350456Y-118372784D01* 117 | X157251853Y-118520354D01* 118 | X157126354Y-118645853D01* 119 | X156978784Y-118744456D01* 120 | X156814812Y-118812376D01* 121 | X156665512Y-118842073D01* 122 | X156640742Y-118847000D01* 123 | X156463258Y-118847000D01* 124 | X156438488Y-118842073D01* 125 | X156289188Y-118812376D01* 126 | X156125216Y-118744456D01* 127 | X155977646Y-118645853D01* 128 | X155852147Y-118520354D01* 129 | X155753544Y-118372784D01* 130 | X155685624Y-118208812D01* 131 | X155651000Y-118034741D01* 132 | X155651000Y-117857259D01* 133 | X155685624Y-117683188D01* 134 | X155753544Y-117519216D01* 135 | X155852147Y-117371646D01* 136 | X155977646Y-117246147D01* 137 | X156125216Y-117147544D01* 138 | X156289188Y-117079624D01* 139 | X156438488Y-117049927D01* 140 | X156463258Y-117045000D01* 141 | X156640742Y-117045000D01* 142 | X156665512Y-117049927D01* 143 | G37* 144 | G36* 145 | X154125512Y-117049927D02* 146 | G01* 147 | X154274812Y-117079624D01* 148 | X154438784Y-117147544D01* 149 | X154586354Y-117246147D01* 150 | X154711853Y-117371646D01* 151 | X154810456Y-117519216D01* 152 | X154878376Y-117683188D01* 153 | X154913000Y-117857259D01* 154 | X154913000Y-118034741D01* 155 | X154878376Y-118208812D01* 156 | X154810456Y-118372784D01* 157 | X154711853Y-118520354D01* 158 | X154586354Y-118645853D01* 159 | X154438784Y-118744456D01* 160 | X154274812Y-118812376D01* 161 | X154125512Y-118842073D01* 162 | X154100742Y-118847000D01* 163 | X153923258Y-118847000D01* 164 | X153898488Y-118842073D01* 165 | X153749188Y-118812376D01* 166 | X153585216Y-118744456D01* 167 | X153437646Y-118645853D01* 168 | X153312147Y-118520354D01* 169 | X153213544Y-118372784D01* 170 | X153145624Y-118208812D01* 171 | X153111000Y-118034741D01* 172 | X153111000Y-117857259D01* 173 | X153145624Y-117683188D01* 174 | X153213544Y-117519216D01* 175 | X153312147Y-117371646D01* 176 | X153437646Y-117246147D01* 177 | X153585216Y-117147544D01* 178 | X153749188Y-117079624D01* 179 | X153898488Y-117049927D01* 180 | X153923258Y-117045000D01* 181 | X154100742Y-117045000D01* 182 | X154125512Y-117049927D01* 183 | G37* 184 | G36* 185 | X151585512Y-117049927D02* 186 | G01* 187 | X151734812Y-117079624D01* 188 | X151898784Y-117147544D01* 189 | X152046354Y-117246147D01* 190 | X152171853Y-117371646D01* 191 | X152270456Y-117519216D01* 192 | X152338376Y-117683188D01* 193 | X152373000Y-117857259D01* 194 | X152373000Y-118034741D01* 195 | X152338376Y-118208812D01* 196 | X152270456Y-118372784D01* 197 | X152171853Y-118520354D01* 198 | X152046354Y-118645853D01* 199 | X151898784Y-118744456D01* 200 | X151734812Y-118812376D01* 201 | X151585512Y-118842073D01* 202 | X151560742Y-118847000D01* 203 | X151383258Y-118847000D01* 204 | X151358488Y-118842073D01* 205 | X151209188Y-118812376D01* 206 | X151045216Y-118744456D01* 207 | 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TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)* 2 | G04 #@! TF.CreationDate,2020-01-26T21:02:46+01:00* 3 | G04 #@! TF.ProjectId,Cherry MX Breakout Board (Mill-Max-7305),43686572-7279-4204-9d58-20427265616b,v1* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Legend,Bot* 6 | G04 #@! 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TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)* 2 | G04 #@! TF.CreationDate,2020-01-26T21:02:46+01:00* 3 | G04 #@! TF.ProjectId,Cherry MX Breakout Board (Mill-Max-7305),43686572-7279-4204-9d58-20427265616b,v1* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! 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TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)* 2 | G04 #@! TF.CreationDate,2020-01-26T21:02:46+01:00* 3 | G04 #@! TF.ProjectId,Cherry MX Breakout Board (Mill-Max-7305),43686572-7279-4204-9d58-20427265616b,v1* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Copper,L1,Top* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2020-01-26 21:02:46* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | %ADD10C,2.200000*% 14 | %ADD11R,1.700000X1.700000*% 15 | %ADD12O,1.700000X1.700000*% 16 | G04 APERTURE END LIST* 17 | D10* 18 | X148336000Y-102870000D03* 19 | X150876000Y-109220000D03* 20 | D11* 21 | X159092000Y-117946000D03* 22 | D12* 23 | X156552000Y-117946000D03* 24 | X154012000Y-117946000D03* 25 | X151472000Y-117946000D03* 26 | X148932000Y-117946000D03* 27 | X146392000Y-117946000D03* 28 | M02* 29 | -------------------------------------------------------------------------------- /gerbers/Mill-Max 7305/Cherry MX Breakout Board (Mill-Max-7305)-F_Mask.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)* 2 | G04 #@! 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X147229232Y-102534266D01* 338 | X147315997Y-102324797D01* 339 | X147441960Y-102136280D01* 340 | X147602280Y-101975960D01* 341 | X147790797Y-101849997D01* 342 | X148000266Y-101763232D01* 343 | X148111451Y-101741116D01* 344 | X148222635Y-101719000D01* 345 | X148449365Y-101719000D01* 346 | X148560549Y-101741116D01* 347 | G37* 348 | M02* 349 | -------------------------------------------------------------------------------- /gerbers/Mill-Max 7305/Cherry MX Breakout Board (Mill-Max-7305)-NPTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad (5.1.5-0-10_14)} date Sunday, 26 January 2020 at 21:02:44 3 | ; FORMAT={-:-/ absolute / inch / decimal} 4 | ; #@! TF.CreationDate,2020-01-26T21:02:44+01:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.5-0-10_14) 6 | ; #@! TF.FileFunction,NonPlated,1,2,NPTH 7 | FMAT,2 8 | INCH 9 | T1C0.1575 10 | % 11 | G90 12 | G05 13 | T1 14 | X6.04Y-4.15 15 | T0 16 | M30 17 | -------------------------------------------------------------------------------- /gerbers/Mill-Max 7305/Cherry MX Breakout Board (Mill-Max-7305)-PTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad (5.1.5-0-10_14)} date Sunday, 26 January 2020 at 21:02:44 3 | ; FORMAT={-:-/ absolute / inch / decimal} 4 | ; #@! TF.CreationDate,2020-01-26T21:02:44+01:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.5-0-10_14) 6 | ; #@! TF.FileFunction,Plated,1,2,PTH 7 | FMAT,2 8 | INCH 9 | T1C0.0394 10 | T2C0.0591 11 | % 12 | G90 13 | G05 14 | T1 15 | X5.7635Y-4.6435 16 | X5.8635Y-4.6435 17 | X5.9635Y-4.6435 18 | X6.0635Y-4.6435 19 | X6.1635Y-4.6435 20 | X6.2635Y-4.6435 21 | T2 22 | X5.84Y-4.05 23 | X5.94Y-4.3 24 | T0 25 | M30 26 | -------------------------------------------------------------------------------- /libraries/Cherry MX.pretty/Cherry-MX_PCB-Mounted.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Cherry-MX_PCB-Mounted (layer F.Cu) (tedit 5E851ADE) 2 | (fp_text reference REF** (at 0 -8.8) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value Cherry-MX_Plate_Mounted (at 0 8.9) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start -7.8 7.8) (end 7.8 7.8) (layer F.Fab) (width 0.12)) 9 | (fp_line (start 7.8 -7.8) (end 7.8 7.8) (layer F.Fab) (width 0.12)) 10 | (fp_line (start -7.8 -7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 11 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 12 | (pad "" np_thru_hole circle (at 5.08 0) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask)) 13 | (pad "" np_thru_hole circle (at -5.08 0) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask)) 14 | (pad 2 thru_hole circle (at 2.54 -5.08) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask)) 15 | (pad 1 thru_hole circle (at -3.81 -2.54) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask)) 16 | (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 17 | ) 18 | -------------------------------------------------------------------------------- /libraries/Cherry MX.pretty/Cherry-MX_PCB-Mounted_LTST-A683CEGBW_Kailh_Socket.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Cherry-MX_PCB-Mounted_LTST-A683CEGBW_Kailh_Socket (layer F.Cu) (tedit 5E851C30) 2 | (fp_text reference REF** (at 0 -8.7) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value Cherry-MX_PCB-Mounted_LTST-A683CEGBW_Kailh_Socket (at 0 9) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 9 | (fp_line (start 7.8 7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 10 | (fp_line (start -7.8 7.8) (end -7.8 -7.8) (layer F.Fab) (width 0.12)) 11 | (fp_line (start 7.8 7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 12 | (fp_line (start -2 3.25) (end -2 3.55) (layer B.SilkS) (width 0.12)) 13 | (fp_line (start -1.7 3.25) (end -2 3.25) (layer B.SilkS) (width 0.12)) 14 | (fp_poly (pts (xy 1.7 6.55) (xy -1.7 6.55) (xy -1.7 3.55) (xy 1.7 3.55)) (layer Edge.Cuts) (width 0.01)) 15 | (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 16 | (pad "" np_thru_hole circle (at -3.81 -2.54) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 17 | (pad "" np_thru_hole circle (at 2.54 -5.08) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 18 | (pad 5 smd rect (at -7.41 -2.54) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask)) 19 | (pad 6 smd rect (at 6.015 -5.08) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask)) 20 | (pad 1 smd rect (at -2.6 4.3) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 21 | (pad 2 smd rect (at -2.6 5.8) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 22 | (pad 4 smd rect (at 2.6 5.8) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 23 | (pad 3 smd rect (at 2.6 4.3) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 24 | (pad "" np_thru_hole circle (at -5.08 0) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask)) 25 | (pad "" np_thru_hole circle (at 5.08 0) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask)) 26 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Kailh_Socket.stp" 27 | (offset (xyz -0.65 3.8 -3.53)) 28 | (scale (xyz 1 1 1)) 29 | (rotate (xyz 0 0 180)) 30 | ) 31 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/LTST-A683CEGBW.step" 32 | (offset (xyz 0 -5.05 -1.9)) 33 | (scale (xyz 1 1 1)) 34 | (rotate (xyz 0 0 0)) 35 | ) 36 | ) 37 | -------------------------------------------------------------------------------- /libraries/Cherry MX.pretty/Cherry-MX_PCB-Mounted_LTST-A683CEGBW_Mill-Max-7305.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Cherry-MX_PCB-Mounted_LTST-A683CEGBW_Mill-Max-7305 (layer F.Cu) (tedit 5E851C45) 2 | (fp_text reference REF** (at 0 -8.7) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value Cherry-MX_PCB-Mounted_LTST-A683CEGBW_Mill-Max-7305 (at 0 9) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 7.8 7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 9 | (fp_line (start -7.8 7.8) (end -7.8 -7.8) (layer F.Fab) (width 0.12)) 10 | (fp_line (start 7.8 7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 11 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 12 | (fp_line (start -2 3.25) (end -2 3.55) (layer B.SilkS) (width 0.12)) 13 | (fp_line (start -1.7 3.25) (end -2 3.25) (layer B.SilkS) (width 0.12)) 14 | (fp_poly (pts (xy 1.7 6.55) (xy -1.7 6.55) (xy -1.7 3.55) (xy 1.7 3.55)) (layer Edge.Cuts) (width 0.01)) 15 | (pad 5 thru_hole circle (at -3.81 -2.54) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask)) 16 | (pad 6 thru_hole circle (at 2.54 -5.08) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask)) 17 | (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 18 | (pad 1 smd rect (at -2.6 4.3) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 19 | (pad 2 smd rect (at -2.6 5.8) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 20 | (pad 4 smd rect (at 2.6 5.8) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 21 | (pad 3 smd rect (at 2.6 4.3) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 22 | (pad "" np_thru_hole circle (at 5.08 0) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask)) 23 | (pad "" np_thru_hole circle (at -5.08 0) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask)) 24 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/LTST-A683CEGBW.step" 25 | (offset (xyz 0 -5.05 -1.9)) 26 | (scale (xyz 1 1 1)) 27 | (rotate (xyz 0 0 0)) 28 | ) 29 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Mill-Max-7305.step" 30 | (offset (xyz -3.81 2.54 -2.3)) 31 | (scale (xyz 1 1 1)) 32 | (rotate (xyz 0 0 0)) 33 | ) 34 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Mill-Max-7305.step" 35 | (offset (xyz 2.54 5.08 -2.3)) 36 | (scale (xyz 1 1 1)) 37 | (rotate (xyz 0 0 0)) 38 | ) 39 | ) 40 | -------------------------------------------------------------------------------- /libraries/Cherry MX.pretty/Cherry-MX_Plate-Mounted.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Cherry-MX_Plate-Mounted (layer F.Cu) (tedit 5E2DE4AE) 2 | (fp_text reference REF** (at 0 -8.8) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value Cherry-MX_Plate-Mounted (at 0 8.9) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 9 | (fp_line (start -7.8 -7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 10 | (fp_line (start 7.8 -7.8) (end 7.8 7.8) (layer F.Fab) (width 0.12)) 11 | (fp_line (start -7.8 7.8) (end 7.8 7.8) (layer F.Fab) (width 0.12)) 12 | (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 13 | (pad 1 thru_hole circle (at -3.81 -2.54) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask)) 14 | (pad 2 thru_hole circle (at 2.54 -5.08) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask)) 15 | ) 16 | -------------------------------------------------------------------------------- /libraries/Cherry MX.pretty/Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Kailh_Socket.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Kailh_Socket (layer F.Cu) (tedit 5E2DEC68) 2 | (fp_text reference REF** (at 0 -8.7) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Kailh_Socket (at 0 9) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 9 | (fp_line (start 7.8 7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 10 | (fp_line (start -7.8 7.8) (end -7.8 -7.8) (layer F.Fab) (width 0.12)) 11 | (fp_line (start 7.8 7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 12 | (fp_line (start -2 3.25) (end -2 3.55) (layer B.SilkS) (width 0.12)) 13 | (fp_line (start -1.7 3.25) (end -2 3.25) (layer B.SilkS) (width 0.12)) 14 | (fp_poly (pts (xy 1.7 6.55) (xy -1.7 6.55) (xy -1.7 3.55) (xy 1.7 3.55)) (layer Edge.Cuts) (width 0.01)) 15 | (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 16 | (pad "" np_thru_hole circle (at -3.81 -2.54) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 17 | (pad "" np_thru_hole circle (at 2.54 -5.08) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 18 | (pad 5 smd rect (at -7.41 -2.54) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask)) 19 | (pad 6 smd rect (at 6.015 -5.08) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask)) 20 | (pad 1 smd rect (at -2.6 4.3) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 21 | (pad 2 smd rect (at -2.6 5.8) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 22 | (pad 4 smd rect (at 2.6 5.8) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 23 | (pad 3 smd rect (at 2.6 4.3) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 24 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Kailh_Socket.stp" 25 | (offset (xyz -0.65 3.8 -3.53)) 26 | (scale (xyz 1 1 1)) 27 | (rotate (xyz 0 0 180)) 28 | ) 29 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/LTST-A683CEGBW.step" 30 | (offset (xyz 0 -5.05 -1.9)) 31 | (scale (xyz 1 1 1)) 32 | (rotate (xyz 0 0 0)) 33 | ) 34 | ) 35 | -------------------------------------------------------------------------------- /libraries/Cherry MX.pretty/Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Mill-Max-7305.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Mill-Max-7305 (layer F.Cu) (tedit 5E2DEC77) 2 | (fp_text reference REF** (at 0 -8.7) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value Cherry-MX_Plate-Mounted_LTST-A683CEGBW_Mill-Max-7305 (at 0 9) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 7.8 7.8) (end -7.8 7.8) (layer F.Fab) (width 0.12)) 9 | (fp_line (start -7.8 7.8) (end -7.8 -7.8) (layer F.Fab) (width 0.12)) 10 | (fp_line (start 7.8 7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 11 | (fp_line (start -7.8 -7.8) (end 7.8 -7.8) (layer F.Fab) (width 0.12)) 12 | (fp_line (start -2 3.25) (end -2 3.55) (layer B.SilkS) (width 0.12)) 13 | (fp_line (start -1.7 3.25) (end -2 3.25) (layer B.SilkS) (width 0.12)) 14 | (fp_poly (pts (xy 1.7 6.55) (xy -1.7 6.55) (xy -1.7 3.55) (xy 1.7 3.55)) (layer Edge.Cuts) (width 0.01)) 15 | (pad 5 thru_hole circle (at -3.81 -2.54) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask)) 16 | (pad 6 thru_hole circle (at 2.54 -5.08) (size 2.2 2.2) (drill 1.5) (layers *.Cu *.Mask)) 17 | (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Cu *.Mask)) 18 | (pad 1 smd rect (at -2.6 4.3) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 19 | (pad 2 smd rect (at -2.6 5.8) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 20 | (pad 4 smd rect (at 2.6 5.8) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 21 | (pad 3 smd rect (at 2.6 4.3) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 22 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/LTST-A683CEGBW.step" 23 | (offset (xyz 0 -5.05 -1.9)) 24 | (scale (xyz 1 1 1)) 25 | (rotate (xyz 0 0 0)) 26 | ) 27 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Mill-Max-7305.step" 28 | (offset (xyz -3.81 2.54 -2.3)) 29 | (scale (xyz 1 1 1)) 30 | (rotate (xyz 0 0 0)) 31 | ) 32 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Mill-Max-7305.step" 33 | (offset (xyz 2.54 5.08 -2.3)) 34 | (scale (xyz 1 1 1)) 35 | (rotate (xyz 0 0 0)) 36 | ) 37 | ) 38 | -------------------------------------------------------------------------------- /libraries/Cherry MX.pretty/Kailh_Socket.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Kailh_Socket (layer F.Cu) (tedit 5E2DEB8C) 2 | (fp_text reference REF** (at 0 5.4) (layer B.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 4 | ) 5 | (fp_text value Kailh_Socket (at 0 -3.305) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (pad "" np_thru_hole circle (at -3.1 2.49) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 9 | (pad "" np_thru_hole circle (at 3.25 -0.05) (size 3 3) (drill 3) (layers *.Cu *.Mask)) 10 | (pad 1 smd rect (at -6.7 2.49) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask)) 11 | (pad 2 smd rect (at 6.725 -0.05) (size 2.55 2.5) (layers B.Cu B.Paste B.Mask)) 12 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/Kailh_Socket.stp" 13 | (offset (xyz 0.05 -1.2 -3.4)) 14 | (scale (xyz 1 1 1)) 15 | (rotate (xyz 0 0 0)) 16 | ) 17 | ) 18 | -------------------------------------------------------------------------------- /libraries/Cherry MX.pretty/LTST-A683CEGBW.kicad_mod: -------------------------------------------------------------------------------- 1 | (module LTST-A683CEGBW (layer F.Cu) (tedit 5E2DEC82) 2 | (fp_text reference REF** (at 0 -2.6) (layer B.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 4 | ) 5 | (fp_text value LTST-A683CEGBW (at 0 2.6) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start -2 -1.8) (end -2 -1.5) (layer B.SilkS) (width 0.12)) 9 | (fp_line (start -1.7 -1.8) (end -2 -1.8) (layer B.SilkS) (width 0.12)) 10 | (fp_poly (pts (xy 1.7 1.5) (xy -1.7 1.5) (xy -1.7 -1.5) (xy 1.7 -1.5)) (layer Edge.Cuts) (width 0.01)) 11 | (pad 1 smd rect (at -2.6 -0.75) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 12 | (pad 2 smd rect (at -2.6 0.75) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 13 | (pad 4 smd rect (at 2.6 0.75) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 14 | (pad 3 smd rect (at 2.6 -0.75) (size 1.8 0.9) (layers B.Cu B.Paste B.Mask)) 15 | (model "/Users/sebastianszczepanski/GitHub/Cherry-MX-Breakout-Board/libraries/Cherry MX.pretty/LTST-A683CEGBW.step" 16 | (offset (xyz 0 0 -1.9)) 17 | (scale (xyz 1 1 1)) 18 | (rotate (xyz 0 0 0)) 19 | ) 20 | ) 21 | -------------------------------------------------------------------------------- /libraries/Cherry MX.pretty/Mill-Max-7305.step: -------------------------------------------------------------------------------- 1 | ISO-10303-21; 2 | HEADER; 3 | FILE_DESCRIPTION(('FreeCAD Model'),'2;1'); 4 | FILE_NAME('/Users/sebastianszczepanski/Documents/FreeCAD/Cut.step', 5 | '2020-01-23T12:07:49',('kicad StepUp'),('ksu MCAD'), 6 | 'Open CASCADE STEP processor 7.3','FreeCAD','Unknown'); 7 | FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }')); 8 | ENDSEC; 9 | DATA; 10 | #1 = APPLICATION_PROTOCOL_DEFINITION('international standard', 11 | 'automotive_design',2000,#2); 12 | #2 = APPLICATION_CONTEXT( 13 | 'core data for automotive mechanical design processes'); 14 | #3 = SHAPE_DEFINITION_REPRESENTATION(#4,#10); 15 | #4 = PRODUCT_DEFINITION_SHAPE('','',#5); 16 | #5 = PRODUCT_DEFINITION('design','',#6,#9); 17 | #6 = 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SOLID_ANGLE_UNIT() ); 190 | #176 = UNCERTAINTY_MEASURE_WITH_UNIT(LENGTH_MEASURE(1.E-07),#173, 191 | 'distance_accuracy_value','confusion accuracy'); 192 | #177 = PRODUCT_RELATED_PRODUCT_CATEGORY('part',$,(#7)); 193 | #178 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(#179) 194 | ,#172); 195 | #179 = STYLED_ITEM('color',(#180),#15); 196 | #180 = PRESENTATION_STYLE_ASSIGNMENT((#181,#187)); 197 | #181 = SURFACE_STYLE_USAGE(.BOTH.,#182); 198 | #182 = SURFACE_SIDE_STYLE('',(#183)); 199 | #183 = SURFACE_STYLE_FILL_AREA(#184); 200 | #184 = FILL_AREA_STYLE('',(#185)); 201 | #185 = FILL_AREA_STYLE_COLOUR('',#186); 202 | #186 = COLOUR_RGB('',0.733333349228,0.733333349228,0.243137255311); 203 | #187 = CURVE_STYLE('',#188,POSITIVE_LENGTH_MEASURE(0.1),#186); 204 | #188 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous'); 205 | ENDSEC; 206 | END-ISO-10303-21; 207 | -------------------------------------------------------------------------------- /libraries/Cherry_MX.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /libraries/Cherry_MX.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Cherry_MX 5 | # 6 | DEF Cherry_MX S 0 0 Y Y 1 F N 7 | F0 "S" 0 60 50 H V C CNN 8 | F1 "Cherry_MX" 0 -130 50 H V C CNN 9 | F2 "" 5 -75 50 H I C CNN 10 | F3 "" 5 -75 50 H I C CNN 11 | DRAW 12 | A 0 0 10 1 1799 0 1 0 N 10 0 -10 0 13 | C -35 -25 11 0 1 0 N 14 | C 35 -25 11 0 1 0 N 15 | S -45 0 45 0 0 1 0 N 16 | X ~ 1 -135 -25 100 R 50 50 1 1 I 17 | X ~ 2 135 -25 100 L 50 50 1 1 I 18 | ENDDRAW 19 | ENDDEF 20 | # 21 | # Cherry_MX_RGB 22 | # 23 | DEF Cherry_MX_RGB U 0 40 Y Y 1 F N 24 | F0 "U" -200 350 50 H V C CNN 25 | F1 "Cherry_MX_RGB" 0 -150 50 H V C CNN 26 | F2 "" 0 0 50 H I C CNN 27 | F3 "" 0 0 50 H I C CNN 28 | DRAW 29 | S 225 -100 -225 300 0 1 0 N 30 | X GND 1 -325 -50 100 R 50 50 1 1 I 31 | X DIN 2 325 50 100 L 50 50 1 1 I 32 | X DOUT 3 325 -50 100 L 50 50 1 1 I 33 | X VCC 4 -325 50 100 R 50 50 1 1 I 34 | X SW1 5 325 250 100 L 50 50 1 1 I 35 | X SW2 6 325 150 100 L 50 50 1 1 I 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # LTST-A683CEGBW 40 | # 41 | DEF LTST-A683CEGBW D 0 40 Y Y 1 F N 42 | F0 "D" -200 150 50 H V C CNN 43 | F1 "LTST-A683CEGBW" 0 -150 50 H V C CNN 44 | F2 "" -125 0 50 H I C CNN 45 | F3 "" -125 0 50 H I C CNN 46 | DRAW 47 | S -225 -100 225 -100 0 0 0 N 48 | S -225 100 -225 -100 0 0 0 N 49 | S -225 100 225 100 0 0 0 N 50 | S 225 100 225 -100 0 0 0 N 51 | X GND 1 -325 -50 100 R 50 50 1 1 I 52 | X DIN 2 325 50 100 L 50 50 1 1 I 53 | X DOUT 3 325 -50 100 L 50 50 1 1 I 54 | X VCC 4 -325 50 100 R 50 50 1 1 I 55 | ENDDRAW 56 | ENDDEF 57 | # 58 | #End Library 59 | --------------------------------------------------------------------------------