├── .gitignore ├── LICENSE ├── README.md ├── common ├── 01_rfsoc_architecture_overview.ipynb ├── 02_exploring_the_rf_dataconverters.ipynb ├── 03_zynq_rfsoc_development.ipynb └── images │ ├── RFSoC_2x2_Master.png │ ├── ZCU111_Master.png │ ├── application_processor.eps │ ├── application_processor.svg │ ├── clb_overview.eps │ ├── clb_overview.svg │ ├── dsp_slice.eps │ ├── dsp_slice.svg │ ├── real_time_processor.eps │ ├── real_time_processor.svg │ ├── rf_adc_hierarchy.eps │ ├── rf_adc_hierarchy.svg │ ├── rf_adc_interface.eps │ ├── rf_adc_interface.svg │ ├── rf_dac_hierarchy.eps │ ├── rf_dac_hierarchy.svg │ ├── rf_dac_interface.eps │ ├── rf_dac_interface.svg │ ├── rfsoc_architecture_overview.eps │ ├── rfsoc_architecture_overview.svg │ ├── rfsoc_fpga.eps │ ├── rfsoc_fpga.svg │ ├── strathsdr_banner.png │ ├── super_sample_rate.eps │ └── super_sample_rate.svg ├── nb_rf_data_converters.png ├── nb_rf_spectrum.png ├── nb_software_defined_radio.png ├── open_jupyter_launcher.jpg ├── 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