├── License ├── lib ├── libat.a ├── libphy.a ├── libpp.a ├── libssl.a ├── libwpa.a ├── libjson.a ├── liblwip.a ├── libmain.a ├── libnet80211.a ├── libupgrade.a └── libsmartconfig.a ├── bin ├── blank.bin ├── boot_v1.2.bin ├── eagle.flash.bin ├── boot_v1.4(b1).bin ├── eagle.irom0text.bin ├── at │ ├── user1.1024.new.2.bin │ ├── user2.1024.new.2.bin │ └── readme.txt └── esp_init_data_default.bin ├── tools ├── xxd.exe ├── makefile.sh └── gen_appbin.py ├── release_note.txt ├── app ├── !!!readme!!!.txt ├── include │ └── user_config.h ├── user │ ├── .output │ │ └── eagle │ │ │ └── debug │ │ │ ├── lib │ │ │ └── libuser.a │ │ │ └── obj │ │ │ ├── user_main.o │ │ │ └── user_main.d │ ├── Makefile │ └── user_main.c ├── Makefile ├── gen_misc.bat └── gen_misc.sh ├── document └── EN │ ├── 2B-ESP8266__SDK__IOT_Demo__EN_v0.6.pdf │ ├── 4A-ESP8266__AT Instruction Set__EN_v0.24.pdf │ ├── 4B-ESP8266__AT Command Examples__EN_v0.4.pdf │ ├── 2A-ESP8266__IOT_SDK_User_Manual__EN_v1.1.0.pdf │ └── 2C-ESP8266__SDK__Programming Guide__EN_v1.1.0.pdf ├── include ├── mem.h ├── os_type.h ├── smartconfig.h ├── ping.h ├── pwm.h ├── spi_flash.h ├── upgrade.h ├── osapi.h ├── ip_addr.h ├── sntp.h ├── driver │ ├── uart.h │ └── uart_register.h ├── ets_sys.h ├── c_types.h ├── json │ ├── json.h │ ├── jsonparse.h │ └── jsontree.h ├── gpio.h ├── at_custom.h ├── queue.h ├── eagle_soc.h └── user_interface.h ├── README.md ├── ld ├── eagle.app.v6.ld ├── eagle.app.v6.new.2048.ld ├── eagle.app.v6.new.512.app1.ld ├── eagle.app.v6.new.512.app2.ld ├── eagle.app.v6.old.512.app1.ld ├── eagle.app.v6.old.512.app2.ld ├── eagle.app.v6.new.1024.app1.ld ├── eagle.app.v6.new.1024.app2.ld ├── eagle.app.v6.old.1024.app1.ld ├── eagle.app.v6.old.1024.app2.ld └── eagle.rom.addr.v6.ld ├── driver └── uart.c └── Makefile /License: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/subpos/esp_wifi_scanner/HEAD/License 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#ifndef __MEM_H__ 2 | #define __MEM_H__ 3 | 4 | //void *pvPortMalloc( size_t xWantedSize ); 5 | //void vPortFree( void *pv ); 6 | //void *pvPortZalloc(size_t size); 7 | 8 | #define os_malloc pvPortMalloc 9 | #define os_free vPortFree 10 | #define os_zalloc pvPortZalloc 11 | 12 | #endif 13 | -------------------------------------------------------------------------------- /tools/makefile.sh: -------------------------------------------------------------------------------- 1 | 2 | # 3 | # Generate the certificates and keys for encrypt. 4 | # 5 | 6 | # set default cert for use in the client 7 | xxd -i client.cer | sed -e \ 8 | "s/client_cer/default_certificate/" > cert.h 9 | # set default key for use in the server 10 | xxd -i server.key_1024 | sed -e \ 11 | "s/server_key_1024/default_private_key/" > private_key.h 12 | -------------------------------------------------------------------------------- /include/os_type.h: -------------------------------------------------------------------------------- 1 | /* 2 | * copyright (c) Espressif System 2010 3 | * 4 | * mapping to ETS structures 5 | * 6 | */ 7 | #ifndef _OS_TYPES_H_ 8 | #define _OS_TYPES_H_ 9 | 10 | #include "ets_sys.h" 11 | 12 | #define os_signal_t ETSSignal 13 | #define os_param_t ETSParam 14 | #define os_event_t ETSEvent 15 | #define os_task_t ETSTask 16 | #define os_timer_t ETSTimer 17 | #define os_timer_func_t ETSTimerFunc 18 | 19 | #endif 20 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | SPS Tagged SSID Scanner 2 | 3 | Use this with an ESP8266 module to feed into a trilateration library. This scanner will output SPS tagged SSIDs as hex 4 | along with the channel and RSSI. 5 | Note that if two or more access points have the same MAC address, the ESP8266 module will drop subsequent SSIDs. Changes have been made to allow Nodes to have the same MAC address, provided they are on different channels. 6 | In that sense, each access point needs to have a unique MAC address to work with this ESP scanner. 7 | 8 | Change the MAC address of ESP based APs with the following command: 9 | 10 | AT+CIPAPMAC="00:00:00:01:01:01" 11 | -------------------------------------------------------------------------------- /include/smartconfig.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2015 -2018 Espressif System 3 | * 4 | */ 5 | 6 | #ifndef __SMARTCONFIG_H__ 7 | #define __SMARTCONFIG_H__ 8 | 9 | typedef enum { 10 | SC_STATUS_WAIT = 0, 11 | SC_STATUS_FIND_CHANNEL, 12 | SC_STATUS_GETTING_SSID_PSWD, 13 | SC_STATUS_LINK, 14 | SC_STATUS_LINK_OVER, 15 | } sc_status; 16 | 17 | typedef enum { 18 | SC_TYPE_ESPTOUCH = 0, 19 | SC_TYPE_AIRKISS, 20 | } sc_type; 21 | 22 | typedef void (*sc_callback_t)(sc_status status, void *pdata); 23 | 24 | const char *smartconfig_get_version(void); 25 | bool smartconfig_start(sc_callback_t cb, ...); 26 | bool smartconfig_stop(void); 27 | bool esptouch_set_timeout(uint8 time_s); //15s~255s, offset:45s 28 | 29 | #endif 30 | -------------------------------------------------------------------------------- /include/ping.h: -------------------------------------------------------------------------------- 1 | #ifndef __PING_H__ 2 | #define __PING_H__ 3 | 4 | 5 | typedef void (* ping_recv_function)(void* arg, void *pdata); 6 | typedef void (* ping_sent_function)(void* arg, void *pdata); 7 | 8 | struct ping_option{ 9 | uint32 count; 10 | uint32 ip; 11 | uint32 coarse_time; 12 | ping_recv_function recv_function; 13 | ping_sent_function sent_function; 14 | void* reverse; 15 | }; 16 | 17 | struct ping_resp{ 18 | uint32 total_count; 19 | uint32 resp_time; 20 | uint32 seqno; 21 | uint32 timeout_count; 22 | uint32 bytes; 23 | uint32 total_bytes; 24 | uint32 total_time; 25 | sint8 ping_err; 26 | }; 27 | 28 | bool ping_start(struct ping_option *ping_opt); 29 | bool ping_regist_recv(struct ping_option *ping_opt, ping_recv_function ping_recv); 30 | bool ping_regist_sent(struct ping_option *ping_opt, ping_sent_function ping_sent); 31 | 32 | #endif /* __PING_H__ */ 33 | -------------------------------------------------------------------------------- /bin/at/readme.txt: -------------------------------------------------------------------------------- 1 | download: 2 | boot_v1.2+.bin 0x00000 3 | user1.1024.new.2.bin 0x01000 4 | blank.bin 0x7e000 & 0xfe000 5 | 6 | or 7 | 8 | eagle.flash.bin 0x00000 9 | eagle.irom0text.bin 0x40000 10 | blank.bin 0x7e000 & 0xfe000 11 | 12 | *NOTICE*: 13 | 1.If you use Esp Flash Download Tool, please MAKE SURE to choose FLASH SIZE to 8Mbit. 14 | 2.UPDATE is not supported in non-boot mode 15 | 16 | Update steps 17 | 1.Make sure TE(terminal equipment) is in sta or sta+ap mode 18 | ex. AT+CWMODE=3 19 | OK 20 | 21 | AT+RST 22 | 23 | 2.Make sure TE got ip address 24 | ex. AT+CWJAP="ssid","12345678" 25 | OK 26 | 27 | AT+CIFSR 28 | 192.168.1.134 29 | 30 | 3.Let's update 31 | ex. AT+CIUPDATE 32 | +CIPUPDATE:1 found server 33 | +CIPUPDATE:2 connect server 34 | +CIPUPDATE:3 got edition 35 | +CIPUPDATE:4 start start 36 | 37 | OK 38 | 39 | note. If there are mistakes in the updating, then break update and print ERROR. -------------------------------------------------------------------------------- /include/pwm.h: -------------------------------------------------------------------------------- 1 | #ifndef __PWM_H__ 2 | #define __PWM_H__ 3 | 4 | /*pwm.h: function and macro definition of PWM API , driver level */ 5 | /*user_light.h: user interface for light API, user level*/ 6 | /*user_light_adj: API for color changing and lighting effects, user level*/ 7 | 8 | 9 | /*NOTE!! : DO NOT CHANGE THIS FILE*/ 10 | 11 | /*SUPPORT UP TO 8 PWM CHANNEL*/ 12 | #define PWM_CHANNEL_NUM_MAX 8 13 | 14 | struct pwm_param { 15 | uint32 period; 16 | uint32 freq; 17 | uint32 duty[PWM_CHANNEL_NUM_MAX]; //PWM_CHANNEL<=8 18 | }; 19 | 20 | 21 | /* pwm_init should be called only once, for now */ 22 | void pwm_init(uint32 period, uint32 *duty,uint32 pwm_channel_num,uint32 (*pin_info_list)[3]); 23 | void pwm_start(void); 24 | 25 | void pwm_set_duty(uint32 duty, uint8 channel); 26 | uint32 pwm_get_duty(uint8 channel); 27 | void pwm_set_period(uint32 period); 28 | uint32 pwm_get_period(void); 29 | 30 | uint32 get_pwm_version(void); 31 | void set_pwm_debug_en(uint8 print_en); 32 | 33 | #endif 34 | 35 | -------------------------------------------------------------------------------- /include/spi_flash.h: -------------------------------------------------------------------------------- 1 | /* 2 | * copyright (c) Espressif System 2010 3 | * 4 | */ 5 | 6 | #ifndef SPI_FLASH_H 7 | #define SPI_FLASH_H 8 | 9 | typedef enum { 10 | SPI_FLASH_RESULT_OK, 11 | SPI_FLASH_RESULT_ERR, 12 | SPI_FLASH_RESULT_TIMEOUT 13 | } SpiFlashOpResult; 14 | 15 | typedef struct{ 16 | uint32 deviceId; 17 | uint32 chip_size; // chip size in byte 18 | uint32 block_size; 19 | uint32 sector_size; 20 | uint32 page_size; 21 | uint32 status_mask; 22 | } SpiFlashChip; 23 | 24 | #define SPI_FLASH_SEC_SIZE 4096 25 | 26 | uint32 spi_flash_get_id(void); 27 | SpiFlashOpResult spi_flash_erase_sector(uint16 sec); 28 | SpiFlashOpResult spi_flash_write(uint32 des_addr, uint32 *src_addr, uint32 size); 29 | SpiFlashOpResult spi_flash_read(uint32 src_addr, uint32 *des_addr, uint32 size); 30 | 31 | typedef SpiFlashOpResult (* user_spi_flash_read)( 32 | SpiFlashChip *spi, 33 | uint32 src_addr, 34 | uint32 *des_addr, 35 | uint32 size); 36 | 37 | void spi_flash_set_read_func(user_spi_flash_read read); 38 | 39 | #endif 40 | -------------------------------------------------------------------------------- /app/user/.output/eagle/debug/obj/user_main.d: -------------------------------------------------------------------------------- 1 | .output/eagle/debug/obj/user_main.o .output/eagle/debug/obj/user_main.d : user_main.c ../../include/osapi.h \ 2 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/string.h \ 3 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/_ansi.h \ 4 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/newlib.h \ 5 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/sys/config.h \ 6 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/machine/ieeefp.h \ 7 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/sys/reent.h \ 8 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/_ansi.h \ 9 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/sys/_types.h \ 10 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/sys/lock.h \ 11 | /opt/xtensa-lx106-elf/lib/gcc/xtensa-lx106-elf/4.8.2/include/stddef.h \ 12 | ../include/user_config.h ../../include/os_type.h ../../include/ets_sys.h \ 13 | ../../include/c_types.h ../../include/eagle_soc.h \ 14 | ../../include/ets_sys.h ../../include/user_interface.h \ 15 | ../../include/os_type.h ../../include/ip_addr.h ../../include/queue.h \ 16 | ../../include/spi_flash.h ../../include/driver/uart.h \ 17 | ../../include/driver/uart_register.h 18 | -------------------------------------------------------------------------------- /include/upgrade.h: -------------------------------------------------------------------------------- 1 | #ifndef __UPGRADE_H__ 2 | #define __UPGRADE_H__ 3 | 4 | #define SPI_FLASH_SEC_SIZE 4096 5 | #define LIMIT_ERASE_SIZE 0x10000 6 | 7 | #define USER_BIN1 0x00 8 | #define USER_BIN2 0x01 9 | 10 | #define UPGRADE_FLAG_IDLE 0x00 11 | #define UPGRADE_FLAG_START 0x01 12 | #define UPGRADE_FLAG_FINISH 0x02 13 | 14 | #define UPGRADE_FW_BIN1 0x00 15 | #define UPGRADE_FW_BIN2 0x01 16 | 17 | typedef void (*upgrade_states_check_callback)(void * arg); 18 | 19 | //#define UPGRADE_SSL_ENABLE 20 | 21 | struct upgrade_server_info { 22 | uint8 ip[4]; 23 | uint16 port; 24 | 25 | uint8 upgrade_flag; 26 | 27 | uint8 pre_version[16]; 28 | uint8 upgrade_version[16]; 29 | 30 | uint32 check_times; 31 | uint8 *url; 32 | 33 | upgrade_states_check_callback check_cb; 34 | struct espconn *pespconn; 35 | }; 36 | 37 | #define UPGRADE_FLAG_IDLE 0x00 38 | #define UPGRADE_FLAG_START 0x01 39 | #define UPGRADE_FLAG_FINISH 0x02 40 | 41 | void system_upgrade_init(); 42 | void system_upgrade_deinit(); 43 | bool system_upgrade(uint8 *data, uint16 len); 44 | 45 | #ifdef UPGRADE_SSL_ENABLE 46 | bool system_upgrade_start_ssl(struct upgrade_server_info *server); // not supported now 47 | #else 48 | bool system_upgrade_start(struct upgrade_server_info *server); 49 | #endif 50 | #endif 51 | -------------------------------------------------------------------------------- /include/osapi.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2010 Espressif System 3 | */ 4 | 5 | #ifndef _OSAPI_H_ 6 | #define _OSAPI_H_ 7 | 8 | #include 9 | #include "user_config.h" 10 | 11 | #define os_bzero ets_bzero 12 | #define os_delay_us ets_delay_us 13 | #define os_install_putc1 ets_install_putc1 14 | 15 | #define os_memcmp ets_memcmp 16 | #define os_memcpy ets_memcpy 17 | #define os_memmove ets_memmove 18 | #define os_memset ets_memset 19 | #define os_strcat strcat 20 | #define os_strchr strchr 21 | #define os_strcmp ets_strcmp 22 | #define os_strcpy ets_strcpy 23 | #define os_strlen ets_strlen 24 | #define os_strncmp ets_strncmp 25 | #define os_strncpy ets_strncpy 26 | #define os_strstr ets_strstr 27 | #ifdef USE_US_TIMER 28 | #define os_timer_arm_us(a, b, c) ets_timer_arm_new(a, b, c, 0) 29 | #endif 30 | #define os_timer_arm(a, b, c) ets_timer_arm_new(a, b, c, 1) 31 | #define os_timer_disarm ets_timer_disarm 32 | #define os_timer_setfn ets_timer_setfn 33 | 34 | #define os_sprintf ets_sprintf 35 | 36 | #ifdef USE_OPTIMIZE_PRINTF 37 | #define os_printf(fmt, ...) do { \ 38 | static const char flash_str[] ICACHE_RODATA_ATTR __attribute__((aligned(4))) = fmt; \ 39 | os_printf_plus(flash_str, ##__VA_ARGS__); \ 40 | } while(0) 41 | #else 42 | #define os_printf os_printf_plus 43 | #endif 44 | 45 | unsigned long os_random(void); 46 | int os_get_random(unsigned char *buf, size_t len); 47 | 48 | #endif 49 | 50 | -------------------------------------------------------------------------------- /app/user/Makefile: -------------------------------------------------------------------------------- 1 | 2 | ############################################################# 3 | # Required variables for each makefile 4 | # Discard this section from all parent makefiles 5 | # Expected variables (with automatic defaults): 6 | # CSRCS (all "C" files in the dir) 7 | # SUBDIRS (all subdirs with a Makefile) 8 | # GEN_LIBS - list of libs to be generated () 9 | # GEN_IMAGES - list of images to be generated () 10 | # COMPONENTS_xxx - a list of libs/objs in the form 11 | # subdir/lib to be extracted and rolled up into 12 | # a generated lib/image xxx.a () 13 | # 14 | ifndef PDIR 15 | GEN_LIBS = libuser.a 16 | endif 17 | 18 | 19 | ############################################################# 20 | # Configuration i.e. compile options etc. 21 | # Target specific stuff (defines etc.) goes in here! 22 | # Generally values applying to a tree are captured in the 23 | # makefile at its root level - these are then overridden 24 | # for a subtree within the makefile rooted therein 25 | # 26 | #DEFINES += 27 | 28 | ############################################################# 29 | # Recursion Magic - Don't touch this!! 30 | # 31 | # Each subtree potentially has an include directory 32 | # corresponding to the common APIs applicable to modules 33 | # rooted at that subtree. Accordingly, the INCLUDE PATH 34 | # of a module can only contain the include directories up 35 | # its parent path, and not its siblings 36 | # 37 | # Required for each makefile to inherit from the parent 38 | # 39 | 40 | INCLUDES := $(INCLUDES) -I $(PDIR)include 41 | INCLUDES += -I ./ 42 | INCLUDES += -I ../../include/ets 43 | PDIR := ../$(PDIR) 44 | sinclude $(PDIR)Makefile 45 | 46 | -------------------------------------------------------------------------------- /include/ip_addr.h: -------------------------------------------------------------------------------- 1 | #ifndef __IP_ADDR_H__ 2 | #define __IP_ADDR_H__ 3 | 4 | #include "c_types.h" 5 | 6 | struct ip_addr { 7 | uint32 addr; 8 | }; 9 | 10 | typedef struct ip_addr ip_addr_t; 11 | 12 | struct ip_info { 13 | struct ip_addr ip; 14 | struct ip_addr netmask; 15 | struct ip_addr gw; 16 | }; 17 | 18 | /** 19 | * Determine if two address are on the same network. 20 | * 21 | * @arg addr1 IP address 1 22 | * @arg addr2 IP address 2 23 | * @arg mask network identifier mask 24 | * @return !0 if the network identifiers of both address match 25 | */ 26 | #define ip_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \ 27 | (mask)->addr) == \ 28 | ((addr2)->addr & \ 29 | (mask)->addr)) 30 | 31 | /** Set an IP address given by the four byte-parts. 32 | Little-endian version that prevents the use of htonl. */ 33 | #define IP4_ADDR(ipaddr, a,b,c,d) \ 34 | (ipaddr)->addr = ((uint32)((d) & 0xff) << 24) | \ 35 | ((uint32)((c) & 0xff) << 16) | \ 36 | ((uint32)((b) & 0xff) << 8) | \ 37 | (uint32)((a) & 0xff) 38 | 39 | #define ip4_addr1(ipaddr) (((uint8*)(ipaddr))[0]) 40 | #define ip4_addr2(ipaddr) (((uint8*)(ipaddr))[1]) 41 | #define ip4_addr3(ipaddr) (((uint8*)(ipaddr))[2]) 42 | #define ip4_addr4(ipaddr) (((uint8*)(ipaddr))[3]) 43 | 44 | #define ip4_addr1_16(ipaddr) ((uint16)ip4_addr1(ipaddr)) 45 | #define ip4_addr2_16(ipaddr) ((uint16)ip4_addr2(ipaddr)) 46 | #define ip4_addr3_16(ipaddr) ((uint16)ip4_addr3(ipaddr)) 47 | #define ip4_addr4_16(ipaddr) ((uint16)ip4_addr4(ipaddr)) 48 | 49 | 50 | /** 255.255.255.255 */ 51 | #define IPADDR_NONE ((uint32)0xffffffffUL) 52 | /** 0.0.0.0 */ 53 | #define IPADDR_ANY ((uint32)0x00000000UL) 54 | uint32 ipaddr_addr(const char *cp); 55 | 56 | #define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \ 57 | ip4_addr2_16(ipaddr), \ 58 | ip4_addr3_16(ipaddr), \ 59 | ip4_addr4_16(ipaddr) 60 | 61 | #define IPSTR "%d.%d.%d.%d" 62 | 63 | #endif /* __IP_ADDR_H__ */ 64 | -------------------------------------------------------------------------------- /include/sntp.h: -------------------------------------------------------------------------------- 1 | #ifndef __SNTP_H__ 2 | #define __SNTP_H__ 3 | 4 | #include "os_type.h" 5 | #ifdef LWIP_OPEN_SRC 6 | #include "lwip/ip_addr.h" 7 | #else 8 | #include "ip_addr.h" 9 | #endif 10 | /** 11 | * get the seconds since Jan 01, 1970, 00:00 (GMT + 8) 12 | */ 13 | uint32 sntp_get_current_timestamp(); 14 | /** 15 | * get real time (GTM + 8 time zone) 16 | */ 17 | char* sntp_get_real_time(long t); 18 | /** 19 | * SNTP get time_zone default GMT + 8 20 | */ 21 | sint8 sntp_get_timezone(void); 22 | /** 23 | * SNTP set time_zone (default GMT + 8) 24 | */ 25 | bool sntp_set_timezone(sint8 timezone); 26 | /** 27 | * Initialize this module. 28 | * Send out request instantly or after SNTP_STARTUP_DELAY(_FUNC). 29 | */ 30 | void sntp_init(void); 31 | /** 32 | * Stop this module. 33 | */ 34 | void sntp_stop(void); 35 | /** 36 | * Initialize one of the NTP servers by IP address 37 | * 38 | * @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS 39 | * @param dnsserver IP address of the NTP server to set 40 | */ 41 | void sntp_setserver(unsigned char idx, ip_addr_t *addr); 42 | /** 43 | * Obtain one of the currently configured by IP address (or DHCP) NTP servers 44 | * 45 | * @param numdns the index of the NTP server 46 | * @return IP address of the indexed NTP server or "ip_addr_any" if the NTP 47 | * server has not been configured by address (or at all). 48 | */ 49 | ip_addr_t sntp_getserver(unsigned char idx); 50 | /** 51 | * Initialize one of the NTP servers by name 52 | * 53 | * @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS,now sdk support SNTP_MAX_SERVERS = 3 54 | * @param dnsserver DNS name of the NTP server to set, to be resolved at contact time 55 | */ 56 | void sntp_setservername(unsigned char idx, char *server); 57 | /** 58 | * Obtain one of the currently configured by name NTP servers. 59 | * 60 | * @param numdns the index of the NTP server 61 | * @return IP address of the indexed NTP server or NULL if the NTP 62 | * server has not been configured by name (or at all) 63 | */ 64 | char *sntp_getservername(unsigned char idx); 65 | 66 | #define sntp_servermode_dhcp(x) 67 | 68 | #endif 69 | -------------------------------------------------------------------------------- /include/driver/uart.h: -------------------------------------------------------------------------------- 1 | #ifndef UART_APP_H 2 | #define UART_APP_H 3 | 4 | #include "uart_register.h" 5 | 6 | #define RX_BUFF_SIZE 0x100 7 | #define TX_BUFF_SIZE 100 8 | 9 | typedef enum { 10 | FIVE_BITS = 0x0, 11 | SIX_BITS = 0x1, 12 | SEVEN_BITS = 0x2, 13 | EIGHT_BITS = 0x3 14 | } UartBitsNum4Char; 15 | 16 | typedef enum { 17 | ONE_STOP_BIT = 0, 18 | ONE_HALF_STOP_BIT = BIT2, 19 | TWO_STOP_BIT = BIT2 20 | } UartStopBitsNum; 21 | 22 | typedef enum { 23 | NONE_BITS = 0, 24 | ODD_BITS = 0, 25 | EVEN_BITS = BIT4 26 | } UartParityMode; 27 | 28 | typedef enum { 29 | STICK_PARITY_DIS = 0, 30 | STICK_PARITY_EN = BIT3 | BIT5 31 | } UartExistParity; 32 | 33 | typedef enum { 34 | BIT_RATE_9600 = 9600, 35 | BIT_RATE_19200 = 19200, 36 | BIT_RATE_38400 = 38400, 37 | BIT_RATE_57600 = 57600, 38 | BIT_RATE_74880 = 74880, 39 | BIT_RATE_115200 = 115200, 40 | BIT_RATE_230400 = 230400, 41 | BIT_RATE_460800 = 460800, 42 | BIT_RATE_921600 = 921600 43 | } UartBautRate; 44 | 45 | typedef enum { 46 | NONE_CTRL, 47 | HARDWARE_CTRL, 48 | XON_XOFF_CTRL 49 | } UartFlowCtrl; 50 | 51 | typedef enum { 52 | EMPTY, 53 | UNDER_WRITE, 54 | WRITE_OVER 55 | } RcvMsgBuffState; 56 | 57 | typedef struct { 58 | uint32 RcvBuffSize; 59 | uint8 *pRcvMsgBuff; 60 | uint8 *pWritePos; 61 | uint8 *pReadPos; 62 | uint8 TrigLvl; //JLU: may need to pad 63 | RcvMsgBuffState BuffState; 64 | } RcvMsgBuff; 65 | 66 | typedef struct { 67 | uint32 TrxBuffSize; 68 | uint8 *pTrxBuff; 69 | } TrxMsgBuff; 70 | 71 | typedef enum { 72 | BAUD_RATE_DET, 73 | WAIT_SYNC_FRM, 74 | SRCH_MSG_HEAD, 75 | RCV_MSG_BODY, 76 | RCV_ESC_CHAR, 77 | } RcvMsgState; 78 | 79 | typedef struct { 80 | UartBautRate baut_rate; 81 | UartBitsNum4Char data_bits; 82 | UartExistParity exist_parity; 83 | UartParityMode parity; // chip size in byte 84 | UartStopBitsNum stop_bits; 85 | UartFlowCtrl flow_ctrl; 86 | RcvMsgBuff rcv_buff; 87 | TrxMsgBuff trx_buff; 88 | RcvMsgState rcv_state; 89 | int received; 90 | int buff_uart_no; //indicate which uart use tx/rx buffer 91 | } UartDevice; 92 | 93 | void uart_init(UartBautRate uart0_br, UartBautRate uart1_br); 94 | 95 | #endif 96 | 97 | -------------------------------------------------------------------------------- /include/ets_sys.h: -------------------------------------------------------------------------------- 1 | /* 2 | * copyright (c) 2008 - 2011 Espressif System 3 | * 4 | * Define user specified Event signals and Task priorities here 5 | * 6 | */ 7 | 8 | #ifndef _ETS_SYS_H 9 | #define _ETS_SYS_H 10 | 11 | #include "c_types.h" 12 | #include "eagle_soc.h" 13 | 14 | typedef uint32_t ETSSignal; 15 | typedef uint32_t ETSParam; 16 | 17 | typedef struct ETSEventTag ETSEvent; 18 | 19 | struct ETSEventTag { 20 | ETSSignal sig; 21 | ETSParam par; 22 | }; 23 | 24 | typedef void (*ETSTask)(ETSEvent *e); 25 | 26 | /* timer related */ 27 | typedef uint32_t ETSHandle; 28 | typedef void ETSTimerFunc(void *timer_arg); 29 | 30 | typedef struct _ETSTIMER_ { 31 | struct _ETSTIMER_ *timer_next; 32 | uint32_t timer_expire; 33 | uint32_t timer_period; 34 | ETSTimerFunc *timer_func; 35 | void *timer_arg; 36 | } ETSTimer; 37 | 38 | /* interrupt related */ 39 | #define ETS_SPI_INUM 2 40 | #define ETS_GPIO_INUM 4 41 | #define ETS_UART_INUM 5 42 | #define ETS_UART1_INUM 5 43 | #define ETS_FRC_TIMER1_INUM 9 /* use edge*/ 44 | 45 | #define ETS_INTR_LOCK() \ 46 | ets_intr_lock() 47 | 48 | #define ETS_INTR_UNLOCK() \ 49 | ets_intr_unlock() 50 | 51 | #define ETS_FRC_TIMER1_INTR_ATTACH(func, arg) \ 52 | ets_isr_attach(ETS_FRC_TIMER1_INUM, (func), (void *)(arg)) 53 | 54 | #define ETS_FRC_TIMER1_NMI_INTR_ATTACH(func) \ 55 | NmiTimSetFunc(func) 56 | 57 | #define ETS_GPIO_INTR_ATTACH(func, arg) \ 58 | ets_isr_attach(ETS_GPIO_INUM, (func), (void *)(arg)) 59 | 60 | #define ETS_UART_INTR_ATTACH(func, arg) \ 61 | ets_isr_attach(ETS_UART_INUM, (func), (void *)(arg)) 62 | 63 | #define ETS_SPI_INTR_ATTACH(func, arg) \ 64 | ets_isr_attach(ETS_SPI_INUM, (func), (void *)(arg)) 65 | 66 | #define ETS_INTR_ENABLE(inum) \ 67 | ets_isr_unmask((1< 37 | * Joakim Eriksson 38 | */ 39 | 40 | #ifndef __JSON_H__ 41 | #define __JSON_H__ 42 | 43 | #define JSON_TYPE_ARRAY '[' 44 | #define JSON_TYPE_OBJECT '{' 45 | #define JSON_TYPE_PAIR ':' 46 | #define JSON_TYPE_PAIR_NAME 'N' /* for N:V pairs */ 47 | #define JSON_TYPE_STRING '"' 48 | #define JSON_TYPE_INT 'I' 49 | #define JSON_TYPE_NUMBER '0' 50 | #define JSON_TYPE_ERROR 0 51 | 52 | /* how should we handle null vs false - both can be 0? */ 53 | #define JSON_TYPE_NULL 'n' 54 | #define JSON_TYPE_TRUE 't' 55 | #define JSON_TYPE_FALSE 'f' 56 | 57 | #define JSON_TYPE_CALLBACK 'C' 58 | 59 | enum { 60 | JSON_ERROR_OK, 61 | JSON_ERROR_SYNTAX, 62 | JSON_ERROR_UNEXPECTED_ARRAY, 63 | JSON_ERROR_UNEXPECTED_END_OF_ARRAY, 64 | JSON_ERROR_UNEXPECTED_OBJECT, 65 | JSON_ERROR_UNEXPECTED_STRING 66 | }; 67 | 68 | #define JSON_CONTENT_TYPE "application/json" 69 | 70 | #endif /* __JSON_H__ */ 71 | -------------------------------------------------------------------------------- /include/gpio.h: -------------------------------------------------------------------------------- 1 | /* 2 | * copyright (c) Espressif System 2010 3 | * 4 | */ 5 | 6 | #ifndef _GPIO_H_ 7 | #define _GPIO_H_ 8 | 9 | #define GPIO_PIN_ADDR(i) (GPIO_PIN0_ADDRESS + i*4) 10 | 11 | #define GPIO_ID_IS_PIN_REGISTER(reg_id) \ 12 | ((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1))) 13 | 14 | #define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0) 15 | 16 | typedef enum { 17 | GPIO_PIN_INTR_DISABLE = 0, 18 | GPIO_PIN_INTR_POSEDGE = 1, 19 | GPIO_PIN_INTR_NEGEDGE = 2, 20 | GPIO_PIN_INTR_ANYEDGE = 3, 21 | GPIO_PIN_INTR_LOLEVEL = 4, 22 | GPIO_PIN_INTR_HILEVEL = 5 23 | } GPIO_INT_TYPE; 24 | 25 | #define GPIO_OUTPUT_SET(gpio_no, bit_value) \ 26 | gpio_output_set((bit_value)<>gpio_no)&BIT0) 29 | 30 | /* GPIO interrupt handler, registered through gpio_intr_handler_register */ 31 | typedef void (* gpio_intr_handler_fn_t)(uint32 intr_mask, void *arg); 32 | 33 | 34 | /* 35 | * Initialize GPIO. This includes reading the GPIO Configuration DataSet 36 | * to initialize "output enables" and pin configurations for each gpio pin. 37 | * Must be called once during startup. 38 | */ 39 | void gpio_init(void); 40 | 41 | /* 42 | * Change GPIO pin output by setting, clearing, or disabling pins. 43 | * In general, it is expected that a bit will be set in at most one 44 | * of these masks. If a bit is clear in all masks, the output state 45 | * remains unchanged. 46 | * 47 | * There is no particular ordering guaranteed; so if the order of 48 | * writes is significant, calling code should divide a single call 49 | * into multiple calls. 50 | */ 51 | void gpio_output_set(uint32 set_mask, 52 | uint32 clear_mask, 53 | uint32 enable_mask, 54 | uint32 disable_mask); 55 | 56 | /* 57 | * Sample the value of GPIO input pins and returns a bitmask. 58 | */ 59 | uint32 gpio_input_get(void); 60 | 61 | /* 62 | * Set the specified GPIO register to the specified value. 63 | * This is a very general and powerful interface that is not 64 | * expected to be used during normal operation. It is intended 65 | * mainly for debug, or for unusual requirements. 66 | */ 67 | void gpio_register_set(uint32 reg_id, uint32 value); 68 | 69 | /* Get the current value of the specified GPIO register. */ 70 | uint32 gpio_register_get(uint32 reg_id); 71 | 72 | /* 73 | * Register an application-specific interrupt handler for GPIO pin 74 | * interrupts. Once the interrupt handler is called, it will not 75 | * be called again until after a call to gpio_intr_ack. Any GPIO 76 | * interrupts that occur during the interim are masked. 77 | * 78 | * The application-specific handler is called with a mask of 79 | * pending GPIO interrupts. After processing pin interrupts, the 80 | * application-specific handler may wish to use gpio_intr_pending 81 | * to check for any additional pending interrupts before it returns. 82 | */ 83 | void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg); 84 | 85 | /* Determine which GPIO interrupts are pending. */ 86 | uint32 gpio_intr_pending(void); 87 | 88 | /* 89 | * Acknowledge GPIO interrupts. 90 | * Intended to be called from the gpio_intr_handler_fn. 91 | */ 92 | void gpio_intr_ack(uint32 ack_mask); 93 | 94 | void gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state); 95 | 96 | void gpio_pin_wakeup_disable(); 97 | 98 | void gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state); 99 | 100 | #endif // _GPIO_H_ 101 | -------------------------------------------------------------------------------- /app/Makefile: -------------------------------------------------------------------------------- 1 | ############################################################# 2 | # Required variables for each makefile 3 | # Discard this section from all parent makefiles 4 | # Expected variables (with automatic defaults): 5 | # CSRCS (all "C" files in the dir) 6 | # SUBDIRS (all subdirs with a Makefile) 7 | # GEN_LIBS - list of libs to be generated () 8 | # GEN_IMAGES - list of object file images to be generated () 9 | # GEN_BINS - list of binaries to be generated () 10 | # COMPONENTS_xxx - a list of libs/objs in the form 11 | # subdir/lib to be extracted and rolled up into 12 | # a generated lib/image xxx.a () 13 | # 14 | TARGET = eagle 15 | #FLAVOR = release 16 | FLAVOR = debug 17 | 18 | #EXTRA_CCFLAGS += -u 19 | 20 | ifndef PDIR # { 21 | GEN_IMAGES= eagle.app.v6.out 22 | GEN_BINS= eagle.app.v6.bin 23 | SPECIAL_MKTARGETS=$(APP_MKTARGETS) 24 | SUBDIRS= \ 25 | user 26 | ifdef AT_OPEN_SRC 27 | SUBDIRS += \ 28 | at 29 | endif 30 | endif # } PDIR 31 | 32 | APPDIR = . 33 | LDDIR = ../ld 34 | 35 | CCFLAGS += -Os 36 | 37 | TARGET_LDFLAGS = \ 38 | -nostdlib \ 39 | -Wl,-EL \ 40 | --longcalls \ 41 | --text-section-literals 42 | 43 | ifeq ($(FLAVOR),debug) 44 | TARGET_LDFLAGS += -g -O2 45 | endif 46 | 47 | ifeq ($(FLAVOR),release) 48 | TARGET_LDFLAGS += -g -O0 49 | endif 50 | 51 | COMPONENTS_eagle.app.v6 = \ 52 | user/libuser.a 53 | 54 | ifdef AT_OPEN_SRC 55 | COMPONENTS_eagle.app.v6 += \ 56 | at/libat.a 57 | endif 58 | 59 | LINKFLAGS_eagle.app.v6 = \ 60 | -L../lib \ 61 | -nostdlib \ 62 | -T$(LD_FILE) \ 63 | -Wl,--no-check-sections \ 64 | -u call_user_start \ 65 | -Wl,-static \ 66 | -Wl,--start-group \ 67 | -lc \ 68 | -lgcc \ 69 | -lhal \ 70 | -lphy \ 71 | -lpp \ 72 | -lnet80211 \ 73 | -llwip \ 74 | -lwpa \ 75 | -lmain \ 76 | -ljson \ 77 | -lupgrade \ 78 | -lsmartconfig \ 79 | $(DEP_LIBS_eagle.app.v6) 80 | 81 | ifndef AT_OPEN_SRC 82 | LINKFLAGS_eagle.app.v6 += \ 83 | -lat 84 | endif 85 | 86 | LINKFLAGS_eagle.app.v6 += \ 87 | -Wl,--end-group 88 | DEPENDS_eagle.app.v6 = \ 89 | $(LD_FILE) \ 90 | $(LDDIR)/eagle.rom.addr.v6.ld 91 | 92 | ############################################################# 93 | # Configuration i.e. compile options etc. 94 | # Target specific stuff (defines etc.) goes in here! 95 | # Generally values applying to a tree are captured in the 96 | # makefile at its root level - these are then overridden 97 | # for a subtree within the makefile rooted therein 98 | # 99 | 100 | #UNIVERSAL_TARGET_DEFINES = \ 101 | 102 | # Other potential configuration flags include: 103 | # -DTXRX_TXBUF_DEBUG 104 | # -DTXRX_RXBUF_DEBUG 105 | # -DWLAN_CONFIG_CCX 106 | CONFIGURATION_DEFINES = -DICACHE_FLASH 107 | ifdef AT_OPEN_SRC 108 | CONFIGURATION_DEFINES += \ 109 | -DAT_OPEN_SRC 110 | endif 111 | DEFINES += \ 112 | $(UNIVERSAL_TARGET_DEFINES) \ 113 | $(CONFIGURATION_DEFINES) 114 | 115 | DDEFINES += \ 116 | $(UNIVERSAL_TARGET_DEFINES) \ 117 | $(CONFIGURATION_DEFINES) 118 | 119 | 120 | ############################################################# 121 | # Recursion Magic - Don't touch this!! 122 | # 123 | # Each subtree potentially has an include directory 124 | # corresponding to the common APIs applicable to modules 125 | # rooted at that subtree. Accordingly, the INCLUDE PATH 126 | # of a module can only contain the include directories up 127 | # its parent path, and not its siblings 128 | # 129 | # Required for each makefile to inherit from the parent 130 | # 131 | 132 | INCLUDES := $(INCLUDES) -I $(PDIR)include 133 | PDIR := ../$(PDIR) 134 | sinclude $(PDIR)Makefile 135 | 136 | .PHONY: FORCE 137 | FORCE: 138 | 139 | -------------------------------------------------------------------------------- /app/gen_misc.bat: -------------------------------------------------------------------------------- 1 | @echo off 2 | 3 | echo gen_misc.bat version 20150511 4 | echo . 5 | 6 | echo Please follow below steps(1-5) to generate specific bin(s): 7 | echo STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none) 8 | set input=default 9 | set /p input=enter(0/1/2, default 2): 10 | 11 | if %input% equ 0 ( 12 | set boot=old 13 | ) else ( 14 | if %input% equ 1 ( 15 | set boot=new 16 | ) else ( 17 | set boot=none 18 | ) 19 | ) 20 | 21 | echo boot mode: %boot% 22 | echo. 23 | 24 | echo STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin) 25 | set input=default 26 | set /p input=enter (0/1/2, default 0): 27 | 28 | if %input% equ 1 ( 29 | if %boot% equ none ( 30 | set app=0 31 | echo choose no boot before 32 | echo generate bin: eagle.flash.bin+eagle.irom0text.bin 33 | ) else ( 34 | set app=1 35 | echo generate bin: user1.bin 36 | ) 37 | ) else ( 38 | if %input% equ 2 ( 39 | if %boot% equ none ( 40 | set app=0 41 | echo choose no boot before 42 | echo generate bin: eagle.flash.bin+eagle.irom0text.bin 43 | ) else ( 44 | set app=2 45 | echo generate bin: user2.bin 46 | ) 47 | ) else ( 48 | if %boot% neq none ( 49 | set boot=none 50 | echo ignore boot 51 | ) 52 | set app=0 53 | echo generate bin: eagle.flash.bin+eagle.irom0text.bin 54 | )) 55 | 56 | echo. 57 | 58 | echo STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz) 59 | set input=default 60 | set /p input=enter (0/1/2/3, default 2): 61 | 62 | if %input% equ 0 ( 63 | set spi_speed=20 64 | ) else ( 65 | if %input% equ 1 ( 66 | set spi_speed=26.7 67 | ) else ( 68 | if %input% equ 3 ( 69 | set spi_speed=80 70 | ) else ( 71 | set spi_speed=40 72 | ))) 73 | 74 | echo spi speed: %spi_speed% MHz 75 | echo. 76 | 77 | echo STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT) 78 | set input=default 79 | set /p input=enter (0/1/2/3, default 0): 80 | 81 | if %input% equ 1 ( 82 | set spi_mode=QOUT 83 | ) else ( 84 | if %input% equ 2 ( 85 | set spi_mode=DIO 86 | ) else ( 87 | if %input% equ 3 ( 88 | set spi_mode=DOUT 89 | ) else ( 90 | set spi_mode=QIO 91 | ))) 92 | 93 | echo spi mode: %spi_mode% 94 | echo. 95 | 96 | echo STEP 5: choose flash size and map 97 | echo 0= 512KB( 256KB+ 256KB) 98 | echo 2=1024KB( 512KB+ 512KB) 99 | echo 3=2048KB( 512KB+ 512KB) 100 | echo 4=4096KB( 512KB+ 512KB) 101 | echo 5=2048KB(1024KB+1024KB) 102 | echo 6=4096KB(1024KB+1024KB) 103 | set input=default 104 | set /p input=enter (0/1/2/3/4/5/6, default 0): 105 | 106 | if %input% equ 2 ( 107 | set spi_size_map=2 108 | echo spi size: 1024KB 109 | echo spi ota map: 512KB + 512KB 110 | ) else ( 111 | if %input% equ 3 ( 112 | set spi_size_map=3 113 | echo spi size: 2048KB 114 | echo spi ota map: 512KB + 512KB 115 | ) else ( 116 | if %input% equ 4 ( 117 | set spi_size_map=4 118 | echo spi size: 4096KB 119 | echo spi ota map: 512KB + 512KB 120 | ) else ( 121 | if %input% equ 5 ( 122 | set spi_size_map=5 123 | echo spi size: 2048KB 124 | echo spi ota map: 1024KB + 1024KB 125 | ) else ( 126 | if %input% equ 6 ( 127 | set spi_size_map=6 128 | echo spi size: 4096KB 129 | echo spi ota map: 1024KB + 1024KB 130 | ) else ( 131 | set spi_size_map=0 132 | echo spi size: 512KB 133 | echo spi ota map: 256KB + 256KB 134 | ) 135 | ) 136 | ) 137 | ) 138 | ) 139 | 140 | touch user/user_main.c 141 | 142 | echo. 143 | echo start... 144 | echo. 145 | 146 | make BOOT=%boot% APP=%app% SPI_SPEED=%spi_speed% SPI_MODE=%spi_mode% SPI_SIZE=%spi_size_map% 147 | 148 | -------------------------------------------------------------------------------- /include/json/jsonparse.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2011-2012, Swedish Institute of Computer Science. 3 | * All rights reserved. 4 | * 5 | * Redistribution and use in source and binary forms, with or without 6 | * modification, are permitted provided that the following conditions 7 | * are met: 8 | * 1. Redistributions of source code must retain the above copyright 9 | * notice, this list of conditions and the following disclaimer. 10 | * 2. Redistributions in binary form must reproduce the above copyright 11 | * notice, this list of conditions and the following disclaimer in the 12 | * documentation and/or other materials provided with the distribution. 13 | * 3. Neither the name of the Institute nor the names of its contributors 14 | * may be used to endorse or promote products derived from this software 15 | * without specific prior written permission. 16 | * 17 | * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND 18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE 21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 | * SUCH DAMAGE. 28 | * 29 | * This file is part of the Contiki operating system. 30 | */ 31 | 32 | #ifndef __JSONPARSE_H__ 33 | #define __JSONPARSE_H__ 34 | 35 | #include "c_types.h" 36 | #include "json/json.h" 37 | 38 | #ifdef JSONPARSE_CONF_MAX_DEPTH 39 | #define JSONPARSE_MAX_DEPTH JSONPARSE_CONF_MAX_DEPTH 40 | #else 41 | #define JSONPARSE_MAX_DEPTH 10 42 | #endif 43 | 44 | struct jsonparse_state { 45 | const char *json; 46 | int pos; 47 | int len; 48 | int depth; 49 | /* for handling atomic values */ 50 | int vstart; 51 | int vlen; 52 | char vtype; 53 | char error; 54 | char stack[JSONPARSE_MAX_DEPTH]; 55 | }; 56 | 57 | /** 58 | * \brief Initialize a JSON parser state. 59 | * \param state A pointer to a JSON parser state 60 | * \param json The string to parse as JSON 61 | * \param len The length of the string to parse 62 | * 63 | * This function initializes a JSON parser state for 64 | * parsing a string as JSON. 65 | */ 66 | void jsonparse_setup(struct jsonparse_state *state, const char *json, 67 | int len); 68 | 69 | /* move to next JSON element */ 70 | int jsonparse_next(struct jsonparse_state *state); 71 | 72 | /* copy the current JSON value into the specified buffer */ 73 | int jsonparse_copy_value(struct jsonparse_state *state, char *buf, 74 | int buf_size); 75 | 76 | /* get the current JSON value parsed as an int */ 77 | int jsonparse_get_value_as_int(struct jsonparse_state *state); 78 | 79 | /* get the current JSON value parsed as a long */ 80 | long jsonparse_get_value_as_long(struct jsonparse_state *state); 81 | 82 | /* get the current JSON value parsed as a unsigned long */ 83 | unsigned long jsonparse_get_value_as_ulong(struct jsonparse_state *state); 84 | 85 | /* get the length of the current JSON value */ 86 | int jsonparse_get_len(struct jsonparse_state *state); 87 | 88 | /* get the type of the current JSON value */ 89 | int jsonparse_get_type(struct jsonparse_state *state); 90 | 91 | /* compare the JSON value with the specified string */ 92 | int jsonparse_strcmp_value(struct jsonparse_state *state, const char *str); 93 | 94 | #endif /* __JSONPARSE_H__ */ 95 | -------------------------------------------------------------------------------- /app/gen_misc.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | echo "gen_misc.sh version 20150511" 4 | echo "" 5 | 6 | echo "Please follow below steps(1-5) to generate specific bin(s):" 7 | echo "STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none)" 8 | echo "enter(0/1/2, default 2):" 9 | read input 10 | 11 | if [ -z "$input" ]; then 12 | boot=none 13 | elif [ $input == 0 ]; then 14 | boot=old 15 | elif [ $input == 1 ]; then 16 | boot=new 17 | else 18 | boot=none 19 | fi 20 | 21 | echo "boot mode: $boot" 22 | echo "" 23 | 24 | echo "STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin)" 25 | echo "enter (0/1/2, default 0):" 26 | read input 27 | 28 | if [ -z "$input" ]; then 29 | if [ $boot != none ]; then 30 | boot=none 31 | echo "ignore boot" 32 | fi 33 | app=0 34 | echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" 35 | elif [ $input == 1 ]; then 36 | if [ $boot == none ]; then 37 | app=0 38 | echo "choose no boot before" 39 | echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" 40 | else 41 | app=1 42 | echo "generate bin: user1.bin" 43 | fi 44 | elif [ $input == 2 ]; then 45 | if [ $boot == none ]; then 46 | app=0 47 | echo "choose no boot before" 48 | echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" 49 | else 50 | app=2 51 | echo "generate bin: user2.bin" 52 | fi 53 | else 54 | if [ $boot != none ]; then 55 | boot=none 56 | echo "ignore boot" 57 | fi 58 | app=0 59 | echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" 60 | fi 61 | 62 | echo "" 63 | 64 | echo "STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz)" 65 | echo "enter (0/1/2/3, default 2):" 66 | read input 67 | 68 | if [ -z "$input" ]; then 69 | spi_speed=40 70 | elif [ $input == 0 ]; then 71 | spi_speed=20 72 | elif [ $input == 1 ]; then 73 | spi_speed=26.7 74 | elif [ $input == 3 ]; then 75 | spi_speed=80 76 | else 77 | spi_speed=40 78 | fi 79 | 80 | echo "spi speed: $spi_speed MHz" 81 | echo "" 82 | 83 | echo "STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT)" 84 | echo "enter (0/1/2/3, default 0):" 85 | read input 86 | 87 | if [ -z "$input" ]; then 88 | spi_mode=QIO 89 | elif [ $input == 1 ]; then 90 | spi_mode=QOUT 91 | elif [ $input == 2 ]; then 92 | spi_mode=DIO 93 | elif [ $input == 3 ]; then 94 | spi_mode=DOUT 95 | else 96 | spi_mode=QIO 97 | fi 98 | 99 | echo "spi mode: $spi_mode" 100 | echo "" 101 | 102 | echo "STEP 5: choose spi size and map" 103 | echo " 0= 512KB( 256KB+ 256KB)" 104 | echo " 2=1024KB( 512KB+ 512KB)" 105 | echo " 3=2048KB( 512KB+ 512KB)" 106 | echo " 4=4096KB( 512KB+ 512KB)" 107 | echo " 5=2048KB(1024KB+1024KB)" 108 | echo " 6=4096KB(1024KB+1024KB)" 109 | echo "enter (0/2/3/4/5/6, default 0):" 110 | read input 111 | 112 | if [ -z "$input" ]; then 113 | spi_size_map=0 114 | echo "spi size: 512KB" 115 | echo "spi ota map: 256KB + 256KB" 116 | elif [ $input == 2 ]; then 117 | spi_size_map=2 118 | echo "spi size: 1024KB" 119 | echo "spi ota map: 512KB + 512KB" 120 | elif [ $input == 3 ]; then 121 | spi_size_map=3 122 | echo "spi size: 2048KB" 123 | echo "spi ota map: 512KB + 512KB" 124 | elif [ $input == 4 ]; then 125 | spi_size_map=4 126 | echo "spi size: 4096KB" 127 | echo "spi ota map: 512KB + 512KB" 128 | elif [ $input == 5 ]; then 129 | spi_size_map=5 130 | echo "spi size: 2048KB" 131 | echo "spi ota map: 1024KB + 1024KB" 132 | elif [ $input == 6 ]; then 133 | spi_size_map=6 134 | echo "spi size: 4096KB" 135 | echo "spi ota map: 1024KB + 1024KB" 136 | else 137 | spi_size_map=0 138 | echo "spi size: 512KB" 139 | echo "spi ota map: 256KB + 256KB" 140 | fi 141 | 142 | echo "" 143 | 144 | touch user/user_main.c 145 | 146 | echo "" 147 | echo "start..." 148 | echo "" 149 | 150 | make COMPILE=gcc BOOT=$boot APP=$app SPI_SPEED=$spi_speed SPI_MODE=$spi_mode SPI_SIZE_MAP=$spi_size_map 151 | -------------------------------------------------------------------------------- /include/at_custom.h: -------------------------------------------------------------------------------- 1 | 2 | /* 3 | * custom_at.h 4 | * 5 | * This file is part of Espressif's AT+ command set program. 6 | * Copyright (C) 2013 - 2016, Espressif Systems 7 | * 8 | * This program is free software: you can redistribute it and/or modify 9 | * it under the terms of version 3 of the GNU General Public License as 10 | * published by the Free Software Foundation. 11 | * 12 | * This program is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU General Public License along 18 | * with this program. If not, see . 19 | */ 20 | 21 | #ifndef CUSTOM_AT_H_ 22 | #define CUSTOM_AT_H_ 23 | 24 | #include "c_types.h" 25 | 26 | typedef struct 27 | { 28 | char *at_cmdName; 29 | int8_t at_cmdLen; 30 | void (*at_testCmd)(uint8_t id); 31 | void (*at_queryCmd)(uint8_t id); 32 | void (*at_setupCmd)(uint8_t id, char *pPara); 33 | void (*at_exeCmd)(uint8_t id); 34 | }at_funcationType; 35 | 36 | typedef void (*at_custom_uart_rx_intr)(uint8* data,int32 len); 37 | 38 | typedef void (*at_custom_response_func_type)(const char *str); 39 | 40 | extern uint8 at_customLinkMax; 41 | 42 | /** 43 | * @brief Response "OK" to uart. 44 | * @param None 45 | * @retval None 46 | */ 47 | void at_response_ok(void); 48 | /** 49 | * @brief Response "ERROR" to uart. 50 | * @param None 51 | * @retval None 52 | */ 53 | void at_response_error(void); 54 | /** 55 | * @brief Response string. 56 | * It is equivalent to at_port_print,if not call at_register_response_func or call at_register_response_func(NULL); 57 | * It will run custom response function,if call at_register_response_func and parameter is not NULL. 58 | * @param string 59 | * @retval None 60 | */ 61 | void at_response(const char *str); 62 | /** 63 | * @brief register custom response function. 64 | * @param response_func: the function that will run when call at_response 65 | * @retval None 66 | */ 67 | void at_register_response_func(at_custom_response_func_type response_func); 68 | /** 69 | * @brief Task of process command or txdata. 70 | * @param custom_at_cmd_array: the array of at cmd that custom defined 71 | * cmd_num : the num of at cmd that custom defined 72 | * @retval None 73 | */ 74 | void at_cmd_array_regist(at_funcationType *custom_at_cmd_array,uint32 cmd_num); 75 | /** 76 | * @brief get digit form at cmd line.the maybe alter pSrc 77 | * @param p_src: at cmd line string 78 | * result:the buffer to be placed result 79 | * err : err num 80 | * @retval TRUE: 81 | * FALSE: 82 | */ 83 | bool at_get_next_int_dec(char **p_src,int*result,int* err); 84 | /** 85 | * @brief get string form at cmd line.the maybe alter pSrc 86 | * @param p_dest: the buffer to be placed result 87 | * p_src: at cmd line string 88 | * max_len :max len of string excepted to get 89 | * @retval None 90 | */ 91 | int32 at_data_str_copy(char *p_dest, char **p_src, int32 max_len); 92 | 93 | /** 94 | * @brief initialize at module 95 | * @param None 96 | * @retval None 97 | */ 98 | void at_init(void); 99 | /** 100 | * @brief print string to at port 101 | * @param string 102 | * @retval None 103 | */ 104 | void at_port_print(const char *str); 105 | /** 106 | * @brief print custom information when AT+GMR 107 | * @param string 108 | * @retval None 109 | */ 110 | void at_set_custom_info(char* info); 111 | /** 112 | * @brief if current at command is processing,you can call at_enter_special_state, 113 | * then if other comamnd coming,it will return busy. 114 | * @param None 115 | * @retval None 116 | */ 117 | void at_enter_special_state(void); 118 | /** 119 | * @brief 120 | * @param None 121 | * @retval None 122 | */ 123 | void at_leave_special_state(void); 124 | /** 125 | * @brief get at version 126 | * @param None 127 | * @retval at version 128 | * bit24~31: at main version 129 | * bit23~16: at sub version 130 | * bit15~8 : at test version 131 | * bit7~0 : customized version 132 | */ 133 | uint32 at_get_version(void); 134 | 135 | /** 136 | * @brief register custom uart rx interrupt function 137 | * @param rx_func: custom uart rx interrupt function. 138 | * If rx_func is non-void,when rx interrupt comming,it will call rx_func(data,len), 139 | * data is the buffer of data,len is the length of data.Otherwise,it will run AT rx function. 140 | * @retval None 141 | */ 142 | void at_register_uart_rx_intr(at_custom_uart_rx_intr rx_func); 143 | #endif 144 | -------------------------------------------------------------------------------- /include/driver/uart_register.h: -------------------------------------------------------------------------------- 1 | //Generated at 2012-07-03 18:44:06 2 | /* 3 | * Copyright (c) 2010 - 2011 Espressif System 4 | * 5 | */ 6 | 7 | #ifndef UART_REGISTER_H_INCLUDED 8 | #define UART_REGISTER_H_INCLUDED 9 | #define REG_UART_BASE( i ) (0x60000000+(i)*0xf00) 10 | //version value:32'h062000 11 | 12 | #define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0) 13 | #define UART_RXFIFO_RD_BYTE 0x000000FF 14 | #define UART_RXFIFO_RD_BYTE_S 0 15 | 16 | #define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4) 17 | #define UART_RXFIFO_TOUT_INT_RAW (BIT(8)) 18 | #define UART_BRK_DET_INT_RAW (BIT(7)) 19 | #define UART_CTS_CHG_INT_RAW (BIT(6)) 20 | #define UART_DSR_CHG_INT_RAW (BIT(5)) 21 | #define UART_RXFIFO_OVF_INT_RAW (BIT(4)) 22 | #define UART_FRM_ERR_INT_RAW (BIT(3)) 23 | #define UART_PARITY_ERR_INT_RAW (BIT(2)) 24 | #define UART_TXFIFO_EMPTY_INT_RAW (BIT(1)) 25 | #define UART_RXFIFO_FULL_INT_RAW (BIT(0)) 26 | 27 | #define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8) 28 | #define UART_RXFIFO_TOUT_INT_ST (BIT(8)) 29 | #define UART_BRK_DET_INT_ST (BIT(7)) 30 | #define UART_CTS_CHG_INT_ST (BIT(6)) 31 | #define UART_DSR_CHG_INT_ST (BIT(5)) 32 | #define UART_RXFIFO_OVF_INT_ST (BIT(4)) 33 | #define UART_FRM_ERR_INT_ST (BIT(3)) 34 | #define UART_PARITY_ERR_INT_ST (BIT(2)) 35 | #define UART_TXFIFO_EMPTY_INT_ST (BIT(1)) 36 | #define UART_RXFIFO_FULL_INT_ST (BIT(0)) 37 | 38 | #define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC) 39 | #define UART_RXFIFO_TOUT_INT_ENA (BIT(8)) 40 | #define UART_BRK_DET_INT_ENA (BIT(7)) 41 | #define UART_CTS_CHG_INT_ENA (BIT(6)) 42 | #define UART_DSR_CHG_INT_ENA (BIT(5)) 43 | #define UART_RXFIFO_OVF_INT_ENA (BIT(4)) 44 | #define UART_FRM_ERR_INT_ENA (BIT(3)) 45 | #define UART_PARITY_ERR_INT_ENA (BIT(2)) 46 | #define UART_TXFIFO_EMPTY_INT_ENA (BIT(1)) 47 | #define UART_RXFIFO_FULL_INT_ENA (BIT(0)) 48 | 49 | #define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10) 50 | #define UART_RXFIFO_TOUT_INT_CLR (BIT(8)) 51 | #define UART_BRK_DET_INT_CLR (BIT(7)) 52 | #define UART_CTS_CHG_INT_CLR (BIT(6)) 53 | #define UART_DSR_CHG_INT_CLR (BIT(5)) 54 | #define UART_RXFIFO_OVF_INT_CLR (BIT(4)) 55 | #define UART_FRM_ERR_INT_CLR (BIT(3)) 56 | #define UART_PARITY_ERR_INT_CLR (BIT(2)) 57 | #define UART_TXFIFO_EMPTY_INT_CLR (BIT(1)) 58 | #define UART_RXFIFO_FULL_INT_CLR (BIT(0)) 59 | 60 | #define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14) 61 | #define UART_CLKDIV_CNT 0x000FFFFF 62 | #define UART_CLKDIV_S 0 63 | 64 | #define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18) 65 | #define UART_GLITCH_FILT 0x000000FF 66 | #define UART_GLITCH_FILT_S 8 67 | #define UART_AUTOBAUD_EN (BIT(0)) 68 | 69 | #define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C) 70 | #define UART_TXD (BIT(31)) 71 | #define UART_RTSN (BIT(30)) 72 | #define UART_DTRN (BIT(29)) 73 | #define UART_TXFIFO_CNT 0x000000FF 74 | #define UART_TXFIFO_CNT_S 16 75 | #define UART_RXD (BIT(15)) 76 | #define UART_CTSN (BIT(14)) 77 | #define UART_DSRN (BIT(13)) 78 | #define UART_RXFIFO_CNT 0x000000FF 79 | #define UART_RXFIFO_CNT_S 0 80 | 81 | #define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20) 82 | #define UART_TXFIFO_RST (BIT(18)) 83 | #define UART_RXFIFO_RST (BIT(17)) 84 | #define UART_IRDA_EN (BIT(16)) 85 | #define UART_TX_FLOW_EN (BIT(15)) 86 | #define UART_LOOPBACK (BIT(14)) 87 | #define UART_IRDA_RX_INV (BIT(13)) 88 | #define UART_IRDA_TX_INV (BIT(12)) 89 | #define UART_IRDA_WCTL (BIT(11)) 90 | #define UART_IRDA_TX_EN (BIT(10)) 91 | #define UART_IRDA_DPLX (BIT(9)) 92 | #define UART_TXD_BRK (BIT(8)) 93 | #define UART_SW_DTR (BIT(7)) 94 | #define UART_SW_RTS (BIT(6)) 95 | #define UART_STOP_BIT_NUM 0x00000003 96 | #define UART_STOP_BIT_NUM_S 4 97 | #define UART_BIT_NUM 0x00000003 98 | #define UART_BIT_NUM_S 2 99 | #define UART_PARITY_EN (BIT(1)) 100 | #define UART_PARITY (BIT(0)) 101 | 102 | #define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24) 103 | #define UART_RX_TOUT_EN (BIT(31)) 104 | #define UART_RX_TOUT_THRHD 0x0000007F 105 | #define UART_RX_TOUT_THRHD_S 24 106 | #define UART_RX_FLOW_EN (BIT(23)) 107 | #define UART_RX_FLOW_THRHD 0x0000007F 108 | #define UART_RX_FLOW_THRHD_S 16 109 | #define UART_TXFIFO_EMPTY_THRHD 0x0000007F 110 | #define UART_TXFIFO_EMPTY_THRHD_S 8 111 | #define UART_RXFIFO_FULL_THRHD 0x0000007F 112 | #define UART_RXFIFO_FULL_THRHD_S 0 113 | 114 | #define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28) 115 | #define UART_LOWPULSE_MIN_CNT 0x000FFFFF 116 | #define UART_LOWPULSE_MIN_CNT_S 0 117 | 118 | #define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C) 119 | #define UART_HIGHPULSE_MIN_CNT 0x000FFFFF 120 | #define UART_HIGHPULSE_MIN_CNT_S 0 121 | 122 | #define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30) 123 | #define UART_PULSE_NUM_CNT 0x0003FF 124 | #define UART_PULSE_NUM_CNT_S 0 125 | 126 | #define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78) 127 | #define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C) 128 | #endif // UART_REGISTER_H_INCLUDED 129 | -------------------------------------------------------------------------------- /app/user/user_main.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * ESP Client Firmware 3 | * Copyright (C) 2015 Blair Wyatt 4 | * 5 | * This program is free software: you can redistribute it and/or modify 6 | * it under the terms of the GNU General Public License as published by 7 | * the Free Software Foundation, either version 3 of the License, or 8 | * (at your option) any later version. 9 | * 10 | * This program is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | * You should have received a copy of the GNU General Public License 16 | * along with this program. If not, see . 17 | * 18 | * 19 | *******************************************************************************/ 20 | 21 | #include "osapi.h" 22 | #include "os_type.h" 23 | #include "ets_sys.h" 24 | #include "user_interface.h" 25 | #include "driver/uart.h" 26 | 27 | #define user_procTaskPrio 0 28 | #define user_procTaskQueueLen 1 29 | 30 | #define printf(...) os_printf( __VA_ARGS__ ) 31 | #define sprintf(...) os_sprintf( __VA_ARGS__ ) 32 | 33 | #define MAX_CHAN 13 //Setting to 14 overflows to 0 for some reason 34 | 35 | 36 | os_event_t user_procTaskQueue[user_procTaskQueueLen]; 37 | static void user_procTask(os_event_t *events); 38 | long clockCounter = 0; 39 | 40 | struct scan_config scan_conf; 41 | 42 | LOCAL os_timer_t scan_timer; 43 | 44 | uint8 ssid[30][33]; //30 ssids 45 | uint16 rssi[30]; 46 | uint8 chan[30]; 47 | int i = 0; 48 | int current_chan = 1; 49 | 50 | int scan_complete; 51 | 52 | void user_rf_pre_init(void) {} 53 | 54 | static void ICACHE_FLASH_ATTR 55 | scan_done(void* arg,STATUS status) 56 | { 57 | 58 | //ets_uart_printf("%d\r\n",status); 59 | if (status == OK) 60 | { 61 | 62 | struct bss_info *bss_link = (struct bss_info *)arg; 63 | bss_link = bss_link->next.stqe_next; //Get first SSID 64 | 65 | while (bss_link != NULL && i < 30) //Max 30 nodes. 66 | { 67 | //ets_uart_printf("%s\r\n",bss_link->ssid); 68 | if (bss_link->ssid[0] == 'S' && 69 | bss_link->ssid[1] == 'P' && 70 | bss_link->ssid[2] == 'S') 71 | { 72 | //os_memset(ssid, 0, 33); 73 | if (os_strlen(bss_link->ssid) <= 32) 74 | { 75 | os_memcpy(ssid[i], bss_link->ssid, os_strlen(bss_link->ssid)); 76 | chan[i] = bss_link->channel; 77 | rssi[i] = bss_link->rssi; 78 | //ets_uart_printf("SPS Found: %d\r\n",chan[i]); 79 | i++; 80 | 81 | } 82 | } 83 | 84 | bss_link = bss_link->next.stqe_next; 85 | } 86 | 87 | } 88 | scan_complete = true; 89 | 90 | } 91 | 92 | void scanner(void *arg) 93 | { 94 | scan_conf.channel = current_chan; 95 | //This prevents another scann happening before the previous has stopped. 96 | if (scan_complete) 97 | { 98 | if (current_chan <= MAX_CHAN) { 99 | scan_complete = false; 100 | wifi_station_scan(&scan_conf,scan_done); 101 | 102 | current_chan++; 103 | } 104 | else 105 | { 106 | if (i > 0) { 107 | ets_uart_printf("S\r\n"); //Start 108 | ets_uart_printf("%d\r\n",i); //Print number of items in Node scan 109 | while (i > 0) 110 | { 111 | int j = 0; 112 | while (j < 31) // Subpos SSIDs are 31 long 113 | { 114 | ets_uart_printf("%02x",ssid[i-1][j]); 115 | j++; 116 | } 117 | ets_uart_printf(",%d,%d\r\n",rssi[i-1],chan[i-1]); 118 | i--; 119 | } 120 | 121 | ets_uart_printf("E\r\n"); //End 122 | } 123 | 124 | current_chan = 1; 125 | i = 0; 126 | } 127 | } 128 | } 129 | 130 | 131 | 132 | static void ICACHE_FLASH_ATTR 133 | user_procTask(os_event_t *events) 134 | { 135 | os_delay_us(10); 136 | } 137 | 138 | 139 | //Init function 140 | void ICACHE_FLASH_ATTR 141 | user_init(void) 142 | { 143 | 144 | char ssid[32] = {0}; 145 | scan_complete = true; 146 | 147 | // Configure the UART0 and UART1 (TX only) to 9600 148 | uart_init(BIT_RATE_115200,BIT_RATE_115200); 149 | 150 | scan_conf.ssid = NULL; 151 | scan_conf.bssid = NULL; 152 | scan_conf.show_hidden = 1; 153 | 154 | 155 | //Set station mode 156 | wifi_set_opmode_current( STATION_MODE ); 157 | 158 | struct station_config conf; 159 | wifi_station_get_config_default(&conf); 160 | os_memcpy(&conf.ssid, ssid, 32); 161 | conf.bssid_set = 0; 162 | 163 | wifi_station_set_config_current(&conf); 164 | 165 | //Disarm timer 166 | os_timer_disarm(&scan_timer); 167 | 168 | //Setup timer 169 | os_timer_setfn(&scan_timer, (os_timer_func_t *)scanner, NULL); 170 | 171 | //&scan_timer is callback 172 | //delay in ms 173 | //0 for once and 1 for repeating 174 | //This callback timer value can't be too small as a new scan will start before the previous finishes. 175 | //The callback function checks if the scan is complete before starting a new scan. 176 | os_timer_arm(&scan_timer, 10, 1); //100Hz 177 | 178 | //Start os task 179 | system_os_task(user_procTask, user_procTaskPrio,user_procTaskQueue, user_procTaskQueueLen); 180 | } 181 | -------------------------------------------------------------------------------- /include/json/jsontree.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2011-2012, Swedish Institute of Computer Science. 3 | * All rights reserved. 4 | * 5 | * Redistribution and use in source and binary forms, with or without 6 | * modification, are permitted provided that the following conditions 7 | * are met: 8 | * 1. Redistributions of source code must retain the above copyright 9 | * notice, this list of conditions and the following disclaimer. 10 | * 2. Redistributions in binary form must reproduce the above copyright 11 | * notice, this list of conditions and the following disclaimer in the 12 | * documentation and/or other materials provided with the distribution. 13 | * 3. Neither the name of the Institute nor the names of its contributors 14 | * may be used to endorse or promote products derived from this software 15 | * without specific prior written permission. 16 | * 17 | * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND 18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE 21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 | * SUCH DAMAGE. 28 | * 29 | * This file is part of the Contiki operating system. 30 | */ 31 | 32 | /** 33 | * \file 34 | * JSON output generation 35 | * \author 36 | * Niclas Finne 37 | * Joakim Eriksson 38 | */ 39 | 40 | #ifndef __JSONTREE_H__ 41 | #define __JSONTREE_H__ 42 | 43 | #include "c_types.h" 44 | #include "json/json.h" 45 | 46 | #ifdef JSONTREE_CONF_MAX_DEPTH 47 | #define JSONTREE_MAX_DEPTH JSONTREE_CONF_MAX_DEPTH 48 | #else 49 | #define JSONTREE_MAX_DEPTH 10 50 | #endif /* JSONTREE_CONF_MAX_DEPTH */ 51 | 52 | struct jsontree_context { 53 | struct jsontree_value *values[JSONTREE_MAX_DEPTH]; 54 | uint16_t index[JSONTREE_MAX_DEPTH]; 55 | int (* putchar)(int); 56 | uint8_t depth; 57 | uint8_t path; 58 | int callback_state; 59 | }; 60 | 61 | struct jsontree_value { 62 | uint8_t type; 63 | /* followed by a value */ 64 | }; 65 | 66 | struct jsontree_string { 67 | uint8_t type; 68 | const char *value; 69 | }; 70 | 71 | struct jsontree_int { 72 | uint8_t type; 73 | int value; 74 | }; 75 | 76 | /* NOTE: the jsontree_callback set will receive a jsonparse state */ 77 | struct jsonparse_state; 78 | struct jsontree_callback { 79 | uint8_t type; 80 | int (* output)(struct jsontree_context *js_ctx); 81 | int (* set)(struct jsontree_context *js_ctx, struct jsonparse_state *parser); 82 | }; 83 | 84 | struct jsontree_pair { 85 | const char *name; 86 | struct jsontree_value *value; 87 | }; 88 | 89 | struct jsontree_object { 90 | uint8_t type; 91 | uint8_t count; 92 | struct jsontree_pair *pairs; 93 | }; 94 | 95 | struct jsontree_array { 96 | uint8_t type; 97 | uint8_t count; 98 | struct jsontree_value **values; 99 | }; 100 | 101 | #define JSONTREE_STRING(text) {JSON_TYPE_STRING, (text)} 102 | #define JSONTREE_PAIR(name, value) {(name), (struct jsontree_value *)(value)} 103 | #define JSONTREE_CALLBACK(output, set) {JSON_TYPE_CALLBACK, (output), (set)} 104 | 105 | #define JSONTREE_OBJECT(name, ...) \ 106 | static struct jsontree_pair jsontree_pair_##name[] = {__VA_ARGS__}; \ 107 | static struct jsontree_object name = { \ 108 | JSON_TYPE_OBJECT, \ 109 | sizeof(jsontree_pair_##name)/sizeof(struct jsontree_pair), \ 110 | jsontree_pair_##name } 111 | 112 | #define JSONTREE_PAIR_ARRAY(value) (struct jsontree_value *)(value) 113 | #define JSONTREE_ARRAY(name, ...) \ 114 | static struct jsontree_value* jsontree_value_##name[] = {__VA_ARGS__}; \ 115 | static struct jsontree_array name = { \ 116 | JSON_TYPE_ARRAY, \ 117 | sizeof(jsontree_value_##name)/sizeof(struct jsontree_value*), \ 118 | jsontree_value_##name } 119 | 120 | #define JSONTREE_OBJECT_EXT(name, ...) \ 121 | static struct jsontree_pair jsontree_pair_##name[] = {__VA_ARGS__}; \ 122 | struct jsontree_object name = { \ 123 | JSON_TYPE_OBJECT, \ 124 | sizeof(jsontree_pair_##name)/sizeof(struct jsontree_pair), \ 125 | jsontree_pair_##name } 126 | 127 | void jsontree_setup(struct jsontree_context *js_ctx, 128 | struct jsontree_value *root, int (* putchar)(int)); 129 | void jsontree_reset(struct jsontree_context *js_ctx); 130 | 131 | const char *jsontree_path_name(const struct jsontree_context *js_ctx, 132 | int depth); 133 | 134 | void jsontree_write_int(const struct jsontree_context *js_ctx, int value); 135 | void jsontree_write_int_array(const struct jsontree_context *js_ctx, const int *text, uint32 length); 136 | 137 | void jsontree_write_atom(const struct jsontree_context *js_ctx, 138 | const char *text); 139 | void jsontree_write_string(const struct jsontree_context *js_ctx, 140 | const char *text); 141 | int jsontree_print_next(struct jsontree_context *js_ctx); 142 | struct jsontree_value *jsontree_find_next(struct jsontree_context *js_ctx, 143 | int type); 144 | 145 | #endif /* __JSONTREE_H__ */ 146 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40240000, len = 0x3C000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.new.2048.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40201010, len = 0xE0000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.new.512.app1.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40201010, len = 0x2B000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.new.512.app2.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40241010, len = 0x2B000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.old.512.app1.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40211000, len = 0x2B000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.old.512.app2.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40251000, len = 0x2B000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.new.1024.app1.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40201010, len = 0x6B000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.new.1024.app2.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40281010, len = 0x6B000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.old.1024.app1.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40211000, len = 0x6B000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /ld/eagle.app.v6.old.1024.app2.ld: -------------------------------------------------------------------------------- 1 | /* This linker script generated from xt-genldscripts.tpp for LSP . */ 2 | /* Linker Script for ld -N */ 3 | MEMORY 4 | { 5 | dport0_0_seg : org = 0x3FF00000, len = 0x10 6 | dram0_0_seg : org = 0x3FFE8000, len = 0x14000 7 | iram1_0_seg : org = 0x40100000, len = 0x8000 8 | irom0_0_seg : org = 0x40291000, len = 0x6B000 9 | } 10 | 11 | PHDRS 12 | { 13 | dport0_0_phdr PT_LOAD; 14 | dram0_0_phdr PT_LOAD; 15 | dram0_0_bss_phdr PT_LOAD; 16 | iram1_0_phdr PT_LOAD; 17 | irom0_0_phdr PT_LOAD; 18 | } 19 | 20 | 21 | /* Default entry point: */ 22 | ENTRY(call_user_start) 23 | EXTERN(_DebugExceptionVector) 24 | EXTERN(_DoubleExceptionVector) 25 | EXTERN(_KernelExceptionVector) 26 | EXTERN(_NMIExceptionVector) 27 | EXTERN(_UserExceptionVector) 28 | PROVIDE(_memmap_vecbase_reset = 0x40000000); 29 | /* Various memory-map dependent cache attribute settings: */ 30 | _memmap_cacheattr_wb_base = 0x00000110; 31 | _memmap_cacheattr_wt_base = 0x00000110; 32 | _memmap_cacheattr_bp_base = 0x00000220; 33 | _memmap_cacheattr_unused_mask = 0xFFFFF00F; 34 | _memmap_cacheattr_wb_trapnull = 0x2222211F; 35 | _memmap_cacheattr_wba_trapnull = 0x2222211F; 36 | _memmap_cacheattr_wbna_trapnull = 0x2222211F; 37 | _memmap_cacheattr_wt_trapnull = 0x2222211F; 38 | _memmap_cacheattr_bp_trapnull = 0x2222222F; 39 | _memmap_cacheattr_wb_strict = 0xFFFFF11F; 40 | _memmap_cacheattr_wt_strict = 0xFFFFF11F; 41 | _memmap_cacheattr_bp_strict = 0xFFFFF22F; 42 | _memmap_cacheattr_wb_allvalid = 0x22222112; 43 | _memmap_cacheattr_wt_allvalid = 0x22222112; 44 | _memmap_cacheattr_bp_allvalid = 0x22222222; 45 | PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 46 | 47 | SECTIONS 48 | { 49 | 50 | .dport0.rodata : ALIGN(4) 51 | { 52 | _dport0_rodata_start = ABSOLUTE(.); 53 | *(.dport0.rodata) 54 | *(.dport.rodata) 55 | _dport0_rodata_end = ABSOLUTE(.); 56 | } >dport0_0_seg :dport0_0_phdr 57 | 58 | .dport0.literal : ALIGN(4) 59 | { 60 | _dport0_literal_start = ABSOLUTE(.); 61 | *(.dport0.literal) 62 | *(.dport.literal) 63 | _dport0_literal_end = ABSOLUTE(.); 64 | } >dport0_0_seg :dport0_0_phdr 65 | 66 | .dport0.data : ALIGN(4) 67 | { 68 | _dport0_data_start = ABSOLUTE(.); 69 | *(.dport0.data) 70 | *(.dport.data) 71 | _dport0_data_end = ABSOLUTE(.); 72 | } >dport0_0_seg :dport0_0_phdr 73 | 74 | .data : ALIGN(4) 75 | { 76 | _data_start = ABSOLUTE(.); 77 | *(.data) 78 | *(.data.*) 79 | *(.gnu.linkonce.d.*) 80 | *(.data1) 81 | *(.sdata) 82 | *(.sdata.*) 83 | *(.gnu.linkonce.s.*) 84 | *(.sdata2) 85 | *(.sdata2.*) 86 | *(.gnu.linkonce.s2.*) 87 | *(.jcr) 88 | _data_end = ABSOLUTE(.); 89 | } >dram0_0_seg :dram0_0_phdr 90 | 91 | .rodata : ALIGN(4) 92 | { 93 | _rodata_start = ABSOLUTE(.); 94 | *(.sdk.version) 95 | *(.rodata) 96 | *(.rodata.*) 97 | *(.gnu.linkonce.r.*) 98 | *(.rodata1) 99 | __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 100 | *(.xt_except_table) 101 | *(.gcc_except_table) 102 | *(.gnu.linkonce.e.*) 103 | *(.gnu.version_r) 104 | *(.eh_frame) 105 | /* C++ constructor and destructor tables, properly ordered: */ 106 | KEEP (*crtbegin.o(.ctors)) 107 | KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 108 | KEEP (*(SORT(.ctors.*))) 109 | KEEP (*(.ctors)) 110 | KEEP (*crtbegin.o(.dtors)) 111 | KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 112 | KEEP (*(SORT(.dtors.*))) 113 | KEEP (*(.dtors)) 114 | /* C++ exception handlers table: */ 115 | __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 116 | *(.xt_except_desc) 117 | *(.gnu.linkonce.h.*) 118 | __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 119 | *(.xt_except_desc_end) 120 | *(.dynamic) 121 | *(.gnu.version_d) 122 | . = ALIGN(4); /* this table MUST be 4-byte aligned */ 123 | _bss_table_start = ABSOLUTE(.); 124 | LONG(_bss_start) 125 | LONG(_bss_end) 126 | _bss_table_end = ABSOLUTE(.); 127 | _rodata_end = ABSOLUTE(.); 128 | } >dram0_0_seg :dram0_0_phdr 129 | 130 | .bss ALIGN(8) (NOLOAD) : ALIGN(4) 131 | { 132 | . = ALIGN (8); 133 | _bss_start = ABSOLUTE(.); 134 | *(.dynsbss) 135 | *(.sbss) 136 | *(.sbss.*) 137 | *(.gnu.linkonce.sb.*) 138 | *(.scommon) 139 | *(.sbss2) 140 | *(.sbss2.*) 141 | *(.gnu.linkonce.sb2.*) 142 | *(.dynbss) 143 | *(.bss) 144 | *(.bss.*) 145 | *(.gnu.linkonce.b.*) 146 | *(COMMON) 147 | . = ALIGN (8); 148 | _bss_end = ABSOLUTE(.); 149 | _heap_start = ABSOLUTE(.); 150 | /* _stack_sentry = ALIGN(0x8); */ 151 | } >dram0_0_seg :dram0_0_bss_phdr 152 | /* __stack = 0x3ffc8000; */ 153 | 154 | .text : ALIGN(4) 155 | { 156 | _stext = .; 157 | _text_start = ABSOLUTE(.); 158 | *(.UserEnter.text) 159 | . = ALIGN(16); 160 | *(.DebugExceptionVector.text) 161 | . = ALIGN(16); 162 | *(.NMIExceptionVector.text) 163 | . = ALIGN(16); 164 | *(.KernelExceptionVector.text) 165 | LONG(0) 166 | LONG(0) 167 | LONG(0) 168 | LONG(0) 169 | . = ALIGN(16); 170 | *(.UserExceptionVector.text) 171 | LONG(0) 172 | LONG(0) 173 | LONG(0) 174 | LONG(0) 175 | . = ALIGN(16); 176 | *(.DoubleExceptionVector.text) 177 | LONG(0) 178 | LONG(0) 179 | LONG(0) 180 | LONG(0) 181 | . = ALIGN (16); 182 | *(.entry.text) 183 | *(.init.literal) 184 | *(.init) 185 | *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 186 | *(.fini.literal) 187 | *(.fini) 188 | *(.gnu.version) 189 | _text_end = ABSOLUTE(.); 190 | _etext = .; 191 | } >iram1_0_seg :iram1_0_phdr 192 | 193 | .lit4 : ALIGN(4) 194 | { 195 | _lit4_start = ABSOLUTE(.); 196 | *(*.lit4) 197 | *(.lit4.*) 198 | *(.gnu.linkonce.lit4.*) 199 | _lit4_end = ABSOLUTE(.); 200 | } >iram1_0_seg :iram1_0_phdr 201 | 202 | .irom0.text : ALIGN(4) 203 | { 204 | _irom0_text_start = ABSOLUTE(.); 205 | *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) 206 | _irom0_text_end = ABSOLUTE(.); 207 | } >irom0_0_seg :irom0_0_phdr 208 | } 209 | 210 | /* get ROM code address */ 211 | INCLUDE "../ld/eagle.rom.addr.v6.ld" 212 | -------------------------------------------------------------------------------- /driver/uart.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * Copyright 2013-2014 Espressif Systems (Wuxi) 3 | * 4 | * FileName: uart.c 5 | * 6 | * Description: Two UART mode configration and interrupt handler. 7 | * Check your hardware connection while use this mode. 8 | * 9 | * Modification history: 10 | * 2014/3/12, v1.0 create this file. 11 | *******************************************************************************/ 12 | #include "ets_sys.h" 13 | #include "osapi.h" 14 | #include "driver/uart.h" 15 | 16 | #define UART0 0 17 | #define UART1 1 18 | 19 | // UartDev is defined and initialized in rom code. 20 | extern UartDevice UartDev; 21 | 22 | LOCAL void uart0_rx_intr_handler(void *para); 23 | 24 | /****************************************************************************** 25 | * FunctionName : uart_config 26 | * Description : Internal used function 27 | * UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled 28 | * UART1 just used for debug output 29 | * Parameters : uart_no, use UART0 or UART1 defined ahead 30 | * Returns : NONE 31 | *******************************************************************************/ 32 | LOCAL void ICACHE_FLASH_ATTR 33 | uart_config(uint8 uart_no) 34 | { 35 | if (uart_no == UART1) { 36 | PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); 37 | } else { 38 | /* rcv_buff size if 0x100 */ 39 | ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff)); 40 | PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); 41 | PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); 42 | } 43 | 44 | uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate)); 45 | 46 | WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity 47 | | UartDev.parity 48 | | (UartDev.stop_bits << UART_STOP_BIT_NUM_S) 49 | | (UartDev.data_bits << UART_BIT_NUM_S)); 50 | 51 | 52 | //clear rx and tx fifo,not ready 53 | SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); 54 | CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); 55 | 56 | //set rx fifo trigger 57 | WRITE_PERI_REG(UART_CONF1(uart_no), (UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S); 58 | 59 | //clear all interrupt 60 | WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff); 61 | //enable rx_interrupt 62 | SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA); 63 | } 64 | 65 | /****************************************************************************** 66 | * FunctionName : uart1_tx_one_char 67 | * Description : Internal used function 68 | * Use uart1 interface to transfer one char 69 | * Parameters : uint8 TxChar - character to tx 70 | * Returns : OK 71 | *******************************************************************************/ 72 | LOCAL STATUS ICACHE_FLASH_ATTR 73 | uart1_tx_one_char(uint8 TxChar) 74 | { 75 | while (true) 76 | { 77 | uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(UART1)) & (UART_TXFIFO_CNT<> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { 79 | break; 80 | } 81 | } 82 | 83 | WRITE_PERI_REG(UART_FIFO(UART1) , TxChar); 84 | return OK; 85 | } 86 | 87 | /****************************************************************************** 88 | * FunctionName : uart1_write_char 89 | * Description : Internal used function 90 | * Do some special deal while tx char is '\r' or '\n' 91 | * Parameters : char c - character to tx 92 | * Returns : NONE 93 | *******************************************************************************/ 94 | LOCAL void ICACHE_FLASH_ATTR 95 | uart1_write_char(char c) 96 | { 97 | if (c == '\n') { 98 | uart1_tx_one_char('\r'); 99 | uart1_tx_one_char('\n'); 100 | } else if (c == '\r') { 101 | } else { 102 | uart1_tx_one_char(c); 103 | } 104 | } 105 | 106 | /****************************************************************************** 107 | * FunctionName : uart0_rx_intr_handler 108 | * Description : Internal used function 109 | * UART0 interrupt handler, add self handle code inside 110 | * Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg 111 | * Returns : NONE 112 | *******************************************************************************/ 113 | LOCAL void 114 | uart0_rx_intr_handler(void *para) 115 | { 116 | /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents 117 | * uart1 and uart0 respectively 118 | */ 119 | RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para; 120 | uint8 RcvChar; 121 | 122 | if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST)) { 123 | return; 124 | } 125 | 126 | WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR); 127 | 128 | while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) { 129 | RcvChar = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF; 130 | 131 | /* you can add your handle code below.*/ 132 | 133 | *(pRxBuff->pWritePos) = RcvChar; 134 | 135 | // insert here for get one command line from uart 136 | if (RcvChar == '\r') { 137 | pRxBuff->BuffState = WRITE_OVER; 138 | } 139 | 140 | pRxBuff->pWritePos++; 141 | 142 | if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE)) { 143 | // overflow ...we may need more error handle here. 144 | pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff ; 145 | } 146 | } 147 | } 148 | 149 | 150 | /****************************************************************************** 151 | * FunctionName : uart0_tx_buffer 152 | * Description : use uart0 to transfer buffer 153 | * Parameters : uint8 *buf - point to send buffer 154 | * uint16 len - buffer len 155 | * Returns : 156 | *******************************************************************************/ 157 | void ICACHE_FLASH_ATTR 158 | uart0_tx_buffer(uint8 *buf, uint16 len) 159 | { 160 | uint16 i; 161 | 162 | for (i = 0; i < len; i++) { 163 | uart_tx_one_char(buf[i]); 164 | } 165 | } 166 | 167 | /****************************************************************************** 168 | * FunctionName : uart_init 169 | * Description : user interface for init uart 170 | * Parameters : UartBautRate uart0_br - uart0 bautrate 171 | * UartBautRate uart1_br - uart1 bautrate 172 | * Returns : NONE 173 | *******************************************************************************/ 174 | void ICACHE_FLASH_ATTR 175 | uart_init(UartBautRate uart0_br, UartBautRate uart1_br) 176 | { 177 | // rom use 74880 baut_rate, here reinitialize 178 | UartDev.baut_rate = uart0_br; 179 | uart_config(UART0); 180 | UartDev.baut_rate = uart1_br; 181 | uart_config(UART1); 182 | ETS_UART_INTR_ENABLE(); 183 | 184 | // install uart1 putc callback 185 | os_install_putc1((void *)uart1_write_char); 186 | } 187 | 188 | -------------------------------------------------------------------------------- /include/queue.h: -------------------------------------------------------------------------------- 1 | #ifndef _SYS_QUEUE_H_ 2 | #define _SYS_QUEUE_H_ 3 | 4 | #define QMD_SAVELINK(name, link) 5 | #define TRASHIT(x) 6 | 7 | /* 8 | * Singly-linked List declarations. 9 | */ 10 | #define SLIST_HEAD(name, type) \ 11 | struct name { \ 12 | struct type *slh_first; /* first element */ \ 13 | } 14 | 15 | #define SLIST_HEAD_INITIALIZER(head) \ 16 | { NULL } 17 | 18 | #define SLIST_ENTRY(type) \ 19 | struct { \ 20 | struct type *sle_next; /* next element */ \ 21 | } 22 | 23 | /* 24 | * Singly-linked List functions. 25 | */ 26 | #define SLIST_EMPTY(head) ((head)->slh_first == NULL) 27 | 28 | #define SLIST_FIRST(head) ((head)->slh_first) 29 | 30 | #define SLIST_FOREACH(var, head, field) \ 31 | for ((var) = SLIST_FIRST((head)); \ 32 | (var); \ 33 | (var) = SLIST_NEXT((var), field)) 34 | 35 | #define SLIST_FOREACH_SAFE(var, head, field, tvar) \ 36 | for ((var) = SLIST_FIRST((head)); \ 37 | (var) && ((tvar) = SLIST_NEXT((var), field), 1); \ 38 | (var) = (tvar)) 39 | 40 | #define SLIST_FOREACH_PREVPTR(var, varp, head, field) \ 41 | for ((varp) = &SLIST_FIRST((head)); \ 42 | ((var) = *(varp)) != NULL; \ 43 | (varp) = &SLIST_NEXT((var), field)) 44 | 45 | #define SLIST_INIT(head) do { \ 46 | SLIST_FIRST((head)) = NULL; \ 47 | } while (0) 48 | 49 | #define SLIST_INSERT_AFTER(slistelm, elm, field) do { \ 50 | SLIST_NEXT((elm), field) = SLIST_NEXT((slistelm), field); \ 51 | SLIST_NEXT((slistelm), field) = (elm); \ 52 | } while (0) 53 | 54 | #define SLIST_INSERT_HEAD(head, elm, field) do { \ 55 | SLIST_NEXT((elm), field) = SLIST_FIRST((head)); \ 56 | SLIST_FIRST((head)) = (elm); \ 57 | } while (0) 58 | 59 | #define SLIST_NEXT(elm, field) ((elm)->field.sle_next) 60 | 61 | #define SLIST_REMOVE(head, elm, type, field) do { \ 62 | QMD_SAVELINK(oldnext, (elm)->field.sle_next); \ 63 | if (SLIST_FIRST((head)) == (elm)) { \ 64 | SLIST_REMOVE_HEAD((head), field); \ 65 | } \ 66 | else { \ 67 | struct type *curelm = SLIST_FIRST((head)); \ 68 | while (SLIST_NEXT(curelm, field) != (elm)) \ 69 | curelm = SLIST_NEXT(curelm, field); \ 70 | SLIST_REMOVE_AFTER(curelm, field); \ 71 | } \ 72 | TRASHIT(*oldnext); \ 73 | } while (0) 74 | 75 | #define SLIST_REMOVE_AFTER(elm, field) do { \ 76 | SLIST_NEXT(elm, field) = \ 77 | SLIST_NEXT(SLIST_NEXT(elm, field), field); \ 78 | } while (0) 79 | 80 | #define SLIST_REMOVE_HEAD(head, field) do { \ 81 | SLIST_FIRST((head)) = SLIST_NEXT(SLIST_FIRST((head)), field); \ 82 | } while (0) 83 | 84 | /* 85 | * Singly-linked Tail queue declarations. 86 | */ 87 | #define STAILQ_HEAD(name, type) \ 88 | struct name { \ 89 | struct type *stqh_first;/* first element */ \ 90 | struct type **stqh_last;/* addr of last next element */ \ 91 | } 92 | 93 | #define STAILQ_HEAD_INITIALIZER(head) \ 94 | { NULL, &(head).stqh_first } 95 | 96 | #define STAILQ_ENTRY(type) \ 97 | struct { \ 98 | struct type *stqe_next; /* next element */ \ 99 | } 100 | 101 | /* 102 | * Singly-linked Tail queue functions. 103 | */ 104 | #define STAILQ_CONCAT(head1, head2) do { \ 105 | if (!STAILQ_EMPTY((head2))) { \ 106 | *(head1)->stqh_last = (head2)->stqh_first; \ 107 | (head1)->stqh_last = (head2)->stqh_last; \ 108 | STAILQ_INIT((head2)); \ 109 | } \ 110 | } while (0) 111 | 112 | #define STAILQ_EMPTY(head) ((head)->stqh_first == NULL) 113 | 114 | #define STAILQ_FIRST(head) ((head)->stqh_first) 115 | 116 | #define STAILQ_FOREACH(var, head, field) \ 117 | for((var) = STAILQ_FIRST((head)); \ 118 | (var); \ 119 | (var) = STAILQ_NEXT((var), field)) 120 | 121 | 122 | #define STAILQ_FOREACH_SAFE(var, head, field, tvar) \ 123 | for ((var) = STAILQ_FIRST((head)); \ 124 | (var) && ((tvar) = STAILQ_NEXT((var), field), 1); \ 125 | (var) = (tvar)) 126 | 127 | #define STAILQ_INIT(head) do { \ 128 | STAILQ_FIRST((head)) = NULL; \ 129 | (head)->stqh_last = &STAILQ_FIRST((head)); \ 130 | } while (0) 131 | 132 | #define STAILQ_INSERT_AFTER(head, tqelm, elm, field) do { \ 133 | if ((STAILQ_NEXT((elm), field) = STAILQ_NEXT((tqelm), field)) == NULL)\ 134 | (head)->stqh_last = &STAILQ_NEXT((elm), field); \ 135 | STAILQ_NEXT((tqelm), field) = (elm); \ 136 | } while (0) 137 | 138 | #define STAILQ_INSERT_HEAD(head, elm, field) do { \ 139 | if ((STAILQ_NEXT((elm), field) = STAILQ_FIRST((head))) == NULL) \ 140 | (head)->stqh_last = &STAILQ_NEXT((elm), field); \ 141 | STAILQ_FIRST((head)) = (elm); \ 142 | } while (0) 143 | 144 | #define STAILQ_INSERT_TAIL(head, elm, field) do { \ 145 | STAILQ_NEXT((elm), field) = NULL; \ 146 | *(head)->stqh_last = (elm); \ 147 | (head)->stqh_last = &STAILQ_NEXT((elm), field); \ 148 | } while (0) 149 | 150 | #define STAILQ_LAST(head, type, field) \ 151 | (STAILQ_EMPTY((head)) ? \ 152 | NULL : \ 153 | ((struct type *)(void *) \ 154 | ((char *)((head)->stqh_last) - __offsetof(struct type, field)))) 155 | 156 | #define STAILQ_NEXT(elm, field) ((elm)->field.stqe_next) 157 | 158 | #define STAILQ_REMOVE(head, elm, type, field) do { \ 159 | QMD_SAVELINK(oldnext, (elm)->field.stqe_next); \ 160 | if (STAILQ_FIRST((head)) == (elm)) { \ 161 | STAILQ_REMOVE_HEAD((head), field); \ 162 | } \ 163 | else { \ 164 | struct type *curelm = STAILQ_FIRST((head)); \ 165 | while (STAILQ_NEXT(curelm, field) != (elm)) \ 166 | curelm = STAILQ_NEXT(curelm, field); \ 167 | STAILQ_REMOVE_AFTER(head, curelm, field); \ 168 | } \ 169 | TRASHIT(*oldnext); \ 170 | } while (0) 171 | 172 | #define STAILQ_REMOVE_HEAD(head, field) do { \ 173 | if ((STAILQ_FIRST((head)) = \ 174 | STAILQ_NEXT(STAILQ_FIRST((head)), field)) == NULL) \ 175 | (head)->stqh_last = &STAILQ_FIRST((head)); \ 176 | } while (0) 177 | 178 | #define STAILQ_REMOVE_AFTER(head, elm, field) do { \ 179 | if ((STAILQ_NEXT(elm, field) = \ 180 | STAILQ_NEXT(STAILQ_NEXT(elm, field), field)) == NULL) \ 181 | (head)->stqh_last = &STAILQ_NEXT((elm), field); \ 182 | } while (0) 183 | 184 | #define STAILQ_SWAP(head1, head2, type) do { \ 185 | struct type *swap_first = STAILQ_FIRST(head1); \ 186 | struct type **swap_last = (head1)->stqh_last; \ 187 | STAILQ_FIRST(head1) = STAILQ_FIRST(head2); \ 188 | (head1)->stqh_last = (head2)->stqh_last; \ 189 | STAILQ_FIRST(head2) = swap_first; \ 190 | (head2)->stqh_last = swap_last; \ 191 | if (STAILQ_EMPTY(head1)) \ 192 | (head1)->stqh_last = &STAILQ_FIRST(head1); \ 193 | if (STAILQ_EMPTY(head2)) \ 194 | (head2)->stqh_last = &STAILQ_FIRST(head2); \ 195 | } while (0) 196 | 197 | #define STAILQ_INSERT_CHAIN_HEAD(head, elm_chead, elm_ctail, field) do { \ 198 | if ((STAILQ_NEXT(elm_ctail, field) = STAILQ_FIRST(head)) == NULL ) { \ 199 | (head)->stqh_last = &STAILQ_NEXT(elm_ctail, field); \ 200 | } \ 201 | STAILQ_FIRST(head) = (elm_chead); \ 202 | } while (0) 203 | 204 | #endif /* !_SYS_QUEUE_H_ */ 205 | -------------------------------------------------------------------------------- /tools/gen_appbin.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/python 2 | # 3 | # File : gen_appbin.py 4 | # This file is part of Espressif's generate bin script. 5 | # Copyright (C) 2013 - 2016, Espressif Systems 6 | # 7 | # This program is free software: you can redistribute it and/or modify 8 | # it under the terms of version 3 of the GNU General Public License as 9 | # published by the Free Software Foundation. 10 | # 11 | # This program is distributed in the hope that it will be useful, 12 | # but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | # GNU General Public License for more details. 15 | # 16 | # You should have received a copy of the GNU General Public License along 17 | # with this program. If not, see . 18 | 19 | """This file is part of Espressif's generate bin script. 20 | argv[1] is elf file name 21 | argv[2] is version num""" 22 | 23 | import string 24 | import sys 25 | import os 26 | import re 27 | import binascii 28 | import struct 29 | 30 | 31 | TEXT_ADDRESS = 0x40100000 32 | # app_entry = 0 33 | # data_address = 0x3ffb0000 34 | # data_end = 0x40000000 35 | # text_end = 0x40120000 36 | 37 | CHECKSUM_INIT = 0xEF 38 | 39 | chk_sum = CHECKSUM_INIT 40 | blocks = 0 41 | 42 | def write_file(file_name,data): 43 | if file_name is None: 44 | print 'file_name cannot be none\n' 45 | sys.exit(0) 46 | 47 | fp = open(file_name,'ab') 48 | 49 | if fp: 50 | fp.seek(0,os.SEEK_END) 51 | fp.write(data) 52 | fp.close() 53 | else: 54 | print '%s write fail\n'%(file_name) 55 | 56 | def combine_bin(file_name,dest_file_name,start_offset_addr,need_chk): 57 | global chk_sum 58 | global blocks 59 | if dest_file_name is None: 60 | print 'dest_file_name cannot be none\n' 61 | sys.exit(0) 62 | 63 | if file_name: 64 | fp = open(file_name,'rb') 65 | if fp: 66 | ########## write text ########## 67 | fp.seek(0,os.SEEK_END) 68 | data_len = fp.tell() 69 | if data_len: 70 | if need_chk: 71 | tmp_len = (data_len + 3) & (~3) 72 | else: 73 | tmp_len = (data_len + 15) & (~15) 74 | data_bin = struct.pack(' eagle.app.sym' 125 | else : 126 | cmd = 'xt-nm -g ' + elf_file + ' > eagle.app.sym' 127 | 128 | os.system(cmd) 129 | 130 | fp = file('./eagle.app.sym') 131 | if fp is None: 132 | print "open sym file error\n" 133 | sys.exit(0) 134 | 135 | lines = fp.readlines() 136 | fp.close() 137 | 138 | entry_addr = None 139 | p = re.compile('(\w*)(\sT\s)(call_user_start)$') 140 | for line in lines: 141 | m = p.search(line) 142 | if m != None: 143 | entry_addr = m.group(1) 144 | # print entry_addr 145 | 146 | if entry_addr is None: 147 | print 'no entry point!!' 148 | sys.exit(0) 149 | 150 | data_start_addr = '0' 151 | p = re.compile('(\w*)(\sA\s)(_data_start)$') 152 | for line in lines: 153 | m = p.search(line) 154 | if m != None: 155 | data_start_addr = m.group(1) 156 | # print data_start_addr 157 | 158 | rodata_start_addr = '0' 159 | p = re.compile('(\w*)(\sA\s)(_rodata_start)$') 160 | for line in lines: 161 | m = p.search(line) 162 | if m != None: 163 | rodata_start_addr = m.group(1) 164 | # print rodata_start_addr 165 | 166 | # write flash bin header 167 | #============================ 168 | # SPI FLASH PARAMS 169 | #------------------- 170 | #flash_mode= 171 | # 0: QIO 172 | # 1: QOUT 173 | # 2: DIO 174 | # 3: DOUT 175 | #------------------- 176 | #flash_clk_div= 177 | # 0 : 80m / 2 178 | # 1 : 80m / 3 179 | # 2 : 80m / 4 180 | # 0xf: 80m / 1 181 | #------------------- 182 | #flash_size_map= 183 | # 0 : 512 KB (256 KB + 256 KB) 184 | # 1 : 256 KB 185 | # 2 : 1024 KB (512 KB + 512 KB) 186 | # 3 : 2048 KB (512 KB + 512 KB) 187 | # 4 : 4096 KB (512 KB + 512 KB) 188 | # 5 : 2048 KB (1024 KB + 1024 KB) 189 | # 6 : 4096 KB (1024 KB + 1024 KB) 190 | #------------------- 191 | # END OF SPI FLASH PARAMS 192 | #============================ 193 | byte2=int(flash_mode)&0xff 194 | byte3=(((int(flash_size_map)<<4)| int(flash_clk_div))&0xff) 195 | 196 | if boot_mode == '2': 197 | # write irom bin head 198 | data_bin = struct.pack(' ../bin/eagle.dump 243 | @$(OBJDUMP) -S $< > ../bin/eagle.S 244 | else 245 | @$(RM) -r ../bin/upgrade/$(BIN_NAME).S ../bin/upgrade/$(BIN_NAME).dump 246 | @$(OBJDUMP) -x -s $< > ../bin/upgrade/$(BIN_NAME).dump 247 | @$(OBJDUMP) -S $< > ../bin/upgrade/$(BIN_NAME).S 248 | endif 249 | 250 | @$(OBJCOPY) --only-section .text -O binary $< eagle.app.v6.text.bin 251 | @$(OBJCOPY) --only-section .data -O binary $< eagle.app.v6.data.bin 252 | @$(OBJCOPY) --only-section .rodata -O binary $< eagle.app.v6.rodata.bin 253 | @$(OBJCOPY) --only-section .irom0.text -O binary $< eagle.app.v6.irom0text.bin 254 | 255 | @echo "" 256 | @echo "!!!" 257 | 258 | ifeq ($(app), 0) 259 | @python ../tools/gen_appbin.py $< 0 $(mode) $(freqdiv) $(size_map) 260 | @mv eagle.app.flash.bin ../bin/eagle.flash.bin 261 | @mv eagle.app.v6.irom0text.bin ../bin/eagle.irom0text.bin 262 | @rm eagle.app.v6.* 263 | @echo "No boot needed." 264 | @echo "Generate eagle.flash.bin and eagle.irom0text.bin successully in folder bin." 265 | @echo "eagle.flash.bin-------->0x00000" 266 | @echo "eagle.irom0text.bin---->0x40000" 267 | else 268 | ifneq ($(boot), new) 269 | @python ../tools/gen_appbin.py $< 1 $(mode) $(freqdiv) $(size_map) 270 | @echo "Support boot_v1.1 and +" 271 | else 272 | @python ../tools/gen_appbin.py $< 2 $(mode) $(freqdiv) $(size_map) 273 | 274 | ifeq ($(size_map), 6) 275 | @echo "Support boot_v1.4 and +" 276 | else 277 | ifeq ($(size_map), 5) 278 | @echo "Support boot_v1.4 and +" 279 | else 280 | @echo "Support boot_v1.2 and +" 281 | endif 282 | endif 283 | endif 284 | 285 | @mv eagle.app.flash.bin ../bin/upgrade/$(BIN_NAME).bin 286 | @rm eagle.app.v6.* 287 | @echo "Generate $(BIN_NAME).bin successully in folder bin/upgrade." 288 | @echo "boot.bin------------>0x00000" 289 | @echo "$(BIN_NAME).bin--->$(addr)" 290 | endif 291 | 292 | @echo "!!!" 293 | 294 | ############################################################# 295 | # Rules base 296 | # Should be done in top-level makefile only 297 | # 298 | 299 | all: .subdirs $(OBJS) $(OLIBS) $(OIMAGES) $(OBINS) $(SPECIAL_MKTARGETS) 300 | 301 | clean: 302 | $(foreach d, $(SUBDIRS), $(MAKE) -C $(d) clean;) 303 | $(RM) -r $(ODIR)/$(TARGET)/$(FLAVOR) 304 | 305 | clobber: $(SPECIAL_CLOBBER) 306 | $(foreach d, $(SUBDIRS), $(MAKE) -C $(d) clobber;) 307 | $(RM) -r $(ODIR) 308 | 309 | .subdirs: 310 | @set -e; $(foreach d, $(SUBDIRS), $(MAKE) -C $(d);) 311 | 312 | #.subdirs: 313 | # $(foreach d, $(SUBDIRS), $(MAKE) -C $(d)) 314 | 315 | ifneq ($(MAKECMDGOALS),clean) 316 | ifneq ($(MAKECMDGOALS),clobber) 317 | ifdef DEPS 318 | sinclude $(DEPS) 319 | endif 320 | endif 321 | endif 322 | 323 | $(OBJODIR)/%.o: %.c 324 | @mkdir -p $(OBJODIR); 325 | $(CC) $(if $(findstring $<,$(DSRCS)),$(DFLAGS),$(CFLAGS)) $(COPTS_$(*F)) -o $@ -c $< 326 | 327 | $(OBJODIR)/%.d: %.c 328 | @mkdir -p $(OBJODIR); 329 | @echo DEPEND: $(CC) -M $(CFLAGS) $< 330 | @set -e; rm -f $@; \ 331 | $(CC) -M $(CFLAGS) $< > $@.$$$$; \ 332 | sed 's,\($*\.o\)[ :]*,$(OBJODIR)/\1 $@ : ,g' < $@.$$$$ > $@; \ 333 | rm -f $@.$$$$ 334 | 335 | $(OBJODIR)/%.o: %.s 336 | @mkdir -p $(OBJODIR); 337 | $(CC) $(CFLAGS) -o $@ -c $< 338 | 339 | $(OBJODIR)/%.d: %.s 340 | @mkdir -p $(OBJODIR); \ 341 | set -e; rm -f $@; \ 342 | $(CC) -M $(CFLAGS) $< > $@.$$$$; \ 343 | sed 's,\($*\.o\)[ :]*,$(OBJODIR)/\1 $@ : ,g' < $@.$$$$ > $@; \ 344 | rm -f $@.$$$$ 345 | 346 | $(OBJODIR)/%.o: %.S 347 | @mkdir -p $(OBJODIR); 348 | $(CC) $(CFLAGS) -D__ASSEMBLER__ -o $@ -c $< 349 | 350 | $(OBJODIR)/%.d: %.S 351 | @mkdir -p $(OBJODIR); \ 352 | set -e; rm -f $@; \ 353 | $(CC) -M $(CFLAGS) $< > $@.$$$$; \ 354 | sed 's,\($*\.o\)[ :]*,$(OBJODIR)/\1 $@ : ,g' < $@.$$$$ > $@; \ 355 | rm -f $@.$$$$ 356 | 357 | $(foreach lib,$(GEN_LIBS),$(eval $(call ShortcutRule,$(lib),$(LIBODIR)))) 358 | 359 | $(foreach image,$(GEN_IMAGES),$(eval $(call ShortcutRule,$(image),$(IMAGEODIR)))) 360 | 361 | $(foreach bin,$(GEN_BINS),$(eval $(call ShortcutRule,$(bin),$(BINODIR)))) 362 | 363 | $(foreach lib,$(GEN_LIBS),$(eval $(call MakeLibrary,$(basename $(lib))))) 364 | 365 | $(foreach image,$(GEN_IMAGES),$(eval $(call MakeImage,$(basename $(image))))) 366 | 367 | ############################################################# 368 | # Recursion Magic - Don't touch this!! 369 | # 370 | # Each subtree potentially has an include directory 371 | # corresponding to the common APIs applicable to modules 372 | # rooted at that subtree. Accordingly, the INCLUDE PATH 373 | # of a module can only contain the include directories up 374 | # its parent path, and not its siblings 375 | # 376 | # Required for each makefile to inherit from the parent 377 | # 378 | 379 | INCLUDES := $(INCLUDES) -I $(PDIR)include -I $(PDIR)include/$(TARGET) 380 | PDIR := ../$(PDIR) 381 | sinclude $(PDIR)Makefile 382 | -------------------------------------------------------------------------------- /include/eagle_soc.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) Espressif System 2010 - 2012 3 | * 4 | */ 5 | 6 | #ifndef _EAGLE_SOC_H_ 7 | #define _EAGLE_SOC_H_ 8 | 9 | //Register Bits{{ 10 | #define BIT31 0x80000000 11 | #define BIT30 0x40000000 12 | #define BIT29 0x20000000 13 | #define BIT28 0x10000000 14 | #define BIT27 0x08000000 15 | #define BIT26 0x04000000 16 | #define BIT25 0x02000000 17 | #define BIT24 0x01000000 18 | #define BIT23 0x00800000 19 | #define BIT22 0x00400000 20 | #define BIT21 0x00200000 21 | #define BIT20 0x00100000 22 | #define BIT19 0x00080000 23 | #define BIT18 0x00040000 24 | #define BIT17 0x00020000 25 | #define BIT16 0x00010000 26 | #define BIT15 0x00008000 27 | #define BIT14 0x00004000 28 | #define BIT13 0x00002000 29 | #define BIT12 0x00001000 30 | #define BIT11 0x00000800 31 | #define BIT10 0x00000400 32 | #define BIT9 0x00000200 33 | #define BIT8 0x00000100 34 | #define BIT7 0x00000080 35 | #define BIT6 0x00000040 36 | #define BIT5 0x00000020 37 | #define BIT4 0x00000010 38 | #define BIT3 0x00000008 39 | #define BIT2 0x00000004 40 | #define BIT1 0x00000002 41 | #define BIT0 0x00000001 42 | //}} 43 | 44 | //Registers Operation {{ 45 | #define ETS_UNCACHED_ADDR(addr) (addr) 46 | #define ETS_CACHED_ADDR(addr) (addr) 47 | 48 | 49 | #define READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) 50 | #define WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val) 51 | #define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))) 52 | #define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))) 53 | #define GET_PERI_REG_BITS(reg, hipos,lowpos) ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)) 54 | #define SET_PERI_REG_BITS(reg,bit_map,value,shift) (WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|((value)<<(shift)) )) 55 | //}} 56 | 57 | //Periheral Clock {{ 58 | #define CPU_CLK_FREQ 80*1000000 //unit: Hz 59 | #define APB_CLK_FREQ CPU_CLK_FREQ 60 | #define UART_CLK_FREQ APB_CLK_FREQ 61 | #define TIMER_CLK_FREQ (APB_CLK_FREQ>>8) //divided by 256 62 | //}} 63 | 64 | //Peripheral device base address define{{ 65 | #define PERIPHS_DPORT_BASEADDR 0x3ff00000 66 | #define PERIPHS_GPIO_BASEADDR 0x60000300 67 | #define PERIPHS_TIMER_BASEDDR 0x60000600 68 | #define PERIPHS_RTC_BASEADDR 0x60000700 69 | #define PERIPHS_IO_MUX 0x60000800 70 | //}} 71 | 72 | //Interrupt remap control registers define{{ 73 | #define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR+0x04) 74 | #define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1) 75 | #define TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1) 76 | //}} 77 | 78 | //GPIO reg {{ 79 | #define GPIO_REG_READ(reg) READ_PERI_REG(PERIPHS_GPIO_BASEADDR + reg) 80 | #define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(PERIPHS_GPIO_BASEADDR + reg, val) 81 | #define GPIO_OUT_ADDRESS 0x00 82 | #define GPIO_OUT_W1TS_ADDRESS 0x04 83 | #define GPIO_OUT_W1TC_ADDRESS 0x08 84 | 85 | #define GPIO_ENABLE_ADDRESS 0x0c 86 | #define GPIO_ENABLE_W1TS_ADDRESS 0x10 87 | #define GPIO_ENABLE_W1TC_ADDRESS 0x14 88 | #define GPIO_OUT_W1TC_DATA_MASK 0x0000ffff 89 | 90 | #define GPIO_IN_ADDRESS 0x18 91 | 92 | #define GPIO_STATUS_ADDRESS 0x1c 93 | #define GPIO_STATUS_W1TS_ADDRESS 0x20 94 | #define GPIO_STATUS_W1TC_ADDRESS 0x24 95 | #define GPIO_STATUS_INTERRUPT_MASK 0x0000ffff 96 | 97 | #define GPIO_RTC_CALIB_SYNC PERIPHS_GPIO_BASEADDR+0x6c 98 | #define RTC_CALIB_START BIT31 //first write to zero, then to one to start 99 | #define RTC_PERIOD_NUM_MASK 0x3ff //max 8ms 100 | #define GPIO_RTC_CALIB_VALUE PERIPHS_GPIO_BASEADDR+0x70 101 | #define RTC_CALIB_RDY_S 31 //after measure, flag to one, when start from zero to one, turn to zero 102 | #define RTC_CALIB_VALUE_MASK 0xfffff 103 | 104 | #define GPIO_PIN0_ADDRESS 0x28 105 | 106 | #define GPIO_ID_PIN0 0 107 | #define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n)) 108 | #define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15) 109 | #define GPIO_ID_NONE 0xffffffff 110 | 111 | #define GPIO_PIN_COUNT 16 112 | 113 | #define GPIO_PIN_CONFIG_MSB 12 114 | #define GPIO_PIN_CONFIG_LSB 11 115 | #define GPIO_PIN_CONFIG_MASK 0x00001800 116 | #define GPIO_PIN_CONFIG_GET(x) (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB) 117 | #define GPIO_PIN_CONFIG_SET(x) (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK) 118 | 119 | #define GPIO_WAKEUP_ENABLE 1 120 | #define GPIO_WAKEUP_DISABLE (~GPIO_WAKEUP_ENABLE) 121 | #define GPIO_PIN_WAKEUP_ENABLE_MSB 10 122 | #define GPIO_PIN_WAKEUP_ENABLE_LSB 10 123 | #define GPIO_PIN_WAKEUP_ENABLE_MASK 0x00000400 124 | #define GPIO_PIN_WAKEUP_ENABLE_GET(x) (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB) 125 | #define GPIO_PIN_WAKEUP_ENABLE_SET(x) (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK) 126 | 127 | #define GPIO_PIN_INT_TYPE_MASK 0x380 128 | #define GPIO_PIN_INT_TYPE_MSB 9 129 | #define GPIO_PIN_INT_TYPE_LSB 7 130 | #define GPIO_PIN_INT_TYPE_GET(x) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB) 131 | #define GPIO_PIN_INT_TYPE_SET(x) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK) 132 | 133 | #define GPIO_PAD_DRIVER_ENABLE 1 134 | #define GPIO_PAD_DRIVER_DISABLE (~GPIO_PAD_DRIVER_ENABLE) 135 | #define GPIO_PIN_PAD_DRIVER_MSB 2 136 | #define GPIO_PIN_PAD_DRIVER_LSB 2 137 | #define GPIO_PIN_PAD_DRIVER_MASK 0x00000004 138 | #define GPIO_PIN_PAD_DRIVER_GET(x) (((x) & GPIO_PIN_PAD_DRIVER_MASK) >> GPIO_PIN_PAD_DRIVER_LSB) 139 | #define GPIO_PIN_PAD_DRIVER_SET(x) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK) 140 | 141 | #define GPIO_AS_PIN_SOURCE 0 142 | #define SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE) 143 | #define GPIO_PIN_SOURCE_MSB 0 144 | #define GPIO_PIN_SOURCE_LSB 0 145 | #define GPIO_PIN_SOURCE_MASK 0x00000001 146 | #define GPIO_PIN_SOURCE_GET(x) (((x) & GPIO_PIN_SOURCE_MASK) >> GPIO_PIN_SOURCE_LSB) 147 | #define GPIO_PIN_SOURCE_SET(x) (((x) << GPIO_PIN_SOURCE_LSB) & GPIO_PIN_SOURCE_MASK) 148 | // }} 149 | 150 | // TIMER reg {{ 151 | #define RTC_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr) 152 | #define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val) 153 | #define RTC_CLR_REG_MASK(reg, mask) CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask) 154 | /* Returns the current time according to the timer timer. */ 155 | #define NOW() RTC_REG_READ(FRC2_COUNT_ADDRESS) 156 | 157 | //load initial_value to timer1 158 | #define FRC1_LOAD_ADDRESS 0x00 159 | 160 | //timer1's counter value(count from initial_value to 0) 161 | #define FRC1_COUNT_ADDRESS 0x04 162 | 163 | #define FRC1_CTRL_ADDRESS 0x08 164 | 165 | //clear timer1's interrupt when write this address 166 | #define FRC1_INT_ADDRESS 0x0c 167 | #define FRC1_INT_CLR_MASK 0x00000001 168 | 169 | //timer2's counter value(count from initial_value to 0) 170 | #define FRC2_COUNT_ADDRESS 0x24 171 | // }} 172 | 173 | //RTC reg {{ 174 | #define REG_RTC_BASE PERIPHS_RTC_BASEADDR 175 | 176 | #define RTC_GPIO_OUT (REG_RTC_BASE + 0x068) 177 | #define RTC_GPIO_ENABLE (REG_RTC_BASE + 0x074) 178 | #define RTC_GPIO_IN_DATA (REG_RTC_BASE + 0x08C) 179 | #define RTC_GPIO_CONF (REG_RTC_BASE + 0x090) 180 | #define PAD_XPD_DCDC_CONF (REG_RTC_BASE + 0x0A0) 181 | //}} 182 | 183 | //PIN Mux reg {{ 184 | #define PERIPHS_IO_MUX_FUNC 0x13 185 | #define PERIPHS_IO_MUX_FUNC_S 4 186 | #define PERIPHS_IO_MUX_PULLUP BIT7 187 | #define PERIPHS_IO_MUX_PULLUP2 BIT6 188 | #define PERIPHS_IO_MUX_SLEEP_PULLUP BIT3 189 | #define PERIPHS_IO_MUX_SLEEP_PULLUP2 BIT2 190 | #define PERIPHS_IO_MUX_SLEEP_OE BIT1 191 | #define PERIPHS_IO_MUX_OE BIT0 192 | 193 | #define PERIPHS_IO_MUX_CONF_U (PERIPHS_IO_MUX + 0x00) 194 | #define SPI0_CLK_EQU_SYS_CLK BIT8 195 | #define SPI1_CLK_EQU_SYS_CLK BIT9 196 | #define PERIPHS_IO_MUX_MTDI_U (PERIPHS_IO_MUX + 0x04) 197 | #define FUNC_GPIO12 3 198 | #define PERIPHS_IO_MUX_MTCK_U (PERIPHS_IO_MUX + 0x08) 199 | #define FUNC_GPIO13 3 200 | #define PERIPHS_IO_MUX_MTMS_U (PERIPHS_IO_MUX + 0x0C) 201 | #define FUNC_GPIO14 3 202 | #define PERIPHS_IO_MUX_MTDO_U (PERIPHS_IO_MUX + 0x10) 203 | #define FUNC_GPIO15 3 204 | #define FUNC_U0RTS 4 205 | #define PERIPHS_IO_MUX_U0RXD_U (PERIPHS_IO_MUX + 0x14) 206 | #define FUNC_GPIO3 3 207 | #define PERIPHS_IO_MUX_U0TXD_U (PERIPHS_IO_MUX + 0x18) 208 | #define FUNC_U0TXD 0 209 | #define FUNC_GPIO1 3 210 | #define PERIPHS_IO_MUX_SD_CLK_U (PERIPHS_IO_MUX + 0x1c) 211 | #define FUNC_SDCLK 0 212 | #define FUNC_SPICLK 1 213 | #define PERIPHS_IO_MUX_SD_DATA0_U (PERIPHS_IO_MUX + 0x20) 214 | #define FUNC_SDDATA0 0 215 | #define FUNC_SPIQ 1 216 | #define FUNC_U1TXD 4 217 | #define PERIPHS_IO_MUX_SD_DATA1_U (PERIPHS_IO_MUX + 0x24) 218 | #define FUNC_SDDATA1 0 219 | #define FUNC_SPID 1 220 | #define FUNC_U1RXD 4 221 | #define FUNC_SDDATA1_U1RXD 7 222 | #define PERIPHS_IO_MUX_SD_DATA2_U (PERIPHS_IO_MUX + 0x28) 223 | #define FUNC_SDDATA2 0 224 | #define FUNC_SPIHD 1 225 | #define FUNC_GPIO9 3 226 | #define PERIPHS_IO_MUX_SD_DATA3_U (PERIPHS_IO_MUX + 0x2c) 227 | #define FUNC_SDDATA3 0 228 | #define FUNC_SPIWP 1 229 | #define FUNC_GPIO10 3 230 | #define PERIPHS_IO_MUX_SD_CMD_U (PERIPHS_IO_MUX + 0x30) 231 | #define FUNC_SDCMD 0 232 | #define FUNC_SPICS0 1 233 | #define PERIPHS_IO_MUX_GPIO0_U (PERIPHS_IO_MUX + 0x34) 234 | #define FUNC_GPIO0 0 235 | #define PERIPHS_IO_MUX_GPIO2_U (PERIPHS_IO_MUX + 0x38) 236 | #define FUNC_GPIO2 0 237 | #define FUNC_U1TXD_BK 2 238 | #define FUNC_U0TXD_BK 4 239 | #define PERIPHS_IO_MUX_GPIO4_U (PERIPHS_IO_MUX + 0x3C) 240 | #define FUNC_GPIO4 0 241 | #define PERIPHS_IO_MUX_GPIO5_U (PERIPHS_IO_MUX + 0x40) 242 | #define FUNC_GPIO5 0 243 | 244 | #define PIN_PULLUP_DIS(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP) 245 | #define PIN_PULLUP_EN(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP) 246 | 247 | #define PIN_FUNC_SELECT(PIN_NAME, FUNC) do { \ 248 | WRITE_PERI_REG(PIN_NAME, \ 249 | READ_PERI_REG(PIN_NAME) \ 250 | & (~(PERIPHS_IO_MUX_FUNC<