├── .github └── workflows │ └── build.yml ├── .gitignore ├── README.md ├── SUMMARY.md ├── assets ├── cache-address.png ├── code-block-reordering.png ├── figure-2.1.png ├── figure-2.10.png ├── figure-2.11.png ├── figure-2.12.png ├── figure-2.13.png ├── figure-2.2.png ├── figure-2.3.png ├── figure-2.4.png ├── figure-2.5.png ├── figure-2.6.png ├── figure-2.7.png ├── figure-2.8.png ├── figure-2.9.png ├── figure-3.1.png ├── figure-3.10.png ├── figure-3.11.png ├── figure-3.12.png ├── figure-3.13.png ├── figure-3.14.png ├── figure-3.15.png ├── figure-3.16.png ├── figure-3.17.png ├── figure-3.18.png ├── figure-3.19.png ├── figure-3.2.png ├── figure-3.20.png ├── figure-3.21.png ├── figure-3.22.png ├── figure-3.23.png ├── figure-3.24.png ├── figure-3.25.png ├── figure-3.26.png ├── figure-3.27.png ├── figure-3.28.png ├── figure-3.29.png ├── figure-3.3.png ├── figure-3.30.png ├── figure-3.31.png ├── figure-3.32.png ├── figure-3.4.png ├── figure-3.5.png ├── figure-3.6.png ├── figure-3.7.png ├── figure-3.8.png ├── figure-3.9.png ├── figure-4.1.png ├── figure-4.2.png ├── figure-4.4.png ├── figure-4.5.png ├── figure-5.1.png ├── figure-5.2.png ├── figure-5.4.png ├── figure-6.1.png ├── figure-6.10.png ├── figure-6.11.png ├── figure-6.13.png ├── figure-6.14.png ├── figure-6.15.png ├── figure-6.2.png ├── figure-6.4.png ├── figure-6.5.png ├── figure-6.6.png ├── figure-6.7.png ├── figure-6.8.png ├── figure-6.9a.png ├── figure-6.9b.png ├── figure-7.1.png ├── figure-7.2.png ├── figure-7.3.png ├── figure-7.7.1.png ├── figure-7.7.png └── figure-7.9.png ├── bibliography.md ├── book.json ├── commodity-hardware-today.md ├── commodity-hardware-today ├── dram-access-technical-details.md ├── dram-access-technical-details │ ├── conclusions.md │ ├── memory-types.md │ ├── precharge-and-activation.md │ ├── read-access-protocol.md │ └── recharging.md ├── other-main-memory-users.md ├── ram-types.md └── ram-types │ ├── conclusions.md │ ├── dram-access.md │ ├── dynamic-ram.md │ └── static-ram.md ├── cpu-caches.md ├── cpu-caches ├── cache-miss-factors.md ├── cache-miss-factors │ ├── cache-and-memory-bandwidth.md │ ├── cache-placement.md │ ├── critical-word-load.md │ └── fsb-influence.md ├── cache-operation-at-high-level.md ├── cpu-cache-implementation-details.md ├── cpu-cache-implementation-details │ ├── associativity.md │ ├── measurements-of-cache-effects.md │ ├── multi-processor-support.md │ ├── other-details.md │ └── write-behavior.md ├── cpu-caches-in-the-big-picture.md ├── instruction-cache.md └── instruction-cache │ └── self-modifying-code.md ├── examples-and-benchmark-programs.md ├── examples-and-benchmark-programs └── matrix-multiplication.md ├── introduction.md ├── memory-performance-tools.md ├── memory-performance-tools ├── improving-branch-prediction.md ├── measuring-memory-usage.md ├── memory-operation-profiling.md ├── page-fault-optimization.md └── simulating-cpu-caches.md ├── numa-support.md ├── numa-support ├── numa-hardware.md ├── os-support-for-numa.md ├── published-information.md └── remote-access-costs.md ├── styles └── website.css ├── virtual-memory.md ├── virtual-memory ├── impact-of-virtualization.md ├── multi-level-page-tables.md ├── optimizing-page-table-access.md ├── optimizing-page-table-access │ ├── caveats-of-using-a-tlb.md │ └── influencing-tlb-performance.md └── simplest-address-translation.md ├── what-programmers-can-do.md └── what-programmers-can-do ├── bypassing-the-cache.md ├── cache-access.md ├── cache-access ├── optimizing-level-1-data-cache-access.md ├── optimizing-level-1-instruction-cache-access.md ├── optimizing-level-2-and-higher-cache-access.md └── optimizing-tlb-usage.md ├── multi-thread-optimizations.md ├── multi-thread-optimizations ├── atomicity-optimizations.md ├── bandwidth-considerations.md └── concurrency-optimizations.md ├── numa-programming.md ├── numa-programming ├── cpu-and-node-sets.md ├── explicit-numa-optimizations.md ├── memory-policy.md ├── querying-node-information.md ├── specifying-policies.md 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