├── .gitattributes ├── DebugConfig ├── STM32F103C8T6_STM32F103C8_1.0.0.dbgconf └── Target_1_STM32F103C8_1.0.0.dbgconf ├── EvalBoard ├── DPV0_DRV │ ├── dp_if.c │ ├── dp_if.h │ ├── dp_inc.h │ ├── dp_isr.c │ └── dpl_list.h ├── DpAppl.c ├── DpAppl.h ├── DpCfg.c ├── DpCfg.h ├── DpDiag.c ├── DpPrm.c ├── Ext │ ├── DpDebug.c │ ├── DpDebug.h │ ├── STARTUP.ASM │ ├── Serio.c │ ├── extsnd1.h │ ├── hard.h │ ├── lcd.c │ ├── lcd.h │ ├── regsnd1.h │ ├── serio.h │ ├── twi.c │ └── twi.h ├── GSD │ ├── EASY4711.gsd │ ├── EASY_1N.bmp │ ├── EASY_1N.dib │ └── EASY_1S.bmp ├── main.c └── platform.h ├── EventRecorderStub.scvd ├── Firmware └── Customer │ ├── DPV0_DRV │ ├── dp_if.c │ ├── dp_if.h │ ├── dp_inc.h │ ├── dp_inc.h~RF13de7da9.TMP │ ├── dp_isr.c │ └── dpl_list.h │ ├── DpAppl.c │ ├── DpCfg.c │ ├── DpDiag.c │ ├── DpPrm.c │ ├── GSD │ ├── EASY4711.gsd │ ├── EASY_1N.bmp │ ├── EASY_1N.dib │ ├── EASY_1S.bmp │ └── Thumbs.db │ └── Inc │ ├── DpAppl.h │ ├── DpCfg.h │ └── platform.h ├── Listings ├── SPI_TESZT_VPC3.map └── startup_stm32f10x_md.lst ├── Main.c ├── Objects ├── ExtDll.iex ├── SPI_TESZT_VPC3.axf ├── SPI_TESZT_VPC3.build_log.htm ├── SPI_TESZT_VPC3.htm ├── SPI_TESZT_VPC3.lnp ├── SPI_TESZT_VPC3.sct ├── SPI_TESZT_VPC3_STM32F103C8T6.dep ├── delay.crf ├── delay.d ├── delay.o ├── dp_if.crf ├── dp_if.d ├── dp_if.o ├── dp_isr.crf ├── dp_isr.d ├── dp_isr.o ├── dpappl.crf ├── dpappl.d ├── dpappl.o ├── dpcfg.crf ├── dpcfg.d ├── dpcfg.o ├── dpdiag.crf ├── dpdiag.d ├── dpdiag.o ├── dpprm.crf ├── dpprm.d ├── dpprm.o ├── fw_main.crf ├── fw_main.d ├── fw_main.o ├── gpio_stm32f10x.crf ├── gpio_stm32f10x.d ├── gpio_stm32f10x.o ├── hd44780.crf ├── hd44780.d ├── hd44780.o ├── lcd16x2.crf ├── lcd16x2.d ├── lcd16x2.o ├── main.crf ├── main.d ├── main.o ├── misc.crf ├── misc.d ├── misc.o ├── periph_init.crf ├── periph_init.d ├── periph_init.o ├── spi_vpc3.crf ├── spi_vpc3.d ├── spi_vpc3.o ├── startup_stm32f10x_md.d ├── startup_stm32f10x_md.o ├── stm32f10x_exti.crf ├── stm32f10x_exti.d ├── stm32f10x_exti.o ├── stm32f10x_gpio.crf ├── stm32f10x_gpio.d ├── stm32f10x_gpio.o ├── stm32f10x_rcc.crf ├── stm32f10x_rcc.d ├── stm32f10x_rcc.o ├── stm32f10x_spi.crf ├── stm32f10x_spi.d ├── stm32f10x_spi.o ├── stm32f10x_tim.crf ├── stm32f10x_tim.d ├── stm32f10x_tim.o ├── stm_my_lcd16x2.d ├── system_stm32f10x.crf ├── system_stm32f10x.d ├── system_stm32f10x.o ├── test.crf ├── test.d ├── test.o ├── vpc3.crf ├── vpc3.d └── vpc3.o ├── README.md ├── RTE ├── Device │ └── STM32F103C8 │ │ ├── RTE_Device.h │ │ ├── startup_stm32f10x_md.s │ │ ├── stm32f10x_conf.h │ │ └── system_stm32f10x.c ├── _STM32F103C8T6 │ └── RTE_Components.h └── _Target_1 │ └── RTE_Components.h ├── SPI_TESZT_VPC3.uvguix.tanyigergo ├── SPI_TESZT_VPC3.uvoptx ├── SPI_TESZT_VPC3.uvprojx ├── Test ├── test.c └── test.h ├── delay.c ├── inc ├── delay.h ├── lcd16x2.h ├── periph_init.h ├── vpc3.h ├── vpc3.h~RF12ad5b58.TMP ├── vpc3.h~RFde33637.TMP └── vpc3.h~RFf03af17.TMP ├── lcd16x2.c ├── periph_init.c ├── readme.txt └── vpc3.c /.gitattributes: -------------------------------------------------------------------------------- 1 | # Auto detect text files and perform LF normalization 2 | * text=auto 3 | -------------------------------------------------------------------------------- /DebugConfig/STM32F103C8T6_STM32F103C8_1.0.0.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | // Debug MCU Configuration 3 | // DBG_SLEEP 4 | // Debug Sleep Mode 5 | // 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled 6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK 7 | // DBG_STOP 8 | // Debug Stop Mode 9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks 10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active 11 | // DBG_STANDBY 12 | // Debug Standby Mode 13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered. 14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active 15 | // DBG_IWDG_STOP 16 | // Debug independent watchdog stopped when core is halted 17 | // 0: The watchdog counter clock continues even if the core is halted 18 | // 1: The watchdog counter clock is stopped when the core is halted 19 | // DBG_WWDG_STOP 20 | // Debug window watchdog stopped when core is halted 21 | // 0: The window watchdog counter clock continues even if the core is halted 22 | // 1: The window watchdog counter clock is stopped when the core is halted 23 | // DBG_TIM1_STOP 24 | // Timer 1 counter stopped when core is halted 25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 26 | // 1: The clock of the involved Timer counter is stopped when the core is halted 27 | // DBG_TIM2_STOP 28 | // Timer 2 counter stopped when core is halted 29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 30 | // 1: The clock of the involved Timer counter is stopped when the core is halted 31 | // DBG_TIM3_STOP 32 | // Timer 3 counter stopped when core is halted 33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 34 | // 1: The clock of the involved Timer counter is stopped when the core is halted 35 | // DBG_TIM4_STOP 36 | // Timer 4 counter stopped when core is halted 37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 38 | // 1: The clock of the involved Timer counter is stopped when the core is halted 39 | // DBG_CAN1_STOP 40 | // Debug CAN1 stopped when Core is halted 41 | // 0: Same behavior as in normal mode 42 | // 1: CAN1 receive registers are frozen 43 | // DBG_I2C1_SMBUS_TIMEOUT 44 | // I2C1 SMBUS timeout mode stopped when Core is halted 45 | // 0: Same behavior as in normal mode 46 | // 1: The SMBUS timeout is frozen 47 | // DBG_I2C2_SMBUS_TIMEOUT 48 | // I2C2 SMBUS timeout mode stopped when Core is halted 49 | // 0: Same behavior as in normal mode 50 | // 1: The SMBUS timeout is frozen 51 | // DBG_TIM8_STOP 52 | // Timer 8 counter stopped when core is halted 53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 55 | // DBG_TIM5_STOP 56 | // Timer 5 counter stopped when core is halted 57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 59 | // DBG_TIM6_STOP 60 | // Timer 6 counter stopped when core is halted 61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 63 | // DBG_TIM7_STOP 64 | // Timer 7 counter stopped when core is halted 65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 67 | // DBG_CAN2_STOP 68 | // Debug CAN2 stopped when Core is halted 69 | // 0: Same behavior as in normal mode 70 | // 1: CAN2 receive registers are frozen 71 | // DBG_TIM12_STOP 72 | // Timer 12 counter stopped when core is halted 73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 75 | // DBG_TIM13_STOP 76 | // Timer 13 counter stopped when core is halted 77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 79 | // DBG_TIM14_STOP 80 | // Timer 14 counter stopped when core is halted 81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 83 | // DBG_TIM9_STOP 84 | // Timer 9 counter stopped when core is halted 85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 87 | // DBG_TIM10_STOP 88 | // Timer 10 counter stopped when core is halted 89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 91 | // DBG_TIM11_STOP 92 | // Timer 11 counter stopped when core is halted 93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 95 | // 96 | DbgMCU_CR = 0x00000007; 97 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /DebugConfig/Target_1_STM32F103C8_1.0.0.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | // Debug MCU Configuration 3 | // DBG_SLEEP 4 | // Debug Sleep Mode 5 | // 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled 6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK 7 | // DBG_STOP 8 | // Debug Stop Mode 9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks 10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active 11 | // DBG_STANDBY 12 | // Debug Standby Mode 13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered. 14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active 15 | // DBG_IWDG_STOP 16 | // Debug independent watchdog stopped when core is halted 17 | // 0: The watchdog counter clock continues even if the core is halted 18 | // 1: The watchdog counter clock is stopped when the core is halted 19 | // DBG_WWDG_STOP 20 | // Debug window watchdog stopped when core is halted 21 | // 0: The window watchdog counter clock continues even if the core is halted 22 | // 1: The window watchdog counter clock is stopped when the core is halted 23 | // DBG_TIM1_STOP 24 | // Timer 1 counter stopped when core is halted 25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 26 | // 1: The clock of the involved Timer counter is stopped when the core is halted 27 | // DBG_TIM2_STOP 28 | // Timer 2 counter stopped when core is halted 29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 30 | // 1: The clock of the involved Timer counter is stopped when the core is halted 31 | // DBG_TIM3_STOP 32 | // Timer 3 counter stopped when core is halted 33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 34 | // 1: The clock of the involved Timer counter is stopped when the core is halted 35 | // DBG_TIM4_STOP 36 | // Timer 4 counter stopped when core is halted 37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 38 | // 1: The clock of the involved Timer counter is stopped when the core is halted 39 | // DBG_CAN1_STOP 40 | // Debug CAN1 stopped when Core is halted 41 | // 0: Same behavior as in normal mode 42 | // 1: CAN1 receive registers are frozen 43 | // DBG_I2C1_SMBUS_TIMEOUT 44 | // I2C1 SMBUS timeout mode stopped when Core is halted 45 | // 0: Same behavior as in normal mode 46 | // 1: The SMBUS timeout is frozen 47 | // DBG_I2C2_SMBUS_TIMEOUT 48 | // I2C2 SMBUS timeout mode stopped when Core is halted 49 | // 0: Same behavior as in normal mode 50 | // 1: The SMBUS timeout is frozen 51 | // DBG_TIM8_STOP 52 | // Timer 8 counter stopped when core is halted 53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 55 | // DBG_TIM5_STOP 56 | // Timer 5 counter stopped when core is halted 57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 59 | // DBG_TIM6_STOP 60 | // Timer 6 counter stopped when core is halted 61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 63 | // DBG_TIM7_STOP 64 | // Timer 7 counter stopped when core is halted 65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 67 | // DBG_CAN2_STOP 68 | // Debug CAN2 stopped when Core is halted 69 | // 0: Same behavior as in normal mode 70 | // 1: CAN2 receive registers are frozen 71 | // DBG_TIM12_STOP 72 | // Timer 12 counter stopped when core is halted 73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 75 | // DBG_TIM13_STOP 76 | // Timer 13 counter stopped when core is halted 77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 79 | // DBG_TIM14_STOP 80 | // Timer 14 counter stopped when core is halted 81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 83 | // DBG_TIM9_STOP 84 | // Timer 9 counter stopped when core is halted 85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 87 | // DBG_TIM10_STOP 88 | // Timer 10 counter stopped when core is halted 89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 91 | // DBG_TIM11_STOP 92 | // Timer 11 counter stopped when core is halted 93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 95 | // 96 | DbgMCU_CR = 0x00000007; 97 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /EvalBoard/DPV0_DRV/dp_if.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DPV0_DRV/dp_if.c -------------------------------------------------------------------------------- /EvalBoard/DPV0_DRV/dp_if.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DPV0_DRV/dp_if.h -------------------------------------------------------------------------------- /EvalBoard/DPV0_DRV/dp_inc.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DPV0_DRV/dp_inc.h -------------------------------------------------------------------------------- /EvalBoard/DPV0_DRV/dp_isr.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DPV0_DRV/dp_isr.c -------------------------------------------------------------------------------- /EvalBoard/DPV0_DRV/dpl_list.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DPV0_DRV/dpl_list.h -------------------------------------------------------------------------------- /EvalBoard/DpAppl.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DpAppl.c -------------------------------------------------------------------------------- /EvalBoard/DpAppl.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DpAppl.h -------------------------------------------------------------------------------- /EvalBoard/DpCfg.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DpCfg.c -------------------------------------------------------------------------------- /EvalBoard/DpCfg.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DpCfg.h -------------------------------------------------------------------------------- /EvalBoard/DpDiag.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DpDiag.c -------------------------------------------------------------------------------- /EvalBoard/DpPrm.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/DpPrm.c -------------------------------------------------------------------------------- /EvalBoard/Ext/DpDebug.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/Ext/DpDebug.c -------------------------------------------------------------------------------- /EvalBoard/Ext/DpDebug.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/Ext/DpDebug.h -------------------------------------------------------------------------------- /EvalBoard/Ext/STARTUP.ASM: -------------------------------------------------------------------------------- 1 | ;------------------------------------------------------------------------------ 2 | ; This file is part of the C-51 Compiler package 3 | ; Copyright KEIL ELEKTRONIK GmbH 1990 4 | ;------------------------------------------------------------------------------ 5 | ; STARTUP.A51: This code is executed after processor reset. 6 | ; 7 | ; To translate this file use A51 with the following invocation: 8 | ; 9 | ; A51 STARTUP.A51 10 | ; 11 | ; To link the modified STARTUP.OBJ file to your application use the following 12 | ; L51 invocation: 13 | ; 14 | ; L51 , STARTUP.OBJ 15 | ; 16 | ;------------------------------------------------------------------------------ 17 | ; 18 | ; User-defined Power-On Initialization of Memory 19 | ; 20 | ; With the following EQU statements the initialization of memory 21 | ; at processor reset can be defined: 22 | ; 23 | ; ; the absolute start-address of IDATA memory is always 0 24 | IDATALEN EQU 80H ; the length of IDATA memory in bytes. 25 | ; 26 | XDATASTART EQU 0000H ; the absolute start-address of XDATA memory 27 | XDATALEN EQU 7FFFH ; the length of XDATA memory in bytes. 28 | ; 29 | PDATASTART EQU 0000H ; the absolute start-address of PDATA memory 30 | PDATALEN EQU 0H ; the length of PDATA memory in bytes. 31 | ; 32 | ; Notes: The IDATA space overlaps physically the DATA and BIT areas of the 33 | ; 8051 CPU. At minimum the memory space occupied from the C-51 34 | ; run-time routines must be set to zero. 35 | ;------------------------------------------------------------------------------ 36 | ; 37 | ; Reentrant Stack Initilization 38 | ; 39 | ; The following EQU statements define the stack pointer for reentrant 40 | ; functions and initialized it: 41 | ; 42 | ; Stack Space for reentrant functions in the SMALL model. 43 | IBPSTACK EQU 0 ; set to 1 if small reentrant is used. 44 | IBPSTACKTOP EQU 0FFH+1 ; set top of stack to highest location+1. 45 | ; 46 | ; Stack Space for reentrant functions in the LARGE model. 47 | XBPSTACK EQU 0 ; set to 1 if large reentrant is used. 48 | XBPSTACKTOP EQU 0FFFFH+1; set top of stack to highest location+1. 49 | ; 50 | ; Stack Space for reentrant functions in the COMPACT model. 51 | PBPSTACK EQU 0 ; set to 1 if compact reentrant is used. 52 | PBPSTACKTOP EQU 0FFFFH+1; set top of stack to highest location+1. 53 | ; 54 | ;------------------------------------------------------------------------------ 55 | ; 56 | ; Page Definition for Using the Compact Model with 64 KByte xdata RAM 57 | ; 58 | ; The following EQU statements define the xdata page used for pdata 59 | ; variables. The EQU PPAGE must conform with the PPAGE control used 60 | ; in the linker invocation. 61 | ; 62 | PPAGEENABLE EQU 1 ; set to 1 if pdata object are used. 63 | PPAGE EQU 00H ; define PPAGE number. 64 | ; 65 | ;------------------------------------------------------------------------------ 66 | 67 | NAME ?C_STARTUP 68 | 69 | 70 | ?C_C51STARTUP SEGMENT CODE 71 | ?STACK SEGMENT IDATA 72 | 73 | RSEG ?STACK 74 | DS 1 75 | 76 | EXTRN CODE (?C_START) 77 | PUBLIC ?C_STARTUP 78 | 79 | CSEG AT 0 80 | ?C_STARTUP: LJMP STARTUP1 81 | 82 | RSEG ?C_C51STARTUP 83 | 84 | STARTUP1: 85 | 86 | IF IDATALEN <> 0 87 | MOV R0,#IDATALEN - 1 88 | CLR A 89 | IDATALOOP: MOV @R0,A 90 | DJNZ R0,IDATALOOP 91 | ENDIF 92 | 93 | IF XDATALEN <> 0 94 | MOV DPTR,#XDATASTART 95 | MOV R7,#LOW (XDATALEN) 96 | IF (LOW (XDATALEN)) <> 0 97 | MOV R6,#(HIGH XDATALEN) +1 98 | ELSE 99 | MOV R6,#HIGH (XDATALEN) 100 | ENDIF 101 | CLR A 102 | XDATALOOP: MOVX @DPTR,A 103 | INC DPTR 104 | DJNZ R7,XDATALOOP 105 | DJNZ R6,XDATALOOP 106 | ENDIF 107 | 108 | IF PDATALEN <> 0 109 | MOV R0,#PDATASTART 110 | MOV R7,LOW (PDATALEN) 111 | CLR A 112 | PDATALOOP: MOVX @R0,A 113 | INC R0 114 | DJNZ R7,PDATALOOP 115 | ENDIF 116 | 117 | IF IBPSTACK <> 0 118 | EXTRN DATA (?C_IBP) 119 | 120 | MOV ?C_IBP,#LOW IBPSTACKTOP 121 | ENDIF 122 | 123 | IF XBPSTACK <> 0 124 | EXTRN DATA (?C_XBP) 125 | 126 | MOV ?C_XBP,#HIGH XBPSTACKTOP 127 | MOV ?C_XBP+1,#LOW XBPSTACKTOP 128 | ENDIF 129 | 130 | IF PBPSTACK <> 0 131 | EXTRN DATA (?C_PBP) 132 | MOV ?C_PBP,#LOW PBPSTACKTOP 133 | ENDIF 134 | 135 | IF PPAGEENABLE <> 0 136 | MOV P2,#PPAGE 137 | ENDIF 138 | 139 | MOV SP,#?STACK-1 140 | LJMP ?C_START 141 | 142 | END 143 | -------------------------------------------------------------------------------- /EvalBoard/Ext/Serio.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/Ext/Serio.c -------------------------------------------------------------------------------- /EvalBoard/Ext/extsnd1.h: -------------------------------------------------------------------------------- 1 | /*H************************************************************************** 2 | * NAME: extsnd1.h 3 | *---------------------------------------------------------------------------- 4 | * Copyright (c) 2003 Atmel. 5 | *---------------------------------------------------------------------------- 6 | * RELEASE: c5132-demo-df-smc-2_0_0 7 | * REVISION: 1.7 8 | *---------------------------------------------------------------------------- 9 | * PURPOSE: 10 | * This file is an extension to the regsnd1.h file. 11 | * It defines mask for registers. 12 | *****************************************************************************/ 13 | 14 | #ifndef _EXTSND1_H_ 15 | #define _EXTSND1_H_ 16 | 17 | /*_____ I N C L U D E S ____________________________________________________*/ 18 | 19 | 20 | /*_____ M A C R O S ________________________________________________________*/ 21 | 22 | /* INTERNAL RESSOURCES */ 23 | 24 | #define ERAM_SIZE 0x0800 25 | #define DRAM_SIZE 0x0080 26 | #define IRAM_SIZE 0x0100 27 | #define CODE_SIZE 0x10000 28 | #define BOOT_ADDRESS 0xF000 29 | #define BOOT_SIZE 0x1000 30 | 31 | 32 | /* INTERRUPT NUMBER */ 33 | 34 | #define IRQ_INT0 0 35 | #define IRQ_T0 1 36 | #define IRQ_INT1 2 37 | #define IRQ_T1 3 38 | #define IRQ_UART 4 39 | #define IRQ_MP3 5 40 | #define IRQ_AUD 6 41 | #define IRQ_MMC 7 42 | #define IRQ_I2C 8 43 | #define IRQ_SPI 9 44 | #define IRQ_ADC 10 45 | #define IRQ_KBD 11 46 | #define IRQ_USB 13 47 | 48 | 49 | /* SYSTEM MANAGEMENT */ 50 | 51 | #define MSK_SMOD1 0x80 /* PCON */ 52 | #define MSK_SMOD0 0x40 53 | #define MSK_GF1 0x08 54 | #define MSK_GF0 0x04 55 | #define MSK_PD 0x02 56 | #define MSK_IDL 0x01 57 | 58 | #define MSK_EXT16 0x40 /* AUXR */ 59 | #define MSK_M0 0x20 60 | #define MSK_DPHDIS 0x10 61 | #define MSK_XRS 0x0C 62 | #define MSK_EXTRAM 0x02 63 | #define MSK_AO 0x01 64 | #define ERAM_256 0x00 65 | #define ERAM_512 0x04 66 | #define ERAM_1024 0x08 67 | #define ERAM_2048 0x0C 68 | 69 | #define MSK_ENBOOT 0x20 /* AUXR1 */ 70 | #define MSK_GF3 0x08 71 | #define MSK_DPS 0x01 72 | 73 | 74 | /* PLL & CLOCK */ 75 | 76 | #define MSK_X2 0x01 /* CKCON */ 77 | #define MSK_T0X2 0x02 78 | #define MSK_T1X2 0x04 79 | #define MSK_WDX2 0x40 80 | 81 | #define MSK_PLOCK 0x01 /* PLLCON */ 82 | #define MSK_PLLEN 0x02 83 | #define MSK_PLLRES 0x08 84 | 85 | 86 | /* INTERRUPT */ 87 | 88 | #define MSK_EAUD 0x40 /* IEN0 */ 89 | #define MSK_EMP3 0x20 90 | #define MSK_ES 0x10 91 | #define MSK_ET1 0x08 92 | #define MSK_EX1 0x04 93 | #define MSK_ET0 0x02 94 | #define MSK_EX0 0x01 95 | 96 | #define MSK_EUSB 0x40 /* IEN1 */ 97 | #define MSK_EKB 0x10 98 | #define MSK_EADC 0x08 99 | #define MSK_ESPI 0x04 100 | #define MSK_EI2C 0x02 101 | #define MSK_EMMC 0x01 102 | 103 | 104 | /* TIMERS */ 105 | 106 | #define MSK_GATE1 0x80 /* TMOD */ 107 | #define MSK_C_T1 0x40 108 | #define MSK_MO1 0x30 109 | #define MSK_GATE0 0x08 110 | #define MSK_C_T0 0x04 111 | #define MSK_MO0 0x03 112 | 113 | 114 | /* WATCHDOG */ 115 | 116 | #define MSK_WTO 0x07 /* WDTPRG*/ 117 | 118 | 119 | /* MP3 DECODER */ 120 | 121 | #define MSK_MPANC 0x80 /* MP3STA */ 122 | #define MSK_MPREQ 0x40 123 | #define MSK_ERRLAY 0x20 124 | #define MSK_ERRSYN 0x10 125 | #define MSK_ERRCRC 0x08 126 | #define MSK_MPFS1 0x04 127 | #define MSK_MPFS0 0x02 128 | #define MSK_MPVER 0x01 129 | 130 | #define MSK_MPFREQ 0x10 /* MP3STA1 */ 131 | #define MSK_MPBREQ 0x08 132 | 133 | #define MSK_MPEN 0x80 /* MP3CON */ 134 | #define MSK_MPBBST 0x40 135 | #define MSK_CRCEN 0x20 136 | #define MSK_MSKANC 0x10 137 | #define MSK_MSKREQ 0x08 138 | #define MSK_MSKLAY 0x04 139 | #define MSK_MSKSYN 0x02 140 | #define MSK_MSKCRC 0x01 141 | 142 | #define MSK_MPFULL 0x08 /* MP3DBG */ 143 | 144 | 145 | /* AUDIO INTERFACE */ 146 | 147 | #define MSK_JUST 0xF8 /* AUDCON0 */ 148 | #define MSK_POL 0x04 149 | #define MSK_DSIZ 0x02 150 | #define MSK_HLR 0x01 151 | 152 | #define MSK_SRC 0x80 /* AUDCON1 */ 153 | #define MSK_DRQEN 0x40 154 | #define MSK_MSREQ 0x20 155 | #define MSK_MUDRN 0x10 156 | #define MSK_DUP 0x06 157 | #define MSK_AUDEN 0x01 158 | #define MSK_DUP0 0x00 /* 0 duplication */ 159 | #define MSK_DUP1 0x02 /* 1 duplication */ 160 | #define MSK_DUP2 0x04 /* 3 duplication */ 161 | #define MSK_DUP3 0x06 /* 4 duplication */ 162 | 163 | #define MSK_SREQ 0x80 /* AUDSTA */ 164 | #define MSK_UDRN 0x40 165 | #define MSK_AUBUSY 0x20 166 | 167 | 168 | /* MMC CONTROLLER */ 169 | 170 | #define MSK_CBUSY 0x20 /* MMSTA */ 171 | #define MSK_CRC16S 0x10 172 | #define MSK_DATFS 0x08 173 | #define MSK_CRC7S 0x04 174 | #define MSK_RESPFS 0x02 175 | #define MSK_CFLCK 0x01 176 | 177 | #define MSK_DRPTR 0x80 /* MMCON0 */ 178 | #define MSK_DTPTR 0x40 179 | #define MSK_CRPTR 0x20 180 | #define MSK_CTPTR 0x10 181 | #define MSK_MBLOCK 0x08 182 | #define MSK_DFMT 0x04 183 | #define MSK_RFMT 0x02 184 | #define MSK_CRCDIS 0x01 185 | 186 | #define MSK_BLEN 0xF0 /* MMCON1 */ 187 | #define MSK_DATDIR 0x08 188 | #define MSK_DATEN 0x04 189 | #define MSK_RESPEN 0x02 190 | #define MSK_CMDEN 0x01 191 | 192 | #define MSK_MMCEN 0x80 /* MMCON2 */ 193 | #define MSK_DCR 0x40 194 | #define MSK_CCR 0x20 195 | #define MSK_DATD 0x06 196 | #define MSK_FLOWC 0x01 197 | 198 | #define MSK_MCBI 0x80 /* MMINT */ 199 | #define MSK_EORI 0x40 200 | #define MSK_EOCI 0x20 201 | #define MSK_EOFI 0x10 202 | #define MSK_F2FI 0x08 203 | #define MSK_F1FI 0x04 204 | #define MSK_F2EI 0x02 205 | #define MSK_F1EI 0x01 206 | 207 | #define MSK_MCBM 0x80 /* MMMSK */ 208 | #define MSK_EORM 0x40 209 | #define MSK_EOCM 0x20 210 | #define MSK_EOFM 0x10 211 | #define MSK_F2FM 0x08 212 | #define MSK_F1FM 0x04 213 | #define MSK_F2EM 0x02 214 | #define MSK_F1EM 0x01 215 | 216 | 217 | /* SPI CONTROLLER */ 218 | 219 | #define MSK_SPR 0x83 /* SPCON */ 220 | #define MSK_SPEN 0x40 221 | #define MSK_SSDIS 0x20 222 | #define MSK_MSTR 0x10 223 | #define MSK_MODE 0x0C 224 | #define MSK_CPOL 0x08 225 | #define MSK_CPHA 0x04 226 | 227 | #define MSK_SPIF 0x80 /* SPSTA */ 228 | #define MSK_WCOL 0x40 229 | #define MSK_MODF 0x10 230 | 231 | 232 | /* TWI CONTROLLER */ 233 | 234 | #define MSK_SSCR 0x83 /* SSCON */ 235 | #define MSK_SSPE 0x40 236 | #define MSK_SSSTA 0x20 237 | #define MSK_SSSTO 0x10 238 | #define MSK_SSSI 0x08 239 | #define MSK_SSAA 0x04 240 | 241 | 242 | /* KEYBOARD */ 243 | 244 | #define MSK_KINL 0xF0 /* KBCON */ 245 | #define MSK_KINM 0x0F 246 | 247 | #define MSK_KPDE 0x80 /* KBSTA */ 248 | #define MSK_KINF 0x0F 249 | 250 | 251 | /* ADC CONVERTER */ 252 | 253 | #define MSK_ADIDL 0x40 /* ADCON */ 254 | #define MSK_ADEN 0x20 255 | #define MSK_ADEOC 0x10 256 | #define MSK_ADSST 0x08 257 | #define MSK_ADCS 0x01 258 | 259 | #define MSK_ADATL 0x03 /* ADDL */ 260 | 261 | #define F_CONV_MAX 700 /* 700 KHz max frequency */ 262 | 263 | #define AIN0 0x01 /* Analog Inputs */ 264 | #define AIN1 0x00 265 | 266 | 267 | /* USB */ 268 | 269 | #define MSK_TXCMPL 0x01 /* UEPSTAX */ 270 | #define MSK_RXOUTB0 0x02 271 | #define MSK_RXOUT 0x02 272 | #define MSK_RXSETUP 0x04 273 | #define MSK_STALLED 0x08 274 | #define MSK_TXRDY 0x10 275 | #define MSK_STALLRQ 0x20 276 | #define MSK_RXOUTB1 0x40 277 | #define MSK_DIR 0x80 278 | 279 | #define MSK_RXOUTB0B1 0x42 /* Ping-Pong abilities */ 280 | 281 | #define MSK_SPINT 0x01 /* USBINT */ 282 | #define MSK_SOFINT 0x08 283 | #define MSK_EORINT 0x10 284 | #define MSK_WUPCPU 0x20 285 | 286 | #define MSK_SUSPCLK 0x40 287 | 288 | //ADDED 289 | 290 | #define MSK_ESPINT 0x01 291 | #define MSK_EEORINT 0x10 292 | #define MSK_EWUPCPU 0x20 293 | 294 | #define MSK_USBE 0x80 /* USBCON */ 295 | #define MSK_CONFG 0x02 296 | #define MSK_FADDEN 0x01 297 | #define MSK_UPRSM 0x08 298 | #define MSK_SDRMWUP 0x20 299 | #define MSK_RMWUPE 0x04 300 | 301 | #endif /* _EXTSND1_H_ */ 302 | -------------------------------------------------------------------------------- /EvalBoard/Ext/hard.h: -------------------------------------------------------------------------------- 1 | /*H************************************************************************** 2 | * NAME: hard.h 3 | *---------------------------------------------------------------------------- 4 | * Copyright (c) 2003 Atmel. 5 | *---------------------------------------------------------------------------- 6 | * RELEASE: c5132-demo-nf-mmc-2_0_0 7 | * REVISION: 1.22 8 | *---------------------------------------------------------------------------- 9 | * PURPOSE: 10 | * This file contains the low-level memory definition 11 | *****************************************************************************/ 12 | 13 | #ifndef _HARD_H_ 14 | #define _HARD_H_ 15 | 16 | /*_____ I N C L U D E S ____________________________________________________*/ 17 | 18 | #ifndef MEM_CHIP_TYPE 19 | #error MEM_CHIP_TYPE must be defined in config.h 20 | #define MEM_CHIP_TYPE CHIP_NONE 21 | #endif 22 | #ifndef MEM_CARD_TYPE 23 | #error MEM_CARD_TYPE must be defined in config.h 24 | #define MEM_CARD_TYPE CARD_NONE 25 | #endif 26 | 27 | /*_____ M A C R O S ________________________________________________________*/ 28 | 29 | /*----- Memory type -----*/ 30 | #define MEM_CHIP ((bit)0) /* on-board memory */ 31 | #define MEM_CARD ((bit)1) /* memory card */ 32 | 33 | #define MEM_DFC ((bit)0) /* data flash card*/ 34 | #define MEM_SD ((bit)1) /* sd */ 35 | 36 | #define CHIP_NONE 0 37 | #define CHIP_NF 1 38 | #define CHIP_DF 2 39 | #define CHIP_HDD 3 40 | 41 | #define CARD_NONE 0 42 | #define CARD_MMC 1 43 | #define CARD_SD 2 44 | #define CARD_CF 3 45 | #define CARD_SMC 4 46 | #define CARD_CDR 5 47 | #define CARD_DF 6 48 | #define CARD_SD_DFC 7 49 | 50 | #define NF_1X_512B 0 51 | #define NF_2X_512B 1 52 | #define NF_1X_2KB 2 53 | #define NF_2X_2KB 3 54 | #define NF_1X 4 55 | 56 | #ifdef NotUsed 57 | 58 | #if (MEM_CARD_TYPE == CARD_NONE) && (MEM_CHIP_TYPE == CHIP_NONE) 59 | #error No card and chip type defined in config.h 60 | #endif 61 | 62 | #if MEM_CHIP_TYPE == CHIP_NF 63 | #ifndef NF_CONFIG 64 | #error NF_CONFIG must be defined in config.h 65 | #endif 66 | #if NF_CONFIG == NF_1X_512B 67 | #include "lib_mem\nf_1x_512b\nf.h" /* single NF/512B definition */ 68 | #elif NF_CONFIG == NF_2X_512B 69 | #include "lib_mem\nf_2x_512b\nf.h" /* double NF/512B definition */ 70 | #elif NF_CONFIG == NF_1X_2KB 71 | #include "lib_mem\nf_1x_2kb\nf.h" /* single NF/2KB definition */ 72 | #elif NF_CONFIG == NF_2X_2KB 73 | #include "lib_mem\nf_2x_2kb\nf.h" /* Double NF/2KB definition */ 74 | #elif NF_CONFIG == NF_1X 75 | #include "lib_mem\nf_1x\nf.h" /* Single NF/512B or 2KB definition */ 76 | #else 77 | #error NF_CONFIG baddly defined in config.h 78 | #endif 79 | #define Chip_init() nf_init() 80 | #define Chip_install() nf_read_spare_byte() 81 | #define Chip_uninstall() nf_uninstall() 82 | #define Chip_read_byte() nf_read_byte() 83 | #define Chip_read_open(pos) nf_read_open(pos) 84 | #define Chip_read_close() nf_read_close() 85 | #define Chip_write_byte(b) nf_write_byte(b) 86 | #define Chip_write_open(pos) nf_write_open(pos) 87 | #define Chip_write_close() nf_write_close() 88 | #define Chip_format() nf_format() 89 | #elif MEM_CHIP_TYPE == CHIP_DF 90 | #include "lib_mem\df\df.h" /* dataflash definition */ 91 | #define Chip_init() df_init() 92 | #define Chip_install() df_init_mem() 93 | #define Chip_uninstall() df_uninstall() 94 | #define Chip_read_byte() df_read_byte() 95 | #define Chip_read_open(pos) df_read_open(pos) 96 | #define Chip_read_close() df_read_close() 97 | #define Chip_write_byte(b) df_write_byte(b) 98 | #define Chip_write_open(pos) df_write_open(pos) 99 | #define Chip_write_close() df_write_close() 100 | #define Chip_format() df_format() 101 | #elif MEM_CHIP_TYPE == CHIP_HDD 102 | #include "lib_mem\ide\hdd.h" /* hard disk definition */ 103 | #define Chip_init() OK 104 | #define Chip_install() ata_install(0) 105 | #define Chip_uninstall() hdd_uninstall() 106 | #define Chip_read_byte() hdd_read_byte() 107 | #define Chip_read_open(pos) hdd_read_open(pos, 1) 108 | #define Chip_read_close() hdd_read_close() 109 | #define Chip_write_byte(b) hdd_write_byte(b) 110 | #define Chip_write_open(pos) hdd_write_open(pos, 1) 111 | #define Chip_write_close() hdd_write_close() 112 | #define Chip_format() hdd_format() 113 | #define Chip_read_long_big_endian() hdd_read_long_big_endian() 114 | #define Chip_read_one_sector() hdd_read_one_sector() 115 | #define Chip_write_one_sector() hdd_write_one_sector() 116 | #define Chip_get_capacity() (Uint32)(hdd_mem_size) 117 | #else 118 | #define Chip_install() KO 119 | #define Chip_uninstall() 120 | #endif 121 | 122 | #endif//#ifdef NotUsed 123 | 124 | #define Chip_read_open(pos) memory_read_open(pos) 125 | #define Chip_read_byte() memory_read_byte() 126 | #define Chip_read_close() memory_read_close() 127 | 128 | #define Chip_write_byte(b) memory_write_byte(b) 129 | #define Chip_write_open(pos) memory_write_open(pos) 130 | #define Chip_write_close() memory_write_close() 131 | 132 | #define Chip_format() memory_format() 133 | 134 | #include "mmc.h" /* multimediacard definition */ 135 | #define Card_init() OK 136 | #define Card_install() mmc_install() 137 | #define Card_uninstall() mmc_uninstall() 138 | #define Card_read_byte() mmc_read_byte() 139 | #define Card_read_open(pos) mmc_read_open(pos) 140 | #define Card_read_close() mmc_read_close() 141 | #define Card_write_byte(b) mmc_write_byte(b) 142 | #define Card_write_open(pos) mmc_write_open(pos) 143 | #define Card_write_close() mmc_write_close() 144 | #define Card_format() mmc_format() 145 | #define Card_select_next() mmc_change() 146 | #define Card_check_presence() mmc_check_presence() 147 | #define Card_get_socket() mmc_get_selected_card() 148 | #define CARD_SOCKET_NB 2 149 | 150 | /*_____ D E F I N I T I O N ________________________________________________*/ 151 | 152 | extern bdata bit gl_memory; /* selected memory */ 153 | extern bit gl_sd_dfc; /* select df / mmc card*/ 154 | 155 | /*_____ D E C L A R A T I O N ______________________________________________*/ 156 | 157 | #define Hard_chip_init() Chip_init() 158 | #define Hard_chip_install() Chip_install() 159 | #define Hard_chip_uninstall() Chip_uninstall() 160 | #define Hard_card_init() Card_init() 161 | #define Hard_card_install() Card_install() 162 | #define Hard_card_uninstall() Card_uninstall() 163 | 164 | #if MEM_CARD_TYPE == CARD_NONE 165 | #define Hard_read_byte() Chip_read_byte() 166 | #define Hard_read_open(pos) Chip_read_open(pos) 167 | #define Hard_read_close() Chip_read_close() 168 | #define Hard_write_byte(b) Chip_write_byte(b) 169 | #define Hard_write_open(pos) Chip_write_open(pos) 170 | #define Hard_write_close() Chip_write_close() 171 | #define Hard_format() Chip_format() 172 | #define Hard_read_long_big_endian() Chip_read_long_big_endian() 173 | #define Hard_load_sector() Chip_read_one_sector() 174 | #define Hard_download_sector() Chip_write_one_sector() 175 | #define Hard_get_capacity() Chip_get_capacity() 176 | #endif 177 | 178 | #if MEM_CHIP_TYPE == CHIP_NONE 179 | #define Hard_read_byte() Card_read_byte() 180 | #define Hard_read_open(pos) Card_read_open(pos) 181 | #define Hard_read_close() Card_read_close() 182 | #define Hard_write_byte(b) Card_write_byte(b) 183 | #define Hard_write_open(pos) Card_write_open(pos) 184 | #define Hard_write_close() Card_write_close() 185 | #define Hard_format() Card_format() 186 | #define Hard_read_long_big_endian() Card_read_long_big_endian() 187 | #define Hard_load_sector() Card_read_one_sector() 188 | #define Hard_download_sector() Card_write_one_sector() 189 | #define Hard_iso_read_byte() Card_read_byte() 190 | #define Hard_iso_read_word() Card_read_word() 191 | #define Hard_iso_read_open(pos) Card_read_open(pos) 192 | #define Hard_iso_read_close() Card_read_close() 193 | #define Hard_iso_read_toc() Card_read_toc() 194 | #define Hard_iso_ready() Card_ready() 195 | #endif 196 | 197 | #if ((MEM_CHIP_TYPE != CHIP_NONE) && (MEM_CARD_TYPE != CARD_NONE)) 198 | #if ((MEM_CHIP_TYPE == CHIP_HDD) && (MEM_CARD_TYPE == CARD_CDR)) 199 | #define Hard_read_byte() Chip_read_byte() 200 | #define Hard_read_open(pos) Chip_read_open(pos) 201 | #define Hard_read_close() Chip_read_close() 202 | #define Hard_write_byte(b) Chip_write_byte(b) 203 | #define Hard_write_open(pos) Chip_write_open(pos) 204 | #define Hard_write_close() Chip_write_close() 205 | #define Hard_format() Chip_format() 206 | #define Hard_read_long_big_endian() Chip_read_long_big_endian() 207 | #define Hard_load_sector() Chip_read_one_sector() 208 | #define Hard_download_sector() Chip_write_one_sector() 209 | #define Hard_get_capacity() Chip_get_capacity() 210 | #define Hard_iso_read_byte() Card_read_byte() 211 | #define Hard_iso_read_open(pos) Card_read_open(pos) 212 | #define Hard_iso_read_close() Card_read_close() 213 | #define Hard_iso_read_toc() Card_read_toc() 214 | #define Hard_iso_read_word() Card_read_word() 215 | #define Hard_iso_ready() Card_ready() 216 | #else 217 | #define Hard_read_byte() ((gl_memory == MEM_CHIP) ? Chip_read_byte() : Card_read_byte()) 218 | #define Hard_read_open(pos) ((gl_memory == MEM_CHIP) ? Chip_read_open(pos) : Card_read_open(pos)) 219 | #define Hard_read_close() ((gl_memory == MEM_CHIP) ? Chip_read_close() : Card_read_close()) 220 | #define Hard_write_byte(b) ((gl_memory == MEM_CHIP) ? Chip_write_byte(b) : Card_write_byte(b)) 221 | #define Hard_write_open(pos) ((gl_memory == MEM_CHIP) ? Chip_write_open(pos) : Card_write_open(pos)) 222 | #define Hard_write_close() ((gl_memory == MEM_CHIP) ? Chip_write_close() : Card_write_close()) 223 | #define Hard_format() ((gl_memory == MEM_CHIP) ? Chip_format() : Card_format()) 224 | #define Hard_read_long_big_endian() ((gl_memory == MEM_CHIP) ? Chip_read_long_big_endian() : Card_read_long_big_endian()) 225 | #define Hard_load_sector() ((gl_memory == MEM_CHIP) ? Chip_read_one_sector() : Card_read_one_sector()) 226 | #define Hard_download_sector() ((gl_memory == MEM_CHIP) ? Chip_write_one_sector() : Card_write_one_sector()) 227 | #endif 228 | #endif 229 | 230 | #endif /* _HARD_H_ */ 231 | 232 | -------------------------------------------------------------------------------- /EvalBoard/Ext/lcd.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/Ext/lcd.c -------------------------------------------------------------------------------- /EvalBoard/Ext/lcd.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/Ext/lcd.h -------------------------------------------------------------------------------- /EvalBoard/Ext/regsnd1.h: -------------------------------------------------------------------------------- 1 | /*H************************************************************************** 2 | * NAME: regsnd1.h 3 | *---------------------------------------------------------------------------- 4 | * Copyright (c) 2003 Atmel. 5 | *---------------------------------------------------------------------------- 6 | * RELEASE: c5132-demo-df-smc-2_0_0 7 | * REVISION: 1.6 8 | *---------------------------------------------------------------------------- 9 | * PURPOSE: 10 | * This file defines the T8xC51SND1 component: 11 | * - Register SFRs 12 | * - Bit SFRs 13 | *****************************************************************************/ 14 | 15 | #ifndef _REGSND1_H_ 16 | #define _REGSND1_H_ 17 | 18 | /*_____ I N C L U D E S ____________________________________________________*/ 19 | 20 | 21 | /*_____ M A C R O S ________________________________________________________*/ 22 | 23 | 24 | /* C51 CORE */ 25 | #define Sfr(x, y) sfr x = y 26 | #define Sbit(x, y, z) sbit x = y^z 27 | #define Sfr16(x,y) sfr16 x = y 28 | 29 | Sfr (A , 0xE0); 30 | Sfr (ACC , 0xE0); 31 | Sfr (B , 0xF0); 32 | Sfr (PSW , 0xD0); 33 | Sfr (SP , 0x81); 34 | Sfr (DPL , 0x82); 35 | Sfr (DPH , 0x83); 36 | Sfr16 (DPTR , 0x82); 37 | 38 | Sbit (CY , PSW , 7); 39 | Sbit (AC , PSW , 6); 40 | Sbit (F0 , PSW , 5); 41 | Sbit (RS1 , PSW , 4); 42 | Sbit (RS0 , PSW , 3); 43 | Sbit (OV , PSW , 2); 44 | Sbit (F1 , PSW , 1); 45 | Sbit (P , PSW , 0); 46 | 47 | 48 | /* SYSTEM MANAGEMENT */ 49 | 50 | Sfr (PCON , 0x87); 51 | Sfr (AUXR , 0x8E); 52 | Sfr (AUXR1 , 0xA2); 53 | Sfr (NVERS , 0xFB); 54 | 55 | 56 | /* PLL & CLOCK */ 57 | 58 | Sfr (CKCON , 0x8F); 59 | Sfr (PLLCON , 0xE9); 60 | Sfr (PLLDIV0 , 0xEE); 61 | Sfr (PLLNDIV , 0xEE); 62 | Sfr (PLLDIV1 , 0xEF); 63 | Sfr (PLLRDIV , 0xEF); 64 | 65 | 66 | /* INTERRUPT */ 67 | 68 | Sfr (IEN0 , 0xA8); 69 | Sfr (IPL0 , 0xB8); 70 | Sfr (IPH0 , 0xB7); 71 | Sfr (IEN1 , 0xB1); 72 | Sfr (IPL1 , 0xB2); 73 | Sfr (IPH1 , 0xB3); 74 | 75 | Sbit (EA , IEN0 , 7); 76 | Sbit (EAUD , IEN0 , 6); 77 | Sbit (EMP3 , IEN0 , 5); 78 | Sbit (ES , IEN0 , 4); 79 | Sbit (ET1 , IEN0 , 3); 80 | Sbit (EX1 , IEN0 , 2); 81 | Sbit (ET0 , IEN0 , 1); 82 | Sbit (EX0 , IEN0 , 0); 83 | 84 | Sbit (IPLAUD , IPL0 , 6); 85 | Sbit (IPLMP3 , IPL0 , 5); 86 | Sbit (IPLS , IPL0 , 4); 87 | Sbit (IPLT1 , IPL0 , 3); 88 | Sbit (IPLX1 , IPL0 , 2); 89 | Sbit (IPLT0 , IPL0 , 1); 90 | Sbit (IPLX0 , IPL0 , 0); 91 | 92 | 93 | /* PORTS */ 94 | 95 | Sfr (P0 , 0x80); 96 | Sfr (P1 , 0x90); 97 | Sfr (P2 , 0xA0); 98 | Sfr (P3 , 0xB0); 99 | Sfr (P4 , 0xC0); 100 | Sfr (P5 , 0xD8); 101 | 102 | Sbit (P0_7 , P0 , 7); 103 | Sbit (P0_6 , P0 , 6); 104 | Sbit (P0_5 , P0 , 5); 105 | Sbit (P0_4 , P0 , 4); 106 | Sbit (P0_3 , P0 , 3); 107 | Sbit (P0_2 , P0 , 2); 108 | Sbit (P0_1 , P0 , 1); 109 | Sbit (P0_0 , P0 , 0); 110 | 111 | Sbit (P1_7 , P1 , 7); 112 | Sbit (P1_6 , P1 , 6); 113 | Sbit (P1_5 , P1 , 5); 114 | Sbit (P1_4 , P1 , 4); 115 | Sbit (P1_3 , P1 , 3); 116 | Sbit (P1_2 , P1 , 2); 117 | Sbit (P1_1 , P1 , 1); 118 | Sbit (P1_0 , P1 , 0); 119 | 120 | Sbit (SDA , P1 , 7); 121 | Sbit (SCL , P1 , 6); 122 | Sbit (KIN3 , P1 , 3); 123 | Sbit (KIN2 , P1 , 2); 124 | Sbit (KIN1 , P1 , 1); 125 | Sbit (KIN0 , P1 , 0); 126 | 127 | Sbit (P2_7 , P2 , 7); 128 | Sbit (P2_6 , P2 , 6); 129 | Sbit (P2_5 , P2 , 5); 130 | Sbit (P2_4 , P2 , 4); 131 | Sbit (P2_3 , P2 , 3); 132 | Sbit (P2_2 , P2 , 2); 133 | Sbit (P2_1 , P2 , 1); 134 | Sbit (P2_0 , P2 , 0); 135 | 136 | Sbit (P3_7 , P3 , 7); 137 | Sbit (P3_6 , P3 , 6); 138 | Sbit (P3_5 , P3 , 5); 139 | Sbit (P3_4 , P3 , 4); 140 | Sbit (P3_3 , P3 , 3); 141 | Sbit (P3_2 , P3 , 2); 142 | Sbit (P3_1 , P3 , 1); 143 | Sbit (P3_0 , P3 , 0); 144 | 145 | Sbit (RD , P3 , 7); 146 | Sbit (WR , P3 , 6); 147 | Sbit (T1 , P3 , 5); 148 | Sbit (T0 , P3 , 4); 149 | Sbit (INT1 , P3 , 3); 150 | Sbit (INT0 , P3 , 2); 151 | Sbit (TXD , P3 , 1); 152 | Sbit (RXD , P3 , 0); 153 | 154 | Sbit (P4_7 , P4 , 7); 155 | Sbit (P4_6 , P4 , 6); 156 | Sbit (P4_5 , P4 , 5); 157 | Sbit (P4_4 , P4 , 4); 158 | Sbit (P4_3 , P4 , 3); 159 | Sbit (P4_2 , P4 , 2); 160 | Sbit (P4_1 , P4 , 1); 161 | Sbit (P4_0 , P4 , 0); 162 | 163 | Sbit (SS_ , P4 , 3); 164 | Sbit (SCK , P4 , 2); 165 | Sbit (MOSI , P4 , 1); 166 | Sbit (MISO , P4 , 0); 167 | 168 | Sbit (P5_3 , P5 , 3); 169 | Sbit (P5_2 , P5 , 2); 170 | Sbit (P5_1 , P5 , 1); 171 | Sbit (P5_0 , P5 , 0); 172 | 173 | 174 | /* FLASH MEMORY */ 175 | 176 | Sfr (FCON , 0xD1); 177 | 178 | 179 | /* TIMERS */ 180 | 181 | Sfr (TCON , 0x88); 182 | Sfr (TMOD , 0x89); 183 | Sfr (TL0 , 0x8A); 184 | Sfr (TL1 , 0x8B); 185 | Sfr (TH0 , 0x8C); 186 | Sfr (TH1 , 0x8D); 187 | 188 | Sbit (TF1 , TCON , 7); 189 | Sbit (TR1 , TCON , 6); 190 | Sbit (TF0 , TCON , 5); 191 | Sbit (TR0 , TCON , 4); 192 | Sbit (IE1 , TCON , 3); 193 | Sbit (IT1 , TCON , 2); 194 | Sbit (IE0 , TCON , 1); 195 | Sbit (IT0 , TCON , 0); 196 | 197 | 198 | /* WATCHDOG */ 199 | 200 | Sfr (WDTRST , 0xA6); 201 | Sfr (WDTPRG , 0xA7); 202 | 203 | 204 | /* MP3 DECODER */ 205 | 206 | Sfr (MP3CON , 0xAA); 207 | Sfr (MP3STA , 0xC8); 208 | Sfr (MP3STA1 , 0xAF); 209 | Sfr (MP3DAT , 0xAC); 210 | Sfr (MP3ANC , 0xAD); 211 | Sfr (MP3VOL , 0x9E); 212 | Sfr (MP3VOR , 0x9F); 213 | Sfr (MP3BAS , 0xB4); 214 | Sfr (MP3MED , 0xB5); 215 | Sfr (MP3TRE , 0xB6); 216 | Sfr (MP3CLK , 0xEB); 217 | Sfr (MP3DBG , 0xAE); /* hidden register */ 218 | 219 | Sbit (MPANC , MP3STA, 7); 220 | Sbit (MPREQ , MP3STA, 6); 221 | Sbit (ERRLAY , MP3STA, 5); 222 | Sbit (ERRSYN , MP3STA, 4); 223 | Sbit (ERRCRC , MP3STA, 3); 224 | Sbit (MPFS1 , MP3STA, 2); 225 | Sbit (MPFS0 , MP3STA, 1); 226 | Sbit (MPVER , MP3STA, 0); 227 | 228 | 229 | /* AUDIO INTERFACE */ 230 | 231 | Sfr (AUDCON0 , 0x9A); 232 | Sfr (AUDCON1 , 0x9B); 233 | Sfr (AUDSTA , 0x9C); 234 | Sfr (AUDDAT , 0x9D); 235 | Sfr (AUDCLK , 0xEC); 236 | 237 | 238 | /* USB CONTROLLER */ 239 | 240 | Sfr (USBCON , 0xBC); 241 | Sfr (USBADDR , 0xC6); 242 | Sfr (USBINT , 0xBD); 243 | Sfr (USBIEN , 0xBE); 244 | Sfr (UEPNUM , 0xC7); 245 | Sfr (UEPCONX , 0xD4); 246 | Sfr (UEPSTAX , 0xCE); 247 | Sfr (UEPRST , 0xD5); 248 | Sfr (UEPINT , 0xF8); 249 | Sfr (UEPIEN , 0xC2); 250 | Sfr (UEPDATX , 0xCF); 251 | Sfr (UBYCTX , 0xE2); 252 | Sfr (UBYCTLX , 0xE2); 253 | Sfr (UFNUML , 0xBA); 254 | Sfr (UFNUMH , 0xBB); 255 | Sfr (USBCLK , 0xEA); 256 | Sfr (UDPADDH , 0xD7); 257 | Sfr (UDPADDL , 0xD6); 258 | 259 | Sbit (EP3INT , UEPINT, 3); 260 | Sbit (EP2INT , UEPINT, 2); 261 | Sbit (EP1INT , UEPINT, 1); 262 | Sbit (EP0INT , UEPINT, 0); 263 | 264 | 265 | /* MMC CONTROLLER */ 266 | 267 | Sfr (MMDAT , 0xDC); 268 | Sfr (MMCMD , 0xDD); 269 | Sfr (MMSTA , 0xDE); 270 | Sfr (MMMSK , 0xDF); 271 | Sfr (MMCON0 , 0xE4); 272 | Sfr (MMCON1 , 0xE5); 273 | Sfr (MMCON2 , 0xE6); 274 | Sfr (MMINT , 0xE7); 275 | Sfr (MMCLK , 0xED); 276 | 277 | 278 | /* IDE CONTROLLER */ 279 | 280 | Sfr (DAT16H , 0xF9); 281 | 282 | 283 | /* UART */ 284 | 285 | Sfr (SCON , 0x98); 286 | Sfr (SBUF , 0x99); 287 | Sfr (SADDR , 0xA9); 288 | Sfr (SADEN , 0xB9); 289 | Sfr (BDRCON , 0x92); 290 | Sfr (BRL , 0x91); 291 | 292 | Sbit (SM0 , SCON , 7); 293 | Sbit (FE , SCON , 7); 294 | Sbit (SM1 , SCON , 6); 295 | Sbit (SM2 , SCON , 5); 296 | Sbit (REN , SCON , 4); 297 | Sbit (TB8 , SCON , 3); 298 | Sbit (RB8 , SCON , 2); 299 | Sbit (TI , SCON , 1); 300 | Sbit (RI , SCON , 0); 301 | 302 | 303 | /* SPI CONTROLLER */ 304 | 305 | Sfr (SPCON , 0xC3); 306 | Sfr (SPSTA , 0xC4); 307 | Sfr (SPDAT , 0xC5); 308 | 309 | 310 | /* I2C CONTROLLER */ 311 | 312 | Sfr (SSCON , 0x93); 313 | Sfr (SSSTA , 0x94); 314 | Sfr (SSDAT , 0x95); 315 | Sfr (SSADR , 0x96); 316 | 317 | 318 | /* KEYBOARD */ 319 | 320 | Sfr (KBCON , 0xA3); 321 | Sfr (KBSTA , 0xA4); 322 | 323 | 324 | /* ADC CONVERTER */ 325 | 326 | Sfr (ADCON , 0xF3); 327 | Sfr (ADDL , 0xF4); 328 | Sfr (ADDH , 0xF5); 329 | Sfr (ADCLK , 0xF2); 330 | 331 | 332 | #endif /* _REGSND1_H_ */ 333 | -------------------------------------------------------------------------------- /EvalBoard/Ext/serio.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/Ext/serio.h -------------------------------------------------------------------------------- /EvalBoard/Ext/twi.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/Ext/twi.c -------------------------------------------------------------------------------- /EvalBoard/Ext/twi.h: -------------------------------------------------------------------------------- 1 | 2 | #ifndef _I2C_LIB_H_ 3 | #define _I2C_LIB_H_ 4 | 5 | #define I2C_NB_SLAVE_DATA 100 6 | 7 | 8 | /*_____ D E F I N I T I O N S ______________________________________________*/ 9 | 10 | typedef struct 11 | { 12 | uint8_t bAddress; 13 | uint16_t wLocalAddress; 14 | uint8_t bRw; 15 | uint16_t wNrOfByte; 16 | uint8_t *pToData; 17 | } I2C_type_message; 18 | 19 | /*_____ D E C L A R A T I O N ______________________________________________*/ 20 | 21 | extern bit b_I2C_busy; 22 | extern unsigned char I2C_Err; 23 | extern xdata I2C_type_message I2C_message; // The I2C message to be sent in Master Mode 24 | extern unsigned char xdata I2C_slave_data[I2C_NB_SLAVE_DATA]; //The slave data buffer when I2C ask in slave 25 | 26 | 27 | /*_____ M A C R O S ________________________________________________________*/ 28 | 29 | 30 | #define I2C_RATIO_256 0x00 31 | #define I2C_RATIO_224 0x01 32 | #define I2C_RATIO_192 0x02 33 | #define I2C_RATIO_160 0x03 34 | #define I2C_RATIO_960 0x80 35 | #define I2C_RATIO_120 0x81 36 | #define I2C_RATIO_60 0x82 37 | #define I2C_RATIO_TIMER1 0x83 38 | 39 | #define I2C_CR2 0x80 40 | #define I2C_SSIE 0x40 41 | #define I2C_STA 0x20 42 | #define I2C_STO 0x10 43 | #define I2C_SI 0x08 44 | #define I2C_AA 0x04 45 | #define I2C_CR1 0x02 46 | #define I2C_CR0 0x01 47 | 48 | #define I2C_WAIT_EVENT { while ( (SSCON & I2C_SI) != I2C_SI ); } 49 | #define I2C_SET_START { SSCON |= I2C_STA; } 50 | #define I2C_CLEAR_START { SSCON &= ~I2C_STA; } 51 | #define I2C_SET_STOP { SSCON |= I2C_STO; } 52 | #define I2C_CLEAR_STOP { SSCON &= ~I2C_STO; } 53 | #define I2C_SET_AA { SSCON |= I2C_AA; } 54 | #define I2C_CLEAR_AA { SSCON &= ~I2C_AA; } 55 | #define I2C_CLEAR_SI { SSCON &= ~I2C_SI; } 56 | 57 | 58 | 59 | #define Tranfer_OK 0 60 | #define BusError 1 61 | #define NoHostAdrAck 2 62 | #define NoHostDataAck 3 63 | #define ArbitrationLost 4 64 | #define UnknownError 5 65 | #define I2C_NOT_FREE 6 66 | 67 | 68 | #define I2C_READ 1 69 | #define I2C_WRITE 0 70 | 71 | /*_____ P R O T O T Y P E S ____________________________________________________________*/ 72 | 73 | unsigned char I2C_baud_rate (unsigned int ratio); 74 | uint8_t I2C_Send_Message_polling( uint8_t bSlaveAddr, uint16_t wLocalAddress, uint8_t bRw, uint16_t wNrOfByte, uint8_t * pToData ); 75 | unsigned char I2C_Send_Message_interrupt( unsigned char slave_adr,bit rw, unsigned char nbytes, unsigned char *info); 76 | void I2C_decode_status(); 77 | unsigned char I2C_slave_polling(void); 78 | void I2C_slave_interrupt(void); 79 | void I2C_Init(void); 80 | 81 | void I2CReadVpc3Byte ( uint8_t bAddress, uint16_t wSubAddress, uint16_t wNrOfBytes, uint8_t * pToData ); 82 | void I2CWriteVpc3Byte ( uint8_t bAddress, uint16_t wSubAddress, uint16_t wNrOfBytes, uint8_t * pToData ); 83 | 84 | void DebugI2CReadVpc3Byte ( uint8_t bAddress, uint16_t wSubAddress, uint16_t wNrOfBytes, uint8_t * pToData ); 85 | void DebugI2CWriteVpc3Byte ( uint8_t bAddress, uint16_t wSubAddress, uint16_t wNrOfBytes, uint8_t * pToData ); 86 | 87 | #endif /* _I2C_H_ */ -------------------------------------------------------------------------------- /EvalBoard/GSD/EASY4711.gsd: -------------------------------------------------------------------------------- 1 | ; 2 | ;********************* GSD-Datei for VPC3 Demo application ************************** 3 | ;* ================================================================================ * 4 | ;* * 5 | ;* Vendor: profichip GmbH * 6 | ;* Einsteinstr. 6 * 7 | ;* 91074 Herzogenaurach * 8 | ;* Germany * 9 | ;* Tel.: ++49-9132-744-200 * 10 | ;* FAX.: ++49-9132-744-204 * 11 | ;* * 12 | ;* ================================================================================ * 13 | ;* * 14 | ;* Function: Demo for PROFICHIP Software * 15 | ;* * 16 | ;* * 17 | ;* Order Number : PA007062 * 18 | ;* * 19 | ;* -------------------------------------------------------------------------------- * 20 | ;* author: P. Fredehorst * 21 | ;* * 22 | ;* Tel.: ++49-9132-744-214 * 23 | ;* FAX.: ++49-9132-744-204 * 24 | ;* -------------------------------------------------------------------------------- * 25 | ;* * 26 | ;* history * 27 | ;* ================================================================================ * 28 | ;* 09.09.2005 [V1.00] Urversion * 29 | ;* * 30 | ;* -------------------------------------------------------------------------------- * 31 | ;* * 32 | ;************************************************************************************ 33 | 34 | 35 | #Profibus_DP 36 | 37 | 38 | ;==================================================================================== 39 | ;==== Prm-Text-Def-List ============================================================= 40 | ;==================================================================================== 41 | 42 | ;===================================================================================== 43 | ;==== Ext-User-Prm-Data-Def-List ===================================================== 44 | ;===================================================================================== 45 | 46 | 47 | ;===================================================================================== 48 | ;==== General DP Keywords ============================================================ 49 | ;===================================================================================== 50 | 51 | GSD_Revision = 5 52 | Vendor_Name = "profichip GmbH" 53 | Model_Name = "EASY4711" 54 | Revision = "1.00" 55 | Ident_Number = 0x4711 56 | Protocol_Ident = 0 57 | Station_Type = 0 58 | FMS_supp = 0 59 | Hardware_Release = "V1.00" 60 | Software_Release = "V1.00" 61 | Redundancy = 0 62 | Repeater_Ctrl_Sig = 2 63 | 24V_Pins = 0 64 | 65 | 66 | ;============================================================================== 67 | ;==== Supported baudrates ===================================================== 68 | ;============================================================================== 69 | 70 | 9.6_supp = 1 71 | 19.2_supp = 1 72 | 45.45_supp = 1 73 | 93.75_supp = 1 74 | 187.5_supp = 1 75 | 500_supp = 1 76 | 1.5M_supp = 1 77 | 3M_supp = 1 78 | 6M_supp = 1 79 | 12M_supp = 1 80 | 81 | MaxTsdr_9.6=15 82 | MaxTsdr_19.2=15 83 | MaxTsdr_45.45=15 84 | MaxTsdr_93.75=15 85 | MaxTsdr_187.5=15 86 | MaxTsdr_500=15 87 | MaxTsdr_1.5M=20 88 | MaxTsdr_3M=35 89 | MaxTsdr_6M=50 90 | MaxTsdr_12M=95 91 | 92 | 93 | ;============================================================================== 94 | ;==== Slave specific values =================================================== 95 | ;============================================================================== 96 | 97 | OrderNumber="PA006300" 98 | Slave_Family = 3@profichip GmbH@EvaKit_ATMEL89C5132 99 | Implementation_Type = "VPC3+" 100 | Info_Text="PROFICHIP: PROFIBUS DPV0 - slave, Project EASY4711" 101 | Bitmap_Device = "EASY_1N" 102 | 103 | Freeze_Mode_supp=1 104 | Sync_Mode_supp=1 105 | Fail_Safe=1 106 | Auto_Baud_supp=1 107 | Set_Slave_Add_supp=0 108 | 109 | Min_Slave_Intervall=6 110 | 111 | Modular_Station=0 112 | Max_Diag_Data_Len=6 113 | 114 | ;============================================================================== 115 | ;==== User-Prm-Data =========================================================== 116 | ;============================================================================== 117 | 118 | Max_User_Prm_Data_Len = 3 119 | Ext_User_Prm_Data_Const(0)= 0x00,0x00,0x00 120 | 121 | 122 | ;============================================================================== 123 | ;==== Module-Definition-List ================================================== 124 | ;============================================================================== 125 | 126 | Module="DIO16" 0x31 127 | 1 128 | EndModule 129 | 130 | 131 | -------------------------------------------------------------------------------- /EvalBoard/GSD/EASY_1N.bmp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/GSD/EASY_1N.bmp -------------------------------------------------------------------------------- /EvalBoard/GSD/EASY_1N.dib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/GSD/EASY_1N.dib -------------------------------------------------------------------------------- /EvalBoard/GSD/EASY_1S.bmp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/GSD/EASY_1S.bmp -------------------------------------------------------------------------------- /EvalBoard/main.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/main.c -------------------------------------------------------------------------------- /EvalBoard/platform.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/EvalBoard/platform.h -------------------------------------------------------------------------------- /EventRecorderStub.scvd: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | -------------------------------------------------------------------------------- /Firmware/Customer/DPV0_DRV/dp_if.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DPV0_DRV/dp_if.c -------------------------------------------------------------------------------- /Firmware/Customer/DPV0_DRV/dp_if.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DPV0_DRV/dp_if.h -------------------------------------------------------------------------------- /Firmware/Customer/DPV0_DRV/dp_inc.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DPV0_DRV/dp_inc.h -------------------------------------------------------------------------------- /Firmware/Customer/DPV0_DRV/dp_inc.h~RF13de7da9.TMP: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DPV0_DRV/dp_inc.h~RF13de7da9.TMP -------------------------------------------------------------------------------- /Firmware/Customer/DPV0_DRV/dp_isr.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DPV0_DRV/dp_isr.c -------------------------------------------------------------------------------- /Firmware/Customer/DPV0_DRV/dpl_list.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DPV0_DRV/dpl_list.h -------------------------------------------------------------------------------- /Firmware/Customer/DpAppl.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DpAppl.c -------------------------------------------------------------------------------- /Firmware/Customer/DpCfg.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DpCfg.c -------------------------------------------------------------------------------- /Firmware/Customer/DpDiag.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DpDiag.c -------------------------------------------------------------------------------- /Firmware/Customer/DpPrm.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/DpPrm.c -------------------------------------------------------------------------------- /Firmware/Customer/GSD/EASY4711.gsd: -------------------------------------------------------------------------------- 1 | ; 2 | ;********************* GSD-Datei for VPC3 Demo application ************************** 3 | ;* ================================================================================ * 4 | ;* * 5 | ;* Vendor: profichip GmbH * 6 | ;* Einsteinstr. 6 * 7 | ;* 91074 Herzogenaurach * 8 | ;* Germany * 9 | ;* Tel.: ++49-9132-744-200 * 10 | ;* FAX.: ++49-9132-744-204 * 11 | ;* * 12 | ;* ================================================================================ * 13 | ;* * 14 | ;* Function: Demo for PROFICHIP Software * 15 | ;* * 16 | ;* * 17 | ;* Order Number : PA007062 * 18 | ;* * 19 | ;* -------------------------------------------------------------------------------- * 20 | ;* author: P. Fredehorst * 21 | ;* * 22 | ;* Tel.: ++49-9132-744-214 * 23 | ;* FAX.: ++49-9132-744-204 * 24 | ;* -------------------------------------------------------------------------------- * 25 | ;* * 26 | ;* history * 27 | ;* ================================================================================ * 28 | ;* 09.09.2005 [V1.00] Urversion * 29 | ;* * 30 | ;* -------------------------------------------------------------------------------- * 31 | ;* * 32 | ;************************************************************************************ 33 | 34 | 35 | #Profibus_DP 36 | 37 | 38 | ;==================================================================================== 39 | ;==== Prm-Text-Def-List ============================================================= 40 | ;==================================================================================== 41 | 42 | ;===================================================================================== 43 | ;==== Ext-User-Prm-Data-Def-List ===================================================== 44 | ;===================================================================================== 45 | 46 | 47 | ;===================================================================================== 48 | ;==== General DP Keywords ============================================================ 49 | ;===================================================================================== 50 | 51 | GSD_Revision = 5 52 | Vendor_Name = "profichip GmbH" 53 | Model_Name = "EASY4711" 54 | Revision = "1.00" 55 | Ident_Number = 0x4711 56 | Protocol_Ident = 0 57 | Station_Type = 0 58 | FMS_supp = 0 59 | Hardware_Release = "V1.00" 60 | Software_Release = "V1.00" 61 | Redundancy = 0 62 | Repeater_Ctrl_Sig = 2 63 | 24V_Pins = 0 64 | 65 | 66 | ;============================================================================== 67 | ;==== Supported baudrates ===================================================== 68 | ;============================================================================== 69 | 70 | 9.6_supp = 1 71 | 19.2_supp = 1 72 | 45.45_supp = 1 73 | 93.75_supp = 1 74 | 187.5_supp = 1 75 | 500_supp = 1 76 | 1.5M_supp = 1 77 | 3M_supp = 1 78 | 6M_supp = 1 79 | 12M_supp = 1 80 | 81 | MaxTsdr_9.6=15 82 | MaxTsdr_19.2=15 83 | MaxTsdr_45.45=15 84 | MaxTsdr_93.75=15 85 | MaxTsdr_187.5=15 86 | MaxTsdr_500=15 87 | MaxTsdr_1.5M=20 88 | MaxTsdr_3M=35 89 | MaxTsdr_6M=50 90 | MaxTsdr_12M=95 91 | 92 | 93 | ;============================================================================== 94 | ;==== Slave specific values =================================================== 95 | ;============================================================================== 96 | 97 | OrderNumber="PA006300" 98 | Slave_Family = 3@profichip GmbH@EvaKit_ATMEL89C5132 99 | Implementation_Type = "VPC3+" 100 | Info_Text="PROFICHIP: PROFIBUS DPV0 - slave, Project EASY4711" 101 | Bitmap_Device = "EASY_1N" 102 | 103 | Freeze_Mode_supp=1 104 | Sync_Mode_supp=1 105 | Fail_Safe=1 106 | Auto_Baud_supp=1 107 | Set_Slave_Add_supp=0 108 | 109 | Min_Slave_Intervall=6 110 | 111 | Modular_Station=0 112 | Max_Diag_Data_Len=6 113 | 114 | ;============================================================================== 115 | ;==== User-Prm-Data =========================================================== 116 | ;============================================================================== 117 | 118 | Max_User_Prm_Data_Len = 3 119 | Ext_User_Prm_Data_Const(0)= 0x00,0x00,0x00 120 | 121 | 122 | ;============================================================================== 123 | ;==== Module-Definition-List ================================================== 124 | ;============================================================================== 125 | 126 | Module="DIO16" 0x31 127 | 1 128 | EndModule 129 | 130 | 131 | -------------------------------------------------------------------------------- /Firmware/Customer/GSD/EASY_1N.bmp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/GSD/EASY_1N.bmp -------------------------------------------------------------------------------- /Firmware/Customer/GSD/EASY_1N.dib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/GSD/EASY_1N.dib -------------------------------------------------------------------------------- /Firmware/Customer/GSD/EASY_1S.bmp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/GSD/EASY_1S.bmp -------------------------------------------------------------------------------- /Firmware/Customer/GSD/Thumbs.db: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/GSD/Thumbs.db -------------------------------------------------------------------------------- /Firmware/Customer/Inc/DpAppl.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/Inc/DpAppl.h -------------------------------------------------------------------------------- /Firmware/Customer/Inc/DpCfg.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/Inc/DpCfg.h -------------------------------------------------------------------------------- /Firmware/Customer/Inc/platform.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Firmware/Customer/Inc/platform.h -------------------------------------------------------------------------------- /Main.c: -------------------------------------------------------------------------------- 1 | /* 2 | *A simple est application with two switches connected to the stm32 3 | *Switch_1(ON/OFF) starts/stops a counter, whose data is constantly being sent over profibus to plc 4 | *Switch_2(ON/OFF) simply toggles a bit in a variable, which is also sent to plc 5 | */ 6 | 7 | #include "stm32f10x.h" 8 | #include "delay.h" 9 | #include "lcd16x2.h" 10 | #include "periph_init.h" 11 | #include "vpc3.h" 12 | #include "test.h" 13 | #include "DpAppl.h" 14 | 15 | 16 | int main(void) 17 | { 18 | /******************************Init peripherals******************************************************/ 19 | myRCC_Init(); 20 | myGPIO_Init(); 21 | mySPI_Init(); 22 | DelayInit(); 23 | lcd16x2_init(LCD16X2_DISPLAY_ON_CURSOR_OFF_BLINK_OFF); 24 | SPI_Cmd(SPI1, ENABLE); 25 | 26 | 27 | volatile uint8_t masterData[2]; //2 bytes of data for the PB master device 28 | uint8_t kapcs; //var for button press 29 | 30 | DpAppl_SetResetVPC3Channel1(); 31 | DpAppl_ProfibusInit(); 32 | 33 | 34 | 35 | while(1) 36 | { 37 | 38 | DpAppl_ProfibusMain(); 39 | kapcs = GPIOB->IDR; 40 | 41 | if(kapcs & 64){ 42 | 43 | sDpAppl.abDpInputData[0]++; 44 | } 45 | 46 | if(kapcs & 128){ 47 | 48 | sDpAppl.abDpInputData[1]=1; 49 | } 50 | 51 | else sDpAppl.abDpInputData[1]=0; 52 | 53 | }//while(1) 54 | } 55 | 56 | /******************************end main****************************************/ 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | -------------------------------------------------------------------------------- /Objects/ExtDll.iex: -------------------------------------------------------------------------------- 1 | [EXTDLL] 2 | Count=0 3 | -------------------------------------------------------------------------------- /Objects/SPI_TESZT_VPC3.axf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/SPI_TESZT_VPC3.axf -------------------------------------------------------------------------------- /Objects/SPI_TESZT_VPC3.build_log.htm: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/SPI_TESZT_VPC3.build_log.htm -------------------------------------------------------------------------------- /Objects/SPI_TESZT_VPC3.lnp: -------------------------------------------------------------------------------- 1 | --cpu Cortex-M3 2 | ".\objects\main.o" 3 | ".\objects\periph_init.o" 4 | ".\objects\vpc3.o" 5 | ".\objects\delay.o" 6 | ".\objects\lcd16x2.o" 7 | ".\objects\dpappl.o" 8 | ".\objects\dpcfg.o" 9 | ".\objects\dpdiag.o" 10 | ".\objects\dpprm.o" 11 | ".\objects\dp_if.o" 12 | ".\objects\dp_isr.o" 13 | ".\objects\test.o" 14 | ".\objects\misc.o" 15 | ".\objects\stm32f10x_exti.o" 16 | ".\objects\stm32f10x_gpio.o" 17 | ".\objects\stm32f10x_rcc.o" 18 | ".\objects\stm32f10x_spi.o" 19 | ".\objects\stm32f10x_tim.o" 20 | ".\objects\startup_stm32f10x_md.o" 21 | ".\objects\system_stm32f10x.o" 22 | --strict --scatter ".\Objects\SPI_TESZT_VPC3.sct" 23 | --summary_stderr --info summarysizes --map --xref --callgraph --symbols 24 | --info sizes --info totals --info unused --info veneers 25 | --list ".\Listings\SPI_TESZT_VPC3.map" -o .\Objects\SPI_TESZT_VPC3.axf -------------------------------------------------------------------------------- /Objects/SPI_TESZT_VPC3.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00010000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00010000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00005000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /Objects/delay.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/delay.crf -------------------------------------------------------------------------------- /Objects/delay.d: -------------------------------------------------------------------------------- 1 | .\objects\delay.o: delay.c 2 | .\objects\delay.o: .\inc\delay.h 3 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\delay.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\delay.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\delay.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\delay.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | -------------------------------------------------------------------------------- /Objects/delay.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/delay.o -------------------------------------------------------------------------------- /Objects/dp_if.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dp_if.crf -------------------------------------------------------------------------------- /Objects/dp_if.d: -------------------------------------------------------------------------------- 1 | .\objects\dp_if.o: Firmware\Customer\DPV0_DRV\dp_if.c 2 | .\objects\dp_if.o: .\inc\lcd16x2.h 3 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\dp_if.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\dp_if.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\dp_if.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\dp_if.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | .\objects\dp_if.o: .\inc\delay.h 20 | .\objects\dp_if.o: .\Firmware\Customer\Inc\platform.h 21 | .\objects\dp_if.o: .\Firmware\Customer\Inc\DpCfg.h 22 | .\objects\dp_if.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 23 | .\objects\dp_if.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 24 | .\objects\dp_if.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 25 | .\objects\dp_if.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h 26 | .\objects\dp_if.o: .\Firmware\Customer\Inc\platform.h 27 | .\objects\dp_if.o: .\Test\test.h 28 | -------------------------------------------------------------------------------- /Objects/dp_if.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dp_if.o -------------------------------------------------------------------------------- /Objects/dp_isr.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dp_isr.crf -------------------------------------------------------------------------------- /Objects/dp_isr.d: -------------------------------------------------------------------------------- 1 | .\objects\dp_isr.o: Firmware\Customer\DPV0_DRV\dp_isr.c 2 | .\objects\dp_isr.o: .\inc\lcd16x2.h 3 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\dp_isr.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\dp_isr.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\dp_isr.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\dp_isr.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | .\objects\dp_isr.o: .\inc\delay.h 20 | .\objects\dp_isr.o: .\Firmware\Customer\Inc\platform.h 21 | .\objects\dp_isr.o: .\Firmware\Customer\Inc\DpCfg.h 22 | .\objects\dp_isr.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 23 | .\objects\dp_isr.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 24 | .\objects\dp_isr.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 25 | .\objects\dp_isr.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h 26 | .\objects\dp_isr.o: .\Firmware\Customer\Inc\platform.h 27 | -------------------------------------------------------------------------------- /Objects/dp_isr.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dp_isr.o -------------------------------------------------------------------------------- /Objects/dpappl.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dpappl.crf -------------------------------------------------------------------------------- /Objects/dpappl.d: -------------------------------------------------------------------------------- 1 | .\objects\dpappl.o: Firmware\Customer\DpAppl.c 2 | .\objects\dpappl.o: .\inc\lcd16x2.h 3 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\dpappl.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\dpappl.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\dpappl.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\dpappl.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | .\objects\dpappl.o: .\inc\delay.h 20 | .\objects\dpappl.o: .\Firmware\Customer\Inc\platform.h 21 | .\objects\dpappl.o: .\Firmware\Customer\Inc\DpCfg.h 22 | .\objects\dpappl.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 23 | .\objects\dpappl.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 24 | .\objects\dpappl.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 25 | .\objects\dpappl.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h 26 | .\objects\dpappl.o: .\Firmware\Customer\Inc\platform.h 27 | .\objects\dpappl.o: .\Firmware\Customer\Inc\DpAppl.h 28 | -------------------------------------------------------------------------------- /Objects/dpappl.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dpappl.o -------------------------------------------------------------------------------- /Objects/dpcfg.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dpcfg.crf -------------------------------------------------------------------------------- /Objects/dpcfg.d: -------------------------------------------------------------------------------- 1 | .\objects\dpcfg.o: Firmware\Customer\DpCfg.c 2 | .\objects\dpcfg.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h 3 | .\objects\dpcfg.o: .\Firmware\Customer\Inc\platform.h 4 | .\objects\dpcfg.o: .\Firmware\Customer\Inc\DpCfg.h 5 | .\objects\dpcfg.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 6 | .\objects\dpcfg.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 7 | .\objects\dpcfg.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 8 | .\objects\dpcfg.o: .\Firmware\Customer\Inc\DpAppl.h 9 | -------------------------------------------------------------------------------- /Objects/dpcfg.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dpcfg.o -------------------------------------------------------------------------------- /Objects/dpdiag.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dpdiag.crf -------------------------------------------------------------------------------- /Objects/dpdiag.d: -------------------------------------------------------------------------------- 1 | .\objects\dpdiag.o: Firmware\Customer\DpDiag.c 2 | .\objects\dpdiag.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h 3 | .\objects\dpdiag.o: .\Firmware\Customer\Inc\platform.h 4 | .\objects\dpdiag.o: .\Firmware\Customer\Inc\DpCfg.h 5 | .\objects\dpdiag.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 6 | .\objects\dpdiag.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 7 | .\objects\dpdiag.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 8 | -------------------------------------------------------------------------------- /Objects/dpdiag.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dpdiag.o -------------------------------------------------------------------------------- /Objects/dpprm.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dpprm.crf -------------------------------------------------------------------------------- /Objects/dpprm.d: -------------------------------------------------------------------------------- 1 | .\objects\dpprm.o: Firmware\Customer\DpPrm.c 2 | .\objects\dpprm.o: .\Firmware\Customer\Inc\platform.h 3 | .\objects\dpprm.o: .\Firmware\Customer\Inc\DpCfg.h 4 | .\objects\dpprm.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 5 | .\objects\dpprm.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 6 | .\objects\dpprm.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 7 | -------------------------------------------------------------------------------- /Objects/dpprm.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/dpprm.o -------------------------------------------------------------------------------- /Objects/fw_main.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/fw_main.crf -------------------------------------------------------------------------------- /Objects/fw_main.d: -------------------------------------------------------------------------------- 1 | .\objects\fw_main.o: Firmware\Customer\FW_main.c 2 | .\objects\fw_main.o: .\Firmware\Customer\Inc\platform.h 3 | .\objects\fw_main.o: .\Firmware\Customer\Inc\DpCfg.h 4 | .\objects\fw_main.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 5 | .\objects\fw_main.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 6 | .\objects\fw_main.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 7 | -------------------------------------------------------------------------------- /Objects/fw_main.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/fw_main.o -------------------------------------------------------------------------------- /Objects/gpio_stm32f10x.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/gpio_stm32f10x.crf -------------------------------------------------------------------------------- /Objects/gpio_stm32f10x.d: -------------------------------------------------------------------------------- 1 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\RTE_Driver\GPIO_STM32F10x.c 2 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\RTE_Driver\GPIO_STM32F10x.h 3 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h 4 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 5 | .\objects\gpio_stm32f10x.o: .\RTE\_STM32F103C8T6\RTE_Components.h 6 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 7 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 8 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 9 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 10 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 11 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 12 | .\objects\gpio_stm32f10x.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 13 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 14 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 15 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 16 | .\objects\gpio_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 17 | -------------------------------------------------------------------------------- /Objects/gpio_stm32f10x.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/gpio_stm32f10x.o -------------------------------------------------------------------------------- /Objects/hd44780.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/hd44780.crf -------------------------------------------------------------------------------- /Objects/hd44780.d: -------------------------------------------------------------------------------- 1 | .\objects\hd44780.o: ..\..\stm32-hd44780-master\hd44780.c 2 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 3 | .\objects\hd44780.o: .\RTE\_STM32F103C8T6\RTE_Components.h 4 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 5 | .\objects\hd44780.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 6 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 7 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 8 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 9 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 10 | .\objects\hd44780.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 11 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 12 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 13 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 14 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 15 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 16 | .\objects\hd44780.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 17 | .\objects\hd44780.o: ..\..\stm32-hd44780-master\hd44780.h 18 | -------------------------------------------------------------------------------- /Objects/hd44780.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/hd44780.o -------------------------------------------------------------------------------- /Objects/lcd16x2.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/lcd16x2.crf -------------------------------------------------------------------------------- /Objects/lcd16x2.d: -------------------------------------------------------------------------------- 1 | .\objects\lcd16x2.o: lcd16x2.c 2 | .\objects\lcd16x2.o: .\inc\lcd16x2.h 3 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\lcd16x2.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\lcd16x2.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | .\objects\lcd16x2.o: .\inc\delay.h 20 | .\objects\lcd16x2.o: .\Firmware\Customer\Inc\platform.h 21 | .\objects\lcd16x2.o: .\Firmware\Customer\Inc\DpCfg.h 22 | .\objects\lcd16x2.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 23 | .\objects\lcd16x2.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 24 | .\objects\lcd16x2.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 25 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h 26 | .\objects\lcd16x2.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h 27 | -------------------------------------------------------------------------------- /Objects/lcd16x2.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/lcd16x2.o -------------------------------------------------------------------------------- /Objects/main.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/main.crf -------------------------------------------------------------------------------- /Objects/main.d: -------------------------------------------------------------------------------- 1 | .\objects\main.o: Main.c 2 | .\objects\main.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 3 | .\objects\main.o: .\RTE\_STM32F103C8T6\RTE_Components.h 4 | .\objects\main.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 5 | .\objects\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 6 | .\objects\main.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 7 | .\objects\main.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 8 | .\objects\main.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 9 | .\objects\main.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 10 | .\objects\main.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 11 | .\objects\main.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 12 | .\objects\main.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 13 | .\objects\main.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 14 | .\objects\main.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 15 | .\objects\main.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 16 | .\objects\main.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 17 | .\objects\main.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 18 | .\objects\main.o: .\inc\delay.h 19 | .\objects\main.o: .\inc\lcd16x2.h 20 | .\objects\main.o: .\Firmware\Customer\Inc\platform.h 21 | .\objects\main.o: .\Firmware\Customer\Inc\DpCfg.h 22 | .\objects\main.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 23 | .\objects\main.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 24 | .\objects\main.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 25 | .\objects\main.o: .\inc\periph_init.h 26 | .\objects\main.o: .\inc\vpc3.h 27 | .\objects\main.o: .\Firmware\Customer\Inc\platform.h 28 | .\objects\main.o: .\Firmware\Customer\Inc\DpAppl.h 29 | .\objects\main.o: .\Test\test.h 30 | .\objects\main.o: .\Firmware\Customer\Inc\DpAppl.h 31 | -------------------------------------------------------------------------------- /Objects/main.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/main.o -------------------------------------------------------------------------------- /Objects/misc.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/misc.crf -------------------------------------------------------------------------------- /Objects/misc.d: -------------------------------------------------------------------------------- 1 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\src\misc.c 2 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 3 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\misc.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\misc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\misc.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\misc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | -------------------------------------------------------------------------------- /Objects/misc.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/misc.o -------------------------------------------------------------------------------- /Objects/periph_init.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/periph_init.crf -------------------------------------------------------------------------------- /Objects/periph_init.d: -------------------------------------------------------------------------------- 1 | .\objects\periph_init.o: periph_init.c 2 | .\objects\periph_init.o: .\inc\periph_init.h 3 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\periph_init.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\periph_init.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\periph_init.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\periph_init.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | -------------------------------------------------------------------------------- /Objects/periph_init.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/periph_init.o -------------------------------------------------------------------------------- /Objects/spi_vpc3.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/spi_vpc3.crf -------------------------------------------------------------------------------- /Objects/spi_vpc3.d: -------------------------------------------------------------------------------- 1 | .\objects\spi_vpc3.o: spi_vpc3.c 2 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 3 | .\objects\spi_vpc3.o: .\RTE\_STM32F103C8T6\RTE_Components.h 4 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 5 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 6 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 7 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 8 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 9 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 10 | .\objects\spi_vpc3.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 11 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 12 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 13 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 14 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 15 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 16 | .\objects\spi_vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 17 | .\objects\spi_vpc3.o: .\inc\spi_vpc3.h 18 | .\objects\spi_vpc3.o: .\inc\delay.h 19 | .\objects\spi_vpc3.o: .\Firmware\Customer\Inc\platform.h 20 | .\objects\spi_vpc3.o: .\Firmware\Customer\Inc\DpCfg.h 21 | .\objects\spi_vpc3.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 22 | .\objects\spi_vpc3.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 23 | .\objects\spi_vpc3.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 24 | -------------------------------------------------------------------------------- /Objects/spi_vpc3.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/spi_vpc3.o -------------------------------------------------------------------------------- /Objects/startup_stm32f10x_md.d: -------------------------------------------------------------------------------- 1 | .\objects\startup_stm32f10x_md.o: RTE\Device\STM32F103C8\startup_stm32f10x_md.s 2 | -------------------------------------------------------------------------------- /Objects/startup_stm32f10x_md.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/startup_stm32f10x_md.o -------------------------------------------------------------------------------- /Objects/stm32f10x_exti.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_exti.crf -------------------------------------------------------------------------------- /Objects/stm32f10x_exti.d: -------------------------------------------------------------------------------- 1 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\src\stm32f10x_exti.c 2 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 3 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\stm32f10x_exti.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\stm32f10x_exti.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 14 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 15 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\stm32f10x_exti.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | -------------------------------------------------------------------------------- /Objects/stm32f10x_exti.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_exti.o -------------------------------------------------------------------------------- /Objects/stm32f10x_gpio.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_gpio.crf -------------------------------------------------------------------------------- /Objects/stm32f10x_gpio.d: -------------------------------------------------------------------------------- 1 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\src\stm32f10x_gpio.c 2 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 3 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\stm32f10x_gpio.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\stm32f10x_gpio.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\stm32f10x_gpio.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | -------------------------------------------------------------------------------- /Objects/stm32f10x_gpio.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_gpio.o -------------------------------------------------------------------------------- /Objects/stm32f10x_rcc.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_rcc.crf -------------------------------------------------------------------------------- /Objects/stm32f10x_rcc.d: -------------------------------------------------------------------------------- 1 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\src\stm32f10x_rcc.c 2 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 3 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\stm32f10x_rcc.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\stm32f10x_rcc.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\stm32f10x_rcc.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | -------------------------------------------------------------------------------- /Objects/stm32f10x_rcc.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_rcc.o -------------------------------------------------------------------------------- /Objects/stm32f10x_spi.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_spi.crf -------------------------------------------------------------------------------- /Objects/stm32f10x_spi.d: -------------------------------------------------------------------------------- 1 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\src\stm32f10x_spi.c 2 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 3 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\stm32f10x_spi.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\stm32f10x_spi.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\stm32f10x_spi.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | -------------------------------------------------------------------------------- /Objects/stm32f10x_spi.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_spi.o -------------------------------------------------------------------------------- /Objects/stm32f10x_tim.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_tim.crf -------------------------------------------------------------------------------- /Objects/stm32f10x_tim.d: -------------------------------------------------------------------------------- 1 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\src\stm32f10x_tim.c 2 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 3 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 4 | .\objects\stm32f10x_tim.o: .\RTE\_STM32F103C8T6\RTE_Components.h 5 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 6 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 7 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 8 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 9 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 10 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 11 | .\objects\stm32f10x_tim.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 12 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 13 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 14 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 15 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 16 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 17 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 18 | .\objects\stm32f10x_tim.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 19 | -------------------------------------------------------------------------------- /Objects/stm32f10x_tim.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/stm32f10x_tim.o -------------------------------------------------------------------------------- /Objects/stm_my_lcd16x2.d: -------------------------------------------------------------------------------- 1 | .\objects\stm_my_lcd16x2.o: ..\..\LCD16x2_youtube\STM_MY_LCD16X2.c 2 | -------------------------------------------------------------------------------- /Objects/system_stm32f10x.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/system_stm32f10x.crf -------------------------------------------------------------------------------- /Objects/system_stm32f10x.d: -------------------------------------------------------------------------------- 1 | .\objects\system_stm32f10x.o: RTE\Device\STM32F103C8\system_stm32f10x.c 2 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 3 | .\objects\system_stm32f10x.o: .\RTE\_STM32F103C8T6\RTE_Components.h 4 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 5 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 6 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 7 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 8 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 9 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 10 | .\objects\system_stm32f10x.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 11 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 12 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 13 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 14 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 15 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 16 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 17 | .\objects\system_stm32f10x.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 18 | -------------------------------------------------------------------------------- /Objects/system_stm32f10x.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/system_stm32f10x.o -------------------------------------------------------------------------------- /Objects/test.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/test.crf -------------------------------------------------------------------------------- /Objects/test.d: -------------------------------------------------------------------------------- 1 | .\objects\test.o: Test\test.c 2 | .\objects\test.o: Test\test.h 3 | .\objects\test.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 4 | .\objects\test.o: .\inc\lcd16x2.h 5 | .\objects\test.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 6 | .\objects\test.o: .\RTE\_STM32F103C8T6\RTE_Components.h 7 | .\objects\test.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 8 | .\objects\test.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 9 | .\objects\test.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 10 | .\objects\test.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 11 | .\objects\test.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 12 | .\objects\test.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 13 | .\objects\test.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 14 | .\objects\test.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 15 | .\objects\test.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 16 | .\objects\test.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 17 | .\objects\test.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 18 | .\objects\test.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 19 | .\objects\test.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 20 | .\objects\test.o: .\inc\delay.h 21 | .\objects\test.o: .\Firmware\Customer\Inc\platform.h 22 | .\objects\test.o: .\Firmware\Customer\Inc\DpCfg.h 23 | .\objects\test.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 24 | .\objects\test.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 25 | .\objects\test.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 26 | .\objects\test.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h 27 | .\objects\test.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h 28 | -------------------------------------------------------------------------------- /Objects/test.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/test.o -------------------------------------------------------------------------------- /Objects/vpc3.crf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/vpc3.crf -------------------------------------------------------------------------------- /Objects/vpc3.d: -------------------------------------------------------------------------------- 1 | .\objects\vpc3.o: vpc3.c 2 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 3 | .\objects\vpc3.o: .\RTE\_STM32F103C8T6\RTE_Components.h 4 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\core_cm3.h 5 | .\objects\vpc3.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h 6 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_version.h 7 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_compiler.h 8 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.1.1\CMSIS\Include\cmsis_armcc.h 9 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\system_stm32f10x.h 10 | .\objects\vpc3.o: .\RTE\Device\STM32F103C8\stm32f10x_conf.h 11 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_exti.h 12 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include\stm32f10x.h 13 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_gpio.h 14 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_rcc.h 15 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_spi.h 16 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\stm32f10x_tim.h 17 | .\objects\vpc3.o: C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\StdPeriph_Driver\inc\misc.h 18 | .\objects\vpc3.o: .\inc\vpc3.h 19 | .\objects\vpc3.o: .\Firmware\Customer\Inc\platform.h 20 | .\objects\vpc3.o: .\Firmware\Customer\Inc\DpCfg.h 21 | .\objects\vpc3.o: .\Firmware\Customer\DPV0_DRV\dpl_list.h 22 | .\objects\vpc3.o: .\Firmware\Customer\DPV0_DRV\dp_if.h 23 | .\objects\vpc3.o: .\Firmware\Customer\DPV0_DRV\dp_inc.h 24 | .\objects\vpc3.o: .\Firmware\Customer\Inc\DpAppl.h 25 | .\objects\vpc3.o: .\inc\delay.h 26 | .\objects\vpc3.o: .\inc\periph_init.h 27 | .\objects\vpc3.o: .\Test\test.h 28 | -------------------------------------------------------------------------------- /Objects/vpc3.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/Objects/vpc3.o -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Profibus_DP_slave 2 | This is a Keil MDK-ARM project, containing a Profibus DP firmware wich is tailored to compile with Keil uVision. It consists of a firmware to create Profibus DP slave devices with the VPC3+S network controller, provided by the vendor Profichip, and an application. 3 | 4 | The firmware source code is modified such that is can be compiled in Keil. 5 | 6 | The project generates code for STM32F103C8T6 microcontroller. 7 | 8 | The STM32 and the VPC3+S can be used as a Profibus DP interface. 9 | 10 | Microcontroller and network controller communicates via SPI. Routines implemented in vpc3.c 11 | 12 | In main() lies a test application sending some irrelevant data to a master device hanging on the same DP network. It also capable of receiveing 2 bytes data and display it on a character LCD screen. 13 | -------------------------------------------------------------------------------- /RTE/Device/STM32F103C8/startup_stm32f10x_md.s: -------------------------------------------------------------------------------- 1 | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** 2 | ;* File Name : startup_stm32f10x_md.s 3 | ;* Author : MCD Application Team 4 | ;* Version : V3.5.0 5 | ;* Date : 11-March-2011 6 | ;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM 7 | ;* toolchain. 8 | ;* This module performs: 9 | ;* - Set the initial SP 10 | ;* - Set the initial PC == Reset_Handler 11 | ;* - Set the vector table entries with the exceptions ISR address 12 | ;* - Configure the clock system 13 | ;* - Branches to __main in the C library (which eventually 14 | ;* calls main()). 15 | ;* After Reset the CortexM3 processor is in Thread mode, 16 | ;* priority is Privileged, and the Stack is set to Main. 17 | ;* <<< Use Configuration Wizard in Context Menu >>> 18 | ;******************************************************************************* 19 | ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 20 | ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 21 | ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 22 | ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 23 | ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 24 | ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 25 | ;******************************************************************************* 26 | 27 | ; Amount of memory (in bytes) allocated for Stack 28 | ; Tailor this value to your application needs 29 | ; Stack Configuration 30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 31 | ; 32 | 33 | Stack_Size EQU 0x00000400 34 | 35 | AREA STACK, NOINIT, READWRITE, ALIGN=3 36 | Stack_Mem SPACE Stack_Size 37 | __initial_sp 38 | 39 | 40 | ; Heap Configuration 41 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 42 | ; 43 | 44 | Heap_Size EQU 0x00000200 45 | 46 | AREA HEAP, NOINIT, READWRITE, ALIGN=3 47 | __heap_base 48 | Heap_Mem SPACE Heap_Size 49 | __heap_limit 50 | 51 | PRESERVE8 52 | THUMB 53 | 54 | 55 | ; Vector Table Mapped to Address 0 at Reset 56 | AREA RESET, DATA, READONLY 57 | EXPORT __Vectors 58 | EXPORT __Vectors_End 59 | EXPORT __Vectors_Size 60 | 61 | __Vectors DCD __initial_sp ; Top of Stack 62 | DCD Reset_Handler ; Reset Handler 63 | DCD NMI_Handler ; NMI Handler 64 | DCD HardFault_Handler ; Hard Fault Handler 65 | DCD MemManage_Handler ; MPU Fault Handler 66 | DCD BusFault_Handler ; Bus Fault Handler 67 | DCD UsageFault_Handler ; Usage Fault Handler 68 | DCD 0 ; Reserved 69 | DCD 0 ; Reserved 70 | DCD 0 ; Reserved 71 | DCD 0 ; Reserved 72 | DCD SVC_Handler ; SVCall Handler 73 | DCD DebugMon_Handler ; Debug Monitor Handler 74 | DCD 0 ; Reserved 75 | DCD PendSV_Handler ; PendSV Handler 76 | DCD SysTick_Handler ; SysTick Handler 77 | 78 | ; External Interrupts 79 | DCD WWDG_IRQHandler ; Window Watchdog 80 | DCD PVD_IRQHandler ; PVD through EXTI Line detect 81 | DCD TAMPER_IRQHandler ; Tamper 82 | DCD RTC_IRQHandler ; RTC 83 | DCD FLASH_IRQHandler ; Flash 84 | DCD RCC_IRQHandler ; RCC 85 | DCD EXTI0_IRQHandler ; EXTI Line 0 86 | DCD EXTI1_IRQHandler ; EXTI Line 1 87 | DCD EXTI2_IRQHandler ; EXTI Line 2 88 | DCD EXTI3_IRQHandler ; EXTI Line 3 89 | DCD EXTI4_IRQHandler ; EXTI Line 4 90 | DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 91 | DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 92 | DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 93 | DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 94 | DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 95 | DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 96 | DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 97 | DCD ADC1_2_IRQHandler ; ADC1_2 98 | DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX 99 | DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 100 | DCD CAN1_RX1_IRQHandler ; CAN1 RX1 101 | DCD CAN1_SCE_IRQHandler ; CAN1 SCE 102 | DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 103 | DCD TIM1_BRK_IRQHandler ; TIM1 Break 104 | DCD TIM1_UP_IRQHandler ; TIM1 Update 105 | DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation 106 | DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare 107 | DCD TIM2_IRQHandler ; TIM2 108 | DCD TIM3_IRQHandler ; TIM3 109 | DCD TIM4_IRQHandler ; TIM4 110 | DCD I2C1_EV_IRQHandler ; I2C1 Event 111 | DCD I2C1_ER_IRQHandler ; I2C1 Error 112 | DCD I2C2_EV_IRQHandler ; I2C2 Event 113 | DCD I2C2_ER_IRQHandler ; I2C2 Error 114 | DCD SPI1_IRQHandler ; SPI1 115 | DCD SPI2_IRQHandler ; SPI2 116 | DCD USART1_IRQHandler ; USART1 117 | DCD USART2_IRQHandler ; USART2 118 | DCD USART3_IRQHandler ; USART3 119 | DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 120 | DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line 121 | DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend 122 | __Vectors_End 123 | 124 | __Vectors_Size EQU __Vectors_End - __Vectors 125 | 126 | AREA |.text|, CODE, READONLY 127 | 128 | ; Reset handler 129 | Reset_Handler PROC 130 | EXPORT Reset_Handler [WEAK] 131 | IMPORT __main 132 | IMPORT SystemInit 133 | LDR R0, =SystemInit 134 | BLX R0 135 | LDR R0, =__main 136 | BX R0 137 | ENDP 138 | 139 | ; Dummy Exception Handlers (infinite loops which can be modified) 140 | 141 | NMI_Handler PROC 142 | EXPORT NMI_Handler [WEAK] 143 | B . 144 | ENDP 145 | HardFault_Handler\ 146 | PROC 147 | EXPORT HardFault_Handler [WEAK] 148 | B . 149 | ENDP 150 | MemManage_Handler\ 151 | PROC 152 | EXPORT MemManage_Handler [WEAK] 153 | B . 154 | ENDP 155 | BusFault_Handler\ 156 | PROC 157 | EXPORT BusFault_Handler [WEAK] 158 | B . 159 | ENDP 160 | UsageFault_Handler\ 161 | PROC 162 | EXPORT UsageFault_Handler [WEAK] 163 | B . 164 | ENDP 165 | SVC_Handler PROC 166 | EXPORT SVC_Handler [WEAK] 167 | B . 168 | ENDP 169 | DebugMon_Handler\ 170 | PROC 171 | EXPORT DebugMon_Handler [WEAK] 172 | B . 173 | ENDP 174 | PendSV_Handler PROC 175 | EXPORT PendSV_Handler [WEAK] 176 | B . 177 | ENDP 178 | SysTick_Handler PROC 179 | EXPORT SysTick_Handler [WEAK] 180 | B . 181 | ENDP 182 | 183 | Default_Handler PROC 184 | 185 | EXPORT WWDG_IRQHandler [WEAK] 186 | EXPORT PVD_IRQHandler [WEAK] 187 | EXPORT TAMPER_IRQHandler [WEAK] 188 | EXPORT RTC_IRQHandler [WEAK] 189 | EXPORT FLASH_IRQHandler [WEAK] 190 | EXPORT RCC_IRQHandler [WEAK] 191 | EXPORT EXTI0_IRQHandler [WEAK] 192 | EXPORT EXTI1_IRQHandler [WEAK] 193 | EXPORT EXTI2_IRQHandler [WEAK] 194 | EXPORT EXTI3_IRQHandler [WEAK] 195 | EXPORT EXTI4_IRQHandler [WEAK] 196 | EXPORT DMA1_Channel1_IRQHandler [WEAK] 197 | EXPORT DMA1_Channel2_IRQHandler [WEAK] 198 | EXPORT DMA1_Channel3_IRQHandler [WEAK] 199 | EXPORT DMA1_Channel4_IRQHandler [WEAK] 200 | EXPORT DMA1_Channel5_IRQHandler [WEAK] 201 | EXPORT DMA1_Channel6_IRQHandler [WEAK] 202 | EXPORT DMA1_Channel7_IRQHandler [WEAK] 203 | EXPORT ADC1_2_IRQHandler [WEAK] 204 | EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] 205 | EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] 206 | EXPORT CAN1_RX1_IRQHandler [WEAK] 207 | EXPORT CAN1_SCE_IRQHandler [WEAK] 208 | EXPORT EXTI9_5_IRQHandler [WEAK] 209 | EXPORT TIM1_BRK_IRQHandler [WEAK] 210 | EXPORT TIM1_UP_IRQHandler [WEAK] 211 | EXPORT TIM1_TRG_COM_IRQHandler [WEAK] 212 | EXPORT TIM1_CC_IRQHandler [WEAK] 213 | EXPORT TIM2_IRQHandler [WEAK] 214 | EXPORT TIM3_IRQHandler [WEAK] 215 | EXPORT TIM4_IRQHandler [WEAK] 216 | EXPORT I2C1_EV_IRQHandler [WEAK] 217 | EXPORT I2C1_ER_IRQHandler [WEAK] 218 | EXPORT I2C2_EV_IRQHandler [WEAK] 219 | EXPORT I2C2_ER_IRQHandler [WEAK] 220 | EXPORT SPI1_IRQHandler [WEAK] 221 | EXPORT SPI2_IRQHandler [WEAK] 222 | EXPORT USART1_IRQHandler [WEAK] 223 | EXPORT USART2_IRQHandler [WEAK] 224 | EXPORT USART3_IRQHandler [WEAK] 225 | EXPORT EXTI15_10_IRQHandler [WEAK] 226 | EXPORT RTCAlarm_IRQHandler [WEAK] 227 | EXPORT USBWakeUp_IRQHandler [WEAK] 228 | 229 | WWDG_IRQHandler 230 | PVD_IRQHandler 231 | TAMPER_IRQHandler 232 | RTC_IRQHandler 233 | FLASH_IRQHandler 234 | RCC_IRQHandler 235 | EXTI0_IRQHandler 236 | EXTI1_IRQHandler 237 | EXTI2_IRQHandler 238 | EXTI3_IRQHandler 239 | EXTI4_IRQHandler 240 | DMA1_Channel1_IRQHandler 241 | DMA1_Channel2_IRQHandler 242 | DMA1_Channel3_IRQHandler 243 | DMA1_Channel4_IRQHandler 244 | DMA1_Channel5_IRQHandler 245 | DMA1_Channel6_IRQHandler 246 | DMA1_Channel7_IRQHandler 247 | ADC1_2_IRQHandler 248 | USB_HP_CAN1_TX_IRQHandler 249 | USB_LP_CAN1_RX0_IRQHandler 250 | CAN1_RX1_IRQHandler 251 | CAN1_SCE_IRQHandler 252 | EXTI9_5_IRQHandler 253 | TIM1_BRK_IRQHandler 254 | TIM1_UP_IRQHandler 255 | TIM1_TRG_COM_IRQHandler 256 | TIM1_CC_IRQHandler 257 | TIM2_IRQHandler 258 | TIM3_IRQHandler 259 | TIM4_IRQHandler 260 | I2C1_EV_IRQHandler 261 | I2C1_ER_IRQHandler 262 | I2C2_EV_IRQHandler 263 | I2C2_ER_IRQHandler 264 | SPI1_IRQHandler 265 | SPI2_IRQHandler 266 | USART1_IRQHandler 267 | USART2_IRQHandler 268 | USART3_IRQHandler 269 | EXTI15_10_IRQHandler 270 | RTCAlarm_IRQHandler 271 | USBWakeUp_IRQHandler 272 | 273 | B . 274 | 275 | ENDP 276 | 277 | ALIGN 278 | 279 | ;******************************************************************************* 280 | ; User Stack and Heap initialization 281 | ;******************************************************************************* 282 | IF :DEF:__MICROLIB 283 | 284 | EXPORT __initial_sp 285 | EXPORT __heap_base 286 | EXPORT __heap_limit 287 | 288 | ELSE 289 | 290 | IMPORT __use_two_region_memory 291 | EXPORT __user_initial_stackheap 292 | 293 | __user_initial_stackheap 294 | 295 | LDR R0, = Heap_Mem 296 | LDR R1, =(Stack_Mem + Stack_Size) 297 | LDR R2, = (Heap_Mem + Heap_Size) 298 | LDR R3, = Stack_Mem 299 | BX LR 300 | 301 | ALIGN 302 | 303 | ENDIF 304 | 305 | END 306 | 307 | ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** 308 | -------------------------------------------------------------------------------- /RTE/Device/STM32F103C8/stm32f10x_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 08-April-2011 7 | * @brief Library configuration file. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Define to prevent recursive inclusion -------------------------------------*/ 23 | #ifndef __STM32F10x_CONF_H 24 | #define __STM32F10x_CONF_H 25 | 26 | /* Run Time Environment will set specific #define for each selected module below */ 27 | #include "RTE_Components.h" 28 | 29 | #ifdef RTE_DEVICE_STDPERIPH_ADC 30 | #include "stm32f10x_adc.h" 31 | #endif 32 | #ifdef RTE_DEVICE_STDPERIPH_BKP 33 | #include "stm32f10x_bkp.h" 34 | #endif 35 | #ifdef RTE_DEVICE_STDPERIPH_CAN 36 | #include "stm32f10x_can.h" 37 | #endif 38 | #ifdef RTE_DEVICE_STDPERIPH_CEC 39 | #include "stm32f10x_cec.h" 40 | #endif 41 | #ifdef RTE_DEVICE_STDPERIPH_CRC 42 | #include "stm32f10x_crc.h" 43 | #endif 44 | #ifdef RTE_DEVICE_STDPERIPH_DAC 45 | #include "stm32f10x_dac.h" 46 | #endif 47 | #ifdef RTE_DEVICE_STDPERIPH_DBGMCU 48 | #include "stm32f10x_dbgmcu.h" 49 | #endif 50 | #ifdef RTE_DEVICE_STDPERIPH_DMA 51 | #include "stm32f10x_dma.h" 52 | #endif 53 | #ifdef RTE_DEVICE_STDPERIPH_EXTI 54 | #include "stm32f10x_exti.h" 55 | #endif 56 | #ifdef RTE_DEVICE_STDPERIPH_FLASH 57 | #include "stm32f10x_flash.h" 58 | #endif 59 | #ifdef RTE_DEVICE_STDPERIPH_FSMC 60 | #include "stm32f10x_fsmc.h" 61 | #endif 62 | #ifdef RTE_DEVICE_STDPERIPH_GPIO 63 | #include "stm32f10x_gpio.h" 64 | #endif 65 | #ifdef RTE_DEVICE_STDPERIPH_I2C 66 | #include "stm32f10x_i2c.h" 67 | #endif 68 | #ifdef RTE_DEVICE_STDPERIPH_IWDG 69 | #include "stm32f10x_iwdg.h" 70 | #endif 71 | #ifdef RTE_DEVICE_STDPERIPH_PWR 72 | #include "stm32f10x_pwr.h" 73 | #endif 74 | #ifdef RTE_DEVICE_STDPERIPH_RCC 75 | #include "stm32f10x_rcc.h" 76 | #endif 77 | #ifdef RTE_DEVICE_STDPERIPH_RTC 78 | #include "stm32f10x_rtc.h" 79 | #endif 80 | #ifdef RTE_DEVICE_STDPERIPH_SDIO 81 | #include "stm32f10x_sdio.h" 82 | #endif 83 | #ifdef RTE_DEVICE_STDPERIPH_SPI 84 | #include "stm32f10x_spi.h" 85 | #endif 86 | #ifdef RTE_DEVICE_STDPERIPH_TIM 87 | #include "stm32f10x_tim.h" 88 | #endif 89 | #ifdef RTE_DEVICE_STDPERIPH_USART 90 | #include "stm32f10x_usart.h" 91 | #endif 92 | #ifdef RTE_DEVICE_STDPERIPH_WWDG 93 | #include "stm32f10x_wwdg.h" 94 | #endif 95 | #ifdef RTE_DEVICE_STDPERIPH_FRAMEWORK 96 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ 97 | #endif 98 | 99 | /* Exported types ------------------------------------------------------------*/ 100 | /* Exported constants --------------------------------------------------------*/ 101 | /* Uncomment the line below to expanse the "assert_param" macro in the 102 | Standard Peripheral Library drivers code */ 103 | /* #define USE_FULL_ASSERT 1 */ 104 | 105 | /* Exported macro ------------------------------------------------------------*/ 106 | #ifdef USE_FULL_ASSERT 107 | 108 | /** 109 | * @brief The assert_param macro is used for function's parameters check. 110 | * @param expr: If expr is false, it calls assert_failed function which reports 111 | * the name of the source file and the source line number of the call 112 | * that failed. If expr is true, it returns no value. 113 | * @retval None 114 | */ 115 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) 116 | /* Exported functions ------------------------------------------------------- */ 117 | void assert_failed(uint8_t* file, uint32_t line); 118 | #else 119 | #define assert_param(expr) ((void)0) 120 | #endif /* USE_FULL_ASSERT */ 121 | 122 | #endif /* __STM32F10x_CONF_H */ 123 | 124 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 125 | -------------------------------------------------------------------------------- /RTE/_STM32F103C8T6/RTE_Components.h: -------------------------------------------------------------------------------- 1 | 2 | /* 3 | * Auto generated Run-Time-Environment Component Configuration File 4 | * *** Do not modify ! *** 5 | * 6 | * Project: 'SPI_TESZT_VPC3' 7 | * Target: 'STM32F103C8T6' 8 | */ 9 | 10 | #ifndef RTE_COMPONENTS_H 11 | #define RTE_COMPONENTS_H 12 | 13 | 14 | /* 15 | * Define the Device Header File: 16 | */ 17 | #define CMSIS_device_header "stm32f10x.h" 18 | 19 | #define RTE_DEVICE_STDPERIPH_EXTI 20 | #define RTE_DEVICE_STDPERIPH_FRAMEWORK 21 | #define RTE_DEVICE_STDPERIPH_GPIO 22 | #define RTE_DEVICE_STDPERIPH_RCC 23 | #define RTE_DEVICE_STDPERIPH_SPI 24 | #define RTE_DEVICE_STDPERIPH_TIM 25 | 26 | #endif /* RTE_COMPONENTS_H */ 27 | -------------------------------------------------------------------------------- /RTE/_Target_1/RTE_Components.h: -------------------------------------------------------------------------------- 1 | 2 | /* 3 | * Auto generated Run-Time-Environment Component Configuration File 4 | * *** Do not modify ! *** 5 | * 6 | * Project: 'SPI_TESZT_VPC3' 7 | * Target: 'Target 1' 8 | */ 9 | 10 | #ifndef RTE_COMPONENTS_H 11 | #define RTE_COMPONENTS_H 12 | 13 | 14 | /* 15 | * Define the Device Header File: 16 | */ 17 | #define CMSIS_device_header "stm32f10x.h" 18 | 19 | #define RTE_DEVICE_STDPERIPH_FRAMEWORK 20 | #define RTE_DEVICE_STDPERIPH_RCC 21 | #define RTE_DEVICE_STDPERIPH_SPI 22 | 23 | #endif /* RTE_COMPONENTS_H */ 24 | -------------------------------------------------------------------------------- /SPI_TESZT_VPC3.uvoptx: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 1.0 5 | 6 |
### uVision Project, (C) Keil Software
7 | 8 | 9 | *.c 10 | *.s*; *.src; *.a* 11 | *.obj; *.o 12 | *.lib 13 | *.txt; *.h; *.inc 14 | *.plm 15 | *.cpp 16 | 0 17 | 18 | 19 | 20 | 0 21 | 0 22 | 23 | 24 | 25 | STM32F103C8T6 26 | 0x4 27 | ARM-ADS 28 | 29 | 8000000 30 | 31 | 1 32 | 1 33 | 0 34 | 1 35 | 0 36 | 37 | 38 | 1 39 | 65535 40 | 0 41 | 0 42 | 0 43 | 44 | 45 | 79 46 | 66 47 | 8 48 | .\Listings\ 49 | 50 | 51 | 1 52 | 1 53 | 1 54 | 0 55 | 1 56 | 1 57 | 0 58 | 1 59 | 0 60 | 0 61 | 0 62 | 0 63 | 64 | 65 | 1 66 | 1 67 | 1 68 | 1 69 | 1 70 | 1 71 | 1 72 | 0 73 | 0 74 | 75 | 76 | 1 77 | 0 78 | 1 79 | 80 | 18 81 | 82 | 0 83 | 1 84 | 1 85 | 1 86 | 1 87 | 1 88 | 1 89 | 1 90 | 1 91 | 1 92 | 1 93 | 1 94 | 1 95 | 1 96 | 0 97 | 1 98 | 1 99 | 1 100 | 1 101 | 0 102 | 0 103 | 1 104 | 5 105 | 106 | 107 | 108 | 109 | 110 | 111 | 112 | 113 | 114 | 115 | STLink\ST-LINKIII-KEIL_SWO.dll 116 | 117 | 118 | 119 | 0 120 | DLGDARM 121 | (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0) 122 | 123 | 124 | 0 125 | ARMRTXEVENTFLAGS 126 | -L70 -Z18 -C0 -M0 -T1 127 | 128 | 129 | 0 130 | DLGTARM 131 | (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0) 132 | 133 | 134 | 0 135 | ARMDBGFLAGS 136 | -T0 137 | 138 | 139 | 0 140 | DLGUARM 141 | (105=-1,-1,-1,-1,0) 142 | 143 | 144 | 0 145 | ST-LINKIII-KEIL_SWO 146 | -U57FF6D064965575012210387 -O238 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO19 -TC8000000 -TP21 -TDS8003 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM) 147 | 148 | 149 | 0 150 | UL2CM3 151 | UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM)) 152 | 153 | 154 | 155 | 156 | 157 | 0 158 | 1 159 | spiReceived 160 | 161 | 162 | 163 | 0 164 | 165 | 166 | 0 167 | 1 168 | 1 169 | 0 170 | 0 171 | 0 172 | 0 173 | 1 174 | 0 175 | 0 176 | 0 177 | 0 178 | 0 179 | 0 180 | 0 181 | 0 182 | 0 183 | 0 184 | 0 185 | 0 186 | 0 187 | 0 188 | 0 189 | 0 190 | 191 | 192 | 193 | 0 194 | 0 195 | 0 196 | 197 | 198 | 199 | 200 | 201 | 202 | System Viewer\GPIOA 203 | 35905 204 | 205 | 206 | 207 | 1 208 | 0 209 | 2 210 | 10000000 211 | 212 | 213 | 214 | 215 | 216 | Application 217 | 1 218 | 0 219 | 0 220 | 0 221 | 222 | 1 223 | 1 224 | 1 225 | 0 226 | 0 227 | 0 228 | .\Main.c 229 | Main.c 230 | 0 231 | 0 232 | 233 | 234 | 1 235 | 2 236 | 1 237 | 0 238 | 0 239 | 0 240 | .\periph_init.c 241 | periph_init.c 242 | 0 243 | 0 244 | 245 | 246 | 1 247 | 3 248 | 1 249 | 0 250 | 0 251 | 0 252 | .\vpc3.c 253 | vpc3.c 254 | 0 255 | 0 256 | 257 | 258 | 259 | 260 | Ext 261 | 1 262 | 0 263 | 0 264 | 0 265 | 266 | 2 267 | 4 268 | 1 269 | 0 270 | 0 271 | 0 272 | .\delay.c 273 | delay.c 274 | 0 275 | 0 276 | 277 | 278 | 2 279 | 5 280 | 1 281 | 0 282 | 0 283 | 0 284 | .\lcd16x2.c 285 | lcd16x2.c 286 | 0 287 | 0 288 | 289 | 290 | 291 | 292 | Profibus_FW_src 293 | 1 294 | 0 295 | 0 296 | 0 297 | 298 | 3 299 | 6 300 | 1 301 | 0 302 | 0 303 | 0 304 | .\Firmware\Customer\DpAppl.c 305 | DpAppl.c 306 | 0 307 | 0 308 | 309 | 310 | 3 311 | 7 312 | 1 313 | 1 314 | 0 315 | 0 316 | .\Firmware\Customer\DpCfg.c 317 | DpCfg.c 318 | 0 319 | 0 320 | 321 | 322 | 3 323 | 8 324 | 1 325 | 0 326 | 0 327 | 0 328 | .\Firmware\Customer\DpDiag.c 329 | DpDiag.c 330 | 0 331 | 0 332 | 333 | 334 | 3 335 | 9 336 | 1 337 | 0 338 | 0 339 | 0 340 | .\Firmware\Customer\DpPrm.c 341 | DpPrm.c 342 | 0 343 | 0 344 | 345 | 346 | 347 | 348 | Profibus_DP_Driver 349 | 1 350 | 0 351 | 0 352 | 0 353 | 354 | 4 355 | 10 356 | 1 357 | 0 358 | 0 359 | 0 360 | .\Firmware\Customer\DPV0_DRV\dp_if.c 361 | dp_if.c 362 | 0 363 | 0 364 | 365 | 366 | 4 367 | 11 368 | 1 369 | 0 370 | 0 371 | 0 372 | .\Firmware\Customer\DPV0_DRV\dp_isr.c 373 | dp_isr.c 374 | 0 375 | 0 376 | 377 | 378 | 379 | 380 | Test 381 | 1 382 | 0 383 | 0 384 | 0 385 | 386 | 5 387 | 12 388 | 1 389 | 0 390 | 0 391 | 0 392 | .\Test\test.c 393 | test.c 394 | 0 395 | 0 396 | 397 | 398 | 399 | 400 | ::CMSIS 401 | 0 402 | 0 403 | 0 404 | 1 405 | 406 | 407 | 408 | ::Device 409 | 1 410 | 0 411 | 0 412 | 1 413 | 414 | 415 | 416 | -------------------------------------------------------------------------------- /SPI_TESZT_VPC3.uvprojx: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 2.1 5 | 6 |
### uVision Project, (C) Keil Software
7 | 8 | 9 | 10 | STM32F103C8T6 11 | 0x4 12 | ARM-ADS 13 | 5060422::V5.06 update 4 (build 422)::ARMCC 14 | 15 | 16 | STM32F103C8 17 | STMicroelectronics 18 | Keil.STM32F1xx_DFP.2.2.0 19 | http://www.keil.com/pack/ 20 | IRAM(0x20000000,0x5000) IROM(0x08000000,0x10000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE 21 | 22 | 23 | UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM)) 24 | 4235 25 | $$Device:STM32F103C8$Device\Include\stm32f10x.h 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | $$Device:STM32F103C8$SVD\STM32F103xx.svd 36 | 0 37 | 0 38 | 39 | 40 | 41 | 42 | 43 | 44 | 0 45 | 0 46 | 0 47 | 0 48 | 1 49 | 50 | .\Objects\ 51 | SPI_TESZT_VPC3 52 | 1 53 | 0 54 | 0 55 | 1 56 | 1 57 | .\Listings\ 58 | 1 59 | 0 60 | 0 61 | 62 | 0 63 | 0 64 | 65 | 66 | 0 67 | 0 68 | 0 69 | 0 70 | 71 | 72 | 0 73 | 0 74 | 75 | 76 | 0 77 | 0 78 | 0 79 | 0 80 | 81 | 82 | 0 83 | 0 84 | 85 | 86 | 0 87 | 0 88 | 0 89 | 0 90 | 91 | 0 92 | 93 | 94 | 95 | 0 96 | 0 97 | 0 98 | 0 99 | 0 100 | 1 101 | 0 102 | 0 103 | 0 104 | 0 105 | 3 106 | 107 | 108 | 1 109 | 110 | 111 | SARMCM3.DLL 112 | 113 | DARMSTM.DLL 114 | -pSTM32F103C8 115 | SARMCM3.DLL 116 | 117 | TARMSTM.DLL 118 | -pSTM32F103C8 119 | 120 | 121 | 122 | 1 123 | 0 124 | 0 125 | 0 126 | 16 127 | 128 | 129 | 130 | 131 | 1 132 | 0 133 | 0 134 | 1 135 | 1 136 | 4096 137 | 138 | 1 139 | BIN\UL2CM3.DLL 140 | "" () 141 | 142 | 143 | 144 | 145 | 0 146 | 147 | 148 | 149 | 0 150 | 1 151 | 1 152 | 1 153 | 1 154 | 1 155 | 1 156 | 1 157 | 0 158 | 1 159 | 1 160 | 0 161 | 1 162 | 1 163 | 0 164 | 0 165 | 1 166 | 1 167 | 1 168 | 1 169 | 1 170 | 1 171 | 1 172 | 1 173 | 1 174 | 0 175 | 0 176 | "Cortex-M3" 177 | 178 | 0 179 | 0 180 | 0 181 | 1 182 | 1 183 | 0 184 | 0 185 | 0 186 | 0 187 | 0 188 | 8 189 | 0 190 | 0 191 | 0 192 | 0 193 | 3 194 | 3 195 | 0 196 | 0 197 | 0 198 | 0 199 | 0 200 | 0 201 | 0 202 | 0 203 | 0 204 | 0 205 | 1 206 | 0 207 | 0 208 | 0 209 | 0 210 | 1 211 | 0 212 | 213 | 214 | 0 215 | 0x0 216 | 0x0 217 | 218 | 219 | 0 220 | 0x0 221 | 0x0 222 | 223 | 224 | 0 225 | 0x0 226 | 0x0 227 | 228 | 229 | 0 230 | 0x0 231 | 0x0 232 | 233 | 234 | 0 235 | 0x0 236 | 0x0 237 | 238 | 239 | 0 240 | 0x0 241 | 0x0 242 | 243 | 244 | 0 245 | 0x20000000 246 | 0x5000 247 | 248 | 249 | 1 250 | 0x8000000 251 | 0x10000 252 | 253 | 254 | 0 255 | 0x0 256 | 0x0 257 | 258 | 259 | 1 260 | 0x0 261 | 0x0 262 | 263 | 264 | 1 265 | 0x0 266 | 0x0 267 | 268 | 269 | 1 270 | 0x0 271 | 0x0 272 | 273 | 274 | 1 275 | 0x8000000 276 | 0x10000 277 | 278 | 279 | 1 280 | 0x0 281 | 0x0 282 | 283 | 284 | 0 285 | 0x0 286 | 0x0 287 | 288 | 289 | 0 290 | 0x0 291 | 0x0 292 | 293 | 294 | 0 295 | 0x0 296 | 0x0 297 | 298 | 299 | 0 300 | 0x20000000 301 | 0x5000 302 | 303 | 304 | 0 305 | 0x0 306 | 0x0 307 | 308 | 309 | 310 | 311 | 312 | 1 313 | 3 314 | 0 315 | 0 316 | 1 317 | 0 318 | 0 319 | 0 320 | 0 321 | 0 322 | 2 323 | 0 324 | 0 325 | 1 326 | 0 327 | 1 328 | 1 329 | 1 330 | 1 331 | 0 332 | 0 333 | 0 334 | 335 | 336 | 337 | 338 | .\inc;.\Firmware\Customer\Inc;.\Firmware\Customer;.\Test 339 | 340 | 341 | 342 | 1 343 | 0 344 | 0 345 | 0 346 | 0 347 | 0 348 | 0 349 | 0 350 | 0 351 | 0 352 | 353 | 354 | 355 | 356 | 357 | 358 | 359 | 360 | 1 361 | 0 362 | 0 363 | 0 364 | 1 365 | 0 366 | 0x08000000 367 | 0x20000000 368 | 369 | 370 | 371 | 372 | 373 | 374 | 375 | 376 | 377 | 378 | 379 | 380 | Application 381 | 382 | 383 | Main.c 384 | 1 385 | .\Main.c 386 | 387 | 388 | periph_init.c 389 | 1 390 | .\periph_init.c 391 | 392 | 393 | vpc3.c 394 | 1 395 | .\vpc3.c 396 | 397 | 398 | 399 | 400 | Ext 401 | 402 | 403 | delay.c 404 | 1 405 | .\delay.c 406 | 407 | 408 | lcd16x2.c 409 | 1 410 | .\lcd16x2.c 411 | 412 | 413 | 414 | 415 | Profibus_FW_src 416 | 417 | 418 | DpAppl.c 419 | 1 420 | .\Firmware\Customer\DpAppl.c 421 | 422 | 423 | DpCfg.c 424 | 1 425 | .\Firmware\Customer\DpCfg.c 426 | 427 | 428 | DpDiag.c 429 | 1 430 | .\Firmware\Customer\DpDiag.c 431 | 432 | 433 | DpPrm.c 434 | 1 435 | .\Firmware\Customer\DpPrm.c 436 | 437 | 438 | 439 | 440 | Profibus_DP_Driver 441 | 442 | 443 | dp_if.c 444 | 1 445 | .\Firmware\Customer\DPV0_DRV\dp_if.c 446 | 447 | 448 | dp_isr.c 449 | 1 450 | .\Firmware\Customer\DPV0_DRV\dp_isr.c 451 | 452 | 453 | 454 | 455 | Test 456 | 457 | 458 | test.c 459 | 1 460 | .\Test\test.c 461 | 462 | 463 | 464 | 465 | ::CMSIS 466 | 467 | 468 | ::Device 469 | 470 | 471 | 472 | 473 | 474 | 475 | 476 | 477 | 478 | 479 | 480 | 481 | 482 | 483 | 484 | 485 | 486 | 487 | 488 | 489 | 490 | 491 | 492 | 493 | 494 | 495 | 496 | 497 | 498 | 499 | 500 | 501 | 502 | 503 | 504 | 505 | 506 | 507 | 508 | 509 | 510 | 511 | 512 | 513 | 514 | 515 | 516 | 517 | 518 | 519 | 520 | 521 | 522 | 523 | 524 | 525 | 526 | 527 | 528 | RTE\Device\STM32F103C8\RTE_Device.h 529 | 530 | 531 | 532 | 533 | 534 | 535 | 536 | RTE\Device\STM32F103C8\startup_stm32f10x_md.s 537 | 538 | 539 | 540 | 541 | 542 | 543 | 544 | RTE\Device\STM32F103C8\stm32f10x_conf.h 545 | 546 | 547 | 548 | 549 | 550 | 551 | 552 | RTE\Device\STM32F103C8\system_stm32f10x.c 553 | 554 | 555 | 556 | 557 | 558 | 559 | 560 | 561 | 562 | 563 | -------------------------------------------------------------------------------- /Test/test.c: -------------------------------------------------------------------------------- 1 | #include "test.h" 2 | #include "lcd16x2.h" 3 | #include 4 | #include 5 | void test(uint16_t bValue){ 6 | 7 | 8 | lcdPrintHex((uint8_t)(bValue >> 8)); 9 | lcdPrintHex((uint8_t)bValue); 10 | 11 | } 12 | 13 | 14 | void ledTest(){ 15 | 16 | int i = 0; 17 | while(i<20){ 18 | GPIOC->ODR ^=0X2000; 19 | DelayMs(50); 20 | i++; 21 | } 22 | GPIOC->ODR |= 0X2000; 23 | } 24 | 25 | 26 | -------------------------------------------------------------------------------- /Test/test.h: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | void test(uint16_t bValue); 4 | void ledTest(); 5 | 6 | 7 | 8 | -------------------------------------------------------------------------------- /delay.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file delay.c 4 | * @author Yohanes Erwin Setiawan 5 | * @date 10 January 2016 6 | ****************************************************************************** 7 | */ 8 | 9 | #include "delay.h" 10 | 11 | // For store tick counts in us 12 | static __IO uint32_t usTicks; 13 | 14 | // SysTick_Handler function will be called every 1 us 15 | void SysTick_Handler() 16 | { 17 | if (usTicks != 0) 18 | { 19 | usTicks--; 20 | } 21 | } 22 | 23 | void DelayInit() 24 | { 25 | // Update SystemCoreClock value 26 | SystemCoreClockUpdate(); 27 | // Configure the SysTick timer to overflow every 1 us 28 | SysTick_Config(SystemCoreClock / 1000000); 29 | } 30 | 31 | void DelayUs(uint32_t us) 32 | { 33 | // Reload us value 34 | usTicks = us; 35 | // Wait until usTick reach zero 36 | while (usTicks); 37 | } 38 | 39 | void DelayMs(uint32_t ms) 40 | { 41 | // Wait until ms reach zero 42 | while (ms--) 43 | { 44 | // Delay 1ms 45 | DelayUs(1000); 46 | } 47 | } 48 | 49 | /********************************* END OF FILE ********************************/ 50 | /******************************************************************************/ 51 | -------------------------------------------------------------------------------- /inc/delay.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file delay.h 4 | * @author Yohanes Erwin Setiawan 5 | * @date 10 January 2016 6 | ****************************************************************************** 7 | */ 8 | 9 | #ifndef __DELAY_H 10 | #define __DELAY_H 11 | 12 | #ifdef __cplusplus 13 | extern "C" { 14 | #endif 15 | 16 | #include "stm32f10x.h" 17 | 18 | void DelayInit(void); 19 | void DelayUs(uint32_t us); 20 | void DelayMs(uint32_t ms); 21 | 22 | #ifdef __cplusplus 23 | } 24 | #endif 25 | 26 | #endif 27 | 28 | /********************************* END OF FILE ********************************/ 29 | /******************************************************************************/ 30 | -------------------------------------------------------------------------------- /inc/lcd16x2.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file lcd16x2.h 4 | * @author Yohanes Erwin Setiawan 5 | * @date 6 February 2016 6 | * @note Re-write form Peter Fleury AVR LCD library 7 | ****************************************************************************** 8 | */ 9 | 10 | #ifndef __LCD16X2_H 11 | #define __LCD16X2_H 12 | 13 | #ifdef __cplusplus 14 | extern "C" { 15 | #endif 16 | 17 | /** Includes ---------------------------------------------------------------- */ 18 | #include "stm32f10x.h" 19 | #include "stm32f10x_rcc.h" 20 | #include "stm32f10x_gpio.h" 21 | #include "delay.h" 22 | #include "platform.h" 23 | /** Port and pin definition for 4-bit mode ---------------------------------- */ 24 | // LCD control lines (must be on the same port) 25 | #define LCD16X2_RCC_GPIO_CONTROL RCC_APB2Periph_GPIOB 26 | #define LCD16X2_GPIO_CONTROL GPIOB 27 | #define LCD16X2_GPIO_RS GPIOB 28 | #define LCD16X2_GPIO_RW GPIOB 29 | #define LCD16X2_GPIO_EN GPIOB 30 | // LCD data lines (must be on the same port) 31 | #define LCD16X2_RCC_GPIO_DATA RCC_APB2Periph_GPIOA 32 | #define LCD16X2_GPIO_DATA GPIOA 33 | #define LCD16X2_GPIO_D4 GPIOA 34 | #define LCD16X2_GPIO_D5 GPIOA 35 | #define LCD16X2_GPIO_D6 GPIOA 36 | #define LCD16X2_GPIO_D7 GPIOA 37 | // Pin definition 38 | #define LCD16X2_PIN_RS GPIO_Pin_12 39 | #define LCD16X2_PIN_RW GPIO_Pin_13 40 | #define LCD16X2_PIN_EN GPIO_Pin_14 41 | #define LCD16X2_PIN_D4 GPIO_Pin_9 // 4-bit mode LSB 42 | #define LCD16X2_PIN_D5 GPIO_Pin_10 43 | #define LCD16X2_PIN_D6 GPIO_Pin_11 44 | #define LCD16X2_PIN_D7 GPIO_Pin_12 // 4-bit mode MSB 45 | 46 | /** Display size ------------------------------------------------------------ */ 47 | // Number of visible lines of the display (1 or 2) 48 | #define LCD16X2_LINES 2 49 | // Visible characters per line of the display 50 | #define LCD16X2_DISP_LENGTH 16 51 | // DDRAM address of first char of line 1 52 | #define LCD16X2_START_LINE_1 0x00 53 | // DDRAM address of first char of line 2 54 | #define LCD16X2_START_LINE_2 0x40 55 | 56 | /** Delay value ------------------------------------------------------------- */ 57 | // Delay power on 58 | #define LCD16X2_DELAY_POWER_ON 16000 59 | // Delay after initialize 8-bit 60 | #define LCD16X2_DELAY_INIT 5000 61 | // Delay after initialize 8-bit repeated 62 | #define LCD16X2_DELAY_INIT_REP 64 63 | // Delay after set 4-bit mode 64 | #define LCD16X2_DELAY_INIT_4BIT 64 65 | // Delay until address counter updated after busy flag is cleared 66 | #define LCD16X2_DELAY_BUSY_FLAG 4 67 | // Enable pulse width high level 68 | #define LCD16X2_DELAY_ENABLE_PULSE 2 69 | 70 | /** Instructions bit location ----------------------------------------------- */ 71 | #define LCD16X2_CLEAR_DISPLAY 0x01 72 | #define LCD16X2_CURSOR_HOME 0x02 73 | #define LCD16X2_CHARACTER_ENTRY_MODE 0x04 74 | #define LCD16X2_DISPLAY_CURSOR_ON_OFF 0x08 75 | #define LCD16X2_DISPLAY_CURSOR_SHIFT 0x10 76 | #define LCD16X2_FUNCTION_SET 0x20 77 | #define LCD16X2_SET_CGRAM_ADDRESS 0x40 78 | #define LCD16X2_SET_DDRAM_ADDRESS 0x80 79 | /* Character entry mode instructions */ 80 | #define LCD16X2_INCREMENT 0x02 // Initialization setting 81 | #define LCD16X2_DECREMENT 0x00 82 | #define LCD16X2_DISPLAY_SHIFT_ON 0x01 83 | #define LCD16X2_DISPLAY_SHIFT_OFF 0x00 // Initialization setting 84 | /* Display cursor on off instructions */ 85 | #define LCD16X2_DISPLAY_ON 0x04 86 | #define LCD16X2_DISPLAY_OFF 0x00 // Initialization setting 87 | #define LCD16X2_CURSOR_UNDERLINE_ON 0x02 88 | #define LCD16X2_CURSOR_UNDERLINE_OFF 0x00 // Initialization setting 89 | #define LCD16X2_CURSOR_BLINK_ON 0x01 90 | #define LCD16X2_CURSOR_BLINK_OFF 0x00 // Initialization setting 91 | /* Display cursor shift instructions */ 92 | #define LCD16X2_DISPLAY_SHIFT 0x08 93 | #define LCD16X2_CURSOR_MOVE 0x00 94 | #define LCD16X2_RIGHT_SHIFT 0x04 95 | #define LCD16X2_LEFT_SHIFT 0x00 96 | /* Function set instructions */ 97 | #define LCD16X2_8BIT_INTERFACE 0x10 // Initialization setting 98 | #define LCD16X2_4BIT_INTERFACE 0x00 99 | #define LCD16X2_2LINE_MODE 0x08 100 | #define LCD16X2_1LINE_MODE 0x00 // Initialization setting 101 | #define LCD16X2_5X10DOT_FORMAT 0x04 102 | #define LCD16X2_5X7DOT_FORMAT 0x00 // Initialization setting 103 | /* Busy flag bit location */ 104 | #define LCD16X2_BUSY_FLAG 0x80 105 | 106 | /** LCD display and cursor attributes --------------------------------------- */ 107 | #define LCD16X2_DISPLAY_OFF_CURSOR_OFF_BLINK_OFF (LCD16X2_DISPLAY_OFF | \ 108 | LCD16X2_CURSOR_UNDERLINE_OFF | LCD16X2_CURSOR_BLINK_OFF) 109 | #define LCD16X2_DISPLAY_ON_CURSOR_OFF_BLINK_OFF (LCD16X2_DISPLAY_ON | \ 110 | LCD16X2_CURSOR_UNDERLINE_OFF | LCD16X2_CURSOR_BLINK_OFF) 111 | #define LCD16X2_DISPLAY_ON_CURSOR_OFF_BLINK_ON (LCD16X2_DISPLAY_ON | \ 112 | LCD16X2_CURSOR_UNDERLINE_OFF | LCD16X2_CURSOR_BLINK_ON) 113 | #define LCD16X2_DISPLAY_ON_CURSOR_ON_BLINK_OFF (LCD16X2_DISPLAY_ON | \ 114 | LCD16X2_CURSOR_UNDERLINE_ON | LCD16X2_CURSOR_BLINK_OFF) 115 | #define LCD16X2_DISPLAY_ON_CURSOR_ON_BLINK_ON (LCD16X2_DISPLAY_ON | \ 116 | LCD16X2_CURSOR_UNDERLINE_ON | LCD16X2_CURSOR_BLINK_ON) 117 | 118 | /** Public function prototypes ---------------------------------------------- */ 119 | void lcd16x2_init(uint8_t disp_attr); 120 | void lcd16x2_write_command(uint8_t cmd); 121 | void lcd16x2_write_data(uint8_t data); 122 | void lcd16x2_clrscr(void); 123 | void lcd16x2_home(void); 124 | void lcd16x2_gotoxy(uint8_t x, uint8_t y); 125 | uint8_t lcd16x2_getxy(void); 126 | void lcd16x2_entry_inc(void); 127 | void lcd16x2_entry_dec(void); 128 | void lcd16x2_entry_inc_shift(void); 129 | void lcd16x2_entry_dec_shift(void); 130 | void lcd16x2_display_on(void); 131 | void lcd16x2_display_off(void); 132 | void lcd16x2_cursor_on(void); 133 | void lcd16x2_cursor_off(void); 134 | void lcd16x2_blink_on(void); 135 | void lcd16x2_blink_off(void); 136 | void lcd16x2_display_shift_left(void); 137 | void lcd16x2_display_shift_right(void); 138 | void lcd16x2_cursor_shift_left(void); 139 | void lcd16x2_cursor_shift_right(void); 140 | void lcd16x2_putc(const char c); 141 | void lcd16x2_puts(const char* s); 142 | void lcd16x2_create_custom_char(uint8_t location, uint8_t* data_bytes); 143 | void lcd16x2_put_custom_char(uint8_t x, uint8_t y, uint8_t location); 144 | 145 | //myFunctions******************************************** 146 | 147 | void lcdPrint(const char *s); 148 | void lcdPrintInt(uint8_t value); 149 | void lcdPrintHex(uint8_t value); 150 | void clrScr(); 151 | 152 | #ifdef __cplusplus 153 | } 154 | #endif 155 | 156 | #endif 157 | 158 | /********************************* END OF FILE ********************************/ 159 | /******************************************************************************/ 160 | -------------------------------------------------------------------------------- /inc/periph_init.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/inc/periph_init.h -------------------------------------------------------------------------------- /inc/vpc3.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/inc/vpc3.h -------------------------------------------------------------------------------- /inc/vpc3.h~RF12ad5b58.TMP: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/inc/vpc3.h~RF12ad5b58.TMP -------------------------------------------------------------------------------- /inc/vpc3.h~RFde33637.TMP: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/inc/vpc3.h~RFde33637.TMP -------------------------------------------------------------------------------- /inc/vpc3.h~RFf03af17.TMP: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/inc/vpc3.h~RFf03af17.TMP -------------------------------------------------------------------------------- /lcd16x2.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/lcd16x2.c -------------------------------------------------------------------------------- /periph_init.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tanyigergo/Profibus_DP_slave/ef39e5ed7929137f63f222e0a758c3b5bf5f1ce2/periph_init.c -------------------------------------------------------------------------------- /readme.txt: -------------------------------------------------------------------------------- 1 | blabla 2 | blalb 3 | -------------------------------------------------------------------------------- /vpc3.c: -------------------------------------------------------------------------------- 1 | #include "stm32f10x.h" // Device header 2 | #include "vpc3.h" 3 | 4 | #include "delay.h" 5 | #include "periph_init.h" 6 | 7 | #include "test.h" 8 | 9 | 10 | /*---------------------------------------------------------------------------*/ 11 | /* function: Vpc3Write */ 12 | /*---------------------------------------------------------------------------*/ 13 | /** 14 | * @brief Write a byte to VPC3+. 15 | * 16 | * @attention This function is only necessary with VPC3+S in SPI- or IIC-Mode! 17 | * 18 | * @param[in]wAddress Address in VPC3+ 19 | * @param[in]bData Data 20 | */ 21 | 22 | void Vpc3Write(VPC3_ADR wAddress, uint8_t bData ) 23 | { 24 | 25 | 26 | //16 bit address into 2 bytes 27 | uint8_t upperByte = (uint8_t)(wAddress >> 8); 28 | uint8_t lowerByte = (uint8_t)wAddress; 29 | //Variable to return 30 | uint8_t spiRxBuffer; 31 | 32 | DpAppl_DisableInterruptVPC3Channel1(); 33 | 34 | /*NSS pin = LOW*/ 35 | SET_NSS_LOW; 36 | DelayUs(10); 37 | 38 | 39 | /*Send slave the read instruction, 0001 0011*/ 40 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 41 | SPI1->DR = WRITE_BYTE; 42 | 43 | 44 | /*Send 16 bit address of slave memory cell*/ 45 | //1. Upper byte address 46 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 47 | SPI1->DR = upperByte; 48 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 49 | spiRxBuffer = SPI1->DR; 50 | 51 | //2. Lower byte address 52 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 53 | SPI1->DR = lowerByte; 54 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 55 | spiRxBuffer = SPI1->DR; 56 | 57 | /*Send data byte*/ 58 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 59 | SPI1->DR = bData; 60 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 61 | spiRxBuffer = SPI1->DR; 62 | 63 | 64 | /*Wait while the SPI interface is busy*/ 65 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY) == SET); 66 | 67 | spiRxBuffer = SPI1->DR; 68 | 69 | DelayUs(10); 70 | 71 | /*NSS pin high*/ 72 | SET_NSS_HIGH; 73 | 74 | DelayUs(10); 75 | DpAppl_EnableInterruptVPC3Channel1(); 76 | 77 | }//void Vpc3Write( VPC3_ADR wAddress, uint8_t bData ) 78 | 79 | 80 | 81 | /*---------------------------------------------------------------------------*/ 82 | /* function: Vpc3Read */ 83 | /*---------------------------------------------------------------------------*/ 84 | /** 85 | * @brief Read one byte from VPC3+. 86 | * 87 | * @attention This function is only necessary with VPC3+S in SPI- or IIC-Mode! 88 | * 89 | * @param[in]wAddress Address in VPC3+ 90 | * @return value of wAddress 91 | */ 92 | 93 | uint8_t Vpc3Read( VPC3_ADR wAddress ) 94 | { 95 | 96 | 97 | 98 | //16 bit address into 2 bytes 99 | uint8_t upperByte = (uint8_t)(wAddress >> 8); 100 | uint8_t lowerByte = (uint8_t)wAddress; 101 | 102 | //Variable to return 103 | uint8_t spiRxBuffer; 104 | 105 | DpAppl_DisableInterruptVPC3Channel1(); 106 | 107 | /*NSS pin = LOW*/ 108 | SET_NSS_LOW; 109 | 110 | 111 | 112 | /*Send slave the read instruction, 0001 0011*/ 113 | SPI1->DR = READ_BYTE; 114 | 115 | 116 | /*Send 16 bit address of slave memory cell*/ 117 | //1. Upper byte address 118 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 119 | SPI1->DR = upperByte; 120 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 121 | spiRxBuffer = SPI1->DR; 122 | 123 | //2. Lower byte address 124 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 125 | SPI1->DR = lowerByte; 126 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 127 | spiRxBuffer = SPI1->DR; 128 | 129 | /*Send dummy byte*/ 130 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 131 | SPI1->DR = 0x00; 132 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 133 | spiRxBuffer = SPI1->DR; 134 | 135 | // /*Send dummy byte*/ 136 | // while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 137 | // SPI1->DR = 0x00; 138 | // while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 139 | // spiRxBuffer = SPI1->DR; 140 | 141 | /*Wait while the SPI interface is busy*/ 142 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY) == SET); 143 | 144 | /*Read the received data*/ 145 | spiRxBuffer = SPI1->DR; 146 | 147 | 148 | 149 | /*NSS pin high*/ 150 | SET_NSS_HIGH; 151 | 152 | DpAppl_EnableInterruptVPC3Channel1(); 153 | 154 | return spiRxBuffer; 155 | 156 | 157 | 158 | }//uint8_t Vpc3Read( VPC3_ADR wAddress ) 159 | 160 | 161 | 162 | 163 | /*---------------------------------------------------------------------------*/ 164 | /* function: Vpc3MemSet */ 165 | /*---------------------------------------------------------------------------*/ 166 | /** 167 | * @brief Fill block of VPC3+ memory. 168 | * 169 | * @param[in]wAddress Address of the block of memory to fill. 170 | * @param[in]bValue Value to be set. 171 | * @param[in]wLength Number of bytes to be set to the value. 172 | */ 173 | 174 | void Vpc3MemSet( VPC3_ADR wAddress, uint8_t bValue, uint16_t wLength ) 175 | { 176 | /** @todo Add your own code here! */ 177 | uint8_t upperByte = (uint8_t)(wAddress >> 8); 178 | uint8_t lowerByte = (uint8_t)wAddress; 179 | uint16_t i; 180 | uint8_t spiRxBuffer; 181 | 182 | DpAppl_DisableInterruptVPC3Channel1(); 183 | 184 | /*NSS pin = LOW*/ 185 | SET_NSS_LOW; 186 | 187 | 188 | 189 | /*Send slave the read instruction, 0001 0011*/ 190 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 191 | SPI1->DR = WRITE_ARRAY; 192 | 193 | 194 | /*Send 16 bit address of slave memory cell*/ 195 | //1. Upper byte address 196 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 197 | SPI1->DR = upperByte; 198 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 199 | spiRxBuffer = SPI1->DR; 200 | 201 | //2. Lower byte address 202 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 203 | SPI1->DR = lowerByte; 204 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 205 | spiRxBuffer = SPI1->DR; 206 | 207 | /*Send data byte*/ 208 | for(i = 0; i DR = bValue; 211 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 212 | spiRxBuffer = SPI1->DR; 213 | } 214 | 215 | 216 | /*Wait while the SPI interface is busy*/ 217 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY) == SET); 218 | spiRxBuffer = SPI1->DR; 219 | 220 | 221 | /*NSS pin high*/ 222 | SET_NSS_HIGH; 223 | 224 | DpAppl_EnableInterruptVPC3Channel1(); 225 | }//void Vpc3MemSet( VPC3_ADR wAddress, uint8_t bValue, uint16_t wLength ) 226 | 227 | 228 | /*---------------------------------------------------------------------------*/ 229 | /* function: Vpc3MemCmp */ 230 | /*---------------------------------------------------------------------------*/ 231 | /** 232 | * @brief Compare two blocks of VPC3+ memory. 233 | * 234 | * @param[in]pToVpc3Memory1 Pointer to block of memory. 235 | * @param[in]pToVpc3Memory2 Pointer to block of memory. 236 | * @param[in]wLength Number of bytes to compare. 237 | * @return 0 Indicates that the contents of both memory blocks are equal. 238 | * @return 1 Indicates that the contents of both memory blocks are not equal. 239 | */ 240 | 241 | uint8_t Vpc3MemCmp( VPC3_UNSIGNED8_PTR pToVpc3Memory1, VPC3_UNSIGNED8_PTR pToVpc3Memory2, uint16_t wLength ) 242 | { 243 | /** @todo Add your own code here! */ 244 | 245 | uint8_t bRetValue; 246 | uint16_t i; 247 | 248 | bRetValue = 0; 249 | for( i = 0; i < wLength; i++ ) 250 | { 251 | if( Vpc3Read( (VPC3_ADR)pToVpc3Memory1++ ) != Vpc3Read( (VPC3_ADR)pToVpc3Memory2++ ) ) 252 | { 253 | bRetValue = 1; 254 | break; 255 | }//if( Vpc3Read( (VPC3_ADR)pToVpc3Memory1++ ) != Vpc3Read( (VPC3_ADR)pToVpc3Memory2++ ) ) 256 | }//for( i = 0; i < wLength; i++ ) 257 | 258 | return bRetValue; 259 | }//uint8_t Vpc3MemCmp( VPC3_UNSIGNED8_PTR pToVpc3Memory1, VPC3_UNSIGNED8_PTR pToVpc3Memory2, uint16_t wLength ) 260 | 261 | 262 | 263 | 264 | 265 | 266 | /*---------------------------------------------------------------------------*/ 267 | /* function: CopyFromVpc3 */ 268 | /*---------------------------------------------------------------------------*/ 269 | 270 | /** 271 | * @brief Copy block of memory from VPC3+. 272 | * 273 | * @param[in]pLocalMemory Pointer to the destination array where the content is to be copied. 274 | * @param[in]pToVpc3Memory Pointer to the source of data to be copied. 275 | * @param[in]wLength Number of bytes to copy. 276 | */ 277 | void CopyFromVpc3( MEM_UNSIGNED8_PTR pLocalMemory, VPC3_UNSIGNED8_PTR pToVpc3Memory, uint16_t wLength) 278 | { 279 | uint16_t wAddress = (VPC3_ADR)pToVpc3Memory; 280 | uint8_t upperByte = (uint8_t)(wAddress >> 8); 281 | uint8_t lowerByte = (uint8_t)wAddress; 282 | 283 | DpAppl_DisableInterruptVPC3Channel1(); 284 | int i; 285 | 286 | 287 | 288 | SET_NSS_LOW; 289 | 290 | /*Send slave the read instruction, 0001 0011*/ 291 | SPI1->DR = READ_ARRAY; 292 | 293 | 294 | /*Send 16 bit address of slave memory cell*/ 295 | //1. Upper byte address 296 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 297 | SPI1->DR = upperByte; 298 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 299 | pLocalMemory[0] = SPI1->DR; 300 | 301 | //2. Lower byte address 302 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 303 | SPI1->DR = lowerByte; 304 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 305 | pLocalMemory[0] = SPI1->DR; 306 | 307 | /*Send dummy byte*/ 308 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 309 | SPI1->DR = 0x00; 310 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 311 | pLocalMemory[0] = SPI1->DR; 312 | 313 | for(i = 0; i < wLength-1; i++){ 314 | 315 | /*Send dummy byte*/ 316 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 317 | SPI1->DR = 0x00; 318 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 319 | pLocalMemory[i] = SPI1->DR; 320 | 321 | } 322 | 323 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 324 | pLocalMemory[wLength-1] = SPI1->DR; 325 | 326 | /*NSS pin high*/ 327 | SET_NSS_HIGH; 328 | 329 | 330 | 331 | 332 | 333 | 334 | 335 | /** @todo Add your own code here! */ 336 | }//void CopyFromVpc3( MEM_UNSIGNED8_PTR pLocalMemory, VPC3_UNSIGNED8_PTR pToVpc3Memory, uint16_t wLength ) 337 | 338 | 339 | 340 | 341 | 342 | 343 | /*---------------------------------------------------------------------------*/ 344 | /* function: CopyToVpc3 */ 345 | /*---------------------------------------------------------------------------*/ 346 | /** 347 | * @brief Copy block of memory to VPC3+. 348 | * 349 | * @param[in]pToVpc3Memory Pointer to the destination array where the content is to be copied. 350 | * @param[in]pLocalMemory Pointer to the source of data to be copied. 351 | * @param[in]wLength Number of bytes to copy. 352 | */ 353 | 354 | void CopyToVpc3(VPC3_UNSIGNED8_PTR pToVpc3Memory, MEM_UNSIGNED8_PTR pLocalMemory, uint16_t wLength) 355 | { 356 | /** @todo Add your own code here! */ 357 | 358 | 359 | uint16_t wAddress = (VPC3_ADR)pToVpc3Memory; 360 | uint8_t upperByte = (uint8_t)(wAddress >> 8); 361 | uint8_t lowerByte = (uint8_t)wAddress; 362 | uint16_t i; 363 | uint8_t spiRxBuffer; 364 | 365 | DpAppl_DisableInterruptVPC3Channel1(); 366 | 367 | /*NSS pin = LOW*/ 368 | SET_NSS_LOW; 369 | 370 | 371 | /*Send slave the read instruction, 0001 0011*/ 372 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 373 | SPI1->DR = WRITE_ARRAY; 374 | 375 | 376 | /*Send 16 bit address of slave memory cell*/ 377 | //1. Upper byte address 378 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 379 | SPI1->DR = upperByte; 380 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 381 | spiRxBuffer = SPI1->DR; 382 | 383 | //2. Lower byte address 384 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); 385 | SPI1->DR = lowerByte; 386 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 387 | spiRxBuffer = SPI1->DR; 388 | 389 | /*Send data byte*/ 390 | for(i = 0; i DR = pLocalMemory[i]; 393 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); 394 | spiRxBuffer = SPI1->DR; 395 | } 396 | 397 | 398 | /*Wait while the SPI interface is busy*/ 399 | while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY) == SET); 400 | spiRxBuffer = SPI1->DR; 401 | 402 | 403 | /*NSS pin high*/ 404 | SET_NSS_HIGH; 405 | 406 | DpAppl_EnableInterruptVPC3Channel1(); 407 | 408 | 409 | }//void CopyToVpc3( VPC3_UNSIGNED8_PTR pToVpc3Memory, MEM_UNSIGNED8_PTR pLocalMemory, uint16_t wLength ) 410 | 411 | 412 | 413 | 414 | 415 | 416 | 417 | /*---------------------------------------------------------------------------*/ 418 | /* function: DpAppl_SetResetVPC3Channel1 */ 419 | /*---------------------------------------------------------------------------*/ 420 | /** 421 | * @brief Set VPC3+ reset. 422 | * 423 | * @attention The VPC3+ reset is high-active! 424 | * 425 | */ 426 | void DpAppl_SetResetVPC3Channel1( void ) 427 | { 428 | /** @todo Add your own code here! */ 429 | 430 | 431 | SET_RESET_PIN; 432 | 433 | 434 | }//void DpAppl_SetResetVPC3Channel1( void ) 435 | 436 | /*---------------------------------------------------------------------------*/ 437 | /* function: DpAppl_ClrResetVPC3Channel1 */ 438 | /*---------------------------------------------------------------------------*/ 439 | /** 440 | * @brief Clear VPC3+ reset. 441 | * 442 | * @attention The VPC3+ reset is high-active! 443 | * 444 | */ 445 | void DpAppl_ClrResetVPC3Channel1( void ) 446 | { 447 | /** @todo Add your own code here! */ 448 | RESET_RESET_PIN; 449 | }//void DpAppl_ClrResetVPC3Channel1( void ) 450 | 451 | /*---------------------------------------------------------------------------*/ 452 | /* function: DpAppl_EnableInterruptVPC3Channel1 */ 453 | /*---------------------------------------------------------------------------*/ 454 | /** 455 | * @brief Enable VPC3+ interrupt. 456 | */ 457 | void DpAppl_EnableInterruptVPC3Channel1( void ) 458 | { 459 | /** @todo Add your own code here! */ 460 | }//void DpAppl_EnableInterruptVPC3Channel1( void ) 461 | 462 | /*---------------------------------------------------------------------------*/ 463 | /* function: DpAppl_DisableInterruptVPC3Channel1 */ 464 | /*---------------------------------------------------------------------------*/ 465 | /** 466 | * @brief Disable VPC3+ interrupt. 467 | * 468 | */ 469 | void DpAppl_DisableInterruptVPC3Channel1( void ) 470 | { 471 | /** @todo Add your own code here! */ 472 | }//void DpAppl_DisableInterruptVPC3Channel1( void ) 473 | 474 | /*---------------------------------------------------------------------------*/ 475 | /* function: DpAppl_EnableInterruptVPC3Sync */ 476 | /*---------------------------------------------------------------------------*/ 477 | /** 478 | * @brief Enable VPC3+ isochronous interrupt. 479 | * 480 | * @attention Is only supported from VPC3+S! 481 | * 482 | */ 483 | void DpAppl_EnableInterruptVPC3Sync( void ) 484 | { 485 | /** @todo Add your own code here! */ 486 | }//void DpAppl_EnableInterruptVPC3Sync( void ) 487 | 488 | /*---------------------------------------------------------------------------*/ 489 | /* function: DpAppl_DisableInterruptVPC3Sync */ 490 | /*---------------------------------------------------------------------------*/ 491 | /** 492 | * @brief Disable VPC3+ isochronous interrupt. 493 | * 494 | * @attention Is only supported from VPC3+S! 495 | * 496 | */ 497 | void DpAppl_DisableInterruptVPC3Sync( void ) 498 | { 499 | /** @todo Add your own code here! */ 500 | }//void DpAppl_DisableInterruptVPC3Sync( void ) 501 | 502 | /*---------------------------------------------------------------------------*/ 503 | /* function: DpAppl_EnableAllInterrupts */ 504 | /*---------------------------------------------------------------------------*/ 505 | /** 506 | * @brief Enable all microcontroller interrupts. 507 | * 508 | */ 509 | void DpAppl_EnableAllInterrupts( void ) 510 | { 511 | /** @todo Add your own code here! */ 512 | }//void DpAppl_EnableAllInterrupts( void ) 513 | 514 | /*---------------------------------------------------------------------------*/ 515 | /* function: DpAppl_DisableAllInterrupts */ 516 | /*---------------------------------------------------------------------------*/ 517 | /** 518 | * @brief Disable all microcontroller interrupts. 519 | * 520 | */ 521 | void DpAppl_DisableAllInterrupts( void ) 522 | { 523 | /** @todo Add your own code here! */ 524 | }//void DpAppl_DisableAllInterrupts( void ) 525 | 526 | /*---------------------------------------------------------------------------*/ 527 | /* function: Vpc3Wait_1ms */ 528 | /*---------------------------------------------------------------------------*/ 529 | /** 530 | * @brief Wait some time. 531 | * 532 | */ 533 | void Vpc3Wait_1ms( void ) 534 | { 535 | /** @todo Add your own code here! */ 536 | DelayMs(1); 537 | }//void Vpc3Wait_1ms( void ) 538 | 539 | --------------------------------------------------------------------------------