└── PWM_Encoder
├── Debug
└── makefile
├── Drivers
├── CMSIS
│ ├── Device
│ │ └── ST
│ │ │ └── STM32F1xx
│ │ │ ├── Include
│ │ │ ├── stm32f103x6.h
│ │ │ ├── stm32f1xx.h
│ │ │ └── system_stm32f1xx.h
│ │ │ └── Source
│ │ │ └── Templates
│ │ │ ├── gcc
│ │ │ └── startup_stm32f103xb.s
│ │ │ └── system_stm32f1xx.c
│ └── Include
│ │ ├── arm_common_tables.h
│ │ ├── arm_const_structs.h
│ │ ├── arm_math.h
│ │ ├── cmsis_armcc.h
│ │ ├── cmsis_armcc_V6.h
│ │ ├── cmsis_gcc.h
│ │ ├── core_cm3.h
│ │ ├── core_cmFunc.h
│ │ ├── core_cmInstr.h
│ │ ├── core_cmSimd.h
│ │ ├── core_sc000.h
│ │ └── core_sc300.h
└── STM32F1xx_HAL_Driver
│ ├── Inc
│ ├── Legacy
│ │ └── stm32_hal_legacy.h
│ ├── stm32f1xx_hal.h
│ ├── stm32f1xx_hal_cortex.h
│ ├── stm32f1xx_hal_def.h
│ ├── stm32f1xx_hal_dma.h
│ ├── stm32f1xx_hal_dma_ex.h
│ ├── stm32f1xx_hal_flash.h
│ ├── stm32f1xx_hal_flash_ex.h
│ ├── stm32f1xx_hal_gpio.h
│ ├── stm32f1xx_hal_gpio_ex.h
│ ├── stm32f1xx_hal_pwr.h
│ ├── stm32f1xx_hal_rcc.h
│ ├── stm32f1xx_hal_rcc_ex.h
│ ├── stm32f1xx_hal_tim.h
│ ├── stm32f1xx_hal_tim_ex.h
│ └── stm32f1xx_hal_uart.h
│ └── Src
│ ├── stm32f1xx_hal.c
│ ├── stm32f1xx_hal_cortex.c
│ ├── stm32f1xx_hal_dma.c
│ ├── stm32f1xx_hal_flash.c
│ ├── stm32f1xx_hal_flash_ex.c
│ ├── stm32f1xx_hal_gpio.c
│ ├── stm32f1xx_hal_gpio_ex.c
│ ├── stm32f1xx_hal_pwr.c
│ ├── stm32f1xx_hal_rcc.c
│ ├── stm32f1xx_hal_rcc_ex.c
│ ├── stm32f1xx_hal_tim.c
│ ├── stm32f1xx_hal_tim_ex.c
│ └── stm32f1xx_hal_uart.c
├── Inc
├── gpio.h
├── main.h
├── mxconstants.h
├── stm32f1xx_hal_conf.h
├── stm32f1xx_it.h
├── tim.h
└── usart.h
├── Middlewares
├── PWM_RC
│ ├── PWM_RC.c
│ └── PWM_RC.h
└── Sbus
│ ├── Sbus.c
│ └── Sbus.h
├── PWM_Encoder.cfg
├── PWM_Encoder.ioc
├── PWM_Encoder.xml
├── STM32F103C8Tx_FLASH.ld
└── Src
├── gpio.c
├── main.c
├── stm32f1xx_hal_msp.c
├── stm32f1xx_it.c
├── tim.c
├── usart.c
├── usb_device.c
├── usbd_cdc_if.c
├── usbd_conf.c
└── usbd_desc.c
/PWM_Encoder/Debug/makefile:
--------------------------------------------------------------------------------
1 | ################################################################################
2 | # Automatically-generated file. Do not edit!
3 | ################################################################################
4 |
5 | -include ../makefile.init
6 |
7 | RM := rm -rf
8 |
9 | # All of the sources participating in the build are defined here
10 | -include sources.mk
11 | -include Src/subdir.mk
12 | -include Middlewares/Sbus/subdir.mk
13 | -include Middlewares/PWM_RC/subdir.mk
14 | -include Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
15 | -include Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/subdir.mk
16 | -include Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/subdir.mk
17 | -include subdir.mk
18 | -include objects.mk
19 |
20 | ifneq ($(MAKECMDGOALS),clean)
21 | ifneq ($(strip $(S_UPPER_DEPS)),)
22 | -include $(S_UPPER_DEPS)
23 | endif
24 | ifneq ($(strip $(C_DEPS)),)
25 | -include $(C_DEPS)
26 | endif
27 | endif
28 |
29 | -include ../makefile.defs
30 |
31 | # Add inputs and outputs from these tool invocations to the build variables
32 |
33 | # All Target
34 | all: PWM_Encoder.elf
35 |
36 | # Tool invocations
37 | PWM_Encoder.elf: $(OBJS) $(USER_OBJS)
38 | @echo 'Building target: $@'
39 | @echo 'Invoking: MCU GCC Linker'
40 | arm-none-eabi-gcc -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -specs=nosys.specs -specs=nano.specs -T"../STM32F103C8Tx_FLASH.ld" -Wl,-Map=output.map -Wl,--gc-sections -lm -o "PWM_Encoder.elf" @"objects.list" $(USER_OBJS) $(LIBS)
41 | @echo 'Finished building target: $@'
42 | @echo ' '
43 | $(MAKE) --no-print-directory post-build
44 |
45 | # Other Targets
46 | clean:
47 | -$(RM) *
48 | -@echo ' '
49 |
50 | post-build:
51 | -@echo 'Generating binary and Printing size information:'
52 | arm-none-eabi-objcopy -O binary "PWM_Encoder.elf" "PWM_Encoder.bin"
53 | arm-none-eabi-size "PWM_Encoder.elf"
54 | -@echo ' '
55 |
56 | .PHONY: all clean dependents
57 | .SECONDARY: post-build
58 |
59 | -include ../makefile.targets
60 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h:
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https://raw.githubusercontent.com/thekuroro/PWMtoSbus-STM32/dba3b151cea35a99e73bbf3bbac1310a6159e442/PWM_Encoder/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h
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/PWM_Encoder/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
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https://raw.githubusercontent.com/thekuroro/PWMtoSbus-STM32/dba3b151cea35a99e73bbf3bbac1310a6159e442/PWM_Encoder/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h
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/PWM_Encoder/Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
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1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f10x.h
4 | * @author MCD Application Team
5 | * @version V4.1.0
6 | * @date 29-April-2016
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /** @addtogroup CMSIS
39 | * @{
40 | */
41 |
42 | /** @addtogroup stm32f10x_system
43 | * @{
44 | */
45 |
46 | /**
47 | * @brief Define to prevent recursive inclusion
48 | */
49 | #ifndef __SYSTEM_STM32F10X_H
50 | #define __SYSTEM_STM32F10X_H
51 |
52 | #ifdef __cplusplus
53 | extern "C" {
54 | #endif
55 |
56 | /** @addtogroup STM32F10x_System_Includes
57 | * @{
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 |
65 | /** @addtogroup STM32F10x_System_Exported_types
66 | * @{
67 | */
68 |
69 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
70 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
71 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /** @addtogroup STM32F10x_System_Exported_Constants
78 | * @{
79 | */
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | /** @addtogroup STM32F10x_System_Exported_Macros
86 | * @{
87 | */
88 |
89 | /**
90 | * @}
91 | */
92 |
93 | /** @addtogroup STM32F10x_System_Exported_Functions
94 | * @{
95 | */
96 |
97 | extern void SystemInit(void);
98 | extern void SystemCoreClockUpdate(void);
99 | /**
100 | * @}
101 | */
102 |
103 | #ifdef __cplusplus
104 | }
105 | #endif
106 |
107 | #endif /*__SYSTEM_STM32F10X_H */
108 |
109 | /**
110 | * @}
111 | */
112 |
113 | /**
114 | * @}
115 | */
116 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
117 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xb.s:
--------------------------------------------------------------------------------
1 | /**
2 | *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
3 | * @file startup_stm32f103xb.s
4 | * @author MCD Application Team
5 | * @version V4.1.0
6 | * @date 29-April-2016
7 | * @brief STM32F103xB Devices vector table for Atollic toolchain.
8 | * This module performs:
9 | * - Set the initial SP
10 | * - Set the initial PC == Reset_Handler,
11 | * - Set the vector table entries with the exceptions ISR address
12 | * - Configure the clock system
13 | * - Branches to main in the C library (which eventually
14 | * calls main()).
15 | * After Reset the Cortex-M3 processor is in Thread mode,
16 | * priority is Privileged, and the Stack is set to Main.
17 | ******************************************************************************
18 | *
19 | * © COPYRIGHT(c) 2016 STMicroelectronics
20 | *
21 | * Redistribution and use in source and binary forms, with or without modification,
22 | * are permitted provided that the following conditions are met:
23 | * 1. Redistributions of source code must retain the above copyright notice,
24 | * this list of conditions and the following disclaimer.
25 | * 2. Redistributions in binary form must reproduce the above copyright notice,
26 | * this list of conditions and the following disclaimer in the documentation
27 | * and/or other materials provided with the distribution.
28 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
29 | * may be used to endorse or promote products derived from this software
30 | * without specific prior written permission.
31 | *
32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 | *
43 | ******************************************************************************
44 | */
45 |
46 | .syntax unified
47 | .cpu cortex-m3
48 | .fpu softvfp
49 | .thumb
50 |
51 | .global g_pfnVectors
52 | .global Default_Handler
53 |
54 | /* start address for the initialization values of the .data section.
55 | defined in linker script */
56 | .word _sidata
57 | /* start address for the .data section. defined in linker script */
58 | .word _sdata
59 | /* end address for the .data section. defined in linker script */
60 | .word _edata
61 | /* start address for the .bss section. defined in linker script */
62 | .word _sbss
63 | /* end address for the .bss section. defined in linker script */
64 | .word _ebss
65 |
66 | .equ BootRAM, 0xF108F85F
67 | /**
68 | * @brief This is the code that gets called when the processor first
69 | * starts execution following a reset event. Only the absolutely
70 | * necessary set is performed, after which the application
71 | * supplied main() routine is called.
72 | * @param None
73 | * @retval : None
74 | */
75 |
76 | .section .text.Reset_Handler
77 | .weak Reset_Handler
78 | .type Reset_Handler, %function
79 | Reset_Handler:
80 |
81 | /* Copy the data segment initializers from flash to SRAM */
82 | movs r1, #0
83 | b LoopCopyDataInit
84 |
85 | CopyDataInit:
86 | ldr r3, =_sidata
87 | ldr r3, [r3, r1]
88 | str r3, [r0, r1]
89 | adds r1, r1, #4
90 |
91 | LoopCopyDataInit:
92 | ldr r0, =_sdata
93 | ldr r3, =_edata
94 | adds r2, r0, r1
95 | cmp r2, r3
96 | bcc CopyDataInit
97 | ldr r2, =_sbss
98 | b LoopFillZerobss
99 | /* Zero fill the bss segment. */
100 | FillZerobss:
101 | movs r3, #0
102 | str r3, [r2], #4
103 |
104 | LoopFillZerobss:
105 | ldr r3, = _ebss
106 | cmp r2, r3
107 | bcc FillZerobss
108 |
109 | /* Call the clock system intitialization function.*/
110 | bl SystemInit
111 | /* Call static constructors */
112 | bl __libc_init_array
113 | /* Call the application's entry point.*/
114 | bl main
115 | bx lr
116 | .size Reset_Handler, .-Reset_Handler
117 |
118 | /**
119 | * @brief This is the code that gets called when the processor receives an
120 | * unexpected interrupt. This simply enters an infinite loop, preserving
121 | * the system state for examination by a debugger.
122 | *
123 | * @param None
124 | * @retval : None
125 | */
126 | .section .text.Default_Handler,"ax",%progbits
127 | Default_Handler:
128 | Infinite_Loop:
129 | b Infinite_Loop
130 | .size Default_Handler, .-Default_Handler
131 | /******************************************************************************
132 | *
133 | * The minimal vector table for a Cortex M3. Note that the proper constructs
134 | * must be placed on this to ensure that it ends up at physical address
135 | * 0x0000.0000.
136 | *
137 | ******************************************************************************/
138 | .section .isr_vector,"a",%progbits
139 | .type g_pfnVectors, %object
140 | .size g_pfnVectors, .-g_pfnVectors
141 |
142 |
143 | g_pfnVectors:
144 |
145 | .word _estack
146 | .word Reset_Handler
147 | .word NMI_Handler
148 | .word HardFault_Handler
149 | .word MemManage_Handler
150 | .word BusFault_Handler
151 | .word UsageFault_Handler
152 | .word 0
153 | .word 0
154 | .word 0
155 | .word 0
156 | .word SVC_Handler
157 | .word DebugMon_Handler
158 | .word 0
159 | .word PendSV_Handler
160 | .word SysTick_Handler
161 | .word WWDG_IRQHandler
162 | .word PVD_IRQHandler
163 | .word TAMPER_IRQHandler
164 | .word RTC_IRQHandler
165 | .word FLASH_IRQHandler
166 | .word RCC_IRQHandler
167 | .word EXTI0_IRQHandler
168 | .word EXTI1_IRQHandler
169 | .word EXTI2_IRQHandler
170 | .word EXTI3_IRQHandler
171 | .word EXTI4_IRQHandler
172 | .word DMA1_Channel1_IRQHandler
173 | .word DMA1_Channel2_IRQHandler
174 | .word DMA1_Channel3_IRQHandler
175 | .word DMA1_Channel4_IRQHandler
176 | .word DMA1_Channel5_IRQHandler
177 | .word DMA1_Channel6_IRQHandler
178 | .word DMA1_Channel7_IRQHandler
179 | .word ADC1_2_IRQHandler
180 | .word USB_HP_CAN1_TX_IRQHandler
181 | .word USB_LP_CAN1_RX0_IRQHandler
182 | .word CAN1_RX1_IRQHandler
183 | .word CAN1_SCE_IRQHandler
184 | .word EXTI9_5_IRQHandler
185 | .word TIM1_BRK_IRQHandler
186 | .word TIM1_UP_IRQHandler
187 | .word TIM1_TRG_COM_IRQHandler
188 | .word TIM1_CC_IRQHandler
189 | .word TIM2_IRQHandler
190 | .word TIM3_IRQHandler
191 | .word TIM4_IRQHandler
192 | .word I2C1_EV_IRQHandler
193 | .word I2C1_ER_IRQHandler
194 | .word I2C2_EV_IRQHandler
195 | .word I2C2_ER_IRQHandler
196 | .word SPI1_IRQHandler
197 | .word SPI2_IRQHandler
198 | .word USART1_IRQHandler
199 | .word USART2_IRQHandler
200 | .word USART3_IRQHandler
201 | .word EXTI15_10_IRQHandler
202 | .word RTC_Alarm_IRQHandler
203 | .word USBWakeUp_IRQHandler
204 | .word 0
205 | .word 0
206 | .word 0
207 | .word 0
208 | .word 0
209 | .word 0
210 | .word 0
211 | .word BootRAM /* @0x108. This is for boot in RAM mode for
212 | STM32F10x Medium Density devices. */
213 |
214 | /*******************************************************************************
215 | *
216 | * Provide weak aliases for each Exception handler to the Default_Handler.
217 | * As they are weak aliases, any function with the same name will override
218 | * this definition.
219 | *
220 | *******************************************************************************/
221 |
222 | .weak NMI_Handler
223 | .thumb_set NMI_Handler,Default_Handler
224 |
225 | .weak HardFault_Handler
226 | .thumb_set HardFault_Handler,Default_Handler
227 |
228 | .weak MemManage_Handler
229 | .thumb_set MemManage_Handler,Default_Handler
230 |
231 | .weak BusFault_Handler
232 | .thumb_set BusFault_Handler,Default_Handler
233 |
234 | .weak UsageFault_Handler
235 | .thumb_set UsageFault_Handler,Default_Handler
236 |
237 | .weak SVC_Handler
238 | .thumb_set SVC_Handler,Default_Handler
239 |
240 | .weak DebugMon_Handler
241 | .thumb_set DebugMon_Handler,Default_Handler
242 |
243 | .weak PendSV_Handler
244 | .thumb_set PendSV_Handler,Default_Handler
245 |
246 | .weak SysTick_Handler
247 | .thumb_set SysTick_Handler,Default_Handler
248 |
249 | .weak WWDG_IRQHandler
250 | .thumb_set WWDG_IRQHandler,Default_Handler
251 |
252 | .weak PVD_IRQHandler
253 | .thumb_set PVD_IRQHandler,Default_Handler
254 |
255 | .weak TAMPER_IRQHandler
256 | .thumb_set TAMPER_IRQHandler,Default_Handler
257 |
258 | .weak RTC_IRQHandler
259 | .thumb_set RTC_IRQHandler,Default_Handler
260 |
261 | .weak FLASH_IRQHandler
262 | .thumb_set FLASH_IRQHandler,Default_Handler
263 |
264 | .weak RCC_IRQHandler
265 | .thumb_set RCC_IRQHandler,Default_Handler
266 |
267 | .weak EXTI0_IRQHandler
268 | .thumb_set EXTI0_IRQHandler,Default_Handler
269 |
270 | .weak EXTI1_IRQHandler
271 | .thumb_set EXTI1_IRQHandler,Default_Handler
272 |
273 | .weak EXTI2_IRQHandler
274 | .thumb_set EXTI2_IRQHandler,Default_Handler
275 |
276 | .weak EXTI3_IRQHandler
277 | .thumb_set EXTI3_IRQHandler,Default_Handler
278 |
279 | .weak EXTI4_IRQHandler
280 | .thumb_set EXTI4_IRQHandler,Default_Handler
281 |
282 | .weak DMA1_Channel1_IRQHandler
283 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
284 |
285 | .weak DMA1_Channel2_IRQHandler
286 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
287 |
288 | .weak DMA1_Channel3_IRQHandler
289 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
290 |
291 | .weak DMA1_Channel4_IRQHandler
292 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
293 |
294 | .weak DMA1_Channel5_IRQHandler
295 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
296 |
297 | .weak DMA1_Channel6_IRQHandler
298 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
299 |
300 | .weak DMA1_Channel7_IRQHandler
301 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
302 |
303 | .weak ADC1_2_IRQHandler
304 | .thumb_set ADC1_2_IRQHandler,Default_Handler
305 |
306 | .weak USB_HP_CAN1_TX_IRQHandler
307 | .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
308 |
309 | .weak USB_LP_CAN1_RX0_IRQHandler
310 | .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
311 |
312 | .weak CAN1_RX1_IRQHandler
313 | .thumb_set CAN1_RX1_IRQHandler,Default_Handler
314 |
315 | .weak CAN1_SCE_IRQHandler
316 | .thumb_set CAN1_SCE_IRQHandler,Default_Handler
317 |
318 | .weak EXTI9_5_IRQHandler
319 | .thumb_set EXTI9_5_IRQHandler,Default_Handler
320 |
321 | .weak TIM1_BRK_IRQHandler
322 | .thumb_set TIM1_BRK_IRQHandler,Default_Handler
323 |
324 | .weak TIM1_UP_IRQHandler
325 | .thumb_set TIM1_UP_IRQHandler,Default_Handler
326 |
327 | .weak TIM1_TRG_COM_IRQHandler
328 | .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
329 |
330 | .weak TIM1_CC_IRQHandler
331 | .thumb_set TIM1_CC_IRQHandler,Default_Handler
332 |
333 | .weak TIM2_IRQHandler
334 | .thumb_set TIM2_IRQHandler,Default_Handler
335 |
336 | .weak TIM3_IRQHandler
337 | .thumb_set TIM3_IRQHandler,Default_Handler
338 |
339 | .weak TIM4_IRQHandler
340 | .thumb_set TIM4_IRQHandler,Default_Handler
341 |
342 | .weak I2C1_EV_IRQHandler
343 | .thumb_set I2C1_EV_IRQHandler,Default_Handler
344 |
345 | .weak I2C1_ER_IRQHandler
346 | .thumb_set I2C1_ER_IRQHandler,Default_Handler
347 |
348 | .weak I2C2_EV_IRQHandler
349 | .thumb_set I2C2_EV_IRQHandler,Default_Handler
350 |
351 | .weak I2C2_ER_IRQHandler
352 | .thumb_set I2C2_ER_IRQHandler,Default_Handler
353 |
354 | .weak SPI1_IRQHandler
355 | .thumb_set SPI1_IRQHandler,Default_Handler
356 |
357 | .weak SPI2_IRQHandler
358 | .thumb_set SPI2_IRQHandler,Default_Handler
359 |
360 | .weak USART1_IRQHandler
361 | .thumb_set USART1_IRQHandler,Default_Handler
362 |
363 | .weak USART2_IRQHandler
364 | .thumb_set USART2_IRQHandler,Default_Handler
365 |
366 | .weak USART3_IRQHandler
367 | .thumb_set USART3_IRQHandler,Default_Handler
368 |
369 | .weak EXTI15_10_IRQHandler
370 | .thumb_set EXTI15_10_IRQHandler,Default_Handler
371 |
372 | .weak RTC_Alarm_IRQHandler
373 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler
374 |
375 | .weak USBWakeUp_IRQHandler
376 | .thumb_set USBWakeUp_IRQHandler,Default_Handler
377 |
378 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
379 |
380 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/CMSIS/Include/arm_common_tables.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. October 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_common_tables.h
9 | *
10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #ifndef _ARM_COMMON_TABLES_H
42 | #define _ARM_COMMON_TABLES_H
43 |
44 | #include "arm_math.h"
45 |
46 | extern const uint16_t armBitRevTable[1024];
47 | extern const q15_t armRecipTableQ15[64];
48 | extern const q31_t armRecipTableQ31[64];
49 | /* extern const q31_t realCoefAQ31[1024]; */
50 | /* extern const q31_t realCoefBQ31[1024]; */
51 | extern const float32_t twiddleCoef_16[32];
52 | extern const float32_t twiddleCoef_32[64];
53 | extern const float32_t twiddleCoef_64[128];
54 | extern const float32_t twiddleCoef_128[256];
55 | extern const float32_t twiddleCoef_256[512];
56 | extern const float32_t twiddleCoef_512[1024];
57 | extern const float32_t twiddleCoef_1024[2048];
58 | extern const float32_t twiddleCoef_2048[4096];
59 | extern const float32_t twiddleCoef_4096[8192];
60 | #define twiddleCoef twiddleCoef_4096
61 | extern const q31_t twiddleCoef_16_q31[24];
62 | extern const q31_t twiddleCoef_32_q31[48];
63 | extern const q31_t twiddleCoef_64_q31[96];
64 | extern const q31_t twiddleCoef_128_q31[192];
65 | extern const q31_t twiddleCoef_256_q31[384];
66 | extern const q31_t twiddleCoef_512_q31[768];
67 | extern const q31_t twiddleCoef_1024_q31[1536];
68 | extern const q31_t twiddleCoef_2048_q31[3072];
69 | extern const q31_t twiddleCoef_4096_q31[6144];
70 | extern const q15_t twiddleCoef_16_q15[24];
71 | extern const q15_t twiddleCoef_32_q15[48];
72 | extern const q15_t twiddleCoef_64_q15[96];
73 | extern const q15_t twiddleCoef_128_q15[192];
74 | extern const q15_t twiddleCoef_256_q15[384];
75 | extern const q15_t twiddleCoef_512_q15[768];
76 | extern const q15_t twiddleCoef_1024_q15[1536];
77 | extern const q15_t twiddleCoef_2048_q15[3072];
78 | extern const q15_t twiddleCoef_4096_q15[6144];
79 | extern const float32_t twiddleCoef_rfft_32[32];
80 | extern const float32_t twiddleCoef_rfft_64[64];
81 | extern const float32_t twiddleCoef_rfft_128[128];
82 | extern const float32_t twiddleCoef_rfft_256[256];
83 | extern const float32_t twiddleCoef_rfft_512[512];
84 | extern const float32_t twiddleCoef_rfft_1024[1024];
85 | extern const float32_t twiddleCoef_rfft_2048[2048];
86 | extern const float32_t twiddleCoef_rfft_4096[4096];
87 |
88 |
89 | /* floating-point bit reversal tables */
90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
99 |
100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
109 |
110 | /* fixed-point bit reversal tables */
111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 )
112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 )
113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 )
114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
120 |
121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
130 |
131 | /* Tables for Fast Math Sine and Cosine */
132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
135 |
136 | #endif /* ARM_COMMON_TABLES_H */
137 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/CMSIS/Include/arm_const_structs.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_const_structs.h
9 | *
10 | * Description: This file has constant structs that are initialized for
11 | * user convenience. For example, some can be given as
12 | * arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | * - Redistributions of source code must retain the above copyright
20 | * notice, this list of conditions and the following disclaimer.
21 | * - Redistributions in binary form must reproduce the above copyright
22 | * notice, this list of conditions and the following disclaimer in
23 | * the documentation and/or other materials provided with the
24 | * distribution.
25 | * - Neither the name of ARM LIMITED nor the names of its contributors
26 | * may be used to endorse or promote products derived from this
27 | * software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 |
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 |
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 |
49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
58 |
59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
68 |
69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
78 |
79 | #endif
80 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/CMSIS/Include/core_cmFunc.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmFunc.h
3 | * @brief CMSIS Cortex-M Core Function Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMFUNC_H
42 | #define __CORE_CMFUNC_H
43 |
44 |
45 | /* ########################### Core Function Access ########################### */
46 | /** \ingroup CMSIS_Core_FunctionInterface
47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@} end of CMSIS_Core_RegAccFunctions */
86 |
87 | #endif /* __CORE_CMFUNC_H */
88 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/CMSIS/Include/core_cmInstr.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmInstr.h
3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMINSTR_H
42 | #define __CORE_CMINSTR_H
43 |
44 |
45 | /* ########################## Core Instruction Access ######################### */
46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
47 | Access to dedicated instructions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
86 |
87 | #endif /* __CORE_CMINSTR_H */
88 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/CMSIS/Include/core_cmSimd.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmSimd.h
3 | * @brief CMSIS Cortex-M SIMD Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMSIMD_H
42 | #define __CORE_CMSIMD_H
43 |
44 | #ifdef __cplusplus
45 | extern "C" {
46 | #endif
47 |
48 |
49 | /* ################### Compiler specific Intrinsics ########################### */
50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
51 | Access to dedicated SIMD instructions
52 | @{
53 | */
54 |
55 | /*------------------ RealView Compiler -----------------*/
56 | #if defined ( __CC_ARM )
57 | #include "cmsis_armcc.h"
58 |
59 | /*------------------ ARM Compiler V6 -------------------*/
60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
61 | #include "cmsis_armcc_V6.h"
62 |
63 | /*------------------ GNU Compiler ----------------------*/
64 | #elif defined ( __GNUC__ )
65 | #include "cmsis_gcc.h"
66 |
67 | /*------------------ ICC Compiler ----------------------*/
68 | #elif defined ( __ICCARM__ )
69 | #include
70 |
71 | /*------------------ TI CCS Compiler -------------------*/
72 | #elif defined ( __TMS470__ )
73 | #include
74 |
75 | /*------------------ TASKING Compiler ------------------*/
76 | #elif defined ( __TASKING__ )
77 | /*
78 | * The CMSIS functions have been implemented as intrinsics in the compiler.
79 | * Please use "carm -?i" to get an up to date list of all intrinsics,
80 | * Including the CMSIS ones.
81 | */
82 |
83 | /*------------------ COSMIC Compiler -------------------*/
84 | #elif defined ( __CSMC__ )
85 | #include
86 |
87 | #endif
88 |
89 | /*@} end of group CMSIS_SIMD_intrinsics */
90 |
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /* __CORE_CMSIMD_H */
97 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_hal.h
4 | * @author MCD Application Team
5 | * @version V1.0.4
6 | * @date 29-April-2016
7 | * @brief This file contains all the functions prototypes for the HAL
8 | * module driver.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT(c) 2016 STMicroelectronics
13 | *
14 | * Redistribution and use in source and binary forms, with or without modification,
15 | * are permitted provided that the following conditions are met:
16 | * 1. Redistributions of source code must retain the above copyright notice,
17 | * this list of conditions and the following disclaimer.
18 | * 2. Redistributions in binary form must reproduce the above copyright notice,
19 | * this list of conditions and the following disclaimer in the documentation
20 | * and/or other materials provided with the distribution.
21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
22 | * may be used to endorse or promote products derived from this software
23 | * without specific prior written permission.
24 | *
25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 | *
36 | ******************************************************************************
37 | */
38 |
39 | /* Define to prevent recursive inclusion -------------------------------------*/
40 | #ifndef __STM32F1xx_HAL_H
41 | #define __STM32F1xx_HAL_H
42 |
43 | #ifdef __cplusplus
44 | extern "C" {
45 | #endif
46 |
47 | /* Includes ------------------------------------------------------------------*/
48 | #include "stm32f1xx_hal_conf.h"
49 |
50 | /** @addtogroup STM32F1xx_HAL_Driver
51 | * @{
52 | */
53 |
54 | /** @addtogroup HAL
55 | * @{
56 | */
57 |
58 | /* Exported types ------------------------------------------------------------*/
59 | /* Exported constants --------------------------------------------------------*/
60 |
61 | /* Exported macro ------------------------------------------------------------*/
62 |
63 | /** @defgroup HAL_Exported_Macros HAL Exported Macros
64 | * @{
65 | */
66 |
67 | /** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
68 | * @brief Freeze/Unfreeze Peripherals in Debug mode
69 | * Note: On devices STM32F10xx8 and STM32F10xxB,
70 | * STM32F101xC/D/E and STM32F103xC/D/E,
71 | * STM32F101xF/G and STM32F103xF/G
72 | * STM32F10xx4 and STM32F10xx6
73 | * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
74 | * debug mode (not accessible by the user software in normal mode).
75 | * Refer to errata sheet of these devices for more details.
76 | * @{
77 | */
78 |
79 | /* Peripherals on APB1 */
80 | /**
81 | * @brief TIM2 Peripherals Debug mode
82 | */
83 | #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
84 | #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
85 |
86 | /**
87 | * @brief TIM3 Peripherals Debug mode
88 | */
89 | #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
90 | #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
91 |
92 | #if defined (DBGMCU_CR_DBG_TIM4_STOP)
93 | /**
94 | * @brief TIM4 Peripherals Debug mode
95 | */
96 | #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
97 | #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
98 | #endif
99 |
100 | #if defined (DBGMCU_CR_DBG_TIM5_STOP)
101 | /**
102 | * @brief TIM5 Peripherals Debug mode
103 | */
104 | #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
105 | #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
106 | #endif
107 |
108 | #if defined (DBGMCU_CR_DBG_TIM6_STOP)
109 | /**
110 | * @brief TIM6 Peripherals Debug mode
111 | */
112 | #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
113 | #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
114 | #endif
115 |
116 | #if defined (DBGMCU_CR_DBG_TIM7_STOP)
117 | /**
118 | * @brief TIM7 Peripherals Debug mode
119 | */
120 | #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
121 | #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
122 | #endif
123 |
124 | #if defined (DBGMCU_CR_DBG_TIM12_STOP)
125 | /**
126 | * @brief TIM12 Peripherals Debug mode
127 | */
128 | #define __HAL_DBGMCU_FREEZE_TIM12() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
129 | #define __HAL_DBGMCU_UNFREEZE_TIM12() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
130 | #endif
131 |
132 | #if defined (DBGMCU_CR_DBG_TIM13_STOP)
133 | /**
134 | * @brief TIM13 Peripherals Debug mode
135 | */
136 | #define __HAL_DBGMCU_FREEZE_TIM13() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
137 | #define __HAL_DBGMCU_UNFREEZE_TIM13() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
138 | #endif
139 |
140 | #if defined (DBGMCU_CR_DBG_TIM14_STOP)
141 | /**
142 | * @brief TIM14 Peripherals Debug mode
143 | */
144 | #define __HAL_DBGMCU_FREEZE_TIM14() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
145 | #define __HAL_DBGMCU_UNFREEZE_TIM14() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
146 | #endif
147 |
148 | /**
149 | * @brief WWDG Peripherals Debug mode
150 | */
151 | #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
152 | #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
153 |
154 | /**
155 | * @brief IWDG Peripherals Debug mode
156 | */
157 | #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
158 | #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
159 |
160 | /**
161 | * @brief I2C1 Peripherals Debug mode
162 | */
163 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
164 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
165 |
166 | #if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
167 | /**
168 | * @brief I2C2 Peripherals Debug mode
169 | */
170 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
171 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
172 | #endif
173 |
174 | #if defined (DBGMCU_CR_DBG_CAN1_STOP)
175 | /**
176 | * @brief CAN1 Peripherals Debug mode
177 | */
178 | #define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
179 | #define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
180 | #endif
181 |
182 | #if defined (DBGMCU_CR_DBG_CAN2_STOP)
183 | /**
184 | * @brief CAN2 Peripherals Debug mode
185 | */
186 | #define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
187 | #define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
188 | #endif
189 |
190 | /* Peripherals on APB2 */
191 | #if defined (DBGMCU_CR_DBG_TIM1_STOP)
192 | /**
193 | * @brief TIM1 Peripherals Debug mode
194 | */
195 | #define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
196 | #define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
197 | #endif
198 |
199 | #if defined (DBGMCU_CR_DBG_TIM8_STOP)
200 | /**
201 | * @brief TIM8 Peripherals Debug mode
202 | */
203 | #define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
204 | #define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
205 | #endif
206 |
207 | #if defined (DBGMCU_CR_DBG_TIM9_STOP)
208 | /**
209 | * @brief TIM9 Peripherals Debug mode
210 | */
211 | #define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
212 | #define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
213 | #endif
214 |
215 | #if defined (DBGMCU_CR_DBG_TIM10_STOP)
216 | /**
217 | * @brief TIM10 Peripherals Debug mode
218 | */
219 | #define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
220 | #define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
221 | #endif
222 |
223 | #if defined (DBGMCU_CR_DBG_TIM11_STOP)
224 | /**
225 | * @brief TIM11 Peripherals Debug mode
226 | */
227 | #define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
228 | #define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
229 | #endif
230 |
231 |
232 | #if defined (DBGMCU_CR_DBG_TIM15_STOP)
233 | /**
234 | * @brief TIM15 Peripherals Debug mode
235 | */
236 | #define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
237 | #define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
238 | #endif
239 |
240 | #if defined (DBGMCU_CR_DBG_TIM16_STOP)
241 | /**
242 | * @brief TIM16 Peripherals Debug mode
243 | */
244 | #define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
245 | #define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
246 | #endif
247 |
248 | #if defined (DBGMCU_CR_DBG_TIM17_STOP)
249 | /**
250 | * @brief TIM17 Peripherals Debug mode
251 | */
252 | #define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
253 | #define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
254 | #endif
255 |
256 | /**
257 | * @}
258 | */
259 |
260 | /**
261 | * @}
262 | */
263 |
264 | /* Exported functions --------------------------------------------------------*/
265 |
266 | /** @addtogroup HAL_Exported_Functions
267 | * @{
268 | */
269 |
270 | /** @addtogroup HAL_Exported_Functions_Group1
271 | * @{
272 | */
273 |
274 | /* Initialization and de-initialization functions ******************************/
275 | HAL_StatusTypeDef HAL_Init(void);
276 | HAL_StatusTypeDef HAL_DeInit(void);
277 | void HAL_MspInit(void);
278 | void HAL_MspDeInit(void);
279 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
280 |
281 | /**
282 | * @}
283 | */
284 |
285 | /** @addtogroup HAL_Exported_Functions_Group2
286 | * @{
287 | */
288 |
289 | /* Peripheral Control functions ************************************************/
290 | void HAL_IncTick(void);
291 | void HAL_Delay(__IO uint32_t Delay);
292 | uint32_t HAL_GetTick(void);
293 | void HAL_SuspendTick(void);
294 | void HAL_ResumeTick(void);
295 | uint32_t HAL_GetHalVersion(void);
296 | uint32_t HAL_GetREVID(void);
297 | uint32_t HAL_GetDEVID(void);
298 | void HAL_DBGMCU_EnableDBGSleepMode(void);
299 | void HAL_DBGMCU_DisableDBGSleepMode(void);
300 | void HAL_DBGMCU_EnableDBGStopMode(void);
301 | void HAL_DBGMCU_DisableDBGStopMode(void);
302 | void HAL_DBGMCU_EnableDBGStandbyMode(void);
303 | void HAL_DBGMCU_DisableDBGStandbyMode(void);
304 |
305 | /**
306 | * @}
307 | */
308 |
309 | /**
310 | * @}
311 | */
312 |
313 |
314 | /**
315 | * @}
316 | */
317 |
318 | /**
319 | * @}
320 | */
321 |
322 | #ifdef __cplusplus
323 | }
324 | #endif
325 |
326 | #endif /* __STM32F1xx_HAL_H */
327 |
328 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
329 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_hal_def.h
4 | * @author MCD Application Team
5 | * @version V1.0.4
6 | * @date 29-April-2016
7 | * @brief This file contains HAL common defines, enumeration, macros and
8 | * structures definitions.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT(c) 2016 STMicroelectronics
13 | *
14 | * Redistribution and use in source and binary forms, with or without modification,
15 | * are permitted provided that the following conditions are met:
16 | * 1. Redistributions of source code must retain the above copyright notice,
17 | * this list of conditions and the following disclaimer.
18 | * 2. Redistributions in binary form must reproduce the above copyright notice,
19 | * this list of conditions and the following disclaimer in the documentation
20 | * and/or other materials provided with the distribution.
21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
22 | * may be used to endorse or promote products derived from this software
23 | * without specific prior written permission.
24 | *
25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 | *
36 | ******************************************************************************
37 | */
38 |
39 | /* Define to prevent recursive inclusion -------------------------------------*/
40 | #ifndef __STM32F1xx_HAL_DEF
41 | #define __STM32F1xx_HAL_DEF
42 |
43 | #ifdef __cplusplus
44 | extern "C" {
45 | #endif
46 |
47 | /* Includes ------------------------------------------------------------------*/
48 | #include "stm32f1xx.h"
49 | #include "Legacy/stm32_hal_legacy.h"
50 | #include
51 |
52 | /* Exported types ------------------------------------------------------------*/
53 |
54 | /**
55 | * @brief HAL Status structures definition
56 | */
57 | typedef enum
58 | {
59 | HAL_OK = 0x00,
60 | HAL_ERROR = 0x01,
61 | HAL_BUSY = 0x02,
62 | HAL_TIMEOUT = 0x03
63 | } HAL_StatusTypeDef;
64 |
65 | /**
66 | * @brief HAL Lock structures definition
67 | */
68 | typedef enum
69 | {
70 | HAL_UNLOCKED = 0x00,
71 | HAL_LOCKED = 0x01
72 | } HAL_LockTypeDef;
73 |
74 | /* Exported macro ------------------------------------------------------------*/
75 |
76 | #define HAL_MAX_DELAY 0xFFFFFFFF
77 |
78 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET)
79 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET)
80 |
81 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD_, __DMA_HANDLE_) \
82 | do{ \
83 | (__HANDLE__)->__PPP_DMA_FIELD_ = &(__DMA_HANDLE_); \
84 | (__DMA_HANDLE_).Parent = (__HANDLE__); \
85 | } while(0)
86 |
87 | #define UNUSED(x) ((void)(x))
88 |
89 | /** @brief Reset the Handle's State field.
90 | * @param __HANDLE__: specifies the Peripheral Handle.
91 | * @note This macro can be used for the following purpose:
92 | * - When the Handle is declared as local variable; before passing it as parameter
93 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
94 | * to set to 0 the Handle's "State" field.
95 | * Otherwise, "State" field may have any random value and the first time the function
96 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed
97 | * (i.e. HAL_PPP_MspInit() will not be executed).
98 | * - When there is a need to reconfigure the low level hardware: instead of calling
99 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
100 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function
101 | * HAL_PPP_MspInit() which will reconfigure the low level hardware.
102 | * @retval None
103 | */
104 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0)
105 |
106 | #if (USE_RTOS == 1)
107 | #error " USE_RTOS should be 0 in the current HAL release "
108 | #else
109 | #define __HAL_LOCK(__HANDLE__) \
110 | do{ \
111 | if((__HANDLE__)->Lock == HAL_LOCKED) \
112 | { \
113 | return HAL_BUSY; \
114 | } \
115 | else \
116 | { \
117 | (__HANDLE__)->Lock = HAL_LOCKED; \
118 | } \
119 | }while (0)
120 |
121 | #define __HAL_UNLOCK(__HANDLE__) \
122 | do{ \
123 | (__HANDLE__)->Lock = HAL_UNLOCKED; \
124 | }while (0)
125 | #endif /* USE_RTOS */
126 |
127 | #if defined ( __GNUC__ )
128 | #ifndef __weak
129 | #define __weak __attribute__((weak))
130 | #endif /* __weak */
131 | #ifndef __packed
132 | #define __packed __attribute__((__packed__))
133 | #endif /* __packed */
134 | #endif /* __GNUC__ */
135 |
136 |
137 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
138 | #if defined (__GNUC__) /* GNU Compiler */
139 | #ifndef __ALIGN_END
140 | #define __ALIGN_END __attribute__ ((aligned (4)))
141 | #endif /* __ALIGN_END */
142 | #ifndef __ALIGN_BEGIN
143 | #define __ALIGN_BEGIN
144 | #endif /* __ALIGN_BEGIN */
145 | #else
146 | #ifndef __ALIGN_END
147 | #define __ALIGN_END
148 | #endif /* __ALIGN_END */
149 | #ifndef __ALIGN_BEGIN
150 | #if defined (__CC_ARM) /* ARM Compiler */
151 | #define __ALIGN_BEGIN __align(4)
152 | #elif defined (__ICCARM__) /* IAR Compiler */
153 | #define __ALIGN_BEGIN
154 | #endif /* __CC_ARM */
155 | #endif /* __ALIGN_BEGIN */
156 | #endif /* __GNUC__ */
157 |
158 | /**
159 | * @brief __RAM_FUNC definition
160 | */
161 | #if defined ( __CC_ARM )
162 | /* ARM Compiler
163 | ------------
164 | RAM functions are defined using the toolchain options.
165 | Functions that are executed in RAM should reside in a separate source module.
166 | Using the 'Options for File' dialog you can simply change the 'Code / Const'
167 | area of a module to a memory space in physical RAM.
168 | Available memory areas are declared in the 'Target' tab of the 'Options for Target'
169 | dialog.
170 | */
171 | #define __RAM_FUNC HAL_StatusTypeDef
172 |
173 | #elif defined ( __ICCARM__ )
174 | /* ICCARM Compiler
175 | ---------------
176 | RAM functions are defined using a specific toolchain keyword "__ramfunc".
177 | */
178 | #define __RAM_FUNC __ramfunc HAL_StatusTypeDef
179 |
180 | #elif defined ( __GNUC__ )
181 | /* GNU Compiler
182 | ------------
183 | RAM functions are defined using a specific toolchain attribute
184 | "__attribute__((section(".RamFunc")))".
185 | */
186 | #define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc")))
187 |
188 | #endif
189 |
190 | /**
191 | * @brief __NOINLINE definition
192 | */
193 | #if defined ( __CC_ARM ) || defined ( __GNUC__ )
194 | /* ARM & GNUCompiler
195 | ----------------
196 | */
197 | #define __NOINLINE __attribute__ ( (noinline) )
198 |
199 | #elif defined ( __ICCARM__ )
200 | /* ICCARM Compiler
201 | ---------------
202 | */
203 | #define __NOINLINE _Pragma("optimize = no_inline")
204 |
205 | #endif
206 |
207 |
208 | #ifdef __cplusplus
209 | }
210 | #endif
211 |
212 | #endif /* ___STM32F1xx_HAL_DEF */
213 |
214 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
215 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_hal_dma_ex.h
4 | * @author MCD Application Team
5 | * @version V1.0.4
6 | * @date 29-April-2016
7 | * @brief Header file of DMA HAL extension module.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /* Define to prevent recursive inclusion -------------------------------------*/
39 | #ifndef __STM32F1xx_HAL_DMA_EX_H
40 | #define __STM32F1xx_HAL_DMA_EX_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /* Includes ------------------------------------------------------------------*/
47 | #include "stm32f1xx_hal_def.h"
48 |
49 | /** @addtogroup STM32F1xx_HAL_Driver
50 | * @{
51 | */
52 |
53 | /** @defgroup DMAEx DMAEx
54 | * @{
55 | */
56 |
57 | /* Exported types ------------------------------------------------------------*/
58 | /* Exported constants --------------------------------------------------------*/
59 | /* Exported macro ------------------------------------------------------------*/
60 | /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
61 | * @{
62 | */
63 | /* Interrupt & Flag management */
64 | #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
65 | defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
66 | /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
67 | * @{
68 | */
69 |
70 | /**
71 | * @brief Returns the current DMA Channel transfer complete flag.
72 | * @param __HANDLE__: DMA handle
73 | * @retval The specified transfer complete flag index.
74 | */
75 | #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
76 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
77 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
78 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
79 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
80 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
81 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
82 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
83 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
84 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
85 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
86 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
87 | DMA_FLAG_TC5)
88 |
89 | /**
90 | * @brief Returns the current DMA Channel half transfer complete flag.
91 | * @param __HANDLE__: DMA handle
92 | * @retval The specified half transfer complete flag index.
93 | */
94 | #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
95 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
96 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
97 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
98 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
99 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
100 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
101 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
102 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
103 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
104 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
105 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
106 | DMA_FLAG_HT5)
107 |
108 | /**
109 | * @brief Returns the current DMA Channel transfer error flag.
110 | * @param __HANDLE__: DMA handle
111 | * @retval The specified transfer error flag index.
112 | */
113 | #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
114 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
115 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
116 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
117 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
118 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
119 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
120 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
121 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
122 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
123 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
124 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
125 | DMA_FLAG_TE5)
126 |
127 | /**
128 | * @brief Get the DMA Channel pending flags.
129 | * @param __HANDLE__: DMA handle
130 | * @param __FLAG__: Get the specified flag.
131 | * This parameter can be any combination of the following values:
132 | * @arg DMA_FLAG_TCx: Transfer complete flag
133 | * @arg DMA_FLAG_HTx: Half transfer complete flag
134 | * @arg DMA_FLAG_TEx: Transfer error flag
135 | * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
136 | * @retval The state of FLAG (SET or RESET).
137 | */
138 | #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
139 | (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
140 | (DMA1->ISR & (__FLAG__)))
141 |
142 | /**
143 | * @brief Clears the DMA Channel pending flags.
144 | * @param __HANDLE__: DMA handle
145 | * @param __FLAG__: specifies the flag to clear.
146 | * This parameter can be any combination of the following values:
147 | * @arg DMA_FLAG_TCx: Transfer complete flag
148 | * @arg DMA_FLAG_HTx: Half transfer complete flag
149 | * @arg DMA_FLAG_TEx: Transfer error flag
150 | * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
151 | * @retval None
152 | */
153 | #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
154 | (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
155 | (DMA1->IFCR = (__FLAG__)))
156 |
157 | /**
158 | * @}
159 | */
160 |
161 | #else
162 | /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
163 | * @{
164 | */
165 |
166 | /**
167 | * @brief Returns the current DMA Channel transfer complete flag.
168 | * @param __HANDLE__: DMA handle
169 | * @retval The specified transfer complete flag index.
170 | */
171 | #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
172 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
173 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
174 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
175 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
176 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
177 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
178 | DMA_FLAG_TC7)
179 |
180 | /**
181 | * @brief Returns the current DMA Channel half transfer complete flag.
182 | * @param __HANDLE__: DMA handle
183 | * @retval The specified half transfer complete flag index.
184 | */
185 | #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
186 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
187 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
188 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
189 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
190 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
191 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
192 | DMA_FLAG_HT7)
193 |
194 | /**
195 | * @brief Returns the current DMA Channel transfer error flag.
196 | * @param __HANDLE__: DMA handle
197 | * @retval The specified transfer error flag index.
198 | */
199 | #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
200 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
201 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
202 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
203 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
204 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
205 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
206 | DMA_FLAG_TE7)
207 |
208 | /**
209 | * @brief Get the DMA Channel pending flags.
210 | * @param __HANDLE__: DMA handle
211 | * @param __FLAG__: Get the specified flag.
212 | * This parameter can be any combination of the following values:
213 | * @arg DMA_FLAG_TCx: Transfer complete flag
214 | * @arg DMA_FLAG_HTx: Half transfer complete flag
215 | * @arg DMA_FLAG_TEx: Transfer error flag
216 | * Where x can be 1_7 to select the DMA Channel flag.
217 | * @retval The state of FLAG (SET or RESET).
218 | */
219 |
220 | #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
221 |
222 | /**
223 | * @brief Clears the DMA Channel pending flags.
224 | * @param __HANDLE__: DMA handle
225 | * @param __FLAG__: specifies the flag to clear.
226 | * This parameter can be any combination of the following values:
227 | * @arg DMA_FLAG_TCx: Transfer complete flag
228 | * @arg DMA_FLAG_HTx: Half transfer complete flag
229 | * @arg DMA_FLAG_TEx: Transfer error flag
230 | * Where x can be 1_7 to select the DMA Channel flag.
231 | * @retval None
232 | */
233 | #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
234 |
235 | /**
236 | * @}
237 | */
238 |
239 | #endif
240 |
241 | /**
242 | * @}
243 | */
244 |
245 | /**
246 | * @}
247 | */
248 |
249 | /**
250 | * @}
251 | */
252 |
253 | #ifdef __cplusplus
254 | }
255 | #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
256 | /* STM32F103xG || STM32F105xC || STM32F107xC */
257 |
258 | #endif /* __STM32F1xx_HAL_DMA_H */
259 |
260 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
261 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_hal_flash.h
4 | * @author MCD Application Team
5 | * @version V1.0.4
6 | * @date 29-April-2016
7 | * @brief Header file of Flash HAL module.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /* Define to prevent recursive inclusion -------------------------------------*/
39 | #ifndef __STM32F1xx_HAL_FLASH_H
40 | #define __STM32F1xx_HAL_FLASH_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /* Includes ------------------------------------------------------------------*/
47 | #include "stm32f1xx_hal_def.h"
48 |
49 | /** @addtogroup STM32F1xx_HAL_Driver
50 | * @{
51 | */
52 |
53 | /** @addtogroup FLASH
54 | * @{
55 | */
56 |
57 | /** @addtogroup FLASH_Private_Constants
58 | * @{
59 | */
60 | #define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
61 | /**
62 | * @}
63 | */
64 |
65 | /** @addtogroup FLASH_Private_Macros
66 | * @{
67 | */
68 |
69 | #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \
70 | ((VALUE) == FLASH_TYPEPROGRAM_WORD) || \
71 | ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD))
72 |
73 | #if defined(FLASH_ACR_LATENCY)
74 | #define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \
75 | ((__LATENCY__) == FLASH_LATENCY_1) || \
76 | ((__LATENCY__) == FLASH_LATENCY_2))
77 |
78 | #else
79 | #define IS_FLASH_LATENCY(__LATENCY__) ((__LATENCY__) == FLASH_LATENCY_0)
80 | #endif /* FLASH_ACR_LATENCY */
81 | /**
82 | * @}
83 | */
84 |
85 | /* Exported types ------------------------------------------------------------*/
86 | /** @defgroup FLASH_Exported_Types FLASH Exported Types
87 | * @{
88 | */
89 |
90 |
91 | /**
92 | * @brief FLASH Procedure structure definition
93 | */
94 | typedef enum
95 | {
96 | FLASH_PROC_NONE = 0,
97 | FLASH_PROC_PAGEERASE = 1,
98 | FLASH_PROC_MASSERASE = 2,
99 | FLASH_PROC_PROGRAMHALFWORD = 3,
100 | FLASH_PROC_PROGRAMWORD = 4,
101 | FLASH_PROC_PROGRAMDOUBLEWORD = 5
102 | } FLASH_ProcedureTypeDef;
103 |
104 | /**
105 | * @brief FLASH handle Structure definition
106 | */
107 | typedef struct
108 | {
109 | __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */
110 |
111 | __IO uint32_t DataRemaining; /*!< Internal variable to save the remaining pages to erase or half-word to program in IT context */
112 |
113 | __IO uint32_t Address; /*!< Internal variable to save address selected for program or erase */
114 |
115 | __IO uint64_t Data; /*!< Internal variable to save data to be programmed */
116 |
117 | HAL_LockTypeDef Lock; /*!< FLASH locking object */
118 |
119 | __IO uint32_t ErrorCode; /*!< FLASH error code
120 | This parameter can be a value of @ref FLASH_Error_Codes */
121 | } FLASH_ProcessTypeDef;
122 |
123 | /**
124 | * @}
125 | */
126 |
127 | /* Exported constants --------------------------------------------------------*/
128 | /** @defgroup FLASH_Exported_Constants FLASH Exported Constants
129 | * @{
130 | */
131 |
132 | /** @defgroup FLASH_Error_Codes FLASH Error Codes
133 | * @{
134 | */
135 |
136 | #define HAL_FLASH_ERROR_NONE ((uint32_t)0x00) /*!< No error */
137 | #define HAL_FLASH_ERROR_PROG ((uint32_t)0x01) /*!< Programming error */
138 | #define HAL_FLASH_ERROR_WRP ((uint32_t)0x02) /*!< Write protection error */
139 | #define HAL_FLASH_ERROR_OPTV ((uint32_t)0x04) /*!< Option validity error */
140 |
141 | /**
142 | * @}
143 | */
144 |
145 | /** @defgroup FLASH_Type_Program FLASH Type Program
146 | * @{
147 | */
148 | #define FLASH_TYPEPROGRAM_HALFWORD ((uint32_t)0x01) /*!ACR |= FLASH_ACR_HLFCYA)
202 |
203 | /**
204 | * @brief Disable the FLASH half cycle access.
205 | * @note half cycle access can only be used with a low-frequency clock of less than
206 | 8 MHz that can be obtained with the use of HSI or HSE but not of PLL.
207 | * @retval None
208 | */
209 | #define __HAL_FLASH_HALF_CYCLE_ACCESS_DISABLE() (FLASH->ACR &= (~FLASH_ACR_HLFCYA))
210 |
211 | /**
212 | * @}
213 | */
214 |
215 | #if defined(FLASH_ACR_LATENCY)
216 | /** @defgroup FLASH_EM_Latency FLASH Latency
217 | * @brief macros to handle FLASH Latency
218 | * @{
219 | */
220 |
221 | /**
222 | * @brief Set the FLASH Latency.
223 | * @param __LATENCY__ FLASH Latency
224 | * The value of this parameter depend on device used within the same series
225 | * @retval None
226 | */
227 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (FLASH->ACR = (FLASH->ACR&(~FLASH_ACR_LATENCY)) | (__LATENCY__))
228 |
229 |
230 | /**
231 | * @brief Get the FLASH Latency.
232 | * @retval FLASH Latency
233 | * The value of this parameter depend on device used within the same series
234 | */
235 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
236 |
237 | /**
238 | * @}
239 | */
240 |
241 | #endif /* FLASH_ACR_LATENCY */
242 | /** @defgroup FLASH_Prefetch FLASH Prefetch
243 | * @brief macros to handle FLASH Prefetch buffer
244 | * @{
245 | */
246 | /**
247 | * @brief Enable the FLASH prefetch buffer.
248 | * @retval None
249 | */
250 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTBE)
251 |
252 | /**
253 | * @brief Disable the FLASH prefetch buffer.
254 | * @retval None
255 | */
256 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTBE))
257 |
258 | /**
259 | * @}
260 | */
261 |
262 | /**
263 | * @}
264 | */
265 |
266 | /* Include FLASH HAL Extended module */
267 | #include "stm32f1xx_hal_flash_ex.h"
268 |
269 | /* Exported functions --------------------------------------------------------*/
270 | /** @addtogroup FLASH_Exported_Functions
271 | * @{
272 | */
273 |
274 | /** @addtogroup FLASH_Exported_Functions_Group1
275 | * @{
276 | */
277 | /* IO operation functions *****************************************************/
278 | HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
279 | HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
280 |
281 | /* FLASH IRQ handler function */
282 | void HAL_FLASH_IRQHandler(void);
283 | /* Callbacks in non blocking modes */
284 | void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
285 | void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
286 |
287 | /**
288 | * @}
289 | */
290 |
291 | /** @addtogroup FLASH_Exported_Functions_Group2
292 | * @{
293 | */
294 | /* Peripheral Control functions ***********************************************/
295 | HAL_StatusTypeDef HAL_FLASH_Unlock(void);
296 | HAL_StatusTypeDef HAL_FLASH_Lock(void);
297 | HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
298 | HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
299 | HAL_StatusTypeDef HAL_FLASH_OB_Launch(void);
300 |
301 | /**
302 | * @}
303 | */
304 |
305 | /** @addtogroup FLASH_Exported_Functions_Group3
306 | * @{
307 | */
308 | /* Peripheral State and Error functions ***************************************/
309 | uint32_t HAL_FLASH_GetError(void);
310 |
311 | /**
312 | * @}
313 | */
314 |
315 | /**
316 | * @}
317 | */
318 |
319 | /* Private function -------------------------------------------------*/
320 | /** @addtogroup FLASH_Private_Functions
321 | * @{
322 | */
323 | void FLASH_PageErase(uint32_t PageAddress);
324 | HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
325 | #if defined(FLASH_BANK2_END)
326 | HAL_StatusTypeDef FLASH_WaitForLastOperationBank2(uint32_t Timeout);
327 | #endif /* FLASH_BANK2_END */
328 |
329 | /**
330 | * @}
331 | */
332 |
333 | /**
334 | * @}
335 | */
336 |
337 | /**
338 | * @}
339 | */
340 |
341 | #ifdef __cplusplus
342 | }
343 | #endif
344 |
345 | #endif /* __STM32F1xx_HAL_FLASH_H */
346 |
347 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
348 |
349 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_hal_gpio.h
4 | * @author MCD Application Team
5 | * @version V1.0.4
6 | * @date 29-April-2016
7 | * @brief Header file of GPIO HAL module.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /* Define to prevent recursive inclusion -------------------------------------*/
39 | #ifndef __STM32F1xx_HAL_GPIO_H
40 | #define __STM32F1xx_HAL_GPIO_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /* Includes ------------------------------------------------------------------*/
47 | #include "stm32f1xx_hal_def.h"
48 |
49 | /** @addtogroup STM32F1xx_HAL_Driver
50 | * @{
51 | */
52 |
53 | /** @addtogroup GPIO
54 | * @{
55 | */
56 |
57 | /* Exported types ------------------------------------------------------------*/
58 | /** @defgroup GPIO_Exported_Types GPIO Exported Types
59 | * @{
60 | */
61 |
62 | /**
63 | * @brief GPIO Init structure definition
64 | */
65 | typedef struct
66 | {
67 | uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
68 | This parameter can be any value of @ref GPIO_pins_define */
69 |
70 | uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
71 | This parameter can be a value of @ref GPIO_mode_define */
72 |
73 | uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
74 | This parameter can be a value of @ref GPIO_pull_define */
75 |
76 | uint32_t Speed; /*!< Specifies the speed for the selected pins.
77 | This parameter can be a value of @ref GPIO_speed_define */
78 | }GPIO_InitTypeDef;
79 |
80 | /**
81 | * @brief GPIO Bit SET and Bit RESET enumeration
82 | */
83 | typedef enum
84 | {
85 | GPIO_PIN_RESET = 0,
86 | GPIO_PIN_SET
87 | }GPIO_PinState;
88 |
89 | /**
90 | * @}
91 | */
92 |
93 |
94 | /* Exported constants --------------------------------------------------------*/
95 |
96 | /** @defgroup GPIO_Exported_Constants GPIO Exported Constants
97 | * @{
98 | */
99 |
100 | /** @defgroup GPIO_pins_define GPIO pins define
101 | * @{
102 | */
103 | #define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
104 | #define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
105 | #define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
106 | #define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
107 | #define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
108 | #define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
109 | #define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
110 | #define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
111 | #define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
112 | #define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
113 | #define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
114 | #define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
115 | #define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
116 | #define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
117 | #define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
118 | #define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
119 | #define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
120 |
121 | #define GPIO_PIN_MASK ((uint32_t)0x0000FFFF) /* PIN mask for assert test */
122 | /**
123 | * @}
124 | */
125 |
126 |
127 | /** @defgroup GPIO_mode_define GPIO mode define
128 | * @brief GPIO Configuration Mode
129 | * Elements values convention: 0xX0yz00YZ
130 | * - X : GPIO mode or EXTI Mode
131 | * - y : External IT or Event trigger detection
132 | * - z : IO configuration on External IT or Event
133 | * - Y : Output type (Push Pull or Open Drain)
134 | * - Z : IO Direction mode (Input, Output, Alternate or Analog)
135 | * @{
136 | */
137 | #define GPIO_MODE_INPUT ((uint32_t)0x00000000) /*!< Input Floating Mode */
138 | #define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001) /*!< Output Push Pull Mode */
139 | #define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011) /*!< Output Open Drain Mode */
140 | #define GPIO_MODE_AF_PP ((uint32_t)0x00000002) /*!< Alternate Function Push Pull Mode */
141 | #define GPIO_MODE_AF_OD ((uint32_t)0x00000012) /*!< Alternate Function Open Drain Mode */
142 | #define GPIO_MODE_AF_INPUT GPIO_MODE_INPUT /*!< Alternate Function Input Mode */
143 |
144 | #define GPIO_MODE_ANALOG ((uint32_t)0x00000003) /*!< Analog Mode */
145 |
146 | #define GPIO_MODE_IT_RISING ((uint32_t)0x10110000) /*!< External Interrupt Mode with Rising edge trigger detection */
147 | #define GPIO_MODE_IT_FALLING ((uint32_t)0x10210000) /*!< External Interrupt Mode with Falling edge trigger detection */
148 | #define GPIO_MODE_IT_RISING_FALLING ((uint32_t)0x10310000) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
149 |
150 | #define GPIO_MODE_EVT_RISING ((uint32_t)0x10120000) /*!< External Event Mode with Rising edge trigger detection */
151 | #define GPIO_MODE_EVT_FALLING ((uint32_t)0x10220000) /*!< External Event Mode with Falling edge trigger detection */
152 | #define GPIO_MODE_EVT_RISING_FALLING ((uint32_t)0x10320000) /*!< External Event Mode with Rising/Falling edge trigger detection */
153 |
154 | /**
155 | * @}
156 | */
157 |
158 |
159 | /** @defgroup GPIO_speed_define GPIO speed define
160 | * @brief GPIO Output Maximum frequency
161 | * @{
162 | */
163 | #define GPIO_SPEED_FREQ_LOW (GPIO_CRL_MODE0_1) /*!< Low speed */
164 | #define GPIO_SPEED_FREQ_MEDIUM (GPIO_CRL_MODE0_0) /*!< Medium speed */
165 | #define GPIO_SPEED_FREQ_HIGH (GPIO_CRL_MODE0) /*!< High speed */
166 |
167 | /**
168 | * @}
169 | */
170 |
171 |
172 | /** @defgroup GPIO_pull_define GPIO pull define
173 | * @brief GPIO Pull-Up or Pull-Down Activation
174 | * @{
175 | */
176 | #define GPIO_NOPULL ((uint32_t)0x00000000) /*!< No Pull-up or Pull-down activation */
177 | #define GPIO_PULLUP ((uint32_t)0x00000001) /*!< Pull-up activation */
178 | #define GPIO_PULLDOWN ((uint32_t)0x00000002) /*!< Pull-down activation */
179 |
180 | /**
181 | * @}
182 | */
183 |
184 | /**
185 | * @}
186 | */
187 |
188 |
189 | /* Private macros --------------------------------------------------------*/
190 | /** @addtogroup GPIO_Private_Macros
191 | * @{
192 | */
193 |
194 | #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
195 |
196 | #define IS_GPIO_PIN(PIN) (((PIN) & GPIO_PIN_MASK ) != (uint32_t)0x00)
197 |
198 | #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
199 | ((PULL) == GPIO_PULLDOWN))
200 |
201 | #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || \
202 | ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || ((SPEED) == GPIO_SPEED_FREQ_HIGH))
203 |
204 | #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
205 | ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
206 | ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
207 | ((MODE) == GPIO_MODE_AF_PP) ||\
208 | ((MODE) == GPIO_MODE_AF_OD) ||\
209 | ((MODE) == GPIO_MODE_IT_RISING) ||\
210 | ((MODE) == GPIO_MODE_IT_FALLING) ||\
211 | ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
212 | ((MODE) == GPIO_MODE_EVT_RISING) ||\
213 | ((MODE) == GPIO_MODE_EVT_FALLING) ||\
214 | ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\
215 | ((MODE) == GPIO_MODE_ANALOG))
216 |
217 | /**
218 | * @}
219 | */
220 |
221 |
222 | /* Exported macro ------------------------------------------------------------*/
223 | /** @defgroup GPIO_Exported_Macros GPIO Exported Macros
224 | * @{
225 | */
226 |
227 | /**
228 | * @brief Checks whether the specified EXTI line flag is set or not.
229 | * @param __EXTI_LINE__: specifies the EXTI line flag to check.
230 | * This parameter can be GPIO_PIN_x where x can be(0..15)
231 | * @retval The new state of __EXTI_LINE__ (SET or RESET).
232 | */
233 | #define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
234 |
235 | /**
236 | * @brief Clears the EXTI's line pending flags.
237 | * @param __EXTI_LINE__: specifies the EXTI lines flags to clear.
238 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
239 | * @retval None
240 | */
241 | #define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
242 |
243 | /**
244 | * @brief Checks whether the specified EXTI line is asserted or not.
245 | * @param __EXTI_LINE__: specifies the EXTI line to check.
246 | * This parameter can be GPIO_PIN_x where x can be(0..15)
247 | * @retval The new state of __EXTI_LINE__ (SET or RESET).
248 | */
249 | #define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
250 |
251 | /**
252 | * @brief Clears the EXTI's line pending bits.
253 | * @param __EXTI_LINE__: specifies the EXTI lines to clear.
254 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
255 | * @retval None
256 | */
257 | #define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
258 |
259 | /**
260 | * @brief Generates a Software interrupt on selected EXTI line.
261 | * @param __EXTI_LINE__: specifies the EXTI line to check.
262 | * This parameter can be GPIO_PIN_x where x can be(0..15)
263 | * @retval None
264 | */
265 | #define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
266 |
267 | /* Include GPIO HAL Extension module */
268 | #include "stm32f1xx_hal_gpio_ex.h"
269 |
270 | /**
271 | * @}
272 | */
273 |
274 |
275 |
276 | /* Exported functions --------------------------------------------------------*/
277 | /* Initialization and de-initialization functions *******************************/
278 | /** @addtogroup GPIO_Exported_Functions
279 | * @{
280 | */
281 |
282 | /** @addtogroup GPIO_Exported_Functions_Group1
283 | * @{
284 | */
285 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
286 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
287 | /**
288 | * @}
289 | */
290 |
291 | /* IO operation functions *******************************************************/
292 | /** @addtogroup GPIO_Exported_Functions_Group2
293 | * @{
294 | */
295 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
296 | void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
297 | void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
298 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
299 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
300 | void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
301 | /**
302 | * @}
303 | */
304 |
305 | /**
306 | * @}
307 | */
308 |
309 | /**
310 | * @}
311 | */
312 |
313 | /**
314 | * @}
315 | */
316 |
317 |
318 | #ifdef __cplusplus
319 | }
320 | #endif
321 |
322 | #endif /* __STM32F1xx_HAL_GPIO_H */
323 |
324 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
325 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_hal_pwr.h
4 | * @author MCD Application Team
5 | * @version V1.0.4
6 | * @date 29-April-2016
7 | * @brief Header file of PWR HAL module.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /* Define to prevent recursive inclusion -------------------------------------*/
39 | #ifndef __STM32F1xx_HAL_PWR_H
40 | #define __STM32F1xx_HAL_PWR_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /* Includes ------------------------------------------------------------------*/
47 | #include "stm32f1xx_hal_def.h"
48 |
49 | /** @addtogroup STM32F1xx_HAL_Driver
50 | * @{
51 | */
52 |
53 | /** @addtogroup PWR
54 | * @{
55 | */
56 |
57 | /* Exported types ------------------------------------------------------------*/
58 |
59 | /** @defgroup PWR_Exported_Types PWR Exported Types
60 | * @{
61 | */
62 |
63 | /**
64 | * @brief PWR PVD configuration structure definition
65 | */
66 | typedef struct
67 | {
68 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
69 | This parameter can be a value of @ref PWR_PVD_detection_level */
70 |
71 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
72 | This parameter can be a value of @ref PWR_PVD_Mode */
73 | }PWR_PVDTypeDef;
74 |
75 |
76 | /**
77 | * @}
78 | */
79 |
80 |
81 | /* Internal constants --------------------------------------------------------*/
82 |
83 | /** @addtogroup PWR_Private_Constants
84 | * @{
85 | */
86 |
87 | #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
88 |
89 | /**
90 | * @}
91 | */
92 |
93 |
94 | /* Exported constants --------------------------------------------------------*/
95 |
96 | /** @defgroup PWR_Exported_Constants PWR Exported Constants
97 | * @{
98 | */
99 |
100 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level
101 | * @{
102 | */
103 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_2V2
104 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_2V3
105 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_2V4
106 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_2V5
107 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_2V6
108 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_2V7
109 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_2V8
110 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_2V9
111 |
112 | /**
113 | * @}
114 | */
115 |
116 | /** @defgroup PWR_PVD_Mode PWR PVD Mode
117 | * @{
118 | */
119 | #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
120 | #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
121 | #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
122 | #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
123 | #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
124 | #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
125 | #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
126 |
127 | /**
128 | * @}
129 | */
130 |
131 |
132 | /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
133 | * @{
134 | */
135 |
136 | #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP
137 |
138 | /**
139 | * @}
140 | */
141 |
142 | /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
143 | * @{
144 | */
145 | #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
146 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
147 |
148 | /**
149 | * @}
150 | */
151 |
152 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
153 | * @{
154 | */
155 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
156 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
157 |
158 | /**
159 | * @}
160 | */
161 |
162 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
163 | * @{
164 | */
165 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
166 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
167 |
168 | /**
169 | * @}
170 | */
171 |
172 | /** @defgroup PWR_Flag PWR Flag
173 | * @{
174 | */
175 | #define PWR_FLAG_WU PWR_CSR_WUF
176 | #define PWR_FLAG_SB PWR_CSR_SBF
177 | #define PWR_FLAG_PVDO PWR_CSR_PVDO
178 |
179 |
180 | /**
181 | * @}
182 | */
183 |
184 | /**
185 | * @}
186 | */
187 |
188 | /* Exported macro ------------------------------------------------------------*/
189 | /** @defgroup PWR_Exported_Macros PWR Exported Macros
190 | * @{
191 | */
192 |
193 | /** @brief Check PWR flag is set or not.
194 | * @param __FLAG__: specifies the flag to check.
195 | * This parameter can be one of the following values:
196 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
197 | * was received from the WKUP pin or from the RTC alarm
198 | * An additional wakeup event is detected if the WKUP pin is enabled
199 | * (by setting the EWUP bit) when the WKUP pin level is already high.
200 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
201 | * resumed from StandBy mode.
202 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
203 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
204 | * For this reason, this bit is equal to 0 after Standby or reset
205 | * until the PVDE bit is set.
206 | * @retval The new state of __FLAG__ (TRUE or FALSE).
207 | */
208 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
209 |
210 | /** @brief Clear the PWR's pending flags.
211 | * @param __FLAG__: specifies the flag to clear.
212 | * This parameter can be one of the following values:
213 | * @arg PWR_FLAG_WU: Wake Up flag
214 | * @arg PWR_FLAG_SB: StandBy flag
215 | */
216 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2))
217 |
218 | /**
219 | * @brief Enable interrupt on PVD Exti Line 16.
220 | * @retval None.
221 | */
222 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
223 |
224 | /**
225 | * @brief Disable interrupt on PVD Exti Line 16.
226 | * @retval None.
227 | */
228 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
229 |
230 | /**
231 | * @brief Enable event on PVD Exti Line 16.
232 | * @retval None.
233 | */
234 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
235 |
236 | /**
237 | * @brief Disable event on PVD Exti Line 16.
238 | * @retval None.
239 | */
240 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
241 |
242 |
243 | /**
244 | * @brief PVD EXTI line configuration: set falling edge trigger.
245 | * @retval None.
246 | */
247 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
248 |
249 |
250 | /**
251 | * @brief Disable the PVD Extended Interrupt Falling Trigger.
252 | * @retval None.
253 | */
254 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
255 |
256 |
257 | /**
258 | * @brief PVD EXTI line configuration: set rising edge trigger.
259 | * @retval None.
260 | */
261 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
262 |
263 | /**
264 | * @brief Disable the PVD Extended Interrupt Rising Trigger.
265 | * This parameter can be:
266 | * @retval None.
267 | */
268 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
269 |
270 | /**
271 | * @brief PVD EXTI line configuration: set rising & falling edge trigger.
272 | * @retval None.
273 | */
274 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
275 |
276 | /**
277 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
278 | * This parameter can be:
279 | * @retval None.
280 | */
281 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
282 |
283 |
284 |
285 | /**
286 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
287 | * @retval EXTI PVD Line Status.
288 | */
289 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
290 |
291 | /**
292 | * @brief Clear the PVD EXTI flag.
293 | * @retval None.
294 | */
295 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
296 |
297 | /**
298 | * @brief Generate a Software interrupt on selected EXTI line.
299 | * @retval None.
300 | */
301 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
302 | /**
303 | * @}
304 | */
305 |
306 | /* Private macro -------------------------------------------------------------*/
307 | /** @defgroup PWR_Private_Macros PWR Private Macros
308 | * @{
309 | */
310 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
311 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
312 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
313 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
314 |
315 |
316 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
317 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
318 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
319 | ((MODE) == PWR_PVD_MODE_NORMAL))
320 |
321 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1))
322 |
323 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
324 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
325 |
326 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
327 |
328 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
329 |
330 | /**
331 | * @}
332 | */
333 |
334 |
335 |
336 | /* Exported functions --------------------------------------------------------*/
337 |
338 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions
339 | * @{
340 | */
341 |
342 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
343 | * @{
344 | */
345 |
346 | /* Initialization and de-initialization functions *******************************/
347 | void HAL_PWR_DeInit(void);
348 | void HAL_PWR_EnableBkUpAccess(void);
349 | void HAL_PWR_DisableBkUpAccess(void);
350 |
351 | /**
352 | * @}
353 | */
354 |
355 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
356 | * @{
357 | */
358 |
359 | /* Peripheral Control functions ************************************************/
360 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
361 | /* #define HAL_PWR_ConfigPVD 12*/
362 | void HAL_PWR_EnablePVD(void);
363 | void HAL_PWR_DisablePVD(void);
364 |
365 | /* WakeUp pins configuration functions ****************************************/
366 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
367 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
368 |
369 | /* Low Power modes configuration functions ************************************/
370 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
371 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
372 | void HAL_PWR_EnterSTANDBYMode(void);
373 |
374 | void HAL_PWR_EnableSleepOnExit(void);
375 | void HAL_PWR_DisableSleepOnExit(void);
376 | void HAL_PWR_EnableSEVOnPend(void);
377 | void HAL_PWR_DisableSEVOnPend(void);
378 |
379 |
380 |
381 | void HAL_PWR_PVD_IRQHandler(void);
382 | void HAL_PWR_PVDCallback(void);
383 | /**
384 | * @}
385 | */
386 |
387 | /**
388 | * @}
389 | */
390 |
391 | /**
392 | * @}
393 | */
394 |
395 | /**
396 | * @}
397 | */
398 |
399 | #ifdef __cplusplus
400 | }
401 | #endif
402 |
403 |
404 | #endif /* __STM32F1xx_HAL_PWR_H */
405 |
406 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
407 |
--------------------------------------------------------------------------------
/PWM_Encoder/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_hal_gpio_ex.c
4 | * @author MCD Application Team
5 | * @version V1.0.4
6 | * @date 29-April-2016
7 | * @brief GPIO Extension HAL module driver.
8 | * This file provides firmware functions to manage the following
9 | * functionalities of the General Purpose Input/Output (GPIO) extension peripheral.
10 | * + Extended features functions
11 | *
12 | @verbatim
13 | ==============================================================================
14 | ##### GPIO Peripheral extension features #####
15 | ==============================================================================
16 | [..] GPIO module on STM32F1 family, manage also the AFIO register:
17 | (+) Possibility to use the EVENTOUT Cortex feature
18 |
19 | ##### How to use this driver #####
20 | ==============================================================================
21 | [..] This driver provides functions to use EVENTOUT Cortex feature
22 | (#) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout()
23 | (#) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout()
24 | (#) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout()
25 |
26 | @endverbatim
27 | ******************************************************************************
28 | * @attention
29 | *
30 | * © COPYRIGHT(c) 2016 STMicroelectronics
31 | *
32 | * Redistribution and use in source and binary forms, with or without modification,
33 | * are permitted provided that the following conditions are met:
34 | * 1. Redistributions of source code must retain the above copyright notice,
35 | * this list of conditions and the following disclaimer.
36 | * 2. Redistributions in binary form must reproduce the above copyright notice,
37 | * this list of conditions and the following disclaimer in the documentation
38 | * and/or other materials provided with the distribution.
39 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
40 | * may be used to endorse or promote products derived from this software
41 | * without specific prior written permission.
42 | *
43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
44 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
45 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
46 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
47 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
48 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
49 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
50 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
51 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53 | *
54 | ******************************************************************************
55 | */
56 |
57 | /* Includes ------------------------------------------------------------------*/
58 | #include "stm32f1xx_hal.h"
59 |
60 | /** @addtogroup STM32F1xx_HAL_Driver
61 | * @{
62 | */
63 |
64 | /** @defgroup GPIOEx GPIOEx
65 | * @brief GPIO HAL module driver
66 | * @{
67 | */
68 |
69 | #ifdef HAL_GPIO_MODULE_ENABLED
70 |
71 | /** @defgroup GPIOEx_Exported_Functions GPIOEx Exported Functions
72 | * @{
73 | */
74 |
75 | /** @defgroup GPIOEx_Exported_Functions_Group1 Extended features functions
76 | * @brief Extended features functions
77 | *
78 | @verbatim
79 | ==============================================================================
80 | ##### Extended features functions #####
81 | ==============================================================================
82 | [..] This section provides functions allowing to:
83 | (+) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout()
84 | (+) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout()
85 | (+) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout()
86 |
87 | @endverbatim
88 | * @{
89 | */
90 |
91 | /**
92 | * @brief Configures the port and pin on which the EVENTOUT Cortex signal will be connected.
93 | * @param GPIO_PortSource Select the port used to output the Cortex EVENTOUT signal.
94 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PORT.
95 | * @param GPIO_PinSource Select the pin used to output the Cortex EVENTOUT signal.
96 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PIN.
97 | * @retval None
98 | */
99 | void HAL_GPIOEx_ConfigEventout(uint32_t GPIO_PortSource, uint32_t GPIO_PinSource)
100 | {
101 | /* Verify the parameters */
102 | assert_param(IS_AFIO_EVENTOUT_PORT(GPIO_PortSource));
103 | assert_param(IS_AFIO_EVENTOUT_PIN(GPIO_PinSource));
104 |
105 | /* Apply the new configuration */
106 | MODIFY_REG(AFIO->EVCR, (AFIO_EVCR_PORT)|(AFIO_EVCR_PIN), (GPIO_PortSource)|(GPIO_PinSource));
107 | }
108 |
109 | /**
110 | * @brief Enables the Event Output.
111 | * @retval None
112 | */
113 | void HAL_GPIOEx_EnableEventout(void)
114 | {
115 | SET_BIT(AFIO->EVCR, AFIO_EVCR_EVOE);
116 | }
117 |
118 | /**
119 | * @brief Disables the Event Output.
120 | * @retval None
121 | */
122 | void HAL_GPIOEx_DisableEventout(void)
123 | {
124 | CLEAR_BIT(AFIO->EVCR, AFIO_EVCR_EVOE);
125 | }
126 |
127 | /**
128 | * @}
129 | */
130 |
131 | /**
132 | * @}
133 | */
134 |
135 | #endif /* HAL_GPIO_MODULE_ENABLED */
136 |
137 | /**
138 | * @}
139 | */
140 |
141 | /**
142 | * @}
143 | */
144 |
145 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
146 |
--------------------------------------------------------------------------------
/PWM_Encoder/Inc/gpio.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : gpio.h
4 | * Description : This file contains all the functions prototypes for
5 | * the gpio
6 | ******************************************************************************
7 | *
8 | * COPYRIGHT(c) 2016 STMicroelectronics
9 | *
10 | * Redistribution and use in source and binary forms, with or without modification,
11 | * are permitted provided that the following conditions are met:
12 | * 1. Redistributions of source code must retain the above copyright notice,
13 | * this list of conditions and the following disclaimer.
14 | * 2. Redistributions in binary form must reproduce the above copyright notice,
15 | * this list of conditions and the following disclaimer in the documentation
16 | * and/or other materials provided with the distribution.
17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 | * may be used to endorse or promote products derived from this software
19 | * without specific prior written permission.
20 | *
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 | *
32 | ******************************************************************************
33 | */
34 |
35 | /* Define to prevent recursive inclusion -------------------------------------*/
36 | #ifndef __gpio_H
37 | #define __gpio_H
38 | #ifdef __cplusplus
39 | extern "C" {
40 | #endif
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | #include "stm32f1xx_hal.h"
44 |
45 | /* USER CODE BEGIN Includes */
46 |
47 | /* USER CODE END Includes */
48 |
49 | /* USER CODE BEGIN Private defines */
50 |
51 | /* USER CODE END Private defines */
52 |
53 | void MX_GPIO_Init(void);
54 |
55 | /* USER CODE BEGIN Prototypes */
56 |
57 | /* USER CODE END Prototypes */
58 |
59 | #ifdef __cplusplus
60 | }
61 | #endif
62 | #endif /*__ pinoutConfig_H */
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /**
69 | * @}
70 | */
71 |
72 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
73 |
--------------------------------------------------------------------------------
/PWM_Encoder/Inc/main.h:
--------------------------------------------------------------------------------
1 | /*
2 | * main.h
3 | *
4 | * Created on: 6 Oct 2016
5 | * Author: Kuroro
6 | */
7 |
8 | #ifndef MAIN_H_
9 | #define MAIN_H_
10 |
11 | #define RAISING 0
12 | #define FALLING 1
13 | #define MAX_RC_CH_NB 8
14 | #define USED_RC_CH_NB 6
15 | #define TIMER_1_CH_NB 3
16 | #define TIMER_2_CH_NB 4
17 | #define PWM_Ratio 24 // 72Mhz/3(Prescaler)
18 |
19 | typedef enum {
20 | CH_NOT_DETECTED = 0,
21 | CH_DETECTED
22 | }CH_Detection_TypeDef;
23 |
24 | //#define CH_DETECTED 1
25 | //#define CH_NOT_DETECTED 0
26 |
27 | typedef struct CH_Pwm_Val_s
28 | {
29 | uint32_t Current_Edge;
30 | uint32_t Rising;
31 | uint32_t Falling;
32 | uint32_t Delta;
33 | CH_Detection_TypeDef CH_Detected;
34 | // test only
35 | uint32_t Prev_Delta;
36 |
37 | }CH_Pwm_Val_t;
38 |
39 |
40 |
41 | #endif /* MAIN_H_ */
42 |
--------------------------------------------------------------------------------
/PWM_Encoder/Inc/mxconstants.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : mxconstants.h
4 | * Description : This file contains the common defines of the application
5 | ******************************************************************************
6 | *
7 | * COPYRIGHT(c) 2016 STMicroelectronics
8 | *
9 | * Redistribution and use in source and binary forms, with or without modification,
10 | * are permitted provided that the following conditions are met:
11 | * 1. Redistributions of source code must retain the above copyright notice,
12 | * this list of conditions and the following disclaimer.
13 | * 2. Redistributions in binary form must reproduce the above copyright notice,
14 | * this list of conditions and the following disclaimer in the documentation
15 | * and/or other materials provided with the distribution.
16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 | * may be used to endorse or promote products derived from this software
18 | * without specific prior written permission.
19 | *
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 | *
31 | ******************************************************************************
32 | */
33 | /* Define to prevent recursive inclusion -------------------------------------*/
34 | #ifndef __MXCONSTANT_H
35 | #define __MXCONSTANT_H
36 | /* Includes ------------------------------------------------------------------*/
37 |
38 | /* USER CODE BEGIN Includes */
39 |
40 | /* USER CODE END Includes */
41 |
42 | /* Private define ------------------------------------------------------------*/
43 | #define TIMER_MAX_VAL 65535
44 |
45 | #define RC_CH4_Pin GPIO_PIN_0
46 | #define RC_CH4_GPIO_Port GPIOA
47 | #define RC_CH5_Pin GPIO_PIN_1
48 | #define RC_CH5_GPIO_Port GPIOA
49 | #define RC_CH8_Pin GPIO_PIN_6
50 | #define RC_CH8_GPIO_Port GPIOA
51 | #define RC_CH6_Pin GPIO_PIN_10
52 | #define RC_CH6_GPIO_Port GPIOB
53 | #define RC_CH7_Pin GPIO_PIN_11
54 | #define RC_CH7_GPIO_Port GPIOB
55 | #define RC_CH1_Pin GPIO_PIN_8
56 | #define RC_CH1_GPIO_Port GPIOA
57 | #define RC_CH2_Pin GPIO_PIN_9
58 | #define RC_CH2_GPIO_Port GPIOA
59 | #define RC_CH3_Pin GPIO_PIN_10
60 | #define RC_CH3_GPIO_Port GPIOA
61 | /* USER CODE BEGIN Private defines */
62 |
63 | /* USER CODE END Private defines */
64 |
65 | /**
66 | * @}
67 | */
68 |
69 | /**
70 | * @}
71 | */
72 |
73 | #endif /* __MXCONSTANT_H */
74 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
75 |
--------------------------------------------------------------------------------
/PWM_Encoder/Inc/stm32f1xx_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_it.h
4 | * @brief This file contains the headers of the interrupt handlers.
5 | ******************************************************************************
6 | *
7 | * COPYRIGHT(c) 2016 STMicroelectronics
8 | *
9 | * Redistribution and use in source and binary forms, with or without modification,
10 | * are permitted provided that the following conditions are met:
11 | * 1. Redistributions of source code must retain the above copyright notice,
12 | * this list of conditions and the following disclaimer.
13 | * 2. Redistributions in binary form must reproduce the above copyright notice,
14 | * this list of conditions and the following disclaimer in the documentation
15 | * and/or other materials provided with the distribution.
16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 | * may be used to endorse or promote products derived from this software
18 | * without specific prior written permission.
19 | *
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 | *
31 | ******************************************************************************
32 | */
33 |
34 | /* Define to prevent recursive inclusion -------------------------------------*/
35 | #ifndef __STM32F1xx_IT_H
36 | #define __STM32F1xx_IT_H
37 |
38 | #ifdef __cplusplus
39 | extern "C" {
40 | #endif
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | /* Exported types ------------------------------------------------------------*/
44 | /* Exported constants --------------------------------------------------------*/
45 | /* Exported macro ------------------------------------------------------------*/
46 | /* Exported functions ------------------------------------------------------- */
47 |
48 | void NMI_Handler(void);
49 | void HardFault_Handler(void);
50 | void MemManage_Handler(void);
51 | void BusFault_Handler(void);
52 | void UsageFault_Handler(void);
53 | void SVC_Handler(void);
54 | void DebugMon_Handler(void);
55 | void PendSV_Handler(void);
56 | void SysTick_Handler(void);
57 | void TIM1_CC_IRQHandler(void);
58 | void TIM2_IRQHandler(void);
59 | void TIM3_IRQHandler(void);
60 | void USART2_IRQHandler(void);
61 |
62 | #ifdef __cplusplus
63 | }
64 | #endif
65 |
66 | #endif /* __STM32F1xx_IT_H */
67 |
68 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
69 |
--------------------------------------------------------------------------------
/PWM_Encoder/Inc/tim.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : TIM.h
4 | * Description : This file provides code for the configuration
5 | * of the TIM instances.
6 | ******************************************************************************
7 | *
8 | * COPYRIGHT(c) 2016 STMicroelectronics
9 | *
10 | * Redistribution and use in source and binary forms, with or without modification,
11 | * are permitted provided that the following conditions are met:
12 | * 1. Redistributions of source code must retain the above copyright notice,
13 | * this list of conditions and the following disclaimer.
14 | * 2. Redistributions in binary form must reproduce the above copyright notice,
15 | * this list of conditions and the following disclaimer in the documentation
16 | * and/or other materials provided with the distribution.
17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 | * may be used to endorse or promote products derived from this software
19 | * without specific prior written permission.
20 | *
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 | *
32 | ******************************************************************************
33 | */
34 | /* Define to prevent recursive inclusion -------------------------------------*/
35 | #ifndef __tim_H
36 | #define __tim_H
37 | #ifdef __cplusplus
38 | extern "C" {
39 | #endif
40 |
41 | /* Includes ------------------------------------------------------------------*/
42 | #include "stm32f1xx_hal.h"
43 |
44 | /* USER CODE BEGIN Includes */
45 |
46 | /* USER CODE END Includes */
47 |
48 | extern TIM_HandleTypeDef htim1;
49 | extern TIM_HandleTypeDef htim2;
50 | extern TIM_HandleTypeDef htim3;
51 |
52 | /* USER CODE BEGIN Private defines */
53 |
54 | /* USER CODE END Private defines */
55 |
56 | extern void Error_Handler(void);
57 |
58 | void MX_TIM1_Init(void);
59 | void MX_TIM2_Init(void);
60 | void MX_TIM3_Init(void);
61 |
62 | /* USER CODE BEGIN Prototypes */
63 |
64 | /* USER CODE END Prototypes */
65 |
66 | #ifdef __cplusplus
67 | }
68 | #endif
69 | #endif /*__ tim_H */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
80 |
--------------------------------------------------------------------------------
/PWM_Encoder/Inc/usart.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : USART.h
4 | * Description : This file provides code for the configuration
5 | * of the USART instances.
6 | ******************************************************************************
7 | *
8 | * COPYRIGHT(c) 2016 STMicroelectronics
9 | *
10 | * Redistribution and use in source and binary forms, with or without modification,
11 | * are permitted provided that the following conditions are met:
12 | * 1. Redistributions of source code must retain the above copyright notice,
13 | * this list of conditions and the following disclaimer.
14 | * 2. Redistributions in binary form must reproduce the above copyright notice,
15 | * this list of conditions and the following disclaimer in the documentation
16 | * and/or other materials provided with the distribution.
17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 | * may be used to endorse or promote products derived from this software
19 | * without specific prior written permission.
20 | *
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 | *
32 | ******************************************************************************
33 | */
34 | /* Define to prevent recursive inclusion -------------------------------------*/
35 | #ifndef __usart_H
36 | #define __usart_H
37 | #ifdef __cplusplus
38 | extern "C" {
39 | #endif
40 |
41 | /* Includes ------------------------------------------------------------------*/
42 | #include "stm32f1xx_hal.h"
43 |
44 | /* USER CODE BEGIN Includes */
45 |
46 | /* USER CODE END Includes */
47 |
48 | extern UART_HandleTypeDef huart2;
49 |
50 | /* USER CODE BEGIN Private defines */
51 |
52 | /* USER CODE END Private defines */
53 |
54 | extern void Error_Handler(void);
55 |
56 | void MX_USART2_UART_Init(void);
57 |
58 | /* USER CODE BEGIN Prototypes */
59 |
60 | /* USER CODE END Prototypes */
61 |
62 | #ifdef __cplusplus
63 | }
64 | #endif
65 | #endif /*__ usart_H */
66 |
67 | /**
68 | * @}
69 | */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
76 |
--------------------------------------------------------------------------------
/PWM_Encoder/Middlewares/PWM_RC/PWM_RC.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/thekuroro/PWMtoSbus-STM32/dba3b151cea35a99e73bbf3bbac1310a6159e442/PWM_Encoder/Middlewares/PWM_RC/PWM_RC.c
--------------------------------------------------------------------------------
/PWM_Encoder/Middlewares/PWM_RC/PWM_RC.h:
--------------------------------------------------------------------------------
1 | /*
2 | * PWM_RC.h
3 | *
4 | * Created on: 10 Oct 2016
5 | * Author: Kuroro
6 | */
7 |
8 | #ifndef PWM_RC_PWM_RC_H_
9 | #define PWM_RC_PWM_RC_H_
10 |
11 |
12 |
13 | #endif /* PWM_RC_PWM_RC_H_ */
14 |
--------------------------------------------------------------------------------
/PWM_Encoder/Middlewares/Sbus/Sbus.c:
--------------------------------------------------------------------------------
1 | #include "stm32f1xx_hal.h"
2 | #include "Sbus.h"
3 |
4 | extern UART_HandleTypeDef huart2;
5 |
6 | //uint8_t loc_sbusData[SBUS_FRAME_LENGH] = {0x0f,0x01,0x04,0x25,0x00,0xff,0x07,0x40,0x00,0x02,0x10,0x80,0x2c,0x64,0x21,0x0b,0x59,0x08,0x40,0x00,0x02,0x10,0x80,0x00,0x00};
7 | uint8_t loc_sbusData[SBUS_FRAME_LENGH] = {0x0f,0x01,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
8 |
9 | //int16_t loc_servos[18] = {1100,1023,1023,1500,1023,1023,1023,1023,1023,1023,1023,1023,1023,1023,1023,1023,0,0};
10 |
11 |
12 |
13 | void SBUS_write(uint16_t* channels){
14 |
15 | static uint8_t packet[SBUS_FRAME_LENGH];
16 |
17 |
18 | /* assemble the SBUS packet */
19 |
20 | // SBUS header
21 | packet[0] = _sbusHeader;
22 |
23 | // 16 channels of 11 bit data
24 | packet[1] = (uint8_t) ((channels[0] & 0x07FF));
25 | packet[2] = (uint8_t) ((channels[0] & 0x07FF)>>8 | (channels[1] & 0x07FF)<<3);
26 | packet[3] = (uint8_t) ((channels[1] & 0x07FF)>>5 | (channels[2] & 0x07FF)<<6);
27 | packet[4] = (uint8_t) ((channels[2] & 0x07FF)>>2);
28 | packet[5] = (uint8_t) ((channels[2] & 0x07FF)>>10 | (channels[3] & 0x07FF)<<1);
29 | packet[6] = (uint8_t) ((channels[3] & 0x07FF)>>7 | (channels[4] & 0x07FF)<<4);
30 | packet[7] = (uint8_t) ((channels[4] & 0x07FF)>>4 | (channels[5] & 0x07FF)<<7);
31 | packet[8] = (uint8_t) ((channels[5] & 0x07FF)>>1);
32 | packet[9] = (uint8_t) ((channels[5] & 0x07FF)>>9 | (channels[6] & 0x07FF)<<2);
33 | packet[10] = (uint8_t) ((channels[6] & 0x07FF)>>6 | (channels[7] & 0x07FF)<<5);
34 | packet[11] = (uint8_t) ((channels[7] & 0x07FF)>>3);
35 | packet[12] = (uint8_t) ((channels[8] & 0x07FF));
36 | packet[13] = (uint8_t) ((channels[8] & 0x07FF)>>8 | (channels[9] & 0x07FF)<<3);
37 | packet[14] = (uint8_t) ((channels[9] & 0x07FF)>>5 | (channels[10] & 0x07FF)<<6);
38 | packet[15] = (uint8_t) ((channels[10] & 0x07FF)>>2);
39 | packet[16] = (uint8_t) ((channels[10] & 0x07FF)>>10 | (channels[11] & 0x07FF)<<1);
40 | packet[17] = (uint8_t) ((channels[11] & 0x07FF)>>7 | (channels[12] & 0x07FF)<<4);
41 | packet[18] = (uint8_t) ((channels[12] & 0x07FF)>>4 | (channels[13] & 0x07FF)<<7);
42 | packet[19] = (uint8_t) ((channels[13] & 0x07FF)>>1);
43 | packet[20] = (uint8_t) ((channels[13] & 0x07FF)>>9 | (channels[14] & 0x07FF)<<2);
44 | packet[21] = (uint8_t) ((channels[14] & 0x07FF)>>6 | (channels[15] & 0x07FF)<<5);
45 | packet[22] = (uint8_t) ((channels[15] & 0x07FF)>>3);
46 |
47 | // flags
48 | packet[23] = 0x00;
49 |
50 | // footer
51 | packet[24] = _sbusFooter;
52 |
53 | //uint8_t test[] = "petit test\n";
54 |
55 | HAL_UART_Transmit_IT(&huart2,packet,SBUS_FRAME_LENGH);
56 | //HAL_UART_Transmit_IT(&huart2,test,sizeof(test));
57 | }
58 |
--------------------------------------------------------------------------------
/PWM_Encoder/Middlewares/Sbus/Sbus.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Sbus.h
3 | *
4 | * Created on: 9 Oct 2016
5 | * Author: Kuroro
6 | */
7 |
8 | #ifndef SBUS_SBUS_H_
9 | #define SBUS_SBUS_H_
10 |
11 | #define SBUS_FRAME_LENGH 25
12 | #define _sbusHeader 0x0F
13 | #define _sbusFooter 0x00
14 | #define _sbusLostFrame 0x20
15 | #define _sbusFailSafe 0x10
16 |
17 | void SBUS_write(uint16_t* channels);
18 |
19 | #endif /* SBUS_SBUS_H_ */
20 |
--------------------------------------------------------------------------------
/PWM_Encoder/PWM_Encoder.cfg:
--------------------------------------------------------------------------------
1 | # This is an PWM_Encoder board with a single STM32F103C8Tx chip.
2 | # Generated by System Workbench for STM32
3 |
4 | source [find interface/stlink-v2.cfg]
5 |
6 | set WORKAREASIZE 0x5000
7 | transport select "hla_swd"
8 |
9 |
10 | source [find target/stm32f1x_stlink.cfg]
11 |
12 | # use hardware reset, connect under reset
13 | reset_config none
14 | #reset_config srst_only srst_nogate
15 |
--------------------------------------------------------------------------------
/PWM_Encoder/PWM_Encoder.ioc:
--------------------------------------------------------------------------------
1 | #MicroXplorer Configuration settings - do not modify
2 | File.Version=6
3 | KeepUserPlacement=false
4 | Mcu.Family=STM32F1
5 | Mcu.IP0=NVIC
6 | Mcu.IP1=RCC
7 | Mcu.IP2=SYS
8 | Mcu.IP3=TIM1
9 | Mcu.IP4=TIM2
10 | Mcu.IP5=TIM3
11 | Mcu.IP6=USART2
12 | Mcu.IPNb=7
13 | Mcu.Name=STM32F103C(8-B)Tx
14 | Mcu.Package=LQFP48
15 | Mcu.Pin0=PD0-OSC_IN
16 | Mcu.Pin1=PD1-OSC_OUT
17 | Mcu.Pin10=PA9
18 | Mcu.Pin11=PA10
19 | Mcu.Pin12=PA13
20 | Mcu.Pin13=PA14
21 | Mcu.Pin14=VP_SYS_VS_Systick
22 | Mcu.Pin15=VP_TIM1_VS_ClockSourceINT
23 | Mcu.Pin16=VP_TIM2_VS_ClockSourceINT
24 | Mcu.Pin17=VP_TIM3_VS_ClockSourceINT
25 | Mcu.Pin2=PA0-WKUP
26 | Mcu.Pin3=PA1
27 | Mcu.Pin4=PA2
28 | Mcu.Pin5=PA3
29 | Mcu.Pin6=PA6
30 | Mcu.Pin7=PB10
31 | Mcu.Pin8=PB11
32 | Mcu.Pin9=PA8
33 | Mcu.PinsNb=18
34 | Mcu.UserConstants=TIMER_MAX_VAL,65535
35 | Mcu.UserName=STM32F103C8Tx
36 | MxCube.Version=4.15.1
37 | MxDb.Version=DB.4.0.151
38 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true
39 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true
40 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true
41 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true
42 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true
43 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true
44 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
45 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true
46 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true
47 | NVIC.TIM1_CC_IRQn=true\:0\:0\:false\:false\:true
48 | NVIC.TIM2_IRQn=true\:0\:0\:false\:false\:true
49 | NVIC.TIM3_IRQn=true\:0\:0\:false\:false\:true
50 | NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true
51 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true
52 | PA0-WKUP.GPIOParameters=GPIO_Label
53 | PA0-WKUP.GPIO_Label=RC_CH4
54 | PA0-WKUP.Signal=S_TIM2_CH1_ETR
55 | PA1.GPIOParameters=GPIO_Label
56 | PA1.GPIO_Label=RC_CH5
57 | PA1.Signal=S_TIM2_CH2
58 | PA10.GPIOParameters=GPIO_Label
59 | PA10.GPIO_Label=RC_CH3
60 | PA10.Signal=S_TIM1_CH3
61 | PA13.Mode=Serial_Wire
62 | PA13.Signal=SYS_JTMS-SWDIO
63 | PA14.Mode=Serial_Wire
64 | PA14.Signal=SYS_JTCK-SWCLK
65 | PA2.Mode=Asynchronous
66 | PA2.Signal=USART2_TX
67 | PA3.Mode=Asynchronous
68 | PA3.Signal=USART2_RX
69 | PA6.GPIOParameters=GPIO_Label
70 | PA6.GPIO_Label=RC_CH8
71 | PA6.Signal=S_TIM3_CH1
72 | PA8.GPIOParameters=GPIO_Label
73 | PA8.GPIO_Label=RC_CH1
74 | PA8.Signal=S_TIM1_CH1
75 | PA9.GPIOParameters=GPIO_Label
76 | PA9.GPIO_Label=RC_CH2
77 | PA9.Signal=S_TIM1_CH2
78 | PB10.GPIOParameters=GPIO_Label
79 | PB10.GPIO_Label=RC_CH6
80 | PB10.Signal=S_TIM2_CH3
81 | PB11.GPIOParameters=GPIO_Label
82 | PB11.GPIO_Label=RC_CH7
83 | PB11.Signal=S_TIM2_CH4
84 | PCC.Checker=false
85 | PCC.Line=STM32F103
86 | PCC.MCU=STM32F103C(8-B)Tx
87 | PCC.MXVersion=4.15.1
88 | PCC.PartNumber=STM32F103C8Tx
89 | PCC.Seq0=0
90 | PCC.Series=STM32F1
91 | PCC.Temperature=25
92 | PCC.Vdd=3.3
93 | PD0-OSC_IN.Mode=HSE-External-Oscillator
94 | PD0-OSC_IN.Signal=RCC_OSC_IN
95 | PD1-OSC_OUT.Mode=HSE-External-Oscillator
96 | PD1-OSC_OUT.Signal=RCC_OSC_OUT
97 | ProjectManager.AskForMigrate=true
98 | ProjectManager.BackupPrevious=false
99 | ProjectManager.CompilerOptimize=2
100 | ProjectManager.ComputerToolchain=false
101 | ProjectManager.CoupleFile=true
102 | ProjectManager.DeletePrevious=true
103 | ProjectManager.DeviceId=STM32F103C8Tx
104 | ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.4.0
105 | ProjectManager.FreePins=false
106 | ProjectManager.HalAssertFull=false
107 | ProjectManager.HeapSize=0x200
108 | ProjectManager.KeepUserCode=true
109 | ProjectManager.LastFirmware=true
110 | ProjectManager.LibraryCopy=1
111 | ProjectManager.PreviousToolchain=SW4STM32
112 | ProjectManager.ProjectBuild=false
113 | ProjectManager.ProjectFileName=PWM_Encoder.ioc
114 | ProjectManager.ProjectName=PWM_Encoder
115 | ProjectManager.StackSize=0x400
116 | ProjectManager.TargetToolchain=SW4STM32
117 | ProjectManager.ToolChainLocation=C\:\\Users\\Kuroro\\GIT\\PWM_Encoder\\PWM_Encoder
118 | ProjectManager.UnderRoot=true
119 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false,2-MX_TIM1_Init-TIM1-false,3-MX_TIM2_Init-TIM2-false,4-MX_USART2_UART_Init-USART2-false,5-MX_TIM3_Init-TIM3-false
120 | RCC.ADCFreqValue=36000000
121 | RCC.AHBFreq_Value=72000000
122 | RCC.APB1CLKDivider=RCC_HCLK_DIV2
123 | RCC.APB1Freq_Value=36000000
124 | RCC.APB1TimFreq_Value=72000000
125 | RCC.APB2Freq_Value=72000000
126 | RCC.APB2TimFreq_Value=72000000
127 | RCC.FCLKCortexFreq_Value=72000000
128 | RCC.FamilyName=M
129 | RCC.HCLKFreq_Value=72000000
130 | RCC.HSIState=RCC_HSI_ON
131 | RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSIState,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,USBPrescaler,VCOOutput2Freq_Value
132 | RCC.MCOFreq_Value=72000000
133 | RCC.PLLCLKFreq_Value=72000000
134 | RCC.PLLMCOFreq_Value=36000000
135 | RCC.PLLMUL=RCC_PLL_MUL9
136 | RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
137 | RCC.SYSCLKFreq_VALUE=72000000
138 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
139 | RCC.TimSysFreq_Value=72000000
140 | RCC.USBFreq_Value=48000000
141 | RCC.USBPrescaler=RCC_USBCLKSOURCE_PLL_DIV1_5
142 | RCC.VCOOutput2Freq_Value=8000000
143 | SH.S_TIM1_CH1.0=TIM1_CH1,Input_Capture1_from_TI1
144 | SH.S_TIM1_CH1.ConfNb=1
145 | SH.S_TIM1_CH2.0=TIM1_CH2,Input_Capture2_from_TI2
146 | SH.S_TIM1_CH2.ConfNb=1
147 | SH.S_TIM1_CH3.0=TIM1_CH3,Input_Capture3_from_TI3
148 | SH.S_TIM1_CH3.ConfNb=1
149 | SH.S_TIM2_CH1_ETR.0=TIM2_CH1,Input_Capture1_from_TI1
150 | SH.S_TIM2_CH1_ETR.ConfNb=1
151 | SH.S_TIM2_CH2.0=TIM2_CH2,Input_Capture2_from_TI2
152 | SH.S_TIM2_CH2.ConfNb=1
153 | SH.S_TIM2_CH3.0=TIM2_CH3,Input_Capture3_from_TI3
154 | SH.S_TIM2_CH3.ConfNb=1
155 | SH.S_TIM2_CH4.0=TIM2_CH4,Input_Capture4_from_TI4
156 | SH.S_TIM2_CH4.ConfNb=1
157 | SH.S_TIM3_CH1.0=TIM3_CH1,Input_Capture1_from_TI1
158 | SH.S_TIM3_CH1.ConfNb=1
159 | TIM1.Channel-Input_Capture2_from_TI2=TIM_CHANNEL_2
160 | TIM1.Channel-Input_Capture3_from_TI3=TIM_CHANNEL_3
161 | TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
162 | TIM1.IPParameters=Period,TIM_MasterOutputTrigger,ClockDivision,Channel-Input_Capture2_from_TI2,Channel-Input_Capture3_from_TI3,Prescaler
163 | TIM1.Period=TIMER_MAX_VAL
164 | TIM1.Prescaler=2
165 | TIM1.TIM_MasterOutputTrigger=TIM_TRGO_RESET
166 | TIM2.Channel-Input_Capture2_from_TI2=TIM_CHANNEL_2
167 | TIM2.Channel-Input_Capture3_from_TI3=TIM_CHANNEL_3
168 | TIM2.Channel-Input_Capture4_from_TI4=TIM_CHANNEL_4
169 | TIM2.ClockDivision=TIM_CLOCKDIVISION_DIV1
170 | TIM2.IPParameters=Period,ClockDivision,Channel-Input_Capture2_from_TI2,Channel-Input_Capture3_from_TI3,Prescaler,Channel-Input_Capture4_from_TI4
171 | TIM2.Period=TIMER_MAX_VAL
172 | TIM2.Prescaler=2
173 | TIM3.IPParameters=Period,Prescaler
174 | TIM3.Period=TIMER_MAX_VAL
175 | TIM3.Prescaler=2
176 | USART2.BaudRate=100000
177 | USART2.IPParameters=BaudRate,Parity,StopBits,WordLength,Mode
178 | USART2.Mode=UART_MODE_TX
179 | USART2.Parity=UART_PARITY_EVEN
180 | USART2.StopBits=UART_STOPBITS_2
181 | USART2.WordLength=UART_WORDLENGTH_9B
182 | VP_SYS_VS_Systick.Mode=SysTick
183 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick
184 | VP_TIM1_VS_ClockSourceINT.Mode=Internal
185 | VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
186 | VP_TIM2_VS_ClockSourceINT.Mode=Internal
187 | VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
188 | VP_TIM3_VS_ClockSourceINT.Mode=Internal
189 | VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT
190 | board=PWM_Encoder
191 |
--------------------------------------------------------------------------------
/PWM_Encoder/PWM_Encoder.xml:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | PWM_Encoder
5 | stm32f103c8tx
6 | SWD
7 | ST-LinkV2
8 |
9 |
10 |
--------------------------------------------------------------------------------
/PWM_Encoder/STM32F103C8Tx_FLASH.ld:
--------------------------------------------------------------------------------
1 | /*
2 | *****************************************************************************
3 | **
4 |
5 | ** File : LinkerScript.ld
6 | **
7 | ** Abstract : Linker script for STM32F103C8Tx Device with
8 | ** 64KByte FLASH, 20KByte RAM
9 | **
10 | ** Set heap size, stack size and stack location according
11 | ** to application requirements.
12 | **
13 | ** Set memory bank area and size if external memory is used.
14 | **
15 | ** Target : STMicroelectronics STM32
16 | **
17 | **
18 | ** Distribution: The file is distributed as is, without any warranty
19 | ** of any kind.
20 | **
21 | *****************************************************************************
22 | ** @attention
23 | **
24 | ** © COPYRIGHT(c) 2014 Ac6
25 | **
26 | ** Redistribution and use in source and binary forms, with or without modification,
27 | ** are permitted provided that the following conditions are met:
28 | ** 1. Redistributions of source code must retain the above copyright notice,
29 | ** this list of conditions and the following disclaimer.
30 | ** 2. Redistributions in binary form must reproduce the above copyright notice,
31 | ** this list of conditions and the following disclaimer in the documentation
32 | ** and/or other materials provided with the distribution.
33 | ** 3. Neither the name of Ac6 nor the names of its contributors
34 | ** may be used to endorse or promote products derived from this software
35 | ** without specific prior written permission.
36 | **
37 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
38 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
39 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
40 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
41 | ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
42 | ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
43 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
44 | ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45 | ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
46 | ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47 | **
48 | *****************************************************************************
49 | */
50 |
51 | /* Entry Point */
52 | ENTRY(Reset_Handler)
53 |
54 | /* Highest address of the user mode stack */
55 | _estack = 0x20005000; /* end of RAM */
56 | /* Generate a link error if heap and stack don't fit into RAM */
57 | _Min_Heap_Size = 0x200; /* required amount of heap */
58 | _Min_Stack_Size = 0x400; /* required amount of stack */
59 |
60 | /* Specify the memory areas */
61 | MEMORY
62 | {
63 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K
64 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
65 | }
66 |
67 | /* Define output sections */
68 | SECTIONS
69 | {
70 | /* The startup code goes first into FLASH */
71 | .isr_vector :
72 | {
73 | . = ALIGN(4);
74 | KEEP(*(.isr_vector)) /* Startup code */
75 | . = ALIGN(4);
76 | } >FLASH
77 |
78 | /* The program code and other data goes into FLASH */
79 | .text :
80 | {
81 | . = ALIGN(4);
82 | *(.text) /* .text sections (code) */
83 | *(.text*) /* .text* sections (code) */
84 | *(.glue_7) /* glue arm to thumb code */
85 | *(.glue_7t) /* glue thumb to arm code */
86 | *(.eh_frame)
87 |
88 | KEEP (*(.init))
89 | KEEP (*(.fini))
90 |
91 | . = ALIGN(4);
92 | _etext = .; /* define a global symbols at end of code */
93 | } >FLASH
94 |
95 | /* Constant data goes into FLASH */
96 | .rodata :
97 | {
98 | . = ALIGN(4);
99 | *(.rodata) /* .rodata sections (constants, strings, etc.) */
100 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
101 | . = ALIGN(4);
102 | } >FLASH
103 |
104 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
105 | .ARM : {
106 | __exidx_start = .;
107 | *(.ARM.exidx*)
108 | __exidx_end = .;
109 | } >FLASH
110 |
111 | .preinit_array :
112 | {
113 | PROVIDE_HIDDEN (__preinit_array_start = .);
114 | KEEP (*(.preinit_array*))
115 | PROVIDE_HIDDEN (__preinit_array_end = .);
116 | } >FLASH
117 | .init_array :
118 | {
119 | PROVIDE_HIDDEN (__init_array_start = .);
120 | KEEP (*(SORT(.init_array.*)))
121 | KEEP (*(.init_array*))
122 | PROVIDE_HIDDEN (__init_array_end = .);
123 | } >FLASH
124 | .fini_array :
125 | {
126 | PROVIDE_HIDDEN (__fini_array_start = .);
127 | KEEP (*(SORT(.fini_array.*)))
128 | KEEP (*(.fini_array*))
129 | PROVIDE_HIDDEN (__fini_array_end = .);
130 | } >FLASH
131 |
132 | /* used by the startup to initialize data */
133 | _sidata = LOADADDR(.data);
134 |
135 | /* Initialized data sections goes into RAM, load LMA copy after code */
136 | .data :
137 | {
138 | . = ALIGN(4);
139 | _sdata = .; /* create a global symbol at data start */
140 | *(.data) /* .data sections */
141 | *(.data*) /* .data* sections */
142 |
143 | . = ALIGN(4);
144 | _edata = .; /* define a global symbol at data end */
145 | } >RAM AT> FLASH
146 |
147 |
148 | /* Uninitialized data section */
149 | . = ALIGN(4);
150 | .bss :
151 | {
152 | /* This is used by the startup in order to initialize the .bss secion */
153 | _sbss = .; /* define a global symbol at bss start */
154 | __bss_start__ = _sbss;
155 | *(.bss)
156 | *(.bss*)
157 | *(COMMON)
158 |
159 | . = ALIGN(4);
160 | _ebss = .; /* define a global symbol at bss end */
161 | __bss_end__ = _ebss;
162 | } >RAM
163 |
164 | /* User_heap_stack section, used to check that there is enough RAM left */
165 | ._user_heap_stack :
166 | {
167 | . = ALIGN(8);
168 | PROVIDE ( end = . );
169 | PROVIDE ( _end = . );
170 | . = . + _Min_Heap_Size;
171 | . = . + _Min_Stack_Size;
172 | . = ALIGN(8);
173 | } >RAM
174 |
175 |
176 |
177 | /* Remove information from the standard libraries */
178 | /DISCARD/ :
179 | {
180 | libc.a ( * )
181 | libm.a ( * )
182 | libgcc.a ( * )
183 | }
184 |
185 | .ARM.attributes 0 : { *(.ARM.attributes) }
186 | }
187 |
188 |
189 |
--------------------------------------------------------------------------------
/PWM_Encoder/Src/gpio.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : gpio.c
4 | * Description : This file provides code for the configuration
5 | * of all used GPIO pins.
6 | ******************************************************************************
7 | *
8 | * COPYRIGHT(c) 2016 STMicroelectronics
9 | *
10 | * Redistribution and use in source and binary forms, with or without modification,
11 | * are permitted provided that the following conditions are met:
12 | * 1. Redistributions of source code must retain the above copyright notice,
13 | * this list of conditions and the following disclaimer.
14 | * 2. Redistributions in binary form must reproduce the above copyright notice,
15 | * this list of conditions and the following disclaimer in the documentation
16 | * and/or other materials provided with the distribution.
17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 | * may be used to endorse or promote products derived from this software
19 | * without specific prior written permission.
20 | *
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 | *
32 | ******************************************************************************
33 | */
34 |
35 | /* Includes ------------------------------------------------------------------*/
36 | #include "gpio.h"
37 | /* USER CODE BEGIN 0 */
38 |
39 | /* USER CODE END 0 */
40 |
41 | /*----------------------------------------------------------------------------*/
42 | /* Configure GPIO */
43 | /*----------------------------------------------------------------------------*/
44 | /* USER CODE BEGIN 1 */
45 |
46 | /* USER CODE END 1 */
47 |
48 | /** Configure pins as
49 | * Analog
50 | * Input
51 | * Output
52 | * EVENT_OUT
53 | * EXTI
54 | */
55 | void MX_GPIO_Init(void)
56 | {
57 |
58 | /* GPIO Ports Clock Enable */
59 | __HAL_RCC_GPIOD_CLK_ENABLE();
60 | __HAL_RCC_GPIOA_CLK_ENABLE();
61 | __HAL_RCC_GPIOB_CLK_ENABLE();
62 |
63 | }
64 |
65 | /* USER CODE BEGIN 2 */
66 |
67 | /* USER CODE END 2 */
68 |
69 | /**
70 | * @}
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
78 |
--------------------------------------------------------------------------------
/PWM_Encoder/Src/main.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : main.c
4 | * Description : Main program body
5 | ******************************************************************************
6 | *
7 | * COPYRIGHT(c) 2016 STMicroelectronics
8 | *
9 | * Redistribution and use in source and binary forms, with or without modification,
10 | * are permitted provided that the following conditions are met:
11 | * 1. Redistributions of source code must retain the above copyright notice,
12 | * this list of conditions and the following disclaimer.
13 | * 2. Redistributions in binary form must reproduce the above copyright notice,
14 | * this list of conditions and the following disclaimer in the documentation
15 | * and/or other materials provided with the distribution.
16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 | * may be used to endorse or promote products derived from this software
18 | * without specific prior written permission.
19 | *
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 | *
31 | ******************************************************************************
32 | */
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "stm32f1xx_hal.h"
35 | #include "tim.h"
36 | #include "usart.h"
37 | #include "gpio.h"
38 |
39 | /* USER CODE BEGIN Includes */
40 | #include "main.h"
41 | #include "Sbus.h"
42 |
43 |
44 | /* USER CODE END Includes */
45 |
46 | /* Private variables ---------------------------------------------------------*/
47 |
48 | /* USER CODE BEGIN PV */
49 | /* Private variables ---------------------------------------------------------*/
50 | CH_Pwm_Val_t CH_Pwm_Val[MAX_RC_CH_NB];
51 | uint8_t i;
52 | uint16_t Sbus_CH[16] = {1025,1025,1025,1025,1025,1025,1025,1025,1025,1025,1025,1025,1025,1025,1025,1025};
53 | TIM_IC_InitTypeDef sConfigIC;
54 |
55 |
56 | /* USER CODE END PV */
57 |
58 | /* Private function prototypes -----------------------------------------------*/
59 | void SystemClock_Config(void);
60 | void Error_Handler(void);
61 |
62 | /* USER CODE BEGIN PFP */
63 | /* Private function prototypes -----------------------------------------------*/
64 |
65 | /* USER CODE END PFP */
66 |
67 | /* USER CODE BEGIN 0 */
68 |
69 | /* USER CODE END 0 */
70 |
71 | int main(void)
72 | {
73 |
74 | /* USER CODE BEGIN 1 */
75 |
76 | /* USER CODE END 1 */
77 |
78 | /* MCU Configuration----------------------------------------------------------*/
79 |
80 | /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
81 | HAL_Init();
82 |
83 | /* Configure the system clock */
84 | SystemClock_Config();
85 |
86 | /* Initialize all configured peripherals */
87 | MX_GPIO_Init();
88 | MX_TIM1_Init();
89 | MX_TIM2_Init();
90 | MX_USART2_UART_Init();
91 | MX_TIM3_Init();
92 |
93 | /* USER CODE BEGIN 2 */
94 | // RC channels 1 to 3
95 | HAL_TIM_IC_Start_IT(&htim1,TIM_CHANNEL_1);
96 | HAL_TIM_IC_Start_IT(&htim1,TIM_CHANNEL_2);
97 | HAL_TIM_IC_Start_IT(&htim1,TIM_CHANNEL_3);
98 |
99 | // RC channels 4 to 7
100 | HAL_TIM_IC_Start_IT(&htim2,TIM_CHANNEL_1);
101 | HAL_TIM_IC_Start_IT(&htim2,TIM_CHANNEL_2);
102 | HAL_TIM_IC_Start_IT(&htim2,TIM_CHANNEL_3);
103 | HAL_TIM_IC_Start_IT(&htim2,TIM_CHANNEL_4);
104 |
105 | // RC channel 8
106 | HAL_TIM_IC_Start_IT(&htim3,TIM_CHANNEL_1);
107 |
108 |
109 |
110 | sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
111 | sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
112 | sConfigIC.ICFilter = 0;
113 |
114 |
115 | /* USER CODE END 2 */
116 |
117 | /* Infinite loop */
118 | /* USER CODE BEGIN WHILE */
119 | while (1)
120 | {
121 | for(i=0;iChannel >> 1;
191 |
192 | switch(htim->Channel)
193 | {
194 | case HAL_TIM_ACTIVE_CHANNEL_1:
195 | Ch_Idx = 0;
196 | Ch_Ct_Idx = TIM_CHANNEL_1;
197 | break;
198 | case HAL_TIM_ACTIVE_CHANNEL_2:
199 | Ch_Idx = 1;
200 | Ch_Ct_Idx = TIM_CHANNEL_2;
201 | break;
202 | case HAL_TIM_ACTIVE_CHANNEL_3:
203 | Ch_Idx = 2;
204 | Ch_Ct_Idx = TIM_CHANNEL_3;
205 | break;
206 | case HAL_TIM_ACTIVE_CHANNEL_4:
207 | Ch_Idx = 3;
208 | Ch_Ct_Idx = TIM_CHANNEL_4;
209 | break;
210 | }
211 |
212 | if(htim->Instance == TIM2)
213 | Ch_Idx += TIMER_1_CH_NB;
214 | else if(htim->Instance == TIM3)
215 | Ch_Idx += TIMER_1_CH_NB + TIMER_2_CH_NB;
216 |
217 | // Raising edge
218 | if(CH_Pwm_Val[Ch_Idx].Current_Edge == RAISING)
219 | {
220 | // Set Edge detect flag
221 | CH_Pwm_Val[Ch_Idx].CH_Detected = CH_DETECTED;
222 |
223 | // Set IC polarity to Falling
224 | sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
225 | HAL_TIM_IC_ConfigChannel(htim, &sConfigIC, Ch_Ct_Idx);
226 | CH_Pwm_Val[Ch_Idx].Current_Edge = FALLING;
227 |
228 | // Store raising edge timer value
229 | CH_Pwm_Val[Ch_Idx].Rising = HAL_TIM_ReadCapturedValue(htim,Ch_Ct_Idx);
230 | }
231 | // Falling edge
232 | else{
233 | // Set IC polarity to Raising
234 | sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
235 | HAL_TIM_IC_ConfigChannel(htim, &sConfigIC, Ch_Ct_Idx);
236 | CH_Pwm_Val[Ch_Idx].Current_Edge = RAISING;
237 |
238 | // Store falling edge timer value
239 | CH_Pwm_Val[Ch_Idx].Falling = HAL_TIM_ReadCapturedValue(htim,Ch_Ct_Idx);
240 |
241 | // Compute delta value between raising and falling edge
242 | if(CH_Pwm_Val[Ch_Idx].Rising < CH_Pwm_Val[Ch_Idx].Falling)
243 | CH_Pwm_Val[Ch_Idx].Delta = CH_Pwm_Val[Ch_Idx].Falling - CH_Pwm_Val[Ch_Idx].Rising;
244 | else
245 | CH_Pwm_Val[Ch_Idx].Delta = (TIMER_MAX_VAL - CH_Pwm_Val[Ch_Idx].Rising) + CH_Pwm_Val[Ch_Idx].Falling + 1;
246 | }
247 |
248 | // Start IC interrupt after polarity inversion
249 | HAL_TIM_IC_Start_IT(htim,Ch_Ct_Idx);
250 | }
251 |
252 |
253 | /* USER CODE END 4 */
254 |
255 | /**
256 | * @brief This function is executed in case of error occurrence.
257 | * @param None
258 | * @retval None
259 | */
260 | void Error_Handler(void)
261 | {
262 | /* USER CODE BEGIN Error_Handler */
263 | /* User can add his own implementation to report the HAL error return state */
264 | while(1)
265 | {
266 | }
267 | /* USER CODE END Error_Handler */
268 | }
269 |
270 | #ifdef USE_FULL_ASSERT
271 |
272 | /**
273 | * @brief Reports the name of the source file and the source line number
274 | * where the assert_param error has occurred.
275 | * @param file: pointer to the source file name
276 | * @param line: assert_param error line source number
277 | * @retval None
278 | */
279 | void assert_failed(uint8_t* file, uint32_t line)
280 | {
281 | /* USER CODE BEGIN 6 */
282 | /* User can add his own implementation to report the file name and line number,
283 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
284 | /* USER CODE END 6 */
285 |
286 | }
287 |
288 | #endif
289 |
290 | /**
291 | * @}
292 | */
293 |
294 | /**
295 | * @}
296 | */
297 |
298 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
299 |
--------------------------------------------------------------------------------
/PWM_Encoder/Src/stm32f1xx_hal_msp.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : stm32f1xx_hal_msp.c
4 | * Description : This file provides code for the MSP Initialization
5 | * and de-Initialization codes.
6 | ******************************************************************************
7 | *
8 | * COPYRIGHT(c) 2016 STMicroelectronics
9 | *
10 | * Redistribution and use in source and binary forms, with or without modification,
11 | * are permitted provided that the following conditions are met:
12 | * 1. Redistributions of source code must retain the above copyright notice,
13 | * this list of conditions and the following disclaimer.
14 | * 2. Redistributions in binary form must reproduce the above copyright notice,
15 | * this list of conditions and the following disclaimer in the documentation
16 | * and/or other materials provided with the distribution.
17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 | * may be used to endorse or promote products derived from this software
19 | * without specific prior written permission.
20 | *
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 | *
32 | ******************************************************************************
33 | */
34 | /* Includes ------------------------------------------------------------------*/
35 | #include "stm32f1xx_hal.h"
36 |
37 | extern void Error_Handler(void);
38 | /* USER CODE BEGIN 0 */
39 |
40 | /* USER CODE END 0 */
41 |
42 | /**
43 | * Initializes the Global MSP.
44 | */
45 | void HAL_MspInit(void)
46 | {
47 | /* USER CODE BEGIN MspInit 0 */
48 |
49 | /* USER CODE END MspInit 0 */
50 |
51 | __HAL_RCC_AFIO_CLK_ENABLE();
52 |
53 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
54 |
55 | /* System interrupt init*/
56 | /* MemoryManagement_IRQn interrupt configuration */
57 | HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0);
58 | /* BusFault_IRQn interrupt configuration */
59 | HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0);
60 | /* UsageFault_IRQn interrupt configuration */
61 | HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0);
62 | /* SVCall_IRQn interrupt configuration */
63 | HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0);
64 | /* DebugMonitor_IRQn interrupt configuration */
65 | HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0);
66 | /* PendSV_IRQn interrupt configuration */
67 | HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0);
68 | /* SysTick_IRQn interrupt configuration */
69 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
70 |
71 | /**NOJTAG: JTAG-DP Disabled and SW-DP Enabled
72 | */
73 | __HAL_AFIO_REMAP_SWJ_NOJTAG();
74 |
75 | /* USER CODE BEGIN MspInit 1 */
76 |
77 | /* USER CODE END MspInit 1 */
78 | }
79 |
80 | /* USER CODE BEGIN 1 */
81 |
82 | /* USER CODE END 1 */
83 |
84 | /**
85 | * @}
86 | */
87 |
88 | /**
89 | * @}
90 | */
91 |
92 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
93 |
--------------------------------------------------------------------------------
/PWM_Encoder/Src/stm32f1xx_it.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_it.c
4 | * @brief Interrupt Service Routines.
5 | ******************************************************************************
6 | *
7 | * COPYRIGHT(c) 2016 STMicroelectronics
8 | *
9 | * Redistribution and use in source and binary forms, with or without modification,
10 | * are permitted provided that the following conditions are met:
11 | * 1. Redistributions of source code must retain the above copyright notice,
12 | * this list of conditions and the following disclaimer.
13 | * 2. Redistributions in binary form must reproduce the above copyright notice,
14 | * this list of conditions and the following disclaimer in the documentation
15 | * and/or other materials provided with the distribution.
16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 | * may be used to endorse or promote products derived from this software
18 | * without specific prior written permission.
19 | *
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 | *
31 | ******************************************************************************
32 | */
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "stm32f1xx_hal.h"
35 | #include "stm32f1xx.h"
36 | #include "stm32f1xx_it.h"
37 |
38 | /* USER CODE BEGIN 0 */
39 |
40 | /* USER CODE END 0 */
41 |
42 | /* External variables --------------------------------------------------------*/
43 | extern TIM_HandleTypeDef htim1;
44 | extern TIM_HandleTypeDef htim2;
45 | extern TIM_HandleTypeDef htim3;
46 | extern UART_HandleTypeDef huart2;
47 |
48 | /******************************************************************************/
49 | /* Cortex-M3 Processor Interruption and Exception Handlers */
50 | /******************************************************************************/
51 |
52 | /**
53 | * @brief This function handles Non maskable interrupt.
54 | */
55 | void NMI_Handler(void)
56 | {
57 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
58 |
59 | /* USER CODE END NonMaskableInt_IRQn 0 */
60 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
61 |
62 | /* USER CODE END NonMaskableInt_IRQn 1 */
63 | }
64 |
65 | /**
66 | * @brief This function handles Hard fault interrupt.
67 | */
68 | void HardFault_Handler(void)
69 | {
70 | /* USER CODE BEGIN HardFault_IRQn 0 */
71 |
72 | /* USER CODE END HardFault_IRQn 0 */
73 | while (1)
74 | {
75 | }
76 | /* USER CODE BEGIN HardFault_IRQn 1 */
77 |
78 | /* USER CODE END HardFault_IRQn 1 */
79 | }
80 |
81 | /**
82 | * @brief This function handles Memory management fault.
83 | */
84 | void MemManage_Handler(void)
85 | {
86 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */
87 |
88 | /* USER CODE END MemoryManagement_IRQn 0 */
89 | while (1)
90 | {
91 | }
92 | /* USER CODE BEGIN MemoryManagement_IRQn 1 */
93 |
94 | /* USER CODE END MemoryManagement_IRQn 1 */
95 | }
96 |
97 | /**
98 | * @brief This function handles Prefetch fault, memory access fault.
99 | */
100 | void BusFault_Handler(void)
101 | {
102 | /* USER CODE BEGIN BusFault_IRQn 0 */
103 |
104 | /* USER CODE END BusFault_IRQn 0 */
105 | while (1)
106 | {
107 | }
108 | /* USER CODE BEGIN BusFault_IRQn 1 */
109 |
110 | /* USER CODE END BusFault_IRQn 1 */
111 | }
112 |
113 | /**
114 | * @brief This function handles Undefined instruction or illegal state.
115 | */
116 | void UsageFault_Handler(void)
117 | {
118 | /* USER CODE BEGIN UsageFault_IRQn 0 */
119 |
120 | /* USER CODE END UsageFault_IRQn 0 */
121 | while (1)
122 | {
123 | }
124 | /* USER CODE BEGIN UsageFault_IRQn 1 */
125 |
126 | /* USER CODE END UsageFault_IRQn 1 */
127 | }
128 |
129 | /**
130 | * @brief This function handles System service call via SWI instruction.
131 | */
132 | void SVC_Handler(void)
133 | {
134 | /* USER CODE BEGIN SVCall_IRQn 0 */
135 |
136 | /* USER CODE END SVCall_IRQn 0 */
137 | /* USER CODE BEGIN SVCall_IRQn 1 */
138 |
139 | /* USER CODE END SVCall_IRQn 1 */
140 | }
141 |
142 | /**
143 | * @brief This function handles Debug monitor.
144 | */
145 | void DebugMon_Handler(void)
146 | {
147 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */
148 |
149 | /* USER CODE END DebugMonitor_IRQn 0 */
150 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */
151 |
152 | /* USER CODE END DebugMonitor_IRQn 1 */
153 | }
154 |
155 | /**
156 | * @brief This function handles Pendable request for system service.
157 | */
158 | void PendSV_Handler(void)
159 | {
160 | /* USER CODE BEGIN PendSV_IRQn 0 */
161 |
162 | /* USER CODE END PendSV_IRQn 0 */
163 | /* USER CODE BEGIN PendSV_IRQn 1 */
164 |
165 | /* USER CODE END PendSV_IRQn 1 */
166 | }
167 |
168 | /**
169 | * @brief This function handles System tick timer.
170 | */
171 | void SysTick_Handler(void)
172 | {
173 | /* USER CODE BEGIN SysTick_IRQn 0 */
174 |
175 | /* USER CODE END SysTick_IRQn 0 */
176 | HAL_IncTick();
177 | HAL_SYSTICK_IRQHandler();
178 | /* USER CODE BEGIN SysTick_IRQn 1 */
179 |
180 | /* USER CODE END SysTick_IRQn 1 */
181 | }
182 |
183 | /******************************************************************************/
184 | /* STM32F1xx Peripheral Interrupt Handlers */
185 | /* Add here the Interrupt Handlers for the used peripherals. */
186 | /* For the available peripheral interrupt handler names, */
187 | /* please refer to the startup file (startup_stm32f1xx.s). */
188 | /******************************************************************************/
189 |
190 | /**
191 | * @brief This function handles TIM1 capture compare interrupt.
192 | */
193 | void TIM1_CC_IRQHandler(void)
194 | {
195 | /* USER CODE BEGIN TIM1_CC_IRQn 0 */
196 |
197 | /* USER CODE END TIM1_CC_IRQn 0 */
198 | HAL_TIM_IRQHandler(&htim1);
199 | /* USER CODE BEGIN TIM1_CC_IRQn 1 */
200 |
201 | /* USER CODE END TIM1_CC_IRQn 1 */
202 | }
203 |
204 | /**
205 | * @brief This function handles TIM2 global interrupt.
206 | */
207 | void TIM2_IRQHandler(void)
208 | {
209 | /* USER CODE BEGIN TIM2_IRQn 0 */
210 |
211 | /* USER CODE END TIM2_IRQn 0 */
212 | HAL_TIM_IRQHandler(&htim2);
213 | /* USER CODE BEGIN TIM2_IRQn 1 */
214 |
215 | /* USER CODE END TIM2_IRQn 1 */
216 | }
217 |
218 | /**
219 | * @brief This function handles TIM3 global interrupt.
220 | */
221 | void TIM3_IRQHandler(void)
222 | {
223 | /* USER CODE BEGIN TIM3_IRQn 0 */
224 |
225 | /* USER CODE END TIM3_IRQn 0 */
226 | HAL_TIM_IRQHandler(&htim3);
227 | /* USER CODE BEGIN TIM3_IRQn 1 */
228 |
229 | /* USER CODE END TIM3_IRQn 1 */
230 | }
231 |
232 | /**
233 | * @brief This function handles USART2 global interrupt.
234 | */
235 | void USART2_IRQHandler(void)
236 | {
237 | /* USER CODE BEGIN USART2_IRQn 0 */
238 |
239 | /* USER CODE END USART2_IRQn 0 */
240 | HAL_UART_IRQHandler(&huart2);
241 | /* USER CODE BEGIN USART2_IRQn 1 */
242 |
243 | /* USER CODE END USART2_IRQn 1 */
244 | }
245 |
246 | /* USER CODE BEGIN 1 */
247 |
248 | /* USER CODE END 1 */
249 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
250 |
--------------------------------------------------------------------------------
/PWM_Encoder/Src/tim.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : TIM.c
4 | * Description : This file provides code for the configuration
5 | * of the TIM instances.
6 | ******************************************************************************
7 | *
8 | * COPYRIGHT(c) 2016 STMicroelectronics
9 | *
10 | * Redistribution and use in source and binary forms, with or without modification,
11 | * are permitted provided that the following conditions are met:
12 | * 1. Redistributions of source code must retain the above copyright notice,
13 | * this list of conditions and the following disclaimer.
14 | * 2. Redistributions in binary form must reproduce the above copyright notice,
15 | * this list of conditions and the following disclaimer in the documentation
16 | * and/or other materials provided with the distribution.
17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 | * may be used to endorse or promote products derived from this software
19 | * without specific prior written permission.
20 | *
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 | *
32 | ******************************************************************************
33 | */
34 |
35 | /* Includes ------------------------------------------------------------------*/
36 | #include "tim.h"
37 |
38 | #include "gpio.h"
39 |
40 | /* USER CODE BEGIN 0 */
41 |
42 | /* USER CODE END 0 */
43 |
44 | TIM_HandleTypeDef htim1;
45 | TIM_HandleTypeDef htim2;
46 | TIM_HandleTypeDef htim3;
47 |
48 | /* TIM1 init function */
49 | void MX_TIM1_Init(void)
50 | {
51 | TIM_ClockConfigTypeDef sClockSourceConfig;
52 | TIM_MasterConfigTypeDef sMasterConfig;
53 | TIM_IC_InitTypeDef sConfigIC;
54 |
55 | htim1.Instance = TIM1;
56 | htim1.Init.Prescaler = 2;
57 | htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
58 | htim1.Init.Period = TIMER_MAX_VAL;
59 | htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
60 | htim1.Init.RepetitionCounter = 0;
61 | if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
62 | {
63 | Error_Handler();
64 | }
65 |
66 | sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
67 | if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
68 | {
69 | Error_Handler();
70 | }
71 |
72 | if (HAL_TIM_IC_Init(&htim1) != HAL_OK)
73 | {
74 | Error_Handler();
75 | }
76 |
77 | sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
78 | sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
79 | if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
80 | {
81 | Error_Handler();
82 | }
83 |
84 | sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
85 | sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
86 | sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
87 | sConfigIC.ICFilter = 0;
88 | if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
89 | {
90 | Error_Handler();
91 | }
92 |
93 | if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
94 | {
95 | Error_Handler();
96 | }
97 |
98 | if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_3) != HAL_OK)
99 | {
100 | Error_Handler();
101 | }
102 |
103 | }
104 | /* TIM2 init function */
105 | void MX_TIM2_Init(void)
106 | {
107 | TIM_ClockConfigTypeDef sClockSourceConfig;
108 | TIM_MasterConfigTypeDef sMasterConfig;
109 | TIM_IC_InitTypeDef sConfigIC;
110 |
111 | htim2.Instance = TIM2;
112 | htim2.Init.Prescaler = 2;
113 | htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
114 | htim2.Init.Period = TIMER_MAX_VAL;
115 | htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
116 | if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
117 | {
118 | Error_Handler();
119 | }
120 |
121 | sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
122 | if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
123 | {
124 | Error_Handler();
125 | }
126 |
127 | if (HAL_TIM_IC_Init(&htim2) != HAL_OK)
128 | {
129 | Error_Handler();
130 | }
131 |
132 | sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
133 | sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
134 | if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
135 | {
136 | Error_Handler();
137 | }
138 |
139 | sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
140 | sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
141 | sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
142 | sConfigIC.ICFilter = 0;
143 | if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
144 | {
145 | Error_Handler();
146 | }
147 |
148 | if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
149 | {
150 | Error_Handler();
151 | }
152 |
153 | if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_3) != HAL_OK)
154 | {
155 | Error_Handler();
156 | }
157 |
158 | if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_4) != HAL_OK)
159 | {
160 | Error_Handler();
161 | }
162 |
163 | }
164 | /* TIM3 init function */
165 | void MX_TIM3_Init(void)
166 | {
167 | TIM_ClockConfigTypeDef sClockSourceConfig;
168 | TIM_MasterConfigTypeDef sMasterConfig;
169 | TIM_IC_InitTypeDef sConfigIC;
170 |
171 | htim3.Instance = TIM3;
172 | htim3.Init.Prescaler = 2;
173 | htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
174 | htim3.Init.Period = TIMER_MAX_VAL;
175 | htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
176 | if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
177 | {
178 | Error_Handler();
179 | }
180 |
181 | sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
182 | if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
183 | {
184 | Error_Handler();
185 | }
186 |
187 | if (HAL_TIM_IC_Init(&htim3) != HAL_OK)
188 | {
189 | Error_Handler();
190 | }
191 |
192 | sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
193 | sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
194 | if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
195 | {
196 | Error_Handler();
197 | }
198 |
199 | sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
200 | sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
201 | sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
202 | sConfigIC.ICFilter = 0;
203 | if (HAL_TIM_IC_ConfigChannel(&htim3, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
204 | {
205 | Error_Handler();
206 | }
207 |
208 | }
209 |
210 | void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
211 | {
212 |
213 | GPIO_InitTypeDef GPIO_InitStruct;
214 | if(tim_baseHandle->Instance==TIM1)
215 | {
216 | /* USER CODE BEGIN TIM1_MspInit 0 */
217 |
218 | /* USER CODE END TIM1_MspInit 0 */
219 | /* Peripheral clock enable */
220 | __HAL_RCC_TIM1_CLK_ENABLE();
221 |
222 | /**TIM1 GPIO Configuration
223 | PA8 ------> TIM1_CH1
224 | PA9 ------> TIM1_CH2
225 | PA10 ------> TIM1_CH3
226 | */
227 | GPIO_InitStruct.Pin = RC_CH1_Pin|RC_CH2_Pin|RC_CH3_Pin;
228 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
229 | GPIO_InitStruct.Pull = GPIO_NOPULL;
230 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
231 |
232 | /* Peripheral interrupt init */
233 | HAL_NVIC_SetPriority(TIM1_CC_IRQn, 0, 0);
234 | HAL_NVIC_EnableIRQ(TIM1_CC_IRQn);
235 | /* USER CODE BEGIN TIM1_MspInit 1 */
236 |
237 | /* USER CODE END TIM1_MspInit 1 */
238 | }
239 | else if(tim_baseHandle->Instance==TIM2)
240 | {
241 | /* USER CODE BEGIN TIM2_MspInit 0 */
242 |
243 | /* USER CODE END TIM2_MspInit 0 */
244 | /* Peripheral clock enable */
245 | __HAL_RCC_TIM2_CLK_ENABLE();
246 |
247 | /**TIM2 GPIO Configuration
248 | PA0-WKUP ------> TIM2_CH1
249 | PA1 ------> TIM2_CH2
250 | PB10 ------> TIM2_CH3
251 | PB11 ------> TIM2_CH4
252 | */
253 | GPIO_InitStruct.Pin = RC_CH4_Pin|RC_CH5_Pin;
254 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
255 | GPIO_InitStruct.Pull = GPIO_NOPULL;
256 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
257 |
258 | GPIO_InitStruct.Pin = RC_CH6_Pin|RC_CH7_Pin;
259 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
260 | GPIO_InitStruct.Pull = GPIO_NOPULL;
261 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
262 |
263 | __HAL_AFIO_REMAP_TIM2_PARTIAL_2();
264 |
265 | /* Peripheral interrupt init */
266 | HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
267 | HAL_NVIC_EnableIRQ(TIM2_IRQn);
268 | /* USER CODE BEGIN TIM2_MspInit 1 */
269 |
270 | /* USER CODE END TIM2_MspInit 1 */
271 | }
272 | else if(tim_baseHandle->Instance==TIM3)
273 | {
274 | /* USER CODE BEGIN TIM3_MspInit 0 */
275 |
276 | /* USER CODE END TIM3_MspInit 0 */
277 | /* Peripheral clock enable */
278 | __HAL_RCC_TIM3_CLK_ENABLE();
279 |
280 | /**TIM3 GPIO Configuration
281 | PA6 ------> TIM3_CH1
282 | */
283 | GPIO_InitStruct.Pin = RC_CH8_Pin;
284 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
285 | GPIO_InitStruct.Pull = GPIO_NOPULL;
286 | HAL_GPIO_Init(RC_CH8_GPIO_Port, &GPIO_InitStruct);
287 |
288 | /* Peripheral interrupt init */
289 | HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
290 | HAL_NVIC_EnableIRQ(TIM3_IRQn);
291 | /* USER CODE BEGIN TIM3_MspInit 1 */
292 |
293 | /* USER CODE END TIM3_MspInit 1 */
294 | }
295 | }
296 |
297 | void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
298 | {
299 |
300 | if(tim_baseHandle->Instance==TIM1)
301 | {
302 | /* USER CODE BEGIN TIM1_MspDeInit 0 */
303 |
304 | /* USER CODE END TIM1_MspDeInit 0 */
305 | /* Peripheral clock disable */
306 | __HAL_RCC_TIM1_CLK_DISABLE();
307 |
308 | /**TIM1 GPIO Configuration
309 | PA8 ------> TIM1_CH1
310 | PA9 ------> TIM1_CH2
311 | PA10 ------> TIM1_CH3
312 | */
313 | HAL_GPIO_DeInit(GPIOA, RC_CH1_Pin|RC_CH2_Pin|RC_CH3_Pin);
314 |
315 | /* Peripheral interrupt Deinit*/
316 | HAL_NVIC_DisableIRQ(TIM1_CC_IRQn);
317 |
318 | /* USER CODE BEGIN TIM1_MspDeInit 1 */
319 |
320 | /* USER CODE END TIM1_MspDeInit 1 */
321 | }
322 | else if(tim_baseHandle->Instance==TIM2)
323 | {
324 | /* USER CODE BEGIN TIM2_MspDeInit 0 */
325 |
326 | /* USER CODE END TIM2_MspDeInit 0 */
327 | /* Peripheral clock disable */
328 | __HAL_RCC_TIM2_CLK_DISABLE();
329 |
330 | /**TIM2 GPIO Configuration
331 | PA0-WKUP ------> TIM2_CH1
332 | PA1 ------> TIM2_CH2
333 | PB10 ------> TIM2_CH3
334 | PB11 ------> TIM2_CH4
335 | */
336 | HAL_GPIO_DeInit(GPIOA, RC_CH4_Pin|RC_CH5_Pin);
337 |
338 | HAL_GPIO_DeInit(GPIOB, RC_CH6_Pin|RC_CH7_Pin);
339 |
340 | /* Peripheral interrupt Deinit*/
341 | HAL_NVIC_DisableIRQ(TIM2_IRQn);
342 |
343 | /* USER CODE BEGIN TIM2_MspDeInit 1 */
344 |
345 | /* USER CODE END TIM2_MspDeInit 1 */
346 | }
347 | else if(tim_baseHandle->Instance==TIM3)
348 | {
349 | /* USER CODE BEGIN TIM3_MspDeInit 0 */
350 |
351 | /* USER CODE END TIM3_MspDeInit 0 */
352 | /* Peripheral clock disable */
353 | __HAL_RCC_TIM3_CLK_DISABLE();
354 |
355 | /**TIM3 GPIO Configuration
356 | PA6 ------> TIM3_CH1
357 | */
358 | HAL_GPIO_DeInit(RC_CH8_GPIO_Port, RC_CH8_Pin);
359 |
360 | /* Peripheral interrupt Deinit*/
361 | HAL_NVIC_DisableIRQ(TIM3_IRQn);
362 |
363 | /* USER CODE BEGIN TIM3_MspDeInit 1 */
364 |
365 | /* USER CODE END TIM3_MspDeInit 1 */
366 | }
367 | }
368 |
369 | /* USER CODE BEGIN 1 */
370 |
371 | /* USER CODE END 1 */
372 |
373 | /**
374 | * @}
375 | */
376 |
377 | /**
378 | * @}
379 | */
380 |
381 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
382 |
--------------------------------------------------------------------------------
/PWM_Encoder/Src/usart.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : USART.c
4 | * Description : This file provides code for the configuration
5 | * of the USART instances.
6 | ******************************************************************************
7 | *
8 | * COPYRIGHT(c) 2016 STMicroelectronics
9 | *
10 | * Redistribution and use in source and binary forms, with or without modification,
11 | * are permitted provided that the following conditions are met:
12 | * 1. Redistributions of source code must retain the above copyright notice,
13 | * this list of conditions and the following disclaimer.
14 | * 2. Redistributions in binary form must reproduce the above copyright notice,
15 | * this list of conditions and the following disclaimer in the documentation
16 | * and/or other materials provided with the distribution.
17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 | * may be used to endorse or promote products derived from this software
19 | * without specific prior written permission.
20 | *
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 | *
32 | ******************************************************************************
33 | */
34 |
35 | /* Includes ------------------------------------------------------------------*/
36 | #include "usart.h"
37 |
38 | #include "gpio.h"
39 |
40 | /* USER CODE BEGIN 0 */
41 |
42 | /* USER CODE END 0 */
43 |
44 | UART_HandleTypeDef huart2;
45 |
46 | /* USART2 init function */
47 |
48 | void MX_USART2_UART_Init(void)
49 | {
50 |
51 | huart2.Instance = USART2;
52 | huart2.Init.BaudRate = 100000;
53 | huart2.Init.WordLength = UART_WORDLENGTH_9B;
54 | huart2.Init.StopBits = UART_STOPBITS_2;
55 | huart2.Init.Parity = UART_PARITY_EVEN;
56 | huart2.Init.Mode = UART_MODE_TX;
57 | huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
58 | huart2.Init.OverSampling = UART_OVERSAMPLING_16;
59 | if (HAL_UART_Init(&huart2) != HAL_OK)
60 | {
61 | Error_Handler();
62 | }
63 |
64 | }
65 |
66 | void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
67 | {
68 |
69 | GPIO_InitTypeDef GPIO_InitStruct;
70 | if(uartHandle->Instance==USART2)
71 | {
72 | /* USER CODE BEGIN USART2_MspInit 0 */
73 |
74 | /* USER CODE END USART2_MspInit 0 */
75 | /* Peripheral clock enable */
76 | __HAL_RCC_USART2_CLK_ENABLE();
77 |
78 | /**USART2 GPIO Configuration
79 | PA2 ------> USART2_TX
80 | PA3 ------> USART2_RX
81 | */
82 | GPIO_InitStruct.Pin = GPIO_PIN_2;
83 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
84 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
85 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
86 |
87 | GPIO_InitStruct.Pin = GPIO_PIN_3;
88 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
89 | GPIO_InitStruct.Pull = GPIO_NOPULL;
90 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
91 |
92 | /* Peripheral interrupt init */
93 | HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
94 | HAL_NVIC_EnableIRQ(USART2_IRQn);
95 | /* USER CODE BEGIN USART2_MspInit 1 */
96 |
97 | /* USER CODE END USART2_MspInit 1 */
98 | }
99 | }
100 |
101 | void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
102 | {
103 |
104 | if(uartHandle->Instance==USART2)
105 | {
106 | /* USER CODE BEGIN USART2_MspDeInit 0 */
107 |
108 | /* USER CODE END USART2_MspDeInit 0 */
109 | /* Peripheral clock disable */
110 | __HAL_RCC_USART2_CLK_DISABLE();
111 |
112 | /**USART2 GPIO Configuration
113 | PA2 ------> USART2_TX
114 | PA3 ------> USART2_RX
115 | */
116 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
117 |
118 | /* Peripheral interrupt Deinit*/
119 | HAL_NVIC_DisableIRQ(USART2_IRQn);
120 |
121 | }
122 | /* USER CODE BEGIN USART2_MspDeInit 1 */
123 |
124 | /* USER CODE END USART2_MspDeInit 1 */
125 | }
126 |
127 | /* USER CODE BEGIN 1 */
128 |
129 | /* USER CODE END 1 */
130 |
131 | /**
132 | * @}
133 | */
134 |
135 | /**
136 | * @}
137 | */
138 |
139 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
140 |
--------------------------------------------------------------------------------
/PWM_Encoder/Src/usb_device.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file : USB_DEVICE
4 | * @version : v1.0_Cube
5 | * @brief : This file implements the USB Device
6 | ******************************************************************************
7 | *
8 | * COPYRIGHT(c) 2016 STMicroelectronics
9 | *
10 | * Redistribution and use in source and binary forms, with or without modification,
11 | * are permitted provided that the following conditions are met:
12 | * 1. Redistributions of source code must retain the above copyright notice,
13 | * this list of conditions and the following disclaimer.
14 | * 2. Redistributions in binary form must reproduce the above copyright notice,
15 | * this list of conditions and the following disclaimer in the documentation
16 | * and/or other materials provided with the distribution.
17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 | * may be used to endorse or promote products derived from this software
19 | * without specific prior written permission.
20 | *
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 | *
32 | ******************************************************************************
33 | */
34 |
35 | /* Includes ------------------------------------------------------------------*/
36 |
37 | #include "usb_device.h"
38 | #include "usbd_core.h"
39 | #include "usbd_desc.h"
40 | #include "usbd_cdc.h"
41 | #include "usbd_cdc_if.h"
42 |
43 | /* USB Device Core handle declaration */
44 | USBD_HandleTypeDef hUsbDeviceFS;
45 |
46 | /* init function */
47 | void MX_USB_DEVICE_Init(void)
48 | {
49 | /* Init Device Library,Add Supported Class and Start the library*/
50 | USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS);
51 |
52 | USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC);
53 |
54 | USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS);
55 |
56 | USBD_Start(&hUsbDeviceFS);
57 |
58 | }
59 | /**
60 | * @}
61 | */
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
68 |
--------------------------------------------------------------------------------
/PWM_Encoder/Src/usbd_cdc_if.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file : usbd_cdc_if.c
4 | * @brief :
5 | ******************************************************************************
6 | * COPYRIGHT(c) 2016 STMicroelectronics
7 | *
8 | * Redistribution and use in source and binary forms, with or without modification,
9 | * are permitted provided that the following conditions are met:
10 | * 1. Redistributions of source code must retain the above copyright notice,
11 | * this list of conditions and the following disclaimer.
12 | * 2. Redistributions in binary form must reproduce the above copyright notice,
13 | * this list of conditions and the following disclaimer in the documentation
14 | * and/or other materials provided with the distribution.
15 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
16 | * may be used to endorse or promote products derived from this software
17 | * without specific prior written permission.
18 | *
19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 | *
30 | ******************************************************************************
31 | */
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "usbd_cdc_if.h"
35 | /* USER CODE BEGIN INCLUDE */
36 | /* USER CODE END INCLUDE */
37 |
38 | /** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
39 | * @{
40 | */
41 |
42 | /** @defgroup USBD_CDC
43 | * @brief usbd core module
44 | * @{
45 | */
46 |
47 | /** @defgroup USBD_CDC_Private_TypesDefinitions
48 | * @{
49 | */
50 | /* USER CODE BEGIN PRIVATE_TYPES */
51 | /* USER CODE END PRIVATE_TYPES */
52 | /**
53 | * @}
54 | */
55 |
56 | /** @defgroup USBD_CDC_Private_Defines
57 | * @{
58 | */
59 | /* USER CODE BEGIN PRIVATE_DEFINES */
60 | /* Define size for the receive and transmit buffer over CDC */
61 | /* It's up to user to redefine and/or remove those define */
62 | #define APP_RX_DATA_SIZE 4
63 | #define APP_TX_DATA_SIZE 4
64 | /* USER CODE END PRIVATE_DEFINES */
65 | /**
66 | * @}
67 | */
68 |
69 | /** @defgroup USBD_CDC_Private_Macros
70 | * @{
71 | */
72 | /* USER CODE BEGIN PRIVATE_MACRO */
73 | /* USER CODE END PRIVATE_MACRO */
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /** @defgroup USBD_CDC_Private_Variables
80 | * @{
81 | */
82 | /* Create buffer for reception and transmission */
83 | /* It's up to user to redefine and/or remove those define */
84 | /* Received Data over USB are stored in this buffer */
85 | uint8_t UserRxBufferFS[APP_RX_DATA_SIZE];
86 |
87 | /* Send Data over USB CDC are stored in this buffer */
88 | uint8_t UserTxBufferFS[APP_TX_DATA_SIZE];
89 |
90 | /* USER CODE BEGIN PRIVATE_VARIABLES */
91 | /* USER CODE END PRIVATE_VARIABLES */
92 |
93 | /**
94 | * @}
95 | */
96 |
97 | /** @defgroup USBD_CDC_IF_Exported_Variables
98 | * @{
99 | */
100 | extern USBD_HandleTypeDef hUsbDeviceFS;
101 | /* USER CODE BEGIN EXPORTED_VARIABLES */
102 | /* USER CODE END EXPORTED_VARIABLES */
103 |
104 | /**
105 | * @}
106 | */
107 |
108 | /** @defgroup USBD_CDC_Private_FunctionPrototypes
109 | * @{
110 | */
111 | static int8_t CDC_Init_FS (void);
112 | static int8_t CDC_DeInit_FS (void);
113 | static int8_t CDC_Control_FS (uint8_t cmd, uint8_t* pbuf, uint16_t length);
114 | static int8_t CDC_Receive_FS (uint8_t* pbuf, uint32_t *Len);
115 |
116 | /* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
117 | /* USER CODE END PRIVATE_FUNCTIONS_DECLARATION */
118 |
119 | /**
120 | * @}
121 | */
122 |
123 | USBD_CDC_ItfTypeDef USBD_Interface_fops_FS =
124 | {
125 | CDC_Init_FS,
126 | CDC_DeInit_FS,
127 | CDC_Control_FS,
128 | CDC_Receive_FS
129 | };
130 |
131 | /* Private functions ---------------------------------------------------------*/
132 | /**
133 | * @brief CDC_Init_FS
134 | * Initializes the CDC media low layer over the FS USB IP
135 | * @param None
136 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
137 | */
138 | static int8_t CDC_Init_FS(void)
139 | {
140 | /* USER CODE BEGIN 3 */
141 | /* Set Application Buffers */
142 | USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
143 | USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
144 | return (USBD_OK);
145 | /* USER CODE END 3 */
146 | }
147 |
148 | /**
149 | * @brief CDC_DeInit_FS
150 | * DeInitializes the CDC media low layer
151 | * @param None
152 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
153 | */
154 | static int8_t CDC_DeInit_FS(void)
155 | {
156 | /* USER CODE BEGIN 4 */
157 | return (USBD_OK);
158 | /* USER CODE END 4 */
159 | }
160 |
161 | /**
162 | * @brief CDC_Control_FS
163 | * Manage the CDC class requests
164 | * @param cmd: Command code
165 | * @param pbuf: Buffer containing command data (request parameters)
166 | * @param length: Number of data to be sent (in bytes)
167 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
168 | */
169 | static int8_t CDC_Control_FS (uint8_t cmd, uint8_t* pbuf, uint16_t length)
170 | {
171 | /* USER CODE BEGIN 5 */
172 | switch (cmd)
173 | {
174 | case CDC_SEND_ENCAPSULATED_COMMAND:
175 |
176 | break;
177 |
178 | case CDC_GET_ENCAPSULATED_RESPONSE:
179 |
180 | break;
181 |
182 | case CDC_SET_COMM_FEATURE:
183 |
184 | break;
185 |
186 | case CDC_GET_COMM_FEATURE:
187 |
188 | break;
189 |
190 | case CDC_CLEAR_COMM_FEATURE:
191 |
192 | break;
193 |
194 | /*******************************************************************************/
195 | /* Line Coding Structure */
196 | /*-----------------------------------------------------------------------------*/
197 | /* Offset | Field | Size | Value | Description */
198 | /* 0 | dwDTERate | 4 | Number |Data terminal rate, in bits per second*/
199 | /* 4 | bCharFormat | 1 | Number | Stop bits */
200 | /* 0 - 1 Stop bit */
201 | /* 1 - 1.5 Stop bits */
202 | /* 2 - 2 Stop bits */
203 | /* 5 | bParityType | 1 | Number | Parity */
204 | /* 0 - None */
205 | /* 1 - Odd */
206 | /* 2 - Even */
207 | /* 3 - Mark */
208 | /* 4 - Space */
209 | /* 6 | bDataBits | 1 | Number Data bits (5, 6, 7, 8 or 16). */
210 | /*******************************************************************************/
211 | case CDC_SET_LINE_CODING:
212 |
213 | break;
214 |
215 | case CDC_GET_LINE_CODING:
216 |
217 | break;
218 |
219 | case CDC_SET_CONTROL_LINE_STATE:
220 |
221 | break;
222 |
223 | case CDC_SEND_BREAK:
224 |
225 | break;
226 |
227 | default:
228 | break;
229 | }
230 |
231 | return (USBD_OK);
232 | /* USER CODE END 5 */
233 | }
234 |
235 | /**
236 | * @brief CDC_Receive_FS
237 | * Data received over USB OUT endpoint are sent over CDC interface
238 | * through this function.
239 | *
240 | * @note
241 | * This function will block any OUT packet reception on USB endpoint
242 | * untill exiting this function. If you exit this function before transfer
243 | * is complete on CDC interface (ie. using DMA controller) it will result
244 | * in receiving more data while previous ones are still not sent.
245 | *
246 | * @param Buf: Buffer of data to be received
247 | * @param Len: Number of data received (in bytes)
248 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
249 | */
250 | static int8_t CDC_Receive_FS (uint8_t* Buf, uint32_t *Len)
251 | {
252 | /* USER CODE BEGIN 6 */
253 | USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
254 | USBD_CDC_ReceivePacket(&hUsbDeviceFS);
255 | return (USBD_OK);
256 | /* USER CODE END 6 */
257 | }
258 |
259 | /**
260 | * @brief CDC_Transmit_FS
261 | * Data send over USB IN endpoint are sent over CDC interface
262 | * through this function.
263 | * @note
264 | *
265 | *
266 | * @param Buf: Buffer of data to be send
267 | * @param Len: Number of data to be send (in bytes)
268 | * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
269 | */
270 | uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
271 | {
272 | uint8_t result = USBD_OK;
273 | /* USER CODE BEGIN 7 */
274 | USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
275 | if (hcdc->TxState != 0){
276 | return USBD_BUSY;
277 | }
278 | USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
279 | result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
280 | /* USER CODE END 7 */
281 | return result;
282 | }
283 |
284 | /* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */
285 | /* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */
286 |
287 | /**
288 | * @}
289 | */
290 |
291 | /**
292 | * @}
293 | */
294 |
295 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
296 |
297 |
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/PWM_Encoder/Src/usbd_desc.c:
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1 | /**
2 | ******************************************************************************
3 | * @file : usbd_desc.c
4 | * @version : v1.0_Cube
5 | * @brief : This file implements the USB Device descriptors
6 | ******************************************************************************
7 | *
8 | * COPYRIGHT(c) 2016 STMicroelectronics
9 | *
10 | * Redistribution and use in source and binary forms, with or without modification,
11 | * are permitted provided that the following conditions are met:
12 | * 1. Redistributions of source code must retain the above copyright notice,
13 | * this list of conditions and the following disclaimer.
14 | * 2. Redistributions in binary form must reproduce the above copyright notice,
15 | * this list of conditions and the following disclaimer in the documentation
16 | * and/or other materials provided with the distribution.
17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 | * may be used to endorse or promote products derived from this software
19 | * without specific prior written permission.
20 | *
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 | *
32 | ******************************************************************************
33 | */
34 |
35 | /* Includes ------------------------------------------------------------------*/
36 | #include "usbd_core.h"
37 | #include "usbd_desc.h"
38 | #include "usbd_conf.h"
39 |
40 | /** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
41 | * @{
42 | */
43 |
44 | /** @defgroup USBD_DESC
45 | * @brief USBD descriptors module
46 | * @{
47 | */
48 |
49 | /** @defgroup USBD_DESC_Private_TypesDefinitions
50 | * @{
51 | */
52 | /**
53 | * @}
54 | */
55 |
56 | /** @defgroup USBD_DESC_Private_Defines
57 | * @{
58 | */
59 | #define USBD_VID 1155
60 | #define USBD_LANGID_STRING 1033
61 | #define USBD_MANUFACTURER_STRING "STMicroelectronics"
62 | #define USBD_PID_FS 22336
63 | #define USBD_PRODUCT_STRING_FS "STM32 Virtual ComPort"
64 | #define USBD_SERIALNUMBER_STRING_FS "00000000001A"
65 | #define USBD_CONFIGURATION_STRING_FS "CDC Config"
66 | #define USBD_INTERFACE_STRING_FS "CDC Interface"
67 |
68 | /* USER CODE BEGIN 0 */
69 |
70 | /* USER CODE END 0*/
71 | /**
72 | * @}
73 | */
74 |
75 | /** @defgroup USBD_DESC_Private_Macros
76 | * @{
77 | */
78 | /**
79 | * @}
80 | */
81 |
82 | /** @defgroup USBD_DESC_Private_Variables
83 | * @{
84 | */
85 | uint8_t * USBD_FS_DeviceDescriptor( USBD_SpeedTypeDef speed , uint16_t *length);
86 | uint8_t * USBD_FS_LangIDStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length);
87 | uint8_t * USBD_FS_ManufacturerStrDescriptor ( USBD_SpeedTypeDef speed , uint16_t *length);
88 | uint8_t * USBD_FS_ProductStrDescriptor ( USBD_SpeedTypeDef speed , uint16_t *length);
89 | uint8_t * USBD_FS_SerialStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length);
90 | uint8_t * USBD_FS_ConfigStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length);
91 | uint8_t * USBD_FS_InterfaceStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length);
92 |
93 | #ifdef USB_SUPPORT_USER_STRING_DESC
94 | uint8_t * USBD_FS_USRStringDesc (USBD_SpeedTypeDef speed, uint8_t idx , uint16_t *length);
95 | #endif /* USB_SUPPORT_USER_STRING_DESC */
96 |
97 | USBD_DescriptorsTypeDef FS_Desc =
98 | {
99 | USBD_FS_DeviceDescriptor,
100 | USBD_FS_LangIDStrDescriptor,
101 | USBD_FS_ManufacturerStrDescriptor,
102 | USBD_FS_ProductStrDescriptor,
103 | USBD_FS_SerialStrDescriptor,
104 | USBD_FS_ConfigStrDescriptor,
105 | USBD_FS_InterfaceStrDescriptor,
106 | };
107 |
108 | #if defined ( __ICCARM__ ) /*!< IAR Compiler */
109 | #pragma data_alignment=4
110 | #endif
111 | /* USB Standard Device Descriptor */
112 | __ALIGN_BEGIN uint8_t USBD_FS_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END =
113 | {
114 | 0x12, /*bLength */
115 | USB_DESC_TYPE_DEVICE, /*bDescriptorType*/
116 | 0x00, /* bcdUSB */
117 | 0x02,
118 | 0x02, /*bDeviceClass*/
119 | 0x02, /*bDeviceSubClass*/
120 | 0x00, /*bDeviceProtocol*/
121 | USB_MAX_EP0_SIZE, /*bMaxPacketSize*/
122 | LOBYTE(USBD_VID), /*idVendor*/
123 | HIBYTE(USBD_VID), /*idVendor*/
124 | LOBYTE(USBD_PID_FS), /*idVendor*/
125 | HIBYTE(USBD_PID_FS), /*idVendor*/
126 | 0x00, /*bcdDevice rel. 2.00*/
127 | 0x02,
128 | USBD_IDX_MFC_STR, /*Index of manufacturer string*/
129 | USBD_IDX_PRODUCT_STR, /*Index of product string*/
130 | USBD_IDX_SERIAL_STR, /*Index of serial number string*/
131 | USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/
132 | } ;
133 | /* USB_DeviceDescriptor */
134 |
135 | #if defined ( __ICCARM__ ) /*!< IAR Compiler */
136 | #pragma data_alignment=4
137 | #endif
138 |
139 | /* USB Standard Device Descriptor */
140 | __ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END =
141 | {
142 | USB_LEN_LANGID_STR_DESC,
143 | USB_DESC_TYPE_STRING,
144 | LOBYTE(USBD_LANGID_STRING),
145 | HIBYTE(USBD_LANGID_STRING),
146 | };
147 |
148 | #if defined ( __ICCARM__ ) /*!< IAR Compiler */
149 | #pragma data_alignment=4
150 | #endif
151 | __ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END;
152 | /**
153 | * @}
154 | */
155 |
156 | /** @defgroup USBD_DESC_Private_FunctionPrototypes
157 | * @{
158 | */
159 | /**
160 | * @}
161 | */
162 |
163 | /** @defgroup USBD_DESC_Private_Functions
164 | * @{
165 | */
166 |
167 | /**
168 | * @brief USBD_FS_DeviceDescriptor
169 | * return the device descriptor
170 | * @param speed : current device speed
171 | * @param length : pointer to data length variable
172 | * @retval pointer to descriptor buffer
173 | */
174 | uint8_t * USBD_FS_DeviceDescriptor( USBD_SpeedTypeDef speed , uint16_t *length)
175 | {
176 | *length = sizeof(USBD_FS_DeviceDesc);
177 | return USBD_FS_DeviceDesc;
178 | }
179 |
180 | /**
181 | * @brief USBD_FS_LangIDStrDescriptor
182 | * return the LangID string descriptor
183 | * @param speed : current device speed
184 | * @param length : pointer to data length variable
185 | * @retval pointer to descriptor buffer
186 | */
187 | uint8_t * USBD_FS_LangIDStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length)
188 | {
189 | *length = sizeof(USBD_LangIDDesc);
190 | return USBD_LangIDDesc;
191 | }
192 |
193 | /**
194 | * @brief USBD_FS_ProductStrDescriptor
195 | * return the product string descriptor
196 | * @param speed : current device speed
197 | * @param length : pointer to data length variable
198 | * @retval pointer to descriptor buffer
199 | */
200 | uint8_t * USBD_FS_ProductStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length)
201 | {
202 | if(speed == 0)
203 | {
204 | USBD_GetString (USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
205 | }
206 | else
207 | {
208 | USBD_GetString (USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
209 | }
210 | return USBD_StrDesc;
211 | }
212 |
213 | /**
214 | * @brief USBD_FS_ManufacturerStrDescriptor
215 | * return the manufacturer string descriptor
216 | * @param speed : current device speed
217 | * @param length : pointer to data length variable
218 | * @retval pointer to descriptor buffer
219 | */
220 | uint8_t * USBD_FS_ManufacturerStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length)
221 | {
222 | USBD_GetString (USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
223 | return USBD_StrDesc;
224 | }
225 |
226 | /**
227 | * @brief USBD_FS_SerialStrDescriptor
228 | * return the serial number string descriptor
229 | * @param speed : current device speed
230 | * @param length : pointer to data length variable
231 | * @retval pointer to descriptor buffer
232 | */
233 | uint8_t * USBD_FS_SerialStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length)
234 | {
235 | if(speed == USBD_SPEED_HIGH)
236 | {
237 | USBD_GetString (USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length);
238 | }
239 | else
240 | {
241 | USBD_GetString (USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length);
242 | }
243 | return USBD_StrDesc;
244 | }
245 |
246 | /**
247 | * @brief USBD_FS_ConfigStrDescriptor
248 | * return the configuration string descriptor
249 | * @param speed : current device speed
250 | * @param length : pointer to data length variable
251 | * @retval pointer to descriptor buffer
252 | */
253 | uint8_t * USBD_FS_ConfigStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length)
254 | {
255 | if(speed == USBD_SPEED_HIGH)
256 | {
257 | USBD_GetString (USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
258 | }
259 | else
260 | {
261 | USBD_GetString (USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
262 | }
263 | return USBD_StrDesc;
264 | }
265 |
266 | /**
267 | * @brief USBD_HS_InterfaceStrDescriptor
268 | * return the interface string descriptor
269 | * @param speed : current device speed
270 | * @param length : pointer to data length variable
271 | * @retval pointer to descriptor buffer
272 | */
273 | uint8_t * USBD_FS_InterfaceStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length)
274 | {
275 | if(speed == 0)
276 | {
277 | USBD_GetString (USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
278 | }
279 | else
280 | {
281 | USBD_GetString (USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
282 | }
283 | return USBD_StrDesc;
284 | }
285 | /**
286 | * @}
287 | */
288 |
289 | /**
290 | * @}
291 | */
292 |
293 | /**
294 | * @}
295 | */
296 |
297 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
298 |
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