├── Datasheet ├── FT5x16.pdf ├── ILI9806G.pdf └── TK050F5590_spec_v1.1.pdf ├── Demonstration ├── DE10_NANO_Linux_RGB │ ├── DE10_NANO_Linux_RGB.qpf │ ├── DE10_NANO_Linux_RGB.qsf │ ├── DE10_NANO_Linux_RGB.sdc │ ├── DE10_NANO_Linux_RGB.v │ ├── I2C_Controller.v │ ├── I2C_HDMI_Config.v │ ├── I2C_WRITE_WDATA.v │ ├── Makefile │ ├── generate_hps_qsys_header.sh │ ├── hps_common_board_info.xml │ ├── ip │ │ ├── altsource_probe │ │ │ ├── hps_reset.qip │ │ │ ├── hps_reset.v │ │ │ └── hps_reset_bb.v │ │ ├── debounce │ │ │ └── debounce.v │ │ ├── edge_detect │ │ │ └── altera_edge_detector.v │ │ ├── i2c_opencores │ │ │ ├── Docs │ │ │ │ ├── I2C_tests.c │ │ │ │ └── i2c_specs.pdf │ │ │ ├── HAL │ │ │ │ ├── inc │ │ │ │ │ └── i2c_opencores.h │ │ │ │ └── src │ │ │ │ │ ├── component.mk │ │ │ │ │ └── i2c_opencores.c │ │ │ ├── i2c_master_bit_ctrl.v │ │ │ ├── i2c_master_byte_ctrl.v │ │ │ ├── i2c_master_defines.v │ │ │ ├── i2c_master_top.v │ │ │ ├── i2c_opencores.v │ │ │ ├── i2c_opencores_hw.tcl │ │ │ ├── i2c_opencores_sw.tcl │ │ │ ├── inc │ │ │ │ └── i2c_opencores_regs.h │ │ │ ├── test.v │ │ │ └── timescale.v │ │ ├── intr_capturer │ │ │ ├── intr_capturer.v │ │ │ └── intr_capturer_hw.tcl │ │ ├── lcd_pll │ │ │ ├── lcd_pll.qip │ │ │ ├── lcd_pll.v │ │ │ └── lcd_pll │ │ │ │ ├── lcd_pll_0002.qip │ │ │ │ └── lcd_pll_0002.v │ │ └── spi_init │ │ │ └── lcd_spi_init.v │ ├── soc_system.qsys │ └── soc_system_board_info.xml ├── DE10_NANO_Linux_i80 │ ├── DE10_NANO_Linux_i80.qpf │ ├── DE10_NANO_Linux_i80.qsf │ ├── DE10_NANO_Linux_i80.sdc │ ├── DE10_NANO_Linux_i80.v │ ├── I2C_Controller.v │ ├── I2C_HDMI_Config.v │ ├── I2C_WRITE_WDATA.v │ ├── Makefile │ ├── generate_hps_qsys_header.sh │ ├── hps_common_board_info.xml │ ├── ip │ │ ├── I8080_Controller │ │ │ ├── I8080_Controller.v │ │ │ └── I8080_Controller_hw.tcl │ │ ├── altsource_probe │ │ │ ├── hps_reset.qip │ │ │ ├── hps_reset.v │ │ │ └── hps_reset_bb.v │ │ ├── debounce │ │ │ └── debounce.v │ │ ├── edge_detect │ │ │ └── altera_edge_detector.v │ │ ├── i2c_opencores │ │ │ ├── Docs │ │ │ │ ├── I2C_tests.c │ │ │ │ └── i2c_specs.pdf │ │ │ ├── HAL │ │ │ │ ├── inc │ │ │ │ │ └── i2c_opencores.h │ │ │ │ └── src │ │ │ │ │ ├── component.mk │ │ │ │ │ └── i2c_opencores.c │ │ │ ├── i2c_master_bit_ctrl.v │ │ │ ├── i2c_master_byte_ctrl.v │ │ │ ├── i2c_master_defines.v │ │ │ ├── i2c_master_top.v │ │ │ ├── i2c_opencores.v │ │ │ ├── i2c_opencores_hw.tcl │ │ │ ├── i2c_opencores_sw.tcl │ │ │ ├── inc │ │ │ │ └── i2c_opencores_regs.h │ │ │ ├── test.v │ │ │ └── timescale.v │ │ ├── intr_capturer │ │ │ ├── intr_capturer.v │ │ │ └── intr_capturer_hw.tcl │ │ ├── lcd_pll │ │ │ ├── lcd_pll.qip │ │ │ ├── lcd_pll.v │ │ │ └── lcd_pll │ │ │ │ ├── lcd_pll_0002.qip │ │ │ │ └── lcd_pll_0002.v │ │ └── spi_init │ │ │ └── lcd_spi_init.v │ ├── soc_system.qsys │ ├── soc_system_board_info.xml │ └── soc_system_hw.tcl ├── DE10_NANO_MIL_8bits │ ├── DE10_NANO_MIL_8bits.qpf │ ├── DE10_NANO_MIL_8bits.qsf │ ├── DE10_NANO_MIL_8bits.sdc │ ├── DE10_NANO_MIL_8bits.v │ ├── Makefile │ ├── nios2_system.qsys │ └── software │ │ ├── ili9806g_tft │ │ ├── .cproject │ │ ├── .project │ │ ├── .settings │ │ │ └── language.settings.xml │ │ ├── Makefile │ │ ├── create-this-app │ │ ├── lcd │ │ │ ├── lcd.c │ │ │ └── lcd.h │ │ ├── main.c │ │ └── readme.txt │ │ └── ili9806g_tft_bsp │ │ ├── .cproject │ │ ├── .force_relink │ │ ├── .project │ │ ├── .settings │ │ └── language.settings.xml │ │ ├── create-this-bsp │ │ └── settings.bsp ├── DE10_NANO_MIL_PAINTER │ ├── DE10_NANO_MIL_PAINTER.qpf │ ├── DE10_NANO_MIL_PAINTER.qsf │ ├── DE10_NANO_MIL_PAINTER.sdc │ ├── DE10_NANO_MIL_PAINTER.v │ ├── MIL_PAINTER.qsys │ ├── MIL_PAINTER.sopcinfo │ ├── Makefile │ ├── ip │ │ ├── I8080_Controller │ │ │ ├── I8080_Controller.v │ │ │ ├── I8080_Controller_hw.tcl │ │ │ └── I8080_Controller_hw.tcl~ │ │ ├── i2c_opencores │ │ │ ├── Docs │ │ │ │ ├── I2C_tests.c │ │ │ │ └── i2c_specs.pdf │ │ │ ├── HAL │ │ │ │ ├── inc │ │ │ │ │ └── i2c_opencores.h │ │ │ │ └── src │ │ │ │ │ ├── component.mk │ │ │ │ │ └── i2c_opencores.c │ │ │ ├── i2c_master_bit_ctrl.v │ │ │ ├── i2c_master_byte_ctrl.v │ │ │ ├── i2c_master_defines.v │ │ │ ├── i2c_master_top.v │ │ │ ├── i2c_opencores.v │ │ │ ├── i2c_opencores_hw.tcl │ │ │ ├── i2c_opencores_sw.tcl │ │ │ ├── inc │ │ │ │ └── i2c_opencores_regs.h │ │ │ ├── test.v │ │ │ └── timescale.v │ │ ├── lcd_pll │ │ │ ├── lcd_pll.qip │ │ │ ├── lcd_pll.v │ │ │ └── lcd_pll │ │ │ │ ├── lcd_pll_0002.qip │ │ │ │ └── lcd_pll_0002.v │ │ ├── mister_sdram_32m │ │ │ ├── mister_sdram32m_controller.v │ │ │ └── mister_sdram32m_controller_hw.tcl │ │ └── mister_sdram_64m │ │ │ ├── mister_sdram64m_controller.v │ │ │ └── mister_sdram64m_controller_hw.tcl │ └── software │ │ ├── nios2_mcu_bsp │ │ ├── .cproject │ │ ├── .project │ │ ├── .settings │ │ │ └── language.settings.xml │ │ ├── HAL │ │ │ ├── inc │ │ │ │ ├── alt_types.h │ │ │ │ ├── altera_nios2_gen2_irq.h │ │ │ │ ├── io.h │ │ │ │ ├── nios2.h │ │ │ │ ├── os │ │ │ │ │ ├── alt_flag.h │ │ │ │ │ ├── alt_hooks.h │ │ │ │ │ ├── alt_sem.h │ │ │ │ │ └── alt_syscall.h │ │ │ │ ├── priv │ │ │ │ │ ├── alt_alarm.h │ │ │ │ │ ├── alt_busy_sleep.h │ │ │ │ │ ├── alt_dev_llist.h │ │ │ │ │ ├── alt_exception_handler_registry.h │ │ │ │ │ ├── alt_file.h │ │ │ │ │ ├── alt_iic_isr_register.h │ │ │ │ │ ├── alt_irq_table.h │ │ │ │ │ ├── alt_legacy_irq.h │ │ │ │ │ ├── alt_no_error.h │ │ │ │ │ └── nios2_gmon_data.h │ │ │ │ └── sys │ │ │ │ │ ├── alt_alarm.h │ │ │ │ │ ├── alt_cache.h │ │ │ │ │ ├── alt_debug.h │ │ │ │ │ ├── alt_dev.h │ │ │ │ │ ├── alt_dma.h │ │ │ │ │ ├── alt_dma_dev.h │ │ │ │ │ ├── alt_driver.h │ │ │ │ │ ├── alt_errno.h │ │ │ │ │ ├── alt_exceptions.h │ │ │ │ │ ├── alt_flash.h │ │ │ │ │ ├── alt_flash_dev.h │ │ │ │ │ ├── alt_flash_types.h │ │ │ │ │ ├── alt_irq.h │ │ │ │ │ ├── alt_irq_entry.h │ │ │ │ │ ├── alt_license_reminder_ucosii.h │ │ │ │ │ ├── alt_llist.h │ │ │ │ │ ├── alt_load.h │ │ │ │ │ ├── alt_log_printf.h │ │ │ │ │ ├── alt_set_args.h │ │ │ │ │ ├── alt_sim.h │ │ │ │ │ ├── alt_stack.h │ │ │ │ │ ├── alt_stdio.h │ │ │ │ │ ├── alt_sys_init.h │ │ │ │ │ ├── alt_sys_wrappers.h │ │ │ │ │ ├── alt_timestamp.h │ │ │ │ │ ├── alt_warning.h │ │ │ │ │ ├── ioctl.h │ │ │ │ │ └── termios.h │ │ │ └── src │ │ │ │ ├── alt_alarm_start.c │ │ │ │ ├── alt_busy_sleep.c │ │ │ │ ├── alt_close.c │ │ │ │ ├── alt_dcache_flush.c │ │ │ │ ├── alt_dcache_flush_all.c │ │ │ │ ├── alt_dcache_flush_no_writeback.c │ │ │ │ ├── alt_dev.c │ │ │ │ ├── alt_dev_llist_insert.c │ │ │ │ ├── alt_dma_rxchan_open.c │ │ │ │ ├── alt_dma_txchan_open.c │ │ │ │ ├── alt_do_ctors.c │ │ │ │ ├── alt_do_dtors.c │ │ │ │ ├── alt_ecc_fatal_entry.S │ │ │ │ ├── alt_ecc_fatal_exception.c │ │ │ │ ├── alt_env_lock.c │ │ │ │ ├── alt_environ.c │ │ │ │ ├── alt_errno.c │ │ │ │ ├── alt_exception_entry.S │ │ │ │ ├── alt_exception_muldiv.S │ │ │ │ ├── alt_exception_trap.S │ │ │ │ ├── alt_execve.c │ │ │ │ ├── alt_exit.c │ │ │ │ ├── alt_fcntl.c │ │ │ │ ├── alt_fd_lock.c │ │ │ │ ├── alt_fd_unlock.c │ │ │ │ ├── alt_find_dev.c │ │ │ │ ├── alt_find_file.c │ │ │ │ ├── alt_flash_dev.c │ │ │ │ ├── alt_fork.c │ │ │ │ ├── alt_fs_reg.c │ │ │ │ ├── alt_fstat.c │ │ │ │ ├── alt_get_fd.c │ │ │ │ ├── alt_getchar.c │ │ │ │ ├── alt_getpid.c │ │ │ │ ├── alt_gettod.c │ │ │ │ ├── alt_gmon.c │ │ │ │ ├── alt_icache_flush.c │ │ │ │ ├── alt_icache_flush_all.c │ │ │ │ ├── alt_iic.c │ │ │ │ ├── alt_iic_isr_register.c │ │ │ │ ├── alt_instruction_exception_entry.c │ │ │ │ ├── alt_instruction_exception_register.c │ │ │ │ ├── alt_io_redirect.c │ │ │ │ ├── alt_ioctl.c │ │ │ │ ├── alt_irq_entry.S │ │ │ │ ├── alt_irq_handler.c │ │ │ │ ├── alt_irq_register.c │ │ │ │ ├── alt_irq_vars.c │ │ │ │ ├── alt_isatty.c │ │ │ │ ├── alt_kill.c │ │ │ │ ├── alt_link.c │ │ │ │ ├── alt_load.c │ │ │ │ ├── alt_log_macro.S │ │ │ │ ├── alt_log_printf.c │ │ │ │ ├── alt_lseek.c │ │ │ │ ├── alt_main.c │ │ │ │ ├── alt_malloc_lock.c │ │ │ │ ├── alt_mcount.S │ │ │ │ ├── alt_open.c │ │ │ │ ├── alt_printf.c │ │ │ │ ├── alt_putchar.c │ │ │ │ ├── alt_putcharbuf.c │ │ │ │ ├── alt_putstr.c │ │ │ │ ├── alt_read.c │ │ │ │ ├── alt_release_fd.c │ │ │ │ ├── alt_remap_cached.c │ │ │ │ ├── alt_remap_uncached.c │ │ │ │ ├── alt_rename.c │ │ │ │ ├── alt_sbrk.c │ │ │ │ ├── alt_settod.c │ │ │ │ ├── alt_software_exception.S │ │ │ │ ├── alt_stat.c │ │ │ │ ├── alt_tick.c │ │ │ │ ├── alt_times.c │ │ │ │ ├── alt_uncached_free.c │ │ │ │ ├── alt_uncached_malloc.c │ │ │ │ ├── alt_unlink.c │ │ │ │ ├── alt_usleep.c │ │ │ │ ├── alt_wait.c │ │ │ │ ├── alt_write.c │ │ │ │ ├── altera_nios2_gen2_irq.c │ │ │ │ └── crt0.S │ │ ├── Makefile │ │ ├── alt_sys_init.c │ │ ├── create-this-bsp │ │ ├── drivers │ │ │ ├── inc │ │ │ │ ├── altera_avalon_epcs_flash_controller.h │ │ │ │ ├── altera_avalon_jtag_uart.h │ │ │ │ ├── altera_avalon_jtag_uart_fd.h │ │ │ │ ├── altera_avalon_jtag_uart_regs.h │ │ │ │ ├── altera_avalon_pio_regs.h │ │ │ │ ├── altera_avalon_spi.h │ │ │ │ ├── altera_avalon_spi_regs.h │ │ │ │ ├── altera_avalon_sysid_qsys.h │ │ │ │ ├── altera_avalon_sysid_qsys_regs.h │ │ │ │ ├── altera_avalon_timer.h │ │ │ │ ├── altera_avalon_timer_regs.h │ │ │ │ └── epcs_commands.h │ │ │ └── src │ │ │ │ ├── altera_avalon_epcs_flash_controller.c │ │ │ │ ├── altera_avalon_jtag_uart_fd.c │ │ │ │ ├── altera_avalon_jtag_uart_init.c │ │ │ │ ├── altera_avalon_jtag_uart_ioctl.c │ │ │ │ ├── altera_avalon_jtag_uart_read.c │ │ │ │ ├── altera_avalon_jtag_uart_write.c │ │ │ │ ├── altera_avalon_spi.c │ │ │ │ ├── altera_avalon_sysid_qsys.c │ │ │ │ ├── altera_avalon_timer_sc.c │ │ │ │ ├── altera_avalon_timer_ts.c │ │ │ │ ├── altera_avalon_timer_vars.c │ │ │ │ └── epcs_commands.c │ │ ├── linker.h │ │ ├── linker.x │ │ ├── mem_init.mk │ │ ├── memory.gdb │ │ ├── public.mk │ │ ├── settings.bsp │ │ ├── summary.html │ │ └── system.h │ │ └── tftlcd_ili9806g │ │ ├── .cproject │ │ ├── .force_relink │ │ ├── .project │ │ ├── .settings │ │ └── language.settings.xml │ │ ├── Makefile │ │ ├── create-this-app │ │ ├── fonts │ │ ├── fonts.h │ │ ├── tahomabold_20.c │ │ └── tahomabold_32.c │ │ ├── geometry.c │ │ ├── geometry.h │ │ ├── gesture.c │ │ ├── gesture.h │ │ ├── graphic_lib │ │ ├── simple_graphics.c │ │ ├── simple_graphics.h │ │ ├── simple_text.c │ │ └── simple_text.h │ │ ├── gui.c │ │ ├── gui.h │ │ ├── gui_vpg.c │ │ ├── lcd.c │ │ ├── lcd.h │ │ ├── main.c │ │ ├── readme.txt │ │ ├── terasic_includes.h │ │ ├── terasic_lib │ │ ├── I2C.c │ │ ├── I2C.h │ │ ├── I2C_core.c │ │ ├── I2C_core.h │ │ ├── debug.c │ │ ├── debug.h │ │ ├── multi_touch2.c │ │ ├── multi_touch2.h │ │ ├── queue.c │ │ ├── queue.h │ │ └── terasic_includes.h │ │ ├── vip_fr.c │ │ └── vip_fr.h ├── DE10_NANO_MIL_spi │ ├── DE10_NANO_MIL_spi.qpf │ ├── DE10_NANO_MIL_spi.qsf │ ├── DE10_NANO_MIL_spi.sdc │ ├── DE10_NANO_MIL_spi.v │ ├── Makefile │ ├── nios2_system.qsys │ └── software │ │ ├── ili9806g_tft │ │ ├── .cproject │ │ ├── .force_relink │ │ ├── .project │ │ ├── .settings │ │ │ └── language.settings.xml │ │ ├── Makefile │ │ ├── create-this-app │ │ ├── lcd │ │ │ ├── lcd.c │ │ │ └── lcd.h │ │ ├── main.c │ │ └── readme.txt │ │ └── ili9806g_tft_bsp │ │ ├── .cproject │ │ ├── .project │ │ ├── .settings │ │ └── language.settings.xml │ │ ├── create-this-bsp │ │ └── settings.bsp ├── DE1_SOC_Linux_RGB │ ├── DE1_SOC_Linux_RGB.qpf │ ├── DE1_SOC_Linux_RGB.qsf │ ├── DE1_SOC_Linux_RGB.sdc │ ├── DE1_SOC_Linux_RGB.v │ ├── Makefile │ ├── ip │ │ ├── TERASIC_AUDIO │ │ │ ├── AUDIO_ADC.v │ │ │ ├── AUDIO_DAC.v │ │ │ ├── AUDIO_IF.v │ │ │ ├── AUDIO_IF_hw.tcl │ │ │ ├── audio_fifo.qip │ │ │ ├── audio_fifo.v │ │ │ ├── audio_fifo_wave0.jpg │ │ │ ├── audio_fifo_wave1.jpg │ │ │ └── audio_fifo_waveforms.html │ │ ├── TERASIC_IRM │ │ │ ├── TERASIC_IRM.v │ │ │ ├── TERASIC_IRM_hw.tcl │ │ │ └── irda_receive_terasic.v │ │ ├── debounce │ │ │ └── debounce.v │ │ ├── i2c_opencores │ │ │ ├── Docs │ │ │ │ ├── I2C_tests.c │ │ │ │ └── i2c_specs.pdf │ │ │ ├── HAL │ │ │ │ ├── inc │ │ │ │ │ └── i2c_opencores.h │ │ │ │ └── src │ │ │ │ │ ├── component.mk │ │ │ │ │ └── i2c_opencores.c │ │ │ ├── i2c_master_bit_ctrl.v │ │ │ ├── i2c_master_byte_ctrl.v │ │ │ ├── i2c_master_defines.v │ │ │ ├── i2c_master_top.v │ │ │ ├── i2c_opencores.v │ │ │ ├── i2c_opencores_hw.tcl │ │ │ ├── i2c_opencores_sw.tcl │ │ │ ├── inc │ │ │ │ └── i2c_opencores_regs.h │ │ │ ├── test.v │ │ │ └── timescale.v │ │ ├── intr_capturer │ │ │ ├── intr_capturer.v │ │ │ └── intr_capturer_hw.tcl │ │ ├── lcd_pll │ │ │ ├── lcd_pll.qip │ │ │ ├── lcd_pll.v │ │ │ └── lcd_pll │ │ │ │ ├── lcd_pll_0002.qip │ │ │ │ └── lcd_pll_0002.v │ │ ├── my_log_generator │ │ │ ├── log.mif │ │ │ ├── log_512x54.mif │ │ │ ├── log_fifo.v │ │ │ ├── log_generator.v │ │ │ ├── log_generator_hw.tcl │ │ │ └── log_rom.v │ │ └── spi_init │ │ │ └── lcd_spi_init.v │ ├── soc_system.qsys │ └── sof_to_rbf.bat └── DE1_SOC_MIL_PAINTER │ ├── DE1_SOC_MIL_PAINTER.qpf │ ├── DE1_SOC_MIL_PAINTER.qsf │ ├── DE1_SOC_MIL_PAINTER.sdc │ ├── DE1_SOC_MIL_PAINTER.v │ ├── MIL_PAINTER.qsys │ ├── Makefile │ ├── ip │ ├── I8080_Controller │ │ ├── I8080_Controller.v │ │ ├── I8080_Controller_hw.tcl │ │ └── I8080_Controller_hw.tcl~ │ ├── i2c_opencores │ │ ├── Docs │ │ │ ├── I2C_tests.c │ │ │ └── i2c_specs.pdf │ │ ├── HAL │ │ │ ├── inc │ │ │ │ └── i2c_opencores.h │ │ │ └── src │ │ │ │ ├── component.mk │ │ │ │ └── i2c_opencores.c │ │ ├── i2c_master_bit_ctrl.v │ │ ├── i2c_master_byte_ctrl.v │ │ ├── i2c_master_defines.v │ │ ├── i2c_master_top.v │ │ ├── i2c_opencores.v │ │ ├── i2c_opencores_hw.tcl │ │ ├── i2c_opencores_sw.tcl │ │ ├── inc │ │ │ └── i2c_opencores_regs.h │ │ ├── test.v │ │ └── timescale.v │ └── lcd_pll │ │ ├── lcd_pll.qip │ │ ├── lcd_pll.v │ │ └── lcd_pll │ │ ├── lcd_pll_0002.qip │ │ └── lcd_pll_0002.v │ └── software │ ├── tftlcd_ili9806g │ ├── .cproject │ ├── .force_relink │ ├── .project │ ├── Makefile │ ├── create-this-app │ ├── fonts │ │ ├── fonts.h │ │ ├── tahomabold_20.c │ │ └── tahomabold_32.c │ ├── geometry.c │ ├── geometry.h │ ├── gesture.c │ ├── gesture.h │ ├── graphic_lib │ │ ├── simple_graphics.c │ │ ├── simple_graphics.h │ │ ├── simple_text.c │ │ └── simple_text.h │ ├── gui.c │ ├── gui.h │ ├── gui_vpg.c │ ├── lcd.c │ ├── lcd.h │ ├── main.c │ ├── readme.txt │ ├── terasic_includes.h │ ├── terasic_lib │ │ ├── I2C.c │ │ ├── I2C.h │ │ ├── I2C_core.c │ │ ├── I2C_core.h │ │ ├── debug.c │ │ ├── debug.h │ │ ├── multi_touch2.c │ │ ├── multi_touch2.h │ │ ├── queue.c │ │ ├── queue.h │ │ └── terasic_includes.h │ ├── vip_fr.c │ └── vip_fr.h │ └── tftlcd_ili9806g_bsp │ ├── .cproject │ ├── .force_relink │ ├── .project │ ├── Makefile │ ├── create-this-bsp │ └── settings.bsp ├── IP ├── I8080_Controller │ ├── I8080_Controller.v │ └── I8080_Controller_hw.tcl ├── i2c_opencores │ ├── Docs │ │ ├── I2C_tests.c │ │ └── i2c_specs.pdf │ ├── HAL │ │ ├── inc │ │ │ └── i2c_opencores.h │ │ └── src │ │ │ ├── component.mk │ │ │ └── i2c_opencores.c │ ├── i2c_master_bit_ctrl.v │ ├── i2c_master_byte_ctrl.v │ ├── i2c_master_defines.v │ ├── i2c_master_top.v │ ├── i2c_opencores.v │ ├── i2c_opencores_hw.tcl │ ├── i2c_opencores_sw.tcl │ ├── inc │ │ └── i2c_opencores_regs.h │ ├── test.v │ └── timescale.v └── spi_init │ └── lcd_spi_init.v ├── LICENSE ├── Linux_driver ├── 3.18.x │ └── touchscreen │ │ ├── ft5406_ts.h │ │ └── ft_5406.c └── 4.19.x │ ├── socfpga_cyclone5_de10_nano.dts │ ├── tinydrm │ ├── fb_ili9806.c │ ├── tinydrm-ili9806.c │ └── tinydrm-ili9806.h │ └── touchscreen │ └── ft_5x16.c ├── README.md ├── Schematic_PCB ├── 5.0inch_IPS_for_TerasicDEs.PDF ├── Altium_Designer │ ├── 5.0inch_IPS_for_TerasicDEs.PcbDoc │ ├── 5.0inch_IPS_for_TerasicDEs.PrjPCB │ └── 5.0inch_IPS_for_TerasicDEs.SchDoc └── KiCad │ └── README.txt ├── documents └── how_to_use.md └── figure ├── clocked_video_out_timing.png ├── de1soc_linux.png └── pcb.png /Datasheet/FT5x16.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Datasheet/FT5x16.pdf -------------------------------------------------------------------------------- /Datasheet/ILI9806G.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Datasheet/ILI9806G.pdf -------------------------------------------------------------------------------- /Datasheet/TK050F5590_spec_v1.1.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Datasheet/TK050F5590_spec_v1.1.pdf -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/DE10_NANO_Linux_RGB.qpf: -------------------------------------------------------------------------------- 1 | DATE = "17:14:54 March 04, 2015" 2 | QUARTUS_VERSION = "14.1" 3 | 4 | # Revisions 5 | 6 | PROJECT_REVISION = "DE10_NANO_Linux_RGB" 7 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/I2C_Controller.v: -------------------------------------------------------------------------------- 1 | // -------------------------------------------------------------------- 2 | // Copyright (c) 2005 by Terasic Technologies Inc. 3 | // -------------------------------------------------------------------- 4 | // 5 | // Permission: 6 | // 7 | // Terasic grants permission to use and modify this code for use 8 | // in synthesis for all Terasic Development Boards and Altrea Development 9 | // Kits made by Terasic. Other use of this code, including the selling 10 | // ,duplication, or modification of any portion is strictly prohibited. 11 | // 12 | // Disclaimer: 13 | // 14 | // This VHDL or Verilog source code is intended as a design reference 15 | // which illustrates how these types of functions can be implemented. 16 | // It is the user's responsibility to verify their design for 17 | // consistency and functionality through the use of formal 18 | // verification methods. Terasic provides no warranty regarding the use 19 | // or functionality of this code. 20 | // 21 | // -------------------------------------------------------------------- 22 | // 23 | // Terasic Technologies Inc 24 | // 356 Fu-Shin E. Rd Sec. 1. JhuBei City, 25 | // HsinChu County, Taiwan 26 | // 302 27 | // 28 | // web: http://www.terasic.com/ 29 | // email: support@terasic.com 30 | // 31 | // -------------------------------------------------------------------- 32 | // 33 | // Major Functions:i2c controller 34 | // 35 | // -------------------------------------------------------------------- 36 | // 37 | // Revision History : 38 | // -------------------------------------------------------------------- 39 | // Ver :| Author :| Mod. Date :| Changes Made: 40 | // V1.0 :| Joe Yang :| 05/07/10 :| Initial Revision 41 | // V2.0 :| Joe Yang :| 12/12/16 :| Initial Revision 42 | // -------------------------------------------------------------------- 43 | module I2C_Controller ( 44 | input CLOCK, 45 | input [23:0]I2C_DATA, 46 | input GO, 47 | input RESET, 48 | input W_R, 49 | inout I2C_SDAT, 50 | output I2C_SCLK, 51 | output END, 52 | output ACK 53 | ); 54 | 55 | wire SDAO ; 56 | 57 | assign I2C_SDAT = SDAO?1'bz :0 ; 58 | 59 | I2C_WRITE_WDATA wrd( 60 | .RESET_N ( RESET), 61 | .PT_CK ( CLOCK), 62 | .GO ( GO ), 63 | .END_OK ( END ), 64 | .ACK_OK ( ACK ), 65 | .BYTE_NUM ( 2 ), //2byte 66 | .SDAI ( I2C_SDAT ),//IN 67 | .SDAO ( SDAO ),//OUT 68 | .SCLO ( I2C_SCLK ), 69 | .SLAVE_ADDRESS( I2C_DATA[23:16] ), 70 | .REG_DATA ( I2C_DATA[15:0] ) 71 | ); 72 | 73 | 74 | 75 | endmodule 76 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/generate_hps_qsys_header.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | sopc-create-header-files \ 3 | "./soc_system.sopcinfo" \ 4 | --single hps_0.h \ 5 | --module hps_0 6 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/altsource_probe/hps_reset.qip: -------------------------------------------------------------------------------- 1 | set_global_assignment -name IP_TOOL_NAME "In-System Sources and Probes" 2 | set_global_assignment -name IP_TOOL_VERSION "16.0" 3 | set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone V}" 4 | set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "hps_reset.v"] 5 | set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "hps_reset_bb.v"] 6 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/edge_detect/altera_edge_detector.v: -------------------------------------------------------------------------------- 1 | module altera_edge_detector #( 2 | parameter PULSE_EXT = 0, // 0, 1 = edge detection generate single cycle pulse, >1 = pulse extended for specified clock cycle 3 | parameter EDGE_TYPE = 0, // 0 = falling edge, 1 or else = rising edge 4 | parameter IGNORE_RST_WHILE_BUSY = 0 // 0 = module internal reset will be default whenever rst_n asserted, 1 = rst_n request will be ignored while generating pulse out 5 | ) ( 6 | input clk, 7 | input rst_n, 8 | input signal_in, 9 | output pulse_out 10 | ); 11 | 12 | localparam IDLE = 0, ARM = 1, CAPT = 2; 13 | localparam SIGNAL_ASSERT = EDGE_TYPE ? 1'b1 : 1'b0; 14 | localparam SIGNAL_DEASSERT = EDGE_TYPE ? 1'b0 : 1'b1; 15 | 16 | reg [1:0] state, next_state; 17 | reg pulse_detect; 18 | wire busy_pulsing; 19 | 20 | assign busy_pulsing = (IGNORE_RST_WHILE_BUSY)? pulse_out : 1'b0; 21 | assign reset_qual_n = rst_n | busy_pulsing; 22 | 23 | generate 24 | if (PULSE_EXT > 1) begin: pulse_extend 25 | integer i; 26 | reg [PULSE_EXT-1:0] extend_pulse; 27 | always @(posedge clk or negedge reset_qual_n) begin 28 | if (!reset_qual_n) 29 | extend_pulse <= {{PULSE_EXT}{1'b0}}; 30 | else begin 31 | for (i = 1; i < PULSE_EXT; i = i+1) begin 32 | extend_pulse[i] <= extend_pulse[i-1]; 33 | end 34 | extend_pulse[0] <= pulse_detect; 35 | end 36 | end 37 | assign pulse_out = |extend_pulse; 38 | end 39 | else begin: single_pulse 40 | reg pulse_reg; 41 | always @(posedge clk or negedge reset_qual_n) begin 42 | if (!reset_qual_n) 43 | pulse_reg <= 1'b0; 44 | else 45 | pulse_reg <= pulse_detect; 46 | end 47 | assign pulse_out = pulse_reg; 48 | end 49 | endgenerate 50 | 51 | always @(posedge clk) begin 52 | if (!rst_n) 53 | state <= IDLE; 54 | else 55 | state <= next_state; 56 | end 57 | 58 | // edge detect 59 | always @(*) begin 60 | next_state = state; 61 | pulse_detect = 1'b0; 62 | case (state) 63 | IDLE : begin 64 | pulse_detect = 1'b0; 65 | if (signal_in == SIGNAL_DEASSERT) next_state = ARM; 66 | else next_state = IDLE; 67 | end 68 | ARM : begin 69 | pulse_detect = 1'b0; 70 | if (signal_in == SIGNAL_ASSERT) next_state = CAPT; 71 | else next_state = ARM; 72 | end 73 | CAPT : begin 74 | pulse_detect = 1'b1; 75 | if (signal_in == SIGNAL_DEASSERT) next_state = ARM; 76 | else next_state = IDLE; 77 | end 78 | default : begin 79 | pulse_detect = 1'b0; 80 | next_state = IDLE; 81 | end 82 | endcase 83 | end 84 | 85 | endmodule 86 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/i2c_opencores/Docs/i2c_specs.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE10_NANO_Linux_RGB/ip/i2c_opencores/Docs/i2c_specs.pdf -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/i2c_opencores/HAL/inc/i2c_opencores.h: -------------------------------------------------------------------------------- 1 | #ifndef __I2C_OPENCORES_H__ 2 | #define __I2C_OPENCORES_H__ 3 | 4 | 5 | #include "alt_types.h" 6 | 7 | #ifdef __cplusplus 8 | extern "C" 9 | { 10 | #endif /* __cplusplus */ 11 | 12 | 13 | 14 | 15 | void I2C_init(alt_u32 base,alt_u32 clk,alt_u32 speed); 16 | int I2C_start(alt_u32 base, alt_u32 add, alt_u32 read); 17 | alt_u32 I2C_read(alt_u32 base,alt_u32 last); 18 | alt_u32 I2C_write(alt_u32 base,alt_u8 data, alt_u32 last); 19 | #define I2C_OK (0) 20 | #define I2C_ACK (0) 21 | #define I2C_NOACK (1) 22 | #define I2C_ABITRATION_LOST (2) 23 | 24 | #define I2C_OPENCORES_INSTANCE(name, dev) extern int alt_no_storage 25 | #define I2C_OPENCORES_INIT(name, dev) while (0) 26 | 27 | #ifdef __cplusplus 28 | } 29 | #endif /* __cplusplus */ 30 | 31 | #endif /* __I2C_OPENCORES_H__ */ 32 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/i2c_opencores/HAL/src/component.mk: -------------------------------------------------------------------------------- 1 | # ******************************************************************************* 2 | # * * 3 | # * License Agreement * 4 | # * * 5 | # * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * 6 | # * All rights reserved. * 7 | # * * 8 | # * Permission is hereby granted, free of charge, to any person obtaining a * 9 | # * copy of this software and associated documentation files (the "Software"), * 10 | # * to deal in the Software without restriction, including without limitation * 11 | # * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 12 | # * and/or sell copies of the Software, and to permit persons to whom the * 13 | # * Software is furnished to do so, subject to the following conditions: * 14 | # * * 15 | # * The above copyright notice and this permission notice shall be included in * 16 | # * all copies or substantial portions of the Software. * 17 | # * * 18 | # * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 19 | # * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 20 | # * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 21 | # * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 22 | # * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 23 | # * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 24 | # * DEALINGS IN THE SOFTWARE. * 25 | # * * 26 | # * This agreement shall be governed in all respects by the laws of the State * 27 | # * of California and by the laws of the United States of America. * 28 | # * * 29 | # * Altera does not recommend, suggest or require that this reference design * 30 | # * file be used in conjunction or combination with any other product. * 31 | # ******************************************************************************* 32 | 33 | # List all source files supplied by this component. 34 | 35 | C_LIB_SRCS += i2c_opencores.c 36 | 37 | ASM_LIB_SRCS += 38 | 39 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/i2c_opencores/i2c_opencores.v: -------------------------------------------------------------------------------- 1 | // 2 | // fixed for 9.1 jan 21 2010 cruben 3 | // 4 | //`include "timescale.v" 5 | //`include "i2c_master_defines.v" 6 | 7 | module i2c_opencores 8 | ( 9 | wb_clk_i, wb_rst_i, wb_adr_i, wb_dat_i, wb_dat_o, 10 | wb_we_i, wb_stb_i, /*wb_cyc_i,*/ wb_ack_o, wb_inta_o, 11 | scl_pad_io, sda_pad_io 12 | ); 13 | 14 | 15 | // Common bus signals 16 | input wb_clk_i; // WISHBONE clock 17 | input wb_rst_i; // WISHBONE reset 18 | 19 | // Slave signals 20 | input [2:0] wb_adr_i; // WISHBONE address input 21 | input [7:0] wb_dat_i; // WISHBONE data input 22 | output [7:0] wb_dat_o; // WISHBONE data output 23 | input wb_we_i; // WISHBONE write enable input 24 | input wb_stb_i; // WISHBONE strobe input 25 | //input wb_cyc_i; // WISHBONE cycle input 26 | output wb_ack_o; // WISHBONE acknowledge output 27 | output wb_inta_o; // WISHBONE interrupt output 28 | 29 | // I2C signals 30 | inout scl_pad_io; // I2C clock io 31 | inout sda_pad_io; // I2C data io 32 | 33 | wire wb_cyc_i; // WISHBONE cycle input 34 | // Wire tri-state scl/sda 35 | wire scl_pad_i; 36 | wire scl_pad_o; 37 | wire scl_pad_io; 38 | wire scl_padoen_o; 39 | 40 | assign wb_cyc_i = wb_stb_i; 41 | assign scl_pad_i = scl_pad_io; 42 | assign scl_pad_io = scl_padoen_o ? 1'bZ : scl_pad_o; 43 | 44 | wire sda_pad_i; 45 | wire sda_pad_o; 46 | wire sda_pad_io; 47 | wire sda_padoen_o; 48 | 49 | assign sda_pad_i = sda_pad_io; 50 | assign sda_pad_io = sda_padoen_o ? 1'bZ : sda_pad_o; 51 | 52 | // Avalon doesn't have an asynchronous reset 53 | // set it to be inactive and just use synchronous reset 54 | // reset level is a parameter, 0 is the default (active-low reset) 55 | wire arst_i; 56 | 57 | assign arst_i = 1'b1; 58 | 59 | // Connect the top level I2C core 60 | i2c_master_top i2c_master_top_inst 61 | ( 62 | .wb_clk_i(wb_clk_i), .wb_rst_i(wb_rst_i), .arst_i(arst_i), 63 | 64 | .wb_adr_i(wb_adr_i), .wb_dat_i(wb_dat_i), .wb_dat_o(wb_dat_o), 65 | .wb_we_i(wb_we_i), .wb_stb_i(wb_stb_i), .wb_cyc_i(wb_cyc_i), 66 | .wb_ack_o(wb_ack_o), .wb_inta_o(wb_inta_o), 67 | 68 | .scl_pad_i(scl_pad_i), .scl_pad_o(scl_pad_o), .scl_padoen_o(scl_padoen_o), 69 | .sda_pad_i(sda_pad_i), .sda_pad_o(sda_pad_o), .sda_padoen_o(sda_padoen_o) 70 | ); 71 | 72 | endmodule 73 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/i2c_opencores/i2c_opencores_sw.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # opencores_i2c_sw.tcl 3 | # 4 | 5 | # Create a new driver 6 | create_driver opencores_i2c_driver 7 | 8 | # Associate it with some hardware known as "opencores_i2c" 9 | set_sw_property hw_class_name opencores_i2c 10 | 11 | # The version of this driver 12 | set_sw_property version 11.0 13 | 14 | # This driver may be incompatible with versions of hardware less 15 | # than specified below. Updates to hardware and device drivers 16 | # rendering the driver incompatible with older versions of 17 | # hardware are noted with this property assignment. 18 | # 19 | # Multiple-Version compatibility was introduced in version 7.1; 20 | # prior versions are therefore excluded. 21 | set_sw_property min_compatible_hw_version 7.1 22 | 23 | # Initialize the driver in alt_sys_init() 24 | set_sw_property auto_initialize true 25 | 26 | # Location in generated BSP that above sources will be copied into 27 | set_sw_property bsp_subdirectory drivers 28 | 29 | 30 | # Interrupt properties: 31 | # This peripheral has an IRQ output but the driver doesn't currently 32 | # have any interrupt service routine. To ensure that the BSP tools 33 | # do not otherwise limit the BSP functionality for users of the 34 | # Nios II enhanced interrupt port, these settings advertise 35 | # compliance with both legacy and enhanced interrupt APIs, and to state 36 | # that any driver ISR supports preemption. If an interrupt handler 37 | # is added to this driver, these must be re-examined for validity. 38 | set_sw_property isr_preemption_supported true 39 | set_sw_property supported_interrupt_apis "legacy_interrupt_api enhanced_interrupt_api" 40 | 41 | # 42 | # Source file listings... 43 | # 44 | 45 | # C/C++ source files 46 | add_sw_property c_source HAL/src/opencores_i2c.c 47 | 48 | # Include files 49 | add_sw_property include_source HAL/inc/opencores_i2c.h 50 | add_sw_property include_source inc/opencores_i2c_regs.h 51 | 52 | # This driver supports HAL & UCOSII BSP (OS) types 53 | add_sw_property supported_bsp_type HAL 54 | add_sw_property supported_bsp_type UCOSII 55 | 56 | # End of file 57 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/i2c_opencores/timescale.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 10ps 2 | 3 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/intr_capturer/intr_capturer.v: -------------------------------------------------------------------------------- 1 | //Legal Notice: (C)2013 Altera Corporation. All rights reserved. Your 2 | //use of Altera Corporation's design tools, logic functions and other 3 | //software and tools, and its AMPP partner logic functions, and any 4 | //output files any of the foregoing (including device programming or 5 | //simulation files), and any associated documentation or information are 6 | //expressly subject to the terms and conditions of the Altera Program 7 | //License Subscription Agreement or other applicable license agreement, 8 | //including, without limitation, that your use is for the sole purpose 9 | //of programming logic devices manufactured by Altera and sold by Altera 10 | //or its authorized distributors. Please refer to the applicable 11 | //agreement for further details. 12 | 13 | module intr_capturer #( 14 | parameter NUM_INTR = 32 15 | // active high level interrupt is expected for the input of this capturer module 16 | )( 17 | input clk, 18 | input rst_n, 19 | input [NUM_INTR-1:0] interrupt_in, 20 | //input [31:0] wrdata, 21 | input addr, 22 | input read, 23 | output [31:0] rddata 24 | ); 25 | 26 | reg [NUM_INTR-1:0] interrupt_reg; 27 | reg [31:0] readdata_with_waitstate; 28 | wire [31:0] act_readdata; 29 | wire [31:0] readdata_lower_intr; 30 | wire [31:0] readdata_higher_intr; 31 | wire access_lower_32; 32 | wire access_higher_32; 33 | 34 | always @(posedge clk or negedge rst_n) begin 35 | if (!rst_n) interrupt_reg <= 'b0; 36 | else interrupt_reg <= interrupt_in; 37 | end 38 | 39 | generate 40 | if (NUM_INTR>32) begin : two_intr_reg_needed 41 | assign access_higher_32 = read & (addr == 1); 42 | 43 | assign readdata_lower_intr = interrupt_reg[31:0] & {(32){access_lower_32}}; 44 | assign readdata_higher_intr = interrupt_reg[NUM_INTR-1:32] & {(NUM_INTR-32){access_higher_32}}; 45 | end 46 | else begin : only_1_reg 47 | assign readdata_lower_intr = interrupt_reg & {(NUM_INTR){access_lower_32}}; 48 | assign readdata_higher_intr = {32{1'b0}}; 49 | end 50 | endgenerate 51 | 52 | assign access_lower_32 = read & (addr == 0); 53 | assign act_readdata = readdata_lower_intr | readdata_higher_intr; 54 | assign rddata = readdata_with_waitstate; 55 | 56 | always @(posedge clk or negedge rst_n) begin 57 | if (!rst_n) readdata_with_waitstate <= 32'b0; 58 | else readdata_with_waitstate <= act_readdata; 59 | end 60 | 61 | endmodule 62 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/lcd_pll/lcd_pll/lcd_pll_0002.qip: -------------------------------------------------------------------------------- 1 | set_instance_assignment -name PLL_COMPENSATION_MODE DIRECT -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 2 | 3 | set_instance_assignment -name PLL_AUTO_RESET OFF -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 4 | set_instance_assignment -name PLL_BANDWIDTH_PRESET AUTO -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 5 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/ip/lcd_pll/lcd_pll/lcd_pll_0002.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns/10ps 2 | module lcd_pll_0002( 3 | 4 | // interface 'refclk' 5 | input wire refclk, 6 | 7 | // interface 'reset' 8 | input wire rst, 9 | 10 | // interface 'outclk0' 11 | output wire outclk_0, 12 | 13 | // interface 'outclk1' 14 | output wire outclk_1, 15 | 16 | // interface 'locked' 17 | output wire locked 18 | ); 19 | 20 | altera_pll #( 21 | .fractional_vco_multiplier("false"), 22 | .reference_clock_frequency("50.0 MHz"), 23 | .operation_mode("direct"), 24 | .number_of_clocks(2), 25 | .output_clock_frequency0("30.000000 MHz"), 26 | .phase_shift0("0 ps"), 27 | .duty_cycle0(50), 28 | .output_clock_frequency1("130.000000 MHz"), 29 | .phase_shift1("0 ps"), 30 | .duty_cycle1(50), 31 | .output_clock_frequency2("0 MHz"), 32 | .phase_shift2("0 ps"), 33 | .duty_cycle2(50), 34 | .output_clock_frequency3("0 MHz"), 35 | .phase_shift3("0 ps"), 36 | .duty_cycle3(50), 37 | .output_clock_frequency4("0 MHz"), 38 | .phase_shift4("0 ps"), 39 | .duty_cycle4(50), 40 | .output_clock_frequency5("0 MHz"), 41 | .phase_shift5("0 ps"), 42 | .duty_cycle5(50), 43 | .output_clock_frequency6("0 MHz"), 44 | .phase_shift6("0 ps"), 45 | .duty_cycle6(50), 46 | .output_clock_frequency7("0 MHz"), 47 | .phase_shift7("0 ps"), 48 | .duty_cycle7(50), 49 | .output_clock_frequency8("0 MHz"), 50 | .phase_shift8("0 ps"), 51 | .duty_cycle8(50), 52 | .output_clock_frequency9("0 MHz"), 53 | .phase_shift9("0 ps"), 54 | .duty_cycle9(50), 55 | .output_clock_frequency10("0 MHz"), 56 | .phase_shift10("0 ps"), 57 | .duty_cycle10(50), 58 | .output_clock_frequency11("0 MHz"), 59 | .phase_shift11("0 ps"), 60 | .duty_cycle11(50), 61 | .output_clock_frequency12("0 MHz"), 62 | .phase_shift12("0 ps"), 63 | .duty_cycle12(50), 64 | .output_clock_frequency13("0 MHz"), 65 | .phase_shift13("0 ps"), 66 | .duty_cycle13(50), 67 | .output_clock_frequency14("0 MHz"), 68 | .phase_shift14("0 ps"), 69 | .duty_cycle14(50), 70 | .output_clock_frequency15("0 MHz"), 71 | .phase_shift15("0 ps"), 72 | .duty_cycle15(50), 73 | .output_clock_frequency16("0 MHz"), 74 | .phase_shift16("0 ps"), 75 | .duty_cycle16(50), 76 | .output_clock_frequency17("0 MHz"), 77 | .phase_shift17("0 ps"), 78 | .duty_cycle17(50), 79 | .pll_type("General"), 80 | .pll_subtype("General") 81 | ) altera_pll_i ( 82 | .rst (rst), 83 | .outclk ({outclk_1, outclk_0}), 84 | .locked (locked), 85 | .fboutclk ( ), 86 | .fbclk (1'b0), 87 | .refclk (refclk) 88 | ); 89 | endmodule 90 | 91 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_RGB/soc_system_board_info.xml: -------------------------------------------------------------------------------- 1 | 2 | 13 | 14 | 15 | 16 | altr,socfpga-cyclone5 17 | altr,socfpga 18 | 19 | 20 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/DE10_NANO_Linux_i80.qpf: -------------------------------------------------------------------------------- 1 | DATE = "17:14:54 March 04, 2015" 2 | QUARTUS_VERSION = "14.1" 3 | 4 | # Revisions 5 | 6 | PROJECT_REVISION = "DE10_NANO_Linux_i80" 7 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/I2C_Controller.v: -------------------------------------------------------------------------------- 1 | // -------------------------------------------------------------------- 2 | // Copyright (c) 2005 by Terasic Technologies Inc. 3 | // -------------------------------------------------------------------- 4 | // 5 | // Permission: 6 | // 7 | // Terasic grants permission to use and modify this code for use 8 | // in synthesis for all Terasic Development Boards and Altrea Development 9 | // Kits made by Terasic. Other use of this code, including the selling 10 | // ,duplication, or modification of any portion is strictly prohibited. 11 | // 12 | // Disclaimer: 13 | // 14 | // This VHDL or Verilog source code is intended as a design reference 15 | // which illustrates how these types of functions can be implemented. 16 | // It is the user's responsibility to verify their design for 17 | // consistency and functionality through the use of formal 18 | // verification methods. Terasic provides no warranty regarding the use 19 | // or functionality of this code. 20 | // 21 | // -------------------------------------------------------------------- 22 | // 23 | // Terasic Technologies Inc 24 | // 356 Fu-Shin E. Rd Sec. 1. JhuBei City, 25 | // HsinChu County, Taiwan 26 | // 302 27 | // 28 | // web: http://www.terasic.com/ 29 | // email: support@terasic.com 30 | // 31 | // -------------------------------------------------------------------- 32 | // 33 | // Major Functions:i2c controller 34 | // 35 | // -------------------------------------------------------------------- 36 | // 37 | // Revision History : 38 | // -------------------------------------------------------------------- 39 | // Ver :| Author :| Mod. Date :| Changes Made: 40 | // V1.0 :| Joe Yang :| 05/07/10 :| Initial Revision 41 | // V2.0 :| Joe Yang :| 12/12/16 :| Initial Revision 42 | // -------------------------------------------------------------------- 43 | module I2C_Controller ( 44 | input CLOCK, 45 | input [23:0]I2C_DATA, 46 | input GO, 47 | input RESET, 48 | input W_R, 49 | inout I2C_SDAT, 50 | output I2C_SCLK, 51 | output END, 52 | output ACK 53 | ); 54 | 55 | wire SDAO ; 56 | 57 | assign I2C_SDAT = SDAO?1'bz :0 ; 58 | 59 | I2C_WRITE_WDATA wrd( 60 | .RESET_N ( RESET), 61 | .PT_CK ( CLOCK), 62 | .GO ( GO ), 63 | .END_OK ( END ), 64 | .ACK_OK ( ACK ), 65 | .BYTE_NUM ( 2 ), //2byte 66 | .SDAI ( I2C_SDAT ),//IN 67 | .SDAO ( SDAO ),//OUT 68 | .SCLO ( I2C_SCLK ), 69 | .SLAVE_ADDRESS( I2C_DATA[23:16] ), 70 | .REG_DATA ( I2C_DATA[15:0] ) 71 | ); 72 | 73 | 74 | 75 | endmodule 76 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/generate_hps_qsys_header.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | sopc-create-header-files \ 3 | "./soc_system.sopcinfo" \ 4 | --single hps_0.h \ 5 | --module hps_0 6 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/I8080_Controller/I8080_Controller.v: -------------------------------------------------------------------------------- 1 | //without read function 2 | // Revision History : 3 | // -------------------------------------------------------------------- 4 | // Ver :| Author :| Mod. Date :| Changes Made: 5 | // -------------------------------------------------------------------- 6 | 7 | module I8080_Controller#( 8 | I8080_BUS_WIDTH = 32 9 | )( 10 | // global clock & reset 11 | clk, 12 | reset_n, 13 | 14 | // mm slave 15 | s_chipselect_n, 16 | // s_read, 17 | s_write_n, 18 | // s_readdata, 19 | s_writedata, 20 | s_address, 21 | 22 | i8080_cs, 23 | i8080_rs,//command/data 24 | i8080_rd, 25 | i8080_wr, 26 | i8080_data, 27 | ); 28 | 29 | // global clock & reset 30 | input clk; 31 | input reset_n; 32 | 33 | // mm slave 34 | input s_chipselect_n; 35 | //input s_read; 36 | input s_write_n; 37 | //output reg [31:0] s_readdata; 38 | input [31:0] s_writedata; 39 | input [2:0] s_address; 40 | 41 | output i8080_cs; 42 | output i8080_rs;//command/data 43 | output i8080_rd; 44 | output i8080_wr; 45 | output [31:0] i8080_data; 46 | 47 | 48 | assign i8080_cs = s_chipselect_n; 49 | assign i8080_rs = s_address[2]; 50 | assign i8080_rd = 1'b1; 51 | assign i8080_wr = s_write_n; 52 | assign i8080_data = s_writedata[31:0]; 53 | 54 | 55 | endmodule 56 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/altsource_probe/hps_reset.qip: -------------------------------------------------------------------------------- 1 | set_global_assignment -name IP_TOOL_NAME "In-System Sources and Probes" 2 | set_global_assignment -name IP_TOOL_VERSION "16.0" 3 | set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone V}" 4 | set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "hps_reset.v"] 5 | set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "hps_reset_bb.v"] 6 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/edge_detect/altera_edge_detector.v: -------------------------------------------------------------------------------- 1 | module altera_edge_detector #( 2 | parameter PULSE_EXT = 0, // 0, 1 = edge detection generate single cycle pulse, >1 = pulse extended for specified clock cycle 3 | parameter EDGE_TYPE = 0, // 0 = falling edge, 1 or else = rising edge 4 | parameter IGNORE_RST_WHILE_BUSY = 0 // 0 = module internal reset will be default whenever rst_n asserted, 1 = rst_n request will be ignored while generating pulse out 5 | ) ( 6 | input clk, 7 | input rst_n, 8 | input signal_in, 9 | output pulse_out 10 | ); 11 | 12 | localparam IDLE = 0, ARM = 1, CAPT = 2; 13 | localparam SIGNAL_ASSERT = EDGE_TYPE ? 1'b1 : 1'b0; 14 | localparam SIGNAL_DEASSERT = EDGE_TYPE ? 1'b0 : 1'b1; 15 | 16 | reg [1:0] state, next_state; 17 | reg pulse_detect; 18 | wire busy_pulsing; 19 | 20 | assign busy_pulsing = (IGNORE_RST_WHILE_BUSY)? pulse_out : 1'b0; 21 | assign reset_qual_n = rst_n | busy_pulsing; 22 | 23 | generate 24 | if (PULSE_EXT > 1) begin: pulse_extend 25 | integer i; 26 | reg [PULSE_EXT-1:0] extend_pulse; 27 | always @(posedge clk or negedge reset_qual_n) begin 28 | if (!reset_qual_n) 29 | extend_pulse <= {{PULSE_EXT}{1'b0}}; 30 | else begin 31 | for (i = 1; i < PULSE_EXT; i = i+1) begin 32 | extend_pulse[i] <= extend_pulse[i-1]; 33 | end 34 | extend_pulse[0] <= pulse_detect; 35 | end 36 | end 37 | assign pulse_out = |extend_pulse; 38 | end 39 | else begin: single_pulse 40 | reg pulse_reg; 41 | always @(posedge clk or negedge reset_qual_n) begin 42 | if (!reset_qual_n) 43 | pulse_reg <= 1'b0; 44 | else 45 | pulse_reg <= pulse_detect; 46 | end 47 | assign pulse_out = pulse_reg; 48 | end 49 | endgenerate 50 | 51 | always @(posedge clk) begin 52 | if (!rst_n) 53 | state <= IDLE; 54 | else 55 | state <= next_state; 56 | end 57 | 58 | // edge detect 59 | always @(*) begin 60 | next_state = state; 61 | pulse_detect = 1'b0; 62 | case (state) 63 | IDLE : begin 64 | pulse_detect = 1'b0; 65 | if (signal_in == SIGNAL_DEASSERT) next_state = ARM; 66 | else next_state = IDLE; 67 | end 68 | ARM : begin 69 | pulse_detect = 1'b0; 70 | if (signal_in == SIGNAL_ASSERT) next_state = CAPT; 71 | else next_state = ARM; 72 | end 73 | CAPT : begin 74 | pulse_detect = 1'b1; 75 | if (signal_in == SIGNAL_DEASSERT) next_state = ARM; 76 | else next_state = IDLE; 77 | end 78 | default : begin 79 | pulse_detect = 1'b0; 80 | next_state = IDLE; 81 | end 82 | endcase 83 | end 84 | 85 | endmodule 86 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/i2c_opencores/Docs/i2c_specs.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE10_NANO_Linux_i80/ip/i2c_opencores/Docs/i2c_specs.pdf -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/i2c_opencores/HAL/inc/i2c_opencores.h: -------------------------------------------------------------------------------- 1 | #ifndef __I2C_OPENCORES_H__ 2 | #define __I2C_OPENCORES_H__ 3 | 4 | 5 | #include "alt_types.h" 6 | 7 | #ifdef __cplusplus 8 | extern "C" 9 | { 10 | #endif /* __cplusplus */ 11 | 12 | 13 | 14 | 15 | void I2C_init(alt_u32 base,alt_u32 clk,alt_u32 speed); 16 | int I2C_start(alt_u32 base, alt_u32 add, alt_u32 read); 17 | alt_u32 I2C_read(alt_u32 base,alt_u32 last); 18 | alt_u32 I2C_write(alt_u32 base,alt_u8 data, alt_u32 last); 19 | #define I2C_OK (0) 20 | #define I2C_ACK (0) 21 | #define I2C_NOACK (1) 22 | #define I2C_ABITRATION_LOST (2) 23 | 24 | #define I2C_OPENCORES_INSTANCE(name, dev) extern int alt_no_storage 25 | #define I2C_OPENCORES_INIT(name, dev) while (0) 26 | 27 | #ifdef __cplusplus 28 | } 29 | #endif /* __cplusplus */ 30 | 31 | #endif /* __I2C_OPENCORES_H__ */ 32 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/i2c_opencores/HAL/src/component.mk: -------------------------------------------------------------------------------- 1 | # ******************************************************************************* 2 | # * * 3 | # * License Agreement * 4 | # * * 5 | # * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * 6 | # * All rights reserved. * 7 | # * * 8 | # * Permission is hereby granted, free of charge, to any person obtaining a * 9 | # * copy of this software and associated documentation files (the "Software"), * 10 | # * to deal in the Software without restriction, including without limitation * 11 | # * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 12 | # * and/or sell copies of the Software, and to permit persons to whom the * 13 | # * Software is furnished to do so, subject to the following conditions: * 14 | # * * 15 | # * The above copyright notice and this permission notice shall be included in * 16 | # * all copies or substantial portions of the Software. * 17 | # * * 18 | # * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 19 | # * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 20 | # * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 21 | # * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 22 | # * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 23 | # * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 24 | # * DEALINGS IN THE SOFTWARE. * 25 | # * * 26 | # * This agreement shall be governed in all respects by the laws of the State * 27 | # * of California and by the laws of the United States of America. * 28 | # * * 29 | # * Altera does not recommend, suggest or require that this reference design * 30 | # * file be used in conjunction or combination with any other product. * 31 | # ******************************************************************************* 32 | 33 | # List all source files supplied by this component. 34 | 35 | C_LIB_SRCS += i2c_opencores.c 36 | 37 | ASM_LIB_SRCS += 38 | 39 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/i2c_opencores/i2c_opencores.v: -------------------------------------------------------------------------------- 1 | // 2 | // fixed for 9.1 jan 21 2010 cruben 3 | // 4 | //`include "timescale.v" 5 | //`include "i2c_master_defines.v" 6 | 7 | module i2c_opencores 8 | ( 9 | wb_clk_i, wb_rst_i, wb_adr_i, wb_dat_i, wb_dat_o, 10 | wb_we_i, wb_stb_i, /*wb_cyc_i,*/ wb_ack_o, wb_inta_o, 11 | scl_pad_io, sda_pad_io 12 | ); 13 | 14 | 15 | // Common bus signals 16 | input wb_clk_i; // WISHBONE clock 17 | input wb_rst_i; // WISHBONE reset 18 | 19 | // Slave signals 20 | input [2:0] wb_adr_i; // WISHBONE address input 21 | input [7:0] wb_dat_i; // WISHBONE data input 22 | output [7:0] wb_dat_o; // WISHBONE data output 23 | input wb_we_i; // WISHBONE write enable input 24 | input wb_stb_i; // WISHBONE strobe input 25 | //input wb_cyc_i; // WISHBONE cycle input 26 | output wb_ack_o; // WISHBONE acknowledge output 27 | output wb_inta_o; // WISHBONE interrupt output 28 | 29 | // I2C signals 30 | inout scl_pad_io; // I2C clock io 31 | inout sda_pad_io; // I2C data io 32 | 33 | wire wb_cyc_i; // WISHBONE cycle input 34 | // Wire tri-state scl/sda 35 | wire scl_pad_i; 36 | wire scl_pad_o; 37 | wire scl_pad_io; 38 | wire scl_padoen_o; 39 | 40 | assign wb_cyc_i = wb_stb_i; 41 | assign scl_pad_i = scl_pad_io; 42 | assign scl_pad_io = scl_padoen_o ? 1'bZ : scl_pad_o; 43 | 44 | wire sda_pad_i; 45 | wire sda_pad_o; 46 | wire sda_pad_io; 47 | wire sda_padoen_o; 48 | 49 | assign sda_pad_i = sda_pad_io; 50 | assign sda_pad_io = sda_padoen_o ? 1'bZ : sda_pad_o; 51 | 52 | // Avalon doesn't have an asynchronous reset 53 | // set it to be inactive and just use synchronous reset 54 | // reset level is a parameter, 0 is the default (active-low reset) 55 | wire arst_i; 56 | 57 | assign arst_i = 1'b1; 58 | 59 | // Connect the top level I2C core 60 | i2c_master_top i2c_master_top_inst 61 | ( 62 | .wb_clk_i(wb_clk_i), .wb_rst_i(wb_rst_i), .arst_i(arst_i), 63 | 64 | .wb_adr_i(wb_adr_i), .wb_dat_i(wb_dat_i), .wb_dat_o(wb_dat_o), 65 | .wb_we_i(wb_we_i), .wb_stb_i(wb_stb_i), .wb_cyc_i(wb_cyc_i), 66 | .wb_ack_o(wb_ack_o), .wb_inta_o(wb_inta_o), 67 | 68 | .scl_pad_i(scl_pad_i), .scl_pad_o(scl_pad_o), .scl_padoen_o(scl_padoen_o), 69 | .sda_pad_i(sda_pad_i), .sda_pad_o(sda_pad_o), .sda_padoen_o(sda_padoen_o) 70 | ); 71 | 72 | endmodule 73 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/i2c_opencores/i2c_opencores_sw.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # opencores_i2c_sw.tcl 3 | # 4 | 5 | # Create a new driver 6 | create_driver opencores_i2c_driver 7 | 8 | # Associate it with some hardware known as "opencores_i2c" 9 | set_sw_property hw_class_name opencores_i2c 10 | 11 | # The version of this driver 12 | set_sw_property version 11.0 13 | 14 | # This driver may be incompatible with versions of hardware less 15 | # than specified below. Updates to hardware and device drivers 16 | # rendering the driver incompatible with older versions of 17 | # hardware are noted with this property assignment. 18 | # 19 | # Multiple-Version compatibility was introduced in version 7.1; 20 | # prior versions are therefore excluded. 21 | set_sw_property min_compatible_hw_version 7.1 22 | 23 | # Initialize the driver in alt_sys_init() 24 | set_sw_property auto_initialize true 25 | 26 | # Location in generated BSP that above sources will be copied into 27 | set_sw_property bsp_subdirectory drivers 28 | 29 | 30 | # Interrupt properties: 31 | # This peripheral has an IRQ output but the driver doesn't currently 32 | # have any interrupt service routine. To ensure that the BSP tools 33 | # do not otherwise limit the BSP functionality for users of the 34 | # Nios II enhanced interrupt port, these settings advertise 35 | # compliance with both legacy and enhanced interrupt APIs, and to state 36 | # that any driver ISR supports preemption. If an interrupt handler 37 | # is added to this driver, these must be re-examined for validity. 38 | set_sw_property isr_preemption_supported true 39 | set_sw_property supported_interrupt_apis "legacy_interrupt_api enhanced_interrupt_api" 40 | 41 | # 42 | # Source file listings... 43 | # 44 | 45 | # C/C++ source files 46 | add_sw_property c_source HAL/src/opencores_i2c.c 47 | 48 | # Include files 49 | add_sw_property include_source HAL/inc/opencores_i2c.h 50 | add_sw_property include_source inc/opencores_i2c_regs.h 51 | 52 | # This driver supports HAL & UCOSII BSP (OS) types 53 | add_sw_property supported_bsp_type HAL 54 | add_sw_property supported_bsp_type UCOSII 55 | 56 | # End of file 57 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/i2c_opencores/timescale.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 10ps 2 | 3 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/intr_capturer/intr_capturer.v: -------------------------------------------------------------------------------- 1 | //Legal Notice: (C)2013 Altera Corporation. All rights reserved. Your 2 | //use of Altera Corporation's design tools, logic functions and other 3 | //software and tools, and its AMPP partner logic functions, and any 4 | //output files any of the foregoing (including device programming or 5 | //simulation files), and any associated documentation or information are 6 | //expressly subject to the terms and conditions of the Altera Program 7 | //License Subscription Agreement or other applicable license agreement, 8 | //including, without limitation, that your use is for the sole purpose 9 | //of programming logic devices manufactured by Altera and sold by Altera 10 | //or its authorized distributors. Please refer to the applicable 11 | //agreement for further details. 12 | 13 | module intr_capturer #( 14 | parameter NUM_INTR = 32 15 | // active high level interrupt is expected for the input of this capturer module 16 | )( 17 | input clk, 18 | input rst_n, 19 | input [NUM_INTR-1:0] interrupt_in, 20 | //input [31:0] wrdata, 21 | input addr, 22 | input read, 23 | output [31:0] rddata 24 | ); 25 | 26 | reg [NUM_INTR-1:0] interrupt_reg; 27 | reg [31:0] readdata_with_waitstate; 28 | wire [31:0] act_readdata; 29 | wire [31:0] readdata_lower_intr; 30 | wire [31:0] readdata_higher_intr; 31 | wire access_lower_32; 32 | wire access_higher_32; 33 | 34 | always @(posedge clk or negedge rst_n) begin 35 | if (!rst_n) interrupt_reg <= 'b0; 36 | else interrupt_reg <= interrupt_in; 37 | end 38 | 39 | generate 40 | if (NUM_INTR>32) begin : two_intr_reg_needed 41 | assign access_higher_32 = read & (addr == 1); 42 | 43 | assign readdata_lower_intr = interrupt_reg[31:0] & {(32){access_lower_32}}; 44 | assign readdata_higher_intr = interrupt_reg[NUM_INTR-1:32] & {(NUM_INTR-32){access_higher_32}}; 45 | end 46 | else begin : only_1_reg 47 | assign readdata_lower_intr = interrupt_reg & {(NUM_INTR){access_lower_32}}; 48 | assign readdata_higher_intr = {32{1'b0}}; 49 | end 50 | endgenerate 51 | 52 | assign access_lower_32 = read & (addr == 0); 53 | assign act_readdata = readdata_lower_intr | readdata_higher_intr; 54 | assign rddata = readdata_with_waitstate; 55 | 56 | always @(posedge clk or negedge rst_n) begin 57 | if (!rst_n) readdata_with_waitstate <= 32'b0; 58 | else readdata_with_waitstate <= act_readdata; 59 | end 60 | 61 | endmodule 62 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/lcd_pll/lcd_pll/lcd_pll_0002.qip: -------------------------------------------------------------------------------- 1 | set_instance_assignment -name PLL_COMPENSATION_MODE DIRECT -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 2 | 3 | set_instance_assignment -name PLL_AUTO_RESET OFF -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 4 | set_instance_assignment -name PLL_BANDWIDTH_PRESET AUTO -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 5 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/ip/lcd_pll/lcd_pll/lcd_pll_0002.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns/10ps 2 | module lcd_pll_0002( 3 | 4 | // interface 'refclk' 5 | input wire refclk, 6 | 7 | // interface 'reset' 8 | input wire rst, 9 | 10 | // interface 'outclk0' 11 | output wire outclk_0, 12 | 13 | // interface 'outclk1' 14 | output wire outclk_1, 15 | 16 | // interface 'locked' 17 | output wire locked 18 | ); 19 | 20 | altera_pll #( 21 | .fractional_vco_multiplier("false"), 22 | .reference_clock_frequency("50.0 MHz"), 23 | .operation_mode("direct"), 24 | .number_of_clocks(2), 25 | .output_clock_frequency0("30.000000 MHz"), 26 | .phase_shift0("0 ps"), 27 | .duty_cycle0(50), 28 | .output_clock_frequency1("130.000000 MHz"), 29 | .phase_shift1("0 ps"), 30 | .duty_cycle1(50), 31 | .output_clock_frequency2("0 MHz"), 32 | .phase_shift2("0 ps"), 33 | .duty_cycle2(50), 34 | .output_clock_frequency3("0 MHz"), 35 | .phase_shift3("0 ps"), 36 | .duty_cycle3(50), 37 | .output_clock_frequency4("0 MHz"), 38 | .phase_shift4("0 ps"), 39 | .duty_cycle4(50), 40 | .output_clock_frequency5("0 MHz"), 41 | .phase_shift5("0 ps"), 42 | .duty_cycle5(50), 43 | .output_clock_frequency6("0 MHz"), 44 | .phase_shift6("0 ps"), 45 | .duty_cycle6(50), 46 | .output_clock_frequency7("0 MHz"), 47 | .phase_shift7("0 ps"), 48 | .duty_cycle7(50), 49 | .output_clock_frequency8("0 MHz"), 50 | .phase_shift8("0 ps"), 51 | .duty_cycle8(50), 52 | .output_clock_frequency9("0 MHz"), 53 | .phase_shift9("0 ps"), 54 | .duty_cycle9(50), 55 | .output_clock_frequency10("0 MHz"), 56 | .phase_shift10("0 ps"), 57 | .duty_cycle10(50), 58 | .output_clock_frequency11("0 MHz"), 59 | .phase_shift11("0 ps"), 60 | .duty_cycle11(50), 61 | .output_clock_frequency12("0 MHz"), 62 | .phase_shift12("0 ps"), 63 | .duty_cycle12(50), 64 | .output_clock_frequency13("0 MHz"), 65 | .phase_shift13("0 ps"), 66 | .duty_cycle13(50), 67 | .output_clock_frequency14("0 MHz"), 68 | .phase_shift14("0 ps"), 69 | .duty_cycle14(50), 70 | .output_clock_frequency15("0 MHz"), 71 | .phase_shift15("0 ps"), 72 | .duty_cycle15(50), 73 | .output_clock_frequency16("0 MHz"), 74 | .phase_shift16("0 ps"), 75 | .duty_cycle16(50), 76 | .output_clock_frequency17("0 MHz"), 77 | .phase_shift17("0 ps"), 78 | .duty_cycle17(50), 79 | .pll_type("General"), 80 | .pll_subtype("General") 81 | ) altera_pll_i ( 82 | .rst (rst), 83 | .outclk ({outclk_1, outclk_0}), 84 | .locked (locked), 85 | .fboutclk ( ), 86 | .fbclk (1'b0), 87 | .refclk (refclk) 88 | ); 89 | endmodule 90 | 91 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_Linux_i80/soc_system_board_info.xml: -------------------------------------------------------------------------------- 1 | 2 | 13 | 14 | 15 | 16 | altr,socfpga-cyclone5 17 | altr,socfpga 18 | 19 | 20 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_8bits/DE10_NANO_MIL_8bits.qpf: -------------------------------------------------------------------------------- 1 | DATE = "Tue Mar 3 15:11:40 2015" 2 | QUARTUS_VERSION = "14.0" 3 | 4 | # Revisions 5 | 6 | PROJECT_REVISION = "DE10_NANO_MIL_8bits" 7 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_8bits/DE10_NANO_MIL_8bits.sdc: -------------------------------------------------------------------------------- 1 | #************************************************************** 2 | # This .sdc file is created by Terasic Tool. 3 | # Users are recommended to modify this file to match users logic. 4 | #************************************************************** 5 | 6 | #************************************************************** 7 | # Create Clock 8 | #************************************************************** 9 | 10 | create_clock -period 20 [get_ports FPGA_CLK1_50] 11 | create_clock -period 20 [get_ports FPGA_CLK2_50] 12 | create_clock -period 20 [get_ports FPGA_CLK3_50] 13 | 14 | #************************************************************** 15 | # Create Generated Clock 16 | #************************************************************** 17 | derive_pll_clocks 18 | 19 | 20 | 21 | #************************************************************** 22 | # Set Clock Latency 23 | #************************************************************** 24 | 25 | 26 | 27 | #************************************************************** 28 | # Set Clock Uncertainty 29 | #************************************************************** 30 | derive_clock_uncertainty 31 | 32 | 33 | 34 | #************************************************************** 35 | # Set Input Delay 36 | #************************************************************** 37 | 38 | 39 | 40 | #************************************************************** 41 | # Set Output Delay 42 | #************************************************************** 43 | 44 | 45 | 46 | #************************************************************** 47 | # Set Clock Groups 48 | #************************************************************** 49 | 50 | 51 | 52 | #************************************************************** 53 | # Set False Path 54 | #************************************************************** 55 | 56 | 57 | 58 | #************************************************************** 59 | # Set Multicycle Path 60 | #************************************************************** 61 | 62 | 63 | 64 | #************************************************************** 65 | # Set Maximum Delay 66 | #************************************************************** 67 | 68 | 69 | 70 | #************************************************************** 71 | # Set Minimum Delay 72 | #************************************************************** 73 | 74 | 75 | 76 | #************************************************************** 77 | # Set Input Transition 78 | #************************************************************** 79 | 80 | 81 | 82 | #************************************************************** 83 | # Set Load 84 | #************************************************************** -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_8bits/software/ili9806g_tft/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | ili9806_tft 4 | 5 | 6 | 7 | 8 | 9 | com.altera.sbtgui.project.makefileBuilder 10 | 11 | 12 | 13 | 14 | com.altera.sbtgui.project.makefileBuilder 15 | 16 | 17 | 18 | 19 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 20 | clean,full,incremental, 21 | 22 | 23 | 24 | 25 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 26 | full,incremental, 27 | 28 | 29 | 30 | 31 | 32 | org.eclipse.cdt.core.cnature 33 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 34 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 35 | org.eclipse.cdt.core.ccnature 36 | com.altera.sbtgui.project.SBTGUINature 37 | com.altera.sbtgui.project.SBTGUIAppNature 38 | com.altera.sbtgui.project.SBTGUIManagedNature 39 | 40 | 41 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_8bits/software/ili9806g_tft/.settings/language.settings.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_8bits/software/ili9806g_tft/lcd/lcd.h: -------------------------------------------------------------------------------- 1 | #ifndef __LCD_H 2 | #define __LCD_H 3 | #include "system.h" 4 | typedef unsigned char u8; 5 | typedef unsigned short u16; 6 | typedef unsigned int u32; 7 | #define LCD_CMD *(volatile unsigned char *)(TFT_LCD_BASE) 8 | #define LCD_DATA *(volatile unsigned char *)(TFT_LCD_BASE+1) 9 | 10 | 11 | //Lcd初始化及其低级控制函数 12 | void Lcd_Initialize(void); 13 | void Lcd_WR_Start(void); 14 | //Lcd高级控制函数 15 | void Lcd_ColorBox(u16 x,u16 y,u16 xLong,u16 yLong,u16 Color); 16 | void DrawPixel(u16 x, u16 y, u16 Color); 17 | u16 ReadPixel(u16 x,u8 y); 18 | void LCD_Fill_Pic(u16 x, u16 y,u16 pic_H, u16 pic_V, const unsigned char* pic); 19 | void BlockWrite(unsigned int Xstart,unsigned int Xend,unsigned int Ystart,unsigned int Yend); 20 | 21 | 22 | void delay_ms (u32 tm); 23 | 24 | /*定义常见颜色*/ 25 | // #define red 0x001f 26 | // #define blue 0xf800 27 | // #define green 0x07e0 28 | // #define black 0x0000 29 | // #define white 0xffff 30 | // #define yellow 0x07ff 31 | // #define orange 0x05bf 32 | // #define Chocolate4 0x4451 33 | // #define Grey 0xefbd//灰色 34 | 35 | #define White 0xFFFF 36 | #define Black 0x0000 37 | #define Blue 0x001F 38 | #define Blue2 0x051F 39 | #define Red 0xF800 40 | #define Magenta 0xF81F 41 | #define Green 0x07E0 42 | #define Cyan 0x7FFF 43 | #define Yellow 0xFFE0 44 | 45 | 46 | #endif 47 | 48 | 49 | 50 | 51 | 52 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_8bits/software/ili9806g_tft_bsp/.force_relink: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE10_NANO_MIL_8bits/software/ili9806g_tft_bsp/.force_relink -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_8bits/software/ili9806g_tft_bsp/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | ili9806_tft_bsp 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 25 | org.eclipse.cdt.core.ccnature 26 | com.altera.sbtgui.project.SBTGUINature 27 | com.altera.sbtgui.project.SBTGUIBspNature 28 | 29 | 30 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_8bits/software/ili9806g_tft_bsp/.settings/language.settings.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_8bits/software/ili9806g_tft_bsp/create-this-bsp: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # 3 | # This script creates the ucosii_net_zipfs Board Support Package (BSP). 4 | 5 | BSP_TYPE=hal 6 | BSP_DIR=. 7 | SOPC_DIR=../../ 8 | SOPC_FILE=../../nios2_system.sopcinfo 9 | NIOS2_BSP_ARGS="--set hal.max_file_descriptors 4 --set hal.enable_small_c_library true --set hal.sys_clk_timer none --set hal.timestamp_timer none --set hal.enable_exit false --set hal.enable_c_plus_plus false --set hal.enable_lightweight_device_driver_api true --set hal.enable_clean_exit false --set hal.enable_sim_optimize false --set hal.enable_reduced_device_drivers true --set hal.make.bsp_cflags_optimization '-Os'" 10 | CPU_NAME= 11 | 12 | if [ -n "$CPU_NAME" ]; then 13 | NIOS2_BSP_ARGS="$NIOS2_BSP_ARGS --cpu-name $CPU_NAME" 14 | fi 15 | 16 | # Don't run make if create-this-app script is called with --no-make arg 17 | SKIP_MAKE= 18 | while [ $# -gt 0 ] 19 | do 20 | case "$1" in 21 | --no-make) 22 | SKIP_MAKE=1 23 | ;; 24 | *) 25 | NIOS2_BSP_ARGS="$NIOS2_BSP_ARGS $1" 26 | ;; 27 | esac 28 | shift 29 | done 30 | 31 | 32 | # Run nios2-bsp utility to create a hal BSP in this directory 33 | # for the system with a .sopc file in $SOPC_FILE. 34 | # Deprecating $SOPC_DIR in 10.1. Multiple .sopcinfo files in a directory may exist. 35 | 36 | if [ -z "$SOPC_FILE" ]; then 37 | echo "WARNING: Use of a directory for locating a .sopcinfo file is deprecated in 10.1. Multiple .sopcinfo files may exist. You must specify the full .sopcinfo path." 38 | cmd="nios2-bsp $BSP_TYPE $BSP_DIR $SOPC_DIR $NIOS2_BSP_ARGS" 39 | else 40 | cmd="nios2-bsp $BSP_TYPE $BSP_DIR $SOPC_FILE $NIOS2_BSP_ARGS" 41 | fi 42 | 43 | 44 | echo "create-this-bsp: Running \"$cmd\"" 45 | $cmd || { 46 | echo "$cmd failed" 47 | exit 1 48 | } 49 | if [ -z "$SKIP_MAKE" ]; then 50 | echo "create-this-bsp: Running make" 51 | make 52 | fi 53 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/DE10_NANO_MIL_PAINTER.qpf: -------------------------------------------------------------------------------- 1 | DATE = "Tue Mar 3 15:11:40 2015" 2 | QUARTUS_VERSION = "14.0" 3 | 4 | # Revisions 5 | 6 | PROJECT_REVISION = "DE10_NANO_MIL_PAINTER" 7 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/DE10_NANO_MIL_PAINTER.sdc: -------------------------------------------------------------------------------- 1 | #************************************************************** 2 | # This .sdc file is created by Terasic Tool. 3 | # Users are recommended to modify this file to match users logic. 4 | #************************************************************** 5 | 6 | #************************************************************** 7 | # Create Clock 8 | #************************************************************** 9 | 10 | create_clock -period 20 [get_ports FPGA_CLK1_50] 11 | create_clock -period 20 [get_ports FPGA_CLK2_50] 12 | create_clock -period 20 [get_ports FPGA_CLK3_50] 13 | 14 | #************************************************************** 15 | # Create Generated Clock 16 | #************************************************************** 17 | derive_pll_clocks 18 | 19 | 20 | 21 | #************************************************************** 22 | # Set Clock Latency 23 | #************************************************************** 24 | 25 | 26 | 27 | #************************************************************** 28 | # Set Clock Uncertainty 29 | #************************************************************** 30 | derive_clock_uncertainty 31 | 32 | 33 | 34 | #************************************************************** 35 | # Set Input Delay 36 | #************************************************************** 37 | 38 | 39 | 40 | #************************************************************** 41 | # Set Output Delay 42 | #************************************************************** 43 | 44 | 45 | 46 | #************************************************************** 47 | # Set Clock Groups 48 | #************************************************************** 49 | 50 | 51 | 52 | #************************************************************** 53 | # Set False Path 54 | #************************************************************** 55 | 56 | 57 | 58 | #************************************************************** 59 | # Set Multicycle Path 60 | #************************************************************** 61 | 62 | 63 | 64 | #************************************************************** 65 | # Set Maximum Delay 66 | #************************************************************** 67 | 68 | 69 | 70 | #************************************************************** 71 | # Set Minimum Delay 72 | #************************************************************** 73 | 74 | 75 | 76 | #************************************************************** 77 | # Set Input Transition 78 | #************************************************************** 79 | 80 | 81 | 82 | #************************************************************** 83 | # Set Load 84 | #************************************************************** -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/ip/I8080_Controller/I8080_Controller.v: -------------------------------------------------------------------------------- 1 | //without read function 2 | // Revision History : 3 | // -------------------------------------------------------------------- 4 | // Ver :| Author :| Mod. Date :| Changes Made: 5 | // -------------------------------------------------------------------- 6 | 7 | module I8080_Controller #( 8 | I8080_BUS_WIDTH = 32 9 | )( 10 | // global clock & reset 11 | clk, 12 | reset_n, 13 | 14 | // mm slave 15 | s_chipselect_n, 16 | // s_read, 17 | s_write_n, 18 | // s_readdata, 19 | s_writedata, 20 | s_address, 21 | 22 | i8080_cs, 23 | i8080_rs,//command/data 24 | i8080_rd, 25 | i8080_wr, 26 | i8080_data, 27 | ); 28 | 29 | // global clock & reset 30 | input clk; 31 | input reset_n; 32 | 33 | // mm slave 34 | input s_chipselect_n; 35 | //input s_read; 36 | input s_write_n; 37 | //output reg [31:0] s_readdata; 38 | input [31:0] s_writedata; 39 | input s_address; 40 | 41 | output i8080_cs; 42 | output i8080_rs;//command/data 43 | output i8080_rd; 44 | output i8080_wr; 45 | output [I8080_BUS_WIDTH-1:0] i8080_data; 46 | 47 | 48 | assign i8080_cs = s_chipselect_n; 49 | assign i8080_rs = s_address; 50 | assign i8080_rd = 1'b1; 51 | assign i8080_wr = s_write_n; 52 | assign i8080_data = s_writedata[I8080_BUS_WIDTH-1:0]; 53 | 54 | 55 | endmodule 56 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/ip/i2c_opencores/Docs/i2c_specs.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE10_NANO_MIL_PAINTER/ip/i2c_opencores/Docs/i2c_specs.pdf -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/ip/i2c_opencores/HAL/inc/i2c_opencores.h: -------------------------------------------------------------------------------- 1 | #ifndef __I2C_OPENCORES_H__ 2 | #define __I2C_OPENCORES_H__ 3 | 4 | 5 | #include "alt_types.h" 6 | 7 | #ifdef __cplusplus 8 | extern "C" 9 | { 10 | #endif /* __cplusplus */ 11 | 12 | 13 | 14 | 15 | void I2C_init(alt_u32 base,alt_u32 clk,alt_u32 speed); 16 | int I2C_start(alt_u32 base, alt_u32 add, alt_u32 read); 17 | alt_u32 I2C_read(alt_u32 base,alt_u32 last); 18 | alt_u32 I2C_write(alt_u32 base,alt_u8 data, alt_u32 last); 19 | #define I2C_OK (0) 20 | #define I2C_ACK (0) 21 | #define I2C_NOACK (1) 22 | #define I2C_ABITRATION_LOST (2) 23 | 24 | #define I2C_OPENCORES_INSTANCE(name, dev) extern int alt_no_storage 25 | #define I2C_OPENCORES_INIT(name, dev) while (0) 26 | 27 | #ifdef __cplusplus 28 | } 29 | #endif /* __cplusplus */ 30 | 31 | #endif /* __I2C_OPENCORES_H__ */ 32 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/ip/i2c_opencores/HAL/src/component.mk: -------------------------------------------------------------------------------- 1 | # ******************************************************************************* 2 | # * * 3 | # * License Agreement * 4 | # * * 5 | # * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * 6 | # * All rights reserved. * 7 | # * * 8 | # * Permission is hereby granted, free of charge, to any person obtaining a * 9 | # * copy of this software and associated documentation files (the "Software"), * 10 | # * to deal in the Software without restriction, including without limitation * 11 | # * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 12 | # * and/or sell copies of the Software, and to permit persons to whom the * 13 | # * Software is furnished to do so, subject to the following conditions: * 14 | # * * 15 | # * The above copyright notice and this permission notice shall be included in * 16 | # * all copies or substantial portions of the Software. * 17 | # * * 18 | # * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 19 | # * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 20 | # * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 21 | # * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 22 | # * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 23 | # * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 24 | # * DEALINGS IN THE SOFTWARE. * 25 | # * * 26 | # * This agreement shall be governed in all respects by the laws of the State * 27 | # * of California and by the laws of the United States of America. * 28 | # * * 29 | # * Altera does not recommend, suggest or require that this reference design * 30 | # * file be used in conjunction or combination with any other product. * 31 | # ******************************************************************************* 32 | 33 | # List all source files supplied by this component. 34 | 35 | C_LIB_SRCS += i2c_opencores.c 36 | 37 | ASM_LIB_SRCS += 38 | 39 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/ip/i2c_opencores/i2c_opencores.v: -------------------------------------------------------------------------------- 1 | // 2 | // fixed for 9.1 jan 21 2010 cruben 3 | // 4 | //`include "timescale.v" 5 | //`include "i2c_master_defines.v" 6 | 7 | module i2c_opencores 8 | ( 9 | wb_clk_i, wb_rst_i, wb_adr_i, wb_dat_i, wb_dat_o, 10 | wb_we_i, wb_stb_i, /*wb_cyc_i,*/ wb_ack_o, wb_inta_o, 11 | scl_pad_io, sda_pad_io 12 | ); 13 | 14 | 15 | // Common bus signals 16 | input wb_clk_i; // WISHBONE clock 17 | input wb_rst_i; // WISHBONE reset 18 | 19 | // Slave signals 20 | input [2:0] wb_adr_i; // WISHBONE address input 21 | input [7:0] wb_dat_i; // WISHBONE data input 22 | output [7:0] wb_dat_o; // WISHBONE data output 23 | input wb_we_i; // WISHBONE write enable input 24 | input wb_stb_i; // WISHBONE strobe input 25 | //input wb_cyc_i; // WISHBONE cycle input 26 | output wb_ack_o; // WISHBONE acknowledge output 27 | output wb_inta_o; // WISHBONE interrupt output 28 | 29 | // I2C signals 30 | inout scl_pad_io; // I2C clock io 31 | inout sda_pad_io; // I2C data io 32 | 33 | wire wb_cyc_i; // WISHBONE cycle input 34 | // Wire tri-state scl/sda 35 | wire scl_pad_i; 36 | wire scl_pad_o; 37 | wire scl_pad_io; 38 | wire scl_padoen_o; 39 | 40 | assign wb_cyc_i = wb_stb_i; 41 | assign scl_pad_i = scl_pad_io; 42 | assign scl_pad_io = scl_padoen_o ? 1'bZ : scl_pad_o; 43 | 44 | wire sda_pad_i; 45 | wire sda_pad_o; 46 | wire sda_pad_io; 47 | wire sda_padoen_o; 48 | 49 | assign sda_pad_i = sda_pad_io; 50 | assign sda_pad_io = sda_padoen_o ? 1'bZ : sda_pad_o; 51 | 52 | // Avalon doesn't have an asynchronous reset 53 | // set it to be inactive and just use synchronous reset 54 | // reset level is a parameter, 0 is the default (active-low reset) 55 | wire arst_i; 56 | 57 | assign arst_i = 1'b1; 58 | 59 | // Connect the top level I2C core 60 | i2c_master_top i2c_master_top_inst 61 | ( 62 | .wb_clk_i(wb_clk_i), .wb_rst_i(wb_rst_i), .arst_i(arst_i), 63 | 64 | .wb_adr_i(wb_adr_i), .wb_dat_i(wb_dat_i), .wb_dat_o(wb_dat_o), 65 | .wb_we_i(wb_we_i), .wb_stb_i(wb_stb_i), .wb_cyc_i(wb_cyc_i), 66 | .wb_ack_o(wb_ack_o), .wb_inta_o(wb_inta_o), 67 | 68 | .scl_pad_i(scl_pad_i), .scl_pad_o(scl_pad_o), .scl_padoen_o(scl_padoen_o), 69 | .sda_pad_i(sda_pad_i), .sda_pad_o(sda_pad_o), .sda_padoen_o(sda_padoen_o) 70 | ); 71 | 72 | endmodule 73 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/ip/i2c_opencores/i2c_opencores_sw.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # opencores_i2c_sw.tcl 3 | # 4 | 5 | # Create a new driver 6 | create_driver opencores_i2c_driver 7 | 8 | # Associate it with some hardware known as "opencores_i2c" 9 | set_sw_property hw_class_name opencores_i2c 10 | 11 | # The version of this driver 12 | set_sw_property version 11.0 13 | 14 | # This driver may be incompatible with versions of hardware less 15 | # than specified below. Updates to hardware and device drivers 16 | # rendering the driver incompatible with older versions of 17 | # hardware are noted with this property assignment. 18 | # 19 | # Multiple-Version compatibility was introduced in version 7.1; 20 | # prior versions are therefore excluded. 21 | set_sw_property min_compatible_hw_version 7.1 22 | 23 | # Initialize the driver in alt_sys_init() 24 | set_sw_property auto_initialize true 25 | 26 | # Location in generated BSP that above sources will be copied into 27 | set_sw_property bsp_subdirectory drivers 28 | 29 | 30 | # Interrupt properties: 31 | # This peripheral has an IRQ output but the driver doesn't currently 32 | # have any interrupt service routine. To ensure that the BSP tools 33 | # do not otherwise limit the BSP functionality for users of the 34 | # Nios II enhanced interrupt port, these settings advertise 35 | # compliance with both legacy and enhanced interrupt APIs, and to state 36 | # that any driver ISR supports preemption. If an interrupt handler 37 | # is added to this driver, these must be re-examined for validity. 38 | set_sw_property isr_preemption_supported true 39 | set_sw_property supported_interrupt_apis "legacy_interrupt_api enhanced_interrupt_api" 40 | 41 | # 42 | # Source file listings... 43 | # 44 | 45 | # C/C++ source files 46 | add_sw_property c_source HAL/src/opencores_i2c.c 47 | 48 | # Include files 49 | add_sw_property include_source HAL/inc/opencores_i2c.h 50 | add_sw_property include_source inc/opencores_i2c_regs.h 51 | 52 | # This driver supports HAL & UCOSII BSP (OS) types 53 | add_sw_property supported_bsp_type HAL 54 | add_sw_property supported_bsp_type UCOSII 55 | 56 | # End of file 57 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/ip/i2c_opencores/timescale.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 10ps 2 | 3 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/ip/lcd_pll/lcd_pll/lcd_pll_0002.qip: -------------------------------------------------------------------------------- 1 | set_instance_assignment -name PLL_COMPENSATION_MODE DIRECT -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 2 | 3 | set_instance_assignment -name PLL_AUTO_RESET OFF -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 4 | set_instance_assignment -name PLL_BANDWIDTH_PRESET AUTO -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 5 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/ip/lcd_pll/lcd_pll/lcd_pll_0002.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns/10ps 2 | module lcd_pll_0002( 3 | 4 | // interface 'refclk' 5 | input wire refclk, 6 | 7 | // interface 'reset' 8 | input wire rst, 9 | 10 | // interface 'outclk0' 11 | output wire outclk_0, 12 | 13 | // interface 'outclk1' 14 | output wire outclk_1, 15 | 16 | // interface 'locked' 17 | output wire locked 18 | ); 19 | 20 | altera_pll #( 21 | .fractional_vco_multiplier("false"), 22 | .reference_clock_frequency("50.0 MHz"), 23 | .operation_mode("direct"), 24 | .number_of_clocks(2), 25 | .output_clock_frequency0("30.000000 MHz"), 26 | .phase_shift0("0 ps"), 27 | .duty_cycle0(50), 28 | .output_clock_frequency1("30.000000 MHz"), 29 | .phase_shift1("25000 ps"), 30 | .duty_cycle1(50), 31 | .output_clock_frequency2("0 MHz"), 32 | .phase_shift2("0 ps"), 33 | .duty_cycle2(50), 34 | .output_clock_frequency3("0 MHz"), 35 | .phase_shift3("0 ps"), 36 | .duty_cycle3(50), 37 | .output_clock_frequency4("0 MHz"), 38 | .phase_shift4("0 ps"), 39 | .duty_cycle4(50), 40 | .output_clock_frequency5("0 MHz"), 41 | .phase_shift5("0 ps"), 42 | .duty_cycle5(50), 43 | .output_clock_frequency6("0 MHz"), 44 | .phase_shift6("0 ps"), 45 | .duty_cycle6(50), 46 | .output_clock_frequency7("0 MHz"), 47 | .phase_shift7("0 ps"), 48 | .duty_cycle7(50), 49 | .output_clock_frequency8("0 MHz"), 50 | .phase_shift8("0 ps"), 51 | .duty_cycle8(50), 52 | .output_clock_frequency9("0 MHz"), 53 | .phase_shift9("0 ps"), 54 | .duty_cycle9(50), 55 | .output_clock_frequency10("0 MHz"), 56 | .phase_shift10("0 ps"), 57 | .duty_cycle10(50), 58 | .output_clock_frequency11("0 MHz"), 59 | .phase_shift11("0 ps"), 60 | .duty_cycle11(50), 61 | .output_clock_frequency12("0 MHz"), 62 | .phase_shift12("0 ps"), 63 | .duty_cycle12(50), 64 | .output_clock_frequency13("0 MHz"), 65 | .phase_shift13("0 ps"), 66 | .duty_cycle13(50), 67 | .output_clock_frequency14("0 MHz"), 68 | .phase_shift14("0 ps"), 69 | .duty_cycle14(50), 70 | .output_clock_frequency15("0 MHz"), 71 | .phase_shift15("0 ps"), 72 | .duty_cycle15(50), 73 | .output_clock_frequency16("0 MHz"), 74 | .phase_shift16("0 ps"), 75 | .duty_cycle16(50), 76 | .output_clock_frequency17("0 MHz"), 77 | .phase_shift17("0 ps"), 78 | .duty_cycle17(50), 79 | .pll_type("General"), 80 | .pll_subtype("General") 81 | ) altera_pll_i ( 82 | .rst (rst), 83 | .outclk ({outclk_1, outclk_0}), 84 | .locked (locked), 85 | .fboutclk ( ), 86 | .fbclk (1'b0), 87 | .refclk (refclk) 88 | ); 89 | endmodule 90 | 91 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | nios2_mcu_bsp 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 25 | org.eclipse.cdt.core.ccnature 26 | com.altera.sbtgui.project.SBTGUINature 27 | com.altera.sbtgui.project.SBTGUIBspNature 28 | 29 | 30 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/.settings/language.settings.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/HAL/inc/priv/alt_busy_sleep.h: -------------------------------------------------------------------------------- 1 | #ifndef __ALT_BUSY_SLEEP_H 2 | #define __ALT_BUSY_SLEEP_H 3 | 4 | /* 5 | * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. 6 | * All rights reserved. 7 | * 8 | * Permission is hereby granted, free of charge, to any person obtaining a copy 9 | * of this software and associated documentation files (the "Software"), to 10 | * deal in the Software without restriction, including without limitation the 11 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 12 | * sell copies of the Software, and to permit persons to whom the Software is 13 | * furnished to do so, subject to the following conditions: 14 | * 15 | * The above copyright notice and this permission notice shall be included in 16 | * all copies or substantial portions of the Software. 17 | * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 21 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 24 | * DEALINGS IN THE SOFTWARE. 25 | */ 26 | 27 | /* 28 | * The function alt_busy_sleep provides a busy loop implementation of usleep. 29 | * This is used to provide usleep for the standalone HAL, or when the timer is 30 | * unavailable in uC/OS-II. 31 | */ 32 | 33 | extern unsigned int alt_busy_sleep (unsigned int us); 34 | 35 | #endif /* __ALT_BUSY_SLEEP_H */ 36 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/HAL/inc/priv/alt_exception_handler_registry.h: -------------------------------------------------------------------------------- 1 | #ifndef __ALT_EXCEPTION_HANDLER_REGISTRY_H__ 2 | #define __ALT_EXCEPTION_HANDLER_REGISTRY_H__ 3 | 4 | /****************************************************************************** 5 | * * 6 | * License Agreement * 7 | * * 8 | * Copyright (c) 2008 Altera Corporation, San Jose, California, USA. * 9 | * All rights reserved. * 10 | * * 11 | * Permission is hereby granted, free of charge, to any person obtaining a * 12 | * copy of this software and associated documentation files (the "Software"), * 13 | * to deal in the Software without restriction, including without limitation * 14 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 15 | * and/or sell copies of the Software, and to permit persons to whom the * 16 | * Software is furnished to do so, subject to the following conditions: * 17 | * * 18 | * The above copyright notice and this permission notice shall be included in * 19 | * all copies or substantial portions of the Software. * 20 | * * 21 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 22 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 23 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 24 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 25 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 26 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 27 | * DEALINGS IN THE SOFTWARE. * 28 | * * 29 | * This agreement shall be governed in all respects by the laws of the State * 30 | * of California and by the laws of the United States of America. * 31 | * * 32 | ******************************************************************************/ 33 | #include "sys/alt_exceptions.h" 34 | 35 | /* Function pointer to exception callback routine */ 36 | extern alt_exception_result (*alt_instruction_exception_handler) 37 | (alt_exception_cause, alt_u32, alt_u32); 38 | 39 | #endif /* __ALT_EXCEPTION_HANDLER_REGISTRY_H__ */ 40 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/HAL/inc/priv/alt_iic_isr_register.h: -------------------------------------------------------------------------------- 1 | #ifndef __ALT_IIC_ISR_REGISTER_H_ 2 | #define __ALT_IIC_ISR_REGISTER_H_ 3 | 4 | /****************************************************************************** 5 | * * 6 | * License Agreement * 7 | * * 8 | * Copyright (c) 2009 Altera Corporation, San Jose, California, USA. * 9 | * All rights reserved. * 10 | * * 11 | * Permission is hereby granted, free of charge, to any person obtaining a * 12 | * copy of this software and associated documentation files (the "Software"), * 13 | * to deal in the Software without restriction, including without limitation * 14 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 15 | * and/or sell copies of the Software, and to permit persons to whom the * 16 | * Software is furnished to do so, subject to the following conditions: * 17 | * * 18 | * The above copyright notice and this permission notice shall be included in * 19 | * all copies or substantial portions of the Software. * 20 | * * 21 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 22 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 23 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 24 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 25 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 26 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 27 | * DEALINGS IN THE SOFTWARE. * 28 | * * 29 | * This agreement shall be governed in all respects by the laws of the State * 30 | * of California and by the laws of the United States of America. * 31 | * * 32 | ******************************************************************************/ 33 | #include "alt_types.h" 34 | #include "sys/alt_irq.h" 35 | 36 | extern int alt_iic_isr_register(alt_u32 ic_id, alt_u32 irq, alt_isr_func isr, 37 | void *isr_context, void *flags); 38 | 39 | #endif /* __ALT_IIC_ISR_REGISTER_H_ */ 40 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/HAL/inc/sys/alt_irq_entry.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * * 3 | * License Agreement * 4 | * * 5 | * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * 6 | * All rights reserved. * 7 | * * 8 | * Permission is hereby granted, free of charge, to any person obtaining a * 9 | * copy of this software and associated documentation files (the "Software"), * 10 | * to deal in the Software without restriction, including without limitation * 11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 12 | * and/or sell copies of the Software, and to permit persons to whom the * 13 | * Software is furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included in * 16 | * all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 21 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 23 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 24 | * DEALINGS IN THE SOFTWARE. * 25 | * * 26 | * This agreement shall be governed in all respects by the laws of the State * 27 | * of California and by the laws of the United States of America. * 28 | * * 29 | ******************************************************************************/ 30 | 31 | /* 32 | * This file pulls in the IRQ entry assembler and C code, which is only 33 | * required if there are any interruptes in the system. 34 | */ 35 | 36 | __asm__( "\n\t.globl alt_irq_entry" ); 37 | 38 | __asm__( "\n\t.globl alt_irq_handler" ); 39 | 40 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/HAL/src/alt_icache_flush_all.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * * 3 | * License Agreement * 4 | * * 5 | * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * 6 | * All rights reserved. * 7 | * * 8 | * Permission is hereby granted, free of charge, to any person obtaining a * 9 | * copy of this software and associated documentation files (the "Software"), * 10 | * to deal in the Software without restriction, including without limitation * 11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 12 | * and/or sell copies of the Software, and to permit persons to whom the * 13 | * Software is furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included in * 16 | * all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 21 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 23 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 24 | * DEALINGS IN THE SOFTWARE. * 25 | * * 26 | * This agreement shall be governed in all respects by the laws of the State * 27 | * of California and by the laws of the United States of America. * 28 | * * 29 | ******************************************************************************/ 30 | 31 | #include "nios2.h" 32 | #include "system.h" 33 | 34 | #include "alt_types.h" 35 | #include "sys/alt_cache.h" 36 | 37 | /* 38 | * alt_icache_flush_all() is called to flush the entire instruction cache. 39 | */ 40 | 41 | void alt_icache_flush_all (void) 42 | { 43 | #if NIOS2_ICACHE_SIZE > 0 44 | alt_icache_flush (0, NIOS2_ICACHE_SIZE); 45 | #endif 46 | } 47 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/HAL/src/alt_irq_vars.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * * 3 | * License Agreement * 4 | * * 5 | * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * 6 | * All rights reserved. * 7 | * * 8 | * Permission is hereby granted, free of charge, to any person obtaining a * 9 | * copy of this software and associated documentation files (the "Software"), * 10 | * to deal in the Software without restriction, including without limitation * 11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 12 | * and/or sell copies of the Software, and to permit persons to whom the * 13 | * Software is furnished to do so, subject to the following conditions: * 14 | * * 15 | * The above copyright notice and this permission notice shall be included in * 16 | * all copies or substantial portions of the Software. * 17 | * * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 21 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 23 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 24 | * DEALINGS IN THE SOFTWARE. * 25 | * * 26 | * This agreement shall be governed in all respects by the laws of the State * 27 | * of California and by the laws of the United States of America. * 28 | * * 29 | ******************************************************************************/ 30 | 31 | #include "alt_types.h" 32 | 33 | #include "system.h" 34 | 35 | /* 36 | * These global variables are used to save the current list of enabled 37 | * interrupts. See alt_irq.h for further details. 38 | */ 39 | 40 | volatile alt_u32 alt_irq_active = 0; 41 | 42 | #ifndef ALT_EXCEPTION_STACK 43 | 44 | volatile alt_u32 alt_priority_mask = (alt_u32) -1; 45 | 46 | #endif 47 | 48 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/HAL/src/alt_log_macro.S: -------------------------------------------------------------------------------- 1 | /* alt_log_macro.S 2 | * 3 | * Implements the function tx_log_str, called by the assembly macro 4 | * ALT_LOG_PUTS(). The macro will be empty when logging is turned off, 5 | * and this function will not be compiled. When logging is on, 6 | * this function is used to print out the strings defined in the beginning 7 | * of alt_log_printf.c, using port information taken from system.h and 8 | * alt_log_printf.h. 9 | * 10 | * This routine only handles strings, and sends a character into the defined 11 | * output device's output buffer when the device is ready. It's intended for 12 | * debugging purposes, where messages can be set to print out at certain 13 | * points in the boot code to indicate the progress of the program. 14 | * 15 | */ 16 | 17 | #ifndef __ALT_LOG_MACROS__ 18 | #define __ALT_LOG_MACROS__ 19 | 20 | /* define this flag to skip assembly-incompatible parts 21 | * of various include files. */ 22 | #define ALT_ASM_SRC 23 | 24 | #ifdef ALT_LOG_ENABLE // only compile this function if this flag is defined. 25 | 26 | #include "system.h" 27 | #include "sys/alt_log_printf.h" 28 | 29 | .global tx_log_str 30 | tx_log_str: 31 | /* load base uart / jtag uart address into r6 */ 32 | movhi r6, %hiadj(ALT_LOG_PORT_BASE) 33 | addi r6, r6, %lo(ALT_LOG_PORT_BASE) 34 | tx_next_char: 35 | /* if pointer points to null, return 36 | * r4 is the pointer to the str to be printed, set by ALT_LOG_PUTS */ 37 | ldb r7, (r4) 38 | beq r0, r7, end_tx 39 | 40 | /* check device transmit ready */ 41 | wait_tx_ready_loop: 42 | ldwio r8, ALT_LOG_PRINT_REG_OFFSET(r6) 43 | /*UART, ALT_LOG_PRINT_MSK == 0x40 44 | JTAG UART, ALT_LOG_PRINT_MSK == 0xFFFF0000 */ 45 | andhi r5, r8, %hi(ALT_LOG_PRINT_MSK) 46 | andi r8, r8, %lo(ALT_LOG_PRINT_MSK) 47 | or r5, r5, r8 48 | beq r5, r0, wait_tx_ready_loop 49 | /* write char */ 50 | stwio r7, ALT_LOG_PRINT_TXDATA_REG_OFFSET (r6) 51 | /* advance string pointer */ 52 | addi r4, r4, 1 53 | br tx_next_char 54 | end_tx: 55 | ret 56 | 57 | #endif 58 | 59 | #endif /* __ALT_LOG_MACROS__ */ 60 | 61 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/HAL/src/alt_usleep.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. 3 | * All rights reserved. 4 | * 5 | * Permission is hereby granted, free of charge, to any person obtaining a copy 6 | * of this software and associated documentation files (the "Software"), to 7 | * deal in the Software without restriction, including without limitation the 8 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 9 | * sell copies of the Software, and to permit persons to whom the Software is 10 | * furnished to do so, subject to the following conditions: 11 | * 12 | * The above copyright notice and this permission notice shall be included in 13 | * all copies or substantial portions of the Software. 14 | * 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 | * DEALINGS IN THE SOFTWARE. 22 | * 23 | * ------------ 24 | * 25 | * Altera does not recommend, suggest or require that this reference design 26 | * file be used in conjunction or combination with any other product. 27 | * 28 | * usleep.c - Microsecond delay routine 29 | */ 30 | 31 | #include 32 | 33 | #include "priv/alt_busy_sleep.h" 34 | #include "os/alt_syscall.h" 35 | 36 | /* 37 | * This function simply calls alt_busy_sleep() to perform the delay. This 38 | * function implements the delay as a calibrated "busy loop". 39 | * 40 | * ALT_USLEEP is mapped onto the usleep() system call in alt_syscall.h 41 | */ 42 | 43 | 44 | 45 | #if defined (__GNUC__) && __GNUC__ >= 4 46 | int ALT_USLEEP (useconds_t us) 47 | #else 48 | unsigned int ALT_USLEEP (unsigned int us) 49 | #endif 50 | { 51 | return alt_busy_sleep(us); 52 | } 53 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/HAL/src/altera_nios2_gen2_irq.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2009 Altera Corporation, San Jose, California, USA. 3 | * All rights reserved. 4 | * 5 | * Permission is hereby granted, free of charge, to any person obtaining a copy 6 | * of this software and associated documentation files (the "Software"), to 7 | * deal in the Software without restriction, including without limitation the 8 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 9 | * sell copies of the Software, and to permit persons to whom the Software is 10 | * furnished to do so, subject to the following conditions: 11 | * 12 | * The above copyright notice and this permission notice shall be included in 13 | * all copies or substantial portions of the Software. 14 | * 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 | * DEALINGS IN THE SOFTWARE. 22 | * 23 | * altera_nios2_gen2_irq.c - Support for Nios II internal interrupt controller. 24 | * 25 | */ 26 | 27 | #include "sys/alt_irq.h" 28 | #include "altera_nios2_gen2_irq.h" 29 | 30 | /* 31 | * To initialize the internal interrupt controller, just clear the IENABLE 32 | * register so that all possible IRQs are disabled. 33 | */ 34 | void altera_nios2_gen2_irq_init(void) 35 | { 36 | NIOS2_WRITE_IENABLE(0); 37 | } 38 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/create-this-bsp: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # 3 | # This script creates the ucosii_net_zipfs Board Support Package (BSP). 4 | 5 | BSP_TYPE=hal 6 | BSP_DIR=. 7 | SOPC_DIR=../../ 8 | SOPC_FILE=../../MIL_PAINTER.sopcinfo 9 | NIOS2_BSP_ARGS="" 10 | CPU_NAME= 11 | 12 | if [ -n "$CPU_NAME" ]; then 13 | NIOS2_BSP_ARGS="$NIOS2_BSP_ARGS --cpu-name $CPU_NAME" 14 | fi 15 | 16 | # Don't run make if create-this-app script is called with --no-make arg 17 | SKIP_MAKE= 18 | while [ $# -gt 0 ] 19 | do 20 | case "$1" in 21 | --no-make) 22 | SKIP_MAKE=1 23 | ;; 24 | *) 25 | NIOS2_BSP_ARGS="$NIOS2_BSP_ARGS $1" 26 | ;; 27 | esac 28 | shift 29 | done 30 | 31 | 32 | # Run nios2-bsp utility to create a hal BSP in this directory 33 | # for the system with a .sopc file in $SOPC_FILE. 34 | # Deprecating $SOPC_DIR in 10.1. Multiple .sopcinfo files in a directory may exist. 35 | 36 | if [ -z "$SOPC_FILE" ]; then 37 | echo "WARNING: Use of a directory for locating a .sopcinfo file is deprecated in 10.1. Multiple .sopcinfo files may exist. You must specify the full .sopcinfo path." 38 | cmd="nios2-bsp $BSP_TYPE $BSP_DIR $SOPC_DIR $NIOS2_BSP_ARGS" 39 | else 40 | cmd="nios2-bsp $BSP_TYPE $BSP_DIR $SOPC_FILE $NIOS2_BSP_ARGS" 41 | fi 42 | 43 | 44 | echo "create-this-bsp: Running \"$cmd\"" 45 | $cmd || { 46 | echo "$cmd failed" 47 | exit 1 48 | } 49 | if [ -z "$SKIP_MAKE" ]; then 50 | echo "create-this-bsp: Running make" 51 | make 52 | fi 53 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/drivers/inc/epcs_commands.h: -------------------------------------------------------------------------------- 1 | #include "alt_types.h" 2 | 3 | #define epcs_read 0x03 4 | #define epcs_pp 0x02 5 | #define epcs_wren 0x06 6 | #define epcs_wrdi 0x04 7 | #define epcs_rdsr 0x05 8 | #define epcs_wrsr 0x01 9 | #define epcs_se 0xD8 10 | #define epcs_be 0xC7 11 | #define epcs_dp 0xB9 12 | #define epcs_res 0xAB 13 | #define epcs_rdid 0x9F 14 | #define epcs_en4b 0xB7 /* Enter 4-byte mode */ 15 | #define epcs_dis4b 0xE9 /* Exit 4-byte mode */ 16 | 17 | /* Private API */ 18 | alt_u32 epcs_read_device_id(alt_u32 base); 19 | alt_u8 epcs_read_electronic_signature(alt_u32 base); 20 | alt_u8 epcs_read_status_register(alt_u32 base); 21 | void epcs_sector_erase(alt_u32 base, alt_u32 offset, alt_u32 four_bytes_mode); 22 | alt_32 epcs_read_buffer(alt_u32 base, int offset, alt_u8 *dest_addr, int length, 23 | alt_u32 four_bytes_mode); 24 | void epcs_write_enable(alt_u32 base); 25 | void epcs_write_status_register(alt_u32 base, alt_u8 value); 26 | alt_32 epcs_write_buffer(alt_u32 base, int offset, const alt_u8* src_addr, 27 | int length, alt_u32 four_bytes_mode); 28 | void epcs_enter_4_bytes_mode(alt_u32 base); 29 | void epcs_exit_4_bytes_mode(alt_u32 base); 30 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/nios2_mcu_bsp/memory.gdb: -------------------------------------------------------------------------------- 1 | # memory.gdb - GDB memory region definitions 2 | # 3 | # Machine generated for CPU 'cpu' in SOPC Builder design 'MIL_PAINTER' 4 | # SOPC Builder design path: ../../MIL_PAINTER.sopcinfo 5 | # 6 | # Generated: Sun Oct 11 22:41:57 CST 2020 7 | 8 | # DO NOT MODIFY THIS FILE 9 | # 10 | # Changing this file will have subtle consequences 11 | # which will almost certainly lead to a nonfunctioning 12 | # system. If you do modify this file, be aware that your 13 | # changes will be overwritten and lost when this file 14 | # is generated again. 15 | # 16 | # DO NOT MODIFY THIS FILE 17 | 18 | # License Agreement 19 | # 20 | # Copyright (c) 2008 21 | # Altera Corporation, San Jose, California, USA. 22 | # All rights reserved. 23 | # 24 | # Permission is hereby granted, free of charge, to any person obtaining a 25 | # copy of this software and associated documentation files (the "Software"), 26 | # to deal in the Software without restriction, including without limitation 27 | # the rights to use, copy, modify, merge, publish, distribute, sublicense, 28 | # and/or sell copies of the Software, and to permit persons to whom the 29 | # Software is furnished to do so, subject to the following conditions: 30 | # 31 | # The above copyright notice and this permission notice shall be included in 32 | # all copies or substantial portions of the Software. 33 | # 34 | # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 35 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 36 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 37 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 38 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 | # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 40 | # DEALINGS IN THE SOFTWARE. 41 | # 42 | # This agreement shall be governed in all respects by the laws of the State 43 | # of California and by the laws of the United States of America. 44 | 45 | # Define memory regions for each memory connected to the CPU. 46 | # The cache attribute is specified which improves GDB performance 47 | # by allowing GDB to cache memory contents on the host. 48 | 49 | # mister_sdram32m 50 | memory 0x2000000 0x4000000 cache 51 | 52 | # epcs_flash_controller_0 53 | memory 0x5001000 0x5001800 cache 54 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/.force_relink: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/.force_relink -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | tftlcd_ili9806g 4 | 5 | 6 | 7 | 8 | 9 | com.altera.sbtgui.project.makefileBuilder 10 | 11 | 12 | 13 | 14 | com.altera.sbtgui.project.makefileBuilder 15 | 16 | 17 | 18 | 19 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 20 | clean,full,incremental, 21 | 22 | 23 | 24 | 25 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 26 | full,incremental, 27 | 28 | 29 | 30 | 31 | 32 | org.eclipse.cdt.core.cnature 33 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 34 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 35 | org.eclipse.cdt.core.ccnature 36 | com.altera.sbtgui.project.SBTGUINature 37 | com.altera.sbtgui.project.SBTGUIAppNature 38 | com.altera.sbtgui.project.SBTGUIManagedNature 39 | 40 | 41 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/.settings/language.settings.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/fonts/fonts.h: -------------------------------------------------------------------------------- 1 | #ifndef FONTS_H_ 2 | #define FONTS_H_ 3 | 4 | 5 | struct abc_font_struct { 6 | unsigned long extents_width; 7 | unsigned long extents_height; 8 | unsigned long extents_ascent; 9 | unsigned long extents_descent; 10 | unsigned long bounds_width; 11 | unsigned long bounds_height; 12 | unsigned char *char_alpha_map; 13 | unsigned long reserved; 14 | }; 15 | 16 | /* 17 | extern struct abc_font_struct arial_10[]; 18 | extern struct abc_font_struct arial_12[]; 19 | extern struct abc_font_struct arial_14[]; 20 | extern struct abc_font_struct arial_16[]; 21 | extern struct abc_font_struct arial_18[]; 22 | extern struct abc_font_struct arial_20[]; 23 | extern struct abc_font_struct arial_22[]; 24 | extern struct abc_font_struct arial_24[]; 25 | extern struct abc_font_struct courier_10[]; 26 | extern struct abc_font_struct courier_12[]; 27 | extern struct abc_font_struct courier_14[]; 28 | extern struct abc_font_struct courier_16[]; 29 | extern struct abc_font_struct courier_18[]; 30 | extern struct abc_font_struct courier_20[]; 31 | extern struct abc_font_struct courier_22[]; 32 | extern struct abc_font_struct courier_24[]; 33 | extern struct abc_font_struct timesnewroman_10[]; 34 | extern struct abc_font_struct timesnewroman_12[]; 35 | extern struct abc_font_struct timesnewroman_14[]; 36 | extern struct abc_font_struct timesnewroman_16[]; 37 | extern struct abc_font_struct timesnewroman_18[]; 38 | extern struct abc_font_struct timesnewroman_20[]; 39 | extern struct abc_font_struct timesnewroman_22[]; 40 | extern struct abc_font_struct timesnewroman_24[];*/ 41 | 42 | extern struct abc_font_struct tahomabold_32[]; 43 | extern struct abc_font_struct tahomabold_20[]; 44 | 45 | #endif /*FONTS_H_*/ 46 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/geometry.c: -------------------------------------------------------------------------------- 1 | #include "terasic_includes.h" 2 | #include "geometry.h" 3 | 4 | //#define BOUND(x, mini, maxi) ((x<(mini)?(mini):( (x>(maxi))?(maxi):(x) ))) 5 | 6 | //#define COPY_POINT(pt_des, pt_src) memcpy(&pt_des, &pt_src,sizeof(POINT)) 7 | 8 | bool IsPtInRect(POINT *pt, RECT *rc){ 9 | bool bYes = FALSE; 10 | 11 | if (pt->x >= rc->left && pt->x <= rc->right && pt->y >= rc->top && pt->y <= rc->bottom) 12 | bYes = TRUE; 13 | 14 | return bYes; 15 | } 16 | 17 | void PtSet(POINT *pt, int x, int y){ 18 | pt->x = x; 19 | pt->y = y; 20 | } 21 | 22 | void RectSet(RECT *rc, int left, int right, int top, int bottom){ 23 | rc->left = left; 24 | rc->right = right; 25 | rc->top = top; 26 | rc->bottom = bottom; 27 | } 28 | 29 | void RectInflate(RECT *rc, int x, int y){ 30 | rc->left -= x; 31 | rc->right += x; 32 | rc->top -= y; 33 | rc->bottom += y; 34 | } 35 | 36 | void RectOffset(RECT *rc, int x, int y){ 37 | rc->left += x; 38 | rc->right += x; 39 | rc->top += y; 40 | rc->bottom += y; 41 | } 42 | 43 | void RectCopy(RECT *rcDes, RECT *rcSrc){ 44 | rcDes->left = rcSrc->left; 45 | rcDes->right = rcSrc->right; 46 | rcDes->top = rcSrc->top; 47 | rcDes->bottom = rcSrc->bottom; 48 | } 49 | 50 | int RectWidth(RECT *rc){ 51 | return (rc->right-rc->left); 52 | } 53 | 54 | int RectHeight(RECT *rc){ 55 | return (rc->bottom-rc->top); 56 | } 57 | 58 | int PtDistance(POINT *pt1, POINT *pt2){ 59 | int nDistance; 60 | int a, b; 61 | a = pt1->x - pt2->x; 62 | b = pt1->y - pt2->y; 63 | nDistance = a*a + b*b; 64 | nDistance = sqrt(nDistance); 65 | 66 | return nDistance; 67 | } 68 | 69 | void PtCopy(POINT *ptDes, POINT *ptSrc){ 70 | ptDes->x = ptSrc->x; 71 | ptDes->y = ptSrc->y; 72 | } 73 | 74 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/geometry.h: -------------------------------------------------------------------------------- 1 | #ifndef GEOMETRY_H_ 2 | #define GEOMETRY_H_ 3 | 4 | typedef struct{ 5 | int left; 6 | int right; 7 | int top; 8 | int bottom; 9 | }RECT; 10 | 11 | typedef struct{ 12 | int x; 13 | int y; 14 | }POINT; 15 | 16 | bool IsPtInRect(POINT *pt, RECT *rc); 17 | void PtSet(POINT *pt, int x, int y); 18 | void RectSet(RECT *rc, int left, int right, int top, int bottom); 19 | void RectInflate(RECT *rc, int x, int y); 20 | void RectOffset(RECT *rc, int x, int y); 21 | void RectCopy(RECT *rcDes, RECT *rcSrc); 22 | int RectWidth(RECT *rc); 23 | int RectHeight(RECT *rc); 24 | int PtDistance(POINT *pt1, POINT *pt2); 25 | void PtCopy(POINT *ptDes, POINT *ptSrc); 26 | 27 | 28 | #endif /*GEOMETRY_H_*/ 29 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/gesture.h: -------------------------------------------------------------------------------- 1 | #ifndef GESTURE_H_ 2 | #define GESTURE_H_ 3 | 4 | struct bmp_struct{ 5 | unsigned int width; 6 | unsigned int height; 7 | unsigned int bytes_per_pixel; /* 3:RGB, 4:RGBA */ 8 | unsigned char pixel_data[60 * 1560 * 3 + 1]; 9 | }; 10 | 11 | #endif /*GESTURE_H_*/ 12 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/graphic_lib/simple_text.h: -------------------------------------------------------------------------------- 1 | #ifndef VIP_TEXT_H_ 2 | #define VIP_TEXT_H_ 3 | 4 | #include "../vip_fr.h" 5 | #include "fonts.h" 6 | 7 | 8 | int vid_print_string_alpha(int horiz_offset, int vert_offset, int color, int background_color, struct abc_font_struct font[], alt_video_display * display, char string[]); 9 | int vid_print_char_alpha (int horiz_offset, int vert_offset, int color, char character, int background_color, struct abc_font_struct font[], alt_video_display * display); 10 | 11 | #endif /*VIP_TEXT_H_*/ 12 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/gui.h: -------------------------------------------------------------------------------- 1 | #ifndef GUI_H_ 2 | #define GUI_H_ 3 | 4 | #include "multi_touch2.h" 5 | 6 | void GUI(MTC2_INFO *pTouch); 7 | 8 | #endif /*GUI_H_*/ 9 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/lcd.h: -------------------------------------------------------------------------------- 1 | #ifndef __LCD_H 2 | #define __LCD_H 3 | typedef unsigned char u8; 4 | typedef unsigned short u16; 5 | typedef unsigned int u32; 6 | 7 | //Lcd初始化及其低级控制函数 8 | void Lcd_Initialize(void); 9 | void Lcd_WR_Start(void); 10 | //Lcd高级控制函数 11 | void Lcd_ColorBox(u16 x,u16 y,u16 xLong,u16 yLong,u16 Color); 12 | void DrawPixel(u16 x, u16 y, u16 Color); 13 | u16 ReadPixel(u16 x,u8 y); 14 | void LCD_Fill_Pic(u16 x, u16 y,u16 pic_H, u16 pic_V, const unsigned char* pic); 15 | void BlockWrite(unsigned int Xstart,unsigned int Xend,unsigned int Ystart,unsigned int Yend); 16 | 17 | 18 | void delay_ms (u32 tm); 19 | 20 | /*定义常见颜色*/ 21 | // #define red 0x001f 22 | // #define blue 0xf800 23 | // #define green 0x07e0 24 | // #define black 0x0000 25 | // #define white 0xffff 26 | // #define yellow 0x07ff 27 | // #define orange 0x05bf 28 | // #define Chocolate4 0x4451 29 | // #define Grey 0xefbd//灰色 30 | 31 | #define White 0xFFFF 32 | #define Black 0x0000 33 | #define Blue 0x001F 34 | #define Blue2 0x051F 35 | #define Red 0xF800 36 | #define Magenta 0xF81F 37 | #define Green 0x07E0 38 | #define Cyan 0x7FFF 39 | #define Yellow 0xFFE0 40 | 41 | 42 | #endif 43 | 44 | 45 | 46 | 47 | 48 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/main.c: -------------------------------------------------------------------------------- 1 | // -------------------------------------------------------------------- 2 | // Copyright (c) 2011 by Terasic Technologies Inc. 3 | // -------------------------------------------------------------------- 4 | // 5 | // Permission: 6 | // 7 | // Terasic grants permission to use and modify this code for use 8 | // in synthesis for all Terasic Development Boards and Altera Development 9 | // Kits made by Terasic. Other use of this code, including the selling 10 | // ,duplication, or modification of any portion is strictly prohibited. 11 | // 12 | // Disclaimer: 13 | // 14 | // This VHDL/Verilog or C/C++ source code is intended as a design reference 15 | // which illustrates how these types of functions can be implemented. 16 | // It is the user's responsibility to verify their design for 17 | // consistency and functionality through the use of formal 18 | // verification methods. Terasic provides no warranty regarding the use 19 | // or functionality of this code. 20 | // 21 | // -------------------------------------------------------------------- 22 | // 23 | // Terasic Technologies Inc 24 | // 356 Fu-Shin E. Rd Sec. 1. JhuBei City, 25 | // HsinChu County, Taiwan 26 | // 302 27 | // 28 | // web: http://www.terasic.com/ 29 | // email: support@terasic.com 30 | // 31 | // -------------------------------------------------------------------- 32 | 33 | 34 | #include "terasic_includes.h" 35 | //#include "i2c.h" 36 | #include "lcd.h" 37 | #include "I2C_core.h" 38 | #include "multi_touch2.h" 39 | #include "gui.h" 40 | #include "system.h" 41 | 42 | 43 | int main() 44 | { 45 | Lcd_Initialize(); 46 | // touch 47 | MTC2_INFO *pTouch; 48 | const bool bVPG = ((IORD(KEY_BASE, 0x00) & 0x01) == 0x00)?TRUE:FALSE; 49 | IOWR(LED_BASE, 0x00, 0xFF); // high-active 50 | // if (LCD_Open()){ 51 | // LCD_TextOut(bVPG?"Multi-Touch\nPattern\n" : "Multi-Touch\nPainter\n"); 52 | // } 53 | printf("Terasic Painter Demo\r\n"); 54 | 55 | oc_i2c_init(I2C_OPENCORES_0_BASE); 56 | 57 | usleep(1000); 58 | 59 | pTouch=MTC2_Init(I2C_OPENCORES_0_BASE,LCD_TOUCH_INT_BASE,LCD_TOUCH_INT_IRQ); 60 | if (!pTouch){ 61 | printf("Failed to init multi-touch\r\n"); 62 | }else{ 63 | printf("Init touch successfully\r\n"); 64 | 65 | } 66 | if (bVPG) 67 | GUI_VPG(pTouch); // enter vpg mode when users press KEY0 68 | GUI(pTouch); 69 | return 0; 70 | } 71 | 72 | 73 | 74 | 75 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/readme.txt: -------------------------------------------------------------------------------- 1 | Readme - Hello World Software Example 2 | 3 | DESCRIPTION: 4 | Simple program that prints "Hello from Nios II" 5 | 6 | The memory footprint of this hosted application is intended to be small (under 100 kbytes) by default 7 | using a standard reference deisgn. 8 | 9 | For an even smaller, reduced footprint version of this template, and an explanation of how 10 | to reduce the memory footprint for a given application, see the 11 | "small_hello_world" template. 12 | 13 | 14 | PERIPHERALS USED: 15 | This example exercises the following peripherals: 16 | - STDOUT device (UART or JTAG UART) 17 | 18 | SOFTWARE SOURCE FILES: 19 | This example includes the following software source files: 20 | - hello_world.c: Everyone needs a Hello World program, right? 21 | 22 | BOARD/HOST REQUIREMENTS: 23 | This example requires only a JTAG connection with a Nios Development board. If 24 | the host communication settings are changed from JTAG UART (default) to use a 25 | conventional UART, a serial cable between board DB-9 connector and the host is 26 | required. 27 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/terasic_includes.h: -------------------------------------------------------------------------------- 1 | // -------------------------------------------------------------------- 2 | // Copyright (c) 2010 by Terasic Technologies Inc. 3 | // -------------------------------------------------------------------- 4 | // 5 | // Permission: 6 | // 7 | // Terasic grants permission to use and modify this code for use 8 | // in synthesis for all Terasic Development Boards and Altera Development 9 | // Kits made by Terasic. Other use of this code, including the selling 10 | // ,duplication, or modification of any portion is strictly prohibited. 11 | // 12 | // Disclaimer: 13 | // 14 | // This VHDL/Verilog or C/C++ source code is intended as a design reference 15 | // which illustrates how these types of functions can be implemented. 16 | // It is the user's responsibility to verify their design for 17 | // consistency and functionality through the use of formal 18 | // verification methods. Terasic provides no warranty regarding the use 19 | // or functionality of this code. 20 | // 21 | // -------------------------------------------------------------------- 22 | // 23 | // Terasic Technologies Inc 24 | // 356 Fu-Shin E. Rd Sec. 1. JhuBei City, 25 | // HsinChu County, Taiwan 26 | // 302 27 | // 28 | // web: http://www.terasic.com/ 29 | // email: support@terasic.com 30 | // 31 | // -------------------------------------------------------------------- 32 | 33 | #ifndef TERASIC_INCLUDES_H_ 34 | #define TERASIC_INCLUDES_H_ 35 | 36 | #include 37 | #include // malloc, free 38 | #include 39 | #include 40 | #include // usleep (unix standard?) 41 | #include "sys/alt_flash.h" 42 | #include "sys/alt_flash_types.h" 43 | #include "io.h" 44 | #include "alt_types.h" // alt_u32 45 | #include "altera_avalon_pio_regs.h" //IOWR_ALTERA_AVALON_PIO_DATA 46 | #include "sys/alt_irq.h" // interrupt 47 | #include "sys/alt_alarm.h" // time tick function (alt_nticks(), alt_ticks_per_second()) 48 | #include "sys/alt_timestamp.h" 49 | #include "sys/alt_stdio.h" 50 | #include "system.h" 51 | #include 52 | 53 | 54 | #define DEBUG_DUMP /*printf */ 55 | 56 | 57 | typedef int bool; 58 | #define TRUE 1 59 | #define FALSE 0 60 | 61 | #endif /*TERASIC_INCLUDES_H_*/ 62 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/I2C_core.h: -------------------------------------------------------------------------------- 1 | /* 2 | * I2C_ocre.h 3 | * 4 | * Created on: 2014-6-3 5 | * Author: niubility 6 | */ 7 | 8 | #ifndef I2C_OCRE_H_ 9 | #define I2C_OCRE_H_ 10 | #include "alt_types.h" // alt_u32 11 | #include "terasic_includes.h" 12 | 13 | 14 | bool oc_i2c_init(alt_32 i2c_base); 15 | bool ACK_single_check(alt_32 i2c_base); 16 | bool ACK_check(alt_32 i2c_base); 17 | bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_u8 *pData, int nWriteLength); 18 | bool ACK_judge_for_read(alt_32 i2c_base); 19 | bool OC_I2C_Read(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_u8 *pData8, int nReadLength); 20 | bool OC_I2CL_Write(alt_32 i2c_base,alt_u8 device_address,int sub_address,alt_u8 *pData, int nWriteLength); 21 | bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address,int sub_address, alt_u8 *pData8); 22 | 23 | #endif /* I2C_OCRE_H_ */ 24 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/multi_touch2.h: -------------------------------------------------------------------------------- 1 | #ifndef MULTI_TOUCH2_H_ 2 | #define MULTI_TOUCH2_H_ 3 | 4 | #include "queue.h" 5 | 6 | #define TOUCH_QUEUE_SIZE 32 7 | 8 | //////////////////////////////////// 9 | // 10 | // 8-way ST Pan 11 | #define MTC_NO_GESTURE 0x00 12 | #define MTC_ST_UP 0x1c 13 | #define MTC_ST_LEFT 0x10 14 | #define MTC_ST_DOWN 0x14 15 | #define MTC_ST_RIGHT 0x18 16 | 17 | // MT Zoom 18 | #define MTC_ZOOM_IN 0x48 19 | #define MTC_ZOOM_OUT 0x49 20 | 21 | 22 | 23 | typedef struct{ 24 | alt_u32 TOUCH_I2C_BASE; 25 | alt_u32 TOUCH_INT_BASE; 26 | alt_u32 INT_IRQ_NUM; 27 | QUEUE_STRUCT *pQueue; 28 | }MTC2_INFO; 29 | 30 | 31 | typedef struct{ 32 | //getture not support this version 33 | alt_u8 Event; 34 | alt_u8 TouchNum; 35 | alt_u16 x1; 36 | alt_u16 y1; 37 | alt_u16 x2; 38 | alt_u16 y2; 39 | alt_u16 x3; 40 | alt_u16 y3; 41 | alt_u16 x4; 42 | alt_u16 y4; 43 | alt_u16 x5; 44 | alt_u16 y5; 45 | }MTC2_EVENT; 46 | 47 | 48 | MTC2_INFO* MTC2_Init(alt_u32 TOUCH_I2C_BASE,alt_u32 TOUCH_INT_BASE, alt_u32 INT_IRQ_NUM); 49 | void MTC2_UnInit(MTC2_INFO *p); 50 | //,int X3,int Y3,int X4,int Y4,int X5,int Y5 51 | bool MTC2_GetStatus(MTC2_INFO *p,alt_u8 *Event, alt_u8 *TouchNum, int *X1, int *Y1, int *X2, int *Y2,int *X3, int *Y3, int *X4, int *Y4,int *X5,int *Y5); 52 | //void MTC2_ShowEventText(alt_u8 Event); 53 | void MTC2_ClearEvent(MTC2_INFO *p); 54 | 55 | //void MTC_QueryEventText(alt_u8 Event, char szText[32]); 56 | 57 | 58 | 59 | #endif /*MULTI_TOUCH_H_*/ 60 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/queue.c: -------------------------------------------------------------------------------- 1 | #include "terasic_includes.h" 2 | #include "queue.h" 3 | 4 | 5 | 6 | 7 | QUEUE_STRUCT* QUEUE_New(int nQueueNum){ 8 | int nSize; 9 | QUEUE_STRUCT *pQueue; 10 | nSize = sizeof(QUEUE_STRUCT)+nQueueNum*sizeof(alt_u32); 11 | pQueue = (QUEUE_STRUCT *)malloc(nSize); 12 | memset((void *)pQueue, 0, nSize); 13 | pQueue->num = nQueueNum; 14 | return pQueue; 15 | } 16 | 17 | void QUEUE_Delete(QUEUE_STRUCT *pQueue){ 18 | free(pQueue); 19 | } 20 | 21 | bool QUEUE_IsEmpty(QUEUE_STRUCT *pQueue){ 22 | if (pQueue->front == pQueue->rear) 23 | return TRUE; 24 | return FALSE; 25 | } 26 | 27 | bool QUEUE_IsFull(QUEUE_STRUCT *pQueue){ 28 | if (((pQueue->front+1)%pQueue->num) == pQueue->rear) 29 | return TRUE; 30 | return FALSE; 31 | } 32 | 33 | bool QUEUE_Push(QUEUE_STRUCT *pQueue, alt_u32 data32){ 34 | if (QUEUE_IsFull(pQueue)) 35 | return FALSE; 36 | pQueue->data[pQueue->front] = data32; 37 | pQueue->front = (pQueue->front+1)%pQueue->num; 38 | return TRUE; 39 | } 40 | 41 | alt_u32 QUEUE_Pop(QUEUE_STRUCT *pQueue){ 42 | alt_u32 data32; 43 | if (QUEUE_IsEmpty(pQueue)) 44 | return 0; 45 | data32 = pQueue->data[pQueue->rear]; 46 | pQueue->rear = (pQueue->rear+1)%pQueue->num; 47 | return data32; 48 | } 49 | 50 | void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 51 | pQueue->front = 0; 52 | pQueue->rear = 0; 53 | } 54 | 55 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/queue.h: -------------------------------------------------------------------------------- 1 | #ifndef QUEUE_H_ 2 | #define QUEUE_H_ 3 | 4 | 5 | typedef struct{ 6 | alt_u32 num; 7 | alt_u32 front; 8 | alt_u32 rear; 9 | alt_u32 data[0]; 10 | alt_u32 mydata[2]; // custom data 11 | }QUEUE_STRUCT; 12 | 13 | QUEUE_STRUCT* QUEUE_New(int nQueueNum); 14 | void QUEUE_Delete(QUEUE_STRUCT *pQueue); 15 | bool QUEUE_IsEmpty(QUEUE_STRUCT *pQueue); 16 | bool QUEUE_IsFull(QUEUE_STRUCT *pQueue); 17 | bool QUEUE_Push(QUEUE_STRUCT *pQueue, alt_u32 data32); 18 | alt_u32 QUEUE_Pop(QUEUE_STRUCT *pQueue); 19 | void QUEUE_Empty(QUEUE_STRUCT *pQueue); 20 | 21 | #endif /*QUEUE_H_*/ 22 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/terasic_includes.h: -------------------------------------------------------------------------------- 1 | // -------------------------------------------------------------------- 2 | // Copyright (c) 2010 by Terasic Technologies Inc. 3 | // -------------------------------------------------------------------- 4 | // 5 | // Permission: 6 | // 7 | // Terasic grants permission to use and modify this code for use 8 | // in synthesis for all Terasic Development Boards and Altera Development 9 | // Kits made by Terasic. Other use of this code, including the selling 10 | // ,duplication, or modification of any portion is strictly prohibited. 11 | // 12 | // Disclaimer: 13 | // 14 | // This VHDL/Verilog or C/C++ source code is intended as a design reference 15 | // which illustrates how these types of functions can be implemented. 16 | // It is the user's responsibility to verify their design for 17 | // consistency and functionality through the use of formal 18 | // verification methods. Terasic provides no warranty regarding the use 19 | // or functionality of this code. 20 | // 21 | // -------------------------------------------------------------------- 22 | // 23 | // Terasic Technologies Inc 24 | // 356 Fu-Shin E. Rd Sec. 1. JhuBei City, 25 | // HsinChu County, Taiwan 26 | // 302 27 | // 28 | // web: http://www.terasic.com/ 29 | // email: support@terasic.com 30 | // 31 | // -------------------------------------------------------------------- 32 | 33 | #ifndef TERASIC_INCLUDES_H_ 34 | #define TERASIC_INCLUDES_H_ 35 | 36 | #include 37 | #include // malloc, free 38 | #include 39 | #include 40 | #include // usleep (unix standard?) 41 | #include "sys/alt_flash.h" 42 | #include "sys/alt_flash_types.h" 43 | #include "io.h" 44 | #include "alt_types.h" // alt_u32 45 | #include "altera_avalon_pio_regs.h" //IOWR_ALTERA_AVALON_PIO_DATA 46 | #include "sys/alt_irq.h" // interrupt 47 | #include "sys/alt_alarm.h" // time tick function (alt_nticks(), alt_ticks_per_second()) 48 | #include "sys/alt_timestamp.h" 49 | #include "sys/alt_stdio.h" 50 | #include "system.h" 51 | #include 52 | #include "debug.h" 53 | 54 | #define DEBUG_DUMP /*printf */ 55 | 56 | 57 | typedef int bool; 58 | #define TRUE 1 59 | #define FALSE 0 60 | 61 | #endif /*TERASIC_INCLUDES_H_*/ 62 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_PAINTER/software/tftlcd_ili9806g/vip_fr.h: -------------------------------------------------------------------------------- 1 | #ifndef VIP_FR_H_ 2 | #define VIP_FR_H_ 3 | 4 | typedef struct{ 5 | alt_u32 VipBase; 6 | void* Frame0_Base; 7 | void* Frame1_Base; 8 | // alt_u32 Frame_Width; 9 | // alt_u32 Frame_Height; 10 | alt_u8 DisplayFrame; // 0 or 1 11 | 12 | // for altera vip library 13 | int color_depth; 14 | int width; 15 | int height; 16 | int bytes_per_pixel; 17 | int interlace; 18 | }VIP_FRAME_READER; 19 | 20 | 21 | #define alt_video_display VIP_FRAME_READER 22 | 23 | VIP_FRAME_READER* VIPFR_Init(alt_u32 VipBase, void* Frame0_Base, void* Frame1_Base, alt_u32 Frame_Width, alt_u32 Frame_Height); 24 | void VIPFR_UnInit(VIP_FRAME_READER* p); 25 | void VIPFR_Go(VIP_FRAME_READER* p, bool bGo); 26 | void* VIPFR_GetDrawFrame(VIP_FRAME_READER* p); 27 | void VIPFR_ActiveDrawFrame(VIP_FRAME_READER* p); 28 | void VIPFR_ReserveBackground(VIP_FRAME_READER* p); 29 | void VIPFR_SetFrameSize(VIP_FRAME_READER* p, int width, int height); 30 | // 31 | 32 | 33 | 34 | 35 | #endif /*VIP_FR_H_*/ 36 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_spi/DE10_NANO_MIL_spi.qpf: -------------------------------------------------------------------------------- 1 | DATE = "Tue Mar 3 15:11:40 2015" 2 | QUARTUS_VERSION = "14.0" 3 | 4 | # Revisions 5 | 6 | PROJECT_REVISION = "DE10_NANO_MIL_spi" 7 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_spi/DE10_NANO_MIL_spi.sdc: -------------------------------------------------------------------------------- 1 | #************************************************************** 2 | # This .sdc file is created by Terasic Tool. 3 | # Users are recommended to modify this file to match users logic. 4 | #************************************************************** 5 | 6 | #************************************************************** 7 | # Create Clock 8 | #************************************************************** 9 | 10 | create_clock -period 20 [get_ports FPGA_CLK1_50] 11 | create_clock -period 20 [get_ports FPGA_CLK2_50] 12 | create_clock -period 20 [get_ports FPGA_CLK3_50] 13 | 14 | #************************************************************** 15 | # Create Generated Clock 16 | #************************************************************** 17 | derive_pll_clocks 18 | 19 | 20 | 21 | #************************************************************** 22 | # Set Clock Latency 23 | #************************************************************** 24 | 25 | 26 | 27 | #************************************************************** 28 | # Set Clock Uncertainty 29 | #************************************************************** 30 | derive_clock_uncertainty 31 | 32 | 33 | 34 | #************************************************************** 35 | # Set Input Delay 36 | #************************************************************** 37 | 38 | 39 | 40 | #************************************************************** 41 | # Set Output Delay 42 | #************************************************************** 43 | 44 | 45 | 46 | #************************************************************** 47 | # Set Clock Groups 48 | #************************************************************** 49 | 50 | 51 | 52 | #************************************************************** 53 | # Set False Path 54 | #************************************************************** 55 | 56 | 57 | 58 | #************************************************************** 59 | # Set Multicycle Path 60 | #************************************************************** 61 | 62 | 63 | 64 | #************************************************************** 65 | # Set Maximum Delay 66 | #************************************************************** 67 | 68 | 69 | 70 | #************************************************************** 71 | # Set Minimum Delay 72 | #************************************************************** 73 | 74 | 75 | 76 | #************************************************************** 77 | # Set Input Transition 78 | #************************************************************** 79 | 80 | 81 | 82 | #************************************************************** 83 | # Set Load 84 | #************************************************************** -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_spi/software/ili9806g_tft/.force_relink: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE10_NANO_MIL_spi/software/ili9806g_tft/.force_relink -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_spi/software/ili9806g_tft/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | ili9806_tft 4 | 5 | 6 | 7 | 8 | 9 | com.altera.sbtgui.project.makefileBuilder 10 | 11 | 12 | 13 | 14 | com.altera.sbtgui.project.makefileBuilder 15 | 16 | 17 | 18 | 19 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 20 | clean,full,incremental, 21 | 22 | 23 | 24 | 25 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 26 | full,incremental, 27 | 28 | 29 | 30 | 31 | 32 | org.eclipse.cdt.core.cnature 33 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 34 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 35 | org.eclipse.cdt.core.ccnature 36 | com.altera.sbtgui.project.SBTGUINature 37 | com.altera.sbtgui.project.SBTGUIAppNature 38 | com.altera.sbtgui.project.SBTGUIManagedNature 39 | 40 | 41 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_spi/software/ili9806g_tft/.settings/language.settings.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_spi/software/ili9806g_tft/lcd/lcd.h: -------------------------------------------------------------------------------- 1 | #ifndef __LCD_H 2 | #define __LCD_H 3 | #include "system.h" 4 | #include "altera_avalon_spi.h" 5 | #include "altera_avalon_spi_regs.h" 6 | typedef unsigned char u8; 7 | typedef unsigned short u16; 8 | typedef unsigned int u32; 9 | 10 | //Lcd初始化及其低级控制函数 11 | void Lcd_Initialize(void); 12 | void Lcd_WR_Start(void); 13 | //Lcd高级控制函数 14 | void Lcd_ColorBox(u16 x,u16 y,u16 xLong,u16 yLong,u16 Color); 15 | void DrawPixel(u16 x, u16 y, u16 Color); 16 | u16 ReadPixel(u16 x,u8 y); 17 | void LCD_Fill_Pic(u16 x, u16 y,u16 pic_H, u16 pic_V, const unsigned char* pic); 18 | void BlockWrite(unsigned int Xstart,unsigned int Xend,unsigned int Ystart,unsigned int Yend); 19 | 20 | 21 | void delay_ms (u32 tm); 22 | 23 | /*定义常见颜色*/ 24 | // #define red 0x001f 25 | // #define blue 0xf800 26 | // #define green 0x07e0 27 | // #define black 0x0000 28 | // #define white 0xffff 29 | // #define yellow 0x07ff 30 | // #define orange 0x05bf 31 | // #define Chocolate4 0x4451 32 | // #define Grey 0xefbd//灰色 33 | 34 | #define White 0xFFFF 35 | #define Black 0x0000 36 | #define Blue 0x001F 37 | #define Blue2 0x051F 38 | #define Red 0xF800 39 | #define Magenta 0xF81F 40 | #define Green 0x07E0 41 | #define Cyan 0x7FFF 42 | #define Yellow 0xFFE0 43 | 44 | 45 | #endif 46 | 47 | 48 | 49 | 50 | 51 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_spi/software/ili9806g_tft_bsp/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | ili9806_tft_bsp 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 25 | org.eclipse.cdt.core.ccnature 26 | com.altera.sbtgui.project.SBTGUINature 27 | com.altera.sbtgui.project.SBTGUIBspNature 28 | 29 | 30 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_spi/software/ili9806g_tft_bsp/.settings/language.settings.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | -------------------------------------------------------------------------------- /Demonstration/DE10_NANO_MIL_spi/software/ili9806g_tft_bsp/create-this-bsp: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # 3 | # This script creates the ucosii_net_zipfs Board Support Package (BSP). 4 | 5 | BSP_TYPE=hal 6 | BSP_DIR=. 7 | SOPC_DIR=../../ 8 | SOPC_FILE=../../nios2_system.sopcinfo 9 | NIOS2_BSP_ARGS="--set hal.max_file_descriptors 4 --set hal.enable_small_c_library true --set hal.sys_clk_timer none --set hal.timestamp_timer none --set hal.enable_exit false --set hal.enable_c_plus_plus false --set hal.enable_lightweight_device_driver_api true --set hal.enable_clean_exit false --set hal.enable_sim_optimize false --set hal.enable_reduced_device_drivers true --set hal.make.bsp_cflags_optimization '-Os'" 10 | CPU_NAME= 11 | 12 | if [ -n "$CPU_NAME" ]; then 13 | NIOS2_BSP_ARGS="$NIOS2_BSP_ARGS --cpu-name $CPU_NAME" 14 | fi 15 | 16 | # Don't run make if create-this-app script is called with --no-make arg 17 | SKIP_MAKE= 18 | while [ $# -gt 0 ] 19 | do 20 | case "$1" in 21 | --no-make) 22 | SKIP_MAKE=1 23 | ;; 24 | *) 25 | NIOS2_BSP_ARGS="$NIOS2_BSP_ARGS $1" 26 | ;; 27 | esac 28 | shift 29 | done 30 | 31 | 32 | # Run nios2-bsp utility to create a hal BSP in this directory 33 | # for the system with a .sopc file in $SOPC_FILE. 34 | # Deprecating $SOPC_DIR in 10.1. Multiple .sopcinfo files in a directory may exist. 35 | 36 | if [ -z "$SOPC_FILE" ]; then 37 | echo "WARNING: Use of a directory for locating a .sopcinfo file is deprecated in 10.1. Multiple .sopcinfo files may exist. You must specify the full .sopcinfo path." 38 | cmd="nios2-bsp $BSP_TYPE $BSP_DIR $SOPC_DIR $NIOS2_BSP_ARGS" 39 | else 40 | cmd="nios2-bsp $BSP_TYPE $BSP_DIR $SOPC_FILE $NIOS2_BSP_ARGS" 41 | fi 42 | 43 | 44 | echo "create-this-bsp: Running \"$cmd\"" 45 | $cmd || { 46 | echo "$cmd failed" 47 | exit 1 48 | } 49 | if [ -z "$SKIP_MAKE" ]; then 50 | echo "create-this-bsp: Running make" 51 | make 52 | fi 53 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/DE1_SOC_Linux_RGB.qpf: -------------------------------------------------------------------------------- 1 | DATE = "Mon Jun 17 20:35:29 2013" 2 | QUARTUS_VERSION = "13" 3 | 4 | # Revisions 5 | 6 | PROJECT_REVISION = "DE1_SOC_Linux_RGB" 7 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/TERASIC_AUDIO/audio_fifo.qip: -------------------------------------------------------------------------------- 1 | set_global_assignment -name IP_TOOL_NAME "FIFO" 2 | set_global_assignment -name IP_TOOL_VERSION "9.1" 3 | set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "audio_fifo.v"] 4 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/TERASIC_AUDIO/audio_fifo_wave0.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE1_SOC_Linux_RGB/ip/TERASIC_AUDIO/audio_fifo_wave0.jpg -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/TERASIC_AUDIO/audio_fifo_wave1.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE1_SOC_Linux_RGB/ip/TERASIC_AUDIO/audio_fifo_wave1.jpg -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/TERASIC_AUDIO/audio_fifo_waveforms.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | Sample Waveforms for "audio_fifo.v" 4 | 5 | 6 |

Sample behavioral waveforms for design file "audio_fifo.v"

7 |

The following waveforms show the behavior of dcfifo megafunction for the chosen set of parameters in design "audio_fifo.v". The design "audio_fifo.v" has a depth of 256 words of 32 bits each. The fifo is in legacy synchronous mode. The data becomes available after 'rdreq' is asserted; 'rdreq' acts as a read request.

8 |
9 |

Fig. 1 : Wave showing read and write operation.

10 |

The above waveform shows the behavior of the design under normal read and write conditions with aclr .

11 |
12 |

Fig. 2 : Wave showing FIFO full operation.

13 |

The above waveform shows the behavior of the FIFO under wrfull condition. In the example above, data is written into the FIFO till it is full, then data is read back.

14 |

15 | 16 | 17 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/TERASIC_IRM/TERASIC_IRM.v: -------------------------------------------------------------------------------- 1 | module TERASIC_IRM( 2 | clk, // must be 50 MHZ 3 | reset_n, 4 | 5 | // interrrupt 6 | irq, 7 | 8 | // avalon slave 9 | s_cs_n, 10 | s_read, 11 | s_readdata, 12 | s_write, 13 | s_writedata, 14 | 15 | // export 16 | ir 17 | 18 | ); 19 | 20 | 21 | input clk; 22 | input reset_n; 23 | output reg irq; 24 | input s_cs_n; 25 | input s_read; 26 | output [31:0] s_readdata; 27 | input s_write; 28 | input [31:0] s_writedata; 29 | input ir; 30 | 31 | // write to clear interrupt 32 | wire data_ready; 33 | //always @ (posedge clk or posedge data_ready or negedge reset_n) 34 | reg pre_data_ready; 35 | always @ (posedge clk or negedge reset_n) 36 | begin 37 | if (~reset_n) 38 | pre_data_ready <= 1'b0; 39 | else 40 | pre_data_ready <= data_ready; 41 | end 42 | 43 | always @ (posedge clk or negedge reset_n) 44 | begin 45 | if (~reset_n) 46 | irq <= 1'b0; 47 | else if (~pre_data_ready & data_ready) 48 | irq <= 1'b1; 49 | else if (~s_cs_n & s_write) 50 | irq <= 1'b0; // write any valud to clear interrupt flga 51 | end 52 | 53 | 54 | IRDA_RECEIVE_Terasic IRDA_RECEIVE_Terasic_inst( 55 | .iCLK(clk), //clk 50MHz 56 | .iRST_n(reset_n), //reset 57 | 58 | .iIRDA(ir), //IRDA code input 59 | .iREAD(~s_cs_n & s_read), //read command 60 | 61 | .oDATA_REAY(data_ready), //data ready 62 | .oDATA(s_readdata) //decode data output 63 | ); 64 | 65 | 66 | endmodule 67 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/debounce/debounce.v: -------------------------------------------------------------------------------- 1 | //Legal Notice: (C)2013 Altera Corporation. All rights reserved. Your 2 | //use of Altera Corporation's design tools, logic functions and other 3 | //software and tools, and its AMPP partner logic functions, and any 4 | //output files any of the foregoing (including device programming or 5 | //simulation files), and any associated documentation or information are 6 | //expressly subject to the terms and conditions of the Altera Program 7 | //License Subscription Agreement or other applicable license agreement, 8 | //including, without limitation, that your use is for the sole purpose 9 | //of programming logic devices manufactured by Altera and sold by Altera 10 | //or its authorized distributors. Please refer to the applicable 11 | //agreement for further details. 12 | 13 | module debounce ( 14 | clk, 15 | reset_n, 16 | data_in, 17 | data_out 18 | ); 19 | 20 | parameter WIDTH = 32; // set to be the width of the bus being debounced 21 | parameter POLARITY = "HIGH"; // set to be "HIGH" for active high debounce or "LOW" for active low debounce 22 | parameter TIMEOUT = 50000; // number of input clock cycles the input signal needs to be in the active state 23 | parameter TIMEOUT_WIDTH = 16; // set to be ceil(log2(TIMEOUT)) 24 | 25 | input wire clk; 26 | input wire reset_n; 27 | 28 | input wire [WIDTH-1:0] data_in; 29 | output wire [WIDTH-1:0] data_out; 30 | 31 | reg [TIMEOUT_WIDTH-1:0] counter [0:WIDTH-1]; 32 | wire counter_reset [0:WIDTH-1]; 33 | wire counter_enable [0:WIDTH-1]; 34 | 35 | // need one counter per input to debounce 36 | genvar i; 37 | generate for (i = 0; i < WIDTH; i = i+1) 38 | begin: debounce_counter_loop 39 | always @ (posedge clk or negedge reset_n) 40 | begin 41 | if (reset_n == 0) 42 | begin 43 | counter[i] <= 0; 44 | end 45 | else 46 | begin 47 | if (counter_reset[i] == 1) // resetting the counter needs to win 48 | begin 49 | counter[i] <= 0; 50 | end 51 | else if (counter_enable[i] == 1) 52 | begin 53 | counter[i] <= counter[i] + 1'b1; 54 | end 55 | end 56 | end 57 | 58 | if (POLARITY == "HIGH") 59 | begin 60 | assign counter_reset[i] = (data_in[i] == 0); 61 | assign counter_enable[i] = (data_in[i] == 1) & (counter[i] < TIMEOUT); 62 | assign data_out[i] = (counter[i] == TIMEOUT) ? 1'b1 : 1'b0; 63 | end 64 | else 65 | begin 66 | assign counter_reset[i] = (data_in[i] == 1); 67 | assign counter_enable[i] = (data_in[i] == 0) & (counter[i] < TIMEOUT); 68 | assign data_out[i] = (counter[i] == TIMEOUT) ? 1'b0 : 1'b1; 69 | end 70 | 71 | end 72 | endgenerate 73 | 74 | endmodule 75 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/i2c_opencores/Docs/i2c_specs.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE1_SOC_Linux_RGB/ip/i2c_opencores/Docs/i2c_specs.pdf -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/i2c_opencores/HAL/inc/i2c_opencores.h: -------------------------------------------------------------------------------- 1 | #ifndef __I2C_OPENCORES_H__ 2 | #define __I2C_OPENCORES_H__ 3 | 4 | 5 | #include "alt_types.h" 6 | 7 | #ifdef __cplusplus 8 | extern "C" 9 | { 10 | #endif /* __cplusplus */ 11 | 12 | 13 | 14 | 15 | void I2C_init(alt_u32 base,alt_u32 clk,alt_u32 speed); 16 | int I2C_start(alt_u32 base, alt_u32 add, alt_u32 read); 17 | alt_u32 I2C_read(alt_u32 base,alt_u32 last); 18 | alt_u32 I2C_write(alt_u32 base,alt_u8 data, alt_u32 last); 19 | #define I2C_OK (0) 20 | #define I2C_ACK (0) 21 | #define I2C_NOACK (1) 22 | #define I2C_ABITRATION_LOST (2) 23 | 24 | #define I2C_OPENCORES_INSTANCE(name, dev) extern int alt_no_storage 25 | #define I2C_OPENCORES_INIT(name, dev) while (0) 26 | 27 | #ifdef __cplusplus 28 | } 29 | #endif /* __cplusplus */ 30 | 31 | #endif /* __I2C_OPENCORES_H__ */ 32 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/i2c_opencores/HAL/src/component.mk: -------------------------------------------------------------------------------- 1 | # ******************************************************************************* 2 | # * * 3 | # * License Agreement * 4 | # * * 5 | # * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * 6 | # * All rights reserved. * 7 | # * * 8 | # * Permission is hereby granted, free of charge, to any person obtaining a * 9 | # * copy of this software and associated documentation files (the "Software"), * 10 | # * to deal in the Software without restriction, including without limitation * 11 | # * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 12 | # * and/or sell copies of the Software, and to permit persons to whom the * 13 | # * Software is furnished to do so, subject to the following conditions: * 14 | # * * 15 | # * The above copyright notice and this permission notice shall be included in * 16 | # * all copies or substantial portions of the Software. * 17 | # * * 18 | # * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 19 | # * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 20 | # * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 21 | # * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 22 | # * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 23 | # * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 24 | # * DEALINGS IN THE SOFTWARE. * 25 | # * * 26 | # * This agreement shall be governed in all respects by the laws of the State * 27 | # * of California and by the laws of the United States of America. * 28 | # * * 29 | # * Altera does not recommend, suggest or require that this reference design * 30 | # * file be used in conjunction or combination with any other product. * 31 | # ******************************************************************************* 32 | 33 | # List all source files supplied by this component. 34 | 35 | C_LIB_SRCS += i2c_opencores.c 36 | 37 | ASM_LIB_SRCS += 38 | 39 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/i2c_opencores/i2c_opencores.v: -------------------------------------------------------------------------------- 1 | // 2 | // fixed for 9.1 jan 21 2010 cruben 3 | // 4 | //`include "timescale.v" 5 | //`include "i2c_master_defines.v" 6 | 7 | module i2c_opencores 8 | ( 9 | wb_clk_i, wb_rst_i, wb_adr_i, wb_dat_i, wb_dat_o, 10 | wb_we_i, wb_stb_i, /*wb_cyc_i,*/ wb_ack_o, wb_inta_o, 11 | scl_pad_io, sda_pad_io 12 | ); 13 | 14 | 15 | // Common bus signals 16 | input wb_clk_i; // WISHBONE clock 17 | input wb_rst_i; // WISHBONE reset 18 | 19 | // Slave signals 20 | input [2:0] wb_adr_i; // WISHBONE address input 21 | input [7:0] wb_dat_i; // WISHBONE data input 22 | output [7:0] wb_dat_o; // WISHBONE data output 23 | input wb_we_i; // WISHBONE write enable input 24 | input wb_stb_i; // WISHBONE strobe input 25 | //input wb_cyc_i; // WISHBONE cycle input 26 | output wb_ack_o; // WISHBONE acknowledge output 27 | output wb_inta_o; // WISHBONE interrupt output 28 | 29 | // I2C signals 30 | inout scl_pad_io; // I2C clock io 31 | inout sda_pad_io; // I2C data io 32 | 33 | wire wb_cyc_i; // WISHBONE cycle input 34 | // Wire tri-state scl/sda 35 | wire scl_pad_i; 36 | wire scl_pad_o; 37 | wire scl_pad_io; 38 | wire scl_padoen_o; 39 | 40 | assign wb_cyc_i = wb_stb_i; 41 | assign scl_pad_i = scl_pad_io; 42 | assign scl_pad_io = scl_padoen_o ? 1'bZ : scl_pad_o; 43 | 44 | wire sda_pad_i; 45 | wire sda_pad_o; 46 | wire sda_pad_io; 47 | wire sda_padoen_o; 48 | 49 | assign sda_pad_i = sda_pad_io; 50 | assign sda_pad_io = sda_padoen_o ? 1'bZ : sda_pad_o; 51 | 52 | // Avalon doesn't have an asynchronous reset 53 | // set it to be inactive and just use synchronous reset 54 | // reset level is a parameter, 0 is the default (active-low reset) 55 | wire arst_i; 56 | 57 | assign arst_i = 1'b1; 58 | 59 | // Connect the top level I2C core 60 | i2c_master_top i2c_master_top_inst 61 | ( 62 | .wb_clk_i(wb_clk_i), .wb_rst_i(wb_rst_i), .arst_i(arst_i), 63 | 64 | .wb_adr_i(wb_adr_i), .wb_dat_i(wb_dat_i), .wb_dat_o(wb_dat_o), 65 | .wb_we_i(wb_we_i), .wb_stb_i(wb_stb_i), .wb_cyc_i(wb_cyc_i), 66 | .wb_ack_o(wb_ack_o), .wb_inta_o(wb_inta_o), 67 | 68 | .scl_pad_i(scl_pad_i), .scl_pad_o(scl_pad_o), .scl_padoen_o(scl_padoen_o), 69 | .sda_pad_i(sda_pad_i), .sda_pad_o(sda_pad_o), .sda_padoen_o(sda_padoen_o) 70 | ); 71 | 72 | endmodule 73 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/i2c_opencores/i2c_opencores_sw.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # opencores_i2c_sw.tcl 3 | # 4 | 5 | # Create a new driver 6 | create_driver opencores_i2c_driver 7 | 8 | # Associate it with some hardware known as "opencores_i2c" 9 | set_sw_property hw_class_name opencores_i2c 10 | 11 | # The version of this driver 12 | set_sw_property version 11.0 13 | 14 | # This driver may be incompatible with versions of hardware less 15 | # than specified below. Updates to hardware and device drivers 16 | # rendering the driver incompatible with older versions of 17 | # hardware are noted with this property assignment. 18 | # 19 | # Multiple-Version compatibility was introduced in version 7.1; 20 | # prior versions are therefore excluded. 21 | set_sw_property min_compatible_hw_version 7.1 22 | 23 | # Initialize the driver in alt_sys_init() 24 | set_sw_property auto_initialize true 25 | 26 | # Location in generated BSP that above sources will be copied into 27 | set_sw_property bsp_subdirectory drivers 28 | 29 | 30 | # Interrupt properties: 31 | # This peripheral has an IRQ output but the driver doesn't currently 32 | # have any interrupt service routine. To ensure that the BSP tools 33 | # do not otherwise limit the BSP functionality for users of the 34 | # Nios II enhanced interrupt port, these settings advertise 35 | # compliance with both legacy and enhanced interrupt APIs, and to state 36 | # that any driver ISR supports preemption. If an interrupt handler 37 | # is added to this driver, these must be re-examined for validity. 38 | set_sw_property isr_preemption_supported true 39 | set_sw_property supported_interrupt_apis "legacy_interrupt_api enhanced_interrupt_api" 40 | 41 | # 42 | # Source file listings... 43 | # 44 | 45 | # C/C++ source files 46 | add_sw_property c_source HAL/src/opencores_i2c.c 47 | 48 | # Include files 49 | add_sw_property include_source HAL/inc/opencores_i2c.h 50 | add_sw_property include_source inc/opencores_i2c_regs.h 51 | 52 | # This driver supports HAL & UCOSII BSP (OS) types 53 | add_sw_property supported_bsp_type HAL 54 | add_sw_property supported_bsp_type UCOSII 55 | 56 | # End of file 57 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/i2c_opencores/timescale.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 10ps 2 | 3 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/intr_capturer/intr_capturer.v: -------------------------------------------------------------------------------- 1 | module intr_capturer #( 2 | parameter NUM_INTR = 32 3 | // active high level interrupt is expected for the input of this capturer module 4 | )( 5 | input clk, 6 | input rst_n, 7 | input [NUM_INTR-1:0] interrupt_in, 8 | //input [31:0] wrdata, 9 | input addr, 10 | input read, 11 | output [31:0] rddata 12 | ); 13 | 14 | reg [NUM_INTR-1:0] interrupt_reg; 15 | reg [31:0] readdata_with_waitstate; 16 | wire [31:0] act_readdata; 17 | wire [31:0] readdata_lower_intr; 18 | wire [31:0] readdata_higher_intr; 19 | wire access_lower_32; 20 | wire access_higher_32; 21 | 22 | always @(posedge clk or negedge rst_n) begin 23 | if (!rst_n) interrupt_reg <= 'b0; 24 | else interrupt_reg <= interrupt_in; 25 | end 26 | 27 | generate 28 | if (NUM_INTR>32) begin : two_intr_reg_needed 29 | assign readdata_lower_intr = interrupt_reg[31:0] & {(32){access_lower_32}}; 30 | assign readdata_higher_intr = interrupt_reg[NUM_INTR-1:32] & {(NUM_INTR-32){access_higher_32}}; 31 | end 32 | else begin : only_1_reg 33 | assign readdata_lower_intr = interrupt_reg & {(NUM_INTR){access_lower_32}}; 34 | assign readdata_higher_intr = {32{1'b0}}; 35 | end 36 | endgenerate 37 | 38 | assign access_lower_32 = read & (addr == 0); 39 | assign access_higher_32 = read & (addr == 1); 40 | assign act_readdata = readdata_lower_intr | readdata_higher_intr; 41 | assign rddata = readdata_with_waitstate; 42 | 43 | always @(posedge clk or negedge rst_n) begin 44 | if (!rst_n) readdata_with_waitstate <= 32'b0; 45 | else readdata_with_waitstate <= act_readdata; 46 | end 47 | 48 | endmodule 49 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/lcd_pll/lcd_pll/lcd_pll_0002.qip: -------------------------------------------------------------------------------- 1 | set_instance_assignment -name PLL_COMPENSATION_MODE DIRECT -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 2 | 3 | set_instance_assignment -name PLL_AUTO_RESET OFF -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 4 | set_instance_assignment -name PLL_BANDWIDTH_PRESET AUTO -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 5 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/ip/lcd_pll/lcd_pll/lcd_pll_0002.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns/10ps 2 | module lcd_pll_0002( 3 | 4 | // interface 'refclk' 5 | input wire refclk, 6 | 7 | // interface 'reset' 8 | input wire rst, 9 | 10 | // interface 'outclk0' 11 | output wire outclk_0, 12 | 13 | // interface 'outclk1' 14 | output wire outclk_1, 15 | 16 | // interface 'locked' 17 | output wire locked 18 | ); 19 | 20 | altera_pll #( 21 | .fractional_vco_multiplier("false"), 22 | .reference_clock_frequency("50.0 MHz"), 23 | .operation_mode("direct"), 24 | .number_of_clocks(2), 25 | .output_clock_frequency0("30.000000 MHz"), 26 | .phase_shift0("0 ps"), 27 | .duty_cycle0(50), 28 | .output_clock_frequency1("30.000000 MHz"), 29 | .phase_shift1("25000 ps"), 30 | .duty_cycle1(50), 31 | .output_clock_frequency2("0 MHz"), 32 | .phase_shift2("0 ps"), 33 | .duty_cycle2(50), 34 | .output_clock_frequency3("0 MHz"), 35 | .phase_shift3("0 ps"), 36 | .duty_cycle3(50), 37 | .output_clock_frequency4("0 MHz"), 38 | .phase_shift4("0 ps"), 39 | .duty_cycle4(50), 40 | .output_clock_frequency5("0 MHz"), 41 | .phase_shift5("0 ps"), 42 | .duty_cycle5(50), 43 | .output_clock_frequency6("0 MHz"), 44 | .phase_shift6("0 ps"), 45 | .duty_cycle6(50), 46 | .output_clock_frequency7("0 MHz"), 47 | .phase_shift7("0 ps"), 48 | .duty_cycle7(50), 49 | .output_clock_frequency8("0 MHz"), 50 | .phase_shift8("0 ps"), 51 | .duty_cycle8(50), 52 | .output_clock_frequency9("0 MHz"), 53 | .phase_shift9("0 ps"), 54 | .duty_cycle9(50), 55 | .output_clock_frequency10("0 MHz"), 56 | .phase_shift10("0 ps"), 57 | .duty_cycle10(50), 58 | .output_clock_frequency11("0 MHz"), 59 | .phase_shift11("0 ps"), 60 | .duty_cycle11(50), 61 | .output_clock_frequency12("0 MHz"), 62 | .phase_shift12("0 ps"), 63 | .duty_cycle12(50), 64 | .output_clock_frequency13("0 MHz"), 65 | .phase_shift13("0 ps"), 66 | .duty_cycle13(50), 67 | .output_clock_frequency14("0 MHz"), 68 | .phase_shift14("0 ps"), 69 | .duty_cycle14(50), 70 | .output_clock_frequency15("0 MHz"), 71 | .phase_shift15("0 ps"), 72 | .duty_cycle15(50), 73 | .output_clock_frequency16("0 MHz"), 74 | .phase_shift16("0 ps"), 75 | .duty_cycle16(50), 76 | .output_clock_frequency17("0 MHz"), 77 | .phase_shift17("0 ps"), 78 | .duty_cycle17(50), 79 | .pll_type("General"), 80 | .pll_subtype("General") 81 | ) altera_pll_i ( 82 | .rst (rst), 83 | .outclk ({outclk_1, outclk_0}), 84 | .locked (locked), 85 | .fboutclk ( ), 86 | .fbclk (1'b0), 87 | .refclk (refclk) 88 | ); 89 | endmodule 90 | 91 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_Linux_RGB/sof_to_rbf.bat: -------------------------------------------------------------------------------- 1 | %QUARTUS_ROOTDIR%\\bin\\quartus_cpf -c DE1_SOC_Linux_RGB.sof soc_system.rbf 2 | pause 3 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/DE1_SOC_MIL_PAINTER.qpf: -------------------------------------------------------------------------------- 1 | # -------------------------------------------------------------------------- # 2 | # 3 | # Copyright (C) 1991-2013 Altera Corporation 4 | # Your use of Altera Corporation's design tools, logic functions 5 | # and other software and tools, and its AMPP partner logic 6 | # functions, and any output files from any of the foregoing 7 | # (including device programming or simulation files), and any 8 | # associated documentation or information are expressly subject 9 | # to the terms and conditions of the Altera Program License 10 | # Subscription Agreement, Altera MegaCore Function License 11 | # Agreement, or other applicable license agreement, including, 12 | # without limitation, that your use is for the sole purpose of 13 | # programming logic devices manufactured by Altera and sold by 14 | # Altera or its authorized distributors. Please refer to the 15 | # applicable agreement for further details. 16 | # 17 | # -------------------------------------------------------------------------- # 18 | # 19 | # Quartus II 64-Bit 20 | # Version 13.0.0 Build 156 04/24/2013 Service Pack 0.dp2 SJ Full Version 21 | # Date created = 10:24:21 September 13, 2013 22 | # 23 | # -------------------------------------------------------------------------- # 24 | 25 | QUARTUS_VERSION = "13.0" 26 | DATE = "10:24:21 September 13, 2013" 27 | 28 | # Revisions 29 | 30 | PROJECT_REVISION = "DE1_SOC_MIL_PAINTER" 31 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/ip/I8080_Controller/I8080_Controller.v: -------------------------------------------------------------------------------- 1 | //without read function 2 | // Revision History : 3 | // -------------------------------------------------------------------- 4 | // Ver :| Author :| Mod. Date :| Changes Made: 5 | // -------------------------------------------------------------------- 6 | 7 | module I8080_Controller #( 8 | I8080_BUS_WIDTH = 32 9 | )( 10 | // global clock & reset 11 | clk, 12 | reset_n, 13 | 14 | // mm slave 15 | s_chipselect_n, 16 | // s_read, 17 | s_write_n, 18 | // s_readdata, 19 | s_writedata, 20 | s_address, 21 | 22 | i8080_cs, 23 | i8080_rs,//command/data 24 | i8080_rd, 25 | i8080_wr, 26 | i8080_data, 27 | ); 28 | 29 | // global clock & reset 30 | input clk; 31 | input reset_n; 32 | 33 | // mm slave 34 | input s_chipselect_n; 35 | //input s_read; 36 | input s_write_n; 37 | //output reg [31:0] s_readdata; 38 | input [31:0] s_writedata; 39 | input s_address; 40 | 41 | output i8080_cs; 42 | output i8080_rs;//command/data 43 | output i8080_rd; 44 | output i8080_wr; 45 | output [I8080_BUS_WIDTH-1:0] i8080_data; 46 | 47 | 48 | assign i8080_cs = s_chipselect_n; 49 | assign i8080_rs = s_address; 50 | assign i8080_rd = 1'b1; 51 | assign i8080_wr = s_write_n; 52 | assign i8080_data = s_writedata[I8080_BUS_WIDTH-1:0]; 53 | 54 | 55 | endmodule 56 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/ip/i2c_opencores/Docs/i2c_specs.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE1_SOC_MIL_PAINTER/ip/i2c_opencores/Docs/i2c_specs.pdf -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/ip/i2c_opencores/HAL/inc/i2c_opencores.h: -------------------------------------------------------------------------------- 1 | #ifndef __I2C_OPENCORES_H__ 2 | #define __I2C_OPENCORES_H__ 3 | 4 | 5 | #include "alt_types.h" 6 | 7 | #ifdef __cplusplus 8 | extern "C" 9 | { 10 | #endif /* __cplusplus */ 11 | 12 | 13 | 14 | 15 | void I2C_init(alt_u32 base,alt_u32 clk,alt_u32 speed); 16 | int I2C_start(alt_u32 base, alt_u32 add, alt_u32 read); 17 | alt_u32 I2C_read(alt_u32 base,alt_u32 last); 18 | alt_u32 I2C_write(alt_u32 base,alt_u8 data, alt_u32 last); 19 | #define I2C_OK (0) 20 | #define I2C_ACK (0) 21 | #define I2C_NOACK (1) 22 | #define I2C_ABITRATION_LOST (2) 23 | 24 | #define I2C_OPENCORES_INSTANCE(name, dev) extern int alt_no_storage 25 | #define I2C_OPENCORES_INIT(name, dev) while (0) 26 | 27 | #ifdef __cplusplus 28 | } 29 | #endif /* __cplusplus */ 30 | 31 | #endif /* __I2C_OPENCORES_H__ */ 32 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/ip/i2c_opencores/HAL/src/component.mk: -------------------------------------------------------------------------------- 1 | # ******************************************************************************* 2 | # * * 3 | # * License Agreement * 4 | # * * 5 | # * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * 6 | # * All rights reserved. * 7 | # * * 8 | # * Permission is hereby granted, free of charge, to any person obtaining a * 9 | # * copy of this software and associated documentation files (the "Software"), * 10 | # * to deal in the Software without restriction, including without limitation * 11 | # * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 12 | # * and/or sell copies of the Software, and to permit persons to whom the * 13 | # * Software is furnished to do so, subject to the following conditions: * 14 | # * * 15 | # * The above copyright notice and this permission notice shall be included in * 16 | # * all copies or substantial portions of the Software. * 17 | # * * 18 | # * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 19 | # * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 20 | # * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 21 | # * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 22 | # * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 23 | # * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 24 | # * DEALINGS IN THE SOFTWARE. * 25 | # * * 26 | # * This agreement shall be governed in all respects by the laws of the State * 27 | # * of California and by the laws of the United States of America. * 28 | # * * 29 | # * Altera does not recommend, suggest or require that this reference design * 30 | # * file be used in conjunction or combination with any other product. * 31 | # ******************************************************************************* 32 | 33 | # List all source files supplied by this component. 34 | 35 | C_LIB_SRCS += i2c_opencores.c 36 | 37 | ASM_LIB_SRCS += 38 | 39 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/ip/i2c_opencores/i2c_opencores.v: -------------------------------------------------------------------------------- 1 | // 2 | // fixed for 9.1 jan 21 2010 cruben 3 | // 4 | //`include "timescale.v" 5 | //`include "i2c_master_defines.v" 6 | 7 | module i2c_opencores 8 | ( 9 | wb_clk_i, wb_rst_i, wb_adr_i, wb_dat_i, wb_dat_o, 10 | wb_we_i, wb_stb_i, /*wb_cyc_i,*/ wb_ack_o, wb_inta_o, 11 | scl_pad_io, sda_pad_io 12 | ); 13 | 14 | 15 | // Common bus signals 16 | input wb_clk_i; // WISHBONE clock 17 | input wb_rst_i; // WISHBONE reset 18 | 19 | // Slave signals 20 | input [2:0] wb_adr_i; // WISHBONE address input 21 | input [7:0] wb_dat_i; // WISHBONE data input 22 | output [7:0] wb_dat_o; // WISHBONE data output 23 | input wb_we_i; // WISHBONE write enable input 24 | input wb_stb_i; // WISHBONE strobe input 25 | //input wb_cyc_i; // WISHBONE cycle input 26 | output wb_ack_o; // WISHBONE acknowledge output 27 | output wb_inta_o; // WISHBONE interrupt output 28 | 29 | // I2C signals 30 | inout scl_pad_io; // I2C clock io 31 | inout sda_pad_io; // I2C data io 32 | 33 | wire wb_cyc_i; // WISHBONE cycle input 34 | // Wire tri-state scl/sda 35 | wire scl_pad_i; 36 | wire scl_pad_o; 37 | wire scl_pad_io; 38 | wire scl_padoen_o; 39 | 40 | assign wb_cyc_i = wb_stb_i; 41 | assign scl_pad_i = scl_pad_io; 42 | assign scl_pad_io = scl_padoen_o ? 1'bZ : scl_pad_o; 43 | 44 | wire sda_pad_i; 45 | wire sda_pad_o; 46 | wire sda_pad_io; 47 | wire sda_padoen_o; 48 | 49 | assign sda_pad_i = sda_pad_io; 50 | assign sda_pad_io = sda_padoen_o ? 1'bZ : sda_pad_o; 51 | 52 | // Avalon doesn't have an asynchronous reset 53 | // set it to be inactive and just use synchronous reset 54 | // reset level is a parameter, 0 is the default (active-low reset) 55 | wire arst_i; 56 | 57 | assign arst_i = 1'b1; 58 | 59 | // Connect the top level I2C core 60 | i2c_master_top i2c_master_top_inst 61 | ( 62 | .wb_clk_i(wb_clk_i), .wb_rst_i(wb_rst_i), .arst_i(arst_i), 63 | 64 | .wb_adr_i(wb_adr_i), .wb_dat_i(wb_dat_i), .wb_dat_o(wb_dat_o), 65 | .wb_we_i(wb_we_i), .wb_stb_i(wb_stb_i), .wb_cyc_i(wb_cyc_i), 66 | .wb_ack_o(wb_ack_o), .wb_inta_o(wb_inta_o), 67 | 68 | .scl_pad_i(scl_pad_i), .scl_pad_o(scl_pad_o), .scl_padoen_o(scl_padoen_o), 69 | .sda_pad_i(sda_pad_i), .sda_pad_o(sda_pad_o), .sda_padoen_o(sda_padoen_o) 70 | ); 71 | 72 | endmodule 73 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/ip/i2c_opencores/i2c_opencores_sw.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # opencores_i2c_sw.tcl 3 | # 4 | 5 | # Create a new driver 6 | create_driver opencores_i2c_driver 7 | 8 | # Associate it with some hardware known as "opencores_i2c" 9 | set_sw_property hw_class_name opencores_i2c 10 | 11 | # The version of this driver 12 | set_sw_property version 11.0 13 | 14 | # This driver may be incompatible with versions of hardware less 15 | # than specified below. Updates to hardware and device drivers 16 | # rendering the driver incompatible with older versions of 17 | # hardware are noted with this property assignment. 18 | # 19 | # Multiple-Version compatibility was introduced in version 7.1; 20 | # prior versions are therefore excluded. 21 | set_sw_property min_compatible_hw_version 7.1 22 | 23 | # Initialize the driver in alt_sys_init() 24 | set_sw_property auto_initialize true 25 | 26 | # Location in generated BSP that above sources will be copied into 27 | set_sw_property bsp_subdirectory drivers 28 | 29 | 30 | # Interrupt properties: 31 | # This peripheral has an IRQ output but the driver doesn't currently 32 | # have any interrupt service routine. To ensure that the BSP tools 33 | # do not otherwise limit the BSP functionality for users of the 34 | # Nios II enhanced interrupt port, these settings advertise 35 | # compliance with both legacy and enhanced interrupt APIs, and to state 36 | # that any driver ISR supports preemption. If an interrupt handler 37 | # is added to this driver, these must be re-examined for validity. 38 | set_sw_property isr_preemption_supported true 39 | set_sw_property supported_interrupt_apis "legacy_interrupt_api enhanced_interrupt_api" 40 | 41 | # 42 | # Source file listings... 43 | # 44 | 45 | # C/C++ source files 46 | add_sw_property c_source HAL/src/opencores_i2c.c 47 | 48 | # Include files 49 | add_sw_property include_source HAL/inc/opencores_i2c.h 50 | add_sw_property include_source inc/opencores_i2c_regs.h 51 | 52 | # This driver supports HAL & UCOSII BSP (OS) types 53 | add_sw_property supported_bsp_type HAL 54 | add_sw_property supported_bsp_type UCOSII 55 | 56 | # End of file 57 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/ip/i2c_opencores/timescale.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 10ps 2 | 3 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/ip/lcd_pll/lcd_pll/lcd_pll_0002.qip: -------------------------------------------------------------------------------- 1 | set_instance_assignment -name PLL_COMPENSATION_MODE DIRECT -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 2 | 3 | set_instance_assignment -name PLL_AUTO_RESET OFF -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 4 | set_instance_assignment -name PLL_BANDWIDTH_PRESET AUTO -to "*lcd_pll_0002*|altera_pll:altera_pll_i*|*" 5 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/ip/lcd_pll/lcd_pll/lcd_pll_0002.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns/10ps 2 | module lcd_pll_0002( 3 | 4 | // interface 'refclk' 5 | input wire refclk, 6 | 7 | // interface 'reset' 8 | input wire rst, 9 | 10 | // interface 'outclk0' 11 | output wire outclk_0, 12 | 13 | // interface 'outclk1' 14 | output wire outclk_1, 15 | 16 | // interface 'locked' 17 | output wire locked 18 | ); 19 | 20 | altera_pll #( 21 | .fractional_vco_multiplier("false"), 22 | .reference_clock_frequency("50.0 MHz"), 23 | .operation_mode("direct"), 24 | .number_of_clocks(2), 25 | .output_clock_frequency0("30.000000 MHz"), 26 | .phase_shift0("0 ps"), 27 | .duty_cycle0(50), 28 | .output_clock_frequency1("30.000000 MHz"), 29 | .phase_shift1("25000 ps"), 30 | .duty_cycle1(50), 31 | .output_clock_frequency2("0 MHz"), 32 | .phase_shift2("0 ps"), 33 | .duty_cycle2(50), 34 | .output_clock_frequency3("0 MHz"), 35 | .phase_shift3("0 ps"), 36 | .duty_cycle3(50), 37 | .output_clock_frequency4("0 MHz"), 38 | .phase_shift4("0 ps"), 39 | .duty_cycle4(50), 40 | .output_clock_frequency5("0 MHz"), 41 | .phase_shift5("0 ps"), 42 | .duty_cycle5(50), 43 | .output_clock_frequency6("0 MHz"), 44 | .phase_shift6("0 ps"), 45 | .duty_cycle6(50), 46 | .output_clock_frequency7("0 MHz"), 47 | .phase_shift7("0 ps"), 48 | .duty_cycle7(50), 49 | .output_clock_frequency8("0 MHz"), 50 | .phase_shift8("0 ps"), 51 | .duty_cycle8(50), 52 | .output_clock_frequency9("0 MHz"), 53 | .phase_shift9("0 ps"), 54 | .duty_cycle9(50), 55 | .output_clock_frequency10("0 MHz"), 56 | .phase_shift10("0 ps"), 57 | .duty_cycle10(50), 58 | .output_clock_frequency11("0 MHz"), 59 | .phase_shift11("0 ps"), 60 | .duty_cycle11(50), 61 | .output_clock_frequency12("0 MHz"), 62 | .phase_shift12("0 ps"), 63 | .duty_cycle12(50), 64 | .output_clock_frequency13("0 MHz"), 65 | .phase_shift13("0 ps"), 66 | .duty_cycle13(50), 67 | .output_clock_frequency14("0 MHz"), 68 | .phase_shift14("0 ps"), 69 | .duty_cycle14(50), 70 | .output_clock_frequency15("0 MHz"), 71 | .phase_shift15("0 ps"), 72 | .duty_cycle15(50), 73 | .output_clock_frequency16("0 MHz"), 74 | .phase_shift16("0 ps"), 75 | .duty_cycle16(50), 76 | .output_clock_frequency17("0 MHz"), 77 | .phase_shift17("0 ps"), 78 | .duty_cycle17(50), 79 | .pll_type("General"), 80 | .pll_subtype("General") 81 | ) altera_pll_i ( 82 | .rst (rst), 83 | .outclk ({outclk_1, outclk_0}), 84 | .locked (locked), 85 | .fboutclk ( ), 86 | .fbclk (1'b0), 87 | .refclk (refclk) 88 | ); 89 | endmodule 90 | 91 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/.force_relink: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/.force_relink -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | tftlcd_ili9806g 4 | 5 | 6 | 7 | 8 | 9 | com.altera.sbtgui.project.makefileBuilder 10 | 11 | 12 | 13 | 14 | com.altera.sbtgui.project.makefileBuilder 15 | 16 | 17 | 18 | 19 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 20 | clean,full,incremental, 21 | 22 | 23 | 24 | 25 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 26 | full,incremental, 27 | 28 | 29 | 30 | 31 | 32 | org.eclipse.cdt.core.cnature 33 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 34 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 35 | org.eclipse.cdt.core.ccnature 36 | com.altera.sbtgui.project.SBTGUINature 37 | com.altera.sbtgui.project.SBTGUIAppNature 38 | com.altera.sbtgui.project.SBTGUIManagedNature 39 | 40 | 41 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/fonts/fonts.h: -------------------------------------------------------------------------------- 1 | #ifndef FONTS_H_ 2 | #define FONTS_H_ 3 | 4 | 5 | struct abc_font_struct { 6 | unsigned long extents_width; 7 | unsigned long extents_height; 8 | unsigned long extents_ascent; 9 | unsigned long extents_descent; 10 | unsigned long bounds_width; 11 | unsigned long bounds_height; 12 | unsigned char *char_alpha_map; 13 | unsigned long reserved; 14 | }; 15 | 16 | /* 17 | extern struct abc_font_struct arial_10[]; 18 | extern struct abc_font_struct arial_12[]; 19 | extern struct abc_font_struct arial_14[]; 20 | extern struct abc_font_struct arial_16[]; 21 | extern struct abc_font_struct arial_18[]; 22 | extern struct abc_font_struct arial_20[]; 23 | extern struct abc_font_struct arial_22[]; 24 | extern struct abc_font_struct arial_24[]; 25 | extern struct abc_font_struct courier_10[]; 26 | extern struct abc_font_struct courier_12[]; 27 | extern struct abc_font_struct courier_14[]; 28 | extern struct abc_font_struct courier_16[]; 29 | extern struct abc_font_struct courier_18[]; 30 | extern struct abc_font_struct courier_20[]; 31 | extern struct abc_font_struct courier_22[]; 32 | extern struct abc_font_struct courier_24[]; 33 | extern struct abc_font_struct timesnewroman_10[]; 34 | extern struct abc_font_struct timesnewroman_12[]; 35 | extern struct abc_font_struct timesnewroman_14[]; 36 | extern struct abc_font_struct timesnewroman_16[]; 37 | extern struct abc_font_struct timesnewroman_18[]; 38 | extern struct abc_font_struct timesnewroman_20[]; 39 | extern struct abc_font_struct timesnewroman_22[]; 40 | extern struct abc_font_struct timesnewroman_24[];*/ 41 | 42 | extern struct abc_font_struct tahomabold_32[]; 43 | extern struct abc_font_struct tahomabold_20[]; 44 | 45 | #endif /*FONTS_H_*/ 46 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/geometry.c: -------------------------------------------------------------------------------- 1 | #include "terasic_includes.h" 2 | #include "geometry.h" 3 | 4 | //#define BOUND(x, mini, maxi) ((x<(mini)?(mini):( (x>(maxi))?(maxi):(x) ))) 5 | 6 | //#define COPY_POINT(pt_des, pt_src) memcpy(&pt_des, &pt_src,sizeof(POINT)) 7 | 8 | bool IsPtInRect(POINT *pt, RECT *rc){ 9 | bool bYes = FALSE; 10 | 11 | if (pt->x >= rc->left && pt->x <= rc->right && pt->y >= rc->top && pt->y <= rc->bottom) 12 | bYes = TRUE; 13 | 14 | return bYes; 15 | } 16 | 17 | void PtSet(POINT *pt, int x, int y){ 18 | pt->x = x; 19 | pt->y = y; 20 | } 21 | 22 | void RectSet(RECT *rc, int left, int right, int top, int bottom){ 23 | rc->left = left; 24 | rc->right = right; 25 | rc->top = top; 26 | rc->bottom = bottom; 27 | } 28 | 29 | void RectInflate(RECT *rc, int x, int y){ 30 | rc->left -= x; 31 | rc->right += x; 32 | rc->top -= y; 33 | rc->bottom += y; 34 | } 35 | 36 | void RectOffset(RECT *rc, int x, int y){ 37 | rc->left += x; 38 | rc->right += x; 39 | rc->top += y; 40 | rc->bottom += y; 41 | } 42 | 43 | void RectCopy(RECT *rcDes, RECT *rcSrc){ 44 | rcDes->left = rcSrc->left; 45 | rcDes->right = rcSrc->right; 46 | rcDes->top = rcSrc->top; 47 | rcDes->bottom = rcSrc->bottom; 48 | } 49 | 50 | int RectWidth(RECT *rc){ 51 | return (rc->right-rc->left); 52 | } 53 | 54 | int RectHeight(RECT *rc){ 55 | return (rc->bottom-rc->top); 56 | } 57 | 58 | int PtDistance(POINT *pt1, POINT *pt2){ 59 | int nDistance; 60 | int a, b; 61 | a = pt1->x - pt2->x; 62 | b = pt1->y - pt2->y; 63 | nDistance = a*a + b*b; 64 | nDistance = sqrt(nDistance); 65 | 66 | return nDistance; 67 | } 68 | 69 | void PtCopy(POINT *ptDes, POINT *ptSrc){ 70 | ptDes->x = ptSrc->x; 71 | ptDes->y = ptSrc->y; 72 | } 73 | 74 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/geometry.h: -------------------------------------------------------------------------------- 1 | #ifndef GEOMETRY_H_ 2 | #define GEOMETRY_H_ 3 | 4 | typedef struct{ 5 | int left; 6 | int right; 7 | int top; 8 | int bottom; 9 | }RECT; 10 | 11 | typedef struct{ 12 | int x; 13 | int y; 14 | }POINT; 15 | 16 | bool IsPtInRect(POINT *pt, RECT *rc); 17 | void PtSet(POINT *pt, int x, int y); 18 | void RectSet(RECT *rc, int left, int right, int top, int bottom); 19 | void RectInflate(RECT *rc, int x, int y); 20 | void RectOffset(RECT *rc, int x, int y); 21 | void RectCopy(RECT *rcDes, RECT *rcSrc); 22 | int RectWidth(RECT *rc); 23 | int RectHeight(RECT *rc); 24 | int PtDistance(POINT *pt1, POINT *pt2); 25 | void PtCopy(POINT *ptDes, POINT *ptSrc); 26 | 27 | 28 | #endif /*GEOMETRY_H_*/ 29 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/gesture.h: -------------------------------------------------------------------------------- 1 | #ifndef GESTURE_H_ 2 | #define GESTURE_H_ 3 | 4 | struct bmp_struct{ 5 | unsigned int width; 6 | unsigned int height; 7 | unsigned int bytes_per_pixel; /* 3:RGB, 4:RGBA */ 8 | unsigned char pixel_data[60 * 1560 * 3 + 1]; 9 | }; 10 | 11 | #endif /*GESTURE_H_*/ 12 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/graphic_lib/simple_text.h: -------------------------------------------------------------------------------- 1 | #ifndef VIP_TEXT_H_ 2 | #define VIP_TEXT_H_ 3 | 4 | #include "../vip_fr.h" 5 | #include "fonts.h" 6 | 7 | 8 | int vid_print_string_alpha(int horiz_offset, int vert_offset, int color, int background_color, struct abc_font_struct font[], alt_video_display * display, char string[]); 9 | int vid_print_char_alpha (int horiz_offset, int vert_offset, int color, char character, int background_color, struct abc_font_struct font[], alt_video_display * display); 10 | 11 | #endif /*VIP_TEXT_H_*/ 12 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/gui.h: -------------------------------------------------------------------------------- 1 | #ifndef GUI_H_ 2 | #define GUI_H_ 3 | 4 | #include "multi_touch2.h" 5 | 6 | void GUI(MTC2_INFO *pTouch); 7 | 8 | #endif /*GUI_H_*/ 9 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/lcd.h: -------------------------------------------------------------------------------- 1 | #ifndef __LCD_H 2 | #define __LCD_H 3 | typedef unsigned char u8; 4 | typedef unsigned short u16; 5 | typedef unsigned int u32; 6 | 7 | //Lcd初始化及其低级控制函数 8 | void Lcd_Initialize(void); 9 | void Lcd_WR_Start(void); 10 | //Lcd高级控制函数 11 | void Lcd_ColorBox(u16 x,u16 y,u16 xLong,u16 yLong,u16 Color); 12 | void DrawPixel(u16 x, u16 y, u16 Color); 13 | u16 ReadPixel(u16 x,u8 y); 14 | void LCD_Fill_Pic(u16 x, u16 y,u16 pic_H, u16 pic_V, const unsigned char* pic); 15 | void BlockWrite(unsigned int Xstart,unsigned int Xend,unsigned int Ystart,unsigned int Yend); 16 | 17 | 18 | void delay_ms (u32 tm); 19 | 20 | /*定义常见颜色*/ 21 | // #define red 0x001f 22 | // #define blue 0xf800 23 | // #define green 0x07e0 24 | // #define black 0x0000 25 | // #define white 0xffff 26 | // #define yellow 0x07ff 27 | // #define orange 0x05bf 28 | // #define Chocolate4 0x4451 29 | // #define Grey 0xefbd//灰色 30 | 31 | #define White 0xFFFF 32 | #define Black 0x0000 33 | #define Blue 0x001F 34 | #define Blue2 0x051F 35 | #define Red 0xF800 36 | #define Magenta 0xF81F 37 | #define Green 0x07E0 38 | #define Cyan 0x7FFF 39 | #define Yellow 0xFFE0 40 | 41 | 42 | #endif 43 | 44 | 45 | 46 | 47 | 48 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/main.c: -------------------------------------------------------------------------------- 1 | // -------------------------------------------------------------------- 2 | // Copyright (c) 2011 by Terasic Technologies Inc. 3 | // -------------------------------------------------------------------- 4 | // 5 | // Permission: 6 | // 7 | // Terasic grants permission to use and modify this code for use 8 | // in synthesis for all Terasic Development Boards and Altera Development 9 | // Kits made by Terasic. Other use of this code, including the selling 10 | // ,duplication, or modification of any portion is strictly prohibited. 11 | // 12 | // Disclaimer: 13 | // 14 | // This VHDL/Verilog or C/C++ source code is intended as a design reference 15 | // which illustrates how these types of functions can be implemented. 16 | // It is the user's responsibility to verify their design for 17 | // consistency and functionality through the use of formal 18 | // verification methods. Terasic provides no warranty regarding the use 19 | // or functionality of this code. 20 | // 21 | // -------------------------------------------------------------------- 22 | // 23 | // Terasic Technologies Inc 24 | // 356 Fu-Shin E. Rd Sec. 1. JhuBei City, 25 | // HsinChu County, Taiwan 26 | // 302 27 | // 28 | // web: http://www.terasic.com/ 29 | // email: support@terasic.com 30 | // 31 | // -------------------------------------------------------------------- 32 | 33 | 34 | #include "terasic_includes.h" 35 | //#include "i2c.h" 36 | #include "lcd.h" 37 | #include "I2C_core.h" 38 | #include "multi_touch2.h" 39 | #include "gui.h" 40 | #include "system.h" 41 | 42 | 43 | int main() 44 | { 45 | Lcd_Initialize(); 46 | // touch 47 | MTC2_INFO *pTouch; 48 | const bool bVPG = ((IORD(KEY_BASE, 0x00) & 0x01) == 0x00)?TRUE:FALSE; 49 | IOWR(LED_BASE, 0x00, 0xFF); // high-active 50 | // if (LCD_Open()){ 51 | // LCD_TextOut(bVPG?"Multi-Touch\nPattern\n" : "Multi-Touch\nPainter\n"); 52 | // } 53 | printf("Terasic Painter Demo\r\n"); 54 | 55 | oc_i2c_init(I2C_OPENCORES_0_BASE); 56 | 57 | usleep(1000); 58 | 59 | pTouch=MTC2_Init(I2C_OPENCORES_0_BASE,LCD_TOUCH_INT_BASE,LCD_TOUCH_INT_IRQ); 60 | if (!pTouch){ 61 | printf("Failed to init multi-touch\r\n"); 62 | }else{ 63 | printf("Init touch successfully\r\n"); 64 | 65 | } 66 | if (bVPG) 67 | GUI_VPG(pTouch); // enter vpg mode when users press KEY0 68 | GUI(pTouch); 69 | return 0; 70 | } 71 | 72 | 73 | 74 | 75 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/readme.txt: -------------------------------------------------------------------------------- 1 | Readme - Hello World Software Example 2 | 3 | DESCRIPTION: 4 | Simple program that prints "Hello from Nios II" 5 | 6 | The memory footprint of this hosted application is intended to be small (under 100 kbytes) by default 7 | using a standard reference deisgn. 8 | 9 | For an even smaller, reduced footprint version of this template, and an explanation of how 10 | to reduce the memory footprint for a given application, see the 11 | "small_hello_world" template. 12 | 13 | 14 | PERIPHERALS USED: 15 | This example exercises the following peripherals: 16 | - STDOUT device (UART or JTAG UART) 17 | 18 | SOFTWARE SOURCE FILES: 19 | This example includes the following software source files: 20 | - hello_world.c: Everyone needs a Hello World program, right? 21 | 22 | BOARD/HOST REQUIREMENTS: 23 | This example requires only a JTAG connection with a Nios Development board. If 24 | the host communication settings are changed from JTAG UART (default) to use a 25 | conventional UART, a serial cable between board DB-9 connector and the host is 26 | required. 27 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/terasic_includes.h: -------------------------------------------------------------------------------- 1 | // -------------------------------------------------------------------- 2 | // Copyright (c) 2010 by Terasic Technologies Inc. 3 | // -------------------------------------------------------------------- 4 | // 5 | // Permission: 6 | // 7 | // Terasic grants permission to use and modify this code for use 8 | // in synthesis for all Terasic Development Boards and Altera Development 9 | // Kits made by Terasic. Other use of this code, including the selling 10 | // ,duplication, or modification of any portion is strictly prohibited. 11 | // 12 | // Disclaimer: 13 | // 14 | // This VHDL/Verilog or C/C++ source code is intended as a design reference 15 | // which illustrates how these types of functions can be implemented. 16 | // It is the user's responsibility to verify their design for 17 | // consistency and functionality through the use of formal 18 | // verification methods. Terasic provides no warranty regarding the use 19 | // or functionality of this code. 20 | // 21 | // -------------------------------------------------------------------- 22 | // 23 | // Terasic Technologies Inc 24 | // 356 Fu-Shin E. Rd Sec. 1. JhuBei City, 25 | // HsinChu County, Taiwan 26 | // 302 27 | // 28 | // web: http://www.terasic.com/ 29 | // email: support@terasic.com 30 | // 31 | // -------------------------------------------------------------------- 32 | 33 | #ifndef TERASIC_INCLUDES_H_ 34 | #define TERASIC_INCLUDES_H_ 35 | 36 | #include 37 | #include // malloc, free 38 | #include 39 | #include 40 | #include // usleep (unix standard?) 41 | #include "sys/alt_flash.h" 42 | #include "sys/alt_flash_types.h" 43 | #include "io.h" 44 | #include "alt_types.h" // alt_u32 45 | #include "altera_avalon_pio_regs.h" //IOWR_ALTERA_AVALON_PIO_DATA 46 | #include "sys/alt_irq.h" // interrupt 47 | #include "sys/alt_alarm.h" // time tick function (alt_nticks(), alt_ticks_per_second()) 48 | #include "sys/alt_timestamp.h" 49 | #include "sys/alt_stdio.h" 50 | #include "system.h" 51 | #include 52 | 53 | 54 | #define DEBUG_DUMP /*printf */ 55 | 56 | 57 | typedef int bool; 58 | #define TRUE 1 59 | #define FALSE 0 60 | 61 | #endif /*TERASIC_INCLUDES_H_*/ 62 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/I2C_core.h: -------------------------------------------------------------------------------- 1 | /* 2 | * I2C_ocre.h 3 | * 4 | * Created on: 2014-6-3 5 | * Author: niubility 6 | */ 7 | 8 | #ifndef I2C_OCRE_H_ 9 | #define I2C_OCRE_H_ 10 | #include "alt_types.h" // alt_u32 11 | #include "terasic_includes.h" 12 | 13 | 14 | bool oc_i2c_init(alt_32 i2c_base); 15 | bool ACK_single_check(alt_32 i2c_base); 16 | bool ACK_check(alt_32 i2c_base); 17 | bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_u8 *pData, int nWriteLength); 18 | bool ACK_judge_for_read(alt_32 i2c_base); 19 | bool OC_I2C_Read(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_u8 *pData8, int nReadLength); 20 | bool OC_I2CL_Write(alt_32 i2c_base,alt_u8 device_address,int sub_address,alt_u8 *pData, int nWriteLength); 21 | bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address,int sub_address, alt_u8 *pData8); 22 | 23 | #endif /* I2C_OCRE_H_ */ 24 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/multi_touch2.h: -------------------------------------------------------------------------------- 1 | #ifndef MULTI_TOUCH2_H_ 2 | #define MULTI_TOUCH2_H_ 3 | 4 | #include "queue.h" 5 | 6 | #define TOUCH_QUEUE_SIZE 32 7 | 8 | //////////////////////////////////// 9 | // 10 | // 8-way ST Pan 11 | #define MTC_NO_GESTURE 0x00 12 | #define MTC_ST_UP 0x1c 13 | #define MTC_ST_LEFT 0x10 14 | #define MTC_ST_DOWN 0x14 15 | #define MTC_ST_RIGHT 0x18 16 | 17 | // MT Zoom 18 | #define MTC_ZOOM_IN 0x48 19 | #define MTC_ZOOM_OUT 0x49 20 | 21 | 22 | 23 | typedef struct{ 24 | alt_u32 TOUCH_I2C_BASE; 25 | alt_u32 TOUCH_INT_BASE; 26 | alt_u32 INT_IRQ_NUM; 27 | QUEUE_STRUCT *pQueue; 28 | }MTC2_INFO; 29 | 30 | 31 | typedef struct{ 32 | //getture not support this version 33 | alt_u8 Event; 34 | alt_u8 TouchNum; 35 | alt_u16 x1; 36 | alt_u16 y1; 37 | alt_u16 x2; 38 | alt_u16 y2; 39 | alt_u16 x3; 40 | alt_u16 y3; 41 | alt_u16 x4; 42 | alt_u16 y4; 43 | alt_u16 x5; 44 | alt_u16 y5; 45 | }MTC2_EVENT; 46 | 47 | 48 | MTC2_INFO* MTC2_Init(alt_u32 TOUCH_I2C_BASE,alt_u32 TOUCH_INT_BASE, alt_u32 INT_IRQ_NUM); 49 | void MTC2_UnInit(MTC2_INFO *p); 50 | //,int X3,int Y3,int X4,int Y4,int X5,int Y5 51 | bool MTC2_GetStatus(MTC2_INFO *p,alt_u8 *Event, alt_u8 *TouchNum, int *X1, int *Y1, int *X2, int *Y2,int *X3, int *Y3, int *X4, int *Y4,int *X5,int *Y5); 52 | //void MTC2_ShowEventText(alt_u8 Event); 53 | void MTC2_ClearEvent(MTC2_INFO *p); 54 | 55 | //void MTC_QueryEventText(alt_u8 Event, char szText[32]); 56 | 57 | 58 | 59 | #endif /*MULTI_TOUCH_H_*/ 60 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/queue.c: -------------------------------------------------------------------------------- 1 | #include "terasic_includes.h" 2 | #include "queue.h" 3 | 4 | 5 | 6 | 7 | QUEUE_STRUCT* QUEUE_New(int nQueueNum){ 8 | int nSize; 9 | QUEUE_STRUCT *pQueue; 10 | nSize = sizeof(QUEUE_STRUCT)+nQueueNum*sizeof(alt_u32); 11 | pQueue = (QUEUE_STRUCT *)malloc(nSize); 12 | memset((void *)pQueue, 0, nSize); 13 | pQueue->num = nQueueNum; 14 | return pQueue; 15 | } 16 | 17 | void QUEUE_Delete(QUEUE_STRUCT *pQueue){ 18 | free(pQueue); 19 | } 20 | 21 | bool QUEUE_IsEmpty(QUEUE_STRUCT *pQueue){ 22 | if (pQueue->front == pQueue->rear) 23 | return TRUE; 24 | return FALSE; 25 | } 26 | 27 | bool QUEUE_IsFull(QUEUE_STRUCT *pQueue){ 28 | if (((pQueue->front+1)%pQueue->num) == pQueue->rear) 29 | return TRUE; 30 | return FALSE; 31 | } 32 | 33 | bool QUEUE_Push(QUEUE_STRUCT *pQueue, alt_u32 data32){ 34 | if (QUEUE_IsFull(pQueue)) 35 | return FALSE; 36 | pQueue->data[pQueue->front] = data32; 37 | pQueue->front = (pQueue->front+1)%pQueue->num; 38 | return TRUE; 39 | } 40 | 41 | alt_u32 QUEUE_Pop(QUEUE_STRUCT *pQueue){ 42 | alt_u32 data32; 43 | if (QUEUE_IsEmpty(pQueue)) 44 | return 0; 45 | data32 = pQueue->data[pQueue->rear]; 46 | pQueue->rear = (pQueue->rear+1)%pQueue->num; 47 | return data32; 48 | } 49 | 50 | void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 51 | pQueue->front = 0; 52 | pQueue->rear = 0; 53 | } 54 | 55 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/queue.h: -------------------------------------------------------------------------------- 1 | #ifndef QUEUE_H_ 2 | #define QUEUE_H_ 3 | 4 | 5 | typedef struct{ 6 | alt_u32 num; 7 | alt_u32 front; 8 | alt_u32 rear; 9 | alt_u32 data[0]; 10 | alt_u32 mydata[2]; // custom data 11 | }QUEUE_STRUCT; 12 | 13 | QUEUE_STRUCT* QUEUE_New(int nQueueNum); 14 | void QUEUE_Delete(QUEUE_STRUCT *pQueue); 15 | bool QUEUE_IsEmpty(QUEUE_STRUCT *pQueue); 16 | bool QUEUE_IsFull(QUEUE_STRUCT *pQueue); 17 | bool QUEUE_Push(QUEUE_STRUCT *pQueue, alt_u32 data32); 18 | alt_u32 QUEUE_Pop(QUEUE_STRUCT *pQueue); 19 | void QUEUE_Empty(QUEUE_STRUCT *pQueue); 20 | 21 | #endif /*QUEUE_H_*/ 22 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/terasic_lib/terasic_includes.h: -------------------------------------------------------------------------------- 1 | // -------------------------------------------------------------------- 2 | // Copyright (c) 2010 by Terasic Technologies Inc. 3 | // -------------------------------------------------------------------- 4 | // 5 | // Permission: 6 | // 7 | // Terasic grants permission to use and modify this code for use 8 | // in synthesis for all Terasic Development Boards and Altera Development 9 | // Kits made by Terasic. Other use of this code, including the selling 10 | // ,duplication, or modification of any portion is strictly prohibited. 11 | // 12 | // Disclaimer: 13 | // 14 | // This VHDL/Verilog or C/C++ source code is intended as a design reference 15 | // which illustrates how these types of functions can be implemented. 16 | // It is the user's responsibility to verify their design for 17 | // consistency and functionality through the use of formal 18 | // verification methods. Terasic provides no warranty regarding the use 19 | // or functionality of this code. 20 | // 21 | // -------------------------------------------------------------------- 22 | // 23 | // Terasic Technologies Inc 24 | // 356 Fu-Shin E. Rd Sec. 1. JhuBei City, 25 | // HsinChu County, Taiwan 26 | // 302 27 | // 28 | // web: http://www.terasic.com/ 29 | // email: support@terasic.com 30 | // 31 | // -------------------------------------------------------------------- 32 | 33 | #ifndef TERASIC_INCLUDES_H_ 34 | #define TERASIC_INCLUDES_H_ 35 | 36 | #include 37 | #include // malloc, free 38 | #include 39 | #include 40 | #include // usleep (unix standard?) 41 | #include "sys/alt_flash.h" 42 | #include "sys/alt_flash_types.h" 43 | #include "io.h" 44 | #include "alt_types.h" // alt_u32 45 | #include "altera_avalon_pio_regs.h" //IOWR_ALTERA_AVALON_PIO_DATA 46 | #include "sys/alt_irq.h" // interrupt 47 | #include "sys/alt_alarm.h" // time tick function (alt_nticks(), alt_ticks_per_second()) 48 | #include "sys/alt_timestamp.h" 49 | #include "sys/alt_stdio.h" 50 | #include "system.h" 51 | #include 52 | #include "debug.h" 53 | 54 | #define DEBUG_DUMP /*printf */ 55 | 56 | 57 | typedef int bool; 58 | #define TRUE 1 59 | #define FALSE 0 60 | 61 | #endif /*TERASIC_INCLUDES_H_*/ 62 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g/vip_fr.h: -------------------------------------------------------------------------------- 1 | #ifndef VIP_FR_H_ 2 | #define VIP_FR_H_ 3 | 4 | typedef struct{ 5 | alt_u32 VipBase; 6 | void* Frame0_Base; 7 | void* Frame1_Base; 8 | // alt_u32 Frame_Width; 9 | // alt_u32 Frame_Height; 10 | alt_u8 DisplayFrame; // 0 or 1 11 | 12 | // for altera vip library 13 | int color_depth; 14 | int width; 15 | int height; 16 | int bytes_per_pixel; 17 | int interlace; 18 | }VIP_FRAME_READER; 19 | 20 | 21 | #define alt_video_display VIP_FRAME_READER 22 | 23 | VIP_FRAME_READER* VIPFR_Init(alt_u32 VipBase, void* Frame0_Base, void* Frame1_Base, alt_u32 Frame_Width, alt_u32 Frame_Height); 24 | void VIPFR_UnInit(VIP_FRAME_READER* p); 25 | void VIPFR_Go(VIP_FRAME_READER* p, bool bGo); 26 | void* VIPFR_GetDrawFrame(VIP_FRAME_READER* p); 27 | void VIPFR_ActiveDrawFrame(VIP_FRAME_READER* p); 28 | void VIPFR_ReserveBackground(VIP_FRAME_READER* p); 29 | void VIPFR_SetFrameSize(VIP_FRAME_READER* p, int width, int height); 30 | // 31 | 32 | 33 | 34 | 35 | #endif /*VIP_FR_H_*/ 36 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g_bsp/.force_relink: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g_bsp/.force_relink -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g_bsp/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | tftlcd_ili9806g_bsp 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 25 | org.eclipse.cdt.core.ccnature 26 | com.altera.sbtgui.project.SBTGUINature 27 | com.altera.sbtgui.project.SBTGUIBspNature 28 | 29 | 30 | -------------------------------------------------------------------------------- /Demonstration/DE1_SOC_MIL_PAINTER/software/tftlcd_ili9806g_bsp/create-this-bsp: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # 3 | # This script creates the ucosii_net_zipfs Board Support Package (BSP). 4 | 5 | BSP_TYPE=hal 6 | BSP_DIR=. 7 | SOPC_DIR=../../ 8 | SOPC_FILE=../../MIL_PAINTER.sopcinfo 9 | NIOS2_BSP_ARGS="" 10 | CPU_NAME= 11 | 12 | if [ -n "$CPU_NAME" ]; then 13 | NIOS2_BSP_ARGS="$NIOS2_BSP_ARGS --cpu-name $CPU_NAME" 14 | fi 15 | 16 | # Don't run make if create-this-app script is called with --no-make arg 17 | SKIP_MAKE= 18 | while [ $# -gt 0 ] 19 | do 20 | case "$1" in 21 | --no-make) 22 | SKIP_MAKE=1 23 | ;; 24 | *) 25 | NIOS2_BSP_ARGS="$NIOS2_BSP_ARGS $1" 26 | ;; 27 | esac 28 | shift 29 | done 30 | 31 | 32 | # Run nios2-bsp utility to create a hal BSP in this directory 33 | # for the system with a .sopc file in $SOPC_FILE. 34 | # Deprecating $SOPC_DIR in 10.1. Multiple .sopcinfo files in a directory may exist. 35 | 36 | if [ -z "$SOPC_FILE" ]; then 37 | echo "WARNING: Use of a directory for locating a .sopcinfo file is deprecated in 10.1. Multiple .sopcinfo files may exist. You must specify the full .sopcinfo path." 38 | cmd="nios2-bsp $BSP_TYPE $BSP_DIR $SOPC_DIR $NIOS2_BSP_ARGS" 39 | else 40 | cmd="nios2-bsp $BSP_TYPE $BSP_DIR $SOPC_FILE $NIOS2_BSP_ARGS" 41 | fi 42 | 43 | 44 | echo "create-this-bsp: Running \"$cmd\"" 45 | $cmd || { 46 | echo "$cmd failed" 47 | exit 1 48 | } 49 | if [ -z "$SKIP_MAKE" ]; then 50 | echo "create-this-bsp: Running make" 51 | make 52 | fi 53 | -------------------------------------------------------------------------------- /IP/I8080_Controller/I8080_Controller.v: -------------------------------------------------------------------------------- 1 | //without read function 2 | // Revision History : 3 | // -------------------------------------------------------------------- 4 | // Ver :| Author :| Mod. Date :| Changes Made: 5 | // -------------------------------------------------------------------- 6 | 7 | module I8080_Controller#( 8 | I8080_BUS_WIDTH = 32 9 | )( 10 | // global clock & reset 11 | clk, 12 | reset_n, 13 | 14 | // mm slave 15 | s_chipselect_n, 16 | // s_read, 17 | s_write_n, 18 | // s_readdata, 19 | s_writedata, 20 | s_address, 21 | 22 | i8080_cs, 23 | i8080_rs,//command/data 24 | i8080_rd, 25 | i8080_wr, 26 | i8080_data, 27 | ); 28 | 29 | // global clock & reset 30 | input clk; 31 | input reset_n; 32 | 33 | // mm slave 34 | input s_chipselect_n; 35 | //input s_read; 36 | input s_write_n; 37 | //output reg [31:0] s_readdata; 38 | input [31:0] s_writedata; 39 | input s_address; 40 | 41 | output i8080_cs; 42 | output i8080_rs;//command/data 43 | output i8080_rd; 44 | output i8080_wr; 45 | output [31:0] i8080_data; 46 | 47 | 48 | assign i8080_cs = s_chipselect_n; 49 | assign i8080_rs = s_address; 50 | assign i8080_rd = 1'b1; 51 | assign i8080_wr = s_write_n; 52 | assign i8080_data = s_writedata[31:0]; 53 | 54 | 55 | endmodule 56 | -------------------------------------------------------------------------------- /IP/i2c_opencores/Docs/i2c_specs.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/IP/i2c_opencores/Docs/i2c_specs.pdf -------------------------------------------------------------------------------- /IP/i2c_opencores/HAL/inc/i2c_opencores.h: -------------------------------------------------------------------------------- 1 | #ifndef __I2C_OPENCORES_H__ 2 | #define __I2C_OPENCORES_H__ 3 | 4 | 5 | #include "alt_types.h" 6 | 7 | #ifdef __cplusplus 8 | extern "C" 9 | { 10 | #endif /* __cplusplus */ 11 | 12 | 13 | 14 | 15 | void I2C_init(alt_u32 base,alt_u32 clk,alt_u32 speed); 16 | int I2C_start(alt_u32 base, alt_u32 add, alt_u32 read); 17 | alt_u32 I2C_read(alt_u32 base,alt_u32 last); 18 | alt_u32 I2C_write(alt_u32 base,alt_u8 data, alt_u32 last); 19 | #define I2C_OK (0) 20 | #define I2C_ACK (0) 21 | #define I2C_NOACK (1) 22 | #define I2C_ABITRATION_LOST (2) 23 | 24 | #define I2C_OPENCORES_INSTANCE(name, dev) extern int alt_no_storage 25 | #define I2C_OPENCORES_INIT(name, dev) while (0) 26 | 27 | #ifdef __cplusplus 28 | } 29 | #endif /* __cplusplus */ 30 | 31 | #endif /* __I2C_OPENCORES_H__ */ 32 | -------------------------------------------------------------------------------- /IP/i2c_opencores/HAL/src/component.mk: -------------------------------------------------------------------------------- 1 | # ******************************************************************************* 2 | # * * 3 | # * License Agreement * 4 | # * * 5 | # * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * 6 | # * All rights reserved. * 7 | # * * 8 | # * Permission is hereby granted, free of charge, to any person obtaining a * 9 | # * copy of this software and associated documentation files (the "Software"), * 10 | # * to deal in the Software without restriction, including without limitation * 11 | # * the rights to use, copy, modify, merge, publish, distribute, sublicense, * 12 | # * and/or sell copies of the Software, and to permit persons to whom the * 13 | # * Software is furnished to do so, subject to the following conditions: * 14 | # * * 15 | # * The above copyright notice and this permission notice shall be included in * 16 | # * all copies or substantial portions of the Software. * 17 | # * * 18 | # * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * 19 | # * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * 20 | # * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * 21 | # * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * 22 | # * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * 23 | # * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * 24 | # * DEALINGS IN THE SOFTWARE. * 25 | # * * 26 | # * This agreement shall be governed in all respects by the laws of the State * 27 | # * of California and by the laws of the United States of America. * 28 | # * * 29 | # * Altera does not recommend, suggest or require that this reference design * 30 | # * file be used in conjunction or combination with any other product. * 31 | # ******************************************************************************* 32 | 33 | # List all source files supplied by this component. 34 | 35 | C_LIB_SRCS += i2c_opencores.c 36 | 37 | ASM_LIB_SRCS += 38 | 39 | -------------------------------------------------------------------------------- /IP/i2c_opencores/i2c_opencores.v: -------------------------------------------------------------------------------- 1 | // 2 | // fixed for 9.1 jan 21 2010 cruben 3 | // 4 | //`include "timescale.v" 5 | //`include "i2c_master_defines.v" 6 | 7 | module i2c_opencores 8 | ( 9 | wb_clk_i, wb_rst_i, wb_adr_i, wb_dat_i, wb_dat_o, 10 | wb_we_i, wb_stb_i, /*wb_cyc_i,*/ wb_ack_o, wb_inta_o, 11 | scl_pad_io, sda_pad_io 12 | ); 13 | 14 | 15 | // Common bus signals 16 | input wb_clk_i; // WISHBONE clock 17 | input wb_rst_i; // WISHBONE reset 18 | 19 | // Slave signals 20 | input [2:0] wb_adr_i; // WISHBONE address input 21 | input [7:0] wb_dat_i; // WISHBONE data input 22 | output [7:0] wb_dat_o; // WISHBONE data output 23 | input wb_we_i; // WISHBONE write enable input 24 | input wb_stb_i; // WISHBONE strobe input 25 | //input wb_cyc_i; // WISHBONE cycle input 26 | output wb_ack_o; // WISHBONE acknowledge output 27 | output wb_inta_o; // WISHBONE interrupt output 28 | 29 | // I2C signals 30 | inout scl_pad_io; // I2C clock io 31 | inout sda_pad_io; // I2C data io 32 | 33 | wire wb_cyc_i; // WISHBONE cycle input 34 | // Wire tri-state scl/sda 35 | wire scl_pad_i; 36 | wire scl_pad_o; 37 | wire scl_pad_io; 38 | wire scl_padoen_o; 39 | 40 | assign wb_cyc_i = wb_stb_i; 41 | assign scl_pad_i = scl_pad_io; 42 | assign scl_pad_io = scl_padoen_o ? 1'bZ : scl_pad_o; 43 | 44 | wire sda_pad_i; 45 | wire sda_pad_o; 46 | wire sda_pad_io; 47 | wire sda_padoen_o; 48 | 49 | assign sda_pad_i = sda_pad_io; 50 | assign sda_pad_io = sda_padoen_o ? 1'bZ : sda_pad_o; 51 | 52 | // Avalon doesn't have an asynchronous reset 53 | // set it to be inactive and just use synchronous reset 54 | // reset level is a parameter, 0 is the default (active-low reset) 55 | wire arst_i; 56 | 57 | assign arst_i = 1'b1; 58 | 59 | // Connect the top level I2C core 60 | i2c_master_top i2c_master_top_inst 61 | ( 62 | .wb_clk_i(wb_clk_i), .wb_rst_i(wb_rst_i), .arst_i(arst_i), 63 | 64 | .wb_adr_i(wb_adr_i), .wb_dat_i(wb_dat_i), .wb_dat_o(wb_dat_o), 65 | .wb_we_i(wb_we_i), .wb_stb_i(wb_stb_i), .wb_cyc_i(wb_cyc_i), 66 | .wb_ack_o(wb_ack_o), .wb_inta_o(wb_inta_o), 67 | 68 | .scl_pad_i(scl_pad_i), .scl_pad_o(scl_pad_o), .scl_padoen_o(scl_padoen_o), 69 | .sda_pad_i(sda_pad_i), .sda_pad_o(sda_pad_o), .sda_padoen_o(sda_padoen_o) 70 | ); 71 | 72 | endmodule 73 | -------------------------------------------------------------------------------- /IP/i2c_opencores/i2c_opencores_sw.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # opencores_i2c_sw.tcl 3 | # 4 | 5 | # Create a new driver 6 | create_driver opencores_i2c_driver 7 | 8 | # Associate it with some hardware known as "opencores_i2c" 9 | set_sw_property hw_class_name opencores_i2c 10 | 11 | # The version of this driver 12 | set_sw_property version 11.0 13 | 14 | # This driver may be incompatible with versions of hardware less 15 | # than specified below. Updates to hardware and device drivers 16 | # rendering the driver incompatible with older versions of 17 | # hardware are noted with this property assignment. 18 | # 19 | # Multiple-Version compatibility was introduced in version 7.1; 20 | # prior versions are therefore excluded. 21 | set_sw_property min_compatible_hw_version 7.1 22 | 23 | # Initialize the driver in alt_sys_init() 24 | set_sw_property auto_initialize true 25 | 26 | # Location in generated BSP that above sources will be copied into 27 | set_sw_property bsp_subdirectory drivers 28 | 29 | 30 | # Interrupt properties: 31 | # This peripheral has an IRQ output but the driver doesn't currently 32 | # have any interrupt service routine. To ensure that the BSP tools 33 | # do not otherwise limit the BSP functionality for users of the 34 | # Nios II enhanced interrupt port, these settings advertise 35 | # compliance with both legacy and enhanced interrupt APIs, and to state 36 | # that any driver ISR supports preemption. If an interrupt handler 37 | # is added to this driver, these must be re-examined for validity. 38 | set_sw_property isr_preemption_supported true 39 | set_sw_property supported_interrupt_apis "legacy_interrupt_api enhanced_interrupt_api" 40 | 41 | # 42 | # Source file listings... 43 | # 44 | 45 | # C/C++ source files 46 | add_sw_property c_source HAL/src/opencores_i2c.c 47 | 48 | # Include files 49 | add_sw_property include_source HAL/inc/opencores_i2c.h 50 | add_sw_property include_source inc/opencores_i2c_regs.h 51 | 52 | # This driver supports HAL & UCOSII BSP (OS) types 53 | add_sw_property supported_bsp_type HAL 54 | add_sw_property supported_bsp_type UCOSII 55 | 56 | # End of file 57 | -------------------------------------------------------------------------------- /IP/i2c_opencores/timescale.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 10ps 2 | 3 | -------------------------------------------------------------------------------- /Linux_driver/4.19.x/tinydrm/tinydrm-ili9806.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2017 Noralf Trønnes 3 | * 4 | * This program is free software; you can redistribute it and/or modify 5 | * it under the terms of the GNU General Public License as published by 6 | * the Free Software Foundation; either version 2 of the License, or 7 | * (at your option) any later version. 8 | */ 9 | 10 | #ifndef __LINUX_TINYDRM_ILI9806_H 11 | #define __LINUX_TINYDRM_ILI9806_H 12 | 13 | #include 14 | #include 15 | 16 | #define DATA_CONTROL 4 17 | #define CMD_CONTROL 0 18 | 19 | /** 20 | * struct tinydrm_ili9806 - tinydrm ILI9806 device 21 | * @tinydrm: Base &tinydrm_device 22 | * @reg: Register map (optional) 23 | * @enabled: Pipeline is enabled 24 | * @tx_buf: Transmit buffer 25 | * @swap_bytes: Swap pixel data bytes 26 | * @always_tx_buf: 27 | * @rotation: Rotation in degrees Counter Clock Wise 28 | * @reset: Optional reset gpio 29 | * @backlight: Optional backlight device 30 | * @regulator: Optional regulator 31 | */ 32 | struct tinydrm_ili9806 { 33 | struct tinydrm_device tinydrm; 34 | void __iomem *base; 35 | bool enabled; 36 | void *tx_buf; 37 | bool swap_bytes; 38 | bool always_tx_buf; 39 | unsigned int rotation; 40 | struct regulator *regulator; 41 | // struct mutex cmd_lock; 42 | }; 43 | 44 | static inline struct tinydrm_ili9806 * 45 | tinydrm_to_ili9806(struct tinydrm_device *tdev) 46 | { 47 | return container_of(tdev, struct tinydrm_ili9806, tinydrm); 48 | } 49 | 50 | int tinydrm_ili9806_init(struct device *dev, struct tinydrm_ili9806 *ili9806, 51 | const struct drm_simple_display_pipe_funcs *funcs, 52 | struct resource *reg_res, struct drm_driver *driver, 53 | const struct drm_display_mode *mode, 54 | unsigned int rotation); 55 | 56 | void tinydrm_ili9806_enable_flush(struct tinydrm_ili9806 *ili9806, 57 | struct drm_crtc_state *crtc_state, 58 | struct drm_plane_state *plane_state); 59 | 60 | #define i80_ctrl_command(i80, cmd, seq...) \ 61 | ({ \ 62 | u8 d[] = { seq }; \ 63 | i80_ctrl_command_buf(i80, cmd, d, ARRAY_SIZE(d)); \ 64 | }) 65 | 66 | 67 | static inline void i80ctrl_write_data(struct tinydrm_ili9806 *ili9806, int val) 68 | { 69 | writel(val, ili9806->base + DATA_CONTROL); 70 | } 71 | 72 | static inline void i80ctrl_write_cmd(struct tinydrm_ili9806 *ili9806, int val) 73 | { 74 | writel(val, ili9806->base + CMD_CONTROL); 75 | } 76 | 77 | void i80_ctrl_command_buf(struct tinydrm_ili9806 *ili9806, u8 cmd, u8 *data, size_t len); 78 | 79 | void i80_ctrl_data_buf (struct tinydrm_ili9806 *ili9806, u8 cmd, u32 *data, size_t len); 80 | 81 | 82 | #endif /* __LINUX_TINYDRM_ILI9806_H */ 83 | -------------------------------------------------------------------------------- /Schematic_PCB/5.0inch_IPS_for_TerasicDEs.PDF: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Schematic_PCB/5.0inch_IPS_for_TerasicDEs.PDF -------------------------------------------------------------------------------- /Schematic_PCB/Altium_Designer/5.0inch_IPS_for_TerasicDEs.PcbDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Schematic_PCB/Altium_Designer/5.0inch_IPS_for_TerasicDEs.PcbDoc -------------------------------------------------------------------------------- /Schematic_PCB/Altium_Designer/5.0inch_IPS_for_TerasicDEs.PrjPCB: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Schematic_PCB/Altium_Designer/5.0inch_IPS_for_TerasicDEs.PrjPCB -------------------------------------------------------------------------------- /Schematic_PCB/Altium_Designer/5.0inch_IPS_for_TerasicDEs.SchDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/Schematic_PCB/Altium_Designer/5.0inch_IPS_for_TerasicDEs.SchDoc -------------------------------------------------------------------------------- /Schematic_PCB/KiCad/README.txt: -------------------------------------------------------------------------------- 1 | convert form Altium Designer 2 | -------------------------------------------------------------------------------- /figure/clocked_video_out_timing.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/figure/clocked_video_out_timing.png -------------------------------------------------------------------------------- /figure/de1soc_linux.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/figure/de1soc_linux.png -------------------------------------------------------------------------------- /figure/pcb.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/thinkoco/mi-lcd/8d00fa0872c05697a461ae5f99ce1519c2bd32ff/figure/pcb.png --------------------------------------------------------------------------------