├── .gitignore ├── LICENSE.txt ├── README.md ├── fp-lib-table ├── sym-lib-table ├── tigard-cache.lib ├── tigard-render.png ├── tigard.3dshapes ├── HRO_TYPE-C-31-M-12.step ├── PinHeader_1x09_P2.54mm_Vertical_orange.wrl └── SSSS224100.step ├── tigard.dcm ├── tigard.kicad_pcb ├── tigard.lib ├── tigard.pretty ├── Crystal_SMD_3225-4Pin_3.2x2.5mm_RoundRect.kicad_mod ├── OSHW-Symbol_4.4x4mm_SilkScreen.kicad_mod ├── PinHeader_1x08_P2.54mm_Vertical.kicad_mod ├── PinHeader_1x09_P2.54mm_Vertical.kicad_mod ├── PinHeader_2x04_P2.54mm_Vertical.kicad_mod ├── PinHeader_2x05_P1.27mm_Vertical_SMD.kicad_mod ├── PinHeader_2x07_P1.27mm_Vertical_SMD.kicad_mod ├── R_Array_Convex_4x0402_RoundRect.kicad_mod ├── SOT-23-5_RoundRect.kicad_mod ├── SOT-23-6_RoundRect.kicad_mod ├── SOT-23_RoundRect.kicad_mod ├── SW_ALPS_SSSS224100_DP4T.kicad_mod ├── SW_CuK_JS202011CQN_DPDT_Straight.kicad_mod ├── Securing_Hardware_Logo.kicad_mod ├── Texas_VQFN-RHL-24_ThermalVias.kicad_mod ├── Tigard_Logo.kicad_mod └── USB_C_Receptacle_HRO_TYPE-C-31-M-12.kicad_mod ├── tigard.pro └── tigard.sch /.gitignore: -------------------------------------------------------------------------------- 1 | # For PCBs designed using KiCad: http://www.kicad.org/ 2 | # Format documentation: http://kicad.org/help/file-formats/ 3 | 4 | # Temporary files 5 | *.000 6 | *.bak 7 | *.bck 8 | *.kicad_pcb-bak 9 | *.sch-bak 10 | *~ 11 | _autosave-* 12 | *.tmp 13 | *-save.pro 14 | *-save.kicad_pcb 15 | fp-info-cache 16 | *csv# 17 | 18 | # Netlist files (exported from Eeschema) 19 | *.net 20 | 21 | # Autorouter files (exported from Pcbnew) 22 | *.dsn 23 | *.ses 24 | 25 | # Exported BOM files 26 | *.xml 27 | *.csv 28 | 29 | # Gerbers 30 | *.zip 31 | *gerber* 32 | tigard-prod/ 33 | 34 | # Rescues 35 | *-rescue.dcm 36 | *-rescue.lib 37 | -------------------------------------------------------------------------------- /LICENSE.txt: -------------------------------------------------------------------------------- 1 | Copyright 2020 Franklin Harding 2 | 3 | This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License. 4 | 5 | http://creativecommons.org/licenses/by-sa/4.0/ 6 | 7 | Attribution-ShareAlike 4.0 International 8 | 9 | ======================================================================= 10 | 11 | Creative Commons Corporation ("Creative Commons") is not a law firm and 12 | does not provide legal services or legal advice. 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For 430 | the avoidance of doubt, this paragraph does not form part of the 431 | public licenses. 432 | 433 | Creative Commons may be contacted at creativecommons.org. 434 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | 2 | Tigard PCB Render 3 | 4 | # Tigard 5 | 6 | An FTDI FT2232H-based multi-protocol tool for hardware hacking. 7 | 8 | # Objectives 9 | 10 | There are plenty of -232H series breakout boards, but they are generally designed to be an easy way to adapt it to a specific use, and not designed for regularly plugging in to all different target systems. 11 | 12 | The two exceptions are the Exodus Intelligence Hardware Interface Board which is not open hardware or commercially available, and [TIMEP](https://github.com/Matir/timep) which is the origin and heritage of this project. 13 | 14 | # Contents 15 | - [Software Features](#software) 16 | - [Hardware Features](#hardware-features) 17 | - [Usage](#usage) 18 | - [Hardware Hookup](#hardware-hookup) 19 | - [Switches](#switches) 20 | - [UART](#uart) 21 | - [SPI](#spi) 22 | - [I2C (on I2C or SPI header)](#i2c-on-i2c-spi-or-jtag-header) 23 | - [JTAG Debug (on JTAG or CORTEX header)](#jtag-debug-on-jtag-or-cortex-header) 24 | - [JTAG Boundary Scan (on JTAG or CORTEX header)](#jtag-boundary-scan-on-jtag-or-cortex-header) 25 | - [SWD (on CORTEX header)](#swd-on-cortex-header) 26 | - [iCE40 Programming](#ice40-programming) 27 | - [AVR ISP](#avr-isp) 28 | - [Debugging](#debugging) 29 | - [Pinouts](#pinouts) 30 | - [Stripes and Tails](#stripes-and-tails) 31 | - [Dens (cases)](#dens) 32 | - [Serial Numbers](#serial-numbers) 33 | - [Getting Tigard](#getting-tigard) 34 | 35 | # Software Features 36 | 37 | In general, Tigard was designed to work as-is with several tools and libraries that already support the x232H family of chips. This includes: 38 | 39 | * USB-Serial drivers for UART access 40 | * OpenOCD and URJTAG for JTAG 41 | * Flashrom, libmpsse, pyftdi and other tools for SPI interfaces 42 | * libmpsse and pyftdi for I2C interfaces 43 | * iceprog for ice40 FPGAs 44 | * avrdude for AVR microcontrollers 45 | 46 | # Hardware Features 47 | 48 | Highlights: 49 | 50 | * Dual-port, with one dedicated to UART and the second shared with other interfaces 51 | * High-performance directional level shifters for 1.8 to 5.5v operation 52 | * Switch to choose between on-board 1.8, 3.3, and 5.0v supplies and vTarget 53 | * Switch to choose between SPI/JTAG and I2C/SWD modes 54 | * Logic analyser port to observe device-level signals (v1.0 and later) 55 | * Indicator lights to aid debugging 56 | 57 | # Usage 58 | 59 | ## Hardware Hookup 60 | 61 | Starting with the board completely disconnected: 62 | 63 | 1. Connect board to target system with clips or jumper wires 64 | 1. Select the correct mode either SPI/JTAG or SWD/I2C 65 | 1. Ensure that the voltage switch is in VTGT mode 66 | 1. Plug in the USB cable. The PWR and EN LEDs will illuminate 67 | 1. Power on your target. 68 | 1. If you connected VTGT to your target, the VTGT LED will illuminate. If not, you can now select your voltage with the voltage switch 69 | 70 | ## Switches 71 | There are two switches on Tigard to set the mode of operation. One controls voltage, one controls how several of the IO pins are wired. Both need to be set properly for a specific use mode. Details are in each of the interface sections further below, but here is a summary of the modes and their uses: 72 | 73 | #### Voltage Switch 74 | 75 | This switch chooses the reference voltage for the level shifters and the target system: 76 | * 1V8, 3V3, and 5V all apply a voltage to the VTGT pin. 77 | * VTGT disconnects the VTGT pin from supplies, and depends on the wire connected to the target to set the level shifter voltage. 78 | 79 | This results in 3 distinct use cases: 80 | 1. **Target-Powered:** Set the switch to VTGT and connect the VTGT wire to the **powered** target. The **target** powers the level shifters. 81 | 1. **Tigard-Powered:** Set the switch to a voltage, and connect the VTGT to the **unpowered** target. **Tigard** supplies power to the target. 82 | 1. **Self-Powered:** Set the switch to a voltage, but do NOT connect the VTGT wire. **Tigard** powers its own level shifters. **Target** powers itself. 83 | 84 | #### Mode Switch 85 | 86 | This switch controls how some of the I/O pins are connected for specific uses: 87 | 88 | * When set to JTAG/SPI mode: 89 | * All signals run straight through 90 | * CORTEX and JTAG headers are wired for normal JTAG 91 | * JTAG and SPI headers can be used for SPI 92 | * When set to SWD/I2C mode: 93 | * DO and DI are wired together to create SWDIO or SDA 94 | * CORTEX and JTAG headers can be used for SWD 95 | * JTAG and SPI headers can be used for I2C 96 | 97 | ## UART 98 | 99 | #### Hookup: 100 | 101 | * In most cases, you need pins 2,3,and 4 of the UART header - Ground, TX, and RX. Connect these to your target 102 | * If you have a VCC header on your target, connect pin 1 - VTGT to it, and slide the voltage selector to VTGT 103 | * If you don't have a VCC header, leave the VTGT wire disconnected, and choose your target voltage with the selector 104 | 105 | #### Software: 106 | 107 | The first of the two ports is connected to the UART header. When you plug Tigard in, you will see two serial devices show up - the first one is the one you want. Start your software using the appropriate serial port. For example: 108 | 109 | ```bash 110 | screen /dev/ttyUSB0 115200 111 | ``` 112 | 113 | ## SPI 114 | 115 | #### Hookup: 116 | 117 | The SPI/I2C header is laid out to be the same orientation as the pins on a standard 8-pin SPI flash chip, making it easy to attach clips or sockets. 118 | 119 | * Select SPI/JTAG on the mode selection switch 120 | * Connect your clip or socket to the header. Pay attention to pin 1, which is usually marked on sockets or has a red/highlighted wire on ribbon cables 121 | * Connect your clip to the target or insert your chip into the socket 122 | * If you're doing this in-circuit, you *must* take extra precautions to make sure no other device is communicating with the SPI device. 123 | * If you're using a clip in-circuit and the target is powered on, choose the VTGT option on the voltage slider 124 | * If you're using a zif socket, or clip with a powered-off target, choose the voltage on the voltage slider. 125 | 126 | #### Software: 127 | 128 | flashrom is the most common tool for SPI flash dumps. However, while pervasive, it is very slow and inefficient. 129 | 130 | ```bash 131 | flashrom -p ft2232_spi:type=2232H,port=B,divisor=4 132 | ``` 133 | 134 | libmpsse is a powerful library for controlling the MPSSE, or high speed serial pins of the x232H series. However, it is no longer recommended because of a large number of dependencies 135 | 136 | pyftdi is a new and simple interface very similar to libmpsse: 137 | 138 | ```python 139 | from pyftdi.ftdi import Ftdi 140 | Ftdi.show_devices() 141 | from os import environ 142 | ftdi_url = environ.get('FTDI_DEVICE', 'ftdi://ftdi:2232:1:23f/2') 143 | from spiflash.serialflash import SerialFlashManager 144 | flash=SerialFlashManager.get_flash_device(ftdi_url) 145 | print("Flash device: %s @ SPI freq %0.1f MHz" % (flash, flash.spi_frequency/1E6)) 146 | f=open("data.bin","wb") 147 | f.write(flash.read(0,len(flash))) 148 | f.close() 149 | ``` 150 | 151 | ## I2C (on I2C, SPI, or JTAG header) 152 | 153 | #### Hookup: 154 | 155 | The I2C header (on hardware versions 1.0 and later) is compatible with [Sparkfun's Qwiic](https://www.sparkfun.com/qwiic) and [Adafruit's STEMMA QT](https://learn.adafruit.com/introducing-adafruit-stemma-qt/what-is-stemma-qt) system: 156 | 157 | * Connect a 4-pin JST SH compatible cable into the I2C connector 158 | * Connect the other end to your STEMMA QT, Qwiic, or other I2C device 159 | 160 | In addition, the SPI header is laid out to be the same orientation as the pins on most 8-pin I2C chips, making it easy to attach clips or sockets: 161 | 162 | * Connect your clip or socket to the header. Pay attention to pin 1, which is usually marked on sockets or has a red/highlighted wire on ribbon cables 163 | * Connect your clip to the target or insert your chip into the socket 164 | 165 | Finally, the JTAG header can also be used to get the I2C signals on .1" individual pins: 166 | 167 | * Connect the 8-wire JTAG harness to the JTAG connector 168 | * Connect the white SCL and grey SDA wires to your target's I2C pins 169 | 170 | In either case, you need to set the Tigard switches properly: 171 | 172 | * Select I2C on the mode selection switch 173 | * If you're attaching to a device in-circuit and the target has its own power, choose the VTGT option on the voltage slider 174 | * If you're attaching a standalone sensor, socket, or clip with a powered off target, choose the correct voltage on the voltage slider 175 | 176 | #### Quirks: 177 | 178 | The FT2232H has a very limited I2C implementation. I2C depends on shared I/O lines using open collector/open drain instead of push-pull-tristate I/O, but the FT2232H doesn't support that well. Therefore: 179 | 180 | * Only controller operation is supported, not Device 181 | * Tigard may not play nice if there are other controllers present on the I2C interface 182 | * Clock stretching is not supported 183 | * The I2C switch ties the DI and DO lines together so that it can do bidirectional communication 184 | * The pullup resistors are not included since they are usually located on the target, and the weak pullups on the level shifters are sufficient 185 | 186 | #### Hacks: 187 | 188 | To accomodate both I2C and SWD, the DI and DO lines are combined through resistor R16. This is required for SWD and acceptable for I2C. For the best I2C performance **with the tradeoff of breaking SWD functionality**, bridge the HACK solder jumper on the bottom. This will bypass resistor R16, shorting DI and DO when the MODE switch is set to SWD/I2C. 189 | 190 | Many I2C targets already have pullup resistors. In addition, all of Tigard's I/O pins have a weak 100K ohm pullup. In testing, this has been sufficient for both in-circuit and external use of most I2C devices. If you need stronger pullups on I2C, you can temporarily add them by pulling up COPI and SCK on the SPI header, or TCK and TDI on the JTAG header. 191 | 192 | #### Software: 193 | 194 | libmpsse is a powerful library for controlling the MPSSE, or high speed serial pins of the x232H series. However, it is no longer recommended because of a large number of dependencies 195 | 196 | pyftdi is a new and simple interface very similar to libmpsse: 197 | 198 | ```python 199 | from pyftdi.ftdi import Ftdi 200 | Ftdi.show_devices() 201 | from os import environ 202 | ftdi_url = environ.get('FTDI_DEVICE', 'ftdi://ftdi:2232:1:23f/2') 203 | from i2cflash.serialeeprom import SerialEepromManager 204 | flash = SerialEepromManager.get_flash_device(ftdi_url,'24AA32A',0x50) 205 | flash.write(5,10) 206 | flash.read(0,32) 207 | ``` 208 | 209 | ## JTAG Debug (on JTAG or CORTEX header) 210 | 211 | #### Hookup: 212 | 213 | The JTAG header is laid out with pins in the same order as the FTDI I/O pins are labeled, in order to be consistent with many other x232H breakout boards. 214 | 215 | In additon, the CORTEX header is also wired as a standard ARM 10-pin JTAG header. 216 | 217 | Be sure to select JTAG on the mode selection switch. This makes sure that TDI and TDO are separated, and ensures that TMS is wired properly to the CORTEX header. Otherwise, the standard hookup sequence applies. 218 | 219 | #### Software: 220 | 221 | **NOTE: These OpenOCD configs require OpenOCD v0.12+**. Previous versions may use the now-deprecated commands last updated in [this commit](https://github.com/tigard-tools/tigard/commit/5e5722944c8c1ec73b0fa85d574793300c23b3ce). 222 | 223 | OpenOCD is a powerful tool for On-Chip Debugging of ARM, MIPS, and some other architectures. 224 | 225 | The appropriate configuration file (make this a link to the file) should look like: 226 | 227 | ``` 228 | adapter driver ftdi 229 | transport select jtag 230 | ftdi vid_pid 0x0403 0x6010 231 | ftdi channel 1 232 | adapter speed 2000 233 | ftdi layout_init 0x0038 0x003b 234 | ftdi layout_signal nTRST -data 0x0010 235 | ftdi layout_signal nSRST -data 0x0020 236 | ``` 237 | 238 | To use it with openocd: 239 | 240 | ```bash 241 | openocd -f tigard-jtag.cfg 242 | ``` 243 | 244 | ## JTAG Boundary Scan (on JTAG or CORTEX header) 245 | 246 | Boundary scan can be used to take control of a device to set I/O pin state (`EXTEST`), or to view the state of them during device operation (`SAMPLE`). 247 | 248 | #### Hookup: 249 | 250 | The hookup is the same as described in section [JTAG Debug (on JTAG or CORTEX header)](#jtag-debug-on-jtag-or-cortex-header). 251 | 252 | The pinout is compatible with the `Olimex ARM-USB-OCD` running on the `B` interface. 253 | 254 | #### Software: 255 | 256 | [UrJTAG](http://urjtag.org/) is open-source jtag control software geared toward low-level and boundary scan use. 257 | 258 | We need to tell UrJTAG Tigard's VID and PID, as well as the fact that JTAG is on interface 1 (default is 0). Due to a bug it seems that TCK is miscalculated and is actually running 5 times what you select - 500khz in the case below. 259 | 260 | ``` 261 | jtag> cable ft2232 vid=0x403 pid=0x6010 interface=1 262 | Connected to libftdi driver. 263 | jtag> frequency 100000 264 | Setting TCK frequency to 100000 Hz 265 | jtag> detect 266 | IR length: 5 267 | Chain length: 1 268 | Device ID: 00010110001101010010001001001111 (0x1635224F) 269 | Unknown manufacturer! (00100100111) (/usr/share/urjtag/MANUFACTURERS) 270 | jtag> 271 | ``` 272 | 273 | The [TopJTAG](http://www.topjtag.com/) software is one of the easier to use options, but is commercial ($100) and Windows-only. This includes a "waveform view" that allows you to view arbitrary pin states as if you had a logic analyzer on the device while it is running. If using TopJTAG, set the following as the JTAG connection: 274 | 275 | * `Connection`: Generic FTDI FT2232 276 | * `Device`: Tigard V1.0 B 277 | * `Static Pins`: Olimex ARM-USB-OCD 278 | * `TCK Freq`: 2 MHz (adjust as needed) 279 | 280 | An open-source option that supports Tigard is [JTAG Boundary Scanner](https://github.com/viveris/jtag-boundary-scanner) which offers a Windows GUI, but the backend library is cross-platform (however written in C). This library offers many features such as an ability to talk to SPI devices attached to the target chip, where the SPI interface is run using JTAG boundary scan (warning - slow!). 281 | 282 | Alpha Python bindings for this library are available in [PyJTAGBS](https://github.com/colinoflynn/pyjtagbs). Using Tigard from Python for checking the scan chain for example: 283 | 284 | ```python 285 | from jtagbs import JTAGCore, JTAGBS 286 | 287 | interface = JTAGCore() 288 | jtag = JTAGBS(interface) 289 | 290 | probes = jtag.list_available_probes() 291 | print(probes) 292 | 293 | jtag.open_probe('Tigard V1.0 B') 294 | jtag.init_scanchain() 295 | 296 | print(jtag.list_devids()) 297 | ``` 298 | 299 | See the PyJTAGBS documentation for further examples of loading BSDL files required to toggle specific pins. The listed probes should be `'Tigard V1.0 A TG100065A'` and `'Tigard V1.0 B TG100065B'` if the correct drivers are loaded. 300 | 301 | ## SWD (on CORTEX header) 302 | 303 | #### Hookup: 304 | 305 | The SWD header a standard 10-pin header found on many SWD target boards. A short 'SWD' cable with the same header on both ends is the ideal way to hook up to most targets. 306 | 307 | Be sure to select SWD on the mode selection switch. This connects the DI and DO pins with resistor R16 to make the bidirectional SWDIO pin, and connect it to pin 2 of the CORTEX header. Otherwise, the standard hookup sequence applies. 308 | 309 | #### Software: 310 | 311 | **NOTE: These OpenOCD configs require OpenOCD v0.12+**. Previous versions may use the now-deprecated commands last updated in [this commit](https://github.com/tigard-tools/tigard/commit/5e5722944c8c1ec73b0fa85d574793300c23b3ce). 312 | 313 | OpenOCD is a powerful tool for On-Chip Debugging of ARM, MIPS, and some other architectures. In order to use it for SWD with Tigard, you'll need to build it from source. The [directions from the AND!XOR DC27 Badge](https://hackaday.io/project/164346-andxor-dc27-badge/log/166464-swd-all-the-things) cover it step-by-step. 314 | 315 | The appropriate configuration file (make this a link to the file) should look like: 316 | 317 | ``` 318 | adapter driver ftdi 319 | transport select swd 320 | ftdi vid_pid 0x0403 0x6010 321 | ftdi channel 1 322 | adapter speed 2000 323 | ftdi layout_init 0x0028 0x002b 324 | ftdi layout_signal SWD_EN -data 0 325 | ftdi layout_signal nSRST -data 0x0020 326 | ``` 327 | 328 | To use it with openocd: 329 | 330 | ```bash 331 | openocd -f tigard-swd.cfg 332 | ``` 333 | 334 | ## iCE40 Programming 335 | The Lattice iCE40 family of FPGAs are popular for small scale projects because of their low cost and the availability of an open toolchain. While this is a *very* specific target, Tigard is well suited for programming devices since it has all the necessary pins readily available. 336 | 337 | #### Hookup: 338 | All the necessary pins are on the JTAG header. 339 | The bonus "!?" pin is not populated by default. The JTAG !? pin and the UART RX pin are shorted in case you need to flash an iCE40 but don't want to solder your Tigard. See the pinouts table below for details. 340 | 341 | Be sure to select JTAG/SPI on the mode selection switch. This makes sure that COPI and CIPO are separated. 342 | 343 | If you are planning on programming SRAM instead of FLASH: 344 | * Swap COPI and CIPO 345 | * Disconnect CS from your FLASH, but leave it attached to the iCE40. 346 | 347 | 348 | #### Software: 349 | To program your target's nonvolatile FLASH, use iceprog: 350 | ``` 351 | iceprog -I B yourbitstream.bin 352 | ``` 353 | If you prefer to directly program the ice40's SRAM, make sure you adjust your wiring and again use iceprog: 354 | ``` 355 | iceprog -I B -S yourbitstream.bin 356 | ``` 357 | Remember that if you choose to program the SRAM, your bitstream will be lost on power cycle. 358 | 359 | ## AVR ISP 360 | To program AVR microcontrollers including many Arduino boards, use avrdude with a custom configuration file. 361 | 362 | #### Hookup: 363 | Be sure to select JTAG/SPI on the mode selection switch. Use SRST as your reset. 364 | 365 | #### Software: 366 | Avrdude is an open-source AVR flashing utility. Avrdude 7.1 and later have built-in support for Tigard - all you need to do is: 367 | ``` 368 | avrdude -c tigard 369 | ``` 370 | 371 | For older versions, create the following `tigard.conf` file in order to identify Tigard as an avrftdi-compatible device and specify which pins to use: 372 | ``` 373 | programmer 374 | parent "avrftdi" 375 | id = "tigard"; 376 | desc = "Tigard interface board"; 377 | usbdev = "B"; 378 | sck = 0; 379 | mosi = 1; 380 | miso = 2; 381 | reset = 5; 382 | ; 383 | ``` 384 | 385 | Then, use `-C +tigard.conf` to add the configuration file, and `-c tigard` to indicate your programmer: 386 | ``` 387 | avrdude -C +tigard.conf -c tigard 388 | ``` 389 | 390 | # Debugging 391 | 392 | #### PWR LED: 393 | 394 | This will turn on when the board has USB power and should turn on immediately when the USB cable is connected. 395 | 396 | * If it does *not*, then check your USB cable and power supply. 397 | * If it comes *on then goes off*, is *dim*, or *flickers*, then you have likely shorted power or ground somewhere with your wires or your target. 398 | 399 | #### EN LED: 400 | 401 | This will turn on when the FTDI chip is operation and should turn on a moment after the usb power LED is on. 402 | 403 | * If it does *not* come on, you may have a faulty USB cable, a power-only USB port or cable, or a bad FTDI chip 404 | 405 | #### VTGT LED: 406 | 407 | This will turn on when the level shifters are properly powered, either by your target or by the onboard level selector 408 | 409 | * If you are in VTGT mode, and it does *not* come on, check your target power and your power and ground wiring to the target 410 | * If you are selecting a voltage and it does *not* come on, you have likely shorted power or ground somewhere with your wires or target. 411 | * There are corner cases where VTGT will get [latched to a voltage applied to an output pin](https://github.com/tigard-tools/tigard/issues/20). Establishing a habit of always starting with VTGT off will help avoid this. 412 | 413 | #### ALL LEDS ON: 414 | 415 | When all LEDS are on, then Tigard is probably working as intended. If you are still having trouble, there are a few possibilities. They are listed in order of likelihood, though it makes sense to test the easier cases first: 416 | 417 | * It's a *wiring* issure. Make sure your wires are connected well. Confirm with a multimeter. 418 | * It's a *target* issue. Try a different target to make sure your software is working properly 419 | * It's a *software* issue. Try a different software tool or mode to make sure your board works properly 420 | * It's a *protocol* issue. Observe your signals with a logic analyzer or oscilloscope to make sure they're correct 421 | * It's a *hardware* issue. Try a different Tigard board to see if it persists 422 | * It's a *tigard* issue. Try a different x232H board to see if it persists 423 | 424 | # Pinouts 425 | 426 | There are way too many choices of 'standard' pinouts for all of these interfaces. Pinouts were chosen for ease of use, specificially: 427 | 428 | * If there's a well established and used standard, use it (SWD) 429 | * If there's a predominant primary usage that would be easier, use it (SPI/I2C) 430 | * If there are other common boards with pinouts, use them (UART and JTAG) 431 | 432 | ### UART 433 | 434 | This pinout prioritizes putting the FT2232H pins in sequential order - similar to many x232H breakout boards 435 | 436 | The coloring of the wiring harness is intended to match most common usb-serial cables 437 | 438 | | Pin Number | UART Signal | Color | FT2232H Pin | 439 | | ---------- | ----------- | ----- | ----------- | 440 | | 1 | VTGT | Red | -- | 441 | | 2 | GDD | Black | -- | 442 | | 3 | TX | Green | AD0 | 443 | | 4 | RX | White | AD1 | 444 | | 5 | RTS | -- | AD2 | 445 | | 6 | CTS | -- | AD3 | 446 | | 7 | DTR | -- | AD4 | 447 | | 8 | DSR | -- | AD5 | 448 | | 9 | DCD | -- | AD6 | 449 | 450 | ### SWD 451 | 452 | This is a standard pinout. In order to accomodate both SWD and JTAG, the mode switch: 453 | 454 | 1. Combines DI and DO to create SWDIO for SWD mode 455 | 2. Selects between SWDIO and TMS for pin 2 456 | 457 | | Pin Number | SWD Signal | FT2232H Pin | JTAG Signal | FT2232H Pin | 458 | | ---------- | ---------- | ----------- | ----------- | ----------- | 459 | | 1 | VTGT | -- | VTGT | -- | 460 | | 2 | SWDIO | BD1 BD2 | TMS | BD3 | 461 | | 3 | GND | -- | GND | -- | 462 | | 4 | SWDCLK | BD0 | TCK | BD0 | 463 | | 5 | GND | -- | GND | -- | 464 | | 6 | NC | -- | TDO | BD2 | 465 | | 7 | KEY | -- | KEY | -- | 466 | | 8 | NC | -- | TDI | BD1 | 467 | | 9 | GND | -- | GND | -- | 468 | | 10 | nSRST | BD5 | nSRST | BD5 | 469 | 470 | ### JTAG 471 | 472 | This pinout prioritizes putting the FT2232H pins in sequential order - similar to many x232H breakout boards. 473 | 474 | In general, set the mode switch to SPI/JTAG mode when using this connector. 475 | 476 | The coloring of the wiring harness is what [SecuringHardware.com](https://SecuringHardware.com/) used for their Adafruit FT232H wiring harness for several years. The colors were chosen because frequently black-brown-red-orange are used with logic analyzers in class, so unique colors were chosen for this wiring harness. 477 | 478 | This header can also be used for I2C and SPI if the 8-pin header doesn't make sense in your application. 479 | 480 | | Pin Number | JTAG Pin | Color | FT2232H Pin | 481 | | ---------- | -------- | ------ | ----------- | 482 | | 1 | VTGT | Red | -- | 483 | | 2 | GND | Black | -- | 484 | | 3 | TCK | White | BD0 | 485 | | 4 | TDI | Grey | BD1 | 486 | | 5 | TDO | Purple | BD2 | 487 | | 6 | TMS | Blue | BD3 | 488 | | 7 | TRST | Green | BD4 | 489 | | 8 | SRST | Yellow | BD5 | 490 | 491 | ### SPI 492 | 493 | This header is designed specifically to match the pinout of most 8-pin SPI and I2C chips, so that a jumper to a chip clip or a socket would align properly. 494 | 495 | In order to accomodate both SPI and I2C, the mode switch: 496 | 497 | 1. Combines DI and DO to create SDA for I2C mode 498 | 2. Disconnects pin 2 in I2C mode for devices that use it as an address signal 499 | 500 | | Chip Pin Number | Header Pin Number | SPI signal | FT2232H Pin | 501 | | --------------- | ----------------- | ---------- | ----------- | 502 | | 1 | 1 | CS | BD3 | 503 | | 2 | 3 | CIPO | BD2 | 504 | | 3 | 5 | WP | pullup | 505 | | 4 | 7 | GND | -- | 506 | | 5 | 8 | COPI | BD1 | 507 | | 6 | 6 | SCK | BD0 | 508 | | 7 | 4 | EN | pullup | 509 | | 8 | 2 | VTGT | -- | 510 | 511 | ### LA 512 | 513 | The LA port makes it easier to hook up a logic analyzer to monitoring push-pull signals between Tigard and your target hardware. It's tested and working well with UART, SPI and JTAG, and generally works with I2C. 514 | 515 | While there is a driver allowing you to use the FT2232H as a makeshift logic analyzer, that's not the intended purpose - the expected use case is that you are using Tigard to communicate with a target, but need to debug that communication using an external logic analyzer. 516 | 517 | The LA port may be used as a passive mechanical adapter although this usage is [not supported](https://github.com/tigard-tools/tigard/issues/20). For best results, power the Tigard board but disconnect VTGT from the target. Additional effort will likely be required to ensure signal integrity. 518 | 519 | This header is specifically designed to connect directly to the Bitmagic logic analyzer, or you could use the Bitmagic logic analyzer wiring harness to connect to any other tool. 520 | 521 | The 8 most interesting signals are connected - 6 from the JTAG/SWD/SPI/I2C port, and 2 from the UART port. 522 | 523 | | Pin Number | Bitmagic Signal | FT2232 Pin | JTAG signal | SPI signal | SWD Signal | I2C Signal | UART Signal | 524 | | ---------- | --------------- | ---------- | ----------- | ---------- | ---------- | ---------- | ----------- | 525 | | 1 | xPB0 | BD0 | TCK | SCK | SWCLK | SCL | 526 | | 2 | xPB1 | BD1 | TDI | COPI | SWDIO | SDA | 527 | | 3 | xPB2 | BD2 | TDO | CIPO | SWDIO | SDA | 528 | | 4 | xPB3 | BD3 | TMS | CS | | 529 | | 5 | xPB4 | BD4 | TRST | 530 | | 6 | xPB5 | BD5 | SRST | 531 | | 7 | xPB6 | AD0 | | | | | TX | 532 | | 8 | xPB7 | AD1 | | | | | RX | 533 | | 9 | GND | 534 | | 10 | GND | 535 | | 11 | xTRIG | 536 | | 12 | xCLK | 537 | | 13 | xTRIG2 | 538 | | 14 | xIFCLK | 539 | 540 | ### I2C 541 | 542 | This header is designed specifically to match [Sparkfun's Qwiic](https://www.sparkfun.com/qwiic) and [Adafruit's STEMMA QT](https://learn.adafruit.com/introducing-adafruit-stemma-qt/what-is-stemma-qt) system. 543 | 544 | Set the mode switch to I2C/SWD mode when using this connector. 545 | 546 | | Pin Number | I2C signal | FT2232H Pin | 547 | | ---------- | ---------- | ----------- | 548 | | 1 | GND | --- | 549 | | 2 | VCC | --- | 550 | | 3 | SDA | BD1 and BD2 | 551 | | 4 | SCL | BD0 | 552 | 553 | ### iCE40 554 | Use the JTAG header with the addition of the "!?" pin which is not populated by default. 555 | 556 | | Pin Number | Label | iCE40 Signal | FT2232 Pin | 557 | |------------|--------------|----------------|-------------| 558 | | 1 | VTGT | VTGT | --- 559 | | 2 | GND | GND | --- 560 | | 3 | TCK | CLK | BD0 561 | | 4 | TDI/MOSI/SDA | MOSI/COPI | BD1 562 | | 5 | TDO/MISO/-- | MISO/CIPO | BD2 563 | | 6 | TMS/SS/-- | --- | --- 564 | | 7 | TRST/--/-- | CS/ICE_SS_B | BD4 565 | | 8 | SRST/--/-- | CRESET | BD5 566 | | 9 | !? | CDONE | BD6 567 | 568 | JTAG !? pin and the UART RX pin are shorted in case you need to flash an iCE40 but don't want to solder your Tigard. 569 | 570 | ### AVR ISP 571 | The common 6-pin ICSP header found on many AVR boards requires the following hookup: 572 | 573 | | Pin Number | Label | ISP Signal | ICSP Pin | FT2232 Pin | 574 | |------------|--------------|------------|----------|-------------| 575 | | 1 | VTGT | VTGT | 2 | --- 576 | | 2 | GND | GND | 6 | --- 577 | | 3 | TCK | SCK | 3 | BD0 578 | | 4 | TDI/MOSI/SDA | MOSI | 4 | BD1 579 | | 5 | TDO/MISO/-- | MISO | 1 | BD2 580 | | 6 | TMS/SS/-- | --- | --- | --- 581 | | 7 | TRST/--/-- | --- | --- | --- 582 | | 8 | SRST/--/-- | RST | 5 | BD5 583 | 584 | # Stripes and Tails 585 | In order to support different interfaces, custom wiring harnesses or add-on boards might be useful. The preferred names are "Tigard Stripes" for add-on boards and "Tigard Tails" for wiring harnesses. 586 | 587 | * The `UART Tail` ships with Tigard and includes VTGT, GND, TX and RX 588 | * The `JTAG Tail` ships with Tigard and includes labeled multipurpose JTAG, SPI, and I2C wires 589 | * The `SOIC8 Tail` refers to inexpensive SOIC-8 clips with ribbon cables and 2x4 connectors compatible with the SPI/I2C header 590 | 591 | # Dens 592 | Tigard is supplied as a bare board, but there are several options for 3d printing mounts and cases - 'dens' - for your Tigard.: 593 | 594 | * The first [TigarDen](https://github.com/hamid-elaosta/TigarDen) by hamid is a multi-piece top and bottom case for holding tigard 595 | * A [bottom-only case](https://www.thingiverse.com/thing:5166570) by phaktor has neat tiger stripes on the bottom, or can be printed in a single color 596 | * A [hinged case](https://www.thingiverse.com/thing:5169952) by professor_plum holds a tigard, bitmagic, and several probes 597 | * A [simplified 2-piece case](https://cad.onshape.com/documents/832906f0b96360664fedfe62/w/f1b917fd93e5b559c0927cf4/e/eb5666e6e328afd821567f83) by jwise for milling or printing 598 | 599 | # Serial Numbers 600 | 601 | Tigard follows a convention for allocating serial numbers. If you decide to make and sell your own Tigards, please change the first two characters "TG" to something else. 602 | 603 | Format: `TGMmxxxx` 604 | 605 | * `TG` - constant indicates "tigard" 606 | * `M` - major version decimal number 607 | * `m` - minor version decimal number 608 | * `xxxx` - 0 padded lowercase hex serial starting at 0 609 | 610 | ## Allocated 611 | 612 | * First batch of 28 (Jul 5, 2020): TG010000 - TG01001b 613 | * Second batch of 42 (Aug 5, 2020): TG01001c - TG010046 614 | * Third batch of 496 (October 2020): TG100000 - TG1001f0 615 | * Fourth batch of 693 (January 2021): TG110000 - TG1102b5 616 | * Fourth batch of 697 (September 2021): TG110400 - TG1106b9
Note: This batch's through hole components were not soldered with a selective solder wave machine. Some needed rework because the "hack" jumper was accidentally bridged with solder. 617 | * Fifth batch of 1400 (Nov 2022): circa TG110700 - TG110c7f 618 | * Sixth batch of 1400 (Jan 2024): circa TG110c80 - TG 1111ff
Note: This batch had the jtag header assembled in the wrong position. It's supposed to be an 8 pin header in a 9 hole footprint. Pin 9 of the footprint should be vacant - it's a special purpose pin only there for flashing ice40 fpgas like icebreaker. However, pin 1 was mistakenly left vacant instead. I added a header in pin 1 and trimmed pin 9 them so that the 8-pin jtag wiring harness can't be put on wrong and so the 9-pin uart header is not accidentally put there. 619 | * Seventh batch of 2100 (Jan 2025): circa TG111200-TG111834 620 | 621 | # Getting Tigard 622 | ## Where to Buy 623 | Tigard can be purchased directly from [Crowd Supply](https://www.crowdsupply.com/securinghw/tigard), [Mouser](https://www.mouser.com/ProductDetail/Securing-Hardware/TIGARD-V1?qs=aP1CjGhiNiFnjSEE%2FnXyEw%3D%3D), or [1BitSquared](https://1bitsquared.com/collections/embedded-hardware/products/tigard) 624 | 625 | [HackerWarehouse](https://hackerwarehouse.com/product/tigard/) also has a [laser-cut acrylic case](https://hackerwarehouse.com/product/tigard-case/) designed by SynapticRewrite 626 | 627 | Tigard can be aquired in Europe via [1BitSquared's German store](https://1bitsquared.de/products/tigard) 628 | 629 | 10+ boards can be ordered at a discount direct from [SecuringHardware.com](https://learn.securinghardware.com/product/tigard/). Contact tigards - at - securinghw.com for wholesale orders. 630 | 631 | ## DIY Tigards 632 | Tigard is published with the [CC-BY-SA 4.0 License](https://github.com/tigard-tools/tigard/blob/master/LICENSE.txt). This means you have permission and are encouraged to make your own devices, or make modifications to the Tigard design, as long as you attribute the project and share your changes. 633 | 634 | If you choose to manufacture your own tigard boards, we recommend/request the following: 635 | * Physically differentiate your boards somehow - choosing a different color is likely easiest - so they are not mistaken for boards from SecuringHardware.com 636 | * You are welcome to call them "Tigard" and program that into the usb product descriptor in the EEPROM 637 | * Program accurate manufacturer information in usb manufacturer descriptor the EEPROM 638 | * Use serial numbers that do not conflict with the ones [noted above](#serial-numbers) - do not use the 'TG' prefix 639 | 640 | SecuringHardware.com tests, verifies, and supports every Tigard they manufacture and sell. Please let us know about any [design issues](https://github.com/tigard-tools/tigard/issues) while making your own devices, but if you're having hardware issues with a third-party Tigard that you bought, you will need to resolve that with the seller or manufacturer. 641 | -------------------------------------------------------------------------------- /fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name tigard)(type KiCad)(uri ${KIPRJMOD}/tigard.pretty)(options "")(descr "")) 3 | ) 4 | -------------------------------------------------------------------------------- /sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (lib (name tigard)(type Legacy)(uri ${KIPRJMOD}/tigard.lib)(options "")(descr "")) 3 | ) 4 | -------------------------------------------------------------------------------- /tigard-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Connector_Generic_Conn_01x09 5 | # 6 | DEF Connector_Generic_Conn_01x09 J 0 40 Y N 1 F N 7 | F0 "J" 0 500 50 H V C CNN 8 | F1 "Connector_Generic_Conn_01x09" 0 -500 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | Connector*:*_1x??_* 13 | $ENDFPLIST 14 | DRAW 15 | S -50 -395 0 -405 1 1 6 N 16 | S -50 -295 0 -305 1 1 6 N 17 | S -50 -195 0 -205 1 1 6 N 18 | S -50 -95 0 -105 1 1 6 N 19 | S -50 5 0 -5 1 1 6 N 20 | S -50 105 0 95 1 1 6 N 21 | S -50 205 0 195 1 1 6 N 22 | S -50 305 0 295 1 1 6 N 23 | S -50 405 0 395 1 1 6 N 24 | S -50 450 50 -450 1 1 10 f 25 | X Pin_1 1 -200 400 150 R 50 50 1 1 P 26 | X Pin_2 2 -200 300 150 R 50 50 1 1 P 27 | X Pin_3 3 -200 200 150 R 50 50 1 1 P 28 | X Pin_4 4 -200 100 150 R 50 50 1 1 P 29 | X Pin_5 5 -200 0 150 R 50 50 1 1 P 30 | X Pin_6 6 -200 -100 150 R 50 50 1 1 P 31 | X Pin_7 7 -200 -200 150 R 50 50 1 1 P 32 | X Pin_8 8 -200 -300 150 R 50 50 1 1 P 33 | X Pin_9 9 -200 -400 150 R 50 50 1 1 P 34 | ENDDRAW 35 | ENDDEF 36 | # 37 | # Connector_Generic_Conn_02x04_Odd_Even 38 | # 39 | DEF Connector_Generic_Conn_02x04_Odd_Even J 0 40 Y N 1 F N 40 | F0 "J" 50 200 50 H V C CNN 41 | F1 "Connector_Generic_Conn_02x04_Odd_Even" 50 -300 50 H V C CNN 42 | F2 "" 0 0 50 H I C CNN 43 | F3 "" 0 0 50 H I C CNN 44 | $FPLIST 45 | Connector*:*_2x??_* 46 | $ENDFPLIST 47 | DRAW 48 | S -50 -195 0 -205 1 1 6 N 49 | S -50 -95 0 -105 1 1 6 N 50 | S -50 5 0 -5 1 1 6 N 51 | S -50 105 0 95 1 1 6 N 52 | S -50 150 150 -250 1 1 10 f 53 | S 150 -195 100 -205 1 1 6 N 54 | S 150 -95 100 -105 1 1 6 N 55 | S 150 5 100 -5 1 1 6 N 56 | S 150 105 100 95 1 1 6 N 57 | X Pin_1 1 -200 100 150 R 50 50 1 1 P 58 | X Pin_2 2 300 100 150 L 50 50 1 1 P 59 | X Pin_3 3 -200 0 150 R 50 50 1 1 P 60 | X Pin_4 4 300 0 150 L 50 50 1 1 P 61 | X Pin_5 5 -200 -100 150 R 50 50 1 1 P 62 | X Pin_6 6 300 -100 150 L 50 50 1 1 P 63 | X Pin_7 7 -200 -200 150 R 50 50 1 1 P 64 | X Pin_8 8 300 -200 150 L 50 50 1 1 P 65 | ENDDRAW 66 | ENDDEF 67 | # 68 | # Connector_Generic_Conn_02x05_Odd_Even 69 | # 70 | DEF Connector_Generic_Conn_02x05_Odd_Even J 0 40 Y N 1 F N 71 | F0 "J" 50 300 50 H V C CNN 72 | F1 "Connector_Generic_Conn_02x05_Odd_Even" 50 -300 50 H V C CNN 73 | F2 "" 0 0 50 H I C CNN 74 | F3 "" 0 0 50 H I C CNN 75 | $FPLIST 76 | Connector*:*_2x??_* 77 | $ENDFPLIST 78 | DRAW 79 | S -50 -195 0 -205 1 1 6 N 80 | S -50 -95 0 -105 1 1 6 N 81 | S -50 5 0 -5 1 1 6 N 82 | S -50 105 0 95 1 1 6 N 83 | S -50 205 0 195 1 1 6 N 84 | S -50 250 150 -250 1 1 10 f 85 | S 150 -195 100 -205 1 1 6 N 86 | S 150 -95 100 -105 1 1 6 N 87 | S 150 5 100 -5 1 1 6 N 88 | S 150 105 100 95 1 1 6 N 89 | S 150 205 100 195 1 1 6 N 90 | X Pin_1 1 -200 200 150 R 50 50 1 1 P 91 | X Pin_10 10 300 -200 150 L 50 50 1 1 P 92 | X Pin_2 2 300 200 150 L 50 50 1 1 P 93 | X Pin_3 3 -200 100 150 R 50 50 1 1 P 94 | X Pin_4 4 300 100 150 L 50 50 1 1 P 95 | X Pin_5 5 -200 0 150 R 50 50 1 1 P 96 | X Pin_6 6 300 0 150 L 50 50 1 1 P 97 | X Pin_7 7 -200 -100 150 R 50 50 1 1 P 98 | X Pin_8 8 300 -100 150 L 50 50 1 1 P 99 | X Pin_9 9 -200 -200 150 R 50 50 1 1 P 100 | ENDDRAW 101 | ENDDEF 102 | # 103 | # Connector_Generic_Conn_02x07_Odd_Even 104 | # 105 | DEF Connector_Generic_Conn_02x07_Odd_Even J 0 40 Y N 1 F N 106 | F0 "J" 50 400 50 H V C CNN 107 | F1 "Connector_Generic_Conn_02x07_Odd_Even" 50 -400 50 H V C CNN 108 | F2 "" 0 0 50 H I C CNN 109 | F3 "" 0 0 50 H I C CNN 110 | $FPLIST 111 | Connector*:*_2x??_* 112 | $ENDFPLIST 113 | DRAW 114 | S -50 -295 0 -305 1 1 6 N 115 | S -50 -195 0 -205 1 1 6 N 116 | S -50 -95 0 -105 1 1 6 N 117 | S -50 5 0 -5 1 1 6 N 118 | S -50 105 0 95 1 1 6 N 119 | S -50 205 0 195 1 1 6 N 120 | S -50 305 0 295 1 1 6 N 121 | S -50 350 150 -350 1 1 10 f 122 | S 150 -295 100 -305 1 1 6 N 123 | S 150 -195 100 -205 1 1 6 N 124 | S 150 -95 100 -105 1 1 6 N 125 | S 150 5 100 -5 1 1 6 N 126 | S 150 105 100 95 1 1 6 N 127 | S 150 205 100 195 1 1 6 N 128 | S 150 305 100 295 1 1 6 N 129 | X Pin_1 1 -200 300 150 R 50 50 1 1 P 130 | X Pin_10 10 300 -100 150 L 50 50 1 1 P 131 | X Pin_11 11 -200 -200 150 R 50 50 1 1 P 132 | X Pin_12 12 300 -200 150 L 50 50 1 1 P 133 | X Pin_13 13 -200 -300 150 R 50 50 1 1 P 134 | X Pin_14 14 300 -300 150 L 50 50 1 1 P 135 | X Pin_2 2 300 300 150 L 50 50 1 1 P 136 | X Pin_3 3 -200 200 150 R 50 50 1 1 P 137 | X Pin_4 4 300 200 150 L 50 50 1 1 P 138 | X Pin_5 5 -200 100 150 R 50 50 1 1 P 139 | X Pin_6 6 300 100 150 L 50 50 1 1 P 140 | X Pin_7 7 -200 0 150 R 50 50 1 1 P 141 | X Pin_8 8 300 0 150 L 50 50 1 1 P 142 | X Pin_9 9 -200 -100 150 R 50 50 1 1 P 143 | ENDDRAW 144 | ENDDEF 145 | # 146 | # Connector_Generic_MountingPin_Conn_01x04_MountingPin 147 | # 148 | DEF Connector_Generic_MountingPin_Conn_01x04_MountingPin J 0 40 Y N 1 F N 149 | F0 "J" 0 200 50 H V C CNN 150 | F1 "Connector_Generic_MountingPin_Conn_01x04_MountingPin" 50 -300 50 H V L CNN 151 | F2 "" 0 0 50 H I C CNN 152 | F3 "" 0 0 50 H I C CNN 153 | $FPLIST 154 | Connector*:*_1x??-1MP* 155 | $ENDFPLIST 156 | DRAW 157 | T 0 0 -265 15 0 1 1 Mounting Normal 0 C C 158 | S -50 -195 0 -205 1 1 6 N 159 | S -50 -95 0 -105 1 1 6 N 160 | S -50 5 0 -5 1 1 6 N 161 | S -50 105 0 95 1 1 6 N 162 | S -50 150 50 -250 1 1 10 f 163 | P 2 1 1 6 -40 -280 40 -280 N 164 | X Pin_1 1 -200 100 150 R 50 50 1 1 P 165 | X Pin_2 2 -200 0 150 R 50 50 1 1 P 166 | X Pin_3 3 -200 -100 150 R 50 50 1 1 P 167 | X Pin_4 4 -200 -200 150 R 50 50 1 1 P 168 | X MountPin MP 0 -400 120 U 50 50 1 1 P 169 | ENDDRAW 170 | ENDDEF 171 | # 172 | # Connector_TestPoint 173 | # 174 | DEF Connector_TestPoint TP 0 30 N N 1 F N 175 | F0 "TP" 0 270 50 H V C CNN 176 | F1 "Connector_TestPoint" 0 200 50 H V C CNN 177 | F2 "" 200 0 50 H I C CNN 178 | F3 "" 200 0 50 H I C CNN 179 | $FPLIST 180 | Pin* 181 | Test* 182 | $ENDFPLIST 183 | DRAW 184 | C 0 130 30 0 1 0 N 185 | X 1 1 0 0 100 U 50 50 1 1 P 186 | ENDDRAW 187 | ENDDEF 188 | # 189 | # Connector_USB_C_Receptacle_USB2.0 190 | # 191 | DEF Connector_USB_C_Receptacle_USB2.0 J 0 40 Y Y 1 F N 192 | F0 "J" -400 750 50 H V L CNN 193 | F1 "Connector_USB_C_Receptacle_USB2.0" 750 750 50 H V R CNN 194 | F2 "" 150 0 50 H I C CNN 195 | F3 "" 150 0 50 H I C CNN 196 | $FPLIST 197 | USB*C*Receptacle* 198 | $ENDFPLIST 199 | DRAW 200 | A -275 -150 75 -1799 -1 0 1 20 N -350 -150 -200 -150 201 | A -275 -150 25 -1799 -1 0 1 10 N -300 -150 -250 -150 202 | A -275 -150 25 -1799 -1 0 1 10 F -300 -150 -250 -150 203 | A -275 150 25 1 1799 0 1 10 F -250 150 -300 150 204 | A -275 150 25 1 1799 0 1 10 N -250 150 -300 150 205 | A -275 150 75 1 1799 0 1 20 N -200 150 -350 150 206 | C -100 45 25 0 1 10 F 207 | C 0 -230 50 0 1 0 F 208 | S -10 -700 10 -660 0 0 0 N 209 | S 400 -590 360 -610 0 0 0 N 210 | S 400 -490 360 -510 0 0 0 N 211 | S 400 -190 360 -210 0 0 0 N 212 | S 400 -90 360 -110 0 0 0 N 213 | S 400 10 360 -10 0 0 0 N 214 | S 400 110 360 90 0 0 0 N 215 | S 400 310 360 290 0 0 0 N 216 | S 400 410 360 390 0 0 0 N 217 | S 400 610 360 590 0 0 0 N 218 | S -400 700 400 -700 0 1 10 f 219 | S -300 -150 -250 150 0 1 10 F 220 | S 75 70 125 120 0 1 10 F 221 | P 2 0 1 20 -350 -150 -350 150 N 222 | P 2 0 1 20 -200 150 -200 -150 N 223 | P 2 0 1 20 0 -230 0 170 N 224 | P 3 0 1 20 0 -130 -100 -30 -100 20 N 225 | P 3 0 1 20 0 -80 100 20 100 70 N 226 | P 4 0 1 10 -50 170 0 270 50 170 -50 170 F 227 | X GND A1 0 -900 200 U 50 50 1 1 P 228 | X GND A12 0 -900 200 U 50 50 1 1 P N 229 | X VBUS A4 600 600 200 L 50 50 1 1 P 230 | X CC1 A5 600 400 200 L 50 50 1 1 B 231 | X D+ A6 600 -100 200 L 50 50 1 1 B 232 | X D- A7 600 100 200 L 50 50 1 1 B 233 | X SBU1 A8 600 -500 200 L 50 50 1 1 B 234 | X VBUS A9 600 600 200 L 50 50 1 1 P N 235 | X GND B1 0 -900 200 U 50 50 1 1 P N 236 | X GND B12 0 -900 200 U 50 50 1 1 P N 237 | X VBUS B4 600 600 200 L 50 50 1 1 P N 238 | X CC2 B5 600 300 200 L 50 50 1 1 B 239 | X D+ B6 600 -200 200 L 50 50 1 1 B 240 | X D- B7 600 0 200 L 50 50 1 1 B 241 | X SBU2 B8 600 -600 200 L 50 50 1 1 B 242 | X VBUS B9 600 600 200 L 50 50 1 1 P N 243 | X SHIELD S1 -300 -900 200 U 50 50 1 1 P 244 | ENDDRAW 245 | ENDDEF 246 | # 247 | # Device_C_Small 248 | # 249 | DEF Device_C_Small C 0 10 N N 1 F N 250 | F0 "C" 10 70 50 H V L CNN 251 | F1 "Device_C_Small" 10 -80 50 H V L CNN 252 | F2 "" 0 0 50 H I C CNN 253 | F3 "" 0 0 50 H I C CNN 254 | $FPLIST 255 | C_* 256 | $ENDFPLIST 257 | DRAW 258 | P 2 0 1 13 -60 -20 60 -20 N 259 | P 2 0 1 12 -60 20 60 20 N 260 | X ~ 1 0 100 80 D 50 50 1 1 P 261 | X ~ 2 0 -100 80 U 50 50 1 1 P 262 | ENDDRAW 263 | ENDDEF 264 | # 265 | # Device_Crystal_GND24 266 | # 267 | DEF Device_Crystal_GND24 Y 0 40 Y N 1 F N 268 | F0 "Y" 125 200 50 H V L CNN 269 | F1 "Device_Crystal_GND24" 125 125 50 H V L CNN 270 | F2 "" 0 0 50 H I C CNN 271 | F3 "" 0 0 50 H I C CNN 272 | $FPLIST 273 | Crystal* 274 | $ENDFPLIST 275 | DRAW 276 | S -45 100 45 -100 0 1 12 N 277 | P 2 0 1 0 -100 0 -80 0 N 278 | P 2 0 1 20 -80 -50 -80 50 N 279 | P 2 0 1 0 0 -150 0 -140 N 280 | P 2 0 1 0 0 140 0 150 N 281 | P 2 0 1 20 80 -50 80 50 N 282 | P 2 0 1 0 80 0 100 0 N 283 | P 4 0 1 0 -100 -90 -100 -140 100 -140 100 -90 N 284 | P 4 0 1 0 -100 90 -100 140 100 140 100 90 N 285 | X 1 1 -150 0 50 R 50 50 1 1 P 286 | X 2 2 0 200 50 D 50 50 1 1 P 287 | X 3 3 150 0 50 L 50 50 1 1 P 288 | X 4 4 0 -200 50 U 50 50 1 1 P 289 | ENDDRAW 290 | ENDDEF 291 | # 292 | # Device_Ferrite_Bead_Small 293 | # 294 | DEF Device_Ferrite_Bead_Small FB 0 0 N Y 1 F N 295 | F0 "FB" 75 50 50 H V L CNN 296 | F1 "Device_Ferrite_Bead_Small" 75 -50 50 H V L CNN 297 | F2 "" -70 0 50 V I C CNN 298 | F3 "" 0 0 50 H I C CNN 299 | $FPLIST 300 | Inductor_* 301 | L_* 302 | *Ferrite* 303 | $ENDFPLIST 304 | DRAW 305 | P 2 0 1 0 0 -50 0 -31 N 306 | P 2 0 1 0 0 35 0 51 N 307 | P 5 0 1 0 -72 11 -44 59 72 -8 44 -56 -72 11 N 308 | X ~ 1 0 100 50 D 50 50 1 1 P 309 | X ~ 2 0 -100 50 U 50 50 1 1 P 310 | ENDDRAW 311 | ENDDEF 312 | # 313 | # Device_Jumper_NC_Small 314 | # 315 | DEF Device_Jumper_NC_Small JP 0 30 N N 1 F N 316 | F0 "JP" 0 80 50 H V C CNN 317 | F1 "Device_Jumper_NC_Small" 10 -60 50 H V C CNN 318 | F2 "" 0 0 50 H I C CNN 319 | F3 "" 0 0 50 H I C CNN 320 | $FPLIST 321 | SolderJumper*Bridged* 322 | Jumper* 323 | TestPoint*2Pads* 324 | TestPoint*Bridge* 325 | $ENDFPLIST 326 | DRAW 327 | A 0 -10 57 450 1350 0 1 0 N 40 30 -40 30 328 | C -40 0 20 0 1 0 N 329 | C 40 0 20 0 1 0 N 330 | X 1 1 -100 0 40 R 50 50 0 1 P 331 | X 2 2 100 0 40 L 50 50 0 1 P 332 | ENDDRAW 333 | ENDDEF 334 | # 335 | # Device_Jumper_NO_Small 336 | # 337 | DEF Device_Jumper_NO_Small JP 0 30 N N 1 F N 338 | F0 "JP" 0 80 50 H V C CNN 339 | F1 "Device_Jumper_NO_Small" 10 -60 50 H V C CNN 340 | F2 "" 0 0 50 H I C CNN 341 | F3 "" 0 0 50 H I C CNN 342 | $FPLIST 343 | SolderJumper*Open* 344 | Jumper* 345 | TestPoint*2Pads* 346 | TestPoint*Bridge* 347 | $ENDFPLIST 348 | DRAW 349 | C -40 0 20 0 1 0 N 350 | C 40 0 20 0 1 0 N 351 | X 1 1 -100 0 40 R 50 50 0 1 P 352 | X 2 2 100 0 40 L 50 50 0 1 P 353 | ENDDRAW 354 | ENDDEF 355 | # 356 | # Device_LED 357 | # 358 | DEF Device_LED D 0 40 N N 1 F N 359 | F0 "D" 0 100 50 H V C CNN 360 | F1 "Device_LED" 0 -100 50 H V C CNN 361 | F2 "" 0 0 50 H I C CNN 362 | F3 "" 0 0 50 H I C CNN 363 | $FPLIST 364 | LED* 365 | LED_SMD:* 366 | LED_THT:* 367 | $ENDFPLIST 368 | DRAW 369 | P 2 0 1 10 -50 -50 -50 50 N 370 | P 2 0 1 0 -50 0 50 0 N 371 | P 4 0 1 10 50 -50 50 50 -50 0 50 -50 N 372 | P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N 373 | P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N 374 | X K 1 -150 0 100 R 50 50 1 1 P 375 | X A 2 150 0 100 L 50 50 1 1 P 376 | ENDDRAW 377 | ENDDEF 378 | # 379 | # Device_LED_Small 380 | # 381 | DEF Device_LED_Small D 0 10 N N 1 F N 382 | F0 "D" -50 125 50 H V L CNN 383 | F1 "Device_LED_Small" -175 -100 50 H V L CNN 384 | F2 "" 0 0 50 V I C CNN 385 | F3 "" 0 0 50 V I C CNN 386 | $FPLIST 387 | LED* 388 | LED_SMD:* 389 | LED_THT:* 390 | $ENDFPLIST 391 | DRAW 392 | P 2 0 1 10 -30 -40 -30 40 N 393 | P 2 0 1 0 40 0 -30 0 N 394 | P 4 0 1 10 30 -40 -30 0 30 40 30 -40 N 395 | P 5 0 1 0 0 30 -20 50 -10 50 -20 50 -20 40 N 396 | P 5 0 1 0 20 50 0 70 10 70 0 70 0 60 N 397 | X K 1 -100 0 70 R 50 50 1 1 P 398 | X A 2 100 0 70 L 50 50 1 1 P 399 | ENDDRAW 400 | ENDDEF 401 | # 402 | # Device_Q_NMOS_GSD 403 | # 404 | DEF Device_Q_NMOS_GSD Q 0 0 Y N 1 F N 405 | F0 "Q" 200 50 50 H V L CNN 406 | F1 "Device_Q_NMOS_GSD" 200 -50 50 H V L CNN 407 | F2 "" 200 100 50 H I C CNN 408 | F3 "" 0 0 50 H I C CNN 409 | DRAW 410 | C 65 0 110 0 1 10 N 411 | C 100 -70 10 0 1 0 F 412 | C 100 70 10 0 1 0 F 413 | P 2 0 1 0 10 0 -100 0 N 414 | P 2 0 1 10 10 75 10 -75 N 415 | P 2 0 1 10 30 -50 30 -90 N 416 | P 2 0 1 10 30 20 30 -20 N 417 | P 2 0 1 10 30 90 30 50 N 418 | P 2 0 1 0 100 100 100 70 N 419 | P 3 0 1 0 100 -100 100 0 30 0 N 420 | P 4 0 1 0 30 -70 130 -70 130 70 30 70 N 421 | P 4 0 1 0 40 0 80 15 80 -15 40 0 F 422 | P 4 0 1 0 110 20 115 15 145 15 150 10 N 423 | P 4 0 1 0 130 15 115 -10 145 -10 130 15 N 424 | X G 1 -200 0 100 R 50 50 1 1 I 425 | X S 2 100 -200 100 U 50 50 1 1 P 426 | X D 3 100 200 100 D 50 50 1 1 P 427 | ENDDRAW 428 | ENDDEF 429 | # 430 | # Device_R 431 | # 432 | DEF Device_R R 0 0 N Y 1 F N 433 | F0 "R" 80 0 50 V V C CNN 434 | F1 "Device_R" 0 0 50 V V C CNN 435 | F2 "" -70 0 50 V I C CNN 436 | F3 "" 0 0 50 H I C CNN 437 | $FPLIST 438 | R_* 439 | $ENDFPLIST 440 | DRAW 441 | S -40 -100 40 100 0 1 10 N 442 | X ~ 1 0 150 50 D 50 50 1 1 P 443 | X ~ 2 0 -150 50 U 50 50 1 1 P 444 | ENDDRAW 445 | ENDDEF 446 | # 447 | # Device_R_Pack04 448 | # 449 | DEF Device_R_Pack04 RN 0 0 Y N 1 F N 450 | F0 "RN" -300 0 50 V V C CNN 451 | F1 "Device_R_Pack04" 200 0 50 V V C CNN 452 | F2 "" 275 0 50 V I C CNN 453 | F3 "" 0 0 50 H I C CNN 454 | $FPLIST 455 | DIP* 456 | SOIC* 457 | R*Array*Concave* 458 | R*Array*Convex* 459 | $ENDFPLIST 460 | DRAW 461 | S -250 -95 150 95 0 1 10 f 462 | S -225 75 -175 -75 0 1 10 N 463 | S -125 75 -75 -75 0 1 10 N 464 | S -25 75 25 -75 0 1 10 N 465 | S 75 75 125 -75 0 1 10 N 466 | P 2 0 1 0 -200 -100 -200 -75 N 467 | P 2 0 1 0 -200 75 -200 100 N 468 | P 2 0 1 0 -100 -100 -100 -75 N 469 | P 2 0 1 0 -100 75 -100 100 N 470 | P 2 0 1 0 0 -100 0 -75 N 471 | P 2 0 1 0 0 75 0 100 N 472 | P 2 0 1 0 100 -100 100 -75 N 473 | P 2 0 1 0 100 75 100 100 N 474 | X R1.1 1 -200 -200 100 U 50 50 1 1 P 475 | X R2.1 2 -100 -200 100 U 50 50 1 1 P 476 | X R3.1 3 0 -200 100 U 50 50 1 1 P 477 | X R4.1 4 100 -200 100 U 50 50 1 1 P 478 | X R4.2 5 100 200 100 D 50 50 1 1 P 479 | X R3.2 6 0 200 100 D 50 50 1 1 P 480 | X R2.2 7 -100 200 100 D 50 50 1 1 P 481 | X R1.2 8 -200 200 100 D 50 50 1 1 P 482 | ENDDRAW 483 | ENDDEF 484 | # 485 | # Device_R_Small 486 | # 487 | DEF Device_R_Small R 0 10 N N 1 F N 488 | F0 "R" 30 20 50 H V L CNN 489 | F1 "Device_R_Small" 30 -40 50 H V L CNN 490 | F2 "" 0 0 50 H I C CNN 491 | F3 "" 0 0 50 H I C CNN 492 | $FPLIST 493 | R_* 494 | $ENDFPLIST 495 | DRAW 496 | S -30 70 30 -70 0 1 8 N 497 | X ~ 1 0 100 30 D 50 50 1 1 P 498 | X ~ 2 0 -100 30 U 50 50 1 1 P 499 | ENDDRAW 500 | ENDDEF 501 | # 502 | # Graphic_Logo_Open_Hardware_Small 503 | # 504 | DEF Graphic_Logo_Open_Hardware_Small #LOGO 0 40 Y Y 1 F N 505 | F0 "#LOGO" 0 275 50 H I C CNN 506 | F1 "Graphic_Logo_Open_Hardware_Small" 0 -225 50 H I C CNN 507 | F2 "" 0 0 50 H I C CNN 508 | F3 "" 0 0 50 H I C CNN 509 | DRAW 510 | P 277 0 1 0 132 -171 130 -170 125 -167 118 -162 109 -156 100 -150 93 -146 88 -142 86 -141 85 -142 81 -144 75 -147 71 -149 66 -151 63 -151 63 -151 61 -147 58 -139 53 -130 49 -119 44 -107 38 -95 34 -83 29 -72 26 -64 24 -58 23 -55 23 -55 26 -52 31 -49 41 -40 51 -27 57 -13 60 3 58 18 52 32 42 45 30 54 16 60 0 62 -15 61 -29 55 -42 45 -48 39 -55 26 -60 12 -60 9 -59 -7 -55 -21 -47 -34 -36 -45 -34 -46 -29 -50 -25 -53 -23 -55 -42 -102 -45 -110 -51 -123 -55 -134 -59 -143 -62 -149 -63 -151 -63 -151 -65 -151 -68 -150 -75 -147 -79 -145 -84 -142 -87 -141 -89 -142 -93 -145 -100 -150 -109 -156 -117 -161 -124 -166 -130 -170 -132 -171 -133 -171 -135 -170 -139 -166 -146 -160 -155 -151 -156 -150 -164 -142 -170 -136 -174 -131 -175 -129 -175 -129 -174 -127 -170 -121 -166 -114 -160 -105 -144 -82 -153 -61 -155 -54 -159 -46 -161 -41 -162 -38 -165 -37 -170 -36 -179 -34 -189 -32 -199 -31 -207 -29 -214 -28 -217 -27 -217 -27 -218 -25 -218 -22 -218 -17 -219 -9 -219 3 -219 5 -218 16 -218 25 -218 30 -218 33 -218 33 -215 33 -209 35 -200 36 -190 38 -189 39 -179 41 -170 42 -164 44 -161 45 -161 45 -159 49 -156 56 -152 64 -149 72 -146 79 -144 85 -143 87 -143 87 -145 90 -148 95 -153 102 -160 111 -160 112 -166 121 -171 128 -174 133 -175 136 -175 136 -173 138 -169 143 -162 150 -155 158 -152 160 -144 169 -138 174 -134 177 -132 178 -132 178 -130 176 -124 172 -117 167 -108 161 -107 161 -98 155 -91 150 -86 146 -84 145 -83 145 -80 146 -73 148 -66 151 -58 155 -50 158 -45 160 -42 162 -42 162 -41 165 -40 171 -38 180 -36 191 -35 193 -33 203 -32 212 -31 218 -30 220 -28 221 -23 221 -16 221 -6 221 3 221 13 221 21 221 27 220 29 220 29 220 30 217 32 210 33 201 36 190 36 188 38 178 40 169 41 163 42 161 42 161 47 159 54 156 62 152 82 144 107 161 109 163 118 169 125 174 130 177 133 178 133 178 135 176 140 171 147 165 154 157 160 151 167 144 171 140 174 137 174 135 174 134 173 131 169 126 164 118 158 110 153 102 148 94 144 88 143 85 143 84 145 79 148 72 152 63 160 44 173 41 181 40 192 38 202 36 218 33 219 -26 216 -27 214 -27 208 -29 199 -30 189 -32 181 -34 172 -36 166 -37 163 -37 162 -38 160 -42 157 -49 154 -57 150 -65 147 -73 145 -79 144 -82 145 -84 149 -89 153 -97 159 -105 165 -114 170 -121 173 -126 175 -129 174 -131 171 -135 164 -141 155 -151 153 -152 145 -160 139 -166 134 -170 132 -171 F 511 | ENDDRAW 512 | ENDDEF 513 | # 514 | # Interface_USB_FT2232HQ 515 | # 516 | DEF Interface_USB_FT2232HQ U 0 20 Y Y 1 F N 517 | F0 "U" -1050 2100 50 H V L CNN 518 | F1 "Interface_USB_FT2232HQ" 750 2100 50 H V L CNN 519 | F2 "Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP4.35x4.35mm" 0 0 50 H I C CNN 520 | F3 "" 0 0 50 H I C CNN 521 | $FPLIST 522 | QFN*1EP*9x9mm*P0.5mm* 523 | $ENDFPLIST 524 | DRAW 525 | S -1050 -2050 1050 2050 0 1 10 f 526 | X GND 1 -400 -2200 150 U 50 50 1 1 W 527 | X AGND 10 -600 -2200 150 U 50 50 1 1 W 528 | X GND 11 -200 -2200 150 U 50 50 1 1 W 529 | X VCORE 12 -200 2200 150 D 50 50 1 1 W 530 | X TEST 13 -1200 -1800 150 R 50 50 1 1 I 531 | X ~RESET 14 -1200 400 150 R 50 50 1 1 I 532 | X GND 15 -100 -2200 150 U 50 50 1 1 W 533 | X ADBUS0 16 1200 1900 150 L 50 50 1 1 B 534 | X ADBUS1 17 1200 1800 150 L 50 50 1 1 B 535 | X ADBUS2 18 1200 1700 150 L 50 50 1 1 B 536 | X ADBUS3 19 1200 1600 150 L 50 50 1 1 B 537 | X OSCI 2 -1200 -1200 150 R 50 50 1 1 I 538 | X VCCIO 20 200 2200 150 D 50 50 1 1 W 539 | X ADBUS4 21 1200 1500 150 L 50 50 1 1 B 540 | X ADBUS5 22 1200 1400 150 L 50 50 1 1 B 541 | X ADBUS6 23 1200 1300 150 L 50 50 1 1 B 542 | X ADBUS7 24 1200 1200 150 L 50 50 1 1 B 543 | X GND 25 0 -2200 150 U 50 50 1 1 W 544 | X ACBUS0 26 1200 1000 150 L 50 50 1 1 B 545 | X ACBUS1 27 1200 900 150 L 50 50 1 1 B 546 | X ACBUS2 28 1200 800 150 L 50 50 1 1 B 547 | X ACBUS3 29 1200 700 150 L 50 50 1 1 B 548 | X OSCO 3 -1200 -1600 150 R 50 50 1 1 O 549 | X ACBUS4 30 1200 600 150 L 50 50 1 1 B 550 | X VCCIO 31 300 2200 150 D 50 50 1 1 W 551 | X ACBUS5 32 1200 500 150 L 50 50 1 1 B 552 | X ACBUS6 33 1200 400 150 L 50 50 1 1 B 553 | X ACBUS7 34 1200 300 150 L 50 50 1 1 B 554 | X GND 35 100 -2200 150 U 50 50 1 1 W 555 | X ~SUSPEND 36 1200 -1800 150 L 50 50 1 1 O 556 | X VCORE 37 -100 2200 150 D 50 50 1 1 W 557 | X BDBUS0 38 1200 100 150 L 50 50 1 1 B 558 | X BDBUS1 39 1200 0 150 L 50 50 1 1 B 559 | X VPHY 4 -500 2200 150 D 50 50 1 1 W 560 | X BDBUS2 40 1200 -100 150 L 50 50 1 1 B 561 | X BDBUS3 41 1200 -200 150 L 50 50 1 1 B 562 | X VCCIO 42 400 2200 150 D 50 50 1 1 W 563 | X BDBUS4 43 1200 -300 150 L 50 50 1 1 B 564 | X BDBUS5 44 1200 -400 150 L 50 50 1 1 B 565 | X BDBUS6 45 1200 -500 150 L 50 50 1 1 B 566 | X BDBUS7 46 1200 -600 150 L 50 50 1 1 B 567 | X GND 47 200 -2200 150 U 50 50 1 1 W 568 | X BCBUS0 48 1200 -800 150 L 50 50 1 1 B 569 | X VREGOUT 49 -1200 1700 150 R 50 50 1 1 w 570 | X GND 5 -300 -2200 150 U 50 50 1 1 W 571 | X VREGIN 50 -1200 1900 150 R 50 50 1 1 W 572 | X GND 51 300 -2200 150 U 50 50 1 1 W 573 | X BCBUS1 52 1200 -900 150 L 50 50 1 1 B 574 | X BCBUS2 53 1200 -1000 150 L 50 50 1 1 B 575 | X BCBUS3 54 1200 -1100 150 L 50 50 1 1 B 576 | X BCBUS4 55 1200 -1200 150 L 50 50 1 1 B 577 | X VCCIO 56 500 2200 150 D 50 50 1 1 W 578 | X BCBUS5 57 1200 -1300 150 L 50 50 1 1 B 579 | X BCBUS6 58 1200 -1400 150 L 50 50 1 1 B 580 | X BCBUS7 59 1200 -1500 150 L 50 50 1 1 B 581 | X REF 6 -1200 600 150 R 50 50 1 1 O 582 | X ~PWREN 60 1200 -1700 150 L 50 50 1 1 O 583 | X EEDATA 61 -1200 -900 150 R 50 50 1 1 B 584 | X EECLK 62 -1200 -800 150 R 50 50 1 1 O 585 | X EECS 63 -1200 -700 150 R 50 50 1 1 O 586 | X VCORE 64 0 2200 150 D 50 50 1 1 W 587 | X GND 65 400 -2200 150 U 50 50 1 1 W 588 | X DM 7 -1200 900 150 R 50 50 1 1 B 589 | X DP 8 -1200 800 150 R 50 50 1 1 B 590 | X VPLL 9 -400 2200 150 D 50 50 1 1 I 591 | ENDDRAW 592 | ENDDEF 593 | # 594 | # Mechanical_MountingHole 595 | # 596 | DEF Mechanical_MountingHole H 0 40 Y Y 1 F N 597 | F0 "H" 0 200 50 H V C CNN 598 | F1 "Mechanical_MountingHole" 0 125 50 H V C CNN 599 | F2 "" 0 0 50 H I C CNN 600 | F3 "" 0 0 50 H I C CNN 601 | $FPLIST 602 | MountingHole* 603 | $ENDFPLIST 604 | DRAW 605 | C 0 0 50 0 1 50 N 606 | ENDDRAW 607 | ENDDEF 608 | # 609 | # Memory_EEPROM_93LCxxBxxOT 610 | # 611 | DEF Memory_EEPROM_93LCxxBxxOT U 0 20 Y Y 1 F N 612 | F0 "U" -250 250 50 H V C CNN 613 | F1 "Memory_EEPROM_93LCxxBxxOT" 300 -250 50 H V C CNN 614 | F2 "Package_TO_SOT_SMD:SOT-23-6" 0 0 50 H I C CNN 615 | F3 "" 0 0 50 H I C CNN 616 | ALIAS 93LCxxBxxOT 617 | $FPLIST 618 | SOT?23* 619 | $ENDFPLIST 620 | DRAW 621 | S -300 200 300 -200 0 1 10 f 622 | X DO 1 400 -100 100 L 50 50 1 1 T 623 | X GND 2 0 -300 100 U 50 50 1 1 W 624 | X DI 3 400 0 100 L 50 50 1 1 I 625 | X CLK 4 400 100 100 L 50 50 1 1 I 626 | X CS 5 -400 100 100 R 50 50 1 1 I 627 | X VCC 6 0 300 100 D 50 50 1 1 W 628 | ENDDRAW 629 | ENDDEF 630 | # 631 | # power_+1V8 632 | # 633 | DEF power_+1V8 #PWR 0 0 Y Y 1 F P 634 | F0 "#PWR" 0 -150 50 H I C CNN 635 | F1 "power_+1V8" 0 140 50 H V C CNN 636 | F2 "" 0 0 50 H I C CNN 637 | F3 "" 0 0 50 H I C CNN 638 | DRAW 639 | P 2 0 1 0 -30 50 0 100 N 640 | P 2 0 1 0 0 0 0 100 N 641 | P 2 0 1 0 0 100 30 50 N 642 | X +1V8 1 0 0 0 U 50 50 1 1 W N 643 | ENDDRAW 644 | ENDDEF 645 | # 646 | # power_+3V3 647 | # 648 | DEF power_+3V3 #PWR 0 0 Y Y 1 F P 649 | F0 "#PWR" 0 -150 50 H I C CNN 650 | F1 "power_+3V3" 0 140 50 H V C CNN 651 | F2 "" 0 0 50 H I C CNN 652 | F3 "" 0 0 50 H I C CNN 653 | ALIAS +3.3V 654 | DRAW 655 | P 2 0 1 0 -30 50 0 100 N 656 | P 2 0 1 0 0 0 0 100 N 657 | P 2 0 1 0 0 100 30 50 N 658 | X +3V3 1 0 0 0 U 50 50 1 1 W N 659 | ENDDRAW 660 | ENDDEF 661 | # 662 | # power_+5V 663 | # 664 | DEF power_+5V #PWR 0 0 Y Y 1 F P 665 | F0 "#PWR" 0 -150 50 H I C CNN 666 | F1 "power_+5V" 0 140 50 H V C CNN 667 | F2 "" 0 0 50 H I C CNN 668 | F3 "" 0 0 50 H I C CNN 669 | DRAW 670 | P 2 0 1 0 -30 50 0 100 N 671 | P 2 0 1 0 0 0 0 100 N 672 | P 2 0 1 0 0 100 30 50 N 673 | X +5V 1 0 0 0 U 50 50 1 1 W N 674 | ENDDRAW 675 | ENDDEF 676 | # 677 | # power_GND 678 | # 679 | DEF power_GND #PWR 0 0 Y Y 1 F P 680 | F0 "#PWR" 0 -250 50 H I C CNN 681 | F1 "power_GND" 0 -150 50 H V C CNN 682 | F2 "" 0 0 50 H I C CNN 683 | F3 "" 0 0 50 H I C CNN 684 | DRAW 685 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 686 | X GND 1 0 0 0 D 50 50 1 1 W N 687 | ENDDRAW 688 | ENDDEF 689 | # 690 | # power_PWR_FLAG 691 | # 692 | DEF power_PWR_FLAG #FLG 0 0 N N 1 F P 693 | F0 "#FLG" 0 75 50 H I C CNN 694 | F1 "power_PWR_FLAG" 0 150 50 H V C CNN 695 | F2 "" 0 0 50 H I C CNN 696 | F3 "" 0 0 50 H I C CNN 697 | DRAW 698 | P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N 699 | X pwr 1 0 0 0 U 50 50 0 0 w 700 | ENDDRAW 701 | ENDDEF 702 | # 703 | # tigard_AP7365-18 704 | # 705 | DEF tigard_AP7365-18 U 0 40 Y Y 1 F N 706 | F0 "U" 0 -200 50 H V C CNN 707 | F1 "tigard_AP7365-18" 0 200 50 H V C CNN 708 | F2 "Package_TO_SOT_SMD:SOT-23-5" 100 300 50 H I C CNN 709 | F3 "" 0 0 50 H I C CNN 710 | F4 "AP7365-18WG-7" 0 400 50 H I C CNN "P/N" 711 | F5 "C460402" 0 500 50 H I C CNN "LCSC" 712 | DRAW 713 | S -200 150 200 -150 0 1 0 f 714 | X VIN 1 -300 100 100 R 50 50 1 1 W 715 | X GND 2 0 -250 100 U 50 50 1 1 W 716 | X EN 3 -300 0 100 R 50 50 1 1 I 717 | X NC 4 300 0 100 L 50 50 1 1 N N 718 | X VOUT 5 300 100 100 L 50 50 1 1 w 719 | ENDDRAW 720 | ENDDEF 721 | # 722 | # tigard_AP7365-33 723 | # 724 | DEF tigard_AP7365-33 U 0 40 Y Y 1 F N 725 | F0 "U" 0 -200 50 H V C CNN 726 | F1 "tigard_AP7365-33" 0 200 50 H V C CNN 727 | F2 "Package_TO_SOT_SMD:SOT-23-5" 100 300 50 H I C CNN 728 | F3 "" 0 0 50 H I C CNN 729 | F4 "AP7365-33WG-7" 0 400 50 H I C CNN "P/N" 730 | F5 "C150742" 0 500 50 H I C CNN "LCSC" 731 | DRAW 732 | S -200 150 200 -150 0 1 0 f 733 | X VIN 1 -300 100 100 R 50 50 1 1 W 734 | X GND 2 0 -250 100 U 50 50 1 1 W 735 | X EN 3 -300 0 100 R 50 50 1 1 I 736 | X NC 4 300 0 100 L 50 50 1 1 N N 737 | X VOUT 5 300 100 100 L 50 50 1 1 w 738 | ENDDRAW 739 | ENDDEF 740 | # 741 | # tigard_Logo_SH 742 | # 743 | DEF tigard_Logo_SH #LOGO? 0 40 Y Y 1 F N 744 | F0 "#LOGO?" 0 -250 50 H I C CNN 745 | F1 "tigard_Logo_SH" 0 250 50 H I C CNN 746 | F2 "" 0 0 50 H I C CNN 747 | F3 "" 0 0 50 H I C CNN 748 | DRAW 749 | T 0 0 0 200 0 0 0 SH Normal 0 C C 750 | ENDDRAW 751 | ENDDEF 752 | # 753 | # tigard_SN74LVC8T245 754 | # 755 | DEF tigard_SN74LVC8T245 U 0 40 Y Y 1 F N 756 | F0 "U" 0 850 50 H V C CNN 757 | F1 "tigard_SN74LVC8T245" 0 750 50 H V C CNN 758 | F2 "" 0 100 50 H I C CNN 759 | F3 "" 0 100 50 H I C CNN 760 | DRAW 761 | S -350 700 350 -450 0 1 0 f 762 | X VCCA 1 -450 650 100 R 50 50 1 1 W 763 | X A8 10 -450 -400 100 R 50 50 1 1 B 764 | X GND 11 -100 -550 100 U 50 50 1 1 W 765 | X GND 12 0 -550 100 U 50 50 1 1 W 766 | X GND 13 100 -550 100 U 50 50 1 1 W 767 | X B8 14 450 -400 100 L 50 50 1 1 B 768 | X B7 15 450 -300 100 L 50 50 1 1 B 769 | X B6 16 450 -200 100 L 50 50 1 1 B 770 | X B5 17 450 -100 100 L 50 50 1 1 B 771 | X B4 18 450 0 100 L 50 50 1 1 B 772 | X B3 19 450 100 100 L 50 50 1 1 B 773 | X DIR 2 -450 550 100 R 50 50 1 1 I 774 | X B2 20 450 200 100 L 50 50 1 1 B 775 | X B1 21 450 300 100 L 50 50 1 1 B 776 | X OE 22 450 450 100 L 50 50 1 1 I 777 | X VCCB 23 450 550 100 L 50 50 1 1 W 778 | X VCCB 24 450 650 100 L 50 50 1 1 W 779 | X A1 3 -450 300 100 R 50 50 1 1 B 780 | X A2 4 -450 200 100 R 50 50 1 1 B 781 | X A3 5 -450 100 100 R 50 50 1 1 B 782 | X A4 6 -450 0 100 R 50 50 1 1 B 783 | X A5 7 -450 -100 100 R 50 50 1 1 B 784 | X A6 8 -450 -200 100 R 50 50 1 1 B 785 | X A7 9 -450 -300 100 R 50 50 1 1 B 786 | ENDDRAW 787 | ENDDEF 788 | # 789 | # tigard_SW_DP4T 790 | # 791 | DEF tigard_SW_DP4T SW 0 0 Y N 1 F N 792 | F0 "SW" 0 250 50 H V C CNN 793 | F1 "tigard_SW_DP4T" 0 -750 50 H V C CNN 794 | F2 "" 150 50 50 H I C CNN 795 | F3 "" 150 50 50 H I C CNN 796 | DRAW 797 | C -130 -450 18 1 1 0 N 798 | C -130 0 18 1 1 0 N 799 | C 130 -600 18 1 1 0 N 800 | C 130 -500 18 1 1 0 N 801 | C 130 -400 18 1 1 0 N 802 | C 130 -300 18 1 1 0 N 803 | C 130 -150 18 1 1 0 N 804 | C 130 -50 18 1 1 0 N 805 | C 130 50 18 1 1 0 N 806 | C 130 150 18 1 1 0 N 807 | P 2 0 1 0 -110 0 110 150 N 808 | P 2 0 1 0 0 -375 0 -325 N 809 | P 2 0 1 0 0 -275 0 -225 N 810 | P 2 0 1 0 0 -175 0 -125 N 811 | P 2 0 1 0 0 -75 0 -25 N 812 | P 2 0 1 0 0 25 0 75 N 813 | P 2 1 1 0 -110 -450 110 -300 N 814 | X 1 1 250 150 100 L 50 50 1 1 P 815 | X 10 10 250 -600 100 L 50 50 1 1 P 816 | X 2 2 250 50 100 L 50 50 1 1 P 817 | X 3 3 -250 0 100 R 50 50 1 1 P 818 | X 4 4 250 -50 100 L 50 50 1 1 P 819 | X 5 5 250 -150 100 L 50 50 1 1 P 820 | X 6 6 250 -300 100 L 50 50 1 1 P 821 | X 7 7 250 -400 100 L 50 50 1 1 P 822 | X 8 8 -250 -450 100 R 50 50 1 1 P 823 | X 9 9 250 -500 100 L 50 50 1 1 P 824 | ENDDRAW 825 | ENDDEF 826 | # 827 | # tigard_SW_DPDT 828 | # 829 | DEF tigard_SW_DPDT SW 0 0 Y N 1 F N 830 | F0 "SW" 0 550 50 H V C CNN 831 | F1 "tigard_SW_DPDT" 0 -200 50 H V C CNN 832 | F2 "" 0 0 50 H I C CNN 833 | F3 "" 0 0 50 H I C CNN 834 | DRAW 835 | C -80 0 20 0 0 0 N 836 | C 80 -100 20 0 0 0 N 837 | C 80 100 20 0 1 0 N 838 | C -80 350 20 1 1 0 N 839 | C 80 250 20 1 1 0 N 840 | C 80 450 20 1 1 0 N 841 | P 2 0 1 0 -60 10 65 90 N 842 | P 2 0 1 0 0 50 0 100 N 843 | P 2 0 1 0 0 150 0 200 N 844 | P 2 0 1 0 0 250 0 300 N 845 | P 2 0 1 0 0 350 0 400 N 846 | P 2 1 1 0 -60 360 65 440 N 847 | X 1 1 200 100 100 L 50 50 1 1 P 848 | X 2 2 -200 0 100 R 50 50 1 1 P 849 | X 3 3 200 -100 100 L 50 50 1 1 P 850 | X 4 4 200 450 100 L 50 50 1 1 P 851 | X 5 5 -200 350 100 R 50 50 1 1 P 852 | X 6 6 200 250 100 L 50 50 1 1 P 853 | ENDDRAW 854 | ENDDEF 855 | # 856 | # tigard_VREF 857 | # 858 | DEF tigard_VREF #PWR 0 0 Y Y 1 F P 859 | F0 "#PWR" 0 -150 50 H I C CNN 860 | F1 "tigard_VREF" 0 150 50 H V C CNN 861 | F2 "" 0 0 50 H I C CNN 862 | F3 "" 0 0 50 H I C CNN 863 | DRAW 864 | P 2 0 1 0 -30 50 0 100 N 865 | P 2 0 1 0 0 0 0 100 N 866 | P 2 0 1 0 0 100 30 50 N 867 | X VREF 1 0 0 0 U 50 50 1 1 W N 868 | ENDDRAW 869 | ENDDEF 870 | # 871 | # tigard_VREG 872 | # 873 | DEF tigard_VREG #PWR 0 0 Y Y 1 F P 874 | F0 "#PWR" 0 -150 50 H I C CNN 875 | F1 "tigard_VREG" 0 150 50 H V C CNN 876 | F2 "" 0 0 50 H I C CNN 877 | F3 "" 0 0 50 H I C CNN 878 | DRAW 879 | P 2 0 1 0 -30 50 0 100 N 880 | P 2 0 1 0 0 0 0 100 N 881 | P 2 0 1 0 0 100 30 50 N 882 | X VREG 1 0 0 0 U 50 50 1 1 W N 883 | ENDDRAW 884 | ENDDEF 885 | # 886 | # tigard_VTARGET 887 | # 888 | DEF tigard_VTARGET #PWR 0 0 Y Y 1 F P 889 | F0 "#PWR" 0 -150 50 H I C CNN 890 | F1 "tigard_VTARGET" 0 150 50 H V C CNN 891 | F2 "" 0 0 50 H I C CNN 892 | F3 "" 0 0 50 H I C CNN 893 | DRAW 894 | P 2 0 1 0 -30 50 0 100 N 895 | P 2 0 1 0 0 0 0 100 N 896 | P 2 0 1 0 0 100 30 50 N 897 | X VTARGET 1 0 0 0 U 50 50 1 1 W N 898 | ENDDRAW 899 | ENDDEF 900 | # 901 | #End Library 902 | -------------------------------------------------------------------------------- /tigard-render.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tigard-tools/tigard/10dd793dc8ad9f47ae9b1e76fa4ad3678dd39fff/tigard-render.png -------------------------------------------------------------------------------- /tigard.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | $CMP AP7365-18 4 | D Fixed 6V 1.8V 600mA SOT25 Low Dropout Regulators(LDO) RoHS 5 | $ENDCMP 6 | # 7 | $CMP AP7365-33 8 | D Fixed 6V 3.3V 600mA SOT25 Low Dropout Regulators(LDO) RoHS 9 | $ENDCMP 10 | # 11 | $CMP SW_DP4T 12 | D Switch, dual pole four throw 13 | K switch dual-pole four-throw dp4t ON-ON-ON-ON 14 | F ~ 15 | $ENDCMP 16 | # 17 | $CMP SW_DPDT 18 | D Switch, dual pole double throw 19 | K switch dual-pole double-throw spdt ON-ON 20 | F ~ 21 | $ENDCMP 22 | # 23 | $CMP VREF 24 | D Power symbol creates a global label with name "VREF" 25 | K power-flag 26 | $ENDCMP 27 | # 28 | $CMP VREG 29 | D Power symbol creates a global label with name "VREG" 30 | K power-flag 31 | $ENDCMP 32 | # 33 | $CMP VTARGET 34 | D Power symbol creates a global label with name "VTARGET" 35 | K power-flag 36 | $ENDCMP 37 | # 38 | #End Doc Library 39 | -------------------------------------------------------------------------------- /tigard.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # AP7365-18 5 | # 6 | DEF AP7365-18 U 0 40 Y Y 1 F N 7 | F0 "U" 0 -200 50 H V C CNN 8 | F1 "AP7365-18" 0 200 50 H V C CNN 9 | F2 "Package_TO_SOT_SMD:SOT-23-5" 100 300 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | F4 "AP7365-18WG-7" 0 400 50 H I C CNN "P/N" 12 | F5 "C460402" 0 500 50 H I C CNN "LCSC" 13 | DRAW 14 | S -200 150 200 -150 0 1 0 f 15 | X VIN 1 -300 100 100 R 50 50 1 1 W 16 | X GND 2 0 -250 100 U 50 50 1 1 W 17 | X EN 3 -300 0 100 R 50 50 1 1 I 18 | X NC 4 300 0 100 L 50 50 1 1 N N 19 | X VOUT 5 300 100 100 L 50 50 1 1 w 20 | ENDDRAW 21 | ENDDEF 22 | # 23 | # AP7365-33 24 | # 25 | DEF AP7365-33 U 0 40 Y Y 1 F N 26 | F0 "U" 0 -200 50 H V C CNN 27 | F1 "AP7365-33" 0 200 50 H V C CNN 28 | F2 "Package_TO_SOT_SMD:SOT-23-5" 100 300 50 H I C CNN 29 | F3 "" 0 0 50 H I C CNN 30 | F4 "AP7365-33WG-7" 0 400 50 H I C CNN "P/N" 31 | F5 "C150742" 0 500 50 H I C CNN "LCSC" 32 | DRAW 33 | S -200 150 200 -150 0 1 0 f 34 | X VIN 1 -300 100 100 R 50 50 1 1 W 35 | X GND 2 0 -250 100 U 50 50 1 1 W 36 | X EN 3 -300 0 100 R 50 50 1 1 I 37 | X NC 4 300 0 100 L 50 50 1 1 N N 38 | X VOUT 5 300 100 100 L 50 50 1 1 w 39 | ENDDRAW 40 | ENDDEF 41 | # 42 | # Logo_SH 43 | # 44 | DEF Logo_SH #LOGO? 0 40 Y Y 1 F N 45 | F0 "#LOGO?" 0 -250 50 H I C CNN 46 | F1 "Logo_SH" 0 250 50 H I C CNN 47 | F2 "" 0 0 50 H I C CNN 48 | F3 "" 0 0 50 H I C CNN 49 | DRAW 50 | T 0 0 0 200 0 0 0 SH Normal 0 C C 51 | ENDDRAW 52 | ENDDEF 53 | # 54 | # SN74LVC8T245 55 | # 56 | DEF SN74LVC8T245 U 0 40 Y Y 1 F N 57 | F0 "U" 0 850 50 H V C CNN 58 | F1 "SN74LVC8T245" 0 750 50 H V C CNN 59 | F2 "" 0 100 50 H I C CNN 60 | F3 "" 0 100 50 H I C CNN 61 | DRAW 62 | S -350 700 350 -450 0 1 0 f 63 | X VCCA 1 -450 650 100 R 50 50 1 1 W 64 | X A8 10 -450 -400 100 R 50 50 1 1 B 65 | X GND 11 -100 -550 100 U 50 50 1 1 W 66 | X GND 12 0 -550 100 U 50 50 1 1 W 67 | X GND 13 100 -550 100 U 50 50 1 1 W 68 | X B8 14 450 -400 100 L 50 50 1 1 B 69 | X B7 15 450 -300 100 L 50 50 1 1 B 70 | X B6 16 450 -200 100 L 50 50 1 1 B 71 | X B5 17 450 -100 100 L 50 50 1 1 B 72 | X B4 18 450 0 100 L 50 50 1 1 B 73 | X B3 19 450 100 100 L 50 50 1 1 B 74 | X DIR 2 -450 550 100 R 50 50 1 1 I 75 | X B2 20 450 200 100 L 50 50 1 1 B 76 | X B1 21 450 300 100 L 50 50 1 1 B 77 | X OE 22 450 450 100 L 50 50 1 1 I 78 | X VCCB 23 450 550 100 L 50 50 1 1 W 79 | X VCCB 24 450 650 100 L 50 50 1 1 W 80 | X A1 3 -450 300 100 R 50 50 1 1 B 81 | X A2 4 -450 200 100 R 50 50 1 1 B 82 | X A3 5 -450 100 100 R 50 50 1 1 B 83 | X A4 6 -450 0 100 R 50 50 1 1 B 84 | X A5 7 -450 -100 100 R 50 50 1 1 B 85 | X A6 8 -450 -200 100 R 50 50 1 1 B 86 | X A7 9 -450 -300 100 R 50 50 1 1 B 87 | ENDDRAW 88 | ENDDEF 89 | # 90 | # SW_DP4T 91 | # 92 | DEF SW_DP4T SW 0 0 Y N 1 F N 93 | F0 "SW" 0 250 50 H V C CNN 94 | F1 "SW_DP4T" 0 -750 50 H V C CNN 95 | F2 "" 150 50 50 H I C CNN 96 | F3 "" 150 50 50 H I C CNN 97 | DRAW 98 | C -130 -450 18 1 1 0 N 99 | C -130 0 18 1 1 0 N 100 | C 130 -600 18 1 1 0 N 101 | C 130 -500 18 1 1 0 N 102 | C 130 -400 18 1 1 0 N 103 | C 130 -300 18 1 1 0 N 104 | C 130 -150 18 1 1 0 N 105 | C 130 -50 18 1 1 0 N 106 | C 130 50 18 1 1 0 N 107 | C 130 150 18 1 1 0 N 108 | P 2 0 1 0 -110 0 110 150 N 109 | P 2 0 1 0 0 -375 0 -325 N 110 | P 2 0 1 0 0 -275 0 -225 N 111 | P 2 0 1 0 0 -175 0 -125 N 112 | P 2 0 1 0 0 -75 0 -25 N 113 | P 2 0 1 0 0 25 0 75 N 114 | P 2 1 1 0 -110 -450 110 -300 N 115 | X 1 1 250 150 100 L 50 50 1 1 P 116 | X 10 10 250 -600 100 L 50 50 1 1 P 117 | X 2 2 250 50 100 L 50 50 1 1 P 118 | X 3 3 -250 0 100 R 50 50 1 1 P 119 | X 4 4 250 -50 100 L 50 50 1 1 P 120 | X 5 5 250 -150 100 L 50 50 1 1 P 121 | X 6 6 250 -300 100 L 50 50 1 1 P 122 | X 7 7 250 -400 100 L 50 50 1 1 P 123 | X 8 8 -250 -450 100 R 50 50 1 1 P 124 | X 9 9 250 -500 100 L 50 50 1 1 P 125 | ENDDRAW 126 | ENDDEF 127 | # 128 | # SW_DPDT 129 | # 130 | DEF SW_DPDT SW 0 0 Y N 1 F N 131 | F0 "SW" 0 550 50 H V C CNN 132 | F1 "SW_DPDT" 0 -200 50 H V C CNN 133 | F2 "" 0 0 50 H I C CNN 134 | F3 "" 0 0 50 H I C CNN 135 | DRAW 136 | C -80 0 20 0 0 0 N 137 | C 80 -100 20 0 0 0 N 138 | C 80 100 20 0 1 0 N 139 | C -80 350 20 1 1 0 N 140 | C 80 250 20 1 1 0 N 141 | C 80 450 20 1 1 0 N 142 | P 2 0 1 0 -60 10 65 90 N 143 | P 2 0 1 0 0 50 0 100 N 144 | P 2 0 1 0 0 150 0 200 N 145 | P 2 0 1 0 0 250 0 300 N 146 | P 2 0 1 0 0 350 0 400 N 147 | P 2 1 1 0 -60 360 65 440 N 148 | X 1 1 200 100 100 L 50 50 1 1 P 149 | X 2 2 -200 0 100 R 50 50 1 1 P 150 | X 3 3 200 -100 100 L 50 50 1 1 P 151 | X 4 4 200 450 100 L 50 50 1 1 P 152 | X 5 5 -200 350 100 R 50 50 1 1 P 153 | X 6 6 200 250 100 L 50 50 1 1 P 154 | ENDDRAW 155 | ENDDEF 156 | # 157 | # VREF 158 | # 159 | DEF VREF #PWR 0 0 Y Y 1 F P 160 | F0 "#PWR" 0 -150 50 H I C CNN 161 | F1 "VREF" 0 150 50 H V C CNN 162 | F2 "" 0 0 50 H I C CNN 163 | F3 "" 0 0 50 H I C CNN 164 | DRAW 165 | P 2 0 1 0 -30 50 0 100 N 166 | P 2 0 1 0 0 0 0 100 N 167 | P 2 0 1 0 0 100 30 50 N 168 | X VREF 1 0 0 0 U 50 50 1 1 W N 169 | ENDDRAW 170 | ENDDEF 171 | # 172 | # VREG 173 | # 174 | DEF VREG #PWR 0 0 Y Y 1 F P 175 | F0 "#PWR" 0 -150 50 H I C CNN 176 | F1 "VREG" 0 150 50 H V C CNN 177 | F2 "" 0 0 50 H I C CNN 178 | F3 "" 0 0 50 H I C CNN 179 | DRAW 180 | P 2 0 1 0 -30 50 0 100 N 181 | P 2 0 1 0 0 0 0 100 N 182 | P 2 0 1 0 0 100 30 50 N 183 | X VREG 1 0 0 0 U 50 50 1 1 W N 184 | ENDDRAW 185 | ENDDEF 186 | # 187 | # VTARGET 188 | # 189 | DEF VTARGET #PWR 0 0 Y Y 1 F P 190 | F0 "#PWR" 0 -150 50 H I C CNN 191 | F1 "VTARGET" 0 150 50 H V C CNN 192 | F2 "" 0 0 50 H I C CNN 193 | F3 "" 0 0 50 H I C CNN 194 | DRAW 195 | P 2 0 1 0 -30 50 0 100 N 196 | P 2 0 1 0 0 0 0 100 N 197 | P 2 0 1 0 0 100 30 50 N 198 | X VTARGET 1 0 0 0 U 50 50 1 1 W N 199 | ENDDRAW 200 | ENDDEF 201 | # 202 | #End Library 203 | -------------------------------------------------------------------------------- /tigard.pretty/Crystal_SMD_3225-4Pin_3.2x2.5mm_RoundRect.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Crystal_SMD_3225-4Pin_3.2x2.5mm_RoundRect (layer F.Cu) (tedit 5ECD5B59) 2 | (descr "SMD Crystal SERIES SMD3225/4 http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, 3.2x2.5mm^2 package") 3 | (tags "SMD SMT crystal") 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -2.45) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value Crystal_SMD_3225-4Pin_3.2x2.5mm (at 0 2.45) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start 2.1 -1.7) (end -2.1 -1.7) (layer F.CrtYd) (width 0.05)) 12 | (fp_line (start 2.1 1.7) (end 2.1 -1.7) (layer F.CrtYd) (width 0.05)) 13 | (fp_line (start -2.1 1.7) (end 2.1 1.7) (layer F.CrtYd) (width 0.05)) 14 | (fp_line (start -2.1 -1.7) (end -2.1 1.7) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start -2 1.65) (end 2 1.65) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -2 -1.65) (end -2 1.65) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start -1.6 0.25) (end -0.6 1.25) (layer F.Fab) (width 0.1)) 18 | (fp_line (start 1.6 -1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -1.6 -1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1)) 22 | (fp_text user %R (at 0 0) (layer F.Fab) 23 | (effects (font (size 0.7 0.7) (thickness 0.105))) 24 | ) 25 | (pad 1 smd roundrect (at -1.1 0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 26 | (pad 2 smd roundrect (at 1.1 0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 27 | (pad 3 smd roundrect (at 1.1 -0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 28 | (pad 4 smd roundrect (at -1.1 -0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 29 | (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_3225-4Pin_3.2x2.5mm.wrl 30 | (at (xyz 0 0 0)) 31 | (scale (xyz 1 1 1)) 32 | (rotate (xyz 0 0 0)) 33 | ) 34 | ) 35 | -------------------------------------------------------------------------------- /tigard.pretty/OSHW-Symbol_4.4x4mm_SilkScreen.kicad_mod: -------------------------------------------------------------------------------- 1 | (module OSHW-Symbol_4.4x4mm_SilkScreen (layer F.Cu) (at 0 0) 2 | (descr "Open Source Hardware Symbol") 3 | (tags "Logo Symbol OSHW") 4 | (attr virtual) 5 | (fp_text reference REF** (at 0 0) (layer F.SilkS) hide 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value OSHW-Symbol_4.4x4mm_SilkScreen (at 0.75 0) (layer F.Fab) hide 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_poly 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(xy -2.193596 -0.087377) 88 | (xy -2.184099 -0.089791) (xy -2.171617 -0.092633) (xy -2.155671 -0.096006) (xy -2.135784 -0.100013) (xy -2.111476 -0.104754) (xy -2.082268 -0.110334) (xy -2.047682 -0.116853) (xy -2.007239 -0.124415) 89 | (xy -1.960460 -0.133121) (xy -1.924894 -0.139728) (xy -1.869256 -0.150114) (xy -1.819003 -0.159609) (xy -1.774350 -0.168170) (xy -1.735516 -0.175755) (xy -1.702715 -0.182318) (xy -1.676167 -0.187816) 90 | (xy -1.656086 -0.192207) (xy -1.642692 -0.195447) (xy -1.636199 -0.197491) (xy -1.635835 -0.197691) (xy -1.633768 -0.198958) (xy -1.631972 -0.200098) (xy -1.630221 -0.201598) (xy -1.628291 -0.203944) 91 | (xy -1.625956 -0.207623) (xy -1.622992 -0.213122) (xy -1.619172 -0.220927) (xy -1.614272 -0.231526) (xy -1.608066 -0.245403) (xy -1.600330 -0.263047) (xy -1.590838 -0.284944) (xy -1.579365 -0.311580) 92 | (xy -1.565686 -0.343442) (xy -1.549576 -0.381016) (xy -1.531604 -0.422936) (xy -1.513550 -0.465115) (xy -1.498209 -0.501149) (xy -1.485381 -0.531544) (xy -1.474867 -0.556804) (xy -1.466469 -0.577435) 93 | (xy -1.459988 -0.593941) (xy -1.455223 -0.606828) (xy -1.451977 -0.616601) (xy -1.450051 -0.623765) (xy -1.449245 -0.628825) (xy -1.449288 -0.631826) (xy -1.450733 -0.636009) (xy -1.454481 -0.643284) 94 | (xy -1.460728 -0.653947) (xy -1.469668 -0.668293) (xy -1.481494 -0.686619) (xy -1.496402 -0.709219) (xy -1.514585 -0.736389) (xy -1.536239 -0.768425) (xy -1.561557 -0.805622) (xy -1.590733 -0.848276) 95 | (xy -1.611152 -0.878037) (xy -1.636532 -0.915016) (xy -1.660771 -0.950369) (xy -1.683545 -0.983625) (xy -1.704533 -1.014311) (xy -1.723413 -1.041955) (xy -1.739862 -1.066085) (xy -1.753558 -1.086230) 96 | (xy -1.764180 -1.101916) (xy -1.771406 -1.112672) (xy -1.774912 -1.118025) (xy -1.775156 -1.118438) (xy -1.777301 -1.127358) (xy -1.776809 -1.135543) (xy -1.774218 -1.139730) (xy -1.767329 -1.148020) 97 | (xy -1.756034 -1.160523) (xy -1.740225 -1.177351) (xy -1.719793 -1.198618) (xy -1.694631 -1.224434) (xy -1.664631 -1.254911) (xy -1.629685 -1.290162) (xy -1.589684 -1.330298) (xy -1.568698 -1.351291) 98 | (xy -1.530950 -1.388993) (xy -1.497977 -1.421866) (xy -1.469437 -1.450231) (xy -1.444990 -1.474411) (xy -1.424296 -1.494730) (xy -1.407015 -1.511509) (xy -1.392807 -1.525072) (xy -1.381332 -1.535740) 99 | (xy -1.372249 -1.543837) (xy -1.365219 -1.549685) (xy -1.359901 -1.553607) (xy -1.355955 -1.555925) (xy -1.353041 -1.556961) (xy -1.351685 -1.557102) (xy -1.348363 -1.556265) (xy -1.342654 -1.553608) 100 | (xy -1.334222 -1.548909) (xy -1.322732 -1.541949) (xy -1.307849 -1.532508) (xy -1.289236 -1.520365) (xy -1.266558 -1.505300) (xy -1.239481 -1.487093) (xy -1.207668 -1.465523) (xy -1.170783 -1.440370) 101 | (xy -1.128493 -1.411414) (xy -1.099501 -1.391517) (xy -1.061836 -1.365689) (xy -1.025731 -1.341009) (xy -0.991657 -1.317794) (xy -0.960085 -1.296362) (xy -0.931484 -1.277028) (xy -0.906325 -1.260109) 102 | (xy -0.885077 -1.245922) (xy -0.868212 -1.234784) (xy -0.856198 -1.227012) (xy -0.849506 -1.222921) (xy -0.848441 -1.222392) (xy -0.845960 -1.221489) (xy -0.843576 -1.220821) (xy -0.840779 -1.220579) 103 | (xy -0.837056 -1.220949) (xy -0.831898 -1.222120) (xy -0.824793 -1.224279) (xy -0.815229 -1.227616) (xy -0.802697 -1.232317) (xy -0.786685 -1.238572) (xy -0.766681 -1.246567) (xy -0.742176 -1.256492) 104 | (xy -0.712657 -1.268534) (xy -0.677614 -1.282880) (xy -0.636536 -1.299720) (xy -0.621099 -1.306050) (xy -0.586050 -1.320498) (xy -0.552844 -1.334341) (xy -0.522122 -1.347301) (xy -0.494527 -1.359098) 105 | (xy -0.470703 -1.369456) (xy -0.451290 -1.378095) (xy -0.436933 -1.384737) (xy -0.428273 -1.389104) (xy -0.426069 -1.390525) (xy -0.419476 -1.397952) (xy -0.415775 -1.404325) (xy -0.414850 -1.408723) 106 | (xy -0.412705 -1.419709) (xy -0.409442 -1.436733) (xy -0.405166 -1.459246) (xy -0.399980 -1.486698) (xy -0.393987 -1.518540) (xy -0.387291 -1.554222) (xy -0.379996 -1.593195) (xy -0.372204 -1.634909) 107 | (xy -0.364021 -1.678815) (xy -0.361052 -1.694762) (xy -0.352730 -1.739339) (xy -0.344723 -1.781933) (xy -0.337138 -1.821995) (xy -0.330083 -1.858972) (xy -0.323665 -1.892312) (xy -0.317990 -1.921464) 108 | (xy -0.313165 -1.945877) (xy -0.309297 -1.964998) (xy -0.306494 -1.978276) (xy -0.304862 -1.985160) (xy -0.304588 -1.985955) (xy -0.298445 -1.993166) (xy -0.294154 -1.996202) (xy -0.289304 -1.996882) 109 | (xy -0.277869 -1.997496) (xy -0.260520 -1.998043) (xy -0.237931 -1.998525) (xy -0.210774 -1.998941) (xy -0.179723 -1.999290) (xy -0.145451 -1.999573) (xy -0.108629 -1.999791) (xy -0.069932 -1.999941) 110 | (xy -0.030031 -2.000026) (xy 0.010399 -2.000045) (xy 0.050687 -1.999998) )(layer F.SilkS) (width 0.010000) 111 | ) 112 | ) 113 | -------------------------------------------------------------------------------- /tigard.pretty/PinHeader_1x08_P2.54mm_Vertical.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PinHeader_1x08_P2.54mm_Vertical (layer F.Cu) (tedit 5F0DFB58) 2 | (descr "Through hole straight pin header, 1x08, 2.54mm pitch, single row") 3 | (tags "Through hole pin header THT 1x08 2.54mm single row") 4 | (fp_text reference REF** (at 0 -2.33) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value PinHeader_1x08_P2.54mm_Vertical (at 0 20.11) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start -2.032 -2.032) (end -2.794 -2.794) (layer F.SilkS) (width 0.12)) 11 | (fp_line (start -2.032 -2.032) (end -2.032 -2.54) (layer F.SilkS) (width 0.12)) 12 | (fp_line (start -2.54 -2.032) (end -2.032 -2.032) (layer F.SilkS) (width 0.12)) 13 | (fp_line (start -2.032 -2.032) (end -2.54 -2.032) (layer F.SilkS) (width 0.12)) 14 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer B.SilkS) (width 0.5)) 15 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer B.SilkS) (width 0.12)) 16 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer B.SilkS) (width 0.5)) 17 | (fp_line (start 1.33 1.27) (end 1.33 19.11) (layer B.SilkS) (width 0.12)) 18 | (fp_line (start -1.33 19.11) (end 1.33 19.11) (layer B.SilkS) (width 0.12)) 19 | (fp_line (start -1.33 1.27) (end -1.33 19.11) (layer B.SilkS) (width 0.12)) 20 | (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 21 | (fp_line (start 1.8 19.55) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) 22 | (fp_line (start -1.8 19.55) (end 1.8 19.55) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start -1.8 -1.8) (end -1.8 19.55) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.5)) 25 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.5)) 26 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 27 | (fp_line (start 1.33 1.27) (end 1.33 19.11) (layer F.SilkS) (width 0.12)) 28 | (fp_line (start -1.33 1.27) (end -1.33 19.11) (layer F.SilkS) (width 0.12)) 29 | (fp_line (start -1.33 19.11) (end 1.33 19.11) (layer F.SilkS) (width 0.12)) 30 | (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) 31 | (fp_line (start -1.27 19.05) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) 32 | (fp_line (start 1.27 19.05) (end -1.27 19.05) (layer F.Fab) (width 0.1)) 33 | (fp_line (start 1.27 -1.27) (end 1.27 19.05) (layer F.Fab) (width 0.1)) 34 | (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) 35 | (fp_line (start -2.54 -2.032) (end -2.032 -2.032) (layer B.SilkS) (width 0.12)) 36 | (fp_line (start -2.032 -2.032) (end -2.032 -2.54) (layer B.SilkS) (width 0.12)) 37 | (fp_line (start -2.032 -2.032) (end -2.794 -2.794) (layer B.SilkS) (width 0.12)) 38 | (fp_text user %R (at 0 8.89 90) (layer F.Fab) 39 | (effects (font (size 1 1) (thickness 0.15))) 40 | ) 41 | (pad 1 thru_hole roundrect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)) 42 | (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 43 | (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 44 | (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 45 | (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 46 | (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 47 | (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 48 | (pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 49 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x08_P2.54mm_Vertical.wrl 50 | (at (xyz 0 0 0)) 51 | (scale (xyz 1 1 1)) 52 | (rotate (xyz 0 0 0)) 53 | ) 54 | ) 55 | -------------------------------------------------------------------------------- /tigard.pretty/PinHeader_1x09_P2.54mm_Vertical.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PinHeader_1x09_P2.54mm_Vertical (layer F.Cu) (tedit 5F0DFB5F) 2 | (descr "Through hole straight pin header, 1x09, 2.54mm pitch, single row") 3 | (tags "Through hole pin header THT 1x09 2.54mm single row") 4 | (fp_text reference REF** (at 0 -2.33) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value PinHeader_1x09_P2.54mm_Vertical (at 0 22.65) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) 11 | (fp_line (start 1.27 -1.27) (end 1.27 21.59) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 1.27 21.59) (end -1.27 21.59) (layer F.Fab) (width 0.1)) 13 | (fp_line (start -1.27 21.59) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) 14 | (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -1.33 21.65) (end 1.33 21.65) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -1.33 1.27) (end -1.33 21.65) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start 1.33 1.27) (end 1.33 21.65) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 19 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.5)) 20 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.5)) 21 | (fp_line (start -1.8 -1.8) (end -1.8 22.1) (layer F.CrtYd) (width 0.05)) 22 | (fp_line (start -1.8 22.1) (end 1.8 22.1) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start 1.8 22.1) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 25 | (fp_line (start -1.33 1.27) (end -1.33 21.65) (layer B.SilkS) (width 0.12)) 26 | (fp_line (start 1.33 1.27) (end 1.33 21.65) (layer B.SilkS) (width 0.12)) 27 | (fp_line (start -1.33 21.65) (end 1.33 21.65) (layer B.SilkS) (width 0.12)) 28 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer B.SilkS) (width 0.12)) 29 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer B.SilkS) (width 0.5)) 30 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer B.SilkS) (width 0.5)) 31 | (fp_line (start -2.032 -2.032) (end -2.54 -2.032) (layer F.SilkS) (width 0.12)) 32 | (fp_line (start -2.54 -2.032) (end -2.032 -2.032) (layer B.SilkS) (width 0.12)) 33 | (fp_line (start -2.032 -2.032) (end -2.794 -2.794) (layer F.SilkS) (width 0.12)) 34 | (fp_line (start -2.032 -2.032) (end -2.032 -2.54) (layer B.SilkS) (width 0.12)) 35 | (fp_line (start -2.032 -2.032) (end -2.032 -2.54) (layer F.SilkS) (width 0.12)) 36 | (fp_line (start -2.032 -2.032) (end -2.794 -2.794) (layer B.SilkS) (width 0.12)) 37 | (fp_line (start -2.54 -2.032) (end -2.032 -2.032) (layer F.SilkS) (width 0.12)) 38 | (fp_text user %R (at 0 10.16 90) (layer F.Fab) 39 | (effects (font (size 1 1) (thickness 0.15))) 40 | ) 41 | (pad 1 thru_hole roundrect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)) 42 | (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 43 | (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 44 | (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 45 | (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 46 | (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 47 | (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 48 | (pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 49 | (pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 50 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x09_P2.54mm_Vertical.wrl 51 | (at (xyz 0 0 0)) 52 | (scale (xyz 1 1 1)) 53 | (rotate (xyz 0 0 0)) 54 | ) 55 | ) 56 | -------------------------------------------------------------------------------- /tigard.pretty/PinHeader_2x04_P2.54mm_Vertical.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PinHeader_2x04_P2.54mm_Vertical (layer F.Cu) (tedit 5F0DFB66) 2 | (descr "Through hole straight pin header, 2x04, 2.54mm pitch, double rows") 3 | (tags "Through hole pin header THT 2x04 2.54mm double row") 4 | (fp_text reference REF** (at 1.27 -2.33 unlocked) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value PinHeader_2x04_P2.54mm_Vertical (at 1.27 9.95) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start -1.33 1.27) (end 1.27 1.27) (layer B.SilkS) (width 0.12)) 11 | (fp_line (start -1.33 8.95) (end 3.87 8.95) (layer B.SilkS) (width 0.12)) 12 | (fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer B.SilkS) (width 0.12)) 13 | (fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer B.SilkS) (width 0.12)) 14 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer B.SilkS) (width 0.5)) 15 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer B.SilkS) (width 0.5)) 16 | (fp_line (start 3.87 -1.33) (end 3.87 8.95) (layer B.SilkS) (width 0.12)) 17 | (fp_line (start -1.33 1.27) (end -1.33 8.95) (layer B.SilkS) (width 0.12)) 18 | (fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start 4.35 9.4) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start -1.8 9.4) (end 4.35 9.4) (layer F.CrtYd) (width 0.05)) 21 | (fp_line (start -1.8 -1.8) (end -1.8 9.4) (layer F.CrtYd) (width 0.05)) 22 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.5)) 23 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.5)) 24 | (fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer F.SilkS) (width 0.12)) 25 | (fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12)) 26 | (fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12)) 27 | (fp_line (start 3.87 -1.33) (end 3.87 8.95) (layer F.SilkS) (width 0.12)) 28 | (fp_line (start -1.33 1.27) (end -1.33 8.95) (layer F.SilkS) (width 0.12)) 29 | (fp_line (start -1.33 8.95) (end 3.87 8.95) (layer F.SilkS) (width 0.12)) 30 | (fp_line (start -1.27 0) (end 0 -1.27) (layer F.Fab) (width 0.1)) 31 | (fp_line (start -1.27 8.89) (end -1.27 0) (layer F.Fab) (width 0.1)) 32 | (fp_line (start 3.81 8.89) (end -1.27 8.89) (layer F.Fab) (width 0.1)) 33 | (fp_line (start 3.81 -1.27) (end 3.81 8.89) (layer F.Fab) (width 0.1)) 34 | (fp_line (start 0 -1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1)) 35 | (fp_line (start -2.032 -2.032) (end -2.54 -2.032) (layer F.SilkS) (width 0.12)) 36 | (fp_line (start -2.54 -2.032) (end -2.032 -2.032) (layer B.SilkS) (width 0.12)) 37 | (fp_line (start -2.032 -2.032) (end -2.794 -2.794) (layer F.SilkS) (width 0.12)) 38 | (fp_line (start -2.032 -2.032) (end -2.032 -2.54) (layer B.SilkS) (width 0.12)) 39 | (fp_line (start -2.032 -2.032) (end -2.032 -2.54) (layer F.SilkS) (width 0.12)) 40 | (fp_line (start -2.032 -2.032) (end -2.794 -2.794) (layer B.SilkS) (width 0.12)) 41 | (fp_line (start -2.54 -2.032) (end -2.032 -2.032) (layer F.SilkS) (width 0.12)) 42 | (fp_text user %R (at 1.27 3.81 90) (layer F.Fab) 43 | (effects (font (size 1 1) (thickness 0.15))) 44 | ) 45 | (pad 1 thru_hole roundrect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)) 46 | (pad 2 thru_hole oval (at 2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 47 | (pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 48 | (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 49 | (pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 50 | (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 51 | (pad 7 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 52 | (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 53 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x04_P2.54mm_Vertical.wrl 54 | (at (xyz 0 0 0)) 55 | (scale (xyz 1 1 1)) 56 | (rotate (xyz 0 0 0)) 57 | ) 58 | ) 59 | -------------------------------------------------------------------------------- /tigard.pretty/PinHeader_2x05_P1.27mm_Vertical_SMD.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PinHeader_2x05_P1.27mm_Vertical_SMD (layer F.Cu) (tedit 5F0DFBB5) 2 | (descr "surface-mounted straight pin header, 2x05, 1.27mm pitch, double rows") 3 | (tags "Surface mounted pin header SMD 2x05 1.27mm double row") 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -4.235) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value PinHeader_2x05_P1.27mm_Vertical_SMD (at 0 4.235) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start 4.3 -3.7) (end -4.3 -3.7) (layer F.CrtYd) (width 0.05)) 12 | (fp_line (start 4.3 3.7) (end 4.3 -3.7) (layer F.CrtYd) (width 0.05)) 13 | (fp_line (start -4.3 3.7) (end 4.3 3.7) (layer F.CrtYd) (width 0.05)) 14 | (fp_line (start -4.3 -3.7) (end -4.3 3.7) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 1.765 3.17) (end 1.765 3.235) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -1.765 3.17) (end -1.765 3.235) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start 1.765 -3.235) (end 1.765 -3.17) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start -1.765 -3.235) (end -1.765 -3.17) (layer F.SilkS) (width 0.12)) 19 | (fp_line (start -3.09 -3.17) (end -1.765 -3.17) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start -1.765 3.235) (end 1.765 3.235) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start -1.765 -3.235) (end 1.765 -3.235) (layer F.SilkS) (width 0.12)) 22 | (fp_line (start 2.75 2.74) (end 1.705 2.74) (layer F.Fab) (width 0.1)) 23 | (fp_line (start 2.75 2.34) (end 2.75 2.74) (layer F.Fab) (width 0.1)) 24 | (fp_line (start 1.705 2.34) (end 2.75 2.34) (layer F.Fab) (width 0.1)) 25 | (fp_line (start -2.75 2.74) (end -1.705 2.74) (layer F.Fab) (width 0.1)) 26 | (fp_line (start -2.75 2.34) (end -2.75 2.74) (layer F.Fab) (width 0.1)) 27 | (fp_line (start -1.705 2.34) (end -2.75 2.34) (layer F.Fab) (width 0.1)) 28 | (fp_line (start 2.75 1.47) (end 1.705 1.47) (layer F.Fab) (width 0.1)) 29 | (fp_line (start 2.75 1.07) (end 2.75 1.47) (layer F.Fab) (width 0.1)) 30 | (fp_line (start 1.705 1.07) (end 2.75 1.07) (layer F.Fab) (width 0.1)) 31 | (fp_line (start -2.75 1.47) (end -1.705 1.47) (layer F.Fab) (width 0.1)) 32 | (fp_line (start -2.75 1.07) (end -2.75 1.47) (layer F.Fab) (width 0.1)) 33 | (fp_line (start -1.705 1.07) (end -2.75 1.07) (layer F.Fab) (width 0.1)) 34 | (fp_line (start 2.75 0.2) (end 1.705 0.2) (layer F.Fab) (width 0.1)) 35 | (fp_line (start 2.75 -0.2) (end 2.75 0.2) (layer F.Fab) (width 0.1)) 36 | (fp_line (start 1.705 -0.2) (end 2.75 -0.2) (layer F.Fab) (width 0.1)) 37 | (fp_line (start -2.75 0.2) (end -1.705 0.2) (layer F.Fab) (width 0.1)) 38 | (fp_line (start -2.75 -0.2) (end -2.75 0.2) (layer F.Fab) (width 0.1)) 39 | (fp_line (start -1.705 -0.2) (end -2.75 -0.2) (layer F.Fab) (width 0.1)) 40 | (fp_line (start 2.75 -1.07) (end 1.705 -1.07) (layer F.Fab) (width 0.1)) 41 | (fp_line (start 2.75 -1.47) (end 2.75 -1.07) (layer F.Fab) (width 0.1)) 42 | (fp_line (start 1.705 -1.47) (end 2.75 -1.47) (layer F.Fab) (width 0.1)) 43 | (fp_line (start -2.75 -1.07) (end -1.705 -1.07) (layer F.Fab) (width 0.1)) 44 | (fp_line (start -2.75 -1.47) (end -2.75 -1.07) (layer F.Fab) (width 0.1)) 45 | (fp_line (start -1.705 -1.47) (end -2.75 -1.47) (layer F.Fab) (width 0.1)) 46 | (fp_line (start 2.75 -2.34) (end 1.705 -2.34) (layer F.Fab) (width 0.1)) 47 | (fp_line (start 2.75 -2.74) (end 2.75 -2.34) (layer F.Fab) (width 0.1)) 48 | (fp_line (start 1.705 -2.74) (end 2.75 -2.74) (layer F.Fab) (width 0.1)) 49 | (fp_line (start -2.75 -2.34) (end -1.705 -2.34) (layer F.Fab) (width 0.1)) 50 | (fp_line (start -2.75 -2.74) (end -2.75 -2.34) (layer F.Fab) (width 0.1)) 51 | (fp_line (start -1.705 -2.74) (end -2.75 -2.74) (layer F.Fab) (width 0.1)) 52 | (fp_line (start 1.705 -3.175) (end 1.705 3.175) (layer F.Fab) (width 0.1)) 53 | (fp_line (start -1.705 -2.74) (end -1.27 -3.175) (layer F.Fab) (width 0.1)) 54 | (fp_line (start -1.705 3.175) (end -1.705 -2.74) (layer F.Fab) (width 0.1)) 55 | (fp_line (start -1.27 -3.175) (end 1.705 -3.175) (layer F.Fab) (width 0.1)) 56 | (fp_line (start 1.705 3.175) (end -1.705 3.175) (layer F.Fab) (width 0.1)) 57 | (fp_line (start -2.794 -3.556) (end -3.15321 -3.91521) (layer F.SilkS) (width 0.12)) 58 | (fp_line (start -3.15321 -3.91521) (end -2.794 -3.556) (layer F.SilkS) (width 0.12)) 59 | (fp_line (start -2.794 -3.556) (end -2.43479 -3.91521) (layer F.SilkS) (width 0.12)) 60 | (fp_line (start -2.794 -3.556) (end -2.794 -4.63363) (layer F.SilkS) (width 0.12)) 61 | (fp_text user %R (at 0 0 90) (layer F.Fab) 62 | (effects (font (size 1 1) (thickness 0.15))) 63 | ) 64 | (pad 1 smd roundrect (at -1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 65 | (pad 2 smd roundrect (at 1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 66 | (pad 3 smd roundrect (at -1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 67 | (pad 4 smd roundrect (at 1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 68 | (pad 5 smd roundrect (at -1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 69 | (pad 6 smd roundrect (at 1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 70 | (pad 7 smd roundrect (at -1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 71 | (pad 8 smd roundrect (at 1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 72 | (pad 9 smd roundrect (at -1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 73 | (pad 10 smd roundrect (at 1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 74 | (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x05_P1.27mm_Vertical_SMD.wrl 75 | (at (xyz 0 0 0)) 76 | (scale (xyz 1 1 1)) 77 | (rotate (xyz 0 0 0)) 78 | ) 79 | ) 80 | -------------------------------------------------------------------------------- /tigard.pretty/PinHeader_2x07_P1.27mm_Vertical_SMD.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PinHeader_2x07_P1.27mm_Vertical_SMD (layer F.Cu) (tedit 5F98EF37) 2 | (descr "surface-mounted straight pin header, 2x07, 1.27mm pitch, double rows") 3 | (tags "Surface mounted pin header SMD 2x07 1.27mm double row") 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -5.505) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value PinHeader_2x07_P1.27mm_Vertical_SMD (at 0 5.505) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start -2.794 -4.826) (end -3.15321 -5.18521) (layer F.SilkS) (width 0.12)) 12 | (fp_line (start -3.15321 -5.18521) (end -2.794 -4.826) (layer F.SilkS) (width 0.12)) 13 | (fp_line (start -2.794 -4.826) (end -2.43479 -5.18521) (layer F.SilkS) (width 0.12)) 14 | (fp_line (start -2.794 -4.826) (end -2.794 -5.90363) (layer F.SilkS) (width 0.12)) 15 | (fp_line (start 4.3 -4.95) (end -4.3 -4.95) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start 4.3 4.95) (end 4.3 -4.95) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -4.3 4.95) (end 4.3 4.95) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -4.3 -4.95) (end -4.3 4.95) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start 1.765 4.44) (end 1.765 4.505) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start -1.765 4.44) (end -1.765 4.505) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start 1.765 -4.505) (end 1.765 -4.44) (layer F.SilkS) (width 0.12)) 22 | (fp_line (start -1.765 -4.505) (end -1.765 -4.44) (layer F.SilkS) (width 0.12)) 23 | (fp_line (start -3.09 -4.44) (end -1.765 -4.44) (layer F.SilkS) (width 0.12)) 24 | (fp_line (start -1.765 4.505) (end 1.765 4.505) (layer F.SilkS) (width 0.12)) 25 | (fp_line (start -1.765 -4.505) (end 1.765 -4.505) (layer F.SilkS) (width 0.12)) 26 | (fp_line (start 2.75 4.01) (end 1.705 4.01) (layer F.Fab) (width 0.1)) 27 | (fp_line (start 2.75 3.61) (end 2.75 4.01) (layer F.Fab) (width 0.1)) 28 | (fp_line (start 1.705 3.61) (end 2.75 3.61) (layer F.Fab) (width 0.1)) 29 | (fp_line (start -2.75 4.01) (end -1.705 4.01) (layer F.Fab) (width 0.1)) 30 | (fp_line (start -2.75 3.61) (end -2.75 4.01) (layer F.Fab) (width 0.1)) 31 | (fp_line (start -1.705 3.61) (end -2.75 3.61) (layer F.Fab) (width 0.1)) 32 | (fp_line (start 2.75 2.74) (end 1.705 2.74) (layer F.Fab) (width 0.1)) 33 | (fp_line (start 2.75 2.34) (end 2.75 2.74) (layer F.Fab) (width 0.1)) 34 | (fp_line (start 1.705 2.34) (end 2.75 2.34) (layer F.Fab) (width 0.1)) 35 | (fp_line (start -2.75 2.74) (end -1.705 2.74) (layer F.Fab) (width 0.1)) 36 | (fp_line (start -2.75 2.34) (end -2.75 2.74) (layer F.Fab) (width 0.1)) 37 | (fp_line (start -1.705 2.34) (end -2.75 2.34) (layer F.Fab) (width 0.1)) 38 | (fp_line (start 2.75 1.47) (end 1.705 1.47) (layer F.Fab) (width 0.1)) 39 | (fp_line (start 2.75 1.07) (end 2.75 1.47) (layer F.Fab) (width 0.1)) 40 | (fp_line (start 1.705 1.07) (end 2.75 1.07) (layer F.Fab) (width 0.1)) 41 | (fp_line (start -2.75 1.47) (end -1.705 1.47) (layer F.Fab) (width 0.1)) 42 | (fp_line (start -2.75 1.07) (end -2.75 1.47) (layer F.Fab) (width 0.1)) 43 | (fp_line (start -1.705 1.07) (end -2.75 1.07) (layer F.Fab) (width 0.1)) 44 | (fp_line (start 2.75 0.2) (end 1.705 0.2) (layer F.Fab) (width 0.1)) 45 | (fp_line (start 2.75 -0.2) (end 2.75 0.2) (layer F.Fab) (width 0.1)) 46 | (fp_line (start 1.705 -0.2) (end 2.75 -0.2) (layer F.Fab) (width 0.1)) 47 | (fp_line (start -2.75 0.2) (end -1.705 0.2) (layer F.Fab) (width 0.1)) 48 | (fp_line (start -2.75 -0.2) (end -2.75 0.2) (layer F.Fab) (width 0.1)) 49 | (fp_line (start -1.705 -0.2) (end -2.75 -0.2) (layer F.Fab) (width 0.1)) 50 | (fp_line (start 2.75 -1.07) (end 1.705 -1.07) (layer F.Fab) (width 0.1)) 51 | (fp_line (start 2.75 -1.47) (end 2.75 -1.07) (layer F.Fab) (width 0.1)) 52 | (fp_line (start 1.705 -1.47) (end 2.75 -1.47) (layer F.Fab) (width 0.1)) 53 | (fp_line (start -2.75 -1.07) (end -1.705 -1.07) (layer F.Fab) (width 0.1)) 54 | (fp_line (start -2.75 -1.47) (end -2.75 -1.07) (layer F.Fab) (width 0.1)) 55 | (fp_line (start -1.705 -1.47) (end -2.75 -1.47) (layer F.Fab) (width 0.1)) 56 | (fp_line (start 2.75 -2.34) (end 1.705 -2.34) (layer F.Fab) (width 0.1)) 57 | (fp_line (start 2.75 -2.74) (end 2.75 -2.34) (layer F.Fab) (width 0.1)) 58 | (fp_line (start 1.705 -2.74) (end 2.75 -2.74) (layer F.Fab) (width 0.1)) 59 | (fp_line (start -2.75 -2.34) (end -1.705 -2.34) (layer F.Fab) (width 0.1)) 60 | (fp_line (start -2.75 -2.74) (end -2.75 -2.34) (layer F.Fab) (width 0.1)) 61 | (fp_line (start -1.705 -2.74) (end -2.75 -2.74) (layer F.Fab) (width 0.1)) 62 | (fp_line (start 2.75 -3.61) (end 1.705 -3.61) (layer F.Fab) (width 0.1)) 63 | (fp_line (start 2.75 -4.01) (end 2.75 -3.61) (layer F.Fab) (width 0.1)) 64 | (fp_line (start 1.705 -4.01) (end 2.75 -4.01) (layer F.Fab) (width 0.1)) 65 | (fp_line (start -2.75 -3.61) (end -1.705 -3.61) (layer F.Fab) (width 0.1)) 66 | (fp_line (start -2.75 -4.01) (end -2.75 -3.61) (layer F.Fab) (width 0.1)) 67 | (fp_line (start -1.705 -4.01) (end -2.75 -4.01) (layer F.Fab) (width 0.1)) 68 | (fp_line (start 1.705 -4.445) (end 1.705 4.445) (layer F.Fab) (width 0.1)) 69 | (fp_line (start -1.705 -4.01) (end -1.27 -4.445) (layer F.Fab) (width 0.1)) 70 | (fp_line (start -1.705 4.445) (end -1.705 -4.01) (layer F.Fab) (width 0.1)) 71 | (fp_line (start -1.27 -4.445) (end 1.705 -4.445) (layer F.Fab) (width 0.1)) 72 | (fp_line (start 1.705 4.445) (end -1.705 4.445) (layer F.Fab) (width 0.1)) 73 | (fp_text user %R (at 0 0 90) (layer F.Fab) 74 | (effects (font (size 1 1) (thickness 0.15))) 75 | ) 76 | (fp_line (start -1.5 -6.5) (end -1.5 6.5) (layer Eco1.User) (width 0.12)) 77 | (fp_line (start -1.5 6.5) (end 1.5 6.5) (layer Eco1.User) (width 0.12)) 78 | (fp_line (start 1.5 6.5) (end 1.5 -6.5) (layer Eco1.User) (width 0.12)) 79 | (fp_line (start 1.5 -6.5) (end -1.5 -6.5) (layer Eco1.User) (width 0.12)) 80 | (pad 1 smd roundrect (at -1.95 -3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 81 | (pad 2 smd roundrect (at 1.95 -3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 82 | (pad 3 smd roundrect (at -1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 83 | (pad 4 smd roundrect (at 1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 84 | (pad 5 smd roundrect (at -1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 85 | (pad 6 smd roundrect (at 1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 86 | (pad 7 smd roundrect (at -1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 87 | (pad 8 smd roundrect (at 1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 88 | (pad 9 smd roundrect (at -1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 89 | (pad 10 smd roundrect (at 1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 90 | (pad 11 smd roundrect (at -1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 91 | (pad 12 smd roundrect (at 1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 92 | (pad 13 smd roundrect (at -1.95 3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 93 | (pad 14 smd roundrect (at 1.95 3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 94 | (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x07_P1.27mm_Vertical_SMD.wrl 95 | (at (xyz 0 0 0)) 96 | (scale (xyz 1 1 1)) 97 | (rotate (xyz 0 0 0)) 98 | ) 99 | ) 100 | -------------------------------------------------------------------------------- /tigard.pretty/R_Array_Convex_4x0402_RoundRect.kicad_mod: -------------------------------------------------------------------------------- 1 | (module R_Array_Convex_4x0402_RoundRect (layer F.Cu) (tedit 5ECD5974) 2 | (descr "Chip Resistor Network, ROHM MNR04 (see mnr_g.pdf)") 3 | (tags "resistor array") 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -2.1) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value R_Array_Convex_4x0402 (at 0 2.1) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start 1 1.25) (end -1 1.25) (layer F.CrtYd) (width 0.05)) 12 | (fp_line (start 1 1.25) (end 1 -1.25) (layer F.CrtYd) (width 0.05)) 13 | (fp_line (start -1 -1.25) (end -1 1.25) (layer F.CrtYd) (width 0.05)) 14 | (fp_line (start -1 -1.25) (end 1 -1.25) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 0.25 1.18) (end -0.25 1.18) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start 0.25 -1.18) (end -0.25 -1.18) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start -0.5 1) (end -0.5 -1) (layer F.Fab) (width 0.1)) 18 | (fp_line (start 0.5 1) (end -0.5 1) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 0.5 -1) (end 0.5 1) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -0.5 -1) (end 0.5 -1) (layer F.Fab) (width 0.1)) 21 | (fp_text user %R (at 0 0 90) (layer F.Fab) 22 | (effects (font (size 0.5 0.5) (thickness 0.075))) 23 | ) 24 | (pad 1 smd roundrect (at -0.5 -0.75) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 25 | (pad 3 smd roundrect (at -0.5 0.25) (size 0.5 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 26 | (pad 2 smd roundrect (at -0.5 -0.25) (size 0.5 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 27 | (pad 4 smd roundrect (at -0.5 0.75) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 28 | (pad 7 smd roundrect (at 0.5 -0.25) (size 0.5 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 29 | (pad 8 smd roundrect (at 0.5 -0.75) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 30 | (pad 6 smd roundrect (at 0.5 0.25) (size 0.5 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 31 | (pad 5 smd roundrect (at 0.5 0.75) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 32 | (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_Array_Convex_4x0402.wrl 33 | (at (xyz 0 0 0)) 34 | (scale (xyz 1 1 1)) 35 | (rotate (xyz 0 0 0)) 36 | ) 37 | ) 38 | -------------------------------------------------------------------------------- /tigard.pretty/SOT-23-5_RoundRect.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SOT-23-5_RoundRect (layer F.Cu) (tedit 5ECD5524) 2 | (descr "5-pin SOT23 package") 3 | (tags SOT-23-5) 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -2.9) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value SOT-23-5 (at 0 2.9) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 0.9 1.55) (end -0.9 1.55) (layer F.Fab) (width 0.1)) 13 | (fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer F.Fab) (width 0.1)) 14 | (fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -0.9 -0.9) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) 16 | (fp_line (start -1.9 1.8) (end -1.9 -1.8) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start 1.9 1.8) (end -1.9 1.8) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start 1.9 -1.8) (end 1.9 1.8) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start -1.9 -1.8) (end 1.9 -1.8) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start -0.9 1.61) (end 0.9 1.61) (layer F.SilkS) (width 0.12)) 22 | (fp_text user %R (at 0 0 90) (layer F.Fab) 23 | (effects (font (size 0.5 0.5) (thickness 0.075))) 24 | ) 25 | (pad 1 smd roundrect (at -1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 26 | (pad 2 smd roundrect (at -1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 27 | (pad 3 smd roundrect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 28 | (pad 4 smd roundrect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 29 | (pad 5 smd roundrect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 30 | (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl 31 | (at (xyz 0 0 0)) 32 | (scale (xyz 1 1 1)) 33 | (rotate (xyz 0 0 0)) 34 | ) 35 | ) 36 | -------------------------------------------------------------------------------- /tigard.pretty/SOT-23-6_RoundRect.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SOT-23-6_RoundRect (layer F.Cu) (tedit 5ECD5ACA) 2 | (descr "6-pin SOT-23 package") 3 | (tags SOT-23-6) 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -2.9) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value SOT-23-6 (at 0 2.9) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 0.9 1.55) (end -0.9 1.55) (layer F.Fab) (width 0.1)) 13 | (fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer F.Fab) (width 0.1)) 14 | (fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -0.9 -0.9) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) 16 | (fp_line (start -1.9 -1.8) (end -1.9 1.8) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -1.9 1.8) (end 1.9 1.8) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start 1.9 1.8) (end 1.9 -1.8) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start 1.9 -1.8) (end -1.9 -1.8) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start -0.9 1.61) (end 0.9 1.61) (layer F.SilkS) (width 0.12)) 22 | (fp_text user %R (at 0 0 90) (layer F.Fab) 23 | (effects (font (size 0.5 0.5) (thickness 0.075))) 24 | ) 25 | (pad 1 smd roundrect (at -1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 26 | (pad 2 smd roundrect (at -1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 27 | (pad 3 smd roundrect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 28 | (pad 4 smd roundrect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 29 | (pad 6 smd roundrect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 30 | (pad 5 smd roundrect (at 1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 31 | (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-6.wrl 32 | (at (xyz 0 0 0)) 33 | (scale (xyz 1 1 1)) 34 | (rotate (xyz 0 0 0)) 35 | ) 36 | ) 37 | -------------------------------------------------------------------------------- /tigard.pretty/SOT-23_RoundRect.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SOT-23_RoundRect (layer F.Cu) (tedit 5ECD559B) 2 | (descr "SOT-23, Standard") 3 | (tags SOT-23) 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -2.5) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value SOT-23 (at 0 2.5) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) 12 | (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) 13 | (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) 14 | (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) 19 | (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) 24 | (fp_text user %R (at 0 0 90) (layer F.Fab) 25 | (effects (font (size 0.5 0.5) (thickness 0.075))) 26 | ) 27 | (pad 1 smd roundrect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 28 | (pad 2 smd roundrect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 29 | (pad 3 smd roundrect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) 30 | (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl 31 | (at (xyz 0 0 0)) 32 | (scale (xyz 1 1 1)) 33 | (rotate (xyz 0 0 0)) 34 | ) 35 | ) 36 | -------------------------------------------------------------------------------- /tigard.pretty/SW_ALPS_SSSS224100_DP4T.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SW_ALPS_SSSS224100_DP4T (layer F.Cu) (tedit 5F0DFB3B) 2 | (fp_text reference REF** (at -3.75 -1.7 90) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value SW_ALPS_SSSS224100_DP4T (at 5 -5.8) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start -2 0) (end -1.5 0) (layer F.Fab) (width 0.12)) 9 | (fp_line (start -2 -3.3) (end -2.5 -3.3) (layer F.Fab) (width 0.12)) 10 | (fp_line (start -2.8 0.3) (end -1.6 0.3) (layer F.SilkS) (width 0.12)) 11 | (fp_line (start -2.8 -0.9) (end -2.8 0.3) (layer F.SilkS) (width 0.12)) 12 | (fp_line (start -2.5 -0.5) (end -2.5 -3.3) (layer F.Fab) (width 0.12)) 13 | (fp_line (start -2 0) (end -2.5 -0.5) (layer F.Fab) (width 0.12)) 14 | (fp_line (start 12.5 0) (end -1.5 0) (layer F.Fab) (width 0.12)) 15 | (fp_line (start 9 0) (end 7 0) (layer Dwgs.User) (width 0.12)) 16 | (fp_line (start 9 2) (end 9 0) (layer Dwgs.User) (width 0.12)) 17 | (fp_line (start 7 2) (end 9 2) (layer Dwgs.User) (width 0.12)) 18 | (fp_line (start 7 0) (end 5 0) (layer Dwgs.User) (width 0.12)) 19 | (fp_line (start 7 2) (end 7 0) (layer Dwgs.User) (width 0.12)) 20 | (fp_line (start 5 2) (end 7 2) (layer Dwgs.User) (width 0.12)) 21 | (fp_line (start 1 0) (end 3 0) (layer Dwgs.User) (width 0.12)) 22 | (fp_line (start 1 2) (end 1 0) (layer Dwgs.User) (width 0.12)) 23 | (fp_line (start 3 2) (end 1 2) (layer Dwgs.User) (width 0.12)) 24 | (fp_line (start 5 0) (end 3 0) (layer Dwgs.User) (width 0.12)) 25 | (fp_line (start 5 2) (end 5 0) (layer Dwgs.User) (width 0.12)) 26 | (fp_line (start 3 2) (end 5 2) (layer Dwgs.User) (width 0.12)) 27 | (fp_line (start 3 0) (end 3 2) (layer Dwgs.User) (width 0.12)) 28 | (fp_line (start 13 -4.55) (end -3 -4.55) (layer F.CrtYd) (width 0.05)) 29 | (fp_line (start 13 1.2) (end 13 -4.55) (layer F.CrtYd) (width 0.05)) 30 | (fp_line (start -3 1.2) (end 13 1.2) (layer F.CrtYd) (width 0.05)) 31 | (fp_line (start 12.5 0) (end 12.5 -3.3) (layer F.SilkS) (width 0.12)) 32 | (fp_line (start -2.5 -3.3) (end -2.5 0) (layer F.SilkS) (width 0.12)) 33 | (fp_line (start -3 -4.55) (end -3 1.2) (layer F.CrtYd) (width 0.05)) 34 | (fp_line (start 12.5 0) (end 12.5 -3.3) (layer F.Fab) (width 0.12)) 35 | (fp_line (start 12.5 -3.3) (end -2 -3.3) (layer F.Fab) (width 0.12)) 36 | (fp_line (start -2.5 0) (end -1 0) (layer F.SilkS) (width 0.12)) 37 | (fp_line (start -2.5 -3.3) (end -1 -3.3) (layer F.SilkS) (width 0.12)) 38 | (fp_line (start 12.5 -3.3) (end 11 -3.3) (layer F.SilkS) (width 0.12)) 39 | (fp_line (start 12.5 0) (end 11 0) (layer F.SilkS) (width 0.12)) 40 | (fp_line (start 3 -3.3) (end 5 -3.3) (layer F.SilkS) (width 0.12)) 41 | (fp_line (start 3 0) (end 5 0) (layer F.SilkS) (width 0.12)) 42 | (pad 6 thru_hole circle (at 0 -3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 43 | (pad 7 thru_hole circle (at 2 -3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 44 | (pad 8 thru_hole circle (at 6 -3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 45 | (pad 9 thru_hole circle (at 8 -3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 46 | (pad 10 thru_hole circle (at 10 -3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 47 | (pad 1 thru_hole roundrect (at 0 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask) (roundrect_rratio 0.25)) 48 | (pad 2 thru_hole circle (at 2 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 49 | (pad 3 thru_hole circle (at 6 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 50 | (pad 4 thru_hole circle (at 8 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 51 | (pad 5 thru_hole circle (at 10 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 52 | (model ${KIPRJMOD}/tigard.3dshapes/SSSS224100.step 53 | (offset (xyz 5 1.65 0)) 54 | (scale (xyz 1 1 1)) 55 | (rotate (xyz 0 0 0)) 56 | ) 57 | ) 58 | -------------------------------------------------------------------------------- /tigard.pretty/SW_CuK_JS202011CQN_DPDT_Straight.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SW_CuK_JS202011CQN_DPDT_Straight (layer F.Cu) (tedit 5F0DFC38) 2 | (descr "CuK sub miniature slide switch, JS series, DPDT, right angle, http://www.ckswitches.com/media/1422/js.pdf") 3 | (tags "switch DPDT") 4 | (fp_text reference REF** (at 2.75 -4.9) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value SW_CuK_JS202011CQN_DPDT_Straight (at 3 1.7) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start -2 -3.65) (end 7 -3.65) (layer F.Fab) (width 0.1)) 11 | (fp_line (start 7 -3.65) (end 7 0.35) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 7 0.35) (end -1 0.35) (layer F.Fab) (width 0.1)) 13 | (fp_line (start -2 -3.65) (end -2 -0.65) (layer F.Fab) (width 0.1)) 14 | (fp_line (start -0.9 0.45) (end -2.1 0.45) (layer F.SilkS) (width 0.12)) 15 | (fp_line (start -2.1 0.45) (end -2.1 -3.75) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -2.1 -3.75) (end -0.9 -3.75) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start 5.9 -3.75) (end 7.1 -3.75) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start 7.1 -3.75) (end 7.1 0.45) (layer F.SilkS) (width 0.12)) 19 | (fp_line (start 7.1 0.45) (end 5.9 0.45) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start -1.2 0.75) (end -2.4 0.75) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start -2.4 0.75) (end -2.4 -0.45) (layer F.SilkS) (width 0.12)) 22 | (fp_line (start -2.25 -4.25) (end 7.25 -4.25) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start 7.25 -4.25) (end 7.25 0.95) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start 7.25 0.95) (end -2.25 0.95) (layer F.CrtYd) (width 0.05)) 25 | (fp_line (start -2.25 -4.25) (end -2.25 0.95) (layer F.CrtYd) (width 0.05)) 26 | (fp_line (start -1 0.35) (end -2 -0.65) (layer F.Fab) (width 0.1)) 27 | (fp_text user %R (at 2 -1.65) (layer F.Fab) 28 | (effects (font (size 1 1) (thickness 0.15))) 29 | ) 30 | (pad 4 thru_hole circle (at 0 -3.3 90) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 31 | (pad 5 thru_hole circle (at 2.5 -3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 32 | (pad 6 thru_hole circle (at 5 -3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 33 | (pad 1 thru_hole roundrect (at 0 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask) (roundrect_rratio 0.25)) 34 | (pad 2 thru_hole circle (at 2.5 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 35 | (pad 3 thru_hole circle (at 5 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)) 36 | (model ${KISYS3DMOD}/Button_Switch_THT.3dshapes/SW_CuK_JS202011CQN_DPDT_Straight.wrl 37 | (offset (xyz 0 3.3 0)) 38 | (scale (xyz 1 1 1)) 39 | (rotate (xyz 0 0 0)) 40 | ) 41 | ) 42 | -------------------------------------------------------------------------------- /tigard.pretty/Texas_VQFN-RHL-24_ThermalVias.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Texas_VQFN-RHL-24_ThermalVias (layer F.Cu) (tedit 5ECB9A16) 2 | (fp_text reference REF** (at 0 -4) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value Texas_VQFN-RHL-24_ThermalVias (at 0 4.25) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start -1.8 2.85) (end -1 2.85) (layer F.SilkS) (width 0.12)) 9 | (fp_line (start -1.8 2.5) (end -1.8 2.85) (layer F.SilkS) (width 0.12)) 10 | (fp_line (start 1.8 2.85) (end 1 2.85) (layer F.SilkS) (width 0.12)) 11 | (fp_line (start 1.8 2.5) (end 1.8 2.85) (layer F.SilkS) (width 0.12)) 12 | (fp_line (start 1.8 -2.85) (end 1.8 -2.5) (layer F.SilkS) (width 0.12)) 13 | (fp_line (start 1 -2.85) (end 1.8 -2.85) (layer F.SilkS) (width 0.12)) 14 | (fp_line (start -1 -2.85) (end -1.8 -2.85) (layer F.SilkS) (width 0.12)) 15 | (fp_line (start -1.25 -2.8) (end 1.75 -2.8) (layer F.Fab) (width 0.1)) 16 | (fp_line (start 1.75 2.8) (end -1.75 2.8) (layer F.Fab) (width 0.1)) 17 | (fp_line (start 1.75 -2.8) (end 1.75 2.8) (layer F.Fab) (width 0.1)) 18 | (fp_line (start -1.75 2.8) (end -1.75 -2.3) (layer F.Fab) (width 0.1)) 19 | (fp_line (start -1.75 -2.3) (end -1.25 -2.8) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -2.25 -3.25) (end 2.25 -3.25) (layer F.CrtYd) (width 0.05)) 21 | (fp_line (start 2.25 -3.25) (end 2.25 3.25) (layer F.CrtYd) (width 0.05)) 22 | (fp_line (start 2.25 3.25) (end -2.25 3.25) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start -2.25 3.25) (end -2.25 -3.25) (layer F.CrtYd) (width 0.05)) 24 | (pad "" smd roundrect (at 0.56 -1.34 180) (size 0.9 1) (layers F.Paste) (roundrect_rratio 0.25)) 25 | (pad 25 thru_hole circle (at 0 -1.775 180) (size 0.4 0.4) (drill 0.2) (layers *.Cu)) 26 | (pad 25 thru_hole circle (at 0.775 -0.67 180) (size 0.4 0.4) (drill 0.2) (layers *.Cu)) 27 | (pad 25 thru_hole circle (at 0 -0.67 180) (size 0.4 0.4) (drill 0.2) (layers *.Cu)) 28 | (pad 25 thru_hole circle (at -0.775 -0.67 180) (size 0.4 0.4) (drill 0.2) (layers *.Cu)) 29 | (pad 25 thru_hole circle (at -0.775 0.67 180) (size 0.4 0.4) (drill 0.2) (layers *.Cu)) 30 | (pad 25 thru_hole circle (at 0 0.67 180) (size 0.4 0.4) (drill 0.2) (layers *.Cu)) 31 | (pad 25 thru_hole circle (at 0.775 0.67 180) (size 0.4 0.4) (drill 0.2) (layers *.Cu)) 32 | (pad 25 thru_hole circle (at 0 1.775 180) (size 0.4 0.4) (drill 0.2) (layers *.Cu)) 33 | (pad 20 smd roundrect (at 1.65 -0.75 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 34 | (pad 18 smd roundrect (at 1.65 0.25 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 35 | (pad 17 smd roundrect (at 1.65 0.75 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 36 | (pad 14 smd roundrect (at 1.65 2.25 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 37 | (pad 15 smd roundrect (at 1.65 1.75 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 38 | (pad 16 smd roundrect (at 1.65 1.25 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 39 | (pad 23 smd roundrect (at 1.65 -2.25 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 40 | (pad 22 smd roundrect (at 1.65 -1.75 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 41 | (pad 25 smd roundrect (at 0.25 2.65 180) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 42 | (pad 19 smd roundrect (at 1.65 -0.25 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 43 | (pad 13 smd roundrect (at 0.75 2.65 180) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 44 | (pad 25 smd roundrect (at -0.25 2.65 180) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 45 | (pad 12 smd roundrect (at -0.75 2.65 180) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 46 | (pad 21 smd roundrect (at 1.65 -1.25 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 47 | (pad 11 smd roundrect (at -1.65 2.25 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 48 | (pad 10 smd roundrect (at -1.65 1.75 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 49 | (pad 9 smd roundrect (at -1.65 1.25 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 50 | (pad 8 smd roundrect (at -1.65 0.75 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 51 | (pad 7 smd roundrect (at -1.65 0.25 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 52 | (pad 6 smd roundrect (at -1.65 -0.25 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 53 | (pad 5 smd roundrect (at -1.65 -0.75 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 54 | (pad 4 smd roundrect (at -1.65 -1.25 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 55 | (pad 3 smd roundrect (at -1.65 -1.75 90) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 56 | (pad 2 smd roundrect (at -1.65 -2.25 270) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 57 | (pad 24 smd roundrect (at 0.75 -2.65) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 58 | (pad 25 smd roundrect (at 0.25 -2.65) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 59 | (pad 25 smd roundrect (at -0.25 -2.65) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 60 | (pad 1 smd roundrect (at -0.75 -2.65) (size 0.24 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208)) 61 | (pad "" smd roundrect (at -0.56 -1.34 180) (size 0.9 1) (layers F.Paste) (roundrect_rratio 0.25)) 62 | (pad "" smd roundrect (at -0.56 0 180) (size 0.9 1) (layers F.Paste) (roundrect_rratio 0.25)) 63 | (pad "" smd roundrect (at 0.56 0 180) (size 0.9 1) (layers F.Paste) (roundrect_rratio 0.25)) 64 | (pad "" smd roundrect (at -0.56 1.34 180) (size 0.9 1) (layers F.Paste) (roundrect_rratio 0.25)) 65 | (pad "" smd roundrect (at 0.56 1.34 180) (size 0.9 1) (layers F.Paste) (roundrect_rratio 0.25)) 66 | (pad "" smd roundrect (at 0 -2.3 180) (size 0.74 0.24) (layers F.Paste) (roundrect_rratio 0.024)) 67 | (pad "" smd roundrect (at 0 2.3 180) (size 0.74 0.24) (layers F.Paste) (roundrect_rratio 0.024)) 68 | (pad 25 smd custom (at 0 0 180) (size 2 2) (layers F.Cu F.Mask) 69 | (zone_connect 0) 70 | (options (clearance outline) (anchor rect)) 71 | (primitives 72 | (gr_poly (pts 73 | (xy -1.025 -2.025) (xy -0.37 -2.025) (xy -0.37 -2.425) (xy 0.37 -2.425) (xy 0.37 -2.025) 74 | (xy 1.025 -2.025) (xy 1.025 2.025) (xy 0.37 2.025) (xy 0.37 2.425) (xy -0.37 2.425) 75 | (xy -0.37 2.025) (xy -1.025 2.025)) (width 0)) 76 | )) 77 | ) 78 | -------------------------------------------------------------------------------- /tigard.pretty/Tigard_Logo.kicad_mod: -------------------------------------------------------------------------------- 1 | (module LOGO (layer F.Cu) 2 | (at 0 0) 3 | (fp_text reference "G***" (at 0 0) (layer F.SilkS) hide 4 | (effects (font (thickness 0.3))) 5 | ) 6 | (fp_text value "LOGO" (at 0.75 0) (layer F.SilkS) hide 7 | (effects (font (thickness 0.3))) 8 | ) 9 | (fp_poly (pts (xy -0.153939 0.060088) (xy -0.153959 0.216643) (xy -0.154023 0.358555) (xy -0.154138 0.486572) (xy -0.154311 0.601445) (xy -0.154550 0.703922) (xy -0.154862 0.794755) (xy -0.155253 0.874692) 10 | (xy -0.155731 0.944483) (xy -0.156304 1.004879) (xy -0.156977 1.056628) (xy -0.157758 1.100480) (xy -0.158655 1.137186) (xy -0.159674 1.167495) (xy -0.160823 1.192157) (xy -0.162108 1.211921) 11 | (xy -0.163537 1.227538) (xy -0.165118 1.239757) (xy -0.165137 1.239883) (xy -0.189044 1.351721) (xy -0.224657 1.454268) (xy -0.271761 1.547140) (xy -0.330145 1.629953) (xy -0.399595 1.702326) 12 | (xy -0.441214 1.736620) (xy -0.492717 1.770536) (xy -0.554953 1.803220) (xy -0.623290 1.832512) (xy -0.693093 1.856252) (xy -0.705084 1.859666) (xy -0.781242 1.880679) (xy -1.935788 1.886166) 13 | (xy -2.093593 1.886870) (xy -2.264384 1.887550) (xy -2.445755 1.888200) (xy -2.635297 1.888814) (xy -2.830604 1.889385) (xy -3.029267 1.889909) (xy -3.228880 1.890379) (xy -3.427035 1.890790) 14 | (xy -3.621325 1.891136) (xy -3.809341 1.891411) (xy -3.988678 1.891609) (xy -4.156926 1.891724) (xy -4.260272 1.891753) (xy -4.418034 1.891757) (xy -4.561168 1.891737) (xy -4.690442 1.891683) 15 | (xy -4.806623 1.891588) (xy -4.910477 1.891443) (xy -5.002771 1.891240) (xy -5.084273 1.890970) (xy -5.155748 1.890626) (xy -5.217965 1.890198) (xy -5.271689 1.889679) (xy -5.317688 1.889060) 16 | (xy -5.356728 1.888333) (xy -5.389577 1.887490) (xy -5.417000 1.886522) (xy -5.439766 1.885422) (xy -5.458640 1.884180) (xy -5.474390 1.882788) (xy -5.487783 1.881239) (xy -5.499585 1.879523) 17 | (xy -5.507182 1.878241) (xy -5.570710 1.865865) (xy -5.623481 1.852712) (xy -5.670122 1.837368) (xy -5.715256 1.818421) (xy -5.736900 1.808049) (xy -5.821920 1.757533) (xy -5.850500 1.733977) 18 | (xy -5.570313 1.733977) (xy -5.562407 1.739348) (xy -5.552250 1.742669) (xy -5.537760 1.743277) (xy -5.523153 1.734615) (xy -5.506268 1.714899) (xy -5.491012 1.692104) (xy -5.474245 1.670233) 19 | (xy -5.461614 1.662561) (xy -5.454195 1.668203) (xy -5.453065 1.686270) (xy -5.459299 1.715878) (xy -5.459860 1.717767) (xy -5.470578 1.753378) (xy -5.449646 1.757565) (xy -5.431679 1.760323) 20 | (xy -5.404115 1.763639) (xy -5.372699 1.766825) (xy -5.370523 1.767024) (xy -5.312331 1.772297) (xy -5.267043 1.737449) (xy -5.221974 1.699026) (xy -5.181914 1.656013) (xy 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-------------------------------------------------------------------------------- 1 | (module USB_C_Receptacle_HRO_TYPE-C-31-M-12 (layer F.Cu) (tedit 5F55297E) 2 | (descr "USB Type-C receptacle for USB 2.0 and PD, http://www.krhro.com/uploads/soft/180320/1-1P320120243.pdf") 3 | (tags "usb usb-c 2.0 pd") 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -5.645) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value USB_C_Receptacle_HRO_TYPE-C-31-M-12 (at 0 5.1) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start -4.7 2) (end -4.7 3.9) (layer F.SilkS) (width 0.12)) 12 | (fp_line (start -4.7 -1.9) (end -4.7 0.1) (layer F.SilkS) (width 0.12)) 13 | (fp_line (start 4.7 2) (end 4.7 3.9) (layer F.SilkS) (width 0.12)) 14 | (fp_line (start 4.7 -1.9) (end 4.7 0.1) (layer F.SilkS) (width 0.12)) 15 | (fp_line (start 5.32 -5.27) (end 5.32 4.15) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start -5.32 -5.27) (end -5.32 4.15) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -5.32 4.15) (end 5.32 4.15) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -5.32 -5.27) (end 5.32 -5.27) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start 4.47 -3.65) (end 4.47 3.65) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -4.47 3.65) (end 4.47 3.65) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -4.47 -3.65) (end -4.47 3.65) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -4.47 -3.65) (end 4.47 -3.65) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -4.7 3.9) (end 4.7 3.9) (layer F.SilkS) (width 0.12)) 24 | (fp_text user %R (at 0 0) (layer F.Fab) 25 | (effects (font (size 1 1) (thickness 0.15))) 26 | ) 27 | (pad S1 thru_hole oval (at 4.32 1.05) (size 1 1.6) (drill oval 0.6 1.2) (layers *.Cu *.Mask)) 28 | (pad "" np_thru_hole circle (at 2.89 -2.6) (size 0.65 0.65) (drill 0.65) (layers *.Cu *.Mask)) 29 | (pad S1 thru_hole oval (at -4.32 1.05) (size 1 1.6) (drill oval 0.6 1.2) (layers *.Cu *.Mask)) 30 | (pad "" np_thru_hole circle (at -2.89 -2.6) (size 0.65 0.65) (drill 0.65) (layers *.Cu *.Mask)) 31 | (pad S1 thru_hole oval (at -4.32 -3.13) (size 1 2.1) (drill oval 0.6 1.7) (layers *.Cu *.Mask)) 32 | (pad S1 thru_hole oval (at 4.32 -3.13) (size 1 2.1) (drill oval 0.6 1.7) (layers *.Cu *.Mask)) 33 | (pad A6 smd rect (at -0.25 -4.045) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)) 34 | (pad B5 smd rect (at 1.75 -4.045) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)) 35 | (pad A8 smd rect (at 1.25 -4.045) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)) 36 | (pad B6 smd rect (at 0.75 -4.045) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)) 37 | (pad A7 smd rect (at 0.25 -4.045) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)) 38 | (pad B7 smd rect (at -0.75 -4.045) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)) 39 | (pad A5 smd rect (at -1.25 -4.045) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)) 40 | (pad B8 smd rect (at -1.75 -4.045) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)) 41 | (pad A12 smd rect (at 3.25 -4.045) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)) 42 | (pad B4 smd rect (at 2.45 -4.045) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)) 43 | (pad A4 smd rect (at -2.45 -4.045) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)) 44 | (pad A1 smd rect (at -3.25 -4.045) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)) 45 | (pad B12 smd rect (at -3.25 -4.045) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)) 46 | (pad B9 smd rect (at -2.45 -4.045) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)) 47 | (pad A9 smd rect (at 2.45 -4.045) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)) 48 | (pad B1 smd rect (at 3.25 -4.045) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)) 49 | (pad "" smd oval (at -4.32 -3.13) (size 1 2.1) (layers F.Paste)) 50 | (pad 2 smd rect (at -4.82 -3.13) (size 1 2.1) (layers F.Paste)) 51 | (pad 3 smd rect (at 4.82 -3.13) (size 1 2.1) (layers F.Paste)) 52 | (pad 10 smd oval (at 4.32 -3.13) (size 1 2.1) (layers F.Paste)) 53 | (pad 11 smd rect (at 4.82 1.05) (size 1 1.6) (layers F.Paste)) 54 | (pad 13 smd oval (at 4.32 1.05) (size 1 1.6) (layers F.Paste)) 55 | (pad 14 smd oval (at -4.32 1.05) (size 1 1.6) (layers F.Paste)) 56 | (pad 15 smd rect (at -4.82 1.05) (size 1 1.6) (layers F.Paste)) 57 | (model ${KISYS3DMOD}/Connector_USB.3dshapes/USB_C_Receptacle_HRO_TYPE-C-31-M-12.wrl 58 | (at (xyz 0 0 0)) 59 | (scale (xyz 1 1 1)) 60 | (rotate (xyz 0 0 0)) 61 | ) 62 | (model ${KIPRJMOD}/tigard.3dshapes/HRO_TYPE-C-31-M-12.step 63 | (offset (xyz -4.5 -3.7 0)) 64 | (scale (xyz 1 1 1)) 65 | (rotate (xyz 0 0 0)) 66 | ) 67 | ) 68 | -------------------------------------------------------------------------------- /tigard.pro: -------------------------------------------------------------------------------- 1 | update=Tue 21 Sep 2021 04:25:45 PM PDT 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [cvpcb] 9 | version=1 10 | NetIExt=net 11 | [eeschema] 12 | version=1 13 | LibDir= 14 | [eeschema/libraries] 15 | [pcbnew] 16 | version=1 17 | PageLayoutDescrFile= 18 | LastNetListRead=tigard.net 19 | CopperLayerCount=4 20 | BoardThickness=1.6 21 | AllowMicroVias=0 22 | AllowBlindVias=0 23 | RequireCourtyardDefinitions=0 24 | ProhibitOverlappingCourtyards=1 25 | MinTrackWidth=0.15 26 | MinViaDiameter=0.5 27 | MinViaDrill=0.25 28 | MinMicroViaDiameter=0.2 29 | MinMicroViaDrill=0.09999999999999999 30 | MinHoleToHole=0.2 31 | TrackWidth1=0.15 32 | TrackWidth2=0.2 33 | TrackWidth3=0.205232 34 | TrackWidth4=0.25 35 | TrackWidth5=0.5 36 | ViaDiameter1=0.5 37 | ViaDrill1=0.25 38 | ViaDiameter2=0.8 39 | ViaDrill2=0.4 40 | dPairWidth1=0.205232 41 | dPairGap1=0.2032 42 | dPairViaGap1=0.25 43 | SilkLineWidth=0.15 44 | SilkTextSizeV=0.7999999999999999 45 | SilkTextSizeH=0.7999999999999999 46 | SilkTextSizeThickness=0.15 47 | SilkTextItalic=0 48 | SilkTextUpright=1 49 | CopperLineWidth=0.2 50 | CopperTextSizeV=1.5 51 | CopperTextSizeH=1.5 52 | CopperTextThickness=0.3 53 | CopperTextItalic=0 54 | CopperTextUpright=1 55 | EdgeCutLineWidth=0.05 56 | CourtyardLineWidth=0.05 57 | OthersLineWidth=0.15 58 | OthersTextSizeV=1 59 | OthersTextSizeH=1 60 | OthersTextSizeThickness=0.15 61 | OthersTextItalic=0 62 | OthersTextUpright=1 63 | SolderMaskClearance=0.05 64 | SolderMaskMinWidth=0 65 | SolderPasteClearance=0 66 | SolderPasteRatio=-0 67 | [pcbnew/Layer.F.Cu] 68 | Name=F.Cu 69 | Type=0 70 | Enabled=1 71 | [pcbnew/Layer.In1.Cu] 72 | Name=GND 73 | Type=1 74 | Enabled=1 75 | [pcbnew/Layer.In2.Cu] 76 | Name=PWR 77 | Type=1 78 | Enabled=1 79 | [pcbnew/Layer.In3.Cu] 80 | Name=In3.Cu 81 | Type=0 82 | Enabled=0 83 | [pcbnew/Layer.In4.Cu] 84 | Name=In4.Cu 85 | Type=0 86 | Enabled=0 87 | [pcbnew/Layer.In5.Cu] 88 | Name=In5.Cu 89 | Type=0 90 | Enabled=0 91 | [pcbnew/Layer.In6.Cu] 92 | Name=In6.Cu 93 | Type=0 94 | Enabled=0 95 | [pcbnew/Layer.In7.Cu] 96 | Name=In7.Cu 97 | Type=0 98 | Enabled=0 99 | [pcbnew/Layer.In8.Cu] 100 | Name=In8.Cu 101 | Type=0 102 | Enabled=0 103 | [pcbnew/Layer.In9.Cu] 104 | Name=In9.Cu 105 | Type=0 106 | Enabled=0 107 | [pcbnew/Layer.In10.Cu] 108 | Name=In10.Cu 109 | Type=0 110 | Enabled=0 111 | [pcbnew/Layer.In11.Cu] 112 | Name=In11.Cu 113 | Type=0 114 | Enabled=0 115 | [pcbnew/Layer.In12.Cu] 116 | Name=In12.Cu 117 | Type=0 118 | Enabled=0 119 | [pcbnew/Layer.In13.Cu] 120 | Name=In13.Cu 121 | Type=0 122 | Enabled=0 123 | [pcbnew/Layer.In14.Cu] 124 | Name=In14.Cu 125 | Type=0 126 | Enabled=0 127 | [pcbnew/Layer.In15.Cu] 128 | Name=In15.Cu 129 | Type=0 130 | Enabled=0 131 | [pcbnew/Layer.In16.Cu] 132 | Name=In16.Cu 133 | Type=0 134 | Enabled=0 135 | [pcbnew/Layer.In17.Cu] 136 | Name=In17.Cu 137 | Type=0 138 | Enabled=0 139 | [pcbnew/Layer.In18.Cu] 140 | Name=In18.Cu 141 | Type=0 142 | Enabled=0 143 | [pcbnew/Layer.In19.Cu] 144 | Name=In19.Cu 145 | Type=0 146 | Enabled=0 147 | [pcbnew/Layer.In20.Cu] 148 | Name=In20.Cu 149 | Type=0 150 | Enabled=0 151 | [pcbnew/Layer.In21.Cu] 152 | Name=In21.Cu 153 | Type=0 154 | Enabled=0 155 | [pcbnew/Layer.In22.Cu] 156 | Name=In22.Cu 157 | Type=0 158 | Enabled=0 159 | [pcbnew/Layer.In23.Cu] 160 | Name=In23.Cu 161 | Type=0 162 | Enabled=0 163 | [pcbnew/Layer.In24.Cu] 164 | Name=In24.Cu 165 | Type=0 166 | Enabled=0 167 | [pcbnew/Layer.In25.Cu] 168 | Name=In25.Cu 169 | Type=0 170 | Enabled=0 171 | [pcbnew/Layer.In26.Cu] 172 | Name=In26.Cu 173 | Type=0 174 | Enabled=0 175 | [pcbnew/Layer.In27.Cu] 176 | Name=In27.Cu 177 | Type=0 178 | Enabled=0 179 | [pcbnew/Layer.In28.Cu] 180 | Name=In28.Cu 181 | Type=0 182 | Enabled=0 183 | [pcbnew/Layer.In29.Cu] 184 | Name=In29.Cu 185 | Type=0 186 | Enabled=0 187 | [pcbnew/Layer.In30.Cu] 188 | Name=In30.Cu 189 | Type=0 190 | Enabled=0 191 | [pcbnew/Layer.B.Cu] 192 | Name=B.Cu 193 | Type=0 194 | Enabled=1 195 | [pcbnew/Layer.B.Adhes] 196 | Enabled=1 197 | [pcbnew/Layer.F.Adhes] 198 | Enabled=1 199 | [pcbnew/Layer.B.Paste] 200 | Enabled=1 201 | [pcbnew/Layer.F.Paste] 202 | Enabled=1 203 | [pcbnew/Layer.B.SilkS] 204 | Enabled=1 205 | [pcbnew/Layer.F.SilkS] 206 | Enabled=1 207 | [pcbnew/Layer.B.Mask] 208 | Enabled=1 209 | [pcbnew/Layer.F.Mask] 210 | Enabled=1 211 | [pcbnew/Layer.Dwgs.User] 212 | Enabled=1 213 | [pcbnew/Layer.Cmts.User] 214 | Enabled=1 215 | [pcbnew/Layer.Eco1.User] 216 | Enabled=1 217 | [pcbnew/Layer.Eco2.User] 218 | Enabled=1 219 | [pcbnew/Layer.Edge.Cuts] 220 | Enabled=1 221 | [pcbnew/Layer.Margin] 222 | Enabled=1 223 | [pcbnew/Layer.B.CrtYd] 224 | Enabled=1 225 | [pcbnew/Layer.F.CrtYd] 226 | Enabled=1 227 | [pcbnew/Layer.B.Fab] 228 | Enabled=1 229 | [pcbnew/Layer.F.Fab] 230 | Enabled=1 231 | [pcbnew/Layer.Rescue] 232 | Enabled=0 233 | [pcbnew/Netclasses] 234 | [pcbnew/Netclasses/Default] 235 | Name=Default 236 | Clearance=0.15 237 | TrackWidth=0.15 238 | ViaDiameter=0.5 239 | ViaDrill=0.25 240 | uViaDiameter=0.3 241 | uViaDrill=0.1 242 | dPairWidth=0.205232 243 | dPairGap=0.2032 244 | dPairViaGap=0.25 245 | [schematic_editor] 246 | version=1 247 | PageLayoutDescrFile= 248 | PlotDirectoryName=tigard-prod/ 249 | SubpartIdSeparator=0 250 | SubpartFirstId=65 251 | NetFmtName=Pcbnew 252 | SpiceAjustPassiveValues=0 253 | LabSize=100 254 | ERC_TestSimilarLabels=1 255 | --------------------------------------------------------------------------------