├── 3rdparty └── aq_axi_master.v ├── IPs_init ├── coe_files │ ├── BRAM_QKV_k.coe │ ├── BRAM_QKV_q.coe │ ├── BRAM_QKV_v.coe │ ├── PATCH_EMBED_sim.coe │ ├── conv1_bias.coe │ ├── fetch_code.coe │ ├── linear_k_bias.coe │ ├── linear_q_bias.coe │ ├── linear_v_bias.coe │ ├── mlp_bias.coe │ ├── sps_conv1_bias.coe │ ├── sps_conv_bias.coe │ └── sps_conv_bias_new.coe └── init_ips.tcl ├── PE_dsp_part ├── Multi_add_unit.v ├── SpikingEncoder.v └── conv_layer1.v ├── RAM_part ├── features_padding.v ├── features_ram.v ├── features_ram_v1.v ├── simple_skid_buffer.v ├── weights_ram.v ├── width_change.v └── width_change_v1.v ├── README.md ├── TOP.v ├── Transformer_part ├── AttnCalc │ ├── AddTreeUnsigned.v │ ├── Attention_PE.v │ ├── FullAdder_Group.v │ ├── Full_adder.v │ ├── PipelineAdder.v │ ├── SpikesAccumulation.v │ └── tb_adder.v ├── AttnMultiplySpikes │ ├── LineMac_PE.v │ ├── MM_Calculator.v │ └── attn_v_spikes_reshaping.v ├── LIF_group.v ├── SystolicController.v ├── SystolicController_Slave.v ├── TOP_Transformer.v ├── Tmp_AttnRAM_group.v ├── mlp │ └── mlp_controller.v ├── patch_embed │ ├── PatchEmbed.v │ └── half_adder.v ├── qkv_BRAM_group.v ├── qkv_Reshape.v ├── systolic_array │ ├── Mtrx_slice_fifo.v │ ├── SystolicArray.v │ ├── SystolicArray_data_gen.v │ └── Systolic_pe.v └── weight_fifo │ ├── weight_fifo.v │ └── weight_fifo_v1.v ├── arbiter ├── round_robin_arb.v └── sim_rr_arbiter.v ├── ddr_SIM ├── ddr_sim.v ├── ddr_sim_spikformer.v └── ddr_sim_top.v ├── diagram ├── Eyeriss_part.png ├── SpikingAttn.png ├── SpikingEncoder.png ├── SpikingEncoder_1.png ├── intel_i9_result.png ├── python_run.png ├── rtx4060_result.png └── utilization_and_timing.png ├── eyeriss_part ├── Organize_data_unit.v ├── Organize_data_unit_v1.v ├── PSUM_RAM │ ├── psum_callback.v │ ├── psum_lif_top.v │ └── psum_ram_top.v ├── add_tree.v ├── code_fetch.v ├── simple_eyeriss_Controller.v ├── simple_eyeriss_array.v ├── simple_eyeriss_pe_unit.v ├── simple_eyeriss_top.v ├── simple_maxpool_row_unit.v └── simple_maxpool_unit.v ├── hyper_para.v.bak ├── proj_lif └── proj_lif.v ├── python_scripts ├── SpikformerEncoderBlock_view.py ├── data_bs128.npy ├── model.py ├── model_view.py └── quant_dorefa.py ├── reset_start_part └── sys_rst_m.v ├── setup.py └── testbench ├── AttnCalcBlock_tb.v ├── SpikformerEncoderBlock_tb.v ├── TOP_transformer_tb.v ├── conv1_tb.v ├── sim_only_v1 ├── SystolicArray_v1.v ├── Systolic_pe_v1.v ├── data_gen.v ├── fifo_sim.v ├── line_cal_tb.v ├── mm_cal_tb.v └── mutil_unit_sim.v ├── top_spikingencoder_tb.v └── top_tb.v /3rdparty/aq_axi_master.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/3rdparty/aq_axi_master.v -------------------------------------------------------------------------------- /IPs_init/coe_files/BRAM_QKV_k.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/BRAM_QKV_k.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/BRAM_QKV_q.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/BRAM_QKV_q.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/BRAM_QKV_v.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/BRAM_QKV_v.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/PATCH_EMBED_sim.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/PATCH_EMBED_sim.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/conv1_bias.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/conv1_bias.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/fetch_code.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/fetch_code.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/linear_k_bias.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/linear_k_bias.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/linear_q_bias.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/linear_q_bias.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/linear_v_bias.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/linear_v_bias.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/mlp_bias.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/mlp_bias.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/sps_conv1_bias.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/sps_conv1_bias.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/sps_conv_bias.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/sps_conv_bias.coe -------------------------------------------------------------------------------- /IPs_init/coe_files/sps_conv_bias_new.coe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/coe_files/sps_conv_bias_new.coe -------------------------------------------------------------------------------- /IPs_init/init_ips.tcl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/IPs_init/init_ips.tcl -------------------------------------------------------------------------------- /PE_dsp_part/Multi_add_unit.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/PE_dsp_part/Multi_add_unit.v -------------------------------------------------------------------------------- /PE_dsp_part/SpikingEncoder.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/PE_dsp_part/SpikingEncoder.v -------------------------------------------------------------------------------- /PE_dsp_part/conv_layer1.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/PE_dsp_part/conv_layer1.v -------------------------------------------------------------------------------- /RAM_part/features_padding.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/RAM_part/features_padding.v -------------------------------------------------------------------------------- /RAM_part/features_ram.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/RAM_part/features_ram.v -------------------------------------------------------------------------------- /RAM_part/features_ram_v1.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/RAM_part/features_ram_v1.v -------------------------------------------------------------------------------- /RAM_part/simple_skid_buffer.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/RAM_part/simple_skid_buffer.v -------------------------------------------------------------------------------- /RAM_part/weights_ram.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/RAM_part/weights_ram.v -------------------------------------------------------------------------------- /RAM_part/width_change.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/RAM_part/width_change.v -------------------------------------------------------------------------------- /RAM_part/width_change_v1.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/RAM_part/width_change_v1.v -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/README.md -------------------------------------------------------------------------------- /TOP.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/TOP.v -------------------------------------------------------------------------------- /Transformer_part/AttnCalc/AddTreeUnsigned.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnCalc/AddTreeUnsigned.v -------------------------------------------------------------------------------- /Transformer_part/AttnCalc/Attention_PE.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnCalc/Attention_PE.v -------------------------------------------------------------------------------- /Transformer_part/AttnCalc/FullAdder_Group.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnCalc/FullAdder_Group.v -------------------------------------------------------------------------------- /Transformer_part/AttnCalc/Full_adder.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnCalc/Full_adder.v -------------------------------------------------------------------------------- /Transformer_part/AttnCalc/PipelineAdder.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnCalc/PipelineAdder.v -------------------------------------------------------------------------------- /Transformer_part/AttnCalc/SpikesAccumulation.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnCalc/SpikesAccumulation.v -------------------------------------------------------------------------------- /Transformer_part/AttnCalc/tb_adder.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnCalc/tb_adder.v -------------------------------------------------------------------------------- /Transformer_part/AttnMultiplySpikes/LineMac_PE.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnMultiplySpikes/LineMac_PE.v -------------------------------------------------------------------------------- /Transformer_part/AttnMultiplySpikes/MM_Calculator.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnMultiplySpikes/MM_Calculator.v -------------------------------------------------------------------------------- /Transformer_part/AttnMultiplySpikes/attn_v_spikes_reshaping.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/AttnMultiplySpikes/attn_v_spikes_reshaping.v -------------------------------------------------------------------------------- /Transformer_part/LIF_group.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/LIF_group.v -------------------------------------------------------------------------------- /Transformer_part/SystolicController.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/SystolicController.v -------------------------------------------------------------------------------- /Transformer_part/SystolicController_Slave.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/SystolicController_Slave.v -------------------------------------------------------------------------------- /Transformer_part/TOP_Transformer.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/TOP_Transformer.v -------------------------------------------------------------------------------- /Transformer_part/Tmp_AttnRAM_group.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/Tmp_AttnRAM_group.v -------------------------------------------------------------------------------- /Transformer_part/mlp/mlp_controller.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/mlp/mlp_controller.v -------------------------------------------------------------------------------- /Transformer_part/patch_embed/PatchEmbed.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/patch_embed/PatchEmbed.v -------------------------------------------------------------------------------- /Transformer_part/patch_embed/half_adder.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/patch_embed/half_adder.v -------------------------------------------------------------------------------- /Transformer_part/qkv_BRAM_group.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/qkv_BRAM_group.v -------------------------------------------------------------------------------- /Transformer_part/qkv_Reshape.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/qkv_Reshape.v -------------------------------------------------------------------------------- /Transformer_part/systolic_array/Mtrx_slice_fifo.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/systolic_array/Mtrx_slice_fifo.v -------------------------------------------------------------------------------- /Transformer_part/systolic_array/SystolicArray.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/systolic_array/SystolicArray.v -------------------------------------------------------------------------------- /Transformer_part/systolic_array/SystolicArray_data_gen.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/systolic_array/SystolicArray_data_gen.v -------------------------------------------------------------------------------- /Transformer_part/systolic_array/Systolic_pe.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/systolic_array/Systolic_pe.v -------------------------------------------------------------------------------- /Transformer_part/weight_fifo/weight_fifo.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/weight_fifo/weight_fifo.v -------------------------------------------------------------------------------- /Transformer_part/weight_fifo/weight_fifo_v1.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/Transformer_part/weight_fifo/weight_fifo_v1.v -------------------------------------------------------------------------------- /arbiter/round_robin_arb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/arbiter/round_robin_arb.v -------------------------------------------------------------------------------- /arbiter/sim_rr_arbiter.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/arbiter/sim_rr_arbiter.v -------------------------------------------------------------------------------- /ddr_SIM/ddr_sim.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/ddr_SIM/ddr_sim.v -------------------------------------------------------------------------------- /ddr_SIM/ddr_sim_spikformer.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/ddr_SIM/ddr_sim_spikformer.v -------------------------------------------------------------------------------- /ddr_SIM/ddr_sim_top.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/ddr_SIM/ddr_sim_top.v -------------------------------------------------------------------------------- /diagram/Eyeriss_part.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/diagram/Eyeriss_part.png -------------------------------------------------------------------------------- /diagram/SpikingAttn.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/diagram/SpikingAttn.png -------------------------------------------------------------------------------- /diagram/SpikingEncoder.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/diagram/SpikingEncoder.png -------------------------------------------------------------------------------- /diagram/SpikingEncoder_1.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/diagram/SpikingEncoder_1.png -------------------------------------------------------------------------------- /diagram/intel_i9_result.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/diagram/intel_i9_result.png -------------------------------------------------------------------------------- /diagram/python_run.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/diagram/python_run.png -------------------------------------------------------------------------------- /diagram/rtx4060_result.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/diagram/rtx4060_result.png -------------------------------------------------------------------------------- /diagram/utilization_and_timing.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/diagram/utilization_and_timing.png -------------------------------------------------------------------------------- /eyeriss_part/Organize_data_unit.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/Organize_data_unit.v -------------------------------------------------------------------------------- /eyeriss_part/Organize_data_unit_v1.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/Organize_data_unit_v1.v -------------------------------------------------------------------------------- /eyeriss_part/PSUM_RAM/psum_callback.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/PSUM_RAM/psum_callback.v -------------------------------------------------------------------------------- /eyeriss_part/PSUM_RAM/psum_lif_top.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/PSUM_RAM/psum_lif_top.v -------------------------------------------------------------------------------- /eyeriss_part/PSUM_RAM/psum_ram_top.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/PSUM_RAM/psum_ram_top.v -------------------------------------------------------------------------------- /eyeriss_part/add_tree.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/add_tree.v -------------------------------------------------------------------------------- /eyeriss_part/code_fetch.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/code_fetch.v -------------------------------------------------------------------------------- /eyeriss_part/simple_eyeriss_Controller.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/simple_eyeriss_Controller.v -------------------------------------------------------------------------------- /eyeriss_part/simple_eyeriss_array.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/simple_eyeriss_array.v -------------------------------------------------------------------------------- /eyeriss_part/simple_eyeriss_pe_unit.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/simple_eyeriss_pe_unit.v -------------------------------------------------------------------------------- /eyeriss_part/simple_eyeriss_top.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/simple_eyeriss_top.v -------------------------------------------------------------------------------- /eyeriss_part/simple_maxpool_row_unit.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/simple_maxpool_row_unit.v -------------------------------------------------------------------------------- /eyeriss_part/simple_maxpool_unit.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/eyeriss_part/simple_maxpool_unit.v -------------------------------------------------------------------------------- /hyper_para.v.bak: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/hyper_para.v.bak -------------------------------------------------------------------------------- /proj_lif/proj_lif.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/proj_lif/proj_lif.v -------------------------------------------------------------------------------- /python_scripts/SpikformerEncoderBlock_view.py: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/python_scripts/SpikformerEncoderBlock_view.py -------------------------------------------------------------------------------- /python_scripts/data_bs128.npy: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/python_scripts/data_bs128.npy -------------------------------------------------------------------------------- /python_scripts/model.py: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/python_scripts/model.py -------------------------------------------------------------------------------- /python_scripts/model_view.py: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/python_scripts/model_view.py -------------------------------------------------------------------------------- /python_scripts/quant_dorefa.py: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/python_scripts/quant_dorefa.py -------------------------------------------------------------------------------- /reset_start_part/sys_rst_m.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/reset_start_part/sys_rst_m.v -------------------------------------------------------------------------------- /setup.py: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/setup.py -------------------------------------------------------------------------------- /testbench/AttnCalcBlock_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/AttnCalcBlock_tb.v -------------------------------------------------------------------------------- /testbench/SpikformerEncoderBlock_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/SpikformerEncoderBlock_tb.v -------------------------------------------------------------------------------- /testbench/TOP_transformer_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/TOP_transformer_tb.v -------------------------------------------------------------------------------- /testbench/conv1_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/conv1_tb.v -------------------------------------------------------------------------------- /testbench/sim_only_v1/SystolicArray_v1.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/sim_only_v1/SystolicArray_v1.v -------------------------------------------------------------------------------- /testbench/sim_only_v1/Systolic_pe_v1.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/sim_only_v1/Systolic_pe_v1.v -------------------------------------------------------------------------------- /testbench/sim_only_v1/data_gen.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/sim_only_v1/data_gen.v -------------------------------------------------------------------------------- /testbench/sim_only_v1/fifo_sim.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/sim_only_v1/fifo_sim.v -------------------------------------------------------------------------------- /testbench/sim_only_v1/line_cal_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/sim_only_v1/line_cal_tb.v -------------------------------------------------------------------------------- /testbench/sim_only_v1/mm_cal_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/sim_only_v1/mm_cal_tb.v -------------------------------------------------------------------------------- /testbench/sim_only_v1/mutil_unit_sim.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/sim_only_v1/mutil_unit_sim.v -------------------------------------------------------------------------------- /testbench/top_spikingencoder_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/top_spikingencoder_tb.v -------------------------------------------------------------------------------- /testbench/top_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/tooddler/FPGA_SpikingTransformer/HEAD/testbench/top_tb.v --------------------------------------------------------------------------------