├── h264enc ├── .gitignore ├── Makefile ├── h264enc.h ├── README.md ├── main.c └── h264enc.c ├── common ├── ve.o ├── disp.h ├── disp.c ├── ve.h ├── ve.c ├── ve.d └── sunxi_disp_ioctl.h ├── README └── common_ion ├── kernel-headers ├── README ├── cedar_ve.h ├── ion_sunxi.h ├── g2d_driver.h ├── ion.h ├── sunxi_display2.h └── sunxi_disp_ioctl.h ├── disp.h ├── disp.c ├── ve.h ├── ve.c └── sunxi_disp_ioctl.h /h264enc/.gitignore: -------------------------------------------------------------------------------- 1 | h264enc 2 | -------------------------------------------------------------------------------- /common/ve.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/uboborov/h264_encoder_H3/HEAD/common/ve.o -------------------------------------------------------------------------------- /README: -------------------------------------------------------------------------------- 1 | Modified h264 encoder sources for Allwinner A31s, A80, A33, H3, H8 CPUs 2 | original sources are located here: https://github.com/jemk/cedrus.git 3 | -------------------------------------------------------------------------------- /common_ion/kernel-headers/README: -------------------------------------------------------------------------------- 1 | Various sunxi-specific kernel header files from sunxi kernel sources at 2 | https://github.com/linux-sunxi/linux-sunxi 3 | https://github.com/allwinner-zh/linux-3.4-sunxi 4 | -------------------------------------------------------------------------------- /h264enc/Makefile: -------------------------------------------------------------------------------- 1 | TARGET = h264enc 2 | ION = _ion 3 | SRC = main.c h264enc.c ../common$(ION)/ve.c 4 | CFLAGS = -Wall -O3 -I../common$(ION) 5 | LDFLAGS = -lpthread 6 | LIBS = 7 | CC ?= gcc 8 | 9 | MAKEFLAGS += -rR --no-print-directory 10 | 11 | DEP_CFLAGS = -MD -MP -MQ $@ 12 | 13 | OBJ = $(addsuffix .o,$(basename $(SRC))) 14 | DEP = $(addsuffix .d,$(basename $(SRC))) 15 | 16 | .PHONY: clean all 17 | 18 | all: $(TARGET) 19 | $(TARGET): $(OBJ) 20 | $(CC) $(LDFLAGS) $(OBJ) $(LIBS) -o $@ 21 | 22 | clean: 23 | rm -f $(OBJ) 24 | rm -f $(DEP) 25 | rm -f $(TARGET) 26 | 27 | %.o: %.c 28 | $(CC) $(DEP_CFLAGS) $(CFLAGS) -c $< -o $@ 29 | 30 | include $(wildcard $(DEP)) 31 | -------------------------------------------------------------------------------- /common/disp.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 Jens Kuske 3 | * 4 | * This program is free software; you can redistribute it and/or modify 5 | * it under the terms of the GNU General Public License as published by 6 | * the Free Software Foundation; either version 2 of the License, or 7 | * (at your option) any later version. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * GNU General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU General Public License 15 | * along with this program; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 17 | * MA 02110-1301, USA. 18 | * 19 | */ 20 | 21 | #ifndef __DISP_H__ 22 | #define __DISP_H__ 23 | 24 | #include 25 | 26 | #define COLOR_YUV420 (0) 27 | #define COLOR_YUV422 (2) 28 | 29 | int disp_open(void); 30 | int disp_set_para(const uint32_t luma_buffer, const uint32_t chroma_buffer, 31 | const int color_format, const int width, const int height, 32 | const int out_x, const int out_y, const int put_width, const int out_height); 33 | int disp_new_frame(const uint32_t luma_buffer, const uint32_t chroma_buffer, 34 | const int id, const int frame_rate); 35 | void disp_close(void); 36 | 37 | #endif 38 | -------------------------------------------------------------------------------- /common_ion/disp.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 Jens Kuske 3 | * 4 | * This program is free software; you can redistribute it and/or modify 5 | * it under the terms of the GNU General Public License as published by 6 | * the Free Software Foundation; either version 2 of the License, or 7 | * (at your option) any later version. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * GNU General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU General Public License 15 | * along with this program; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 17 | * MA 02110-1301, USA. 18 | * 19 | */ 20 | 21 | #ifndef __DISP_H__ 22 | #define __DISP_H__ 23 | 24 | #include 25 | 26 | #define COLOR_YUV420 (0) 27 | #define COLOR_YUV422 (2) 28 | 29 | int disp_open(void); 30 | int disp_set_para(const uint32_t luma_buffer, const uint32_t chroma_buffer, 31 | const int color_format, const int width, const int height, 32 | const int out_x, const int out_y, const int put_width, const int out_height); 33 | int disp_new_frame(const uint32_t luma_buffer, const uint32_t chroma_buffer, 34 | const int id, const int frame_rate); 35 | void disp_close(void); 36 | 37 | #endif 38 | -------------------------------------------------------------------------------- /h264enc/h264enc.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015 Jens Kuske 3 | * 4 | * This program is free software; you can redistribute it and/or modify 5 | * it under the terms of the GNU General Public License as published by 6 | * the Free Software Foundation; either version 2 of the License, or 7 | * (at your option) any later version. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * GNU General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU General Public License 15 | * along with this program; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 17 | * MA 02110-1301, USA. 18 | * 19 | */ 20 | 21 | #ifndef __H264ENC_H__ 22 | #define __H264ENC_H__ 23 | 24 | struct h264enc_params { 25 | unsigned int width; 26 | unsigned int height; 27 | 28 | unsigned int src_width; 29 | unsigned int src_height; 30 | enum color_format { H264_FMT_NV12 = 0, H264_FMT_NV16 = 1 } src_format; 31 | 32 | unsigned int profile_idc, level_idc; 33 | 34 | enum { H264_EC_CAVLC = 0, H264_EC_CABAC = 1 } entropy_coding_mode; 35 | 36 | unsigned int qp; 37 | 38 | unsigned int keyframe_interval; 39 | }; 40 | 41 | typedef struct h264enc_internal h264enc; 42 | 43 | h264enc *h264enc_new(const struct h264enc_params *p); 44 | void h264enc_free(h264enc *c); 45 | void *h264enc_get_input_buffer(const h264enc *c); 46 | void *h264enc_get_bytestream_buffer(const h264enc *c); 47 | unsigned int h264enc_get_bytestream_length(const h264enc *c); 48 | int h264enc_encode_picture(h264enc *c); 49 | 50 | #endif 51 | -------------------------------------------------------------------------------- /common_ion/kernel-headers/cedar_ve.h: -------------------------------------------------------------------------------- 1 | #ifndef _CEDAR_VE_H_ 2 | #define _CEDAR_VE_H_ 3 | 4 | enum IOCTL_CMD { 5 | IOCTL_UNKOWN = 0x100, 6 | IOCTL_GET_ENV_INFO, 7 | IOCTL_WAIT_VE_DE, 8 | IOCTL_WAIT_VE_EN, 9 | IOCTL_RESET_VE, 10 | IOCTL_ENABLE_VE, 11 | IOCTL_DISABLE_VE, 12 | IOCTL_SET_VE_FREQ, 13 | 14 | IOCTL_CONFIG_AVS2 = 0x200, 15 | IOCTL_GETVALUE_AVS2 , 16 | IOCTL_PAUSE_AVS2 , 17 | IOCTL_START_AVS2 , 18 | IOCTL_RESET_AVS2 , 19 | IOCTL_ADJUST_AVS2, 20 | IOCTL_ENGINE_REQ, 21 | IOCTL_ENGINE_REL, 22 | IOCTL_ENGINE_CHECK_DELAY, 23 | IOCTL_GET_IC_VER, 24 | IOCTL_ADJUST_AVS2_ABS, 25 | IOCTL_FLUSH_CACHE, 26 | IOCTL_SET_REFCOUNT, 27 | 28 | IOCTL_READ_REG = 0x300, 29 | IOCTL_WRITE_REG, 30 | 31 | IOCTL_SET_VOL = 0x400, 32 | 33 | #if defined CONFIG_ARCH_SUN8IW8P1 34 | IOCTL_WAIT_JPEG_DEC = 0x500, 35 | #endif 36 | }; 37 | 38 | struct cedarv_env_infomation{ 39 | unsigned int phymem_start; 40 | int phymem_total_size; 41 | unsigned int address_macc; 42 | }; 43 | 44 | struct cedarv_cache_range{ 45 | long start; 46 | long end; 47 | }; 48 | 49 | /*struct __cedarv_task { 50 | int task_prio; 51 | int ID; 52 | unsigned long timeout; 53 | unsigned int frametime; 54 | unsigned int block_mode; 55 | }; 56 | 57 | struct cedarv_engine_task { 58 | struct __cedarv_task t; 59 | struct list_head list; 60 | struct task_struct *task_handle; 61 | unsigned int status; 62 | unsigned int running; 63 | unsigned int is_first_task; 64 | }; 65 | 66 | struct cedarv_engine_task_info { 67 | int task_prio; 68 | unsigned int frametime; 69 | unsigned int total_time; 70 | };*/ 71 | 72 | struct cedarv_regop { 73 | unsigned int addr; 74 | unsigned int value; 75 | }; 76 | /*--------------------------------------------------------------------------------*/ 77 | 78 | 79 | #endif 80 | -------------------------------------------------------------------------------- /h264enc/README.md: -------------------------------------------------------------------------------- 1 | Proof of Concept hardware accelerated H264 encoder for sunxi 2 | ============================================================ 3 | 4 | This is a basic example for using the H264 hardware encoder for sunxi SoCs. 5 | 6 | *It is just a proof of concept and not recommended for production use!* 7 | 8 | U P D: 9 | ------- 10 | Modified for devices which are using ion memory allocator and VE hardware 11 | newer than or equal to VE1633 i.e. A31s, A80, A33, H3, H8. 12 | Sources are stored in common_ion folder. 13 | Makefile has a hardcoded parameter ION = _ion to build from folder common_ion 14 | Modified version of the software has been tested on OPI PC board based on H3 CPU 15 | with cmd line as shown below 16 | 17 | encoding from usb camera: 18 | ffmpeg -f v4l2 -video_size 640x480 -i /dev/video0 -pix_fmt nv12 -r 25 -f rawvideo pipe: | ./h264enc - 640 480 test.h264 19 | 20 | decoding: 21 | mpv --vo=vdpau --hwdec=vdpau --hwdec-codecs=all test.h264 22 | 23 | 24 | Limitations: 25 | ------------ 26 | 27 | - no B frames 28 | - constant QP 29 | - only raw nv12 or nv16 input and bytestream output 30 | - ... many more 31 | 32 | The old mplayer doesn't seem to like the raw bytestream output, maybe our 33 | bytestream is still a little bit erroneous. 34 | 35 | 36 | Usage: 37 | ------ 38 | 39 | make 40 | 41 | ffmpeg -i -pix_fmt nv12 \ 42 | -vf pad="width=trunc((iw+15)/16)*16:height=trunc((ih+15)/16)*16" \ 43 | -f rawvideo pipe: | ./h264enc - 44 | 45 | It is *important* that the input data is in nv12 format and has a width and 46 | height multiple of 16, this is ensured by the "-vf pad" above. 47 | 48 | For example: 49 | 50 | ffmpeg -i bigbuckbunny.mpg -pix_fmt nv12 \ 51 | -vf pad="width=trunc((iw+15)/16)*16:height=trunc((ih+15)/16)*16" \ 52 | -f rawvideo pipe: | ./h264enc - 854 480 bigbuckbunny.264 53 | 54 | ffplay bigbuckbunny.264 55 | -------------------------------------------------------------------------------- /common_ion/kernel-headers/ion_sunxi.h: -------------------------------------------------------------------------------- 1 | /* 2 | * include/linux/ion_sunxi.h 3 | * 4 | * Copyright(c) 2013-2015 Allwinnertech Co., Ltd. 5 | * http://www.allwinnertech.com 6 | * 7 | * Author: liugang 8 | * 9 | * sunxi ion header file 10 | * 11 | * This program is free software; you can redistribute it and/or modify 12 | * it under the terms of the GNU General Public License as published by 13 | * the Free Software Foundation; either version 2 of the License, or 14 | * (at your option) any later version. 15 | */ 16 | 17 | #ifndef __ION_SUNXI_H 18 | #define __ION_SUNXI_H 19 | 20 | #define ION_HEAP_TYPE_SUNXI_START (ION_HEAP_TYPE_CUSTOM + 1) 21 | #define ION_HEAP_TYPE_SECURE (ION_HEAP_TYPE_SUNXI_START) 22 | 23 | typedef struct { 24 | long start; 25 | long end; 26 | }sunxi_cache_range; 27 | 28 | typedef struct { 29 | void *handle; 30 | unsigned long phys_addr; 31 | unsigned long size; 32 | }sunxi_phys_data; 33 | 34 | #define DMA_BUF_MAXCNT 8 35 | 36 | typedef struct { 37 | unsigned int src_va; 38 | unsigned int src_pa; 39 | unsigned int dst_va; 40 | unsigned int dst_pa; 41 | unsigned int size; 42 | }dma_buf_item; 43 | 44 | typedef struct { 45 | int multi_dma; 46 | unsigned int cnt; 47 | dma_buf_item item[DMA_BUF_MAXCNT]; 48 | }dma_buf_group; 49 | 50 | #define ION_IOC_SUNXI_FLUSH_RANGE 5 51 | #define ION_IOC_SUNXI_FLUSH_ALL 6 52 | #define ION_IOC_SUNXI_PHYS_ADDR 7 53 | #define ION_IOC_SUNXI_DMA_COPY 8 54 | #define ION_IOC_SUNXI_DUMP 9 55 | 56 | #ifdef __KERNEL__ 57 | 58 | int flush_clean_user_range(long start, long end); 59 | int flush_user_range(long start, long end); 60 | void flush_dcache_all(void); 61 | 62 | /** 63 | * sunxi_buf_alloc - alloc phys contigous memory in SUNXI platform. 64 | * @size: size in bytes to allocate. 65 | * @paddr: store the start phys address allocated. 66 | * 67 | * return the start virtual address, or 0 if failed. 68 | */ 69 | void *sunxi_buf_alloc(unsigned int size, unsigned int *paddr); 70 | /** 71 | * sunxi_buf_free - free buffer allocated by sunxi_buf_alloc. 72 | * @vaddr: the kernel virt addr of the area. 73 | * @paddr: the start phys addr of the area. 74 | * @size: size in bytes of the area. 75 | */ 76 | void sunxi_buf_free(void *vaddr, unsigned int paddr, unsigned int size); 77 | /** 78 | * sunxi_alloc_phys - alloc phys contigous memory in SUNXI platform. 79 | * @size: size in bytes to allocate. 80 | * 81 | * return the start phys addr, or 0 if failed. 82 | */ 83 | u32 sunxi_alloc_phys(size_t size); 84 | /** 85 | * sunxi_free_phys - free phys contigous memory allocted by sunxi_alloc_phys. 86 | * @paddr: the start phys addr of the area. 87 | * @size: size in bytes of the area. 88 | */ 89 | void sunxi_free_phys(u32 paddr, size_t size); 90 | /** 91 | * sunxi_map_kernel - map phys contigous memory to kernel virtual space. 92 | * @paddr: the start phys addr of the area. 93 | * @size: size in bytes of the area. 94 | * 95 | * return the start virt addr which is in vmalloc space, or NULL if failed. 96 | */ 97 | void *sunxi_map_kernel(unsigned int paddr, unsigned int size); 98 | /** 99 | * sunxi_unmap_kernel - unmap phys contigous memory from kernel space. 100 | * @vaddr: the kernel virt addr of the area. 101 | * @paddr: the start phys addr of the area. 102 | * @size: size in bytes of the area. 103 | */ 104 | void sunxi_unmap_kernel(void *vaddr, unsigned int paddr, unsigned int size); 105 | 106 | #endif /* __KERNEL__ */ 107 | 108 | #endif 109 | -------------------------------------------------------------------------------- /h264enc/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014 Jens Kuske 3 | * 4 | * This program is free software; you can redistribute it and/or modify 5 | * it under the terms of the GNU General Public License as published by 6 | * the Free Software Foundation; either version 2 of the License, or 7 | * (at your option) any later version. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * GNU General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU General Public License 15 | * along with this program; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 17 | * MA 02110-1301, USA. 18 | * 19 | */ 20 | 21 | #include 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include "ve.h" 29 | #include "h264enc.h" 30 | 31 | static int read_frame(int fd, void *buffer, int size) 32 | { 33 | int total = 0, len; 34 | while (total < size) 35 | { 36 | len = read(fd, buffer + total, size - total); 37 | 38 | if (len == 0) 39 | return 0; 40 | total += len; 41 | } 42 | return 1; 43 | } 44 | 45 | int main(const int argc, const char **argv) 46 | { 47 | if (argc != 5) 48 | { 49 | printf("Usage: %s \n", argv[0]); 50 | return EXIT_FAILURE; 51 | } 52 | 53 | int width = atoi(argv[2]); 54 | int height = atoi(argv[3]); 55 | unsigned int frnum = 0; 56 | 57 | if (!ve_open()) 58 | return EXIT_FAILURE; 59 | 60 | int in = 0, out; 61 | if (strcmp(argv[1], "-") != 0) 62 | { 63 | if ((in = open(argv[1], O_RDONLY)) == -1) 64 | { 65 | printf("could not open input file\n"); 66 | return EXIT_FAILURE; 67 | } 68 | printf("Input stream \"%s\" is opened.\n", argv[1]); 69 | } 70 | 71 | //printf("Input stream \"%s\" is opened.\n", argv[1]); 72 | 73 | if ((out = open(argv[4], O_CREAT | O_RDWR | O_TRUNC, 74 | S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH)) == -1) 75 | { 76 | printf("could not open output file\n"); 77 | return EXIT_FAILURE; 78 | } 79 | 80 | struct h264enc_params params; 81 | params.src_width = (width + 15) & ~15; 82 | params.width = width; 83 | params.src_height = (height + 15) & ~15; 84 | params.height = height; 85 | params.src_format = H264_FMT_NV12; 86 | params.profile_idc = 77; 87 | params.level_idc = 41; 88 | params.entropy_coding_mode = H264_EC_CABAC; 89 | params.qp = 24; 90 | params.keyframe_interval = 25; 91 | 92 | h264enc *encoder = h264enc_new(¶ms); 93 | if (encoder == NULL) 94 | { 95 | printf("could not create encoder\n"); 96 | goto err; 97 | } 98 | 99 | //printf("Encoder has been created successfully.\n"); 100 | 101 | void* output_buf = h264enc_get_bytestream_buffer(encoder); 102 | 103 | int input_size = params.src_width * (params.src_height + params.src_height / 2); 104 | void* input_buf = h264enc_get_input_buffer(encoder); 105 | 106 | while (read_frame(in, input_buf, input_size)) 107 | { 108 | if (h264enc_encode_picture(encoder)) { 109 | int _len = h264enc_get_bytestream_length(encoder); 110 | write(out, output_buf, _len); 111 | //printf("Input buffer has been encoded and written to the file, length=%d\n", _len); 112 | } else { 113 | printf("encoding error on frame %d\n", frnum); 114 | } 115 | frnum++; 116 | } 117 | //printf("Job is complete\n"); 118 | h264enc_free(encoder); 119 | 120 | err: 121 | ve_close(); 122 | close(out); 123 | close(in); 124 | 125 | return EXIT_SUCCESS; 126 | } 127 | -------------------------------------------------------------------------------- /common/disp.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 Jens Kuske 3 | * 4 | * This program is free software; you can redistribute it and/or modify 5 | * it under the terms of the GNU General Public License as published by 6 | * the Free Software Foundation; either version 2 of the License, or 7 | * (at your option) any later version. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * GNU General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU General Public License 15 | * along with this program; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 17 | * MA 02110-1301, USA. 18 | * 19 | */ 20 | 21 | #include 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include "disp.h" 27 | #include "sunxi_disp_ioctl.h" 28 | 29 | #define DRAM_OFFSET (0x40000000) 30 | 31 | static int fd = -1; 32 | static int layer = -1; 33 | static int last_id = -1; 34 | 35 | int disp_open(void) 36 | { 37 | fd = open("/dev/disp", O_RDWR); 38 | if (fd == -1) 39 | return 0; 40 | 41 | uint32_t args[4]; 42 | 43 | args[0] = 0; 44 | args[1] = DISP_LAYER_WORK_MODE_SCALER; 45 | args[2] = 0; 46 | args[3] = 0; 47 | layer = ioctl(fd, DISP_CMD_LAYER_REQUEST, args); 48 | 49 | if (layer > 0) 50 | return 1; 51 | 52 | close(fd); 53 | return 0; 54 | } 55 | 56 | int disp_set_para(const uint32_t luma_buffer, const uint32_t chroma_buffer, 57 | const int color_format, const int width, const int height, 58 | const int out_x, const int out_y, const int out_width, const int out_height) 59 | { 60 | uint32_t args[4]; 61 | __disp_layer_info_t layer_info; 62 | memset(&layer_info, 0, sizeof(layer_info)); 63 | layer_info.pipe = 1; 64 | layer_info.mode = DISP_LAYER_WORK_MODE_SCALER; 65 | layer_info.fb.mode = DISP_MOD_MB_UV_COMBINED; 66 | switch (color_format) 67 | { 68 | case COLOR_YUV420: 69 | layer_info.fb.format = DISP_FORMAT_YUV420; 70 | break; 71 | case COLOR_YUV422: 72 | layer_info.fb.format = DISP_FORMAT_YUV422; 73 | break; 74 | default: 75 | return 0; 76 | break; 77 | } 78 | layer_info.fb.seq = DISP_SEQ_UVUV; 79 | layer_info.fb.br_swap = 0; 80 | layer_info.fb.addr[0] = luma_buffer + DRAM_OFFSET; 81 | layer_info.fb.addr[1] = chroma_buffer + DRAM_OFFSET; 82 | 83 | layer_info.fb.cs_mode = DISP_BT601; 84 | layer_info.fb.size.width = width; 85 | layer_info.fb.size.height = height; 86 | layer_info.src_win.x = 0; 87 | layer_info.src_win.y = 0; 88 | layer_info.src_win.width = width; 89 | layer_info.src_win.height = height; 90 | layer_info.scn_win.x = out_x; 91 | layer_info.scn_win.y = out_y; 92 | layer_info.scn_win.width = out_width; 93 | layer_info.scn_win.height = out_height; 94 | 95 | args[0] = 0; 96 | args[1] = layer; 97 | args[2] = (unsigned long)(&layer_info); 98 | args[3] = 0; 99 | ioctl(fd, DISP_CMD_LAYER_SET_PARA, args); 100 | ioctl(fd, DISP_CMD_LAYER_TOP, args); 101 | 102 | ioctl(fd, DISP_CMD_VIDEO_START, args); 103 | ioctl(fd, DISP_CMD_LAYER_OPEN, args); 104 | 105 | return 1; 106 | } 107 | 108 | int disp_new_frame(const uint32_t luma_buffer, const uint32_t chroma_buffer, 109 | const int id, const int frame_rate) 110 | { 111 | uint32_t args[4], i = 0; 112 | 113 | __disp_video_fb_t video; 114 | memset(&video, 0, sizeof(__disp_video_fb_t)); 115 | video.id = id; 116 | video.frame_rate = frame_rate; 117 | video.addr[0] = luma_buffer + DRAM_OFFSET; 118 | video.addr[1] = chroma_buffer + DRAM_OFFSET; 119 | 120 | args[0] = 0; 121 | args[1] = layer; 122 | args[2] = (unsigned long)(&video); 123 | args[3] = 0; 124 | int tmp; 125 | while ((tmp = ioctl(fd, DISP_CMD_VIDEO_GET_FRAME_ID, args)) != last_id) 126 | { 127 | usleep(1000); 128 | if (i++ > 10) 129 | return 0; 130 | } 131 | 132 | ioctl(fd, DISP_CMD_VIDEO_SET_FB, args); 133 | last_id = id; 134 | 135 | return 1; 136 | } 137 | 138 | void disp_close(void) 139 | { 140 | uint32_t args[4]; 141 | 142 | args[0] = 0; 143 | args[1] = layer; 144 | args[2] = 0; 145 | args[3] = 0; 146 | ioctl(fd, DISP_CMD_LAYER_CLOSE, args); 147 | ioctl(fd, DISP_CMD_VIDEO_STOP, args); 148 | ioctl(fd, DISP_CMD_LAYER_RELEASE, args); 149 | 150 | close(fd); 151 | } 152 | -------------------------------------------------------------------------------- /common_ion/disp.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 Jens Kuske 3 | * 4 | * This program is free software; you can redistribute it and/or modify 5 | * it under the terms of the GNU General Public License as published by 6 | * the Free Software Foundation; either version 2 of the License, or 7 | * (at your option) any later version. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * GNU General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU General Public License 15 | * along with this program; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 17 | * MA 02110-1301, USA. 18 | * 19 | */ 20 | 21 | #include 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include "disp.h" 27 | #include "sunxi_disp_ioctl.h" 28 | 29 | #define DRAM_OFFSET (0x40000000) 30 | 31 | static int fd = -1; 32 | static int layer = -1; 33 | static int last_id = -1; 34 | 35 | int disp_open(void) 36 | { 37 | fd = open("/dev/disp", O_RDWR); 38 | if (fd == -1) 39 | return 0; 40 | 41 | uint32_t args[4]; 42 | 43 | args[0] = 0; 44 | args[1] = DISP_LAYER_WORK_MODE_SCALER; 45 | args[2] = 0; 46 | args[3] = 0; 47 | layer = ioctl(fd, DISP_CMD_LAYER_REQUEST, args); 48 | 49 | if (layer > 0) 50 | return 1; 51 | 52 | close(fd); 53 | return 0; 54 | } 55 | 56 | int disp_set_para(const uint32_t luma_buffer, const uint32_t chroma_buffer, 57 | const int color_format, const int width, const int height, 58 | const int out_x, const int out_y, const int out_width, const int out_height) 59 | { 60 | uint32_t args[4]; 61 | __disp_layer_info_t layer_info; 62 | memset(&layer_info, 0, sizeof(layer_info)); 63 | layer_info.pipe = 1; 64 | layer_info.mode = DISP_LAYER_WORK_MODE_SCALER; 65 | layer_info.fb.mode = DISP_MOD_MB_UV_COMBINED; 66 | switch (color_format) 67 | { 68 | case COLOR_YUV420: 69 | layer_info.fb.format = DISP_FORMAT_YUV420; 70 | break; 71 | case COLOR_YUV422: 72 | layer_info.fb.format = DISP_FORMAT_YUV422; 73 | break; 74 | default: 75 | return 0; 76 | break; 77 | } 78 | layer_info.fb.seq = DISP_SEQ_UVUV; 79 | layer_info.fb.br_swap = 0; 80 | layer_info.fb.addr[0] = luma_buffer + DRAM_OFFSET; 81 | layer_info.fb.addr[1] = chroma_buffer + DRAM_OFFSET; 82 | 83 | layer_info.fb.cs_mode = DISP_BT601; 84 | layer_info.fb.size.width = width; 85 | layer_info.fb.size.height = height; 86 | layer_info.src_win.x = 0; 87 | layer_info.src_win.y = 0; 88 | layer_info.src_win.width = width; 89 | layer_info.src_win.height = height; 90 | layer_info.scn_win.x = out_x; 91 | layer_info.scn_win.y = out_y; 92 | layer_info.scn_win.width = out_width; 93 | layer_info.scn_win.height = out_height; 94 | 95 | args[0] = 0; 96 | args[1] = layer; 97 | args[2] = (unsigned long)(&layer_info); 98 | args[3] = 0; 99 | ioctl(fd, DISP_CMD_LAYER_SET_PARA, args); 100 | ioctl(fd, DISP_CMD_LAYER_TOP, args); 101 | 102 | ioctl(fd, DISP_CMD_VIDEO_START, args); 103 | ioctl(fd, DISP_CMD_LAYER_OPEN, args); 104 | 105 | return 1; 106 | } 107 | 108 | int disp_new_frame(const uint32_t luma_buffer, const uint32_t chroma_buffer, 109 | const int id, const int frame_rate) 110 | { 111 | uint32_t args[4], i = 0; 112 | 113 | __disp_video_fb_t video; 114 | memset(&video, 0, sizeof(__disp_video_fb_t)); 115 | video.id = id; 116 | video.frame_rate = frame_rate; 117 | video.addr[0] = luma_buffer + DRAM_OFFSET; 118 | video.addr[1] = chroma_buffer + DRAM_OFFSET; 119 | 120 | args[0] = 0; 121 | args[1] = layer; 122 | args[2] = (unsigned long)(&video); 123 | args[3] = 0; 124 | int tmp; 125 | while ((tmp = ioctl(fd, DISP_CMD_VIDEO_GET_FRAME_ID, args)) != last_id) 126 | { 127 | usleep(1000); 128 | if (i++ > 10) 129 | return 0; 130 | } 131 | 132 | ioctl(fd, DISP_CMD_VIDEO_SET_FB, args); 133 | last_id = id; 134 | 135 | return 1; 136 | } 137 | 138 | void disp_close(void) 139 | { 140 | uint32_t args[4]; 141 | 142 | args[0] = 0; 143 | args[1] = layer; 144 | args[2] = 0; 145 | args[3] = 0; 146 | ioctl(fd, DISP_CMD_LAYER_CLOSE, args); 147 | ioctl(fd, DISP_CMD_VIDEO_STOP, args); 148 | ioctl(fd, DISP_CMD_LAYER_RELEASE, args); 149 | 150 | close(fd); 151 | } 152 | -------------------------------------------------------------------------------- /common/ve.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 Jens Kuske 3 | * 4 | * This library is free software; you can redistribute it and/or 5 | * modify it under the terms of the GNU Lesser General Public 6 | * License as published by the Free Software Foundation; either 7 | * version 2.1 of the License, or (at your option) any later version. 8 | * 9 | * This library is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 | * Lesser General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU Lesser General Public 15 | * License along with this library; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 17 | * 18 | */ 19 | 20 | #ifndef __VE_H__ 21 | #define __VE_H__ 22 | 23 | #include 24 | 25 | int ve_open(void); 26 | void ve_close(void); 27 | int ve_get_version(void); 28 | int ve_wait(int timeout); 29 | void *ve_get(int engine, uint32_t flags); 30 | void ve_put(void); 31 | 32 | void *ve_malloc(int size); 33 | void ve_free(void *ptr); 34 | uint32_t ve_virt2phys(void *ptr); 35 | void ve_flush_cache(void *start, int len); 36 | 37 | static inline void writeb(uint8_t val, void *addr) 38 | { 39 | *((volatile uint8_t *)addr) = val; 40 | } 41 | 42 | static inline void writel(uint32_t val, void *addr) 43 | { 44 | *((volatile uint32_t *)addr) = val; 45 | } 46 | 47 | static inline uint32_t readl(void *addr) 48 | { 49 | return *((volatile uint32_t *) addr); 50 | } 51 | 52 | #define VE_ENGINE_MPEG 0x0 53 | #define VE_ENGINE_H264 0x1 54 | #define VE_ENGINE_AVC 0xb 55 | 56 | #define VE_CTRL 0x000 57 | #define VE_VERSION 0x0f0 58 | 59 | #define VE_MPEG_PIC_HDR 0x100 60 | #define VE_MPEG_VOP_HDR 0x104 61 | #define VE_MPEG_SIZE 0x108 62 | #define VE_MPEG_FRAME_SIZE 0x10c 63 | #define VE_MPEG_MBA 0x110 64 | #define VE_MPEG_CTRL 0x114 65 | #define VE_MPEG_TRIGGER 0x118 66 | #define VE_MPEG_STATUS 0x11c 67 | #define VE_MPEG_TRBTRD_FIELD 0x120 68 | #define VE_MPEG_TRBTRD_FRAME 0x124 69 | #define VE_MPEG_VLD_ADDR 0x128 70 | #define VE_MPEG_VLD_OFFSET 0x12c 71 | #define VE_MPEG_VLD_LEN 0x130 72 | #define VE_MPEG_VLD_END 0x134 73 | #define VE_MPEG_MBH_ADDR 0x138 74 | #define VE_MPEG_DCAC_ADDR 0x13c 75 | #define VE_MPEG_NCF_ADDR 0x144 76 | #define VE_MPEG_REC_LUMA 0x148 77 | #define VE_MPEG_REC_CHROMA 0x14c 78 | #define VE_MPEG_FWD_LUMA 0x150 79 | #define VE_MPEG_FWD_CHROMA 0x154 80 | #define VE_MPEG_BACK_LUMA 0x158 81 | #define VE_MPEG_BACK_CHROMA 0x15c 82 | #define VE_MPEG_IQ_MIN_INPUT 0x180 83 | #define VE_MPEG_QP_INPUT 0x184 84 | #define VE_MPEG_JPEG_SIZE 0x1b8 85 | #define VE_MPEG_JPEG_RES_INT 0x1c0 86 | #define VE_MPEG_ROT_LUMA 0x1cc 87 | #define VE_MPEG_ROT_CHROMA 0x1d0 88 | #define VE_MPEG_SDROT_CTRL 0x1d4 89 | #define VE_MPEG_RAM_WRITE_PTR 0x1e0 90 | #define VE_MPEG_RAM_WRITE_DATA 0x1e4 91 | 92 | #define VE_H264_FRAME_SIZE 0x200 93 | #define VE_H264_PIC_HDR 0x204 94 | #define VE_H264_SLICE_HDR 0x208 95 | #define VE_H264_SLICE_HDR2 0x20c 96 | #define VE_H264_PRED_WEIGHT 0x210 97 | #define VE_H264_QP_PARAM 0x21c 98 | #define VE_H264_CTRL 0x220 99 | #define VE_H264_TRIGGER 0x224 100 | #define VE_H264_STATUS 0x228 101 | #define VE_H264_CUR_MB_NUM 0x22c 102 | #define VE_H264_VLD_ADDR 0x230 103 | #define VE_H264_VLD_OFFSET 0x234 104 | #define VE_H264_VLD_LEN 0x238 105 | #define VE_H264_VLD_END 0x23c 106 | #define VE_H264_SDROT_CTRL 0x240 107 | #define VE_H264_OUTPUT_FRAME_IDX 0x24c 108 | #define VE_H264_EXTRA_BUFFER1 0x250 109 | #define VE_H264_EXTRA_BUFFER2 0x254 110 | #define VE_H264_BASIC_BITS 0x2dc 111 | #define VE_H264_RAM_WRITE_PTR 0x2e0 112 | #define VE_H264_RAM_WRITE_DATA 0x2e4 113 | 114 | #define VE_SRAM_H264_PRED_WEIGHT_TABLE 0x000 115 | #define VE_SRAM_H264_FRAMEBUFFER_LIST 0x400 116 | #define VE_SRAM_H264_REF_LIST0 0x640 117 | #define VE_SRAM_H264_REF_LIST1 0x664 118 | #define VE_SRAM_H264_SCALING_LISTS 0x800 119 | 120 | #define VE_ISP_INPUT_SIZE 0xa00 121 | #define VE_ISP_INPUT_STRIDE 0xa04 122 | #define VE_ISP_CTRL 0xa08 123 | #define VE_ISP_INPUT_LUMA 0xa78 124 | #define VE_ISP_INPUT_CHROMA 0xa7c 125 | 126 | #define VE_AVC_PARAM 0xb04 127 | #define VE_AVC_QP 0xb08 128 | #define VE_AVC_MOTION_EST 0xb10 129 | #define VE_AVC_CTRL 0xb14 130 | #define VE_AVC_TRIGGER 0xb18 131 | #define VE_AVC_STATUS 0xb1c 132 | #define VE_AVC_BASIC_BITS 0xb20 133 | #define VE_AVC_UNK_BUF 0xb60 134 | #define VE_AVC_VLE_ADDR 0xb80 135 | #define VE_AVC_VLE_END 0xb84 136 | #define VE_AVC_VLE_OFFSET 0xb88 137 | #define VE_AVC_VLE_MAX 0xb8c 138 | #define VE_AVC_VLE_LENGTH 0xb90 139 | #define VE_AVC_REF_LUMA 0xba0 140 | #define VE_AVC_REF_CHROMA 0xba4 141 | #define VE_AVC_REC_LUMA 0xbb0 142 | #define VE_AVC_REC_CHROMA 0xbb4 143 | #define VE_AVC_REF_SLUMA 0xbb8 144 | #define VE_AVC_REC_SLUMA 0xbbc 145 | #define VE_AVC_MB_INFO 0xbc0 146 | 147 | #endif 148 | -------------------------------------------------------------------------------- /common_ion/ve.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 Jens Kuske 3 | * 4 | * This library is free software; you can redistribute it and/or 5 | * modify it under the terms of the GNU Lesser General Public 6 | * License as published by the Free Software Foundation; either 7 | * version 2.1 of the License, or (at your option) any later version. 8 | * 9 | * This library is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 | * Lesser General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU Lesser General Public 15 | * License along with this library; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 17 | * 18 | */ 19 | 20 | #ifndef __VE_H__ 21 | #define __VE_H__ 22 | 23 | #include 24 | 25 | int ve_open(void); 26 | void ve_close(void); 27 | int ve_get_version(void); 28 | int ve_wait(int timeout); 29 | void *ve_get(int engine, uint32_t flags); 30 | void ve_put(void); 31 | 32 | struct ve_mem 33 | { 34 | void *virt; 35 | uint32_t phys; 36 | int size; 37 | }; 38 | 39 | struct ve_mem *ve_malloc(int size); 40 | void ve_free(struct ve_mem *mem); 41 | void ve_flush_cache(struct ve_mem *mem); 42 | uint32_t ve_virt2phys(void *ptr); 43 | 44 | static inline void writeb(uint8_t val, void *addr) 45 | { 46 | *((volatile uint8_t *)addr) = val; 47 | } 48 | 49 | static inline void writel(uint32_t val, void *addr) 50 | { 51 | *((volatile uint32_t *)addr) = val; 52 | } 53 | 54 | static inline uint32_t readl(void *addr) 55 | { 56 | return *((volatile uint32_t *) addr); 57 | } 58 | 59 | #define VE_ENGINE_MPEG 0x0 60 | #define VE_ENGINE_H264 0x1 61 | #define VE_ENGINE_HEVC 0x4 62 | #define VE_ENGINE_AVC 0xb 63 | 64 | #define VE_CTRL 0x000 65 | #define VE_EXTRA_OUT_FMT_OFFSET 0x0e8 66 | #define VE_VERSION 0x0f0 67 | 68 | #define VE_MPEG_PIC_HDR 0x100 69 | #define VE_MPEG_VOP_HDR 0x104 70 | #define VE_MPEG_SIZE 0x108 71 | #define VE_MPEG_FRAME_SIZE 0x10c 72 | #define VE_MPEG_MBA 0x110 73 | #define VE_MPEG_CTRL 0x114 74 | #define VE_MPEG_TRIGGER 0x118 75 | #define VE_MPEG_STATUS 0x11c 76 | #define VE_MPEG_TRBTRD_FIELD 0x120 77 | #define VE_MPEG_TRBTRD_FRAME 0x124 78 | #define VE_MPEG_VLD_ADDR 0x128 79 | #define VE_MPEG_VLD_OFFSET 0x12c 80 | #define VE_MPEG_VLD_LEN 0x130 81 | #define VE_MPEG_VLD_END 0x134 82 | #define VE_MPEG_MBH_ADDR 0x138 83 | #define VE_MPEG_DCAC_ADDR 0x13c 84 | #define VE_MPEG_NCF_ADDR 0x144 85 | #define VE_MPEG_REC_LUMA 0x148 86 | #define VE_MPEG_REC_CHROMA 0x14c 87 | #define VE_MPEG_FWD_LUMA 0x150 88 | #define VE_MPEG_FWD_CHROMA 0x154 89 | #define VE_MPEG_BACK_LUMA 0x158 90 | #define VE_MPEG_BACK_CHROMA 0x15c 91 | #define VE_MPEG_IQ_MIN_INPUT 0x180 92 | #define VE_MPEG_QP_INPUT 0x184 93 | 94 | #define VE_MPEG_ROT_LUMA 0x1cc 95 | #define VE_MPEG_ROT_CHROMA 0x1d0 96 | #define VE_MPEG_SDROT_CTRL 0x1d4 97 | 98 | #define VE_H264_FRAME_SIZE 0x200 99 | #define VE_H264_PIC_HDR 0x204 100 | #define VE_H264_SLICE_HDR 0x208 101 | #define VE_H264_SLICE_HDR2 0x20c 102 | #define VE_H264_PRED_WEIGHT 0x210 103 | #define VE_H264_QP_PARAM 0x21c 104 | #define VE_H264_CTRL 0x220 105 | #define VE_H264_TRIGGER 0x224 106 | #define VE_H264_STATUS 0x228 107 | #define VE_H264_CUR_MB_NUM 0x22c 108 | #define VE_H264_VLD_ADDR 0x230 109 | #define VE_H264_VLD_OFFSET 0x234 110 | #define VE_H264_VLD_LEN 0x238 111 | #define VE_H264_VLD_END 0x23c 112 | #define VE_H264_SDROT_CTRL 0x240 113 | #define VE_H264_SDROT_LUMA 0x244 114 | #define VE_H264_SDROT_CHROMA 0x248 115 | #define VE_H264_OUTPUT_FRAME_IDX 0x24c 116 | #define VE_H264_EXTRA_BUFFER1 0x250 117 | #define VE_H264_EXTRA_BUFFER2 0x254 118 | #define VE_H264_BASIC_BITS 0x2dc 119 | #define VE_H264_RAM_WRITE_PTR 0x2e0 120 | #define VE_H264_RAM_WRITE_DATA 0x2e4 121 | 122 | #define VE_SRAM_H264_PRED_WEIGHT_TABLE 0x000 123 | #define VE_SRAM_H264_FRAMEBUFFER_LIST 0x400 124 | #define VE_SRAM_H264_REF_LIST0 0x640 125 | #define VE_SRAM_H264_REF_LIST1 0x664 126 | #define VE_SRAM_H264_SCALING_LISTS 0x800 127 | 128 | #define VE_HEVC_NAL_HDR 0x500 129 | #define VE_HEVC_SPS 0x504 130 | #define VE_HEVC_PIC_SIZE 0x508 131 | #define VE_HEVC_PCM_HDR 0x50c 132 | #define VE_HEVC_PPS0 0x510 133 | #define VE_HEVC_PPS1 0x514 134 | #define VE_HEVC_SLICE_HDR0 0x520 135 | #define VE_HEVC_SLICE_HDR1 0x524 136 | #define VE_HEVC_SLICE_HDR2 0x528 137 | #define VE_HEVC_CTB_ADDR 0x52c 138 | #define VE_HEVC_CTRL 0x530 139 | #define VE_HEVC_TRIG 0x534 140 | #define VE_HEVC_STATUS 0x538 141 | #define VE_HEVC_CTU_NUM 0x53c 142 | #define VE_HEVC_BITS_ADDR 0x540 143 | #define VE_HEVC_BITS_OFFSET 0x544 144 | #define VE_HEVC_BITS_LEN 0x548 145 | #define VE_HEVC_BITS_END_ADDR 0x54c 146 | #define VE_HEVC_REC_BUF_IDX 0x55c 147 | #define VE_HEVC_NEIGHBOR_INFO_ADDR 0x560 148 | #define VE_HEVC_TILE_LIST_ADDR 0x564 149 | #define VE_HEVC_TILE_START_CTB 0x568 150 | #define VE_HEVC_TILE_END_CTB 0x56c 151 | #define VE_HEVC_BITS_DATA 0x5dc 152 | #define VE_HEVC_SRAM_ADDR 0x5e0 153 | #define VE_HEVC_SRAM_DATA 0x5e4 154 | 155 | #define VE_SRAM_HEVC_PRED_WEIGHT_LUMA_L0 0x000 156 | #define VE_SRAM_HEVC_PRED_WEIGHT_CHROMA_L0 0x020 157 | #define VE_SRAM_HEVC_PRED_WEIGHT_LUMA_L1 0x060 158 | #define VE_SRAM_HEVC_PRED_WEIGHT_CHROMA_L1 0x080 159 | #define VE_SRAM_HEVG_PIC_LIST 0x400 160 | #define VE_SRAM_HEVC_REF_PIC_LIST0 0xc00 161 | #define VE_SRAM_HEVC_REF_PIC_LIST1 0xc10 162 | 163 | #define VE_ISP_INPUT_SIZE 0xa00 164 | #define VE_ISP_INPUT_STRIDE 0xa04 165 | #define VE_ISP_CTRL 0xa08 166 | #define VE_ISP_INPUT_LUMA 0xa78 167 | #define VE_ISP_INPUT_CHROMA 0xa7c 168 | 169 | #define VE_AVC_PARAM 0xb04 170 | #define VE_AVC_QP 0xb08 171 | #define VE_AVC_MOTION_EST 0xb10 172 | #define VE_AVC_CTRL 0xb14 173 | #define VE_AVC_TRIGGER 0xb18 174 | #define VE_AVC_STATUS 0xb1c 175 | #define VE_AVC_BASIC_BITS 0xb20 176 | #define VE_AVC_UNK_BUF 0xb60 177 | #define VE_AVC_VLE_ADDR 0xb80 178 | #define VE_AVC_VLE_END 0xb84 179 | #define VE_AVC_VLE_OFFSET 0xb88 180 | #define VE_AVC_VLE_MAX 0xb8c 181 | #define VE_AVC_VLE_LENGTH 0xb90 182 | #define VE_AVC_REF_LUMA 0xba0 183 | #define VE_AVC_REF_CHROMA 0xba4 184 | #define VE_AVC_REC_LUMA 0xbb0 185 | #define VE_AVC_REC_CHROMA 0xbb4 186 | #define VE_AVC_REF_SLUMA 0xbb8 187 | #define VE_AVC_REC_SLUMA 0xbbc 188 | #define VE_AVC_MB_INFO 0xbc0 189 | 190 | 191 | #endif 192 | -------------------------------------------------------------------------------- /common/ve.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2014 Jens Kuske 3 | * 4 | * This library is free software; you can redistribute it and/or 5 | * modify it under the terms of the GNU Lesser General Public 6 | * License as published by the Free Software Foundation; either 7 | * version 2.1 of the License, or (at your option) any later version. 8 | * 9 | * This library is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 | * Lesser General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU Lesser General Public 15 | * License along with this library; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 17 | * 18 | */ 19 | 20 | #include 21 | #include 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include "ve.h" 29 | 30 | #define DEVICE "/dev/cedar_dev" 31 | #define PAGE_OFFSET (0xc0000000) // from kernel 32 | #define PAGE_SIZE (4096) 33 | 34 | enum IOCTL_CMD 35 | { 36 | IOCTL_UNKOWN = 0x100, 37 | IOCTL_GET_ENV_INFO, 38 | IOCTL_WAIT_VE, 39 | IOCTL_RESET_VE, 40 | IOCTL_ENABLE_VE, 41 | IOCTL_DISABLE_VE, 42 | IOCTL_SET_VE_FREQ, 43 | 44 | IOCTL_CONFIG_AVS2 = 0x200, 45 | IOCTL_GETVALUE_AVS2 , 46 | IOCTL_PAUSE_AVS2 , 47 | IOCTL_START_AVS2 , 48 | IOCTL_RESET_AVS2 , 49 | IOCTL_ADJUST_AVS2, 50 | IOCTL_ENGINE_REQ, 51 | IOCTL_ENGINE_REL, 52 | IOCTL_ENGINE_CHECK_DELAY, 53 | IOCTL_GET_IC_VER, 54 | IOCTL_ADJUST_AVS2_ABS, 55 | IOCTL_FLUSH_CACHE 56 | }; 57 | 58 | struct ve_info 59 | { 60 | uint32_t reserved_mem; 61 | int reserved_mem_size; 62 | uint32_t registers; 63 | }; 64 | 65 | struct cedarv_cache_range 66 | { 67 | long start; 68 | long end; 69 | }; 70 | 71 | struct memchunk_t 72 | { 73 | uint32_t phys_addr; 74 | int size; 75 | void *virt_addr; 76 | struct memchunk_t *next; 77 | }; 78 | 79 | static struct 80 | { 81 | int fd; 82 | void *regs; 83 | int version; 84 | struct memchunk_t first_memchunk; 85 | pthread_rwlock_t memory_lock; 86 | pthread_mutex_t device_lock; 87 | } ve = { .fd = -1, .memory_lock = PTHREAD_RWLOCK_INITIALIZER, .device_lock = PTHREAD_MUTEX_INITIALIZER }; 88 | 89 | int ve_open(void) 90 | { 91 | if (ve.fd != -1) 92 | return 0; 93 | 94 | struct ve_info info; 95 | 96 | ve.fd = open(DEVICE, O_RDWR); 97 | if (ve.fd == -1) 98 | return 0; 99 | 100 | if (ioctl(ve.fd, IOCTL_GET_ENV_INFO, (void *)(&info)) == -1) 101 | goto err; 102 | 103 | ve.regs = mmap(NULL, 0x800, PROT_READ | PROT_WRITE, MAP_SHARED, ve.fd, info.registers); 104 | if (ve.regs == MAP_FAILED) 105 | goto err; 106 | 107 | ve.first_memchunk.phys_addr = info.reserved_mem - PAGE_OFFSET; 108 | ve.first_memchunk.size = info.reserved_mem_size; 109 | 110 | ioctl(ve.fd, IOCTL_ENGINE_REQ, 0); 111 | ioctl(ve.fd, IOCTL_ENABLE_VE, 0); 112 | ioctl(ve.fd, IOCTL_SET_VE_FREQ, 320); 113 | ioctl(ve.fd, IOCTL_RESET_VE, 0); 114 | 115 | writel(0x00130007, ve.regs + VE_CTRL); 116 | 117 | ve.version = readl(ve.regs + VE_VERSION) >> 16; 118 | printf("[VDPAU SUNXI] VE version 0x%04x opened.\n", ve.version); 119 | 120 | return 1; 121 | 122 | err: 123 | close(ve.fd); 124 | ve.fd = -1; 125 | return 0; 126 | } 127 | 128 | void ve_close(void) 129 | { 130 | if (ve.fd == -1) 131 | return; 132 | 133 | ioctl(ve.fd, IOCTL_DISABLE_VE, 0); 134 | ioctl(ve.fd, IOCTL_ENGINE_REL, 0); 135 | 136 | munmap(ve.regs, 0x800); 137 | ve.regs = NULL; 138 | 139 | close(ve.fd); 140 | ve.fd = -1; 141 | } 142 | 143 | int ve_get_version(void) 144 | { 145 | return ve.version; 146 | } 147 | 148 | int ve_wait(int timeout) 149 | { 150 | if (ve.fd == -1) 151 | return 0; 152 | 153 | return ioctl(ve.fd, IOCTL_WAIT_VE, timeout); 154 | } 155 | 156 | void *ve_get(int engine, uint32_t flags) 157 | { 158 | if (pthread_mutex_lock(&ve.device_lock)) 159 | return NULL; 160 | 161 | writel(0x00130000 | (engine & 0xf) | (flags & ~0xf), ve.regs + VE_CTRL); 162 | 163 | return ve.regs; 164 | } 165 | 166 | void ve_put(void) 167 | { 168 | writel(0x00130007, ve.regs + VE_CTRL); 169 | pthread_mutex_unlock(&ve.device_lock); 170 | } 171 | 172 | void *ve_malloc(int size) 173 | { 174 | if (ve.fd == -1) 175 | return NULL; 176 | 177 | if (pthread_rwlock_wrlock(&ve.memory_lock)) 178 | return NULL; 179 | 180 | void *addr = NULL; 181 | 182 | size = (size + PAGE_SIZE - 1) & ~(PAGE_SIZE - 1); 183 | struct memchunk_t *c, *best_chunk = NULL; 184 | for (c = &ve.first_memchunk; c != NULL; c = c->next) 185 | { 186 | if(c->virt_addr == NULL && c->size >= size) 187 | { 188 | if (best_chunk == NULL || c->size < best_chunk->size) 189 | best_chunk = c; 190 | 191 | if (c->size == size) 192 | break; 193 | } 194 | } 195 | 196 | if (!best_chunk) 197 | goto out; 198 | 199 | int left_size = best_chunk->size - size; 200 | 201 | addr = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, ve.fd, best_chunk->phys_addr + PAGE_OFFSET); 202 | if (addr == MAP_FAILED) 203 | { 204 | addr = NULL; 205 | goto out; 206 | } 207 | 208 | best_chunk->virt_addr = addr; 209 | best_chunk->size = size; 210 | 211 | if (left_size > 0) 212 | { 213 | c = malloc(sizeof(struct memchunk_t)); 214 | c->phys_addr = best_chunk->phys_addr + size; 215 | c->size = left_size; 216 | c->virt_addr = NULL; 217 | c->next = best_chunk->next; 218 | best_chunk->next = c; 219 | } 220 | 221 | out: 222 | pthread_rwlock_unlock(&ve.memory_lock); 223 | return addr; 224 | } 225 | 226 | void ve_free(void *ptr) 227 | { 228 | if (ve.fd == -1) 229 | return; 230 | 231 | if (ptr == NULL) 232 | return; 233 | 234 | if (pthread_rwlock_wrlock(&ve.memory_lock)) 235 | return; 236 | 237 | struct memchunk_t *c; 238 | for (c = &ve.first_memchunk; c != NULL; c = c->next) 239 | { 240 | if (c->virt_addr == ptr) 241 | { 242 | munmap(ptr, c->size); 243 | c->virt_addr = NULL; 244 | break; 245 | } 246 | } 247 | 248 | for (c = &ve.first_memchunk; c != NULL; c = c->next) 249 | { 250 | if (c->virt_addr == NULL) 251 | { 252 | while (c->next != NULL && c->next->virt_addr == NULL) 253 | { 254 | struct memchunk_t *n = c->next; 255 | c->size += n->size; 256 | c->next = n->next; 257 | free(n); 258 | } 259 | } 260 | } 261 | 262 | pthread_rwlock_unlock(&ve.memory_lock); 263 | } 264 | 265 | uint32_t ve_virt2phys(void *ptr) 266 | { 267 | if (ve.fd == -1) 268 | return 0; 269 | 270 | if (pthread_rwlock_rdlock(&ve.memory_lock)) 271 | return 0; 272 | 273 | uint32_t addr = 0; 274 | 275 | struct memchunk_t *c; 276 | for (c = &ve.first_memchunk; c != NULL; c = c->next) 277 | { 278 | if (c->virt_addr == NULL) 279 | continue; 280 | 281 | if (c->virt_addr == ptr) 282 | { 283 | addr = c->phys_addr; 284 | break; 285 | } 286 | else if (ptr > c->virt_addr && ptr < (c->virt_addr + c->size)) 287 | { 288 | addr = c->phys_addr + (ptr - c->virt_addr); 289 | break; 290 | } 291 | } 292 | 293 | pthread_rwlock_unlock(&ve.memory_lock); 294 | return addr; 295 | } 296 | 297 | void ve_flush_cache(void *start, int len) 298 | { 299 | if (ve.fd == -1) 300 | return; 301 | 302 | struct cedarv_cache_range range = 303 | { 304 | .start = (int)start, 305 | .end = (int)(start + len) 306 | }; 307 | 308 | ioctl(ve.fd, IOCTL_FLUSH_CACHE, (void*)(&range)); 309 | } 310 | -------------------------------------------------------------------------------- /common_ion/kernel-headers/g2d_driver.h: -------------------------------------------------------------------------------- 1 | /* g2d_driver.h 2 | * 3 | * Copyright (c) 2011 xxxx Electronics 4 | * 2011 Yupu Tang 5 | * 6 | * @ F23 G2D driver 7 | * 8 | * This program is free software; you can redistribute it and/or modify 9 | * it under the terms of the GNU General Public License as published by 10 | * the Free Software Foundation; either version 2 of the License, or 11 | * (at your option) any later version. 12 | * 13 | * This program is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the 16 | * GNU General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU General Public License 19 | * along with this program; if not, write to the Free Software 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA02111-1307USA 21 | */ 22 | 23 | #ifndef __G2D_DRIVER_H 24 | #define __G2D_DRIVER_H 25 | 26 | #ifndef __G2D_BSP_DRV_H 27 | #define __G2D_BSP_DRV_H 28 | 29 | #define __s32 int 30 | #define __u32 unsigned int 31 | 32 | /* mixer data format */ 33 | typedef enum { 34 | /* share data format */ 35 | G2D_FMT_ARGB_AYUV8888 = (0x0), 36 | G2D_FMT_BGRA_VUYA8888 = (0x1), 37 | G2D_FMT_ABGR_AVUY8888 = (0x2), 38 | G2D_FMT_RGBA_YUVA8888 = (0x3), 39 | 40 | G2D_FMT_XRGB8888 = (0x4), 41 | G2D_FMT_BGRX8888 = (0x5), 42 | G2D_FMT_XBGR8888 = (0x6), 43 | G2D_FMT_RGBX8888 = (0x7), 44 | 45 | G2D_FMT_ARGB4444 = (0x8), 46 | G2D_FMT_ABGR4444 = (0x9), 47 | G2D_FMT_RGBA4444 = (0xA), 48 | G2D_FMT_BGRA4444 = (0xB), 49 | 50 | G2D_FMT_ARGB1555 = (0xC), 51 | G2D_FMT_ABGR1555 = (0xD), 52 | G2D_FMT_RGBA5551 = (0xE), 53 | G2D_FMT_BGRA5551 = (0xF), 54 | 55 | G2D_FMT_RGB565 = (0x10), 56 | G2D_FMT_BGR565 = (0x11), 57 | 58 | G2D_FMT_IYUV422 = (0x12), 59 | 60 | G2D_FMT_8BPP_MONO = (0x13), 61 | G2D_FMT_4BPP_MONO = (0x14), 62 | G2D_FMT_2BPP_MONO = (0x15), 63 | G2D_FMT_1BPP_MONO = (0x16), 64 | 65 | G2D_FMT_PYUV422UVC = (0x17), 66 | G2D_FMT_PYUV420UVC = (0x18), 67 | G2D_FMT_PYUV411UVC = (0x19), 68 | 69 | /* just for output format */ 70 | G2D_FMT_PYUV422 = (0x1A), 71 | G2D_FMT_PYUV420 = (0x1B), 72 | G2D_FMT_PYUV411 = (0x1C), 73 | 74 | /* just for input format */ 75 | G2D_FMT_8BPP_PALETTE = (0x1D), 76 | G2D_FMT_4BPP_PALETTE = (0x1E), 77 | G2D_FMT_2BPP_PALETTE = (0x1F), 78 | G2D_FMT_1BPP_PALETTE = (0x20), 79 | 80 | }g2d_data_fmt; 81 | 82 | /* pixel sequence in double word */ 83 | typedef enum { 84 | G2D_SEQ_NORMAL = 0x0, 85 | 86 | /* for interleaved yuv422 */ 87 | G2D_SEQ_VYUY = 0x1, /* pixel 0在低16位 */ 88 | G2D_SEQ_YVYU = 0x2, /* pixel 1在低16位 */ 89 | 90 | /* for uv_combined yuv420 */ 91 | G2D_SEQ_VUVU = 0x3, 92 | 93 | /* for 16bpp rgb */ 94 | G2D_SEQ_P10 = 0x4, /* pixel 0在低16位 */ 95 | G2D_SEQ_P01 = 0x5, /* pixel 1在低16位 */ 96 | 97 | /* planar format or 8bpp rgb */ 98 | G2D_SEQ_P3210 = 0x6, /* pixel 0在低8位 */ 99 | G2D_SEQ_P0123 = 0x7, /* pixel 3在低8位 */ 100 | 101 | /* for 4bpp rgb */ 102 | G2D_SEQ_P76543210 = 0x8, /* 7,6,5,4,3,2,1,0 */ 103 | G2D_SEQ_P67452301 = 0x9, /* 6,7,4,5,2,3,0,1 */ 104 | G2D_SEQ_P10325476 = 0xA, /* 1,0,3,2,5,4,7,6 */ 105 | G2D_SEQ_P01234567 = 0xB, /* 0,1,2,3,4,5,6,7 */ 106 | 107 | /* for 2bpp rgb */ 108 | G2D_SEQ_2BPP_BIG_BIG = 0xC, /* 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0 */ 109 | G2D_SEQ_2BPP_BIG_LITTER = 0xD, /* 12,13,14,15,8,9,10,11,4,5,6,7,0,1,2,3 */ 110 | G2D_SEQ_2BPP_LITTER_BIG = 0xE, /* 3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12 */ 111 | G2D_SEQ_2BPP_LITTER_LITTER = 0xF, /* 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 */ 112 | 113 | /* for 1bpp rgb */ 114 | G2D_SEQ_1BPP_BIG_BIG = 0x10, /* 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0 */ 115 | G2D_SEQ_1BPP_BIG_LITTER = 0x11, /* 24,25,26,27,28,29,30,31,16,17,18,19,20,21,22,23,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7 */ 116 | G2D_SEQ_1BPP_LITTER_BIG = 0x12, /* 7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24 */ 117 | G2D_SEQ_1BPP_LITTER_LITTER = 0x13, /* 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 */ 118 | }g2d_pixel_seq; 119 | 120 | 121 | typedef enum { 122 | G2D_FIL_NONE = 0x00000000, 123 | G2D_FIL_PIXEL_ALPHA = 0x00000001, 124 | G2D_FIL_PLANE_ALPHA = 0x00000002, 125 | G2D_FIL_MULTI_ALPHA = 0x00000004, 126 | }g2d_fillrect_flags; 127 | 128 | typedef enum { 129 | 130 | G2D_BLT_NONE = 0x00000000, 131 | G2D_BLT_PIXEL_ALPHA = 0x00000001, 132 | G2D_BLT_PLANE_ALPHA = 0x00000002, 133 | G2D_BLT_MULTI_ALPHA = 0x00000004, 134 | G2D_BLT_SRC_COLORKEY = 0x00000008, 135 | G2D_BLT_DST_COLORKEY = 0x00000010, 136 | G2D_BLT_FLIP_HORIZONTAL = 0x00000020, 137 | G2D_BLT_FLIP_VERTICAL = 0x00000040, 138 | G2D_BLT_ROTATE90 = 0x00000080, 139 | G2D_BLT_ROTATE180 = 0x00000100, 140 | G2D_BLT_ROTATE270 = 0x00000200, 141 | G2D_BLT_MIRROR45 = 0x00000400, 142 | G2D_BLT_MIRROR135 = 0x00000800, 143 | }g2d_blt_flags; 144 | 145 | /* flip rectangle struct */ 146 | typedef struct { 147 | __s32 x; /* left top point coordinate x */ 148 | __s32 y; /* left top point coordinate y */ 149 | __u32 w; /* rectangle width */ 150 | __u32 h; /* rectangle height */ 151 | }g2d_rect; 152 | 153 | /* image struct */ 154 | typedef struct { 155 | __u32 addr[3]; /* base addr of image frame buffer in byte */ 156 | __u32 w; /* width of image frame buffer in pixel */ 157 | __u32 h; /* height of image frame buffer in pixel */ 158 | g2d_data_fmt format; /* pixel format of image frame buffer */ 159 | g2d_pixel_seq pixel_seq; /* pixel sequence of image frame buffer */ 160 | }g2d_image; 161 | 162 | typedef struct { 163 | g2d_fillrect_flags flag; 164 | g2d_image dst_image; 165 | g2d_rect dst_rect; 166 | 167 | __u32 color; /* fill color */ 168 | __u32 alpha; /* plane alpha value */ 169 | 170 | }g2d_fillrect; 171 | 172 | typedef struct { 173 | g2d_blt_flags flag; 174 | g2d_image src_image; 175 | g2d_rect src_rect; 176 | 177 | g2d_image dst_image; 178 | __s32 dst_x; /* left top point coordinate x of dst rect */ 179 | __s32 dst_y; /* left top point coordinate y of dst rect */ 180 | 181 | __u32 color; /* colorkey color */ 182 | __u32 alpha; /* plane alpha value */ 183 | 184 | }g2d_blt; 185 | 186 | typedef struct { 187 | g2d_blt_flags flag; 188 | g2d_image src_image; 189 | g2d_rect src_rect; 190 | 191 | g2d_image dst_image; 192 | g2d_rect dst_rect; 193 | 194 | __u32 color; /* colorkey color */ 195 | __u32 alpha; /* plane alpha value */ 196 | 197 | }g2d_stretchblt; 198 | 199 | typedef struct { 200 | __u32 flag; /* 光栅操作码 */ 201 | g2d_image dst_image; 202 | g2d_rect dst_rect; 203 | 204 | g2d_image src_image; 205 | __u32 src_x; 206 | __u32 src_y; 207 | 208 | g2d_image mask_image; 209 | __u32 mask_x; 210 | __u32 mask_y; 211 | 212 | }g2d_maskblt; 213 | 214 | typedef struct { 215 | __u32 *pbuffer; 216 | __u32 size; 217 | 218 | }g2d_palette; 219 | 220 | #endif /*__G2D_BSP_DRV_H*/ 221 | 222 | typedef enum 223 | { 224 | G2D_CMD_BITBLT = 0x50, 225 | G2D_CMD_FILLRECT = 0x51, 226 | G2D_CMD_STRETCHBLT = 0x52, 227 | G2D_CMD_PALETTE_TBL = 0x53, 228 | 229 | G2D_CMD_MEM_REQUEST = 0x59, 230 | G2D_CMD_MEM_RELEASE = 0x5A, 231 | G2D_CMD_MEM_GETADR = 0x5B, 232 | G2D_CMD_MEM_SELIDX = 0x5C, 233 | }g2d_cmd; 234 | 235 | #endif /* __G2D_DRIVER_H */ 236 | 237 | -------------------------------------------------------------------------------- /common_ion/ve.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2014 Jens Kuske 3 | * 4 | * This library is free software; you can redistribute it and/or 5 | * modify it under the terms of the GNU Lesser General Public 6 | * License as published by the Free Software Foundation; either 7 | * version 2.1 of the License, or (at your option) any later version. 8 | * 9 | * This library is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 | * Lesser General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU Lesser General Public 15 | * License along with this library; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 17 | * 18 | */ 19 | 20 | #include 21 | #include 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | #include "ve.h" 30 | #include "kernel-headers/ion.h" 31 | #include "kernel-headers/ion_sunxi.h" 32 | #include "kernel-headers/cedar_ve.h" 33 | 34 | #define DEVICE "/dev/cedar_dev" 35 | #define PAGE_OFFSET (0xc0000000) // from kernel 36 | #define PAGE_SIZE (4096) 37 | 38 | #define container_of(ptr, type, member) ({ \ 39 | const typeof( ((type *)0)->member ) *__mptr = (ptr); \ 40 | (type *)( (char *)__mptr - offsetof(type,member) );}) 41 | 42 | struct memchunk_t 43 | { 44 | struct ve_mem mem; 45 | struct memchunk_t *next; 46 | }; 47 | 48 | struct ion_mem 49 | { 50 | struct ion_handle *handle; 51 | int fd; 52 | struct ve_mem mem; 53 | }; 54 | 55 | static struct 56 | { 57 | int fd; 58 | int ion_fd; 59 | void *regs; 60 | int version; 61 | struct memchunk_t first_memchunk; 62 | pthread_rwlock_t memory_lock; 63 | pthread_mutex_t device_lock; 64 | } ve = { .fd = -1, .ion_fd = -1, .memory_lock = PTHREAD_RWLOCK_INITIALIZER, .device_lock = PTHREAD_MUTEX_INITIALIZER }; 65 | 66 | 67 | struct mem_list { 68 | struct ve_mem *mem; 69 | struct mem_list *next; 70 | } *memlist = NULL; 71 | 72 | void memlist_add(struct ve_mem *mem) { 73 | struct mem_list *m, *k; 74 | if (memlist == NULL) { 75 | memlist = (struct mem_list *)malloc(sizeof (struct mem_list)); 76 | memlist->mem = mem; 77 | memlist->next = NULL; 78 | return; 79 | } 80 | m = k = memlist; 81 | while (m) { 82 | k = m; 83 | m = m->next; 84 | } 85 | m = (struct mem_list *)malloc(sizeof (struct mem_list)); 86 | m->mem = mem; 87 | m->next = NULL; 88 | k->next = m; 89 | } 90 | 91 | struct mem_list *memlist_find(struct ve_mem *mem) { 92 | struct mem_list *m = memlist; 93 | 94 | while (m) { 95 | if (m->mem == mem) return m; 96 | m = m->next; 97 | } 98 | return NULL; 99 | } 100 | 101 | int memlist_del(struct ve_mem *mem) { 102 | struct mem_list *m = memlist; 103 | struct mem_list *prev = m; 104 | 105 | while (m) { 106 | if (m->mem == mem) { 107 | prev->next = m->next; 108 | free(m); 109 | return 0; 110 | } 111 | prev = m; 112 | m = m->next; 113 | } 114 | return -1; 115 | } 116 | 117 | void memlist_del_all() { 118 | struct mem_list *m = memlist; 119 | 120 | while (m) { 121 | struct mem_list *k = m; 122 | m = m->next; 123 | free(k); 124 | } 125 | memlist = NULL; 126 | } 127 | 128 | int ve_open(void) 129 | { 130 | if (ve.fd != -1) 131 | return 0; 132 | 133 | struct cedarv_env_infomation info; 134 | 135 | ve.fd = open(DEVICE, O_RDWR); 136 | if (ve.fd == -1) 137 | return 0; 138 | 139 | if (ioctl(ve.fd, IOCTL_GET_ENV_INFO, (void *)(&info)) == -1) 140 | goto close; 141 | 142 | ve.regs = mmap(NULL, 0x800, PROT_READ | PROT_WRITE, MAP_SHARED, ve.fd, info.address_macc); 143 | if (ve.regs == MAP_FAILED) 144 | goto close; 145 | 146 | ve.first_memchunk.mem.phys = info.phymem_start - PAGE_OFFSET; 147 | ve.first_memchunk.mem.size = info.phymem_total_size; 148 | 149 | if (ve.first_memchunk.mem.size == 0) 150 | { 151 | ve.ion_fd = open("/dev/ion", O_RDONLY); 152 | if (ve.ion_fd == -1) 153 | goto unmap; 154 | } 155 | 156 | ioctl(ve.fd, IOCTL_ENGINE_REQ, 0); 157 | ioctl(ve.fd, IOCTL_ENABLE_VE, 0); 158 | ioctl(ve.fd, IOCTL_SET_VE_FREQ, 320); 159 | ioctl(ve.fd, IOCTL_RESET_VE, 0); 160 | 161 | writel(0x00130007, ve.regs + VE_CTRL); 162 | 163 | ve.version = readl(ve.regs + VE_VERSION) >> 16; 164 | printf("[VDPAU SUNXI] VE version 0x%04x opened.\n", ve.version); 165 | 166 | return 1; 167 | 168 | unmap: 169 | munmap(ve.regs, 0x800); 170 | close: 171 | close(ve.fd); 172 | ve.fd = -1; 173 | return 0; 174 | } 175 | 176 | void ve_close(void) 177 | { 178 | if (ve.fd == -1) 179 | return; 180 | 181 | ioctl(ve.fd, IOCTL_DISABLE_VE, 0); 182 | ioctl(ve.fd, IOCTL_ENGINE_REL, 0); 183 | 184 | munmap(ve.regs, 0x800); 185 | ve.regs = NULL; 186 | 187 | if (ve.ion_fd != -1) 188 | close(ve.ion_fd); 189 | 190 | close(ve.fd); 191 | ve.fd = -1; 192 | } 193 | 194 | int ve_get_version(void) 195 | { 196 | return ve.version; 197 | } 198 | 199 | int ve_wait(int timeout) 200 | { 201 | if (ve.fd == -1) 202 | return 0; 203 | if (ve_get_version() >= 0x1633) 204 | return ioctl(ve.fd, IOCTL_WAIT_VE_EN, timeout); 205 | else 206 | return ioctl(ve.fd, IOCTL_WAIT_VE_DE, timeout); 207 | } 208 | 209 | void *ve_get(int engine, uint32_t flags) 210 | { 211 | if (pthread_mutex_lock(&ve.device_lock)) 212 | return NULL; 213 | if (ve_get_version() >= 0x1633) 214 | writel(0x001300C0 | (engine & 0xf) | (flags & ~0xf), ve.regs + VE_CTRL); 215 | else 216 | writel(0x00130000 | (engine & 0xf) | (flags & ~0xf), ve.regs + VE_CTRL); 217 | 218 | return ve.regs; 219 | } 220 | 221 | void ve_put(void) 222 | { 223 | writel(0x00130007, ve.regs + VE_CTRL); 224 | pthread_mutex_unlock(&ve.device_lock); 225 | } 226 | 227 | static struct ve_mem *ion_malloc(int size) 228 | { 229 | struct ion_mem *imem = calloc(1, sizeof(struct ion_mem)); 230 | if (!imem) 231 | { 232 | perror("calloc ion_buffer failed"); 233 | return NULL; 234 | } 235 | 236 | struct ion_allocation_data alloc = { 237 | .len = size, 238 | .align = 4096, 239 | .heap_id_mask = ION_HEAP_TYPE_DMA, 240 | .flags = ION_FLAG_CACHED | ION_FLAG_CACHED_NEEDS_SYNC, 241 | }; 242 | 243 | if (ioctl(ve.ion_fd, ION_IOC_ALLOC, &alloc)) 244 | { 245 | perror("ION_IOC_ALLOC failed"); 246 | free(imem); 247 | return NULL; 248 | } 249 | 250 | imem->handle = alloc.handle; 251 | imem->mem.size = size; 252 | 253 | struct ion_fd_data map = { 254 | .handle = imem->handle, 255 | }; 256 | 257 | if (ioctl(ve.ion_fd, ION_IOC_MAP, &map)) 258 | { 259 | perror("ION_IOC_MAP failed"); 260 | free(imem); 261 | return NULL; 262 | } 263 | 264 | imem->fd = map.fd; 265 | 266 | imem->mem.virt = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, imem->fd, 0); 267 | if (imem->mem.virt == MAP_FAILED) 268 | { 269 | perror("mmap failed"); 270 | return NULL; 271 | } 272 | 273 | sunxi_phys_data phys = { 274 | .handle = imem->handle, 275 | }; 276 | 277 | struct ion_custom_data custom = { 278 | .cmd = ION_IOC_SUNXI_PHYS_ADDR, 279 | .arg = (unsigned long)(&phys), 280 | }; 281 | 282 | if (ioctl(ve.ion_fd, ION_IOC_CUSTOM, &custom)) 283 | { 284 | perror("ION_IOC_CUSTOM(SUNXI_PHYS_ADDR) failed"); 285 | free(imem); 286 | return NULL; 287 | } 288 | 289 | imem->mem.phys = phys.phys_addr - 0x40000000; 290 | 291 | memlist_add(&imem->mem); 292 | 293 | return &imem->mem; 294 | } 295 | 296 | struct ve_mem *ve_malloc(int size) 297 | { 298 | if (ve.fd == -1) 299 | return NULL; 300 | 301 | if (ve.ion_fd != -1) 302 | return ion_malloc(size); 303 | 304 | if (pthread_rwlock_wrlock(&ve.memory_lock)) 305 | return NULL; 306 | 307 | void *addr = NULL; 308 | struct ve_mem *ret = NULL; 309 | 310 | size = (size + PAGE_SIZE - 1) & ~(PAGE_SIZE - 1); 311 | struct memchunk_t *c, *best_chunk = NULL; 312 | for (c = &ve.first_memchunk; c != NULL; c = c->next) 313 | { 314 | if(c->mem.virt == NULL && c->mem.size >= size) 315 | { 316 | if (best_chunk == NULL || c->mem.size < best_chunk->mem.size) 317 | best_chunk = c; 318 | 319 | if (c->mem.size == size) 320 | break; 321 | } 322 | } 323 | 324 | if (!best_chunk) 325 | goto out; 326 | 327 | int left_size = best_chunk->mem.size - size; 328 | 329 | addr = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, ve.fd, best_chunk->mem.phys + PAGE_OFFSET); 330 | if (addr == MAP_FAILED) 331 | { 332 | ret = NULL; 333 | goto out; 334 | } 335 | 336 | best_chunk->mem.virt = addr; 337 | best_chunk->mem.size = size; 338 | 339 | if (left_size > 0) 340 | { 341 | c = malloc(sizeof(struct memchunk_t)); 342 | c->mem.phys = best_chunk->mem.phys + size; 343 | c->mem.size = left_size; 344 | c->mem.virt = NULL; 345 | c->next = best_chunk->next; 346 | best_chunk->next = c; 347 | } 348 | 349 | ret = &best_chunk->mem; 350 | out: 351 | pthread_rwlock_unlock(&ve.memory_lock); 352 | return ret; 353 | } 354 | 355 | static void ion_free(struct ve_mem *mem) 356 | { 357 | if (ve.ion_fd == -1 || !mem) 358 | return; 359 | 360 | struct ion_mem *imem = container_of(mem, struct ion_mem, mem); 361 | 362 | if (munmap(mem->virt, mem->size)) 363 | { 364 | perror("munmap failed"); 365 | return; 366 | } 367 | 368 | memlist_del(mem); 369 | 370 | close(imem->fd); 371 | 372 | struct ion_handle_data handle = { 373 | .handle = imem->handle, 374 | }; 375 | 376 | if (ioctl(ve.ion_fd, ION_IOC_FREE, &handle)) 377 | { 378 | perror("ION_IOC_FREE failed"); 379 | free(imem); 380 | return; 381 | } 382 | } 383 | 384 | void ve_free(struct ve_mem *mem) 385 | { 386 | if (ve.fd == -1) 387 | return; 388 | 389 | if (mem == NULL) 390 | return; 391 | 392 | if (ve.ion_fd != -1) 393 | ion_free(mem); 394 | 395 | if (pthread_rwlock_wrlock(&ve.memory_lock)) 396 | return; 397 | 398 | struct memchunk_t *c; 399 | for (c = &ve.first_memchunk; c != NULL; c = c->next) 400 | { 401 | if (&c->mem == mem) 402 | { 403 | munmap(c->mem.virt, c->mem.size); 404 | c->mem.virt = NULL; 405 | break; 406 | } 407 | } 408 | 409 | for (c = &ve.first_memchunk; c != NULL; c = c->next) 410 | { 411 | if (c->mem.virt == NULL) 412 | { 413 | while (c->next != NULL && c->next->mem.virt == NULL) 414 | { 415 | struct memchunk_t *n = c->next; 416 | c->mem.size += n->mem.size; 417 | c->next = n->next; 418 | free(n); 419 | } 420 | } 421 | } 422 | 423 | pthread_rwlock_unlock(&ve.memory_lock); 424 | } 425 | 426 | uint32_t ve_virt2phys(void *ptr) 427 | { 428 | uint32_t addr = 0; 429 | 430 | if (ve.fd == -1) 431 | return 0; 432 | 433 | if (ve.ion_fd != -1) { 434 | 435 | struct mem_list *m = memlist; 436 | 437 | while (m) { 438 | struct ve_mem *mem = m->mem; 439 | if (!mem) { 440 | m = m->next; 441 | continue; 442 | } 443 | 444 | //printf("c->mem: virt 0x%08X, phys 0x%08X, ptr 0x%08X\n", (unsigned int)mem->virt, mem->phys, (unsigned int)ptr); 445 | if (mem->virt == NULL) 446 | continue; 447 | 448 | if (mem->virt == ptr) 449 | { 450 | addr = mem->phys; 451 | break; 452 | } 453 | else if (ptr > mem->virt && ptr < (mem->virt + mem->size)) 454 | { 455 | addr = mem->phys + (ptr - mem->virt); 456 | break; 457 | } 458 | m = m->next; 459 | } 460 | return addr; 461 | } 462 | 463 | 464 | //if (pthread_rwlock_rdlock(&ve.memory_lock)) 465 | // return 0; 466 | 467 | 468 | 469 | struct memchunk_t *c; 470 | for (c = &ve.first_memchunk; c != NULL; c = c->next) 471 | { 472 | printf("c->mem: virt 0x%08X, phys 0x%08X, ptr 0x%08X\n", (unsigned int)c->mem.virt, c->mem.phys, (unsigned int)ptr); 473 | if (c->mem.virt == NULL) 474 | continue; 475 | 476 | if (c->mem.virt == ptr) 477 | { 478 | addr = c->mem.phys; 479 | break; 480 | } 481 | else if (ptr > c->mem.virt && ptr < (c->mem.virt + c->mem.size)) 482 | { 483 | addr = c->mem.phys + (ptr - c->mem.virt); 484 | break; 485 | } 486 | } 487 | 488 | //pthread_rwlock_unlock(&ve.memory_lock); 489 | return addr; 490 | } 491 | 492 | 493 | void ve_flush_cache(struct ve_mem *mem) 494 | { 495 | if (ve.fd == -1) 496 | return; 497 | 498 | if (ve.ion_fd != -1) 499 | { 500 | sunxi_cache_range range = { 501 | .start = (long)mem->virt, 502 | .end = (long)mem->virt + mem->size, 503 | }; 504 | 505 | struct ion_custom_data cache = { 506 | .cmd = ION_IOC_SUNXI_FLUSH_RANGE, 507 | .arg = (unsigned long)(&range), 508 | }; 509 | 510 | if (ioctl(ve.ion_fd, ION_IOC_CUSTOM, &cache)) 511 | perror("ION_IOC_CUSTOM(SUNXI_FLUSH_RANGE) failed"); 512 | } 513 | else 514 | { 515 | struct cedarv_cache_range range = 516 | { 517 | .start = (int)mem->virt, 518 | .end = (int)mem->virt + mem->size 519 | }; 520 | 521 | ioctl(ve.fd, IOCTL_FLUSH_CACHE, (void*)(&range)); 522 | } 523 | } 524 | -------------------------------------------------------------------------------- /common/ve.d: -------------------------------------------------------------------------------- 1 | ../common/ve.o: ../common/ve.c \ 2 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./fcntl.h \ 3 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./features.h \ 4 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/predefs.h \ 5 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/cdefs.h \ 6 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/wordsize.h \ 7 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/gnu/stubs.h \ 8 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/fcntl.h \ 9 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/types.h \ 10 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/types.h \ 11 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/typesizes.h \ 12 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./time.h \ 13 | /usr/local/angstrom/armv7linaro/bin/../lib/gcc/arm-linux-gnueabihf/4.7.3/include/stddef.h \ 14 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./endian.h \ 15 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/endian.h \ 16 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/byteswap.h \ 17 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/select.h \ 18 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/select.h \ 19 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/sigset.h \ 20 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/time.h \ 21 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/sysmacros.h \ 22 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/pthreadtypes.h \ 23 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/stat.h \ 24 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./pthread.h \ 25 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./sched.h \ 26 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/sched.h \ 27 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./xlocale.h \ 28 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/setjmp.h \ 29 | /usr/local/angstrom/armv7linaro/bin/../lib/gcc/arm-linux-gnueabihf/4.7.3/include/stdint.h \ 30 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./stdint.h \ 31 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/wchar.h \ 32 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./stdio.h \ 33 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./libio.h \ 34 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./_G_config.h \ 35 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./wchar.h \ 36 | /usr/local/angstrom/armv7linaro/bin/../lib/gcc/arm-linux-gnueabihf/4.7.3/include/stdarg.h \ 37 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/stdio_lim.h \ 38 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/sys_errlist.h \ 39 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/stdio.h \ 40 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./stdlib.h \ 41 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/waitflags.h \ 42 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/waitstatus.h \ 43 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./alloca.h \ 44 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./unistd.h \ 45 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/posix_opt.h \ 46 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/environments.h \ 47 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/confname.h \ 48 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./getopt.h \ 49 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/ioctl.h \ 50 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/ioctls.h \ 51 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/asm/ioctls.h \ 52 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./asm-generic/ioctls.h \ 53 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./linux/ioctl.h \ 54 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/asm/ioctl.h \ 55 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./asm-generic/ioctl.h \ 56 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/ioctl-types.h \ 57 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/ttydefaults.h \ 58 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/mman.h \ 59 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/mman.h \ 60 | ../common/ve.h 61 | 62 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./fcntl.h: 63 | 64 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./features.h: 65 | 66 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/predefs.h: 67 | 68 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/cdefs.h: 69 | 70 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/wordsize.h: 71 | 72 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/gnu/stubs.h: 73 | 74 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/fcntl.h: 75 | 76 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/types.h: 77 | 78 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/types.h: 79 | 80 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/typesizes.h: 81 | 82 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./time.h: 83 | 84 | /usr/local/angstrom/armv7linaro/bin/../lib/gcc/arm-linux-gnueabihf/4.7.3/include/stddef.h: 85 | 86 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./endian.h: 87 | 88 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/endian.h: 89 | 90 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/byteswap.h: 91 | 92 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/select.h: 93 | 94 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/select.h: 95 | 96 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/sigset.h: 97 | 98 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/time.h: 99 | 100 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/sysmacros.h: 101 | 102 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/pthreadtypes.h: 103 | 104 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/stat.h: 105 | 106 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./pthread.h: 107 | 108 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./sched.h: 109 | 110 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/sched.h: 111 | 112 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./xlocale.h: 113 | 114 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/setjmp.h: 115 | 116 | /usr/local/angstrom/armv7linaro/bin/../lib/gcc/arm-linux-gnueabihf/4.7.3/include/stdint.h: 117 | 118 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./stdint.h: 119 | 120 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/wchar.h: 121 | 122 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./stdio.h: 123 | 124 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./libio.h: 125 | 126 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./_G_config.h: 127 | 128 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./wchar.h: 129 | 130 | /usr/local/angstrom/armv7linaro/bin/../lib/gcc/arm-linux-gnueabihf/4.7.3/include/stdarg.h: 131 | 132 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/stdio_lim.h: 133 | 134 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/sys_errlist.h: 135 | 136 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/stdio.h: 137 | 138 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./stdlib.h: 139 | 140 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/waitflags.h: 141 | 142 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/waitstatus.h: 143 | 144 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./alloca.h: 145 | 146 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./unistd.h: 147 | 148 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/posix_opt.h: 149 | 150 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/environments.h: 151 | 152 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/confname.h: 153 | 154 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./getopt.h: 155 | 156 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/ioctl.h: 157 | 158 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/ioctls.h: 159 | 160 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/asm/ioctls.h: 161 | 162 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./asm-generic/ioctls.h: 163 | 164 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./linux/ioctl.h: 165 | 166 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/asm/ioctl.h: 167 | 168 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/./asm-generic/ioctl.h: 169 | 170 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/ioctl-types.h: 171 | 172 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/ttydefaults.h: 173 | 174 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/sys/mman.h: 175 | 176 | /usr/local/angstrom/armv7linaro/bin/../arm-linux-gnueabihf/libc/usr/include/arm-linux-gnueabihf/bits/mman.h: 177 | 178 | ../common/ve.h: 179 | -------------------------------------------------------------------------------- /common_ion/kernel-headers/ion.h: -------------------------------------------------------------------------------- 1 | /* 2 | * include/linux/ion.h 3 | * 4 | * Copyright (C) 2011 Google, Inc. 5 | * 6 | * This software is licensed under the terms of the GNU General Public 7 | * License version 2, as published by the Free Software Foundation, and 8 | * may be copied, distributed, and modified under those terms. 9 | * 10 | * This program is distributed in the hope that it will be useful, 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | * GNU General Public License for more details. 14 | * 15 | */ 16 | 17 | #ifndef _LINUX_ION_H 18 | #define _LINUX_ION_H 19 | 20 | #include 21 | #include 22 | 23 | struct ion_handle; 24 | /** 25 | * enum ion_heap_types - list of all possible types of heaps 26 | * @ION_HEAP_TYPE_SYSTEM: memory allocated via vmalloc 27 | * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc 28 | * @ION_HEAP_TYPE_CARVEOUT: memory allocated from a prereserved 29 | * carveout heap, allocations are physically 30 | * contiguous 31 | * @ION_HEAP_TYPE_DMA: memory allocated via DMA API 32 | * @ION_NUM_HEAPS: helper for iterating over heaps, a bit mask 33 | * is used to identify the heaps, so only 32 34 | * total heap types are supported 35 | */ 36 | enum ion_heap_type { 37 | ION_HEAP_TYPE_SYSTEM, 38 | ION_HEAP_TYPE_SYSTEM_CONTIG, 39 | ION_HEAP_TYPE_CARVEOUT, 40 | ION_HEAP_TYPE_CHUNK, 41 | ION_HEAP_TYPE_DMA, 42 | ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always 43 | are at the end of this enum */ 44 | ION_NUM_HEAPS = 16, 45 | }; 46 | 47 | #define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM) 48 | #define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG) 49 | #define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT) 50 | #define ION_HEAP_TYPE_DMA_MASK (1 << ION_HEAP_TYPE_DMA) 51 | 52 | #define ION_NUM_HEAP_IDS sizeof(unsigned int) * 8 53 | 54 | /** 55 | * allocation flags - the lower 16 bits are used by core ion, the upper 16 56 | * bits are reserved for use by the heaps themselves. 57 | */ 58 | #define ION_FLAG_CACHED 1 /* mappings of this buffer should be 59 | cached, ion will do cache 60 | maintenance when the buffer is 61 | mapped for dma */ 62 | #define ION_FLAG_CACHED_NEEDS_SYNC 2 /* mappings of this buffer will created 63 | at mmap time, if this is set 64 | caches must be managed manually */ 65 | 66 | #ifdef __KERNEL__ 67 | struct ion_device; 68 | struct ion_heap; 69 | struct ion_mapper; 70 | struct ion_client; 71 | struct ion_buffer; 72 | 73 | /* This should be removed some day when phys_addr_t's are fully 74 | plumbed in the kernel, and all instances of ion_phys_addr_t should 75 | be converted to phys_addr_t. For the time being many kernel interfaces 76 | do not accept phys_addr_t's that would have to */ 77 | #define ion_phys_addr_t unsigned long 78 | 79 | /** 80 | * struct ion_platform_heap - defines a heap in the given platform 81 | * @type: type of the heap from ion_heap_type enum 82 | * @id: unique identifier for heap. When allocating higher numbers 83 | * will be allocated from first. At allocation these are passed 84 | * as a bit mask and therefore can not exceed ION_NUM_HEAP_IDS. 85 | * @name: used for debug purposes 86 | * @base: base address of heap in physical memory if applicable 87 | * @size: size of the heap in bytes if applicable 88 | * @align: required alignment in physical memory if applicable 89 | * @priv: private info passed from the board file 90 | * 91 | * Provided by the board file. 92 | */ 93 | struct ion_platform_heap { 94 | enum ion_heap_type type; 95 | unsigned int id; 96 | const char *name; 97 | ion_phys_addr_t base; 98 | size_t size; 99 | ion_phys_addr_t align; 100 | void *priv; 101 | }; 102 | 103 | /** 104 | * struct ion_platform_data - array of platform heaps passed from board file 105 | * @nr: number of structures in the array 106 | * @heaps: array of platform_heap structions 107 | * 108 | * Provided by the board file in the form of platform data to a platform device. 109 | */ 110 | struct ion_platform_data { 111 | int nr; 112 | struct ion_platform_heap heaps[]; 113 | }; 114 | 115 | /** 116 | * ion_reserve() - reserve memory for ion heaps if applicable 117 | * @data: platform data specifying starting physical address and 118 | * size 119 | * 120 | * Calls memblock reserve to set aside memory for heaps that are 121 | * located at specific memory addresses or of specfic sizes not 122 | * managed by the kernel 123 | */ 124 | void ion_reserve(struct ion_platform_data *data); 125 | 126 | /** 127 | * ion_client_create() - allocate a client and returns it 128 | * @dev: the global ion device 129 | * @heap_type_mask: mask of heaps this client can allocate from 130 | * @name: used for debugging 131 | */ 132 | struct ion_client *ion_client_create(struct ion_device *dev, 133 | const char *name); 134 | 135 | /** 136 | * ion_client_destroy() - free's a client and all it's handles 137 | * @client: the client 138 | * 139 | * Free the provided client and all it's resources including 140 | * any handles it is holding. 141 | */ 142 | void ion_client_destroy(struct ion_client *client); 143 | 144 | /** 145 | * ion_alloc - allocate ion memory 146 | * @client: the client 147 | * @len: size of the allocation 148 | * @align: requested allocation alignment, lots of hardware blocks 149 | * have alignment requirements of some kind 150 | * @heap_id_mask: mask of heaps to allocate from, if multiple bits are set 151 | * heaps will be tried in order from highest to lowest 152 | * id 153 | * @flags: heap flags, the low 16 bits are consumed by ion, the 154 | * high 16 bits are passed on to the respective heap and 155 | * can be heap custom 156 | * 157 | * Allocate memory in one of the heaps provided in heap mask and return 158 | * an opaque handle to it. 159 | */ 160 | struct ion_handle *ion_alloc(struct ion_client *client, size_t len, 161 | size_t align, unsigned int heap_id_mask, 162 | unsigned int flags); 163 | 164 | /** 165 | * ion_free - free a handle 166 | * @client: the client 167 | * @handle: the handle to free 168 | * 169 | * Free the provided handle. 170 | */ 171 | void ion_free(struct ion_client *client, struct ion_handle *handle); 172 | 173 | /** 174 | * ion_phys - returns the physical address and len of a handle 175 | * @client: the client 176 | * @handle: the handle 177 | * @addr: a pointer to put the address in 178 | * @len: a pointer to put the length in 179 | * 180 | * This function queries the heap for a particular handle to get the 181 | * handle's physical address. It't output is only correct if 182 | * a heap returns physically contiguous memory -- in other cases 183 | * this api should not be implemented -- ion_sg_table should be used 184 | * instead. Returns -EINVAL if the handle is invalid. This has 185 | * no implications on the reference counting of the handle -- 186 | * the returned value may not be valid if the caller is not 187 | * holding a reference. 188 | */ 189 | int ion_phys(struct ion_client *client, struct ion_handle *handle, 190 | ion_phys_addr_t *addr, size_t *len); 191 | 192 | /** 193 | * ion_map_dma - return an sg_table describing a handle 194 | * @client: the client 195 | * @handle: the handle 196 | * 197 | * This function returns the sg_table describing 198 | * a particular ion handle. 199 | */ 200 | struct sg_table *ion_sg_table(struct ion_client *client, 201 | struct ion_handle *handle); 202 | 203 | /** 204 | * ion_map_kernel - create mapping for the given handle 205 | * @client: the client 206 | * @handle: handle to map 207 | * 208 | * Map the given handle into the kernel and return a kernel address that 209 | * can be used to access this address. 210 | */ 211 | void *ion_map_kernel(struct ion_client *client, struct ion_handle *handle); 212 | 213 | /** 214 | * ion_unmap_kernel() - destroy a kernel mapping for a handle 215 | * @client: the client 216 | * @handle: handle to unmap 217 | */ 218 | void ion_unmap_kernel(struct ion_client *client, struct ion_handle *handle); 219 | 220 | /** 221 | * ion_share_dma_buf() - share buffer as dma-buf 222 | * @client: the client 223 | * @handle: the handle 224 | */ 225 | struct dma_buf *ion_share_dma_buf(struct ion_client *client, 226 | struct ion_handle *handle); 227 | 228 | /** 229 | * ion_share_dma_buf_fd() - given an ion client, create a dma-buf fd 230 | * @client: the client 231 | * @handle: the handle 232 | */ 233 | int ion_share_dma_buf_fd(struct ion_client *client, struct ion_handle *handle); 234 | 235 | /** 236 | * ion_import_dma_buf() - given an dma-buf fd from the ion exporter get handle 237 | * @client: the client 238 | * @fd: the dma-buf fd 239 | * 240 | * Given an dma-buf fd that was allocated through ion via ion_share_dma_buf, 241 | * import that fd and return a handle representing it. If a dma-buf from 242 | * another exporter is passed in this function will return ERR_PTR(-EINVAL) 243 | */ 244 | struct ion_handle *ion_import_dma_buf(struct ion_client *client, int fd); 245 | 246 | #endif /* __KERNEL__ */ 247 | 248 | /** 249 | * DOC: Ion Userspace API 250 | * 251 | * create a client by opening /dev/ion 252 | * most operations handled via following ioctls 253 | * 254 | */ 255 | 256 | /** 257 | * struct ion_allocation_data - metadata passed from userspace for allocations 258 | * @len: size of the allocation 259 | * @align: required alignment of the allocation 260 | * @heap_id_mask: mask of heap ids to allocate from 261 | * @flags: flags passed to heap 262 | * @handle: pointer that will be populated with a cookie to use to 263 | * refer to this allocation 264 | * 265 | * Provided by userspace as an argument to the ioctl 266 | */ 267 | struct ion_allocation_data { 268 | size_t len; 269 | size_t align; 270 | unsigned int heap_id_mask; 271 | unsigned int flags; 272 | struct ion_handle *handle; 273 | }; 274 | 275 | /** 276 | * struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair 277 | * @handle: a handle 278 | * @fd: a file descriptor representing that handle 279 | * 280 | * For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with 281 | * the handle returned from ion alloc, and the kernel returns the file 282 | * descriptor to share or map in the fd field. For ION_IOC_IMPORT, userspace 283 | * provides the file descriptor and the kernel returns the handle. 284 | */ 285 | struct ion_fd_data { 286 | struct ion_handle *handle; 287 | int fd; 288 | }; 289 | 290 | /** 291 | * struct ion_handle_data - a handle passed to/from the kernel 292 | * @handle: a handle 293 | */ 294 | struct ion_handle_data { 295 | struct ion_handle *handle; 296 | }; 297 | 298 | /** 299 | * struct ion_custom_data - metadata passed to/from userspace for a custom ioctl 300 | * @cmd: the custom ioctl function to call 301 | * @arg: additional data to pass to the custom ioctl, typically a user 302 | * pointer to a predefined structure 303 | * 304 | * This works just like the regular cmd and arg fields of an ioctl. 305 | */ 306 | struct ion_custom_data { 307 | unsigned int cmd; 308 | unsigned long arg; 309 | }; 310 | 311 | #define ION_IOC_MAGIC 'I' 312 | 313 | /** 314 | * DOC: ION_IOC_ALLOC - allocate memory 315 | * 316 | * Takes an ion_allocation_data struct and returns it with the handle field 317 | * populated with the opaque handle for the allocation. 318 | */ 319 | #define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, \ 320 | struct ion_allocation_data) 321 | 322 | /** 323 | * DOC: ION_IOC_FREE - free memory 324 | * 325 | * Takes an ion_handle_data struct and frees the handle. 326 | */ 327 | #define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data) 328 | 329 | /** 330 | * DOC: ION_IOC_MAP - get a file descriptor to mmap 331 | * 332 | * Takes an ion_fd_data struct with the handle field populated with a valid 333 | * opaque handle. Returns the struct with the fd field set to a file 334 | * descriptor open in the current address space. This file descriptor 335 | * can then be used as an argument to mmap. 336 | */ 337 | #define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data) 338 | 339 | /** 340 | * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation 341 | * 342 | * Takes an ion_fd_data struct with the handle field populated with a valid 343 | * opaque handle. Returns the struct with the fd field set to a file 344 | * descriptor open in the current address space. This file descriptor 345 | * can then be passed to another process. The corresponding opaque handle can 346 | * be retrieved via ION_IOC_IMPORT. 347 | */ 348 | #define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data) 349 | 350 | /** 351 | * DOC: ION_IOC_IMPORT - imports a shared file descriptor 352 | * 353 | * Takes an ion_fd_data struct with the fd field populated with a valid file 354 | * descriptor obtained from ION_IOC_SHARE and returns the struct with the handle 355 | * filed set to the corresponding opaque handle. 356 | */ 357 | #define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data) 358 | 359 | /** 360 | * DOC: ION_IOC_SYNC - syncs a shared file descriptors to memory 361 | * 362 | * Deprecated in favor of using the dma_buf api's correctly (syncing 363 | * will happend automatically when the buffer is mapped to a device). 364 | * If necessary should be used after touching a cached buffer from the cpu, 365 | * this will make the buffer in memory coherent. 366 | */ 367 | #define ION_IOC_SYNC _IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data) 368 | 369 | /** 370 | * DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl 371 | * 372 | * Takes the argument of the architecture specific ioctl to call and 373 | * passes appropriate userdata for that ioctl 374 | */ 375 | #define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data) 376 | 377 | #endif /* _LINUX_ION_H */ 378 | -------------------------------------------------------------------------------- /h264enc/h264enc.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2014-2015 Jens Kuske 3 | * 4 | * This program is free software; you can redistribute it and/or modify 5 | * it under the terms of the GNU General Public License as published by 6 | * the Free Software Foundation; either version 2 of the License, or 7 | * (at your option) any later version. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * GNU General Public License for more details. 13 | * 14 | * You should have received a copy of the GNU General Public License 15 | * along with this program; if not, write to the Free Software 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 17 | * MA 02110-1301, USA. 18 | * 19 | */ 20 | 21 | #include 22 | #include 23 | #include 24 | #include "h264enc.h" 25 | #include "ve.h" 26 | 27 | #define MSG(x) fprintf(stderr, "h264enc: " x "\n") 28 | 29 | #define ALIGN(x, a) (((x) + ((typeof(x))(a) - 1)) & ~((typeof(x))(a) - 1)) 30 | #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) 31 | #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) 32 | 33 | struct h264enc_internal { 34 | unsigned int mb_width, mb_height, mb_stride; 35 | unsigned int crop_right, crop_bottom; 36 | 37 | struct ve_mem *luma_buffer; 38 | struct ve_mem *chroma_buffer; 39 | unsigned int input_buffer_size; 40 | enum color_format input_color_format; 41 | 42 | struct ve_mem *bytestream_buffer; 43 | unsigned int bytestream_buffer_size; 44 | unsigned int bytestream_length; 45 | 46 | struct h264enc_ref_pic { 47 | struct ve_mem *luma_buffer; 48 | struct ve_mem *chroma_buffer; 49 | struct ve_mem *extra_buffer; /* unknown purpose, looks like smaller luma */ 50 | } ref_picture[2]; 51 | 52 | struct ve_mem *extra_buffer_line, *extra_buffer_frame; /* unknown purpose */ 53 | 54 | void *regs; 55 | 56 | unsigned int write_sps_pps; 57 | 58 | unsigned int profile_idc, level_idc, constraints; 59 | 60 | unsigned int entropy_coding_mode_flag; 61 | unsigned int pic_init_qp; 62 | 63 | unsigned int keyframe_interval; 64 | 65 | unsigned int current_frame_num; 66 | enum slice_type { SLICE_P = 0, SLICE_I = 2 } current_slice_type; 67 | 68 | }; 69 | 70 | static void put_bits(void* regs, uint32_t x, int num) 71 | { 72 | writel(x, regs + VE_AVC_BASIC_BITS); 73 | writel(0x1 | ((num & 0x1f) << 8), regs + VE_AVC_TRIGGER); 74 | /* again the problem, how to check for finish? */ 75 | } 76 | 77 | static void put_ue(void* regs, uint32_t x) 78 | { 79 | x++; 80 | put_bits(regs, x, (32 - __builtin_clz(x)) * 2 - 1); 81 | } 82 | 83 | static void put_se(void* regs, int x) 84 | { 85 | x = 2 * x - 1; 86 | x ^= (x >> 31); 87 | put_ue(regs, x); 88 | } 89 | 90 | static void put_start_code(void* regs, unsigned int nal_ref_idc, unsigned int nal_unit_type) 91 | { 92 | uint32_t tmp = readl(regs + VE_AVC_PARAM); 93 | 94 | /* disable emulation_prevention_three_byte */ 95 | writel(tmp | (0x1 << 31), regs + VE_AVC_PARAM); 96 | 97 | put_bits(regs, 0, 24); 98 | put_bits(regs, 0x100 | (nal_ref_idc << 5) | (nal_unit_type << 0), 16); 99 | 100 | writel(tmp, regs + VE_AVC_PARAM); 101 | } 102 | 103 | static void put_rbsp_trailing_bits(void* regs) 104 | { 105 | unsigned int cur_bs_len = readl(regs + VE_AVC_VLE_LENGTH); 106 | 107 | int num_zero_bits = 8 - ((cur_bs_len + 1) & 0x7); 108 | put_bits(regs, 1 << num_zero_bits, num_zero_bits + 1); 109 | } 110 | 111 | static void put_seq_parameter_set(h264enc *c) 112 | { 113 | put_start_code(c->regs, 3, 7); 114 | 115 | put_bits(c->regs, c->profile_idc, 8); 116 | put_bits(c->regs, c->constraints, 8); 117 | put_bits(c->regs, c->level_idc, 8); 118 | 119 | put_ue(c->regs, /* seq_parameter_set_id = */ 0); 120 | 121 | put_ue(c->regs, /* log2_max_frame_num_minus4 = */ 0); 122 | put_ue(c->regs, /* pic_order_cnt_type = */ 2); 123 | 124 | put_ue(c->regs, /* max_num_ref_frames = */ 1); 125 | put_bits(c->regs, /* gaps_in_frame_num_value_allowed_flag = */ 0, 1); 126 | 127 | put_ue(c->regs, c->mb_width - 1); 128 | put_ue(c->regs, c->mb_height - 1); 129 | 130 | put_bits(c->regs, /* frame_mbs_only_flag = */ 1, 1); 131 | 132 | put_bits(c->regs, /* direct_8x8_inference_flag = */ 0, 1); 133 | 134 | unsigned int frame_cropping_flag = c->crop_right || c->crop_bottom; 135 | put_bits(c->regs, frame_cropping_flag, 1); 136 | if (frame_cropping_flag) 137 | { 138 | put_ue(c->regs, 0); 139 | put_ue(c->regs, c->crop_right); 140 | put_ue(c->regs, 0); 141 | put_ue(c->regs, c->crop_bottom); 142 | } 143 | 144 | put_bits(c->regs, /* vui_parameters_present_flag = */ 0, 1); 145 | 146 | put_rbsp_trailing_bits(c->regs); 147 | } 148 | 149 | static void put_pic_parameter_set(h264enc *c) 150 | { 151 | put_start_code(c->regs, 3, 8); 152 | 153 | put_ue(c->regs, /* pic_parameter_set_id = */ 0); 154 | put_ue(c->regs, /* seq_parameter_set_id = */ 0); 155 | 156 | put_bits(c->regs, c->entropy_coding_mode_flag, 1); 157 | 158 | put_bits(c->regs, /* bottom_field_pic_order_in_frame_present_flag = */ 0, 1); 159 | put_ue(c->regs, /* num_slice_groups_minus1 = */ 0); 160 | 161 | put_ue(c->regs, /* num_ref_idx_l0_default_active_minus1 = */ 0); 162 | put_ue(c->regs, /* num_ref_idx_l1_default_active_minus1 = */ 0); 163 | 164 | put_bits(c->regs, /* weighted_pred_flag = */ 0, 1); 165 | put_bits(c->regs, /* weighted_bipred_idc = */ 0, 2); 166 | 167 | put_se(c->regs, (int)c->pic_init_qp - 26); 168 | put_se(c->regs, (int)c->pic_init_qp - 26); 169 | put_se(c->regs, /* chroma_qp_index_offset = */ 4); 170 | 171 | put_bits(c->regs, /* deblocking_filter_control_present_flag = */ 1, 1); 172 | put_bits(c->regs, /* constrained_intra_pred_flag = */ 0, 1); 173 | put_bits(c->regs, /* redundant_pic_cnt_present_flag = */ 0, 1); 174 | 175 | put_rbsp_trailing_bits(c->regs); 176 | } 177 | 178 | static void put_slice_header(h264enc *c) 179 | { 180 | if (c->current_slice_type == SLICE_I) 181 | put_start_code(c->regs, 3, 5); 182 | else 183 | put_start_code(c->regs, 2, 1); 184 | 185 | put_ue(c->regs, /* first_mb_in_slice = */ 0); 186 | put_ue(c->regs, c->current_slice_type); 187 | put_ue(c->regs, /* pic_parameter_set_id = */ 0); 188 | 189 | put_bits(c->regs, c->current_frame_num & 0xf, 4); 190 | 191 | if (c->current_slice_type == SLICE_I) 192 | put_ue(c->regs, /* idr_pic_id = */ 0); 193 | 194 | if (c->current_slice_type == SLICE_P) 195 | { 196 | put_bits(c->regs, /* num_ref_idx_active_override_flag = */ 0, 1); 197 | put_bits(c->regs, /* ref_pic_list_modification_flag_l0 = */ 0, 1); 198 | put_bits(c->regs, /* adaptive_ref_pic_marking_mode_flag = */ 0, 1); 199 | if (c->entropy_coding_mode_flag) 200 | put_ue(c->regs, /* cabac_init_idc = */ 0); 201 | } 202 | 203 | if (c->current_slice_type == SLICE_I) 204 | { 205 | put_bits(c->regs, /* no_output_of_prior_pics_flag = */ 0, 1); 206 | put_bits(c->regs, /* long_term_reference_flag = */ 0, 1); 207 | } 208 | 209 | put_se(c->regs, /* slice_qp_delta = */ 0); 210 | 211 | put_ue(c->regs, /* disable_deblocking_filter_idc = */ 0); 212 | put_se(c->regs, /* slice_alpha_c0_offset_div2 = */ 0); 213 | put_se(c->regs, /* slice_beta_offset_div2 = */ 0); 214 | } 215 | 216 | void h264enc_free(h264enc *c) 217 | { 218 | int i; 219 | 220 | ve_free(c->extra_buffer_line); 221 | ve_free(c->extra_buffer_frame); 222 | for (i = 0; i < 2; i++) 223 | { 224 | ve_free(c->ref_picture[i].luma_buffer); 225 | ve_free(c->ref_picture[i].extra_buffer); 226 | } 227 | ve_free(c->bytestream_buffer); 228 | ve_free(c->luma_buffer); 229 | free(c); 230 | } 231 | 232 | h264enc *h264enc_new(const struct h264enc_params *p) 233 | { 234 | h264enc *c; 235 | int i; 236 | void *a; 237 | struct ve_mem *m; 238 | 239 | /* check parameter validity */ 240 | if (!IS_ALIGNED(p->src_width, 16) || !IS_ALIGNED(p->src_height, 16) || 241 | !IS_ALIGNED(p->width, 2) || !IS_ALIGNED(p->height, 2) || 242 | p->width > p->src_width || p->height > p->src_height) 243 | { 244 | MSG("invalid picture size"); 245 | return NULL; 246 | } 247 | 248 | if (p->qp == 0 || p->qp > 47) 249 | { 250 | MSG("invalid QP"); 251 | return NULL; 252 | } 253 | 254 | if (p->src_format != H264_FMT_NV12 && p->src_format != H264_FMT_NV16) 255 | { 256 | MSG("invalid color format"); 257 | return NULL; 258 | } 259 | 260 | /* allocate memory for h264enc structure */ 261 | c = calloc(1, sizeof(*c)); 262 | if (c == NULL) 263 | { 264 | MSG("can't allocate h264enc data"); 265 | return NULL; 266 | } 267 | 268 | /* copy parameters */ 269 | c->mb_width = DIV_ROUND_UP(p->width, 16); 270 | c->mb_height = DIV_ROUND_UP(p->height, 16); 271 | c->mb_stride = p->src_width / 16; 272 | 273 | c->crop_right = (c->mb_width * 16 - p->width) / 2; 274 | c->crop_bottom = (c->mb_height * 16 - p->height) / 2; 275 | 276 | c->profile_idc = p->profile_idc; 277 | c->level_idc = p->level_idc; 278 | 279 | c->entropy_coding_mode_flag = p->entropy_coding_mode ? 1 : 0; 280 | c->pic_init_qp = p->qp; 281 | c->keyframe_interval = p->keyframe_interval; 282 | 283 | c->write_sps_pps = 1; 284 | c->current_frame_num = 0; 285 | 286 | /* allocate input buffer */ 287 | c->input_color_format = p->src_format; 288 | switch (c->input_color_format) 289 | { 290 | case H264_FMT_NV12: 291 | c->input_buffer_size = p->src_width * (p->src_height + p->src_height / 2); 292 | break; 293 | case H264_FMT_NV16: 294 | c->input_buffer_size = p->src_width * p->src_height * 2; 295 | break; 296 | } 297 | 298 | c->luma_buffer = ve_malloc(c->input_buffer_size); 299 | if (c->luma_buffer == NULL) 300 | goto nomem; 301 | 302 | a = c->luma_buffer->virt + p->src_width * p->src_height; 303 | m = malloc(sizeof(struct ve_mem)); 304 | if (m == NULL) 305 | goto nomem; 306 | 307 | m->virt = a; 308 | m->phys = ve_virt2phys(a); 309 | c->chroma_buffer = m;//c->luma_buffer->virt + p->src_width * p->src_height; 310 | 311 | /* allocate bytestream output buffer */ 312 | c->bytestream_buffer_size = 1 * 1024 * 1024; 313 | c->bytestream_buffer = ve_malloc(c->bytestream_buffer_size); 314 | if (c->bytestream_buffer == NULL) 315 | goto nomem; 316 | 317 | /* allocate reference picture memory */ 318 | unsigned int luma_size = ALIGN(c->mb_width * 16, 32) * ALIGN(c->mb_height * 16, 32); 319 | unsigned int chroma_size = ALIGN(c->mb_width * 16, 32) * ALIGN(c->mb_height * 8, 32); 320 | for (i = 0; i < 2; i++) 321 | { 322 | c->ref_picture[i].luma_buffer = ve_malloc(luma_size + chroma_size); 323 | a = c->ref_picture[i].luma_buffer->virt + luma_size; 324 | m = malloc(sizeof(struct ve_mem)); 325 | if (m == NULL) 326 | goto nomem; 327 | m->virt = a; 328 | m->phys = ve_virt2phys(a); 329 | c->ref_picture[i].chroma_buffer = m;//c->ref_picture[i].luma_buffer->virt + luma_size; 330 | 331 | c->ref_picture[i].extra_buffer = ve_malloc(luma_size / 4); 332 | if (c->ref_picture[i].luma_buffer == NULL || c->ref_picture[i].extra_buffer == NULL) 333 | goto nomem; 334 | } 335 | 336 | /* allocate unknown purpose buffers */ 337 | c->extra_buffer_frame = ve_malloc(ALIGN(c->mb_width, 4) * c->mb_height * 8); 338 | c->extra_buffer_line = ve_malloc(c->mb_width * 32); 339 | if (c->extra_buffer_frame == NULL || c->extra_buffer_line == NULL) 340 | goto nomem; 341 | 342 | return c; 343 | 344 | nomem: 345 | MSG("can't allocate VE memory"); 346 | h264enc_free(c); 347 | return NULL; 348 | } 349 | 350 | void *h264enc_get_input_buffer(const h264enc *c) 351 | { 352 | return c->luma_buffer->virt; 353 | } 354 | 355 | void *h264enc_get_bytestream_buffer(const h264enc *c) 356 | { 357 | return c->bytestream_buffer->virt; 358 | } 359 | 360 | unsigned int h264enc_get_bytestream_length(const h264enc *c) 361 | { 362 | return c->bytestream_length; 363 | } 364 | 365 | int h264enc_encode_picture(h264enc *c) 366 | { 367 | c->current_slice_type = c->current_frame_num ? SLICE_P : SLICE_I; 368 | 369 | c->regs = ve_get(VE_ENGINE_AVC, 0); 370 | 371 | /* flush buffers (output because otherwise we might read old data later) */ 372 | ve_flush_cache(c->bytestream_buffer); 373 | ve_flush_cache(c->luma_buffer); 374 | 375 | /* set output buffer */ 376 | writel(0x0, c->regs + VE_AVC_VLE_OFFSET); 377 | writel(c->bytestream_buffer->phys, c->regs + VE_AVC_VLE_ADDR); 378 | writel(c->bytestream_buffer->phys + c->bytestream_buffer_size - 1, c->regs + VE_AVC_VLE_END); 379 | writel(c->bytestream_buffer_size * 8, c->regs + VE_AVC_VLE_MAX); 380 | 381 | /* write headers */ 382 | if (c->write_sps_pps) 383 | { 384 | put_seq_parameter_set(c); 385 | put_pic_parameter_set(c); 386 | c->write_sps_pps = 0; 387 | } 388 | put_slice_header(c); 389 | 390 | /* set input size */ 391 | writel(c->mb_stride << 16, c->regs + VE_ISP_INPUT_STRIDE); 392 | writel((c->mb_width << 16) | (c->mb_height << 0), c->regs + VE_ISP_INPUT_SIZE); 393 | 394 | /* set input format */ 395 | writel(c->input_color_format << 29, c->regs + VE_ISP_CTRL); 396 | 397 | /* set input buffer */ 398 | writel(c->luma_buffer->phys, c->regs + VE_ISP_INPUT_LUMA); 399 | writel(c->chroma_buffer->phys, c->regs + VE_ISP_INPUT_CHROMA); 400 | 401 | /* set reconstruction buffers */ 402 | struct h264enc_ref_pic *ref_pic = &c->ref_picture[c->current_frame_num % 2]; 403 | writel(ref_pic->luma_buffer->phys, c->regs + VE_AVC_REC_LUMA); 404 | writel(ref_pic->chroma_buffer->phys, c->regs + VE_AVC_REC_CHROMA); 405 | writel(ref_pic->extra_buffer->phys, c->regs + VE_AVC_REC_SLUMA); 406 | 407 | /* set reference buffers */ 408 | if (c->current_slice_type != SLICE_I) 409 | { 410 | ref_pic = &c->ref_picture[(c->current_frame_num + 1) % 2]; 411 | writel(ref_pic->luma_buffer->phys, c->regs + VE_AVC_REF_LUMA); 412 | writel(ref_pic->chroma_buffer->phys, c->regs + VE_AVC_REF_CHROMA); 413 | writel(ref_pic->extra_buffer->phys, c->regs + VE_AVC_REF_SLUMA); 414 | } 415 | /* set unknown purpose buffers */ 416 | writel(c->extra_buffer_line->phys, c->regs + VE_AVC_MB_INFO); 417 | writel(c->extra_buffer_frame->phys, c->regs + VE_AVC_UNK_BUF); 418 | 419 | /* enable interrupt and clear status flags */ 420 | writel(readl(c->regs + VE_AVC_CTRL) | 0xf, c->regs + VE_AVC_CTRL); 421 | writel(readl(c->regs + VE_AVC_STATUS) | 0x7, c->regs + VE_AVC_STATUS); 422 | 423 | /* set encoding parameters */ 424 | uint32_t params = 0x0; 425 | if (c->entropy_coding_mode_flag) 426 | params |= 0x100; 427 | if (c->current_slice_type == SLICE_P) 428 | params |= 0x10; 429 | writel(params, c->regs + VE_AVC_PARAM); 430 | writel((4 << 16) | (c->pic_init_qp << 8) | c->pic_init_qp, c->regs + VE_AVC_QP); 431 | writel(0x00000104, c->regs + VE_AVC_MOTION_EST); 432 | 433 | /* trigger encoding */ 434 | writel(0x8, c->regs + VE_AVC_TRIGGER); 435 | ve_wait(1); 436 | 437 | /* check result */ 438 | uint32_t status = readl(c->regs + VE_AVC_STATUS); 439 | writel(status, c->regs + VE_AVC_STATUS); 440 | 441 | /* save bytestream length */ 442 | c->bytestream_length = readl(c->regs + VE_AVC_VLE_LENGTH) / 8; 443 | 444 | /* next frame */ 445 | c->current_frame_num++; 446 | if (c->current_frame_num >= c->keyframe_interval) 447 | c->current_frame_num = 0; 448 | 449 | ve_put(); 450 | //printf("Status 0x%08X\n", status); 451 | return (status & 0x3) == 0x1; 452 | } 453 | -------------------------------------------------------------------------------- /common_ion/kernel-headers/sunxi_display2.h: -------------------------------------------------------------------------------- 1 | #ifndef __SUNXI_DISPLAY_H__ 2 | #define __SUNXI_DISPLAY_H__ 3 | 4 | typedef int bool; 5 | typedef unsigned int u32; 6 | 7 | struct disp_manager; 8 | struct disp_device; 9 | struct disp_smbl; 10 | struct disp_enhance; 11 | struct disp_capture; 12 | 13 | typedef struct {unsigned char alpha;unsigned char red;unsigned char green; unsigned char blue; }disp_color; 14 | typedef struct {int x; int y; unsigned int width; unsigned int height;}disp_rect; 15 | typedef struct {unsigned int width;unsigned int height; }disp_rectsz; 16 | typedef struct {int x; int y; }disp_position; 17 | 18 | typedef enum 19 | { 20 | DISP_FORMAT_ARGB_8888 = 0x00,//MSB A-R-G-B LSB 21 | DISP_FORMAT_ABGR_8888 = 0x01, 22 | DISP_FORMAT_RGBA_8888 = 0x02, 23 | DISP_FORMAT_BGRA_8888 = 0x03, 24 | DISP_FORMAT_XRGB_8888 = 0x04, 25 | DISP_FORMAT_XBGR_8888 = 0x05, 26 | DISP_FORMAT_RGBX_8888 = 0x06, 27 | DISP_FORMAT_BGRX_8888 = 0x07, 28 | DISP_FORMAT_RGB_888 = 0x08, 29 | DISP_FORMAT_BGR_888 = 0x09, 30 | DISP_FORMAT_RGB_565 = 0x0a, 31 | DISP_FORMAT_BGR_565 = 0x0b, 32 | DISP_FORMAT_ARGB_4444 = 0x0c, 33 | DISP_FORMAT_ABGR_4444 = 0x0d, 34 | DISP_FORMAT_RGBA_4444 = 0x0e, 35 | DISP_FORMAT_BGRA_4444 = 0x0f, 36 | DISP_FORMAT_ARGB_1555 = 0x10, 37 | DISP_FORMAT_ABGR_1555 = 0x11, 38 | DISP_FORMAT_RGBA_5551 = 0x12, 39 | DISP_FORMAT_BGRA_5551 = 0x13, 40 | 41 | /* SP: semi-planar, P:planar, I:interleaved 42 | * UVUV: U in the LSBs; VUVU: V in the LSBs */ 43 | DISP_FORMAT_YUV444_I_AYUV = 0x40,//MSB A-Y-U-V LSB, reserved 44 | DISP_FORMAT_YUV444_I_VUYA = 0x41,//MSB V-U-Y-A LSB 45 | DISP_FORMAT_YUV422_I_YVYU = 0x42,//MSB Y-V-Y-U LSB 46 | DISP_FORMAT_YUV422_I_YUYV = 0x43,//MSB Y-U-Y-V LSB 47 | DISP_FORMAT_YUV422_I_UYVY = 0x44,//MSB U-Y-V-Y LSB 48 | DISP_FORMAT_YUV422_I_VYUY = 0x45,//MSB V-Y-U-Y LSB 49 | DISP_FORMAT_YUV444_P = 0x46,//MSB P3-2-1-0 LSB, YYYY UUUU VVVV, reserved 50 | DISP_FORMAT_YUV422_P = 0x47,//MSB P3-2-1-0 LSB YYYY UU VV 51 | DISP_FORMAT_YUV420_P = 0x48,//MSB P3-2-1-0 LSB YYYY U V 52 | DISP_FORMAT_YUV411_P = 0x49,//MSB P3-2-1-0 LSB YYYY U V 53 | DISP_FORMAT_YUV422_SP_UVUV = 0x4a,//MSB V-U-V-U LSB 54 | DISP_FORMAT_YUV422_SP_VUVU = 0x4b,//MSB U-V-U-V LSB 55 | DISP_FORMAT_YUV420_SP_UVUV = 0x4c, 56 | DISP_FORMAT_YUV420_SP_VUVU = 0x4d, 57 | DISP_FORMAT_YUV411_SP_UVUV = 0x4e, 58 | DISP_FORMAT_YUV411_SP_VUVU = 0x4f, 59 | }disp_pixel_format; 60 | 61 | typedef enum 62 | { 63 | DISP_3D_OUT_MODE_CI_1 = 0x5,//column interlaved 1 64 | DISP_3D_OUT_MODE_CI_2 = 0x6,//column interlaved 2 65 | DISP_3D_OUT_MODE_CI_3 = 0x7,//column interlaved 3 66 | DISP_3D_OUT_MODE_CI_4 = 0x8,//column interlaved 4 67 | DISP_3D_OUT_MODE_LIRGB = 0x9,//line interleaved rgb 68 | 69 | DISP_3D_OUT_MODE_TB = 0x0,//top bottom 70 | DISP_3D_OUT_MODE_FP = 0x1,//frame packing 71 | DISP_3D_OUT_MODE_SSF = 0x2,//side by side full 72 | DISP_3D_OUT_MODE_SSH = 0x3,//side by side half 73 | DISP_3D_OUT_MODE_LI = 0x4,//line interleaved 74 | DISP_3D_OUT_MODE_FA = 0xa,//field alternative 75 | }disp_3d_out_mode; 76 | 77 | typedef enum 78 | { 79 | DISP_BT601 = 0, 80 | DISP_BT709 = 1, 81 | DISP_YCC = 2, 82 | }disp_color_space; 83 | 84 | typedef enum 85 | { 86 | DISP_CSC_TYPE_RGB = 0, 87 | DISP_CSC_TYPE_YUV1 = 1,//HDMI 88 | DISP_CSC_TYPE_YUV2 = 2,//TV 89 | }disp_csc_type; 90 | 91 | typedef enum 92 | { 93 | DISP_COLOR_RANGE_16_255 = 0, 94 | DISP_COLOR_RANGE_0_255 = 1, 95 | DISP_COLOR_RANGE_16_235 = 2, 96 | }disp_color_range; 97 | 98 | typedef enum 99 | { 100 | DISP_OUTPUT_TYPE_NONE = 0, 101 | DISP_OUTPUT_TYPE_LCD = 1, 102 | DISP_OUTPUT_TYPE_TV = 2, 103 | DISP_OUTPUT_TYPE_HDMI = 4, 104 | DISP_OUTPUT_TYPE_VGA = 8, 105 | }disp_output_type; 106 | 107 | typedef enum 108 | { 109 | DISP_TV_MOD_480I = 0, 110 | DISP_TV_MOD_576I = 1, 111 | DISP_TV_MOD_480P = 2, 112 | DISP_TV_MOD_576P = 3, 113 | DISP_TV_MOD_720P_50HZ = 4, 114 | DISP_TV_MOD_720P_60HZ = 5, 115 | DISP_TV_MOD_1080I_50HZ = 6, 116 | DISP_TV_MOD_1080I_60HZ = 7, 117 | DISP_TV_MOD_1080P_24HZ = 8, 118 | DISP_TV_MOD_1080P_50HZ = 9, 119 | DISP_TV_MOD_1080P_60HZ = 0xa, 120 | DISP_TV_MOD_1080P_24HZ_3D_FP = 0x17, 121 | DISP_TV_MOD_720P_50HZ_3D_FP = 0x18, 122 | DISP_TV_MOD_720P_60HZ_3D_FP = 0x19, 123 | DISP_TV_MOD_1080P_25HZ = 0x1a, 124 | DISP_TV_MOD_1080P_30HZ = 0x1b, 125 | DISP_TV_MOD_PAL = 0xb, 126 | DISP_TV_MOD_PAL_SVIDEO = 0xc, 127 | DISP_TV_MOD_NTSC = 0xe, 128 | DISP_TV_MOD_NTSC_SVIDEO = 0xf, 129 | DISP_TV_MOD_PAL_M = 0x11, 130 | DISP_TV_MOD_PAL_M_SVIDEO = 0x12, 131 | DISP_TV_MOD_PAL_NC = 0x14, 132 | DISP_TV_MOD_PAL_NC_SVIDEO = 0x15, 133 | DISP_TV_MOD_3840_2160P_30HZ = 0x1c, 134 | DISP_TV_MOD_3840_2160P_25HZ = 0x1d, 135 | DISP_TV_MOD_3840_2160P_24HZ = 0x1e, 136 | DISP_TV_MODE_NUM = 0x1f, 137 | }disp_tv_mode; 138 | 139 | 140 | //FIXME:still need? 141 | typedef enum 142 | { 143 | DISP_EXIT_MODE_CLEAN_ALL = 0, 144 | DISP_EXIT_MODE_CLEAN_PARTLY = 1,//only clean interrupt temply 145 | }disp_exit_mode; 146 | 147 | typedef enum 148 | { 149 | DISP_BF_NORMAL = 0,//non-stereo 150 | DISP_BF_STEREO_TB = 1 << 0,//stereo top-bottom 151 | DISP_BF_STEREO_FP = 1 << 1,//stereo frame packing 152 | DISP_BF_STEREO_SSH = 1 << 2,//stereo side by side half 153 | DISP_BF_STEREO_SSF = 1 << 3,//stereo side by side full 154 | DISP_BF_STEREO_LI = 1 << 4,//stereo line interlace 155 | }disp_buffer_flags; 156 | 157 | typedef enum 158 | { 159 | LAYER_MODE_BUFFER = 0, 160 | LAYER_MODE_COLOR = 1, 161 | }disp_layer_mode; 162 | 163 | typedef enum 164 | { 165 | DISP_SCAN_PROGRESSIVE = 0,//non interlace 166 | DISP_SCAN_INTERLACED_ODD_FLD_FIRST = 1 << 0,//interlace ,odd field first 167 | DISP_SCAN_INTERLACED_EVEN_FLD_FIRST = 1 << 1,//interlace,even field first 168 | }disp_scan_flags; 169 | 170 | typedef struct 171 | { 172 | unsigned int type; 173 | unsigned int mode; 174 | }disp_output; 175 | 176 | typedef struct 177 | { 178 | long long x; 179 | long long y; 180 | long long width; 181 | long long height; 182 | }disp_rect64; 183 | 184 | typedef struct 185 | { 186 | unsigned long long addr[3]; /* address of frame buffer, 187 | single addr for interleaved fomart, 188 | double addr for semi-planar fomart 189 | triple addr for planar format */ 190 | disp_rectsz size[3]; //size for 3 component,unit: pixels 191 | unsigned int align[3]; //align for 3 comonent,unit: bytes(align=2^n,i.e. 1/2/4/8/16/32..) 192 | disp_pixel_format format; 193 | disp_color_space color_space; //color space 194 | unsigned int trd_right_addr[3];/* right address of 3d fb, 195 | used when in frame packing 3d mode */ 196 | bool pre_multiply; //true: pre-multiply fb 197 | disp_rect64 crop; //crop rectangle boundaries 198 | disp_buffer_flags flags; //indicate stereo or non-stereo buffer 199 | disp_scan_flags scan; //scan type & scan order 200 | }disp_fb_info; 201 | 202 | typedef struct 203 | { 204 | disp_layer_mode mode; 205 | unsigned char zorder; /*specifies the front-to-back ordering of the layers on the screen, 206 | the top layer having the highest Z value 207 | can't set zorder, but can get */ 208 | unsigned char alpha_mode; //0: pixel alpha; 1: global alpha; 2: global pixel alpha 209 | unsigned char alpha_value; //global alpha value 210 | disp_rect screen_win; //display window on the screen 211 | bool b_trd_out; //3d display 212 | disp_3d_out_mode out_trd_mode;//3d display mode 213 | union { 214 | unsigned int color; //valid when LAYER_MODE_COLOR 215 | disp_fb_info fb; //framebuffer, valid when LAYER_MODE_BUFFER 216 | }; 217 | 218 | unsigned int id; /* frame id, can get the id of frame display currently 219 | by DISP_LAYER_GET_FRAME_ID */ 220 | }disp_layer_info; 221 | 222 | typedef struct 223 | { 224 | disp_layer_info info; 225 | bool enable; 226 | unsigned int channel; 227 | unsigned int layer_id; 228 | }disp_layer_config; 229 | 230 | typedef struct 231 | { 232 | disp_color ck_max; 233 | disp_color ck_min; 234 | unsigned int red_match_rule;//0/1:always match; 2:match if min<=color<=max; 3:match if color>max or colormax or colormax or color> 16) & 0x7FFF) 35 | #define SUNXI_DISP_VERSION_MINOR_GET(x) ((x) & 0xFFFF) 36 | 37 | typedef struct { 38 | __u8 alpha; 39 | __u8 red; 40 | __u8 green; 41 | __u8 blue; 42 | } __disp_color_t; 43 | typedef struct { 44 | __s32 x; 45 | __s32 y; 46 | __u32 width; 47 | __u32 height; 48 | } __disp_rect_t; 49 | typedef struct { 50 | __u32 width; 51 | __u32 height; 52 | } __disp_rectsz_t; 53 | typedef struct { 54 | __s32 x; 55 | __s32 y; 56 | } __disp_pos_t; 57 | 58 | typedef enum { 59 | DISP_FORMAT_1BPP = 0x0, 60 | DISP_FORMAT_2BPP = 0x1, 61 | DISP_FORMAT_4BPP = 0x2, 62 | DISP_FORMAT_8BPP = 0x3, 63 | DISP_FORMAT_RGB655 = 0x4, 64 | DISP_FORMAT_RGB565 = 0x5, 65 | DISP_FORMAT_RGB556 = 0x6, 66 | DISP_FORMAT_ARGB1555 = 0x7, 67 | DISP_FORMAT_RGBA5551 = 0x8, 68 | DISP_FORMAT_ARGB888 = 0x9, /* alpha padding to 0xff */ 69 | DISP_FORMAT_ARGB8888 = 0xa, 70 | DISP_FORMAT_RGB888 = 0xb, 71 | DISP_FORMAT_ARGB4444 = 0xc, 72 | 73 | DISP_FORMAT_YUV444 = 0x10, 74 | DISP_FORMAT_YUV422 = 0x11, 75 | DISP_FORMAT_YUV420 = 0x12, 76 | DISP_FORMAT_YUV411 = 0x13, 77 | DISP_FORMAT_CSIRGB = 0x14, 78 | } __disp_pixel_fmt_t; 79 | 80 | typedef enum { 81 | /* interleaved,1 address */ 82 | DISP_MOD_INTERLEAVED = 0x1, 83 | /* 84 | * No macroblock plane mode, 3 address, RGB/YUV each channel were stored 85 | */ 86 | DISP_MOD_NON_MB_PLANAR = 0x0, 87 | /* No macroblock UV packaged mode, 2 address, Y and UV were stored */ 88 | DISP_MOD_NON_MB_UV_COMBINED = 0x2, 89 | /* Macroblock plane mode, 3 address,RGB/YUV each channel were stored */ 90 | DISP_MOD_MB_PLANAR = 0x4, 91 | /* Macroblock UV packaged mode, 2 address, Y and UV were stored */ 92 | DISP_MOD_MB_UV_COMBINED = 0x6, 93 | } __disp_pixel_mod_t; 94 | 95 | typedef enum { 96 | /* for interleave argb8888 */ 97 | DISP_SEQ_ARGB = 0x0, /* A at a high level */ 98 | DISP_SEQ_BGRA = 0x2, 99 | 100 | /* for interleaved yuv422 */ 101 | DISP_SEQ_UYVY = 0x3, 102 | DISP_SEQ_YUYV = 0x4, 103 | DISP_SEQ_VYUY = 0x5, 104 | DISP_SEQ_YVYU = 0x6, 105 | 106 | /* for interleaved yuv444 */ 107 | DISP_SEQ_AYUV = 0x7, 108 | DISP_SEQ_VUYA = 0x8, 109 | 110 | /* for uv_combined yuv420 */ 111 | DISP_SEQ_UVUV = 0x9, 112 | DISP_SEQ_VUVU = 0xa, 113 | 114 | /* for 16bpp rgb */ 115 | DISP_SEQ_P10 = 0xd, /* p1 high */ 116 | DISP_SEQ_P01 = 0xe, /* p0 high */ 117 | 118 | /* for planar format or 8bpp rgb */ 119 | DISP_SEQ_P3210 = 0xf, /* p3 high */ 120 | DISP_SEQ_P0123 = 0x10, /* p0 high */ 121 | 122 | /* for 4bpp rgb */ 123 | DISP_SEQ_P76543210 = 0x11, 124 | DISP_SEQ_P67452301 = 0x12, 125 | DISP_SEQ_P10325476 = 0x13, 126 | DISP_SEQ_P01234567 = 0x14, 127 | 128 | /* for 2bpp rgb */ 129 | /* 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0 */ 130 | DISP_SEQ_2BPP_BIG_BIG = 0x15, 131 | /* 12,13,14,15,8,9,10,11,4,5,6,7,0,1,2,3 */ 132 | DISP_SEQ_2BPP_BIG_LITTER = 0x16, 133 | /* 3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12 */ 134 | DISP_SEQ_2BPP_LITTER_BIG = 0x17, 135 | /* 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 */ 136 | DISP_SEQ_2BPP_LITTER_LITTER = 0x18, 137 | 138 | /* for 1bpp rgb */ 139 | /* 140 | * 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16, 141 | * 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 142 | */ 143 | DISP_SEQ_1BPP_BIG_BIG = 0x19, 144 | /* 145 | * 24,25,26,27,28,29,30,31,16,17,18,19,20,21,22,23, 146 | * 8, 9,10,11,12,13,14,15, 0, 1, 2, 3, 4, 5, 6, 7 147 | */ 148 | DISP_SEQ_1BPP_BIG_LITTER = 0x1a, 149 | /* 150 | * 7, 6, 5, 4, 3, 2, 1, 0,15,14,13,12,11,10, 9, 8, 151 | * 23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24 152 | */ 153 | DISP_SEQ_1BPP_LITTER_BIG = 0x1b, 154 | /* 155 | * 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15, 156 | * 16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 157 | */ 158 | DISP_SEQ_1BPP_LITTER_LITTER = 0x1c, 159 | } __disp_pixel_seq_t; 160 | 161 | typedef enum { 162 | DISP_3D_SRC_MODE_TB = 0x0, /* top bottom */ 163 | DISP_3D_SRC_MODE_FP = 0x1, /* frame packing */ 164 | DISP_3D_SRC_MODE_SSF = 0x2, /* side by side full */ 165 | DISP_3D_SRC_MODE_SSH = 0x3, /* side by side half */ 166 | DISP_3D_SRC_MODE_LI = 0x4, /* line interleaved */ 167 | } __disp_3d_src_mode_t; 168 | 169 | typedef enum { 170 | DISP_3D_OUT_MODE_CI_1 = 0x5, /* column interlaved 1 */ 171 | DISP_3D_OUT_MODE_CI_2 = 0x6, /* column interlaved 2 */ 172 | DISP_3D_OUT_MODE_CI_3 = 0x7, /* column interlaved 3 */ 173 | DISP_3D_OUT_MODE_CI_4 = 0x8, /* column interlaved 4 */ 174 | DISP_3D_OUT_MODE_LIRGB = 0x9, /* line interleaved rgb */ 175 | 176 | DISP_3D_OUT_MODE_TB = 0x0, /* top bottom */ 177 | DISP_3D_OUT_MODE_FP = 0x1, /* frame packing */ 178 | DISP_3D_OUT_MODE_SSF = 0x2, /* side by side full */ 179 | DISP_3D_OUT_MODE_SSH = 0x3, /* side by side half */ 180 | DISP_3D_OUT_MODE_LI = 0x4, /* line interleaved */ 181 | DISP_3D_OUT_MODE_FA = 0xa, /* field alternative */ 182 | } __disp_3d_out_mode_t; 183 | 184 | typedef enum { 185 | DISP_BT601 = 0, 186 | DISP_BT709 = 1, 187 | DISP_YCC = 2, 188 | DISP_VXYCC = 3, 189 | } __disp_cs_mode_t; 190 | 191 | typedef enum { 192 | DISP_COLOR_RANGE_16_255 = 0, 193 | DISP_COLOR_RANGE_0_255 = 1, 194 | DISP_COLOR_RANGE_16_235 = 2, 195 | } __disp_color_range_t; 196 | 197 | typedef enum { 198 | DISP_OUTPUT_TYPE_NONE = 0, 199 | DISP_OUTPUT_TYPE_LCD = 1, 200 | DISP_OUTPUT_TYPE_TV = 2, 201 | DISP_OUTPUT_TYPE_HDMI = 4, 202 | DISP_OUTPUT_TYPE_VGA = 8, 203 | } __disp_output_type_t; 204 | 205 | typedef enum { 206 | DISP_TV_NONE = 0, 207 | DISP_TV_CVBS = 1, 208 | DISP_TV_YPBPR = 2, 209 | DISP_TV_SVIDEO = 4, 210 | } __disp_tv_output_t; 211 | 212 | typedef enum { 213 | DISP_TV_MOD_480I = 0, 214 | DISP_TV_MOD_576I = 1, 215 | DISP_TV_MOD_480P = 2, 216 | DISP_TV_MOD_576P = 3, 217 | DISP_TV_MOD_720P_50HZ = 4, 218 | DISP_TV_MOD_720P_60HZ = 5, 219 | DISP_TV_MOD_1080I_50HZ = 6, 220 | DISP_TV_MOD_1080I_60HZ = 7, 221 | DISP_TV_MOD_1080P_24HZ = 8, 222 | DISP_TV_MOD_1080P_50HZ = 9, 223 | DISP_TV_MOD_1080P_60HZ = 0xa, 224 | DISP_TV_MOD_1080P_24HZ_3D_FP = 0x17, 225 | DISP_TV_MOD_720P_50HZ_3D_FP = 0x18, 226 | DISP_TV_MOD_720P_60HZ_3D_FP = 0x19, 227 | DISP_TV_MOD_PAL = 0xb, 228 | DISP_TV_MOD_PAL_SVIDEO = 0xc, 229 | DISP_TV_MOD_NTSC = 0xe, 230 | DISP_TV_MOD_NTSC_SVIDEO = 0xf, 231 | DISP_TV_MOD_PAL_M = 0x11, 232 | DISP_TV_MOD_PAL_M_SVIDEO = 0x12, 233 | DISP_TV_MOD_PAL_NC = 0x14, 234 | DISP_TV_MOD_PAL_NC_SVIDEO = 0x15, 235 | 236 | DISP_TV_MOD_H1360_V768_60HZ = 0x1a, 237 | DISP_TV_MOD_H1280_V1024_60HZ = 0x1b, 238 | 239 | DISP_TV_MODE_NUM = 0x1c, 240 | 241 | /* Reserved, do not use in fex files */ 242 | DISP_TV_MODE_EDID = 0xff 243 | } __disp_tv_mode_t; 244 | 245 | typedef enum { 246 | DISP_TV_DAC_SRC_COMPOSITE = 0, 247 | DISP_TV_DAC_SRC_LUMA = 1, 248 | DISP_TV_DAC_SRC_CHROMA = 2, 249 | DISP_TV_DAC_SRC_Y = 4, 250 | DISP_TV_DAC_SRC_PB = 5, 251 | DISP_TV_DAC_SRC_PR = 6, 252 | DISP_TV_DAC_SRC_NONE = 7, 253 | } __disp_tv_dac_source; 254 | 255 | typedef enum { 256 | DISP_VGA_H1680_V1050 = 0, 257 | DISP_VGA_H1440_V900 = 1, 258 | DISP_VGA_H1360_V768 = 2, 259 | DISP_VGA_H1280_V1024 = 3, 260 | DISP_VGA_H1024_V768 = 4, 261 | DISP_VGA_H800_V600 = 5, 262 | DISP_VGA_H640_V480 = 6, 263 | DISP_VGA_H1440_V900_RB = 7, /* not support yet */ 264 | DISP_VGA_H1680_V1050_RB = 8, /* not support yet */ 265 | DISP_VGA_H1920_V1080_RB = 9, 266 | DISP_VGA_H1920_V1080 = 0xa, 267 | DISP_VGA_H1280_V720 = 0xb, 268 | DISP_VGA_MODE_NUM = 0xc, 269 | } __disp_vga_mode_t; 270 | 271 | typedef enum { 272 | DISP_LCDC_SRC_DE_CH1 = 0, 273 | DISP_LCDC_SRC_DE_CH2 = 1, 274 | DISP_LCDC_SRC_DMA = 2, 275 | DISP_LCDC_SRC_WHITE = 3, 276 | DISP_LCDC_SRC_BLACK = 4, 277 | DISP_LCDC_SRC_BLUT = 5, 278 | } __disp_lcdc_src_t; 279 | 280 | typedef enum { 281 | DISP_LAYER_WORK_MODE_NORMAL = 0, /* normal work mode */ 282 | DISP_LAYER_WORK_MODE_PALETTE = 1, /* palette work mode */ 283 | /* internal frame buffer work mode */ 284 | DISP_LAYER_WORK_MODE_INTER_BUF = 2, 285 | DISP_LAYER_WORK_MODE_GAMMA = 3, /* gamma correction work mode */ 286 | DISP_LAYER_WORK_MODE_SCALER = 4, /* scaler work mode */ 287 | } __disp_layer_work_mode_t; 288 | 289 | typedef enum { 290 | DISP_VIDEO_NATUAL = 0, 291 | DISP_VIDEO_SOFT = 1, 292 | DISP_VIDEO_VERYSOFT = 2, 293 | DISP_VIDEO_SHARP = 3, 294 | DISP_VIDEO_VERYSHARP = 4 295 | } __disp_video_smooth_t; 296 | 297 | typedef enum { 298 | DISP_HWC_MOD_H32_V32_8BPP = 0, 299 | DISP_HWC_MOD_H64_V64_2BPP = 1, 300 | DISP_HWC_MOD_H64_V32_4BPP = 2, 301 | DISP_HWC_MOD_H32_V64_4BPP = 3, 302 | } __disp_hwc_mode_t; 303 | 304 | typedef enum { 305 | DISP_EXIT_MODE_CLEAN_ALL = 0, 306 | DISP_EXIT_MODE_CLEAN_PARTLY = 1, /* only clean interrupt temply */ 307 | } __disp_exit_mode_t; 308 | 309 | typedef enum { /* only for debug!!! */ 310 | DISP_REG_SCALER0 = 0, 311 | DISP_REG_SCALER1 = 1, 312 | DISP_REG_IMAGE0 = 2, 313 | DISP_REG_IMAGE1 = 3, 314 | DISP_REG_LCDC0 = 4, 315 | DISP_REG_LCDC1 = 5, 316 | DISP_REG_TVEC0 = 6, 317 | DISP_REG_TVEC1 = 7, 318 | DISP_REG_CCMU = 8, 319 | DISP_REG_PIOC = 9, 320 | DISP_REG_PWM = 10, 321 | } __disp_reg_index_t; 322 | 323 | typedef struct { 324 | /* 325 | * The way these are treated today, these are physical addresses. Are 326 | * there any actual userspace applications out there that use this? 327 | * -- libv. 328 | */ 329 | /* 330 | * the contents of the frame buffer address for rgb type only addr[0] 331 | * valid 332 | */ 333 | __u32 addr[3]; 334 | __disp_rectsz_t size; /* unit is pixel */ 335 | __disp_pixel_fmt_t format; 336 | __disp_pixel_seq_t seq; 337 | __disp_pixel_mod_t mode; 338 | /* 339 | * blue red color swap flag, FALSE:RGB; TRUE:BGR,only used in rgb format 340 | */ 341 | __bool br_swap; 342 | __disp_cs_mode_t cs_mode; /* color space */ 343 | __bool b_trd_src; /* if 3d source, used for scaler mode layer */ 344 | /* source 3d mode, used for scaler mode layer */ 345 | __disp_3d_src_mode_t trd_mode; 346 | __u32 trd_right_addr[3]; /* used when in frame packing 3d mode */ 347 | } __disp_fb_t; 348 | 349 | typedef struct { 350 | __disp_layer_work_mode_t mode; /* layer work mode */ 351 | __bool b_from_screen; 352 | /* 353 | * layer pipe,0/1,if in scaler mode, scaler0 must be pipe0, 354 | * scaler1 must be pipe1 355 | */ 356 | __u8 pipe; 357 | /* 358 | * layer priority,can get layer prio,but never set layer prio. 359 | * From bottom to top, priority from low to high 360 | */ 361 | __u8 prio; 362 | __bool alpha_en; /* layer global alpha enable */ 363 | __u16 alpha_val; /* layer global alpha value */ 364 | __bool ck_enable; /* layer color key enable */ 365 | /* framebuffer source window,only care x,y if is not scaler mode */ 366 | __disp_rect_t src_win; 367 | __disp_rect_t scn_win; /* screen window */ 368 | __disp_fb_t fb; /* framebuffer */ 369 | __bool b_trd_out; /* if output 3d mode, used for scaler mode layer */ 370 | /* output 3d mode, used for scaler mode layer */ 371 | __disp_3d_out_mode_t out_trd_mode; 372 | } __disp_layer_info_t; 373 | 374 | typedef struct { 375 | __disp_color_t ck_max; 376 | __disp_color_t ck_min; 377 | /* 378 | * 0/1:always match; 379 | * 2:match if min<=color<=max; 380 | * 3:match if color>max or color> 16) & 0x7FFF) 35 | #define SUNXI_DISP_VERSION_MINOR_GET(x) ((x) & 0xFFFF) 36 | 37 | typedef struct { 38 | __u8 alpha; 39 | __u8 red; 40 | __u8 green; 41 | __u8 blue; 42 | } __disp_color_t; 43 | typedef struct { 44 | __s32 x; 45 | __s32 y; 46 | __u32 width; 47 | __u32 height; 48 | } __disp_rect_t; 49 | typedef struct { 50 | __u32 width; 51 | __u32 height; 52 | } __disp_rectsz_t; 53 | typedef struct { 54 | __s32 x; 55 | __s32 y; 56 | } __disp_pos_t; 57 | 58 | typedef enum { 59 | DISP_FORMAT_1BPP = 0x0, 60 | DISP_FORMAT_2BPP = 0x1, 61 | DISP_FORMAT_4BPP = 0x2, 62 | DISP_FORMAT_8BPP = 0x3, 63 | DISP_FORMAT_RGB655 = 0x4, 64 | DISP_FORMAT_RGB565 = 0x5, 65 | DISP_FORMAT_RGB556 = 0x6, 66 | DISP_FORMAT_ARGB1555 = 0x7, 67 | DISP_FORMAT_RGBA5551 = 0x8, 68 | DISP_FORMAT_ARGB888 = 0x9, /* alpha padding to 0xff */ 69 | DISP_FORMAT_ARGB8888 = 0xa, 70 | DISP_FORMAT_RGB888 = 0xb, 71 | DISP_FORMAT_ARGB4444 = 0xc, 72 | 73 | DISP_FORMAT_YUV444 = 0x10, 74 | DISP_FORMAT_YUV422 = 0x11, 75 | DISP_FORMAT_YUV420 = 0x12, 76 | DISP_FORMAT_YUV411 = 0x13, 77 | DISP_FORMAT_CSIRGB = 0x14, 78 | } __disp_pixel_fmt_t; 79 | 80 | typedef enum { 81 | /* interleaved,1 address */ 82 | DISP_MOD_INTERLEAVED = 0x1, 83 | /* 84 | * No macroblock plane mode, 3 address, RGB/YUV each channel were stored 85 | */ 86 | DISP_MOD_NON_MB_PLANAR = 0x0, 87 | /* No macroblock UV packaged mode, 2 address, Y and UV were stored */ 88 | DISP_MOD_NON_MB_UV_COMBINED = 0x2, 89 | /* Macroblock plane mode, 3 address,RGB/YUV each channel were stored */ 90 | DISP_MOD_MB_PLANAR = 0x4, 91 | /* Macroblock UV packaged mode, 2 address, Y and UV were stored */ 92 | DISP_MOD_MB_UV_COMBINED = 0x6, 93 | } __disp_pixel_mod_t; 94 | 95 | typedef enum { 96 | /* for interleave argb8888 */ 97 | DISP_SEQ_ARGB = 0x0, /* A at a high level */ 98 | DISP_SEQ_BGRA = 0x2, 99 | 100 | /* for interleaved yuv422 */ 101 | DISP_SEQ_UYVY = 0x3, 102 | DISP_SEQ_YUYV = 0x4, 103 | DISP_SEQ_VYUY = 0x5, 104 | DISP_SEQ_YVYU = 0x6, 105 | 106 | /* for interleaved yuv444 */ 107 | DISP_SEQ_AYUV = 0x7, 108 | DISP_SEQ_VUYA = 0x8, 109 | 110 | /* for uv_combined yuv420 */ 111 | DISP_SEQ_UVUV = 0x9, 112 | DISP_SEQ_VUVU = 0xa, 113 | 114 | /* for 16bpp rgb */ 115 | DISP_SEQ_P10 = 0xd, /* p1 high */ 116 | DISP_SEQ_P01 = 0xe, /* p0 high */ 117 | 118 | /* for planar format or 8bpp rgb */ 119 | DISP_SEQ_P3210 = 0xf, /* p3 high */ 120 | DISP_SEQ_P0123 = 0x10, /* p0 high */ 121 | 122 | /* for 4bpp rgb */ 123 | DISP_SEQ_P76543210 = 0x11, 124 | DISP_SEQ_P67452301 = 0x12, 125 | DISP_SEQ_P10325476 = 0x13, 126 | DISP_SEQ_P01234567 = 0x14, 127 | 128 | /* for 2bpp rgb */ 129 | /* 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0 */ 130 | DISP_SEQ_2BPP_BIG_BIG = 0x15, 131 | /* 12,13,14,15,8,9,10,11,4,5,6,7,0,1,2,3 */ 132 | DISP_SEQ_2BPP_BIG_LITTER = 0x16, 133 | /* 3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12 */ 134 | DISP_SEQ_2BPP_LITTER_BIG = 0x17, 135 | /* 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 */ 136 | DISP_SEQ_2BPP_LITTER_LITTER = 0x18, 137 | 138 | /* for 1bpp rgb */ 139 | /* 140 | * 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16, 141 | * 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 142 | */ 143 | DISP_SEQ_1BPP_BIG_BIG = 0x19, 144 | /* 145 | * 24,25,26,27,28,29,30,31,16,17,18,19,20,21,22,23, 146 | * 8, 9,10,11,12,13,14,15, 0, 1, 2, 3, 4, 5, 6, 7 147 | */ 148 | DISP_SEQ_1BPP_BIG_LITTER = 0x1a, 149 | /* 150 | * 7, 6, 5, 4, 3, 2, 1, 0,15,14,13,12,11,10, 9, 8, 151 | * 23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24 152 | */ 153 | DISP_SEQ_1BPP_LITTER_BIG = 0x1b, 154 | /* 155 | * 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15, 156 | * 16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 157 | */ 158 | DISP_SEQ_1BPP_LITTER_LITTER = 0x1c, 159 | } __disp_pixel_seq_t; 160 | 161 | typedef enum { 162 | DISP_3D_SRC_MODE_TB = 0x0, /* top bottom */ 163 | DISP_3D_SRC_MODE_FP = 0x1, /* frame packing */ 164 | DISP_3D_SRC_MODE_SSF = 0x2, /* side by side full */ 165 | DISP_3D_SRC_MODE_SSH = 0x3, /* side by side half */ 166 | DISP_3D_SRC_MODE_LI = 0x4, /* line interleaved */ 167 | } __disp_3d_src_mode_t; 168 | 169 | typedef enum { 170 | DISP_3D_OUT_MODE_CI_1 = 0x5, /* column interlaved 1 */ 171 | DISP_3D_OUT_MODE_CI_2 = 0x6, /* column interlaved 2 */ 172 | DISP_3D_OUT_MODE_CI_3 = 0x7, /* column interlaved 3 */ 173 | DISP_3D_OUT_MODE_CI_4 = 0x8, /* column interlaved 4 */ 174 | DISP_3D_OUT_MODE_LIRGB = 0x9, /* line interleaved rgb */ 175 | 176 | DISP_3D_OUT_MODE_TB = 0x0, /* top bottom */ 177 | DISP_3D_OUT_MODE_FP = 0x1, /* frame packing */ 178 | DISP_3D_OUT_MODE_SSF = 0x2, /* side by side full */ 179 | DISP_3D_OUT_MODE_SSH = 0x3, /* side by side half */ 180 | DISP_3D_OUT_MODE_LI = 0x4, /* line interleaved */ 181 | DISP_3D_OUT_MODE_FA = 0xa, /* field alternative */ 182 | } __disp_3d_out_mode_t; 183 | 184 | typedef enum { 185 | DISP_BT601 = 0, 186 | DISP_BT709 = 1, 187 | DISP_YCC = 2, 188 | DISP_VXYCC = 3, 189 | } __disp_cs_mode_t; 190 | 191 | typedef enum { 192 | DISP_COLOR_RANGE_16_255 = 0, 193 | DISP_COLOR_RANGE_0_255 = 1, 194 | DISP_COLOR_RANGE_16_235 = 2, 195 | } __disp_color_range_t; 196 | 197 | typedef enum { 198 | DISP_OUTPUT_TYPE_NONE = 0, 199 | DISP_OUTPUT_TYPE_LCD = 1, 200 | DISP_OUTPUT_TYPE_TV = 2, 201 | DISP_OUTPUT_TYPE_HDMI = 4, 202 | DISP_OUTPUT_TYPE_VGA = 8, 203 | } __disp_output_type_t; 204 | 205 | typedef enum { 206 | DISP_TV_NONE = 0, 207 | DISP_TV_CVBS = 1, 208 | DISP_TV_YPBPR = 2, 209 | DISP_TV_SVIDEO = 4, 210 | } __disp_tv_output_t; 211 | 212 | typedef enum { 213 | DISP_TV_MOD_480I = 0, 214 | DISP_TV_MOD_576I = 1, 215 | DISP_TV_MOD_480P = 2, 216 | DISP_TV_MOD_576P = 3, 217 | DISP_TV_MOD_720P_50HZ = 4, 218 | DISP_TV_MOD_720P_60HZ = 5, 219 | DISP_TV_MOD_1080I_50HZ = 6, 220 | DISP_TV_MOD_1080I_60HZ = 7, 221 | DISP_TV_MOD_1080P_24HZ = 8, 222 | DISP_TV_MOD_1080P_50HZ = 9, 223 | DISP_TV_MOD_1080P_60HZ = 0xa, 224 | DISP_TV_MOD_1080P_24HZ_3D_FP = 0x17, 225 | DISP_TV_MOD_720P_50HZ_3D_FP = 0x18, 226 | DISP_TV_MOD_720P_60HZ_3D_FP = 0x19, 227 | DISP_TV_MOD_PAL = 0xb, 228 | DISP_TV_MOD_PAL_SVIDEO = 0xc, 229 | DISP_TV_MOD_NTSC = 0xe, 230 | DISP_TV_MOD_NTSC_SVIDEO = 0xf, 231 | DISP_TV_MOD_PAL_M = 0x11, 232 | DISP_TV_MOD_PAL_M_SVIDEO = 0x12, 233 | DISP_TV_MOD_PAL_NC = 0x14, 234 | DISP_TV_MOD_PAL_NC_SVIDEO = 0x15, 235 | 236 | DISP_TV_MOD_H1360_V768_60HZ = 0x1a, 237 | DISP_TV_MOD_H1280_V1024_60HZ = 0x1b, 238 | 239 | DISP_TV_MODE_NUM = 0x1c, 240 | 241 | /* Reserved, do not use in fex files */ 242 | DISP_TV_MODE_EDID = 0xff 243 | } __disp_tv_mode_t; 244 | 245 | typedef enum { 246 | DISP_TV_DAC_SRC_COMPOSITE = 0, 247 | DISP_TV_DAC_SRC_LUMA = 1, 248 | DISP_TV_DAC_SRC_CHROMA = 2, 249 | DISP_TV_DAC_SRC_Y = 4, 250 | DISP_TV_DAC_SRC_PB = 5, 251 | DISP_TV_DAC_SRC_PR = 6, 252 | DISP_TV_DAC_SRC_NONE = 7, 253 | } __disp_tv_dac_source; 254 | 255 | typedef enum { 256 | DISP_VGA_H1680_V1050 = 0, 257 | DISP_VGA_H1440_V900 = 1, 258 | DISP_VGA_H1360_V768 = 2, 259 | DISP_VGA_H1280_V1024 = 3, 260 | DISP_VGA_H1024_V768 = 4, 261 | DISP_VGA_H800_V600 = 5, 262 | DISP_VGA_H640_V480 = 6, 263 | DISP_VGA_H1440_V900_RB = 7, /* not support yet */ 264 | DISP_VGA_H1680_V1050_RB = 8, /* not support yet */ 265 | DISP_VGA_H1920_V1080_RB = 9, 266 | DISP_VGA_H1920_V1080 = 0xa, 267 | DISP_VGA_H1280_V720 = 0xb, 268 | DISP_VGA_MODE_NUM = 0xc, 269 | } __disp_vga_mode_t; 270 | 271 | typedef enum { 272 | DISP_LCDC_SRC_DE_CH1 = 0, 273 | DISP_LCDC_SRC_DE_CH2 = 1, 274 | DISP_LCDC_SRC_DMA = 2, 275 | DISP_LCDC_SRC_WHITE = 3, 276 | DISP_LCDC_SRC_BLACK = 4, 277 | DISP_LCDC_SRC_BLUT = 5, 278 | } __disp_lcdc_src_t; 279 | 280 | typedef enum { 281 | DISP_LAYER_WORK_MODE_NORMAL = 0, /* normal work mode */ 282 | DISP_LAYER_WORK_MODE_PALETTE = 1, /* palette work mode */ 283 | /* internal frame buffer work mode */ 284 | DISP_LAYER_WORK_MODE_INTER_BUF = 2, 285 | DISP_LAYER_WORK_MODE_GAMMA = 3, /* gamma correction work mode */ 286 | DISP_LAYER_WORK_MODE_SCALER = 4, /* scaler work mode */ 287 | } __disp_layer_work_mode_t; 288 | 289 | typedef enum { 290 | DISP_VIDEO_NATUAL = 0, 291 | DISP_VIDEO_SOFT = 1, 292 | DISP_VIDEO_VERYSOFT = 2, 293 | DISP_VIDEO_SHARP = 3, 294 | DISP_VIDEO_VERYSHARP = 4 295 | } __disp_video_smooth_t; 296 | 297 | typedef enum { 298 | DISP_HWC_MOD_H32_V32_8BPP = 0, 299 | DISP_HWC_MOD_H64_V64_2BPP = 1, 300 | DISP_HWC_MOD_H64_V32_4BPP = 2, 301 | DISP_HWC_MOD_H32_V64_4BPP = 3, 302 | } __disp_hwc_mode_t; 303 | 304 | typedef enum { 305 | DISP_EXIT_MODE_CLEAN_ALL = 0, 306 | DISP_EXIT_MODE_CLEAN_PARTLY = 1, /* only clean interrupt temply */ 307 | } __disp_exit_mode_t; 308 | 309 | typedef enum { /* only for debug!!! */ 310 | DISP_REG_SCALER0 = 0, 311 | DISP_REG_SCALER1 = 1, 312 | DISP_REG_IMAGE0 = 2, 313 | DISP_REG_IMAGE1 = 3, 314 | DISP_REG_LCDC0 = 4, 315 | DISP_REG_LCDC1 = 5, 316 | DISP_REG_TVEC0 = 6, 317 | DISP_REG_TVEC1 = 7, 318 | DISP_REG_CCMU = 8, 319 | DISP_REG_PIOC = 9, 320 | DISP_REG_PWM = 10, 321 | } __disp_reg_index_t; 322 | 323 | typedef struct { 324 | /* 325 | * The way these are treated today, these are physical addresses. Are 326 | * there any actual userspace applications out there that use this? 327 | * -- libv. 328 | */ 329 | /* 330 | * the contents of the frame buffer address for rgb type only addr[0] 331 | * valid 332 | */ 333 | __u32 addr[3]; 334 | __disp_rectsz_t size; /* unit is pixel */ 335 | __disp_pixel_fmt_t format; 336 | __disp_pixel_seq_t seq; 337 | __disp_pixel_mod_t mode; 338 | /* 339 | * blue red color swap flag, FALSE:RGB; TRUE:BGR,only used in rgb format 340 | */ 341 | __bool br_swap; 342 | __disp_cs_mode_t cs_mode; /* color space */ 343 | __bool b_trd_src; /* if 3d source, used for scaler mode layer */ 344 | /* source 3d mode, used for scaler mode layer */ 345 | __disp_3d_src_mode_t trd_mode; 346 | __u32 trd_right_addr[3]; /* used when in frame packing 3d mode */ 347 | } __disp_fb_t; 348 | 349 | typedef struct { 350 | __disp_layer_work_mode_t mode; /* layer work mode */ 351 | __bool b_from_screen; 352 | /* 353 | * layer pipe,0/1,if in scaler mode, scaler0 must be pipe0, 354 | * scaler1 must be pipe1 355 | */ 356 | __u8 pipe; 357 | /* 358 | * layer priority,can get layer prio,but never set layer prio. 359 | * From bottom to top, priority from low to high 360 | */ 361 | __u8 prio; 362 | __bool alpha_en; /* layer global alpha enable */ 363 | __u16 alpha_val; /* layer global alpha value */ 364 | __bool ck_enable; /* layer color key enable */ 365 | /* framebuffer source window,only care x,y if is not scaler mode */ 366 | __disp_rect_t src_win; 367 | __disp_rect_t scn_win; /* screen window */ 368 | __disp_fb_t fb; /* framebuffer */ 369 | __bool b_trd_out; /* if output 3d mode, used for scaler mode layer */ 370 | /* output 3d mode, used for scaler mode layer */ 371 | __disp_3d_out_mode_t out_trd_mode; 372 | } __disp_layer_info_t; 373 | 374 | typedef struct { 375 | __disp_color_t ck_max; 376 | __disp_color_t ck_min; 377 | /* 378 | * 0/1:always match; 379 | * 2:match if min<=color<=max; 380 | * 3:match if color>max or color> 16) & 0x7FFF) 35 | #define SUNXI_DISP_VERSION_MINOR_GET(x) ((x) & 0xFFFF) 36 | 37 | typedef struct { 38 | __u8 alpha; 39 | __u8 red; 40 | __u8 green; 41 | __u8 blue; 42 | } __disp_color_t; 43 | typedef struct { 44 | __s32 x; 45 | __s32 y; 46 | __u32 width; 47 | __u32 height; 48 | } __disp_rect_t; 49 | typedef struct { 50 | __u32 width; 51 | __u32 height; 52 | } __disp_rectsz_t; 53 | typedef struct { 54 | __s32 x; 55 | __s32 y; 56 | } __disp_pos_t; 57 | 58 | typedef enum { 59 | DISP_FORMAT_1BPP = 0x0, 60 | DISP_FORMAT_2BPP = 0x1, 61 | DISP_FORMAT_4BPP = 0x2, 62 | DISP_FORMAT_8BPP = 0x3, 63 | DISP_FORMAT_RGB655 = 0x4, 64 | DISP_FORMAT_RGB565 = 0x5, 65 | DISP_FORMAT_RGB556 = 0x6, 66 | DISP_FORMAT_ARGB1555 = 0x7, 67 | DISP_FORMAT_RGBA5551 = 0x8, 68 | DISP_FORMAT_ARGB888 = 0x9, /* alpha padding to 0xff */ 69 | DISP_FORMAT_ARGB8888 = 0xa, 70 | DISP_FORMAT_RGB888 = 0xb, 71 | DISP_FORMAT_ARGB4444 = 0xc, 72 | 73 | DISP_FORMAT_YUV444 = 0x10, 74 | DISP_FORMAT_YUV422 = 0x11, 75 | DISP_FORMAT_YUV420 = 0x12, 76 | DISP_FORMAT_YUV411 = 0x13, 77 | DISP_FORMAT_CSIRGB = 0x14, 78 | } __disp_pixel_fmt_t; 79 | 80 | typedef enum { 81 | /* interleaved,1 address */ 82 | DISP_MOD_INTERLEAVED = 0x1, 83 | /* 84 | * No macroblock plane mode, 3 address, RGB/YUV each channel were stored 85 | */ 86 | DISP_MOD_NON_MB_PLANAR = 0x0, 87 | /* No macroblock UV packaged mode, 2 address, Y and UV were stored */ 88 | DISP_MOD_NON_MB_UV_COMBINED = 0x2, 89 | /* Macroblock plane mode, 3 address,RGB/YUV each channel were stored */ 90 | DISP_MOD_MB_PLANAR = 0x4, 91 | /* Macroblock UV packaged mode, 2 address, Y and UV were stored */ 92 | DISP_MOD_MB_UV_COMBINED = 0x6, 93 | } __disp_pixel_mod_t; 94 | 95 | typedef enum { 96 | /* for interleave argb8888 */ 97 | DISP_SEQ_ARGB = 0x0, /* A at a high level */ 98 | DISP_SEQ_BGRA = 0x2, 99 | 100 | /* for interleaved yuv422 */ 101 | DISP_SEQ_UYVY = 0x3, 102 | DISP_SEQ_YUYV = 0x4, 103 | DISP_SEQ_VYUY = 0x5, 104 | DISP_SEQ_YVYU = 0x6, 105 | 106 | /* for interleaved yuv444 */ 107 | DISP_SEQ_AYUV = 0x7, 108 | DISP_SEQ_VUYA = 0x8, 109 | 110 | /* for uv_combined yuv420 */ 111 | DISP_SEQ_UVUV = 0x9, 112 | DISP_SEQ_VUVU = 0xa, 113 | 114 | /* for 16bpp rgb */ 115 | DISP_SEQ_P10 = 0xd, /* p1 high */ 116 | DISP_SEQ_P01 = 0xe, /* p0 high */ 117 | 118 | /* for planar format or 8bpp rgb */ 119 | DISP_SEQ_P3210 = 0xf, /* p3 high */ 120 | DISP_SEQ_P0123 = 0x10, /* p0 high */ 121 | 122 | /* for 4bpp rgb */ 123 | DISP_SEQ_P76543210 = 0x11, 124 | DISP_SEQ_P67452301 = 0x12, 125 | DISP_SEQ_P10325476 = 0x13, 126 | DISP_SEQ_P01234567 = 0x14, 127 | 128 | /* for 2bpp rgb */ 129 | /* 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0 */ 130 | DISP_SEQ_2BPP_BIG_BIG = 0x15, 131 | /* 12,13,14,15,8,9,10,11,4,5,6,7,0,1,2,3 */ 132 | DISP_SEQ_2BPP_BIG_LITTER = 0x16, 133 | /* 3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12 */ 134 | DISP_SEQ_2BPP_LITTER_BIG = 0x17, 135 | /* 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 */ 136 | DISP_SEQ_2BPP_LITTER_LITTER = 0x18, 137 | 138 | /* for 1bpp rgb */ 139 | /* 140 | * 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16, 141 | * 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 142 | */ 143 | DISP_SEQ_1BPP_BIG_BIG = 0x19, 144 | /* 145 | * 24,25,26,27,28,29,30,31,16,17,18,19,20,21,22,23, 146 | * 8, 9,10,11,12,13,14,15, 0, 1, 2, 3, 4, 5, 6, 7 147 | */ 148 | DISP_SEQ_1BPP_BIG_LITTER = 0x1a, 149 | /* 150 | * 7, 6, 5, 4, 3, 2, 1, 0,15,14,13,12,11,10, 9, 8, 151 | * 23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24 152 | */ 153 | DISP_SEQ_1BPP_LITTER_BIG = 0x1b, 154 | /* 155 | * 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15, 156 | * 16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 157 | */ 158 | DISP_SEQ_1BPP_LITTER_LITTER = 0x1c, 159 | } __disp_pixel_seq_t; 160 | 161 | typedef enum { 162 | DISP_3D_SRC_MODE_TB = 0x0, /* top bottom */ 163 | DISP_3D_SRC_MODE_FP = 0x1, /* frame packing */ 164 | DISP_3D_SRC_MODE_SSF = 0x2, /* side by side full */ 165 | DISP_3D_SRC_MODE_SSH = 0x3, /* side by side half */ 166 | DISP_3D_SRC_MODE_LI = 0x4, /* line interleaved */ 167 | } __disp_3d_src_mode_t; 168 | 169 | typedef enum { 170 | DISP_3D_OUT_MODE_CI_1 = 0x5, /* column interlaved 1 */ 171 | DISP_3D_OUT_MODE_CI_2 = 0x6, /* column interlaved 2 */ 172 | DISP_3D_OUT_MODE_CI_3 = 0x7, /* column interlaved 3 */ 173 | DISP_3D_OUT_MODE_CI_4 = 0x8, /* column interlaved 4 */ 174 | DISP_3D_OUT_MODE_LIRGB = 0x9, /* line interleaved rgb */ 175 | 176 | DISP_3D_OUT_MODE_TB = 0x0, /* top bottom */ 177 | DISP_3D_OUT_MODE_FP = 0x1, /* frame packing */ 178 | DISP_3D_OUT_MODE_SSF = 0x2, /* side by side full */ 179 | DISP_3D_OUT_MODE_SSH = 0x3, /* side by side half */ 180 | DISP_3D_OUT_MODE_LI = 0x4, /* line interleaved */ 181 | DISP_3D_OUT_MODE_FA = 0xa, /* field alternative */ 182 | } __disp_3d_out_mode_t; 183 | 184 | typedef enum { 185 | DISP_BT601 = 0, 186 | DISP_BT709 = 1, 187 | DISP_YCC = 2, 188 | DISP_VXYCC = 3, 189 | } __disp_cs_mode_t; 190 | 191 | typedef enum { 192 | DISP_COLOR_RANGE_16_255 = 0, 193 | DISP_COLOR_RANGE_0_255 = 1, 194 | DISP_COLOR_RANGE_16_235 = 2, 195 | } __disp_color_range_t; 196 | 197 | typedef enum { 198 | DISP_OUTPUT_TYPE_NONE = 0, 199 | DISP_OUTPUT_TYPE_LCD = 1, 200 | DISP_OUTPUT_TYPE_TV = 2, 201 | DISP_OUTPUT_TYPE_HDMI = 4, 202 | DISP_OUTPUT_TYPE_VGA = 8, 203 | } __disp_output_type_t; 204 | 205 | typedef enum { 206 | DISP_TV_NONE = 0, 207 | DISP_TV_CVBS = 1, 208 | DISP_TV_YPBPR = 2, 209 | DISP_TV_SVIDEO = 4, 210 | } __disp_tv_output_t; 211 | 212 | typedef enum { 213 | DISP_TV_MOD_480I = 0, 214 | DISP_TV_MOD_576I = 1, 215 | DISP_TV_MOD_480P = 2, 216 | DISP_TV_MOD_576P = 3, 217 | DISP_TV_MOD_720P_50HZ = 4, 218 | DISP_TV_MOD_720P_60HZ = 5, 219 | DISP_TV_MOD_1080I_50HZ = 6, 220 | DISP_TV_MOD_1080I_60HZ = 7, 221 | DISP_TV_MOD_1080P_24HZ = 8, 222 | DISP_TV_MOD_1080P_50HZ = 9, 223 | DISP_TV_MOD_1080P_60HZ = 0xa, 224 | DISP_TV_MOD_1080P_24HZ_3D_FP = 0x17, 225 | DISP_TV_MOD_720P_50HZ_3D_FP = 0x18, 226 | DISP_TV_MOD_720P_60HZ_3D_FP = 0x19, 227 | DISP_TV_MOD_PAL = 0xb, 228 | DISP_TV_MOD_PAL_SVIDEO = 0xc, 229 | DISP_TV_MOD_NTSC = 0xe, 230 | DISP_TV_MOD_NTSC_SVIDEO = 0xf, 231 | DISP_TV_MOD_PAL_M = 0x11, 232 | DISP_TV_MOD_PAL_M_SVIDEO = 0x12, 233 | DISP_TV_MOD_PAL_NC = 0x14, 234 | DISP_TV_MOD_PAL_NC_SVIDEO = 0x15, 235 | 236 | DISP_TV_MOD_H1360_V768_60HZ = 0x1a, 237 | DISP_TV_MOD_H1280_V1024_60HZ = 0x1b, 238 | 239 | DISP_TV_MODE_NUM = 0x1c, 240 | 241 | /* Reserved, do not use in fex files */ 242 | DISP_TV_MODE_EDID = 0xff 243 | } __disp_tv_mode_t; 244 | 245 | typedef enum { 246 | DISP_TV_DAC_SRC_COMPOSITE = 0, 247 | DISP_TV_DAC_SRC_LUMA = 1, 248 | DISP_TV_DAC_SRC_CHROMA = 2, 249 | DISP_TV_DAC_SRC_Y = 4, 250 | DISP_TV_DAC_SRC_PB = 5, 251 | DISP_TV_DAC_SRC_PR = 6, 252 | DISP_TV_DAC_SRC_NONE = 7, 253 | } __disp_tv_dac_source; 254 | 255 | typedef enum { 256 | DISP_VGA_H1680_V1050 = 0, 257 | DISP_VGA_H1440_V900 = 1, 258 | DISP_VGA_H1360_V768 = 2, 259 | DISP_VGA_H1280_V1024 = 3, 260 | DISP_VGA_H1024_V768 = 4, 261 | DISP_VGA_H800_V600 = 5, 262 | DISP_VGA_H640_V480 = 6, 263 | DISP_VGA_H1440_V900_RB = 7, /* not support yet */ 264 | DISP_VGA_H1680_V1050_RB = 8, /* not support yet */ 265 | DISP_VGA_H1920_V1080_RB = 9, 266 | DISP_VGA_H1920_V1080 = 0xa, 267 | DISP_VGA_H1280_V720 = 0xb, 268 | DISP_VGA_MODE_NUM = 0xc, 269 | } __disp_vga_mode_t; 270 | 271 | typedef enum { 272 | DISP_LCDC_SRC_DE_CH1 = 0, 273 | DISP_LCDC_SRC_DE_CH2 = 1, 274 | DISP_LCDC_SRC_DMA = 2, 275 | DISP_LCDC_SRC_WHITE = 3, 276 | DISP_LCDC_SRC_BLACK = 4, 277 | DISP_LCDC_SRC_BLUT = 5, 278 | } __disp_lcdc_src_t; 279 | 280 | typedef enum { 281 | DISP_LAYER_WORK_MODE_NORMAL = 0, /* normal work mode */ 282 | DISP_LAYER_WORK_MODE_PALETTE = 1, /* palette work mode */ 283 | /* internal frame buffer work mode */ 284 | DISP_LAYER_WORK_MODE_INTER_BUF = 2, 285 | DISP_LAYER_WORK_MODE_GAMMA = 3, /* gamma correction work mode */ 286 | DISP_LAYER_WORK_MODE_SCALER = 4, /* scaler work mode */ 287 | } __disp_layer_work_mode_t; 288 | 289 | typedef enum { 290 | DISP_VIDEO_NATUAL = 0, 291 | DISP_VIDEO_SOFT = 1, 292 | DISP_VIDEO_VERYSOFT = 2, 293 | DISP_VIDEO_SHARP = 3, 294 | DISP_VIDEO_VERYSHARP = 4 295 | } __disp_video_smooth_t; 296 | 297 | typedef enum { 298 | DISP_HWC_MOD_H32_V32_8BPP = 0, 299 | DISP_HWC_MOD_H64_V64_2BPP = 1, 300 | DISP_HWC_MOD_H64_V32_4BPP = 2, 301 | DISP_HWC_MOD_H32_V64_4BPP = 3, 302 | } __disp_hwc_mode_t; 303 | 304 | typedef enum { 305 | DISP_EXIT_MODE_CLEAN_ALL = 0, 306 | DISP_EXIT_MODE_CLEAN_PARTLY = 1, /* only clean interrupt temply */ 307 | } __disp_exit_mode_t; 308 | 309 | typedef enum { /* only for debug!!! */ 310 | DISP_REG_SCALER0 = 0, 311 | DISP_REG_SCALER1 = 1, 312 | DISP_REG_IMAGE0 = 2, 313 | DISP_REG_IMAGE1 = 3, 314 | DISP_REG_LCDC0 = 4, 315 | DISP_REG_LCDC1 = 5, 316 | DISP_REG_TVEC0 = 6, 317 | DISP_REG_TVEC1 = 7, 318 | DISP_REG_CCMU = 8, 319 | DISP_REG_PIOC = 9, 320 | DISP_REG_PWM = 10, 321 | } __disp_reg_index_t; 322 | 323 | typedef struct { 324 | /* 325 | * The way these are treated today, these are physical addresses. Are 326 | * there any actual userspace applications out there that use this? 327 | * -- libv. 328 | */ 329 | /* 330 | * the contents of the frame buffer address for rgb type only addr[0] 331 | * valid 332 | */ 333 | __u32 addr[3]; 334 | __disp_rectsz_t size; /* unit is pixel */ 335 | __disp_pixel_fmt_t format; 336 | __disp_pixel_seq_t seq; 337 | __disp_pixel_mod_t mode; 338 | /* 339 | * blue red color swap flag, FALSE:RGB; TRUE:BGR,only used in rgb format 340 | */ 341 | __bool br_swap; 342 | __disp_cs_mode_t cs_mode; /* color space */ 343 | __bool b_trd_src; /* if 3d source, used for scaler mode layer */ 344 | /* source 3d mode, used for scaler mode layer */ 345 | __disp_3d_src_mode_t trd_mode; 346 | __u32 trd_right_addr[3]; /* used when in frame packing 3d mode */ 347 | } __disp_fb_t; 348 | 349 | typedef struct { 350 | __disp_layer_work_mode_t mode; /* layer work mode */ 351 | __bool b_from_screen; 352 | /* 353 | * layer pipe,0/1,if in scaler mode, scaler0 must be pipe0, 354 | * scaler1 must be pipe1 355 | */ 356 | __u8 pipe; 357 | /* 358 | * layer priority,can get layer prio,but never set layer prio. 359 | * From bottom to top, priority from low to high 360 | */ 361 | __u8 prio; 362 | __bool alpha_en; /* layer global alpha enable */ 363 | __u16 alpha_val; /* layer global alpha value */ 364 | __bool ck_enable; /* layer color key enable */ 365 | /* framebuffer source window,only care x,y if is not scaler mode */ 366 | __disp_rect_t src_win; 367 | __disp_rect_t scn_win; /* screen window */ 368 | __disp_fb_t fb; /* framebuffer */ 369 | __bool b_trd_out; /* if output 3d mode, used for scaler mode layer */ 370 | /* output 3d mode, used for scaler mode layer */ 371 | __disp_3d_out_mode_t out_trd_mode; 372 | } __disp_layer_info_t; 373 | 374 | typedef struct { 375 | __disp_color_t ck_max; 376 | __disp_color_t ck_min; 377 | /* 378 | * 0/1:always match; 379 | * 2:match if min<=color<=max; 380 | * 3:match if color>max or color